drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11
  12 /* Verbs header. */
  13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  14 #ifdef PEDANTIC
  15 #pragma GCC diagnostic ignored "-Wpedantic"
  16 #endif
  17 #include <infiniband/verbs.h>
  18 #ifdef PEDANTIC
  19 #pragma GCC diagnostic error "-Wpedantic"
  20 #endif
  21
  22 #include <rte_common.h>
  23 #include <rte_ether.h>
  24 #include <rte_ethdev_driver.h>
  25 #include <rte_flow.h>
  26 #include <rte_flow_driver.h>
  27 #include <rte_malloc.h>
  28 #include <rte_ip.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_flow.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 /* Dev ops structure defined in mlx5.c */
  38 extern const struct eth_dev_ops mlx5_dev_ops;
  39 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
  40
  41 /** Device flow drivers. */
  42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
  44 #endif
  45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  46
  47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  48
  49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  50         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  52         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  53 #endif
  54         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  55         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  56 };
  57
  58 enum mlx5_expansion {
  59         MLX5_EXPANSION_ROOT,
  60         MLX5_EXPANSION_ROOT_OUTER,
  61         MLX5_EXPANSION_ROOT_ETH_VLAN,
  62         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
  63         MLX5_EXPANSION_OUTER_ETH,
  64         MLX5_EXPANSION_OUTER_ETH_VLAN,
  65         MLX5_EXPANSION_OUTER_VLAN,
  66         MLX5_EXPANSION_OUTER_IPV4,
  67         MLX5_EXPANSION_OUTER_IPV4_UDP,
  68         MLX5_EXPANSION_OUTER_IPV4_TCP,
  69         MLX5_EXPANSION_OUTER_IPV6,
  70         MLX5_EXPANSION_OUTER_IPV6_UDP,
  71         MLX5_EXPANSION_OUTER_IPV6_TCP,
  72         MLX5_EXPANSION_VXLAN,
  73         MLX5_EXPANSION_VXLAN_GPE,
  74         MLX5_EXPANSION_GRE,
  75         MLX5_EXPANSION_MPLS,
  76         MLX5_EXPANSION_ETH,
  77         MLX5_EXPANSION_ETH_VLAN,
  78         MLX5_EXPANSION_VLAN,
  79         MLX5_EXPANSION_IPV4,
  80         MLX5_EXPANSION_IPV4_UDP,
  81         MLX5_EXPANSION_IPV4_TCP,
  82         MLX5_EXPANSION_IPV6,
  83         MLX5_EXPANSION_IPV6_UDP,
  84         MLX5_EXPANSION_IPV6_TCP,
  85 };
  86
  87 /** Supported expansion of items. */
  88 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
  89         [MLX5_EXPANSION_ROOT] = {
  90                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
  91                                                  MLX5_EXPANSION_IPV4,
  92                                                  MLX5_EXPANSION_IPV6),
  93                 .type = RTE_FLOW_ITEM_TYPE_END,
  94         },
  95         [MLX5_EXPANSION_ROOT_OUTER] = {
  96                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
  97                                                  MLX5_EXPANSION_OUTER_IPV4,
  98                                                  MLX5_EXPANSION_OUTER_IPV6),
  99                 .type = RTE_FLOW_ITEM_TYPE_END,
 100         },
 101         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 102                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 103                 .type = RTE_FLOW_ITEM_TYPE_END,
 104         },
 105         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 106                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
 107                 .type = RTE_FLOW_ITEM_TYPE_END,
 108         },
 109         [MLX5_EXPANSION_OUTER_ETH] = {
 110                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 111                                                  MLX5_EXPANSION_OUTER_IPV6,
 112                                                  MLX5_EXPANSION_MPLS),
 113                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 114                 .rss_types = 0,
 115         },
 116         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 117                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 118                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 119                 .rss_types = 0,
 120         },
 121         [MLX5_EXPANSION_OUTER_VLAN] = {
 122                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 123                                                  MLX5_EXPANSION_OUTER_IPV6),
 124                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 125         },
 126         [MLX5_EXPANSION_OUTER_IPV4] = {
 127                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 128                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 129                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 130                          MLX5_EXPANSION_GRE,
 131                          MLX5_EXPANSION_IPV4,
 132                          MLX5_EXPANSION_IPV6),
 133                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 134                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 135                         ETH_RSS_NONFRAG_IPV4_OTHER,
 136         },
 137         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 138                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 139                                                  MLX5_EXPANSION_VXLAN_GPE),
 140                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 141                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 142         },
 143         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 144                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 145                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 146         },
 147         [MLX5_EXPANSION_OUTER_IPV6] = {
 148                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 149                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 150                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 151                          MLX5_EXPANSION_IPV4,
 152                          MLX5_EXPANSION_IPV6),
 153                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 154                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 155                         ETH_RSS_NONFRAG_IPV6_OTHER,
 156         },
 157         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 158                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 159                                                  MLX5_EXPANSION_VXLAN_GPE),
 160                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 161                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 162         },
 163         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 164                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 165                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 166         },
 167         [MLX5_EXPANSION_VXLAN] = {
 168                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 169                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 170         },
 171         [MLX5_EXPANSION_VXLAN_GPE] = {
 172                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 173                                                  MLX5_EXPANSION_IPV4,
 174                                                  MLX5_EXPANSION_IPV6),
 175                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 176         },
 177         [MLX5_EXPANSION_GRE] = {
 178                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 179                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 180         },
 181         [MLX5_EXPANSION_MPLS] = {
 182                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 183                                                  MLX5_EXPANSION_IPV6),
 184                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 185         },
 186         [MLX5_EXPANSION_ETH] = {
 187                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 188                                                  MLX5_EXPANSION_IPV6),
 189                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 190         },
 191         [MLX5_EXPANSION_ETH_VLAN] = {
 192                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 193                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 194         },
 195         [MLX5_EXPANSION_VLAN] = {
 196                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 197                                                  MLX5_EXPANSION_IPV6),
 198                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 199         },
 200         [MLX5_EXPANSION_IPV4] = {
 201                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 202                                                  MLX5_EXPANSION_IPV4_TCP),
 203                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 204                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 205                         ETH_RSS_NONFRAG_IPV4_OTHER,
 206         },
 207         [MLX5_EXPANSION_IPV4_UDP] = {
 208                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 209                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 210         },
 211         [MLX5_EXPANSION_IPV4_TCP] = {
 212                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 213                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 214         },
 215         [MLX5_EXPANSION_IPV6] = {
 216                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 217                                                  MLX5_EXPANSION_IPV6_TCP),
 218                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 219                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 220                         ETH_RSS_NONFRAG_IPV6_OTHER,
 221         },
 222         [MLX5_EXPANSION_IPV6_UDP] = {
 223                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 224                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 225         },
 226         [MLX5_EXPANSION_IPV6_TCP] = {
 227                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 228                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 229         },
 230 };
 231
 232 static const struct rte_flow_ops mlx5_flow_ops = {
 233         .validate = mlx5_flow_validate,
 234         .create = mlx5_flow_create,
 235         .destroy = mlx5_flow_destroy,
 236         .flush = mlx5_flow_flush,
 237         .isolate = mlx5_flow_isolate,
 238         .query = mlx5_flow_query,
 239 };
 240
 241 /* Convert FDIR request to Generic flow. */
 242 struct mlx5_fdir {
 243         struct rte_flow_attr attr;
 244         struct rte_flow_item items[4];
 245         struct rte_flow_item_eth l2;
 246         struct rte_flow_item_eth l2_mask;
 247         union {
 248                 struct rte_flow_item_ipv4 ipv4;
 249                 struct rte_flow_item_ipv6 ipv6;
 250         } l3;
 251         union {
 252                 struct rte_flow_item_ipv4 ipv4;
 253                 struct rte_flow_item_ipv6 ipv6;
 254         } l3_mask;
 255         union {
 256                 struct rte_flow_item_udp udp;
 257                 struct rte_flow_item_tcp tcp;
 258         } l4;
 259         union {
 260                 struct rte_flow_item_udp udp;
 261                 struct rte_flow_item_tcp tcp;
 262         } l4_mask;
 263         struct rte_flow_action actions[2];
 264         struct rte_flow_action_queue queue;
 265 };
 266
 267 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
 268 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
 269         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
 270 };
 271
 272 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
 273 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
 274         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
 275         { 9, 10, 11 }, { 12, 13, 14 },
 276 };
 277
 278 /* Tunnel information. */
 279 struct mlx5_flow_tunnel_info {
 280         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 281         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 282 };
 283
 284 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 285         {
 286                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 287                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 288         },
 289         {
 290                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 291                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 292         },
 293         {
 294                 .tunnel = MLX5_FLOW_LAYER_GRE,
 295                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 296         },
 297         {
 298                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 299                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 300         },
 301         {
 302                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 303                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 304         },
 305         {
 306                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 307                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 308         },
 309         {
 310                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 311                 .ptype = RTE_PTYPE_TUNNEL_IP,
 312         },
 313         {
 314                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 315                 .ptype = RTE_PTYPE_TUNNEL_IP,
 316         },
 317 };
 318
 319 /**
 320  * Discover the maximum number of priority available.
 321  *
 322  * @param[in] dev
 323  *   Pointer to the Ethernet device structure.
 324  *
 325  * @return
 326  *   number of supported flow priority on success, a negative errno
 327  *   value otherwise and rte_errno is set.
 328  */
 329 int
 330 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 331 {
 332         struct mlx5_priv *priv = dev->data->dev_private;
 333         struct {
 334                 struct ibv_flow_attr attr;
 335                 struct ibv_flow_spec_eth eth;
 336                 struct ibv_flow_spec_action_drop drop;
 337         } flow_attr = {
 338                 .attr = {
 339                         .num_of_specs = 2,
 340                         .port = (uint8_t)priv->ibv_port,
 341                 },
 342                 .eth = {
 343                         .type = IBV_FLOW_SPEC_ETH,
 344                         .size = sizeof(struct ibv_flow_spec_eth),
 345                 },
 346                 .drop = {
 347                         .size = sizeof(struct ibv_flow_spec_action_drop),
 348                         .type = IBV_FLOW_SPEC_ACTION_DROP,
 349                 },
 350         };
 351         struct ibv_flow *flow;
 352         struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
 353         uint16_t vprio[] = { 8, 16 };
 354         int i;
 355         int priority = 0;
 356
 357         if (!drop) {
 358                 rte_errno = ENOTSUP;
 359                 return -rte_errno;
 360         }
 361         for (i = 0; i != RTE_DIM(vprio); i++) {
 362                 flow_attr.attr.priority = vprio[i] - 1;
 363                 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
 364                 if (!flow)
 365                         break;
 366                 claim_zero(mlx5_glue->destroy_flow(flow));
 367                 priority = vprio[i];
 368         }
 369         mlx5_hrxq_drop_release(dev);
 370         switch (priority) {
 371         case 8:
 372                 priority = RTE_DIM(priority_map_3);
 373                 break;
 374         case 16:
 375                 priority = RTE_DIM(priority_map_5);
 376                 break;
 377         default:
 378                 rte_errno = ENOTSUP;
 379                 DRV_LOG(ERR,
 380                         "port %u verbs maximum priority: %d expected 8/16",
 381                         dev->data->port_id, priority);
 382                 return -rte_errno;
 383         }
 384         DRV_LOG(INFO, "port %u flow maximum priority: %d",
 385                 dev->data->port_id, priority);
 386         return priority;
 387 }
 388
 389 /**
 390  * Adjust flow priority based on the highest layer and the request priority.
 391  *
 392  * @param[in] dev
 393  *   Pointer to the Ethernet device structure.
 394  * @param[in] priority
 395  *   The rule base priority.
 396  * @param[in] subpriority
 397  *   The priority based on the items.
 398  *
 399  * @return
 400  *   The new priority.
 401  */
 402 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 403                                    uint32_t subpriority)
 404 {
 405         uint32_t res = 0;
 406         struct mlx5_priv *priv = dev->data->dev_private;
 407
 408         switch (priv->config.flow_prio) {
 409         case RTE_DIM(priority_map_3):
 410                 res = priority_map_3[priority][subpriority];
 411                 break;
 412         case RTE_DIM(priority_map_5):
 413                 res = priority_map_5[priority][subpriority];
 414                 break;
 415         }
 416         return  res;
 417 }
 418
 419 /**
 420  * Verify the @p item specifications (spec, last, mask) are compatible with the
 421  * NIC capabilities.
 422  *
 423  * @param[in] item
 424  *   Item specification.
 425  * @param[in] mask
 426  *   @p item->mask or flow default bit-masks.
 427  * @param[in] nic_mask
 428  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 429  * @param[in] size
 430  *   Bit-masks size in bytes.
 431  * @param[out] error
 432  *   Pointer to error structure.
 433  *
 434  * @return
 435  *   0 on success, a negative errno value otherwise and rte_errno is set.
 436  */
 437 int
 438 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 439                           const uint8_t *mask,
 440                           const uint8_t *nic_mask,
 441                           unsigned int size,
 442                           struct rte_flow_error *error)
 443 {
 444         unsigned int i;
 445
 446         assert(nic_mask);
 447         for (i = 0; i < size; ++i)
 448                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 449                         return rte_flow_error_set(error, ENOTSUP,
 450                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 451                                                   item,
 452                                                   "mask enables non supported"
 453                                                   " bits");
 454         if (!item->spec && (item->mask || item->last))
 455                 return rte_flow_error_set(error, EINVAL,
 456                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 457                                           "mask/last without a spec is not"
 458                                           " supported");
 459         if (item->spec && item->last) {
 460                 uint8_t spec[size];
 461                 uint8_t last[size];
 462                 unsigned int i;
 463                 int ret;
 464
 465                 for (i = 0; i < size; ++i) {
 466                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 467                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 468                 }
 469                 ret = memcmp(spec, last, size);
 470                 if (ret != 0)
 471                         return rte_flow_error_set(error, EINVAL,
 472                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 473                                                   item,
 474                                                   "range is not valid");
 475         }
 476         return 0;
 477 }
 478
 479 /**
 480  * Adjust the hash fields according to the @p flow information.
 481  *
 482  * @param[in] dev_flow.
 483  *   Pointer to the mlx5_flow.
 484  * @param[in] tunnel
 485  *   1 when the hash field is for a tunnel item.
 486  * @param[in] layer_types
 487  *   ETH_RSS_* types.
 488  * @param[in] hash_fields
 489  *   Item hash fields.
 490  *
 491  * @return
 492  *   The hash fields that should be used.
 493  */
 494 uint64_t
 495 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
 496                             int tunnel __rte_unused, uint64_t layer_types,
 497                             uint64_t hash_fields)
 498 {
 499         struct rte_flow *flow = dev_flow->flow;
 500 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 501         int rss_request_inner = flow->rss.level >= 2;
 502
 503         /* Check RSS hash level for tunnel. */
 504         if (tunnel && rss_request_inner)
 505                 hash_fields |= IBV_RX_HASH_INNER;
 506         else if (tunnel || rss_request_inner)
 507                 return 0;
 508 #endif
 509         /* Check if requested layer matches RSS hash fields. */
 510         if (!(flow->rss.types & layer_types))
 511                 return 0;
 512         return hash_fields;
 513 }
 514
 515 /**
 516  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 517  * if several tunnel rules are used on this queue, the tunnel ptype will be
 518  * cleared.
 519  *
 520  * @param rxq_ctrl
 521  *   Rx queue to update.
 522  */
 523 static void
 524 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 525 {
 526         unsigned int i;
 527         uint32_t tunnel_ptype = 0;
 528
 529         /* Look up for the ptype to use. */
 530         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 531                 if (!rxq_ctrl->flow_tunnels_n[i])
 532                         continue;
 533                 if (!tunnel_ptype) {
 534                         tunnel_ptype = tunnels_info[i].ptype;
 535                 } else {
 536                         tunnel_ptype = 0;
 537                         break;
 538                 }
 539         }
 540         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 541 }
 542
 543 /**
 544  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 545  * flow.
 546  *
 547  * @param[in] dev
 548  *   Pointer to the Ethernet device structure.
 549  * @param[in] dev_flow
 550  *   Pointer to device flow structure.
 551  */
 552 static void
 553 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 554 {
 555         struct mlx5_priv *priv = dev->data->dev_private;
 556         struct rte_flow *flow = dev_flow->flow;
 557         const int mark = !!(flow->actions &
 558                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 559         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 560         unsigned int i;
 561
 562         for (i = 0; i != flow->rss.queue_num; ++i) {
 563                 int idx = (*flow->queue)[i];
 564                 struct mlx5_rxq_ctrl *rxq_ctrl =
 565                         container_of((*priv->rxqs)[idx],
 566                                      struct mlx5_rxq_ctrl, rxq);
 567
 568                 if (mark) {
 569                         rxq_ctrl->rxq.mark = 1;
 570                         rxq_ctrl->flow_mark_n++;
 571                 }
 572                 if (tunnel) {
 573                         unsigned int j;
 574
 575                         /* Increase the counter matching the flow. */
 576                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 577                                 if ((tunnels_info[j].tunnel &
 578                                      dev_flow->layers) ==
 579                                     tunnels_info[j].tunnel) {
 580                                         rxq_ctrl->flow_tunnels_n[j]++;
 581                                         break;
 582                                 }
 583                         }
 584                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 585                 }
 586         }
 587 }
 588
 589 /**
 590  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
 591  *
 592  * @param[in] dev
 593  *   Pointer to the Ethernet device structure.
 594  * @param[in] flow
 595  *   Pointer to flow structure.
 596  */
 597 static void
 598 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
 599 {
 600         struct mlx5_flow *dev_flow;
 601
 602         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 603                 flow_drv_rxq_flags_set(dev, dev_flow);
 604 }
 605
 606 /**
 607  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 608  * device flow if no other flow uses it with the same kind of request.
 609  *
 610  * @param dev
 611  *   Pointer to Ethernet device.
 612  * @param[in] dev_flow
 613  *   Pointer to the device flow.
 614  */
 615 static void
 616 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 617 {
 618         struct mlx5_priv *priv = dev->data->dev_private;
 619         struct rte_flow *flow = dev_flow->flow;
 620         const int mark = !!(flow->actions &
 621                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 622         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 623         unsigned int i;
 624
 625         assert(dev->data->dev_started);
 626         for (i = 0; i != flow->rss.queue_num; ++i) {
 627                 int idx = (*flow->queue)[i];
 628                 struct mlx5_rxq_ctrl *rxq_ctrl =
 629                         container_of((*priv->rxqs)[idx],
 630                                      struct mlx5_rxq_ctrl, rxq);
 631
 632                 if (mark) {
 633                         rxq_ctrl->flow_mark_n--;
 634                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
 635                 }
 636                 if (tunnel) {
 637                         unsigned int j;
 638
 639                         /* Decrease the counter matching the flow. */
 640                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 641                                 if ((tunnels_info[j].tunnel &
 642                                      dev_flow->layers) ==
 643                                     tunnels_info[j].tunnel) {
 644                                         rxq_ctrl->flow_tunnels_n[j]--;
 645                                         break;
 646                                 }
 647                         }
 648                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 649                 }
 650         }
 651 }
 652
 653 /**
 654  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 655  * @p flow if no other flow uses it with the same kind of request.
 656  *
 657  * @param dev
 658  *   Pointer to Ethernet device.
 659  * @param[in] flow
 660  *   Pointer to the flow.
 661  */
 662 static void
 663 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
 664 {
 665         struct mlx5_flow *dev_flow;
 666
 667         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 668                 flow_drv_rxq_flags_trim(dev, dev_flow);
 669 }
 670
 671 /**
 672  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
 673  *
 674  * @param dev
 675  *   Pointer to Ethernet device.
 676  */
 677 static void
 678 flow_rxq_flags_clear(struct rte_eth_dev *dev)
 679 {
 680         struct mlx5_priv *priv = dev->data->dev_private;
 681         unsigned int i;
 682
 683         for (i = 0; i != priv->rxqs_n; ++i) {
 684                 struct mlx5_rxq_ctrl *rxq_ctrl;
 685                 unsigned int j;
 686
 687                 if (!(*priv->rxqs)[i])
 688                         continue;
 689                 rxq_ctrl = container_of((*priv->rxqs)[i],
 690                                         struct mlx5_rxq_ctrl, rxq);
 691                 rxq_ctrl->flow_mark_n = 0;
 692                 rxq_ctrl->rxq.mark = 0;
 693                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
 694                         rxq_ctrl->flow_tunnels_n[j] = 0;
 695                 rxq_ctrl->rxq.tunnel = 0;
 696         }
 697 }
 698
 699 /*
 700  * Validate the flag action.
 701  *
 702  * @param[in] action_flags
 703  *   Bit-fields that holds the actions detected until now.
 704  * @param[in] attr
 705  *   Attributes of flow that includes this action.
 706  * @param[out] error
 707  *   Pointer to error structure.
 708  *
 709  * @return
 710  *   0 on success, a negative errno value otherwise and rte_errno is set.
 711  */
 712 int
 713 mlx5_flow_validate_action_flag(uint64_t action_flags,
 714                                const struct rte_flow_attr *attr,
 715                                struct rte_flow_error *error)
 716 {
 717
 718         if (action_flags & MLX5_FLOW_ACTION_DROP)
 719                 return rte_flow_error_set(error, EINVAL,
 720                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 721                                           "can't drop and flag in same flow");
 722         if (action_flags & MLX5_FLOW_ACTION_MARK)
 723                 return rte_flow_error_set(error, EINVAL,
 724                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 725                                           "can't mark and flag in same flow");
 726         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 727                 return rte_flow_error_set(error, EINVAL,
 728                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 729                                           "can't have 2 flag"
 730                                           " actions in same flow");
 731         if (attr->egress)
 732                 return rte_flow_error_set(error, ENOTSUP,
 733                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 734                                           "flag action not supported for "
 735                                           "egress");
 736         return 0;
 737 }
 738
 739 /*
 740  * Validate the mark action.
 741  *
 742  * @param[in] action
 743  *   Pointer to the queue action.
 744  * @param[in] action_flags
 745  *   Bit-fields that holds the actions detected until now.
 746  * @param[in] attr
 747  *   Attributes of flow that includes this action.
 748  * @param[out] error
 749  *   Pointer to error structure.
 750  *
 751  * @return
 752  *   0 on success, a negative errno value otherwise and rte_errno is set.
 753  */
 754 int
 755 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
 756                                uint64_t action_flags,
 757                                const struct rte_flow_attr *attr,
 758                                struct rte_flow_error *error)
 759 {
 760         const struct rte_flow_action_mark *mark = action->conf;
 761
 762         if (!mark)
 763                 return rte_flow_error_set(error, EINVAL,
 764                                           RTE_FLOW_ERROR_TYPE_ACTION,
 765                                           action,
 766                                           "configuration cannot be null");
 767         if (mark->id >= MLX5_FLOW_MARK_MAX)
 768                 return rte_flow_error_set(error, EINVAL,
 769                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 770                                           &mark->id,
 771                                           "mark id must in 0 <= id < "
 772                                           RTE_STR(MLX5_FLOW_MARK_MAX));
 773         if (action_flags & MLX5_FLOW_ACTION_DROP)
 774                 return rte_flow_error_set(error, EINVAL,
 775                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 776                                           "can't drop and mark in same flow");
 777         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 778                 return rte_flow_error_set(error, EINVAL,
 779                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 780                                           "can't flag and mark in same flow");
 781         if (action_flags & MLX5_FLOW_ACTION_MARK)
 782                 return rte_flow_error_set(error, EINVAL,
 783                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 784                                           "can't have 2 mark actions in same"
 785                                           " flow");
 786         if (attr->egress)
 787                 return rte_flow_error_set(error, ENOTSUP,
 788                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 789                                           "mark action not supported for "
 790                                           "egress");
 791         return 0;
 792 }
 793
 794 /*
 795  * Validate the drop action.
 796  *
 797  * @param[in] action_flags
 798  *   Bit-fields that holds the actions detected until now.
 799  * @param[in] attr
 800  *   Attributes of flow that includes this action.
 801  * @param[out] error
 802  *   Pointer to error structure.
 803  *
 804  * @return
 805  *   0 on success, a negative errno value otherwise and rte_errno is set.
 806  */
 807 int
 808 mlx5_flow_validate_action_drop(uint64_t action_flags,
 809                                const struct rte_flow_attr *attr,
 810                                struct rte_flow_error *error)
 811 {
 812         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 813                 return rte_flow_error_set(error, EINVAL,
 814                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 815                                           "can't drop and flag in same flow");
 816         if (action_flags & MLX5_FLOW_ACTION_MARK)
 817                 return rte_flow_error_set(error, EINVAL,
 818                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 819                                           "can't drop and mark in same flow");
 820         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
 821                 return rte_flow_error_set(error, EINVAL,
 822                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 823                                           "can't have 2 fate actions in"
 824                                           " same flow");
 825         if (attr->egress)
 826                 return rte_flow_error_set(error, ENOTSUP,
 827                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 828                                           "drop action not supported for "
 829                                           "egress");
 830         return 0;
 831 }
 832
 833 /*
 834  * Validate the queue action.
 835  *
 836  * @param[in] action
 837  *   Pointer to the queue action.
 838  * @param[in] action_flags
 839  *   Bit-fields that holds the actions detected until now.
 840  * @param[in] dev
 841  *   Pointer to the Ethernet device structure.
 842  * @param[in] attr
 843  *   Attributes of flow that includes this action.
 844  * @param[out] error
 845  *   Pointer to error structure.
 846  *
 847  * @return
 848  *   0 on success, a negative errno value otherwise and rte_errno is set.
 849  */
 850 int
 851 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
 852                                 uint64_t action_flags,
 853                                 struct rte_eth_dev *dev,
 854                                 const struct rte_flow_attr *attr,
 855                                 struct rte_flow_error *error)
 856 {
 857         struct mlx5_priv *priv = dev->data->dev_private;
 858         const struct rte_flow_action_queue *queue = action->conf;
 859
 860         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
 861                 return rte_flow_error_set(error, EINVAL,
 862                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 863                                           "can't have 2 fate actions in"
 864                                           " same flow");
 865         if (!priv->rxqs_n)
 866                 return rte_flow_error_set(error, EINVAL,
 867                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 868                                           NULL, "No Rx queues configured");
 869         if (queue->index >= priv->rxqs_n)
 870                 return rte_flow_error_set(error, EINVAL,
 871                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 872                                           &queue->index,
 873                                           "queue index out of range");
 874         if (!(*priv->rxqs)[queue->index])
 875                 return rte_flow_error_set(error, EINVAL,
 876                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 877                                           &queue->index,
 878                                           "queue is not configured");
 879         if (attr->egress)
 880                 return rte_flow_error_set(error, ENOTSUP,
 881                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 882                                           "queue action not supported for "
 883                                           "egress");
 884         return 0;
 885 }
 886
 887 /*
 888  * Validate the rss action.
 889  *
 890  * @param[in] action
 891  *   Pointer to the queue action.
 892  * @param[in] action_flags
 893  *   Bit-fields that holds the actions detected until now.
 894  * @param[in] dev
 895  *   Pointer to the Ethernet device structure.
 896  * @param[in] attr
 897  *   Attributes of flow that includes this action.
 898  * @param[in] item_flags
 899  *   Items that were detected.
 900  * @param[out] error
 901  *   Pointer to error structure.
 902  *
 903  * @return
 904  *   0 on success, a negative errno value otherwise and rte_errno is set.
 905  */
 906 int
 907 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
 908                               uint64_t action_flags,
 909                               struct rte_eth_dev *dev,
 910                               const struct rte_flow_attr *attr,
 911                               uint64_t item_flags,
 912                               struct rte_flow_error *error)
 913 {
 914         struct mlx5_priv *priv = dev->data->dev_private;
 915         const struct rte_flow_action_rss *rss = action->conf;
 916         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
 917         unsigned int i;
 918
 919         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
 920                 return rte_flow_error_set(error, EINVAL,
 921                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 922                                           "can't have 2 fate actions"
 923                                           " in same flow");
 924         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
 925             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
 926                 return rte_flow_error_set(error, ENOTSUP,
 927                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 928                                           &rss->func,
 929                                           "RSS hash function not supported");
 930 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 931         if (rss->level > 2)
 932 #else
 933         if (rss->level > 1)
 934 #endif
 935                 return rte_flow_error_set(error, ENOTSUP,
 936                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 937                                           &rss->level,
 938                                           "tunnel RSS is not supported");
 939         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
 940         if (rss->key_len == 0 && rss->key != NULL)
 941                 return rte_flow_error_set(error, ENOTSUP,
 942                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 943                                           &rss->key_len,
 944                                           "RSS hash key length 0");
 945         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
 946                 return rte_flow_error_set(error, ENOTSUP,
 947                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 948                                           &rss->key_len,
 949                                           "RSS hash key too small");
 950         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
 951                 return rte_flow_error_set(error, ENOTSUP,
 952                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 953                                           &rss->key_len,
 954                                           "RSS hash key too large");
 955         if (rss->queue_num > priv->config.ind_table_max_size)
 956                 return rte_flow_error_set(error, ENOTSUP,
 957                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 958                                           &rss->queue_num,
 959                                           "number of queues too large");
 960         if (rss->types & MLX5_RSS_HF_MASK)
 961                 return rte_flow_error_set(error, ENOTSUP,
 962                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 963                                           &rss->types,
 964                                           "some RSS protocols are not"
 965                                           " supported");
 966         if (!priv->rxqs_n)
 967                 return rte_flow_error_set(error, EINVAL,
 968                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 969                                           NULL, "No Rx queues configured");
 970         if (!rss->queue_num)
 971                 return rte_flow_error_set(error, EINVAL,
 972                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 973                                           NULL, "No queues configured");
 974         for (i = 0; i != rss->queue_num; ++i) {
 975                 if (!(*priv->rxqs)[rss->queue[i]])
 976                         return rte_flow_error_set
 977                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 978                                  &rss->queue[i], "queue is not configured");
 979         }
 980         if (attr->egress)
 981                 return rte_flow_error_set(error, ENOTSUP,
 982                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 983                                           "rss action not supported for "
 984                                           "egress");
 985         if (rss->level > 1 &&  !tunnel)
 986                 return rte_flow_error_set(error, EINVAL,
 987                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
 988                                           "inner RSS is not supported for "
 989                                           "non-tunnel flows");
 990         return 0;
 991 }
 992
 993 /*
 994  * Validate the count action.
 995  *
 996  * @param[in] dev
 997  *   Pointer to the Ethernet device structure.
 998  * @param[in] attr
 999  *   Attributes of flow that includes this action.
1000  * @param[out] error
1001  *   Pointer to error structure.
1002  *
1003  * @return
1004  *   0 on success, a negative errno value otherwise and rte_errno is set.
1005  */
1006 int
1007 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1008                                 const struct rte_flow_attr *attr,
1009                                 struct rte_flow_error *error)
1010 {
1011         if (attr->egress)
1012                 return rte_flow_error_set(error, ENOTSUP,
1013                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1014                                           "count action not supported for "
1015                                           "egress");
1016         return 0;
1017 }
1018
1019 /**
1020  * Verify the @p attributes will be correctly understood by the NIC and store
1021  * them in the @p flow if everything is correct.
1022  *
1023  * @param[in] dev
1024  *   Pointer to the Ethernet device structure.
1025  * @param[in] attributes
1026  *   Pointer to flow attributes
1027  * @param[out] error
1028  *   Pointer to error structure.
1029  *
1030  * @return
1031  *   0 on success, a negative errno value otherwise and rte_errno is set.
1032  */
1033 int
1034 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1035                               const struct rte_flow_attr *attributes,
1036                               struct rte_flow_error *error)
1037 {
1038         struct mlx5_priv *priv = dev->data->dev_private;
1039         uint32_t priority_max = priv->config.flow_prio - 1;
1040
1041         if (attributes->group)
1042                 return rte_flow_error_set(error, ENOTSUP,
1043                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1044                                           NULL, "groups is not supported");
1045         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1046             attributes->priority >= priority_max)
1047                 return rte_flow_error_set(error, ENOTSUP,
1048                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1049                                           NULL, "priority out of range");
1050         if (attributes->egress)
1051                 return rte_flow_error_set(error, ENOTSUP,
1052                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1053                                           "egress is not supported");
1054         if (attributes->transfer && !priv->config.dv_esw_en)
1055                 return rte_flow_error_set(error, ENOTSUP,
1056                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1057                                           NULL, "transfer is not supported");
1058         if (!attributes->ingress)
1059                 return rte_flow_error_set(error, EINVAL,
1060                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1061                                           NULL,
1062                                           "ingress attribute is mandatory");
1063         return 0;
1064 }
1065
1066 /**
1067  * Validate ICMP6 item.
1068  *
1069  * @param[in] item
1070  *   Item specification.
1071  * @param[in] item_flags
1072  *   Bit-fields that holds the items detected until now.
1073  * @param[out] error
1074  *   Pointer to error structure.
1075  *
1076  * @return
1077  *   0 on success, a negative errno value otherwise and rte_errno is set.
1078  */
1079 int
1080 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1081                                uint64_t item_flags,
1082                                uint8_t target_protocol,
1083                                struct rte_flow_error *error)
1084 {
1085         const struct rte_flow_item_icmp6 *mask = item->mask;
1086         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1087         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1088                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1089         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1090                                       MLX5_FLOW_LAYER_OUTER_L4;
1091         int ret;
1092
1093         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1094                 return rte_flow_error_set(error, EINVAL,
1095                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1096                                           "protocol filtering not compatible"
1097                                           " with ICMP6 layer");
1098         if (!(item_flags & l3m))
1099                 return rte_flow_error_set(error, EINVAL,
1100                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1101                                           "IPv6 is mandatory to filter on"
1102                                           " ICMP6");
1103         if (item_flags & l4m)
1104                 return rte_flow_error_set(error, EINVAL,
1105                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1106                                           "multiple L4 layers not supported");
1107         if (!mask)
1108                 mask = &rte_flow_item_icmp6_mask;
1109         ret = mlx5_flow_item_acceptable
1110                 (item, (const uint8_t *)mask,
1111                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1112                  sizeof(struct rte_flow_item_icmp6), error);
1113         if (ret < 0)
1114                 return ret;
1115         return 0;
1116 }
1117
1118 /**
1119  * Validate ICMP item.
1120  *
1121  * @param[in] item
1122  *   Item specification.
1123  * @param[in] item_flags
1124  *   Bit-fields that holds the items detected until now.
1125  * @param[out] error
1126  *   Pointer to error structure.
1127  *
1128  * @return
1129  *   0 on success, a negative errno value otherwise and rte_errno is set.
1130  */
1131 int
1132 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1133                              uint64_t item_flags,
1134                              uint8_t target_protocol,
1135                              struct rte_flow_error *error)
1136 {
1137         const struct rte_flow_item_icmp *mask = item->mask;
1138         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1139         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1140                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1141         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1142                                       MLX5_FLOW_LAYER_OUTER_L4;
1143         int ret;
1144
1145         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1146                 return rte_flow_error_set(error, EINVAL,
1147                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1148                                           "protocol filtering not compatible"
1149                                           " with ICMP layer");
1150         if (!(item_flags & l3m))
1151                 return rte_flow_error_set(error, EINVAL,
1152                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1153                                           "IPv4 is mandatory to filter"
1154                                           " on ICMP");
1155         if (item_flags & l4m)
1156                 return rte_flow_error_set(error, EINVAL,
1157                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1158                                           "multiple L4 layers not supported");
1159         if (!mask)
1160                 mask = &rte_flow_item_icmp_mask;
1161         ret = mlx5_flow_item_acceptable
1162                 (item, (const uint8_t *)mask,
1163                  (const uint8_t *)&rte_flow_item_icmp_mask,
1164                  sizeof(struct rte_flow_item_icmp), error);
1165         if (ret < 0)
1166                 return ret;
1167         return 0;
1168 }
1169
1170 /**
1171  * Validate Ethernet item.
1172  *
1173  * @param[in] item
1174  *   Item specification.
1175  * @param[in] item_flags
1176  *   Bit-fields that holds the items detected until now.
1177  * @param[out] error
1178  *   Pointer to error structure.
1179  *
1180  * @return
1181  *   0 on success, a negative errno value otherwise and rte_errno is set.
1182  */
1183 int
1184 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1185                             uint64_t item_flags,
1186                             struct rte_flow_error *error)
1187 {
1188         const struct rte_flow_item_eth *mask = item->mask;
1189         const struct rte_flow_item_eth nic_mask = {
1190                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1191                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1192                 .type = RTE_BE16(0xffff),
1193         };
1194         int ret;
1195         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1196         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1197                                        MLX5_FLOW_LAYER_OUTER_L2;
1198
1199         if (item_flags & ethm)
1200                 return rte_flow_error_set(error, ENOTSUP,
1201                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1202                                           "multiple L2 layers not supported");
1203         if (!mask)
1204                 mask = &rte_flow_item_eth_mask;
1205         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1206                                         (const uint8_t *)&nic_mask,
1207                                         sizeof(struct rte_flow_item_eth),
1208                                         error);
1209         return ret;
1210 }
1211
1212 /**
1213  * Validate VLAN item.
1214  *
1215  * @param[in] item
1216  *   Item specification.
1217  * @param[in] item_flags
1218  *   Bit-fields that holds the items detected until now.
1219  * @param[in] dev
1220  *   Ethernet device flow is being created on.
1221  * @param[out] error
1222  *   Pointer to error structure.
1223  *
1224  * @return
1225  *   0 on success, a negative errno value otherwise and rte_errno is set.
1226  */
1227 int
1228 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1229                              uint64_t item_flags,
1230                              struct rte_eth_dev *dev,
1231                              struct rte_flow_error *error)
1232 {
1233         const struct rte_flow_item_vlan *spec = item->spec;
1234         const struct rte_flow_item_vlan *mask = item->mask;
1235         const struct rte_flow_item_vlan nic_mask = {
1236                 .tci = RTE_BE16(UINT16_MAX),
1237                 .inner_type = RTE_BE16(UINT16_MAX),
1238         };
1239         uint16_t vlan_tag = 0;
1240         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1241         int ret;
1242         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1243                                         MLX5_FLOW_LAYER_INNER_L4) :
1244                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1245                                         MLX5_FLOW_LAYER_OUTER_L4);
1246         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1247                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1248
1249         if (item_flags & vlanm)
1250                 return rte_flow_error_set(error, EINVAL,
1251                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1252                                           "multiple VLAN layers not supported");
1253         else if ((item_flags & l34m) != 0)
1254                 return rte_flow_error_set(error, EINVAL,
1255                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1256                                           "L2 layer cannot follow L3/L4 layer");
1257         if (!mask)
1258                 mask = &rte_flow_item_vlan_mask;
1259         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1260                                         (const uint8_t *)&nic_mask,
1261                                         sizeof(struct rte_flow_item_vlan),
1262                                         error);
1263         if (ret)
1264                 return ret;
1265         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1266                 struct mlx5_priv *priv = dev->data->dev_private;
1267
1268                 if (priv->vmwa_context) {
1269                         /*
1270                          * Non-NULL context means we have a virtual machine
1271                          * and SR-IOV enabled, we have to create VLAN interface
1272                          * to make hypervisor to setup E-Switch vport
1273                          * context correctly. We avoid creating the multiple
1274                          * VLAN interfaces, so we cannot support VLAN tag mask.
1275                          */
1276                         return rte_flow_error_set(error, EINVAL,
1277                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1278                                                   item,
1279                                                   "VLAN tag mask is not"
1280                                                   " supported in virtual"
1281                                                   " environment");
1282                 }
1283         }
1284         if (spec) {
1285                 vlan_tag = spec->tci;
1286                 vlan_tag &= mask->tci;
1287         }
1288         /*
1289          * From verbs perspective an empty VLAN is equivalent
1290          * to a packet without VLAN layer.
1291          */
1292         if (!vlan_tag)
1293                 return rte_flow_error_set(error, EINVAL,
1294                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1295                                           item->spec,
1296                                           "VLAN cannot be empty");
1297         return 0;
1298 }
1299
1300 /**
1301  * Validate IPV4 item.
1302  *
1303  * @param[in] item
1304  *   Item specification.
1305  * @param[in] item_flags
1306  *   Bit-fields that holds the items detected until now.
1307  * @param[in] acc_mask
1308  *   Acceptable mask, if NULL default internal default mask
1309  *   will be used to check whether item fields are supported.
1310  * @param[out] error
1311  *   Pointer to error structure.
1312  *
1313  * @return
1314  *   0 on success, a negative errno value otherwise and rte_errno is set.
1315  */
1316 int
1317 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1318                              uint64_t item_flags,
1319                              const struct rte_flow_item_ipv4 *acc_mask,
1320                              struct rte_flow_error *error)
1321 {
1322         const struct rte_flow_item_ipv4 *mask = item->mask;
1323         const struct rte_flow_item_ipv4 *spec = item->spec;
1324         const struct rte_flow_item_ipv4 nic_mask = {
1325                 .hdr = {
1326                         .src_addr = RTE_BE32(0xffffffff),
1327                         .dst_addr = RTE_BE32(0xffffffff),
1328                         .type_of_service = 0xff,
1329                         .next_proto_id = 0xff,
1330                 },
1331         };
1332         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1333         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1334                                       MLX5_FLOW_LAYER_OUTER_L3;
1335         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1336                                       MLX5_FLOW_LAYER_OUTER_L4;
1337         int ret;
1338         uint8_t next_proto = 0xFF;
1339
1340         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1341                 if (mask && spec)
1342                         next_proto = mask->hdr.next_proto_id &
1343                                      spec->hdr.next_proto_id;
1344                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1345                         return rte_flow_error_set(error, EINVAL,
1346                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1347                                                   item,
1348                                                   "multiple tunnel "
1349                                                   "not supported");
1350         }
1351         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1352                 return rte_flow_error_set(error, EINVAL,
1353                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1354                                           "wrong tunnel type - IPv6 specified "
1355                                           "but IPv4 item provided");
1356         if (item_flags & l3m)
1357                 return rte_flow_error_set(error, ENOTSUP,
1358                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1359                                           "multiple L3 layers not supported");
1360         else if (item_flags & l4m)
1361                 return rte_flow_error_set(error, EINVAL,
1362                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1363                                           "L3 cannot follow an L4 layer.");
1364         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1365                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1366                 return rte_flow_error_set(error, EINVAL,
1367                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1368                                           "L3 cannot follow an NVGRE layer.");
1369         if (!mask)
1370                 mask = &rte_flow_item_ipv4_mask;
1371         else if (mask->hdr.next_proto_id != 0 &&
1372                  mask->hdr.next_proto_id != 0xff)
1373                 return rte_flow_error_set(error, EINVAL,
1374                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1375                                           "partial mask is not supported"
1376                                           " for protocol");
1377         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1378                                         acc_mask ? (const uint8_t *)acc_mask
1379                                                  : (const uint8_t *)&nic_mask,
1380                                         sizeof(struct rte_flow_item_ipv4),
1381                                         error);
1382         if (ret < 0)
1383                 return ret;
1384         return 0;
1385 }
1386
1387 /**
1388  * Validate IPV6 item.
1389  *
1390  * @param[in] item
1391  *   Item specification.
1392  * @param[in] item_flags
1393  *   Bit-fields that holds the items detected until now.
1394  * @param[in] acc_mask
1395  *   Acceptable mask, if NULL default internal default mask
1396  *   will be used to check whether item fields are supported.
1397  * @param[out] error
1398  *   Pointer to error structure.
1399  *
1400  * @return
1401  *   0 on success, a negative errno value otherwise and rte_errno is set.
1402  */
1403 int
1404 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1405                              uint64_t item_flags,
1406                              const struct rte_flow_item_ipv6 *acc_mask,
1407                              struct rte_flow_error *error)
1408 {
1409         const struct rte_flow_item_ipv6 *mask = item->mask;
1410         const struct rte_flow_item_ipv6 *spec = item->spec;
1411         const struct rte_flow_item_ipv6 nic_mask = {
1412                 .hdr = {
1413                         .src_addr =
1414                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1415                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1416                         .dst_addr =
1417                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1418                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1419                         .vtc_flow = RTE_BE32(0xffffffff),
1420                         .proto = 0xff,
1421                         .hop_limits = 0xff,
1422                 },
1423         };
1424         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1425         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1426                                       MLX5_FLOW_LAYER_OUTER_L3;
1427         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1428                                       MLX5_FLOW_LAYER_OUTER_L4;
1429         int ret;
1430         uint8_t next_proto = 0xFF;
1431
1432         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1433                 if (mask && spec)
1434                         next_proto = mask->hdr.proto & spec->hdr.proto;
1435                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1436                         return rte_flow_error_set(error, EINVAL,
1437                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1438                                                   item,
1439                                                   "multiple tunnel "
1440                                                   "not supported");
1441         }
1442         if (item_flags & MLX5_FLOW_LAYER_IPIP)
1443                 return rte_flow_error_set(error, EINVAL,
1444                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1445                                           "wrong tunnel type - IPv4 specified "
1446                                           "but IPv6 item provided");
1447         if (item_flags & l3m)
1448                 return rte_flow_error_set(error, ENOTSUP,
1449                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1450                                           "multiple L3 layers not supported");
1451         else if (item_flags & l4m)
1452                 return rte_flow_error_set(error, EINVAL,
1453                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1454                                           "L3 cannot follow an L4 layer.");
1455         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1456                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1457                 return rte_flow_error_set(error, EINVAL,
1458                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1459                                           "L3 cannot follow an NVGRE layer.");
1460         if (!mask)
1461                 mask = &rte_flow_item_ipv6_mask;
1462         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1463                                         acc_mask ? (const uint8_t *)acc_mask
1464                                                  : (const uint8_t *)&nic_mask,
1465                                         sizeof(struct rte_flow_item_ipv6),
1466                                         error);
1467         if (ret < 0)
1468                 return ret;
1469         return 0;
1470 }
1471
1472 /**
1473  * Validate UDP item.
1474  *
1475  * @param[in] item
1476  *   Item specification.
1477  * @param[in] item_flags
1478  *   Bit-fields that holds the items detected until now.
1479  * @param[in] target_protocol
1480  *   The next protocol in the previous item.
1481  * @param[in] flow_mask
1482  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1483  * @param[out] error
1484  *   Pointer to error structure.
1485  *
1486  * @return
1487  *   0 on success, a negative errno value otherwise and rte_errno is set.
1488  */
1489 int
1490 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1491                             uint64_t item_flags,
1492                             uint8_t target_protocol,
1493                             struct rte_flow_error *error)
1494 {
1495         const struct rte_flow_item_udp *mask = item->mask;
1496         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1497         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1498                                       MLX5_FLOW_LAYER_OUTER_L3;
1499         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1500                                       MLX5_FLOW_LAYER_OUTER_L4;
1501         int ret;
1502
1503         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1504                 return rte_flow_error_set(error, EINVAL,
1505                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1506                                           "protocol filtering not compatible"
1507                                           " with UDP layer");
1508         if (!(item_flags & l3m))
1509                 return rte_flow_error_set(error, EINVAL,
1510                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1511                                           "L3 is mandatory to filter on L4");
1512         if (item_flags & l4m)
1513                 return rte_flow_error_set(error, EINVAL,
1514                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1515                                           "multiple L4 layers not supported");
1516         if (!mask)
1517                 mask = &rte_flow_item_udp_mask;
1518         ret = mlx5_flow_item_acceptable
1519                 (item, (const uint8_t *)mask,
1520                  (const uint8_t *)&rte_flow_item_udp_mask,
1521                  sizeof(struct rte_flow_item_udp), error);
1522         if (ret < 0)
1523                 return ret;
1524         return 0;
1525 }
1526
1527 /**
1528  * Validate TCP item.
1529  *
1530  * @param[in] item
1531  *   Item specification.
1532  * @param[in] item_flags
1533  *   Bit-fields that holds the items detected until now.
1534  * @param[in] target_protocol
1535  *   The next protocol in the previous item.
1536  * @param[out] error
1537  *   Pointer to error structure.
1538  *
1539  * @return
1540  *   0 on success, a negative errno value otherwise and rte_errno is set.
1541  */
1542 int
1543 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1544                             uint64_t item_flags,
1545                             uint8_t target_protocol,
1546                             const struct rte_flow_item_tcp *flow_mask,
1547                             struct rte_flow_error *error)
1548 {
1549         const struct rte_flow_item_tcp *mask = item->mask;
1550         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1551         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1552                                       MLX5_FLOW_LAYER_OUTER_L3;
1553         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1554                                       MLX5_FLOW_LAYER_OUTER_L4;
1555         int ret;
1556
1557         assert(flow_mask);
1558         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1559                 return rte_flow_error_set(error, EINVAL,
1560                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1561                                           "protocol filtering not compatible"
1562                                           " with TCP layer");
1563         if (!(item_flags & l3m))
1564                 return rte_flow_error_set(error, EINVAL,
1565                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1566                                           "L3 is mandatory to filter on L4");
1567         if (item_flags & l4m)
1568                 return rte_flow_error_set(error, EINVAL,
1569                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1570                                           "multiple L4 layers not supported");
1571         if (!mask)
1572                 mask = &rte_flow_item_tcp_mask;
1573         ret = mlx5_flow_item_acceptable
1574                 (item, (const uint8_t *)mask,
1575                  (const uint8_t *)flow_mask,
1576                  sizeof(struct rte_flow_item_tcp), error);
1577         if (ret < 0)
1578                 return ret;
1579         return 0;
1580 }
1581
1582 /**
1583  * Validate VXLAN item.
1584  *
1585  * @param[in] item
1586  *   Item specification.
1587  * @param[in] item_flags
1588  *   Bit-fields that holds the items detected until now.
1589  * @param[in] target_protocol
1590  *   The next protocol in the previous item.
1591  * @param[out] error
1592  *   Pointer to error structure.
1593  *
1594  * @return
1595  *   0 on success, a negative errno value otherwise and rte_errno is set.
1596  */
1597 int
1598 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1599                               uint64_t item_flags,
1600                               struct rte_flow_error *error)
1601 {
1602         const struct rte_flow_item_vxlan *spec = item->spec;
1603         const struct rte_flow_item_vxlan *mask = item->mask;
1604         int ret;
1605         union vni {
1606                 uint32_t vlan_id;
1607                 uint8_t vni[4];
1608         } id = { .vlan_id = 0, };
1609         uint32_t vlan_id = 0;
1610
1611
1612         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1613                 return rte_flow_error_set(error, ENOTSUP,
1614                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1615                                           "multiple tunnel layers not"
1616                                           " supported");
1617         /*
1618          * Verify only UDPv4 is present as defined in
1619          * https://tools.ietf.org/html/rfc7348
1620          */
1621         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1622                 return rte_flow_error_set(error, EINVAL,
1623                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1624                                           "no outer UDP layer found");
1625         if (!mask)
1626                 mask = &rte_flow_item_vxlan_mask;
1627         ret = mlx5_flow_item_acceptable
1628                 (item, (const uint8_t *)mask,
1629                  (const uint8_t *)&rte_flow_item_vxlan_mask,
1630                  sizeof(struct rte_flow_item_vxlan),
1631                  error);
1632         if (ret < 0)
1633                 return ret;
1634         if (spec) {
1635                 memcpy(&id.vni[1], spec->vni, 3);
1636                 vlan_id = id.vlan_id;
1637                 memcpy(&id.vni[1], mask->vni, 3);
1638                 vlan_id &= id.vlan_id;
1639         }
1640         /*
1641          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if
1642          * only this layer is defined in the Verbs specification it is
1643          * interpreted as wildcard and all packets will match this
1644          * rule, if it follows a full stack layer (ex: eth / ipv4 /
1645          * udp), all packets matching the layers before will also
1646          * match this rule.  To avoid such situation, VNI 0 is
1647          * currently refused.
1648          */
1649         if (!vlan_id)
1650                 return rte_flow_error_set(error, ENOTSUP,
1651                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1652                                           "VXLAN vni cannot be 0");
1653         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1654                 return rte_flow_error_set(error, ENOTSUP,
1655                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1656                                           "VXLAN tunnel must be fully defined");
1657         return 0;
1658 }
1659
1660 /**
1661  * Validate VXLAN_GPE item.
1662  *
1663  * @param[in] item
1664  *   Item specification.
1665  * @param[in] item_flags
1666  *   Bit-fields that holds the items detected until now.
1667  * @param[in] priv
1668  *   Pointer to the private data structure.
1669  * @param[in] target_protocol
1670  *   The next protocol in the previous item.
1671  * @param[out] error
1672  *   Pointer to error structure.
1673  *
1674  * @return
1675  *   0 on success, a negative errno value otherwise and rte_errno is set.
1676  */
1677 int
1678 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1679                                   uint64_t item_flags,
1680                                   struct rte_eth_dev *dev,
1681                                   struct rte_flow_error *error)
1682 {
1683         struct mlx5_priv *priv = dev->data->dev_private;
1684         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1685         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1686         int ret;
1687         union vni {
1688                 uint32_t vlan_id;
1689                 uint8_t vni[4];
1690         } id = { .vlan_id = 0, };
1691         uint32_t vlan_id = 0;
1692
1693         if (!priv->config.l3_vxlan_en)
1694                 return rte_flow_error_set(error, ENOTSUP,
1695                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1696                                           "L3 VXLAN is not enabled by device"
1697                                           " parameter and/or not configured in"
1698                                           " firmware");
1699         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1700                 return rte_flow_error_set(error, ENOTSUP,
1701                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1702                                           "multiple tunnel layers not"
1703                                           " supported");
1704         /*
1705          * Verify only UDPv4 is present as defined in
1706          * https://tools.ietf.org/html/rfc7348
1707          */
1708         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1709                 return rte_flow_error_set(error, EINVAL,
1710                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1711                                           "no outer UDP layer found");
1712         if (!mask)
1713                 mask = &rte_flow_item_vxlan_gpe_mask;
1714         ret = mlx5_flow_item_acceptable
1715                 (item, (const uint8_t *)mask,
1716                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1717                  sizeof(struct rte_flow_item_vxlan_gpe),
1718                  error);
1719         if (ret < 0)
1720                 return ret;
1721         if (spec) {
1722                 if (spec->protocol)
1723                         return rte_flow_error_set(error, ENOTSUP,
1724                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1725                                                   item,
1726                                                   "VxLAN-GPE protocol"
1727                                                   " not supported");
1728                 memcpy(&id.vni[1], spec->vni, 3);
1729                 vlan_id = id.vlan_id;
1730                 memcpy(&id.vni[1], mask->vni, 3);
1731                 vlan_id &= id.vlan_id;
1732         }
1733         /*
1734          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this
1735          * layer is defined in the Verbs specification it is interpreted as
1736          * wildcard and all packets will match this rule, if it follows a full
1737          * stack layer (ex: eth / ipv4 / udp), all packets matching the layers
1738          * before will also match this rule.  To avoid such situation, VNI 0
1739          * is currently refused.
1740          */
1741         if (!vlan_id)
1742                 return rte_flow_error_set(error, ENOTSUP,
1743                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1744                                           "VXLAN-GPE vni cannot be 0");
1745         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1746                 return rte_flow_error_set(error, ENOTSUP,
1747                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1748                                           "VXLAN-GPE tunnel must be fully"
1749                                           " defined");
1750         return 0;
1751 }
1752 /**
1753  * Validate GRE Key item.
1754  *
1755  * @param[in] item
1756  *   Item specification.
1757  * @param[in] item_flags
1758  *   Bit flags to mark detected items.
1759  * @param[in] gre_item
1760  *   Pointer to gre_item
1761  * @param[out] error
1762  *   Pointer to error structure.
1763  *
1764  * @return
1765  *   0 on success, a negative errno value otherwise and rte_errno is set.
1766  */
1767 int
1768 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1769                                 uint64_t item_flags,
1770                                 const struct rte_flow_item *gre_item,
1771                                 struct rte_flow_error *error)
1772 {
1773         const rte_be32_t *mask = item->mask;
1774         int ret = 0;
1775         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1776         const struct rte_flow_item_gre *gre_spec = gre_item->spec;
1777         const struct rte_flow_item_gre *gre_mask = gre_item->mask;
1778
1779         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1780                 return rte_flow_error_set(error, ENOTSUP,
1781                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1782                                           "Multiple GRE key not support");
1783         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1784                 return rte_flow_error_set(error, ENOTSUP,
1785                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1786                                           "No preceding GRE header");
1787         if (item_flags & MLX5_FLOW_LAYER_INNER)
1788                 return rte_flow_error_set(error, ENOTSUP,
1789                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1790                                           "GRE key following a wrong item");
1791         if (!gre_mask)
1792                 gre_mask = &rte_flow_item_gre_mask;
1793         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
1794                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
1795                 return rte_flow_error_set(error, EINVAL,
1796                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1797                                           "Key bit must be on");
1798
1799         if (!mask)
1800                 mask = &gre_key_default_mask;
1801         ret = mlx5_flow_item_acceptable
1802                 (item, (const uint8_t *)mask,
1803                  (const uint8_t *)&gre_key_default_mask,
1804                  sizeof(rte_be32_t), error);
1805         return ret;
1806 }
1807
1808 /**
1809  * Validate GRE item.
1810  *
1811  * @param[in] item
1812  *   Item specification.
1813  * @param[in] item_flags
1814  *   Bit flags to mark detected items.
1815  * @param[in] target_protocol
1816  *   The next protocol in the previous item.
1817  * @param[out] error
1818  *   Pointer to error structure.
1819  *
1820  * @return
1821  *   0 on success, a negative errno value otherwise and rte_errno is set.
1822  */
1823 int
1824 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
1825                             uint64_t item_flags,
1826                             uint8_t target_protocol,
1827                             struct rte_flow_error *error)
1828 {
1829         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
1830         const struct rte_flow_item_gre *mask = item->mask;
1831         int ret;
1832         const struct rte_flow_item_gre nic_mask = {
1833                 .c_rsvd0_ver = RTE_BE16(0xB000),
1834                 .protocol = RTE_BE16(UINT16_MAX),
1835         };
1836
1837         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
1838                 return rte_flow_error_set(error, EINVAL,
1839                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1840                                           "protocol filtering not compatible"
1841                                           " with this GRE layer");
1842         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1843                 return rte_flow_error_set(error, ENOTSUP,
1844                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1845                                           "multiple tunnel layers not"
1846                                           " supported");
1847         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
1848                 return rte_flow_error_set(error, ENOTSUP,
1849                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1850                                           "L3 Layer is missing");
1851         if (!mask)
1852                 mask = &rte_flow_item_gre_mask;
1853         ret = mlx5_flow_item_acceptable
1854                 (item, (const uint8_t *)mask,
1855                  (const uint8_t *)&nic_mask,
1856                  sizeof(struct rte_flow_item_gre), error);
1857         if (ret < 0)
1858                 return ret;
1859 #ifndef HAVE_MLX5DV_DR
1860 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
1861         if (spec && (spec->protocol & mask->protocol))
1862                 return rte_flow_error_set(error, ENOTSUP,
1863                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1864                                           "without MPLS support the"
1865                                           " specification cannot be used for"
1866                                           " filtering");
1867 #endif
1868 #endif
1869         return 0;
1870 }
1871
1872 /**
1873  * Validate MPLS item.
1874  *
1875  * @param[in] dev
1876  *   Pointer to the rte_eth_dev structure.
1877  * @param[in] item
1878  *   Item specification.
1879  * @param[in] item_flags
1880  *   Bit-fields that holds the items detected until now.
1881  * @param[in] prev_layer
1882  *   The protocol layer indicated in previous item.
1883  * @param[out] error
1884  *   Pointer to error structure.
1885  *
1886  * @return
1887  *   0 on success, a negative errno value otherwise and rte_errno is set.
1888  */
1889 int
1890 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
1891                              const struct rte_flow_item *item __rte_unused,
1892                              uint64_t item_flags __rte_unused,
1893                              uint64_t prev_layer __rte_unused,
1894                              struct rte_flow_error *error)
1895 {
1896 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1897         const struct rte_flow_item_mpls *mask = item->mask;
1898         struct mlx5_priv *priv = dev->data->dev_private;
1899         int ret;
1900
1901         if (!priv->config.mpls_en)
1902                 return rte_flow_error_set(error, ENOTSUP,
1903                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1904                                           "MPLS not supported or"
1905                                           " disabled in firmware"
1906                                           " configuration.");
1907         /* MPLS over IP, UDP, GRE is allowed */
1908         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
1909                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
1910                             MLX5_FLOW_LAYER_GRE)))
1911                 return rte_flow_error_set(error, EINVAL,
1912                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1913                                           "protocol filtering not compatible"
1914                                           " with MPLS layer");
1915         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
1916         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
1917             !(item_flags & MLX5_FLOW_LAYER_GRE))
1918                 return rte_flow_error_set(error, ENOTSUP,
1919                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1920                                           "multiple tunnel layers not"
1921                                           " supported");
1922         if (!mask)
1923                 mask = &rte_flow_item_mpls_mask;
1924         ret = mlx5_flow_item_acceptable
1925                 (item, (const uint8_t *)mask,
1926                  (const uint8_t *)&rte_flow_item_mpls_mask,
1927                  sizeof(struct rte_flow_item_mpls), error);
1928         if (ret < 0)
1929                 return ret;
1930         return 0;
1931 #endif
1932         return rte_flow_error_set(error, ENOTSUP,
1933                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
1934                                   "MPLS is not supported by Verbs, please"
1935                                   " update.");
1936 }
1937
1938 /**
1939  * Validate NVGRE item.
1940  *
1941  * @param[in] item
1942  *   Item specification.
1943  * @param[in] item_flags
1944  *   Bit flags to mark detected items.
1945  * @param[in] target_protocol
1946  *   The next protocol in the previous item.
1947  * @param[out] error
1948  *   Pointer to error structure.
1949  *
1950  * @return
1951  *   0 on success, a negative errno value otherwise and rte_errno is set.
1952  */
1953 int
1954 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
1955                               uint64_t item_flags,
1956                               uint8_t target_protocol,
1957                               struct rte_flow_error *error)
1958 {
1959         const struct rte_flow_item_nvgre *mask = item->mask;
1960         int ret;
1961
1962         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
1963                 return rte_flow_error_set(error, EINVAL,
1964                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1965                                           "protocol filtering not compatible"
1966                                           " with this GRE layer");
1967         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1968                 return rte_flow_error_set(error, ENOTSUP,
1969                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1970                                           "multiple tunnel layers not"
1971                                           " supported");
1972         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
1973                 return rte_flow_error_set(error, ENOTSUP,
1974                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1975                                           "L3 Layer is missing");
1976         if (!mask)
1977                 mask = &rte_flow_item_nvgre_mask;
1978         ret = mlx5_flow_item_acceptable
1979                 (item, (const uint8_t *)mask,
1980                  (const uint8_t *)&rte_flow_item_nvgre_mask,
1981                  sizeof(struct rte_flow_item_nvgre), error);
1982         if (ret < 0)
1983                 return ret;
1984         return 0;
1985 }
1986
1987 static int
1988 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
1989                    const struct rte_flow_attr *attr __rte_unused,
1990                    const struct rte_flow_item items[] __rte_unused,
1991                    const struct rte_flow_action actions[] __rte_unused,
1992                    struct rte_flow_error *error)
1993 {
1994         return rte_flow_error_set(error, ENOTSUP,
1995                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
1996 }
1997
1998 static struct mlx5_flow *
1999 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
2000                   const struct rte_flow_item items[] __rte_unused,
2001                   const struct rte_flow_action actions[] __rte_unused,
2002                   struct rte_flow_error *error)
2003 {
2004         rte_flow_error_set(error, ENOTSUP,
2005                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2006         return NULL;
2007 }
2008
2009 static int
2010 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2011                     struct mlx5_flow *dev_flow __rte_unused,
2012                     const struct rte_flow_attr *attr __rte_unused,
2013                     const struct rte_flow_item items[] __rte_unused,
2014                     const struct rte_flow_action actions[] __rte_unused,
2015                     struct rte_flow_error *error)
2016 {
2017         return rte_flow_error_set(error, ENOTSUP,
2018                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2019 }
2020
2021 static int
2022 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2023                 struct rte_flow *flow __rte_unused,
2024                 struct rte_flow_error *error)
2025 {
2026         return rte_flow_error_set(error, ENOTSUP,
2027                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2028 }
2029
2030 static void
2031 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2032                  struct rte_flow *flow __rte_unused)
2033 {
2034 }
2035
2036 static void
2037 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2038                   struct rte_flow *flow __rte_unused)
2039 {
2040 }
2041
2042 static int
2043 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2044                 struct rte_flow *flow __rte_unused,
2045                 const struct rte_flow_action *actions __rte_unused,
2046                 void *data __rte_unused,
2047                 struct rte_flow_error *error)
2048 {
2049         return rte_flow_error_set(error, ENOTSUP,
2050                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2051 }
2052
2053 /* Void driver to protect from null pointer reference. */
2054 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2055         .validate = flow_null_validate,
2056         .prepare = flow_null_prepare,
2057         .translate = flow_null_translate,
2058         .apply = flow_null_apply,
2059         .remove = flow_null_remove,
2060         .destroy = flow_null_destroy,
2061         .query = flow_null_query,
2062 };
2063
2064 /**
2065  * Select flow driver type according to flow attributes and device
2066  * configuration.
2067  *
2068  * @param[in] dev
2069  *   Pointer to the dev structure.
2070  * @param[in] attr
2071  *   Pointer to the flow attributes.
2072  *
2073  * @return
2074  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2075  */
2076 static enum mlx5_flow_drv_type
2077 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2078 {
2079         struct mlx5_priv *priv = dev->data->dev_private;
2080         enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2081
2082         if (attr->transfer && priv->config.dv_esw_en)
2083                 type = MLX5_FLOW_TYPE_DV;
2084         if (!attr->transfer)
2085                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2086                                                  MLX5_FLOW_TYPE_VERBS;
2087         return type;
2088 }
2089
2090 #define flow_get_drv_ops(type) flow_drv_ops[type]
2091
2092 /**
2093  * Flow driver validation API. This abstracts calling driver specific functions.
2094  * The type of flow driver is determined according to flow attributes.
2095  *
2096  * @param[in] dev
2097  *   Pointer to the dev structure.
2098  * @param[in] attr
2099  *   Pointer to the flow attributes.
2100  * @param[in] items
2101  *   Pointer to the list of items.
2102  * @param[in] actions
2103  *   Pointer to the list of actions.
2104  * @param[out] error
2105  *   Pointer to the error structure.
2106  *
2107  * @return
2108  *   0 on success, a negative errno value otherwise and rte_errno is set.
2109  */
2110 static inline int
2111 flow_drv_validate(struct rte_eth_dev *dev,
2112                   const struct rte_flow_attr *attr,
2113                   const struct rte_flow_item items[],
2114                   const struct rte_flow_action actions[],
2115                   struct rte_flow_error *error)
2116 {
2117         const struct mlx5_flow_driver_ops *fops;
2118         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2119
2120         fops = flow_get_drv_ops(type);
2121         return fops->validate(dev, attr, items, actions, error);
2122 }
2123
2124 /**
2125  * Flow driver preparation API. This abstracts calling driver specific
2126  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2127  * calculates the size of memory required for device flow, allocates the memory,
2128  * initializes the device flow and returns the pointer.
2129  *
2130  * @note
2131  *   This function initializes device flow structure such as dv or verbs in
2132  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
2133  *   rest. For example, adding returning device flow to flow->dev_flow list and
2134  *   setting backward reference to the flow should be done out of this function.
2135  *   layers field is not filled either.
2136  *
2137  * @param[in] attr
2138  *   Pointer to the flow attributes.
2139  * @param[in] items
2140  *   Pointer to the list of items.
2141  * @param[in] actions
2142  *   Pointer to the list of actions.
2143  * @param[out] error
2144  *   Pointer to the error structure.
2145  *
2146  * @return
2147  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
2148  */
2149 static inline struct mlx5_flow *
2150 flow_drv_prepare(const struct rte_flow *flow,
2151                  const struct rte_flow_attr *attr,
2152                  const struct rte_flow_item items[],
2153                  const struct rte_flow_action actions[],
2154                  struct rte_flow_error *error)
2155 {
2156         const struct mlx5_flow_driver_ops *fops;
2157         enum mlx5_flow_drv_type type = flow->drv_type;
2158
2159         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2160         fops = flow_get_drv_ops(type);
2161         return fops->prepare(attr, items, actions, error);
2162 }
2163
2164 /**
2165  * Flow driver translation API. This abstracts calling driver specific
2166  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2167  * translates a generic flow into a driver flow. flow_drv_prepare() must
2168  * precede.
2169  *
2170  * @note
2171  *   dev_flow->layers could be filled as a result of parsing during translation
2172  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2173  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2174  *   flow->actions could be overwritten even though all the expanded dev_flows
2175  *   have the same actions.
2176  *
2177  * @param[in] dev
2178  *   Pointer to the rte dev structure.
2179  * @param[in, out] dev_flow
2180  *   Pointer to the mlx5 flow.
2181  * @param[in] attr
2182  *   Pointer to the flow attributes.
2183  * @param[in] items
2184  *   Pointer to the list of items.
2185  * @param[in] actions
2186  *   Pointer to the list of actions.
2187  * @param[out] error
2188  *   Pointer to the error structure.
2189  *
2190  * @return
2191  *   0 on success, a negative errno value otherwise and rte_errno is set.
2192  */
2193 static inline int
2194 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2195                    const struct rte_flow_attr *attr,
2196                    const struct rte_flow_item items[],
2197                    const struct rte_flow_action actions[],
2198                    struct rte_flow_error *error)
2199 {
2200         const struct mlx5_flow_driver_ops *fops;
2201         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2202
2203         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2204         fops = flow_get_drv_ops(type);
2205         return fops->translate(dev, dev_flow, attr, items, actions, error);
2206 }
2207
2208 /**
2209  * Flow driver apply API. This abstracts calling driver specific functions.
2210  * Parent flow (rte_flow) should have driver type (drv_type). It applies
2211  * translated driver flows on to device. flow_drv_translate() must precede.
2212  *
2213  * @param[in] dev
2214  *   Pointer to Ethernet device structure.
2215  * @param[in, out] flow
2216  *   Pointer to flow structure.
2217  * @param[out] error
2218  *   Pointer to error structure.
2219  *
2220  * @return
2221  *   0 on success, a negative errno value otherwise and rte_errno is set.
2222  */
2223 static inline int
2224 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2225                struct rte_flow_error *error)
2226 {
2227         const struct mlx5_flow_driver_ops *fops;
2228         enum mlx5_flow_drv_type type = flow->drv_type;
2229
2230         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2231         fops = flow_get_drv_ops(type);
2232         return fops->apply(dev, flow, error);
2233 }
2234
2235 /**
2236  * Flow driver remove API. This abstracts calling driver specific functions.
2237  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2238  * on device. All the resources of the flow should be freed by calling
2239  * flow_drv_destroy().
2240  *
2241  * @param[in] dev
2242  *   Pointer to Ethernet device.
2243  * @param[in, out] flow
2244  *   Pointer to flow structure.
2245  */
2246 static inline void
2247 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2248 {
2249         const struct mlx5_flow_driver_ops *fops;
2250         enum mlx5_flow_drv_type type = flow->drv_type;
2251
2252         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2253         fops = flow_get_drv_ops(type);
2254         fops->remove(dev, flow);
2255 }
2256
2257 /**
2258  * Flow driver destroy API. This abstracts calling driver specific functions.
2259  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2260  * on device and releases resources of the flow.
2261  *
2262  * @param[in] dev
2263  *   Pointer to Ethernet device.
2264  * @param[in, out] flow
2265  *   Pointer to flow structure.
2266  */
2267 static inline void
2268 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2269 {
2270         const struct mlx5_flow_driver_ops *fops;
2271         enum mlx5_flow_drv_type type = flow->drv_type;
2272
2273         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2274         fops = flow_get_drv_ops(type);
2275         fops->destroy(dev, flow);
2276 }
2277
2278 /**
2279  * Validate a flow supported by the NIC.
2280  *
2281  * @see rte_flow_validate()
2282  * @see rte_flow_ops
2283  */
2284 int
2285 mlx5_flow_validate(struct rte_eth_dev *dev,
2286                    const struct rte_flow_attr *attr,
2287                    const struct rte_flow_item items[],
2288                    const struct rte_flow_action actions[],
2289                    struct rte_flow_error *error)
2290 {
2291         int ret;
2292
2293         ret = flow_drv_validate(dev, attr, items, actions, error);
2294         if (ret < 0)
2295                 return ret;
2296         return 0;
2297 }
2298
2299 /**
2300  * Get RSS action from the action list.
2301  *
2302  * @param[in] actions
2303  *   Pointer to the list of actions.
2304  *
2305  * @return
2306  *   Pointer to the RSS action if exist, else return NULL.
2307  */
2308 static const struct rte_flow_action_rss*
2309 flow_get_rss_action(const struct rte_flow_action actions[])
2310 {
2311         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2312                 switch (actions->type) {
2313                 case RTE_FLOW_ACTION_TYPE_RSS:
2314                         return (const struct rte_flow_action_rss *)
2315                                actions->conf;
2316                 default:
2317                         break;
2318                 }
2319         }
2320         return NULL;
2321 }
2322
2323 static unsigned int
2324 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2325 {
2326         const struct rte_flow_item *item;
2327         unsigned int has_vlan = 0;
2328
2329         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2330                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2331                         has_vlan = 1;
2332                         break;
2333                 }
2334         }
2335         if (has_vlan)
2336                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2337                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2338         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2339                                MLX5_EXPANSION_ROOT_OUTER;
2340 }
2341
2342 /**
2343  * Create a flow and add it to @p list.
2344  *
2345  * @param dev
2346  *   Pointer to Ethernet device.
2347  * @param list
2348  *   Pointer to a TAILQ flow list.
2349  * @param[in] attr
2350  *   Flow rule attributes.
2351  * @param[in] items
2352  *   Pattern specification (list terminated by the END pattern item).
2353  * @param[in] actions
2354  *   Associated actions (list terminated by the END action).
2355  * @param[out] error
2356  *   Perform verbose error reporting if not NULL.
2357  *
2358  * @return
2359  *   A flow on success, NULL otherwise and rte_errno is set.
2360  */
2361 static struct rte_flow *
2362 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2363                  const struct rte_flow_attr *attr,
2364                  const struct rte_flow_item items[],
2365                  const struct rte_flow_action actions[],
2366                  struct rte_flow_error *error)
2367 {
2368         struct rte_flow *flow = NULL;
2369         struct mlx5_flow *dev_flow;
2370         const struct rte_flow_action_rss *rss;
2371         union {
2372                 struct rte_flow_expand_rss buf;
2373                 uint8_t buffer[2048];
2374         } expand_buffer;
2375         struct rte_flow_expand_rss *buf = &expand_buffer.buf;
2376         int ret;
2377         uint32_t i;
2378         uint32_t flow_size;
2379
2380         ret = flow_drv_validate(dev, attr, items, actions, error);
2381         if (ret < 0)
2382                 return NULL;
2383         flow_size = sizeof(struct rte_flow);
2384         rss = flow_get_rss_action(actions);
2385         if (rss)
2386                 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
2387                                             sizeof(void *));
2388         else
2389                 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
2390         flow = rte_calloc(__func__, 1, flow_size, 0);
2391         if (!flow) {
2392                 rte_errno = ENOMEM;
2393                 return NULL;
2394         }
2395         flow->drv_type = flow_get_drv_type(dev, attr);
2396         flow->ingress = attr->ingress;
2397         flow->transfer = attr->transfer;
2398         assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
2399                flow->drv_type < MLX5_FLOW_TYPE_MAX);
2400         flow->queue = (void *)(flow + 1);
2401         LIST_INIT(&flow->dev_flows);
2402         if (rss && rss->types) {
2403                 unsigned int graph_root;
2404
2405                 graph_root = find_graph_root(items, rss->level);
2406                 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
2407                                           items, rss->types,
2408                                           mlx5_support_expansion,
2409                                           graph_root);
2410                 assert(ret > 0 &&
2411                        (unsigned int)ret < sizeof(expand_buffer.buffer));
2412         } else {
2413                 buf->entries = 1;
2414                 buf->entry[0].pattern = (void *)(uintptr_t)items;
2415         }
2416         for (i = 0; i < buf->entries; ++i) {
2417                 dev_flow = flow_drv_prepare(flow, attr, buf->entry[i].pattern,
2418                                             actions, error);
2419                 if (!dev_flow)
2420                         goto error;
2421                 dev_flow->flow = flow;
2422                 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
2423                 ret = flow_drv_translate(dev, dev_flow, attr,
2424                                          buf->entry[i].pattern,
2425                                          actions, error);
2426                 if (ret < 0)
2427                         goto error;
2428         }
2429         if (dev->data->dev_started) {
2430                 ret = flow_drv_apply(dev, flow, error);
2431                 if (ret < 0)
2432                         goto error;
2433         }
2434         TAILQ_INSERT_TAIL(list, flow, next);
2435         flow_rxq_flags_set(dev, flow);
2436         return flow;
2437 error:
2438         ret = rte_errno; /* Save rte_errno before cleanup. */
2439         assert(flow);
2440         flow_drv_destroy(dev, flow);
2441         rte_free(flow);
2442         rte_errno = ret; /* Restore rte_errno. */
2443         return NULL;
2444 }
2445
2446 /**
2447  * Create a flow.
2448  *
2449  * @see rte_flow_create()
2450  * @see rte_flow_ops
2451  */
2452 struct rte_flow *
2453 mlx5_flow_create(struct rte_eth_dev *dev,
2454                  const struct rte_flow_attr *attr,
2455                  const struct rte_flow_item items[],
2456                  const struct rte_flow_action actions[],
2457                  struct rte_flow_error *error)
2458 {
2459         struct mlx5_priv *priv = dev->data->dev_private;
2460
2461         return flow_list_create(dev, &priv->flows,
2462                                 attr, items, actions, error);
2463 }
2464
2465 /**
2466  * Destroy a flow in a list.
2467  *
2468  * @param dev
2469  *   Pointer to Ethernet device.
2470  * @param list
2471  *   Pointer to a TAILQ flow list.
2472  * @param[in] flow
2473  *   Flow to destroy.
2474  */
2475 static void
2476 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2477                   struct rte_flow *flow)
2478 {
2479         /*
2480          * Update RX queue flags only if port is started, otherwise it is
2481          * already clean.
2482          */
2483         if (dev->data->dev_started)
2484                 flow_rxq_flags_trim(dev, flow);
2485         flow_drv_destroy(dev, flow);
2486         TAILQ_REMOVE(list, flow, next);
2487         rte_free(flow->fdir);
2488         rte_free(flow);
2489 }
2490
2491 /**
2492  * Destroy all flows.
2493  *
2494  * @param dev
2495  *   Pointer to Ethernet device.
2496  * @param list
2497  *   Pointer to a TAILQ flow list.
2498  */
2499 void
2500 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
2501 {
2502         while (!TAILQ_EMPTY(list)) {
2503                 struct rte_flow *flow;
2504
2505                 flow = TAILQ_FIRST(list);
2506                 flow_list_destroy(dev, list, flow);
2507         }
2508 }
2509
2510 /**
2511  * Remove all flows.
2512  *
2513  * @param dev
2514  *   Pointer to Ethernet device.
2515  * @param list
2516  *   Pointer to a TAILQ flow list.
2517  */
2518 void
2519 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
2520 {
2521         struct rte_flow *flow;
2522
2523         TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next)
2524                 flow_drv_remove(dev, flow);
2525         flow_rxq_flags_clear(dev);
2526 }
2527
2528 /**
2529  * Add all flows.
2530  *
2531  * @param dev
2532  *   Pointer to Ethernet device.
2533  * @param list
2534  *   Pointer to a TAILQ flow list.
2535  *
2536  * @return
2537  *   0 on success, a negative errno value otherwise and rte_errno is set.
2538  */
2539 int
2540 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
2541 {
2542         struct rte_flow *flow;
2543         struct rte_flow_error error;
2544         int ret = 0;
2545
2546         TAILQ_FOREACH(flow, list, next) {
2547                 ret = flow_drv_apply(dev, flow, &error);
2548                 if (ret < 0)
2549                         goto error;
2550                 flow_rxq_flags_set(dev, flow);
2551         }
2552         return 0;
2553 error:
2554         ret = rte_errno; /* Save rte_errno before cleanup. */
2555         mlx5_flow_stop(dev, list);
2556         rte_errno = ret; /* Restore rte_errno. */
2557         return -rte_errno;
2558 }
2559
2560 /**
2561  * Verify the flow list is empty
2562  *
2563  * @param dev
2564  *  Pointer to Ethernet device.
2565  *
2566  * @return the number of flows not released.
2567  */
2568 int
2569 mlx5_flow_verify(struct rte_eth_dev *dev)
2570 {
2571         struct mlx5_priv *priv = dev->data->dev_private;
2572         struct rte_flow *flow;
2573         int ret = 0;
2574
2575         TAILQ_FOREACH(flow, &priv->flows, next) {
2576                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
2577                         dev->data->port_id, (void *)flow);
2578                 ++ret;
2579         }
2580         return ret;
2581 }
2582
2583 /**
2584  * Enable a control flow configured from the control plane.
2585  *
2586  * @param dev
2587  *   Pointer to Ethernet device.
2588  * @param eth_spec
2589  *   An Ethernet flow spec to apply.
2590  * @param eth_mask
2591  *   An Ethernet flow mask to apply.
2592  * @param vlan_spec
2593  *   A VLAN flow spec to apply.
2594  * @param vlan_mask
2595  *   A VLAN flow mask to apply.
2596  *
2597  * @return
2598  *   0 on success, a negative errno value otherwise and rte_errno is set.
2599  */
2600 int
2601 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
2602                     struct rte_flow_item_eth *eth_spec,
2603                     struct rte_flow_item_eth *eth_mask,
2604                     struct rte_flow_item_vlan *vlan_spec,
2605                     struct rte_flow_item_vlan *vlan_mask)
2606 {
2607         struct mlx5_priv *priv = dev->data->dev_private;
2608         const struct rte_flow_attr attr = {
2609                 .ingress = 1,
2610                 .priority = MLX5_FLOW_PRIO_RSVD,
2611         };
2612         struct rte_flow_item items[] = {
2613                 {
2614                         .type = RTE_FLOW_ITEM_TYPE_ETH,
2615                         .spec = eth_spec,
2616                         .last = NULL,
2617                         .mask = eth_mask,
2618                 },
2619                 {
2620                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
2621                                               RTE_FLOW_ITEM_TYPE_END,
2622                         .spec = vlan_spec,
2623                         .last = NULL,
2624                         .mask = vlan_mask,
2625                 },
2626                 {
2627                         .type = RTE_FLOW_ITEM_TYPE_END,
2628                 },
2629         };
2630         uint16_t queue[priv->reta_idx_n];
2631         struct rte_flow_action_rss action_rss = {
2632                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
2633                 .level = 0,
2634                 .types = priv->rss_conf.rss_hf,
2635                 .key_len = priv->rss_conf.rss_key_len,
2636                 .queue_num = priv->reta_idx_n,
2637                 .key = priv->rss_conf.rss_key,
2638                 .queue = queue,
2639         };
2640         struct rte_flow_action actions[] = {
2641                 {
2642                         .type = RTE_FLOW_ACTION_TYPE_RSS,
2643                         .conf = &action_rss,
2644                 },
2645                 {
2646                         .type = RTE_FLOW_ACTION_TYPE_END,
2647                 },
2648         };
2649         struct rte_flow *flow;
2650         struct rte_flow_error error;
2651         unsigned int i;
2652
2653         if (!priv->reta_idx_n || !priv->rxqs_n) {
2654                 return 0;
2655         }
2656         for (i = 0; i != priv->reta_idx_n; ++i)
2657                 queue[i] = (*priv->reta_idx)[i];
2658         flow = flow_list_create(dev, &priv->ctrl_flows,
2659                                 &attr, items, actions, &error);
2660         if (!flow)
2661                 return -rte_errno;
2662         return 0;
2663 }
2664
2665 /**
2666  * Enable a flow control configured from the control plane.
2667  *
2668  * @param dev
2669  *   Pointer to Ethernet device.
2670  * @param eth_spec
2671  *   An Ethernet flow spec to apply.
2672  * @param eth_mask
2673  *   An Ethernet flow mask to apply.
2674  *
2675  * @return
2676  *   0 on success, a negative errno value otherwise and rte_errno is set.
2677  */
2678 int
2679 mlx5_ctrl_flow(struct rte_eth_dev *dev,
2680                struct rte_flow_item_eth *eth_spec,
2681                struct rte_flow_item_eth *eth_mask)
2682 {
2683         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
2684 }
2685
2686 /**
2687  * Destroy a flow.
2688  *
2689  * @see rte_flow_destroy()
2690  * @see rte_flow_ops
2691  */
2692 int
2693 mlx5_flow_destroy(struct rte_eth_dev *dev,
2694                   struct rte_flow *flow,
2695                   struct rte_flow_error *error __rte_unused)
2696 {
2697         struct mlx5_priv *priv = dev->data->dev_private;
2698
2699         flow_list_destroy(dev, &priv->flows, flow);
2700         return 0;
2701 }
2702
2703 /**
2704  * Destroy all flows.
2705  *
2706  * @see rte_flow_flush()
2707  * @see rte_flow_ops
2708  */
2709 int
2710 mlx5_flow_flush(struct rte_eth_dev *dev,
2711                 struct rte_flow_error *error __rte_unused)
2712 {
2713         struct mlx5_priv *priv = dev->data->dev_private;
2714
2715         mlx5_flow_list_flush(dev, &priv->flows);
2716         return 0;
2717 }
2718
2719 /**
2720  * Isolated mode.
2721  *
2722  * @see rte_flow_isolate()
2723  * @see rte_flow_ops
2724  */
2725 int
2726 mlx5_flow_isolate(struct rte_eth_dev *dev,
2727                   int enable,
2728                   struct rte_flow_error *error)
2729 {
2730         struct mlx5_priv *priv = dev->data->dev_private;
2731
2732         if (dev->data->dev_started) {
2733                 rte_flow_error_set(error, EBUSY,
2734                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2735                                    NULL,
2736                                    "port must be stopped first");
2737                 return -rte_errno;
2738         }
2739         priv->isolated = !!enable;
2740         if (enable)
2741                 dev->dev_ops = &mlx5_dev_ops_isolate;
2742         else
2743                 dev->dev_ops = &mlx5_dev_ops;
2744         return 0;
2745 }
2746
2747 /**
2748  * Query a flow.
2749  *
2750  * @see rte_flow_query()
2751  * @see rte_flow_ops
2752  */
2753 static int
2754 flow_drv_query(struct rte_eth_dev *dev,
2755                struct rte_flow *flow,
2756                const struct rte_flow_action *actions,
2757                void *data,
2758                struct rte_flow_error *error)
2759 {
2760         const struct mlx5_flow_driver_ops *fops;
2761         enum mlx5_flow_drv_type ftype = flow->drv_type;
2762
2763         assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
2764         fops = flow_get_drv_ops(ftype);
2765
2766         return fops->query(dev, flow, actions, data, error);
2767 }
2768
2769 /**
2770  * Query a flow.
2771  *
2772  * @see rte_flow_query()
2773  * @see rte_flow_ops
2774  */
2775 int
2776 mlx5_flow_query(struct rte_eth_dev *dev,
2777                 struct rte_flow *flow,
2778                 const struct rte_flow_action *actions,
2779                 void *data,
2780                 struct rte_flow_error *error)
2781 {
2782         int ret;
2783
2784         ret = flow_drv_query(dev, flow, actions, data, error);
2785         if (ret < 0)
2786                 return ret;
2787         return 0;
2788 }
2789
2790 /**
2791  * Convert a flow director filter to a generic flow.
2792  *
2793  * @param dev
2794  *   Pointer to Ethernet device.
2795  * @param fdir_filter
2796  *   Flow director filter to add.
2797  * @param attributes
2798  *   Generic flow parameters structure.
2799  *
2800  * @return
2801  *   0 on success, a negative errno value otherwise and rte_errno is set.
2802  */
2803 static int
2804 flow_fdir_filter_convert(struct rte_eth_dev *dev,
2805                          const struct rte_eth_fdir_filter *fdir_filter,
2806                          struct mlx5_fdir *attributes)
2807 {
2808         struct mlx5_priv *priv = dev->data->dev_private;
2809         const struct rte_eth_fdir_input *input = &fdir_filter->input;
2810         const struct rte_eth_fdir_masks *mask =
2811                 &dev->data->dev_conf.fdir_conf.mask;
2812
2813         /* Validate queue number. */
2814         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
2815                 DRV_LOG(ERR, "port %u invalid queue number %d",
2816                         dev->data->port_id, fdir_filter->action.rx_queue);
2817                 rte_errno = EINVAL;
2818                 return -rte_errno;
2819         }
2820         attributes->attr.ingress = 1;
2821         attributes->items[0] = (struct rte_flow_item) {
2822                 .type = RTE_FLOW_ITEM_TYPE_ETH,
2823                 .spec = &attributes->l2,
2824                 .mask = &attributes->l2_mask,
2825         };
2826         switch (fdir_filter->action.behavior) {
2827         case RTE_ETH_FDIR_ACCEPT:
2828                 attributes->actions[0] = (struct rte_flow_action){
2829                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
2830                         .conf = &attributes->queue,
2831                 };
2832                 break;
2833         case RTE_ETH_FDIR_REJECT:
2834                 attributes->actions[0] = (struct rte_flow_action){
2835                         .type = RTE_FLOW_ACTION_TYPE_DROP,
2836                 };
2837                 break;
2838         default:
2839                 DRV_LOG(ERR, "port %u invalid behavior %d",
2840                         dev->data->port_id,
2841                         fdir_filter->action.behavior);
2842                 rte_errno = ENOTSUP;
2843                 return -rte_errno;
2844         }
2845         attributes->queue.index = fdir_filter->action.rx_queue;
2846         /* Handle L3. */
2847         switch (fdir_filter->input.flow_type) {
2848         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2849         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2850         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2851                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
2852                         .src_addr = input->flow.ip4_flow.src_ip,
2853                         .dst_addr = input->flow.ip4_flow.dst_ip,
2854                         .time_to_live = input->flow.ip4_flow.ttl,
2855                         .type_of_service = input->flow.ip4_flow.tos,
2856                 };
2857                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
2858                         .src_addr = mask->ipv4_mask.src_ip,
2859                         .dst_addr = mask->ipv4_mask.dst_ip,
2860                         .time_to_live = mask->ipv4_mask.ttl,
2861                         .type_of_service = mask->ipv4_mask.tos,
2862                         .next_proto_id = mask->ipv4_mask.proto,
2863                 };
2864                 attributes->items[1] = (struct rte_flow_item){
2865                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
2866                         .spec = &attributes->l3,
2867                         .mask = &attributes->l3_mask,
2868                 };
2869                 break;
2870         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2871         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2872         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2873                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
2874                         .hop_limits = input->flow.ipv6_flow.hop_limits,
2875                         .proto = input->flow.ipv6_flow.proto,
2876                 };
2877
2878                 memcpy(attributes->l3.ipv6.hdr.src_addr,
2879                        input->flow.ipv6_flow.src_ip,
2880                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
2881                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
2882                        input->flow.ipv6_flow.dst_ip,
2883                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
2884                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
2885                        mask->ipv6_mask.src_ip,
2886                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
2887                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
2888                        mask->ipv6_mask.dst_ip,
2889                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
2890                 attributes->items[1] = (struct rte_flow_item){
2891                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
2892                         .spec = &attributes->l3,
2893                         .mask = &attributes->l3_mask,
2894                 };
2895                 break;
2896         default:
2897                 DRV_LOG(ERR, "port %u invalid flow type%d",
2898                         dev->data->port_id, fdir_filter->input.flow_type);
2899                 rte_errno = ENOTSUP;
2900                 return -rte_errno;
2901         }
2902         /* Handle L4. */
2903         switch (fdir_filter->input.flow_type) {
2904         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2905                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
2906                         .src_port = input->flow.udp4_flow.src_port,
2907                         .dst_port = input->flow.udp4_flow.dst_port,
2908                 };
2909                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
2910                         .src_port = mask->src_port_mask,
2911                         .dst_port = mask->dst_port_mask,
2912                 };
2913                 attributes->items[2] = (struct rte_flow_item){
2914                         .type = RTE_FLOW_ITEM_TYPE_UDP,
2915                         .spec = &attributes->l4,
2916                         .mask = &attributes->l4_mask,
2917                 };
2918                 break;
2919         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2920                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
2921                         .src_port = input->flow.tcp4_flow.src_port,
2922                         .dst_port = input->flow.tcp4_flow.dst_port,
2923                 };
2924                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
2925                         .src_port = mask->src_port_mask,
2926                         .dst_port = mask->dst_port_mask,
2927                 };
2928                 attributes->items[2] = (struct rte_flow_item){
2929                         .type = RTE_FLOW_ITEM_TYPE_TCP,
2930                         .spec = &attributes->l4,
2931                         .mask = &attributes->l4_mask,
2932                 };
2933                 break;
2934         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2935                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
2936                         .src_port = input->flow.udp6_flow.src_port,
2937                         .dst_port = input->flow.udp6_flow.dst_port,
2938                 };
2939                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
2940                         .src_port = mask->src_port_mask,
2941                         .dst_port = mask->dst_port_mask,
2942                 };
2943                 attributes->items[2] = (struct rte_flow_item){
2944                         .type = RTE_FLOW_ITEM_TYPE_UDP,
2945                         .spec = &attributes->l4,
2946                         .mask = &attributes->l4_mask,
2947                 };
2948                 break;
2949         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2950                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
2951                         .src_port = input->flow.tcp6_flow.src_port,
2952                         .dst_port = input->flow.tcp6_flow.dst_port,
2953                 };
2954                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
2955                         .src_port = mask->src_port_mask,
2956                         .dst_port = mask->dst_port_mask,
2957                 };
2958                 attributes->items[2] = (struct rte_flow_item){
2959                         .type = RTE_FLOW_ITEM_TYPE_TCP,
2960                         .spec = &attributes->l4,
2961                         .mask = &attributes->l4_mask,
2962                 };
2963                 break;
2964         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2965         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2966                 break;
2967         default:
2968                 DRV_LOG(ERR, "port %u invalid flow type%d",
2969                         dev->data->port_id, fdir_filter->input.flow_type);
2970                 rte_errno = ENOTSUP;
2971                 return -rte_errno;
2972         }
2973         return 0;
2974 }
2975
2976 #define FLOW_FDIR_CMP(f1, f2, fld) \
2977         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
2978
2979 /**
2980  * Compare two FDIR flows. If items and actions are identical, the two flows are
2981  * regarded as same.
2982  *
2983  * @param dev
2984  *   Pointer to Ethernet device.
2985  * @param f1
2986  *   FDIR flow to compare.
2987  * @param f2
2988  *   FDIR flow to compare.
2989  *
2990  * @return
2991  *   Zero on match, 1 otherwise.
2992  */
2993 static int
2994 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
2995 {
2996         if (FLOW_FDIR_CMP(f1, f2, attr) ||
2997             FLOW_FDIR_CMP(f1, f2, l2) ||
2998             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
2999             FLOW_FDIR_CMP(f1, f2, l3) ||
3000             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
3001             FLOW_FDIR_CMP(f1, f2, l4) ||
3002             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
3003             FLOW_FDIR_CMP(f1, f2, actions[0].type))
3004                 return 1;
3005         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
3006             FLOW_FDIR_CMP(f1, f2, queue))
3007                 return 1;
3008         return 0;
3009 }
3010
3011 /**
3012  * Search device flow list to find out a matched FDIR flow.
3013  *
3014  * @param dev
3015  *   Pointer to Ethernet device.
3016  * @param fdir_flow
3017  *   FDIR flow to lookup.
3018  *
3019  * @return
3020  *   Pointer of flow if found, NULL otherwise.
3021  */
3022 static struct rte_flow *
3023 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
3024 {
3025         struct mlx5_priv *priv = dev->data->dev_private;
3026         struct rte_flow *flow = NULL;
3027
3028         assert(fdir_flow);
3029         TAILQ_FOREACH(flow, &priv->flows, next) {
3030                 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
3031                         DRV_LOG(DEBUG, "port %u found FDIR flow %p",
3032                                 dev->data->port_id, (void *)flow);
3033                         break;
3034                 }
3035         }
3036         return flow;
3037 }
3038
3039 /**
3040  * Add new flow director filter and store it in list.
3041  *
3042  * @param dev
3043  *   Pointer to Ethernet device.
3044  * @param fdir_filter
3045  *   Flow director filter to add.
3046  *
3047  * @return
3048  *   0 on success, a negative errno value otherwise and rte_errno is set.
3049  */
3050 static int
3051 flow_fdir_filter_add(struct rte_eth_dev *dev,
3052                      const struct rte_eth_fdir_filter *fdir_filter)
3053 {
3054         struct mlx5_priv *priv = dev->data->dev_private;
3055         struct mlx5_fdir *fdir_flow;
3056         struct rte_flow *flow;
3057         int ret;
3058
3059         fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
3060         if (!fdir_flow) {
3061                 rte_errno = ENOMEM;
3062                 return -rte_errno;
3063         }
3064         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
3065         if (ret)
3066                 goto error;
3067         flow = flow_fdir_filter_lookup(dev, fdir_flow);
3068         if (flow) {
3069                 rte_errno = EEXIST;
3070                 goto error;
3071         }
3072         flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
3073                                 fdir_flow->items, fdir_flow->actions, NULL);
3074         if (!flow)
3075                 goto error;
3076         assert(!flow->fdir);
3077         flow->fdir = fdir_flow;
3078         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
3079                 dev->data->port_id, (void *)flow);
3080         return 0;
3081 error:
3082         rte_free(fdir_flow);
3083         return -rte_errno;
3084 }
3085
3086 /**
3087  * Delete specific filter.
3088  *
3089  * @param dev
3090  *   Pointer to Ethernet device.
3091  * @param fdir_filter
3092  *   Filter to be deleted.
3093  *
3094  * @return
3095  *   0 on success, a negative errno value otherwise and rte_errno is set.
3096  */
3097 static int
3098 flow_fdir_filter_delete(struct rte_eth_dev *dev,
3099                         const struct rte_eth_fdir_filter *fdir_filter)
3100 {
3101         struct mlx5_priv *priv = dev->data->dev_private;
3102         struct rte_flow *flow;
3103         struct mlx5_fdir fdir_flow = {
3104                 .attr.group = 0,
3105         };
3106         int ret;
3107
3108         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
3109         if (ret)
3110                 return -rte_errno;
3111         flow = flow_fdir_filter_lookup(dev, &fdir_flow);
3112         if (!flow) {
3113                 rte_errno = ENOENT;
3114                 return -rte_errno;
3115         }
3116         flow_list_destroy(dev, &priv->flows, flow);
3117         DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
3118                 dev->data->port_id, (void *)flow);
3119         return 0;
3120 }
3121
3122 /**
3123  * Update queue for specific filter.
3124  *
3125  * @param dev
3126  *   Pointer to Ethernet device.
3127  * @param fdir_filter
3128  *   Filter to be updated.
3129  *
3130  * @return
3131  *   0 on success, a negative errno value otherwise and rte_errno is set.
3132  */
3133 static int
3134 flow_fdir_filter_update(struct rte_eth_dev *dev,
3135                         const struct rte_eth_fdir_filter *fdir_filter)
3136 {
3137         int ret;
3138
3139         ret = flow_fdir_filter_delete(dev, fdir_filter);
3140         if (ret)
3141                 return ret;
3142         return flow_fdir_filter_add(dev, fdir_filter);
3143 }
3144
3145 /**
3146  * Flush all filters.
3147  *
3148  * @param dev
3149  *   Pointer to Ethernet device.
3150  */
3151 static void
3152 flow_fdir_filter_flush(struct rte_eth_dev *dev)
3153 {
3154         struct mlx5_priv *priv = dev->data->dev_private;
3155
3156         mlx5_flow_list_flush(dev, &priv->flows);
3157 }
3158
3159 /**
3160  * Get flow director information.
3161  *
3162  * @param dev
3163  *   Pointer to Ethernet device.
3164  * @param[out] fdir_info
3165  *   Resulting flow director information.
3166  */
3167 static void
3168 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
3169 {
3170         struct rte_eth_fdir_masks *mask =
3171                 &dev->data->dev_conf.fdir_conf.mask;
3172
3173         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
3174         fdir_info->guarant_spc = 0;
3175         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
3176         fdir_info->max_flexpayload = 0;
3177         fdir_info->flow_types_mask[0] = 0;
3178         fdir_info->flex_payload_unit = 0;
3179         fdir_info->max_flex_payload_segment_num = 0;
3180         fdir_info->flex_payload_limit = 0;
3181         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
3182 }
3183
3184 /**
3185  * Deal with flow director operations.
3186  *
3187  * @param dev
3188  *   Pointer to Ethernet device.
3189  * @param filter_op
3190  *   Operation to perform.
3191  * @param arg
3192  *   Pointer to operation-specific structure.
3193  *
3194  * @return
3195  *   0 on success, a negative errno value otherwise and rte_errno is set.
3196  */
3197 static int
3198 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
3199                     void *arg)
3200 {
3201         enum rte_fdir_mode fdir_mode =
3202                 dev->data->dev_conf.fdir_conf.mode;
3203
3204         if (filter_op == RTE_ETH_FILTER_NOP)
3205                 return 0;
3206         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
3207             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
3208                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
3209                         dev->data->port_id, fdir_mode);
3210                 rte_errno = EINVAL;
3211                 return -rte_errno;
3212         }
3213         switch (filter_op) {
3214         case RTE_ETH_FILTER_ADD:
3215                 return flow_fdir_filter_add(dev, arg);
3216         case RTE_ETH_FILTER_UPDATE:
3217                 return flow_fdir_filter_update(dev, arg);
3218         case RTE_ETH_FILTER_DELETE:
3219                 return flow_fdir_filter_delete(dev, arg);
3220         case RTE_ETH_FILTER_FLUSH:
3221                 flow_fdir_filter_flush(dev);
3222                 break;
3223         case RTE_ETH_FILTER_INFO:
3224                 flow_fdir_info_get(dev, arg);
3225                 break;
3226         default:
3227                 DRV_LOG(DEBUG, "port %u unknown operation %u",
3228                         dev->data->port_id, filter_op);
3229                 rte_errno = EINVAL;
3230                 return -rte_errno;
3231         }
3232         return 0;
3233 }
3234
3235 /**
3236  * Manage filter operations.
3237  *
3238  * @param dev
3239  *   Pointer to Ethernet device structure.
3240  * @param filter_type
3241  *   Filter type.
3242  * @param filter_op
3243  *   Operation to perform.
3244  * @param arg
3245  *   Pointer to operation-specific structure.
3246  *
3247  * @return
3248  *   0 on success, a negative errno value otherwise and rte_errno is set.
3249  */
3250 int
3251 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
3252                      enum rte_filter_type filter_type,
3253                      enum rte_filter_op filter_op,
3254                      void *arg)
3255 {
3256         switch (filter_type) {
3257         case RTE_ETH_FILTER_GENERIC:
3258                 if (filter_op != RTE_ETH_FILTER_GET) {
3259                         rte_errno = EINVAL;
3260                         return -rte_errno;
3261                 }
3262                 *(const void **)arg = &mlx5_flow_ops;
3263                 return 0;
3264         case RTE_ETH_FILTER_FDIR:
3265                 return flow_fdir_ctrl_func(dev, filter_op, arg);
3266         default:
3267                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
3268                         dev->data->port_id, filter_type);
3269                 rte_errno = ENOTSUP;
3270                 return -rte_errno;
3271         }
3272         return 0;
3273 }
3274
3275 #define MLX5_POOL_QUERY_FREQ_US 1000000
3276
3277 /**
3278  * Set the periodic procedure for triggering asynchronous batch queries for all
3279  * the counter pools.
3280  *
3281  * @param[in] sh
3282  *   Pointer to mlx5_ibv_shared object.
3283  */
3284 void
3285 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
3286 {
3287         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
3288         uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
3289         uint32_t us;
3290
3291         cont = MLX5_CNT_CONTAINER(sh, 1, 0);
3292         pools_n += rte_atomic16_read(&cont->n_valid);
3293         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
3294         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us\n", pools_n, us);
3295         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
3296                 sh->cmng.query_thread_on = 0;
3297                 DRV_LOG(ERR, "Cannot reinitialize query alarm\n");
3298         } else {
3299                 sh->cmng.query_thread_on = 1;
3300         }
3301 }
3302
3303 /**
3304  * The periodic procedure for triggering asynchronous batch queries for all the
3305  * counter pools. This function is probably called by the host thread.
3306  *
3307  * @param[in] arg
3308  *   The parameter for the alarm process.
3309  */
3310 void
3311 mlx5_flow_query_alarm(void *arg)
3312 {
3313         struct mlx5_ibv_shared *sh = arg;
3314         struct mlx5_devx_obj *dcs;
3315         uint16_t offset;
3316         int ret;
3317         uint8_t batch = sh->cmng.batch;
3318         uint16_t pool_index = sh->cmng.pool_index;
3319         struct mlx5_pools_container *cont;
3320         struct mlx5_pools_container *mcont;
3321         struct mlx5_flow_counter_pool *pool;
3322
3323         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
3324                 goto set_alarm;
3325 next_container:
3326         cont = MLX5_CNT_CONTAINER(sh, batch, 1);
3327         mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
3328         /* Check if resize was done and need to flip a container. */
3329         if (cont != mcont) {
3330                 if (cont->pools) {
3331                         /* Clean the old container. */
3332                         rte_free(cont->pools);
3333                         memset(cont, 0, sizeof(*cont));
3334                 }
3335                 rte_cio_wmb();
3336                  /* Flip the host container. */
3337                 sh->cmng.mhi[batch] ^= (uint8_t)2;
3338                 cont = mcont;
3339         }
3340         if (!cont->pools) {
3341                 /* 2 empty containers case is unexpected. */
3342                 if (unlikely(batch != sh->cmng.batch))
3343                         goto set_alarm;
3344                 batch ^= 0x1;
3345                 pool_index = 0;
3346                 goto next_container;
3347         }
3348         pool = cont->pools[pool_index];
3349         if (pool->raw_hw)
3350                 /* There is a pool query in progress. */
3351                 goto set_alarm;
3352         pool->raw_hw =
3353                 LIST_FIRST(&sh->cmng.free_stat_raws);
3354         if (!pool->raw_hw)
3355                 /* No free counter statistics raw memory. */
3356                 goto set_alarm;
3357         dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
3358                                                               (&pool->a64_dcs);
3359         offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
3360         ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
3361                                                offset, NULL, NULL,
3362                                                pool->raw_hw->mem_mng->dm->id,
3363                                                (void *)(uintptr_t)
3364                                                (pool->raw_hw->data + offset),
3365                                                sh->devx_comp,
3366                                                (uint64_t)(uintptr_t)pool);
3367         if (ret) {
3368                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
3369                         " %d\n", pool->min_dcs->id);
3370                 pool->raw_hw = NULL;
3371                 goto set_alarm;
3372         }
3373         pool->raw_hw->min_dcs_id = dcs->id;
3374         LIST_REMOVE(pool->raw_hw, next);
3375         sh->cmng.pending_queries++;
3376         pool_index++;
3377         if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
3378                 batch ^= 0x1;
3379                 pool_index = 0;
3380         }
3381 set_alarm:
3382         sh->cmng.batch = batch;
3383         sh->cmng.pool_index = pool_index;
3384         mlx5_set_query_alarm(sh);
3385 }
3386
3387 /**
3388  * Handler for the HW respond about ready values from an asynchronous batch
3389  * query. This function is probably called by the host thread.
3390  *
3391  * @param[in] sh
3392  *   The pointer to the shared IB device context.
3393  * @param[in] async_id
3394  *   The Devx async ID.
3395  * @param[in] status
3396  *   The status of the completion.
3397  */
3398 void
3399 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
3400                                   uint64_t async_id, int status)
3401 {
3402         struct mlx5_flow_counter_pool *pool =
3403                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
3404         struct mlx5_counter_stats_raw *raw_to_free;
3405
3406         if (unlikely(status)) {
3407                 raw_to_free = pool->raw_hw;
3408         } else {
3409                 raw_to_free = pool->raw;
3410                 rte_spinlock_lock(&pool->sl);
3411                 pool->raw = pool->raw_hw;
3412                 rte_spinlock_unlock(&pool->sl);
3413                 rte_atomic64_add(&pool->query_gen, 1);
3414                 /* Be sure the new raw counters data is updated in memory. */
3415                 rte_cio_wmb();
3416         }
3417         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
3418         pool->raw_hw = NULL;
3419         sh->cmng.pending_queries--;
3420 }