drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rx.h"
  32 #include "mlx5_tx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              const struct mlx5_flow_tunnel *tunnel,
  54                              struct tunnel_default_miss_ctx *ctx,
  55                              struct rte_flow_error *error);
  56 static struct mlx5_flow_tunnel *
  57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  58 static void
  59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  60 static uint32_t
  61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  62                                 const struct mlx5_flow_tunnel *tunnel,
  63                                 uint32_t group, uint32_t *table,
  64                                 struct rte_flow_error *error);
  65
  66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  67 static void mlx5_flow_pop_thread_workspace(void);
  68
  69
  70 /** Device flow drivers. */
  71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  72
  73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  74
  75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  76         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  78         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  79 #endif
  80         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  81         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  82 };
  83
  84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  86         (const int []){ \
  87                 __VA_ARGS__, 0, \
  88         }
  89
  90 /** Node object of input graph for mlx5_flow_expand_rss(). */
  91 struct mlx5_flow_expand_node {
  92         const int *const next;
  93         /**<
  94          * List of next node indexes. Index 0 is interpreted as a terminator.
  95          */
  96         const enum rte_flow_item_type type;
  97         /**< Pattern item type of current node. */
  98         uint64_t rss_types;
  99         /**<
 100          * RSS types bit-field associated with this node
 101          * (see RTE_ETH_RSS_* definitions).
 102          */
 103         uint64_t node_flags;
 104         /**<
 105          *  Bit-fields that define how the node is used in the expansion.
 106          * (see MLX5_EXPANSION_NODE_* definitions).
 107          */
 108 };
 109
 110 /* Optional expand field. The expansion alg will not go deeper. */
 111 #define MLX5_EXPANSION_NODE_OPTIONAL (UINT64_C(1) << 0)
 112
 113 /* The node is not added implicitly as expansion to the flow pattern.
 114  * If the node type does not match the flow pattern item type, the
 115  * expansion alg will go deeper to its next items.
 116  * In the current implementation, the list of next nodes indexes can
 117  * have up to one node with this flag set and it has to be the last
 118  * node index (before the list terminator).
 119  */
 120 #define MLX5_EXPANSION_NODE_EXPLICIT (UINT64_C(1) << 1)
 121
 122 /** Object returned by mlx5_flow_expand_rss(). */
 123 struct mlx5_flow_expand_rss {
 124         uint32_t entries;
 125         /**< Number of entries @p patterns and @p priorities. */
 126         struct {
 127                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 128                 uint32_t priority; /**< Priority offset for each expansion. */
 129         } entry[];
 130 };
 131
 132 static void
 133 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
 134
 135 static const struct mlx5_flow_expand_node *
 136 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
 137                 unsigned int item_idx,
 138                 const struct mlx5_flow_expand_node graph[],
 139                 const struct mlx5_flow_expand_node *node);
 140
 141 static bool
 142 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
 143 {
 144         switch (item->type) {
 145         case RTE_FLOW_ITEM_TYPE_ETH:
 146         case RTE_FLOW_ITEM_TYPE_VLAN:
 147         case RTE_FLOW_ITEM_TYPE_IPV4:
 148         case RTE_FLOW_ITEM_TYPE_IPV6:
 149         case RTE_FLOW_ITEM_TYPE_UDP:
 150         case RTE_FLOW_ITEM_TYPE_TCP:
 151         case RTE_FLOW_ITEM_TYPE_VXLAN:
 152         case RTE_FLOW_ITEM_TYPE_NVGRE:
 153         case RTE_FLOW_ITEM_TYPE_GRE:
 154         case RTE_FLOW_ITEM_TYPE_GENEVE:
 155         case RTE_FLOW_ITEM_TYPE_MPLS:
 156         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 157         case RTE_FLOW_ITEM_TYPE_GRE_KEY:
 158         case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
 159         case RTE_FLOW_ITEM_TYPE_GTP:
 160                 return true;
 161         default:
 162                 break;
 163         }
 164         return false;
 165 }
 166
 167 static enum rte_flow_item_type
 168 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 169 {
 170         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 171         uint16_t ether_type = 0;
 172         uint16_t ether_type_m;
 173         uint8_t ip_next_proto = 0;
 174         uint8_t ip_next_proto_m;
 175
 176         if (item == NULL || item->spec == NULL)
 177                 return ret;
 178         switch (item->type) {
 179         case RTE_FLOW_ITEM_TYPE_ETH:
 180                 if (item->mask)
 181                         ether_type_m = ((const struct rte_flow_item_eth *)
 182                                                 (item->mask))->type;
 183                 else
 184                         ether_type_m = rte_flow_item_eth_mask.type;
 185                 if (ether_type_m != RTE_BE16(0xFFFF))
 186                         break;
 187                 ether_type = ((const struct rte_flow_item_eth *)
 188                                 (item->spec))->type;
 189                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 190                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 191                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 192                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 193                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 194                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 195                 else
 196                         ret = RTE_FLOW_ITEM_TYPE_END;
 197                 break;
 198         case RTE_FLOW_ITEM_TYPE_VLAN:
 199                 if (item->mask)
 200                         ether_type_m = ((const struct rte_flow_item_vlan *)
 201                                                 (item->mask))->inner_type;
 202                 else
 203                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 204                 if (ether_type_m != RTE_BE16(0xFFFF))
 205                         break;
 206                 ether_type = ((const struct rte_flow_item_vlan *)
 207                                 (item->spec))->inner_type;
 208                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 209                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 210                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 211                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 212                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 213                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 214                 else
 215                         ret = RTE_FLOW_ITEM_TYPE_END;
 216                 break;
 217         case RTE_FLOW_ITEM_TYPE_IPV4:
 218                 if (item->mask)
 219                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 220                                         (item->mask))->hdr.next_proto_id;
 221                 else
 222                         ip_next_proto_m =
 223                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 224                 if (ip_next_proto_m != 0xFF)
 225                         break;
 226                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 227                                 (item->spec))->hdr.next_proto_id;
 228                 if (ip_next_proto == IPPROTO_UDP)
 229                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 230                 else if (ip_next_proto == IPPROTO_TCP)
 231                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 232                 else if (ip_next_proto == IPPROTO_IP)
 233                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 234                 else if (ip_next_proto == IPPROTO_IPV6)
 235                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 236                 else
 237                         ret = RTE_FLOW_ITEM_TYPE_END;
 238                 break;
 239         case RTE_FLOW_ITEM_TYPE_IPV6:
 240                 if (item->mask)
 241                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 242                                                 (item->mask))->hdr.proto;
 243                 else
 244                         ip_next_proto_m =
 245                                 rte_flow_item_ipv6_mask.hdr.proto;
 246                 if (ip_next_proto_m != 0xFF)
 247                         break;
 248                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 249                                 (item->spec))->hdr.proto;
 250                 if (ip_next_proto == IPPROTO_UDP)
 251                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 252                 else if (ip_next_proto == IPPROTO_TCP)
 253                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 254                 else if (ip_next_proto == IPPROTO_IP)
 255                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 256                 else if (ip_next_proto == IPPROTO_IPV6)
 257                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 258                 else
 259                         ret = RTE_FLOW_ITEM_TYPE_END;
 260                 break;
 261         case RTE_FLOW_ITEM_TYPE_GENEVE:
 262                 ether_type_m = item->mask ?
 263                                ((const struct rte_flow_item_geneve *)
 264                                (item->mask))->protocol :
 265                                rte_flow_item_geneve_mask.protocol;
 266                 ether_type = ((const struct rte_flow_item_geneve *)
 267                              (item->spec))->protocol;
 268                 ether_type_m = rte_be_to_cpu_16(ether_type_m);
 269                 ether_type = rte_be_to_cpu_16(ether_type);
 270                 switch (ether_type_m & ether_type) {
 271                 case RTE_ETHER_TYPE_TEB:
 272                         ret = RTE_FLOW_ITEM_TYPE_ETH;
 273                         break;
 274                 case RTE_ETHER_TYPE_IPV4:
 275                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 276                         break;
 277                 case RTE_ETHER_TYPE_IPV6:
 278                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 279                         break;
 280                 default:
 281                         ret = RTE_FLOW_ITEM_TYPE_END;
 282                 }
 283                 break;
 284         default:
 285                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 286                 break;
 287         }
 288         return ret;
 289 }
 290
 291 static const int *
 292 mlx5_flow_expand_rss_skip_explicit(const struct mlx5_flow_expand_node graph[],
 293                 const int *next_node)
 294 {
 295         const struct mlx5_flow_expand_node *node = NULL;
 296         const int *next = next_node;
 297
 298         while (next && *next) {
 299                 /*
 300                  * Skip the nodes with the MLX5_EXPANSION_NODE_EXPLICIT
 301                  * flag set, because they were not found in the flow pattern.
 302                  */
 303                 node = &graph[*next];
 304                 if (!(node->node_flags & MLX5_EXPANSION_NODE_EXPLICIT))
 305                         break;
 306                 next = node->next;
 307         }
 308         return next;
 309 }
 310
 311 #define MLX5_RSS_EXP_ELT_N 16
 312
 313 /**
 314  * Expand RSS flows into several possible flows according to the RSS hash
 315  * fields requested and the driver capabilities.
 316  *
 317  * @param[out] buf
 318  *   Buffer to store the result expansion.
 319  * @param[in] size
 320  *   Buffer size in bytes. If 0, @p buf can be NULL.
 321  * @param[in] pattern
 322  *   User flow pattern.
 323  * @param[in] types
 324  *   RSS types to expand (see RTE_ETH_RSS_* definitions).
 325  * @param[in] graph
 326  *   Input graph to expand @p pattern according to @p types.
 327  * @param[in] graph_root_index
 328  *   Index of root node in @p graph, typically 0.
 329  *
 330  * @return
 331  *   A positive value representing the size of @p buf in bytes regardless of
 332  *   @p size on success, a negative errno value otherwise and rte_errno is
 333  *   set, the following errors are defined:
 334  *
 335  *   -E2BIG: graph-depth @p graph is too deep.
 336  *   -EINVAL: @p size has not enough space for expanded pattern.
 337  */
 338 static int
 339 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 340                      const struct rte_flow_item *pattern, uint64_t types,
 341                      const struct mlx5_flow_expand_node graph[],
 342                      int graph_root_index)
 343 {
 344         const struct rte_flow_item *item;
 345         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 346         const int *next_node;
 347         const int *stack[MLX5_RSS_EXP_ELT_N];
 348         int stack_pos = 0;
 349         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 350         unsigned int i, item_idx, last_expand_item_idx = 0;
 351         size_t lsize;
 352         size_t user_pattern_size = 0;
 353         void *addr = NULL;
 354         const struct mlx5_flow_expand_node *next = NULL;
 355         struct rte_flow_item missed_item;
 356         int missed = 0;
 357         int elt = 0;
 358         const struct rte_flow_item *last_expand_item = NULL;
 359
 360         memset(&missed_item, 0, sizeof(missed_item));
 361         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 362                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 363         if (lsize > size)
 364                 return -EINVAL;
 365         buf->entry[0].priority = 0;
 366         buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 367         buf->entries = 0;
 368         addr = buf->entry[0].pattern;
 369         for (item = pattern, item_idx = 0;
 370                         item->type != RTE_FLOW_ITEM_TYPE_END;
 371                         item++, item_idx++) {
 372                 if (!mlx5_flow_is_rss_expandable_item(item)) {
 373                         user_pattern_size += sizeof(*item);
 374                         continue;
 375                 }
 376                 last_expand_item = item;
 377                 last_expand_item_idx = item_idx;
 378                 i = 0;
 379                 while (node->next && node->next[i]) {
 380                         next = &graph[node->next[i]];
 381                         if (next->type == item->type)
 382                                 break;
 383                         if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
 384                                 node = next;
 385                                 i = 0;
 386                         } else {
 387                                 ++i;
 388                         }
 389                 }
 390                 if (next)
 391                         node = next;
 392                 user_pattern_size += sizeof(*item);
 393         }
 394         user_pattern_size += sizeof(*item); /* Handle END item. */
 395         lsize += user_pattern_size;
 396         if (lsize > size)
 397                 return -EINVAL;
 398         /* Copy the user pattern in the first entry of the buffer. */
 399         rte_memcpy(addr, pattern, user_pattern_size);
 400         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 401         buf->entries = 1;
 402         /* Start expanding. */
 403         memset(flow_items, 0, sizeof(flow_items));
 404         user_pattern_size -= sizeof(*item);
 405         /*
 406          * Check if the last valid item has spec set, need complete pattern,
 407          * and the pattern can be used for expansion.
 408          */
 409         missed_item.type = mlx5_flow_expand_rss_item_complete(last_expand_item);
 410         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 411                 /* Item type END indicates expansion is not required. */
 412                 return lsize;
 413         }
 414         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 415                 next = NULL;
 416                 missed = 1;
 417                 i = 0;
 418                 while (node->next && node->next[i]) {
 419                         next = &graph[node->next[i]];
 420                         if (next->type == missed_item.type) {
 421                                 flow_items[0].type = missed_item.type;
 422                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 423                                 break;
 424                         }
 425                         if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
 426                                 node = next;
 427                                 i = 0;
 428                         } else {
 429                                 ++i;
 430                         }
 431                         next = NULL;
 432                 }
 433         }
 434         if (next && missed) {
 435                 elt = 2; /* missed item + item end. */
 436                 node = next;
 437                 lsize += elt * sizeof(*item) + user_pattern_size;
 438                 if (lsize > size)
 439                         return -EINVAL;
 440                 if (node->rss_types & types) {
 441                         buf->entry[buf->entries].priority = 1;
 442                         buf->entry[buf->entries].pattern = addr;
 443                         buf->entries++;
 444                         rte_memcpy(addr, buf->entry[0].pattern,
 445                                    user_pattern_size);
 446                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 447                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 448                         addr = (void *)(((uintptr_t)addr) +
 449                                         elt * sizeof(*item));
 450                 }
 451         } else if (last_expand_item != NULL) {
 452                 node = mlx5_flow_expand_rss_adjust_node(pattern,
 453                                 last_expand_item_idx, graph, node);
 454         }
 455         memset(flow_items, 0, sizeof(flow_items));
 456         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 457                         node->next);
 458         stack[stack_pos] = next_node;
 459         node = next_node ? &graph[*next_node] : NULL;
 460         while (node) {
 461                 flow_items[stack_pos].type = node->type;
 462                 if (node->rss_types & types) {
 463                         size_t n;
 464                         /*
 465                          * compute the number of items to copy from the
 466                          * expansion and copy it.
 467                          * When the stack_pos is 0, there are 1 element in it,
 468                          * plus the addition END item.
 469                          */
 470                         elt = stack_pos + 2;
 471                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 472                         lsize += elt * sizeof(*item) + user_pattern_size;
 473                         if (lsize > size)
 474                                 return -EINVAL;
 475                         n = elt * sizeof(*item);
 476                         buf->entry[buf->entries].priority =
 477                                 stack_pos + 1 + missed;
 478                         buf->entry[buf->entries].pattern = addr;
 479                         buf->entries++;
 480                         rte_memcpy(addr, buf->entry[0].pattern,
 481                                    user_pattern_size);
 482                         addr = (void *)(((uintptr_t)addr) +
 483                                         user_pattern_size);
 484                         rte_memcpy(addr, &missed_item,
 485                                    missed * sizeof(*item));
 486                         addr = (void *)(((uintptr_t)addr) +
 487                                 missed * sizeof(*item));
 488                         rte_memcpy(addr, flow_items, n);
 489                         addr = (void *)(((uintptr_t)addr) + n);
 490                 }
 491                 /* Go deeper. */
 492                 if (!(node->node_flags & MLX5_EXPANSION_NODE_OPTIONAL) &&
 493                                 node->next) {
 494                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 495                                         node->next);
 496                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 497                                 rte_errno = E2BIG;
 498                                 return -rte_errno;
 499                         }
 500                         stack[stack_pos] = next_node;
 501                 } else if (*(next_node + 1)) {
 502                         /* Follow up with the next possibility. */
 503                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 504                                         ++next_node);
 505                 } else if (!stack_pos) {
 506                         /*
 507                          * Completing the traverse over the different paths.
 508                          * The next_node is advanced to the terminator.
 509                          */
 510                         ++next_node;
 511                 } else {
 512                         /* Move to the next path. */
 513                         while (stack_pos) {
 514                                 next_node = stack[--stack_pos];
 515                                 next_node++;
 516                                 if (*next_node)
 517                                         break;
 518                         }
 519                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 520                                         next_node);
 521                         stack[stack_pos] = next_node;
 522                 }
 523                 node = next_node && *next_node ? &graph[*next_node] : NULL;
 524         };
 525         return lsize;
 526 }
 527
 528 enum mlx5_expansion {
 529         MLX5_EXPANSION_ROOT,
 530         MLX5_EXPANSION_ROOT_OUTER,
 531         MLX5_EXPANSION_OUTER_ETH,
 532         MLX5_EXPANSION_OUTER_VLAN,
 533         MLX5_EXPANSION_OUTER_IPV4,
 534         MLX5_EXPANSION_OUTER_IPV4_UDP,
 535         MLX5_EXPANSION_OUTER_IPV4_TCP,
 536         MLX5_EXPANSION_OUTER_IPV6,
 537         MLX5_EXPANSION_OUTER_IPV6_UDP,
 538         MLX5_EXPANSION_OUTER_IPV6_TCP,
 539         MLX5_EXPANSION_VXLAN,
 540         MLX5_EXPANSION_STD_VXLAN,
 541         MLX5_EXPANSION_L3_VXLAN,
 542         MLX5_EXPANSION_VXLAN_GPE,
 543         MLX5_EXPANSION_GRE,
 544         MLX5_EXPANSION_NVGRE,
 545         MLX5_EXPANSION_GRE_KEY,
 546         MLX5_EXPANSION_MPLS,
 547         MLX5_EXPANSION_ETH,
 548         MLX5_EXPANSION_VLAN,
 549         MLX5_EXPANSION_IPV4,
 550         MLX5_EXPANSION_IPV4_UDP,
 551         MLX5_EXPANSION_IPV4_TCP,
 552         MLX5_EXPANSION_IPV6,
 553         MLX5_EXPANSION_IPV6_UDP,
 554         MLX5_EXPANSION_IPV6_TCP,
 555         MLX5_EXPANSION_IPV6_FRAG_EXT,
 556         MLX5_EXPANSION_GTP,
 557         MLX5_EXPANSION_GENEVE,
 558 };
 559
 560 /** Supported expansion of items. */
 561 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 562         [MLX5_EXPANSION_ROOT] = {
 563                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 564                                                   MLX5_EXPANSION_IPV4,
 565                                                   MLX5_EXPANSION_IPV6),
 566                 .type = RTE_FLOW_ITEM_TYPE_END,
 567         },
 568         [MLX5_EXPANSION_ROOT_OUTER] = {
 569                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 570                                                   MLX5_EXPANSION_OUTER_IPV4,
 571                                                   MLX5_EXPANSION_OUTER_IPV6),
 572                 .type = RTE_FLOW_ITEM_TYPE_END,
 573         },
 574         [MLX5_EXPANSION_OUTER_ETH] = {
 575                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 576                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 577                 .rss_types = 0,
 578         },
 579         [MLX5_EXPANSION_OUTER_VLAN] = {
 580                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 581                                                   MLX5_EXPANSION_OUTER_IPV6),
 582                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 583                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 584         },
 585         [MLX5_EXPANSION_OUTER_IPV4] = {
 586                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 587                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 588                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 589                          MLX5_EXPANSION_GRE,
 590                          MLX5_EXPANSION_NVGRE,
 591                          MLX5_EXPANSION_IPV4,
 592                          MLX5_EXPANSION_IPV6),
 593                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 594                 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
 595                         RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
 596         },
 597         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 598                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 599                                                   MLX5_EXPANSION_VXLAN_GPE,
 600                                                   MLX5_EXPANSION_MPLS,
 601                                                   MLX5_EXPANSION_GENEVE,
 602                                                   MLX5_EXPANSION_GTP),
 603                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 604                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
 605         },
 606         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 607                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 608                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
 609         },
 610         [MLX5_EXPANSION_OUTER_IPV6] = {
 611                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 612                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 613                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 614                          MLX5_EXPANSION_IPV4,
 615                          MLX5_EXPANSION_IPV6,
 616                          MLX5_EXPANSION_GRE,
 617                          MLX5_EXPANSION_NVGRE),
 618                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 619                 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
 620                         RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
 621         },
 622         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 623                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 624                                                   MLX5_EXPANSION_VXLAN_GPE,
 625                                                   MLX5_EXPANSION_MPLS,
 626                                                   MLX5_EXPANSION_GENEVE,
 627                                                   MLX5_EXPANSION_GTP),
 628                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 629                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
 630         },
 631         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 632                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 633                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
 634         },
 635         [MLX5_EXPANSION_VXLAN] = {
 636                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 637                                                   MLX5_EXPANSION_IPV4,
 638                                                   MLX5_EXPANSION_IPV6),
 639                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 640         },
 641         [MLX5_EXPANSION_STD_VXLAN] = {
 642                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 643                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 644         },
 645         [MLX5_EXPANSION_L3_VXLAN] = {
 646                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 647                                         MLX5_EXPANSION_IPV6),
 648                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 649         },
 650         [MLX5_EXPANSION_VXLAN_GPE] = {
 651                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 652                                                   MLX5_EXPANSION_IPV4,
 653                                                   MLX5_EXPANSION_IPV6),
 654                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 655         },
 656         [MLX5_EXPANSION_GRE] = {
 657                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 658                                                   MLX5_EXPANSION_IPV4,
 659                                                   MLX5_EXPANSION_IPV6,
 660                                                   MLX5_EXPANSION_GRE_KEY,
 661                                                   MLX5_EXPANSION_MPLS),
 662                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 663         },
 664         [MLX5_EXPANSION_GRE_KEY] = {
 665                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 666                                                   MLX5_EXPANSION_IPV6,
 667                                                   MLX5_EXPANSION_MPLS),
 668                 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
 669                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 670         },
 671         [MLX5_EXPANSION_NVGRE] = {
 672                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 673                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
 674         },
 675         [MLX5_EXPANSION_MPLS] = {
 676                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 677                                                   MLX5_EXPANSION_IPV6,
 678                                                   MLX5_EXPANSION_ETH),
 679                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 680                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 681         },
 682         [MLX5_EXPANSION_ETH] = {
 683                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 684                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 685         },
 686         [MLX5_EXPANSION_VLAN] = {
 687                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 688                                                   MLX5_EXPANSION_IPV6),
 689                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 690                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 691         },
 692         [MLX5_EXPANSION_IPV4] = {
 693                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 694                                                   MLX5_EXPANSION_IPV4_TCP),
 695                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 696                 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
 697                         RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
 698         },
 699         [MLX5_EXPANSION_IPV4_UDP] = {
 700                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 701                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
 702         },
 703         [MLX5_EXPANSION_IPV4_TCP] = {
 704                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 705                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
 706         },
 707         [MLX5_EXPANSION_IPV6] = {
 708                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 709                                                   MLX5_EXPANSION_IPV6_TCP,
 710                                                   MLX5_EXPANSION_IPV6_FRAG_EXT),
 711                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 712                 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
 713                         RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
 714         },
 715         [MLX5_EXPANSION_IPV6_UDP] = {
 716                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 717                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
 718         },
 719         [MLX5_EXPANSION_IPV6_TCP] = {
 720                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 721                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
 722         },
 723         [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
 724                 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
 725         },
 726         [MLX5_EXPANSION_GTP] = {
 727                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 728                                                   MLX5_EXPANSION_IPV6),
 729                 .type = RTE_FLOW_ITEM_TYPE_GTP,
 730         },
 731         [MLX5_EXPANSION_GENEVE] = {
 732                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 733                                                   MLX5_EXPANSION_IPV4,
 734                                                   MLX5_EXPANSION_IPV6),
 735                 .type = RTE_FLOW_ITEM_TYPE_GENEVE,
 736         },
 737 };
 738
 739 static struct rte_flow_action_handle *
 740 mlx5_action_handle_create(struct rte_eth_dev *dev,
 741                           const struct rte_flow_indir_action_conf *conf,
 742                           const struct rte_flow_action *action,
 743                           struct rte_flow_error *error);
 744 static int mlx5_action_handle_destroy
 745                                 (struct rte_eth_dev *dev,
 746                                  struct rte_flow_action_handle *handle,
 747                                  struct rte_flow_error *error);
 748 static int mlx5_action_handle_update
 749                                 (struct rte_eth_dev *dev,
 750                                  struct rte_flow_action_handle *handle,
 751                                  const void *update,
 752                                  struct rte_flow_error *error);
 753 static int mlx5_action_handle_query
 754                                 (struct rte_eth_dev *dev,
 755                                  const struct rte_flow_action_handle *handle,
 756                                  void *data,
 757                                  struct rte_flow_error *error);
 758 static int
 759 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 760                     struct rte_flow_tunnel *app_tunnel,
 761                     struct rte_flow_action **actions,
 762                     uint32_t *num_of_actions,
 763                     struct rte_flow_error *error);
 764 static int
 765 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 766                        struct rte_flow_tunnel *app_tunnel,
 767                        struct rte_flow_item **items,
 768                        uint32_t *num_of_items,
 769                        struct rte_flow_error *error);
 770 static int
 771 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 772                               struct rte_flow_item *pmd_items,
 773                               uint32_t num_items, struct rte_flow_error *err);
 774 static int
 775 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 776                                 struct rte_flow_action *pmd_actions,
 777                                 uint32_t num_actions,
 778                                 struct rte_flow_error *err);
 779 static int
 780 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 781                                   struct rte_mbuf *m,
 782                                   struct rte_flow_restore_info *info,
 783                                   struct rte_flow_error *err);
 784 static struct rte_flow_item_flex_handle *
 785 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
 786                            const struct rte_flow_item_flex_conf *conf,
 787                            struct rte_flow_error *error);
 788 static int
 789 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
 790                             const struct rte_flow_item_flex_handle *handle,
 791                             struct rte_flow_error *error);
 792
 793 static const struct rte_flow_ops mlx5_flow_ops = {
 794         .validate = mlx5_flow_validate,
 795         .create = mlx5_flow_create,
 796         .destroy = mlx5_flow_destroy,
 797         .flush = mlx5_flow_flush,
 798         .isolate = mlx5_flow_isolate,
 799         .query = mlx5_flow_query,
 800         .dev_dump = mlx5_flow_dev_dump,
 801         .get_aged_flows = mlx5_flow_get_aged_flows,
 802         .action_handle_create = mlx5_action_handle_create,
 803         .action_handle_destroy = mlx5_action_handle_destroy,
 804         .action_handle_update = mlx5_action_handle_update,
 805         .action_handle_query = mlx5_action_handle_query,
 806         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 807         .tunnel_match = mlx5_flow_tunnel_match,
 808         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 809         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 810         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 811         .flex_item_create = mlx5_flow_flex_item_create,
 812         .flex_item_release = mlx5_flow_flex_item_release,
 813 };
 814
 815 /* Tunnel information. */
 816 struct mlx5_flow_tunnel_info {
 817         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 818         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 819 };
 820
 821 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 822         {
 823                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 824                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 825         },
 826         {
 827                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 828                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 829         },
 830         {
 831                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 832                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 833         },
 834         {
 835                 .tunnel = MLX5_FLOW_LAYER_GRE,
 836                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 837         },
 838         {
 839                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 840                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 841         },
 842         {
 843                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 844                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 845         },
 846         {
 847                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 848                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 849         },
 850         {
 851                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 852                 .ptype = RTE_PTYPE_TUNNEL_IP,
 853         },
 854         {
 855                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 856                 .ptype = RTE_PTYPE_TUNNEL_IP,
 857         },
 858         {
 859                 .tunnel = MLX5_FLOW_LAYER_GTP,
 860                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 861         },
 862 };
 863
 864
 865
 866 /**
 867  * Translate tag ID to register.
 868  *
 869  * @param[in] dev
 870  *   Pointer to the Ethernet device structure.
 871  * @param[in] feature
 872  *   The feature that request the register.
 873  * @param[in] id
 874  *   The request register ID.
 875  * @param[out] error
 876  *   Error description in case of any.
 877  *
 878  * @return
 879  *   The request register on success, a negative errno
 880  *   value otherwise and rte_errno is set.
 881  */
 882 int
 883 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 884                      enum mlx5_feature_name feature,
 885                      uint32_t id,
 886                      struct rte_flow_error *error)
 887 {
 888         struct mlx5_priv *priv = dev->data->dev_private;
 889         struct mlx5_dev_config *config = &priv->config;
 890         enum modify_reg start_reg;
 891         bool skip_mtr_reg = false;
 892
 893         switch (feature) {
 894         case MLX5_HAIRPIN_RX:
 895                 return REG_B;
 896         case MLX5_HAIRPIN_TX:
 897                 return REG_A;
 898         case MLX5_METADATA_RX:
 899                 switch (config->dv_xmeta_en) {
 900                 case MLX5_XMETA_MODE_LEGACY:
 901                         return REG_B;
 902                 case MLX5_XMETA_MODE_META16:
 903                         return REG_C_0;
 904                 case MLX5_XMETA_MODE_META32:
 905                         return REG_C_1;
 906                 }
 907                 break;
 908         case MLX5_METADATA_TX:
 909                 return REG_A;
 910         case MLX5_METADATA_FDB:
 911                 switch (config->dv_xmeta_en) {
 912                 case MLX5_XMETA_MODE_LEGACY:
 913                         return REG_NON;
 914                 case MLX5_XMETA_MODE_META16:
 915                         return REG_C_0;
 916                 case MLX5_XMETA_MODE_META32:
 917                         return REG_C_1;
 918                 }
 919                 break;
 920         case MLX5_FLOW_MARK:
 921                 switch (config->dv_xmeta_en) {
 922                 case MLX5_XMETA_MODE_LEGACY:
 923                         return REG_NON;
 924                 case MLX5_XMETA_MODE_META16:
 925                         return REG_C_1;
 926                 case MLX5_XMETA_MODE_META32:
 927                         return REG_C_0;
 928                 }
 929                 break;
 930         case MLX5_MTR_ID:
 931                 /*
 932                  * If meter color and meter id share one register, flow match
 933                  * should use the meter color register for match.
 934                  */
 935                 if (priv->mtr_reg_share)
 936                         return priv->mtr_color_reg;
 937                 else
 938                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 939                                REG_C_3;
 940         case MLX5_MTR_COLOR:
 941         case MLX5_ASO_FLOW_HIT:
 942         case MLX5_ASO_CONNTRACK:
 943         case MLX5_SAMPLE_ID:
 944                 /* All features use the same REG_C. */
 945                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 946                 return priv->mtr_color_reg;
 947         case MLX5_COPY_MARK:
 948                 /*
 949                  * Metadata COPY_MARK register using is in meter suffix sub
 950                  * flow while with meter. It's safe to share the same register.
 951                  */
 952                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 953         case MLX5_APP_TAG:
 954                 /*
 955                  * If meter is enable, it will engage the register for color
 956                  * match and flow match. If meter color match is not using the
 957                  * REG_C_2, need to skip the REG_C_x be used by meter color
 958                  * match.
 959                  * If meter is disable, free to use all available registers.
 960                  */
 961                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 962                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 963                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 964                 if (id > (uint32_t)(REG_C_7 - start_reg))
 965                         return rte_flow_error_set(error, EINVAL,
 966                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 967                                                   NULL, "invalid tag id");
 968                 if (priv->sh->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 969                         return rte_flow_error_set(error, ENOTSUP,
 970                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 971                                                   NULL, "unsupported tag id");
 972                 /*
 973                  * This case means meter is using the REG_C_x great than 2.
 974                  * Take care not to conflict with meter color REG_C_x.
 975                  * If the available index REG_C_y >= REG_C_x, skip the
 976                  * color register.
 977                  */
 978                 if (skip_mtr_reg && priv->sh->flow_mreg_c
 979                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 980                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 981                                 return rte_flow_error_set(error, EINVAL,
 982                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 983                                                         NULL, "invalid tag id");
 984                         if (priv->sh->flow_mreg_c
 985                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 986                                 return priv->sh->flow_mreg_c
 987                                                [id + 1 + start_reg - REG_C_0];
 988                         return rte_flow_error_set(error, ENOTSUP,
 989                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 990                                                   NULL, "unsupported tag id");
 991                 }
 992                 return priv->sh->flow_mreg_c[id + start_reg - REG_C_0];
 993         }
 994         MLX5_ASSERT(false);
 995         return rte_flow_error_set(error, EINVAL,
 996                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 997                                   NULL, "invalid feature name");
 998 }
 999
1000 /**
1001  * Check extensive flow metadata register support.
1002  *
1003  * @param dev
1004  *   Pointer to rte_eth_dev structure.
1005  *
1006  * @return
1007  *   True if device supports extensive flow metadata register, otherwise false.
1008  */
1009 bool
1010 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
1011 {
1012         struct mlx5_priv *priv = dev->data->dev_private;
1013
1014         /*
1015          * Having available reg_c can be regarded inclusively as supporting
1016          * extensive flow metadata register, which could mean,
1017          * - metadata register copy action by modify header.
1018          * - 16 modify header actions is supported.
1019          * - reg_c's are preserved across different domain (FDB and NIC) on
1020          *   packet loopback by flow lookup miss.
1021          */
1022         return priv->sh->flow_mreg_c[2] != REG_NON;
1023 }
1024
1025 /**
1026  * Get the lowest priority.
1027  *
1028  * @param[in] dev
1029  *   Pointer to the Ethernet device structure.
1030  * @param[in] attributes
1031  *   Pointer to device flow rule attributes.
1032  *
1033  * @return
1034  *   The value of lowest priority of flow.
1035  */
1036 uint32_t
1037 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
1038                           const struct rte_flow_attr *attr)
1039 {
1040         struct mlx5_priv *priv = dev->data->dev_private;
1041
1042         if (!attr->group && !attr->transfer)
1043                 return priv->sh->flow_max_priority - 2;
1044         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
1045 }
1046
1047 /**
1048  * Calculate matcher priority of the flow.
1049  *
1050  * @param[in] dev
1051  *   Pointer to the Ethernet device structure.
1052  * @param[in] attr
1053  *   Pointer to device flow rule attributes.
1054  * @param[in] subpriority
1055  *   The priority based on the items.
1056  * @param[in] external
1057  *   Flow is user flow.
1058  * @return
1059  *   The matcher priority of the flow.
1060  */
1061 uint16_t
1062 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
1063                           const struct rte_flow_attr *attr,
1064                           uint32_t subpriority, bool external)
1065 {
1066         uint16_t priority = (uint16_t)attr->priority;
1067         struct mlx5_priv *priv = dev->data->dev_private;
1068
1069         if (!attr->group && !attr->transfer) {
1070                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1071                         priority = priv->sh->flow_max_priority - 1;
1072                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
1073         } else if (!external && attr->transfer && attr->group == 0 &&
1074                    attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) {
1075                 return (priv->sh->flow_max_priority - 1) * 3;
1076         }
1077         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1078                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
1079         return priority * 3 + subpriority;
1080 }
1081
1082 /**
1083  * Verify the @p item specifications (spec, last, mask) are compatible with the
1084  * NIC capabilities.
1085  *
1086  * @param[in] item
1087  *   Item specification.
1088  * @param[in] mask
1089  *   @p item->mask or flow default bit-masks.
1090  * @param[in] nic_mask
1091  *   Bit-masks covering supported fields by the NIC to compare with user mask.
1092  * @param[in] size
1093  *   Bit-masks size in bytes.
1094  * @param[in] range_accepted
1095  *   True if range of values is accepted for specific fields, false otherwise.
1096  * @param[out] error
1097  *   Pointer to error structure.
1098  *
1099  * @return
1100  *   0 on success, a negative errno value otherwise and rte_errno is set.
1101  */
1102 int
1103 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1104                           const uint8_t *mask,
1105                           const uint8_t *nic_mask,
1106                           unsigned int size,
1107                           bool range_accepted,
1108                           struct rte_flow_error *error)
1109 {
1110         unsigned int i;
1111
1112         MLX5_ASSERT(nic_mask);
1113         for (i = 0; i < size; ++i)
1114                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1115                         return rte_flow_error_set(error, ENOTSUP,
1116                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1117                                                   item,
1118                                                   "mask enables non supported"
1119                                                   " bits");
1120         if (!item->spec && (item->mask || item->last))
1121                 return rte_flow_error_set(error, EINVAL,
1122                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1123                                           "mask/last without a spec is not"
1124                                           " supported");
1125         if (item->spec && item->last && !range_accepted) {
1126                 uint8_t spec[size];
1127                 uint8_t last[size];
1128                 unsigned int i;
1129                 int ret;
1130
1131                 for (i = 0; i < size; ++i) {
1132                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1133                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1134                 }
1135                 ret = memcmp(spec, last, size);
1136                 if (ret != 0)
1137                         return rte_flow_error_set(error, EINVAL,
1138                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1139                                                   item,
1140                                                   "range is not valid");
1141         }
1142         return 0;
1143 }
1144
1145 /**
1146  * Adjust the hash fields according to the @p flow information.
1147  *
1148  * @param[in] dev_flow.
1149  *   Pointer to the mlx5_flow.
1150  * @param[in] tunnel
1151  *   1 when the hash field is for a tunnel item.
1152  * @param[in] layer_types
1153  *   RTE_ETH_RSS_* types.
1154  * @param[in] hash_fields
1155  *   Item hash fields.
1156  *
1157  * @return
1158  *   The hash fields that should be used.
1159  */
1160 uint64_t
1161 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1162                             int tunnel __rte_unused, uint64_t layer_types,
1163                             uint64_t hash_fields)
1164 {
1165 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1166         int rss_request_inner = rss_desc->level >= 2;
1167
1168         /* Check RSS hash level for tunnel. */
1169         if (tunnel && rss_request_inner)
1170                 hash_fields |= IBV_RX_HASH_INNER;
1171         else if (tunnel || rss_request_inner)
1172                 return 0;
1173 #endif
1174         /* Check if requested layer matches RSS hash fields. */
1175         if (!(rss_desc->types & layer_types))
1176                 return 0;
1177         return hash_fields;
1178 }
1179
1180 /**
1181  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1182  * if several tunnel rules are used on this queue, the tunnel ptype will be
1183  * cleared.
1184  *
1185  * @param rxq_ctrl
1186  *   Rx queue to update.
1187  */
1188 static void
1189 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1190 {
1191         unsigned int i;
1192         uint32_t tunnel_ptype = 0;
1193
1194         /* Look up for the ptype to use. */
1195         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1196                 if (!rxq_ctrl->flow_tunnels_n[i])
1197                         continue;
1198                 if (!tunnel_ptype) {
1199                         tunnel_ptype = tunnels_info[i].ptype;
1200                 } else {
1201                         tunnel_ptype = 0;
1202                         break;
1203                 }
1204         }
1205         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1206 }
1207
1208 /**
1209  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1210  * flow.
1211  *
1212  * @param[in] dev
1213  *   Pointer to the Ethernet device structure.
1214  * @param[in] dev_handle
1215  *   Pointer to device flow handle structure.
1216  */
1217 void
1218 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1219                        struct mlx5_flow_handle *dev_handle)
1220 {
1221         struct mlx5_priv *priv = dev->data->dev_private;
1222         const int mark = dev_handle->mark;
1223         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1224         struct mlx5_ind_table_obj *ind_tbl = NULL;
1225         unsigned int i;
1226
1227         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1228                 struct mlx5_hrxq *hrxq;
1229
1230                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1231                               dev_handle->rix_hrxq);
1232                 if (hrxq)
1233                         ind_tbl = hrxq->ind_table;
1234         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1235                 struct mlx5_shared_action_rss *shared_rss;
1236
1237                 shared_rss = mlx5_ipool_get
1238                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1239                          dev_handle->rix_srss);
1240                 if (shared_rss)
1241                         ind_tbl = shared_rss->ind_tbl;
1242         }
1243         if (!ind_tbl)
1244                 return;
1245         for (i = 0; i != ind_tbl->queues_n; ++i) {
1246                 int idx = ind_tbl->queues[i];
1247                 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
1248
1249                 MLX5_ASSERT(rxq_ctrl != NULL);
1250                 if (rxq_ctrl == NULL)
1251                         continue;
1252                 /*
1253                  * To support metadata register copy on Tx loopback,
1254                  * this must be always enabled (metadata may arive
1255                  * from other port - not from local flows only.
1256                  */
1257                 if (priv->config.dv_flow_en &&
1258                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1259                     mlx5_flow_ext_mreg_supported(dev)) {
1260                         rxq_ctrl->rxq.mark = 1;
1261                         rxq_ctrl->flow_mark_n = 1;
1262                 } else if (mark) {
1263                         rxq_ctrl->rxq.mark = 1;
1264                         rxq_ctrl->flow_mark_n++;
1265                 }
1266                 if (tunnel) {
1267                         unsigned int j;
1268
1269                         /* Increase the counter matching the flow. */
1270                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1271                                 if ((tunnels_info[j].tunnel &
1272                                      dev_handle->layers) ==
1273                                     tunnels_info[j].tunnel) {
1274                                         rxq_ctrl->flow_tunnels_n[j]++;
1275                                         break;
1276                                 }
1277                         }
1278                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1279                 }
1280         }
1281 }
1282
1283 /**
1284  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1285  *
1286  * @param[in] dev
1287  *   Pointer to the Ethernet device structure.
1288  * @param[in] flow
1289  *   Pointer to flow structure.
1290  */
1291 static void
1292 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1293 {
1294         struct mlx5_priv *priv = dev->data->dev_private;
1295         uint32_t handle_idx;
1296         struct mlx5_flow_handle *dev_handle;
1297
1298         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1299                        handle_idx, dev_handle, next)
1300                 flow_drv_rxq_flags_set(dev, dev_handle);
1301 }
1302
1303 /**
1304  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1305  * device flow if no other flow uses it with the same kind of request.
1306  *
1307  * @param dev
1308  *   Pointer to Ethernet device.
1309  * @param[in] dev_handle
1310  *   Pointer to the device flow handle structure.
1311  */
1312 static void
1313 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1314                         struct mlx5_flow_handle *dev_handle)
1315 {
1316         struct mlx5_priv *priv = dev->data->dev_private;
1317         const int mark = dev_handle->mark;
1318         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1319         struct mlx5_ind_table_obj *ind_tbl = NULL;
1320         unsigned int i;
1321
1322         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1323                 struct mlx5_hrxq *hrxq;
1324
1325                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1326                               dev_handle->rix_hrxq);
1327                 if (hrxq)
1328                         ind_tbl = hrxq->ind_table;
1329         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1330                 struct mlx5_shared_action_rss *shared_rss;
1331
1332                 shared_rss = mlx5_ipool_get
1333                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1334                          dev_handle->rix_srss);
1335                 if (shared_rss)
1336                         ind_tbl = shared_rss->ind_tbl;
1337         }
1338         if (!ind_tbl)
1339                 return;
1340         MLX5_ASSERT(dev->data->dev_started);
1341         for (i = 0; i != ind_tbl->queues_n; ++i) {
1342                 int idx = ind_tbl->queues[i];
1343                 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
1344
1345                 MLX5_ASSERT(rxq_ctrl != NULL);
1346                 if (rxq_ctrl == NULL)
1347                         continue;
1348                 if (priv->config.dv_flow_en &&
1349                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1350                     mlx5_flow_ext_mreg_supported(dev)) {
1351                         rxq_ctrl->rxq.mark = 1;
1352                         rxq_ctrl->flow_mark_n = 1;
1353                 } else if (mark) {
1354                         rxq_ctrl->flow_mark_n--;
1355                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1356                 }
1357                 if (tunnel) {
1358                         unsigned int j;
1359
1360                         /* Decrease the counter matching the flow. */
1361                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1362                                 if ((tunnels_info[j].tunnel &
1363                                      dev_handle->layers) ==
1364                                     tunnels_info[j].tunnel) {
1365                                         rxq_ctrl->flow_tunnels_n[j]--;
1366                                         break;
1367                                 }
1368                         }
1369                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1370                 }
1371         }
1372 }
1373
1374 /**
1375  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1376  * @p flow if no other flow uses it with the same kind of request.
1377  *
1378  * @param dev
1379  *   Pointer to Ethernet device.
1380  * @param[in] flow
1381  *   Pointer to the flow.
1382  */
1383 static void
1384 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1385 {
1386         struct mlx5_priv *priv = dev->data->dev_private;
1387         uint32_t handle_idx;
1388         struct mlx5_flow_handle *dev_handle;
1389
1390         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1391                        handle_idx, dev_handle, next)
1392                 flow_drv_rxq_flags_trim(dev, dev_handle);
1393 }
1394
1395 /**
1396  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1397  *
1398  * @param dev
1399  *   Pointer to Ethernet device.
1400  */
1401 static void
1402 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1403 {
1404         struct mlx5_priv *priv = dev->data->dev_private;
1405         unsigned int i;
1406
1407         for (i = 0; i != priv->rxqs_n; ++i) {
1408                 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1409                 unsigned int j;
1410
1411                 if (rxq == NULL || rxq->ctrl == NULL)
1412                         continue;
1413                 rxq->ctrl->flow_mark_n = 0;
1414                 rxq->ctrl->rxq.mark = 0;
1415                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1416                         rxq->ctrl->flow_tunnels_n[j] = 0;
1417                 rxq->ctrl->rxq.tunnel = 0;
1418         }
1419 }
1420
1421 /**
1422  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1423  *
1424  * @param[in] dev
1425  *   Pointer to the Ethernet device structure.
1426  */
1427 void
1428 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1429 {
1430         struct mlx5_priv *priv = dev->data->dev_private;
1431         unsigned int i;
1432
1433         for (i = 0; i != priv->rxqs_n; ++i) {
1434                 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1435                 struct mlx5_rxq_data *data;
1436
1437                 if (rxq == NULL || rxq->ctrl == NULL)
1438                         continue;
1439                 data = &rxq->ctrl->rxq;
1440                 if (!rte_flow_dynf_metadata_avail()) {
1441                         data->dynf_meta = 0;
1442                         data->flow_meta_mask = 0;
1443                         data->flow_meta_offset = -1;
1444                         data->flow_meta_port_mask = 0;
1445                 } else {
1446                         data->dynf_meta = 1;
1447                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1448                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1449                         data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1450                 }
1451         }
1452 }
1453
1454 /*
1455  * return a pointer to the desired action in the list of actions.
1456  *
1457  * @param[in] actions
1458  *   The list of actions to search the action in.
1459  * @param[in] action
1460  *   The action to find.
1461  *
1462  * @return
1463  *   Pointer to the action in the list, if found. NULL otherwise.
1464  */
1465 const struct rte_flow_action *
1466 mlx5_flow_find_action(const struct rte_flow_action *actions,
1467                       enum rte_flow_action_type action)
1468 {
1469         if (actions == NULL)
1470                 return NULL;
1471         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1472                 if (actions->type == action)
1473                         return actions;
1474         return NULL;
1475 }
1476
1477 /*
1478  * Validate the flag action.
1479  *
1480  * @param[in] action_flags
1481  *   Bit-fields that holds the actions detected until now.
1482  * @param[in] attr
1483  *   Attributes of flow that includes this action.
1484  * @param[out] error
1485  *   Pointer to error structure.
1486  *
1487  * @return
1488  *   0 on success, a negative errno value otherwise and rte_errno is set.
1489  */
1490 int
1491 mlx5_flow_validate_action_flag(uint64_t action_flags,
1492                                const struct rte_flow_attr *attr,
1493                                struct rte_flow_error *error)
1494 {
1495         if (action_flags & MLX5_FLOW_ACTION_MARK)
1496                 return rte_flow_error_set(error, EINVAL,
1497                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1498                                           "can't mark and flag in same flow");
1499         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1500                 return rte_flow_error_set(error, EINVAL,
1501                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1502                                           "can't have 2 flag"
1503                                           " actions in same flow");
1504         if (attr->egress)
1505                 return rte_flow_error_set(error, ENOTSUP,
1506                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1507                                           "flag action not supported for "
1508                                           "egress");
1509         return 0;
1510 }
1511
1512 /*
1513  * Validate the mark action.
1514  *
1515  * @param[in] action
1516  *   Pointer to the queue action.
1517  * @param[in] action_flags
1518  *   Bit-fields that holds the actions detected until now.
1519  * @param[in] attr
1520  *   Attributes of flow that includes this action.
1521  * @param[out] error
1522  *   Pointer to error structure.
1523  *
1524  * @return
1525  *   0 on success, a negative errno value otherwise and rte_errno is set.
1526  */
1527 int
1528 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1529                                uint64_t action_flags,
1530                                const struct rte_flow_attr *attr,
1531                                struct rte_flow_error *error)
1532 {
1533         const struct rte_flow_action_mark *mark = action->conf;
1534
1535         if (!mark)
1536                 return rte_flow_error_set(error, EINVAL,
1537                                           RTE_FLOW_ERROR_TYPE_ACTION,
1538                                           action,
1539                                           "configuration cannot be null");
1540         if (mark->id >= MLX5_FLOW_MARK_MAX)
1541                 return rte_flow_error_set(error, EINVAL,
1542                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1543                                           &mark->id,
1544                                           "mark id must in 0 <= id < "
1545                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1546         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1547                 return rte_flow_error_set(error, EINVAL,
1548                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1549                                           "can't flag and mark in same flow");
1550         if (action_flags & MLX5_FLOW_ACTION_MARK)
1551                 return rte_flow_error_set(error, EINVAL,
1552                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1553                                           "can't have 2 mark actions in same"
1554                                           " flow");
1555         if (attr->egress)
1556                 return rte_flow_error_set(error, ENOTSUP,
1557                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1558                                           "mark action not supported for "
1559                                           "egress");
1560         return 0;
1561 }
1562
1563 /*
1564  * Validate the drop action.
1565  *
1566  * @param[in] action_flags
1567  *   Bit-fields that holds the actions detected until now.
1568  * @param[in] attr
1569  *   Attributes of flow that includes this action.
1570  * @param[out] error
1571  *   Pointer to error structure.
1572  *
1573  * @return
1574  *   0 on success, a negative errno value otherwise and rte_errno is set.
1575  */
1576 int
1577 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1578                                const struct rte_flow_attr *attr,
1579                                struct rte_flow_error *error)
1580 {
1581         if (attr->egress)
1582                 return rte_flow_error_set(error, ENOTSUP,
1583                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1584                                           "drop action not supported for "
1585                                           "egress");
1586         return 0;
1587 }
1588
1589 /*
1590  * Validate the queue action.
1591  *
1592  * @param[in] action
1593  *   Pointer to the queue action.
1594  * @param[in] action_flags
1595  *   Bit-fields that holds the actions detected until now.
1596  * @param[in] dev
1597  *   Pointer to the Ethernet device structure.
1598  * @param[in] attr
1599  *   Attributes of flow that includes this action.
1600  * @param[out] error
1601  *   Pointer to error structure.
1602  *
1603  * @return
1604  *   0 on success, a negative errno value otherwise and rte_errno is set.
1605  */
1606 int
1607 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1608                                 uint64_t action_flags,
1609                                 struct rte_eth_dev *dev,
1610                                 const struct rte_flow_attr *attr,
1611                                 struct rte_flow_error *error)
1612 {
1613         struct mlx5_priv *priv = dev->data->dev_private;
1614         const struct rte_flow_action_queue *queue = action->conf;
1615
1616         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1617                 return rte_flow_error_set(error, EINVAL,
1618                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1619                                           "can't have 2 fate actions in"
1620                                           " same flow");
1621         if (!priv->rxqs_n)
1622                 return rte_flow_error_set(error, EINVAL,
1623                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1624                                           NULL, "No Rx queues configured");
1625         if (queue->index >= priv->rxqs_n)
1626                 return rte_flow_error_set(error, EINVAL,
1627                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1628                                           &queue->index,
1629                                           "queue index out of range");
1630         if (mlx5_rxq_get(dev, queue->index) == NULL)
1631                 return rte_flow_error_set(error, EINVAL,
1632                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1633                                           &queue->index,
1634                                           "queue is not configured");
1635         if (attr->egress)
1636                 return rte_flow_error_set(error, ENOTSUP,
1637                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1638                                           "queue action not supported for "
1639                                           "egress");
1640         return 0;
1641 }
1642
1643 /**
1644  * Validate queue numbers for device RSS.
1645  *
1646  * @param[in] dev
1647  *   Configured device.
1648  * @param[in] queues
1649  *   Array of queue numbers.
1650  * @param[in] queues_n
1651  *   Size of the @p queues array.
1652  * @param[out] error
1653  *   On error, filled with a textual error description.
1654  * @param[out] queue
1655  *   On error, filled with an offending queue index in @p queues array.
1656  *
1657  * @return
1658  *   0 on success, a negative errno code on error.
1659  */
1660 static int
1661 mlx5_validate_rss_queues(struct rte_eth_dev *dev,
1662                          const uint16_t *queues, uint32_t queues_n,
1663                          const char **error, uint32_t *queue_idx)
1664 {
1665         const struct mlx5_priv *priv = dev->data->dev_private;
1666         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1667         uint32_t i;
1668
1669         for (i = 0; i != queues_n; ++i) {
1670                 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev,
1671                                                                    queues[i]);
1672
1673                 if (queues[i] >= priv->rxqs_n) {
1674                         *error = "queue index out of range";
1675                         *queue_idx = i;
1676                         return -EINVAL;
1677                 }
1678                 if (rxq_ctrl == NULL) {
1679                         *error =  "queue is not configured";
1680                         *queue_idx = i;
1681                         return -EINVAL;
1682                 }
1683                 if (i == 0)
1684                         rxq_type = rxq_ctrl->type;
1685                 if (rxq_type != rxq_ctrl->type) {
1686                         *error = "combining hairpin and regular RSS queues is not supported";
1687                         *queue_idx = i;
1688                         return -ENOTSUP;
1689                 }
1690         }
1691         return 0;
1692 }
1693
1694 /*
1695  * Validate the rss action.
1696  *
1697  * @param[in] dev
1698  *   Pointer to the Ethernet device structure.
1699  * @param[in] action
1700  *   Pointer to the queue action.
1701  * @param[out] error
1702  *   Pointer to error structure.
1703  *
1704  * @return
1705  *   0 on success, a negative errno value otherwise and rte_errno is set.
1706  */
1707 int
1708 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1709                          const struct rte_flow_action *action,
1710                          struct rte_flow_error *error)
1711 {
1712         struct mlx5_priv *priv = dev->data->dev_private;
1713         const struct rte_flow_action_rss *rss = action->conf;
1714         int ret;
1715         const char *message;
1716         uint32_t queue_idx;
1717
1718         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1719             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1720                 return rte_flow_error_set(error, ENOTSUP,
1721                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1722                                           &rss->func,
1723                                           "RSS hash function not supported");
1724 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1725         if (rss->level > 2)
1726 #else
1727         if (rss->level > 1)
1728 #endif
1729                 return rte_flow_error_set(error, ENOTSUP,
1730                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1731                                           &rss->level,
1732                                           "tunnel RSS is not supported");
1733         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1734         if (rss->key_len == 0 && rss->key != NULL)
1735                 return rte_flow_error_set(error, ENOTSUP,
1736                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1737                                           &rss->key_len,
1738                                           "RSS hash key length 0");
1739         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1740                 return rte_flow_error_set(error, ENOTSUP,
1741                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1742                                           &rss->key_len,
1743                                           "RSS hash key too small");
1744         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1745                 return rte_flow_error_set(error, ENOTSUP,
1746                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1747                                           &rss->key_len,
1748                                           "RSS hash key too large");
1749         if (rss->queue_num > priv->config.ind_table_max_size)
1750                 return rte_flow_error_set(error, ENOTSUP,
1751                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1752                                           &rss->queue_num,
1753                                           "number of queues too large");
1754         if (rss->types & MLX5_RSS_HF_MASK)
1755                 return rte_flow_error_set(error, ENOTSUP,
1756                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1757                                           &rss->types,
1758                                           "some RSS protocols are not"
1759                                           " supported");
1760         if ((rss->types & (RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY)) &&
1761             !(rss->types & RTE_ETH_RSS_IP))
1762                 return rte_flow_error_set(error, EINVAL,
1763                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1764                                           "L3 partial RSS requested but L3 RSS"
1765                                           " type not specified");
1766         if ((rss->types & (RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY)) &&
1767             !(rss->types & (RTE_ETH_RSS_UDP | RTE_ETH_RSS_TCP)))
1768                 return rte_flow_error_set(error, EINVAL,
1769                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1770                                           "L4 partial RSS requested but L4 RSS"
1771                                           " type not specified");
1772         if (!priv->rxqs_n)
1773                 return rte_flow_error_set(error, EINVAL,
1774                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1775                                           NULL, "No Rx queues configured");
1776         if (!rss->queue_num)
1777                 return rte_flow_error_set(error, EINVAL,
1778                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1779                                           NULL, "No queues configured");
1780         ret = mlx5_validate_rss_queues(dev, rss->queue, rss->queue_num,
1781                                        &message, &queue_idx);
1782         if (ret != 0) {
1783                 return rte_flow_error_set(error, -ret,
1784                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1785                                           &rss->queue[queue_idx], message);
1786         }
1787         return 0;
1788 }
1789
1790 /*
1791  * Validate the rss action.
1792  *
1793  * @param[in] action
1794  *   Pointer to the queue action.
1795  * @param[in] action_flags
1796  *   Bit-fields that holds the actions detected until now.
1797  * @param[in] dev
1798  *   Pointer to the Ethernet device structure.
1799  * @param[in] attr
1800  *   Attributes of flow that includes this action.
1801  * @param[in] item_flags
1802  *   Items that were detected.
1803  * @param[out] error
1804  *   Pointer to error structure.
1805  *
1806  * @return
1807  *   0 on success, a negative errno value otherwise and rte_errno is set.
1808  */
1809 int
1810 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1811                               uint64_t action_flags,
1812                               struct rte_eth_dev *dev,
1813                               const struct rte_flow_attr *attr,
1814                               uint64_t item_flags,
1815                               struct rte_flow_error *error)
1816 {
1817         const struct rte_flow_action_rss *rss = action->conf;
1818         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1819         int ret;
1820
1821         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1822                 return rte_flow_error_set(error, EINVAL,
1823                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1824                                           "can't have 2 fate actions"
1825                                           " in same flow");
1826         ret = mlx5_validate_action_rss(dev, action, error);
1827         if (ret)
1828                 return ret;
1829         if (attr->egress)
1830                 return rte_flow_error_set(error, ENOTSUP,
1831                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1832                                           "rss action not supported for "
1833                                           "egress");
1834         if (rss->level > 1 && !tunnel)
1835                 return rte_flow_error_set(error, EINVAL,
1836                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1837                                           "inner RSS is not supported for "
1838                                           "non-tunnel flows");
1839         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1840             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1841                 return rte_flow_error_set(error, EINVAL,
1842                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1843                                           "RSS on eCPRI is not supported now");
1844         }
1845         if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1846             !(item_flags &
1847               (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1848             rss->level > 1)
1849                 return rte_flow_error_set(error, EINVAL,
1850                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1851                                           "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1852         return 0;
1853 }
1854
1855 /*
1856  * Validate the default miss action.
1857  *
1858  * @param[in] action_flags
1859  *   Bit-fields that holds the actions detected until now.
1860  * @param[out] error
1861  *   Pointer to error structure.
1862  *
1863  * @return
1864  *   0 on success, a negative errno value otherwise and rte_errno is set.
1865  */
1866 int
1867 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1868                                 const struct rte_flow_attr *attr,
1869                                 struct rte_flow_error *error)
1870 {
1871         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1872                 return rte_flow_error_set(error, EINVAL,
1873                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1874                                           "can't have 2 fate actions in"
1875                                           " same flow");
1876         if (attr->egress)
1877                 return rte_flow_error_set(error, ENOTSUP,
1878                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1879                                           "default miss action not supported "
1880                                           "for egress");
1881         if (attr->group)
1882                 return rte_flow_error_set(error, ENOTSUP,
1883                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1884                                           "only group 0 is supported");
1885         if (attr->transfer)
1886                 return rte_flow_error_set(error, ENOTSUP,
1887                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1888                                           NULL, "transfer is not supported");
1889         return 0;
1890 }
1891
1892 /*
1893  * Validate the count action.
1894  *
1895  * @param[in] dev
1896  *   Pointer to the Ethernet device structure.
1897  * @param[in] attr
1898  *   Attributes of flow that includes this action.
1899  * @param[out] error
1900  *   Pointer to error structure.
1901  *
1902  * @return
1903  *   0 on success, a negative errno value otherwise and rte_errno is set.
1904  */
1905 int
1906 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1907                                 const struct rte_flow_attr *attr,
1908                                 struct rte_flow_error *error)
1909 {
1910         if (attr->egress)
1911                 return rte_flow_error_set(error, ENOTSUP,
1912                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1913                                           "count action not supported for "
1914                                           "egress");
1915         return 0;
1916 }
1917
1918 /*
1919  * Validate the ASO CT action.
1920  *
1921  * @param[in] dev
1922  *   Pointer to the Ethernet device structure.
1923  * @param[in] conntrack
1924  *   Pointer to the CT action profile.
1925  * @param[out] error
1926  *   Pointer to error structure.
1927  *
1928  * @return
1929  *   0 on success, a negative errno value otherwise and rte_errno is set.
1930  */
1931 int
1932 mlx5_validate_action_ct(struct rte_eth_dev *dev,
1933                         const struct rte_flow_action_conntrack *conntrack,
1934                         struct rte_flow_error *error)
1935 {
1936         RTE_SET_USED(dev);
1937
1938         if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
1939                 return rte_flow_error_set(error, EINVAL,
1940                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1941                                           "Invalid CT state");
1942         if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
1943                 return rte_flow_error_set(error, EINVAL,
1944                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1945                                           "Invalid last TCP packet flag");
1946         return 0;
1947 }
1948
1949 /**
1950  * Verify the @p attributes will be correctly understood by the NIC and store
1951  * them in the @p flow if everything is correct.
1952  *
1953  * @param[in] dev
1954  *   Pointer to the Ethernet device structure.
1955  * @param[in] attributes
1956  *   Pointer to flow attributes
1957  * @param[out] error
1958  *   Pointer to error structure.
1959  *
1960  * @return
1961  *   0 on success, a negative errno value otherwise and rte_errno is set.
1962  */
1963 int
1964 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1965                               const struct rte_flow_attr *attributes,
1966                               struct rte_flow_error *error)
1967 {
1968         struct mlx5_priv *priv = dev->data->dev_private;
1969         uint32_t priority_max = priv->sh->flow_max_priority - 1;
1970
1971         if (attributes->group)
1972                 return rte_flow_error_set(error, ENOTSUP,
1973                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1974                                           NULL, "groups is not supported");
1975         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1976             attributes->priority >= priority_max)
1977                 return rte_flow_error_set(error, ENOTSUP,
1978                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1979                                           NULL, "priority out of range");
1980         if (attributes->egress)
1981                 return rte_flow_error_set(error, ENOTSUP,
1982                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1983                                           "egress is not supported");
1984         if (attributes->transfer && !priv->config.dv_esw_en)
1985                 return rte_flow_error_set(error, ENOTSUP,
1986                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1987                                           NULL, "transfer is not supported");
1988         if (!attributes->ingress)
1989                 return rte_flow_error_set(error, EINVAL,
1990                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1991                                           NULL,
1992                                           "ingress attribute is mandatory");
1993         return 0;
1994 }
1995
1996 /**
1997  * Validate ICMP6 item.
1998  *
1999  * @param[in] item
2000  *   Item specification.
2001  * @param[in] item_flags
2002  *   Bit-fields that holds the items detected until now.
2003  * @param[in] ext_vlan_sup
2004  *   Whether extended VLAN features are supported or not.
2005  * @param[out] error
2006  *   Pointer to error structure.
2007  *
2008  * @return
2009  *   0 on success, a negative errno value otherwise and rte_errno is set.
2010  */
2011 int
2012 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
2013                                uint64_t item_flags,
2014                                uint8_t target_protocol,
2015                                struct rte_flow_error *error)
2016 {
2017         const struct rte_flow_item_icmp6 *mask = item->mask;
2018         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2019         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
2020                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2021         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2022                                       MLX5_FLOW_LAYER_OUTER_L4;
2023         int ret;
2024
2025         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
2026                 return rte_flow_error_set(error, EINVAL,
2027                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2028                                           "protocol filtering not compatible"
2029                                           " with ICMP6 layer");
2030         if (!(item_flags & l3m))
2031                 return rte_flow_error_set(error, EINVAL,
2032                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2033                                           "IPv6 is mandatory to filter on"
2034                                           " ICMP6");
2035         if (item_flags & l4m)
2036                 return rte_flow_error_set(error, EINVAL,
2037                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2038                                           "multiple L4 layers not supported");
2039         if (!mask)
2040                 mask = &rte_flow_item_icmp6_mask;
2041         ret = mlx5_flow_item_acceptable
2042                 (item, (const uint8_t *)mask,
2043                  (const uint8_t *)&rte_flow_item_icmp6_mask,
2044                  sizeof(struct rte_flow_item_icmp6),
2045                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2046         if (ret < 0)
2047                 return ret;
2048         return 0;
2049 }
2050
2051 /**
2052  * Validate ICMP item.
2053  *
2054  * @param[in] item
2055  *   Item specification.
2056  * @param[in] item_flags
2057  *   Bit-fields that holds the items detected until now.
2058  * @param[out] error
2059  *   Pointer to error structure.
2060  *
2061  * @return
2062  *   0 on success, a negative errno value otherwise and rte_errno is set.
2063  */
2064 int
2065 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
2066                              uint64_t item_flags,
2067                              uint8_t target_protocol,
2068                              struct rte_flow_error *error)
2069 {
2070         const struct rte_flow_item_icmp *mask = item->mask;
2071         const struct rte_flow_item_icmp nic_mask = {
2072                 .hdr.icmp_type = 0xff,
2073                 .hdr.icmp_code = 0xff,
2074                 .hdr.icmp_ident = RTE_BE16(0xffff),
2075                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
2076         };
2077         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2078         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
2079                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2080         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2081                                       MLX5_FLOW_LAYER_OUTER_L4;
2082         int ret;
2083
2084         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
2085                 return rte_flow_error_set(error, EINVAL,
2086                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2087                                           "protocol filtering not compatible"
2088                                           " with ICMP layer");
2089         if (!(item_flags & l3m))
2090                 return rte_flow_error_set(error, EINVAL,
2091                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2092                                           "IPv4 is mandatory to filter"
2093                                           " on ICMP");
2094         if (item_flags & l4m)
2095                 return rte_flow_error_set(error, EINVAL,
2096                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2097                                           "multiple L4 layers not supported");
2098         if (!mask)
2099                 mask = &nic_mask;
2100         ret = mlx5_flow_item_acceptable
2101                 (item, (const uint8_t *)mask,
2102                  (const uint8_t *)&nic_mask,
2103                  sizeof(struct rte_flow_item_icmp),
2104                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2105         if (ret < 0)
2106                 return ret;
2107         return 0;
2108 }
2109
2110 /**
2111  * Validate Ethernet item.
2112  *
2113  * @param[in] item
2114  *   Item specification.
2115  * @param[in] item_flags
2116  *   Bit-fields that holds the items detected until now.
2117  * @param[out] error
2118  *   Pointer to error structure.
2119  *
2120  * @return
2121  *   0 on success, a negative errno value otherwise and rte_errno is set.
2122  */
2123 int
2124 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
2125                             uint64_t item_flags, bool ext_vlan_sup,
2126                             struct rte_flow_error *error)
2127 {
2128         const struct rte_flow_item_eth *mask = item->mask;
2129         const struct rte_flow_item_eth nic_mask = {
2130                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2131                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2132                 .type = RTE_BE16(0xffff),
2133                 .has_vlan = ext_vlan_sup ? 1 : 0,
2134         };
2135         int ret;
2136         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2137         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2138                                        MLX5_FLOW_LAYER_OUTER_L2;
2139
2140         if (item_flags & ethm)
2141                 return rte_flow_error_set(error, ENOTSUP,
2142                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2143                                           "multiple L2 layers not supported");
2144         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
2145             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
2146                 return rte_flow_error_set(error, EINVAL,
2147                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2148                                           "L2 layer should not follow "
2149                                           "L3 layers");
2150         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
2151             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
2152                 return rte_flow_error_set(error, EINVAL,
2153                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2154                                           "L2 layer should not follow VLAN");
2155         if (item_flags & MLX5_FLOW_LAYER_GTP)
2156                 return rte_flow_error_set(error, EINVAL,
2157                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2158                                           "L2 layer should not follow GTP");
2159         if (!mask)
2160                 mask = &rte_flow_item_eth_mask;
2161         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2162                                         (const uint8_t *)&nic_mask,
2163                                         sizeof(struct rte_flow_item_eth),
2164                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2165         return ret;
2166 }
2167
2168 /**
2169  * Validate VLAN item.
2170  *
2171  * @param[in] item
2172  *   Item specification.
2173  * @param[in] item_flags
2174  *   Bit-fields that holds the items detected until now.
2175  * @param[in] dev
2176  *   Ethernet device flow is being created on.
2177  * @param[out] error
2178  *   Pointer to error structure.
2179  *
2180  * @return
2181  *   0 on success, a negative errno value otherwise and rte_errno is set.
2182  */
2183 int
2184 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2185                              uint64_t item_flags,
2186                              struct rte_eth_dev *dev,
2187                              struct rte_flow_error *error)
2188 {
2189         const struct rte_flow_item_vlan *spec = item->spec;
2190         const struct rte_flow_item_vlan *mask = item->mask;
2191         const struct rte_flow_item_vlan nic_mask = {
2192                 .tci = RTE_BE16(UINT16_MAX),
2193                 .inner_type = RTE_BE16(UINT16_MAX),
2194         };
2195         uint16_t vlan_tag = 0;
2196         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2197         int ret;
2198         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2199                                         MLX5_FLOW_LAYER_INNER_L4) :
2200                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2201                                         MLX5_FLOW_LAYER_OUTER_L4);
2202         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2203                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2204
2205         if (item_flags & vlanm)
2206                 return rte_flow_error_set(error, EINVAL,
2207                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2208                                           "multiple VLAN layers not supported");
2209         else if ((item_flags & l34m) != 0)
2210                 return rte_flow_error_set(error, EINVAL,
2211                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2212                                           "VLAN cannot follow L3/L4 layer");
2213         if (!mask)
2214                 mask = &rte_flow_item_vlan_mask;
2215         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2216                                         (const uint8_t *)&nic_mask,
2217                                         sizeof(struct rte_flow_item_vlan),
2218                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2219         if (ret)
2220                 return ret;
2221         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2222                 struct mlx5_priv *priv = dev->data->dev_private;
2223
2224                 if (priv->vmwa_context) {
2225                         /*
2226                          * Non-NULL context means we have a virtual machine
2227                          * and SR-IOV enabled, we have to create VLAN interface
2228                          * to make hypervisor to setup E-Switch vport
2229                          * context correctly. We avoid creating the multiple
2230                          * VLAN interfaces, so we cannot support VLAN tag mask.
2231                          */
2232                         return rte_flow_error_set(error, EINVAL,
2233                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2234                                                   item,
2235                                                   "VLAN tag mask is not"
2236                                                   " supported in virtual"
2237                                                   " environment");
2238                 }
2239         }
2240         if (spec) {
2241                 vlan_tag = spec->tci;
2242                 vlan_tag &= mask->tci;
2243         }
2244         /*
2245          * From verbs perspective an empty VLAN is equivalent
2246          * to a packet without VLAN layer.
2247          */
2248         if (!vlan_tag)
2249                 return rte_flow_error_set(error, EINVAL,
2250                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2251                                           item->spec,
2252                                           "VLAN cannot be empty");
2253         return 0;
2254 }
2255
2256 /**
2257  * Validate IPV4 item.
2258  *
2259  * @param[in] item
2260  *   Item specification.
2261  * @param[in] item_flags
2262  *   Bit-fields that holds the items detected until now.
2263  * @param[in] last_item
2264  *   Previous validated item in the pattern items.
2265  * @param[in] ether_type
2266  *   Type in the ethernet layer header (including dot1q).
2267  * @param[in] acc_mask
2268  *   Acceptable mask, if NULL default internal default mask
2269  *   will be used to check whether item fields are supported.
2270  * @param[in] range_accepted
2271  *   True if range of values is accepted for specific fields, false otherwise.
2272  * @param[out] error
2273  *   Pointer to error structure.
2274  *
2275  * @return
2276  *   0 on success, a negative errno value otherwise and rte_errno is set.
2277  */
2278 int
2279 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2280                              uint64_t item_flags,
2281                              uint64_t last_item,
2282                              uint16_t ether_type,
2283                              const struct rte_flow_item_ipv4 *acc_mask,
2284                              bool range_accepted,
2285                              struct rte_flow_error *error)
2286 {
2287         const struct rte_flow_item_ipv4 *mask = item->mask;
2288         const struct rte_flow_item_ipv4 *spec = item->spec;
2289         const struct rte_flow_item_ipv4 nic_mask = {
2290                 .hdr = {
2291                         .src_addr = RTE_BE32(0xffffffff),
2292                         .dst_addr = RTE_BE32(0xffffffff),
2293                         .type_of_service = 0xff,
2294                         .next_proto_id = 0xff,
2295                 },
2296         };
2297         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2298         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2299                                       MLX5_FLOW_LAYER_OUTER_L3;
2300         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2301                                       MLX5_FLOW_LAYER_OUTER_L4;
2302         int ret;
2303         uint8_t next_proto = 0xFF;
2304         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2305                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2306                                   MLX5_FLOW_LAYER_INNER_VLAN);
2307
2308         if ((last_item & l2_vlan) && ether_type &&
2309             ether_type != RTE_ETHER_TYPE_IPV4)
2310                 return rte_flow_error_set(error, EINVAL,
2311                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2312                                           "IPv4 cannot follow L2/VLAN layer "
2313                                           "which ether type is not IPv4");
2314         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2315                 if (mask && spec)
2316                         next_proto = mask->hdr.next_proto_id &
2317                                      spec->hdr.next_proto_id;
2318                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2319                         return rte_flow_error_set(error, EINVAL,
2320                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2321                                                   item,
2322                                                   "multiple tunnel "
2323                                                   "not supported");
2324         }
2325         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2326                 return rte_flow_error_set(error, EINVAL,
2327                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2328                                           "wrong tunnel type - IPv6 specified "
2329                                           "but IPv4 item provided");
2330         if (item_flags & l3m)
2331                 return rte_flow_error_set(error, ENOTSUP,
2332                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2333                                           "multiple L3 layers not supported");
2334         else if (item_flags & l4m)
2335                 return rte_flow_error_set(error, EINVAL,
2336                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2337                                           "L3 cannot follow an L4 layer.");
2338         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2339                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2340                 return rte_flow_error_set(error, EINVAL,
2341                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2342                                           "L3 cannot follow an NVGRE layer.");
2343         if (!mask)
2344                 mask = &rte_flow_item_ipv4_mask;
2345         else if (mask->hdr.next_proto_id != 0 &&
2346                  mask->hdr.next_proto_id != 0xff)
2347                 return rte_flow_error_set(error, EINVAL,
2348                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2349                                           "partial mask is not supported"
2350                                           " for protocol");
2351         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2352                                         acc_mask ? (const uint8_t *)acc_mask
2353                                                  : (const uint8_t *)&nic_mask,
2354                                         sizeof(struct rte_flow_item_ipv4),
2355                                         range_accepted, error);
2356         if (ret < 0)
2357                 return ret;
2358         return 0;
2359 }
2360
2361 /**
2362  * Validate IPV6 item.
2363  *
2364  * @param[in] item
2365  *   Item specification.
2366  * @param[in] item_flags
2367  *   Bit-fields that holds the items detected until now.
2368  * @param[in] last_item
2369  *   Previous validated item in the pattern items.
2370  * @param[in] ether_type
2371  *   Type in the ethernet layer header (including dot1q).
2372  * @param[in] acc_mask
2373  *   Acceptable mask, if NULL default internal default mask
2374  *   will be used to check whether item fields are supported.
2375  * @param[out] error
2376  *   Pointer to error structure.
2377  *
2378  * @return
2379  *   0 on success, a negative errno value otherwise and rte_errno is set.
2380  */
2381 int
2382 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2383                              uint64_t item_flags,
2384                              uint64_t last_item,
2385                              uint16_t ether_type,
2386                              const struct rte_flow_item_ipv6 *acc_mask,
2387                              struct rte_flow_error *error)
2388 {
2389         const struct rte_flow_item_ipv6 *mask = item->mask;
2390         const struct rte_flow_item_ipv6 *spec = item->spec;
2391         const struct rte_flow_item_ipv6 nic_mask = {
2392                 .hdr = {
2393                         .src_addr =
2394                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2395                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2396                         .dst_addr =
2397                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2398                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2399                         .vtc_flow = RTE_BE32(0xffffffff),
2400                         .proto = 0xff,
2401                 },
2402         };
2403         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2404         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2405                                       MLX5_FLOW_LAYER_OUTER_L3;
2406         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2407                                       MLX5_FLOW_LAYER_OUTER_L4;
2408         int ret;
2409         uint8_t next_proto = 0xFF;
2410         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2411                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2412                                   MLX5_FLOW_LAYER_INNER_VLAN);
2413
2414         if ((last_item & l2_vlan) && ether_type &&
2415             ether_type != RTE_ETHER_TYPE_IPV6)
2416                 return rte_flow_error_set(error, EINVAL,
2417                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2418                                           "IPv6 cannot follow L2/VLAN layer "
2419                                           "which ether type is not IPv6");
2420         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2421                 next_proto = spec->hdr.proto;
2422         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2423                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2424                         return rte_flow_error_set(error, EINVAL,
2425                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2426                                                   item,
2427                                                   "multiple tunnel "
2428                                                   "not supported");
2429         }
2430         if (next_proto == IPPROTO_HOPOPTS  ||
2431             next_proto == IPPROTO_ROUTING  ||
2432             next_proto == IPPROTO_FRAGMENT ||
2433             next_proto == IPPROTO_ESP      ||
2434             next_proto == IPPROTO_AH       ||
2435             next_proto == IPPROTO_DSTOPTS)
2436                 return rte_flow_error_set(error, EINVAL,
2437                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2438                                           "IPv6 proto (next header) should "
2439                                           "not be set as extension header");
2440         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2441                 return rte_flow_error_set(error, EINVAL,
2442                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2443                                           "wrong tunnel type - IPv4 specified "
2444                                           "but IPv6 item provided");
2445         if (item_flags & l3m)
2446                 return rte_flow_error_set(error, ENOTSUP,
2447                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2448                                           "multiple L3 layers not supported");
2449         else if (item_flags & l4m)
2450                 return rte_flow_error_set(error, EINVAL,
2451                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2452                                           "L3 cannot follow an L4 layer.");
2453         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2454                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2455                 return rte_flow_error_set(error, EINVAL,
2456                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2457                                           "L3 cannot follow an NVGRE layer.");
2458         if (!mask)
2459                 mask = &rte_flow_item_ipv6_mask;
2460         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2461                                         acc_mask ? (const uint8_t *)acc_mask
2462                                                  : (const uint8_t *)&nic_mask,
2463                                         sizeof(struct rte_flow_item_ipv6),
2464                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2465         if (ret < 0)
2466                 return ret;
2467         return 0;
2468 }
2469
2470 /**
2471  * Validate UDP item.
2472  *
2473  * @param[in] item
2474  *   Item specification.
2475  * @param[in] item_flags
2476  *   Bit-fields that holds the items detected until now.
2477  * @param[in] target_protocol
2478  *   The next protocol in the previous item.
2479  * @param[in] flow_mask
2480  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2481  * @param[out] error
2482  *   Pointer to error structure.
2483  *
2484  * @return
2485  *   0 on success, a negative errno value otherwise and rte_errno is set.
2486  */
2487 int
2488 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2489                             uint64_t item_flags,
2490                             uint8_t target_protocol,
2491                             struct rte_flow_error *error)
2492 {
2493         const struct rte_flow_item_udp *mask = item->mask;
2494         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2495         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2496                                       MLX5_FLOW_LAYER_OUTER_L3;
2497         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2498                                       MLX5_FLOW_LAYER_OUTER_L4;
2499         int ret;
2500
2501         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2502                 return rte_flow_error_set(error, EINVAL,
2503                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2504                                           "protocol filtering not compatible"
2505                                           " with UDP layer");
2506         if (!(item_flags & l3m))
2507                 return rte_flow_error_set(error, EINVAL,
2508                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2509                                           "L3 is mandatory to filter on L4");
2510         if (item_flags & l4m)
2511                 return rte_flow_error_set(error, EINVAL,
2512                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2513                                           "multiple L4 layers not supported");
2514         if (!mask)
2515                 mask = &rte_flow_item_udp_mask;
2516         ret = mlx5_flow_item_acceptable
2517                 (item, (const uint8_t *)mask,
2518                  (const uint8_t *)&rte_flow_item_udp_mask,
2519                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2520                  error);
2521         if (ret < 0)
2522                 return ret;
2523         return 0;
2524 }
2525
2526 /**
2527  * Validate TCP item.
2528  *
2529  * @param[in] item
2530  *   Item specification.
2531  * @param[in] item_flags
2532  *   Bit-fields that holds the items detected until now.
2533  * @param[in] target_protocol
2534  *   The next protocol in the previous item.
2535  * @param[out] error
2536  *   Pointer to error structure.
2537  *
2538  * @return
2539  *   0 on success, a negative errno value otherwise and rte_errno is set.
2540  */
2541 int
2542 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2543                             uint64_t item_flags,
2544                             uint8_t target_protocol,
2545                             const struct rte_flow_item_tcp *flow_mask,
2546                             struct rte_flow_error *error)
2547 {
2548         const struct rte_flow_item_tcp *mask = item->mask;
2549         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2550         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2551                                       MLX5_FLOW_LAYER_OUTER_L3;
2552         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2553                                       MLX5_FLOW_LAYER_OUTER_L4;
2554         int ret;
2555
2556         MLX5_ASSERT(flow_mask);
2557         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2558                 return rte_flow_error_set(error, EINVAL,
2559                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2560                                           "protocol filtering not compatible"
2561                                           " with TCP layer");
2562         if (!(item_flags & l3m))
2563                 return rte_flow_error_set(error, EINVAL,
2564                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2565                                           "L3 is mandatory to filter on L4");
2566         if (item_flags & l4m)
2567                 return rte_flow_error_set(error, EINVAL,
2568                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2569                                           "multiple L4 layers not supported");
2570         if (!mask)
2571                 mask = &rte_flow_item_tcp_mask;
2572         ret = mlx5_flow_item_acceptable
2573                 (item, (const uint8_t *)mask,
2574                  (const uint8_t *)flow_mask,
2575                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2576                  error);
2577         if (ret < 0)
2578                 return ret;
2579         return 0;
2580 }
2581
2582 /**
2583  * Validate VXLAN item.
2584  *
2585  * @param[in] dev
2586  *   Pointer to the Ethernet device structure.
2587  * @param[in] udp_dport
2588  *   UDP destination port
2589  * @param[in] item
2590  *   Item specification.
2591  * @param[in] item_flags
2592  *   Bit-fields that holds the items detected until now.
2593  * @param[in] attr
2594  *   Flow rule attributes.
2595  * @param[out] error
2596  *   Pointer to error structure.
2597  *
2598  * @return
2599  *   0 on success, a negative errno value otherwise and rte_errno is set.
2600  */
2601 int
2602 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2603                               uint16_t udp_dport,
2604                               const struct rte_flow_item *item,
2605                               uint64_t item_flags,
2606                               const struct rte_flow_attr *attr,
2607                               struct rte_flow_error *error)
2608 {
2609         const struct rte_flow_item_vxlan *spec = item->spec;
2610         const struct rte_flow_item_vxlan *mask = item->mask;
2611         int ret;
2612         struct mlx5_priv *priv = dev->data->dev_private;
2613         union vni {
2614                 uint32_t vlan_id;
2615                 uint8_t vni[4];
2616         } id = { .vlan_id = 0, };
2617         const struct rte_flow_item_vxlan nic_mask = {
2618                 .vni = "\xff\xff\xff",
2619                 .rsvd1 = 0xff,
2620         };
2621         const struct rte_flow_item_vxlan *valid_mask;
2622
2623         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2624                 return rte_flow_error_set(error, ENOTSUP,
2625                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2626                                           "multiple tunnel layers not"
2627                                           " supported");
2628         valid_mask = &rte_flow_item_vxlan_mask;
2629         /*
2630          * Verify only UDPv4 is present as defined in
2631          * https://tools.ietf.org/html/rfc7348
2632          */
2633         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2634                 return rte_flow_error_set(error, EINVAL,
2635                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2636                                           "no outer UDP layer found");
2637         if (!mask)
2638                 mask = &rte_flow_item_vxlan_mask;
2639
2640         if (priv->sh->steering_format_version !=
2641             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 ||
2642             !udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN) {
2643                 /* FDB domain & NIC domain non-zero group */
2644                 if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2645                         valid_mask = &nic_mask;
2646                 /* Group zero in NIC domain */
2647                 if (!attr->group && !attr->transfer &&
2648                     priv->sh->tunnel_header_0_1)
2649                         valid_mask = &nic_mask;
2650         }
2651         ret = mlx5_flow_item_acceptable
2652                 (item, (const uint8_t *)mask,
2653                  (const uint8_t *)valid_mask,
2654                  sizeof(struct rte_flow_item_vxlan),
2655                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2656         if (ret < 0)
2657                 return ret;
2658         if (spec) {
2659                 memcpy(&id.vni[1], spec->vni, 3);
2660                 memcpy(&id.vni[1], mask->vni, 3);
2661         }
2662         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2663                 return rte_flow_error_set(error, ENOTSUP,
2664                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2665                                           "VXLAN tunnel must be fully defined");
2666         return 0;
2667 }
2668
2669 /**
2670  * Validate VXLAN_GPE item.
2671  *
2672  * @param[in] item
2673  *   Item specification.
2674  * @param[in] item_flags
2675  *   Bit-fields that holds the items detected until now.
2676  * @param[in] priv
2677  *   Pointer to the private data structure.
2678  * @param[in] target_protocol
2679  *   The next protocol in the previous item.
2680  * @param[out] error
2681  *   Pointer to error structure.
2682  *
2683  * @return
2684  *   0 on success, a negative errno value otherwise and rte_errno is set.
2685  */
2686 int
2687 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2688                                   uint64_t item_flags,
2689                                   struct rte_eth_dev *dev,
2690                                   struct rte_flow_error *error)
2691 {
2692         struct mlx5_priv *priv = dev->data->dev_private;
2693         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2694         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2695         int ret;
2696         union vni {
2697                 uint32_t vlan_id;
2698                 uint8_t vni[4];
2699         } id = { .vlan_id = 0, };
2700
2701         if (!priv->config.l3_vxlan_en)
2702                 return rte_flow_error_set(error, ENOTSUP,
2703                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2704                                           "L3 VXLAN is not enabled by device"
2705                                           " parameter and/or not configured in"
2706                                           " firmware");
2707         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2708                 return rte_flow_error_set(error, ENOTSUP,
2709                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2710                                           "multiple tunnel layers not"
2711                                           " supported");
2712         /*
2713          * Verify only UDPv4 is present as defined in
2714          * https://tools.ietf.org/html/rfc7348
2715          */
2716         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2717                 return rte_flow_error_set(error, EINVAL,
2718                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2719                                           "no outer UDP layer found");
2720         if (!mask)
2721                 mask = &rte_flow_item_vxlan_gpe_mask;
2722         ret = mlx5_flow_item_acceptable
2723                 (item, (const uint8_t *)mask,
2724                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2725                  sizeof(struct rte_flow_item_vxlan_gpe),
2726                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2727         if (ret < 0)
2728                 return ret;
2729         if (spec) {
2730                 if (spec->protocol)
2731                         return rte_flow_error_set(error, ENOTSUP,
2732                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2733                                                   item,
2734                                                   "VxLAN-GPE protocol"
2735                                                   " not supported");
2736                 memcpy(&id.vni[1], spec->vni, 3);
2737                 memcpy(&id.vni[1], mask->vni, 3);
2738         }
2739         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2740                 return rte_flow_error_set(error, ENOTSUP,
2741                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2742                                           "VXLAN-GPE tunnel must be fully"
2743                                           " defined");
2744         return 0;
2745 }
2746 /**
2747  * Validate GRE Key item.
2748  *
2749  * @param[in] item
2750  *   Item specification.
2751  * @param[in] item_flags
2752  *   Bit flags to mark detected items.
2753  * @param[in] gre_item
2754  *   Pointer to gre_item
2755  * @param[out] error
2756  *   Pointer to error structure.
2757  *
2758  * @return
2759  *   0 on success, a negative errno value otherwise and rte_errno is set.
2760  */
2761 int
2762 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2763                                 uint64_t item_flags,
2764                                 const struct rte_flow_item *gre_item,
2765                                 struct rte_flow_error *error)
2766 {
2767         const rte_be32_t *mask = item->mask;
2768         int ret = 0;
2769         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2770         const struct rte_flow_item_gre *gre_spec;
2771         const struct rte_flow_item_gre *gre_mask;
2772
2773         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2774                 return rte_flow_error_set(error, ENOTSUP,
2775                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2776                                           "Multiple GRE key not support");
2777         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2778                 return rte_flow_error_set(error, ENOTSUP,
2779                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2780                                           "No preceding GRE header");
2781         if (item_flags & MLX5_FLOW_LAYER_INNER)
2782                 return rte_flow_error_set(error, ENOTSUP,
2783                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2784                                           "GRE key following a wrong item");
2785         gre_mask = gre_item->mask;
2786         if (!gre_mask)
2787                 gre_mask = &rte_flow_item_gre_mask;
2788         gre_spec = gre_item->spec;
2789         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2790                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2791                 return rte_flow_error_set(error, EINVAL,
2792                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2793                                           "Key bit must be on");
2794
2795         if (!mask)
2796                 mask = &gre_key_default_mask;
2797         ret = mlx5_flow_item_acceptable
2798                 (item, (const uint8_t *)mask,
2799                  (const uint8_t *)&gre_key_default_mask,
2800                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2801         return ret;
2802 }
2803
2804 /**
2805  * Validate GRE item.
2806  *
2807  * @param[in] item
2808  *   Item specification.
2809  * @param[in] item_flags
2810  *   Bit flags to mark detected items.
2811  * @param[in] target_protocol
2812  *   The next protocol in the previous item.
2813  * @param[out] error
2814  *   Pointer to error structure.
2815  *
2816  * @return
2817  *   0 on success, a negative errno value otherwise and rte_errno is set.
2818  */
2819 int
2820 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2821                             uint64_t item_flags,
2822                             uint8_t target_protocol,
2823                             struct rte_flow_error *error)
2824 {
2825         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2826         const struct rte_flow_item_gre *mask = item->mask;
2827         int ret;
2828         const struct rte_flow_item_gre nic_mask = {
2829                 .c_rsvd0_ver = RTE_BE16(0xB000),
2830                 .protocol = RTE_BE16(UINT16_MAX),
2831         };
2832
2833         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2834                 return rte_flow_error_set(error, EINVAL,
2835                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2836                                           "protocol filtering not compatible"
2837                                           " with this GRE layer");
2838         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2839                 return rte_flow_error_set(error, ENOTSUP,
2840                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2841                                           "multiple tunnel layers not"
2842                                           " supported");
2843         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2844                 return rte_flow_error_set(error, ENOTSUP,
2845                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2846                                           "L3 Layer is missing");
2847         if (!mask)
2848                 mask = &rte_flow_item_gre_mask;
2849         ret = mlx5_flow_item_acceptable
2850                 (item, (const uint8_t *)mask,
2851                  (const uint8_t *)&nic_mask,
2852                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2853                  error);
2854         if (ret < 0)
2855                 return ret;
2856 #ifndef HAVE_MLX5DV_DR
2857 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2858         if (spec && (spec->protocol & mask->protocol))
2859                 return rte_flow_error_set(error, ENOTSUP,
2860                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2861                                           "without MPLS support the"
2862                                           " specification cannot be used for"
2863                                           " filtering");
2864 #endif
2865 #endif
2866         return 0;
2867 }
2868
2869 /**
2870  * Validate Geneve item.
2871  *
2872  * @param[in] item
2873  *   Item specification.
2874  * @param[in] itemFlags
2875  *   Bit-fields that holds the items detected until now.
2876  * @param[in] enPriv
2877  *   Pointer to the private data structure.
2878  * @param[out] error
2879  *   Pointer to error structure.
2880  *
2881  * @return
2882  *   0 on success, a negative errno value otherwise and rte_errno is set.
2883  */
2884
2885 int
2886 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2887                                uint64_t item_flags,
2888                                struct rte_eth_dev *dev,
2889                                struct rte_flow_error *error)
2890 {
2891         struct mlx5_priv *priv = dev->data->dev_private;
2892         const struct rte_flow_item_geneve *spec = item->spec;
2893         const struct rte_flow_item_geneve *mask = item->mask;
2894         int ret;
2895         uint16_t gbhdr;
2896         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2897                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2898         const struct rte_flow_item_geneve nic_mask = {
2899                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2900                 .vni = "\xff\xff\xff",
2901                 .protocol = RTE_BE16(UINT16_MAX),
2902         };
2903
2904         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2905                 return rte_flow_error_set(error, ENOTSUP,
2906                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2907                                           "L3 Geneve is not enabled by device"
2908                                           " parameter and/or not configured in"
2909                                           " firmware");
2910         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2911                 return rte_flow_error_set(error, ENOTSUP,
2912                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2913                                           "multiple tunnel layers not"
2914                                           " supported");
2915         /*
2916          * Verify only UDPv4 is present as defined in
2917          * https://tools.ietf.org/html/rfc7348
2918          */
2919         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2920                 return rte_flow_error_set(error, EINVAL,
2921                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2922                                           "no outer UDP layer found");
2923         if (!mask)
2924                 mask = &rte_flow_item_geneve_mask;
2925         ret = mlx5_flow_item_acceptable
2926                                   (item, (const uint8_t *)mask,
2927                                    (const uint8_t *)&nic_mask,
2928                                    sizeof(struct rte_flow_item_geneve),
2929                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2930         if (ret)
2931                 return ret;
2932         if (spec) {
2933                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2934                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2935                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2936                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2937                         return rte_flow_error_set(error, ENOTSUP,
2938                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2939                                                   item,
2940                                                   "Geneve protocol unsupported"
2941                                                   " fields are being used");
2942                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2943                         return rte_flow_error_set
2944                                         (error, ENOTSUP,
2945                                          RTE_FLOW_ERROR_TYPE_ITEM,
2946                                          item,
2947                                          "Unsupported Geneve options length");
2948         }
2949         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2950                 return rte_flow_error_set
2951                                     (error, ENOTSUP,
2952                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2953                                      "Geneve tunnel must be fully defined");
2954         return 0;
2955 }
2956
2957 /**
2958  * Validate Geneve TLV option item.
2959  *
2960  * @param[in] item
2961  *   Item specification.
2962  * @param[in] last_item
2963  *   Previous validated item in the pattern items.
2964  * @param[in] geneve_item
2965  *   Previous GENEVE item specification.
2966  * @param[in] dev
2967  *   Pointer to the rte_eth_dev structure.
2968  * @param[out] error
2969  *   Pointer to error structure.
2970  *
2971  * @return
2972  *   0 on success, a negative errno value otherwise and rte_errno is set.
2973  */
2974 int
2975 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2976                                    uint64_t last_item,
2977                                    const struct rte_flow_item *geneve_item,
2978                                    struct rte_eth_dev *dev,
2979                                    struct rte_flow_error *error)
2980 {
2981         struct mlx5_priv *priv = dev->data->dev_private;
2982         struct mlx5_dev_ctx_shared *sh = priv->sh;
2983         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2984         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2985         uint8_t data_max_supported =
2986                         hca_attr->max_geneve_tlv_option_data_len * 4;
2987         struct mlx5_dev_config *config = &priv->config;
2988         const struct rte_flow_item_geneve *geneve_spec;
2989         const struct rte_flow_item_geneve *geneve_mask;
2990         const struct rte_flow_item_geneve_opt *spec = item->spec;
2991         const struct rte_flow_item_geneve_opt *mask = item->mask;
2992         unsigned int i;
2993         unsigned int data_len;
2994         uint8_t tlv_option_len;
2995         uint16_t optlen_m, optlen_v;
2996         const struct rte_flow_item_geneve_opt full_mask = {
2997                 .option_class = RTE_BE16(0xffff),
2998                 .option_type = 0xff,
2999                 .option_len = 0x1f,
3000         };
3001
3002         if (!mask)
3003                 mask = &rte_flow_item_geneve_opt_mask;
3004         if (!spec)
3005                 return rte_flow_error_set
3006                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3007                         "Geneve TLV opt class/type/length must be specified");
3008         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
3009                 return rte_flow_error_set
3010                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3011                         "Geneve TLV opt length exceeeds the limit (31)");
3012         /* Check if class type and length masks are full. */
3013         if (full_mask.option_class != mask->option_class ||
3014             full_mask.option_type != mask->option_type ||
3015             full_mask.option_len != (mask->option_len & full_mask.option_len))
3016                 return rte_flow_error_set
3017                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3018                         "Geneve TLV opt class/type/length masks must be full");
3019         /* Check if length is supported */
3020         if ((uint32_t)spec->option_len >
3021                         config->hca_attr.max_geneve_tlv_option_data_len)
3022                 return rte_flow_error_set
3023                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3024                         "Geneve TLV opt length not supported");
3025         if (config->hca_attr.max_geneve_tlv_options > 1)
3026                 DRV_LOG(DEBUG,
3027                         "max_geneve_tlv_options supports more than 1 option");
3028         /* Check GENEVE item preceding. */
3029         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
3030                 return rte_flow_error_set
3031                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3032                         "Geneve opt item must be preceded with Geneve item");
3033         geneve_spec = geneve_item->spec;
3034         geneve_mask = geneve_item->mask ? geneve_item->mask :
3035                                           &rte_flow_item_geneve_mask;
3036         /* Check if GENEVE TLV option size doesn't exceed option length */
3037         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
3038                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
3039                 tlv_option_len = spec->option_len & mask->option_len;
3040                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
3041                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
3042                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
3043                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
3044                 if ((optlen_v & optlen_m) <= tlv_option_len)
3045                         return rte_flow_error_set
3046                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3047                                  "GENEVE TLV option length exceeds optlen");
3048         }
3049         /* Check if length is 0 or data is 0. */
3050         if (spec->data == NULL || spec->option_len == 0)
3051                 return rte_flow_error_set
3052                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3053                         "Geneve TLV opt with zero data/length not supported");
3054         /* Check not all data & mask are 0. */
3055         data_len = spec->option_len * 4;
3056         if (mask->data == NULL) {
3057                 for (i = 0; i < data_len; i++)
3058                         if (spec->data[i])
3059                                 break;
3060                 if (i == data_len)
3061                         return rte_flow_error_set(error, ENOTSUP,
3062                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3063                                 "Can't match on Geneve option data 0");
3064         } else {
3065                 for (i = 0; i < data_len; i++)
3066                         if (spec->data[i] & mask->data[i])
3067                                 break;
3068                 if (i == data_len)
3069                         return rte_flow_error_set(error, ENOTSUP,
3070                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3071                                 "Can't match on Geneve option data and mask 0");
3072                 /* Check data mask supported. */
3073                 for (i = data_max_supported; i < data_len ; i++)
3074                         if (mask->data[i])
3075                                 return rte_flow_error_set(error, ENOTSUP,
3076                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
3077                                         "Data mask is of unsupported size");
3078         }
3079         /* Check GENEVE option is supported in NIC. */
3080         if (!config->hca_attr.geneve_tlv_opt)
3081                 return rte_flow_error_set
3082                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3083                         "Geneve TLV opt not supported");
3084         /* Check if we already have geneve option with different type/class. */
3085         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
3086         geneve_opt_resource = sh->geneve_tlv_option_resource;
3087         if (geneve_opt_resource != NULL)
3088                 if (geneve_opt_resource->option_class != spec->option_class ||
3089                     geneve_opt_resource->option_type != spec->option_type ||
3090                     geneve_opt_resource->length != spec->option_len) {
3091                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3092                         return rte_flow_error_set(error, ENOTSUP,
3093                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3094                                 "Only one Geneve TLV option supported");
3095                 }
3096         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3097         return 0;
3098 }
3099
3100 /**
3101  * Validate MPLS item.
3102  *
3103  * @param[in] dev
3104  *   Pointer to the rte_eth_dev structure.
3105  * @param[in] item
3106  *   Item specification.
3107  * @param[in] item_flags
3108  *   Bit-fields that holds the items detected until now.
3109  * @param[in] prev_layer
3110  *   The protocol layer indicated in previous item.
3111  * @param[out] error
3112  *   Pointer to error structure.
3113  *
3114  * @return
3115  *   0 on success, a negative errno value otherwise and rte_errno is set.
3116  */
3117 int
3118 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
3119                              const struct rte_flow_item *item __rte_unused,
3120                              uint64_t item_flags __rte_unused,
3121                              uint64_t prev_layer __rte_unused,
3122                              struct rte_flow_error *error)
3123 {
3124 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
3125         const struct rte_flow_item_mpls *mask = item->mask;
3126         struct mlx5_priv *priv = dev->data->dev_private;
3127         int ret;
3128
3129         if (!priv->config.mpls_en)
3130                 return rte_flow_error_set(error, ENOTSUP,
3131                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3132                                           "MPLS not supported or"
3133                                           " disabled in firmware"
3134                                           " configuration.");
3135         /* MPLS over UDP, GRE is allowed */
3136         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
3137                             MLX5_FLOW_LAYER_GRE |
3138                             MLX5_FLOW_LAYER_GRE_KEY)))
3139                 return rte_flow_error_set(error, EINVAL,
3140                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3141                                           "protocol filtering not compatible"
3142                                           " with MPLS layer");
3143         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
3144         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
3145             !(item_flags & MLX5_FLOW_LAYER_GRE))
3146                 return rte_flow_error_set(error, ENOTSUP,
3147                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3148                                           "multiple tunnel layers not"
3149                                           " supported");
3150         if (!mask)
3151                 mask = &rte_flow_item_mpls_mask;
3152         ret = mlx5_flow_item_acceptable
3153                 (item, (const uint8_t *)mask,
3154                  (const uint8_t *)&rte_flow_item_mpls_mask,
3155                  sizeof(struct rte_flow_item_mpls),
3156                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3157         if (ret < 0)
3158                 return ret;
3159         return 0;
3160 #else
3161         return rte_flow_error_set(error, ENOTSUP,
3162                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
3163                                   "MPLS is not supported by Verbs, please"
3164                                   " update.");
3165 #endif
3166 }
3167
3168 /**
3169  * Validate NVGRE item.
3170  *
3171  * @param[in] item
3172  *   Item specification.
3173  * @param[in] item_flags
3174  *   Bit flags to mark detected items.
3175  * @param[in] target_protocol
3176  *   The next protocol in the previous item.
3177  * @param[out] error
3178  *   Pointer to error structure.
3179  *
3180  * @return
3181  *   0 on success, a negative errno value otherwise and rte_errno is set.
3182  */
3183 int
3184 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3185                               uint64_t item_flags,
3186                               uint8_t target_protocol,
3187                               struct rte_flow_error *error)
3188 {
3189         const struct rte_flow_item_nvgre *mask = item->mask;
3190         int ret;
3191
3192         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3193                 return rte_flow_error_set(error, EINVAL,
3194                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3195                                           "protocol filtering not compatible"
3196                                           " with this GRE layer");
3197         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3198                 return rte_flow_error_set(error, ENOTSUP,
3199                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3200                                           "multiple tunnel layers not"
3201                                           " supported");
3202         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3203                 return rte_flow_error_set(error, ENOTSUP,
3204                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3205                                           "L3 Layer is missing");
3206         if (!mask)
3207                 mask = &rte_flow_item_nvgre_mask;
3208         ret = mlx5_flow_item_acceptable
3209                 (item, (const uint8_t *)mask,
3210                  (const uint8_t *)&rte_flow_item_nvgre_mask,
3211                  sizeof(struct rte_flow_item_nvgre),
3212                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3213         if (ret < 0)
3214                 return ret;
3215         return 0;
3216 }
3217
3218 /**
3219  * Validate eCPRI item.
3220  *
3221  * @param[in] item
3222  *   Item specification.
3223  * @param[in] item_flags
3224  *   Bit-fields that holds the items detected until now.
3225  * @param[in] last_item
3226  *   Previous validated item in the pattern items.
3227  * @param[in] ether_type
3228  *   Type in the ethernet layer header (including dot1q).
3229  * @param[in] acc_mask
3230  *   Acceptable mask, if NULL default internal default mask
3231  *   will be used to check whether item fields are supported.
3232  * @param[out] error
3233  *   Pointer to error structure.
3234  *
3235  * @return
3236  *   0 on success, a negative errno value otherwise and rte_errno is set.
3237  */
3238 int
3239 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3240                               uint64_t item_flags,
3241                               uint64_t last_item,
3242                               uint16_t ether_type,
3243                               const struct rte_flow_item_ecpri *acc_mask,
3244                               struct rte_flow_error *error)
3245 {
3246         const struct rte_flow_item_ecpri *mask = item->mask;
3247         const struct rte_flow_item_ecpri nic_mask = {
3248                 .hdr = {
3249                         .common = {
3250                                 .u32 =
3251                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3252                                         .type = 0xFF,
3253                                         }).u32),
3254                         },
3255                         .dummy[0] = 0xFFFFFFFF,
3256                 },
3257         };
3258         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3259                                         MLX5_FLOW_LAYER_OUTER_VLAN);
3260         struct rte_flow_item_ecpri mask_lo;
3261
3262         if (!(last_item & outer_l2_vlan) &&
3263             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3264                 return rte_flow_error_set(error, EINVAL,
3265                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3266                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
3267         if ((last_item & outer_l2_vlan) && ether_type &&
3268             ether_type != RTE_ETHER_TYPE_ECPRI)
3269                 return rte_flow_error_set(error, EINVAL,
3270                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3271                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3272         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3273                 return rte_flow_error_set(error, EINVAL,
3274                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3275                                           "eCPRI with tunnel is not supported right now");
3276         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3277                 return rte_flow_error_set(error, ENOTSUP,
3278                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3279                                           "multiple L3 layers not supported");
3280         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3281                 return rte_flow_error_set(error, EINVAL,
3282                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3283                                           "eCPRI cannot coexist with a TCP layer");
3284         /* In specification, eCPRI could be over UDP layer. */
3285         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3286                 return rte_flow_error_set(error, EINVAL,
3287                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3288                                           "eCPRI over UDP layer is not yet supported right now");
3289         /* Mask for type field in common header could be zero. */
3290         if (!mask)
3291                 mask = &rte_flow_item_ecpri_mask;
3292         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3293         /* Input mask is in big-endian format. */
3294         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3295                 return rte_flow_error_set(error, EINVAL,
3296                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3297                                           "partial mask is not supported for protocol");
3298         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3299                 return rte_flow_error_set(error, EINVAL,
3300                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3301                                           "message header mask must be after a type mask");
3302         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3303                                          acc_mask ? (const uint8_t *)acc_mask
3304                                                   : (const uint8_t *)&nic_mask,
3305                                          sizeof(struct rte_flow_item_ecpri),
3306                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3307 }
3308
3309 static int
3310 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3311                    const struct rte_flow_attr *attr __rte_unused,
3312                    const struct rte_flow_item items[] __rte_unused,
3313                    const struct rte_flow_action actions[] __rte_unused,
3314                    bool external __rte_unused,
3315                    int hairpin __rte_unused,
3316                    struct rte_flow_error *error)
3317 {
3318         return rte_flow_error_set(error, ENOTSUP,
3319                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3320 }
3321
3322 static struct mlx5_flow *
3323 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3324                   const struct rte_flow_attr *attr __rte_unused,
3325                   const struct rte_flow_item items[] __rte_unused,
3326                   const struct rte_flow_action actions[] __rte_unused,
3327                   struct rte_flow_error *error)
3328 {
3329         rte_flow_error_set(error, ENOTSUP,
3330                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3331         return NULL;
3332 }
3333
3334 static int
3335 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3336                     struct mlx5_flow *dev_flow __rte_unused,
3337                     const struct rte_flow_attr *attr __rte_unused,
3338                     const struct rte_flow_item items[] __rte_unused,
3339                     const struct rte_flow_action actions[] __rte_unused,
3340                     struct rte_flow_error *error)
3341 {
3342         return rte_flow_error_set(error, ENOTSUP,
3343                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3344 }
3345
3346 static int
3347 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3348                 struct rte_flow *flow __rte_unused,
3349                 struct rte_flow_error *error)
3350 {
3351         return rte_flow_error_set(error, ENOTSUP,
3352                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3353 }
3354
3355 static void
3356 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3357                  struct rte_flow *flow __rte_unused)
3358 {
3359 }
3360
3361 static void
3362 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3363                   struct rte_flow *flow __rte_unused)
3364 {
3365 }
3366
3367 static int
3368 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3369                 struct rte_flow *flow __rte_unused,
3370                 const struct rte_flow_action *actions __rte_unused,
3371                 void *data __rte_unused,
3372                 struct rte_flow_error *error)
3373 {
3374         return rte_flow_error_set(error, ENOTSUP,
3375                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3376 }
3377
3378 static int
3379 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3380                       uint32_t domains __rte_unused,
3381                       uint32_t flags __rte_unused)
3382 {
3383         return 0;
3384 }
3385
3386 /* Void driver to protect from null pointer reference. */
3387 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3388         .validate = flow_null_validate,
3389         .prepare = flow_null_prepare,
3390         .translate = flow_null_translate,
3391         .apply = flow_null_apply,
3392         .remove = flow_null_remove,
3393         .destroy = flow_null_destroy,
3394         .query = flow_null_query,
3395         .sync_domain = flow_null_sync_domain,
3396 };
3397
3398 /**
3399  * Select flow driver type according to flow attributes and device
3400  * configuration.
3401  *
3402  * @param[in] dev
3403  *   Pointer to the dev structure.
3404  * @param[in] attr
3405  *   Pointer to the flow attributes.
3406  *
3407  * @return
3408  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3409  */
3410 static enum mlx5_flow_drv_type
3411 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3412 {
3413         struct mlx5_priv *priv = dev->data->dev_private;
3414         /* The OS can determine first a specific flow type (DV, VERBS) */
3415         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3416
3417         if (type != MLX5_FLOW_TYPE_MAX)
3418                 return type;
3419         /* If no OS specific type - continue with DV/VERBS selection */
3420         if (attr->transfer && priv->config.dv_esw_en)
3421                 type = MLX5_FLOW_TYPE_DV;
3422         if (!attr->transfer)
3423                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3424                                                  MLX5_FLOW_TYPE_VERBS;
3425         return type;
3426 }
3427
3428 #define flow_get_drv_ops(type) flow_drv_ops[type]
3429
3430 /**
3431  * Flow driver validation API. This abstracts calling driver specific functions.
3432  * The type of flow driver is determined according to flow attributes.
3433  *
3434  * @param[in] dev
3435  *   Pointer to the dev structure.
3436  * @param[in] attr
3437  *   Pointer to the flow attributes.
3438  * @param[in] items
3439  *   Pointer to the list of items.
3440  * @param[in] actions
3441  *   Pointer to the list of actions.
3442  * @param[in] external
3443  *   This flow rule is created by request external to PMD.
3444  * @param[in] hairpin
3445  *   Number of hairpin TX actions, 0 means classic flow.
3446  * @param[out] error
3447  *   Pointer to the error structure.
3448  *
3449  * @return
3450  *   0 on success, a negative errno value otherwise and rte_errno is set.
3451  */
3452 static inline int
3453 flow_drv_validate(struct rte_eth_dev *dev,
3454                   const struct rte_flow_attr *attr,
3455                   const struct rte_flow_item items[],
3456                   const struct rte_flow_action actions[],
3457                   bool external, int hairpin, struct rte_flow_error *error)
3458 {
3459         const struct mlx5_flow_driver_ops *fops;
3460         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3461
3462         fops = flow_get_drv_ops(type);
3463         return fops->validate(dev, attr, items, actions, external,
3464                               hairpin, error);
3465 }
3466
3467 /**
3468  * Flow driver preparation API. This abstracts calling driver specific
3469  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3470  * calculates the size of memory required for device flow, allocates the memory,
3471  * initializes the device flow and returns the pointer.
3472  *
3473  * @note
3474  *   This function initializes device flow structure such as dv or verbs in
3475  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3476  *   rest. For example, adding returning device flow to flow->dev_flow list and
3477  *   setting backward reference to the flow should be done out of this function.
3478  *   layers field is not filled either.
3479  *
3480  * @param[in] dev
3481  *   Pointer to the dev structure.
3482  * @param[in] attr
3483  *   Pointer to the flow attributes.
3484  * @param[in] items
3485  *   Pointer to the list of items.
3486  * @param[in] actions
3487  *   Pointer to the list of actions.
3488  * @param[in] flow_idx
3489  *   This memory pool index to the flow.
3490  * @param[out] error
3491  *   Pointer to the error structure.
3492  *
3493  * @return
3494  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3495  */
3496 static inline struct mlx5_flow *
3497 flow_drv_prepare(struct rte_eth_dev *dev,
3498                  const struct rte_flow *flow,
3499                  const struct rte_flow_attr *attr,
3500                  const struct rte_flow_item items[],
3501                  const struct rte_flow_action actions[],
3502                  uint32_t flow_idx,
3503                  struct rte_flow_error *error)
3504 {
3505         const struct mlx5_flow_driver_ops *fops;
3506         enum mlx5_flow_drv_type type = flow->drv_type;
3507         struct mlx5_flow *mlx5_flow = NULL;
3508
3509         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3510         fops = flow_get_drv_ops(type);
3511         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3512         if (mlx5_flow)
3513                 mlx5_flow->flow_idx = flow_idx;
3514         return mlx5_flow;
3515 }
3516
3517 /**
3518  * Flow driver translation API. This abstracts calling driver specific
3519  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3520  * translates a generic flow into a driver flow. flow_drv_prepare() must
3521  * precede.
3522  *
3523  * @note
3524  *   dev_flow->layers could be filled as a result of parsing during translation
3525  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3526  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3527  *   flow->actions could be overwritten even though all the expanded dev_flows
3528  *   have the same actions.
3529  *
3530  * @param[in] dev
3531  *   Pointer to the rte dev structure.
3532  * @param[in, out] dev_flow
3533  *   Pointer to the mlx5 flow.
3534  * @param[in] attr
3535  *   Pointer to the flow attributes.
3536  * @param[in] items
3537  *   Pointer to the list of items.
3538  * @param[in] actions
3539  *   Pointer to the list of actions.
3540  * @param[out] error
3541  *   Pointer to the error structure.
3542  *
3543  * @return
3544  *   0 on success, a negative errno value otherwise and rte_errno is set.
3545  */
3546 static inline int
3547 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3548                    const struct rte_flow_attr *attr,
3549                    const struct rte_flow_item items[],
3550                    const struct rte_flow_action actions[],
3551                    struct rte_flow_error *error)
3552 {
3553         const struct mlx5_flow_driver_ops *fops;
3554         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3555
3556         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3557         fops = flow_get_drv_ops(type);
3558         return fops->translate(dev, dev_flow, attr, items, actions, error);
3559 }
3560
3561 /**
3562  * Flow driver apply API. This abstracts calling driver specific functions.
3563  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3564  * translated driver flows on to device. flow_drv_translate() must precede.
3565  *
3566  * @param[in] dev
3567  *   Pointer to Ethernet device structure.
3568  * @param[in, out] flow
3569  *   Pointer to flow structure.
3570  * @param[out] error
3571  *   Pointer to error structure.
3572  *
3573  * @return
3574  *   0 on success, a negative errno value otherwise and rte_errno is set.
3575  */
3576 static inline int
3577 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3578                struct rte_flow_error *error)
3579 {
3580         const struct mlx5_flow_driver_ops *fops;
3581         enum mlx5_flow_drv_type type = flow->drv_type;
3582
3583         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3584         fops = flow_get_drv_ops(type);
3585         return fops->apply(dev, flow, error);
3586 }
3587
3588 /**
3589  * Flow driver destroy API. This abstracts calling driver specific functions.
3590  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3591  * on device and releases resources of the flow.
3592  *
3593  * @param[in] dev
3594  *   Pointer to Ethernet device.
3595  * @param[in, out] flow
3596  *   Pointer to flow structure.
3597  */
3598 static inline void
3599 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3600 {
3601         const struct mlx5_flow_driver_ops *fops;
3602         enum mlx5_flow_drv_type type = flow->drv_type;
3603
3604         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3605         fops = flow_get_drv_ops(type);
3606         fops->destroy(dev, flow);
3607 }
3608
3609 /**
3610  * Flow driver find RSS policy tbl API. This abstracts calling driver
3611  * specific functions. Parent flow (rte_flow) should have driver
3612  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3613  *
3614  * @param[in] dev
3615  *   Pointer to Ethernet device.
3616  * @param[in, out] flow
3617  *   Pointer to flow structure.
3618  * @param[in] policy
3619  *   Pointer to meter policy table.
3620  * @param[in] rss_desc
3621  *   Pointer to rss_desc
3622  */
3623 static struct mlx5_flow_meter_sub_policy *
3624 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3625                 struct rte_flow *flow,
3626                 struct mlx5_flow_meter_policy *policy,
3627                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3628 {
3629         const struct mlx5_flow_driver_ops *fops;
3630         enum mlx5_flow_drv_type type = flow->drv_type;
3631
3632         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3633         fops = flow_get_drv_ops(type);
3634         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3635 }
3636
3637 /**
3638  * Flow driver color tag rule API. This abstracts calling driver
3639  * specific functions. Parent flow (rte_flow) should have driver
3640  * type (drv_type). It will create the color tag rules in hierarchy meter.
3641  *
3642  * @param[in] dev
3643  *   Pointer to Ethernet device.
3644  * @param[in, out] flow
3645  *   Pointer to flow structure.
3646  * @param[in] fm
3647  *   Pointer to flow meter structure.
3648  * @param[in] src_port
3649  *   The src port this extra rule should use.
3650  * @param[in] item
3651  *   The src port id match item.
3652  * @param[out] error
3653  *   Pointer to error structure.
3654  */
3655 static int
3656 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3657                 struct rte_flow *flow,
3658                 struct mlx5_flow_meter_info *fm,
3659                 int32_t src_port,
3660                 const struct rte_flow_item *item,
3661                 struct rte_flow_error *error)
3662 {
3663         const struct mlx5_flow_driver_ops *fops;
3664         enum mlx5_flow_drv_type type = flow->drv_type;
3665
3666         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3667         fops = flow_get_drv_ops(type);
3668         return fops->meter_hierarchy_rule_create(dev, fm,
3669                                                 src_port, item, error);
3670 }
3671
3672 /**
3673  * Get RSS action from the action list.
3674  *
3675  * @param[in] dev
3676  *   Pointer to Ethernet device.
3677  * @param[in] actions
3678  *   Pointer to the list of actions.
3679  * @param[in] flow
3680  *   Parent flow structure pointer.
3681  *
3682  * @return
3683  *   Pointer to the RSS action if exist, else return NULL.
3684  */
3685 static const struct rte_flow_action_rss*
3686 flow_get_rss_action(struct rte_eth_dev *dev,
3687                     const struct rte_flow_action actions[])
3688 {
3689         struct mlx5_priv *priv = dev->data->dev_private;
3690         const struct rte_flow_action_rss *rss = NULL;
3691         struct mlx5_meter_policy_action_container *acg;
3692         struct mlx5_meter_policy_action_container *acy;
3693
3694         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3695                 switch (actions->type) {
3696                 case RTE_FLOW_ACTION_TYPE_RSS:
3697                         rss = actions->conf;
3698                         break;
3699                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3700                 {
3701                         const struct rte_flow_action_sample *sample =
3702                                                                 actions->conf;
3703                         const struct rte_flow_action *act = sample->actions;
3704                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3705                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3706                                         rss = act->conf;
3707                         break;
3708                 }
3709                 case RTE_FLOW_ACTION_TYPE_METER:
3710                 {
3711                         uint32_t mtr_idx;
3712                         struct mlx5_flow_meter_info *fm;
3713                         struct mlx5_flow_meter_policy *policy;
3714                         const struct rte_flow_action_meter *mtr = actions->conf;
3715
3716                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3717                         if (fm && !fm->def_policy) {
3718                                 policy = mlx5_flow_meter_policy_find(dev,
3719                                                 fm->policy_id, NULL);
3720                                 MLX5_ASSERT(policy);
3721                                 if (policy->is_hierarchy) {
3722                                         policy =
3723                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3724                                                                         policy);
3725                                         if (!policy)
3726                                                 return NULL;
3727                                 }
3728                                 if (policy->is_rss) {
3729                                         acg =
3730                                         &policy->act_cnt[RTE_COLOR_GREEN];
3731                                         acy =
3732                                         &policy->act_cnt[RTE_COLOR_YELLOW];
3733                                         if (acg->fate_action ==
3734                                             MLX5_FLOW_FATE_SHARED_RSS)
3735                                                 rss = acg->rss->conf;
3736                                         else if (acy->fate_action ==
3737                                                  MLX5_FLOW_FATE_SHARED_RSS)
3738                                                 rss = acy->rss->conf;
3739                                 }
3740                         }
3741                         break;
3742                 }
3743                 default:
3744                         break;
3745                 }
3746         }
3747         return rss;
3748 }
3749
3750 /**
3751  * Get ASO age action by index.
3752  *
3753  * @param[in] dev
3754  *   Pointer to the Ethernet device structure.
3755  * @param[in] age_idx
3756  *   Index to the ASO age action.
3757  *
3758  * @return
3759  *   The specified ASO age action.
3760  */
3761 struct mlx5_aso_age_action*
3762 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3763 {
3764         uint16_t pool_idx = age_idx & UINT16_MAX;
3765         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3766         struct mlx5_priv *priv = dev->data->dev_private;
3767         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3768         struct mlx5_aso_age_pool *pool;
3769
3770         rte_rwlock_read_lock(&mng->resize_rwl);
3771         pool = mng->pools[pool_idx];
3772         rte_rwlock_read_unlock(&mng->resize_rwl);
3773         return &pool->actions[offset - 1];
3774 }
3775
3776 /* maps indirect action to translated direct in some actions array */
3777 struct mlx5_translated_action_handle {
3778         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3779         int index; /**< Index in related array of rte_flow_action. */
3780 };
3781
3782 /**
3783  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3784  * direct action if translation possible.
3785  * This functionality used to run same execution path for both direct and
3786  * indirect actions on flow create. All necessary preparations for indirect
3787  * action handling should be performed on *handle* actions list returned
3788  * from this call.
3789  *
3790  * @param[in] dev
3791  *   Pointer to Ethernet device.
3792  * @param[in] actions
3793  *   List of actions to translate.
3794  * @param[out] handle
3795  *   List to store translated indirect action object handles.
3796  * @param[in, out] indir_n
3797  *   Size of *handle* array. On return should be updated with number of
3798  *   indirect actions retrieved from the *actions* list.
3799  * @param[out] translated_actions
3800  *   List of actions where all indirect actions were translated to direct
3801  *   if possible. NULL if no translation took place.
3802  * @param[out] error
3803  *   Pointer to the error structure.
3804  *
3805  * @return
3806  *   0 on success, a negative errno value otherwise and rte_errno is set.
3807  */
3808 static int
3809 flow_action_handles_translate(struct rte_eth_dev *dev,
3810                               const struct rte_flow_action actions[],
3811                               struct mlx5_translated_action_handle *handle,
3812                               int *indir_n,
3813                               struct rte_flow_action **translated_actions,
3814                               struct rte_flow_error *error)
3815 {
3816         struct mlx5_priv *priv = dev->data->dev_private;
3817         struct rte_flow_action *translated = NULL;
3818         size_t actions_size;
3819         int n;
3820         int copied_n = 0;
3821         struct mlx5_translated_action_handle *handle_end = NULL;
3822
3823         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3824                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3825                         continue;
3826                 if (copied_n == *indir_n) {
3827                         return rte_flow_error_set
3828                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3829                                  NULL, "too many shared actions");
3830                 }
3831                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3832                            sizeof(actions[n].conf));
3833                 handle[copied_n].index = n;
3834                 copied_n++;
3835         }
3836         n++;
3837         *indir_n = copied_n;
3838         if (!copied_n)
3839                 return 0;
3840         actions_size = sizeof(struct rte_flow_action) * n;
3841         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3842         if (!translated) {
3843                 rte_errno = ENOMEM;
3844                 return -ENOMEM;
3845         }
3846         memcpy(translated, actions, actions_size);
3847         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3848                 struct mlx5_shared_action_rss *shared_rss;
3849                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3850                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3851                 uint32_t idx = act_idx &
3852                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3853
3854                 switch (type) {
3855                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3856                         shared_rss = mlx5_ipool_get
3857                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3858                         translated[handle->index].type =
3859                                 RTE_FLOW_ACTION_TYPE_RSS;
3860                         translated[handle->index].conf =
3861                                 &shared_rss->origin;
3862                         break;
3863                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3864                         translated[handle->index].type =
3865                                                 (enum rte_flow_action_type)
3866                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3867                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3868                         break;
3869                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3870                         if (priv->sh->flow_hit_aso_en) {
3871                                 translated[handle->index].type =
3872                                         (enum rte_flow_action_type)
3873                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3874                                 translated[handle->index].conf =
3875                                                          (void *)(uintptr_t)idx;
3876                                 break;
3877                         }
3878                         /* Fall-through */
3879                 case MLX5_INDIRECT_ACTION_TYPE_CT:
3880                         if (priv->sh->ct_aso_en) {
3881                                 translated[handle->index].type =
3882                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
3883                                 translated[handle->index].conf =
3884                                                          (void *)(uintptr_t)idx;
3885                                 break;
3886                         }
3887                         /* Fall-through */
3888                 default:
3889                         mlx5_free(translated);
3890                         return rte_flow_error_set
3891                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3892                                  NULL, "invalid indirect action type");
3893                 }
3894         }
3895         *translated_actions = translated;
3896         return 0;
3897 }
3898
3899 /**
3900  * Get Shared RSS action from the action list.
3901  *
3902  * @param[in] dev
3903  *   Pointer to Ethernet device.
3904  * @param[in] shared
3905  *   Pointer to the list of actions.
3906  * @param[in] shared_n
3907  *   Actions list length.
3908  *
3909  * @return
3910  *   The MLX5 RSS action ID if exists, otherwise return 0.
3911  */
3912 static uint32_t
3913 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3914                            struct mlx5_translated_action_handle *handle,
3915                            int shared_n)
3916 {
3917         struct mlx5_translated_action_handle *handle_end;
3918         struct mlx5_priv *priv = dev->data->dev_private;
3919         struct mlx5_shared_action_rss *shared_rss;
3920
3921
3922         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3923                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3924                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3925                 uint32_t idx = act_idx &
3926                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3927                 switch (type) {
3928                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3929                         shared_rss = mlx5_ipool_get
3930                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3931                                                                            idx);
3932                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3933                                            __ATOMIC_RELAXED);
3934                         return idx;
3935                 default:
3936                         break;
3937                 }
3938         }
3939         return 0;
3940 }
3941
3942 static unsigned int
3943 find_graph_root(uint32_t rss_level)
3944 {
3945         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3946                                MLX5_EXPANSION_ROOT_OUTER;
3947 }
3948
3949 /**
3950  *  Get layer flags from the prefix flow.
3951  *
3952  *  Some flows may be split to several subflows, the prefix subflow gets the
3953  *  match items and the suffix sub flow gets the actions.
3954  *  Some actions need the user defined match item flags to get the detail for
3955  *  the action.
3956  *  This function helps the suffix flow to get the item layer flags from prefix
3957  *  subflow.
3958  *
3959  * @param[in] dev_flow
3960  *   Pointer the created preifx subflow.
3961  *
3962  * @return
3963  *   The layers get from prefix subflow.
3964  */
3965 static inline uint64_t
3966 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3967 {
3968         uint64_t layers = 0;
3969
3970         /*
3971          * Layers bits could be localization, but usually the compiler will
3972          * help to do the optimization work for source code.
3973          * If no decap actions, use the layers directly.
3974          */
3975         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3976                 return dev_flow->handle->layers;
3977         /* Convert L3 layers with decap action. */
3978         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3979                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3980         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3981                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3982         /* Convert L4 layers with decap action.  */
3983         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3984                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3985         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3986                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3987         return layers;
3988 }
3989
3990 /**
3991  * Get metadata split action information.
3992  *
3993  * @param[in] actions
3994  *   Pointer to the list of actions.
3995  * @param[out] qrss
3996  *   Pointer to the return pointer.
3997  * @param[out] qrss_type
3998  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3999  *   if no QUEUE/RSS is found.
4000  * @param[out] encap_idx
4001  *   Pointer to the index of the encap action if exists, otherwise the last
4002  *   action index.
4003  *
4004  * @return
4005  *   Total number of actions.
4006  */
4007 static int
4008 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
4009                                        const struct rte_flow_action **qrss,
4010                                        int *encap_idx)
4011 {
4012         const struct rte_flow_action_raw_encap *raw_encap;
4013         int actions_n = 0;
4014         int raw_decap_idx = -1;
4015
4016         *encap_idx = -1;
4017         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4018                 switch (actions->type) {
4019                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4020                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4021                         *encap_idx = actions_n;
4022                         break;
4023                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4024                         raw_decap_idx = actions_n;
4025                         break;
4026                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4027                         raw_encap = actions->conf;
4028                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4029                                 *encap_idx = raw_decap_idx != -1 ?
4030                                                       raw_decap_idx : actions_n;
4031                         break;
4032                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4033                 case RTE_FLOW_ACTION_TYPE_RSS:
4034                         *qrss = actions;
4035                         break;
4036                 default:
4037                         break;
4038                 }
4039                 actions_n++;
4040         }
4041         if (*encap_idx == -1)
4042                 *encap_idx = actions_n;
4043         /* Count RTE_FLOW_ACTION_TYPE_END. */
4044         return actions_n + 1;
4045 }
4046
4047 /**
4048  * Check if the action will change packet.
4049  *
4050  * @param dev
4051  *   Pointer to Ethernet device.
4052  * @param[in] type
4053  *   action type.
4054  *
4055  * @return
4056  *   true if action will change packet, false otherwise.
4057  */
4058 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
4059                                           enum rte_flow_action_type type)
4060 {
4061         struct mlx5_priv *priv = dev->data->dev_private;
4062
4063         switch (type) {
4064         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4065         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4066         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4067         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4068         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4069         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4070         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4071         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4072         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4073         case RTE_FLOW_ACTION_TYPE_SET_TTL:
4074         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4075         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4076         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4077         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4078         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4079         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
4080         case RTE_FLOW_ACTION_TYPE_SET_META:
4081         case RTE_FLOW_ACTION_TYPE_SET_TAG:
4082         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4083         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4084         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4085         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4086         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4087         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4088         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4089         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4090         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4091         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4092         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
4093                 return true;
4094         case RTE_FLOW_ACTION_TYPE_FLAG:
4095         case RTE_FLOW_ACTION_TYPE_MARK:
4096                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
4097                         return true;
4098                 else
4099                         return false;
4100         default:
4101                 return false;
4102         }
4103 }
4104
4105 /**
4106  * Check meter action from the action list.
4107  *
4108  * @param dev
4109  *   Pointer to Ethernet device.
4110  * @param[in] actions
4111  *   Pointer to the list of actions.
4112  * @param[out] has_mtr
4113  *   Pointer to the meter exist flag.
4114  * @param[out] has_modify
4115  *   Pointer to the flag showing there's packet change action.
4116  * @param[out] meter_id
4117  *   Pointer to the meter id.
4118  *
4119  * @return
4120  *   Total number of actions.
4121  */
4122 static int
4123 flow_check_meter_action(struct rte_eth_dev *dev,
4124                         const struct rte_flow_action actions[],
4125                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
4126 {
4127         const struct rte_flow_action_meter *mtr = NULL;
4128         int actions_n = 0;
4129
4130         MLX5_ASSERT(has_mtr);
4131         *has_mtr = false;
4132         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4133                 switch (actions->type) {
4134                 case RTE_FLOW_ACTION_TYPE_METER:
4135                         mtr = actions->conf;
4136                         *meter_id = mtr->mtr_id;
4137                         *has_mtr = true;
4138                         break;
4139                 default:
4140                         break;
4141                 }
4142                 if (!*has_mtr)
4143                         *has_modify |= flow_check_modify_action_type(dev,
4144                                                                 actions->type);
4145                 actions_n++;
4146         }
4147         /* Count RTE_FLOW_ACTION_TYPE_END. */
4148         return actions_n + 1;
4149 }
4150
4151 /**
4152  * Check if the flow should be split due to hairpin.
4153  * The reason for the split is that in current HW we can't
4154  * support encap and push-vlan on Rx, so if a flow contains
4155  * these actions we move it to Tx.
4156  *
4157  * @param dev
4158  *   Pointer to Ethernet device.
4159  * @param[in] attr
4160  *   Flow rule attributes.
4161  * @param[in] actions
4162  *   Associated actions (list terminated by the END action).
4163  *
4164  * @return
4165  *   > 0 the number of actions and the flow should be split,
4166  *   0 when no split required.
4167  */
4168 static int
4169 flow_check_hairpin_split(struct rte_eth_dev *dev,
4170                          const struct rte_flow_attr *attr,
4171                          const struct rte_flow_action actions[])
4172 {
4173         int queue_action = 0;
4174         int action_n = 0;
4175         int split = 0;
4176         const struct rte_flow_action_queue *queue;
4177         const struct rte_flow_action_rss *rss;
4178         const struct rte_flow_action_raw_encap *raw_encap;
4179         const struct rte_eth_hairpin_conf *conf;
4180
4181         if (!attr->ingress)
4182                 return 0;
4183         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4184                 switch (actions->type) {
4185                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4186                         queue = actions->conf;
4187                         if (queue == NULL)
4188                                 return 0;
4189                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4190                         if (conf == NULL || conf->tx_explicit != 0)
4191                                 return 0;
4192                         queue_action = 1;
4193                         action_n++;
4194                         break;
4195                 case RTE_FLOW_ACTION_TYPE_RSS:
4196                         rss = actions->conf;
4197                         if (rss == NULL || rss->queue_num == 0)
4198                                 return 0;
4199                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4200                         if (conf == NULL || conf->tx_explicit != 0)
4201                                 return 0;
4202                         queue_action = 1;
4203                         action_n++;
4204                         break;
4205                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4206                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4207                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4208                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4209                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4210                         split++;
4211                         action_n++;
4212                         break;
4213                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4214                         raw_encap = actions->conf;
4215                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4216                                 split++;
4217                         action_n++;
4218                         break;
4219                 default:
4220                         action_n++;
4221                         break;
4222                 }
4223         }
4224         if (split && queue_action)
4225                 return action_n;
4226         return 0;
4227 }
4228
4229 /* Declare flow create/destroy prototype in advance. */
4230 static uint32_t
4231 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4232                  const struct rte_flow_attr *attr,
4233                  const struct rte_flow_item items[],
4234                  const struct rte_flow_action actions[],
4235                  bool external, struct rte_flow_error *error);
4236
4237 static void
4238 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4239                   uint32_t flow_idx);
4240
4241 int
4242 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4243                       struct mlx5_list_entry *entry, void *cb_ctx)
4244 {
4245         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4246         struct mlx5_flow_mreg_copy_resource *mcp_res =
4247                                container_of(entry, typeof(*mcp_res), hlist_ent);
4248
4249         return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4250 }
4251
4252 struct mlx5_list_entry *
4253 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4254 {
4255         struct rte_eth_dev *dev = tool_ctx;
4256         struct mlx5_priv *priv = dev->data->dev_private;
4257         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4258         struct mlx5_flow_mreg_copy_resource *mcp_res;
4259         struct rte_flow_error *error = ctx->error;
4260         uint32_t idx = 0;
4261         int ret;
4262         uint32_t mark_id = *(uint32_t *)(ctx->data);
4263         struct rte_flow_attr attr = {
4264                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4265                 .ingress = 1,
4266         };
4267         struct mlx5_rte_flow_item_tag tag_spec = {
4268                 .data = mark_id,
4269         };
4270         struct rte_flow_item items[] = {
4271                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4272         };
4273         struct rte_flow_action_mark ftag = {
4274                 .id = mark_id,
4275         };
4276         struct mlx5_flow_action_copy_mreg cp_mreg = {
4277                 .dst = REG_B,
4278                 .src = REG_NON,
4279         };
4280         struct rte_flow_action_jump jump = {
4281                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4282         };
4283         struct rte_flow_action actions[] = {
4284                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4285         };
4286
4287         /* Fill the register fileds in the flow. */
4288         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4289         if (ret < 0)
4290                 return NULL;
4291         tag_spec.id = ret;
4292         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4293         if (ret < 0)
4294                 return NULL;
4295         cp_mreg.src = ret;
4296         /* Provide the full width of FLAG specific value. */
4297         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4298                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4299         /* Build a new flow. */
4300         if (mark_id != MLX5_DEFAULT_COPY_ID) {
4301                 items[0] = (struct rte_flow_item){
4302                         .type = (enum rte_flow_item_type)
4303                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4304                         .spec = &tag_spec,
4305                 };
4306                 items[1] = (struct rte_flow_item){
4307                         .type = RTE_FLOW_ITEM_TYPE_END,
4308                 };
4309                 actions[0] = (struct rte_flow_action){
4310                         .type = (enum rte_flow_action_type)
4311                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4312                         .conf = &ftag,
4313                 };
4314                 actions[1] = (struct rte_flow_action){
4315                         .type = (enum rte_flow_action_type)
4316                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4317                         .conf = &cp_mreg,
4318                 };
4319                 actions[2] = (struct rte_flow_action){
4320                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4321                         .conf = &jump,
4322                 };
4323                 actions[3] = (struct rte_flow_action){
4324                         .type = RTE_FLOW_ACTION_TYPE_END,
4325                 };
4326         } else {
4327                 /* Default rule, wildcard match. */
4328                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4329                 items[0] = (struct rte_flow_item){
4330                         .type = RTE_FLOW_ITEM_TYPE_END,
4331                 };
4332                 actions[0] = (struct rte_flow_action){
4333                         .type = (enum rte_flow_action_type)
4334                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4335                         .conf = &cp_mreg,
4336                 };
4337                 actions[1] = (struct rte_flow_action){
4338                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4339                         .conf = &jump,
4340                 };
4341                 actions[2] = (struct rte_flow_action){
4342                         .type = RTE_FLOW_ACTION_TYPE_END,
4343                 };
4344         }
4345         /* Build a new entry. */
4346         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4347         if (!mcp_res) {
4348                 rte_errno = ENOMEM;
4349                 return NULL;
4350         }
4351         mcp_res->idx = idx;
4352         mcp_res->mark_id = mark_id;
4353         /*
4354          * The copy Flows are not included in any list. There
4355          * ones are referenced from other Flows and can not
4356          * be applied, removed, deleted in ardbitrary order
4357          * by list traversing.
4358          */
4359         mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4360                                         &attr, items, actions, false, error);
4361         if (!mcp_res->rix_flow) {
4362                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4363                 return NULL;
4364         }
4365         return &mcp_res->hlist_ent;
4366 }
4367
4368 struct mlx5_list_entry *
4369 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4370                       void *cb_ctx __rte_unused)
4371 {
4372         struct rte_eth_dev *dev = tool_ctx;
4373         struct mlx5_priv *priv = dev->data->dev_private;
4374         struct mlx5_flow_mreg_copy_resource *mcp_res;
4375         uint32_t idx = 0;
4376
4377         mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4378         if (!mcp_res) {
4379                 rte_errno = ENOMEM;
4380                 return NULL;
4381         }
4382         memcpy(mcp_res, oentry, sizeof(*mcp_res));
4383         mcp_res->idx = idx;
4384         return &mcp_res->hlist_ent;
4385 }
4386
4387 void
4388 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4389 {
4390         struct mlx5_flow_mreg_copy_resource *mcp_res =
4391                                container_of(entry, typeof(*mcp_res), hlist_ent);
4392         struct rte_eth_dev *dev = tool_ctx;
4393         struct mlx5_priv *priv = dev->data->dev_private;
4394
4395         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4396 }
4397
4398 /**
4399  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4400  *
4401  * As mark_id is unique, if there's already a registered flow for the mark_id,
4402  * return by increasing the reference counter of the resource. Otherwise, create
4403  * the resource (mcp_res) and flow.
4404  *
4405  * Flow looks like,
4406  *   - If ingress port is ANY and reg_c[1] is mark_id,
4407  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4408  *
4409  * For default flow (zero mark_id), flow is like,
4410  *   - If ingress port is ANY,
4411  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4412  *
4413  * @param dev
4414  *   Pointer to Ethernet device.
4415  * @param mark_id
4416  *   ID of MARK action, zero means default flow for META.
4417  * @param[out] error
4418  *   Perform verbose error reporting if not NULL.
4419  *
4420  * @return
4421  *   Associated resource on success, NULL otherwise and rte_errno is set.
4422  */
4423 static struct mlx5_flow_mreg_copy_resource *
4424 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4425                           struct rte_flow_error *error)
4426 {
4427         struct mlx5_priv *priv = dev->data->dev_private;
4428         struct mlx5_list_entry *entry;
4429         struct mlx5_flow_cb_ctx ctx = {
4430                 .dev = dev,
4431                 .error = error,
4432                 .data = &mark_id,
4433         };
4434
4435         /* Check if already registered. */
4436         MLX5_ASSERT(priv->mreg_cp_tbl);
4437         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4438         if (!entry)
4439                 return NULL;
4440         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4441                             hlist_ent);
4442 }
4443
4444 void
4445 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4446 {
4447         struct mlx5_flow_mreg_copy_resource *mcp_res =
4448                                container_of(entry, typeof(*mcp_res), hlist_ent);
4449         struct rte_eth_dev *dev = tool_ctx;
4450         struct mlx5_priv *priv = dev->data->dev_private;
4451
4452         MLX5_ASSERT(mcp_res->rix_flow);
4453         flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4454         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4455 }
4456
4457 /**
4458  * Release flow in RX_CP_TBL.
4459  *
4460  * @param dev
4461  *   Pointer to Ethernet device.
4462  * @flow
4463  *   Parent flow for wich copying is provided.
4464  */
4465 static void
4466 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4467                           struct rte_flow *flow)
4468 {
4469         struct mlx5_flow_mreg_copy_resource *mcp_res;
4470         struct mlx5_priv *priv = dev->data->dev_private;
4471
4472         if (!flow->rix_mreg_copy)
4473                 return;
4474         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4475                                  flow->rix_mreg_copy);
4476         if (!mcp_res || !priv->mreg_cp_tbl)
4477                 return;
4478         MLX5_ASSERT(mcp_res->rix_flow);
4479         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4480         flow->rix_mreg_copy = 0;
4481 }
4482
4483 /**
4484  * Remove the default copy action from RX_CP_TBL.
4485  *
4486  * This functions is called in the mlx5_dev_start(). No thread safe
4487  * is guaranteed.
4488  *
4489  * @param dev
4490  *   Pointer to Ethernet device.
4491  */
4492 static void
4493 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4494 {
4495         struct mlx5_list_entry *entry;
4496         struct mlx5_priv *priv = dev->data->dev_private;
4497         struct mlx5_flow_cb_ctx ctx;
4498         uint32_t mark_id;
4499
4500         /* Check if default flow is registered. */
4501         if (!priv->mreg_cp_tbl)
4502                 return;
4503         mark_id = MLX5_DEFAULT_COPY_ID;
4504         ctx.data = &mark_id;
4505         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4506         if (!entry)
4507                 return;
4508         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4509 }
4510
4511 /**
4512  * Add the default copy action in in RX_CP_TBL.
4513  *
4514  * This functions is called in the mlx5_dev_start(). No thread safe
4515  * is guaranteed.
4516  *
4517  * @param dev
4518  *   Pointer to Ethernet device.
4519  * @param[out] error
4520  *   Perform verbose error reporting if not NULL.
4521  *
4522  * @return
4523  *   0 for success, negative value otherwise and rte_errno is set.
4524  */
4525 static int
4526 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4527                                   struct rte_flow_error *error)
4528 {
4529         struct mlx5_priv *priv = dev->data->dev_private;
4530         struct mlx5_flow_mreg_copy_resource *mcp_res;
4531         struct mlx5_flow_cb_ctx ctx;
4532         uint32_t mark_id;
4533
4534         /* Check whether extensive metadata feature is engaged. */
4535         if (!priv->config.dv_flow_en ||
4536             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4537             !mlx5_flow_ext_mreg_supported(dev) ||
4538             !priv->sh->dv_regc0_mask)
4539                 return 0;
4540         /*
4541          * Add default mreg copy flow may be called multiple time, but
4542          * only be called once in stop. Avoid register it twice.
4543          */
4544         mark_id = MLX5_DEFAULT_COPY_ID;
4545         ctx.data = &mark_id;
4546         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4547                 return 0;
4548         mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4549         if (!mcp_res)
4550                 return -rte_errno;
4551         return 0;
4552 }
4553
4554 /**
4555  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4556  *
4557  * All the flow having Q/RSS action should be split by
4558  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4559  * performs the following,
4560  *   - CQE->flow_tag := reg_c[1] (MARK)
4561  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4562  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4563  * but there should be a flow per each MARK ID set by MARK action.
4564  *
4565  * For the aforementioned reason, if there's a MARK action in flow's action
4566  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4567  * the MARK ID to CQE's flow_tag like,
4568  *   - If reg_c[1] is mark_id,
4569  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4570  *
4571  * For SET_META action which stores value in reg_c[0], as the destination is
4572  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4573  * MARK ID means the default flow. The default flow looks like,
4574  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4575  *
4576  * @param dev
4577  *   Pointer to Ethernet device.
4578  * @param flow
4579  *   Pointer to flow structure.
4580  * @param[in] actions
4581  *   Pointer to the list of actions.
4582  * @param[out] error
4583  *   Perform verbose error reporting if not NULL.
4584  *
4585  * @return
4586  *   0 on success, negative value otherwise and rte_errno is set.
4587  */
4588 static int
4589 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4590                             struct rte_flow *flow,
4591                             const struct rte_flow_action *actions,
4592                             struct rte_flow_error *error)
4593 {
4594         struct mlx5_priv *priv = dev->data->dev_private;
4595         struct mlx5_dev_config *config = &priv->config;
4596         struct mlx5_flow_mreg_copy_resource *mcp_res;
4597         const struct rte_flow_action_mark *mark;
4598
4599         /* Check whether extensive metadata feature is engaged. */
4600         if (!config->dv_flow_en ||
4601             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4602             !mlx5_flow_ext_mreg_supported(dev) ||
4603             !priv->sh->dv_regc0_mask)
4604                 return 0;
4605         /* Find MARK action. */
4606         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4607                 switch (actions->type) {
4608                 case RTE_FLOW_ACTION_TYPE_FLAG:
4609                         mcp_res = flow_mreg_add_copy_action
4610                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4611                         if (!mcp_res)
4612                                 return -rte_errno;
4613                         flow->rix_mreg_copy = mcp_res->idx;
4614                         return 0;
4615                 case RTE_FLOW_ACTION_TYPE_MARK:
4616                         mark = (const struct rte_flow_action_mark *)
4617                                 actions->conf;
4618                         mcp_res =
4619                                 flow_mreg_add_copy_action(dev, mark->id, error);
4620                         if (!mcp_res)
4621                                 return -rte_errno;
4622                         flow->rix_mreg_copy = mcp_res->idx;
4623                         return 0;
4624                 default:
4625                         break;
4626                 }
4627         }
4628         return 0;
4629 }
4630
4631 #define MLX5_MAX_SPLIT_ACTIONS 24
4632 #define MLX5_MAX_SPLIT_ITEMS 24
4633
4634 /**
4635  * Split the hairpin flow.
4636  * Since HW can't support encap and push-vlan on Rx, we move these
4637  * actions to Tx.
4638  * If the count action is after the encap then we also
4639  * move the count action. in this case the count will also measure
4640  * the outer bytes.
4641  *
4642  * @param dev
4643  *   Pointer to Ethernet device.
4644  * @param[in] actions
4645  *   Associated actions (list terminated by the END action).
4646  * @param[out] actions_rx
4647  *   Rx flow actions.
4648  * @param[out] actions_tx
4649  *   Tx flow actions..
4650  * @param[out] pattern_tx
4651  *   The pattern items for the Tx flow.
4652  * @param[out] flow_id
4653  *   The flow ID connected to this flow.
4654  *
4655  * @return
4656  *   0 on success.
4657  */
4658 static int
4659 flow_hairpin_split(struct rte_eth_dev *dev,
4660                    const struct rte_flow_action actions[],
4661                    struct rte_flow_action actions_rx[],
4662                    struct rte_flow_action actions_tx[],
4663                    struct rte_flow_item pattern_tx[],
4664                    uint32_t flow_id)
4665 {
4666         const struct rte_flow_action_raw_encap *raw_encap;
4667         const struct rte_flow_action_raw_decap *raw_decap;
4668         struct mlx5_rte_flow_action_set_tag *set_tag;
4669         struct rte_flow_action *tag_action;
4670         struct mlx5_rte_flow_item_tag *tag_item;
4671         struct rte_flow_item *item;
4672         char *addr;
4673         int encap = 0;
4674
4675         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4676                 switch (actions->type) {
4677                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4678                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4679                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4680                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4681                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4682                         rte_memcpy(actions_tx, actions,
4683                                sizeof(struct rte_flow_action));
4684                         actions_tx++;
4685                         break;
4686                 case RTE_FLOW_ACTION_TYPE_COUNT:
4687                         if (encap) {
4688                                 rte_memcpy(actions_tx, actions,
4689                                            sizeof(struct rte_flow_action));
4690                                 actions_tx++;
4691                         } else {
4692                                 rte_memcpy(actions_rx, actions,
4693                                            sizeof(struct rte_flow_action));
4694                                 actions_rx++;
4695                         }
4696                         break;
4697                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4698                         raw_encap = actions->conf;
4699                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4700                                 memcpy(actions_tx, actions,
4701                                        sizeof(struct rte_flow_action));
4702                                 actions_tx++;
4703                                 encap = 1;
4704                         } else {
4705                                 rte_memcpy(actions_rx, actions,
4706                                            sizeof(struct rte_flow_action));
4707                                 actions_rx++;
4708                         }
4709                         break;
4710                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4711                         raw_decap = actions->conf;
4712                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4713                                 memcpy(actions_tx, actions,
4714                                        sizeof(struct rte_flow_action));
4715                                 actions_tx++;
4716                         } else {
4717                                 rte_memcpy(actions_rx, actions,
4718                                            sizeof(struct rte_flow_action));
4719                                 actions_rx++;
4720                         }
4721                         break;
4722                 default:
4723                         rte_memcpy(actions_rx, actions,
4724                                    sizeof(struct rte_flow_action));
4725                         actions_rx++;
4726                         break;
4727                 }
4728         }
4729         /* Add set meta action and end action for the Rx flow. */
4730         tag_action = actions_rx;
4731         tag_action->type = (enum rte_flow_action_type)
4732                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4733         actions_rx++;
4734         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4735         actions_rx++;
4736         set_tag = (void *)actions_rx;
4737         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4738                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4739                 .data = flow_id,
4740         };
4741         MLX5_ASSERT(set_tag->id > REG_NON);
4742         tag_action->conf = set_tag;
4743         /* Create Tx item list. */
4744         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4745         addr = (void *)&pattern_tx[2];
4746         item = pattern_tx;
4747         item->type = (enum rte_flow_item_type)
4748                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4749         tag_item = (void *)addr;
4750         tag_item->data = flow_id;
4751         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4752         MLX5_ASSERT(set_tag->id > REG_NON);
4753         item->spec = tag_item;
4754         addr += sizeof(struct mlx5_rte_flow_item_tag);
4755         tag_item = (void *)addr;
4756         tag_item->data = UINT32_MAX;
4757         tag_item->id = UINT16_MAX;
4758         item->mask = tag_item;
4759         item->last = NULL;
4760         item++;
4761         item->type = RTE_FLOW_ITEM_TYPE_END;
4762         return 0;
4763 }
4764
4765 /**
4766  * The last stage of splitting chain, just creates the subflow
4767  * without any modification.
4768  *
4769  * @param[in] dev
4770  *   Pointer to Ethernet device.
4771  * @param[in] flow
4772  *   Parent flow structure pointer.
4773  * @param[in, out] sub_flow
4774  *   Pointer to return the created subflow, may be NULL.
4775  * @param[in] attr
4776  *   Flow rule attributes.
4777  * @param[in] items
4778  *   Pattern specification (list terminated by the END pattern item).
4779  * @param[in] actions
4780  *   Associated actions (list terminated by the END action).
4781  * @param[in] flow_split_info
4782  *   Pointer to flow split info structure.
4783  * @param[out] error
4784  *   Perform verbose error reporting if not NULL.
4785  * @return
4786  *   0 on success, negative value otherwise
4787  */
4788 static int
4789 flow_create_split_inner(struct rte_eth_dev *dev,
4790                         struct rte_flow *flow,
4791                         struct mlx5_flow **sub_flow,
4792                         const struct rte_flow_attr *attr,
4793                         const struct rte_flow_item items[],
4794                         const struct rte_flow_action actions[],
4795                         struct mlx5_flow_split_info *flow_split_info,
4796                         struct rte_flow_error *error)
4797 {
4798         struct mlx5_flow *dev_flow;
4799
4800         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4801                                     flow_split_info->flow_idx, error);
4802         if (!dev_flow)
4803                 return -rte_errno;
4804         dev_flow->flow = flow;
4805         dev_flow->external = flow_split_info->external;
4806         dev_flow->skip_scale = flow_split_info->skip_scale;
4807         /* Subflow object was created, we must include one in the list. */
4808         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4809                       dev_flow->handle, next);
4810         /*
4811          * If dev_flow is as one of the suffix flow, some actions in suffix
4812          * flow may need some user defined item layer flags, and pass the
4813          * Metadate rxq mark flag to suffix flow as well.
4814          */
4815         if (flow_split_info->prefix_layers)
4816                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4817         if (flow_split_info->prefix_mark)
4818                 dev_flow->handle->mark = 1;
4819         if (sub_flow)
4820                 *sub_flow = dev_flow;
4821 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4822         dev_flow->dv.table_id = flow_split_info->table_id;
4823 #endif
4824         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4825 }
4826
4827 /**
4828  * Get the sub policy of a meter.
4829  *
4830  * @param[in] dev
4831  *   Pointer to Ethernet device.
4832  * @param[in] flow
4833  *   Parent flow structure pointer.
4834  * @param wks
4835  *   Pointer to thread flow work space.
4836  * @param[in] attr
4837  *   Flow rule attributes.
4838  * @param[in] items
4839  *   Pattern specification (list terminated by the END pattern item).
4840  * @param[out] error
4841  *   Perform verbose error reporting if not NULL.
4842  *
4843  * @return
4844  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4845  */
4846 static struct mlx5_flow_meter_sub_policy *
4847 get_meter_sub_policy(struct rte_eth_dev *dev,
4848                      struct rte_flow *flow,
4849                      struct mlx5_flow_workspace *wks,
4850                      const struct rte_flow_attr *attr,
4851                      const struct rte_flow_item items[],
4852                      struct rte_flow_error *error)
4853 {
4854         struct mlx5_flow_meter_policy *policy;
4855         struct mlx5_flow_meter_policy *final_policy;
4856         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4857
4858         policy = wks->policy;
4859         final_policy = policy->is_hierarchy ? wks->final_policy : policy;
4860         if (final_policy->is_rss || final_policy->is_queue) {
4861                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4862                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4863                 uint32_t i;
4864
4865                 /*
4866                  * This is a tmp dev_flow,
4867                  * no need to register any matcher for it in translate.
4868                  */
4869                 wks->skip_matcher_reg = 1;
4870                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4871                         struct mlx5_flow dev_flow = {0};
4872                         struct mlx5_flow_handle dev_handle = { {0} };
4873                         uint8_t fate = final_policy->act_cnt[i].fate_action;
4874
4875                         if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
4876                                 const struct rte_flow_action_rss *rss_act =
4877                                         final_policy->act_cnt[i].rss->conf;
4878                                 struct rte_flow_action rss_actions[2] = {
4879                                         [0] = {
4880                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4881                                         .conf = rss_act,
4882                                         },
4883                                         [1] = {
4884                                         .type = RTE_FLOW_ACTION_TYPE_END,
4885                                         .conf = NULL,
4886                                         }
4887                                 };
4888
4889                                 dev_flow.handle = &dev_handle;
4890                                 dev_flow.ingress = attr->ingress;
4891                                 dev_flow.flow = flow;
4892                                 dev_flow.external = 0;
4893 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4894                                 dev_flow.dv.transfer = attr->transfer;
4895 #endif
4896                                 /**
4897                                  * Translate RSS action to get rss hash fields.
4898                                  */
4899                                 if (flow_drv_translate(dev, &dev_flow, attr,
4900                                                 items, rss_actions, error))
4901                                         goto exit;
4902                                 rss_desc_v[i] = wks->rss_desc;
4903                                 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4904                                 rss_desc_v[i].hash_fields =
4905                                                 dev_flow.hash_fields;
4906                                 rss_desc_v[i].queue_num =
4907                                                 rss_desc_v[i].hash_fields ?
4908                                                 rss_desc_v[i].queue_num : 1;
4909                                 rss_desc_v[i].tunnel =
4910                                                 !!(dev_flow.handle->layers &
4911                                                    MLX5_FLOW_LAYER_TUNNEL);
4912                                 /* Use the RSS queues in the containers. */
4913                                 rss_desc_v[i].queue =
4914                                         (uint16_t *)(uintptr_t)rss_act->queue;
4915                                 rss_desc[i] = &rss_desc_v[i];
4916                         } else if (fate == MLX5_FLOW_FATE_QUEUE) {
4917                                 /* This is queue action. */
4918                                 rss_desc_v[i] = wks->rss_desc;
4919                                 rss_desc_v[i].key_len = 0;
4920                                 rss_desc_v[i].hash_fields = 0;
4921                                 rss_desc_v[i].queue =
4922                                         &final_policy->act_cnt[i].queue;
4923                                 rss_desc_v[i].queue_num = 1;
4924                                 rss_desc[i] = &rss_desc_v[i];
4925                         } else {
4926                                 rss_desc[i] = NULL;
4927                         }
4928                 }
4929                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4930                                                 flow, policy, rss_desc);
4931         } else {
4932                 enum mlx5_meter_domain mtr_domain =
4933                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4934                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4935                                                 MLX5_MTR_DOMAIN_INGRESS);
4936                 sub_policy = policy->sub_policys[mtr_domain][0];
4937         }
4938         if (!sub_policy)
4939                 rte_flow_error_set(error, EINVAL,
4940                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4941                                    "Failed to get meter sub-policy.");
4942 exit:
4943         return sub_policy;
4944 }
4945
4946 /**
4947  * Split the meter flow.
4948  *
4949  * As meter flow will split to three sub flow, other than meter
4950  * action, the other actions make sense to only meter accepts
4951  * the packet. If it need to be dropped, no other additional
4952  * actions should be take.
4953  *
4954  * One kind of special action which decapsulates the L3 tunnel
4955  * header will be in the prefix sub flow, as not to take the
4956  * L3 tunnel header into account.
4957  *
4958  * @param[in] dev
4959  *   Pointer to Ethernet device.
4960  * @param[in] flow
4961  *   Parent flow structure pointer.
4962  * @param wks
4963  *   Pointer to thread flow work space.
4964  * @param[in] attr
4965  *   Flow rule attributes.
4966  * @param[in] items
4967  *   Pattern specification (list terminated by the END pattern item).
4968  * @param[out] sfx_items
4969  *   Suffix flow match items (list terminated by the END pattern item).
4970  * @param[in] actions
4971  *   Associated actions (list terminated by the END action).
4972  * @param[out] actions_sfx
4973  *   Suffix flow actions.
4974  * @param[out] actions_pre
4975  *   Prefix flow actions.
4976  * @param[out] mtr_flow_id
4977  *   Pointer to meter flow id.
4978  * @param[out] error
4979  *   Perform verbose error reporting if not NULL.
4980  *
4981  * @return
4982  *   0 on success, a negative errno value otherwise and rte_errno is set.
4983  */
4984 static int
4985 flow_meter_split_prep(struct rte_eth_dev *dev,
4986                       struct rte_flow *flow,
4987                       struct mlx5_flow_workspace *wks,
4988                       const struct rte_flow_attr *attr,
4989                       const struct rte_flow_item items[],
4990                       struct rte_flow_item sfx_items[],
4991                       const struct rte_flow_action actions[],
4992                       struct rte_flow_action actions_sfx[],
4993                       struct rte_flow_action actions_pre[],
4994                       uint32_t *mtr_flow_id,
4995                       struct rte_flow_error *error)
4996 {
4997         struct mlx5_priv *priv = dev->data->dev_private;
4998         struct mlx5_flow_meter_info *fm = wks->fm;
4999         struct rte_flow_action *tag_action = NULL;
5000         struct rte_flow_item *tag_item;
5001         struct mlx5_rte_flow_action_set_tag *set_tag;
5002         const struct rte_flow_action_raw_encap *raw_encap;
5003         const struct rte_flow_action_raw_decap *raw_decap;
5004         struct mlx5_rte_flow_item_tag *tag_item_spec;
5005         struct mlx5_rte_flow_item_tag *tag_item_mask;
5006         uint32_t tag_id = 0;
5007         struct rte_flow_item *vlan_item_dst = NULL;
5008         const struct rte_flow_item *vlan_item_src = NULL;
5009         struct rte_flow_action *hw_mtr_action;
5010         struct rte_flow_action *action_pre_head = NULL;
5011         int32_t flow_src_port = priv->representor_id;
5012         bool mtr_first;
5013         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
5014         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
5015                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
5016         uint32_t flow_id = 0;
5017         uint32_t flow_id_reversed = 0;
5018         uint8_t flow_id_bits = 0;
5019         int shift;
5020
5021         /* Prepare the suffix subflow items. */
5022         tag_item = sfx_items++;
5023         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
5024                 struct mlx5_priv *port_priv;
5025                 const struct rte_flow_item_port_id *pid_v;
5026                 int item_type = items->type;
5027
5028                 switch (item_type) {
5029                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
5030                         pid_v = items->spec;
5031                         MLX5_ASSERT(pid_v);
5032                         port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
5033                         if (!port_priv)
5034                                 return rte_flow_error_set(error,
5035                                                 rte_errno,
5036                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5037                                                 pid_v,
5038                                                 "Failed to get port info.");
5039                         flow_src_port = port_priv->representor_id;
5040                         if (!fm->def_policy && wks->policy->is_hierarchy &&
5041                             flow_src_port != priv->representor_id) {
5042                                 if (flow_drv_mtr_hierarchy_rule_create(dev,
5043                                                                 flow, fm,
5044                                                                 flow_src_port,
5045                                                                 items,
5046                                                                 error))
5047                                         return -rte_errno;
5048                         }
5049                         memcpy(sfx_items, items, sizeof(*sfx_items));
5050                         sfx_items++;
5051                         break;
5052                 case RTE_FLOW_ITEM_TYPE_VLAN:
5053                         /* Determine if copy vlan item below. */
5054                         vlan_item_src = items;
5055                         vlan_item_dst = sfx_items++;
5056                         vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
5057                         break;
5058                 default:
5059                         break;
5060                 }
5061         }
5062         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
5063         sfx_items++;
5064         mtr_first = priv->sh->meter_aso_en &&
5065                 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
5066         /* For ASO meter, meter must be before tag in TX direction. */
5067         if (mtr_first) {
5068                 action_pre_head = actions_pre++;
5069                 /* Leave space for tag action. */
5070                 tag_action = actions_pre++;
5071         }
5072         /* Prepare the actions for prefix and suffix flow. */
5073         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5074                 struct rte_flow_action *action_cur = NULL;
5075
5076                 switch (actions->type) {
5077                 case RTE_FLOW_ACTION_TYPE_METER:
5078                         if (mtr_first) {
5079                                 action_cur = action_pre_head;
5080                         } else {
5081                                 /* Leave space for tag action. */
5082                                 tag_action = actions_pre++;
5083                                 action_cur = actions_pre++;
5084                         }
5085                         break;
5086                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5087                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5088                         action_cur = actions_pre++;
5089                         break;
5090                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5091                         raw_encap = actions->conf;
5092                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
5093                                 action_cur = actions_pre++;
5094                         break;
5095                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5096                         raw_decap = actions->conf;
5097                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
5098                                 action_cur = actions_pre++;
5099                         break;
5100                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5101                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5102                         if (vlan_item_dst && vlan_item_src) {
5103                                 memcpy(vlan_item_dst, vlan_item_src,
5104                                         sizeof(*vlan_item_dst));
5105                                 /*
5106                                  * Convert to internal match item, it is used
5107                                  * for vlan push and set vid.
5108                                  */
5109                                 vlan_item_dst->type = (enum rte_flow_item_type)
5110                                                 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
5111                         }
5112                         break;
5113                 default:
5114                         break;
5115                 }
5116                 if (!action_cur)
5117                         action_cur = (fm->def_policy) ?
5118                                         actions_sfx++ : actions_pre++;
5119                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
5120         }
5121         /* Add end action to the actions. */
5122         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
5123         if (priv->sh->meter_aso_en) {
5124                 /**
5125                  * For ASO meter, need to add an extra jump action explicitly,
5126                  * to jump from meter to policer table.
5127                  */
5128                 struct mlx5_flow_meter_sub_policy *sub_policy;
5129                 struct mlx5_flow_tbl_data_entry *tbl_data;
5130
5131                 if (!fm->def_policy) {
5132                         sub_policy = get_meter_sub_policy(dev, flow, wks,
5133                                                           attr, items, error);
5134                         if (!sub_policy)
5135                                 return -rte_errno;
5136                 } else {
5137                         enum mlx5_meter_domain mtr_domain =
5138                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
5139                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
5140                                                 MLX5_MTR_DOMAIN_INGRESS);
5141
5142                         sub_policy =
5143                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
5144                 }
5145                 tbl_data = container_of(sub_policy->tbl_rsc,
5146                                         struct mlx5_flow_tbl_data_entry, tbl);
5147                 hw_mtr_action = actions_pre++;
5148                 hw_mtr_action->type = (enum rte_flow_action_type)
5149                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
5150                 hw_mtr_action->conf = tbl_data->jump.action;
5151         }
5152         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
5153         actions_pre++;
5154         if (!tag_action)
5155                 return rte_flow_error_set(error, ENOMEM,
5156                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5157                                           NULL, "No tag action space.");
5158         if (!mtr_flow_id) {
5159                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
5160                 goto exit;
5161         }
5162         /* Only default-policy Meter creates mtr flow id. */
5163         if (fm->def_policy) {
5164                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
5165                 if (!tag_id)
5166                         return rte_flow_error_set(error, ENOMEM,
5167                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5168                                         "Failed to allocate meter flow id.");
5169                 flow_id = tag_id - 1;
5170                 flow_id_bits = (!flow_id) ? 1 :
5171                                 (MLX5_REG_BITS - __builtin_clz(flow_id));
5172                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
5173                     mtr_reg_bits) {
5174                         mlx5_ipool_free(fm->flow_ipool, tag_id);
5175                         return rte_flow_error_set(error, EINVAL,
5176                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5177                                         "Meter flow id exceeds max limit.");
5178                 }
5179                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5180                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5181         }
5182         /* Build tag actions and items for meter_id/meter flow_id. */
5183         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5184         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5185         tag_item_mask = tag_item_spec + 1;
5186         /* Both flow_id and meter_id share the same register. */
5187         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5188                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5189                                                             0, error),
5190                 .offset = mtr_id_offset,
5191                 .length = mtr_reg_bits,
5192                 .data = flow->meter,
5193         };
5194         /*
5195          * The color Reg bits used by flow_id are growing from
5196          * msb to lsb, so must do bit reverse for flow_id val in RegC.
5197          */
5198         for (shift = 0; shift < flow_id_bits; shift++)
5199                 flow_id_reversed = (flow_id_reversed << 1) |
5200                                 ((flow_id >> shift) & 0x1);
5201         set_tag->data |=
5202                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5203         tag_item_spec->id = set_tag->id;
5204         tag_item_spec->data = set_tag->data << mtr_id_offset;
5205         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5206         tag_action->type = (enum rte_flow_action_type)
5207                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5208         tag_action->conf = set_tag;
5209         tag_item->type = (enum rte_flow_item_type)
5210                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5211         tag_item->spec = tag_item_spec;
5212         tag_item->last = NULL;
5213         tag_item->mask = tag_item_mask;
5214 exit:
5215         if (mtr_flow_id)
5216                 *mtr_flow_id = tag_id;
5217         return 0;
5218 }
5219
5220 /**
5221  * Split action list having QUEUE/RSS for metadata register copy.
5222  *
5223  * Once Q/RSS action is detected in user's action list, the flow action
5224  * should be split in order to copy metadata registers, which will happen in
5225  * RX_CP_TBL like,
5226  *   - CQE->flow_tag := reg_c[1] (MARK)
5227  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5228  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5229  * This is because the last action of each flow must be a terminal action
5230  * (QUEUE, RSS or DROP).
5231  *
5232  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5233  * stored and kept in the mlx5_flow structure per each sub_flow.
5234  *
5235  * The Q/RSS action is replaced with,
5236  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
5237  * And the following JUMP action is added at the end,
5238  *   - JUMP, to RX_CP_TBL.
5239  *
5240  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5241  * flow_create_split_metadata() routine. The flow will look like,
5242  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
5243  *
5244  * @param dev
5245  *   Pointer to Ethernet device.
5246  * @param[out] split_actions
5247  *   Pointer to store split actions to jump to CP_TBL.
5248  * @param[in] actions
5249  *   Pointer to the list of original flow actions.
5250  * @param[in] qrss
5251  *   Pointer to the Q/RSS action.
5252  * @param[in] actions_n
5253  *   Number of original actions.
5254  * @param[in] mtr_sfx
5255  *   Check if it is in meter suffix table.
5256  * @param[out] error
5257  *   Perform verbose error reporting if not NULL.
5258  *
5259  * @return
5260  *   non-zero unique flow_id on success, otherwise 0 and
5261  *   error/rte_error are set.
5262  */
5263 static uint32_t
5264 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5265                           struct rte_flow_action *split_actions,
5266                           const struct rte_flow_action *actions,
5267                           const struct rte_flow_action *qrss,
5268                           int actions_n, int mtr_sfx,
5269                           struct rte_flow_error *error)
5270 {
5271         struct mlx5_priv *priv = dev->data->dev_private;
5272         struct mlx5_rte_flow_action_set_tag *set_tag;
5273         struct rte_flow_action_jump *jump;
5274         const int qrss_idx = qrss - actions;
5275         uint32_t flow_id = 0;
5276         int ret = 0;
5277
5278         /*
5279          * Given actions will be split
5280          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5281          * - Add jump to mreg CP_TBL.
5282          * As a result, there will be one more action.
5283          */
5284         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5285         /* Count MLX5_RTE_FLOW_ACTION_TYPE_TAG. */
5286         ++actions_n;
5287         set_tag = (void *)(split_actions + actions_n);
5288         /*
5289          * If we are not the meter suffix flow, add the tag action.
5290          * Since meter suffix flow already has the tag added.
5291          */
5292         if (!mtr_sfx) {
5293                 /*
5294                  * Allocate the new subflow ID. This one is unique within
5295                  * device and not shared with representors. Otherwise,
5296                  * we would have to resolve multi-thread access synch
5297                  * issue. Each flow on the shared device is appended
5298                  * with source vport identifier, so the resulting
5299                  * flows will be unique in the shared (by master and
5300                  * representors) domain even if they have coinciding
5301                  * IDs.
5302                  */
5303                 mlx5_ipool_malloc(priv->sh->ipool
5304                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5305                 if (!flow_id)
5306                         return rte_flow_error_set(error, ENOMEM,
5307                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5308                                                   NULL, "can't allocate id "
5309                                                   "for split Q/RSS subflow");
5310                 /* Internal SET_TAG action to set flow ID. */
5311                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5312                         .data = flow_id,
5313                 };
5314                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5315                 if (ret < 0)
5316                         return ret;
5317                 set_tag->id = ret;
5318                 /* Construct new actions array. */
5319                 /* Replace QUEUE/RSS action. */
5320                 split_actions[qrss_idx] = (struct rte_flow_action){
5321                         .type = (enum rte_flow_action_type)
5322                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5323                         .conf = set_tag,
5324                 };
5325         } else {
5326                 /*
5327                  * If we are the suffix flow of meter, tag already exist.
5328                  * Set the QUEUE/RSS action to void.
5329                  */
5330                 split_actions[qrss_idx].type = RTE_FLOW_ACTION_TYPE_VOID;
5331         }
5332         /* JUMP action to jump to mreg copy table (CP_TBL). */
5333         jump = (void *)(set_tag + 1);
5334         *jump = (struct rte_flow_action_jump){
5335                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5336         };
5337         split_actions[actions_n - 2] = (struct rte_flow_action){
5338                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5339                 .conf = jump,
5340         };
5341         split_actions[actions_n - 1] = (struct rte_flow_action){
5342                 .type = RTE_FLOW_ACTION_TYPE_END,
5343         };
5344         return flow_id;
5345 }
5346
5347 /**
5348  * Extend the given action list for Tx metadata copy.
5349  *
5350  * Copy the given action list to the ext_actions and add flow metadata register
5351  * copy action in order to copy reg_a set by WQE to reg_c[0].
5352  *
5353  * @param[out] ext_actions
5354  *   Pointer to the extended action list.
5355  * @param[in] actions
5356  *   Pointer to the list of actions.
5357  * @param[in] actions_n
5358  *   Number of actions in the list.
5359  * @param[out] error
5360  *   Perform verbose error reporting if not NULL.
5361  * @param[in] encap_idx
5362  *   The encap action inndex.
5363  *
5364  * @return
5365  *   0 on success, negative value otherwise
5366  */
5367 static int
5368 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5369                        struct rte_flow_action *ext_actions,
5370                        const struct rte_flow_action *actions,
5371                        int actions_n, struct rte_flow_error *error,
5372                        int encap_idx)
5373 {
5374         struct mlx5_flow_action_copy_mreg *cp_mreg =
5375                 (struct mlx5_flow_action_copy_mreg *)
5376                         (ext_actions + actions_n + 1);
5377         int ret;
5378
5379         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5380         if (ret < 0)
5381                 return ret;
5382         cp_mreg->dst = ret;
5383         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5384         if (ret < 0)
5385                 return ret;
5386         cp_mreg->src = ret;
5387         if (encap_idx != 0)
5388                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5389         if (encap_idx == actions_n - 1) {
5390                 ext_actions[actions_n - 1] = (struct rte_flow_action){
5391                         .type = (enum rte_flow_action_type)
5392                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5393                         .conf = cp_mreg,
5394                 };
5395                 ext_actions[actions_n] = (struct rte_flow_action){
5396                         .type = RTE_FLOW_ACTION_TYPE_END,
5397                 };
5398         } else {
5399                 ext_actions[encap_idx] = (struct rte_flow_action){
5400                         .type = (enum rte_flow_action_type)
5401                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5402                         .conf = cp_mreg,
5403                 };
5404                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5405                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5406         }
5407         return 0;
5408 }
5409
5410 /**
5411  * Check the match action from the action list.
5412  *
5413  * @param[in] actions
5414  *   Pointer to the list of actions.
5415  * @param[in] attr
5416  *   Flow rule attributes.
5417  * @param[in] action
5418  *   The action to be check if exist.
5419  * @param[out] match_action_pos
5420  *   Pointer to the position of the matched action if exists, otherwise is -1.
5421  * @param[out] qrss_action_pos
5422  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5423  * @param[out] modify_after_mirror
5424  *   Pointer to the flag of modify action after FDB mirroring.
5425  *
5426  * @return
5427  *   > 0 the total number of actions.
5428  *   0 if not found match action in action list.
5429  */
5430 static int
5431 flow_check_match_action(const struct rte_flow_action actions[],
5432                         const struct rte_flow_attr *attr,
5433                         enum rte_flow_action_type action,
5434                         int *match_action_pos, int *qrss_action_pos,
5435                         int *modify_after_mirror)
5436 {
5437         const struct rte_flow_action_sample *sample;
5438         const struct rte_flow_action_raw_decap *decap;
5439         int actions_n = 0;
5440         uint32_t ratio = 0;
5441         int sub_type = 0;
5442         int flag = 0;
5443         int fdb_mirror = 0;
5444
5445         *match_action_pos = -1;
5446         *qrss_action_pos = -1;
5447         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5448                 if (actions->type == action) {
5449                         flag = 1;
5450                         *match_action_pos = actions_n;
5451                 }
5452                 switch (actions->type) {
5453                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5454                 case RTE_FLOW_ACTION_TYPE_RSS:
5455                         *qrss_action_pos = actions_n;
5456                         break;
5457                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5458                         sample = actions->conf;
5459                         ratio = sample->ratio;
5460                         sub_type = ((const struct rte_flow_action *)
5461                                         (sample->actions))->type;
5462                         if (ratio == 1 && attr->transfer)
5463                                 fdb_mirror = 1;
5464                         break;
5465                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5466                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5467                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5468                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5469                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5470                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5471                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5472                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5473                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5474                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5475                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5476                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5477                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5478                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5479                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5480                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5481                 case RTE_FLOW_ACTION_TYPE_FLAG:
5482                 case RTE_FLOW_ACTION_TYPE_MARK:
5483                 case RTE_FLOW_ACTION_TYPE_SET_META:
5484                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5485                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5486                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5487                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5488                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5489                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5490                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5491                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5492                 case RTE_FLOW_ACTION_TYPE_METER:
5493                         if (fdb_mirror)
5494                                 *modify_after_mirror = 1;
5495                         break;
5496                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5497                         decap = actions->conf;
5498                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5499                                 ;
5500                         actions_n++;
5501                         if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5502                                 const struct rte_flow_action_raw_encap *encap =
5503                                                                 actions->conf;
5504                                 if (decap->size <=
5505                                         MLX5_ENCAPSULATION_DECISION_SIZE &&
5506                                     encap->size >
5507                                         MLX5_ENCAPSULATION_DECISION_SIZE)
5508                                         /* L3 encap. */
5509                                         break;
5510                         }
5511                         if (fdb_mirror)
5512                                 *modify_after_mirror = 1;
5513                         break;
5514                 default:
5515                         break;
5516                 }
5517                 actions_n++;
5518         }
5519         if (flag && fdb_mirror && !*modify_after_mirror) {
5520                 /* FDB mirroring uses the destination array to implement
5521                  * instead of FLOW_SAMPLER object.
5522                  */
5523                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5524                         flag = 0;
5525         }
5526         /* Count RTE_FLOW_ACTION_TYPE_END. */
5527         return flag ? actions_n + 1 : 0;
5528 }
5529
5530 #define SAMPLE_SUFFIX_ITEM 2
5531
5532 /**
5533  * Split the sample flow.
5534  *
5535  * As sample flow will split to two sub flow, sample flow with
5536  * sample action, the other actions will move to new suffix flow.
5537  *
5538  * Also add unique tag id with tag action in the sample flow,
5539  * the same tag id will be as match in the suffix flow.
5540  *
5541  * @param dev
5542  *   Pointer to Ethernet device.
5543  * @param[in] add_tag
5544  *   Add extra tag action flag.
5545  * @param[out] sfx_items
5546  *   Suffix flow match items (list terminated by the END pattern item).
5547  * @param[in] actions
5548  *   Associated actions (list terminated by the END action).
5549  * @param[out] actions_sfx
5550  *   Suffix flow actions.
5551  * @param[out] actions_pre
5552  *   Prefix flow actions.
5553  * @param[in] actions_n
5554  *  The total number of actions.
5555  * @param[in] sample_action_pos
5556  *   The sample action position.
5557  * @param[in] qrss_action_pos
5558  *   The Queue/RSS action position.
5559  * @param[in] jump_table
5560  *   Add extra jump action flag.
5561  * @param[out] error
5562  *   Perform verbose error reporting if not NULL.
5563  *
5564  * @return
5565  *   0 on success, or unique flow_id, a negative errno value
5566  *   otherwise and rte_errno is set.
5567  */
5568 static int
5569 flow_sample_split_prep(struct rte_eth_dev *dev,
5570                        int add_tag,
5571                        struct rte_flow_item sfx_items[],
5572                        const struct rte_flow_action actions[],
5573                        struct rte_flow_action actions_sfx[],
5574                        struct rte_flow_action actions_pre[],
5575                        int actions_n,
5576                        int sample_action_pos,
5577                        int qrss_action_pos,
5578                        int jump_table,
5579                        struct rte_flow_error *error)
5580 {
5581         struct mlx5_priv *priv = dev->data->dev_private;
5582         struct mlx5_rte_flow_action_set_tag *set_tag;
5583         struct mlx5_rte_flow_item_tag *tag_spec;
5584         struct mlx5_rte_flow_item_tag *tag_mask;
5585         struct rte_flow_action_jump *jump_action;
5586         uint32_t tag_id = 0;
5587         int index;
5588         int append_index = 0;
5589         int ret;
5590
5591         if (sample_action_pos < 0)
5592                 return rte_flow_error_set(error, EINVAL,
5593                                           RTE_FLOW_ERROR_TYPE_ACTION,
5594                                           NULL, "invalid position of sample "
5595                                           "action in list");
5596         /* Prepare the actions for prefix and suffix flow. */
5597         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5598                 index = qrss_action_pos;
5599                 /* Put the preceding the Queue/RSS action into prefix flow. */
5600                 if (index != 0)
5601                         memcpy(actions_pre, actions,
5602                                sizeof(struct rte_flow_action) * index);
5603                 /* Put others preceding the sample action into prefix flow. */
5604                 if (sample_action_pos > index + 1)
5605                         memcpy(actions_pre + index, actions + index + 1,
5606                                sizeof(struct rte_flow_action) *
5607                                (sample_action_pos - index - 1));
5608                 index = sample_action_pos - 1;
5609                 /* Put Queue/RSS action into Suffix flow. */
5610                 memcpy(actions_sfx, actions + qrss_action_pos,
5611                        sizeof(struct rte_flow_action));
5612                 actions_sfx++;
5613         } else {
5614                 index = sample_action_pos;
5615                 if (index != 0)
5616                         memcpy(actions_pre, actions,
5617                                sizeof(struct rte_flow_action) * index);
5618         }
5619         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5620          * For CX6DX and above, metadata registers Cx preserve their value,
5621          * add an extra tag action for NIC-RX and E-Switch Domain.
5622          */
5623         if (add_tag) {
5624                 /* Prepare the prefix tag action. */
5625                 append_index++;
5626                 set_tag = (void *)(actions_pre + actions_n + append_index);
5627                 ret = mlx5_flow_get_reg_id(dev, MLX5_SAMPLE_ID, 0, error);
5628                 if (ret < 0)
5629                         return ret;
5630                 mlx5_ipool_malloc(priv->sh->ipool
5631                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5632                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5633                         .id = ret,
5634                         .data = tag_id,
5635                 };
5636                 /* Prepare the suffix subflow items. */
5637                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5638                 tag_spec->data = tag_id;
5639                 tag_spec->id = set_tag->id;
5640                 tag_mask = tag_spec + 1;
5641                 tag_mask->data = UINT32_MAX;
5642                 sfx_items[0] = (struct rte_flow_item){
5643                         .type = (enum rte_flow_item_type)
5644                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5645                         .spec = tag_spec,
5646                         .last = NULL,
5647                         .mask = tag_mask,
5648                 };
5649                 sfx_items[1] = (struct rte_flow_item){
5650                         .type = (enum rte_flow_item_type)
5651                                 RTE_FLOW_ITEM_TYPE_END,
5652                 };
5653                 /* Prepare the tag action in prefix subflow. */
5654                 actions_pre[index++] =
5655                         (struct rte_flow_action){
5656                         .type = (enum rte_flow_action_type)
5657                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5658                         .conf = set_tag,
5659                 };
5660         }
5661         memcpy(actions_pre + index, actions + sample_action_pos,
5662                sizeof(struct rte_flow_action));
5663         index += 1;
5664         /* For the modify action after the sample action in E-Switch mirroring,
5665          * Add the extra jump action in prefix subflow and jump into the next
5666          * table, then do the modify action in the new table.
5667          */
5668         if (jump_table) {
5669                 /* Prepare the prefix jump action. */
5670                 append_index++;
5671                 jump_action = (void *)(actions_pre + actions_n + append_index);
5672                 jump_action->group = jump_table;
5673                 actions_pre[index++] =
5674                         (struct rte_flow_action){
5675                         .type = (enum rte_flow_action_type)
5676                                 RTE_FLOW_ACTION_TYPE_JUMP,
5677                         .conf = jump_action,
5678                 };
5679         }
5680         actions_pre[index] = (struct rte_flow_action){
5681                 .type = (enum rte_flow_action_type)
5682                         RTE_FLOW_ACTION_TYPE_END,
5683         };
5684         /* Put the actions after sample into Suffix flow. */
5685         memcpy(actions_sfx, actions + sample_action_pos + 1,
5686                sizeof(struct rte_flow_action) *
5687                (actions_n - sample_action_pos - 1));
5688         return tag_id;
5689 }
5690
5691 /**
5692  * The splitting for metadata feature.
5693  *
5694  * - Q/RSS action on NIC Rx should be split in order to pass by
5695  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5696  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5697  *
5698  * - All the actions on NIC Tx should have a mreg copy action to
5699  *   copy reg_a from WQE to reg_c[0].
5700  *
5701  * @param dev
5702  *   Pointer to Ethernet device.
5703  * @param[in] flow
5704  *   Parent flow structure pointer.
5705  * @param[in] attr
5706  *   Flow rule attributes.
5707  * @param[in] items
5708  *   Pattern specification (list terminated by the END pattern item).
5709  * @param[in] actions
5710  *   Associated actions (list terminated by the END action).
5711  * @param[in] flow_split_info
5712  *   Pointer to flow split info structure.
5713  * @param[out] error
5714  *   Perform verbose error reporting if not NULL.
5715  * @return
5716  *   0 on success, negative value otherwise
5717  */
5718 static int
5719 flow_create_split_metadata(struct rte_eth_dev *dev,
5720                            struct rte_flow *flow,
5721                            const struct rte_flow_attr *attr,
5722                            const struct rte_flow_item items[],
5723                            const struct rte_flow_action actions[],
5724                            struct mlx5_flow_split_info *flow_split_info,
5725                            struct rte_flow_error *error)
5726 {
5727         struct mlx5_priv *priv = dev->data->dev_private;
5728         struct mlx5_dev_config *config = &priv->config;
5729         const struct rte_flow_action *qrss = NULL;
5730         struct rte_flow_action *ext_actions = NULL;
5731         struct mlx5_flow *dev_flow = NULL;
5732         uint32_t qrss_id = 0;
5733         int mtr_sfx = 0;
5734         size_t act_size;
5735         int actions_n;
5736         int encap_idx;
5737         int ret;
5738
5739         /* Check whether extensive metadata feature is engaged. */
5740         if (!config->dv_flow_en ||
5741             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5742             !mlx5_flow_ext_mreg_supported(dev))
5743                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5744                                                actions, flow_split_info, error);
5745         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5746                                                            &encap_idx);
5747         if (qrss) {
5748                 /* Exclude hairpin flows from splitting. */
5749                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5750                         const struct rte_flow_action_queue *queue;
5751
5752                         queue = qrss->conf;
5753                         if (mlx5_rxq_get_type(dev, queue->index) ==
5754                             MLX5_RXQ_TYPE_HAIRPIN)
5755                                 qrss = NULL;
5756                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5757                         const struct rte_flow_action_rss *rss;
5758
5759                         rss = qrss->conf;
5760                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5761                             MLX5_RXQ_TYPE_HAIRPIN)
5762                                 qrss = NULL;
5763                 }
5764         }
5765         if (qrss) {
5766                 /* Check if it is in meter suffix table. */
5767                 mtr_sfx = attr->group == (attr->transfer ?
5768                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5769                           MLX5_FLOW_TABLE_LEVEL_METER);
5770                 /*
5771                  * Q/RSS action on NIC Rx should be split in order to pass by
5772                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5773                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5774                  */
5775                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5776                            sizeof(struct rte_flow_action_set_tag) +
5777                            sizeof(struct rte_flow_action_jump);
5778                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5779                                           SOCKET_ID_ANY);
5780                 if (!ext_actions)
5781                         return rte_flow_error_set(error, ENOMEM,
5782                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5783                                                   NULL, "no memory to split "
5784                                                   "metadata flow");
5785                 /*
5786                  * Create the new actions list with removed Q/RSS action
5787                  * and appended set tag and jump to register copy table
5788                  * (RX_CP_TBL). We should preallocate unique tag ID here
5789                  * in advance, because it is needed for set tag action.
5790                  */
5791                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5792                                                     qrss, actions_n,
5793                                                     mtr_sfx, error);
5794                 if (!mtr_sfx && !qrss_id) {
5795                         ret = -rte_errno;
5796                         goto exit;
5797                 }
5798         } else if (attr->egress && !attr->transfer) {
5799                 /*
5800                  * All the actions on NIC Tx should have a metadata register
5801                  * copy action to copy reg_a from WQE to reg_c[meta]
5802                  */
5803                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5804                            sizeof(struct mlx5_flow_action_copy_mreg);
5805                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5806                                           SOCKET_ID_ANY);
5807                 if (!ext_actions)
5808                         return rte_flow_error_set(error, ENOMEM,
5809                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5810                                                   NULL, "no memory to split "
5811                                                   "metadata flow");
5812                 /* Create the action list appended with copy register. */
5813                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5814                                              actions_n, error, encap_idx);
5815                 if (ret < 0)
5816                         goto exit;
5817         }
5818         /* Add the unmodified original or prefix subflow. */
5819         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5820                                       items, ext_actions ? ext_actions :
5821                                       actions, flow_split_info, error);
5822         if (ret < 0)
5823                 goto exit;
5824         MLX5_ASSERT(dev_flow);
5825         if (qrss) {
5826                 const struct rte_flow_attr q_attr = {
5827                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5828                         .ingress = 1,
5829                 };
5830                 /* Internal PMD action to set register. */
5831                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5832                         .data = qrss_id,
5833                         .id = REG_NON,
5834                 };
5835                 struct rte_flow_item q_items[] = {
5836                         {
5837                                 .type = (enum rte_flow_item_type)
5838                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5839                                 .spec = &q_tag_spec,
5840                                 .last = NULL,
5841                                 .mask = NULL,
5842                         },
5843                         {
5844                                 .type = RTE_FLOW_ITEM_TYPE_END,
5845                         },
5846                 };
5847                 struct rte_flow_action q_actions[] = {
5848                         {
5849                                 .type = qrss->type,
5850                                 .conf = qrss->conf,
5851                         },
5852                         {
5853                                 .type = RTE_FLOW_ACTION_TYPE_END,
5854                         },
5855                 };
5856                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5857
5858                 /*
5859                  * Configure the tag item only if there is no meter subflow.
5860                  * Since tag is already marked in the meter suffix subflow
5861                  * we can just use the meter suffix items as is.
5862                  */
5863                 if (qrss_id) {
5864                         /* Not meter subflow. */
5865                         MLX5_ASSERT(!mtr_sfx);
5866                         /*
5867                          * Put unique id in prefix flow due to it is destroyed
5868                          * after suffix flow and id will be freed after there
5869                          * is no actual flows with this id and identifier
5870                          * reallocation becomes possible (for example, for
5871                          * other flows in other threads).
5872                          */
5873                         dev_flow->handle->split_flow_id = qrss_id;
5874                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5875                                                    error);
5876                         if (ret < 0)
5877                                 goto exit;
5878                         q_tag_spec.id = ret;
5879                 }
5880                 dev_flow = NULL;
5881                 /* Add suffix subflow to execute Q/RSS. */
5882                 flow_split_info->prefix_layers = layers;
5883                 flow_split_info->prefix_mark = 0;
5884                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5885                                               &q_attr, mtr_sfx ? items :
5886                                               q_items, q_actions,
5887                                               flow_split_info, error);
5888                 if (ret < 0)
5889                         goto exit;
5890                 /* qrss ID should be freed if failed. */
5891                 qrss_id = 0;
5892                 MLX5_ASSERT(dev_flow);
5893         }
5894
5895 exit:
5896         /*
5897          * We do not destroy the partially created sub_flows in case of error.
5898          * These ones are included into parent flow list and will be destroyed
5899          * by flow_drv_destroy.
5900          */
5901         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5902                         qrss_id);
5903         mlx5_free(ext_actions);
5904         return ret;
5905 }
5906
5907 /**
5908  * Create meter internal drop flow with the original pattern.
5909  *
5910  * @param dev
5911  *   Pointer to Ethernet device.
5912  * @param[in] flow
5913  *   Parent flow structure pointer.
5914  * @param[in] attr
5915  *   Flow rule attributes.
5916  * @param[in] items
5917  *   Pattern specification (list terminated by the END pattern item).
5918  * @param[in] flow_split_info
5919  *   Pointer to flow split info structure.
5920  * @param[in] fm
5921  *   Pointer to flow meter structure.
5922  * @param[out] error
5923  *   Perform verbose error reporting if not NULL.
5924  * @return
5925  *   0 on success, negative value otherwise
5926  */
5927 static uint32_t
5928 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5929                         struct rte_flow *flow,
5930                         const struct rte_flow_attr *attr,
5931                         const struct rte_flow_item items[],
5932                         struct mlx5_flow_split_info *flow_split_info,
5933                         struct mlx5_flow_meter_info *fm,
5934                         struct rte_flow_error *error)
5935 {
5936         struct mlx5_flow *dev_flow = NULL;
5937         struct rte_flow_attr drop_attr = *attr;
5938         struct rte_flow_action drop_actions[3];
5939         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5940
5941         MLX5_ASSERT(fm->drop_cnt);
5942         drop_actions[0].type =
5943                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5944         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5945         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5946         drop_actions[1].conf = NULL;
5947         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5948         drop_actions[2].conf = NULL;
5949         drop_split_info.external = false;
5950         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5951         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5952         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5953         return flow_create_split_inner(dev, flow, &dev_flow,
5954                                 &drop_attr, items, drop_actions,
5955                                 &drop_split_info, error);
5956 }
5957
5958 /**
5959  * The splitting for meter feature.
5960  *
5961  * - The meter flow will be split to two flows as prefix and
5962  *   suffix flow. The packets make sense only it pass the prefix
5963  *   meter action.
5964  *
5965  * - Reg_C_5 is used for the packet to match betweend prefix and
5966  *   suffix flow.
5967  *
5968  * @param dev
5969  *   Pointer to Ethernet device.
5970  * @param[in] flow
5971  *   Parent flow structure pointer.
5972  * @param[in] attr
5973  *   Flow rule attributes.
5974  * @param[in] items
5975  *   Pattern specification (list terminated by the END pattern item).
5976  * @param[in] actions
5977  *   Associated actions (list terminated by the END action).
5978  * @param[in] flow_split_info
5979  *   Pointer to flow split info structure.
5980  * @param[out] error
5981  *   Perform verbose error reporting if not NULL.
5982  * @return
5983  *   0 on success, negative value otherwise
5984  */
5985 static int
5986 flow_create_split_meter(struct rte_eth_dev *dev,
5987                         struct rte_flow *flow,
5988                         const struct rte_flow_attr *attr,
5989                         const struct rte_flow_item items[],
5990                         const struct rte_flow_action actions[],
5991                         struct mlx5_flow_split_info *flow_split_info,
5992                         struct rte_flow_error *error)
5993 {
5994         struct mlx5_priv *priv = dev->data->dev_private;
5995         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5996         struct rte_flow_action *sfx_actions = NULL;
5997         struct rte_flow_action *pre_actions = NULL;
5998         struct rte_flow_item *sfx_items = NULL;
5999         struct mlx5_flow *dev_flow = NULL;
6000         struct rte_flow_attr sfx_attr = *attr;
6001         struct mlx5_flow_meter_info *fm = NULL;
6002         uint8_t skip_scale_restore;
6003         bool has_mtr = false;
6004         bool has_modify = false;
6005         bool set_mtr_reg = true;
6006         bool is_mtr_hierarchy = false;
6007         uint32_t meter_id = 0;
6008         uint32_t mtr_idx = 0;
6009         uint32_t mtr_flow_id = 0;
6010         size_t act_size;
6011         size_t item_size;
6012         int actions_n = 0;
6013         int ret = 0;
6014
6015         if (priv->mtr_en)
6016                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
6017                                                     &has_modify, &meter_id);
6018         if (has_mtr) {
6019                 if (flow->meter) {
6020                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
6021                         if (!fm)
6022                                 return rte_flow_error_set(error, EINVAL,
6023                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6024                                                 NULL, "Meter not found.");
6025                 } else {
6026                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
6027                         if (!fm)
6028                                 return rte_flow_error_set(error, EINVAL,
6029                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6030                                                 NULL, "Meter not found.");
6031                         ret = mlx5_flow_meter_attach(priv, fm,
6032                                                      &sfx_attr, error);
6033                         if (ret)
6034                                 return -rte_errno;
6035                         flow->meter = mtr_idx;
6036                 }
6037                 MLX5_ASSERT(wks);
6038                 wks->fm = fm;
6039                 if (!fm->def_policy) {
6040                         wks->policy = mlx5_flow_meter_policy_find(dev,
6041                                                                   fm->policy_id,
6042                                                                   NULL);
6043                         MLX5_ASSERT(wks->policy);
6044                         if (wks->policy->is_hierarchy) {
6045                                 wks->final_policy =
6046                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
6047                                                                 wks->policy);
6048                                 if (!wks->final_policy)
6049                                         return rte_flow_error_set(error,
6050                                         EINVAL,
6051                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6052                                 "Failed to find terminal policy of hierarchy.");
6053                                 is_mtr_hierarchy = true;
6054                         }
6055                 }
6056                 /*
6057                  * If it isn't default-policy Meter, and
6058                  * 1. There's no action in flow to change
6059                  *    packet (modify/encap/decap etc.), OR
6060                  * 2. No drop count needed for this meter.
6061                  * 3. It's not meter hierarchy.
6062                  * Then no need to use regC to save meter id anymore.
6063                  */
6064                 if (!fm->def_policy && !is_mtr_hierarchy &&
6065                     (!has_modify || !fm->drop_cnt))
6066                         set_mtr_reg = false;
6067                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
6068                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
6069                            sizeof(struct mlx5_rte_flow_action_set_tag);
6070                 /* Suffix items: tag, vlan, port id, end. */
6071 #define METER_SUFFIX_ITEM 4
6072                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
6073                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6074                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
6075                                           0, SOCKET_ID_ANY);
6076                 if (!sfx_actions)
6077                         return rte_flow_error_set(error, ENOMEM,
6078                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6079                                                   NULL, "no memory to split "
6080                                                   "meter flow");
6081                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
6082                              act_size);
6083                 /* There's no suffix flow for meter of non-default policy. */
6084                 if (!fm->def_policy)
6085                         pre_actions = sfx_actions + 1;
6086                 else
6087                         pre_actions = sfx_actions + actions_n;
6088                 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
6089                                             items, sfx_items, actions,
6090                                             sfx_actions, pre_actions,
6091                                             (set_mtr_reg ? &mtr_flow_id : NULL),
6092                                             error);
6093                 if (ret) {
6094                         ret = -rte_errno;
6095                         goto exit;
6096                 }
6097                 /* Add the prefix subflow. */
6098                 flow_split_info->prefix_mark = 0;
6099                 skip_scale_restore = flow_split_info->skip_scale;
6100                 flow_split_info->skip_scale |=
6101                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6102                 ret = flow_create_split_inner(dev, flow, &dev_flow,
6103                                               attr, items, pre_actions,
6104                                               flow_split_info, error);
6105                 flow_split_info->skip_scale = skip_scale_restore;
6106                 if (ret) {
6107                         if (mtr_flow_id)
6108                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
6109                         ret = -rte_errno;
6110                         goto exit;
6111                 }
6112                 if (mtr_flow_id) {
6113                         dev_flow->handle->split_flow_id = mtr_flow_id;
6114                         dev_flow->handle->is_meter_flow_id = 1;
6115                 }
6116                 if (!fm->def_policy) {
6117                         if (!set_mtr_reg && fm->drop_cnt)
6118                                 ret =
6119                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
6120                                                         &sfx_attr, items,
6121                                                         flow_split_info,
6122                                                         fm, error);
6123                         goto exit;
6124                 }
6125                 /* Setting the sfx group atrr. */
6126                 sfx_attr.group = sfx_attr.transfer ?
6127                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
6128                                  MLX5_FLOW_TABLE_LEVEL_METER;
6129                 flow_split_info->prefix_layers =
6130                                 flow_get_prefix_layer_flags(dev_flow);
6131                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6132                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
6133         }
6134         /* Add the prefix subflow. */
6135         ret = flow_create_split_metadata(dev, flow,
6136                                          &sfx_attr, sfx_items ?
6137                                          sfx_items : items,
6138                                          sfx_actions ? sfx_actions : actions,
6139                                          flow_split_info, error);
6140 exit:
6141         if (sfx_actions)
6142                 mlx5_free(sfx_actions);
6143         return ret;
6144 }
6145
6146 /**
6147  * The splitting for sample feature.
6148  *
6149  * Once Sample action is detected in the action list, the flow actions should
6150  * be split into prefix sub flow and suffix sub flow.
6151  *
6152  * The original items remain in the prefix sub flow, all actions preceding the
6153  * sample action and the sample action itself will be copied to the prefix
6154  * sub flow, the actions following the sample action will be copied to the
6155  * suffix sub flow, Queue action always be located in the suffix sub flow.
6156  *
6157  * In order to make the packet from prefix sub flow matches with suffix sub
6158  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
6159  * flow uses tag item with the unique flow id.
6160  *
6161  * @param dev
6162  *   Pointer to Ethernet device.
6163  * @param[in] flow
6164  *   Parent flow structure pointer.
6165  * @param[in] attr
6166  *   Flow rule attributes.
6167  * @param[in] items
6168  *   Pattern specification (list terminated by the END pattern item).
6169  * @param[in] actions
6170  *   Associated actions (list terminated by the END action).
6171  * @param[in] flow_split_info
6172  *   Pointer to flow split info structure.
6173  * @param[out] error
6174  *   Perform verbose error reporting if not NULL.
6175  * @return
6176  *   0 on success, negative value otherwise
6177  */
6178 static int
6179 flow_create_split_sample(struct rte_eth_dev *dev,
6180                          struct rte_flow *flow,
6181                          const struct rte_flow_attr *attr,
6182                          const struct rte_flow_item items[],
6183                          const struct rte_flow_action actions[],
6184                          struct mlx5_flow_split_info *flow_split_info,
6185                          struct rte_flow_error *error)
6186 {
6187         struct mlx5_priv *priv = dev->data->dev_private;
6188         struct rte_flow_action *sfx_actions = NULL;
6189         struct rte_flow_action *pre_actions = NULL;
6190         struct rte_flow_item *sfx_items = NULL;
6191         struct mlx5_flow *dev_flow = NULL;
6192         struct rte_flow_attr sfx_attr = *attr;
6193 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6194         struct mlx5_flow_dv_sample_resource *sample_res;
6195         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
6196         struct mlx5_flow_tbl_resource *sfx_tbl;
6197 #endif
6198         size_t act_size;
6199         size_t item_size;
6200         uint32_t fdb_tx = 0;
6201         int32_t tag_id = 0;
6202         int actions_n = 0;
6203         int sample_action_pos;
6204         int qrss_action_pos;
6205         int add_tag = 0;
6206         int modify_after_mirror = 0;
6207         uint16_t jump_table = 0;
6208         const uint32_t next_ft_step = 1;
6209         int ret = 0;
6210
6211         if (priv->sampler_en)
6212                 actions_n = flow_check_match_action(actions, attr,
6213                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
6214                                         &sample_action_pos, &qrss_action_pos,
6215                                         &modify_after_mirror);
6216         if (actions_n) {
6217                 /* The prefix actions must includes sample, tag, end. */
6218                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6219                            + sizeof(struct mlx5_rte_flow_action_set_tag);
6220                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6221                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6222                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6223                                           item_size), 0, SOCKET_ID_ANY);
6224                 if (!sfx_actions)
6225                         return rte_flow_error_set(error, ENOMEM,
6226                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6227                                                   NULL, "no memory to split "
6228                                                   "sample flow");
6229                 /* The representor_id is UINT16_MAX for uplink. */
6230                 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6231                 /*
6232                  * When reg_c_preserve is set, metadata registers Cx preserve
6233                  * their value even through packet duplication.
6234                  */
6235                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
6236                 if (add_tag)
6237                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6238                                         + act_size);
6239                 if (modify_after_mirror)
6240                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6241                                      next_ft_step;
6242                 pre_actions = sfx_actions + actions_n;
6243                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6244                                                 actions, sfx_actions,
6245                                                 pre_actions, actions_n,
6246                                                 sample_action_pos,
6247                                                 qrss_action_pos, jump_table,
6248                                                 error);
6249                 if (tag_id < 0 || (add_tag && !tag_id)) {
6250                         ret = -rte_errno;
6251                         goto exit;
6252                 }
6253                 if (modify_after_mirror)
6254                         flow_split_info->skip_scale =
6255                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6256                 /* Add the prefix subflow. */
6257                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6258                                               items, pre_actions,
6259                                               flow_split_info, error);
6260                 if (ret) {
6261                         ret = -rte_errno;
6262                         goto exit;
6263                 }
6264                 dev_flow->handle->split_flow_id = tag_id;
6265 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6266                 if (!modify_after_mirror) {
6267                         /* Set the sfx group attr. */
6268                         sample_res = (struct mlx5_flow_dv_sample_resource *)
6269                                                 dev_flow->dv.sample_res;
6270                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
6271                                                 sample_res->normal_path_tbl;
6272                         sfx_tbl_data = container_of(sfx_tbl,
6273                                                 struct mlx5_flow_tbl_data_entry,
6274                                                 tbl);
6275                         sfx_attr.group = sfx_attr.transfer ?
6276                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6277                 } else {
6278                         MLX5_ASSERT(attr->transfer);
6279                         sfx_attr.group = jump_table;
6280                 }
6281                 flow_split_info->prefix_layers =
6282                                 flow_get_prefix_layer_flags(dev_flow);
6283                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6284                 /* Suffix group level already be scaled with factor, set
6285                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6286                  * again in translation.
6287                  */
6288                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6289 #endif
6290         }
6291         /* Add the suffix subflow. */
6292         ret = flow_create_split_meter(dev, flow, &sfx_attr,
6293                                       sfx_items ? sfx_items : items,
6294                                       sfx_actions ? sfx_actions : actions,
6295                                       flow_split_info, error);
6296 exit:
6297         if (sfx_actions)
6298                 mlx5_free(sfx_actions);
6299         return ret;
6300 }
6301
6302 /**
6303  * Split the flow to subflow set. The splitters might be linked
6304  * in the chain, like this:
6305  * flow_create_split_outer() calls:
6306  *   flow_create_split_meter() calls:
6307  *     flow_create_split_metadata(meter_subflow_0) calls:
6308  *       flow_create_split_inner(metadata_subflow_0)
6309  *       flow_create_split_inner(metadata_subflow_1)
6310  *       flow_create_split_inner(metadata_subflow_2)
6311  *     flow_create_split_metadata(meter_subflow_1) calls:
6312  *       flow_create_split_inner(metadata_subflow_0)
6313  *       flow_create_split_inner(metadata_subflow_1)
6314  *       flow_create_split_inner(metadata_subflow_2)
6315  *
6316  * This provide flexible way to add new levels of flow splitting.
6317  * The all of successfully created subflows are included to the
6318  * parent flow dev_flow list.
6319  *
6320  * @param dev
6321  *   Pointer to Ethernet device.
6322  * @param[in] flow
6323  *   Parent flow structure pointer.
6324  * @param[in] attr
6325  *   Flow rule attributes.
6326  * @param[in] items
6327  *   Pattern specification (list terminated by the END pattern item).
6328  * @param[in] actions
6329  *   Associated actions (list terminated by the END action).
6330  * @param[in] flow_split_info
6331  *   Pointer to flow split info structure.
6332  * @param[out] error
6333  *   Perform verbose error reporting if not NULL.
6334  * @return
6335  *   0 on success, negative value otherwise
6336  */
6337 static int
6338 flow_create_split_outer(struct rte_eth_dev *dev,
6339                         struct rte_flow *flow,
6340                         const struct rte_flow_attr *attr,
6341                         const struct rte_flow_item items[],
6342                         const struct rte_flow_action actions[],
6343                         struct mlx5_flow_split_info *flow_split_info,
6344                         struct rte_flow_error *error)
6345 {
6346         int ret;
6347
6348         ret = flow_create_split_sample(dev, flow, attr, items,
6349                                        actions, flow_split_info, error);
6350         MLX5_ASSERT(ret <= 0);
6351         return ret;
6352 }
6353
6354 static inline struct mlx5_flow_tunnel *
6355 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6356 {
6357         struct mlx5_flow_tunnel *tunnel;
6358
6359 #pragma GCC diagnostic push
6360 #pragma GCC diagnostic ignored "-Wcast-qual"
6361         tunnel = (typeof(tunnel))flow->tunnel;
6362 #pragma GCC diagnostic pop
6363
6364         return tunnel;
6365 }
6366
6367 /**
6368  * Adjust flow RSS workspace if needed.
6369  *
6370  * @param wks
6371  *   Pointer to thread flow work space.
6372  * @param rss_desc
6373  *   Pointer to RSS descriptor.
6374  * @param[in] nrssq_num
6375  *   New RSS queue number.
6376  *
6377  * @return
6378  *   0 on success, -1 otherwise and rte_errno is set.
6379  */
6380 static int
6381 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6382                           struct mlx5_flow_rss_desc *rss_desc,
6383                           uint32_t nrssq_num)
6384 {
6385         if (likely(nrssq_num <= wks->rssq_num))
6386                 return 0;
6387         rss_desc->queue = realloc(rss_desc->queue,
6388                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6389         if (!rss_desc->queue) {
6390                 rte_errno = ENOMEM;
6391                 return -1;
6392         }
6393         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6394         return 0;
6395 }
6396
6397 /**
6398  * Create a flow and add it to @p list.
6399  *
6400  * @param dev
6401  *   Pointer to Ethernet device.
6402  * @param list
6403  *   Pointer to a TAILQ flow list. If this parameter NULL,
6404  *   no list insertion occurred, flow is just created,
6405  *   this is caller's responsibility to track the
6406  *   created flow.
6407  * @param[in] attr
6408  *   Flow rule attributes.
6409  * @param[in] items
6410  *   Pattern specification (list terminated by the END pattern item).
6411  * @param[in] actions
6412  *   Associated actions (list terminated by the END action).
6413  * @param[in] external
6414  *   This flow rule is created by request external to PMD.
6415  * @param[out] error
6416  *   Perform verbose error reporting if not NULL.
6417  *
6418  * @return
6419  *   A flow index on success, 0 otherwise and rte_errno is set.
6420  */
6421 static uint32_t
6422 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6423                  const struct rte_flow_attr *attr,
6424                  const struct rte_flow_item items[],
6425                  const struct rte_flow_action original_actions[],
6426                  bool external, struct rte_flow_error *error)
6427 {
6428         struct mlx5_priv *priv = dev->data->dev_private;
6429         struct rte_flow *flow = NULL;
6430         struct mlx5_flow *dev_flow;
6431         const struct rte_flow_action_rss *rss = NULL;
6432         struct mlx5_translated_action_handle
6433                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6434         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6435         union {
6436                 struct mlx5_flow_expand_rss buf;
6437                 uint8_t buffer[4096];
6438         } expand_buffer;
6439         union {
6440                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6441                 uint8_t buffer[2048];
6442         } actions_rx;
6443         union {
6444                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6445                 uint8_t buffer[2048];
6446         } actions_hairpin_tx;
6447         union {
6448                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6449                 uint8_t buffer[2048];
6450         } items_tx;
6451         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6452         struct mlx5_flow_rss_desc *rss_desc;
6453         const struct rte_flow_action *p_actions_rx;
6454         uint32_t i;
6455         uint32_t idx = 0;
6456         int hairpin_flow;
6457         struct rte_flow_attr attr_tx = { .priority = 0 };
6458         const struct rte_flow_action *actions;
6459         struct rte_flow_action *translated_actions = NULL;
6460         struct mlx5_flow_tunnel *tunnel;
6461         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6462         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6463         struct mlx5_flow_split_info flow_split_info = {
6464                 .external = !!external,
6465                 .skip_scale = 0,
6466                 .flow_idx = 0,
6467                 .prefix_mark = 0,
6468                 .prefix_layers = 0,
6469                 .table_id = 0
6470         };
6471         int ret;
6472
6473         MLX5_ASSERT(wks);
6474         rss_desc = &wks->rss_desc;
6475         ret = flow_action_handles_translate(dev, original_actions,
6476                                             indir_actions,
6477                                             &indir_actions_n,
6478                                             &translated_actions, error);
6479         if (ret < 0) {
6480                 MLX5_ASSERT(translated_actions == NULL);
6481                 return 0;
6482         }
6483         actions = translated_actions ? translated_actions : original_actions;
6484         p_actions_rx = actions;
6485         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6486         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6487                                 external, hairpin_flow, error);
6488         if (ret < 0)
6489                 goto error_before_hairpin_split;
6490         flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6491         if (!flow) {
6492                 rte_errno = ENOMEM;
6493                 goto error_before_hairpin_split;
6494         }
6495         if (hairpin_flow > 0) {
6496                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6497                         rte_errno = EINVAL;
6498                         goto error_before_hairpin_split;
6499                 }
6500                 flow_hairpin_split(dev, actions, actions_rx.actions,
6501                                    actions_hairpin_tx.actions, items_tx.items,
6502                                    idx);
6503                 p_actions_rx = actions_rx.actions;
6504         }
6505         flow_split_info.flow_idx = idx;
6506         flow->drv_type = flow_get_drv_type(dev, attr);
6507         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6508                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6509         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6510         /* RSS Action only works on NIC RX domain */
6511         if (attr->ingress && !attr->transfer)
6512                 rss = flow_get_rss_action(dev, p_actions_rx);
6513         if (rss) {
6514                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6515                         return 0;
6516                 /*
6517                  * The following information is required by
6518                  * mlx5_flow_hashfields_adjust() in advance.
6519                  */
6520                 rss_desc->level = rss->level;
6521                 /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
6522                 rss_desc->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
6523         }
6524         flow->dev_handles = 0;
6525         if (rss && rss->types) {
6526                 unsigned int graph_root;
6527
6528                 graph_root = find_graph_root(rss->level);
6529                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6530                                            items, rss->types,
6531                                            mlx5_support_expansion, graph_root);
6532                 MLX5_ASSERT(ret > 0 &&
6533                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6534                 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6535                         for (i = 0; i < buf->entries; ++i)
6536                                 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6537                 }
6538         } else {
6539                 buf->entries = 1;
6540                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6541         }
6542         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6543                                                       indir_actions_n);
6544         for (i = 0; i < buf->entries; ++i) {
6545                 /* Initialize flow split data. */
6546                 flow_split_info.prefix_layers = 0;
6547                 flow_split_info.prefix_mark = 0;
6548                 flow_split_info.skip_scale = 0;
6549                 /*
6550                  * The splitter may create multiple dev_flows,
6551                  * depending on configuration. In the simplest
6552                  * case it just creates unmodified original flow.
6553                  */
6554                 ret = flow_create_split_outer(dev, flow, attr,
6555                                               buf->entry[i].pattern,
6556                                               p_actions_rx, &flow_split_info,
6557                                               error);
6558                 if (ret < 0)
6559                         goto error;
6560                 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6561                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6562                                                            p_actions_rx,
6563                                                            idx,
6564                                                            wks->flows[0].tunnel,
6565                                                            &default_miss_ctx,
6566                                                            error);
6567                         if (ret < 0) {
6568                                 mlx5_free(default_miss_ctx.queue);
6569                                 goto error;
6570                         }
6571                 }
6572         }
6573         /* Create the tx flow. */
6574         if (hairpin_flow) {
6575                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6576                 attr_tx.ingress = 0;
6577                 attr_tx.egress = 1;
6578                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6579                                          actions_hairpin_tx.actions,
6580                                          idx, error);
6581                 if (!dev_flow)
6582                         goto error;
6583                 dev_flow->flow = flow;
6584                 dev_flow->external = 0;
6585                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6586                               dev_flow->handle, next);
6587                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6588                                          items_tx.items,
6589                                          actions_hairpin_tx.actions, error);
6590                 if (ret < 0)
6591                         goto error;
6592         }
6593         /*
6594          * Update the metadata register copy table. If extensive
6595          * metadata feature is enabled and registers are supported
6596          * we might create the extra rte_flow for each unique
6597          * MARK/FLAG action ID.
6598          *
6599          * The table is updated for ingress Flows only, because
6600          * the egress Flows belong to the different device and
6601          * copy table should be updated in peer NIC Rx domain.
6602          */
6603         if (attr->ingress &&
6604             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6605                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6606                 if (ret)
6607                         goto error;
6608         }
6609         /*
6610          * If the flow is external (from application) OR device is started,
6611          * OR mreg discover, then apply immediately.
6612          */
6613         if (external || dev->data->dev_started ||
6614             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6615              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6616                 ret = flow_drv_apply(dev, flow, error);
6617                 if (ret < 0)
6618                         goto error;
6619         }
6620         flow->type = type;
6621         flow_rxq_flags_set(dev, flow);
6622         rte_free(translated_actions);
6623         tunnel = flow_tunnel_from_rule(wks->flows);
6624         if (tunnel) {
6625                 flow->tunnel = 1;
6626                 flow->tunnel_id = tunnel->tunnel_id;
6627                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6628                 mlx5_free(default_miss_ctx.queue);
6629         }
6630         mlx5_flow_pop_thread_workspace();
6631         return idx;
6632 error:
6633         MLX5_ASSERT(flow);
6634         ret = rte_errno; /* Save rte_errno before cleanup. */
6635         flow_mreg_del_copy_action(dev, flow);
6636         flow_drv_destroy(dev, flow);
6637         if (rss_desc->shared_rss)
6638                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6639                         mlx5_ipool_get
6640                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6641                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6642         mlx5_ipool_free(priv->flows[type], idx);
6643         rte_errno = ret; /* Restore rte_errno. */
6644         ret = rte_errno;
6645         rte_errno = ret;
6646         mlx5_flow_pop_thread_workspace();
6647 error_before_hairpin_split:
6648         rte_free(translated_actions);
6649         return 0;
6650 }
6651
6652 /**
6653  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6654  * incoming packets to table 1.
6655  *
6656  * Other flow rules, requested for group n, will be created in
6657  * e-switch table n+1.
6658  * Jump action to e-switch group n will be created to group n+1.
6659  *
6660  * Used when working in switchdev mode, to utilise advantages of table 1
6661  * and above.
6662  *
6663  * @param dev
6664  *   Pointer to Ethernet device.
6665  *
6666  * @return
6667  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6668  */
6669 struct rte_flow *
6670 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6671 {
6672         const struct rte_flow_attr attr = {
6673                 .group = 0,
6674                 .priority = 0,
6675                 .ingress = 1,
6676                 .egress = 0,
6677                 .transfer = 1,
6678         };
6679         const struct rte_flow_item pattern = {
6680                 .type = RTE_FLOW_ITEM_TYPE_END,
6681         };
6682         struct rte_flow_action_jump jump = {
6683                 .group = 1,
6684         };
6685         const struct rte_flow_action actions[] = {
6686                 {
6687                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6688                         .conf = &jump,
6689                 },
6690                 {
6691                         .type = RTE_FLOW_ACTION_TYPE_END,
6692                 },
6693         };
6694         struct rte_flow_error error;
6695
6696         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6697                                                    &attr, &pattern,
6698                                                    actions, false, &error);
6699 }
6700
6701 /**
6702  * Create a dedicated flow rule on e-switch table 1, matches ESW manager
6703  * and sq number, directs all packets to peer vport.
6704  *
6705  * @param dev
6706  *   Pointer to Ethernet device.
6707  * @param txq
6708  *   Txq index.
6709  *
6710  * @return
6711  *   Flow ID on success, 0 otherwise and rte_errno is set.
6712  */
6713 uint32_t
6714 mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev, uint32_t txq)
6715 {
6716         struct rte_flow_attr attr = {
6717                 .group = 0,
6718                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6719                 .ingress = 1,
6720                 .egress = 0,
6721                 .transfer = 1,
6722         };
6723         struct rte_flow_item_port_id port_spec = {
6724                 .id = MLX5_PORT_ESW_MGR,
6725         };
6726         struct mlx5_rte_flow_item_tx_queue txq_spec = {
6727                 .queue = txq,
6728         };
6729         struct rte_flow_item pattern[] = {
6730                 {
6731                         .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
6732                         .spec = &port_spec,
6733                 },
6734                 {
6735                         .type = (enum rte_flow_item_type)
6736                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6737                         .spec = &txq_spec,
6738                 },
6739                 {
6740                         .type = RTE_FLOW_ITEM_TYPE_END,
6741                 },
6742         };
6743         struct rte_flow_action_jump jump = {
6744                 .group = 1,
6745         };
6746         struct rte_flow_action_port_id port = {
6747                 .id = dev->data->port_id,
6748         };
6749         struct rte_flow_action actions[] = {
6750                 {
6751                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6752                         .conf = &jump,
6753                 },
6754                 {
6755                         .type = RTE_FLOW_ACTION_TYPE_END,
6756                 },
6757         };
6758         struct rte_flow_error error;
6759
6760         /*
6761          * Creates group 0, highest priority jump flow.
6762          * Matches txq to bypass kernel packets.
6763          */
6764         if (flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, actions,
6765                              false, &error) == 0)
6766                 return 0;
6767         /* Create group 1, lowest priority redirect flow for txq. */
6768         attr.group = 1;
6769         actions[0].conf = &port;
6770         actions[0].type = RTE_FLOW_ACTION_TYPE_PORT_ID;
6771         return flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern,
6772                                 actions, false, &error);
6773 }
6774
6775 /**
6776  * Validate a flow supported by the NIC.
6777  *
6778  * @see rte_flow_validate()
6779  * @see rte_flow_ops
6780  */
6781 int
6782 mlx5_flow_validate(struct rte_eth_dev *dev,
6783                    const struct rte_flow_attr *attr,
6784                    const struct rte_flow_item items[],
6785                    const struct rte_flow_action original_actions[],
6786                    struct rte_flow_error *error)
6787 {
6788         int hairpin_flow;
6789         struct mlx5_translated_action_handle
6790                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6791         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6792         const struct rte_flow_action *actions;
6793         struct rte_flow_action *translated_actions = NULL;
6794         int ret = flow_action_handles_translate(dev, original_actions,
6795                                                 indir_actions,
6796                                                 &indir_actions_n,
6797                                                 &translated_actions, error);
6798
6799         if (ret)
6800                 return ret;
6801         actions = translated_actions ? translated_actions : original_actions;
6802         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6803         ret = flow_drv_validate(dev, attr, items, actions,
6804                                 true, hairpin_flow, error);
6805         rte_free(translated_actions);
6806         return ret;
6807 }
6808
6809 /**
6810  * Create a flow.
6811  *
6812  * @see rte_flow_create()
6813  * @see rte_flow_ops
6814  */
6815 struct rte_flow *
6816 mlx5_flow_create(struct rte_eth_dev *dev,
6817                  const struct rte_flow_attr *attr,
6818                  const struct rte_flow_item items[],
6819                  const struct rte_flow_action actions[],
6820                  struct rte_flow_error *error)
6821 {
6822         /*
6823          * If the device is not started yet, it is not allowed to created a
6824          * flow from application. PMD default flows and traffic control flows
6825          * are not affected.
6826          */
6827         if (unlikely(!dev->data->dev_started)) {
6828                 DRV_LOG(DEBUG, "port %u is not started when "
6829                         "inserting a flow", dev->data->port_id);
6830                 rte_flow_error_set(error, ENODEV,
6831                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6832                                    NULL,
6833                                    "port not started");
6834                 return NULL;
6835         }
6836
6837         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
6838                                                    attr, items, actions,
6839                                                    true, error);
6840 }
6841
6842 /**
6843  * Destroy a flow in a list.
6844  *
6845  * @param dev
6846  *   Pointer to Ethernet device.
6847  * @param[in] flow_idx
6848  *   Index of flow to destroy.
6849  */
6850 static void
6851 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6852                   uint32_t flow_idx)
6853 {
6854         struct mlx5_priv *priv = dev->data->dev_private;
6855         struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
6856
6857         if (!flow)
6858                 return;
6859         MLX5_ASSERT(flow->type == type);
6860         /*
6861          * Update RX queue flags only if port is started, otherwise it is
6862          * already clean.
6863          */
6864         if (dev->data->dev_started)
6865                 flow_rxq_flags_trim(dev, flow);
6866         flow_drv_destroy(dev, flow);
6867         if (flow->tunnel) {
6868                 struct mlx5_flow_tunnel *tunnel;
6869
6870                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6871                 RTE_VERIFY(tunnel);
6872                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6873                         mlx5_flow_tunnel_free(dev, tunnel);
6874         }
6875         flow_mreg_del_copy_action(dev, flow);
6876         mlx5_ipool_free(priv->flows[type], flow_idx);
6877 }
6878
6879 /**
6880  * Destroy all flows.
6881  *
6882  * @param dev
6883  *   Pointer to Ethernet device.
6884  * @param type
6885  *   Flow type to be flushed.
6886  * @param active
6887  *   If flushing is called avtively.
6888  */
6889 void
6890 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6891                      bool active)
6892 {
6893         struct mlx5_priv *priv = dev->data->dev_private;
6894         uint32_t num_flushed = 0, fidx = 1;
6895         struct rte_flow *flow;
6896
6897         MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
6898                 flow_list_destroy(dev, type, fidx);
6899                 num_flushed++;
6900         }
6901         if (active) {
6902                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6903                         dev->data->port_id, num_flushed);
6904         }
6905 }
6906
6907 /**
6908  * Stop all default actions for flows.
6909  *
6910  * @param dev
6911  *   Pointer to Ethernet device.
6912  */
6913 void
6914 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6915 {
6916         flow_mreg_del_default_copy_action(dev);
6917         flow_rxq_flags_clear(dev);
6918 }
6919
6920 /**
6921  * Start all default actions for flows.
6922  *
6923  * @param dev
6924  *   Pointer to Ethernet device.
6925  * @return
6926  *   0 on success, a negative errno value otherwise and rte_errno is set.
6927  */
6928 int
6929 mlx5_flow_start_default(struct rte_eth_dev *dev)
6930 {
6931         struct rte_flow_error error;
6932
6933         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6934         return flow_mreg_add_default_copy_action(dev, &error);
6935 }
6936
6937 /**
6938  * Release key of thread specific flow workspace data.
6939  */
6940 void
6941 flow_release_workspace(void *data)
6942 {
6943         struct mlx5_flow_workspace *wks = data;
6944         struct mlx5_flow_workspace *next;
6945
6946         while (wks) {
6947                 next = wks->next;
6948                 free(wks->rss_desc.queue);
6949                 free(wks);
6950                 wks = next;
6951         }
6952 }
6953
6954 /**
6955  * Get thread specific current flow workspace.
6956  *
6957  * @return pointer to thread specific flow workspace data, NULL on error.
6958  */
6959 struct mlx5_flow_workspace*
6960 mlx5_flow_get_thread_workspace(void)
6961 {
6962         struct mlx5_flow_workspace *data;
6963
6964         data = mlx5_flow_os_get_specific_workspace();
6965         MLX5_ASSERT(data && data->inuse);
6966         if (!data || !data->inuse)
6967                 DRV_LOG(ERR, "flow workspace not initialized.");
6968         return data;
6969 }
6970
6971 /**
6972  * Allocate and init new flow workspace.
6973  *
6974  * @return pointer to flow workspace data, NULL on error.
6975  */
6976 static struct mlx5_flow_workspace*
6977 flow_alloc_thread_workspace(void)
6978 {
6979         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6980
6981         if (!data) {
6982                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6983                         "memory.");
6984                 return NULL;
6985         }
6986         data->rss_desc.queue = calloc(1,
6987                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6988         if (!data->rss_desc.queue)
6989                 goto err;
6990         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6991         return data;
6992 err:
6993         if (data->rss_desc.queue)
6994                 free(data->rss_desc.queue);
6995         free(data);
6996         return NULL;
6997 }
6998
6999 /**
7000  * Get new thread specific flow workspace.
7001  *
7002  * If current workspace inuse, create new one and set as current.
7003  *
7004  * @return pointer to thread specific flow workspace data, NULL on error.
7005  */
7006 static struct mlx5_flow_workspace*
7007 mlx5_flow_push_thread_workspace(void)
7008 {
7009         struct mlx5_flow_workspace *curr;
7010         struct mlx5_flow_workspace *data;
7011
7012         curr = mlx5_flow_os_get_specific_workspace();
7013         if (!curr) {
7014                 data = flow_alloc_thread_workspace();
7015                 if (!data)
7016                         return NULL;
7017         } else if (!curr->inuse) {
7018                 data = curr;
7019         } else if (curr->next) {
7020                 data = curr->next;
7021         } else {
7022                 data = flow_alloc_thread_workspace();
7023                 if (!data)
7024                         return NULL;
7025                 curr->next = data;
7026                 data->prev = curr;
7027         }
7028         data->inuse = 1;
7029         data->flow_idx = 0;
7030         /* Set as current workspace */
7031         if (mlx5_flow_os_set_specific_workspace(data))
7032                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7033         return data;
7034 }
7035
7036 /**
7037  * Close current thread specific flow workspace.
7038  *
7039  * If previous workspace available, set it as current.
7040  *
7041  * @return pointer to thread specific flow workspace data, NULL on error.
7042  */
7043 static void
7044 mlx5_flow_pop_thread_workspace(void)
7045 {
7046         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
7047
7048         if (!data)
7049                 return;
7050         if (!data->inuse) {
7051                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
7052                 return;
7053         }
7054         data->inuse = 0;
7055         if (!data->prev)
7056                 return;
7057         if (mlx5_flow_os_set_specific_workspace(data->prev))
7058                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7059 }
7060
7061 /**
7062  * Verify the flow list is empty
7063  *
7064  * @param dev
7065  *  Pointer to Ethernet device.
7066  *
7067  * @return the number of flows not released.
7068  */
7069 int
7070 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
7071 {
7072         struct mlx5_priv *priv = dev->data->dev_private;
7073         struct rte_flow *flow;
7074         uint32_t idx = 0;
7075         int ret = 0, i;
7076
7077         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
7078                 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
7079                         DRV_LOG(DEBUG, "port %u flow %p still referenced",
7080                                 dev->data->port_id, (void *)flow);
7081                         ret++;
7082                 }
7083         }
7084         return ret;
7085 }
7086
7087 /**
7088  * Enable default hairpin egress flow.
7089  *
7090  * @param dev
7091  *   Pointer to Ethernet device.
7092  * @param queue
7093  *   The queue index.
7094  *
7095  * @return
7096  *   0 on success, a negative errno value otherwise and rte_errno is set.
7097  */
7098 int
7099 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
7100                             uint32_t queue)
7101 {
7102         const struct rte_flow_attr attr = {
7103                 .egress = 1,
7104                 .priority = 0,
7105         };
7106         struct mlx5_rte_flow_item_tx_queue queue_spec = {
7107                 .queue = queue,
7108         };
7109         struct mlx5_rte_flow_item_tx_queue queue_mask = {
7110                 .queue = UINT32_MAX,
7111         };
7112         struct rte_flow_item items[] = {
7113                 {
7114                         .type = (enum rte_flow_item_type)
7115                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
7116                         .spec = &queue_spec,
7117                         .last = NULL,
7118                         .mask = &queue_mask,
7119                 },
7120                 {
7121                         .type = RTE_FLOW_ITEM_TYPE_END,
7122                 },
7123         };
7124         struct rte_flow_action_jump jump = {
7125                 .group = MLX5_HAIRPIN_TX_TABLE,
7126         };
7127         struct rte_flow_action actions[2];
7128         uint32_t flow_idx;
7129         struct rte_flow_error error;
7130
7131         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
7132         actions[0].conf = &jump;
7133         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
7134         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7135                                     &attr, items, actions, false, &error);
7136         if (!flow_idx) {
7137                 DRV_LOG(DEBUG,
7138                         "Failed to create ctrl flow: rte_errno(%d),"
7139                         " type(%d), message(%s)",
7140                         rte_errno, error.type,
7141                         error.message ? error.message : " (no stated reason)");
7142                 return -rte_errno;
7143         }
7144         return 0;
7145 }
7146
7147 /**
7148  * Enable a control flow configured from the control plane.
7149  *
7150  * @param dev
7151  *   Pointer to Ethernet device.
7152  * @param eth_spec
7153  *   An Ethernet flow spec to apply.
7154  * @param eth_mask
7155  *   An Ethernet flow mask to apply.
7156  * @param vlan_spec
7157  *   A VLAN flow spec to apply.
7158  * @param vlan_mask
7159  *   A VLAN flow mask to apply.
7160  *
7161  * @return
7162  *   0 on success, a negative errno value otherwise and rte_errno is set.
7163  */
7164 int
7165 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
7166                     struct rte_flow_item_eth *eth_spec,
7167                     struct rte_flow_item_eth *eth_mask,
7168                     struct rte_flow_item_vlan *vlan_spec,
7169                     struct rte_flow_item_vlan *vlan_mask)
7170 {
7171         struct mlx5_priv *priv = dev->data->dev_private;
7172         const struct rte_flow_attr attr = {
7173                 .ingress = 1,
7174                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7175         };
7176         struct rte_flow_item items[] = {
7177                 {
7178                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7179                         .spec = eth_spec,
7180                         .last = NULL,
7181                         .mask = eth_mask,
7182                 },
7183                 {
7184                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
7185                                               RTE_FLOW_ITEM_TYPE_END,
7186                         .spec = vlan_spec,
7187                         .last = NULL,
7188                         .mask = vlan_mask,
7189                 },
7190                 {
7191                         .type = RTE_FLOW_ITEM_TYPE_END,
7192                 },
7193         };
7194         uint16_t queue[priv->reta_idx_n];
7195         struct rte_flow_action_rss action_rss = {
7196                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7197                 .level = 0,
7198                 .types = priv->rss_conf.rss_hf,
7199                 .key_len = priv->rss_conf.rss_key_len,
7200                 .queue_num = priv->reta_idx_n,
7201                 .key = priv->rss_conf.rss_key,
7202                 .queue = queue,
7203         };
7204         struct rte_flow_action actions[] = {
7205                 {
7206                         .type = RTE_FLOW_ACTION_TYPE_RSS,
7207                         .conf = &action_rss,
7208                 },
7209                 {
7210                         .type = RTE_FLOW_ACTION_TYPE_END,
7211                 },
7212         };
7213         uint32_t flow_idx;
7214         struct rte_flow_error error;
7215         unsigned int i;
7216
7217         if (!priv->reta_idx_n || !priv->rxqs_n) {
7218                 return 0;
7219         }
7220         if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
7221                 action_rss.types = 0;
7222         for (i = 0; i != priv->reta_idx_n; ++i)
7223                 queue[i] = (*priv->reta_idx)[i];
7224         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7225                                     &attr, items, actions, false, &error);
7226         if (!flow_idx)
7227                 return -rte_errno;
7228         return 0;
7229 }
7230
7231 /**
7232  * Enable a flow control configured from the control plane.
7233  *
7234  * @param dev
7235  *   Pointer to Ethernet device.
7236  * @param eth_spec
7237  *   An Ethernet flow spec to apply.
7238  * @param eth_mask
7239  *   An Ethernet flow mask to apply.
7240  *
7241  * @return
7242  *   0 on success, a negative errno value otherwise and rte_errno is set.
7243  */
7244 int
7245 mlx5_ctrl_flow(struct rte_eth_dev *dev,
7246                struct rte_flow_item_eth *eth_spec,
7247                struct rte_flow_item_eth *eth_mask)
7248 {
7249         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
7250 }
7251
7252 /**
7253  * Create default miss flow rule matching lacp traffic
7254  *
7255  * @param dev
7256  *   Pointer to Ethernet device.
7257  * @param eth_spec
7258  *   An Ethernet flow spec to apply.
7259  *
7260  * @return
7261  *   0 on success, a negative errno value otherwise and rte_errno is set.
7262  */
7263 int
7264 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
7265 {
7266         /*
7267          * The LACP matching is done by only using ether type since using
7268          * a multicast dst mac causes kernel to give low priority to this flow.
7269          */
7270         static const struct rte_flow_item_eth lacp_spec = {
7271                 .type = RTE_BE16(0x8809),
7272         };
7273         static const struct rte_flow_item_eth lacp_mask = {
7274                 .type = 0xffff,
7275         };
7276         const struct rte_flow_attr attr = {
7277                 .ingress = 1,
7278         };
7279         struct rte_flow_item items[] = {
7280                 {
7281                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7282                         .spec = &lacp_spec,
7283                         .mask = &lacp_mask,
7284                 },
7285                 {
7286                         .type = RTE_FLOW_ITEM_TYPE_END,
7287                 },
7288         };
7289         struct rte_flow_action actions[] = {
7290                 {
7291                         .type = (enum rte_flow_action_type)
7292                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7293                 },
7294                 {
7295                         .type = RTE_FLOW_ACTION_TYPE_END,
7296                 },
7297         };
7298         struct rte_flow_error error;
7299         uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7300                                         &attr, items, actions,
7301                                         false, &error);
7302
7303         if (!flow_idx)
7304                 return -rte_errno;
7305         return 0;
7306 }
7307
7308 /**
7309  * Destroy a flow.
7310  *
7311  * @see rte_flow_destroy()
7312  * @see rte_flow_ops
7313  */
7314 int
7315 mlx5_flow_destroy(struct rte_eth_dev *dev,
7316                   struct rte_flow *flow,
7317                   struct rte_flow_error *error __rte_unused)
7318 {
7319         flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7320                                 (uintptr_t)(void *)flow);
7321         return 0;
7322 }
7323
7324 /**
7325  * Destroy all flows.
7326  *
7327  * @see rte_flow_flush()
7328  * @see rte_flow_ops
7329  */
7330 int
7331 mlx5_flow_flush(struct rte_eth_dev *dev,
7332                 struct rte_flow_error *error __rte_unused)
7333 {
7334         mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7335         return 0;
7336 }
7337
7338 /**
7339  * Isolated mode.
7340  *
7341  * @see rte_flow_isolate()
7342  * @see rte_flow_ops
7343  */
7344 int
7345 mlx5_flow_isolate(struct rte_eth_dev *dev,
7346                   int enable,
7347                   struct rte_flow_error *error)
7348 {
7349         struct mlx5_priv *priv = dev->data->dev_private;
7350
7351         if (dev->data->dev_started) {
7352                 rte_flow_error_set(error, EBUSY,
7353                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7354                                    NULL,
7355                                    "port must be stopped first");
7356                 return -rte_errno;
7357         }
7358         priv->isolated = !!enable;
7359         if (enable)
7360                 dev->dev_ops = &mlx5_dev_ops_isolate;
7361         else
7362                 dev->dev_ops = &mlx5_dev_ops;
7363
7364         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7365         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7366
7367         return 0;
7368 }
7369
7370 /**
7371  * Query a flow.
7372  *
7373  * @see rte_flow_query()
7374  * @see rte_flow_ops
7375  */
7376 static int
7377 flow_drv_query(struct rte_eth_dev *dev,
7378                uint32_t flow_idx,
7379                const struct rte_flow_action *actions,
7380                void *data,
7381                struct rte_flow_error *error)
7382 {
7383         struct mlx5_priv *priv = dev->data->dev_private;
7384         const struct mlx5_flow_driver_ops *fops;
7385         struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7386                                                flow_idx);
7387         enum mlx5_flow_drv_type ftype;
7388
7389         if (!flow) {
7390                 return rte_flow_error_set(error, ENOENT,
7391                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7392                           NULL,
7393                           "invalid flow handle");
7394         }
7395         ftype = flow->drv_type;
7396         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7397         fops = flow_get_drv_ops(ftype);
7398
7399         return fops->query(dev, flow, actions, data, error);
7400 }
7401
7402 /**
7403  * Query a flow.
7404  *
7405  * @see rte_flow_query()
7406  * @see rte_flow_ops
7407  */
7408 int
7409 mlx5_flow_query(struct rte_eth_dev *dev,
7410                 struct rte_flow *flow,
7411                 const struct rte_flow_action *actions,
7412                 void *data,
7413                 struct rte_flow_error *error)
7414 {
7415         int ret;
7416
7417         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7418                              error);
7419         if (ret < 0)
7420                 return ret;
7421         return 0;
7422 }
7423
7424 /**
7425  * Get rte_flow callbacks.
7426  *
7427  * @param dev
7428  *   Pointer to Ethernet device structure.
7429  * @param ops
7430  *   Pointer to operation-specific structure.
7431  *
7432  * @return 0
7433  */
7434 int
7435 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7436                   const struct rte_flow_ops **ops)
7437 {
7438         *ops = &mlx5_flow_ops;
7439         return 0;
7440 }
7441
7442 /**
7443  * Validate meter policy actions.
7444  * Dispatcher for action type specific validation.
7445  *
7446  * @param[in] dev
7447  *   Pointer to the Ethernet device structure.
7448  * @param[in] action
7449  *   The meter policy action object to validate.
7450  * @param[in] attr
7451  *   Attributes of flow to determine steering domain.
7452  * @param[out] is_rss
7453  *   Is RSS or not.
7454  * @param[out] domain_bitmap
7455  *   Domain bitmap.
7456  * @param[out] is_def_policy
7457  *   Is default policy or not.
7458  * @param[out] error
7459  *   Perform verbose error reporting if not NULL. Initialized in case of
7460  *   error only.
7461  *
7462  * @return
7463  *   0 on success, otherwise negative errno value.
7464  */
7465 int
7466 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7467                         const struct rte_flow_action *actions[RTE_COLORS],
7468                         struct rte_flow_attr *attr,
7469                         bool *is_rss,
7470                         uint8_t *domain_bitmap,
7471                         uint8_t *policy_mode,
7472                         struct rte_mtr_error *error)
7473 {
7474         const struct mlx5_flow_driver_ops *fops;
7475
7476         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7477         return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7478                                        domain_bitmap, policy_mode, error);
7479 }
7480
7481 /**
7482  * Destroy the meter table set.
7483  *
7484  * @param[in] dev
7485  *   Pointer to Ethernet device.
7486  * @param[in] mtr_policy
7487  *   Meter policy struct.
7488  */
7489 void
7490 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7491                       struct mlx5_flow_meter_policy *mtr_policy)
7492 {
7493         const struct mlx5_flow_driver_ops *fops;
7494
7495         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7496         fops->destroy_mtr_acts(dev, mtr_policy);
7497 }
7498
7499 /**
7500  * Create policy action, lock free,
7501  * (mutex should be acquired by caller).
7502  * Dispatcher for action type specific call.
7503  *
7504  * @param[in] dev
7505  *   Pointer to the Ethernet device structure.
7506  * @param[in] mtr_policy
7507  *   Meter policy struct.
7508  * @param[in] action
7509  *   Action specification used to create meter actions.
7510  * @param[out] error
7511  *   Perform verbose error reporting if not NULL. Initialized in case of
7512  *   error only.
7513  *
7514  * @return
7515  *   0 on success, otherwise negative errno value.
7516  */
7517 int
7518 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7519                       struct mlx5_flow_meter_policy *mtr_policy,
7520                       const struct rte_flow_action *actions[RTE_COLORS],
7521                       struct rte_mtr_error *error)
7522 {
7523         const struct mlx5_flow_driver_ops *fops;
7524
7525         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7526         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7527 }
7528
7529 /**
7530  * Create policy rules, lock free,
7531  * (mutex should be acquired by caller).
7532  * Dispatcher for action type specific call.
7533  *
7534  * @param[in] dev
7535  *   Pointer to the Ethernet device structure.
7536  * @param[in] mtr_policy
7537  *   Meter policy struct.
7538  *
7539  * @return
7540  *   0 on success, -1 otherwise.
7541  */
7542 int
7543 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7544                              struct mlx5_flow_meter_policy *mtr_policy)
7545 {
7546         const struct mlx5_flow_driver_ops *fops;
7547
7548         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7549         return fops->create_policy_rules(dev, mtr_policy);
7550 }
7551
7552 /**
7553  * Destroy policy rules, lock free,
7554  * (mutex should be acquired by caller).
7555  * Dispatcher for action type specific call.
7556  *
7557  * @param[in] dev
7558  *   Pointer to the Ethernet device structure.
7559  * @param[in] mtr_policy
7560  *   Meter policy struct.
7561  */
7562 void
7563 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7564                              struct mlx5_flow_meter_policy *mtr_policy)
7565 {
7566         const struct mlx5_flow_driver_ops *fops;
7567
7568         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7569         fops->destroy_policy_rules(dev, mtr_policy);
7570 }
7571
7572 /**
7573  * Destroy the default policy table set.
7574  *
7575  * @param[in] dev
7576  *   Pointer to Ethernet device.
7577  */
7578 void
7579 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7580 {
7581         const struct mlx5_flow_driver_ops *fops;
7582
7583         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7584         fops->destroy_def_policy(dev);
7585 }
7586
7587 /**
7588  * Destroy the default policy table set.
7589  *
7590  * @param[in] dev
7591  *   Pointer to Ethernet device.
7592  *
7593  * @return
7594  *   0 on success, -1 otherwise.
7595  */
7596 int
7597 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7598 {
7599         const struct mlx5_flow_driver_ops *fops;
7600
7601         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7602         return fops->create_def_policy(dev);
7603 }
7604
7605 /**
7606  * Create the needed meter and suffix tables.
7607  *
7608  * @param[in] dev
7609  *   Pointer to Ethernet device.
7610  *
7611  * @return
7612  *   0 on success, -1 otherwise.
7613  */
7614 int
7615 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7616                         struct mlx5_flow_meter_info *fm,
7617                         uint32_t mtr_idx,
7618                         uint8_t domain_bitmap)
7619 {
7620         const struct mlx5_flow_driver_ops *fops;
7621
7622         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7623         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7624 }
7625
7626 /**
7627  * Destroy the meter table set.
7628  *
7629  * @param[in] dev
7630  *   Pointer to Ethernet device.
7631  * @param[in] tbl
7632  *   Pointer to the meter table set.
7633  */
7634 void
7635 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7636                            struct mlx5_flow_meter_info *fm)
7637 {
7638         const struct mlx5_flow_driver_ops *fops;
7639
7640         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7641         fops->destroy_mtr_tbls(dev, fm);
7642 }
7643
7644 /**
7645  * Destroy the global meter drop table.
7646  *
7647  * @param[in] dev
7648  *   Pointer to Ethernet device.
7649  */
7650 void
7651 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7652 {
7653         const struct mlx5_flow_driver_ops *fops;
7654
7655         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7656         fops->destroy_mtr_drop_tbls(dev);
7657 }
7658
7659 /**
7660  * Destroy the sub policy table with RX queue.
7661  *
7662  * @param[in] dev
7663  *   Pointer to Ethernet device.
7664  * @param[in] mtr_policy
7665  *   Pointer to meter policy table.
7666  */
7667 void
7668 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7669                 struct mlx5_flow_meter_policy *mtr_policy)
7670 {
7671         const struct mlx5_flow_driver_ops *fops;
7672
7673         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7674         fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7675 }
7676
7677 /**
7678  * Allocate the needed aso flow meter id.
7679  *
7680  * @param[in] dev
7681  *   Pointer to Ethernet device.
7682  *
7683  * @return
7684  *   Index to aso flow meter on success, NULL otherwise.
7685  */
7686 uint32_t
7687 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7688 {
7689         const struct mlx5_flow_driver_ops *fops;
7690
7691         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7692         return fops->create_meter(dev);
7693 }
7694
7695 /**
7696  * Free the aso flow meter id.
7697  *
7698  * @param[in] dev
7699  *   Pointer to Ethernet device.
7700  * @param[in] mtr_idx
7701  *  Index to aso flow meter to be free.
7702  *
7703  * @return
7704  *   0 on success.
7705  */
7706 void
7707 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7708 {
7709         const struct mlx5_flow_driver_ops *fops;
7710
7711         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7712         fops->free_meter(dev, mtr_idx);
7713 }
7714
7715 /**
7716  * Allocate a counter.
7717  *
7718  * @param[in] dev
7719  *   Pointer to Ethernet device structure.
7720  *
7721  * @return
7722  *   Index to allocated counter  on success, 0 otherwise.
7723  */
7724 uint32_t
7725 mlx5_counter_alloc(struct rte_eth_dev *dev)
7726 {
7727         const struct mlx5_flow_driver_ops *fops;
7728         struct rte_flow_attr attr = { .transfer = 0 };
7729
7730         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7731                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7732                 return fops->counter_alloc(dev);
7733         }
7734         DRV_LOG(ERR,
7735                 "port %u counter allocate is not supported.",
7736                  dev->data->port_id);
7737         return 0;
7738 }
7739
7740 /**
7741  * Free a counter.
7742  *
7743  * @param[in] dev
7744  *   Pointer to Ethernet device structure.
7745  * @param[in] cnt
7746  *   Index to counter to be free.
7747  */
7748 void
7749 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7750 {
7751         const struct mlx5_flow_driver_ops *fops;
7752         struct rte_flow_attr attr = { .transfer = 0 };
7753
7754         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7755                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7756                 fops->counter_free(dev, cnt);
7757                 return;
7758         }
7759         DRV_LOG(ERR,
7760                 "port %u counter free is not supported.",
7761                  dev->data->port_id);
7762 }
7763
7764 /**
7765  * Query counter statistics.
7766  *
7767  * @param[in] dev
7768  *   Pointer to Ethernet device structure.
7769  * @param[in] cnt
7770  *   Index to counter to query.
7771  * @param[in] clear
7772  *   Set to clear counter statistics.
7773  * @param[out] pkts
7774  *   The counter hits packets number to save.
7775  * @param[out] bytes
7776  *   The counter hits bytes number to save.
7777  *
7778  * @return
7779  *   0 on success, a negative errno value otherwise.
7780  */
7781 int
7782 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7783                    bool clear, uint64_t *pkts, uint64_t *bytes)
7784 {
7785         const struct mlx5_flow_driver_ops *fops;
7786         struct rte_flow_attr attr = { .transfer = 0 };
7787
7788         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7789                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7790                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7791         }
7792         DRV_LOG(ERR,
7793                 "port %u counter query is not supported.",
7794                  dev->data->port_id);
7795         return -ENOTSUP;
7796 }
7797
7798 /**
7799  * Allocate a new memory for the counter values wrapped by all the needed
7800  * management.
7801  *
7802  * @param[in] sh
7803  *   Pointer to mlx5_dev_ctx_shared object.
7804  *
7805  * @return
7806  *   0 on success, a negative errno value otherwise.
7807  */
7808 static int
7809 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7810 {
7811         struct mlx5_counter_stats_mem_mng *mem_mng;
7812         volatile struct flow_counter_stats *raw_data;
7813         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7814         int size = (sizeof(struct flow_counter_stats) *
7815                         MLX5_COUNTERS_PER_POOL +
7816                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7817                         sizeof(struct mlx5_counter_stats_mem_mng);
7818         size_t pgsize = rte_mem_page_size();
7819         uint8_t *mem;
7820         int ret;
7821         int i;
7822
7823         if (pgsize == (size_t)-1) {
7824                 DRV_LOG(ERR, "Failed to get mem page size");
7825                 rte_errno = ENOMEM;
7826                 return -ENOMEM;
7827         }
7828         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7829         if (!mem) {
7830                 rte_errno = ENOMEM;
7831                 return -ENOMEM;
7832         }
7833         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7834         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7835         ret = mlx5_os_wrapped_mkey_create(sh->cdev->ctx, sh->cdev->pd,
7836                                           sh->cdev->pdn, mem, size,
7837                                           &mem_mng->wm);
7838         if (ret) {
7839                 rte_errno = errno;
7840                 mlx5_free(mem);
7841                 return -rte_errno;
7842         }
7843         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7844         raw_data = (volatile struct flow_counter_stats *)mem;
7845         for (i = 0; i < raws_n; ++i) {
7846                 mem_mng->raws[i].mem_mng = mem_mng;
7847                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7848         }
7849         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7850                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7851                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7852                                  next);
7853         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7854         sh->cmng.mem_mng = mem_mng;
7855         return 0;
7856 }
7857
7858 /**
7859  * Set the statistic memory to the new counter pool.
7860  *
7861  * @param[in] sh
7862  *   Pointer to mlx5_dev_ctx_shared object.
7863  * @param[in] pool
7864  *   Pointer to the pool to set the statistic memory.
7865  *
7866  * @return
7867  *   0 on success, a negative errno value otherwise.
7868  */
7869 static int
7870 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7871                                struct mlx5_flow_counter_pool *pool)
7872 {
7873         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7874         /* Resize statistic memory once used out. */
7875         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7876             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7877                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7878                 return -1;
7879         }
7880         rte_spinlock_lock(&pool->sl);
7881         pool->raw = cmng->mem_mng->raws + pool->index %
7882                     MLX5_CNT_CONTAINER_RESIZE;
7883         rte_spinlock_unlock(&pool->sl);
7884         pool->raw_hw = NULL;
7885         return 0;
7886 }
7887
7888 #define MLX5_POOL_QUERY_FREQ_US 1000000
7889
7890 /**
7891  * Set the periodic procedure for triggering asynchronous batch queries for all
7892  * the counter pools.
7893  *
7894  * @param[in] sh
7895  *   Pointer to mlx5_dev_ctx_shared object.
7896  */
7897 void
7898 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7899 {
7900         uint32_t pools_n, us;
7901
7902         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7903         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7904         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7905         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7906                 sh->cmng.query_thread_on = 0;
7907                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7908         } else {
7909                 sh->cmng.query_thread_on = 1;
7910         }
7911 }
7912
7913 /**
7914  * The periodic procedure for triggering asynchronous batch queries for all the
7915  * counter pools. This function is probably called by the host thread.
7916  *
7917  * @param[in] arg
7918  *   The parameter for the alarm process.
7919  */
7920 void
7921 mlx5_flow_query_alarm(void *arg)
7922 {
7923         struct mlx5_dev_ctx_shared *sh = arg;
7924         int ret;
7925         uint16_t pool_index = sh->cmng.pool_index;
7926         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7927         struct mlx5_flow_counter_pool *pool;
7928         uint16_t n_valid;
7929
7930         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7931                 goto set_alarm;
7932         rte_spinlock_lock(&cmng->pool_update_sl);
7933         pool = cmng->pools[pool_index];
7934         n_valid = cmng->n_valid;
7935         rte_spinlock_unlock(&cmng->pool_update_sl);
7936         /* Set the statistic memory to the new created pool. */
7937         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7938                 goto set_alarm;
7939         if (pool->raw_hw)
7940                 /* There is a pool query in progress. */
7941                 goto set_alarm;
7942         pool->raw_hw =
7943                 LIST_FIRST(&sh->cmng.free_stat_raws);
7944         if (!pool->raw_hw)
7945                 /* No free counter statistics raw memory. */
7946                 goto set_alarm;
7947         /*
7948          * Identify the counters released between query trigger and query
7949          * handle more efficiently. The counter released in this gap period
7950          * should wait for a new round of query as the new arrived packets
7951          * will not be taken into account.
7952          */
7953         pool->query_gen++;
7954         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7955                                                MLX5_COUNTERS_PER_POOL,
7956                                                NULL, NULL,
7957                                                pool->raw_hw->mem_mng->wm.lkey,
7958                                                (void *)(uintptr_t)
7959                                                pool->raw_hw->data,
7960                                                sh->devx_comp,
7961                                                (uint64_t)(uintptr_t)pool);
7962         if (ret) {
7963                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7964                         " %d", pool->min_dcs->id);
7965                 pool->raw_hw = NULL;
7966                 goto set_alarm;
7967         }
7968         LIST_REMOVE(pool->raw_hw, next);
7969         sh->cmng.pending_queries++;
7970         pool_index++;
7971         if (pool_index >= n_valid)
7972                 pool_index = 0;
7973 set_alarm:
7974         sh->cmng.pool_index = pool_index;
7975         mlx5_set_query_alarm(sh);
7976 }
7977
7978 /**
7979  * Check and callback event for new aged flow in the counter pool
7980  *
7981  * @param[in] sh
7982  *   Pointer to mlx5_dev_ctx_shared object.
7983  * @param[in] pool
7984  *   Pointer to Current counter pool.
7985  */
7986 static void
7987 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7988                    struct mlx5_flow_counter_pool *pool)
7989 {
7990         struct mlx5_priv *priv;
7991         struct mlx5_flow_counter *cnt;
7992         struct mlx5_age_info *age_info;
7993         struct mlx5_age_param *age_param;
7994         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7995         struct mlx5_counter_stats_raw *prev = pool->raw;
7996         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7997         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7998         uint16_t expected = AGE_CANDIDATE;
7999         uint32_t i;
8000
8001         pool->time_of_last_age_check = curr_time;
8002         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
8003                 cnt = MLX5_POOL_GET_CNT(pool, i);
8004                 age_param = MLX5_CNT_TO_AGE(cnt);
8005                 if (__atomic_load_n(&age_param->state,
8006                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
8007                         continue;
8008                 if (cur->data[i].hits != prev->data[i].hits) {
8009                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
8010                                          __ATOMIC_RELAXED);
8011                         continue;
8012                 }
8013                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
8014                                        time_delta,
8015                                        __ATOMIC_RELAXED) <= age_param->timeout)
8016                         continue;
8017                 /**
8018                  * Hold the lock first, or if between the
8019                  * state AGE_TMOUT and tailq operation the
8020                  * release happened, the release procedure
8021                  * may delete a non-existent tailq node.
8022                  */
8023                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
8024                 age_info = GET_PORT_AGE_INFO(priv);
8025                 rte_spinlock_lock(&age_info->aged_sl);
8026                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
8027                                                 AGE_TMOUT, false,
8028                                                 __ATOMIC_RELAXED,
8029                                                 __ATOMIC_RELAXED)) {
8030                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
8031                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
8032                 }
8033                 rte_spinlock_unlock(&age_info->aged_sl);
8034         }
8035         mlx5_age_event_prepare(sh);
8036 }
8037
8038 /**
8039  * Handler for the HW respond about ready values from an asynchronous batch
8040  * query. This function is probably called by the host thread.
8041  *
8042  * @param[in] sh
8043  *   The pointer to the shared device context.
8044  * @param[in] async_id
8045  *   The Devx async ID.
8046  * @param[in] status
8047  *   The status of the completion.
8048  */
8049 void
8050 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
8051                                   uint64_t async_id, int status)
8052 {
8053         struct mlx5_flow_counter_pool *pool =
8054                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
8055         struct mlx5_counter_stats_raw *raw_to_free;
8056         uint8_t query_gen = pool->query_gen ^ 1;
8057         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8058         enum mlx5_counter_type cnt_type =
8059                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
8060                                 MLX5_COUNTER_TYPE_ORIGIN;
8061
8062         if (unlikely(status)) {
8063                 raw_to_free = pool->raw_hw;
8064         } else {
8065                 raw_to_free = pool->raw;
8066                 if (pool->is_aged)
8067                         mlx5_flow_aging_check(sh, pool);
8068                 rte_spinlock_lock(&pool->sl);
8069                 pool->raw = pool->raw_hw;
8070                 rte_spinlock_unlock(&pool->sl);
8071                 /* Be sure the new raw counters data is updated in memory. */
8072                 rte_io_wmb();
8073                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
8074                         rte_spinlock_lock(&cmng->csl[cnt_type]);
8075                         TAILQ_CONCAT(&cmng->counters[cnt_type],
8076                                      &pool->counters[query_gen], next);
8077                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
8078                 }
8079         }
8080         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
8081         pool->raw_hw = NULL;
8082         sh->cmng.pending_queries--;
8083 }
8084
8085 static int
8086 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
8087                     const struct flow_grp_info *grp_info,
8088                     struct rte_flow_error *error)
8089 {
8090         if (grp_info->transfer && grp_info->external &&
8091             grp_info->fdb_def_rule) {
8092                 if (group == UINT32_MAX)
8093                         return rte_flow_error_set
8094                                                 (error, EINVAL,
8095                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8096                                                  NULL,
8097                                                  "group index not supported");
8098                 *table = group + 1;
8099         } else {
8100                 *table = group;
8101         }
8102         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
8103         return 0;
8104 }
8105
8106 /**
8107  * Translate the rte_flow group index to HW table value.
8108  *
8109  * If tunnel offload is disabled, all group ids converted to flow table
8110  * id using the standard method.
8111  * If tunnel offload is enabled, group id can be converted using the
8112  * standard or tunnel conversion method. Group conversion method
8113  * selection depends on flags in `grp_info` parameter:
8114  * - Internal (grp_info.external == 0) groups conversion uses the
8115  *   standard method.
8116  * - Group ids in JUMP action converted with the tunnel conversion.
8117  * - Group id in rule attribute conversion depends on a rule type and
8118  *   group id value:
8119  *   ** non zero group attributes converted with the tunnel method
8120  *   ** zero group attribute in non-tunnel rule is converted using the
8121  *      standard method - there's only one root table
8122  *   ** zero group attribute in steer tunnel rule is converted with the
8123  *      standard method - single root table
8124  *   ** zero group attribute in match tunnel rule is a special OvS
8125  *      case: that value is used for portability reasons. That group
8126  *      id is converted with the tunnel conversion method.
8127  *
8128  * @param[in] dev
8129  *   Port device
8130  * @param[in] tunnel
8131  *   PMD tunnel offload object
8132  * @param[in] group
8133  *   rte_flow group index value.
8134  * @param[out] table
8135  *   HW table value.
8136  * @param[in] grp_info
8137  *   flags used for conversion
8138  * @param[out] error
8139  *   Pointer to error structure.
8140  *
8141  * @return
8142  *   0 on success, a negative errno value otherwise and rte_errno is set.
8143  */
8144 int
8145 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
8146                          const struct mlx5_flow_tunnel *tunnel,
8147                          uint32_t group, uint32_t *table,
8148                          const struct flow_grp_info *grp_info,
8149                          struct rte_flow_error *error)
8150 {
8151         int ret;
8152         bool standard_translation;
8153
8154         if (!grp_info->skip_scale && grp_info->external &&
8155             group < MLX5_MAX_TABLES_EXTERNAL)
8156                 group *= MLX5_FLOW_TABLE_FACTOR;
8157         if (is_tunnel_offload_active(dev)) {
8158                 standard_translation = !grp_info->external ||
8159                                         grp_info->std_tbl_fix;
8160         } else {
8161                 standard_translation = true;
8162         }
8163         DRV_LOG(DEBUG,
8164                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
8165                 dev->data->port_id, group, grp_info->transfer,
8166                 grp_info->external, grp_info->fdb_def_rule,
8167                 standard_translation ? "STANDARD" : "TUNNEL");
8168         if (standard_translation)
8169                 ret = flow_group_to_table(dev->data->port_id, group, table,
8170                                           grp_info, error);
8171         else
8172                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
8173                                                       table, error);
8174
8175         return ret;
8176 }
8177
8178 /**
8179  * Discover availability of metadata reg_c's.
8180  *
8181  * Iteratively use test flows to check availability.
8182  *
8183  * @param[in] dev
8184  *   Pointer to the Ethernet device structure.
8185  *
8186  * @return
8187  *   0 on success, a negative errno value otherwise and rte_errno is set.
8188  */
8189 int
8190 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
8191 {
8192         struct mlx5_priv *priv = dev->data->dev_private;
8193         enum modify_reg idx;
8194         int n = 0;
8195
8196         /* reg_c[0] and reg_c[1] are reserved. */
8197         priv->sh->flow_mreg_c[n++] = REG_C_0;
8198         priv->sh->flow_mreg_c[n++] = REG_C_1;
8199         /* Discover availability of other reg_c's. */
8200         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
8201                 struct rte_flow_attr attr = {
8202                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
8203                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
8204                         .ingress = 1,
8205                 };
8206                 struct rte_flow_item items[] = {
8207                         [0] = {
8208                                 .type = RTE_FLOW_ITEM_TYPE_END,
8209                         },
8210                 };
8211                 struct rte_flow_action actions[] = {
8212                         [0] = {
8213                                 .type = (enum rte_flow_action_type)
8214                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
8215                                 .conf = &(struct mlx5_flow_action_copy_mreg){
8216                                         .src = REG_C_1,
8217                                         .dst = idx,
8218                                 },
8219                         },
8220                         [1] = {
8221                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
8222                                 .conf = &(struct rte_flow_action_jump){
8223                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
8224                                 },
8225                         },
8226                         [2] = {
8227                                 .type = RTE_FLOW_ACTION_TYPE_END,
8228                         },
8229                 };
8230                 uint32_t flow_idx;
8231                 struct rte_flow *flow;
8232                 struct rte_flow_error error;
8233
8234                 if (!priv->config.dv_flow_en)
8235                         break;
8236                 /* Create internal flow, validation skips copy action. */
8237                 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
8238                                         items, actions, false, &error);
8239                 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8240                                       flow_idx);
8241                 if (!flow)
8242                         continue;
8243                 priv->sh->flow_mreg_c[n++] = idx;
8244                 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
8245         }
8246         for (; n < MLX5_MREG_C_NUM; ++n)
8247                 priv->sh->flow_mreg_c[n] = REG_NON;
8248         priv->sh->metadata_regc_check_flag = 1;
8249         return 0;
8250 }
8251
8252 int
8253 save_dump_file(const uint8_t *data, uint32_t size,
8254         uint32_t type, uint64_t id, void *arg, FILE *file)
8255 {
8256         char line[BUF_SIZE];
8257         uint32_t out = 0;
8258         uint32_t k;
8259         uint32_t actions_num;
8260         struct rte_flow_query_count *count;
8261
8262         memset(line, 0, BUF_SIZE);
8263         switch (type) {
8264         case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
8265                 actions_num = *(uint32_t *)(arg);
8266                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",%d,",
8267                                 type, id, actions_num);
8268                 break;
8269         case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
8270                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",",
8271                                 type, id);
8272                 break;
8273         case DR_DUMP_REC_TYPE_PMD_COUNTER:
8274                 count = (struct rte_flow_query_count *)arg;
8275                 fprintf(file,
8276                         "%d,0x%" PRIx64 ",%" PRIu64 ",%" PRIu64 "\n",
8277                         type, id, count->hits, count->bytes);
8278                 return 0;
8279         default:
8280                 return -1;
8281         }
8282
8283         for (k = 0; k < size; k++) {
8284                 /* Make sure we do not overrun the line buffer length. */
8285                 if (out >= BUF_SIZE - 4) {
8286                         line[out] = '\0';
8287                         break;
8288                 }
8289                 out += snprintf(line + out, BUF_SIZE - out, "%02x",
8290                                 (data[k]) & 0xff);
8291         }
8292         fprintf(file, "%s\n", line);
8293         return 0;
8294 }
8295
8296 int
8297 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
8298         struct rte_flow_query_count *count, struct rte_flow_error *error)
8299 {
8300         struct rte_flow_action action[2];
8301         enum mlx5_flow_drv_type ftype;
8302         const struct mlx5_flow_driver_ops *fops;
8303
8304         if (!flow) {
8305                 return rte_flow_error_set(error, ENOENT,
8306                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8307                                 NULL,
8308                                 "invalid flow handle");
8309         }
8310         action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
8311         action[1].type = RTE_FLOW_ACTION_TYPE_END;
8312         if (flow->counter) {
8313                 memset(count, 0, sizeof(struct rte_flow_query_count));
8314                 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
8315                 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
8316                                                 ftype < MLX5_FLOW_TYPE_MAX);
8317                 fops = flow_get_drv_ops(ftype);
8318                 return fops->query(dev, flow, action, count, error);
8319         }
8320         return -1;
8321 }
8322
8323 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8324 /**
8325  * Dump flow ipool data to file
8326  *
8327  * @param[in] dev
8328  *   The pointer to Ethernet device.
8329  * @param[in] file
8330  *   A pointer to a file for output.
8331  * @param[out] error
8332  *   Perform verbose error reporting if not NULL. PMDs initialize this
8333  *   structure in case of error only.
8334  * @return
8335  *   0 on success, a negative value otherwise.
8336  */
8337 int
8338 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
8339         struct rte_flow *flow, FILE *file,
8340         struct rte_flow_error *error)
8341 {
8342         struct mlx5_priv *priv = dev->data->dev_private;
8343         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8344         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8345         uint32_t handle_idx;
8346         struct mlx5_flow_handle *dh;
8347         struct rte_flow_query_count count;
8348         uint32_t actions_num;
8349         const uint8_t *data;
8350         size_t size;
8351         uint64_t id;
8352         uint32_t type;
8353         void *action = NULL;
8354
8355         if (!flow) {
8356                 return rte_flow_error_set(error, ENOENT,
8357                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8358                                 NULL,
8359                                 "invalid flow handle");
8360         }
8361         handle_idx = flow->dev_handles;
8362         while (handle_idx) {
8363                 dh = mlx5_ipool_get(priv->sh->ipool
8364                                 [MLX5_IPOOL_MLX5_FLOW], handle_idx);
8365                 if (!dh)
8366                         continue;
8367                 handle_idx = dh->next.next;
8368
8369                 /* query counter */
8370                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8371                 flow_dv_query_count_ptr(dev, flow->counter,
8372                                                 &action, error);
8373                 if (action) {
8374                         id = (uint64_t)(uintptr_t)action;
8375                         if (!mlx5_flow_query_counter(dev, flow, &count, error))
8376                                 save_dump_file(NULL, 0, type,
8377                                                 id, (void *)&count, file);
8378                 }
8379                 /* Get modify_hdr and encap_decap buf from ipools. */
8380                 encap_decap = NULL;
8381                 modify_hdr = dh->dvh.modify_hdr;
8382
8383                 if (dh->dvh.rix_encap_decap) {
8384                         encap_decap = mlx5_ipool_get(priv->sh->ipool
8385                                                 [MLX5_IPOOL_DECAP_ENCAP],
8386                                                 dh->dvh.rix_encap_decap);
8387                 }
8388                 if (modify_hdr) {
8389                         data = (const uint8_t *)modify_hdr->actions;
8390                         size = (size_t)(modify_hdr->actions_num) * 8;
8391                         id = (uint64_t)(uintptr_t)modify_hdr->action;
8392                         actions_num = modify_hdr->actions_num;
8393                         type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8394                         save_dump_file(data, size, type, id,
8395                                                 (void *)(&actions_num), file);
8396                 }
8397                 if (encap_decap) {
8398                         data = encap_decap->buf;
8399                         size = encap_decap->size;
8400                         id = (uint64_t)(uintptr_t)encap_decap->action;
8401                         type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8402                         save_dump_file(data, size, type,
8403                                                 id, NULL, file);
8404                 }
8405         }
8406         return 0;
8407 }
8408
8409 /**
8410  * Dump all flow's encap_decap/modify_hdr/counter data to file
8411  *
8412  * @param[in] dev
8413  *   The pointer to Ethernet device.
8414  * @param[in] file
8415  *   A pointer to a file for output.
8416  * @param[out] error
8417  *   Perform verbose error reporting if not NULL. PMDs initialize this
8418  *   structure in case of error only.
8419  * @return
8420  *   0 on success, a negative value otherwise.
8421  */
8422 static int
8423 mlx5_flow_dev_dump_sh_all(struct rte_eth_dev *dev,
8424         FILE *file, struct rte_flow_error *error)
8425 {
8426         struct mlx5_priv *priv = dev->data->dev_private;
8427         struct mlx5_dev_ctx_shared *sh = priv->sh;
8428         struct mlx5_hlist *h;
8429         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8430         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8431         struct rte_flow_query_count count;
8432         uint32_t actions_num;
8433         const uint8_t *data;
8434         size_t size;
8435         uint64_t id;
8436         uint32_t type;
8437         uint32_t i;
8438         uint32_t j;
8439         struct mlx5_list_inconst *l_inconst;
8440         struct mlx5_list_entry *e;
8441         int lcore_index;
8442         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
8443         uint32_t max;
8444         void *action;
8445
8446         /* encap_decap hlist is lcore_share, get global core cache. */
8447         i = MLX5_LIST_GLOBAL;
8448         h = sh->encaps_decaps;
8449         if (h) {
8450                 for (j = 0; j <= h->mask; j++) {
8451                         l_inconst = &h->buckets[j].l;
8452                         if (!l_inconst || !l_inconst->cache[i])
8453                                 continue;
8454
8455                         e = LIST_FIRST(&l_inconst->cache[i]->h);
8456                         while (e) {
8457                                 encap_decap =
8458                                 (struct mlx5_flow_dv_encap_decap_resource *)e;
8459                                 data = encap_decap->buf;
8460                                 size = encap_decap->size;
8461                                 id = (uint64_t)(uintptr_t)encap_decap->action;
8462                                 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8463                                 save_dump_file(data, size, type,
8464                                         id, NULL, file);
8465                                 e = LIST_NEXT(e, next);
8466                         }
8467                 }
8468         }
8469
8470         /* get modify_hdr */
8471         h = sh->modify_cmds;
8472         if (h) {
8473                 lcore_index = rte_lcore_index(rte_lcore_id());
8474                 if (unlikely(lcore_index == -1)) {
8475                         lcore_index = MLX5_LIST_NLCORE;
8476                         rte_spinlock_lock(&h->l_const.lcore_lock);
8477                 }
8478                 i = lcore_index;
8479
8480                 for (j = 0; j <= h->mask; j++) {
8481                         l_inconst = &h->buckets[j].l;
8482                         if (!l_inconst || !l_inconst->cache[i])
8483                                 continue;
8484
8485                         e = LIST_FIRST(&l_inconst->cache[i]->h);
8486                         while (e) {
8487                                 modify_hdr =
8488                                 (struct mlx5_flow_dv_modify_hdr_resource *)e;
8489                                 data = (const uint8_t *)modify_hdr->actions;
8490                                 size = (size_t)(modify_hdr->actions_num) * 8;
8491                                 actions_num = modify_hdr->actions_num;
8492                                 id = (uint64_t)(uintptr_t)modify_hdr->action;
8493                                 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8494                                 save_dump_file(data, size, type, id,
8495                                                 (void *)(&actions_num), file);
8496                                 e = LIST_NEXT(e, next);
8497                         }
8498                 }
8499
8500                 if (unlikely(lcore_index == MLX5_LIST_NLCORE))
8501                         rte_spinlock_unlock(&h->l_const.lcore_lock);
8502         }
8503
8504         /* get counter */
8505         MLX5_ASSERT(cmng->n_valid <= cmng->n);
8506         max = MLX5_COUNTERS_PER_POOL * cmng->n_valid;
8507         for (j = 1; j <= max; j++) {
8508                 action = NULL;
8509                 flow_dv_query_count_ptr(dev, j, &action, error);
8510                 if (action) {
8511                         if (!flow_dv_query_count(dev, j, &count, error)) {
8512                                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8513                                 id = (uint64_t)(uintptr_t)action;
8514                                 save_dump_file(NULL, 0, type,
8515                                                 id, (void *)&count, file);
8516                         }
8517                 }
8518         }
8519         return 0;
8520 }
8521 #endif
8522
8523 /**
8524  * Dump flow raw hw data to file
8525  *
8526  * @param[in] dev
8527  *    The pointer to Ethernet device.
8528  * @param[in] file
8529  *   A pointer to a file for output.
8530  * @param[out] error
8531  *   Perform verbose error reporting if not NULL. PMDs initialize this
8532  *   structure in case of error only.
8533  * @return
8534  *   0 on success, a nagative value otherwise.
8535  */
8536 int
8537 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
8538                    FILE *file,
8539                    struct rte_flow_error *error __rte_unused)
8540 {
8541         struct mlx5_priv *priv = dev->data->dev_private;
8542         struct mlx5_dev_ctx_shared *sh = priv->sh;
8543         uint32_t handle_idx;
8544         int ret;
8545         struct mlx5_flow_handle *dh;
8546         struct rte_flow *flow;
8547
8548         if (!priv->config.dv_flow_en) {
8549                 if (fputs("device dv flow disabled\n", file) <= 0)
8550                         return -errno;
8551                 return -ENOTSUP;
8552         }
8553
8554         /* dump all */
8555         if (!flow_idx) {
8556 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8557                 if (mlx5_flow_dev_dump_sh_all(dev, file, error))
8558                         return -EINVAL;
8559 #endif
8560                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
8561                                         sh->rx_domain,
8562                                         sh->tx_domain, file);
8563         }
8564         /* dump one */
8565         flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8566                         (uintptr_t)(void *)flow_idx);
8567         if (!flow)
8568                 return -EINVAL;
8569
8570 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8571         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8572 #endif
8573         handle_idx = flow->dev_handles;
8574         while (handle_idx) {
8575                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8576                                 handle_idx);
8577                 if (!dh)
8578                         return -ENOENT;
8579                 if (dh->drv_flow) {
8580                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
8581                                         file);
8582                         if (ret)
8583                                 return -ENOENT;
8584                 }
8585                 handle_idx = dh->next.next;
8586         }
8587         return 0;
8588 }
8589
8590 /**
8591  * Get aged-out flows.
8592  *
8593  * @param[in] dev
8594  *   Pointer to the Ethernet device structure.
8595  * @param[in] context
8596  *   The address of an array of pointers to the aged-out flows contexts.
8597  * @param[in] nb_countexts
8598  *   The length of context array pointers.
8599  * @param[out] error
8600  *   Perform verbose error reporting if not NULL. Initialized in case of
8601  *   error only.
8602  *
8603  * @return
8604  *   how many contexts get in success, otherwise negative errno value.
8605  *   if nb_contexts is 0, return the amount of all aged contexts.
8606  *   if nb_contexts is not 0 , return the amount of aged flows reported
8607  *   in the context array.
8608  */
8609 int
8610 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
8611                         uint32_t nb_contexts, struct rte_flow_error *error)
8612 {
8613         const struct mlx5_flow_driver_ops *fops;
8614         struct rte_flow_attr attr = { .transfer = 0 };
8615
8616         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8617                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8618                 return fops->get_aged_flows(dev, contexts, nb_contexts,
8619                                                     error);
8620         }
8621         DRV_LOG(ERR,
8622                 "port %u get aged flows is not supported.",
8623                  dev->data->port_id);
8624         return -ENOTSUP;
8625 }
8626
8627 /* Wrapper for driver action_validate op callback */
8628 static int
8629 flow_drv_action_validate(struct rte_eth_dev *dev,
8630                          const struct rte_flow_indir_action_conf *conf,
8631                          const struct rte_flow_action *action,
8632                          const struct mlx5_flow_driver_ops *fops,
8633                          struct rte_flow_error *error)
8634 {
8635         static const char err_msg[] = "indirect action validation unsupported";
8636
8637         if (!fops->action_validate) {
8638                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8639                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8640                                    NULL, err_msg);
8641                 return -rte_errno;
8642         }
8643         return fops->action_validate(dev, conf, action, error);
8644 }
8645
8646 /**
8647  * Destroys the shared action by handle.
8648  *
8649  * @param dev
8650  *   Pointer to Ethernet device structure.
8651  * @param[in] handle
8652  *   Handle for the indirect action object to be destroyed.
8653  * @param[out] error
8654  *   Perform verbose error reporting if not NULL. PMDs initialize this
8655  *   structure in case of error only.
8656  *
8657  * @return
8658  *   0 on success, a negative errno value otherwise and rte_errno is set.
8659  *
8660  * @note: wrapper for driver action_create op callback.
8661  */
8662 static int
8663 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
8664                            struct rte_flow_action_handle *handle,
8665                            struct rte_flow_error *error)
8666 {
8667         static const char err_msg[] = "indirect action destruction unsupported";
8668         struct rte_flow_attr attr = { .transfer = 0 };
8669         const struct mlx5_flow_driver_ops *fops =
8670                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8671
8672         if (!fops->action_destroy) {
8673                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8674                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8675                                    NULL, err_msg);
8676                 return -rte_errno;
8677         }
8678         return fops->action_destroy(dev, handle, error);
8679 }
8680
8681 /* Wrapper for driver action_destroy op callback */
8682 static int
8683 flow_drv_action_update(struct rte_eth_dev *dev,
8684                        struct rte_flow_action_handle *handle,
8685                        const void *update,
8686                        const struct mlx5_flow_driver_ops *fops,
8687                        struct rte_flow_error *error)
8688 {
8689         static const char err_msg[] = "indirect action update unsupported";
8690
8691         if (!fops->action_update) {
8692                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8693                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8694                                    NULL, err_msg);
8695                 return -rte_errno;
8696         }
8697         return fops->action_update(dev, handle, update, error);
8698 }
8699
8700 /* Wrapper for driver action_destroy op callback */
8701 static int
8702 flow_drv_action_query(struct rte_eth_dev *dev,
8703                       const struct rte_flow_action_handle *handle,
8704                       void *data,
8705                       const struct mlx5_flow_driver_ops *fops,
8706                       struct rte_flow_error *error)
8707 {
8708         static const char err_msg[] = "indirect action query unsupported";
8709
8710         if (!fops->action_query) {
8711                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8712                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8713                                    NULL, err_msg);
8714                 return -rte_errno;
8715         }
8716         return fops->action_query(dev, handle, data, error);
8717 }
8718
8719 /**
8720  * Create indirect action for reuse in multiple flow rules.
8721  *
8722  * @param dev
8723  *   Pointer to Ethernet device structure.
8724  * @param conf
8725  *   Pointer to indirect action object configuration.
8726  * @param[in] action
8727  *   Action configuration for indirect action object creation.
8728  * @param[out] error
8729  *   Perform verbose error reporting if not NULL. PMDs initialize this
8730  *   structure in case of error only.
8731  * @return
8732  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
8733  */
8734 static struct rte_flow_action_handle *
8735 mlx5_action_handle_create(struct rte_eth_dev *dev,
8736                           const struct rte_flow_indir_action_conf *conf,
8737                           const struct rte_flow_action *action,
8738                           struct rte_flow_error *error)
8739 {
8740         static const char err_msg[] = "indirect action creation unsupported";
8741         struct rte_flow_attr attr = { .transfer = 0 };
8742         const struct mlx5_flow_driver_ops *fops =
8743                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8744
8745         if (flow_drv_action_validate(dev, conf, action, fops, error))
8746                 return NULL;
8747         if (!fops->action_create) {
8748                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8749                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8750                                    NULL, err_msg);
8751                 return NULL;
8752         }
8753         return fops->action_create(dev, conf, action, error);
8754 }
8755
8756 /**
8757  * Updates inplace the indirect action configuration pointed by *handle*
8758  * with the configuration provided as *update* argument.
8759  * The update of the indirect action configuration effects all flow rules
8760  * reusing the action via handle.
8761  *
8762  * @param dev
8763  *   Pointer to Ethernet device structure.
8764  * @param[in] handle
8765  *   Handle for the indirect action to be updated.
8766  * @param[in] update
8767  *   Action specification used to modify the action pointed by handle.
8768  *   *update* could be of same type with the action pointed by the *handle*
8769  *   handle argument, or some other structures like a wrapper, depending on
8770  *   the indirect action type.
8771  * @param[out] error
8772  *   Perform verbose error reporting if not NULL. PMDs initialize this
8773  *   structure in case of error only.
8774  *
8775  * @return
8776  *   0 on success, a negative errno value otherwise and rte_errno is set.
8777  */
8778 static int
8779 mlx5_action_handle_update(struct rte_eth_dev *dev,
8780                 struct rte_flow_action_handle *handle,
8781                 const void *update,
8782                 struct rte_flow_error *error)
8783 {
8784         struct rte_flow_attr attr = { .transfer = 0 };
8785         const struct mlx5_flow_driver_ops *fops =
8786                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8787         int ret;
8788
8789         ret = flow_drv_action_validate(dev, NULL,
8790                         (const struct rte_flow_action *)update, fops, error);
8791         if (ret)
8792                 return ret;
8793         return flow_drv_action_update(dev, handle, update, fops,
8794                                       error);
8795 }
8796
8797 /**
8798  * Query the indirect action by handle.
8799  *
8800  * This function allows retrieving action-specific data such as counters.
8801  * Data is gathered by special action which may be present/referenced in
8802  * more than one flow rule definition.
8803  *
8804  * see @RTE_FLOW_ACTION_TYPE_COUNT
8805  *
8806  * @param dev
8807  *   Pointer to Ethernet device structure.
8808  * @param[in] handle
8809  *   Handle for the indirect action to query.
8810  * @param[in, out] data
8811  *   Pointer to storage for the associated query data type.
8812  * @param[out] error
8813  *   Perform verbose error reporting if not NULL. PMDs initialize this
8814  *   structure in case of error only.
8815  *
8816  * @return
8817  *   0 on success, a negative errno value otherwise and rte_errno is set.
8818  */
8819 static int
8820 mlx5_action_handle_query(struct rte_eth_dev *dev,
8821                          const struct rte_flow_action_handle *handle,
8822                          void *data,
8823                          struct rte_flow_error *error)
8824 {
8825         struct rte_flow_attr attr = { .transfer = 0 };
8826         const struct mlx5_flow_driver_ops *fops =
8827                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8828
8829         return flow_drv_action_query(dev, handle, data, fops, error);
8830 }
8831
8832 /**
8833  * Destroy all indirect actions (shared RSS).
8834  *
8835  * @param dev
8836  *   Pointer to Ethernet device.
8837  *
8838  * @return
8839  *   0 on success, a negative errno value otherwise and rte_errno is set.
8840  */
8841 int
8842 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8843 {
8844         struct rte_flow_error error;
8845         struct mlx5_priv *priv = dev->data->dev_private;
8846         struct mlx5_shared_action_rss *shared_rss;
8847         int ret = 0;
8848         uint32_t idx;
8849
8850         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8851                       priv->rss_shared_actions, idx, shared_rss, next) {
8852                 ret |= mlx5_action_handle_destroy(dev,
8853                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8854         }
8855         return ret;
8856 }
8857
8858 /**
8859  * Validate existing indirect actions against current device configuration
8860  * and attach them to device resources.
8861  *
8862  * @param dev
8863  *   Pointer to Ethernet device.
8864  *
8865  * @return
8866  *   0 on success, a negative errno value otherwise and rte_errno is set.
8867  */
8868 int
8869 mlx5_action_handle_attach(struct rte_eth_dev *dev)
8870 {
8871         struct mlx5_priv *priv = dev->data->dev_private;
8872         struct mlx5_indexed_pool *ipool =
8873                         priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS];
8874         struct mlx5_shared_action_rss *shared_rss, *shared_rss_last;
8875         int ret = 0;
8876         uint32_t idx;
8877
8878         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8879                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8880                 const char *message;
8881                 uint32_t queue_idx;
8882
8883                 ret = mlx5_validate_rss_queues(dev, ind_tbl->queues,
8884                                                ind_tbl->queues_n,
8885                                                &message, &queue_idx);
8886                 if (ret != 0) {
8887                         DRV_LOG(ERR, "Port %u cannot use queue %u in RSS: %s",
8888                                 dev->data->port_id, ind_tbl->queues[queue_idx],
8889                                 message);
8890                         break;
8891                 }
8892         }
8893         if (ret != 0)
8894                 return ret;
8895         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8896                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8897
8898                 ret = mlx5_ind_table_obj_attach(dev, ind_tbl);
8899                 if (ret != 0) {
8900                         DRV_LOG(ERR, "Port %u could not attach "
8901                                 "indirection table obj %p",
8902                                 dev->data->port_id, (void *)ind_tbl);
8903                         goto error;
8904                 }
8905         }
8906         return 0;
8907 error:
8908         shared_rss_last = shared_rss;
8909         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8910                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8911
8912                 if (shared_rss == shared_rss_last)
8913                         break;
8914                 if (mlx5_ind_table_obj_detach(dev, ind_tbl) != 0)
8915                         DRV_LOG(CRIT, "Port %u could not detach "
8916                                 "indirection table obj %p on rollback",
8917                                 dev->data->port_id, (void *)ind_tbl);
8918         }
8919         return ret;
8920 }
8921
8922 /**
8923  * Detach indirect actions of the device from its resources.
8924  *
8925  * @param dev
8926  *   Pointer to Ethernet device.
8927  *
8928  * @return
8929  *   0 on success, a negative errno value otherwise and rte_errno is set.
8930  */
8931 int
8932 mlx5_action_handle_detach(struct rte_eth_dev *dev)
8933 {
8934         struct mlx5_priv *priv = dev->data->dev_private;
8935         struct mlx5_indexed_pool *ipool =
8936                         priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS];
8937         struct mlx5_shared_action_rss *shared_rss, *shared_rss_last;
8938         int ret = 0;
8939         uint32_t idx;
8940
8941         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8942                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8943
8944                 ret = mlx5_ind_table_obj_detach(dev, ind_tbl);
8945                 if (ret != 0) {
8946                         DRV_LOG(ERR, "Port %u could not detach "
8947                                 "indirection table obj %p",
8948                                 dev->data->port_id, (void *)ind_tbl);
8949                         goto error;
8950                 }
8951         }
8952         return 0;
8953 error:
8954         shared_rss_last = shared_rss;
8955         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8956                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8957
8958                 if (shared_rss == shared_rss_last)
8959                         break;
8960                 if (mlx5_ind_table_obj_attach(dev, ind_tbl) != 0)
8961                         DRV_LOG(CRIT, "Port %u could not attach "
8962                                 "indirection table obj %p on rollback",
8963                                 dev->data->port_id, (void *)ind_tbl);
8964         }
8965         return ret;
8966 }
8967
8968 #ifndef HAVE_MLX5DV_DR
8969 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8970 #else
8971 #define MLX5_DOMAIN_SYNC_FLOW \
8972         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8973 #endif
8974
8975 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8976 {
8977         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8978         const struct mlx5_flow_driver_ops *fops;
8979         int ret;
8980         struct rte_flow_attr attr = { .transfer = 0 };
8981
8982         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8983         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8984         if (ret > 0)
8985                 ret = -ret;
8986         return ret;
8987 }
8988
8989 const struct mlx5_flow_tunnel *
8990 mlx5_get_tof(const struct rte_flow_item *item,
8991              const struct rte_flow_action *action,
8992              enum mlx5_tof_rule_type *rule_type)
8993 {
8994         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
8995                 if (item->type == (typeof(item->type))
8996                                   MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
8997                         *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
8998                         return flow_items_to_tunnel(item);
8999                 }
9000         }
9001         for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
9002                 if (action->type == (typeof(action->type))
9003                                     MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
9004                         *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
9005                         return flow_actions_to_tunnel(action);
9006                 }
9007         }
9008         return NULL;
9009 }
9010
9011 /**
9012  * tunnel offload functionalilty is defined for DV environment only
9013  */
9014 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
9015 __extension__
9016 union tunnel_offload_mark {
9017         uint32_t val;
9018         struct {
9019                 uint32_t app_reserve:8;
9020                 uint32_t table_id:15;
9021                 uint32_t transfer:1;
9022                 uint32_t _unused_:8;
9023         };
9024 };
9025
9026 static bool
9027 mlx5_access_tunnel_offload_db
9028         (struct rte_eth_dev *dev,
9029          bool (*match)(struct rte_eth_dev *,
9030                        struct mlx5_flow_tunnel *, const void *),
9031          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9032          void (*miss)(struct rte_eth_dev *, void *),
9033          void *ctx, bool lock_op);
9034
9035 static int
9036 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
9037                              struct rte_flow *flow,
9038                              const struct rte_flow_attr *attr,
9039                              const struct rte_flow_action *app_actions,
9040                              uint32_t flow_idx,
9041                              const struct mlx5_flow_tunnel *tunnel,
9042                              struct tunnel_default_miss_ctx *ctx,
9043                              struct rte_flow_error *error)
9044 {
9045         struct mlx5_priv *priv = dev->data->dev_private;
9046         struct mlx5_flow *dev_flow;
9047         struct rte_flow_attr miss_attr = *attr;
9048         const struct rte_flow_item miss_items[2] = {
9049                 {
9050                         .type = RTE_FLOW_ITEM_TYPE_ETH,
9051                         .spec = NULL,
9052                         .last = NULL,
9053                         .mask = NULL
9054                 },
9055                 {
9056                         .type = RTE_FLOW_ITEM_TYPE_END,
9057                         .spec = NULL,
9058                         .last = NULL,
9059                         .mask = NULL
9060                 }
9061         };
9062         union tunnel_offload_mark mark_id;
9063         struct rte_flow_action_mark miss_mark;
9064         struct rte_flow_action miss_actions[3] = {
9065                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
9066                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
9067         };
9068         const struct rte_flow_action_jump *jump_data;
9069         uint32_t i, flow_table = 0; /* prevent compilation warning */
9070         struct flow_grp_info grp_info = {
9071                 .external = 1,
9072                 .transfer = attr->transfer,
9073                 .fdb_def_rule = !!priv->fdb_def_rule,
9074                 .std_tbl_fix = 0,
9075         };
9076         int ret;
9077
9078         if (!attr->transfer) {
9079                 uint32_t q_size;
9080
9081                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
9082                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
9083                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
9084                                          0, SOCKET_ID_ANY);
9085                 if (!ctx->queue)
9086                         return rte_flow_error_set
9087                                 (error, ENOMEM,
9088                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9089                                 NULL, "invalid default miss RSS");
9090                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
9091                 ctx->action_rss.level = 0,
9092                 ctx->action_rss.types = priv->rss_conf.rss_hf,
9093                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
9094                 ctx->action_rss.queue_num = priv->reta_idx_n,
9095                 ctx->action_rss.key = priv->rss_conf.rss_key,
9096                 ctx->action_rss.queue = ctx->queue;
9097                 if (!priv->reta_idx_n || !priv->rxqs_n)
9098                         return rte_flow_error_set
9099                                 (error, EINVAL,
9100                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9101                                 NULL, "invalid port configuration");
9102                 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
9103                         ctx->action_rss.types = 0;
9104                 for (i = 0; i != priv->reta_idx_n; ++i)
9105                         ctx->queue[i] = (*priv->reta_idx)[i];
9106         } else {
9107                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
9108                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
9109         }
9110         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
9111         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
9112         jump_data = app_actions->conf;
9113         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
9114         miss_attr.group = jump_data->group;
9115         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
9116                                        &flow_table, &grp_info, error);
9117         if (ret)
9118                 return rte_flow_error_set(error, EINVAL,
9119                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9120                                           NULL, "invalid tunnel id");
9121         mark_id.app_reserve = 0;
9122         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
9123         mark_id.transfer = !!attr->transfer;
9124         mark_id._unused_ = 0;
9125         miss_mark.id = mark_id.val;
9126         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
9127                                     miss_items, miss_actions, flow_idx, error);
9128         if (!dev_flow)
9129                 return -rte_errno;
9130         dev_flow->flow = flow;
9131         dev_flow->external = true;
9132         dev_flow->tunnel = tunnel;
9133         dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
9134         /* Subflow object was created, we must include one in the list. */
9135         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
9136                       dev_flow->handle, next);
9137         DRV_LOG(DEBUG,
9138                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
9139                 dev->data->port_id, tunnel->app_tunnel.type,
9140                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
9141         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
9142                                   miss_actions, error);
9143         if (!ret)
9144                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
9145                                                   error);
9146
9147         return ret;
9148 }
9149
9150 static const struct mlx5_flow_tbl_data_entry  *
9151 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
9152 {
9153         struct mlx5_priv *priv = dev->data->dev_private;
9154         struct mlx5_dev_ctx_shared *sh = priv->sh;
9155         struct mlx5_list_entry *he;
9156         union tunnel_offload_mark mbits = { .val = mark };
9157         union mlx5_flow_tbl_key table_key = {
9158                 {
9159                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
9160                         .id = 0,
9161                         .reserved = 0,
9162                         .dummy = 0,
9163                         .is_fdb = !!mbits.transfer,
9164                         .is_egress = 0,
9165                 }
9166         };
9167         struct mlx5_flow_cb_ctx ctx = {
9168                 .data = &table_key.v64,
9169         };
9170
9171         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
9172         return he ?
9173                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
9174 }
9175
9176 static void
9177 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
9178                                    struct mlx5_list_entry *entry)
9179 {
9180         struct mlx5_dev_ctx_shared *sh = tool_ctx;
9181         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9182
9183         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9184                         tunnel_flow_tbl_to_id(tte->flow_table));
9185         mlx5_free(tte);
9186 }
9187
9188 static int
9189 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
9190                                   struct mlx5_list_entry *entry, void *cb_ctx)
9191 {
9192         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9193         union tunnel_tbl_key tbl = {
9194                 .val = *(uint64_t *)(ctx->data),
9195         };
9196         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9197
9198         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
9199 }
9200
9201 static struct mlx5_list_entry *
9202 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
9203 {
9204         struct mlx5_dev_ctx_shared *sh = tool_ctx;
9205         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9206         struct tunnel_tbl_entry *tte;
9207         union tunnel_tbl_key tbl = {
9208                 .val = *(uint64_t *)(ctx->data),
9209         };
9210
9211         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
9212                           sizeof(*tte), 0,
9213                           SOCKET_ID_ANY);
9214         if (!tte)
9215                 goto err;
9216         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9217                           &tte->flow_table);
9218         if (tte->flow_table >= MLX5_MAX_TABLES) {
9219                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
9220                         tte->flow_table);
9221                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9222                                 tte->flow_table);
9223                 goto err;
9224         } else if (!tte->flow_table) {
9225                 goto err;
9226         }
9227         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
9228         tte->tunnel_id = tbl.tunnel_id;
9229         tte->group = tbl.group;
9230         return &tte->hash;
9231 err:
9232         if (tte)
9233                 mlx5_free(tte);
9234         return NULL;
9235 }
9236
9237 static struct mlx5_list_entry *
9238 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
9239                                   struct mlx5_list_entry *oentry,
9240                                   void *cb_ctx __rte_unused)
9241 {
9242         struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
9243                                                    0, SOCKET_ID_ANY);
9244
9245         if (!tte)
9246                 return NULL;
9247         memcpy(tte, oentry, sizeof(*tte));
9248         return &tte->hash;
9249 }
9250
9251 static void
9252 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
9253                                        struct mlx5_list_entry *entry)
9254 {
9255         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9256
9257         mlx5_free(tte);
9258 }
9259
9260 static uint32_t
9261 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
9262                                 const struct mlx5_flow_tunnel *tunnel,
9263                                 uint32_t group, uint32_t *table,
9264                                 struct rte_flow_error *error)
9265 {
9266         struct mlx5_list_entry *he;
9267         struct tunnel_tbl_entry *tte;
9268         union tunnel_tbl_key key = {
9269                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
9270                 .group = group
9271         };
9272         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9273         struct mlx5_hlist *group_hash;
9274         struct mlx5_flow_cb_ctx ctx = {
9275                 .data = &key.val,
9276         };
9277
9278         group_hash = tunnel ? tunnel->groups : thub->groups;
9279         he = mlx5_hlist_register(group_hash, key.val, &ctx);
9280         if (!he)
9281                 return rte_flow_error_set(error, EINVAL,
9282                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
9283                                           NULL,
9284                                           "tunnel group index not supported");
9285         tte = container_of(he, typeof(*tte), hash);
9286         *table = tte->flow_table;
9287         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
9288                 dev->data->port_id, key.tunnel_id, group, *table);
9289         return 0;
9290 }
9291
9292 static void
9293 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
9294                       struct mlx5_flow_tunnel *tunnel)
9295 {
9296         struct mlx5_priv *priv = dev->data->dev_private;
9297         struct mlx5_indexed_pool *ipool;
9298
9299         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
9300                 dev->data->port_id, tunnel->tunnel_id);
9301         LIST_REMOVE(tunnel, chain);
9302         mlx5_hlist_destroy(tunnel->groups);
9303         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
9304         mlx5_ipool_free(ipool, tunnel->tunnel_id);
9305 }
9306
9307 static bool
9308 mlx5_access_tunnel_offload_db
9309         (struct rte_eth_dev *dev,
9310          bool (*match)(struct rte_eth_dev *,
9311                        struct mlx5_flow_tunnel *, const void *),
9312          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9313          void (*miss)(struct rte_eth_dev *, void *),
9314          void *ctx, bool lock_op)
9315 {
9316         bool verdict = false;
9317         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9318         struct mlx5_flow_tunnel *tunnel;
9319
9320         rte_spinlock_lock(&thub->sl);
9321         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
9322                 verdict = match(dev, tunnel, (const void *)ctx);
9323                 if (verdict)
9324                         break;
9325         }
9326         if (!lock_op)
9327                 rte_spinlock_unlock(&thub->sl);
9328         if (verdict && hit)
9329                 hit(dev, tunnel, ctx);
9330         if (!verdict && miss)
9331                 miss(dev, ctx);
9332         if (lock_op)
9333                 rte_spinlock_unlock(&thub->sl);
9334
9335         return verdict;
9336 }
9337
9338 struct tunnel_db_find_tunnel_id_ctx {
9339         uint32_t tunnel_id;
9340         struct mlx5_flow_tunnel *tunnel;
9341 };
9342
9343 static bool
9344 find_tunnel_id_match(struct rte_eth_dev *dev,
9345                      struct mlx5_flow_tunnel *tunnel, const void *x)
9346 {
9347         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9348
9349         RTE_SET_USED(dev);
9350         return tunnel->tunnel_id == ctx->tunnel_id;
9351 }
9352
9353 static void
9354 find_tunnel_id_hit(struct rte_eth_dev *dev,
9355                    struct mlx5_flow_tunnel *tunnel, void *x)
9356 {
9357         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9358         RTE_SET_USED(dev);
9359         ctx->tunnel = tunnel;
9360 }
9361
9362 static struct mlx5_flow_tunnel *
9363 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
9364 {
9365         struct tunnel_db_find_tunnel_id_ctx ctx = {
9366                 .tunnel_id = id,
9367         };
9368
9369         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
9370                                       find_tunnel_id_hit, NULL, &ctx, true);
9371
9372         return ctx.tunnel;
9373 }
9374
9375 static struct mlx5_flow_tunnel *
9376 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
9377                           const struct rte_flow_tunnel *app_tunnel)
9378 {
9379         struct mlx5_priv *priv = dev->data->dev_private;
9380         struct mlx5_indexed_pool *ipool;
9381         struct mlx5_flow_tunnel *tunnel;
9382         uint32_t id;
9383
9384         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
9385         tunnel = mlx5_ipool_zmalloc(ipool, &id);
9386         if (!tunnel)
9387                 return NULL;
9388         if (id >= MLX5_MAX_TUNNELS) {
9389                 mlx5_ipool_free(ipool, id);
9390                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
9391                 return NULL;
9392         }
9393         tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
9394                                            priv->sh,
9395                                            mlx5_flow_tunnel_grp2tbl_create_cb,
9396                                            mlx5_flow_tunnel_grp2tbl_match_cb,
9397                                            mlx5_flow_tunnel_grp2tbl_remove_cb,
9398                                            mlx5_flow_tunnel_grp2tbl_clone_cb,
9399                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9400         if (!tunnel->groups) {
9401                 mlx5_ipool_free(ipool, id);
9402                 return NULL;
9403         }
9404         /* initiate new PMD tunnel */
9405         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
9406         tunnel->tunnel_id = id;
9407         tunnel->action.type = (typeof(tunnel->action.type))
9408                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
9409         tunnel->action.conf = tunnel;
9410         tunnel->item.type = (typeof(tunnel->item.type))
9411                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
9412         tunnel->item.spec = tunnel;
9413         tunnel->item.last = NULL;
9414         tunnel->item.mask = NULL;
9415
9416         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
9417                 dev->data->port_id, tunnel->tunnel_id);
9418
9419         return tunnel;
9420 }
9421
9422 struct tunnel_db_get_tunnel_ctx {
9423         const struct rte_flow_tunnel *app_tunnel;
9424         struct mlx5_flow_tunnel *tunnel;
9425 };
9426
9427 static bool get_tunnel_match(struct rte_eth_dev *dev,
9428                              struct mlx5_flow_tunnel *tunnel, const void *x)
9429 {
9430         const struct tunnel_db_get_tunnel_ctx *ctx = x;
9431
9432         RTE_SET_USED(dev);
9433         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
9434                        sizeof(*ctx->app_tunnel));
9435 }
9436
9437 static void get_tunnel_hit(struct rte_eth_dev *dev,
9438                            struct mlx5_flow_tunnel *tunnel, void *x)
9439 {
9440         /* called under tunnel spinlock protection */
9441         struct tunnel_db_get_tunnel_ctx *ctx = x;
9442
9443         RTE_SET_USED(dev);
9444         tunnel->refctn++;
9445         ctx->tunnel = tunnel;
9446 }
9447
9448 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
9449 {
9450         /* called under tunnel spinlock protection */
9451         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9452         struct tunnel_db_get_tunnel_ctx *ctx = x;
9453
9454         rte_spinlock_unlock(&thub->sl);
9455         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
9456         rte_spinlock_lock(&thub->sl);
9457         if (ctx->tunnel) {
9458                 ctx->tunnel->refctn = 1;
9459                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
9460         }
9461 }
9462
9463
9464 static int
9465 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
9466                      const struct rte_flow_tunnel *app_tunnel,
9467                      struct mlx5_flow_tunnel **tunnel)
9468 {
9469         struct tunnel_db_get_tunnel_ctx ctx = {
9470                 .app_tunnel = app_tunnel,
9471         };
9472
9473         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
9474                                       get_tunnel_miss, &ctx, true);
9475         *tunnel = ctx.tunnel;
9476         return ctx.tunnel ? 0 : -ENOMEM;
9477 }
9478
9479 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
9480 {
9481         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
9482
9483         if (!thub)
9484                 return;
9485         if (!LIST_EMPTY(&thub->tunnels))
9486                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
9487         mlx5_hlist_destroy(thub->groups);
9488         mlx5_free(thub);
9489 }
9490
9491 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
9492 {
9493         int err;
9494         struct mlx5_flow_tunnel_hub *thub;
9495
9496         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
9497                            0, SOCKET_ID_ANY);
9498         if (!thub)
9499                 return -ENOMEM;
9500         LIST_INIT(&thub->tunnels);
9501         rte_spinlock_init(&thub->sl);
9502         thub->groups = mlx5_hlist_create("flow groups", 64,
9503                                          false, true, sh,
9504                                          mlx5_flow_tunnel_grp2tbl_create_cb,
9505                                          mlx5_flow_tunnel_grp2tbl_match_cb,
9506                                          mlx5_flow_tunnel_grp2tbl_remove_cb,
9507                                          mlx5_flow_tunnel_grp2tbl_clone_cb,
9508                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9509         if (!thub->groups) {
9510                 err = -rte_errno;
9511                 goto err;
9512         }
9513         sh->tunnel_hub = thub;
9514
9515         return 0;
9516
9517 err:
9518         if (thub->groups)
9519                 mlx5_hlist_destroy(thub->groups);
9520         if (thub)
9521                 mlx5_free(thub);
9522         return err;
9523 }
9524
9525 static inline int
9526 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
9527                           struct rte_flow_tunnel *tunnel,
9528                           struct rte_flow_error *error)
9529 {
9530         struct mlx5_priv *priv = dev->data->dev_private;
9531
9532         if (!priv->config.dv_flow_en)
9533                 return rte_flow_error_set(error, ENOTSUP,
9534                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9535                                           "flow DV interface is off");
9536         if (!is_tunnel_offload_active(dev))
9537                 return rte_flow_error_set(error, ENOTSUP,
9538                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9539                                           "tunnel offload was not activated");
9540         if (!tunnel)
9541                 return rte_flow_error_set(error, EINVAL,
9542                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9543                                           "no application tunnel");
9544         switch (tunnel->type) {
9545         default:
9546                 return rte_flow_error_set(error, EINVAL,
9547                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9548                                           "unsupported tunnel type");
9549         case RTE_FLOW_ITEM_TYPE_VXLAN:
9550         case RTE_FLOW_ITEM_TYPE_GRE:
9551         case RTE_FLOW_ITEM_TYPE_NVGRE:
9552         case RTE_FLOW_ITEM_TYPE_GENEVE:
9553                 break;
9554         }
9555         return 0;
9556 }
9557
9558 static int
9559 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
9560                     struct rte_flow_tunnel *app_tunnel,
9561                     struct rte_flow_action **actions,
9562                     uint32_t *num_of_actions,
9563                     struct rte_flow_error *error)
9564 {
9565         struct mlx5_flow_tunnel *tunnel;
9566         int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error);
9567
9568         if (ret)
9569                 return ret;
9570         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9571         if (ret < 0) {
9572                 return rte_flow_error_set(error, ret,
9573                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9574                                           "failed to initialize pmd tunnel");
9575         }
9576         *actions = &tunnel->action;
9577         *num_of_actions = 1;
9578         return 0;
9579 }
9580
9581 static int
9582 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
9583                        struct rte_flow_tunnel *app_tunnel,
9584                        struct rte_flow_item **items,
9585                        uint32_t *num_of_items,
9586                        struct rte_flow_error *error)
9587 {
9588         struct mlx5_flow_tunnel *tunnel;
9589         int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error);
9590
9591         if (ret)
9592                 return ret;
9593         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9594         if (ret < 0) {
9595                 return rte_flow_error_set(error, ret,
9596                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9597                                           "failed to initialize pmd tunnel");
9598         }
9599         *items = &tunnel->item;
9600         *num_of_items = 1;
9601         return 0;
9602 }
9603
9604 struct tunnel_db_element_release_ctx {
9605         struct rte_flow_item *items;
9606         struct rte_flow_action *actions;
9607         uint32_t num_elements;
9608         struct rte_flow_error *error;
9609         int ret;
9610 };
9611
9612 static bool
9613 tunnel_element_release_match(struct rte_eth_dev *dev,
9614                              struct mlx5_flow_tunnel *tunnel, const void *x)
9615 {
9616         const struct tunnel_db_element_release_ctx *ctx = x;
9617
9618         RTE_SET_USED(dev);
9619         if (ctx->num_elements != 1)
9620                 return false;
9621         else if (ctx->items)
9622                 return ctx->items == &tunnel->item;
9623         else if (ctx->actions)
9624                 return ctx->actions == &tunnel->action;
9625
9626         return false;
9627 }
9628
9629 static void
9630 tunnel_element_release_hit(struct rte_eth_dev *dev,
9631                            struct mlx5_flow_tunnel *tunnel, void *x)
9632 {
9633         struct tunnel_db_element_release_ctx *ctx = x;
9634         ctx->ret = 0;
9635         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
9636                 mlx5_flow_tunnel_free(dev, tunnel);
9637 }
9638
9639 static void
9640 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
9641 {
9642         struct tunnel_db_element_release_ctx *ctx = x;
9643         RTE_SET_USED(dev);
9644         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
9645                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9646                                       "invalid argument");
9647 }
9648
9649 static int
9650 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
9651                        struct rte_flow_item *pmd_items,
9652                        uint32_t num_items, struct rte_flow_error *err)
9653 {
9654         struct tunnel_db_element_release_ctx ctx = {
9655                 .items = pmd_items,
9656                 .actions = NULL,
9657                 .num_elements = num_items,
9658                 .error = err,
9659         };
9660
9661         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9662                                       tunnel_element_release_hit,
9663                                       tunnel_element_release_miss, &ctx, false);
9664
9665         return ctx.ret;
9666 }
9667
9668 static int
9669 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
9670                          struct rte_flow_action *pmd_actions,
9671                          uint32_t num_actions, struct rte_flow_error *err)
9672 {
9673         struct tunnel_db_element_release_ctx ctx = {
9674                 .items = NULL,
9675                 .actions = pmd_actions,
9676                 .num_elements = num_actions,
9677                 .error = err,
9678         };
9679
9680         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9681                                       tunnel_element_release_hit,
9682                                       tunnel_element_release_miss, &ctx, false);
9683
9684         return ctx.ret;
9685 }
9686
9687 static int
9688 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
9689                                   struct rte_mbuf *m,
9690                                   struct rte_flow_restore_info *info,
9691                                   struct rte_flow_error *err)
9692 {
9693         uint64_t ol_flags = m->ol_flags;
9694         const struct mlx5_flow_tbl_data_entry *tble;
9695         const uint64_t mask = RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID;
9696
9697         if (!is_tunnel_offload_active(dev)) {
9698                 info->flags = 0;
9699                 return 0;
9700         }
9701
9702         if ((ol_flags & mask) != mask)
9703                 goto err;
9704         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
9705         if (!tble) {
9706                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
9707                         dev->data->port_id, m->hash.fdir.hi);
9708                 goto err;
9709         }
9710         MLX5_ASSERT(tble->tunnel);
9711         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
9712         info->group_id = tble->group_id;
9713         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
9714                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
9715                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
9716
9717         return 0;
9718
9719 err:
9720         return rte_flow_error_set(err, EINVAL,
9721                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9722                                   "failed to get restore info");
9723 }
9724
9725 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
9726 static int
9727 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
9728                            __rte_unused struct rte_flow_tunnel *app_tunnel,
9729                            __rte_unused struct rte_flow_action **actions,
9730                            __rte_unused uint32_t *num_of_actions,
9731                            __rte_unused struct rte_flow_error *error)
9732 {
9733         return -ENOTSUP;
9734 }
9735
9736 static int
9737 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
9738                        __rte_unused struct rte_flow_tunnel *app_tunnel,
9739                        __rte_unused struct rte_flow_item **items,
9740                        __rte_unused uint32_t *num_of_items,
9741                        __rte_unused struct rte_flow_error *error)
9742 {
9743         return -ENOTSUP;
9744 }
9745
9746 static int
9747 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
9748                               __rte_unused struct rte_flow_item *pmd_items,
9749                               __rte_unused uint32_t num_items,
9750                               __rte_unused struct rte_flow_error *err)
9751 {
9752         return -ENOTSUP;
9753 }
9754
9755 static int
9756 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
9757                                 __rte_unused struct rte_flow_action *pmd_action,
9758                                 __rte_unused uint32_t num_actions,
9759                                 __rte_unused struct rte_flow_error *err)
9760 {
9761         return -ENOTSUP;
9762 }
9763
9764 static int
9765 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
9766                                   __rte_unused struct rte_mbuf *m,
9767                                   __rte_unused struct rte_flow_restore_info *i,
9768                                   __rte_unused struct rte_flow_error *err)
9769 {
9770         return -ENOTSUP;
9771 }
9772
9773 static int
9774 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
9775                              __rte_unused struct rte_flow *flow,
9776                              __rte_unused const struct rte_flow_attr *attr,
9777                              __rte_unused const struct rte_flow_action *actions,
9778                              __rte_unused uint32_t flow_idx,
9779                              __rte_unused const struct mlx5_flow_tunnel *tunnel,
9780                              __rte_unused struct tunnel_default_miss_ctx *ctx,
9781                              __rte_unused struct rte_flow_error *error)
9782 {
9783         return -ENOTSUP;
9784 }
9785
9786 static struct mlx5_flow_tunnel *
9787 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
9788                     __rte_unused uint32_t id)
9789 {
9790         return NULL;
9791 }
9792
9793 static void
9794 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
9795                       __rte_unused struct mlx5_flow_tunnel *tunnel)
9796 {
9797 }
9798
9799 static uint32_t
9800 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
9801                                 __rte_unused const struct mlx5_flow_tunnel *t,
9802                                 __rte_unused uint32_t group,
9803                                 __rte_unused uint32_t *table,
9804                                 struct rte_flow_error *error)
9805 {
9806         return rte_flow_error_set(error, ENOTSUP,
9807                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9808                                   "tunnel offload requires DV support");
9809 }
9810
9811 void
9812 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
9813                         __rte_unused  uint16_t port_id)
9814 {
9815 }
9816 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
9817
9818 /* Flex flow item API */
9819 static struct rte_flow_item_flex_handle *
9820 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
9821                            const struct rte_flow_item_flex_conf *conf,
9822                            struct rte_flow_error *error)
9823 {
9824         static const char err_msg[] = "flex item creation unsupported";
9825         struct rte_flow_attr attr = { .transfer = 0 };
9826         const struct mlx5_flow_driver_ops *fops =
9827                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9828
9829         if (!fops->item_create) {
9830                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9831                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9832                                    NULL, err_msg);
9833                 return NULL;
9834         }
9835         return fops->item_create(dev, conf, error);
9836 }
9837
9838 static int
9839 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
9840                             const struct rte_flow_item_flex_handle *handle,
9841                             struct rte_flow_error *error)
9842 {
9843         static const char err_msg[] = "flex item release unsupported";
9844         struct rte_flow_attr attr = { .transfer = 0 };
9845         const struct mlx5_flow_driver_ops *fops =
9846                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9847
9848         if (!fops->item_release) {
9849                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9850                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9851                                    NULL, err_msg);
9852                 return -rte_errno;
9853         }
9854         return fops->item_release(dev, handle, error);
9855 }
9856
9857 static void
9858 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
9859 {
9860         int ret;
9861         struct rte_flow_error error;
9862
9863         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9864                 char *item_name;
9865                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
9866                                     sizeof(item_name),
9867                                     (void *)(uintptr_t)item->type, &error);
9868                 if (ret > 0)
9869                         printf("%s ", item_name);
9870                 else
9871                         printf("%d\n", (int)item->type);
9872         }
9873         printf("END\n");
9874 }
9875
9876 static int
9877 mlx5_flow_is_std_vxlan_port(const struct rte_flow_item *udp_item)
9878 {
9879         const struct rte_flow_item_udp *spec = udp_item->spec;
9880         const struct rte_flow_item_udp *mask = udp_item->mask;
9881         uint16_t udp_dport = 0;
9882
9883         if (spec != NULL) {
9884                 if (!mask)
9885                         mask = &rte_flow_item_udp_mask;
9886                 udp_dport = rte_be_to_cpu_16(spec->hdr.dst_port &
9887                                 mask->hdr.dst_port);
9888         }
9889         return (!udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN);
9890 }
9891
9892 static const struct mlx5_flow_expand_node *
9893 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
9894                 unsigned int item_idx,
9895                 const struct mlx5_flow_expand_node graph[],
9896                 const struct mlx5_flow_expand_node *node)
9897 {
9898         const struct rte_flow_item *item = pattern + item_idx, *prev_item;
9899
9900         if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN &&
9901                         node != NULL &&
9902                         node->type == RTE_FLOW_ITEM_TYPE_VXLAN) {
9903                 /*
9904                  * The expansion node is VXLAN and it is also the last
9905                  * expandable item in the pattern, so need to continue
9906                  * expansion of the inner tunnel.
9907                  */
9908                 MLX5_ASSERT(item_idx > 0);
9909                 prev_item = pattern + item_idx - 1;
9910                 MLX5_ASSERT(prev_item->type == RTE_FLOW_ITEM_TYPE_UDP);
9911                 if (mlx5_flow_is_std_vxlan_port(prev_item))
9912                         return &graph[MLX5_EXPANSION_STD_VXLAN];
9913                 return &graph[MLX5_EXPANSION_L3_VXLAN];
9914         }
9915         return node;
9916 }
9917
9918 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
9919 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
9920         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
9921 };
9922
9923 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
9924 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
9925         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
9926         { 9, 10, 11 }, { 12, 13, 14 },
9927 };
9928
9929 /**
9930  * Discover the number of available flow priorities.
9931  *
9932  * @param dev
9933  *   Ethernet device.
9934  *
9935  * @return
9936  *   On success, number of available flow priorities.
9937  *   On failure, a negative errno-style code and rte_errno is set.
9938  */
9939 int
9940 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
9941 {
9942         static const uint16_t vprio[] = {8, 16};
9943         const struct mlx5_priv *priv = dev->data->dev_private;
9944         const struct mlx5_flow_driver_ops *fops;
9945         enum mlx5_flow_drv_type type;
9946         int ret;
9947
9948         type = mlx5_flow_os_get_type();
9949         if (type == MLX5_FLOW_TYPE_MAX) {
9950                 type = MLX5_FLOW_TYPE_VERBS;
9951                 if (priv->sh->devx && priv->config.dv_flow_en)
9952                         type = MLX5_FLOW_TYPE_DV;
9953         }
9954         fops = flow_get_drv_ops(type);
9955         if (fops->discover_priorities == NULL) {
9956                 DRV_LOG(ERR, "Priority discovery not supported");
9957                 rte_errno = ENOTSUP;
9958                 return -rte_errno;
9959         }
9960         ret = fops->discover_priorities(dev, vprio, RTE_DIM(vprio));
9961         if (ret < 0)
9962                 return ret;
9963         switch (ret) {
9964         case 8:
9965                 ret = RTE_DIM(priority_map_3);
9966                 break;
9967         case 16:
9968                 ret = RTE_DIM(priority_map_5);
9969                 break;
9970         default:
9971                 rte_errno = ENOTSUP;
9972                 DRV_LOG(ERR,
9973                         "port %u maximum priority: %d expected 8/16",
9974                         dev->data->port_id, ret);
9975                 return -rte_errno;
9976         }
9977         DRV_LOG(INFO, "port %u supported flow priorities:"
9978                 " 0-%d for ingress or egress root table,"
9979                 " 0-%d for non-root table or transfer root table.",
9980                 dev->data->port_id, ret - 2,
9981                 MLX5_NON_ROOT_FLOW_MAX_PRIO - 1);
9982         return ret;
9983 }
9984
9985 /**
9986  * Adjust flow priority based on the highest layer and the request priority.
9987  *
9988  * @param[in] dev
9989  *   Pointer to the Ethernet device structure.
9990  * @param[in] priority
9991  *   The rule base priority.
9992  * @param[in] subpriority
9993  *   The priority based on the items.
9994  *
9995  * @return
9996  *   The new priority.
9997  */
9998 uint32_t
9999 mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
10000                           uint32_t subpriority)
10001 {
10002         uint32_t res = 0;
10003         struct mlx5_priv *priv = dev->data->dev_private;
10004
10005         switch (priv->sh->flow_max_priority) {
10006         case RTE_DIM(priority_map_3):
10007                 res = priority_map_3[priority][subpriority];
10008                 break;
10009         case RTE_DIM(priority_map_5):
10010                 res = priority_map_5[priority][subpriority];
10011                 break;
10012         }
10013         return  res;
10014 }