1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2016 6WIND S.A.
3 * Copyright 2016 Mellanox Technologies, Ltd
6 #include <netinet/in.h>
13 #include <rte_common.h>
14 #include <rte_ether.h>
15 #include <rte_ethdev_driver.h>
16 #include <rte_eal_paging.h>
18 #include <rte_cycles.h>
19 #include <rte_flow_driver.h>
20 #include <rte_malloc.h>
23 #include <mlx5_glue.h>
24 #include <mlx5_devx_cmds.h>
26 #include <mlx5_malloc.h>
28 #include "mlx5_defs.h"
30 #include "mlx5_flow.h"
31 #include "mlx5_flow_os.h"
32 #include "mlx5_rxtx.h"
33 #include "mlx5_common_os.h"
34 #include "rte_pmd_mlx5.h"
36 static struct mlx5_flow_tunnel *
37 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
39 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
40 static const struct mlx5_flow_tbl_data_entry *
41 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark);
43 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
44 const struct rte_flow_tunnel *app_tunnel,
45 struct mlx5_flow_tunnel **tunnel);
46 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
47 static void mlx5_flow_pop_thread_workspace(void);
50 /** Device flow drivers. */
51 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
53 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
55 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
56 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
57 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
58 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
60 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
61 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
64 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
65 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
70 /** Node object of input graph for mlx5_flow_expand_rss(). */
71 struct mlx5_flow_expand_node {
72 const int *const next;
74 * List of next node indexes. Index 0 is interpreted as a terminator.
76 const enum rte_flow_item_type type;
77 /**< Pattern item type of current node. */
80 * RSS types bit-field associated with this node
81 * (see ETH_RSS_* definitions).
85 /** Object returned by mlx5_flow_expand_rss(). */
86 struct mlx5_flow_expand_rss {
88 /**< Number of entries @p patterns and @p priorities. */
90 struct rte_flow_item *pattern; /**< Expanded pattern array. */
91 uint32_t priority; /**< Priority offset for each expansion. */
95 static enum rte_flow_item_type
96 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
98 enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
99 uint16_t ether_type = 0;
100 uint16_t ether_type_m;
101 uint8_t ip_next_proto = 0;
102 uint8_t ip_next_proto_m;
104 if (item == NULL || item->spec == NULL)
106 switch (item->type) {
107 case RTE_FLOW_ITEM_TYPE_ETH:
109 ether_type_m = ((const struct rte_flow_item_eth *)
112 ether_type_m = rte_flow_item_eth_mask.type;
113 if (ether_type_m != RTE_BE16(0xFFFF))
115 ether_type = ((const struct rte_flow_item_eth *)
117 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
118 ret = RTE_FLOW_ITEM_TYPE_IPV4;
119 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
120 ret = RTE_FLOW_ITEM_TYPE_IPV6;
121 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
122 ret = RTE_FLOW_ITEM_TYPE_VLAN;
124 ret = RTE_FLOW_ITEM_TYPE_END;
126 case RTE_FLOW_ITEM_TYPE_VLAN:
128 ether_type_m = ((const struct rte_flow_item_vlan *)
129 (item->mask))->inner_type;
131 ether_type_m = rte_flow_item_vlan_mask.inner_type;
132 if (ether_type_m != RTE_BE16(0xFFFF))
134 ether_type = ((const struct rte_flow_item_vlan *)
135 (item->spec))->inner_type;
136 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
137 ret = RTE_FLOW_ITEM_TYPE_IPV4;
138 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
139 ret = RTE_FLOW_ITEM_TYPE_IPV6;
140 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
141 ret = RTE_FLOW_ITEM_TYPE_VLAN;
143 ret = RTE_FLOW_ITEM_TYPE_END;
145 case RTE_FLOW_ITEM_TYPE_IPV4:
147 ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
148 (item->mask))->hdr.next_proto_id;
151 rte_flow_item_ipv4_mask.hdr.next_proto_id;
152 if (ip_next_proto_m != 0xFF)
154 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
155 (item->spec))->hdr.next_proto_id;
156 if (ip_next_proto == IPPROTO_UDP)
157 ret = RTE_FLOW_ITEM_TYPE_UDP;
158 else if (ip_next_proto == IPPROTO_TCP)
159 ret = RTE_FLOW_ITEM_TYPE_TCP;
160 else if (ip_next_proto == IPPROTO_IP)
161 ret = RTE_FLOW_ITEM_TYPE_IPV4;
162 else if (ip_next_proto == IPPROTO_IPV6)
163 ret = RTE_FLOW_ITEM_TYPE_IPV6;
165 ret = RTE_FLOW_ITEM_TYPE_END;
167 case RTE_FLOW_ITEM_TYPE_IPV6:
169 ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
170 (item->mask))->hdr.proto;
173 rte_flow_item_ipv6_mask.hdr.proto;
174 if (ip_next_proto_m != 0xFF)
176 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
177 (item->spec))->hdr.proto;
178 if (ip_next_proto == IPPROTO_UDP)
179 ret = RTE_FLOW_ITEM_TYPE_UDP;
180 else if (ip_next_proto == IPPROTO_TCP)
181 ret = RTE_FLOW_ITEM_TYPE_TCP;
182 else if (ip_next_proto == IPPROTO_IP)
183 ret = RTE_FLOW_ITEM_TYPE_IPV4;
184 else if (ip_next_proto == IPPROTO_IPV6)
185 ret = RTE_FLOW_ITEM_TYPE_IPV6;
187 ret = RTE_FLOW_ITEM_TYPE_END;
190 ret = RTE_FLOW_ITEM_TYPE_VOID;
197 * Expand RSS flows into several possible flows according to the RSS hash
198 * fields requested and the driver capabilities.
201 * Buffer to store the result expansion.
203 * Buffer size in bytes. If 0, @p buf can be NULL.
207 * RSS types to expand (see ETH_RSS_* definitions).
209 * Input graph to expand @p pattern according to @p types.
210 * @param[in] graph_root_index
211 * Index of root node in @p graph, typically 0.
214 * A positive value representing the size of @p buf in bytes regardless of
215 * @p size on success, a negative errno value otherwise and rte_errno is
216 * set, the following errors are defined:
218 * -E2BIG: graph-depth @p graph is too deep.
221 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
222 const struct rte_flow_item *pattern, uint64_t types,
223 const struct mlx5_flow_expand_node graph[],
224 int graph_root_index)
227 const struct rte_flow_item *item;
228 const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
229 const int *next_node;
230 const int *stack[elt_n];
232 struct rte_flow_item flow_items[elt_n];
235 size_t user_pattern_size = 0;
237 const struct mlx5_flow_expand_node *next = NULL;
238 struct rte_flow_item missed_item;
241 const struct rte_flow_item *last_item = NULL;
243 memset(&missed_item, 0, sizeof(missed_item));
244 lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
245 elt_n * sizeof(buf->entry[0]);
247 buf->entry[0].priority = 0;
248 buf->entry[0].pattern = (void *)&buf->entry[elt_n];
250 addr = buf->entry[0].pattern;
252 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
253 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
255 for (i = 0; node->next && node->next[i]; ++i) {
256 next = &graph[node->next[i]];
257 if (next->type == item->type)
262 user_pattern_size += sizeof(*item);
264 user_pattern_size += sizeof(*item); /* Handle END item. */
265 lsize += user_pattern_size;
266 /* Copy the user pattern in the first entry of the buffer. */
268 rte_memcpy(addr, pattern, user_pattern_size);
269 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
272 /* Start expanding. */
273 memset(flow_items, 0, sizeof(flow_items));
274 user_pattern_size -= sizeof(*item);
276 * Check if the last valid item has spec set, need complete pattern,
277 * and the pattern can be used for expansion.
279 missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
280 if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
281 /* Item type END indicates expansion is not required. */
284 if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
287 for (i = 0; node->next && node->next[i]; ++i) {
288 next = &graph[node->next[i]];
289 if (next->type == missed_item.type) {
290 flow_items[0].type = missed_item.type;
291 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
297 if (next && missed) {
298 elt = 2; /* missed item + item end. */
300 lsize += elt * sizeof(*item) + user_pattern_size;
301 if ((node->rss_types & types) && lsize <= size) {
302 buf->entry[buf->entries].priority = 1;
303 buf->entry[buf->entries].pattern = addr;
305 rte_memcpy(addr, buf->entry[0].pattern,
307 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
308 rte_memcpy(addr, flow_items, elt * sizeof(*item));
309 addr = (void *)(((uintptr_t)addr) +
310 elt * sizeof(*item));
313 memset(flow_items, 0, sizeof(flow_items));
314 next_node = node->next;
315 stack[stack_pos] = next_node;
316 node = next_node ? &graph[*next_node] : NULL;
318 flow_items[stack_pos].type = node->type;
319 if (node->rss_types & types) {
321 * compute the number of items to copy from the
322 * expansion and copy it.
323 * When the stack_pos is 0, there are 1 element in it,
324 * plus the addition END item.
327 flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
328 lsize += elt * sizeof(*item) + user_pattern_size;
330 size_t n = elt * sizeof(*item);
332 buf->entry[buf->entries].priority =
333 stack_pos + 1 + missed;
334 buf->entry[buf->entries].pattern = addr;
336 rte_memcpy(addr, buf->entry[0].pattern,
338 addr = (void *)(((uintptr_t)addr) +
340 rte_memcpy(addr, &missed_item,
341 missed * sizeof(*item));
342 addr = (void *)(((uintptr_t)addr) +
343 missed * sizeof(*item));
344 rte_memcpy(addr, flow_items, n);
345 addr = (void *)(((uintptr_t)addr) + n);
350 next_node = node->next;
351 if (stack_pos++ == elt_n) {
355 stack[stack_pos] = next_node;
356 } else if (*(next_node + 1)) {
357 /* Follow up with the next possibility. */
360 /* Move to the next path. */
362 next_node = stack[--stack_pos];
364 stack[stack_pos] = next_node;
366 node = *next_node ? &graph[*next_node] : NULL;
368 /* no expanded flows but we have missed item, create one rule for it */
369 if (buf->entries == 1 && missed != 0) {
371 lsize += elt * sizeof(*item) + user_pattern_size;
373 buf->entry[buf->entries].priority = 1;
374 buf->entry[buf->entries].pattern = addr;
376 flow_items[0].type = missed_item.type;
377 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
378 rte_memcpy(addr, buf->entry[0].pattern,
380 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
381 rte_memcpy(addr, flow_items, elt * sizeof(*item));
387 enum mlx5_expansion {
389 MLX5_EXPANSION_ROOT_OUTER,
390 MLX5_EXPANSION_ROOT_ETH_VLAN,
391 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
392 MLX5_EXPANSION_OUTER_ETH,
393 MLX5_EXPANSION_OUTER_ETH_VLAN,
394 MLX5_EXPANSION_OUTER_VLAN,
395 MLX5_EXPANSION_OUTER_IPV4,
396 MLX5_EXPANSION_OUTER_IPV4_UDP,
397 MLX5_EXPANSION_OUTER_IPV4_TCP,
398 MLX5_EXPANSION_OUTER_IPV6,
399 MLX5_EXPANSION_OUTER_IPV6_UDP,
400 MLX5_EXPANSION_OUTER_IPV6_TCP,
401 MLX5_EXPANSION_VXLAN,
402 MLX5_EXPANSION_VXLAN_GPE,
406 MLX5_EXPANSION_ETH_VLAN,
409 MLX5_EXPANSION_IPV4_UDP,
410 MLX5_EXPANSION_IPV4_TCP,
412 MLX5_EXPANSION_IPV6_UDP,
413 MLX5_EXPANSION_IPV6_TCP,
416 /** Supported expansion of items. */
417 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
418 [MLX5_EXPANSION_ROOT] = {
419 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
421 MLX5_EXPANSION_IPV6),
422 .type = RTE_FLOW_ITEM_TYPE_END,
424 [MLX5_EXPANSION_ROOT_OUTER] = {
425 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
426 MLX5_EXPANSION_OUTER_IPV4,
427 MLX5_EXPANSION_OUTER_IPV6),
428 .type = RTE_FLOW_ITEM_TYPE_END,
430 [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
431 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
432 .type = RTE_FLOW_ITEM_TYPE_END,
434 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
435 .next = MLX5_FLOW_EXPAND_RSS_NEXT
436 (MLX5_EXPANSION_OUTER_ETH_VLAN),
437 .type = RTE_FLOW_ITEM_TYPE_END,
439 [MLX5_EXPANSION_OUTER_ETH] = {
440 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
441 MLX5_EXPANSION_OUTER_IPV6,
442 MLX5_EXPANSION_MPLS),
443 .type = RTE_FLOW_ITEM_TYPE_ETH,
446 [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
447 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
448 .type = RTE_FLOW_ITEM_TYPE_ETH,
451 [MLX5_EXPANSION_OUTER_VLAN] = {
452 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
453 MLX5_EXPANSION_OUTER_IPV6),
454 .type = RTE_FLOW_ITEM_TYPE_VLAN,
456 [MLX5_EXPANSION_OUTER_IPV4] = {
457 .next = MLX5_FLOW_EXPAND_RSS_NEXT
458 (MLX5_EXPANSION_OUTER_IPV4_UDP,
459 MLX5_EXPANSION_OUTER_IPV4_TCP,
462 MLX5_EXPANSION_IPV6),
463 .type = RTE_FLOW_ITEM_TYPE_IPV4,
464 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
465 ETH_RSS_NONFRAG_IPV4_OTHER,
467 [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
468 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
469 MLX5_EXPANSION_VXLAN_GPE),
470 .type = RTE_FLOW_ITEM_TYPE_UDP,
471 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
473 [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
474 .type = RTE_FLOW_ITEM_TYPE_TCP,
475 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
477 [MLX5_EXPANSION_OUTER_IPV6] = {
478 .next = MLX5_FLOW_EXPAND_RSS_NEXT
479 (MLX5_EXPANSION_OUTER_IPV6_UDP,
480 MLX5_EXPANSION_OUTER_IPV6_TCP,
482 MLX5_EXPANSION_IPV6),
483 .type = RTE_FLOW_ITEM_TYPE_IPV6,
484 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
485 ETH_RSS_NONFRAG_IPV6_OTHER,
487 [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
488 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
489 MLX5_EXPANSION_VXLAN_GPE),
490 .type = RTE_FLOW_ITEM_TYPE_UDP,
491 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
493 [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
494 .type = RTE_FLOW_ITEM_TYPE_TCP,
495 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
497 [MLX5_EXPANSION_VXLAN] = {
498 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
500 MLX5_EXPANSION_IPV6),
501 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
503 [MLX5_EXPANSION_VXLAN_GPE] = {
504 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
506 MLX5_EXPANSION_IPV6),
507 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
509 [MLX5_EXPANSION_GRE] = {
510 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
511 .type = RTE_FLOW_ITEM_TYPE_GRE,
513 [MLX5_EXPANSION_MPLS] = {
514 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
515 MLX5_EXPANSION_IPV6),
516 .type = RTE_FLOW_ITEM_TYPE_MPLS,
518 [MLX5_EXPANSION_ETH] = {
519 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
520 MLX5_EXPANSION_IPV6),
521 .type = RTE_FLOW_ITEM_TYPE_ETH,
523 [MLX5_EXPANSION_ETH_VLAN] = {
524 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
525 .type = RTE_FLOW_ITEM_TYPE_ETH,
527 [MLX5_EXPANSION_VLAN] = {
528 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
529 MLX5_EXPANSION_IPV6),
530 .type = RTE_FLOW_ITEM_TYPE_VLAN,
532 [MLX5_EXPANSION_IPV4] = {
533 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
534 MLX5_EXPANSION_IPV4_TCP),
535 .type = RTE_FLOW_ITEM_TYPE_IPV4,
536 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
537 ETH_RSS_NONFRAG_IPV4_OTHER,
539 [MLX5_EXPANSION_IPV4_UDP] = {
540 .type = RTE_FLOW_ITEM_TYPE_UDP,
541 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
543 [MLX5_EXPANSION_IPV4_TCP] = {
544 .type = RTE_FLOW_ITEM_TYPE_TCP,
545 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
547 [MLX5_EXPANSION_IPV6] = {
548 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
549 MLX5_EXPANSION_IPV6_TCP),
550 .type = RTE_FLOW_ITEM_TYPE_IPV6,
551 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
552 ETH_RSS_NONFRAG_IPV6_OTHER,
554 [MLX5_EXPANSION_IPV6_UDP] = {
555 .type = RTE_FLOW_ITEM_TYPE_UDP,
556 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
558 [MLX5_EXPANSION_IPV6_TCP] = {
559 .type = RTE_FLOW_ITEM_TYPE_TCP,
560 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
564 static struct rte_flow_shared_action *
565 mlx5_shared_action_create(struct rte_eth_dev *dev,
566 const struct rte_flow_shared_action_conf *conf,
567 const struct rte_flow_action *action,
568 struct rte_flow_error *error);
569 static int mlx5_shared_action_destroy
570 (struct rte_eth_dev *dev,
571 struct rte_flow_shared_action *shared_action,
572 struct rte_flow_error *error);
573 static int mlx5_shared_action_update
574 (struct rte_eth_dev *dev,
575 struct rte_flow_shared_action *shared_action,
576 const struct rte_flow_action *action,
577 struct rte_flow_error *error);
578 static int mlx5_shared_action_query
579 (struct rte_eth_dev *dev,
580 const struct rte_flow_shared_action *action,
582 struct rte_flow_error *error);
584 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
585 struct rte_flow_tunnel *tunnel,
589 if (!is_tunnel_offload_active(dev)) {
590 err_msg = "tunnel offload was not activated";
592 } else if (!tunnel) {
593 err_msg = "no application tunnel";
597 switch (tunnel->type) {
599 err_msg = "unsupported tunnel type";
601 case RTE_FLOW_ITEM_TYPE_VXLAN:
611 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
612 struct rte_flow_tunnel *app_tunnel,
613 struct rte_flow_action **actions,
614 uint32_t *num_of_actions,
615 struct rte_flow_error *error)
618 struct mlx5_flow_tunnel *tunnel;
619 const char *err_msg = NULL;
620 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
623 return rte_flow_error_set(error, EINVAL,
624 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
626 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
628 return rte_flow_error_set(error, ret,
629 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
630 "failed to initialize pmd tunnel");
632 *actions = &tunnel->action;
638 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
639 struct rte_flow_tunnel *app_tunnel,
640 struct rte_flow_item **items,
641 uint32_t *num_of_items,
642 struct rte_flow_error *error)
645 struct mlx5_flow_tunnel *tunnel;
646 const char *err_msg = NULL;
647 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
650 return rte_flow_error_set(error, EINVAL,
651 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
653 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
655 return rte_flow_error_set(error, ret,
656 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
657 "failed to initialize pmd tunnel");
659 *items = &tunnel->item;
665 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
666 struct rte_flow_item *pmd_items,
667 uint32_t num_items, struct rte_flow_error *err)
669 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
670 struct mlx5_flow_tunnel *tun;
672 rte_spinlock_lock(&thub->sl);
673 LIST_FOREACH(tun, &thub->tunnels, chain) {
674 if (&tun->item == pmd_items) {
675 LIST_REMOVE(tun, chain);
679 rte_spinlock_unlock(&thub->sl);
680 if (!tun || num_items != 1)
681 return rte_flow_error_set(err, EINVAL,
682 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
684 if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED))
685 mlx5_flow_tunnel_free(dev, tun);
690 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
691 struct rte_flow_action *pmd_actions,
692 uint32_t num_actions,
693 struct rte_flow_error *err)
695 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
696 struct mlx5_flow_tunnel *tun;
698 rte_spinlock_lock(&thub->sl);
699 LIST_FOREACH(tun, &thub->tunnels, chain) {
700 if (&tun->action == pmd_actions) {
701 LIST_REMOVE(tun, chain);
705 rte_spinlock_unlock(&thub->sl);
706 if (!tun || num_actions != 1)
707 return rte_flow_error_set(err, EINVAL,
708 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
710 if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED))
711 mlx5_flow_tunnel_free(dev, tun);
717 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
719 struct rte_flow_restore_info *info,
720 struct rte_flow_error *err)
722 uint64_t ol_flags = m->ol_flags;
723 const struct mlx5_flow_tbl_data_entry *tble;
724 const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
726 if ((ol_flags & mask) != mask)
728 tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
730 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
731 dev->data->port_id, m->hash.fdir.hi);
734 MLX5_ASSERT(tble->tunnel);
735 memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
736 info->group_id = tble->group_id;
737 info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
738 RTE_FLOW_RESTORE_INFO_GROUP_ID |
739 RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
744 return rte_flow_error_set(err, EINVAL,
745 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
746 "failed to get restore info");
749 static const struct rte_flow_ops mlx5_flow_ops = {
750 .validate = mlx5_flow_validate,
751 .create = mlx5_flow_create,
752 .destroy = mlx5_flow_destroy,
753 .flush = mlx5_flow_flush,
754 .isolate = mlx5_flow_isolate,
755 .query = mlx5_flow_query,
756 .dev_dump = mlx5_flow_dev_dump,
757 .get_aged_flows = mlx5_flow_get_aged_flows,
758 .shared_action_create = mlx5_shared_action_create,
759 .shared_action_destroy = mlx5_shared_action_destroy,
760 .shared_action_update = mlx5_shared_action_update,
761 .shared_action_query = mlx5_shared_action_query,
762 .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
763 .tunnel_match = mlx5_flow_tunnel_match,
764 .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
765 .tunnel_item_release = mlx5_flow_tunnel_item_release,
766 .get_restore_info = mlx5_flow_tunnel_get_restore_info,
769 /* Tunnel information. */
770 struct mlx5_flow_tunnel_info {
771 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
772 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
775 static struct mlx5_flow_tunnel_info tunnels_info[] = {
777 .tunnel = MLX5_FLOW_LAYER_VXLAN,
778 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
781 .tunnel = MLX5_FLOW_LAYER_GENEVE,
782 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
785 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
786 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
789 .tunnel = MLX5_FLOW_LAYER_GRE,
790 .ptype = RTE_PTYPE_TUNNEL_GRE,
793 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
794 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
797 .tunnel = MLX5_FLOW_LAYER_MPLS,
798 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
801 .tunnel = MLX5_FLOW_LAYER_NVGRE,
802 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
805 .tunnel = MLX5_FLOW_LAYER_IPIP,
806 .ptype = RTE_PTYPE_TUNNEL_IP,
809 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
810 .ptype = RTE_PTYPE_TUNNEL_IP,
813 .tunnel = MLX5_FLOW_LAYER_GTP,
814 .ptype = RTE_PTYPE_TUNNEL_GTPU,
818 /* Key of thread specific flow workspace data. */
819 static pthread_key_t key_workspace;
821 /* Thread specific flow workspace data once initialization data. */
822 static pthread_once_t key_workspace_init;
826 * Translate tag ID to register.
829 * Pointer to the Ethernet device structure.
831 * The feature that request the register.
833 * The request register ID.
835 * Error description in case of any.
838 * The request register on success, a negative errno
839 * value otherwise and rte_errno is set.
842 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
843 enum mlx5_feature_name feature,
845 struct rte_flow_error *error)
847 struct mlx5_priv *priv = dev->data->dev_private;
848 struct mlx5_dev_config *config = &priv->config;
849 enum modify_reg start_reg;
850 bool skip_mtr_reg = false;
853 case MLX5_HAIRPIN_RX:
855 case MLX5_HAIRPIN_TX:
857 case MLX5_METADATA_RX:
858 switch (config->dv_xmeta_en) {
859 case MLX5_XMETA_MODE_LEGACY:
861 case MLX5_XMETA_MODE_META16:
863 case MLX5_XMETA_MODE_META32:
867 case MLX5_METADATA_TX:
869 case MLX5_METADATA_FDB:
870 switch (config->dv_xmeta_en) {
871 case MLX5_XMETA_MODE_LEGACY:
873 case MLX5_XMETA_MODE_META16:
875 case MLX5_XMETA_MODE_META32:
880 switch (config->dv_xmeta_en) {
881 case MLX5_XMETA_MODE_LEGACY:
883 case MLX5_XMETA_MODE_META16:
885 case MLX5_XMETA_MODE_META32:
891 * If meter color and flow match share one register, flow match
892 * should use the meter color register for match.
894 if (priv->mtr_reg_share)
895 return priv->mtr_color_reg;
897 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
900 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
901 return priv->mtr_color_reg;
904 * Metadata COPY_MARK register using is in meter suffix sub
905 * flow while with meter. It's safe to share the same register.
907 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
910 * If meter is enable, it will engage the register for color
911 * match and flow match. If meter color match is not using the
912 * REG_C_2, need to skip the REG_C_x be used by meter color
914 * If meter is disable, free to use all available registers.
916 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
917 (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
918 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
919 if (id > (REG_C_7 - start_reg))
920 return rte_flow_error_set(error, EINVAL,
921 RTE_FLOW_ERROR_TYPE_ITEM,
922 NULL, "invalid tag id");
923 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
924 return rte_flow_error_set(error, ENOTSUP,
925 RTE_FLOW_ERROR_TYPE_ITEM,
926 NULL, "unsupported tag id");
928 * This case means meter is using the REG_C_x great than 2.
929 * Take care not to conflict with meter color REG_C_x.
930 * If the available index REG_C_y >= REG_C_x, skip the
933 if (skip_mtr_reg && config->flow_mreg_c
934 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
935 if (id >= (REG_C_7 - start_reg))
936 return rte_flow_error_set(error, EINVAL,
937 RTE_FLOW_ERROR_TYPE_ITEM,
938 NULL, "invalid tag id");
939 if (config->flow_mreg_c
940 [id + 1 + start_reg - REG_C_0] != REG_NON)
941 return config->flow_mreg_c
942 [id + 1 + start_reg - REG_C_0];
943 return rte_flow_error_set(error, ENOTSUP,
944 RTE_FLOW_ERROR_TYPE_ITEM,
945 NULL, "unsupported tag id");
947 return config->flow_mreg_c[id + start_reg - REG_C_0];
950 return rte_flow_error_set(error, EINVAL,
951 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
952 NULL, "invalid feature name");
956 * Check extensive flow metadata register support.
959 * Pointer to rte_eth_dev structure.
962 * True if device supports extensive flow metadata register, otherwise false.
965 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
967 struct mlx5_priv *priv = dev->data->dev_private;
968 struct mlx5_dev_config *config = &priv->config;
971 * Having available reg_c can be regarded inclusively as supporting
972 * extensive flow metadata register, which could mean,
973 * - metadata register copy action by modify header.
974 * - 16 modify header actions is supported.
975 * - reg_c's are preserved across different domain (FDB and NIC) on
976 * packet loopback by flow lookup miss.
978 return config->flow_mreg_c[2] != REG_NON;
982 * Verify the @p item specifications (spec, last, mask) are compatible with the
986 * Item specification.
988 * @p item->mask or flow default bit-masks.
989 * @param[in] nic_mask
990 * Bit-masks covering supported fields by the NIC to compare with user mask.
992 * Bit-masks size in bytes.
993 * @param[in] range_accepted
994 * True if range of values is accepted for specific fields, false otherwise.
996 * Pointer to error structure.
999 * 0 on success, a negative errno value otherwise and rte_errno is set.
1002 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1003 const uint8_t *mask,
1004 const uint8_t *nic_mask,
1006 bool range_accepted,
1007 struct rte_flow_error *error)
1011 MLX5_ASSERT(nic_mask);
1012 for (i = 0; i < size; ++i)
1013 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1014 return rte_flow_error_set(error, ENOTSUP,
1015 RTE_FLOW_ERROR_TYPE_ITEM,
1017 "mask enables non supported"
1019 if (!item->spec && (item->mask || item->last))
1020 return rte_flow_error_set(error, EINVAL,
1021 RTE_FLOW_ERROR_TYPE_ITEM, item,
1022 "mask/last without a spec is not"
1024 if (item->spec && item->last && !range_accepted) {
1030 for (i = 0; i < size; ++i) {
1031 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1032 last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1034 ret = memcmp(spec, last, size);
1036 return rte_flow_error_set(error, EINVAL,
1037 RTE_FLOW_ERROR_TYPE_ITEM,
1039 "range is not valid");
1045 * Adjust the hash fields according to the @p flow information.
1047 * @param[in] dev_flow.
1048 * Pointer to the mlx5_flow.
1050 * 1 when the hash field is for a tunnel item.
1051 * @param[in] layer_types
1053 * @param[in] hash_fields
1057 * The hash fields that should be used.
1060 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1061 int tunnel __rte_unused, uint64_t layer_types,
1062 uint64_t hash_fields)
1064 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1065 int rss_request_inner = rss_desc->level >= 2;
1067 /* Check RSS hash level for tunnel. */
1068 if (tunnel && rss_request_inner)
1069 hash_fields |= IBV_RX_HASH_INNER;
1070 else if (tunnel || rss_request_inner)
1073 /* Check if requested layer matches RSS hash fields. */
1074 if (!(rss_desc->types & layer_types))
1080 * Lookup and set the ptype in the data Rx part. A single Ptype can be used,
1081 * if several tunnel rules are used on this queue, the tunnel ptype will be
1085 * Rx queue to update.
1088 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1091 uint32_t tunnel_ptype = 0;
1093 /* Look up for the ptype to use. */
1094 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1095 if (!rxq_ctrl->flow_tunnels_n[i])
1097 if (!tunnel_ptype) {
1098 tunnel_ptype = tunnels_info[i].ptype;
1104 rxq_ctrl->rxq.tunnel = tunnel_ptype;
1108 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1112 * Pointer to the Ethernet device structure.
1113 * @param[in] dev_handle
1114 * Pointer to device flow handle structure.
1117 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1118 struct mlx5_flow_handle *dev_handle)
1120 struct mlx5_priv *priv = dev->data->dev_private;
1121 const int mark = dev_handle->mark;
1122 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1123 struct mlx5_hrxq *hrxq;
1126 if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
1128 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1129 dev_handle->rix_hrxq);
1132 for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
1133 int idx = hrxq->ind_table->queues[i];
1134 struct mlx5_rxq_ctrl *rxq_ctrl =
1135 container_of((*priv->rxqs)[idx],
1136 struct mlx5_rxq_ctrl, rxq);
1139 * To support metadata register copy on Tx loopback,
1140 * this must be always enabled (metadata may arive
1141 * from other port - not from local flows only.
1143 if (priv->config.dv_flow_en &&
1144 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1145 mlx5_flow_ext_mreg_supported(dev)) {
1146 rxq_ctrl->rxq.mark = 1;
1147 rxq_ctrl->flow_mark_n = 1;
1149 rxq_ctrl->rxq.mark = 1;
1150 rxq_ctrl->flow_mark_n++;
1155 /* Increase the counter matching the flow. */
1156 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1157 if ((tunnels_info[j].tunnel &
1158 dev_handle->layers) ==
1159 tunnels_info[j].tunnel) {
1160 rxq_ctrl->flow_tunnels_n[j]++;
1164 flow_rxq_tunnel_ptype_update(rxq_ctrl);
1170 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1173 * Pointer to the Ethernet device structure.
1175 * Pointer to flow structure.
1178 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1180 struct mlx5_priv *priv = dev->data->dev_private;
1181 uint32_t handle_idx;
1182 struct mlx5_flow_handle *dev_handle;
1184 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1185 handle_idx, dev_handle, next)
1186 flow_drv_rxq_flags_set(dev, dev_handle);
1190 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1191 * device flow if no other flow uses it with the same kind of request.
1194 * Pointer to Ethernet device.
1195 * @param[in] dev_handle
1196 * Pointer to the device flow handle structure.
1199 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1200 struct mlx5_flow_handle *dev_handle)
1202 struct mlx5_priv *priv = dev->data->dev_private;
1203 const int mark = dev_handle->mark;
1204 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1205 struct mlx5_hrxq *hrxq;
1208 if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
1210 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1211 dev_handle->rix_hrxq);
1214 MLX5_ASSERT(dev->data->dev_started);
1215 for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
1216 int idx = hrxq->ind_table->queues[i];
1217 struct mlx5_rxq_ctrl *rxq_ctrl =
1218 container_of((*priv->rxqs)[idx],
1219 struct mlx5_rxq_ctrl, rxq);
1221 if (priv->config.dv_flow_en &&
1222 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1223 mlx5_flow_ext_mreg_supported(dev)) {
1224 rxq_ctrl->rxq.mark = 1;
1225 rxq_ctrl->flow_mark_n = 1;
1227 rxq_ctrl->flow_mark_n--;
1228 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1233 /* Decrease the counter matching the flow. */
1234 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1235 if ((tunnels_info[j].tunnel &
1236 dev_handle->layers) ==
1237 tunnels_info[j].tunnel) {
1238 rxq_ctrl->flow_tunnels_n[j]--;
1242 flow_rxq_tunnel_ptype_update(rxq_ctrl);
1248 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1249 * @p flow if no other flow uses it with the same kind of request.
1252 * Pointer to Ethernet device.
1254 * Pointer to the flow.
1257 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1259 struct mlx5_priv *priv = dev->data->dev_private;
1260 uint32_t handle_idx;
1261 struct mlx5_flow_handle *dev_handle;
1263 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1264 handle_idx, dev_handle, next)
1265 flow_drv_rxq_flags_trim(dev, dev_handle);
1269 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1272 * Pointer to Ethernet device.
1275 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1277 struct mlx5_priv *priv = dev->data->dev_private;
1280 for (i = 0; i != priv->rxqs_n; ++i) {
1281 struct mlx5_rxq_ctrl *rxq_ctrl;
1284 if (!(*priv->rxqs)[i])
1286 rxq_ctrl = container_of((*priv->rxqs)[i],
1287 struct mlx5_rxq_ctrl, rxq);
1288 rxq_ctrl->flow_mark_n = 0;
1289 rxq_ctrl->rxq.mark = 0;
1290 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1291 rxq_ctrl->flow_tunnels_n[j] = 0;
1292 rxq_ctrl->rxq.tunnel = 0;
1297 * Set the Rx queue dynamic metadata (mask and offset) for a flow
1300 * Pointer to the Ethernet device structure.
1303 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1305 struct mlx5_priv *priv = dev->data->dev_private;
1306 struct mlx5_rxq_data *data;
1309 for (i = 0; i != priv->rxqs_n; ++i) {
1310 if (!(*priv->rxqs)[i])
1312 data = (*priv->rxqs)[i];
1313 if (!rte_flow_dynf_metadata_avail()) {
1314 data->dynf_meta = 0;
1315 data->flow_meta_mask = 0;
1316 data->flow_meta_offset = -1;
1318 data->dynf_meta = 1;
1319 data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1320 data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1326 * return a pointer to the desired action in the list of actions.
1328 * @param[in] actions
1329 * The list of actions to search the action in.
1331 * The action to find.
1334 * Pointer to the action in the list, if found. NULL otherwise.
1336 const struct rte_flow_action *
1337 mlx5_flow_find_action(const struct rte_flow_action *actions,
1338 enum rte_flow_action_type action)
1340 if (actions == NULL)
1342 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1343 if (actions->type == action)
1349 * Validate the flag action.
1351 * @param[in] action_flags
1352 * Bit-fields that holds the actions detected until now.
1354 * Attributes of flow that includes this action.
1356 * Pointer to error structure.
1359 * 0 on success, a negative errno value otherwise and rte_errno is set.
1362 mlx5_flow_validate_action_flag(uint64_t action_flags,
1363 const struct rte_flow_attr *attr,
1364 struct rte_flow_error *error)
1366 if (action_flags & MLX5_FLOW_ACTION_MARK)
1367 return rte_flow_error_set(error, EINVAL,
1368 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1369 "can't mark and flag in same flow");
1370 if (action_flags & MLX5_FLOW_ACTION_FLAG)
1371 return rte_flow_error_set(error, EINVAL,
1372 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1374 " actions in same flow");
1376 return rte_flow_error_set(error, ENOTSUP,
1377 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1378 "flag action not supported for "
1384 * Validate the mark action.
1387 * Pointer to the queue action.
1388 * @param[in] action_flags
1389 * Bit-fields that holds the actions detected until now.
1391 * Attributes of flow that includes this action.
1393 * Pointer to error structure.
1396 * 0 on success, a negative errno value otherwise and rte_errno is set.
1399 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1400 uint64_t action_flags,
1401 const struct rte_flow_attr *attr,
1402 struct rte_flow_error *error)
1404 const struct rte_flow_action_mark *mark = action->conf;
1407 return rte_flow_error_set(error, EINVAL,
1408 RTE_FLOW_ERROR_TYPE_ACTION,
1410 "configuration cannot be null");
1411 if (mark->id >= MLX5_FLOW_MARK_MAX)
1412 return rte_flow_error_set(error, EINVAL,
1413 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1415 "mark id must in 0 <= id < "
1416 RTE_STR(MLX5_FLOW_MARK_MAX));
1417 if (action_flags & MLX5_FLOW_ACTION_FLAG)
1418 return rte_flow_error_set(error, EINVAL,
1419 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1420 "can't flag and mark in same flow");
1421 if (action_flags & MLX5_FLOW_ACTION_MARK)
1422 return rte_flow_error_set(error, EINVAL,
1423 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1424 "can't have 2 mark actions in same"
1427 return rte_flow_error_set(error, ENOTSUP,
1428 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1429 "mark action not supported for "
1435 * Validate the drop action.
1437 * @param[in] action_flags
1438 * Bit-fields that holds the actions detected until now.
1440 * Attributes of flow that includes this action.
1442 * Pointer to error structure.
1445 * 0 on success, a negative errno value otherwise and rte_errno is set.
1448 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1449 const struct rte_flow_attr *attr,
1450 struct rte_flow_error *error)
1453 return rte_flow_error_set(error, ENOTSUP,
1454 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1455 "drop action not supported for "
1461 * Validate the queue action.
1464 * Pointer to the queue action.
1465 * @param[in] action_flags
1466 * Bit-fields that holds the actions detected until now.
1468 * Pointer to the Ethernet device structure.
1470 * Attributes of flow that includes this action.
1472 * Pointer to error structure.
1475 * 0 on success, a negative errno value otherwise and rte_errno is set.
1478 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1479 uint64_t action_flags,
1480 struct rte_eth_dev *dev,
1481 const struct rte_flow_attr *attr,
1482 struct rte_flow_error *error)
1484 struct mlx5_priv *priv = dev->data->dev_private;
1485 const struct rte_flow_action_queue *queue = action->conf;
1487 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1488 return rte_flow_error_set(error, EINVAL,
1489 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1490 "can't have 2 fate actions in"
1493 return rte_flow_error_set(error, EINVAL,
1494 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1495 NULL, "No Rx queues configured");
1496 if (queue->index >= priv->rxqs_n)
1497 return rte_flow_error_set(error, EINVAL,
1498 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1500 "queue index out of range");
1501 if (!(*priv->rxqs)[queue->index])
1502 return rte_flow_error_set(error, EINVAL,
1503 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1505 "queue is not configured");
1507 return rte_flow_error_set(error, ENOTSUP,
1508 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1509 "queue action not supported for "
1515 * Validate the rss action.
1518 * Pointer to the Ethernet device structure.
1520 * Pointer to the queue action.
1522 * Pointer to error structure.
1525 * 0 on success, a negative errno value otherwise and rte_errno is set.
1528 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1529 const struct rte_flow_action *action,
1530 struct rte_flow_error *error)
1532 struct mlx5_priv *priv = dev->data->dev_private;
1533 const struct rte_flow_action_rss *rss = action->conf;
1536 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1537 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1538 return rte_flow_error_set(error, ENOTSUP,
1539 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1541 "RSS hash function not supported");
1542 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1547 return rte_flow_error_set(error, ENOTSUP,
1548 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1550 "tunnel RSS is not supported");
1551 /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1552 if (rss->key_len == 0 && rss->key != NULL)
1553 return rte_flow_error_set(error, ENOTSUP,
1554 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1556 "RSS hash key length 0");
1557 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1558 return rte_flow_error_set(error, ENOTSUP,
1559 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1561 "RSS hash key too small");
1562 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1563 return rte_flow_error_set(error, ENOTSUP,
1564 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1566 "RSS hash key too large");
1567 if (rss->queue_num > priv->config.ind_table_max_size)
1568 return rte_flow_error_set(error, ENOTSUP,
1569 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1571 "number of queues too large");
1572 if (rss->types & MLX5_RSS_HF_MASK)
1573 return rte_flow_error_set(error, ENOTSUP,
1574 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1576 "some RSS protocols are not"
1578 if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1579 !(rss->types & ETH_RSS_IP))
1580 return rte_flow_error_set(error, EINVAL,
1581 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1582 "L3 partial RSS requested but L3 RSS"
1583 " type not specified");
1584 if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1585 !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1586 return rte_flow_error_set(error, EINVAL,
1587 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1588 "L4 partial RSS requested but L4 RSS"
1589 " type not specified");
1591 return rte_flow_error_set(error, EINVAL,
1592 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1593 NULL, "No Rx queues configured");
1594 if (!rss->queue_num)
1595 return rte_flow_error_set(error, EINVAL,
1596 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1597 NULL, "No queues configured");
1598 for (i = 0; i != rss->queue_num; ++i) {
1599 if (rss->queue[i] >= priv->rxqs_n)
1600 return rte_flow_error_set
1602 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1603 &rss->queue[i], "queue index out of range");
1604 if (!(*priv->rxqs)[rss->queue[i]])
1605 return rte_flow_error_set
1606 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1607 &rss->queue[i], "queue is not configured");
1613 * Validate the rss action.
1616 * Pointer to the queue action.
1617 * @param[in] action_flags
1618 * Bit-fields that holds the actions detected until now.
1620 * Pointer to the Ethernet device structure.
1622 * Attributes of flow that includes this action.
1623 * @param[in] item_flags
1624 * Items that were detected.
1626 * Pointer to error structure.
1629 * 0 on success, a negative errno value otherwise and rte_errno is set.
1632 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1633 uint64_t action_flags,
1634 struct rte_eth_dev *dev,
1635 const struct rte_flow_attr *attr,
1636 uint64_t item_flags,
1637 struct rte_flow_error *error)
1639 const struct rte_flow_action_rss *rss = action->conf;
1640 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1643 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1644 return rte_flow_error_set(error, EINVAL,
1645 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1646 "can't have 2 fate actions"
1648 ret = mlx5_validate_action_rss(dev, action, error);
1652 return rte_flow_error_set(error, ENOTSUP,
1653 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1654 "rss action not supported for "
1656 if (rss->level > 1 && !tunnel)
1657 return rte_flow_error_set(error, EINVAL,
1658 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1659 "inner RSS is not supported for "
1660 "non-tunnel flows");
1661 if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1662 !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1663 return rte_flow_error_set(error, EINVAL,
1664 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1665 "RSS on eCPRI is not supported now");
1671 * Validate the default miss action.
1673 * @param[in] action_flags
1674 * Bit-fields that holds the actions detected until now.
1676 * Pointer to error structure.
1679 * 0 on success, a negative errno value otherwise and rte_errno is set.
1682 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1683 const struct rte_flow_attr *attr,
1684 struct rte_flow_error *error)
1686 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1687 return rte_flow_error_set(error, EINVAL,
1688 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1689 "can't have 2 fate actions in"
1692 return rte_flow_error_set(error, ENOTSUP,
1693 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1694 "default miss action not supported "
1697 return rte_flow_error_set(error, ENOTSUP,
1698 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1699 "only group 0 is supported");
1701 return rte_flow_error_set(error, ENOTSUP,
1702 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1703 NULL, "transfer is not supported");
1708 * Validate the count action.
1711 * Pointer to the Ethernet device structure.
1713 * Attributes of flow that includes this action.
1715 * Pointer to error structure.
1718 * 0 on success, a negative errno value otherwise and rte_errno is set.
1721 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1722 const struct rte_flow_attr *attr,
1723 struct rte_flow_error *error)
1726 return rte_flow_error_set(error, ENOTSUP,
1727 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1728 "count action not supported for "
1734 * Verify the @p attributes will be correctly understood by the NIC and store
1735 * them in the @p flow if everything is correct.
1738 * Pointer to the Ethernet device structure.
1739 * @param[in] attributes
1740 * Pointer to flow attributes
1742 * Pointer to error structure.
1745 * 0 on success, a negative errno value otherwise and rte_errno is set.
1748 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1749 const struct rte_flow_attr *attributes,
1750 struct rte_flow_error *error)
1752 struct mlx5_priv *priv = dev->data->dev_private;
1753 uint32_t priority_max = priv->config.flow_prio - 1;
1755 if (attributes->group)
1756 return rte_flow_error_set(error, ENOTSUP,
1757 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1758 NULL, "groups is not supported");
1759 if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1760 attributes->priority >= priority_max)
1761 return rte_flow_error_set(error, ENOTSUP,
1762 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1763 NULL, "priority out of range");
1764 if (attributes->egress)
1765 return rte_flow_error_set(error, ENOTSUP,
1766 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1767 "egress is not supported");
1768 if (attributes->transfer && !priv->config.dv_esw_en)
1769 return rte_flow_error_set(error, ENOTSUP,
1770 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1771 NULL, "transfer is not supported");
1772 if (!attributes->ingress)
1773 return rte_flow_error_set(error, EINVAL,
1774 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1776 "ingress attribute is mandatory");
1781 * Validate ICMP6 item.
1784 * Item specification.
1785 * @param[in] item_flags
1786 * Bit-fields that holds the items detected until now.
1787 * @param[in] ext_vlan_sup
1788 * Whether extended VLAN features are supported or not.
1790 * Pointer to error structure.
1793 * 0 on success, a negative errno value otherwise and rte_errno is set.
1796 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1797 uint64_t item_flags,
1798 uint8_t target_protocol,
1799 struct rte_flow_error *error)
1801 const struct rte_flow_item_icmp6 *mask = item->mask;
1802 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1803 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1804 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1805 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1806 MLX5_FLOW_LAYER_OUTER_L4;
1809 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1810 return rte_flow_error_set(error, EINVAL,
1811 RTE_FLOW_ERROR_TYPE_ITEM, item,
1812 "protocol filtering not compatible"
1813 " with ICMP6 layer");
1814 if (!(item_flags & l3m))
1815 return rte_flow_error_set(error, EINVAL,
1816 RTE_FLOW_ERROR_TYPE_ITEM, item,
1817 "IPv6 is mandatory to filter on"
1819 if (item_flags & l4m)
1820 return rte_flow_error_set(error, EINVAL,
1821 RTE_FLOW_ERROR_TYPE_ITEM, item,
1822 "multiple L4 layers not supported");
1824 mask = &rte_flow_item_icmp6_mask;
1825 ret = mlx5_flow_item_acceptable
1826 (item, (const uint8_t *)mask,
1827 (const uint8_t *)&rte_flow_item_icmp6_mask,
1828 sizeof(struct rte_flow_item_icmp6),
1829 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1836 * Validate ICMP item.
1839 * Item specification.
1840 * @param[in] item_flags
1841 * Bit-fields that holds the items detected until now.
1843 * Pointer to error structure.
1846 * 0 on success, a negative errno value otherwise and rte_errno is set.
1849 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1850 uint64_t item_flags,
1851 uint8_t target_protocol,
1852 struct rte_flow_error *error)
1854 const struct rte_flow_item_icmp *mask = item->mask;
1855 const struct rte_flow_item_icmp nic_mask = {
1856 .hdr.icmp_type = 0xff,
1857 .hdr.icmp_code = 0xff,
1858 .hdr.icmp_ident = RTE_BE16(0xffff),
1859 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1861 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1862 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1863 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1864 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1865 MLX5_FLOW_LAYER_OUTER_L4;
1868 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1869 return rte_flow_error_set(error, EINVAL,
1870 RTE_FLOW_ERROR_TYPE_ITEM, item,
1871 "protocol filtering not compatible"
1872 " with ICMP layer");
1873 if (!(item_flags & l3m))
1874 return rte_flow_error_set(error, EINVAL,
1875 RTE_FLOW_ERROR_TYPE_ITEM, item,
1876 "IPv4 is mandatory to filter"
1878 if (item_flags & l4m)
1879 return rte_flow_error_set(error, EINVAL,
1880 RTE_FLOW_ERROR_TYPE_ITEM, item,
1881 "multiple L4 layers not supported");
1884 ret = mlx5_flow_item_acceptable
1885 (item, (const uint8_t *)mask,
1886 (const uint8_t *)&nic_mask,
1887 sizeof(struct rte_flow_item_icmp),
1888 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1895 * Validate Ethernet item.
1898 * Item specification.
1899 * @param[in] item_flags
1900 * Bit-fields that holds the items detected until now.
1902 * Pointer to error structure.
1905 * 0 on success, a negative errno value otherwise and rte_errno is set.
1908 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1909 uint64_t item_flags, bool ext_vlan_sup,
1910 struct rte_flow_error *error)
1912 const struct rte_flow_item_eth *mask = item->mask;
1913 const struct rte_flow_item_eth nic_mask = {
1914 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1915 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1916 .type = RTE_BE16(0xffff),
1917 .has_vlan = ext_vlan_sup ? 1 : 0,
1920 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1921 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1922 MLX5_FLOW_LAYER_OUTER_L2;
1924 if (item_flags & ethm)
1925 return rte_flow_error_set(error, ENOTSUP,
1926 RTE_FLOW_ERROR_TYPE_ITEM, item,
1927 "multiple L2 layers not supported");
1928 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1929 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1930 return rte_flow_error_set(error, EINVAL,
1931 RTE_FLOW_ERROR_TYPE_ITEM, item,
1932 "L2 layer should not follow "
1934 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1935 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1936 return rte_flow_error_set(error, EINVAL,
1937 RTE_FLOW_ERROR_TYPE_ITEM, item,
1938 "L2 layer should not follow VLAN");
1940 mask = &rte_flow_item_eth_mask;
1941 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1942 (const uint8_t *)&nic_mask,
1943 sizeof(struct rte_flow_item_eth),
1944 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1949 * Validate VLAN item.
1952 * Item specification.
1953 * @param[in] item_flags
1954 * Bit-fields that holds the items detected until now.
1956 * Ethernet device flow is being created on.
1958 * Pointer to error structure.
1961 * 0 on success, a negative errno value otherwise and rte_errno is set.
1964 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1965 uint64_t item_flags,
1966 struct rte_eth_dev *dev,
1967 struct rte_flow_error *error)
1969 const struct rte_flow_item_vlan *spec = item->spec;
1970 const struct rte_flow_item_vlan *mask = item->mask;
1971 const struct rte_flow_item_vlan nic_mask = {
1972 .tci = RTE_BE16(UINT16_MAX),
1973 .inner_type = RTE_BE16(UINT16_MAX),
1975 uint16_t vlan_tag = 0;
1976 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1978 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1979 MLX5_FLOW_LAYER_INNER_L4) :
1980 (MLX5_FLOW_LAYER_OUTER_L3 |
1981 MLX5_FLOW_LAYER_OUTER_L4);
1982 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1983 MLX5_FLOW_LAYER_OUTER_VLAN;
1985 if (item_flags & vlanm)
1986 return rte_flow_error_set(error, EINVAL,
1987 RTE_FLOW_ERROR_TYPE_ITEM, item,
1988 "multiple VLAN layers not supported");
1989 else if ((item_flags & l34m) != 0)
1990 return rte_flow_error_set(error, EINVAL,
1991 RTE_FLOW_ERROR_TYPE_ITEM, item,
1992 "VLAN cannot follow L3/L4 layer");
1994 mask = &rte_flow_item_vlan_mask;
1995 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1996 (const uint8_t *)&nic_mask,
1997 sizeof(struct rte_flow_item_vlan),
1998 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2001 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2002 struct mlx5_priv *priv = dev->data->dev_private;
2004 if (priv->vmwa_context) {
2006 * Non-NULL context means we have a virtual machine
2007 * and SR-IOV enabled, we have to create VLAN interface
2008 * to make hypervisor to setup E-Switch vport
2009 * context correctly. We avoid creating the multiple
2010 * VLAN interfaces, so we cannot support VLAN tag mask.
2012 return rte_flow_error_set(error, EINVAL,
2013 RTE_FLOW_ERROR_TYPE_ITEM,
2015 "VLAN tag mask is not"
2016 " supported in virtual"
2021 vlan_tag = spec->tci;
2022 vlan_tag &= mask->tci;
2025 * From verbs perspective an empty VLAN is equivalent
2026 * to a packet without VLAN layer.
2029 return rte_flow_error_set(error, EINVAL,
2030 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2032 "VLAN cannot be empty");
2037 * Validate IPV4 item.
2040 * Item specification.
2041 * @param[in] item_flags
2042 * Bit-fields that holds the items detected until now.
2043 * @param[in] last_item
2044 * Previous validated item in the pattern items.
2045 * @param[in] ether_type
2046 * Type in the ethernet layer header (including dot1q).
2047 * @param[in] acc_mask
2048 * Acceptable mask, if NULL default internal default mask
2049 * will be used to check whether item fields are supported.
2050 * @param[in] range_accepted
2051 * True if range of values is accepted for specific fields, false otherwise.
2053 * Pointer to error structure.
2056 * 0 on success, a negative errno value otherwise and rte_errno is set.
2059 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2060 uint64_t item_flags,
2062 uint16_t ether_type,
2063 const struct rte_flow_item_ipv4 *acc_mask,
2064 bool range_accepted,
2065 struct rte_flow_error *error)
2067 const struct rte_flow_item_ipv4 *mask = item->mask;
2068 const struct rte_flow_item_ipv4 *spec = item->spec;
2069 const struct rte_flow_item_ipv4 nic_mask = {
2071 .src_addr = RTE_BE32(0xffffffff),
2072 .dst_addr = RTE_BE32(0xffffffff),
2073 .type_of_service = 0xff,
2074 .next_proto_id = 0xff,
2077 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2078 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2079 MLX5_FLOW_LAYER_OUTER_L3;
2080 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2081 MLX5_FLOW_LAYER_OUTER_L4;
2083 uint8_t next_proto = 0xFF;
2084 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2085 MLX5_FLOW_LAYER_OUTER_VLAN |
2086 MLX5_FLOW_LAYER_INNER_VLAN);
2088 if ((last_item & l2_vlan) && ether_type &&
2089 ether_type != RTE_ETHER_TYPE_IPV4)
2090 return rte_flow_error_set(error, EINVAL,
2091 RTE_FLOW_ERROR_TYPE_ITEM, item,
2092 "IPv4 cannot follow L2/VLAN layer "
2093 "which ether type is not IPv4");
2094 if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2096 next_proto = mask->hdr.next_proto_id &
2097 spec->hdr.next_proto_id;
2098 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2099 return rte_flow_error_set(error, EINVAL,
2100 RTE_FLOW_ERROR_TYPE_ITEM,
2105 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2106 return rte_flow_error_set(error, EINVAL,
2107 RTE_FLOW_ERROR_TYPE_ITEM, item,
2108 "wrong tunnel type - IPv6 specified "
2109 "but IPv4 item provided");
2110 if (item_flags & l3m)
2111 return rte_flow_error_set(error, ENOTSUP,
2112 RTE_FLOW_ERROR_TYPE_ITEM, item,
2113 "multiple L3 layers not supported");
2114 else if (item_flags & l4m)
2115 return rte_flow_error_set(error, EINVAL,
2116 RTE_FLOW_ERROR_TYPE_ITEM, item,
2117 "L3 cannot follow an L4 layer.");
2118 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2119 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2120 return rte_flow_error_set(error, EINVAL,
2121 RTE_FLOW_ERROR_TYPE_ITEM, item,
2122 "L3 cannot follow an NVGRE layer.");
2124 mask = &rte_flow_item_ipv4_mask;
2125 else if (mask->hdr.next_proto_id != 0 &&
2126 mask->hdr.next_proto_id != 0xff)
2127 return rte_flow_error_set(error, EINVAL,
2128 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2129 "partial mask is not supported"
2131 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2132 acc_mask ? (const uint8_t *)acc_mask
2133 : (const uint8_t *)&nic_mask,
2134 sizeof(struct rte_flow_item_ipv4),
2135 range_accepted, error);
2142 * Validate IPV6 item.
2145 * Item specification.
2146 * @param[in] item_flags
2147 * Bit-fields that holds the items detected until now.
2148 * @param[in] last_item
2149 * Previous validated item in the pattern items.
2150 * @param[in] ether_type
2151 * Type in the ethernet layer header (including dot1q).
2152 * @param[in] acc_mask
2153 * Acceptable mask, if NULL default internal default mask
2154 * will be used to check whether item fields are supported.
2156 * Pointer to error structure.
2159 * 0 on success, a negative errno value otherwise and rte_errno is set.
2162 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2163 uint64_t item_flags,
2165 uint16_t ether_type,
2166 const struct rte_flow_item_ipv6 *acc_mask,
2167 struct rte_flow_error *error)
2169 const struct rte_flow_item_ipv6 *mask = item->mask;
2170 const struct rte_flow_item_ipv6 *spec = item->spec;
2171 const struct rte_flow_item_ipv6 nic_mask = {
2174 "\xff\xff\xff\xff\xff\xff\xff\xff"
2175 "\xff\xff\xff\xff\xff\xff\xff\xff",
2177 "\xff\xff\xff\xff\xff\xff\xff\xff"
2178 "\xff\xff\xff\xff\xff\xff\xff\xff",
2179 .vtc_flow = RTE_BE32(0xffffffff),
2183 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2184 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2185 MLX5_FLOW_LAYER_OUTER_L3;
2186 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2187 MLX5_FLOW_LAYER_OUTER_L4;
2189 uint8_t next_proto = 0xFF;
2190 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2191 MLX5_FLOW_LAYER_OUTER_VLAN |
2192 MLX5_FLOW_LAYER_INNER_VLAN);
2194 if ((last_item & l2_vlan) && ether_type &&
2195 ether_type != RTE_ETHER_TYPE_IPV6)
2196 return rte_flow_error_set(error, EINVAL,
2197 RTE_FLOW_ERROR_TYPE_ITEM, item,
2198 "IPv6 cannot follow L2/VLAN layer "
2199 "which ether type is not IPv6");
2200 if (mask && mask->hdr.proto == UINT8_MAX && spec)
2201 next_proto = spec->hdr.proto;
2202 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2203 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2204 return rte_flow_error_set(error, EINVAL,
2205 RTE_FLOW_ERROR_TYPE_ITEM,
2210 if (next_proto == IPPROTO_HOPOPTS ||
2211 next_proto == IPPROTO_ROUTING ||
2212 next_proto == IPPROTO_FRAGMENT ||
2213 next_proto == IPPROTO_ESP ||
2214 next_proto == IPPROTO_AH ||
2215 next_proto == IPPROTO_DSTOPTS)
2216 return rte_flow_error_set(error, EINVAL,
2217 RTE_FLOW_ERROR_TYPE_ITEM, item,
2218 "IPv6 proto (next header) should "
2219 "not be set as extension header");
2220 if (item_flags & MLX5_FLOW_LAYER_IPIP)
2221 return rte_flow_error_set(error, EINVAL,
2222 RTE_FLOW_ERROR_TYPE_ITEM, item,
2223 "wrong tunnel type - IPv4 specified "
2224 "but IPv6 item provided");
2225 if (item_flags & l3m)
2226 return rte_flow_error_set(error, ENOTSUP,
2227 RTE_FLOW_ERROR_TYPE_ITEM, item,
2228 "multiple L3 layers not supported");
2229 else if (item_flags & l4m)
2230 return rte_flow_error_set(error, EINVAL,
2231 RTE_FLOW_ERROR_TYPE_ITEM, item,
2232 "L3 cannot follow an L4 layer.");
2233 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2234 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2235 return rte_flow_error_set(error, EINVAL,
2236 RTE_FLOW_ERROR_TYPE_ITEM, item,
2237 "L3 cannot follow an NVGRE layer.");
2239 mask = &rte_flow_item_ipv6_mask;
2240 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2241 acc_mask ? (const uint8_t *)acc_mask
2242 : (const uint8_t *)&nic_mask,
2243 sizeof(struct rte_flow_item_ipv6),
2244 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2251 * Validate UDP item.
2254 * Item specification.
2255 * @param[in] item_flags
2256 * Bit-fields that holds the items detected until now.
2257 * @param[in] target_protocol
2258 * The next protocol in the previous item.
2259 * @param[in] flow_mask
2260 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2262 * Pointer to error structure.
2265 * 0 on success, a negative errno value otherwise and rte_errno is set.
2268 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2269 uint64_t item_flags,
2270 uint8_t target_protocol,
2271 struct rte_flow_error *error)
2273 const struct rte_flow_item_udp *mask = item->mask;
2274 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2275 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2276 MLX5_FLOW_LAYER_OUTER_L3;
2277 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2278 MLX5_FLOW_LAYER_OUTER_L4;
2281 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2282 return rte_flow_error_set(error, EINVAL,
2283 RTE_FLOW_ERROR_TYPE_ITEM, item,
2284 "protocol filtering not compatible"
2286 if (!(item_flags & l3m))
2287 return rte_flow_error_set(error, EINVAL,
2288 RTE_FLOW_ERROR_TYPE_ITEM, item,
2289 "L3 is mandatory to filter on L4");
2290 if (item_flags & l4m)
2291 return rte_flow_error_set(error, EINVAL,
2292 RTE_FLOW_ERROR_TYPE_ITEM, item,
2293 "multiple L4 layers not supported");
2295 mask = &rte_flow_item_udp_mask;
2296 ret = mlx5_flow_item_acceptable
2297 (item, (const uint8_t *)mask,
2298 (const uint8_t *)&rte_flow_item_udp_mask,
2299 sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2307 * Validate TCP item.
2310 * Item specification.
2311 * @param[in] item_flags
2312 * Bit-fields that holds the items detected until now.
2313 * @param[in] target_protocol
2314 * The next protocol in the previous item.
2316 * Pointer to error structure.
2319 * 0 on success, a negative errno value otherwise and rte_errno is set.
2322 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2323 uint64_t item_flags,
2324 uint8_t target_protocol,
2325 const struct rte_flow_item_tcp *flow_mask,
2326 struct rte_flow_error *error)
2328 const struct rte_flow_item_tcp *mask = item->mask;
2329 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2330 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2331 MLX5_FLOW_LAYER_OUTER_L3;
2332 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2333 MLX5_FLOW_LAYER_OUTER_L4;
2336 MLX5_ASSERT(flow_mask);
2337 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2338 return rte_flow_error_set(error, EINVAL,
2339 RTE_FLOW_ERROR_TYPE_ITEM, item,
2340 "protocol filtering not compatible"
2342 if (!(item_flags & l3m))
2343 return rte_flow_error_set(error, EINVAL,
2344 RTE_FLOW_ERROR_TYPE_ITEM, item,
2345 "L3 is mandatory to filter on L4");
2346 if (item_flags & l4m)
2347 return rte_flow_error_set(error, EINVAL,
2348 RTE_FLOW_ERROR_TYPE_ITEM, item,
2349 "multiple L4 layers not supported");
2351 mask = &rte_flow_item_tcp_mask;
2352 ret = mlx5_flow_item_acceptable
2353 (item, (const uint8_t *)mask,
2354 (const uint8_t *)flow_mask,
2355 sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2363 * Validate VXLAN item.
2366 * Item specification.
2367 * @param[in] item_flags
2368 * Bit-fields that holds the items detected until now.
2369 * @param[in] target_protocol
2370 * The next protocol in the previous item.
2372 * Pointer to error structure.
2375 * 0 on success, a negative errno value otherwise and rte_errno is set.
2378 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2379 uint64_t item_flags,
2380 struct rte_flow_error *error)
2382 const struct rte_flow_item_vxlan *spec = item->spec;
2383 const struct rte_flow_item_vxlan *mask = item->mask;
2388 } id = { .vlan_id = 0, };
2391 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2392 return rte_flow_error_set(error, ENOTSUP,
2393 RTE_FLOW_ERROR_TYPE_ITEM, item,
2394 "multiple tunnel layers not"
2397 * Verify only UDPv4 is present as defined in
2398 * https://tools.ietf.org/html/rfc7348
2400 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2401 return rte_flow_error_set(error, EINVAL,
2402 RTE_FLOW_ERROR_TYPE_ITEM, item,
2403 "no outer UDP layer found");
2405 mask = &rte_flow_item_vxlan_mask;
2406 ret = mlx5_flow_item_acceptable
2407 (item, (const uint8_t *)mask,
2408 (const uint8_t *)&rte_flow_item_vxlan_mask,
2409 sizeof(struct rte_flow_item_vxlan),
2410 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2414 memcpy(&id.vni[1], spec->vni, 3);
2415 memcpy(&id.vni[1], mask->vni, 3);
2417 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2418 return rte_flow_error_set(error, ENOTSUP,
2419 RTE_FLOW_ERROR_TYPE_ITEM, item,
2420 "VXLAN tunnel must be fully defined");
2425 * Validate VXLAN_GPE item.
2428 * Item specification.
2429 * @param[in] item_flags
2430 * Bit-fields that holds the items detected until now.
2432 * Pointer to the private data structure.
2433 * @param[in] target_protocol
2434 * The next protocol in the previous item.
2436 * Pointer to error structure.
2439 * 0 on success, a negative errno value otherwise and rte_errno is set.
2442 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2443 uint64_t item_flags,
2444 struct rte_eth_dev *dev,
2445 struct rte_flow_error *error)
2447 struct mlx5_priv *priv = dev->data->dev_private;
2448 const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2449 const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2454 } id = { .vlan_id = 0, };
2456 if (!priv->config.l3_vxlan_en)
2457 return rte_flow_error_set(error, ENOTSUP,
2458 RTE_FLOW_ERROR_TYPE_ITEM, item,
2459 "L3 VXLAN is not enabled by device"
2460 " parameter and/or not configured in"
2462 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2463 return rte_flow_error_set(error, ENOTSUP,
2464 RTE_FLOW_ERROR_TYPE_ITEM, item,
2465 "multiple tunnel layers not"
2468 * Verify only UDPv4 is present as defined in
2469 * https://tools.ietf.org/html/rfc7348
2471 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2472 return rte_flow_error_set(error, EINVAL,
2473 RTE_FLOW_ERROR_TYPE_ITEM, item,
2474 "no outer UDP layer found");
2476 mask = &rte_flow_item_vxlan_gpe_mask;
2477 ret = mlx5_flow_item_acceptable
2478 (item, (const uint8_t *)mask,
2479 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2480 sizeof(struct rte_flow_item_vxlan_gpe),
2481 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2486 return rte_flow_error_set(error, ENOTSUP,
2487 RTE_FLOW_ERROR_TYPE_ITEM,
2489 "VxLAN-GPE protocol"
2491 memcpy(&id.vni[1], spec->vni, 3);
2492 memcpy(&id.vni[1], mask->vni, 3);
2494 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2495 return rte_flow_error_set(error, ENOTSUP,
2496 RTE_FLOW_ERROR_TYPE_ITEM, item,
2497 "VXLAN-GPE tunnel must be fully"
2502 * Validate GRE Key item.
2505 * Item specification.
2506 * @param[in] item_flags
2507 * Bit flags to mark detected items.
2508 * @param[in] gre_item
2509 * Pointer to gre_item
2511 * Pointer to error structure.
2514 * 0 on success, a negative errno value otherwise and rte_errno is set.
2517 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2518 uint64_t item_flags,
2519 const struct rte_flow_item *gre_item,
2520 struct rte_flow_error *error)
2522 const rte_be32_t *mask = item->mask;
2524 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2525 const struct rte_flow_item_gre *gre_spec;
2526 const struct rte_flow_item_gre *gre_mask;
2528 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2529 return rte_flow_error_set(error, ENOTSUP,
2530 RTE_FLOW_ERROR_TYPE_ITEM, item,
2531 "Multiple GRE key not support");
2532 if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2533 return rte_flow_error_set(error, ENOTSUP,
2534 RTE_FLOW_ERROR_TYPE_ITEM, item,
2535 "No preceding GRE header");
2536 if (item_flags & MLX5_FLOW_LAYER_INNER)
2537 return rte_flow_error_set(error, ENOTSUP,
2538 RTE_FLOW_ERROR_TYPE_ITEM, item,
2539 "GRE key following a wrong item");
2540 gre_mask = gre_item->mask;
2542 gre_mask = &rte_flow_item_gre_mask;
2543 gre_spec = gre_item->spec;
2544 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2545 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2546 return rte_flow_error_set(error, EINVAL,
2547 RTE_FLOW_ERROR_TYPE_ITEM, item,
2548 "Key bit must be on");
2551 mask = &gre_key_default_mask;
2552 ret = mlx5_flow_item_acceptable
2553 (item, (const uint8_t *)mask,
2554 (const uint8_t *)&gre_key_default_mask,
2555 sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2560 * Validate GRE item.
2563 * Item specification.
2564 * @param[in] item_flags
2565 * Bit flags to mark detected items.
2566 * @param[in] target_protocol
2567 * The next protocol in the previous item.
2569 * Pointer to error structure.
2572 * 0 on success, a negative errno value otherwise and rte_errno is set.
2575 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2576 uint64_t item_flags,
2577 uint8_t target_protocol,
2578 struct rte_flow_error *error)
2580 const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2581 const struct rte_flow_item_gre *mask = item->mask;
2583 const struct rte_flow_item_gre nic_mask = {
2584 .c_rsvd0_ver = RTE_BE16(0xB000),
2585 .protocol = RTE_BE16(UINT16_MAX),
2588 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2589 return rte_flow_error_set(error, EINVAL,
2590 RTE_FLOW_ERROR_TYPE_ITEM, item,
2591 "protocol filtering not compatible"
2592 " with this GRE layer");
2593 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2594 return rte_flow_error_set(error, ENOTSUP,
2595 RTE_FLOW_ERROR_TYPE_ITEM, item,
2596 "multiple tunnel layers not"
2598 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2599 return rte_flow_error_set(error, ENOTSUP,
2600 RTE_FLOW_ERROR_TYPE_ITEM, item,
2601 "L3 Layer is missing");
2603 mask = &rte_flow_item_gre_mask;
2604 ret = mlx5_flow_item_acceptable
2605 (item, (const uint8_t *)mask,
2606 (const uint8_t *)&nic_mask,
2607 sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2611 #ifndef HAVE_MLX5DV_DR
2612 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2613 if (spec && (spec->protocol & mask->protocol))
2614 return rte_flow_error_set(error, ENOTSUP,
2615 RTE_FLOW_ERROR_TYPE_ITEM, item,
2616 "without MPLS support the"
2617 " specification cannot be used for"
2625 * Validate Geneve item.
2628 * Item specification.
2629 * @param[in] itemFlags
2630 * Bit-fields that holds the items detected until now.
2632 * Pointer to the private data structure.
2634 * Pointer to error structure.
2637 * 0 on success, a negative errno value otherwise and rte_errno is set.
2641 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2642 uint64_t item_flags,
2643 struct rte_eth_dev *dev,
2644 struct rte_flow_error *error)
2646 struct mlx5_priv *priv = dev->data->dev_private;
2647 const struct rte_flow_item_geneve *spec = item->spec;
2648 const struct rte_flow_item_geneve *mask = item->mask;
2651 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2652 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2653 const struct rte_flow_item_geneve nic_mask = {
2654 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2655 .vni = "\xff\xff\xff",
2656 .protocol = RTE_BE16(UINT16_MAX),
2659 if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2660 return rte_flow_error_set(error, ENOTSUP,
2661 RTE_FLOW_ERROR_TYPE_ITEM, item,
2662 "L3 Geneve is not enabled by device"
2663 " parameter and/or not configured in"
2665 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2666 return rte_flow_error_set(error, ENOTSUP,
2667 RTE_FLOW_ERROR_TYPE_ITEM, item,
2668 "multiple tunnel layers not"
2671 * Verify only UDPv4 is present as defined in
2672 * https://tools.ietf.org/html/rfc7348
2674 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2675 return rte_flow_error_set(error, EINVAL,
2676 RTE_FLOW_ERROR_TYPE_ITEM, item,
2677 "no outer UDP layer found");
2679 mask = &rte_flow_item_geneve_mask;
2680 ret = mlx5_flow_item_acceptable
2681 (item, (const uint8_t *)mask,
2682 (const uint8_t *)&nic_mask,
2683 sizeof(struct rte_flow_item_geneve),
2684 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2688 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2689 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2690 MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2691 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2692 return rte_flow_error_set(error, ENOTSUP,
2693 RTE_FLOW_ERROR_TYPE_ITEM,
2695 "Geneve protocol unsupported"
2696 " fields are being used");
2697 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2698 return rte_flow_error_set
2700 RTE_FLOW_ERROR_TYPE_ITEM,
2702 "Unsupported Geneve options length");
2704 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2705 return rte_flow_error_set
2707 RTE_FLOW_ERROR_TYPE_ITEM, item,
2708 "Geneve tunnel must be fully defined");
2713 * Validate MPLS item.
2716 * Pointer to the rte_eth_dev structure.
2718 * Item specification.
2719 * @param[in] item_flags
2720 * Bit-fields that holds the items detected until now.
2721 * @param[in] prev_layer
2722 * The protocol layer indicated in previous item.
2724 * Pointer to error structure.
2727 * 0 on success, a negative errno value otherwise and rte_errno is set.
2730 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2731 const struct rte_flow_item *item __rte_unused,
2732 uint64_t item_flags __rte_unused,
2733 uint64_t prev_layer __rte_unused,
2734 struct rte_flow_error *error)
2736 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2737 const struct rte_flow_item_mpls *mask = item->mask;
2738 struct mlx5_priv *priv = dev->data->dev_private;
2741 if (!priv->config.mpls_en)
2742 return rte_flow_error_set(error, ENOTSUP,
2743 RTE_FLOW_ERROR_TYPE_ITEM, item,
2744 "MPLS not supported or"
2745 " disabled in firmware"
2747 /* MPLS over IP, UDP, GRE is allowed */
2748 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2749 MLX5_FLOW_LAYER_OUTER_L4_UDP |
2750 MLX5_FLOW_LAYER_GRE |
2751 MLX5_FLOW_LAYER_GRE_KEY)))
2752 return rte_flow_error_set(error, EINVAL,
2753 RTE_FLOW_ERROR_TYPE_ITEM, item,
2754 "protocol filtering not compatible"
2755 " with MPLS layer");
2756 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2757 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2758 !(item_flags & MLX5_FLOW_LAYER_GRE))
2759 return rte_flow_error_set(error, ENOTSUP,
2760 RTE_FLOW_ERROR_TYPE_ITEM, item,
2761 "multiple tunnel layers not"
2764 mask = &rte_flow_item_mpls_mask;
2765 ret = mlx5_flow_item_acceptable
2766 (item, (const uint8_t *)mask,
2767 (const uint8_t *)&rte_flow_item_mpls_mask,
2768 sizeof(struct rte_flow_item_mpls),
2769 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2774 return rte_flow_error_set(error, ENOTSUP,
2775 RTE_FLOW_ERROR_TYPE_ITEM, item,
2776 "MPLS is not supported by Verbs, please"
2782 * Validate NVGRE item.
2785 * Item specification.
2786 * @param[in] item_flags
2787 * Bit flags to mark detected items.
2788 * @param[in] target_protocol
2789 * The next protocol in the previous item.
2791 * Pointer to error structure.
2794 * 0 on success, a negative errno value otherwise and rte_errno is set.
2797 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2798 uint64_t item_flags,
2799 uint8_t target_protocol,
2800 struct rte_flow_error *error)
2802 const struct rte_flow_item_nvgre *mask = item->mask;
2805 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2806 return rte_flow_error_set(error, EINVAL,
2807 RTE_FLOW_ERROR_TYPE_ITEM, item,
2808 "protocol filtering not compatible"
2809 " with this GRE layer");
2810 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2811 return rte_flow_error_set(error, ENOTSUP,
2812 RTE_FLOW_ERROR_TYPE_ITEM, item,
2813 "multiple tunnel layers not"
2815 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2816 return rte_flow_error_set(error, ENOTSUP,
2817 RTE_FLOW_ERROR_TYPE_ITEM, item,
2818 "L3 Layer is missing");
2820 mask = &rte_flow_item_nvgre_mask;
2821 ret = mlx5_flow_item_acceptable
2822 (item, (const uint8_t *)mask,
2823 (const uint8_t *)&rte_flow_item_nvgre_mask,
2824 sizeof(struct rte_flow_item_nvgre),
2825 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2832 * Validate eCPRI item.
2835 * Item specification.
2836 * @param[in] item_flags
2837 * Bit-fields that holds the items detected until now.
2838 * @param[in] last_item
2839 * Previous validated item in the pattern items.
2840 * @param[in] ether_type
2841 * Type in the ethernet layer header (including dot1q).
2842 * @param[in] acc_mask
2843 * Acceptable mask, if NULL default internal default mask
2844 * will be used to check whether item fields are supported.
2846 * Pointer to error structure.
2849 * 0 on success, a negative errno value otherwise and rte_errno is set.
2852 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2853 uint64_t item_flags,
2855 uint16_t ether_type,
2856 const struct rte_flow_item_ecpri *acc_mask,
2857 struct rte_flow_error *error)
2859 const struct rte_flow_item_ecpri *mask = item->mask;
2860 const struct rte_flow_item_ecpri nic_mask = {
2864 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2868 .dummy[0] = 0xFFFFFFFF,
2871 const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
2872 MLX5_FLOW_LAYER_OUTER_VLAN);
2873 struct rte_flow_item_ecpri mask_lo;
2875 if (!(last_item & outer_l2_vlan) &&
2876 last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
2877 return rte_flow_error_set(error, EINVAL,
2878 RTE_FLOW_ERROR_TYPE_ITEM, item,
2879 "eCPRI can only follow L2/VLAN layer or UDP layer");
2880 if ((last_item & outer_l2_vlan) && ether_type &&
2881 ether_type != RTE_ETHER_TYPE_ECPRI)
2882 return rte_flow_error_set(error, EINVAL,
2883 RTE_FLOW_ERROR_TYPE_ITEM, item,
2884 "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
2885 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2886 return rte_flow_error_set(error, EINVAL,
2887 RTE_FLOW_ERROR_TYPE_ITEM, item,
2888 "eCPRI with tunnel is not supported right now");
2889 if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
2890 return rte_flow_error_set(error, ENOTSUP,
2891 RTE_FLOW_ERROR_TYPE_ITEM, item,
2892 "multiple L3 layers not supported");
2893 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
2894 return rte_flow_error_set(error, EINVAL,
2895 RTE_FLOW_ERROR_TYPE_ITEM, item,
2896 "eCPRI cannot coexist with a TCP layer");
2897 /* In specification, eCPRI could be over UDP layer. */
2898 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
2899 return rte_flow_error_set(error, EINVAL,
2900 RTE_FLOW_ERROR_TYPE_ITEM, item,
2901 "eCPRI over UDP layer is not yet supported right now");
2902 /* Mask for type field in common header could be zero. */
2904 mask = &rte_flow_item_ecpri_mask;
2905 mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
2906 /* Input mask is in big-endian format. */
2907 if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
2908 return rte_flow_error_set(error, EINVAL,
2909 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2910 "partial mask is not supported for protocol");
2911 else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
2912 return rte_flow_error_set(error, EINVAL,
2913 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2914 "message header mask must be after a type mask");
2915 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2916 acc_mask ? (const uint8_t *)acc_mask
2917 : (const uint8_t *)&nic_mask,
2918 sizeof(struct rte_flow_item_ecpri),
2919 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2923 * Release resource related QUEUE/RSS action split.
2926 * Pointer to Ethernet device.
2928 * Flow to release id's from.
2931 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2932 struct rte_flow *flow)
2934 struct mlx5_priv *priv = dev->data->dev_private;
2935 uint32_t handle_idx;
2936 struct mlx5_flow_handle *dev_handle;
2938 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
2939 handle_idx, dev_handle, next)
2940 if (dev_handle->split_flow_id)
2941 mlx5_ipool_free(priv->sh->ipool
2942 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
2943 dev_handle->split_flow_id);
2947 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2948 const struct rte_flow_attr *attr __rte_unused,
2949 const struct rte_flow_item items[] __rte_unused,
2950 const struct rte_flow_action actions[] __rte_unused,
2951 bool external __rte_unused,
2952 int hairpin __rte_unused,
2953 struct rte_flow_error *error)
2955 return rte_flow_error_set(error, ENOTSUP,
2956 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2959 static struct mlx5_flow *
2960 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
2961 const struct rte_flow_attr *attr __rte_unused,
2962 const struct rte_flow_item items[] __rte_unused,
2963 const struct rte_flow_action actions[] __rte_unused,
2964 struct rte_flow_error *error)
2966 rte_flow_error_set(error, ENOTSUP,
2967 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2972 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2973 struct mlx5_flow *dev_flow __rte_unused,
2974 const struct rte_flow_attr *attr __rte_unused,
2975 const struct rte_flow_item items[] __rte_unused,
2976 const struct rte_flow_action actions[] __rte_unused,
2977 struct rte_flow_error *error)
2979 return rte_flow_error_set(error, ENOTSUP,
2980 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2984 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2985 struct rte_flow *flow __rte_unused,
2986 struct rte_flow_error *error)
2988 return rte_flow_error_set(error, ENOTSUP,
2989 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2993 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2994 struct rte_flow *flow __rte_unused)
2999 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3000 struct rte_flow *flow __rte_unused)
3005 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3006 struct rte_flow *flow __rte_unused,
3007 const struct rte_flow_action *actions __rte_unused,
3008 void *data __rte_unused,
3009 struct rte_flow_error *error)
3011 return rte_flow_error_set(error, ENOTSUP,
3012 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3016 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3017 uint32_t domains __rte_unused,
3018 uint32_t flags __rte_unused)
3023 /* Void driver to protect from null pointer reference. */
3024 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3025 .validate = flow_null_validate,
3026 .prepare = flow_null_prepare,
3027 .translate = flow_null_translate,
3028 .apply = flow_null_apply,
3029 .remove = flow_null_remove,
3030 .destroy = flow_null_destroy,
3031 .query = flow_null_query,
3032 .sync_domain = flow_null_sync_domain,
3036 * Select flow driver type according to flow attributes and device
3040 * Pointer to the dev structure.
3042 * Pointer to the flow attributes.
3045 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3047 static enum mlx5_flow_drv_type
3048 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3050 struct mlx5_priv *priv = dev->data->dev_private;
3051 /* The OS can determine first a specific flow type (DV, VERBS) */
3052 enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3054 if (type != MLX5_FLOW_TYPE_MAX)
3056 /* If no OS specific type - continue with DV/VERBS selection */
3057 if (attr->transfer && priv->config.dv_esw_en)
3058 type = MLX5_FLOW_TYPE_DV;
3059 if (!attr->transfer)
3060 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3061 MLX5_FLOW_TYPE_VERBS;
3065 #define flow_get_drv_ops(type) flow_drv_ops[type]
3068 * Flow driver validation API. This abstracts calling driver specific functions.
3069 * The type of flow driver is determined according to flow attributes.
3072 * Pointer to the dev structure.
3074 * Pointer to the flow attributes.
3076 * Pointer to the list of items.
3077 * @param[in] actions
3078 * Pointer to the list of actions.
3079 * @param[in] external
3080 * This flow rule is created by request external to PMD.
3081 * @param[in] hairpin
3082 * Number of hairpin TX actions, 0 means classic flow.
3084 * Pointer to the error structure.
3087 * 0 on success, a negative errno value otherwise and rte_errno is set.
3090 flow_drv_validate(struct rte_eth_dev *dev,
3091 const struct rte_flow_attr *attr,
3092 const struct rte_flow_item items[],
3093 const struct rte_flow_action actions[],
3094 bool external, int hairpin, struct rte_flow_error *error)
3096 const struct mlx5_flow_driver_ops *fops;
3097 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3099 fops = flow_get_drv_ops(type);
3100 return fops->validate(dev, attr, items, actions, external,
3105 * Flow driver preparation API. This abstracts calling driver specific
3106 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3107 * calculates the size of memory required for device flow, allocates the memory,
3108 * initializes the device flow and returns the pointer.
3111 * This function initializes device flow structure such as dv or verbs in
3112 * struct mlx5_flow. However, it is caller's responsibility to initialize the
3113 * rest. For example, adding returning device flow to flow->dev_flow list and
3114 * setting backward reference to the flow should be done out of this function.
3115 * layers field is not filled either.
3118 * Pointer to the dev structure.
3120 * Pointer to the flow attributes.
3122 * Pointer to the list of items.
3123 * @param[in] actions
3124 * Pointer to the list of actions.
3125 * @param[in] flow_idx
3126 * This memory pool index to the flow.
3128 * Pointer to the error structure.
3131 * Pointer to device flow on success, otherwise NULL and rte_errno is set.
3133 static inline struct mlx5_flow *
3134 flow_drv_prepare(struct rte_eth_dev *dev,
3135 const struct rte_flow *flow,
3136 const struct rte_flow_attr *attr,
3137 const struct rte_flow_item items[],
3138 const struct rte_flow_action actions[],
3140 struct rte_flow_error *error)
3142 const struct mlx5_flow_driver_ops *fops;
3143 enum mlx5_flow_drv_type type = flow->drv_type;
3144 struct mlx5_flow *mlx5_flow = NULL;
3146 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3147 fops = flow_get_drv_ops(type);
3148 mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3150 mlx5_flow->flow_idx = flow_idx;
3155 * Flow driver translation API. This abstracts calling driver specific
3156 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3157 * translates a generic flow into a driver flow. flow_drv_prepare() must
3161 * dev_flow->layers could be filled as a result of parsing during translation
3162 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3163 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3164 * flow->actions could be overwritten even though all the expanded dev_flows
3165 * have the same actions.
3168 * Pointer to the rte dev structure.
3169 * @param[in, out] dev_flow
3170 * Pointer to the mlx5 flow.
3172 * Pointer to the flow attributes.
3174 * Pointer to the list of items.
3175 * @param[in] actions
3176 * Pointer to the list of actions.
3178 * Pointer to the error structure.
3181 * 0 on success, a negative errno value otherwise and rte_errno is set.
3184 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3185 const struct rte_flow_attr *attr,
3186 const struct rte_flow_item items[],
3187 const struct rte_flow_action actions[],
3188 struct rte_flow_error *error)
3190 const struct mlx5_flow_driver_ops *fops;
3191 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3193 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3194 fops = flow_get_drv_ops(type);
3195 return fops->translate(dev, dev_flow, attr, items, actions, error);
3199 * Flow driver apply API. This abstracts calling driver specific functions.
3200 * Parent flow (rte_flow) should have driver type (drv_type). It applies
3201 * translated driver flows on to device. flow_drv_translate() must precede.
3204 * Pointer to Ethernet device structure.
3205 * @param[in, out] flow
3206 * Pointer to flow structure.
3208 * Pointer to error structure.
3211 * 0 on success, a negative errno value otherwise and rte_errno is set.
3214 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3215 struct rte_flow_error *error)
3217 const struct mlx5_flow_driver_ops *fops;
3218 enum mlx5_flow_drv_type type = flow->drv_type;
3220 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3221 fops = flow_get_drv_ops(type);
3222 return fops->apply(dev, flow, error);
3226 * Flow driver destroy API. This abstracts calling driver specific functions.
3227 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3228 * on device and releases resources of the flow.
3231 * Pointer to Ethernet device.
3232 * @param[in, out] flow
3233 * Pointer to flow structure.
3236 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3238 const struct mlx5_flow_driver_ops *fops;
3239 enum mlx5_flow_drv_type type = flow->drv_type;
3241 flow_mreg_split_qrss_release(dev, flow);
3242 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3243 fops = flow_get_drv_ops(type);
3244 fops->destroy(dev, flow);
3248 * Get RSS action from the action list.
3250 * @param[in] actions
3251 * Pointer to the list of actions.
3254 * Pointer to the RSS action if exist, else return NULL.
3256 static const struct rte_flow_action_rss*
3257 flow_get_rss_action(const struct rte_flow_action actions[])
3259 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3260 switch (actions->type) {
3261 case RTE_FLOW_ACTION_TYPE_RSS:
3262 return (const struct rte_flow_action_rss *)
3272 * Get ASO age action by index.
3275 * Pointer to the Ethernet device structure.
3276 * @param[in] age_idx
3277 * Index to the ASO age action.
3280 * The specified ASO age action.
3282 struct mlx5_aso_age_action*
3283 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3285 uint16_t pool_idx = age_idx & UINT16_MAX;
3286 uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3287 struct mlx5_priv *priv = dev->data->dev_private;
3288 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3289 struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3291 return &pool->actions[offset - 1];
3294 /* maps shared action to translated non shared in some actions array */
3295 struct mlx5_translated_shared_action {
3296 struct rte_flow_shared_action *action; /**< Shared action */
3297 int index; /**< Index in related array of rte_flow_action */
3301 * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
3302 * non shared action if translation possible.
3303 * This functionality used to run same execution path for both shared & non
3304 * shared actions on flow create. All necessary preparations for shared
3305 * action handling should be preformed on *shared* actions list returned
3309 * Pointer to Ethernet device.
3310 * @param[in] actions
3311 * List of actions to translate.
3312 * @param[out] shared
3313 * List to store translated shared actions.
3314 * @param[in, out] shared_n
3315 * Size of *shared* array. On return should be updated with number of shared
3316 * actions retrieved from the *actions* list.
3317 * @param[out] translated_actions
3318 * List of actions where all shared actions were translated to non shared
3319 * if possible. NULL if no translation took place.
3321 * Pointer to the error structure.
3324 * 0 on success, a negative errno value otherwise and rte_errno is set.
3327 flow_shared_actions_translate(struct rte_eth_dev *dev,
3328 const struct rte_flow_action actions[],
3329 struct mlx5_translated_shared_action *shared,
3331 struct rte_flow_action **translated_actions,
3332 struct rte_flow_error *error)
3334 struct mlx5_priv *priv = dev->data->dev_private;
3335 struct rte_flow_action *translated = NULL;
3336 size_t actions_size;
3339 struct mlx5_translated_shared_action *shared_end = NULL;
3341 for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3342 if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
3344 if (copied_n == *shared_n) {
3345 return rte_flow_error_set
3346 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3347 NULL, "too many shared actions");
3349 rte_memcpy(&shared[copied_n].action, &actions[n].conf,
3350 sizeof(actions[n].conf));
3351 shared[copied_n].index = n;
3355 *shared_n = copied_n;
3358 actions_size = sizeof(struct rte_flow_action) * n;
3359 translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3364 memcpy(translated, actions, actions_size);
3365 for (shared_end = shared + copied_n; shared < shared_end; shared++) {
3366 struct mlx5_shared_action_rss *shared_rss;
3367 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3368 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3369 uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET)
3373 case MLX5_SHARED_ACTION_TYPE_RSS:
3374 shared_rss = mlx5_ipool_get
3375 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3376 translated[shared->index].type =
3377 RTE_FLOW_ACTION_TYPE_RSS;
3378 translated[shared->index].conf =
3379 &shared_rss->origin;
3381 case MLX5_SHARED_ACTION_TYPE_AGE:
3382 if (priv->sh->flow_hit_aso_en) {
3383 translated[shared->index].type =
3384 (enum rte_flow_action_type)
3385 MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3386 translated[shared->index].conf =
3387 (void *)(uintptr_t)idx;
3392 mlx5_free(translated);
3393 return rte_flow_error_set
3394 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3395 NULL, "invalid shared action type");
3398 *translated_actions = translated;
3403 * Get Shared RSS action from the action list.
3406 * Pointer to Ethernet device.
3408 * Pointer to the list of actions.
3409 * @param[in] shared_n
3410 * Actions list length.
3413 * The MLX5 RSS action ID if exists, otherwise return 0.
3416 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3417 struct mlx5_translated_shared_action *shared,
3420 struct mlx5_translated_shared_action *shared_end;
3421 struct mlx5_priv *priv = dev->data->dev_private;
3422 struct mlx5_shared_action_rss *shared_rss;
3425 for (shared_end = shared + shared_n; shared < shared_end; shared++) {
3426 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3427 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3428 uint32_t idx = act_idx &
3429 ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
3431 case MLX5_SHARED_ACTION_TYPE_RSS:
3432 shared_rss = mlx5_ipool_get
3433 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3435 __atomic_add_fetch(&shared_rss->refcnt, 1,
3446 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3448 const struct rte_flow_item *item;
3449 unsigned int has_vlan = 0;
3451 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3452 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3458 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3459 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3460 return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3461 MLX5_EXPANSION_ROOT_OUTER;
3465 * Get layer flags from the prefix flow.
3467 * Some flows may be split to several subflows, the prefix subflow gets the
3468 * match items and the suffix sub flow gets the actions.
3469 * Some actions need the user defined match item flags to get the detail for
3471 * This function helps the suffix flow to get the item layer flags from prefix
3474 * @param[in] dev_flow
3475 * Pointer the created preifx subflow.
3478 * The layers get from prefix subflow.
3480 static inline uint64_t
3481 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3483 uint64_t layers = 0;
3486 * Layers bits could be localization, but usually the compiler will
3487 * help to do the optimization work for source code.
3488 * If no decap actions, use the layers directly.
3490 if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3491 return dev_flow->handle->layers;
3492 /* Convert L3 layers with decap action. */
3493 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3494 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3495 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3496 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3497 /* Convert L4 layers with decap action. */
3498 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3499 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3500 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3501 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3506 * Get metadata split action information.
3508 * @param[in] actions
3509 * Pointer to the list of actions.
3511 * Pointer to the return pointer.
3512 * @param[out] qrss_type
3513 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3514 * if no QUEUE/RSS is found.
3515 * @param[out] encap_idx
3516 * Pointer to the index of the encap action if exists, otherwise the last
3520 * Total number of actions.
3523 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3524 const struct rte_flow_action **qrss,
3527 const struct rte_flow_action_raw_encap *raw_encap;
3529 int raw_decap_idx = -1;
3532 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3533 switch (actions->type) {
3534 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3535 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3536 *encap_idx = actions_n;
3538 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3539 raw_decap_idx = actions_n;
3541 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3542 raw_encap = actions->conf;
3543 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3544 *encap_idx = raw_decap_idx != -1 ?
3545 raw_decap_idx : actions_n;
3547 case RTE_FLOW_ACTION_TYPE_QUEUE:
3548 case RTE_FLOW_ACTION_TYPE_RSS:
3556 if (*encap_idx == -1)
3557 *encap_idx = actions_n;
3558 /* Count RTE_FLOW_ACTION_TYPE_END. */
3559 return actions_n + 1;
3563 * Check meter action from the action list.
3565 * @param[in] actions
3566 * Pointer to the list of actions.
3568 * Pointer to the meter exist flag.
3571 * Total number of actions.
3574 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
3580 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3581 switch (actions->type) {
3582 case RTE_FLOW_ACTION_TYPE_METER:
3590 /* Count RTE_FLOW_ACTION_TYPE_END. */
3591 return actions_n + 1;
3595 * Check if the flow should be split due to hairpin.
3596 * The reason for the split is that in current HW we can't
3597 * support encap and push-vlan on Rx, so if a flow contains
3598 * these actions we move it to Tx.
3601 * Pointer to Ethernet device.
3603 * Flow rule attributes.
3604 * @param[in] actions
3605 * Associated actions (list terminated by the END action).
3608 * > 0 the number of actions and the flow should be split,
3609 * 0 when no split required.
3612 flow_check_hairpin_split(struct rte_eth_dev *dev,
3613 const struct rte_flow_attr *attr,
3614 const struct rte_flow_action actions[])
3616 int queue_action = 0;
3619 const struct rte_flow_action_queue *queue;
3620 const struct rte_flow_action_rss *rss;
3621 const struct rte_flow_action_raw_encap *raw_encap;
3622 const struct rte_eth_hairpin_conf *conf;
3626 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3627 switch (actions->type) {
3628 case RTE_FLOW_ACTION_TYPE_QUEUE:
3629 queue = actions->conf;
3632 conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3633 if (conf != NULL && !!conf->tx_explicit)
3638 case RTE_FLOW_ACTION_TYPE_RSS:
3639 rss = actions->conf;
3640 if (rss == NULL || rss->queue_num == 0)
3642 conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3643 if (conf != NULL && !!conf->tx_explicit)
3648 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3649 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3650 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3651 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3652 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3656 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3657 raw_encap = actions->conf;
3658 if (raw_encap->size >
3659 (sizeof(struct rte_flow_item_eth) +
3660 sizeof(struct rte_flow_item_ipv4)))
3669 if (split && queue_action)
3674 /* Declare flow create/destroy prototype in advance. */
3676 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3677 const struct rte_flow_attr *attr,
3678 const struct rte_flow_item items[],
3679 const struct rte_flow_action actions[],
3680 bool external, struct rte_flow_error *error);
3683 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3686 struct mlx5_hlist_entry *
3687 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key,
3690 struct rte_eth_dev *dev = list->ctx;
3691 struct mlx5_priv *priv = dev->data->dev_private;
3692 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3693 struct mlx5_flow_mreg_copy_resource *mcp_res;
3694 struct rte_flow_error *error = ctx->error;
3697 uint32_t mark_id = key;
3698 struct rte_flow_attr attr = {
3699 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3702 struct mlx5_rte_flow_item_tag tag_spec = {
3705 struct rte_flow_item items[] = {
3706 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3708 struct rte_flow_action_mark ftag = {
3711 struct mlx5_flow_action_copy_mreg cp_mreg = {
3715 struct rte_flow_action_jump jump = {
3716 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3718 struct rte_flow_action actions[] = {
3719 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
3722 /* Fill the register fileds in the flow. */
3723 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3727 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3731 /* Provide the full width of FLAG specific value. */
3732 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3733 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3734 /* Build a new flow. */
3735 if (mark_id != MLX5_DEFAULT_COPY_ID) {
3736 items[0] = (struct rte_flow_item){
3737 .type = (enum rte_flow_item_type)
3738 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3741 items[1] = (struct rte_flow_item){
3742 .type = RTE_FLOW_ITEM_TYPE_END,
3744 actions[0] = (struct rte_flow_action){
3745 .type = (enum rte_flow_action_type)
3746 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3749 actions[1] = (struct rte_flow_action){
3750 .type = (enum rte_flow_action_type)
3751 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3754 actions[2] = (struct rte_flow_action){
3755 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3758 actions[3] = (struct rte_flow_action){
3759 .type = RTE_FLOW_ACTION_TYPE_END,
3762 /* Default rule, wildcard match. */
3763 attr.priority = MLX5_FLOW_PRIO_RSVD;
3764 items[0] = (struct rte_flow_item){
3765 .type = RTE_FLOW_ITEM_TYPE_END,
3767 actions[0] = (struct rte_flow_action){
3768 .type = (enum rte_flow_action_type)
3769 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3772 actions[1] = (struct rte_flow_action){
3773 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3776 actions[2] = (struct rte_flow_action){
3777 .type = RTE_FLOW_ACTION_TYPE_END,
3780 /* Build a new entry. */
3781 mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
3788 * The copy Flows are not included in any list. There
3789 * ones are referenced from other Flows and can not
3790 * be applied, removed, deleted in ardbitrary order
3791 * by list traversing.
3793 mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
3794 actions, false, error);
3795 if (!mcp_res->rix_flow) {
3796 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
3799 return &mcp_res->hlist_ent;
3803 * Add a flow of copying flow metadata registers in RX_CP_TBL.
3805 * As mark_id is unique, if there's already a registered flow for the mark_id,
3806 * return by increasing the reference counter of the resource. Otherwise, create
3807 * the resource (mcp_res) and flow.
3810 * - If ingress port is ANY and reg_c[1] is mark_id,
3811 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3813 * For default flow (zero mark_id), flow is like,
3814 * - If ingress port is ANY,
3815 * reg_b := reg_c[0] and jump to RX_ACT_TBL.
3818 * Pointer to Ethernet device.
3820 * ID of MARK action, zero means default flow for META.
3822 * Perform verbose error reporting if not NULL.
3825 * Associated resource on success, NULL otherwise and rte_errno is set.
3827 static struct mlx5_flow_mreg_copy_resource *
3828 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
3829 struct rte_flow_error *error)
3831 struct mlx5_priv *priv = dev->data->dev_private;
3832 struct mlx5_hlist_entry *entry;
3833 struct mlx5_flow_cb_ctx ctx = {
3838 /* Check if already registered. */
3839 MLX5_ASSERT(priv->mreg_cp_tbl);
3840 entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
3843 return container_of(entry, struct mlx5_flow_mreg_copy_resource,
3848 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry)
3850 struct mlx5_flow_mreg_copy_resource *mcp_res =
3851 container_of(entry, typeof(*mcp_res), hlist_ent);
3852 struct rte_eth_dev *dev = list->ctx;
3853 struct mlx5_priv *priv = dev->data->dev_private;
3855 MLX5_ASSERT(mcp_res->rix_flow);
3856 flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3857 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3861 * Release flow in RX_CP_TBL.
3864 * Pointer to Ethernet device.
3866 * Parent flow for wich copying is provided.
3869 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3870 struct rte_flow *flow)
3872 struct mlx5_flow_mreg_copy_resource *mcp_res;
3873 struct mlx5_priv *priv = dev->data->dev_private;
3875 if (!flow->rix_mreg_copy)
3877 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3878 flow->rix_mreg_copy);
3879 if (!mcp_res || !priv->mreg_cp_tbl)
3881 MLX5_ASSERT(mcp_res->rix_flow);
3882 mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3883 flow->rix_mreg_copy = 0;
3887 * Remove the default copy action from RX_CP_TBL.
3889 * This functions is called in the mlx5_dev_start(). No thread safe
3893 * Pointer to Ethernet device.
3896 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3898 struct mlx5_hlist_entry *entry;
3899 struct mlx5_priv *priv = dev->data->dev_private;
3901 /* Check if default flow is registered. */
3902 if (!priv->mreg_cp_tbl)
3904 entry = mlx5_hlist_lookup(priv->mreg_cp_tbl,
3905 MLX5_DEFAULT_COPY_ID, NULL);
3908 mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
3912 * Add the default copy action in in RX_CP_TBL.
3914 * This functions is called in the mlx5_dev_start(). No thread safe
3918 * Pointer to Ethernet device.
3920 * Perform verbose error reporting if not NULL.
3923 * 0 for success, negative value otherwise and rte_errno is set.
3926 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3927 struct rte_flow_error *error)
3929 struct mlx5_priv *priv = dev->data->dev_private;
3930 struct mlx5_flow_mreg_copy_resource *mcp_res;
3932 /* Check whether extensive metadata feature is engaged. */
3933 if (!priv->config.dv_flow_en ||
3934 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3935 !mlx5_flow_ext_mreg_supported(dev) ||
3936 !priv->sh->dv_regc0_mask)
3939 * Add default mreg copy flow may be called multiple time, but
3940 * only be called once in stop. Avoid register it twice.
3942 if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL))
3944 mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
3951 * Add a flow of copying flow metadata registers in RX_CP_TBL.
3953 * All the flow having Q/RSS action should be split by
3954 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3955 * performs the following,
3956 * - CQE->flow_tag := reg_c[1] (MARK)
3957 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3958 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3959 * but there should be a flow per each MARK ID set by MARK action.
3961 * For the aforementioned reason, if there's a MARK action in flow's action
3962 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3963 * the MARK ID to CQE's flow_tag like,
3964 * - If reg_c[1] is mark_id,
3965 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3967 * For SET_META action which stores value in reg_c[0], as the destination is
3968 * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3969 * MARK ID means the default flow. The default flow looks like,
3970 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3973 * Pointer to Ethernet device.
3975 * Pointer to flow structure.
3976 * @param[in] actions
3977 * Pointer to the list of actions.
3979 * Perform verbose error reporting if not NULL.
3982 * 0 on success, negative value otherwise and rte_errno is set.
3985 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3986 struct rte_flow *flow,
3987 const struct rte_flow_action *actions,
3988 struct rte_flow_error *error)
3990 struct mlx5_priv *priv = dev->data->dev_private;
3991 struct mlx5_dev_config *config = &priv->config;
3992 struct mlx5_flow_mreg_copy_resource *mcp_res;
3993 const struct rte_flow_action_mark *mark;
3995 /* Check whether extensive metadata feature is engaged. */
3996 if (!config->dv_flow_en ||
3997 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3998 !mlx5_flow_ext_mreg_supported(dev) ||
3999 !priv->sh->dv_regc0_mask)
4001 /* Find MARK action. */
4002 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4003 switch (actions->type) {
4004 case RTE_FLOW_ACTION_TYPE_FLAG:
4005 mcp_res = flow_mreg_add_copy_action
4006 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4009 flow->rix_mreg_copy = mcp_res->idx;
4011 case RTE_FLOW_ACTION_TYPE_MARK:
4012 mark = (const struct rte_flow_action_mark *)
4015 flow_mreg_add_copy_action(dev, mark->id, error);
4018 flow->rix_mreg_copy = mcp_res->idx;
4027 #define MLX5_MAX_SPLIT_ACTIONS 24
4028 #define MLX5_MAX_SPLIT_ITEMS 24
4031 * Split the hairpin flow.
4032 * Since HW can't support encap and push-vlan on Rx, we move these
4034 * If the count action is after the encap then we also
4035 * move the count action. in this case the count will also measure
4039 * Pointer to Ethernet device.
4040 * @param[in] actions
4041 * Associated actions (list terminated by the END action).
4042 * @param[out] actions_rx
4044 * @param[out] actions_tx
4046 * @param[out] pattern_tx
4047 * The pattern items for the Tx flow.
4048 * @param[out] flow_id
4049 * The flow ID connected to this flow.
4055 flow_hairpin_split(struct rte_eth_dev *dev,
4056 const struct rte_flow_action actions[],
4057 struct rte_flow_action actions_rx[],
4058 struct rte_flow_action actions_tx[],
4059 struct rte_flow_item pattern_tx[],
4062 const struct rte_flow_action_raw_encap *raw_encap;
4063 const struct rte_flow_action_raw_decap *raw_decap;
4064 struct mlx5_rte_flow_action_set_tag *set_tag;
4065 struct rte_flow_action *tag_action;
4066 struct mlx5_rte_flow_item_tag *tag_item;
4067 struct rte_flow_item *item;
4071 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4072 switch (actions->type) {
4073 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4074 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4075 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4076 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4077 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4078 rte_memcpy(actions_tx, actions,
4079 sizeof(struct rte_flow_action));
4082 case RTE_FLOW_ACTION_TYPE_COUNT:
4084 rte_memcpy(actions_tx, actions,
4085 sizeof(struct rte_flow_action));
4088 rte_memcpy(actions_rx, actions,
4089 sizeof(struct rte_flow_action));
4093 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4094 raw_encap = actions->conf;
4095 if (raw_encap->size >
4096 (sizeof(struct rte_flow_item_eth) +
4097 sizeof(struct rte_flow_item_ipv4))) {
4098 memcpy(actions_tx, actions,
4099 sizeof(struct rte_flow_action));
4103 rte_memcpy(actions_rx, actions,
4104 sizeof(struct rte_flow_action));
4108 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4109 raw_decap = actions->conf;
4110 if (raw_decap->size <
4111 (sizeof(struct rte_flow_item_eth) +
4112 sizeof(struct rte_flow_item_ipv4))) {
4113 memcpy(actions_tx, actions,
4114 sizeof(struct rte_flow_action));
4117 rte_memcpy(actions_rx, actions,
4118 sizeof(struct rte_flow_action));
4123 rte_memcpy(actions_rx, actions,
4124 sizeof(struct rte_flow_action));
4129 /* Add set meta action and end action for the Rx flow. */
4130 tag_action = actions_rx;
4131 tag_action->type = (enum rte_flow_action_type)
4132 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4134 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4136 set_tag = (void *)actions_rx;
4137 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
4138 MLX5_ASSERT(set_tag->id > REG_NON);
4139 set_tag->data = flow_id;
4140 tag_action->conf = set_tag;
4141 /* Create Tx item list. */
4142 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4143 addr = (void *)&pattern_tx[2];
4145 item->type = (enum rte_flow_item_type)
4146 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4147 tag_item = (void *)addr;
4148 tag_item->data = flow_id;
4149 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4150 MLX5_ASSERT(set_tag->id > REG_NON);
4151 item->spec = tag_item;
4152 addr += sizeof(struct mlx5_rte_flow_item_tag);
4153 tag_item = (void *)addr;
4154 tag_item->data = UINT32_MAX;
4155 tag_item->id = UINT16_MAX;
4156 item->mask = tag_item;
4159 item->type = RTE_FLOW_ITEM_TYPE_END;
4164 union tunnel_offload_mark {
4167 uint32_t app_reserve:8;
4168 uint32_t table_id:15;
4169 uint32_t transfer:1;
4170 uint32_t _unused_:8;
4174 struct tunnel_default_miss_ctx {
4178 struct rte_flow_action_rss action_rss;
4179 struct rte_flow_action_queue miss_queue;
4180 struct rte_flow_action_jump miss_jump;
4186 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
4187 struct rte_flow *flow,
4188 const struct rte_flow_attr *attr,
4189 const struct rte_flow_action *app_actions,
4191 struct tunnel_default_miss_ctx *ctx,
4192 struct rte_flow_error *error)
4194 struct mlx5_priv *priv = dev->data->dev_private;
4195 struct mlx5_flow *dev_flow;
4196 struct rte_flow_attr miss_attr = *attr;
4197 const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
4198 const struct rte_flow_item miss_items[2] = {
4200 .type = RTE_FLOW_ITEM_TYPE_ETH,
4206 .type = RTE_FLOW_ITEM_TYPE_END,
4212 union tunnel_offload_mark mark_id;
4213 struct rte_flow_action_mark miss_mark;
4214 struct rte_flow_action miss_actions[3] = {
4215 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
4216 [2] = { .type = RTE_FLOW_ACTION_TYPE_END, .conf = NULL }
4218 const struct rte_flow_action_jump *jump_data;
4219 uint32_t i, flow_table = 0; /* prevent compilation warning */
4220 struct flow_grp_info grp_info = {
4222 .transfer = attr->transfer,
4223 .fdb_def_rule = !!priv->fdb_def_rule,
4228 if (!attr->transfer) {
4231 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
4232 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
4233 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
4236 return rte_flow_error_set
4238 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4239 NULL, "invalid default miss RSS");
4240 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4241 ctx->action_rss.level = 0,
4242 ctx->action_rss.types = priv->rss_conf.rss_hf,
4243 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
4244 ctx->action_rss.queue_num = priv->reta_idx_n,
4245 ctx->action_rss.key = priv->rss_conf.rss_key,
4246 ctx->action_rss.queue = ctx->queue;
4247 if (!priv->reta_idx_n || !priv->rxqs_n)
4248 return rte_flow_error_set
4250 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4251 NULL, "invalid port configuration");
4252 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
4253 ctx->action_rss.types = 0;
4254 for (i = 0; i != priv->reta_idx_n; ++i)
4255 ctx->queue[i] = (*priv->reta_idx)[i];
4257 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
4258 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
4260 miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
4261 for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
4262 jump_data = app_actions->conf;
4263 miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
4264 miss_attr.group = jump_data->group;
4265 ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
4266 &flow_table, grp_info, error);
4268 return rte_flow_error_set(error, EINVAL,
4269 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4270 NULL, "invalid tunnel id");
4271 mark_id.app_reserve = 0;
4272 mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
4273 mark_id.transfer = !!attr->transfer;
4274 mark_id._unused_ = 0;
4275 miss_mark.id = mark_id.val;
4276 dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
4277 miss_items, miss_actions, flow_idx, error);
4280 dev_flow->flow = flow;
4281 dev_flow->external = true;
4282 dev_flow->tunnel = tunnel;
4283 /* Subflow object was created, we must include one in the list. */
4284 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4285 dev_flow->handle, next);
4287 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
4288 dev->data->port_id, tunnel->app_tunnel.type,
4289 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
4290 ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
4291 miss_actions, error);
4293 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
4300 * The last stage of splitting chain, just creates the subflow
4301 * without any modification.
4304 * Pointer to Ethernet device.
4306 * Parent flow structure pointer.
4307 * @param[in, out] sub_flow
4308 * Pointer to return the created subflow, may be NULL.
4310 * Flow rule attributes.
4312 * Pattern specification (list terminated by the END pattern item).
4313 * @param[in] actions
4314 * Associated actions (list terminated by the END action).
4315 * @param[in] flow_split_info
4316 * Pointer to flow split info structure.
4318 * Perform verbose error reporting if not NULL.
4320 * 0 on success, negative value otherwise
4323 flow_create_split_inner(struct rte_eth_dev *dev,
4324 struct rte_flow *flow,
4325 struct mlx5_flow **sub_flow,
4326 const struct rte_flow_attr *attr,
4327 const struct rte_flow_item items[],
4328 const struct rte_flow_action actions[],
4329 struct mlx5_flow_split_info *flow_split_info,
4330 struct rte_flow_error *error)
4332 struct mlx5_flow *dev_flow;
4334 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4335 flow_split_info->flow_idx, error);
4338 dev_flow->flow = flow;
4339 dev_flow->external = flow_split_info->external;
4340 dev_flow->skip_scale = flow_split_info->skip_scale;
4341 /* Subflow object was created, we must include one in the list. */
4342 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4343 dev_flow->handle, next);
4345 * If dev_flow is as one of the suffix flow, some actions in suffix
4346 * flow may need some user defined item layer flags, and pass the
4347 * Metadate rxq mark flag to suffix flow as well.
4349 if (flow_split_info->prefix_layers)
4350 dev_flow->handle->layers = flow_split_info->prefix_layers;
4351 if (flow_split_info->prefix_mark)
4352 dev_flow->handle->mark = 1;
4354 *sub_flow = dev_flow;
4355 return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4359 * Split the meter flow.
4361 * As meter flow will split to three sub flow, other than meter
4362 * action, the other actions make sense to only meter accepts
4363 * the packet. If it need to be dropped, no other additional
4364 * actions should be take.
4366 * One kind of special action which decapsulates the L3 tunnel
4367 * header will be in the prefix sub flow, as not to take the
4368 * L3 tunnel header into account.
4371 * Pointer to Ethernet device.
4373 * Pattern specification (list terminated by the END pattern item).
4374 * @param[out] sfx_items
4375 * Suffix flow match items (list terminated by the END pattern item).
4376 * @param[in] actions
4377 * Associated actions (list terminated by the END action).
4378 * @param[out] actions_sfx
4379 * Suffix flow actions.
4380 * @param[out] actions_pre
4381 * Prefix flow actions.
4382 * @param[out] pattern_sfx
4383 * The pattern items for the suffix flow.
4384 * @param[out] tag_sfx
4385 * Pointer to suffix flow tag.
4391 flow_meter_split_prep(struct rte_eth_dev *dev,
4392 const struct rte_flow_item items[],
4393 struct rte_flow_item sfx_items[],
4394 const struct rte_flow_action actions[],
4395 struct rte_flow_action actions_sfx[],
4396 struct rte_flow_action actions_pre[])
4398 struct mlx5_priv *priv = dev->data->dev_private;
4399 struct rte_flow_action *tag_action = NULL;
4400 struct rte_flow_item *tag_item;
4401 struct mlx5_rte_flow_action_set_tag *set_tag;
4402 struct rte_flow_error error;
4403 const struct rte_flow_action_raw_encap *raw_encap;
4404 const struct rte_flow_action_raw_decap *raw_decap;
4405 struct mlx5_rte_flow_item_tag *tag_spec;
4406 struct mlx5_rte_flow_item_tag *tag_mask;
4407 uint32_t tag_id = 0;
4408 bool copy_vlan = false;
4410 /* Prepare the actions for prefix and suffix flow. */
4411 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4412 struct rte_flow_action **action_cur = NULL;
4414 switch (actions->type) {
4415 case RTE_FLOW_ACTION_TYPE_METER:
4416 /* Add the extra tag action first. */
4417 tag_action = actions_pre;
4418 tag_action->type = (enum rte_flow_action_type)
4419 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4421 action_cur = &actions_pre;
4423 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4424 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4425 action_cur = &actions_pre;
4427 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4428 raw_encap = actions->conf;
4429 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4430 action_cur = &actions_pre;
4432 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4433 raw_decap = actions->conf;
4434 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4435 action_cur = &actions_pre;
4437 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4438 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4445 action_cur = &actions_sfx;
4446 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
4449 /* Add end action to the actions. */
4450 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4451 actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4454 set_tag = (void *)actions_pre;
4455 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4456 mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
4458 if (tag_id >= (1 << (sizeof(tag_id) * 8 - MLX5_MTR_COLOR_BITS))) {
4459 DRV_LOG(ERR, "Port %u meter flow id exceed max limit.",
4460 dev->data->port_id);
4461 mlx5_ipool_free(priv->sh->ipool
4462 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], tag_id);
4464 } else if (!tag_id) {
4467 set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
4469 tag_action->conf = set_tag;
4470 /* Prepare the suffix subflow items. */
4471 tag_item = sfx_items++;
4472 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4473 int item_type = items->type;
4475 switch (item_type) {
4476 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4477 memcpy(sfx_items, items, sizeof(*sfx_items));
4480 case RTE_FLOW_ITEM_TYPE_VLAN:
4482 memcpy(sfx_items, items, sizeof(*sfx_items));
4484 * Convert to internal match item, it is used
4485 * for vlan push and set vid.
4487 sfx_items->type = (enum rte_flow_item_type)
4488 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4496 sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4498 tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4499 tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
4500 tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4501 tag_mask = tag_spec + 1;
4502 tag_mask->data = 0xffffff00;
4503 tag_item->type = (enum rte_flow_item_type)
4504 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4505 tag_item->spec = tag_spec;
4506 tag_item->last = NULL;
4507 tag_item->mask = tag_mask;
4512 * Split action list having QUEUE/RSS for metadata register copy.
4514 * Once Q/RSS action is detected in user's action list, the flow action
4515 * should be split in order to copy metadata registers, which will happen in
4517 * - CQE->flow_tag := reg_c[1] (MARK)
4518 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4519 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4520 * This is because the last action of each flow must be a terminal action
4521 * (QUEUE, RSS or DROP).
4523 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4524 * stored and kept in the mlx5_flow structure per each sub_flow.
4526 * The Q/RSS action is replaced with,
4527 * - SET_TAG, setting the allocated flow ID to reg_c[2].
4528 * And the following JUMP action is added at the end,
4529 * - JUMP, to RX_CP_TBL.
4531 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4532 * flow_create_split_metadata() routine. The flow will look like,
4533 * - If flow ID matches (reg_c[2]), perform Q/RSS.
4536 * Pointer to Ethernet device.
4537 * @param[out] split_actions
4538 * Pointer to store split actions to jump to CP_TBL.
4539 * @param[in] actions
4540 * Pointer to the list of original flow actions.
4542 * Pointer to the Q/RSS action.
4543 * @param[in] actions_n
4544 * Number of original actions.
4546 * Perform verbose error reporting if not NULL.
4549 * non-zero unique flow_id on success, otherwise 0 and
4550 * error/rte_error are set.
4553 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4554 struct rte_flow_action *split_actions,
4555 const struct rte_flow_action *actions,
4556 const struct rte_flow_action *qrss,
4557 int actions_n, struct rte_flow_error *error)
4559 struct mlx5_priv *priv = dev->data->dev_private;
4560 struct mlx5_rte_flow_action_set_tag *set_tag;
4561 struct rte_flow_action_jump *jump;
4562 const int qrss_idx = qrss - actions;
4563 uint32_t flow_id = 0;
4567 * Given actions will be split
4568 * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4569 * - Add jump to mreg CP_TBL.
4570 * As a result, there will be one more action.
4573 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4574 set_tag = (void *)(split_actions + actions_n);
4576 * If tag action is not set to void(it means we are not the meter
4577 * suffix flow), add the tag action. Since meter suffix flow already
4578 * has the tag added.
4580 if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4582 * Allocate the new subflow ID. This one is unique within
4583 * device and not shared with representors. Otherwise,
4584 * we would have to resolve multi-thread access synch
4585 * issue. Each flow on the shared device is appended
4586 * with source vport identifier, so the resulting
4587 * flows will be unique in the shared (by master and
4588 * representors) domain even if they have coinciding
4591 mlx5_ipool_malloc(priv->sh->ipool
4592 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
4594 return rte_flow_error_set(error, ENOMEM,
4595 RTE_FLOW_ERROR_TYPE_ACTION,
4596 NULL, "can't allocate id "
4597 "for split Q/RSS subflow");
4598 /* Internal SET_TAG action to set flow ID. */
4599 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4602 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4606 /* Construct new actions array. */
4607 /* Replace QUEUE/RSS action. */
4608 split_actions[qrss_idx] = (struct rte_flow_action){
4609 .type = (enum rte_flow_action_type)
4610 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4614 /* JUMP action to jump to mreg copy table (CP_TBL). */
4615 jump = (void *)(set_tag + 1);
4616 *jump = (struct rte_flow_action_jump){
4617 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4619 split_actions[actions_n - 2] = (struct rte_flow_action){
4620 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4623 split_actions[actions_n - 1] = (struct rte_flow_action){
4624 .type = RTE_FLOW_ACTION_TYPE_END,
4630 * Extend the given action list for Tx metadata copy.
4632 * Copy the given action list to the ext_actions and add flow metadata register
4633 * copy action in order to copy reg_a set by WQE to reg_c[0].
4635 * @param[out] ext_actions
4636 * Pointer to the extended action list.
4637 * @param[in] actions
4638 * Pointer to the list of actions.
4639 * @param[in] actions_n
4640 * Number of actions in the list.
4642 * Perform verbose error reporting if not NULL.
4643 * @param[in] encap_idx
4644 * The encap action inndex.
4647 * 0 on success, negative value otherwise
4650 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
4651 struct rte_flow_action *ext_actions,
4652 const struct rte_flow_action *actions,
4653 int actions_n, struct rte_flow_error *error,
4656 struct mlx5_flow_action_copy_mreg *cp_mreg =
4657 (struct mlx5_flow_action_copy_mreg *)
4658 (ext_actions + actions_n + 1);
4661 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4665 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
4670 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
4671 if (encap_idx == actions_n - 1) {
4672 ext_actions[actions_n - 1] = (struct rte_flow_action){
4673 .type = (enum rte_flow_action_type)
4674 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4677 ext_actions[actions_n] = (struct rte_flow_action){
4678 .type = RTE_FLOW_ACTION_TYPE_END,
4681 ext_actions[encap_idx] = (struct rte_flow_action){
4682 .type = (enum rte_flow_action_type)
4683 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4686 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
4687 sizeof(*ext_actions) * (actions_n - encap_idx));
4693 * Check the match action from the action list.
4695 * @param[in] actions
4696 * Pointer to the list of actions.
4698 * Flow rule attributes.
4700 * The action to be check if exist.
4701 * @param[out] match_action_pos
4702 * Pointer to the position of the matched action if exists, otherwise is -1.
4703 * @param[out] qrss_action_pos
4704 * Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
4707 * > 0 the total number of actions.
4708 * 0 if not found match action in action list.
4711 flow_check_match_action(const struct rte_flow_action actions[],
4712 const struct rte_flow_attr *attr,
4713 enum rte_flow_action_type action,
4714 int *match_action_pos, int *qrss_action_pos)
4716 const struct rte_flow_action_sample *sample;
4723 *match_action_pos = -1;
4724 *qrss_action_pos = -1;
4725 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4726 if (actions->type == action) {
4728 *match_action_pos = actions_n;
4730 if (actions->type == RTE_FLOW_ACTION_TYPE_QUEUE ||
4731 actions->type == RTE_FLOW_ACTION_TYPE_RSS)
4732 *qrss_action_pos = actions_n;
4733 if (actions->type == RTE_FLOW_ACTION_TYPE_JUMP)
4735 if (actions->type == RTE_FLOW_ACTION_TYPE_SAMPLE) {
4736 sample = actions->conf;
4737 ratio = sample->ratio;
4738 sub_type = ((const struct rte_flow_action *)
4739 (sample->actions))->type;
4743 if (flag && action == RTE_FLOW_ACTION_TYPE_SAMPLE && attr->transfer) {
4745 /* JUMP Action not support for Mirroring;
4746 * Mirroring support multi-destination;
4748 if (!jump_flag && sub_type != RTE_FLOW_ACTION_TYPE_END)
4752 /* Count RTE_FLOW_ACTION_TYPE_END. */
4753 return flag ? actions_n + 1 : 0;
4756 #define SAMPLE_SUFFIX_ITEM 2
4759 * Split the sample flow.
4761 * As sample flow will split to two sub flow, sample flow with
4762 * sample action, the other actions will move to new suffix flow.
4764 * Also add unique tag id with tag action in the sample flow,
4765 * the same tag id will be as match in the suffix flow.
4768 * Pointer to Ethernet device.
4770 * FDB egress flow flag.
4771 * @param[out] sfx_items
4772 * Suffix flow match items (list terminated by the END pattern item).
4773 * @param[in] actions
4774 * Associated actions (list terminated by the END action).
4775 * @param[out] actions_sfx
4776 * Suffix flow actions.
4777 * @param[out] actions_pre
4778 * Prefix flow actions.
4779 * @param[in] actions_n
4780 * The total number of actions.
4781 * @param[in] sample_action_pos
4782 * The sample action position.
4783 * @param[in] qrss_action_pos
4784 * The Queue/RSS action position.
4786 * Perform verbose error reporting if not NULL.
4789 * 0 on success, or unique flow_id, a negative errno value
4790 * otherwise and rte_errno is set.
4793 flow_sample_split_prep(struct rte_eth_dev *dev,
4795 struct rte_flow_item sfx_items[],
4796 const struct rte_flow_action actions[],
4797 struct rte_flow_action actions_sfx[],
4798 struct rte_flow_action actions_pre[],
4800 int sample_action_pos,
4801 int qrss_action_pos,
4802 struct rte_flow_error *error)
4804 struct mlx5_priv *priv = dev->data->dev_private;
4805 struct mlx5_rte_flow_action_set_tag *set_tag;
4806 struct mlx5_rte_flow_item_tag *tag_spec;
4807 struct mlx5_rte_flow_item_tag *tag_mask;
4808 uint32_t tag_id = 0;
4812 if (sample_action_pos < 0)
4813 return rte_flow_error_set(error, EINVAL,
4814 RTE_FLOW_ERROR_TYPE_ACTION,
4815 NULL, "invalid position of sample "
4818 /* Prepare the prefix tag action. */
4819 set_tag = (void *)(actions_pre + actions_n + 1);
4820 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
4824 mlx5_ipool_malloc(priv->sh->ipool
4825 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
4826 set_tag->data = tag_id;
4827 /* Prepare the suffix subflow items. */
4828 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
4829 tag_spec->data = tag_id;
4830 tag_spec->id = set_tag->id;
4831 tag_mask = tag_spec + 1;
4832 tag_mask->data = UINT32_MAX;
4833 sfx_items[0] = (struct rte_flow_item){
4834 .type = (enum rte_flow_item_type)
4835 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4840 sfx_items[1] = (struct rte_flow_item){
4841 .type = (enum rte_flow_item_type)
4842 RTE_FLOW_ITEM_TYPE_END,
4845 /* Prepare the actions for prefix and suffix flow. */
4846 if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
4847 index = qrss_action_pos;
4848 /* Put the preceding the Queue/RSS action into prefix flow. */
4850 memcpy(actions_pre, actions,
4851 sizeof(struct rte_flow_action) * index);
4852 /* Put others preceding the sample action into prefix flow. */
4853 if (sample_action_pos > index + 1)
4854 memcpy(actions_pre + index, actions + index + 1,
4855 sizeof(struct rte_flow_action) *
4856 (sample_action_pos - index - 1));
4857 index = sample_action_pos - 1;
4858 /* Put Queue/RSS action into Suffix flow. */
4859 memcpy(actions_sfx, actions + qrss_action_pos,
4860 sizeof(struct rte_flow_action));
4863 index = sample_action_pos;
4865 memcpy(actions_pre, actions,
4866 sizeof(struct rte_flow_action) * index);
4868 /* Add the extra tag action for NIC-RX and E-Switch ingress. */
4870 actions_pre[index++] =
4871 (struct rte_flow_action){
4872 .type = (enum rte_flow_action_type)
4873 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4877 memcpy(actions_pre + index, actions + sample_action_pos,
4878 sizeof(struct rte_flow_action));
4880 actions_pre[index] = (struct rte_flow_action){
4881 .type = (enum rte_flow_action_type)
4882 RTE_FLOW_ACTION_TYPE_END,
4884 /* Put the actions after sample into Suffix flow. */
4885 memcpy(actions_sfx, actions + sample_action_pos + 1,
4886 sizeof(struct rte_flow_action) *
4887 (actions_n - sample_action_pos - 1));
4892 * The splitting for metadata feature.
4894 * - Q/RSS action on NIC Rx should be split in order to pass by
4895 * the mreg copy table (RX_CP_TBL) and then it jumps to the
4896 * action table (RX_ACT_TBL) which has the split Q/RSS action.
4898 * - All the actions on NIC Tx should have a mreg copy action to
4899 * copy reg_a from WQE to reg_c[0].
4902 * Pointer to Ethernet device.
4904 * Parent flow structure pointer.
4906 * Flow rule attributes.
4908 * Pattern specification (list terminated by the END pattern item).
4909 * @param[in] actions
4910 * Associated actions (list terminated by the END action).
4911 * @param[in] flow_split_info
4912 * Pointer to flow split info structure.
4914 * Perform verbose error reporting if not NULL.
4916 * 0 on success, negative value otherwise
4919 flow_create_split_metadata(struct rte_eth_dev *dev,
4920 struct rte_flow *flow,
4921 const struct rte_flow_attr *attr,
4922 const struct rte_flow_item items[],
4923 const struct rte_flow_action actions[],
4924 struct mlx5_flow_split_info *flow_split_info,
4925 struct rte_flow_error *error)
4927 struct mlx5_priv *priv = dev->data->dev_private;
4928 struct mlx5_dev_config *config = &priv->config;
4929 const struct rte_flow_action *qrss = NULL;
4930 struct rte_flow_action *ext_actions = NULL;
4931 struct mlx5_flow *dev_flow = NULL;
4932 uint32_t qrss_id = 0;
4939 /* Check whether extensive metadata feature is engaged. */
4940 if (!config->dv_flow_en ||
4941 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4942 !mlx5_flow_ext_mreg_supported(dev))
4943 return flow_create_split_inner(dev, flow, NULL, attr, items,
4944 actions, flow_split_info, error);
4945 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
4948 /* Exclude hairpin flows from splitting. */
4949 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
4950 const struct rte_flow_action_queue *queue;
4953 if (mlx5_rxq_get_type(dev, queue->index) ==
4954 MLX5_RXQ_TYPE_HAIRPIN)
4956 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
4957 const struct rte_flow_action_rss *rss;
4960 if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
4961 MLX5_RXQ_TYPE_HAIRPIN)
4966 /* Check if it is in meter suffix table. */
4967 mtr_sfx = attr->group == (attr->transfer ?
4968 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4969 MLX5_FLOW_TABLE_LEVEL_SUFFIX);
4971 * Q/RSS action on NIC Rx should be split in order to pass by
4972 * the mreg copy table (RX_CP_TBL) and then it jumps to the
4973 * action table (RX_ACT_TBL) which has the split Q/RSS action.
4975 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
4976 sizeof(struct rte_flow_action_set_tag) +
4977 sizeof(struct rte_flow_action_jump);
4978 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
4981 return rte_flow_error_set(error, ENOMEM,
4982 RTE_FLOW_ERROR_TYPE_ACTION,
4983 NULL, "no memory to split "
4986 * If we are the suffix flow of meter, tag already exist.
4987 * Set the tag action to void.
4990 ext_actions[qrss - actions].type =
4991 RTE_FLOW_ACTION_TYPE_VOID;
4993 ext_actions[qrss - actions].type =
4994 (enum rte_flow_action_type)
4995 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4997 * Create the new actions list with removed Q/RSS action
4998 * and appended set tag and jump to register copy table
4999 * (RX_CP_TBL). We should preallocate unique tag ID here
5000 * in advance, because it is needed for set tag action.
5002 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5003 qrss, actions_n, error);
5004 if (!mtr_sfx && !qrss_id) {
5008 } else if (attr->egress && !attr->transfer) {
5010 * All the actions on NIC Tx should have a metadata register
5011 * copy action to copy reg_a from WQE to reg_c[meta]
5013 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5014 sizeof(struct mlx5_flow_action_copy_mreg);
5015 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5018 return rte_flow_error_set(error, ENOMEM,
5019 RTE_FLOW_ERROR_TYPE_ACTION,
5020 NULL, "no memory to split "
5022 /* Create the action list appended with copy register. */
5023 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5024 actions_n, error, encap_idx);
5028 /* Add the unmodified original or prefix subflow. */
5029 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5030 items, ext_actions ? ext_actions :
5031 actions, flow_split_info, error);
5034 MLX5_ASSERT(dev_flow);
5036 const struct rte_flow_attr q_attr = {
5037 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5040 /* Internal PMD action to set register. */
5041 struct mlx5_rte_flow_item_tag q_tag_spec = {
5045 struct rte_flow_item q_items[] = {
5047 .type = (enum rte_flow_item_type)
5048 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5049 .spec = &q_tag_spec,
5054 .type = RTE_FLOW_ITEM_TYPE_END,
5057 struct rte_flow_action q_actions[] = {
5063 .type = RTE_FLOW_ACTION_TYPE_END,
5066 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5069 * Configure the tag item only if there is no meter subflow.
5070 * Since tag is already marked in the meter suffix subflow
5071 * we can just use the meter suffix items as is.
5074 /* Not meter subflow. */
5075 MLX5_ASSERT(!mtr_sfx);
5077 * Put unique id in prefix flow due to it is destroyed
5078 * after suffix flow and id will be freed after there
5079 * is no actual flows with this id and identifier
5080 * reallocation becomes possible (for example, for
5081 * other flows in other threads).
5083 dev_flow->handle->split_flow_id = qrss_id;
5084 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5088 q_tag_spec.id = ret;
5091 /* Add suffix subflow to execute Q/RSS. */
5092 flow_split_info->prefix_layers = layers;
5093 flow_split_info->prefix_mark = 0;
5094 ret = flow_create_split_inner(dev, flow, &dev_flow,
5095 &q_attr, mtr_sfx ? items :
5097 flow_split_info, error);
5100 /* qrss ID should be freed if failed. */
5102 MLX5_ASSERT(dev_flow);
5107 * We do not destroy the partially created sub_flows in case of error.
5108 * These ones are included into parent flow list and will be destroyed
5109 * by flow_drv_destroy.
5111 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5113 mlx5_free(ext_actions);
5118 * The splitting for meter feature.
5120 * - The meter flow will be split to two flows as prefix and
5121 * suffix flow. The packets make sense only it pass the prefix
5124 * - Reg_C_5 is used for the packet to match betweend prefix and
5128 * Pointer to Ethernet device.
5130 * Parent flow structure pointer.
5132 * Flow rule attributes.
5134 * Pattern specification (list terminated by the END pattern item).
5135 * @param[in] actions
5136 * Associated actions (list terminated by the END action).
5137 * @param[in] flow_split_info
5138 * Pointer to flow split info structure.
5140 * Perform verbose error reporting if not NULL.
5142 * 0 on success, negative value otherwise
5145 flow_create_split_meter(struct rte_eth_dev *dev,
5146 struct rte_flow *flow,
5147 const struct rte_flow_attr *attr,
5148 const struct rte_flow_item items[],
5149 const struct rte_flow_action actions[],
5150 struct mlx5_flow_split_info *flow_split_info,
5151 struct rte_flow_error *error)
5153 struct mlx5_priv *priv = dev->data->dev_private;
5154 struct rte_flow_action *sfx_actions = NULL;
5155 struct rte_flow_action *pre_actions = NULL;
5156 struct rte_flow_item *sfx_items = NULL;
5157 struct mlx5_flow *dev_flow = NULL;
5158 struct rte_flow_attr sfx_attr = *attr;
5160 uint32_t mtr_tag_id = 0;
5167 actions_n = flow_check_meter_action(actions, &mtr);
5169 /* The five prefix actions: meter, decap, encap, tag, end. */
5170 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
5171 sizeof(struct mlx5_rte_flow_action_set_tag);
5172 /* tag, vlan, port id, end. */
5173 #define METER_SUFFIX_ITEM 4
5174 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5175 sizeof(struct mlx5_rte_flow_item_tag) * 2;
5176 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5179 return rte_flow_error_set(error, ENOMEM,
5180 RTE_FLOW_ERROR_TYPE_ACTION,
5181 NULL, "no memory to split "
5183 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5185 pre_actions = sfx_actions + actions_n;
5186 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
5187 actions, sfx_actions,
5193 /* Add the prefix subflow. */
5194 flow_split_info->prefix_mark = 0;
5195 ret = flow_create_split_inner(dev, flow, &dev_flow,
5196 attr, items, pre_actions,
5197 flow_split_info, error);
5202 dev_flow->handle->split_flow_id = mtr_tag_id;
5203 /* Setting the sfx group atrr. */
5204 sfx_attr.group = sfx_attr.transfer ?
5205 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
5206 MLX5_FLOW_TABLE_LEVEL_SUFFIX;
5207 flow_split_info->prefix_layers =
5208 flow_get_prefix_layer_flags(dev_flow);
5209 flow_split_info->prefix_mark = dev_flow->handle->mark;
5211 /* Add the prefix subflow. */
5212 ret = flow_create_split_metadata(dev, flow,
5213 &sfx_attr, sfx_items ?
5215 sfx_actions ? sfx_actions : actions,
5216 flow_split_info, error);
5219 mlx5_free(sfx_actions);
5224 * The splitting for sample feature.
5226 * Once Sample action is detected in the action list, the flow actions should
5227 * be split into prefix sub flow and suffix sub flow.
5229 * The original items remain in the prefix sub flow, all actions preceding the
5230 * sample action and the sample action itself will be copied to the prefix
5231 * sub flow, the actions following the sample action will be copied to the
5232 * suffix sub flow, Queue action always be located in the suffix sub flow.
5234 * In order to make the packet from prefix sub flow matches with suffix sub
5235 * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5236 * flow uses tag item with the unique flow id.
5239 * Pointer to Ethernet device.
5241 * Parent flow structure pointer.
5243 * Flow rule attributes.
5245 * Pattern specification (list terminated by the END pattern item).
5246 * @param[in] actions
5247 * Associated actions (list terminated by the END action).
5248 * @param[in] flow_split_info
5249 * Pointer to flow split info structure.
5251 * Perform verbose error reporting if not NULL.
5253 * 0 on success, negative value otherwise
5256 flow_create_split_sample(struct rte_eth_dev *dev,
5257 struct rte_flow *flow,
5258 const struct rte_flow_attr *attr,
5259 const struct rte_flow_item items[],
5260 const struct rte_flow_action actions[],
5261 struct mlx5_flow_split_info *flow_split_info,
5262 struct rte_flow_error *error)
5264 struct mlx5_priv *priv = dev->data->dev_private;
5265 struct rte_flow_action *sfx_actions = NULL;
5266 struct rte_flow_action *pre_actions = NULL;
5267 struct rte_flow_item *sfx_items = NULL;
5268 struct mlx5_flow *dev_flow = NULL;
5269 struct rte_flow_attr sfx_attr = *attr;
5270 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5271 struct mlx5_flow_dv_sample_resource *sample_res;
5272 struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5273 struct mlx5_flow_tbl_resource *sfx_tbl;
5274 union mlx5_flow_tbl_key sfx_table_key;
5278 uint32_t fdb_tx = 0;
5281 int sample_action_pos;
5282 int qrss_action_pos;
5285 if (priv->sampler_en)
5286 actions_n = flow_check_match_action(actions, attr,
5287 RTE_FLOW_ACTION_TYPE_SAMPLE,
5288 &sample_action_pos, &qrss_action_pos);
5290 /* The prefix actions must includes sample, tag, end. */
5291 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5292 + sizeof(struct mlx5_rte_flow_action_set_tag);
5293 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5294 sizeof(struct mlx5_rte_flow_item_tag) * 2;
5295 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5296 item_size), 0, SOCKET_ID_ANY);
5298 return rte_flow_error_set(error, ENOMEM,
5299 RTE_FLOW_ERROR_TYPE_ACTION,
5300 NULL, "no memory to split "
5302 /* The representor_id is -1 for uplink. */
5303 fdb_tx = (attr->transfer && priv->representor_id != -1);
5305 sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5307 pre_actions = sfx_actions + actions_n;
5308 tag_id = flow_sample_split_prep(dev, fdb_tx, sfx_items,
5309 actions, sfx_actions,
5310 pre_actions, actions_n,
5312 qrss_action_pos, error);
5313 if (tag_id < 0 || (!fdb_tx && !tag_id)) {
5317 /* Add the prefix subflow. */
5318 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5320 flow_split_info, error);
5325 dev_flow->handle->split_flow_id = tag_id;
5326 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5327 /* Set the sfx group attr. */
5328 sample_res = (struct mlx5_flow_dv_sample_resource *)
5329 dev_flow->dv.sample_res;
5330 sfx_tbl = (struct mlx5_flow_tbl_resource *)
5331 sample_res->normal_path_tbl;
5332 sfx_tbl_data = container_of(sfx_tbl,
5333 struct mlx5_flow_tbl_data_entry, tbl);
5334 sfx_table_key.v64 = sfx_tbl_data->entry.key;
5335 sfx_attr.group = sfx_attr.transfer ?
5336 (sfx_table_key.table_id - 1) :
5337 sfx_table_key.table_id;
5338 flow_split_info->prefix_layers =
5339 flow_get_prefix_layer_flags(dev_flow);
5340 flow_split_info->prefix_mark = dev_flow->handle->mark;
5341 /* Suffix group level already be scaled with factor, set
5342 * skip_scale to 1 to avoid scale again in translation.
5344 flow_split_info->skip_scale = 1;
5347 /* Add the suffix subflow. */
5348 ret = flow_create_split_meter(dev, flow, &sfx_attr,
5349 sfx_items ? sfx_items : items,
5350 sfx_actions ? sfx_actions : actions,
5351 flow_split_info, error);
5354 mlx5_free(sfx_actions);
5359 * Split the flow to subflow set. The splitters might be linked
5360 * in the chain, like this:
5361 * flow_create_split_outer() calls:
5362 * flow_create_split_meter() calls:
5363 * flow_create_split_metadata(meter_subflow_0) calls:
5364 * flow_create_split_inner(metadata_subflow_0)
5365 * flow_create_split_inner(metadata_subflow_1)
5366 * flow_create_split_inner(metadata_subflow_2)
5367 * flow_create_split_metadata(meter_subflow_1) calls:
5368 * flow_create_split_inner(metadata_subflow_0)
5369 * flow_create_split_inner(metadata_subflow_1)
5370 * flow_create_split_inner(metadata_subflow_2)
5372 * This provide flexible way to add new levels of flow splitting.
5373 * The all of successfully created subflows are included to the
5374 * parent flow dev_flow list.
5377 * Pointer to Ethernet device.
5379 * Parent flow structure pointer.
5381 * Flow rule attributes.
5383 * Pattern specification (list terminated by the END pattern item).
5384 * @param[in] actions
5385 * Associated actions (list terminated by the END action).
5386 * @param[in] flow_split_info
5387 * Pointer to flow split info structure.
5389 * Perform verbose error reporting if not NULL.
5391 * 0 on success, negative value otherwise
5394 flow_create_split_outer(struct rte_eth_dev *dev,
5395 struct rte_flow *flow,
5396 const struct rte_flow_attr *attr,
5397 const struct rte_flow_item items[],
5398 const struct rte_flow_action actions[],
5399 struct mlx5_flow_split_info *flow_split_info,
5400 struct rte_flow_error *error)
5404 ret = flow_create_split_sample(dev, flow, attr, items,
5405 actions, flow_split_info, error);
5406 MLX5_ASSERT(ret <= 0);
5410 static struct mlx5_flow_tunnel *
5411 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5412 const struct rte_flow_attr *attr,
5413 const struct rte_flow_item items[],
5414 const struct rte_flow_action actions[])
5416 struct mlx5_flow_tunnel *tunnel;
5418 #pragma GCC diagnostic push
5419 #pragma GCC diagnostic ignored "-Wcast-qual"
5420 if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5421 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5422 else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5423 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5426 #pragma GCC diagnostic pop
5432 * Adjust flow RSS workspace if needed.
5435 * Pointer to thread flow work space.
5437 * Pointer to RSS descriptor.
5438 * @param[in] nrssq_num
5439 * New RSS queue number.
5442 * 0 on success, -1 otherwise and rte_errno is set.
5445 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
5446 struct mlx5_flow_rss_desc *rss_desc,
5449 if (likely(nrssq_num <= wks->rssq_num))
5451 rss_desc->queue = realloc(rss_desc->queue,
5452 sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
5453 if (!rss_desc->queue) {
5457 wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
5462 * Create a flow and add it to @p list.
5465 * Pointer to Ethernet device.
5467 * Pointer to a TAILQ flow list. If this parameter NULL,
5468 * no list insertion occurred, flow is just created,
5469 * this is caller's responsibility to track the
5472 * Flow rule attributes.
5474 * Pattern specification (list terminated by the END pattern item).
5475 * @param[in] actions
5476 * Associated actions (list terminated by the END action).
5477 * @param[in] external
5478 * This flow rule is created by request external to PMD.
5480 * Perform verbose error reporting if not NULL.
5483 * A flow index on success, 0 otherwise and rte_errno is set.
5486 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
5487 const struct rte_flow_attr *attr,
5488 const struct rte_flow_item items[],
5489 const struct rte_flow_action original_actions[],
5490 bool external, struct rte_flow_error *error)
5492 struct mlx5_priv *priv = dev->data->dev_private;
5493 struct rte_flow *flow = NULL;
5494 struct mlx5_flow *dev_flow;
5495 const struct rte_flow_action_rss *rss;
5496 struct mlx5_translated_shared_action
5497 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5498 int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5500 struct mlx5_flow_expand_rss buf;
5501 uint8_t buffer[2048];
5504 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5505 uint8_t buffer[2048];
5508 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5509 uint8_t buffer[2048];
5510 } actions_hairpin_tx;
5512 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
5513 uint8_t buffer[2048];
5515 struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
5516 struct mlx5_flow_rss_desc *rss_desc;
5517 const struct rte_flow_action *p_actions_rx;
5521 struct rte_flow_attr attr_tx = { .priority = 0 };
5522 const struct rte_flow_action *actions;
5523 struct rte_flow_action *translated_actions = NULL;
5524 struct mlx5_flow_tunnel *tunnel;
5525 struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
5526 struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
5527 struct mlx5_flow_split_info flow_split_info = {
5528 .external = !!external,
5537 rss_desc = &wks->rss_desc;
5538 ret = flow_shared_actions_translate(dev, original_actions,
5541 &translated_actions, error);
5543 MLX5_ASSERT(translated_actions == NULL);
5546 actions = translated_actions ? translated_actions : original_actions;
5547 p_actions_rx = actions;
5548 hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5549 ret = flow_drv_validate(dev, attr, items, p_actions_rx,
5550 external, hairpin_flow, error);
5552 goto error_before_hairpin_split;
5553 flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
5556 goto error_before_hairpin_split;
5558 if (hairpin_flow > 0) {
5559 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
5561 goto error_before_hairpin_split;
5563 flow_hairpin_split(dev, actions, actions_rx.actions,
5564 actions_hairpin_tx.actions, items_tx.items,
5566 p_actions_rx = actions_rx.actions;
5568 flow_split_info.flow_idx = idx;
5569 flow->drv_type = flow_get_drv_type(dev, attr);
5570 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
5571 flow->drv_type < MLX5_FLOW_TYPE_MAX);
5572 memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
5573 rss = flow_get_rss_action(p_actions_rx);
5575 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
5578 * The following information is required by
5579 * mlx5_flow_hashfields_adjust() in advance.
5581 rss_desc->level = rss->level;
5582 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
5583 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
5585 flow->dev_handles = 0;
5586 if (rss && rss->types) {
5587 unsigned int graph_root;
5589 graph_root = find_graph_root(items, rss->level);
5590 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
5592 mlx5_support_expansion, graph_root);
5593 MLX5_ASSERT(ret > 0 &&
5594 (unsigned int)ret < sizeof(expand_buffer.buffer));
5597 buf->entry[0].pattern = (void *)(uintptr_t)items;
5599 rss_desc->shared_rss = flow_get_shared_rss_action(dev, shared_actions,
5601 for (i = 0; i < buf->entries; ++i) {
5602 /* Initialize flow split data. */
5603 flow_split_info.prefix_layers = 0;
5604 flow_split_info.prefix_mark = 0;
5605 flow_split_info.skip_scale = 0;
5607 * The splitter may create multiple dev_flows,
5608 * depending on configuration. In the simplest
5609 * case it just creates unmodified original flow.
5611 ret = flow_create_split_outer(dev, flow, attr,
5612 buf->entry[i].pattern,
5613 p_actions_rx, &flow_split_info,
5617 if (is_flow_tunnel_steer_rule(dev, attr,
5618 buf->entry[i].pattern,
5620 ret = flow_tunnel_add_default_miss(dev, flow, attr,
5626 mlx5_free(default_miss_ctx.queue);
5631 /* Create the tx flow. */
5633 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
5634 attr_tx.ingress = 0;
5636 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
5637 actions_hairpin_tx.actions,
5641 dev_flow->flow = flow;
5642 dev_flow->external = 0;
5643 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
5644 dev_flow->handle, next);
5645 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
5647 actions_hairpin_tx.actions, error);
5652 * Update the metadata register copy table. If extensive
5653 * metadata feature is enabled and registers are supported
5654 * we might create the extra rte_flow for each unique
5655 * MARK/FLAG action ID.
5657 * The table is updated for ingress Flows only, because
5658 * the egress Flows belong to the different device and
5659 * copy table should be updated in peer NIC Rx domain.
5661 if (attr->ingress &&
5662 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
5663 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
5668 * If the flow is external (from application) OR device is started,
5669 * OR mreg discover, then apply immediately.
5671 if (external || dev->data->dev_started ||
5672 (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
5673 attr->priority == MLX5_FLOW_PRIO_RSVD)) {
5674 ret = flow_drv_apply(dev, flow, error);
5679 rte_spinlock_lock(&priv->flow_list_lock);
5680 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
5682 rte_spinlock_unlock(&priv->flow_list_lock);
5684 flow_rxq_flags_set(dev, flow);
5685 rte_free(translated_actions);
5686 tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
5689 flow->tunnel_id = tunnel->tunnel_id;
5690 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
5691 mlx5_free(default_miss_ctx.queue);
5693 mlx5_flow_pop_thread_workspace();
5697 ret = rte_errno; /* Save rte_errno before cleanup. */
5698 flow_mreg_del_copy_action(dev, flow);
5699 flow_drv_destroy(dev, flow);
5700 if (rss_desc->shared_rss)
5701 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
5703 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
5704 rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
5705 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
5706 rte_errno = ret; /* Restore rte_errno. */
5709 mlx5_flow_pop_thread_workspace();
5710 error_before_hairpin_split:
5711 rte_free(translated_actions);
5716 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
5717 * incoming packets to table 1.
5719 * Other flow rules, requested for group n, will be created in
5720 * e-switch table n+1.
5721 * Jump action to e-switch group n will be created to group n+1.
5723 * Used when working in switchdev mode, to utilise advantages of table 1
5727 * Pointer to Ethernet device.
5730 * Pointer to flow on success, NULL otherwise and rte_errno is set.
5733 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
5735 const struct rte_flow_attr attr = {
5742 const struct rte_flow_item pattern = {
5743 .type = RTE_FLOW_ITEM_TYPE_END,
5745 struct rte_flow_action_jump jump = {
5748 const struct rte_flow_action actions[] = {
5750 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5754 .type = RTE_FLOW_ACTION_TYPE_END,
5757 struct mlx5_priv *priv = dev->data->dev_private;
5758 struct rte_flow_error error;
5760 return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
5762 actions, false, &error);
5766 * Validate a flow supported by the NIC.
5768 * @see rte_flow_validate()
5772 mlx5_flow_validate(struct rte_eth_dev *dev,
5773 const struct rte_flow_attr *attr,
5774 const struct rte_flow_item items[],
5775 const struct rte_flow_action original_actions[],
5776 struct rte_flow_error *error)
5779 struct mlx5_translated_shared_action
5780 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5781 int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5782 const struct rte_flow_action *actions;
5783 struct rte_flow_action *translated_actions = NULL;
5784 int ret = flow_shared_actions_translate(dev, original_actions,
5787 &translated_actions, error);
5791 actions = translated_actions ? translated_actions : original_actions;
5792 hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5793 ret = flow_drv_validate(dev, attr, items, actions,
5794 true, hairpin_flow, error);
5795 rte_free(translated_actions);
5802 * @see rte_flow_create()
5806 mlx5_flow_create(struct rte_eth_dev *dev,
5807 const struct rte_flow_attr *attr,
5808 const struct rte_flow_item items[],
5809 const struct rte_flow_action actions[],
5810 struct rte_flow_error *error)
5812 struct mlx5_priv *priv = dev->data->dev_private;
5815 * If the device is not started yet, it is not allowed to created a
5816 * flow from application. PMD default flows and traffic control flows
5819 if (unlikely(!dev->data->dev_started)) {
5820 DRV_LOG(DEBUG, "port %u is not started when "
5821 "inserting a flow", dev->data->port_id);
5822 rte_flow_error_set(error, ENODEV,
5823 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5825 "port not started");
5829 return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
5830 attr, items, actions, true, error);
5834 * Destroy a flow in a list.
5837 * Pointer to Ethernet device.
5839 * Pointer to the Indexed flow list. If this parameter NULL,
5840 * there is no flow removal from the list. Be noted that as
5841 * flow is add to the indexed list, memory of the indexed
5842 * list points to maybe changed as flow destroyed.
5843 * @param[in] flow_idx
5844 * Index of flow to destroy.
5847 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
5850 struct mlx5_priv *priv = dev->data->dev_private;
5851 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
5852 [MLX5_IPOOL_RTE_FLOW], flow_idx);
5857 * Update RX queue flags only if port is started, otherwise it is
5860 if (dev->data->dev_started)
5861 flow_rxq_flags_trim(dev, flow);
5862 flow_drv_destroy(dev, flow);
5864 rte_spinlock_lock(&priv->flow_list_lock);
5865 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
5866 flow_idx, flow, next);
5867 rte_spinlock_unlock(&priv->flow_list_lock);
5870 struct mlx5_flow_tunnel *tunnel;
5872 rte_spinlock_lock(&mlx5_tunnel_hub(dev)->sl);
5873 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
5875 LIST_REMOVE(tunnel, chain);
5876 rte_spinlock_unlock(&mlx5_tunnel_hub(dev)->sl);
5877 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
5878 mlx5_flow_tunnel_free(dev, tunnel);
5880 flow_mreg_del_copy_action(dev, flow);
5881 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
5885 * Destroy all flows.
5888 * Pointer to Ethernet device.
5890 * Pointer to the Indexed flow list.
5892 * If flushing is called avtively.
5895 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
5897 uint32_t num_flushed = 0;
5900 flow_list_destroy(dev, list, *list);
5904 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
5905 dev->data->port_id, num_flushed);
5910 * Stop all default actions for flows.
5913 * Pointer to Ethernet device.
5916 mlx5_flow_stop_default(struct rte_eth_dev *dev)
5918 flow_mreg_del_default_copy_action(dev);
5919 flow_rxq_flags_clear(dev);
5923 * Start all default actions for flows.
5926 * Pointer to Ethernet device.
5928 * 0 on success, a negative errno value otherwise and rte_errno is set.
5931 mlx5_flow_start_default(struct rte_eth_dev *dev)
5933 struct rte_flow_error error;
5935 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
5936 return flow_mreg_add_default_copy_action(dev, &error);
5940 * Release key of thread specific flow workspace data.
5943 flow_release_workspace(void *data)
5945 struct mlx5_flow_workspace *wks = data;
5946 struct mlx5_flow_workspace *next;
5950 free(wks->rss_desc.queue);
5957 * Initialize key of thread specific flow workspace data.
5960 flow_alloc_workspace(void)
5962 if (pthread_key_create(&key_workspace, flow_release_workspace))
5963 DRV_LOG(ERR, "Can't create flow workspace data thread key.");
5967 * Get thread specific current flow workspace.
5969 * @return pointer to thread specific flow workspace data, NULL on error.
5971 struct mlx5_flow_workspace*
5972 mlx5_flow_get_thread_workspace(void)
5974 struct mlx5_flow_workspace *data;
5976 data = pthread_getspecific(key_workspace);
5977 MLX5_ASSERT(data && data->inuse);
5978 if (!data || !data->inuse)
5979 DRV_LOG(ERR, "flow workspace not initialized.");
5984 * Allocate and init new flow workspace.
5986 * @return pointer to flow workspace data, NULL on error.
5988 static struct mlx5_flow_workspace*
5989 flow_alloc_thread_workspace(void)
5991 struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
5994 DRV_LOG(ERR, "Failed to allocate flow workspace "
5998 data->rss_desc.queue = calloc(1,
5999 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6000 if (!data->rss_desc.queue)
6002 data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6005 if (data->rss_desc.queue)
6006 free(data->rss_desc.queue);
6012 * Get new thread specific flow workspace.
6014 * If current workspace inuse, create new one and set as current.
6016 * @return pointer to thread specific flow workspace data, NULL on error.
6018 static struct mlx5_flow_workspace*
6019 mlx5_flow_push_thread_workspace(void)
6021 struct mlx5_flow_workspace *curr;
6022 struct mlx5_flow_workspace *data;
6024 if (pthread_once(&key_workspace_init, flow_alloc_workspace)) {
6025 DRV_LOG(ERR, "Failed to init flow workspace data thread key.");
6028 curr = pthread_getspecific(key_workspace);
6030 data = flow_alloc_thread_workspace();
6033 } else if (!curr->inuse) {
6035 } else if (curr->next) {
6038 data = flow_alloc_thread_workspace();
6046 /* Set as current workspace */
6047 if (pthread_setspecific(key_workspace, data))
6048 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6053 * Close current thread specific flow workspace.
6055 * If previous workspace available, set it as current.
6057 * @return pointer to thread specific flow workspace data, NULL on error.
6060 mlx5_flow_pop_thread_workspace(void)
6062 struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6067 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6073 if (pthread_setspecific(key_workspace, data->prev))
6074 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6078 * Verify the flow list is empty
6081 * Pointer to Ethernet device.
6083 * @return the number of flows not released.
6086 mlx5_flow_verify(struct rte_eth_dev *dev)
6088 struct mlx5_priv *priv = dev->data->dev_private;
6089 struct rte_flow *flow;
6093 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
6095 DRV_LOG(DEBUG, "port %u flow %p still referenced",
6096 dev->data->port_id, (void *)flow);
6103 * Enable default hairpin egress flow.
6106 * Pointer to Ethernet device.
6111 * 0 on success, a negative errno value otherwise and rte_errno is set.
6114 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6117 struct mlx5_priv *priv = dev->data->dev_private;
6118 const struct rte_flow_attr attr = {
6122 struct mlx5_rte_flow_item_tx_queue queue_spec = {
6125 struct mlx5_rte_flow_item_tx_queue queue_mask = {
6126 .queue = UINT32_MAX,
6128 struct rte_flow_item items[] = {
6130 .type = (enum rte_flow_item_type)
6131 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6132 .spec = &queue_spec,
6134 .mask = &queue_mask,
6137 .type = RTE_FLOW_ITEM_TYPE_END,
6140 struct rte_flow_action_jump jump = {
6141 .group = MLX5_HAIRPIN_TX_TABLE,
6143 struct rte_flow_action actions[2];
6145 struct rte_flow_error error;
6147 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6148 actions[0].conf = &jump;
6149 actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6150 flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6151 &attr, items, actions, false, &error);
6154 "Failed to create ctrl flow: rte_errno(%d),"
6155 " type(%d), message(%s)",
6156 rte_errno, error.type,
6157 error.message ? error.message : " (no stated reason)");
6164 * Enable a control flow configured from the control plane.
6167 * Pointer to Ethernet device.
6169 * An Ethernet flow spec to apply.
6171 * An Ethernet flow mask to apply.
6173 * A VLAN flow spec to apply.
6175 * A VLAN flow mask to apply.
6178 * 0 on success, a negative errno value otherwise and rte_errno is set.
6181 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6182 struct rte_flow_item_eth *eth_spec,
6183 struct rte_flow_item_eth *eth_mask,
6184 struct rte_flow_item_vlan *vlan_spec,
6185 struct rte_flow_item_vlan *vlan_mask)
6187 struct mlx5_priv *priv = dev->data->dev_private;
6188 const struct rte_flow_attr attr = {
6190 .priority = MLX5_FLOW_PRIO_RSVD,
6192 struct rte_flow_item items[] = {
6194 .type = RTE_FLOW_ITEM_TYPE_ETH,
6200 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6201 RTE_FLOW_ITEM_TYPE_END,
6207 .type = RTE_FLOW_ITEM_TYPE_END,
6210 uint16_t queue[priv->reta_idx_n];
6211 struct rte_flow_action_rss action_rss = {
6212 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6214 .types = priv->rss_conf.rss_hf,
6215 .key_len = priv->rss_conf.rss_key_len,
6216 .queue_num = priv->reta_idx_n,
6217 .key = priv->rss_conf.rss_key,
6220 struct rte_flow_action actions[] = {
6222 .type = RTE_FLOW_ACTION_TYPE_RSS,
6223 .conf = &action_rss,
6226 .type = RTE_FLOW_ACTION_TYPE_END,
6230 struct rte_flow_error error;
6233 if (!priv->reta_idx_n || !priv->rxqs_n) {
6236 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6237 action_rss.types = 0;
6238 for (i = 0; i != priv->reta_idx_n; ++i)
6239 queue[i] = (*priv->reta_idx)[i];
6240 flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6241 &attr, items, actions, false, &error);
6248 * Enable a flow control configured from the control plane.
6251 * Pointer to Ethernet device.
6253 * An Ethernet flow spec to apply.
6255 * An Ethernet flow mask to apply.
6258 * 0 on success, a negative errno value otherwise and rte_errno is set.
6261 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6262 struct rte_flow_item_eth *eth_spec,
6263 struct rte_flow_item_eth *eth_mask)
6265 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6269 * Create default miss flow rule matching lacp traffic
6272 * Pointer to Ethernet device.
6274 * An Ethernet flow spec to apply.
6277 * 0 on success, a negative errno value otherwise and rte_errno is set.
6280 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6282 struct mlx5_priv *priv = dev->data->dev_private;
6284 * The LACP matching is done by only using ether type since using
6285 * a multicast dst mac causes kernel to give low priority to this flow.
6287 static const struct rte_flow_item_eth lacp_spec = {
6288 .type = RTE_BE16(0x8809),
6290 static const struct rte_flow_item_eth lacp_mask = {
6293 const struct rte_flow_attr attr = {
6296 struct rte_flow_item items[] = {
6298 .type = RTE_FLOW_ITEM_TYPE_ETH,
6303 .type = RTE_FLOW_ITEM_TYPE_END,
6306 struct rte_flow_action actions[] = {
6308 .type = (enum rte_flow_action_type)
6309 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6312 .type = RTE_FLOW_ACTION_TYPE_END,
6315 struct rte_flow_error error;
6316 uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6317 &attr, items, actions, false, &error);
6327 * @see rte_flow_destroy()
6331 mlx5_flow_destroy(struct rte_eth_dev *dev,
6332 struct rte_flow *flow,
6333 struct rte_flow_error *error __rte_unused)
6335 struct mlx5_priv *priv = dev->data->dev_private;
6337 flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6342 * Destroy all flows.
6344 * @see rte_flow_flush()
6348 mlx5_flow_flush(struct rte_eth_dev *dev,
6349 struct rte_flow_error *error __rte_unused)
6351 struct mlx5_priv *priv = dev->data->dev_private;
6353 mlx5_flow_list_flush(dev, &priv->flows, false);
6360 * @see rte_flow_isolate()
6364 mlx5_flow_isolate(struct rte_eth_dev *dev,
6366 struct rte_flow_error *error)
6368 struct mlx5_priv *priv = dev->data->dev_private;
6370 if (dev->data->dev_started) {
6371 rte_flow_error_set(error, EBUSY,
6372 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6374 "port must be stopped first");
6377 priv->isolated = !!enable;
6379 dev->dev_ops = &mlx5_os_dev_ops_isolate;
6381 dev->dev_ops = &mlx5_os_dev_ops;
6383 dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6384 dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6392 * @see rte_flow_query()
6396 flow_drv_query(struct rte_eth_dev *dev,
6398 const struct rte_flow_action *actions,
6400 struct rte_flow_error *error)
6402 struct mlx5_priv *priv = dev->data->dev_private;
6403 const struct mlx5_flow_driver_ops *fops;
6404 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6405 [MLX5_IPOOL_RTE_FLOW],
6407 enum mlx5_flow_drv_type ftype;
6410 return rte_flow_error_set(error, ENOENT,
6411 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6413 "invalid flow handle");
6415 ftype = flow->drv_type;
6416 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6417 fops = flow_get_drv_ops(ftype);
6419 return fops->query(dev, flow, actions, data, error);
6425 * @see rte_flow_query()
6429 mlx5_flow_query(struct rte_eth_dev *dev,
6430 struct rte_flow *flow,
6431 const struct rte_flow_action *actions,
6433 struct rte_flow_error *error)
6437 ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6445 * Manage filter operations.
6448 * Pointer to Ethernet device structure.
6449 * @param filter_type
6452 * Operation to perform.
6454 * Pointer to operation-specific structure.
6457 * 0 on success, a negative errno value otherwise and rte_errno is set.
6460 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
6461 enum rte_filter_type filter_type,
6462 enum rte_filter_op filter_op,
6465 switch (filter_type) {
6466 case RTE_ETH_FILTER_GENERIC:
6467 if (filter_op != RTE_ETH_FILTER_GET) {
6471 *(const void **)arg = &mlx5_flow_ops;
6474 DRV_LOG(ERR, "port %u filter type (%d) not supported",
6475 dev->data->port_id, filter_type);
6476 rte_errno = ENOTSUP;
6483 * Create the needed meter and suffix tables.
6486 * Pointer to Ethernet device.
6488 * Pointer to the flow meter.
6491 * Pointer to table set on success, NULL otherwise.
6493 struct mlx5_meter_domains_infos *
6494 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
6495 const struct mlx5_flow_meter *fm)
6497 const struct mlx5_flow_driver_ops *fops;
6499 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6500 return fops->create_mtr_tbls(dev, fm);
6504 * Destroy the meter table set.
6507 * Pointer to Ethernet device.
6509 * Pointer to the meter table set.
6515 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
6516 struct mlx5_meter_domains_infos *tbls)
6518 const struct mlx5_flow_driver_ops *fops;
6520 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6521 return fops->destroy_mtr_tbls(dev, tbls);
6525 * Create policer rules.
6528 * Pointer to Ethernet device.
6530 * Pointer to flow meter structure.
6532 * Pointer to flow attributes.
6535 * 0 on success, -1 otherwise.
6538 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
6539 struct mlx5_flow_meter *fm,
6540 const struct rte_flow_attr *attr)
6542 const struct mlx5_flow_driver_ops *fops;
6544 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6545 return fops->create_policer_rules(dev, fm, attr);
6549 * Destroy policer rules.
6552 * Pointer to flow meter structure.
6554 * Pointer to flow attributes.
6557 * 0 on success, -1 otherwise.
6560 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
6561 struct mlx5_flow_meter *fm,
6562 const struct rte_flow_attr *attr)
6564 const struct mlx5_flow_driver_ops *fops;
6566 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6567 return fops->destroy_policer_rules(dev, fm, attr);
6571 * Allocate a counter.
6574 * Pointer to Ethernet device structure.
6577 * Index to allocated counter on success, 0 otherwise.
6580 mlx5_counter_alloc(struct rte_eth_dev *dev)
6582 const struct mlx5_flow_driver_ops *fops;
6583 struct rte_flow_attr attr = { .transfer = 0 };
6585 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6586 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6587 return fops->counter_alloc(dev);
6590 "port %u counter allocate is not supported.",
6591 dev->data->port_id);
6599 * Pointer to Ethernet device structure.
6601 * Index to counter to be free.
6604 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
6606 const struct mlx5_flow_driver_ops *fops;
6607 struct rte_flow_attr attr = { .transfer = 0 };
6609 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6610 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6611 fops->counter_free(dev, cnt);
6615 "port %u counter free is not supported.",
6616 dev->data->port_id);
6620 * Query counter statistics.
6623 * Pointer to Ethernet device structure.
6625 * Index to counter to query.
6627 * Set to clear counter statistics.
6629 * The counter hits packets number to save.
6631 * The counter hits bytes number to save.
6634 * 0 on success, a negative errno value otherwise.
6637 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
6638 bool clear, uint64_t *pkts, uint64_t *bytes)
6640 const struct mlx5_flow_driver_ops *fops;
6641 struct rte_flow_attr attr = { .transfer = 0 };
6643 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6644 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6645 return fops->counter_query(dev, cnt, clear, pkts, bytes);
6648 "port %u counter query is not supported.",
6649 dev->data->port_id);
6654 * Allocate a new memory for the counter values wrapped by all the needed
6658 * Pointer to mlx5_dev_ctx_shared object.
6661 * 0 on success, a negative errno value otherwise.
6664 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
6666 struct mlx5_devx_mkey_attr mkey_attr;
6667 struct mlx5_counter_stats_mem_mng *mem_mng;
6668 volatile struct flow_counter_stats *raw_data;
6669 int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
6670 int size = (sizeof(struct flow_counter_stats) *
6671 MLX5_COUNTERS_PER_POOL +
6672 sizeof(struct mlx5_counter_stats_raw)) * raws_n +
6673 sizeof(struct mlx5_counter_stats_mem_mng);
6674 size_t pgsize = rte_mem_page_size();
6678 if (pgsize == (size_t)-1) {
6679 DRV_LOG(ERR, "Failed to get mem page size");
6683 mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
6688 mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
6689 size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
6690 mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
6691 IBV_ACCESS_LOCAL_WRITE);
6692 if (!mem_mng->umem) {
6697 mkey_attr.addr = (uintptr_t)mem;
6698 mkey_attr.size = size;
6699 mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
6700 mkey_attr.pd = sh->pdn;
6701 mkey_attr.log_entity_size = 0;
6702 mkey_attr.pg_access = 0;
6703 mkey_attr.klm_array = NULL;
6704 mkey_attr.klm_num = 0;
6705 mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
6706 mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
6707 mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
6709 mlx5_glue->devx_umem_dereg(mem_mng->umem);
6714 mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
6715 raw_data = (volatile struct flow_counter_stats *)mem;
6716 for (i = 0; i < raws_n; ++i) {
6717 mem_mng->raws[i].mem_mng = mem_mng;
6718 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
6720 for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
6721 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
6722 mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
6724 LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
6725 sh->cmng.mem_mng = mem_mng;
6730 * Set the statistic memory to the new counter pool.
6733 * Pointer to mlx5_dev_ctx_shared object.
6735 * Pointer to the pool to set the statistic memory.
6738 * 0 on success, a negative errno value otherwise.
6741 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
6742 struct mlx5_flow_counter_pool *pool)
6744 struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6745 /* Resize statistic memory once used out. */
6746 if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
6747 mlx5_flow_create_counter_stat_mem_mng(sh)) {
6748 DRV_LOG(ERR, "Cannot resize counter stat mem.");
6751 rte_spinlock_lock(&pool->sl);
6752 pool->raw = cmng->mem_mng->raws + pool->index %
6753 MLX5_CNT_CONTAINER_RESIZE;
6754 rte_spinlock_unlock(&pool->sl);
6755 pool->raw_hw = NULL;
6759 #define MLX5_POOL_QUERY_FREQ_US 1000000
6762 * Set the periodic procedure for triggering asynchronous batch queries for all
6763 * the counter pools.
6766 * Pointer to mlx5_dev_ctx_shared object.
6769 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
6771 uint32_t pools_n, us;
6773 pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
6774 us = MLX5_POOL_QUERY_FREQ_US / pools_n;
6775 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
6776 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
6777 sh->cmng.query_thread_on = 0;
6778 DRV_LOG(ERR, "Cannot reinitialize query alarm");
6780 sh->cmng.query_thread_on = 1;
6785 * The periodic procedure for triggering asynchronous batch queries for all the
6786 * counter pools. This function is probably called by the host thread.
6789 * The parameter for the alarm process.
6792 mlx5_flow_query_alarm(void *arg)
6794 struct mlx5_dev_ctx_shared *sh = arg;
6796 uint16_t pool_index = sh->cmng.pool_index;
6797 struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6798 struct mlx5_flow_counter_pool *pool;
6801 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
6803 rte_spinlock_lock(&cmng->pool_update_sl);
6804 pool = cmng->pools[pool_index];
6805 n_valid = cmng->n_valid;
6806 rte_spinlock_unlock(&cmng->pool_update_sl);
6807 /* Set the statistic memory to the new created pool. */
6808 if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
6811 /* There is a pool query in progress. */
6814 LIST_FIRST(&sh->cmng.free_stat_raws);
6816 /* No free counter statistics raw memory. */
6819 * Identify the counters released between query trigger and query
6820 * handle more efficiently. The counter released in this gap period
6821 * should wait for a new round of query as the new arrived packets
6822 * will not be taken into account.
6825 ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
6826 MLX5_COUNTERS_PER_POOL,
6828 pool->raw_hw->mem_mng->dm->id,
6832 (uint64_t)(uintptr_t)pool);
6834 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
6835 " %d", pool->min_dcs->id);
6836 pool->raw_hw = NULL;
6839 LIST_REMOVE(pool->raw_hw, next);
6840 sh->cmng.pending_queries++;
6842 if (pool_index >= n_valid)
6845 sh->cmng.pool_index = pool_index;
6846 mlx5_set_query_alarm(sh);
6850 * Check and callback event for new aged flow in the counter pool
6853 * Pointer to mlx5_dev_ctx_shared object.
6855 * Pointer to Current counter pool.
6858 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
6859 struct mlx5_flow_counter_pool *pool)
6861 struct mlx5_priv *priv;
6862 struct mlx5_flow_counter *cnt;
6863 struct mlx5_age_info *age_info;
6864 struct mlx5_age_param *age_param;
6865 struct mlx5_counter_stats_raw *cur = pool->raw_hw;
6866 struct mlx5_counter_stats_raw *prev = pool->raw;
6867 const uint64_t curr_time = MLX5_CURR_TIME_SEC;
6868 const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
6869 uint16_t expected = AGE_CANDIDATE;
6872 pool->time_of_last_age_check = curr_time;
6873 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
6874 cnt = MLX5_POOL_GET_CNT(pool, i);
6875 age_param = MLX5_CNT_TO_AGE(cnt);
6876 if (__atomic_load_n(&age_param->state,
6877 __ATOMIC_RELAXED) != AGE_CANDIDATE)
6879 if (cur->data[i].hits != prev->data[i].hits) {
6880 __atomic_store_n(&age_param->sec_since_last_hit, 0,
6884 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
6886 __ATOMIC_RELAXED) <= age_param->timeout)
6889 * Hold the lock first, or if between the
6890 * state AGE_TMOUT and tailq operation the
6891 * release happened, the release procedure
6892 * may delete a non-existent tailq node.
6894 priv = rte_eth_devices[age_param->port_id].data->dev_private;
6895 age_info = GET_PORT_AGE_INFO(priv);
6896 rte_spinlock_lock(&age_info->aged_sl);
6897 if (__atomic_compare_exchange_n(&age_param->state, &expected,
6900 __ATOMIC_RELAXED)) {
6901 TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
6902 MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
6904 rte_spinlock_unlock(&age_info->aged_sl);
6906 mlx5_age_event_prepare(sh);
6910 * Handler for the HW respond about ready values from an asynchronous batch
6911 * query. This function is probably called by the host thread.
6914 * The pointer to the shared device context.
6915 * @param[in] async_id
6916 * The Devx async ID.
6918 * The status of the completion.
6921 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
6922 uint64_t async_id, int status)
6924 struct mlx5_flow_counter_pool *pool =
6925 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
6926 struct mlx5_counter_stats_raw *raw_to_free;
6927 uint8_t query_gen = pool->query_gen ^ 1;
6928 struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6929 enum mlx5_counter_type cnt_type =
6930 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6931 MLX5_COUNTER_TYPE_ORIGIN;
6933 if (unlikely(status)) {
6934 raw_to_free = pool->raw_hw;
6936 raw_to_free = pool->raw;
6938 mlx5_flow_aging_check(sh, pool);
6939 rte_spinlock_lock(&pool->sl);
6940 pool->raw = pool->raw_hw;
6941 rte_spinlock_unlock(&pool->sl);
6942 /* Be sure the new raw counters data is updated in memory. */
6944 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
6945 rte_spinlock_lock(&cmng->csl[cnt_type]);
6946 TAILQ_CONCAT(&cmng->counters[cnt_type],
6947 &pool->counters[query_gen], next);
6948 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6951 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
6952 pool->raw_hw = NULL;
6953 sh->cmng.pending_queries--;
6956 static const struct mlx5_flow_tbl_data_entry *
6957 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
6959 struct mlx5_priv *priv = dev->data->dev_private;
6960 struct mlx5_dev_ctx_shared *sh = priv->sh;
6961 struct mlx5_hlist_entry *he;
6962 union tunnel_offload_mark mbits = { .val = mark };
6963 union mlx5_flow_tbl_key table_key = {
6965 .table_id = tunnel_id_to_flow_tbl(mbits.table_id),
6967 .domain = !!mbits.transfer,
6971 he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
6973 container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
6977 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list,
6978 struct mlx5_hlist_entry *entry)
6980 struct mlx5_dev_ctx_shared *sh = list->ctx;
6981 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
6983 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
6984 tunnel_flow_tbl_to_id(tte->flow_table));
6988 static struct mlx5_hlist_entry *
6989 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list,
6990 uint64_t key __rte_unused,
6991 void *ctx __rte_unused)
6993 struct mlx5_dev_ctx_shared *sh = list->ctx;
6994 struct tunnel_tbl_entry *tte;
6996 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
7001 mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7003 if (tte->flow_table >= MLX5_MAX_TABLES) {
7004 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
7006 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7009 } else if (!tte->flow_table) {
7012 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
7021 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
7022 const struct mlx5_flow_tunnel *tunnel,
7023 uint32_t group, uint32_t *table,
7024 struct rte_flow_error *error)
7026 struct mlx5_hlist_entry *he;
7027 struct tunnel_tbl_entry *tte;
7028 union tunnel_tbl_key key = {
7029 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
7032 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7033 struct mlx5_hlist *group_hash;
7035 group_hash = tunnel ? tunnel->groups : thub->groups;
7036 he = mlx5_hlist_register(group_hash, key.val, NULL);
7038 return rte_flow_error_set(error, EINVAL,
7039 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7041 "tunnel group index not supported");
7042 tte = container_of(he, typeof(*tte), hash);
7043 *table = tte->flow_table;
7044 DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
7045 dev->data->port_id, key.tunnel_id, group, *table);
7050 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7051 struct flow_grp_info grp_info, struct rte_flow_error *error)
7053 if (grp_info.transfer && grp_info.external && grp_info.fdb_def_rule) {
7054 if (group == UINT32_MAX)
7055 return rte_flow_error_set
7057 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7059 "group index not supported");
7064 DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7069 * Translate the rte_flow group index to HW table value.
7071 * If tunnel offload is disabled, all group ids converted to flow table
7072 * id using the standard method.
7073 * If tunnel offload is enabled, group id can be converted using the
7074 * standard or tunnel conversion method. Group conversion method
7075 * selection depends on flags in `grp_info` parameter:
7076 * - Internal (grp_info.external == 0) groups conversion uses the
7078 * - Group ids in JUMP action converted with the tunnel conversion.
7079 * - Group id in rule attribute conversion depends on a rule type and
7081 * ** non zero group attributes converted with the tunnel method
7082 * ** zero group attribute in non-tunnel rule is converted using the
7083 * standard method - there's only one root table
7084 * ** zero group attribute in steer tunnel rule is converted with the
7085 * standard method - single root table
7086 * ** zero group attribute in match tunnel rule is a special OvS
7087 * case: that value is used for portability reasons. That group
7088 * id is converted with the tunnel conversion method.
7093 * PMD tunnel offload object
7095 * rte_flow group index value.
7098 * @param[in] grp_info
7099 * flags used for conversion
7101 * Pointer to error structure.
7104 * 0 on success, a negative errno value otherwise and rte_errno is set.
7107 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7108 const struct mlx5_flow_tunnel *tunnel,
7109 uint32_t group, uint32_t *table,
7110 struct flow_grp_info grp_info,
7111 struct rte_flow_error *error)
7114 bool standard_translation;
7116 if (!grp_info.skip_scale && grp_info.external &&
7117 group < MLX5_MAX_TABLES_EXTERNAL)
7118 group *= MLX5_FLOW_TABLE_FACTOR;
7119 if (is_tunnel_offload_active(dev)) {
7120 standard_translation = !grp_info.external ||
7121 grp_info.std_tbl_fix;
7123 standard_translation = true;
7126 "port %u group=%#x transfer=%d external=%d fdb_def_rule=%d translate=%s",
7127 dev->data->port_id, group, grp_info.transfer,
7128 grp_info.external, grp_info.fdb_def_rule,
7129 standard_translation ? "STANDARD" : "TUNNEL");
7130 if (standard_translation)
7131 ret = flow_group_to_table(dev->data->port_id, group, table,
7134 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7141 * Discover availability of metadata reg_c's.
7143 * Iteratively use test flows to check availability.
7146 * Pointer to the Ethernet device structure.
7149 * 0 on success, a negative errno value otherwise and rte_errno is set.
7152 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7154 struct mlx5_priv *priv = dev->data->dev_private;
7155 struct mlx5_dev_config *config = &priv->config;
7156 enum modify_reg idx;
7159 /* reg_c[0] and reg_c[1] are reserved. */
7160 config->flow_mreg_c[n++] = REG_C_0;
7161 config->flow_mreg_c[n++] = REG_C_1;
7162 /* Discover availability of other reg_c's. */
7163 for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7164 struct rte_flow_attr attr = {
7165 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7166 .priority = MLX5_FLOW_PRIO_RSVD,
7169 struct rte_flow_item items[] = {
7171 .type = RTE_FLOW_ITEM_TYPE_END,
7174 struct rte_flow_action actions[] = {
7176 .type = (enum rte_flow_action_type)
7177 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7178 .conf = &(struct mlx5_flow_action_copy_mreg){
7184 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7185 .conf = &(struct rte_flow_action_jump){
7186 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7190 .type = RTE_FLOW_ACTION_TYPE_END,
7194 struct rte_flow *flow;
7195 struct rte_flow_error error;
7197 if (!config->dv_flow_en)
7199 /* Create internal flow, validation skips copy action. */
7200 flow_idx = flow_list_create(dev, NULL, &attr, items,
7201 actions, false, &error);
7202 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
7206 config->flow_mreg_c[n++] = idx;
7207 flow_list_destroy(dev, NULL, flow_idx);
7209 for (; n < MLX5_MREG_C_NUM; ++n)
7210 config->flow_mreg_c[n] = REG_NON;
7215 * Dump flow raw hw data to file
7218 * The pointer to Ethernet device.
7220 * A pointer to a file for output.
7222 * Perform verbose error reporting if not NULL. PMDs initialize this
7223 * structure in case of error only.
7225 * 0 on success, a nagative value otherwise.
7228 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
7230 struct rte_flow_error *error __rte_unused)
7232 struct mlx5_priv *priv = dev->data->dev_private;
7233 struct mlx5_dev_ctx_shared *sh = priv->sh;
7235 if (!priv->config.dv_flow_en) {
7236 if (fputs("device dv flow disabled\n", file) <= 0)
7240 return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
7241 sh->tx_domain, file);
7245 * Get aged-out flows.
7248 * Pointer to the Ethernet device structure.
7249 * @param[in] context
7250 * The address of an array of pointers to the aged-out flows contexts.
7251 * @param[in] nb_countexts
7252 * The length of context array pointers.
7254 * Perform verbose error reporting if not NULL. Initialized in case of
7258 * how many contexts get in success, otherwise negative errno value.
7259 * if nb_contexts is 0, return the amount of all aged contexts.
7260 * if nb_contexts is not 0 , return the amount of aged flows reported
7261 * in the context array.
7264 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
7265 uint32_t nb_contexts, struct rte_flow_error *error)
7267 const struct mlx5_flow_driver_ops *fops;
7268 struct rte_flow_attr attr = { .transfer = 0 };
7270 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7271 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7272 return fops->get_aged_flows(dev, contexts, nb_contexts,
7276 "port %u get aged flows is not supported.",
7277 dev->data->port_id);
7281 /* Wrapper for driver action_validate op callback */
7283 flow_drv_action_validate(struct rte_eth_dev *dev,
7284 const struct rte_flow_shared_action_conf *conf,
7285 const struct rte_flow_action *action,
7286 const struct mlx5_flow_driver_ops *fops,
7287 struct rte_flow_error *error)
7289 static const char err_msg[] = "shared action validation unsupported";
7291 if (!fops->action_validate) {
7292 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7293 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7297 return fops->action_validate(dev, conf, action, error);
7301 * Destroys the shared action by handle.
7304 * Pointer to Ethernet device structure.
7306 * Handle for the shared action to be destroyed.
7308 * Perform verbose error reporting if not NULL. PMDs initialize this
7309 * structure in case of error only.
7312 * 0 on success, a negative errno value otherwise and rte_errno is set.
7314 * @note: wrapper for driver action_create op callback.
7317 mlx5_shared_action_destroy(struct rte_eth_dev *dev,
7318 struct rte_flow_shared_action *action,
7319 struct rte_flow_error *error)
7321 static const char err_msg[] = "shared action destruction unsupported";
7322 struct rte_flow_attr attr = { .transfer = 0 };
7323 const struct mlx5_flow_driver_ops *fops =
7324 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7326 if (!fops->action_destroy) {
7327 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7328 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7332 return fops->action_destroy(dev, action, error);
7335 /* Wrapper for driver action_destroy op callback */
7337 flow_drv_action_update(struct rte_eth_dev *dev,
7338 struct rte_flow_shared_action *action,
7339 const void *action_conf,
7340 const struct mlx5_flow_driver_ops *fops,
7341 struct rte_flow_error *error)
7343 static const char err_msg[] = "shared action update unsupported";
7345 if (!fops->action_update) {
7346 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7347 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7351 return fops->action_update(dev, action, action_conf, error);
7354 /* Wrapper for driver action_destroy op callback */
7356 flow_drv_action_query(struct rte_eth_dev *dev,
7357 const struct rte_flow_shared_action *action,
7359 const struct mlx5_flow_driver_ops *fops,
7360 struct rte_flow_error *error)
7362 static const char err_msg[] = "shared action query unsupported";
7364 if (!fops->action_query) {
7365 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7366 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7370 return fops->action_query(dev, action, data, error);
7374 * Create shared action for reuse in multiple flow rules.
7377 * Pointer to Ethernet device structure.
7379 * Action configuration for shared action creation.
7381 * Perform verbose error reporting if not NULL. PMDs initialize this
7382 * structure in case of error only.
7384 * A valid handle in case of success, NULL otherwise and rte_errno is set.
7386 static struct rte_flow_shared_action *
7387 mlx5_shared_action_create(struct rte_eth_dev *dev,
7388 const struct rte_flow_shared_action_conf *conf,
7389 const struct rte_flow_action *action,
7390 struct rte_flow_error *error)
7392 static const char err_msg[] = "shared action creation unsupported";
7393 struct rte_flow_attr attr = { .transfer = 0 };
7394 const struct mlx5_flow_driver_ops *fops =
7395 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7397 if (flow_drv_action_validate(dev, conf, action, fops, error))
7399 if (!fops->action_create) {
7400 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7401 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7405 return fops->action_create(dev, conf, action, error);
7409 * Updates inplace the shared action configuration pointed by *action* handle
7410 * with the configuration provided as *action* argument.
7411 * The update of the shared action configuration effects all flow rules reusing
7412 * the action via handle.
7415 * Pointer to Ethernet device structure.
7416 * @param[in] shared_action
7417 * Handle for the shared action to be updated.
7419 * Action specification used to modify the action pointed by handle.
7420 * *action* should be of same type with the action pointed by the *action*
7421 * handle argument, otherwise considered as invalid.
7423 * Perform verbose error reporting if not NULL. PMDs initialize this
7424 * structure in case of error only.
7427 * 0 on success, a negative errno value otherwise and rte_errno is set.
7430 mlx5_shared_action_update(struct rte_eth_dev *dev,
7431 struct rte_flow_shared_action *shared_action,
7432 const struct rte_flow_action *action,
7433 struct rte_flow_error *error)
7435 struct rte_flow_attr attr = { .transfer = 0 };
7436 const struct mlx5_flow_driver_ops *fops =
7437 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7440 ret = flow_drv_action_validate(dev, NULL, action, fops, error);
7443 return flow_drv_action_update(dev, shared_action, action->conf, fops,
7448 * Query the shared action by handle.
7450 * This function allows retrieving action-specific data such as counters.
7451 * Data is gathered by special action which may be present/referenced in
7452 * more than one flow rule definition.
7454 * \see RTE_FLOW_ACTION_TYPE_COUNT
7457 * Pointer to Ethernet device structure.
7459 * Handle for the shared action to query.
7460 * @param[in, out] data
7461 * Pointer to storage for the associated query data type.
7463 * Perform verbose error reporting if not NULL. PMDs initialize this
7464 * structure in case of error only.
7467 * 0 on success, a negative errno value otherwise and rte_errno is set.
7470 mlx5_shared_action_query(struct rte_eth_dev *dev,
7471 const struct rte_flow_shared_action *action,
7473 struct rte_flow_error *error)
7475 struct rte_flow_attr attr = { .transfer = 0 };
7476 const struct mlx5_flow_driver_ops *fops =
7477 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7479 return flow_drv_action_query(dev, action, data, fops, error);
7483 * Destroy all shared actions.
7486 * Pointer to Ethernet device.
7489 * 0 on success, a negative errno value otherwise and rte_errno is set.
7492 mlx5_shared_action_flush(struct rte_eth_dev *dev)
7494 struct rte_flow_error error;
7495 struct mlx5_priv *priv = dev->data->dev_private;
7496 struct mlx5_shared_action_rss *action;
7500 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
7501 priv->rss_shared_actions, idx, action, next) {
7502 ret |= mlx5_shared_action_destroy(dev,
7503 (struct rte_flow_shared_action *)(uintptr_t)idx, &error);
7509 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
7510 struct mlx5_flow_tunnel *tunnel)
7512 struct mlx5_priv *priv = dev->data->dev_private;
7514 DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
7515 dev->data->port_id, tunnel->tunnel_id);
7516 RTE_VERIFY(!__atomic_load_n(&tunnel->refctn, __ATOMIC_RELAXED));
7517 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID],
7519 mlx5_hlist_destroy(tunnel->groups);
7523 static struct mlx5_flow_tunnel *
7524 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
7526 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7527 struct mlx5_flow_tunnel *tun;
7529 LIST_FOREACH(tun, &thub->tunnels, chain) {
7530 if (tun->tunnel_id == id)
7537 static struct mlx5_flow_tunnel *
7538 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
7539 const struct rte_flow_tunnel *app_tunnel)
7541 struct mlx5_priv *priv = dev->data->dev_private;
7542 struct mlx5_flow_tunnel *tunnel;
7545 mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
7547 if (id >= MLX5_MAX_TUNNELS) {
7548 mlx5_ipool_free(priv->sh->ipool
7549 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id);
7550 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
7556 * mlx5 flow tunnel is an auxlilary data structure
7557 * It's not part of IO. No need to allocate it from
7558 * huge pages pools dedicated for IO
7560 tunnel = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*tunnel),
7563 mlx5_ipool_free(priv->sh->ipool
7564 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id);
7567 tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0,
7568 mlx5_flow_tunnel_grp2tbl_create_cb,
7570 mlx5_flow_tunnel_grp2tbl_remove_cb);
7571 if (!tunnel->groups) {
7572 mlx5_ipool_free(priv->sh->ipool
7573 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id);
7577 tunnel->groups->ctx = priv->sh;
7578 /* initiate new PMD tunnel */
7579 memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
7580 tunnel->tunnel_id = id;
7581 tunnel->action.type = (typeof(tunnel->action.type))
7582 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
7583 tunnel->action.conf = tunnel;
7584 tunnel->item.type = (typeof(tunnel->item.type))
7585 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
7586 tunnel->item.spec = tunnel;
7587 tunnel->item.last = NULL;
7588 tunnel->item.mask = NULL;
7590 DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
7591 dev->data->port_id, tunnel->tunnel_id);
7597 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
7598 const struct rte_flow_tunnel *app_tunnel,
7599 struct mlx5_flow_tunnel **tunnel)
7602 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7603 struct mlx5_flow_tunnel *tun;
7605 rte_spinlock_lock(&thub->sl);
7606 LIST_FOREACH(tun, &thub->tunnels, chain) {
7607 if (!memcmp(app_tunnel, &tun->app_tunnel,
7608 sizeof(*app_tunnel))) {
7615 tun = mlx5_flow_tunnel_allocate(dev, app_tunnel);
7617 LIST_INSERT_HEAD(&thub->tunnels, tun, chain);
7623 rte_spinlock_unlock(&thub->sl);
7625 __atomic_add_fetch(&tun->refctn, 1, __ATOMIC_RELAXED);
7630 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
7632 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
7636 if (!LIST_EMPTY(&thub->tunnels))
7637 DRV_LOG(WARNING, "port %u tunnels present\n", port_id);
7638 mlx5_hlist_destroy(thub->groups);
7642 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
7645 struct mlx5_flow_tunnel_hub *thub;
7647 thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
7651 LIST_INIT(&thub->tunnels);
7652 rte_spinlock_init(&thub->sl);
7653 thub->groups = mlx5_hlist_create("flow groups", MLX5_MAX_TABLES, 0,
7654 0, mlx5_flow_tunnel_grp2tbl_create_cb,
7656 mlx5_flow_tunnel_grp2tbl_remove_cb);
7657 if (!thub->groups) {
7661 thub->groups->ctx = sh;
7662 sh->tunnel_hub = thub;
7668 mlx5_hlist_destroy(thub->groups);
7674 #ifndef HAVE_MLX5DV_DR
7675 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
7677 #define MLX5_DOMAIN_SYNC_FLOW \
7678 (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
7681 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
7683 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
7684 const struct mlx5_flow_driver_ops *fops;
7686 struct rte_flow_attr attr = { .transfer = 0 };
7688 fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7689 ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);