drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rx.h"
  32 #include "mlx5_tx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              const struct mlx5_flow_tunnel *tunnel,
  54                              struct tunnel_default_miss_ctx *ctx,
  55                              struct rte_flow_error *error);
  56 static struct mlx5_flow_tunnel *
  57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  58 static void
  59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  60 static uint32_t
  61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  62                                 const struct mlx5_flow_tunnel *tunnel,
  63                                 uint32_t group, uint32_t *table,
  64                                 struct rte_flow_error *error);
  65
  66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  67 static void mlx5_flow_pop_thread_workspace(void);
  68
  69
  70 /** Device flow drivers. */
  71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  72
  73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  74
  75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  76         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  78         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  79 #endif
  80         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  81         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  82 };
  83
  84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  86         (const int []){ \
  87                 __VA_ARGS__, 0, \
  88         }
  89
  90 /** Node object of input graph for mlx5_flow_expand_rss(). */
  91 struct mlx5_flow_expand_node {
  92         const int *const next;
  93         /**<
  94          * List of next node indexes. Index 0 is interpreted as a terminator.
  95          */
  96         const enum rte_flow_item_type type;
  97         /**< Pattern item type of current node. */
  98         uint64_t rss_types;
  99         /**<
 100          * RSS types bit-field associated with this node
 101          * (see ETH_RSS_* definitions).
 102          */
 103         uint8_t optional;
 104         /**< optional expand field. Default 0 to expand, 1 not go deeper. */
 105 };
 106
 107 /** Object returned by mlx5_flow_expand_rss(). */
 108 struct mlx5_flow_expand_rss {
 109         uint32_t entries;
 110         /**< Number of entries @p patterns and @p priorities. */
 111         struct {
 112                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 113                 uint32_t priority; /**< Priority offset for each expansion. */
 114         } entry[];
 115 };
 116
 117 static void
 118 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
 119
 120 static bool
 121 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
 122 {
 123         switch (item->type) {
 124         case RTE_FLOW_ITEM_TYPE_ETH:
 125         case RTE_FLOW_ITEM_TYPE_VLAN:
 126         case RTE_FLOW_ITEM_TYPE_IPV4:
 127         case RTE_FLOW_ITEM_TYPE_IPV6:
 128         case RTE_FLOW_ITEM_TYPE_UDP:
 129         case RTE_FLOW_ITEM_TYPE_TCP:
 130         case RTE_FLOW_ITEM_TYPE_VXLAN:
 131         case RTE_FLOW_ITEM_TYPE_NVGRE:
 132         case RTE_FLOW_ITEM_TYPE_GRE:
 133         case RTE_FLOW_ITEM_TYPE_GENEVE:
 134         case RTE_FLOW_ITEM_TYPE_MPLS:
 135         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 136         case RTE_FLOW_ITEM_TYPE_GRE_KEY:
 137         case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
 138         case RTE_FLOW_ITEM_TYPE_GTP:
 139                 return true;
 140         default:
 141                 break;
 142         }
 143         return false;
 144 }
 145
 146 static enum rte_flow_item_type
 147 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 148 {
 149         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 150         uint16_t ether_type = 0;
 151         uint16_t ether_type_m;
 152         uint8_t ip_next_proto = 0;
 153         uint8_t ip_next_proto_m;
 154
 155         if (item == NULL || item->spec == NULL)
 156                 return ret;
 157         switch (item->type) {
 158         case RTE_FLOW_ITEM_TYPE_ETH:
 159                 if (item->mask)
 160                         ether_type_m = ((const struct rte_flow_item_eth *)
 161                                                 (item->mask))->type;
 162                 else
 163                         ether_type_m = rte_flow_item_eth_mask.type;
 164                 if (ether_type_m != RTE_BE16(0xFFFF))
 165                         break;
 166                 ether_type = ((const struct rte_flow_item_eth *)
 167                                 (item->spec))->type;
 168                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 169                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 170                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 171                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 172                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 173                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 174                 else
 175                         ret = RTE_FLOW_ITEM_TYPE_END;
 176                 break;
 177         case RTE_FLOW_ITEM_TYPE_VLAN:
 178                 if (item->mask)
 179                         ether_type_m = ((const struct rte_flow_item_vlan *)
 180                                                 (item->mask))->inner_type;
 181                 else
 182                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 183                 if (ether_type_m != RTE_BE16(0xFFFF))
 184                         break;
 185                 ether_type = ((const struct rte_flow_item_vlan *)
 186                                 (item->spec))->inner_type;
 187                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 188                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 189                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 190                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 191                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 192                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 193                 else
 194                         ret = RTE_FLOW_ITEM_TYPE_END;
 195                 break;
 196         case RTE_FLOW_ITEM_TYPE_IPV4:
 197                 if (item->mask)
 198                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 199                                         (item->mask))->hdr.next_proto_id;
 200                 else
 201                         ip_next_proto_m =
 202                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 203                 if (ip_next_proto_m != 0xFF)
 204                         break;
 205                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 206                                 (item->spec))->hdr.next_proto_id;
 207                 if (ip_next_proto == IPPROTO_UDP)
 208                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 209                 else if (ip_next_proto == IPPROTO_TCP)
 210                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 211                 else if (ip_next_proto == IPPROTO_IP)
 212                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 213                 else if (ip_next_proto == IPPROTO_IPV6)
 214                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 215                 else
 216                         ret = RTE_FLOW_ITEM_TYPE_END;
 217                 break;
 218         case RTE_FLOW_ITEM_TYPE_IPV6:
 219                 if (item->mask)
 220                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 221                                                 (item->mask))->hdr.proto;
 222                 else
 223                         ip_next_proto_m =
 224                                 rte_flow_item_ipv6_mask.hdr.proto;
 225                 if (ip_next_proto_m != 0xFF)
 226                         break;
 227                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 228                                 (item->spec))->hdr.proto;
 229                 if (ip_next_proto == IPPROTO_UDP)
 230                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 231                 else if (ip_next_proto == IPPROTO_TCP)
 232                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 233                 else if (ip_next_proto == IPPROTO_IP)
 234                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 235                 else if (ip_next_proto == IPPROTO_IPV6)
 236                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 237                 else
 238                         ret = RTE_FLOW_ITEM_TYPE_END;
 239                 break;
 240         default:
 241                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 242                 break;
 243         }
 244         return ret;
 245 }
 246
 247 #define MLX5_RSS_EXP_ELT_N 16
 248
 249 /**
 250  * Expand RSS flows into several possible flows according to the RSS hash
 251  * fields requested and the driver capabilities.
 252  *
 253  * @param[out] buf
 254  *   Buffer to store the result expansion.
 255  * @param[in] size
 256  *   Buffer size in bytes. If 0, @p buf can be NULL.
 257  * @param[in] pattern
 258  *   User flow pattern.
 259  * @param[in] types
 260  *   RSS types to expand (see ETH_RSS_* definitions).
 261  * @param[in] graph
 262  *   Input graph to expand @p pattern according to @p types.
 263  * @param[in] graph_root_index
 264  *   Index of root node in @p graph, typically 0.
 265  *
 266  * @return
 267  *   A positive value representing the size of @p buf in bytes regardless of
 268  *   @p size on success, a negative errno value otherwise and rte_errno is
 269  *   set, the following errors are defined:
 270  *
 271  *   -E2BIG: graph-depth @p graph is too deep.
 272  *   -EINVAL: @p size has not enough space for expanded pattern.
 273  */
 274 static int
 275 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 276                      const struct rte_flow_item *pattern, uint64_t types,
 277                      const struct mlx5_flow_expand_node graph[],
 278                      int graph_root_index)
 279 {
 280         const struct rte_flow_item *item;
 281         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 282         const int *next_node;
 283         const int *stack[MLX5_RSS_EXP_ELT_N];
 284         int stack_pos = 0;
 285         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 286         unsigned int i;
 287         size_t lsize;
 288         size_t user_pattern_size = 0;
 289         void *addr = NULL;
 290         const struct mlx5_flow_expand_node *next = NULL;
 291         struct rte_flow_item missed_item;
 292         int missed = 0;
 293         int elt = 0;
 294         const struct rte_flow_item *last_item = NULL;
 295
 296         memset(&missed_item, 0, sizeof(missed_item));
 297         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 298                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 299         if (lsize > size)
 300                 return -EINVAL;
 301         buf->entry[0].priority = 0;
 302         buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 303         buf->entries = 0;
 304         addr = buf->entry[0].pattern;
 305         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 306                 if (!mlx5_flow_is_rss_expandable_item(item)) {
 307                         user_pattern_size += sizeof(*item);
 308                         continue;
 309                 }
 310                 last_item = item;
 311                 for (i = 0; node->next && node->next[i]; ++i) {
 312                         next = &graph[node->next[i]];
 313                         if (next->type == item->type)
 314                                 break;
 315                 }
 316                 if (next)
 317                         node = next;
 318                 user_pattern_size += sizeof(*item);
 319         }
 320         user_pattern_size += sizeof(*item); /* Handle END item. */
 321         lsize += user_pattern_size;
 322         if (lsize > size)
 323                 return -EINVAL;
 324         /* Copy the user pattern in the first entry of the buffer. */
 325         rte_memcpy(addr, pattern, user_pattern_size);
 326         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 327         buf->entries = 1;
 328         /* Start expanding. */
 329         memset(flow_items, 0, sizeof(flow_items));
 330         user_pattern_size -= sizeof(*item);
 331         /*
 332          * Check if the last valid item has spec set, need complete pattern,
 333          * and the pattern can be used for expansion.
 334          */
 335         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 336         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 337                 /* Item type END indicates expansion is not required. */
 338                 return lsize;
 339         }
 340         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 341                 next = NULL;
 342                 missed = 1;
 343                 for (i = 0; node->next && node->next[i]; ++i) {
 344                         next = &graph[node->next[i]];
 345                         if (next->type == missed_item.type) {
 346                                 flow_items[0].type = missed_item.type;
 347                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 348                                 break;
 349                         }
 350                         next = NULL;
 351                 }
 352         }
 353         if (next && missed) {
 354                 elt = 2; /* missed item + item end. */
 355                 node = next;
 356                 lsize += elt * sizeof(*item) + user_pattern_size;
 357                 if (lsize > size)
 358                         return -EINVAL;
 359                 if (node->rss_types & types) {
 360                         buf->entry[buf->entries].priority = 1;
 361                         buf->entry[buf->entries].pattern = addr;
 362                         buf->entries++;
 363                         rte_memcpy(addr, buf->entry[0].pattern,
 364                                    user_pattern_size);
 365                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 366                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 367                         addr = (void *)(((uintptr_t)addr) +
 368                                         elt * sizeof(*item));
 369                 }
 370         }
 371         memset(flow_items, 0, sizeof(flow_items));
 372         next_node = node->next;
 373         stack[stack_pos] = next_node;
 374         node = next_node ? &graph[*next_node] : NULL;
 375         while (node) {
 376                 flow_items[stack_pos].type = node->type;
 377                 if (node->rss_types & types) {
 378                         size_t n;
 379                         /*
 380                          * compute the number of items to copy from the
 381                          * expansion and copy it.
 382                          * When the stack_pos is 0, there are 1 element in it,
 383                          * plus the addition END item.
 384                          */
 385                         elt = stack_pos + 2;
 386                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 387                         lsize += elt * sizeof(*item) + user_pattern_size;
 388                         if (lsize > size)
 389                                 return -EINVAL;
 390                         n = elt * sizeof(*item);
 391                         buf->entry[buf->entries].priority =
 392                                 stack_pos + 1 + missed;
 393                         buf->entry[buf->entries].pattern = addr;
 394                         buf->entries++;
 395                         rte_memcpy(addr, buf->entry[0].pattern,
 396                                    user_pattern_size);
 397                         addr = (void *)(((uintptr_t)addr) +
 398                                         user_pattern_size);
 399                         rte_memcpy(addr, &missed_item,
 400                                    missed * sizeof(*item));
 401                         addr = (void *)(((uintptr_t)addr) +
 402                                 missed * sizeof(*item));
 403                         rte_memcpy(addr, flow_items, n);
 404                         addr = (void *)(((uintptr_t)addr) + n);
 405                 }
 406                 /* Go deeper. */
 407                 if (!node->optional && node->next) {
 408                         next_node = node->next;
 409                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 410                                 rte_errno = E2BIG;
 411                                 return -rte_errno;
 412                         }
 413                         stack[stack_pos] = next_node;
 414                 } else if (*(next_node + 1)) {
 415                         /* Follow up with the next possibility. */
 416                         ++next_node;
 417                 } else {
 418                         /* Move to the next path. */
 419                         if (stack_pos)
 420                                 next_node = stack[--stack_pos];
 421                         next_node++;
 422                         stack[stack_pos] = next_node;
 423                 }
 424                 node = *next_node ? &graph[*next_node] : NULL;
 425         };
 426         return lsize;
 427 }
 428
 429 enum mlx5_expansion {
 430         MLX5_EXPANSION_ROOT,
 431         MLX5_EXPANSION_ROOT_OUTER,
 432         MLX5_EXPANSION_ROOT_ETH_VLAN,
 433         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 434         MLX5_EXPANSION_OUTER_ETH,
 435         MLX5_EXPANSION_OUTER_ETH_VLAN,
 436         MLX5_EXPANSION_OUTER_VLAN,
 437         MLX5_EXPANSION_OUTER_IPV4,
 438         MLX5_EXPANSION_OUTER_IPV4_UDP,
 439         MLX5_EXPANSION_OUTER_IPV4_TCP,
 440         MLX5_EXPANSION_OUTER_IPV6,
 441         MLX5_EXPANSION_OUTER_IPV6_UDP,
 442         MLX5_EXPANSION_OUTER_IPV6_TCP,
 443         MLX5_EXPANSION_VXLAN,
 444         MLX5_EXPANSION_VXLAN_GPE,
 445         MLX5_EXPANSION_GRE,
 446         MLX5_EXPANSION_NVGRE,
 447         MLX5_EXPANSION_GRE_KEY,
 448         MLX5_EXPANSION_MPLS,
 449         MLX5_EXPANSION_ETH,
 450         MLX5_EXPANSION_ETH_VLAN,
 451         MLX5_EXPANSION_VLAN,
 452         MLX5_EXPANSION_IPV4,
 453         MLX5_EXPANSION_IPV4_UDP,
 454         MLX5_EXPANSION_IPV4_TCP,
 455         MLX5_EXPANSION_IPV6,
 456         MLX5_EXPANSION_IPV6_UDP,
 457         MLX5_EXPANSION_IPV6_TCP,
 458         MLX5_EXPANSION_IPV6_FRAG_EXT,
 459         MLX5_EXPANSION_GTP
 460 };
 461
 462 /** Supported expansion of items. */
 463 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 464         [MLX5_EXPANSION_ROOT] = {
 465                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 466                                                   MLX5_EXPANSION_IPV4,
 467                                                   MLX5_EXPANSION_IPV6),
 468                 .type = RTE_FLOW_ITEM_TYPE_END,
 469         },
 470         [MLX5_EXPANSION_ROOT_OUTER] = {
 471                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 472                                                   MLX5_EXPANSION_OUTER_IPV4,
 473                                                   MLX5_EXPANSION_OUTER_IPV6),
 474                 .type = RTE_FLOW_ITEM_TYPE_END,
 475         },
 476         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 477                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 478                 .type = RTE_FLOW_ITEM_TYPE_END,
 479         },
 480         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 481                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 482                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 483                 .type = RTE_FLOW_ITEM_TYPE_END,
 484         },
 485         [MLX5_EXPANSION_OUTER_ETH] = {
 486                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 487                                                   MLX5_EXPANSION_OUTER_IPV6),
 488                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 489                 .rss_types = 0,
 490         },
 491         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 492                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 493                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 494                 .rss_types = 0,
 495         },
 496         [MLX5_EXPANSION_OUTER_VLAN] = {
 497                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 498                                                   MLX5_EXPANSION_OUTER_IPV6),
 499                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 500         },
 501         [MLX5_EXPANSION_OUTER_IPV4] = {
 502                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 503                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 504                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 505                          MLX5_EXPANSION_GRE,
 506                          MLX5_EXPANSION_NVGRE,
 507                          MLX5_EXPANSION_IPV4,
 508                          MLX5_EXPANSION_IPV6),
 509                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 510                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 511                         ETH_RSS_NONFRAG_IPV4_OTHER,
 512         },
 513         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 514                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 515                                                   MLX5_EXPANSION_VXLAN_GPE,
 516                                                   MLX5_EXPANSION_MPLS,
 517                                                   MLX5_EXPANSION_GTP),
 518                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 519                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 520         },
 521         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 522                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 523                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 524         },
 525         [MLX5_EXPANSION_OUTER_IPV6] = {
 526                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 527                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 528                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 529                          MLX5_EXPANSION_IPV4,
 530                          MLX5_EXPANSION_IPV6,
 531                          MLX5_EXPANSION_GRE,
 532                          MLX5_EXPANSION_NVGRE),
 533                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 534                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 535                         ETH_RSS_NONFRAG_IPV6_OTHER,
 536         },
 537         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 538                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 539                                                   MLX5_EXPANSION_VXLAN_GPE,
 540                                                   MLX5_EXPANSION_MPLS,
 541                                                   MLX5_EXPANSION_GTP),
 542                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 543                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 544         },
 545         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 546                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 547                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 548         },
 549         [MLX5_EXPANSION_VXLAN] = {
 550                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 551                                                   MLX5_EXPANSION_IPV4,
 552                                                   MLX5_EXPANSION_IPV6),
 553                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 554         },
 555         [MLX5_EXPANSION_VXLAN_GPE] = {
 556                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 557                                                   MLX5_EXPANSION_IPV4,
 558                                                   MLX5_EXPANSION_IPV6),
 559                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 560         },
 561         [MLX5_EXPANSION_GRE] = {
 562                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 563                                                   MLX5_EXPANSION_IPV6,
 564                                                   MLX5_EXPANSION_GRE_KEY,
 565                                                   MLX5_EXPANSION_MPLS),
 566                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 567         },
 568         [MLX5_EXPANSION_GRE_KEY] = {
 569                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 570                                                   MLX5_EXPANSION_IPV6,
 571                                                   MLX5_EXPANSION_MPLS),
 572                 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
 573                 .optional = 1,
 574         },
 575         [MLX5_EXPANSION_NVGRE] = {
 576                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 577                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
 578         },
 579         [MLX5_EXPANSION_MPLS] = {
 580                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 581                                                   MLX5_EXPANSION_IPV6,
 582                                                   MLX5_EXPANSION_ETH),
 583                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 584         },
 585         [MLX5_EXPANSION_ETH] = {
 586                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 587                                                   MLX5_EXPANSION_IPV6),
 588                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 589         },
 590         [MLX5_EXPANSION_ETH_VLAN] = {
 591                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 592                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 593         },
 594         [MLX5_EXPANSION_VLAN] = {
 595                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 596                                                   MLX5_EXPANSION_IPV6),
 597                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 598         },
 599         [MLX5_EXPANSION_IPV4] = {
 600                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 601                                                   MLX5_EXPANSION_IPV4_TCP),
 602                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 603                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 604                         ETH_RSS_NONFRAG_IPV4_OTHER,
 605         },
 606         [MLX5_EXPANSION_IPV4_UDP] = {
 607                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 608                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 609         },
 610         [MLX5_EXPANSION_IPV4_TCP] = {
 611                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 612                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 613         },
 614         [MLX5_EXPANSION_IPV6] = {
 615                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 616                                                   MLX5_EXPANSION_IPV6_TCP,
 617                                                   MLX5_EXPANSION_IPV6_FRAG_EXT),
 618                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 619                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 620                         ETH_RSS_NONFRAG_IPV6_OTHER,
 621         },
 622         [MLX5_EXPANSION_IPV6_UDP] = {
 623                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 624                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 625         },
 626         [MLX5_EXPANSION_IPV6_TCP] = {
 627                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 628                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 629         },
 630         [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
 631                 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
 632         },
 633         [MLX5_EXPANSION_GTP] = {
 634                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 635                                                           MLX5_EXPANSION_IPV6),
 636                         .type = RTE_FLOW_ITEM_TYPE_GTP
 637         }
 638 };
 639
 640 static struct rte_flow_action_handle *
 641 mlx5_action_handle_create(struct rte_eth_dev *dev,
 642                           const struct rte_flow_indir_action_conf *conf,
 643                           const struct rte_flow_action *action,
 644                           struct rte_flow_error *error);
 645 static int mlx5_action_handle_destroy
 646                                 (struct rte_eth_dev *dev,
 647                                  struct rte_flow_action_handle *handle,
 648                                  struct rte_flow_error *error);
 649 static int mlx5_action_handle_update
 650                                 (struct rte_eth_dev *dev,
 651                                  struct rte_flow_action_handle *handle,
 652                                  const void *update,
 653                                  struct rte_flow_error *error);
 654 static int mlx5_action_handle_query
 655                                 (struct rte_eth_dev *dev,
 656                                  const struct rte_flow_action_handle *handle,
 657                                  void *data,
 658                                  struct rte_flow_error *error);
 659 static int
 660 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 661                     struct rte_flow_tunnel *app_tunnel,
 662                     struct rte_flow_action **actions,
 663                     uint32_t *num_of_actions,
 664                     struct rte_flow_error *error);
 665 static int
 666 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 667                        struct rte_flow_tunnel *app_tunnel,
 668                        struct rte_flow_item **items,
 669                        uint32_t *num_of_items,
 670                        struct rte_flow_error *error);
 671 static int
 672 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 673                               struct rte_flow_item *pmd_items,
 674                               uint32_t num_items, struct rte_flow_error *err);
 675 static int
 676 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 677                                 struct rte_flow_action *pmd_actions,
 678                                 uint32_t num_actions,
 679                                 struct rte_flow_error *err);
 680 static int
 681 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 682                                   struct rte_mbuf *m,
 683                                   struct rte_flow_restore_info *info,
 684                                   struct rte_flow_error *err);
 685
 686 static const struct rte_flow_ops mlx5_flow_ops = {
 687         .validate = mlx5_flow_validate,
 688         .create = mlx5_flow_create,
 689         .destroy = mlx5_flow_destroy,
 690         .flush = mlx5_flow_flush,
 691         .isolate = mlx5_flow_isolate,
 692         .query = mlx5_flow_query,
 693         .dev_dump = mlx5_flow_dev_dump,
 694         .get_aged_flows = mlx5_flow_get_aged_flows,
 695         .action_handle_create = mlx5_action_handle_create,
 696         .action_handle_destroy = mlx5_action_handle_destroy,
 697         .action_handle_update = mlx5_action_handle_update,
 698         .action_handle_query = mlx5_action_handle_query,
 699         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 700         .tunnel_match = mlx5_flow_tunnel_match,
 701         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 702         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 703         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 704 };
 705
 706 /* Tunnel information. */
 707 struct mlx5_flow_tunnel_info {
 708         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 709         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 710 };
 711
 712 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 713         {
 714                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 715                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 716         },
 717         {
 718                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 719                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 720         },
 721         {
 722                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 723                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 724         },
 725         {
 726                 .tunnel = MLX5_FLOW_LAYER_GRE,
 727                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 728         },
 729         {
 730                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 731                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 732         },
 733         {
 734                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 735                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 736         },
 737         {
 738                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 739                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 740         },
 741         {
 742                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 743                 .ptype = RTE_PTYPE_TUNNEL_IP,
 744         },
 745         {
 746                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 747                 .ptype = RTE_PTYPE_TUNNEL_IP,
 748         },
 749         {
 750                 .tunnel = MLX5_FLOW_LAYER_GTP,
 751                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 752         },
 753 };
 754
 755
 756
 757 /**
 758  * Translate tag ID to register.
 759  *
 760  * @param[in] dev
 761  *   Pointer to the Ethernet device structure.
 762  * @param[in] feature
 763  *   The feature that request the register.
 764  * @param[in] id
 765  *   The request register ID.
 766  * @param[out] error
 767  *   Error description in case of any.
 768  *
 769  * @return
 770  *   The request register on success, a negative errno
 771  *   value otherwise and rte_errno is set.
 772  */
 773 int
 774 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 775                      enum mlx5_feature_name feature,
 776                      uint32_t id,
 777                      struct rte_flow_error *error)
 778 {
 779         struct mlx5_priv *priv = dev->data->dev_private;
 780         struct mlx5_dev_config *config = &priv->config;
 781         enum modify_reg start_reg;
 782         bool skip_mtr_reg = false;
 783
 784         switch (feature) {
 785         case MLX5_HAIRPIN_RX:
 786                 return REG_B;
 787         case MLX5_HAIRPIN_TX:
 788                 return REG_A;
 789         case MLX5_METADATA_RX:
 790                 switch (config->dv_xmeta_en) {
 791                 case MLX5_XMETA_MODE_LEGACY:
 792                         return REG_B;
 793                 case MLX5_XMETA_MODE_META16:
 794                         return REG_C_0;
 795                 case MLX5_XMETA_MODE_META32:
 796                         return REG_C_1;
 797                 }
 798                 break;
 799         case MLX5_METADATA_TX:
 800                 return REG_A;
 801         case MLX5_METADATA_FDB:
 802                 switch (config->dv_xmeta_en) {
 803                 case MLX5_XMETA_MODE_LEGACY:
 804                         return REG_NON;
 805                 case MLX5_XMETA_MODE_META16:
 806                         return REG_C_0;
 807                 case MLX5_XMETA_MODE_META32:
 808                         return REG_C_1;
 809                 }
 810                 break;
 811         case MLX5_FLOW_MARK:
 812                 switch (config->dv_xmeta_en) {
 813                 case MLX5_XMETA_MODE_LEGACY:
 814                         return REG_NON;
 815                 case MLX5_XMETA_MODE_META16:
 816                         return REG_C_1;
 817                 case MLX5_XMETA_MODE_META32:
 818                         return REG_C_0;
 819                 }
 820                 break;
 821         case MLX5_MTR_ID:
 822                 /*
 823                  * If meter color and meter id share one register, flow match
 824                  * should use the meter color register for match.
 825                  */
 826                 if (priv->mtr_reg_share)
 827                         return priv->mtr_color_reg;
 828                 else
 829                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 830                                REG_C_3;
 831         case MLX5_MTR_COLOR:
 832         case MLX5_ASO_FLOW_HIT:
 833         case MLX5_ASO_CONNTRACK:
 834                 /* All features use the same REG_C. */
 835                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 836                 return priv->mtr_color_reg;
 837         case MLX5_COPY_MARK:
 838                 /*
 839                  * Metadata COPY_MARK register using is in meter suffix sub
 840                  * flow while with meter. It's safe to share the same register.
 841                  */
 842                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 843         case MLX5_APP_TAG:
 844                 /*
 845                  * If meter is enable, it will engage the register for color
 846                  * match and flow match. If meter color match is not using the
 847                  * REG_C_2, need to skip the REG_C_x be used by meter color
 848                  * match.
 849                  * If meter is disable, free to use all available registers.
 850                  */
 851                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 852                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 853                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 854                 if (id > (uint32_t)(REG_C_7 - start_reg))
 855                         return rte_flow_error_set(error, EINVAL,
 856                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 857                                                   NULL, "invalid tag id");
 858                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 859                         return rte_flow_error_set(error, ENOTSUP,
 860                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 861                                                   NULL, "unsupported tag id");
 862                 /*
 863                  * This case means meter is using the REG_C_x great than 2.
 864                  * Take care not to conflict with meter color REG_C_x.
 865                  * If the available index REG_C_y >= REG_C_x, skip the
 866                  * color register.
 867                  */
 868                 if (skip_mtr_reg && config->flow_mreg_c
 869                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 870                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 871                                 return rte_flow_error_set(error, EINVAL,
 872                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 873                                                         NULL, "invalid tag id");
 874                         if (config->flow_mreg_c
 875                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 876                                 return config->flow_mreg_c
 877                                                [id + 1 + start_reg - REG_C_0];
 878                         return rte_flow_error_set(error, ENOTSUP,
 879                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 880                                                   NULL, "unsupported tag id");
 881                 }
 882                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 883         }
 884         MLX5_ASSERT(false);
 885         return rte_flow_error_set(error, EINVAL,
 886                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 887                                   NULL, "invalid feature name");
 888 }
 889
 890 /**
 891  * Check extensive flow metadata register support.
 892  *
 893  * @param dev
 894  *   Pointer to rte_eth_dev structure.
 895  *
 896  * @return
 897  *   True if device supports extensive flow metadata register, otherwise false.
 898  */
 899 bool
 900 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 901 {
 902         struct mlx5_priv *priv = dev->data->dev_private;
 903         struct mlx5_dev_config *config = &priv->config;
 904
 905         /*
 906          * Having available reg_c can be regarded inclusively as supporting
 907          * extensive flow metadata register, which could mean,
 908          * - metadata register copy action by modify header.
 909          * - 16 modify header actions is supported.
 910          * - reg_c's are preserved across different domain (FDB and NIC) on
 911          *   packet loopback by flow lookup miss.
 912          */
 913         return config->flow_mreg_c[2] != REG_NON;
 914 }
 915
 916 /**
 917  * Get the lowest priority.
 918  *
 919  * @param[in] dev
 920  *   Pointer to the Ethernet device structure.
 921  * @param[in] attributes
 922  *   Pointer to device flow rule attributes.
 923  *
 924  * @return
 925  *   The value of lowest priority of flow.
 926  */
 927 uint32_t
 928 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 929                           const struct rte_flow_attr *attr)
 930 {
 931         struct mlx5_priv *priv = dev->data->dev_private;
 932
 933         if (!attr->group && !attr->transfer)
 934                 return priv->config.flow_prio - 2;
 935         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
 936 }
 937
 938 /**
 939  * Calculate matcher priority of the flow.
 940  *
 941  * @param[in] dev
 942  *   Pointer to the Ethernet device structure.
 943  * @param[in] attr
 944  *   Pointer to device flow rule attributes.
 945  * @param[in] subpriority
 946  *   The priority based on the items.
 947  * @return
 948  *   The matcher priority of the flow.
 949  */
 950 uint16_t
 951 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 952                           const struct rte_flow_attr *attr,
 953                           uint32_t subpriority)
 954 {
 955         uint16_t priority = (uint16_t)attr->priority;
 956         struct mlx5_priv *priv = dev->data->dev_private;
 957
 958         if (!attr->group && !attr->transfer) {
 959                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 960                         priority = priv->config.flow_prio - 1;
 961                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
 962         }
 963         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 964                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
 965         return priority * 3 + subpriority;
 966 }
 967
 968 /**
 969  * Verify the @p item specifications (spec, last, mask) are compatible with the
 970  * NIC capabilities.
 971  *
 972  * @param[in] item
 973  *   Item specification.
 974  * @param[in] mask
 975  *   @p item->mask or flow default bit-masks.
 976  * @param[in] nic_mask
 977  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 978  * @param[in] size
 979  *   Bit-masks size in bytes.
 980  * @param[in] range_accepted
 981  *   True if range of values is accepted for specific fields, false otherwise.
 982  * @param[out] error
 983  *   Pointer to error structure.
 984  *
 985  * @return
 986  *   0 on success, a negative errno value otherwise and rte_errno is set.
 987  */
 988 int
 989 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 990                           const uint8_t *mask,
 991                           const uint8_t *nic_mask,
 992                           unsigned int size,
 993                           bool range_accepted,
 994                           struct rte_flow_error *error)
 995 {
 996         unsigned int i;
 997
 998         MLX5_ASSERT(nic_mask);
 999         for (i = 0; i < size; ++i)
1000                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1001                         return rte_flow_error_set(error, ENOTSUP,
1002                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1003                                                   item,
1004                                                   "mask enables non supported"
1005                                                   " bits");
1006         if (!item->spec && (item->mask || item->last))
1007                 return rte_flow_error_set(error, EINVAL,
1008                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1009                                           "mask/last without a spec is not"
1010                                           " supported");
1011         if (item->spec && item->last && !range_accepted) {
1012                 uint8_t spec[size];
1013                 uint8_t last[size];
1014                 unsigned int i;
1015                 int ret;
1016
1017                 for (i = 0; i < size; ++i) {
1018                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1019                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1020                 }
1021                 ret = memcmp(spec, last, size);
1022                 if (ret != 0)
1023                         return rte_flow_error_set(error, EINVAL,
1024                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1025                                                   item,
1026                                                   "range is not valid");
1027         }
1028         return 0;
1029 }
1030
1031 /**
1032  * Adjust the hash fields according to the @p flow information.
1033  *
1034  * @param[in] dev_flow.
1035  *   Pointer to the mlx5_flow.
1036  * @param[in] tunnel
1037  *   1 when the hash field is for a tunnel item.
1038  * @param[in] layer_types
1039  *   ETH_RSS_* types.
1040  * @param[in] hash_fields
1041  *   Item hash fields.
1042  *
1043  * @return
1044  *   The hash fields that should be used.
1045  */
1046 uint64_t
1047 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1048                             int tunnel __rte_unused, uint64_t layer_types,
1049                             uint64_t hash_fields)
1050 {
1051 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1052         int rss_request_inner = rss_desc->level >= 2;
1053
1054         /* Check RSS hash level for tunnel. */
1055         if (tunnel && rss_request_inner)
1056                 hash_fields |= IBV_RX_HASH_INNER;
1057         else if (tunnel || rss_request_inner)
1058                 return 0;
1059 #endif
1060         /* Check if requested layer matches RSS hash fields. */
1061         if (!(rss_desc->types & layer_types))
1062                 return 0;
1063         return hash_fields;
1064 }
1065
1066 /**
1067  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1068  * if several tunnel rules are used on this queue, the tunnel ptype will be
1069  * cleared.
1070  *
1071  * @param rxq_ctrl
1072  *   Rx queue to update.
1073  */
1074 static void
1075 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1076 {
1077         unsigned int i;
1078         uint32_t tunnel_ptype = 0;
1079
1080         /* Look up for the ptype to use. */
1081         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1082                 if (!rxq_ctrl->flow_tunnels_n[i])
1083                         continue;
1084                 if (!tunnel_ptype) {
1085                         tunnel_ptype = tunnels_info[i].ptype;
1086                 } else {
1087                         tunnel_ptype = 0;
1088                         break;
1089                 }
1090         }
1091         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1092 }
1093
1094 /**
1095  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1096  * flow.
1097  *
1098  * @param[in] dev
1099  *   Pointer to the Ethernet device structure.
1100  * @param[in] dev_handle
1101  *   Pointer to device flow handle structure.
1102  */
1103 void
1104 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1105                        struct mlx5_flow_handle *dev_handle)
1106 {
1107         struct mlx5_priv *priv = dev->data->dev_private;
1108         const int mark = dev_handle->mark;
1109         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1110         struct mlx5_ind_table_obj *ind_tbl = NULL;
1111         unsigned int i;
1112
1113         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1114                 struct mlx5_hrxq *hrxq;
1115
1116                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1117                               dev_handle->rix_hrxq);
1118                 if (hrxq)
1119                         ind_tbl = hrxq->ind_table;
1120         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1121                 struct mlx5_shared_action_rss *shared_rss;
1122
1123                 shared_rss = mlx5_ipool_get
1124                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1125                          dev_handle->rix_srss);
1126                 if (shared_rss)
1127                         ind_tbl = shared_rss->ind_tbl;
1128         }
1129         if (!ind_tbl)
1130                 return;
1131         for (i = 0; i != ind_tbl->queues_n; ++i) {
1132                 int idx = ind_tbl->queues[i];
1133                 struct mlx5_rxq_ctrl *rxq_ctrl =
1134                         container_of((*priv->rxqs)[idx],
1135                                      struct mlx5_rxq_ctrl, rxq);
1136
1137                 /*
1138                  * To support metadata register copy on Tx loopback,
1139                  * this must be always enabled (metadata may arive
1140                  * from other port - not from local flows only.
1141                  */
1142                 if (priv->config.dv_flow_en &&
1143                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1144                     mlx5_flow_ext_mreg_supported(dev)) {
1145                         rxq_ctrl->rxq.mark = 1;
1146                         rxq_ctrl->flow_mark_n = 1;
1147                 } else if (mark) {
1148                         rxq_ctrl->rxq.mark = 1;
1149                         rxq_ctrl->flow_mark_n++;
1150                 }
1151                 if (tunnel) {
1152                         unsigned int j;
1153
1154                         /* Increase the counter matching the flow. */
1155                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1156                                 if ((tunnels_info[j].tunnel &
1157                                      dev_handle->layers) ==
1158                                     tunnels_info[j].tunnel) {
1159                                         rxq_ctrl->flow_tunnels_n[j]++;
1160                                         break;
1161                                 }
1162                         }
1163                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1164                 }
1165         }
1166 }
1167
1168 /**
1169  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1170  *
1171  * @param[in] dev
1172  *   Pointer to the Ethernet device structure.
1173  * @param[in] flow
1174  *   Pointer to flow structure.
1175  */
1176 static void
1177 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1178 {
1179         struct mlx5_priv *priv = dev->data->dev_private;
1180         uint32_t handle_idx;
1181         struct mlx5_flow_handle *dev_handle;
1182
1183         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1184                        handle_idx, dev_handle, next)
1185                 flow_drv_rxq_flags_set(dev, dev_handle);
1186 }
1187
1188 /**
1189  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1190  * device flow if no other flow uses it with the same kind of request.
1191  *
1192  * @param dev
1193  *   Pointer to Ethernet device.
1194  * @param[in] dev_handle
1195  *   Pointer to the device flow handle structure.
1196  */
1197 static void
1198 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1199                         struct mlx5_flow_handle *dev_handle)
1200 {
1201         struct mlx5_priv *priv = dev->data->dev_private;
1202         const int mark = dev_handle->mark;
1203         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1204         struct mlx5_ind_table_obj *ind_tbl = NULL;
1205         unsigned int i;
1206
1207         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1208                 struct mlx5_hrxq *hrxq;
1209
1210                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1211                               dev_handle->rix_hrxq);
1212                 if (hrxq)
1213                         ind_tbl = hrxq->ind_table;
1214         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1215                 struct mlx5_shared_action_rss *shared_rss;
1216
1217                 shared_rss = mlx5_ipool_get
1218                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1219                          dev_handle->rix_srss);
1220                 if (shared_rss)
1221                         ind_tbl = shared_rss->ind_tbl;
1222         }
1223         if (!ind_tbl)
1224                 return;
1225         MLX5_ASSERT(dev->data->dev_started);
1226         for (i = 0; i != ind_tbl->queues_n; ++i) {
1227                 int idx = ind_tbl->queues[i];
1228                 struct mlx5_rxq_ctrl *rxq_ctrl =
1229                         container_of((*priv->rxqs)[idx],
1230                                      struct mlx5_rxq_ctrl, rxq);
1231
1232                 if (priv->config.dv_flow_en &&
1233                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1234                     mlx5_flow_ext_mreg_supported(dev)) {
1235                         rxq_ctrl->rxq.mark = 1;
1236                         rxq_ctrl->flow_mark_n = 1;
1237                 } else if (mark) {
1238                         rxq_ctrl->flow_mark_n--;
1239                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1240                 }
1241                 if (tunnel) {
1242                         unsigned int j;
1243
1244                         /* Decrease the counter matching the flow. */
1245                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1246                                 if ((tunnels_info[j].tunnel &
1247                                      dev_handle->layers) ==
1248                                     tunnels_info[j].tunnel) {
1249                                         rxq_ctrl->flow_tunnels_n[j]--;
1250                                         break;
1251                                 }
1252                         }
1253                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1254                 }
1255         }
1256 }
1257
1258 /**
1259  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1260  * @p flow if no other flow uses it with the same kind of request.
1261  *
1262  * @param dev
1263  *   Pointer to Ethernet device.
1264  * @param[in] flow
1265  *   Pointer to the flow.
1266  */
1267 static void
1268 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1269 {
1270         struct mlx5_priv *priv = dev->data->dev_private;
1271         uint32_t handle_idx;
1272         struct mlx5_flow_handle *dev_handle;
1273
1274         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1275                        handle_idx, dev_handle, next)
1276                 flow_drv_rxq_flags_trim(dev, dev_handle);
1277 }
1278
1279 /**
1280  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1281  *
1282  * @param dev
1283  *   Pointer to Ethernet device.
1284  */
1285 static void
1286 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1287 {
1288         struct mlx5_priv *priv = dev->data->dev_private;
1289         unsigned int i;
1290
1291         for (i = 0; i != priv->rxqs_n; ++i) {
1292                 struct mlx5_rxq_ctrl *rxq_ctrl;
1293                 unsigned int j;
1294
1295                 if (!(*priv->rxqs)[i])
1296                         continue;
1297                 rxq_ctrl = container_of((*priv->rxqs)[i],
1298                                         struct mlx5_rxq_ctrl, rxq);
1299                 rxq_ctrl->flow_mark_n = 0;
1300                 rxq_ctrl->rxq.mark = 0;
1301                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1302                         rxq_ctrl->flow_tunnels_n[j] = 0;
1303                 rxq_ctrl->rxq.tunnel = 0;
1304         }
1305 }
1306
1307 /**
1308  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1309  *
1310  * @param[in] dev
1311  *   Pointer to the Ethernet device structure.
1312  */
1313 void
1314 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1315 {
1316         struct mlx5_priv *priv = dev->data->dev_private;
1317         struct mlx5_rxq_data *data;
1318         unsigned int i;
1319
1320         for (i = 0; i != priv->rxqs_n; ++i) {
1321                 if (!(*priv->rxqs)[i])
1322                         continue;
1323                 data = (*priv->rxqs)[i];
1324                 if (!rte_flow_dynf_metadata_avail()) {
1325                         data->dynf_meta = 0;
1326                         data->flow_meta_mask = 0;
1327                         data->flow_meta_offset = -1;
1328                         data->flow_meta_port_mask = 0;
1329                 } else {
1330                         data->dynf_meta = 1;
1331                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1332                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1333                         data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1334                 }
1335         }
1336 }
1337
1338 /*
1339  * return a pointer to the desired action in the list of actions.
1340  *
1341  * @param[in] actions
1342  *   The list of actions to search the action in.
1343  * @param[in] action
1344  *   The action to find.
1345  *
1346  * @return
1347  *   Pointer to the action in the list, if found. NULL otherwise.
1348  */
1349 const struct rte_flow_action *
1350 mlx5_flow_find_action(const struct rte_flow_action *actions,
1351                       enum rte_flow_action_type action)
1352 {
1353         if (actions == NULL)
1354                 return NULL;
1355         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1356                 if (actions->type == action)
1357                         return actions;
1358         return NULL;
1359 }
1360
1361 /*
1362  * Validate the flag action.
1363  *
1364  * @param[in] action_flags
1365  *   Bit-fields that holds the actions detected until now.
1366  * @param[in] attr
1367  *   Attributes of flow that includes this action.
1368  * @param[out] error
1369  *   Pointer to error structure.
1370  *
1371  * @return
1372  *   0 on success, a negative errno value otherwise and rte_errno is set.
1373  */
1374 int
1375 mlx5_flow_validate_action_flag(uint64_t action_flags,
1376                                const struct rte_flow_attr *attr,
1377                                struct rte_flow_error *error)
1378 {
1379         if (action_flags & MLX5_FLOW_ACTION_MARK)
1380                 return rte_flow_error_set(error, EINVAL,
1381                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1382                                           "can't mark and flag in same flow");
1383         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1384                 return rte_flow_error_set(error, EINVAL,
1385                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1386                                           "can't have 2 flag"
1387                                           " actions in same flow");
1388         if (attr->egress)
1389                 return rte_flow_error_set(error, ENOTSUP,
1390                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1391                                           "flag action not supported for "
1392                                           "egress");
1393         return 0;
1394 }
1395
1396 /*
1397  * Validate the mark action.
1398  *
1399  * @param[in] action
1400  *   Pointer to the queue action.
1401  * @param[in] action_flags
1402  *   Bit-fields that holds the actions detected until now.
1403  * @param[in] attr
1404  *   Attributes of flow that includes this action.
1405  * @param[out] error
1406  *   Pointer to error structure.
1407  *
1408  * @return
1409  *   0 on success, a negative errno value otherwise and rte_errno is set.
1410  */
1411 int
1412 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1413                                uint64_t action_flags,
1414                                const struct rte_flow_attr *attr,
1415                                struct rte_flow_error *error)
1416 {
1417         const struct rte_flow_action_mark *mark = action->conf;
1418
1419         if (!mark)
1420                 return rte_flow_error_set(error, EINVAL,
1421                                           RTE_FLOW_ERROR_TYPE_ACTION,
1422                                           action,
1423                                           "configuration cannot be null");
1424         if (mark->id >= MLX5_FLOW_MARK_MAX)
1425                 return rte_flow_error_set(error, EINVAL,
1426                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1427                                           &mark->id,
1428                                           "mark id must in 0 <= id < "
1429                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1430         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1431                 return rte_flow_error_set(error, EINVAL,
1432                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1433                                           "can't flag and mark in same flow");
1434         if (action_flags & MLX5_FLOW_ACTION_MARK)
1435                 return rte_flow_error_set(error, EINVAL,
1436                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1437                                           "can't have 2 mark actions in same"
1438                                           " flow");
1439         if (attr->egress)
1440                 return rte_flow_error_set(error, ENOTSUP,
1441                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1442                                           "mark action not supported for "
1443                                           "egress");
1444         return 0;
1445 }
1446
1447 /*
1448  * Validate the drop action.
1449  *
1450  * @param[in] action_flags
1451  *   Bit-fields that holds the actions detected until now.
1452  * @param[in] attr
1453  *   Attributes of flow that includes this action.
1454  * @param[out] error
1455  *   Pointer to error structure.
1456  *
1457  * @return
1458  *   0 on success, a negative errno value otherwise and rte_errno is set.
1459  */
1460 int
1461 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1462                                const struct rte_flow_attr *attr,
1463                                struct rte_flow_error *error)
1464 {
1465         if (attr->egress)
1466                 return rte_flow_error_set(error, ENOTSUP,
1467                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1468                                           "drop action not supported for "
1469                                           "egress");
1470         return 0;
1471 }
1472
1473 /*
1474  * Validate the queue action.
1475  *
1476  * @param[in] action
1477  *   Pointer to the queue action.
1478  * @param[in] action_flags
1479  *   Bit-fields that holds the actions detected until now.
1480  * @param[in] dev
1481  *   Pointer to the Ethernet device structure.
1482  * @param[in] attr
1483  *   Attributes of flow that includes this action.
1484  * @param[out] error
1485  *   Pointer to error structure.
1486  *
1487  * @return
1488  *   0 on success, a negative errno value otherwise and rte_errno is set.
1489  */
1490 int
1491 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1492                                 uint64_t action_flags,
1493                                 struct rte_eth_dev *dev,
1494                                 const struct rte_flow_attr *attr,
1495                                 struct rte_flow_error *error)
1496 {
1497         struct mlx5_priv *priv = dev->data->dev_private;
1498         const struct rte_flow_action_queue *queue = action->conf;
1499
1500         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1501                 return rte_flow_error_set(error, EINVAL,
1502                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1503                                           "can't have 2 fate actions in"
1504                                           " same flow");
1505         if (!priv->rxqs_n)
1506                 return rte_flow_error_set(error, EINVAL,
1507                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1508                                           NULL, "No Rx queues configured");
1509         if (queue->index >= priv->rxqs_n)
1510                 return rte_flow_error_set(error, EINVAL,
1511                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1512                                           &queue->index,
1513                                           "queue index out of range");
1514         if (!(*priv->rxqs)[queue->index])
1515                 return rte_flow_error_set(error, EINVAL,
1516                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1517                                           &queue->index,
1518                                           "queue is not configured");
1519         if (attr->egress)
1520                 return rte_flow_error_set(error, ENOTSUP,
1521                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1522                                           "queue action not supported for "
1523                                           "egress");
1524         return 0;
1525 }
1526
1527 /*
1528  * Validate the rss action.
1529  *
1530  * @param[in] dev
1531  *   Pointer to the Ethernet device structure.
1532  * @param[in] action
1533  *   Pointer to the queue action.
1534  * @param[out] error
1535  *   Pointer to error structure.
1536  *
1537  * @return
1538  *   0 on success, a negative errno value otherwise and rte_errno is set.
1539  */
1540 int
1541 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1542                          const struct rte_flow_action *action,
1543                          struct rte_flow_error *error)
1544 {
1545         struct mlx5_priv *priv = dev->data->dev_private;
1546         const struct rte_flow_action_rss *rss = action->conf;
1547         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1548         unsigned int i;
1549
1550         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1551             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1552                 return rte_flow_error_set(error, ENOTSUP,
1553                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1554                                           &rss->func,
1555                                           "RSS hash function not supported");
1556 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1557         if (rss->level > 2)
1558 #else
1559         if (rss->level > 1)
1560 #endif
1561                 return rte_flow_error_set(error, ENOTSUP,
1562                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1563                                           &rss->level,
1564                                           "tunnel RSS is not supported");
1565         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1566         if (rss->key_len == 0 && rss->key != NULL)
1567                 return rte_flow_error_set(error, ENOTSUP,
1568                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1569                                           &rss->key_len,
1570                                           "RSS hash key length 0");
1571         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1572                 return rte_flow_error_set(error, ENOTSUP,
1573                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1574                                           &rss->key_len,
1575                                           "RSS hash key too small");
1576         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1577                 return rte_flow_error_set(error, ENOTSUP,
1578                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1579                                           &rss->key_len,
1580                                           "RSS hash key too large");
1581         if (rss->queue_num > priv->config.ind_table_max_size)
1582                 return rte_flow_error_set(error, ENOTSUP,
1583                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1584                                           &rss->queue_num,
1585                                           "number of queues too large");
1586         if (rss->types & MLX5_RSS_HF_MASK)
1587                 return rte_flow_error_set(error, ENOTSUP,
1588                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1589                                           &rss->types,
1590                                           "some RSS protocols are not"
1591                                           " supported");
1592         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1593             !(rss->types & ETH_RSS_IP))
1594                 return rte_flow_error_set(error, EINVAL,
1595                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1596                                           "L3 partial RSS requested but L3 RSS"
1597                                           " type not specified");
1598         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1599             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1600                 return rte_flow_error_set(error, EINVAL,
1601                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1602                                           "L4 partial RSS requested but L4 RSS"
1603                                           " type not specified");
1604         if (!priv->rxqs_n)
1605                 return rte_flow_error_set(error, EINVAL,
1606                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1607                                           NULL, "No Rx queues configured");
1608         if (!rss->queue_num)
1609                 return rte_flow_error_set(error, EINVAL,
1610                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1611                                           NULL, "No queues configured");
1612         for (i = 0; i != rss->queue_num; ++i) {
1613                 struct mlx5_rxq_ctrl *rxq_ctrl;
1614
1615                 if (rss->queue[i] >= priv->rxqs_n)
1616                         return rte_flow_error_set
1617                                 (error, EINVAL,
1618                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1619                                  &rss->queue[i], "queue index out of range");
1620                 if (!(*priv->rxqs)[rss->queue[i]])
1621                         return rte_flow_error_set
1622                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1623                                  &rss->queue[i], "queue is not configured");
1624                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1625                                         struct mlx5_rxq_ctrl, rxq);
1626                 if (i == 0)
1627                         rxq_type = rxq_ctrl->type;
1628                 if (rxq_type != rxq_ctrl->type)
1629                         return rte_flow_error_set
1630                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1631                                  &rss->queue[i],
1632                                  "combining hairpin and regular RSS queues is not supported");
1633         }
1634         return 0;
1635 }
1636
1637 /*
1638  * Validate the rss action.
1639  *
1640  * @param[in] action
1641  *   Pointer to the queue action.
1642  * @param[in] action_flags
1643  *   Bit-fields that holds the actions detected until now.
1644  * @param[in] dev
1645  *   Pointer to the Ethernet device structure.
1646  * @param[in] attr
1647  *   Attributes of flow that includes this action.
1648  * @param[in] item_flags
1649  *   Items that were detected.
1650  * @param[out] error
1651  *   Pointer to error structure.
1652  *
1653  * @return
1654  *   0 on success, a negative errno value otherwise and rte_errno is set.
1655  */
1656 int
1657 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1658                               uint64_t action_flags,
1659                               struct rte_eth_dev *dev,
1660                               const struct rte_flow_attr *attr,
1661                               uint64_t item_flags,
1662                               struct rte_flow_error *error)
1663 {
1664         const struct rte_flow_action_rss *rss = action->conf;
1665         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1666         int ret;
1667
1668         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1669                 return rte_flow_error_set(error, EINVAL,
1670                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1671                                           "can't have 2 fate actions"
1672                                           " in same flow");
1673         ret = mlx5_validate_action_rss(dev, action, error);
1674         if (ret)
1675                 return ret;
1676         if (attr->egress)
1677                 return rte_flow_error_set(error, ENOTSUP,
1678                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1679                                           "rss action not supported for "
1680                                           "egress");
1681         if (rss->level > 1 && !tunnel)
1682                 return rte_flow_error_set(error, EINVAL,
1683                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1684                                           "inner RSS is not supported for "
1685                                           "non-tunnel flows");
1686         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1687             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1688                 return rte_flow_error_set(error, EINVAL,
1689                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1690                                           "RSS on eCPRI is not supported now");
1691         }
1692         if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1693             !(item_flags &
1694               (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1695             rss->level > 1)
1696                 return rte_flow_error_set(error, EINVAL,
1697                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1698                                           "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1699         return 0;
1700 }
1701
1702 /*
1703  * Validate the default miss action.
1704  *
1705  * @param[in] action_flags
1706  *   Bit-fields that holds the actions detected until now.
1707  * @param[out] error
1708  *   Pointer to error structure.
1709  *
1710  * @return
1711  *   0 on success, a negative errno value otherwise and rte_errno is set.
1712  */
1713 int
1714 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1715                                 const struct rte_flow_attr *attr,
1716                                 struct rte_flow_error *error)
1717 {
1718         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1719                 return rte_flow_error_set(error, EINVAL,
1720                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1721                                           "can't have 2 fate actions in"
1722                                           " same flow");
1723         if (attr->egress)
1724                 return rte_flow_error_set(error, ENOTSUP,
1725                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1726                                           "default miss action not supported "
1727                                           "for egress");
1728         if (attr->group)
1729                 return rte_flow_error_set(error, ENOTSUP,
1730                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1731                                           "only group 0 is supported");
1732         if (attr->transfer)
1733                 return rte_flow_error_set(error, ENOTSUP,
1734                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1735                                           NULL, "transfer is not supported");
1736         return 0;
1737 }
1738
1739 /*
1740  * Validate the count action.
1741  *
1742  * @param[in] dev
1743  *   Pointer to the Ethernet device structure.
1744  * @param[in] attr
1745  *   Attributes of flow that includes this action.
1746  * @param[out] error
1747  *   Pointer to error structure.
1748  *
1749  * @return
1750  *   0 on success, a negative errno value otherwise and rte_errno is set.
1751  */
1752 int
1753 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1754                                 const struct rte_flow_attr *attr,
1755                                 struct rte_flow_error *error)
1756 {
1757         if (attr->egress)
1758                 return rte_flow_error_set(error, ENOTSUP,
1759                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1760                                           "count action not supported for "
1761                                           "egress");
1762         return 0;
1763 }
1764
1765 /*
1766  * Validate the ASO CT action.
1767  *
1768  * @param[in] dev
1769  *   Pointer to the Ethernet device structure.
1770  * @param[in] conntrack
1771  *   Pointer to the CT action profile.
1772  * @param[out] error
1773  *   Pointer to error structure.
1774  *
1775  * @return
1776  *   0 on success, a negative errno value otherwise and rte_errno is set.
1777  */
1778 int
1779 mlx5_validate_action_ct(struct rte_eth_dev *dev,
1780                         const struct rte_flow_action_conntrack *conntrack,
1781                         struct rte_flow_error *error)
1782 {
1783         RTE_SET_USED(dev);
1784
1785         if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
1786                 return rte_flow_error_set(error, EINVAL,
1787                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1788                                           "Invalid CT state");
1789         if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
1790                 return rte_flow_error_set(error, EINVAL,
1791                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1792                                           "Invalid last TCP packet flag");
1793         return 0;
1794 }
1795
1796 /**
1797  * Verify the @p attributes will be correctly understood by the NIC and store
1798  * them in the @p flow if everything is correct.
1799  *
1800  * @param[in] dev
1801  *   Pointer to the Ethernet device structure.
1802  * @param[in] attributes
1803  *   Pointer to flow attributes
1804  * @param[out] error
1805  *   Pointer to error structure.
1806  *
1807  * @return
1808  *   0 on success, a negative errno value otherwise and rte_errno is set.
1809  */
1810 int
1811 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1812                               const struct rte_flow_attr *attributes,
1813                               struct rte_flow_error *error)
1814 {
1815         struct mlx5_priv *priv = dev->data->dev_private;
1816         uint32_t priority_max = priv->config.flow_prio - 1;
1817
1818         if (attributes->group)
1819                 return rte_flow_error_set(error, ENOTSUP,
1820                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1821                                           NULL, "groups is not supported");
1822         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1823             attributes->priority >= priority_max)
1824                 return rte_flow_error_set(error, ENOTSUP,
1825                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1826                                           NULL, "priority out of range");
1827         if (attributes->egress)
1828                 return rte_flow_error_set(error, ENOTSUP,
1829                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1830                                           "egress is not supported");
1831         if (attributes->transfer && !priv->config.dv_esw_en)
1832                 return rte_flow_error_set(error, ENOTSUP,
1833                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1834                                           NULL, "transfer is not supported");
1835         if (!attributes->ingress)
1836                 return rte_flow_error_set(error, EINVAL,
1837                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1838                                           NULL,
1839                                           "ingress attribute is mandatory");
1840         return 0;
1841 }
1842
1843 /**
1844  * Validate ICMP6 item.
1845  *
1846  * @param[in] item
1847  *   Item specification.
1848  * @param[in] item_flags
1849  *   Bit-fields that holds the items detected until now.
1850  * @param[in] ext_vlan_sup
1851  *   Whether extended VLAN features are supported or not.
1852  * @param[out] error
1853  *   Pointer to error structure.
1854  *
1855  * @return
1856  *   0 on success, a negative errno value otherwise and rte_errno is set.
1857  */
1858 int
1859 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1860                                uint64_t item_flags,
1861                                uint8_t target_protocol,
1862                                struct rte_flow_error *error)
1863 {
1864         const struct rte_flow_item_icmp6 *mask = item->mask;
1865         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1866         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1867                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1868         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1869                                       MLX5_FLOW_LAYER_OUTER_L4;
1870         int ret;
1871
1872         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1873                 return rte_flow_error_set(error, EINVAL,
1874                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1875                                           "protocol filtering not compatible"
1876                                           " with ICMP6 layer");
1877         if (!(item_flags & l3m))
1878                 return rte_flow_error_set(error, EINVAL,
1879                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1880                                           "IPv6 is mandatory to filter on"
1881                                           " ICMP6");
1882         if (item_flags & l4m)
1883                 return rte_flow_error_set(error, EINVAL,
1884                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1885                                           "multiple L4 layers not supported");
1886         if (!mask)
1887                 mask = &rte_flow_item_icmp6_mask;
1888         ret = mlx5_flow_item_acceptable
1889                 (item, (const uint8_t *)mask,
1890                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1891                  sizeof(struct rte_flow_item_icmp6),
1892                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1893         if (ret < 0)
1894                 return ret;
1895         return 0;
1896 }
1897
1898 /**
1899  * Validate ICMP item.
1900  *
1901  * @param[in] item
1902  *   Item specification.
1903  * @param[in] item_flags
1904  *   Bit-fields that holds the items detected until now.
1905  * @param[out] error
1906  *   Pointer to error structure.
1907  *
1908  * @return
1909  *   0 on success, a negative errno value otherwise and rte_errno is set.
1910  */
1911 int
1912 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1913                              uint64_t item_flags,
1914                              uint8_t target_protocol,
1915                              struct rte_flow_error *error)
1916 {
1917         const struct rte_flow_item_icmp *mask = item->mask;
1918         const struct rte_flow_item_icmp nic_mask = {
1919                 .hdr.icmp_type = 0xff,
1920                 .hdr.icmp_code = 0xff,
1921                 .hdr.icmp_ident = RTE_BE16(0xffff),
1922                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1923         };
1924         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1925         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1926                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1927         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1928                                       MLX5_FLOW_LAYER_OUTER_L4;
1929         int ret;
1930
1931         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1932                 return rte_flow_error_set(error, EINVAL,
1933                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1934                                           "protocol filtering not compatible"
1935                                           " with ICMP layer");
1936         if (!(item_flags & l3m))
1937                 return rte_flow_error_set(error, EINVAL,
1938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1939                                           "IPv4 is mandatory to filter"
1940                                           " on ICMP");
1941         if (item_flags & l4m)
1942                 return rte_flow_error_set(error, EINVAL,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1944                                           "multiple L4 layers not supported");
1945         if (!mask)
1946                 mask = &nic_mask;
1947         ret = mlx5_flow_item_acceptable
1948                 (item, (const uint8_t *)mask,
1949                  (const uint8_t *)&nic_mask,
1950                  sizeof(struct rte_flow_item_icmp),
1951                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1952         if (ret < 0)
1953                 return ret;
1954         return 0;
1955 }
1956
1957 /**
1958  * Validate Ethernet item.
1959  *
1960  * @param[in] item
1961  *   Item specification.
1962  * @param[in] item_flags
1963  *   Bit-fields that holds the items detected until now.
1964  * @param[out] error
1965  *   Pointer to error structure.
1966  *
1967  * @return
1968  *   0 on success, a negative errno value otherwise and rte_errno is set.
1969  */
1970 int
1971 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1972                             uint64_t item_flags, bool ext_vlan_sup,
1973                             struct rte_flow_error *error)
1974 {
1975         const struct rte_flow_item_eth *mask = item->mask;
1976         const struct rte_flow_item_eth nic_mask = {
1977                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1978                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1979                 .type = RTE_BE16(0xffff),
1980                 .has_vlan = ext_vlan_sup ? 1 : 0,
1981         };
1982         int ret;
1983         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1984         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1985                                        MLX5_FLOW_LAYER_OUTER_L2;
1986
1987         if (item_flags & ethm)
1988                 return rte_flow_error_set(error, ENOTSUP,
1989                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1990                                           "multiple L2 layers not supported");
1991         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1992             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1993                 return rte_flow_error_set(error, EINVAL,
1994                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1995                                           "L2 layer should not follow "
1996                                           "L3 layers");
1997         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1998             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1999                 return rte_flow_error_set(error, EINVAL,
2000                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2001                                           "L2 layer should not follow VLAN");
2002         if (item_flags & MLX5_FLOW_LAYER_GTP)
2003                 return rte_flow_error_set(error, EINVAL,
2004                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2005                                           "L2 layer should not follow GTP");
2006         if (!mask)
2007                 mask = &rte_flow_item_eth_mask;
2008         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2009                                         (const uint8_t *)&nic_mask,
2010                                         sizeof(struct rte_flow_item_eth),
2011                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2012         return ret;
2013 }
2014
2015 /**
2016  * Validate VLAN item.
2017  *
2018  * @param[in] item
2019  *   Item specification.
2020  * @param[in] item_flags
2021  *   Bit-fields that holds the items detected until now.
2022  * @param[in] dev
2023  *   Ethernet device flow is being created on.
2024  * @param[out] error
2025  *   Pointer to error structure.
2026  *
2027  * @return
2028  *   0 on success, a negative errno value otherwise and rte_errno is set.
2029  */
2030 int
2031 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2032                              uint64_t item_flags,
2033                              struct rte_eth_dev *dev,
2034                              struct rte_flow_error *error)
2035 {
2036         const struct rte_flow_item_vlan *spec = item->spec;
2037         const struct rte_flow_item_vlan *mask = item->mask;
2038         const struct rte_flow_item_vlan nic_mask = {
2039                 .tci = RTE_BE16(UINT16_MAX),
2040                 .inner_type = RTE_BE16(UINT16_MAX),
2041         };
2042         uint16_t vlan_tag = 0;
2043         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2044         int ret;
2045         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2046                                         MLX5_FLOW_LAYER_INNER_L4) :
2047                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2048                                         MLX5_FLOW_LAYER_OUTER_L4);
2049         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2050                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2051
2052         if (item_flags & vlanm)
2053                 return rte_flow_error_set(error, EINVAL,
2054                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2055                                           "multiple VLAN layers not supported");
2056         else if ((item_flags & l34m) != 0)
2057                 return rte_flow_error_set(error, EINVAL,
2058                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2059                                           "VLAN cannot follow L3/L4 layer");
2060         if (!mask)
2061                 mask = &rte_flow_item_vlan_mask;
2062         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2063                                         (const uint8_t *)&nic_mask,
2064                                         sizeof(struct rte_flow_item_vlan),
2065                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2066         if (ret)
2067                 return ret;
2068         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2069                 struct mlx5_priv *priv = dev->data->dev_private;
2070
2071                 if (priv->vmwa_context) {
2072                         /*
2073                          * Non-NULL context means we have a virtual machine
2074                          * and SR-IOV enabled, we have to create VLAN interface
2075                          * to make hypervisor to setup E-Switch vport
2076                          * context correctly. We avoid creating the multiple
2077                          * VLAN interfaces, so we cannot support VLAN tag mask.
2078                          */
2079                         return rte_flow_error_set(error, EINVAL,
2080                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2081                                                   item,
2082                                                   "VLAN tag mask is not"
2083                                                   " supported in virtual"
2084                                                   " environment");
2085                 }
2086         }
2087         if (spec) {
2088                 vlan_tag = spec->tci;
2089                 vlan_tag &= mask->tci;
2090         }
2091         /*
2092          * From verbs perspective an empty VLAN is equivalent
2093          * to a packet without VLAN layer.
2094          */
2095         if (!vlan_tag)
2096                 return rte_flow_error_set(error, EINVAL,
2097                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2098                                           item->spec,
2099                                           "VLAN cannot be empty");
2100         return 0;
2101 }
2102
2103 /**
2104  * Validate IPV4 item.
2105  *
2106  * @param[in] item
2107  *   Item specification.
2108  * @param[in] item_flags
2109  *   Bit-fields that holds the items detected until now.
2110  * @param[in] last_item
2111  *   Previous validated item in the pattern items.
2112  * @param[in] ether_type
2113  *   Type in the ethernet layer header (including dot1q).
2114  * @param[in] acc_mask
2115  *   Acceptable mask, if NULL default internal default mask
2116  *   will be used to check whether item fields are supported.
2117  * @param[in] range_accepted
2118  *   True if range of values is accepted for specific fields, false otherwise.
2119  * @param[out] error
2120  *   Pointer to error structure.
2121  *
2122  * @return
2123  *   0 on success, a negative errno value otherwise and rte_errno is set.
2124  */
2125 int
2126 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2127                              uint64_t item_flags,
2128                              uint64_t last_item,
2129                              uint16_t ether_type,
2130                              const struct rte_flow_item_ipv4 *acc_mask,
2131                              bool range_accepted,
2132                              struct rte_flow_error *error)
2133 {
2134         const struct rte_flow_item_ipv4 *mask = item->mask;
2135         const struct rte_flow_item_ipv4 *spec = item->spec;
2136         const struct rte_flow_item_ipv4 nic_mask = {
2137                 .hdr = {
2138                         .src_addr = RTE_BE32(0xffffffff),
2139                         .dst_addr = RTE_BE32(0xffffffff),
2140                         .type_of_service = 0xff,
2141                         .next_proto_id = 0xff,
2142                 },
2143         };
2144         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2145         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2146                                       MLX5_FLOW_LAYER_OUTER_L3;
2147         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2148                                       MLX5_FLOW_LAYER_OUTER_L4;
2149         int ret;
2150         uint8_t next_proto = 0xFF;
2151         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2152                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2153                                   MLX5_FLOW_LAYER_INNER_VLAN);
2154
2155         if ((last_item & l2_vlan) && ether_type &&
2156             ether_type != RTE_ETHER_TYPE_IPV4)
2157                 return rte_flow_error_set(error, EINVAL,
2158                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2159                                           "IPv4 cannot follow L2/VLAN layer "
2160                                           "which ether type is not IPv4");
2161         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2162                 if (mask && spec)
2163                         next_proto = mask->hdr.next_proto_id &
2164                                      spec->hdr.next_proto_id;
2165                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2166                         return rte_flow_error_set(error, EINVAL,
2167                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2168                                                   item,
2169                                                   "multiple tunnel "
2170                                                   "not supported");
2171         }
2172         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2173                 return rte_flow_error_set(error, EINVAL,
2174                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2175                                           "wrong tunnel type - IPv6 specified "
2176                                           "but IPv4 item provided");
2177         if (item_flags & l3m)
2178                 return rte_flow_error_set(error, ENOTSUP,
2179                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2180                                           "multiple L3 layers not supported");
2181         else if (item_flags & l4m)
2182                 return rte_flow_error_set(error, EINVAL,
2183                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2184                                           "L3 cannot follow an L4 layer.");
2185         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2186                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2187                 return rte_flow_error_set(error, EINVAL,
2188                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2189                                           "L3 cannot follow an NVGRE layer.");
2190         if (!mask)
2191                 mask = &rte_flow_item_ipv4_mask;
2192         else if (mask->hdr.next_proto_id != 0 &&
2193                  mask->hdr.next_proto_id != 0xff)
2194                 return rte_flow_error_set(error, EINVAL,
2195                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2196                                           "partial mask is not supported"
2197                                           " for protocol");
2198         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2199                                         acc_mask ? (const uint8_t *)acc_mask
2200                                                  : (const uint8_t *)&nic_mask,
2201                                         sizeof(struct rte_flow_item_ipv4),
2202                                         range_accepted, error);
2203         if (ret < 0)
2204                 return ret;
2205         return 0;
2206 }
2207
2208 /**
2209  * Validate IPV6 item.
2210  *
2211  * @param[in] item
2212  *   Item specification.
2213  * @param[in] item_flags
2214  *   Bit-fields that holds the items detected until now.
2215  * @param[in] last_item
2216  *   Previous validated item in the pattern items.
2217  * @param[in] ether_type
2218  *   Type in the ethernet layer header (including dot1q).
2219  * @param[in] acc_mask
2220  *   Acceptable mask, if NULL default internal default mask
2221  *   will be used to check whether item fields are supported.
2222  * @param[out] error
2223  *   Pointer to error structure.
2224  *
2225  * @return
2226  *   0 on success, a negative errno value otherwise and rte_errno is set.
2227  */
2228 int
2229 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2230                              uint64_t item_flags,
2231                              uint64_t last_item,
2232                              uint16_t ether_type,
2233                              const struct rte_flow_item_ipv6 *acc_mask,
2234                              struct rte_flow_error *error)
2235 {
2236         const struct rte_flow_item_ipv6 *mask = item->mask;
2237         const struct rte_flow_item_ipv6 *spec = item->spec;
2238         const struct rte_flow_item_ipv6 nic_mask = {
2239                 .hdr = {
2240                         .src_addr =
2241                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2242                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2243                         .dst_addr =
2244                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2245                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2246                         .vtc_flow = RTE_BE32(0xffffffff),
2247                         .proto = 0xff,
2248                 },
2249         };
2250         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2251         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2252                                       MLX5_FLOW_LAYER_OUTER_L3;
2253         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2254                                       MLX5_FLOW_LAYER_OUTER_L4;
2255         int ret;
2256         uint8_t next_proto = 0xFF;
2257         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2258                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2259                                   MLX5_FLOW_LAYER_INNER_VLAN);
2260
2261         if ((last_item & l2_vlan) && ether_type &&
2262             ether_type != RTE_ETHER_TYPE_IPV6)
2263                 return rte_flow_error_set(error, EINVAL,
2264                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2265                                           "IPv6 cannot follow L2/VLAN layer "
2266                                           "which ether type is not IPv6");
2267         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2268                 next_proto = spec->hdr.proto;
2269         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2270                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2271                         return rte_flow_error_set(error, EINVAL,
2272                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2273                                                   item,
2274                                                   "multiple tunnel "
2275                                                   "not supported");
2276         }
2277         if (next_proto == IPPROTO_HOPOPTS  ||
2278             next_proto == IPPROTO_ROUTING  ||
2279             next_proto == IPPROTO_FRAGMENT ||
2280             next_proto == IPPROTO_ESP      ||
2281             next_proto == IPPROTO_AH       ||
2282             next_proto == IPPROTO_DSTOPTS)
2283                 return rte_flow_error_set(error, EINVAL,
2284                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2285                                           "IPv6 proto (next header) should "
2286                                           "not be set as extension header");
2287         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2288                 return rte_flow_error_set(error, EINVAL,
2289                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2290                                           "wrong tunnel type - IPv4 specified "
2291                                           "but IPv6 item provided");
2292         if (item_flags & l3m)
2293                 return rte_flow_error_set(error, ENOTSUP,
2294                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2295                                           "multiple L3 layers not supported");
2296         else if (item_flags & l4m)
2297                 return rte_flow_error_set(error, EINVAL,
2298                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2299                                           "L3 cannot follow an L4 layer.");
2300         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2301                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2302                 return rte_flow_error_set(error, EINVAL,
2303                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2304                                           "L3 cannot follow an NVGRE layer.");
2305         if (!mask)
2306                 mask = &rte_flow_item_ipv6_mask;
2307         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2308                                         acc_mask ? (const uint8_t *)acc_mask
2309                                                  : (const uint8_t *)&nic_mask,
2310                                         sizeof(struct rte_flow_item_ipv6),
2311                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2312         if (ret < 0)
2313                 return ret;
2314         return 0;
2315 }
2316
2317 /**
2318  * Validate UDP item.
2319  *
2320  * @param[in] item
2321  *   Item specification.
2322  * @param[in] item_flags
2323  *   Bit-fields that holds the items detected until now.
2324  * @param[in] target_protocol
2325  *   The next protocol in the previous item.
2326  * @param[in] flow_mask
2327  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2328  * @param[out] error
2329  *   Pointer to error structure.
2330  *
2331  * @return
2332  *   0 on success, a negative errno value otherwise and rte_errno is set.
2333  */
2334 int
2335 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2336                             uint64_t item_flags,
2337                             uint8_t target_protocol,
2338                             struct rte_flow_error *error)
2339 {
2340         const struct rte_flow_item_udp *mask = item->mask;
2341         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2342         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2343                                       MLX5_FLOW_LAYER_OUTER_L3;
2344         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2345                                       MLX5_FLOW_LAYER_OUTER_L4;
2346         int ret;
2347
2348         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2349                 return rte_flow_error_set(error, EINVAL,
2350                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2351                                           "protocol filtering not compatible"
2352                                           " with UDP layer");
2353         if (!(item_flags & l3m))
2354                 return rte_flow_error_set(error, EINVAL,
2355                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2356                                           "L3 is mandatory to filter on L4");
2357         if (item_flags & l4m)
2358                 return rte_flow_error_set(error, EINVAL,
2359                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2360                                           "multiple L4 layers not supported");
2361         if (!mask)
2362                 mask = &rte_flow_item_udp_mask;
2363         ret = mlx5_flow_item_acceptable
2364                 (item, (const uint8_t *)mask,
2365                  (const uint8_t *)&rte_flow_item_udp_mask,
2366                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2367                  error);
2368         if (ret < 0)
2369                 return ret;
2370         return 0;
2371 }
2372
2373 /**
2374  * Validate TCP item.
2375  *
2376  * @param[in] item
2377  *   Item specification.
2378  * @param[in] item_flags
2379  *   Bit-fields that holds the items detected until now.
2380  * @param[in] target_protocol
2381  *   The next protocol in the previous item.
2382  * @param[out] error
2383  *   Pointer to error structure.
2384  *
2385  * @return
2386  *   0 on success, a negative errno value otherwise and rte_errno is set.
2387  */
2388 int
2389 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2390                             uint64_t item_flags,
2391                             uint8_t target_protocol,
2392                             const struct rte_flow_item_tcp *flow_mask,
2393                             struct rte_flow_error *error)
2394 {
2395         const struct rte_flow_item_tcp *mask = item->mask;
2396         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2397         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2398                                       MLX5_FLOW_LAYER_OUTER_L3;
2399         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2400                                       MLX5_FLOW_LAYER_OUTER_L4;
2401         int ret;
2402
2403         MLX5_ASSERT(flow_mask);
2404         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2405                 return rte_flow_error_set(error, EINVAL,
2406                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2407                                           "protocol filtering not compatible"
2408                                           " with TCP layer");
2409         if (!(item_flags & l3m))
2410                 return rte_flow_error_set(error, EINVAL,
2411                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2412                                           "L3 is mandatory to filter on L4");
2413         if (item_flags & l4m)
2414                 return rte_flow_error_set(error, EINVAL,
2415                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2416                                           "multiple L4 layers not supported");
2417         if (!mask)
2418                 mask = &rte_flow_item_tcp_mask;
2419         ret = mlx5_flow_item_acceptable
2420                 (item, (const uint8_t *)mask,
2421                  (const uint8_t *)flow_mask,
2422                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2423                  error);
2424         if (ret < 0)
2425                 return ret;
2426         return 0;
2427 }
2428
2429 /**
2430  * Validate VXLAN item.
2431  *
2432  * @param[in] dev
2433  *   Pointer to the Ethernet device structure.
2434  * @param[in] item
2435  *   Item specification.
2436  * @param[in] item_flags
2437  *   Bit-fields that holds the items detected until now.
2438  * @param[in] attr
2439  *   Flow rule attributes.
2440  * @param[out] error
2441  *   Pointer to error structure.
2442  *
2443  * @return
2444  *   0 on success, a negative errno value otherwise and rte_errno is set.
2445  */
2446 int
2447 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2448                               const struct rte_flow_item *item,
2449                               uint64_t item_flags,
2450                               const struct rte_flow_attr *attr,
2451                               struct rte_flow_error *error)
2452 {
2453         const struct rte_flow_item_vxlan *spec = item->spec;
2454         const struct rte_flow_item_vxlan *mask = item->mask;
2455         int ret;
2456         struct mlx5_priv *priv = dev->data->dev_private;
2457         union vni {
2458                 uint32_t vlan_id;
2459                 uint8_t vni[4];
2460         } id = { .vlan_id = 0, };
2461         const struct rte_flow_item_vxlan nic_mask = {
2462                 .vni = "\xff\xff\xff",
2463                 .rsvd1 = 0xff,
2464         };
2465         const struct rte_flow_item_vxlan *valid_mask;
2466
2467         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2468                 return rte_flow_error_set(error, ENOTSUP,
2469                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2470                                           "multiple tunnel layers not"
2471                                           " supported");
2472         valid_mask = &rte_flow_item_vxlan_mask;
2473         /*
2474          * Verify only UDPv4 is present as defined in
2475          * https://tools.ietf.org/html/rfc7348
2476          */
2477         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2478                 return rte_flow_error_set(error, EINVAL,
2479                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2480                                           "no outer UDP layer found");
2481         if (!mask)
2482                 mask = &rte_flow_item_vxlan_mask;
2483         /* FDB domain & NIC domain non-zero group */
2484         if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2485                 valid_mask = &nic_mask;
2486         /* Group zero in NIC domain */
2487         if (!attr->group && !attr->transfer && priv->sh->tunnel_header_0_1)
2488                 valid_mask = &nic_mask;
2489         ret = mlx5_flow_item_acceptable
2490                 (item, (const uint8_t *)mask,
2491                  (const uint8_t *)valid_mask,
2492                  sizeof(struct rte_flow_item_vxlan),
2493                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2494         if (ret < 0)
2495                 return ret;
2496         if (spec) {
2497                 memcpy(&id.vni[1], spec->vni, 3);
2498                 memcpy(&id.vni[1], mask->vni, 3);
2499         }
2500         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2501                 return rte_flow_error_set(error, ENOTSUP,
2502                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2503                                           "VXLAN tunnel must be fully defined");
2504         return 0;
2505 }
2506
2507 /**
2508  * Validate VXLAN_GPE item.
2509  *
2510  * @param[in] item
2511  *   Item specification.
2512  * @param[in] item_flags
2513  *   Bit-fields that holds the items detected until now.
2514  * @param[in] priv
2515  *   Pointer to the private data structure.
2516  * @param[in] target_protocol
2517  *   The next protocol in the previous item.
2518  * @param[out] error
2519  *   Pointer to error structure.
2520  *
2521  * @return
2522  *   0 on success, a negative errno value otherwise and rte_errno is set.
2523  */
2524 int
2525 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2526                                   uint64_t item_flags,
2527                                   struct rte_eth_dev *dev,
2528                                   struct rte_flow_error *error)
2529 {
2530         struct mlx5_priv *priv = dev->data->dev_private;
2531         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2532         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2533         int ret;
2534         union vni {
2535                 uint32_t vlan_id;
2536                 uint8_t vni[4];
2537         } id = { .vlan_id = 0, };
2538
2539         if (!priv->config.l3_vxlan_en)
2540                 return rte_flow_error_set(error, ENOTSUP,
2541                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2542                                           "L3 VXLAN is not enabled by device"
2543                                           " parameter and/or not configured in"
2544                                           " firmware");
2545         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2546                 return rte_flow_error_set(error, ENOTSUP,
2547                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2548                                           "multiple tunnel layers not"
2549                                           " supported");
2550         /*
2551          * Verify only UDPv4 is present as defined in
2552          * https://tools.ietf.org/html/rfc7348
2553          */
2554         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2555                 return rte_flow_error_set(error, EINVAL,
2556                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2557                                           "no outer UDP layer found");
2558         if (!mask)
2559                 mask = &rte_flow_item_vxlan_gpe_mask;
2560         ret = mlx5_flow_item_acceptable
2561                 (item, (const uint8_t *)mask,
2562                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2563                  sizeof(struct rte_flow_item_vxlan_gpe),
2564                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2565         if (ret < 0)
2566                 return ret;
2567         if (spec) {
2568                 if (spec->protocol)
2569                         return rte_flow_error_set(error, ENOTSUP,
2570                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2571                                                   item,
2572                                                   "VxLAN-GPE protocol"
2573                                                   " not supported");
2574                 memcpy(&id.vni[1], spec->vni, 3);
2575                 memcpy(&id.vni[1], mask->vni, 3);
2576         }
2577         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2578                 return rte_flow_error_set(error, ENOTSUP,
2579                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2580                                           "VXLAN-GPE tunnel must be fully"
2581                                           " defined");
2582         return 0;
2583 }
2584 /**
2585  * Validate GRE Key item.
2586  *
2587  * @param[in] item
2588  *   Item specification.
2589  * @param[in] item_flags
2590  *   Bit flags to mark detected items.
2591  * @param[in] gre_item
2592  *   Pointer to gre_item
2593  * @param[out] error
2594  *   Pointer to error structure.
2595  *
2596  * @return
2597  *   0 on success, a negative errno value otherwise and rte_errno is set.
2598  */
2599 int
2600 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2601                                 uint64_t item_flags,
2602                                 const struct rte_flow_item *gre_item,
2603                                 struct rte_flow_error *error)
2604 {
2605         const rte_be32_t *mask = item->mask;
2606         int ret = 0;
2607         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2608         const struct rte_flow_item_gre *gre_spec;
2609         const struct rte_flow_item_gre *gre_mask;
2610
2611         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2612                 return rte_flow_error_set(error, ENOTSUP,
2613                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2614                                           "Multiple GRE key not support");
2615         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2616                 return rte_flow_error_set(error, ENOTSUP,
2617                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2618                                           "No preceding GRE header");
2619         if (item_flags & MLX5_FLOW_LAYER_INNER)
2620                 return rte_flow_error_set(error, ENOTSUP,
2621                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2622                                           "GRE key following a wrong item");
2623         gre_mask = gre_item->mask;
2624         if (!gre_mask)
2625                 gre_mask = &rte_flow_item_gre_mask;
2626         gre_spec = gre_item->spec;
2627         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2628                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2629                 return rte_flow_error_set(error, EINVAL,
2630                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2631                                           "Key bit must be on");
2632
2633         if (!mask)
2634                 mask = &gre_key_default_mask;
2635         ret = mlx5_flow_item_acceptable
2636                 (item, (const uint8_t *)mask,
2637                  (const uint8_t *)&gre_key_default_mask,
2638                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2639         return ret;
2640 }
2641
2642 /**
2643  * Validate GRE item.
2644  *
2645  * @param[in] item
2646  *   Item specification.
2647  * @param[in] item_flags
2648  *   Bit flags to mark detected items.
2649  * @param[in] target_protocol
2650  *   The next protocol in the previous item.
2651  * @param[out] error
2652  *   Pointer to error structure.
2653  *
2654  * @return
2655  *   0 on success, a negative errno value otherwise and rte_errno is set.
2656  */
2657 int
2658 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2659                             uint64_t item_flags,
2660                             uint8_t target_protocol,
2661                             struct rte_flow_error *error)
2662 {
2663         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2664         const struct rte_flow_item_gre *mask = item->mask;
2665         int ret;
2666         const struct rte_flow_item_gre nic_mask = {
2667                 .c_rsvd0_ver = RTE_BE16(0xB000),
2668                 .protocol = RTE_BE16(UINT16_MAX),
2669         };
2670
2671         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2672                 return rte_flow_error_set(error, EINVAL,
2673                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2674                                           "protocol filtering not compatible"
2675                                           " with this GRE layer");
2676         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2677                 return rte_flow_error_set(error, ENOTSUP,
2678                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2679                                           "multiple tunnel layers not"
2680                                           " supported");
2681         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2682                 return rte_flow_error_set(error, ENOTSUP,
2683                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2684                                           "L3 Layer is missing");
2685         if (!mask)
2686                 mask = &rte_flow_item_gre_mask;
2687         ret = mlx5_flow_item_acceptable
2688                 (item, (const uint8_t *)mask,
2689                  (const uint8_t *)&nic_mask,
2690                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2691                  error);
2692         if (ret < 0)
2693                 return ret;
2694 #ifndef HAVE_MLX5DV_DR
2695 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2696         if (spec && (spec->protocol & mask->protocol))
2697                 return rte_flow_error_set(error, ENOTSUP,
2698                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2699                                           "without MPLS support the"
2700                                           " specification cannot be used for"
2701                                           " filtering");
2702 #endif
2703 #endif
2704         return 0;
2705 }
2706
2707 /**
2708  * Validate Geneve item.
2709  *
2710  * @param[in] item
2711  *   Item specification.
2712  * @param[in] itemFlags
2713  *   Bit-fields that holds the items detected until now.
2714  * @param[in] enPriv
2715  *   Pointer to the private data structure.
2716  * @param[out] error
2717  *   Pointer to error structure.
2718  *
2719  * @return
2720  *   0 on success, a negative errno value otherwise and rte_errno is set.
2721  */
2722
2723 int
2724 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2725                                uint64_t item_flags,
2726                                struct rte_eth_dev *dev,
2727                                struct rte_flow_error *error)
2728 {
2729         struct mlx5_priv *priv = dev->data->dev_private;
2730         const struct rte_flow_item_geneve *spec = item->spec;
2731         const struct rte_flow_item_geneve *mask = item->mask;
2732         int ret;
2733         uint16_t gbhdr;
2734         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2735                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2736         const struct rte_flow_item_geneve nic_mask = {
2737                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2738                 .vni = "\xff\xff\xff",
2739                 .protocol = RTE_BE16(UINT16_MAX),
2740         };
2741
2742         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2743                 return rte_flow_error_set(error, ENOTSUP,
2744                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2745                                           "L3 Geneve is not enabled by device"
2746                                           " parameter and/or not configured in"
2747                                           " firmware");
2748         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2749                 return rte_flow_error_set(error, ENOTSUP,
2750                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2751                                           "multiple tunnel layers not"
2752                                           " supported");
2753         /*
2754          * Verify only UDPv4 is present as defined in
2755          * https://tools.ietf.org/html/rfc7348
2756          */
2757         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2758                 return rte_flow_error_set(error, EINVAL,
2759                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2760                                           "no outer UDP layer found");
2761         if (!mask)
2762                 mask = &rte_flow_item_geneve_mask;
2763         ret = mlx5_flow_item_acceptable
2764                                   (item, (const uint8_t *)mask,
2765                                    (const uint8_t *)&nic_mask,
2766                                    sizeof(struct rte_flow_item_geneve),
2767                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2768         if (ret)
2769                 return ret;
2770         if (spec) {
2771                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2772                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2773                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2774                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2775                         return rte_flow_error_set(error, ENOTSUP,
2776                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2777                                                   item,
2778                                                   "Geneve protocol unsupported"
2779                                                   " fields are being used");
2780                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2781                         return rte_flow_error_set
2782                                         (error, ENOTSUP,
2783                                          RTE_FLOW_ERROR_TYPE_ITEM,
2784                                          item,
2785                                          "Unsupported Geneve options length");
2786         }
2787         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2788                 return rte_flow_error_set
2789                                     (error, ENOTSUP,
2790                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2791                                      "Geneve tunnel must be fully defined");
2792         return 0;
2793 }
2794
2795 /**
2796  * Validate Geneve TLV option item.
2797  *
2798  * @param[in] item
2799  *   Item specification.
2800  * @param[in] last_item
2801  *   Previous validated item in the pattern items.
2802  * @param[in] geneve_item
2803  *   Previous GENEVE item specification.
2804  * @param[in] dev
2805  *   Pointer to the rte_eth_dev structure.
2806  * @param[out] error
2807  *   Pointer to error structure.
2808  *
2809  * @return
2810  *   0 on success, a negative errno value otherwise and rte_errno is set.
2811  */
2812 int
2813 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2814                                    uint64_t last_item,
2815                                    const struct rte_flow_item *geneve_item,
2816                                    struct rte_eth_dev *dev,
2817                                    struct rte_flow_error *error)
2818 {
2819         struct mlx5_priv *priv = dev->data->dev_private;
2820         struct mlx5_dev_ctx_shared *sh = priv->sh;
2821         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2822         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2823         uint8_t data_max_supported =
2824                         hca_attr->max_geneve_tlv_option_data_len * 4;
2825         struct mlx5_dev_config *config = &priv->config;
2826         const struct rte_flow_item_geneve *geneve_spec;
2827         const struct rte_flow_item_geneve *geneve_mask;
2828         const struct rte_flow_item_geneve_opt *spec = item->spec;
2829         const struct rte_flow_item_geneve_opt *mask = item->mask;
2830         unsigned int i;
2831         unsigned int data_len;
2832         uint8_t tlv_option_len;
2833         uint16_t optlen_m, optlen_v;
2834         const struct rte_flow_item_geneve_opt full_mask = {
2835                 .option_class = RTE_BE16(0xffff),
2836                 .option_type = 0xff,
2837                 .option_len = 0x1f,
2838         };
2839
2840         if (!mask)
2841                 mask = &rte_flow_item_geneve_opt_mask;
2842         if (!spec)
2843                 return rte_flow_error_set
2844                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2845                         "Geneve TLV opt class/type/length must be specified");
2846         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2847                 return rte_flow_error_set
2848                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2849                         "Geneve TLV opt length exceeeds the limit (31)");
2850         /* Check if class type and length masks are full. */
2851         if (full_mask.option_class != mask->option_class ||
2852             full_mask.option_type != mask->option_type ||
2853             full_mask.option_len != (mask->option_len & full_mask.option_len))
2854                 return rte_flow_error_set
2855                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2856                         "Geneve TLV opt class/type/length masks must be full");
2857         /* Check if length is supported */
2858         if ((uint32_t)spec->option_len >
2859                         config->hca_attr.max_geneve_tlv_option_data_len)
2860                 return rte_flow_error_set
2861                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2862                         "Geneve TLV opt length not supported");
2863         if (config->hca_attr.max_geneve_tlv_options > 1)
2864                 DRV_LOG(DEBUG,
2865                         "max_geneve_tlv_options supports more than 1 option");
2866         /* Check GENEVE item preceding. */
2867         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2868                 return rte_flow_error_set
2869                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2870                         "Geneve opt item must be preceded with Geneve item");
2871         geneve_spec = geneve_item->spec;
2872         geneve_mask = geneve_item->mask ? geneve_item->mask :
2873                                           &rte_flow_item_geneve_mask;
2874         /* Check if GENEVE TLV option size doesn't exceed option length */
2875         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2876                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2877                 tlv_option_len = spec->option_len & mask->option_len;
2878                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2879                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2880                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2881                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2882                 if ((optlen_v & optlen_m) <= tlv_option_len)
2883                         return rte_flow_error_set
2884                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2885                                  "GENEVE TLV option length exceeds optlen");
2886         }
2887         /* Check if length is 0 or data is 0. */
2888         if (spec->data == NULL || spec->option_len == 0)
2889                 return rte_flow_error_set
2890                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2891                         "Geneve TLV opt with zero data/length not supported");
2892         /* Check not all data & mask are 0. */
2893         data_len = spec->option_len * 4;
2894         if (mask->data == NULL) {
2895                 for (i = 0; i < data_len; i++)
2896                         if (spec->data[i])
2897                                 break;
2898                 if (i == data_len)
2899                         return rte_flow_error_set(error, ENOTSUP,
2900                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2901                                 "Can't match on Geneve option data 0");
2902         } else {
2903                 for (i = 0; i < data_len; i++)
2904                         if (spec->data[i] & mask->data[i])
2905                                 break;
2906                 if (i == data_len)
2907                         return rte_flow_error_set(error, ENOTSUP,
2908                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2909                                 "Can't match on Geneve option data and mask 0");
2910                 /* Check data mask supported. */
2911                 for (i = data_max_supported; i < data_len ; i++)
2912                         if (mask->data[i])
2913                                 return rte_flow_error_set(error, ENOTSUP,
2914                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2915                                         "Data mask is of unsupported size");
2916         }
2917         /* Check GENEVE option is supported in NIC. */
2918         if (!config->hca_attr.geneve_tlv_opt)
2919                 return rte_flow_error_set
2920                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2921                         "Geneve TLV opt not supported");
2922         /* Check if we already have geneve option with different type/class. */
2923         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
2924         geneve_opt_resource = sh->geneve_tlv_option_resource;
2925         if (geneve_opt_resource != NULL)
2926                 if (geneve_opt_resource->option_class != spec->option_class ||
2927                     geneve_opt_resource->option_type != spec->option_type ||
2928                     geneve_opt_resource->length != spec->option_len) {
2929                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2930                         return rte_flow_error_set(error, ENOTSUP,
2931                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2932                                 "Only one Geneve TLV option supported");
2933                 }
2934         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2935         return 0;
2936 }
2937
2938 /**
2939  * Validate MPLS item.
2940  *
2941  * @param[in] dev
2942  *   Pointer to the rte_eth_dev structure.
2943  * @param[in] item
2944  *   Item specification.
2945  * @param[in] item_flags
2946  *   Bit-fields that holds the items detected until now.
2947  * @param[in] prev_layer
2948  *   The protocol layer indicated in previous item.
2949  * @param[out] error
2950  *   Pointer to error structure.
2951  *
2952  * @return
2953  *   0 on success, a negative errno value otherwise and rte_errno is set.
2954  */
2955 int
2956 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2957                              const struct rte_flow_item *item __rte_unused,
2958                              uint64_t item_flags __rte_unused,
2959                              uint64_t prev_layer __rte_unused,
2960                              struct rte_flow_error *error)
2961 {
2962 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2963         const struct rte_flow_item_mpls *mask = item->mask;
2964         struct mlx5_priv *priv = dev->data->dev_private;
2965         int ret;
2966
2967         if (!priv->config.mpls_en)
2968                 return rte_flow_error_set(error, ENOTSUP,
2969                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2970                                           "MPLS not supported or"
2971                                           " disabled in firmware"
2972                                           " configuration.");
2973         /* MPLS over UDP, GRE is allowed */
2974         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
2975                             MLX5_FLOW_LAYER_GRE |
2976                             MLX5_FLOW_LAYER_GRE_KEY)))
2977                 return rte_flow_error_set(error, EINVAL,
2978                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2979                                           "protocol filtering not compatible"
2980                                           " with MPLS layer");
2981         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2982         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2983             !(item_flags & MLX5_FLOW_LAYER_GRE))
2984                 return rte_flow_error_set(error, ENOTSUP,
2985                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2986                                           "multiple tunnel layers not"
2987                                           " supported");
2988         if (!mask)
2989                 mask = &rte_flow_item_mpls_mask;
2990         ret = mlx5_flow_item_acceptable
2991                 (item, (const uint8_t *)mask,
2992                  (const uint8_t *)&rte_flow_item_mpls_mask,
2993                  sizeof(struct rte_flow_item_mpls),
2994                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2995         if (ret < 0)
2996                 return ret;
2997         return 0;
2998 #else
2999         return rte_flow_error_set(error, ENOTSUP,
3000                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
3001                                   "MPLS is not supported by Verbs, please"
3002                                   " update.");
3003 #endif
3004 }
3005
3006 /**
3007  * Validate NVGRE item.
3008  *
3009  * @param[in] item
3010  *   Item specification.
3011  * @param[in] item_flags
3012  *   Bit flags to mark detected items.
3013  * @param[in] target_protocol
3014  *   The next protocol in the previous item.
3015  * @param[out] error
3016  *   Pointer to error structure.
3017  *
3018  * @return
3019  *   0 on success, a negative errno value otherwise and rte_errno is set.
3020  */
3021 int
3022 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3023                               uint64_t item_flags,
3024                               uint8_t target_protocol,
3025                               struct rte_flow_error *error)
3026 {
3027         const struct rte_flow_item_nvgre *mask = item->mask;
3028         int ret;
3029
3030         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3031                 return rte_flow_error_set(error, EINVAL,
3032                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3033                                           "protocol filtering not compatible"
3034                                           " with this GRE layer");
3035         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3036                 return rte_flow_error_set(error, ENOTSUP,
3037                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3038                                           "multiple tunnel layers not"
3039                                           " supported");
3040         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3041                 return rte_flow_error_set(error, ENOTSUP,
3042                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3043                                           "L3 Layer is missing");
3044         if (!mask)
3045                 mask = &rte_flow_item_nvgre_mask;
3046         ret = mlx5_flow_item_acceptable
3047                 (item, (const uint8_t *)mask,
3048                  (const uint8_t *)&rte_flow_item_nvgre_mask,
3049                  sizeof(struct rte_flow_item_nvgre),
3050                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3051         if (ret < 0)
3052                 return ret;
3053         return 0;
3054 }
3055
3056 /**
3057  * Validate eCPRI item.
3058  *
3059  * @param[in] item
3060  *   Item specification.
3061  * @param[in] item_flags
3062  *   Bit-fields that holds the items detected until now.
3063  * @param[in] last_item
3064  *   Previous validated item in the pattern items.
3065  * @param[in] ether_type
3066  *   Type in the ethernet layer header (including dot1q).
3067  * @param[in] acc_mask
3068  *   Acceptable mask, if NULL default internal default mask
3069  *   will be used to check whether item fields are supported.
3070  * @param[out] error
3071  *   Pointer to error structure.
3072  *
3073  * @return
3074  *   0 on success, a negative errno value otherwise and rte_errno is set.
3075  */
3076 int
3077 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3078                               uint64_t item_flags,
3079                               uint64_t last_item,
3080                               uint16_t ether_type,
3081                               const struct rte_flow_item_ecpri *acc_mask,
3082                               struct rte_flow_error *error)
3083 {
3084         const struct rte_flow_item_ecpri *mask = item->mask;
3085         const struct rte_flow_item_ecpri nic_mask = {
3086                 .hdr = {
3087                         .common = {
3088                                 .u32 =
3089                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3090                                         .type = 0xFF,
3091                                         }).u32),
3092                         },
3093                         .dummy[0] = 0xFFFFFFFF,
3094                 },
3095         };
3096         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3097                                         MLX5_FLOW_LAYER_OUTER_VLAN);
3098         struct rte_flow_item_ecpri mask_lo;
3099
3100         if (!(last_item & outer_l2_vlan) &&
3101             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3102                 return rte_flow_error_set(error, EINVAL,
3103                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3104                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
3105         if ((last_item & outer_l2_vlan) && ether_type &&
3106             ether_type != RTE_ETHER_TYPE_ECPRI)
3107                 return rte_flow_error_set(error, EINVAL,
3108                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3109                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3110         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3111                 return rte_flow_error_set(error, EINVAL,
3112                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3113                                           "eCPRI with tunnel is not supported right now");
3114         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3115                 return rte_flow_error_set(error, ENOTSUP,
3116                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3117                                           "multiple L3 layers not supported");
3118         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3119                 return rte_flow_error_set(error, EINVAL,
3120                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3121                                           "eCPRI cannot coexist with a TCP layer");
3122         /* In specification, eCPRI could be over UDP layer. */
3123         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3124                 return rte_flow_error_set(error, EINVAL,
3125                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3126                                           "eCPRI over UDP layer is not yet supported right now");
3127         /* Mask for type field in common header could be zero. */
3128         if (!mask)
3129                 mask = &rte_flow_item_ecpri_mask;
3130         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3131         /* Input mask is in big-endian format. */
3132         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3133                 return rte_flow_error_set(error, EINVAL,
3134                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3135                                           "partial mask is not supported for protocol");
3136         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3137                 return rte_flow_error_set(error, EINVAL,
3138                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3139                                           "message header mask must be after a type mask");
3140         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3141                                          acc_mask ? (const uint8_t *)acc_mask
3142                                                   : (const uint8_t *)&nic_mask,
3143                                          sizeof(struct rte_flow_item_ecpri),
3144                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3145 }
3146
3147 static int
3148 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3149                    const struct rte_flow_attr *attr __rte_unused,
3150                    const struct rte_flow_item items[] __rte_unused,
3151                    const struct rte_flow_action actions[] __rte_unused,
3152                    bool external __rte_unused,
3153                    int hairpin __rte_unused,
3154                    struct rte_flow_error *error)
3155 {
3156         return rte_flow_error_set(error, ENOTSUP,
3157                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3158 }
3159
3160 static struct mlx5_flow *
3161 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3162                   const struct rte_flow_attr *attr __rte_unused,
3163                   const struct rte_flow_item items[] __rte_unused,
3164                   const struct rte_flow_action actions[] __rte_unused,
3165                   struct rte_flow_error *error)
3166 {
3167         rte_flow_error_set(error, ENOTSUP,
3168                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3169         return NULL;
3170 }
3171
3172 static int
3173 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3174                     struct mlx5_flow *dev_flow __rte_unused,
3175                     const struct rte_flow_attr *attr __rte_unused,
3176                     const struct rte_flow_item items[] __rte_unused,
3177                     const struct rte_flow_action actions[] __rte_unused,
3178                     struct rte_flow_error *error)
3179 {
3180         return rte_flow_error_set(error, ENOTSUP,
3181                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3182 }
3183
3184 static int
3185 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3186                 struct rte_flow *flow __rte_unused,
3187                 struct rte_flow_error *error)
3188 {
3189         return rte_flow_error_set(error, ENOTSUP,
3190                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3191 }
3192
3193 static void
3194 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3195                  struct rte_flow *flow __rte_unused)
3196 {
3197 }
3198
3199 static void
3200 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3201                   struct rte_flow *flow __rte_unused)
3202 {
3203 }
3204
3205 static int
3206 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3207                 struct rte_flow *flow __rte_unused,
3208                 const struct rte_flow_action *actions __rte_unused,
3209                 void *data __rte_unused,
3210                 struct rte_flow_error *error)
3211 {
3212         return rte_flow_error_set(error, ENOTSUP,
3213                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3214 }
3215
3216 static int
3217 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3218                       uint32_t domains __rte_unused,
3219                       uint32_t flags __rte_unused)
3220 {
3221         return 0;
3222 }
3223
3224 /* Void driver to protect from null pointer reference. */
3225 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3226         .validate = flow_null_validate,
3227         .prepare = flow_null_prepare,
3228         .translate = flow_null_translate,
3229         .apply = flow_null_apply,
3230         .remove = flow_null_remove,
3231         .destroy = flow_null_destroy,
3232         .query = flow_null_query,
3233         .sync_domain = flow_null_sync_domain,
3234 };
3235
3236 /**
3237  * Select flow driver type according to flow attributes and device
3238  * configuration.
3239  *
3240  * @param[in] dev
3241  *   Pointer to the dev structure.
3242  * @param[in] attr
3243  *   Pointer to the flow attributes.
3244  *
3245  * @return
3246  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3247  */
3248 static enum mlx5_flow_drv_type
3249 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3250 {
3251         struct mlx5_priv *priv = dev->data->dev_private;
3252         /* The OS can determine first a specific flow type (DV, VERBS) */
3253         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3254
3255         if (type != MLX5_FLOW_TYPE_MAX)
3256                 return type;
3257         /* If no OS specific type - continue with DV/VERBS selection */
3258         if (attr->transfer && priv->config.dv_esw_en)
3259                 type = MLX5_FLOW_TYPE_DV;
3260         if (!attr->transfer)
3261                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3262                                                  MLX5_FLOW_TYPE_VERBS;
3263         return type;
3264 }
3265
3266 #define flow_get_drv_ops(type) flow_drv_ops[type]
3267
3268 /**
3269  * Flow driver validation API. This abstracts calling driver specific functions.
3270  * The type of flow driver is determined according to flow attributes.
3271  *
3272  * @param[in] dev
3273  *   Pointer to the dev structure.
3274  * @param[in] attr
3275  *   Pointer to the flow attributes.
3276  * @param[in] items
3277  *   Pointer to the list of items.
3278  * @param[in] actions
3279  *   Pointer to the list of actions.
3280  * @param[in] external
3281  *   This flow rule is created by request external to PMD.
3282  * @param[in] hairpin
3283  *   Number of hairpin TX actions, 0 means classic flow.
3284  * @param[out] error
3285  *   Pointer to the error structure.
3286  *
3287  * @return
3288  *   0 on success, a negative errno value otherwise and rte_errno is set.
3289  */
3290 static inline int
3291 flow_drv_validate(struct rte_eth_dev *dev,
3292                   const struct rte_flow_attr *attr,
3293                   const struct rte_flow_item items[],
3294                   const struct rte_flow_action actions[],
3295                   bool external, int hairpin, struct rte_flow_error *error)
3296 {
3297         const struct mlx5_flow_driver_ops *fops;
3298         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3299
3300         fops = flow_get_drv_ops(type);
3301         return fops->validate(dev, attr, items, actions, external,
3302                               hairpin, error);
3303 }
3304
3305 /**
3306  * Flow driver preparation API. This abstracts calling driver specific
3307  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3308  * calculates the size of memory required for device flow, allocates the memory,
3309  * initializes the device flow and returns the pointer.
3310  *
3311  * @note
3312  *   This function initializes device flow structure such as dv or verbs in
3313  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3314  *   rest. For example, adding returning device flow to flow->dev_flow list and
3315  *   setting backward reference to the flow should be done out of this function.
3316  *   layers field is not filled either.
3317  *
3318  * @param[in] dev
3319  *   Pointer to the dev structure.
3320  * @param[in] attr
3321  *   Pointer to the flow attributes.
3322  * @param[in] items
3323  *   Pointer to the list of items.
3324  * @param[in] actions
3325  *   Pointer to the list of actions.
3326  * @param[in] flow_idx
3327  *   This memory pool index to the flow.
3328  * @param[out] error
3329  *   Pointer to the error structure.
3330  *
3331  * @return
3332  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3333  */
3334 static inline struct mlx5_flow *
3335 flow_drv_prepare(struct rte_eth_dev *dev,
3336                  const struct rte_flow *flow,
3337                  const struct rte_flow_attr *attr,
3338                  const struct rte_flow_item items[],
3339                  const struct rte_flow_action actions[],
3340                  uint32_t flow_idx,
3341                  struct rte_flow_error *error)
3342 {
3343         const struct mlx5_flow_driver_ops *fops;
3344         enum mlx5_flow_drv_type type = flow->drv_type;
3345         struct mlx5_flow *mlx5_flow = NULL;
3346
3347         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3348         fops = flow_get_drv_ops(type);
3349         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3350         if (mlx5_flow)
3351                 mlx5_flow->flow_idx = flow_idx;
3352         return mlx5_flow;
3353 }
3354
3355 /**
3356  * Flow driver translation API. This abstracts calling driver specific
3357  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3358  * translates a generic flow into a driver flow. flow_drv_prepare() must
3359  * precede.
3360  *
3361  * @note
3362  *   dev_flow->layers could be filled as a result of parsing during translation
3363  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3364  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3365  *   flow->actions could be overwritten even though all the expanded dev_flows
3366  *   have the same actions.
3367  *
3368  * @param[in] dev
3369  *   Pointer to the rte dev structure.
3370  * @param[in, out] dev_flow
3371  *   Pointer to the mlx5 flow.
3372  * @param[in] attr
3373  *   Pointer to the flow attributes.
3374  * @param[in] items
3375  *   Pointer to the list of items.
3376  * @param[in] actions
3377  *   Pointer to the list of actions.
3378  * @param[out] error
3379  *   Pointer to the error structure.
3380  *
3381  * @return
3382  *   0 on success, a negative errno value otherwise and rte_errno is set.
3383  */
3384 static inline int
3385 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3386                    const struct rte_flow_attr *attr,
3387                    const struct rte_flow_item items[],
3388                    const struct rte_flow_action actions[],
3389                    struct rte_flow_error *error)
3390 {
3391         const struct mlx5_flow_driver_ops *fops;
3392         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3393
3394         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3395         fops = flow_get_drv_ops(type);
3396         return fops->translate(dev, dev_flow, attr, items, actions, error);
3397 }
3398
3399 /**
3400  * Flow driver apply API. This abstracts calling driver specific functions.
3401  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3402  * translated driver flows on to device. flow_drv_translate() must precede.
3403  *
3404  * @param[in] dev
3405  *   Pointer to Ethernet device structure.
3406  * @param[in, out] flow
3407  *   Pointer to flow structure.
3408  * @param[out] error
3409  *   Pointer to error structure.
3410  *
3411  * @return
3412  *   0 on success, a negative errno value otherwise and rte_errno is set.
3413  */
3414 static inline int
3415 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3416                struct rte_flow_error *error)
3417 {
3418         const struct mlx5_flow_driver_ops *fops;
3419         enum mlx5_flow_drv_type type = flow->drv_type;
3420
3421         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3422         fops = flow_get_drv_ops(type);
3423         return fops->apply(dev, flow, error);
3424 }
3425
3426 /**
3427  * Flow driver destroy API. This abstracts calling driver specific functions.
3428  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3429  * on device and releases resources of the flow.
3430  *
3431  * @param[in] dev
3432  *   Pointer to Ethernet device.
3433  * @param[in, out] flow
3434  *   Pointer to flow structure.
3435  */
3436 static inline void
3437 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3438 {
3439         const struct mlx5_flow_driver_ops *fops;
3440         enum mlx5_flow_drv_type type = flow->drv_type;
3441
3442         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3443         fops = flow_get_drv_ops(type);
3444         fops->destroy(dev, flow);
3445 }
3446
3447 /**
3448  * Flow driver find RSS policy tbl API. This abstracts calling driver
3449  * specific functions. Parent flow (rte_flow) should have driver
3450  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3451  *
3452  * @param[in] dev
3453  *   Pointer to Ethernet device.
3454  * @param[in, out] flow
3455  *   Pointer to flow structure.
3456  * @param[in] policy
3457  *   Pointer to meter policy table.
3458  * @param[in] rss_desc
3459  *   Pointer to rss_desc
3460  */
3461 static struct mlx5_flow_meter_sub_policy *
3462 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3463                 struct rte_flow *flow,
3464                 struct mlx5_flow_meter_policy *policy,
3465                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3466 {
3467         const struct mlx5_flow_driver_ops *fops;
3468         enum mlx5_flow_drv_type type = flow->drv_type;
3469
3470         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3471         fops = flow_get_drv_ops(type);
3472         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3473 }
3474
3475 /**
3476  * Flow driver color tag rule API. This abstracts calling driver
3477  * specific functions. Parent flow (rte_flow) should have driver
3478  * type (drv_type). It will create the color tag rules in hierarchy meter.
3479  *
3480  * @param[in] dev
3481  *   Pointer to Ethernet device.
3482  * @param[in, out] flow
3483  *   Pointer to flow structure.
3484  * @param[in] fm
3485  *   Pointer to flow meter structure.
3486  * @param[in] src_port
3487  *   The src port this extra rule should use.
3488  * @param[in] item
3489  *   The src port id match item.
3490  * @param[out] error
3491  *   Pointer to error structure.
3492  */
3493 static int
3494 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3495                 struct rte_flow *flow,
3496                 struct mlx5_flow_meter_info *fm,
3497                 int32_t src_port,
3498                 const struct rte_flow_item *item,
3499                 struct rte_flow_error *error)
3500 {
3501         const struct mlx5_flow_driver_ops *fops;
3502         enum mlx5_flow_drv_type type = flow->drv_type;
3503
3504         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3505         fops = flow_get_drv_ops(type);
3506         return fops->meter_hierarchy_rule_create(dev, fm,
3507                                                 src_port, item, error);
3508 }
3509
3510 /**
3511  * Get RSS action from the action list.
3512  *
3513  * @param[in] dev
3514  *   Pointer to Ethernet device.
3515  * @param[in] actions
3516  *   Pointer to the list of actions.
3517  * @param[in] flow
3518  *   Parent flow structure pointer.
3519  *
3520  * @return
3521  *   Pointer to the RSS action if exist, else return NULL.
3522  */
3523 static const struct rte_flow_action_rss*
3524 flow_get_rss_action(struct rte_eth_dev *dev,
3525                     const struct rte_flow_action actions[])
3526 {
3527         struct mlx5_priv *priv = dev->data->dev_private;
3528         const struct rte_flow_action_rss *rss = NULL;
3529
3530         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3531                 switch (actions->type) {
3532                 case RTE_FLOW_ACTION_TYPE_RSS:
3533                         rss = actions->conf;
3534                         break;
3535                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3536                 {
3537                         const struct rte_flow_action_sample *sample =
3538                                                                 actions->conf;
3539                         const struct rte_flow_action *act = sample->actions;
3540                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3541                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3542                                         rss = act->conf;
3543                         break;
3544                 }
3545                 case RTE_FLOW_ACTION_TYPE_METER:
3546                 {
3547                         uint32_t mtr_idx;
3548                         struct mlx5_flow_meter_info *fm;
3549                         struct mlx5_flow_meter_policy *policy;
3550                         const struct rte_flow_action_meter *mtr = actions->conf;
3551
3552                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3553                         if (fm && !fm->def_policy) {
3554                                 policy = mlx5_flow_meter_policy_find(dev,
3555                                                 fm->policy_id, NULL);
3556                                 MLX5_ASSERT(policy);
3557                                 if (policy->is_hierarchy) {
3558                                         policy =
3559                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3560                                                                         policy);
3561                                         if (!policy)
3562                                                 return NULL;
3563                                 }
3564                                 if (policy->is_rss)
3565                                         rss =
3566                                 policy->act_cnt[RTE_COLOR_GREEN].rss->conf;
3567                         }
3568                         break;
3569                 }
3570                 default:
3571                         break;
3572                 }
3573         }
3574         return rss;
3575 }
3576
3577 /**
3578  * Get ASO age action by index.
3579  *
3580  * @param[in] dev
3581  *   Pointer to the Ethernet device structure.
3582  * @param[in] age_idx
3583  *   Index to the ASO age action.
3584  *
3585  * @return
3586  *   The specified ASO age action.
3587  */
3588 struct mlx5_aso_age_action*
3589 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3590 {
3591         uint16_t pool_idx = age_idx & UINT16_MAX;
3592         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3593         struct mlx5_priv *priv = dev->data->dev_private;
3594         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3595         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3596
3597         return &pool->actions[offset - 1];
3598 }
3599
3600 /* maps indirect action to translated direct in some actions array */
3601 struct mlx5_translated_action_handle {
3602         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3603         int index; /**< Index in related array of rte_flow_action. */
3604 };
3605
3606 /**
3607  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3608  * direct action if translation possible.
3609  * This functionality used to run same execution path for both direct and
3610  * indirect actions on flow create. All necessary preparations for indirect
3611  * action handling should be performed on *handle* actions list returned
3612  * from this call.
3613  *
3614  * @param[in] dev
3615  *   Pointer to Ethernet device.
3616  * @param[in] actions
3617  *   List of actions to translate.
3618  * @param[out] handle
3619  *   List to store translated indirect action object handles.
3620  * @param[in, out] indir_n
3621  *   Size of *handle* array. On return should be updated with number of
3622  *   indirect actions retrieved from the *actions* list.
3623  * @param[out] translated_actions
3624  *   List of actions where all indirect actions were translated to direct
3625  *   if possible. NULL if no translation took place.
3626  * @param[out] error
3627  *   Pointer to the error structure.
3628  *
3629  * @return
3630  *   0 on success, a negative errno value otherwise and rte_errno is set.
3631  */
3632 static int
3633 flow_action_handles_translate(struct rte_eth_dev *dev,
3634                               const struct rte_flow_action actions[],
3635                               struct mlx5_translated_action_handle *handle,
3636                               int *indir_n,
3637                               struct rte_flow_action **translated_actions,
3638                               struct rte_flow_error *error)
3639 {
3640         struct mlx5_priv *priv = dev->data->dev_private;
3641         struct rte_flow_action *translated = NULL;
3642         size_t actions_size;
3643         int n;
3644         int copied_n = 0;
3645         struct mlx5_translated_action_handle *handle_end = NULL;
3646
3647         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3648                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3649                         continue;
3650                 if (copied_n == *indir_n) {
3651                         return rte_flow_error_set
3652                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3653                                  NULL, "too many shared actions");
3654                 }
3655                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3656                            sizeof(actions[n].conf));
3657                 handle[copied_n].index = n;
3658                 copied_n++;
3659         }
3660         n++;
3661         *indir_n = copied_n;
3662         if (!copied_n)
3663                 return 0;
3664         actions_size = sizeof(struct rte_flow_action) * n;
3665         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3666         if (!translated) {
3667                 rte_errno = ENOMEM;
3668                 return -ENOMEM;
3669         }
3670         memcpy(translated, actions, actions_size);
3671         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3672                 struct mlx5_shared_action_rss *shared_rss;
3673                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3674                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3675                 uint32_t idx = act_idx &
3676                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3677
3678                 switch (type) {
3679                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3680                         shared_rss = mlx5_ipool_get
3681                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3682                         translated[handle->index].type =
3683                                 RTE_FLOW_ACTION_TYPE_RSS;
3684                         translated[handle->index].conf =
3685                                 &shared_rss->origin;
3686                         break;
3687                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3688                         translated[handle->index].type =
3689                                                 (enum rte_flow_action_type)
3690                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3691                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3692                         break;
3693                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3694                         if (priv->sh->flow_hit_aso_en) {
3695                                 translated[handle->index].type =
3696                                         (enum rte_flow_action_type)
3697                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3698                                 translated[handle->index].conf =
3699                                                          (void *)(uintptr_t)idx;
3700                                 break;
3701                         }
3702                         /* Fall-through */
3703                 case MLX5_INDIRECT_ACTION_TYPE_CT:
3704                         if (priv->sh->ct_aso_en) {
3705                                 translated[handle->index].type =
3706                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
3707                                 translated[handle->index].conf =
3708                                                          (void *)(uintptr_t)idx;
3709                                 break;
3710                         }
3711                         /* Fall-through */
3712                 default:
3713                         mlx5_free(translated);
3714                         return rte_flow_error_set
3715                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3716                                  NULL, "invalid indirect action type");
3717                 }
3718         }
3719         *translated_actions = translated;
3720         return 0;
3721 }
3722
3723 /**
3724  * Get Shared RSS action from the action list.
3725  *
3726  * @param[in] dev
3727  *   Pointer to Ethernet device.
3728  * @param[in] shared
3729  *   Pointer to the list of actions.
3730  * @param[in] shared_n
3731  *   Actions list length.
3732  *
3733  * @return
3734  *   The MLX5 RSS action ID if exists, otherwise return 0.
3735  */
3736 static uint32_t
3737 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3738                            struct mlx5_translated_action_handle *handle,
3739                            int shared_n)
3740 {
3741         struct mlx5_translated_action_handle *handle_end;
3742         struct mlx5_priv *priv = dev->data->dev_private;
3743         struct mlx5_shared_action_rss *shared_rss;
3744
3745
3746         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3747                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3748                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3749                 uint32_t idx = act_idx &
3750                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3751                 switch (type) {
3752                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3753                         shared_rss = mlx5_ipool_get
3754                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3755                                                                            idx);
3756                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3757                                            __ATOMIC_RELAXED);
3758                         return idx;
3759                 default:
3760                         break;
3761                 }
3762         }
3763         return 0;
3764 }
3765
3766 static unsigned int
3767 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3768 {
3769         const struct rte_flow_item *item;
3770         unsigned int has_vlan = 0;
3771
3772         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3773                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3774                         has_vlan = 1;
3775                         break;
3776                 }
3777         }
3778         if (has_vlan)
3779                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3780                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3781         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3782                                MLX5_EXPANSION_ROOT_OUTER;
3783 }
3784
3785 /**
3786  *  Get layer flags from the prefix flow.
3787  *
3788  *  Some flows may be split to several subflows, the prefix subflow gets the
3789  *  match items and the suffix sub flow gets the actions.
3790  *  Some actions need the user defined match item flags to get the detail for
3791  *  the action.
3792  *  This function helps the suffix flow to get the item layer flags from prefix
3793  *  subflow.
3794  *
3795  * @param[in] dev_flow
3796  *   Pointer the created preifx subflow.
3797  *
3798  * @return
3799  *   The layers get from prefix subflow.
3800  */
3801 static inline uint64_t
3802 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3803 {
3804         uint64_t layers = 0;
3805
3806         /*
3807          * Layers bits could be localization, but usually the compiler will
3808          * help to do the optimization work for source code.
3809          * If no decap actions, use the layers directly.
3810          */
3811         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3812                 return dev_flow->handle->layers;
3813         /* Convert L3 layers with decap action. */
3814         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3815                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3816         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3817                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3818         /* Convert L4 layers with decap action.  */
3819         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3820                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3821         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3822                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3823         return layers;
3824 }
3825
3826 /**
3827  * Get metadata split action information.
3828  *
3829  * @param[in] actions
3830  *   Pointer to the list of actions.
3831  * @param[out] qrss
3832  *   Pointer to the return pointer.
3833  * @param[out] qrss_type
3834  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3835  *   if no QUEUE/RSS is found.
3836  * @param[out] encap_idx
3837  *   Pointer to the index of the encap action if exists, otherwise the last
3838  *   action index.
3839  *
3840  * @return
3841  *   Total number of actions.
3842  */
3843 static int
3844 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3845                                        const struct rte_flow_action **qrss,
3846                                        int *encap_idx)
3847 {
3848         const struct rte_flow_action_raw_encap *raw_encap;
3849         int actions_n = 0;
3850         int raw_decap_idx = -1;
3851
3852         *encap_idx = -1;
3853         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3854                 switch (actions->type) {
3855                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3856                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3857                         *encap_idx = actions_n;
3858                         break;
3859                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3860                         raw_decap_idx = actions_n;
3861                         break;
3862                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3863                         raw_encap = actions->conf;
3864                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3865                                 *encap_idx = raw_decap_idx != -1 ?
3866                                                       raw_decap_idx : actions_n;
3867                         break;
3868                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3869                 case RTE_FLOW_ACTION_TYPE_RSS:
3870                         *qrss = actions;
3871                         break;
3872                 default:
3873                         break;
3874                 }
3875                 actions_n++;
3876         }
3877         if (*encap_idx == -1)
3878                 *encap_idx = actions_n;
3879         /* Count RTE_FLOW_ACTION_TYPE_END. */
3880         return actions_n + 1;
3881 }
3882
3883 /**
3884  * Check if the action will change packet.
3885  *
3886  * @param dev
3887  *   Pointer to Ethernet device.
3888  * @param[in] type
3889  *   action type.
3890  *
3891  * @return
3892  *   true if action will change packet, false otherwise.
3893  */
3894 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
3895                                           enum rte_flow_action_type type)
3896 {
3897         struct mlx5_priv *priv = dev->data->dev_private;
3898
3899         switch (type) {
3900         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3901         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3902         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3903         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3904         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3905         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3906         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3907         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3908         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3909         case RTE_FLOW_ACTION_TYPE_SET_TTL:
3910         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3911         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3912         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3913         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3914         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
3915         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
3916         case RTE_FLOW_ACTION_TYPE_SET_META:
3917         case RTE_FLOW_ACTION_TYPE_SET_TAG:
3918         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3919         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3920         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3921         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3922         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3923         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3924         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3925         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3926         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3927         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3928         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
3929                 return true;
3930         case RTE_FLOW_ACTION_TYPE_FLAG:
3931         case RTE_FLOW_ACTION_TYPE_MARK:
3932                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
3933                         return true;
3934                 else
3935                         return false;
3936         default:
3937                 return false;
3938         }
3939 }
3940
3941 /**
3942  * Check meter action from the action list.
3943  *
3944  * @param dev
3945  *   Pointer to Ethernet device.
3946  * @param[in] actions
3947  *   Pointer to the list of actions.
3948  * @param[out] has_mtr
3949  *   Pointer to the meter exist flag.
3950  * @param[out] has_modify
3951  *   Pointer to the flag showing there's packet change action.
3952  * @param[out] meter_id
3953  *   Pointer to the meter id.
3954  *
3955  * @return
3956  *   Total number of actions.
3957  */
3958 static int
3959 flow_check_meter_action(struct rte_eth_dev *dev,
3960                         const struct rte_flow_action actions[],
3961                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
3962 {
3963         const struct rte_flow_action_meter *mtr = NULL;
3964         int actions_n = 0;
3965
3966         MLX5_ASSERT(has_mtr);
3967         *has_mtr = false;
3968         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3969                 switch (actions->type) {
3970                 case RTE_FLOW_ACTION_TYPE_METER:
3971                         mtr = actions->conf;
3972                         *meter_id = mtr->mtr_id;
3973                         *has_mtr = true;
3974                         break;
3975                 default:
3976                         break;
3977                 }
3978                 if (!*has_mtr)
3979                         *has_modify |= flow_check_modify_action_type(dev,
3980                                                                 actions->type);
3981                 actions_n++;
3982         }
3983         /* Count RTE_FLOW_ACTION_TYPE_END. */
3984         return actions_n + 1;
3985 }
3986
3987 /**
3988  * Check if the flow should be split due to hairpin.
3989  * The reason for the split is that in current HW we can't
3990  * support encap and push-vlan on Rx, so if a flow contains
3991  * these actions we move it to Tx.
3992  *
3993  * @param dev
3994  *   Pointer to Ethernet device.
3995  * @param[in] attr
3996  *   Flow rule attributes.
3997  * @param[in] actions
3998  *   Associated actions (list terminated by the END action).
3999  *
4000  * @return
4001  *   > 0 the number of actions and the flow should be split,
4002  *   0 when no split required.
4003  */
4004 static int
4005 flow_check_hairpin_split(struct rte_eth_dev *dev,
4006                          const struct rte_flow_attr *attr,
4007                          const struct rte_flow_action actions[])
4008 {
4009         int queue_action = 0;
4010         int action_n = 0;
4011         int split = 0;
4012         const struct rte_flow_action_queue *queue;
4013         const struct rte_flow_action_rss *rss;
4014         const struct rte_flow_action_raw_encap *raw_encap;
4015         const struct rte_eth_hairpin_conf *conf;
4016
4017         if (!attr->ingress)
4018                 return 0;
4019         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4020                 switch (actions->type) {
4021                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4022                         queue = actions->conf;
4023                         if (queue == NULL)
4024                                 return 0;
4025                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4026                         if (conf == NULL || conf->tx_explicit != 0)
4027                                 return 0;
4028                         queue_action = 1;
4029                         action_n++;
4030                         break;
4031                 case RTE_FLOW_ACTION_TYPE_RSS:
4032                         rss = actions->conf;
4033                         if (rss == NULL || rss->queue_num == 0)
4034                                 return 0;
4035                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4036                         if (conf == NULL || conf->tx_explicit != 0)
4037                                 return 0;
4038                         queue_action = 1;
4039                         action_n++;
4040                         break;
4041                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4042                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4043                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4044                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4045                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4046                         split++;
4047                         action_n++;
4048                         break;
4049                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4050                         raw_encap = actions->conf;
4051                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4052                                 split++;
4053                         action_n++;
4054                         break;
4055                 default:
4056                         action_n++;
4057                         break;
4058                 }
4059         }
4060         if (split && queue_action)
4061                 return action_n;
4062         return 0;
4063 }
4064
4065 /* Declare flow create/destroy prototype in advance. */
4066 static uint32_t
4067 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4068                  const struct rte_flow_attr *attr,
4069                  const struct rte_flow_item items[],
4070                  const struct rte_flow_action actions[],
4071                  bool external, struct rte_flow_error *error);
4072
4073 static void
4074 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4075                   uint32_t flow_idx);
4076
4077 int
4078 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4079                       struct mlx5_list_entry *entry, void *cb_ctx)
4080 {
4081         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4082         struct mlx5_flow_mreg_copy_resource *mcp_res =
4083                                container_of(entry, typeof(*mcp_res), hlist_ent);
4084
4085         return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4086 }
4087
4088 struct mlx5_list_entry *
4089 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4090 {
4091         struct rte_eth_dev *dev = tool_ctx;
4092         struct mlx5_priv *priv = dev->data->dev_private;
4093         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4094         struct mlx5_flow_mreg_copy_resource *mcp_res;
4095         struct rte_flow_error *error = ctx->error;
4096         uint32_t idx = 0;
4097         int ret;
4098         uint32_t mark_id = *(uint32_t *)(ctx->data);
4099         struct rte_flow_attr attr = {
4100                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4101                 .ingress = 1,
4102         };
4103         struct mlx5_rte_flow_item_tag tag_spec = {
4104                 .data = mark_id,
4105         };
4106         struct rte_flow_item items[] = {
4107                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4108         };
4109         struct rte_flow_action_mark ftag = {
4110                 .id = mark_id,
4111         };
4112         struct mlx5_flow_action_copy_mreg cp_mreg = {
4113                 .dst = REG_B,
4114                 .src = REG_NON,
4115         };
4116         struct rte_flow_action_jump jump = {
4117                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4118         };
4119         struct rte_flow_action actions[] = {
4120                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4121         };
4122
4123         /* Fill the register fileds in the flow. */
4124         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4125         if (ret < 0)
4126                 return NULL;
4127         tag_spec.id = ret;
4128         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4129         if (ret < 0)
4130                 return NULL;
4131         cp_mreg.src = ret;
4132         /* Provide the full width of FLAG specific value. */
4133         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4134                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4135         /* Build a new flow. */
4136         if (mark_id != MLX5_DEFAULT_COPY_ID) {
4137                 items[0] = (struct rte_flow_item){
4138                         .type = (enum rte_flow_item_type)
4139                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4140                         .spec = &tag_spec,
4141                 };
4142                 items[1] = (struct rte_flow_item){
4143                         .type = RTE_FLOW_ITEM_TYPE_END,
4144                 };
4145                 actions[0] = (struct rte_flow_action){
4146                         .type = (enum rte_flow_action_type)
4147                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4148                         .conf = &ftag,
4149                 };
4150                 actions[1] = (struct rte_flow_action){
4151                         .type = (enum rte_flow_action_type)
4152                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4153                         .conf = &cp_mreg,
4154                 };
4155                 actions[2] = (struct rte_flow_action){
4156                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4157                         .conf = &jump,
4158                 };
4159                 actions[3] = (struct rte_flow_action){
4160                         .type = RTE_FLOW_ACTION_TYPE_END,
4161                 };
4162         } else {
4163                 /* Default rule, wildcard match. */
4164                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4165                 items[0] = (struct rte_flow_item){
4166                         .type = RTE_FLOW_ITEM_TYPE_END,
4167                 };
4168                 actions[0] = (struct rte_flow_action){
4169                         .type = (enum rte_flow_action_type)
4170                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4171                         .conf = &cp_mreg,
4172                 };
4173                 actions[1] = (struct rte_flow_action){
4174                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4175                         .conf = &jump,
4176                 };
4177                 actions[2] = (struct rte_flow_action){
4178                         .type = RTE_FLOW_ACTION_TYPE_END,
4179                 };
4180         }
4181         /* Build a new entry. */
4182         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4183         if (!mcp_res) {
4184                 rte_errno = ENOMEM;
4185                 return NULL;
4186         }
4187         mcp_res->idx = idx;
4188         mcp_res->mark_id = mark_id;
4189         /*
4190          * The copy Flows are not included in any list. There
4191          * ones are referenced from other Flows and can not
4192          * be applied, removed, deleted in ardbitrary order
4193          * by list traversing.
4194          */
4195         mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4196                                         &attr, items, actions, false, error);
4197         if (!mcp_res->rix_flow) {
4198                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4199                 return NULL;
4200         }
4201         return &mcp_res->hlist_ent;
4202 }
4203
4204 struct mlx5_list_entry *
4205 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4206                       void *cb_ctx __rte_unused)
4207 {
4208         struct rte_eth_dev *dev = tool_ctx;
4209         struct mlx5_priv *priv = dev->data->dev_private;
4210         struct mlx5_flow_mreg_copy_resource *mcp_res;
4211         uint32_t idx = 0;
4212
4213         mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4214         if (!mcp_res) {
4215                 rte_errno = ENOMEM;
4216                 return NULL;
4217         }
4218         memcpy(mcp_res, oentry, sizeof(*mcp_res));
4219         mcp_res->idx = idx;
4220         return &mcp_res->hlist_ent;
4221 }
4222
4223 void
4224 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4225 {
4226         struct mlx5_flow_mreg_copy_resource *mcp_res =
4227                                container_of(entry, typeof(*mcp_res), hlist_ent);
4228         struct rte_eth_dev *dev = tool_ctx;
4229         struct mlx5_priv *priv = dev->data->dev_private;
4230
4231         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4232 }
4233
4234 /**
4235  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4236  *
4237  * As mark_id is unique, if there's already a registered flow for the mark_id,
4238  * return by increasing the reference counter of the resource. Otherwise, create
4239  * the resource (mcp_res) and flow.
4240  *
4241  * Flow looks like,
4242  *   - If ingress port is ANY and reg_c[1] is mark_id,
4243  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4244  *
4245  * For default flow (zero mark_id), flow is like,
4246  *   - If ingress port is ANY,
4247  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4248  *
4249  * @param dev
4250  *   Pointer to Ethernet device.
4251  * @param mark_id
4252  *   ID of MARK action, zero means default flow for META.
4253  * @param[out] error
4254  *   Perform verbose error reporting if not NULL.
4255  *
4256  * @return
4257  *   Associated resource on success, NULL otherwise and rte_errno is set.
4258  */
4259 static struct mlx5_flow_mreg_copy_resource *
4260 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4261                           struct rte_flow_error *error)
4262 {
4263         struct mlx5_priv *priv = dev->data->dev_private;
4264         struct mlx5_list_entry *entry;
4265         struct mlx5_flow_cb_ctx ctx = {
4266                 .dev = dev,
4267                 .error = error,
4268                 .data = &mark_id,
4269         };
4270
4271         /* Check if already registered. */
4272         MLX5_ASSERT(priv->mreg_cp_tbl);
4273         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4274         if (!entry)
4275                 return NULL;
4276         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4277                             hlist_ent);
4278 }
4279
4280 void
4281 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4282 {
4283         struct mlx5_flow_mreg_copy_resource *mcp_res =
4284                                container_of(entry, typeof(*mcp_res), hlist_ent);
4285         struct rte_eth_dev *dev = tool_ctx;
4286         struct mlx5_priv *priv = dev->data->dev_private;
4287
4288         MLX5_ASSERT(mcp_res->rix_flow);
4289         flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4290         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4291 }
4292
4293 /**
4294  * Release flow in RX_CP_TBL.
4295  *
4296  * @param dev
4297  *   Pointer to Ethernet device.
4298  * @flow
4299  *   Parent flow for wich copying is provided.
4300  */
4301 static void
4302 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4303                           struct rte_flow *flow)
4304 {
4305         struct mlx5_flow_mreg_copy_resource *mcp_res;
4306         struct mlx5_priv *priv = dev->data->dev_private;
4307
4308         if (!flow->rix_mreg_copy)
4309                 return;
4310         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4311                                  flow->rix_mreg_copy);
4312         if (!mcp_res || !priv->mreg_cp_tbl)
4313                 return;
4314         MLX5_ASSERT(mcp_res->rix_flow);
4315         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4316         flow->rix_mreg_copy = 0;
4317 }
4318
4319 /**
4320  * Remove the default copy action from RX_CP_TBL.
4321  *
4322  * This functions is called in the mlx5_dev_start(). No thread safe
4323  * is guaranteed.
4324  *
4325  * @param dev
4326  *   Pointer to Ethernet device.
4327  */
4328 static void
4329 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4330 {
4331         struct mlx5_list_entry *entry;
4332         struct mlx5_priv *priv = dev->data->dev_private;
4333         struct mlx5_flow_cb_ctx ctx;
4334         uint32_t mark_id;
4335
4336         /* Check if default flow is registered. */
4337         if (!priv->mreg_cp_tbl)
4338                 return;
4339         mark_id = MLX5_DEFAULT_COPY_ID;
4340         ctx.data = &mark_id;
4341         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4342         if (!entry)
4343                 return;
4344         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4345 }
4346
4347 /**
4348  * Add the default copy action in in RX_CP_TBL.
4349  *
4350  * This functions is called in the mlx5_dev_start(). No thread safe
4351  * is guaranteed.
4352  *
4353  * @param dev
4354  *   Pointer to Ethernet device.
4355  * @param[out] error
4356  *   Perform verbose error reporting if not NULL.
4357  *
4358  * @return
4359  *   0 for success, negative value otherwise and rte_errno is set.
4360  */
4361 static int
4362 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4363                                   struct rte_flow_error *error)
4364 {
4365         struct mlx5_priv *priv = dev->data->dev_private;
4366         struct mlx5_flow_mreg_copy_resource *mcp_res;
4367         struct mlx5_flow_cb_ctx ctx;
4368         uint32_t mark_id;
4369
4370         /* Check whether extensive metadata feature is engaged. */
4371         if (!priv->config.dv_flow_en ||
4372             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4373             !mlx5_flow_ext_mreg_supported(dev) ||
4374             !priv->sh->dv_regc0_mask)
4375                 return 0;
4376         /*
4377          * Add default mreg copy flow may be called multiple time, but
4378          * only be called once in stop. Avoid register it twice.
4379          */
4380         mark_id = MLX5_DEFAULT_COPY_ID;
4381         ctx.data = &mark_id;
4382         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4383                 return 0;
4384         mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4385         if (!mcp_res)
4386                 return -rte_errno;
4387         return 0;
4388 }
4389
4390 /**
4391  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4392  *
4393  * All the flow having Q/RSS action should be split by
4394  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4395  * performs the following,
4396  *   - CQE->flow_tag := reg_c[1] (MARK)
4397  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4398  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4399  * but there should be a flow per each MARK ID set by MARK action.
4400  *
4401  * For the aforementioned reason, if there's a MARK action in flow's action
4402  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4403  * the MARK ID to CQE's flow_tag like,
4404  *   - If reg_c[1] is mark_id,
4405  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4406  *
4407  * For SET_META action which stores value in reg_c[0], as the destination is
4408  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4409  * MARK ID means the default flow. The default flow looks like,
4410  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4411  *
4412  * @param dev
4413  *   Pointer to Ethernet device.
4414  * @param flow
4415  *   Pointer to flow structure.
4416  * @param[in] actions
4417  *   Pointer to the list of actions.
4418  * @param[out] error
4419  *   Perform verbose error reporting if not NULL.
4420  *
4421  * @return
4422  *   0 on success, negative value otherwise and rte_errno is set.
4423  */
4424 static int
4425 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4426                             struct rte_flow *flow,
4427                             const struct rte_flow_action *actions,
4428                             struct rte_flow_error *error)
4429 {
4430         struct mlx5_priv *priv = dev->data->dev_private;
4431         struct mlx5_dev_config *config = &priv->config;
4432         struct mlx5_flow_mreg_copy_resource *mcp_res;
4433         const struct rte_flow_action_mark *mark;
4434
4435         /* Check whether extensive metadata feature is engaged. */
4436         if (!config->dv_flow_en ||
4437             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4438             !mlx5_flow_ext_mreg_supported(dev) ||
4439             !priv->sh->dv_regc0_mask)
4440                 return 0;
4441         /* Find MARK action. */
4442         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4443                 switch (actions->type) {
4444                 case RTE_FLOW_ACTION_TYPE_FLAG:
4445                         mcp_res = flow_mreg_add_copy_action
4446                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4447                         if (!mcp_res)
4448                                 return -rte_errno;
4449                         flow->rix_mreg_copy = mcp_res->idx;
4450                         return 0;
4451                 case RTE_FLOW_ACTION_TYPE_MARK:
4452                         mark = (const struct rte_flow_action_mark *)
4453                                 actions->conf;
4454                         mcp_res =
4455                                 flow_mreg_add_copy_action(dev, mark->id, error);
4456                         if (!mcp_res)
4457                                 return -rte_errno;
4458                         flow->rix_mreg_copy = mcp_res->idx;
4459                         return 0;
4460                 default:
4461                         break;
4462                 }
4463         }
4464         return 0;
4465 }
4466
4467 #define MLX5_MAX_SPLIT_ACTIONS 24
4468 #define MLX5_MAX_SPLIT_ITEMS 24
4469
4470 /**
4471  * Split the hairpin flow.
4472  * Since HW can't support encap and push-vlan on Rx, we move these
4473  * actions to Tx.
4474  * If the count action is after the encap then we also
4475  * move the count action. in this case the count will also measure
4476  * the outer bytes.
4477  *
4478  * @param dev
4479  *   Pointer to Ethernet device.
4480  * @param[in] actions
4481  *   Associated actions (list terminated by the END action).
4482  * @param[out] actions_rx
4483  *   Rx flow actions.
4484  * @param[out] actions_tx
4485  *   Tx flow actions..
4486  * @param[out] pattern_tx
4487  *   The pattern items for the Tx flow.
4488  * @param[out] flow_id
4489  *   The flow ID connected to this flow.
4490  *
4491  * @return
4492  *   0 on success.
4493  */
4494 static int
4495 flow_hairpin_split(struct rte_eth_dev *dev,
4496                    const struct rte_flow_action actions[],
4497                    struct rte_flow_action actions_rx[],
4498                    struct rte_flow_action actions_tx[],
4499                    struct rte_flow_item pattern_tx[],
4500                    uint32_t flow_id)
4501 {
4502         const struct rte_flow_action_raw_encap *raw_encap;
4503         const struct rte_flow_action_raw_decap *raw_decap;
4504         struct mlx5_rte_flow_action_set_tag *set_tag;
4505         struct rte_flow_action *tag_action;
4506         struct mlx5_rte_flow_item_tag *tag_item;
4507         struct rte_flow_item *item;
4508         char *addr;
4509         int encap = 0;
4510
4511         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4512                 switch (actions->type) {
4513                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4514                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4515                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4516                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4517                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4518                         rte_memcpy(actions_tx, actions,
4519                                sizeof(struct rte_flow_action));
4520                         actions_tx++;
4521                         break;
4522                 case RTE_FLOW_ACTION_TYPE_COUNT:
4523                         if (encap) {
4524                                 rte_memcpy(actions_tx, actions,
4525                                            sizeof(struct rte_flow_action));
4526                                 actions_tx++;
4527                         } else {
4528                                 rte_memcpy(actions_rx, actions,
4529                                            sizeof(struct rte_flow_action));
4530                                 actions_rx++;
4531                         }
4532                         break;
4533                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4534                         raw_encap = actions->conf;
4535                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4536                                 memcpy(actions_tx, actions,
4537                                        sizeof(struct rte_flow_action));
4538                                 actions_tx++;
4539                                 encap = 1;
4540                         } else {
4541                                 rte_memcpy(actions_rx, actions,
4542                                            sizeof(struct rte_flow_action));
4543                                 actions_rx++;
4544                         }
4545                         break;
4546                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4547                         raw_decap = actions->conf;
4548                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4549                                 memcpy(actions_tx, actions,
4550                                        sizeof(struct rte_flow_action));
4551                                 actions_tx++;
4552                         } else {
4553                                 rte_memcpy(actions_rx, actions,
4554                                            sizeof(struct rte_flow_action));
4555                                 actions_rx++;
4556                         }
4557                         break;
4558                 default:
4559                         rte_memcpy(actions_rx, actions,
4560                                    sizeof(struct rte_flow_action));
4561                         actions_rx++;
4562                         break;
4563                 }
4564         }
4565         /* Add set meta action and end action for the Rx flow. */
4566         tag_action = actions_rx;
4567         tag_action->type = (enum rte_flow_action_type)
4568                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4569         actions_rx++;
4570         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4571         actions_rx++;
4572         set_tag = (void *)actions_rx;
4573         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4574                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4575                 .data = flow_id,
4576         };
4577         MLX5_ASSERT(set_tag->id > REG_NON);
4578         tag_action->conf = set_tag;
4579         /* Create Tx item list. */
4580         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4581         addr = (void *)&pattern_tx[2];
4582         item = pattern_tx;
4583         item->type = (enum rte_flow_item_type)
4584                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4585         tag_item = (void *)addr;
4586         tag_item->data = flow_id;
4587         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4588         MLX5_ASSERT(set_tag->id > REG_NON);
4589         item->spec = tag_item;
4590         addr += sizeof(struct mlx5_rte_flow_item_tag);
4591         tag_item = (void *)addr;
4592         tag_item->data = UINT32_MAX;
4593         tag_item->id = UINT16_MAX;
4594         item->mask = tag_item;
4595         item->last = NULL;
4596         item++;
4597         item->type = RTE_FLOW_ITEM_TYPE_END;
4598         return 0;
4599 }
4600
4601 /**
4602  * The last stage of splitting chain, just creates the subflow
4603  * without any modification.
4604  *
4605  * @param[in] dev
4606  *   Pointer to Ethernet device.
4607  * @param[in] flow
4608  *   Parent flow structure pointer.
4609  * @param[in, out] sub_flow
4610  *   Pointer to return the created subflow, may be NULL.
4611  * @param[in] attr
4612  *   Flow rule attributes.
4613  * @param[in] items
4614  *   Pattern specification (list terminated by the END pattern item).
4615  * @param[in] actions
4616  *   Associated actions (list terminated by the END action).
4617  * @param[in] flow_split_info
4618  *   Pointer to flow split info structure.
4619  * @param[out] error
4620  *   Perform verbose error reporting if not NULL.
4621  * @return
4622  *   0 on success, negative value otherwise
4623  */
4624 static int
4625 flow_create_split_inner(struct rte_eth_dev *dev,
4626                         struct rte_flow *flow,
4627                         struct mlx5_flow **sub_flow,
4628                         const struct rte_flow_attr *attr,
4629                         const struct rte_flow_item items[],
4630                         const struct rte_flow_action actions[],
4631                         struct mlx5_flow_split_info *flow_split_info,
4632                         struct rte_flow_error *error)
4633 {
4634         struct mlx5_flow *dev_flow;
4635
4636         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4637                                     flow_split_info->flow_idx, error);
4638         if (!dev_flow)
4639                 return -rte_errno;
4640         dev_flow->flow = flow;
4641         dev_flow->external = flow_split_info->external;
4642         dev_flow->skip_scale = flow_split_info->skip_scale;
4643         /* Subflow object was created, we must include one in the list. */
4644         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4645                       dev_flow->handle, next);
4646         /*
4647          * If dev_flow is as one of the suffix flow, some actions in suffix
4648          * flow may need some user defined item layer flags, and pass the
4649          * Metadate rxq mark flag to suffix flow as well.
4650          */
4651         if (flow_split_info->prefix_layers)
4652                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4653         if (flow_split_info->prefix_mark)
4654                 dev_flow->handle->mark = 1;
4655         if (sub_flow)
4656                 *sub_flow = dev_flow;
4657 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4658         dev_flow->dv.table_id = flow_split_info->table_id;
4659 #endif
4660         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4661 }
4662
4663 /**
4664  * Get the sub policy of a meter.
4665  *
4666  * @param[in] dev
4667  *   Pointer to Ethernet device.
4668  * @param[in] flow
4669  *   Parent flow structure pointer.
4670  * @param wks
4671  *   Pointer to thread flow work space.
4672  * @param[in] attr
4673  *   Flow rule attributes.
4674  * @param[in] items
4675  *   Pattern specification (list terminated by the END pattern item).
4676  * @param[out] error
4677  *   Perform verbose error reporting if not NULL.
4678  *
4679  * @return
4680  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4681  */
4682 static struct mlx5_flow_meter_sub_policy *
4683 get_meter_sub_policy(struct rte_eth_dev *dev,
4684                      struct rte_flow *flow,
4685                      struct mlx5_flow_workspace *wks,
4686                      const struct rte_flow_attr *attr,
4687                      const struct rte_flow_item items[],
4688                      struct rte_flow_error *error)
4689 {
4690         struct mlx5_flow_meter_policy *policy;
4691         struct mlx5_flow_meter_policy *final_policy;
4692         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4693
4694         policy = wks->policy;
4695         final_policy = policy->is_hierarchy ? wks->final_policy : policy;
4696         if (final_policy->is_rss || final_policy->is_queue) {
4697                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4698                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4699                 uint32_t i;
4700
4701                 /*
4702                  * This is a tmp dev_flow,
4703                  * no need to register any matcher for it in translate.
4704                  */
4705                 wks->skip_matcher_reg = 1;
4706                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4707                         struct mlx5_flow dev_flow = {0};
4708                         struct mlx5_flow_handle dev_handle = { {0} };
4709                         uint8_t fate = final_policy->act_cnt[i].fate_action;
4710
4711                         if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
4712                                 const void *rss_act =
4713                                         final_policy->act_cnt[i].rss->conf;
4714                                 struct rte_flow_action rss_actions[2] = {
4715                                         [0] = {
4716                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4717                                         .conf = rss_act,
4718                                         },
4719                                         [1] = {
4720                                         .type = RTE_FLOW_ACTION_TYPE_END,
4721                                         .conf = NULL,
4722                                         }
4723                                 };
4724
4725                                 dev_flow.handle = &dev_handle;
4726                                 dev_flow.ingress = attr->ingress;
4727                                 dev_flow.flow = flow;
4728                                 dev_flow.external = 0;
4729 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4730                                 dev_flow.dv.transfer = attr->transfer;
4731 #endif
4732                                 /**
4733                                  * Translate RSS action to get rss hash fields.
4734                                  */
4735                                 if (flow_drv_translate(dev, &dev_flow, attr,
4736                                                 items, rss_actions, error))
4737                                         goto exit;
4738                                 rss_desc_v[i] = wks->rss_desc;
4739                                 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4740                                 rss_desc_v[i].hash_fields =
4741                                                 dev_flow.hash_fields;
4742                                 rss_desc_v[i].queue_num =
4743                                                 rss_desc_v[i].hash_fields ?
4744                                                 rss_desc_v[i].queue_num : 1;
4745                                 rss_desc_v[i].tunnel =
4746                                                 !!(dev_flow.handle->layers &
4747                                                    MLX5_FLOW_LAYER_TUNNEL);
4748                                 rss_desc[i] = &rss_desc_v[i];
4749                         } else if (fate == MLX5_FLOW_FATE_QUEUE) {
4750                                 /* This is queue action. */
4751                                 rss_desc_v[i] = wks->rss_desc;
4752                                 rss_desc_v[i].key_len = 0;
4753                                 rss_desc_v[i].hash_fields = 0;
4754                                 rss_desc_v[i].queue =
4755                                         &final_policy->act_cnt[i].queue;
4756                                 rss_desc_v[i].queue_num = 1;
4757                                 rss_desc[i] = &rss_desc_v[i];
4758                         } else {
4759                                 rss_desc[i] = NULL;
4760                         }
4761                 }
4762                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4763                                                 flow, policy, rss_desc);
4764         } else {
4765                 enum mlx5_meter_domain mtr_domain =
4766                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4767                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4768                                                 MLX5_MTR_DOMAIN_INGRESS);
4769                 sub_policy = policy->sub_policys[mtr_domain][0];
4770         }
4771         if (!sub_policy)
4772                 rte_flow_error_set(error, EINVAL,
4773                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4774                                    "Failed to get meter sub-policy.");
4775 exit:
4776         return sub_policy;
4777 }
4778
4779 /**
4780  * Split the meter flow.
4781  *
4782  * As meter flow will split to three sub flow, other than meter
4783  * action, the other actions make sense to only meter accepts
4784  * the packet. If it need to be dropped, no other additional
4785  * actions should be take.
4786  *
4787  * One kind of special action which decapsulates the L3 tunnel
4788  * header will be in the prefix sub flow, as not to take the
4789  * L3 tunnel header into account.
4790  *
4791  * @param[in] dev
4792  *   Pointer to Ethernet device.
4793  * @param[in] flow
4794  *   Parent flow structure pointer.
4795  * @param wks
4796  *   Pointer to thread flow work space.
4797  * @param[in] attr
4798  *   Flow rule attributes.
4799  * @param[in] items
4800  *   Pattern specification (list terminated by the END pattern item).
4801  * @param[out] sfx_items
4802  *   Suffix flow match items (list terminated by the END pattern item).
4803  * @param[in] actions
4804  *   Associated actions (list terminated by the END action).
4805  * @param[out] actions_sfx
4806  *   Suffix flow actions.
4807  * @param[out] actions_pre
4808  *   Prefix flow actions.
4809  * @param[out] mtr_flow_id
4810  *   Pointer to meter flow id.
4811  * @param[out] error
4812  *   Perform verbose error reporting if not NULL.
4813  *
4814  * @return
4815  *   0 on success, a negative errno value otherwise and rte_errno is set.
4816  */
4817 static int
4818 flow_meter_split_prep(struct rte_eth_dev *dev,
4819                       struct rte_flow *flow,
4820                       struct mlx5_flow_workspace *wks,
4821                       const struct rte_flow_attr *attr,
4822                       const struct rte_flow_item items[],
4823                       struct rte_flow_item sfx_items[],
4824                       const struct rte_flow_action actions[],
4825                       struct rte_flow_action actions_sfx[],
4826                       struct rte_flow_action actions_pre[],
4827                       uint32_t *mtr_flow_id,
4828                       struct rte_flow_error *error)
4829 {
4830         struct mlx5_priv *priv = dev->data->dev_private;
4831         struct mlx5_flow_meter_info *fm = wks->fm;
4832         struct rte_flow_action *tag_action = NULL;
4833         struct rte_flow_item *tag_item;
4834         struct mlx5_rte_flow_action_set_tag *set_tag;
4835         const struct rte_flow_action_raw_encap *raw_encap;
4836         const struct rte_flow_action_raw_decap *raw_decap;
4837         struct mlx5_rte_flow_item_tag *tag_item_spec;
4838         struct mlx5_rte_flow_item_tag *tag_item_mask;
4839         uint32_t tag_id = 0;
4840         struct rte_flow_item *vlan_item_dst = NULL;
4841         const struct rte_flow_item *vlan_item_src = NULL;
4842         struct rte_flow_action *hw_mtr_action;
4843         struct rte_flow_action *action_pre_head = NULL;
4844         int32_t flow_src_port = priv->representor_id;
4845         bool mtr_first;
4846         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
4847         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
4848                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
4849         uint32_t flow_id = 0;
4850         uint32_t flow_id_reversed = 0;
4851         uint8_t flow_id_bits = 0;
4852         int shift;
4853
4854         /* Prepare the suffix subflow items. */
4855         tag_item = sfx_items++;
4856         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4857                 struct mlx5_priv *port_priv;
4858                 const struct rte_flow_item_port_id *pid_v;
4859                 int item_type = items->type;
4860
4861                 switch (item_type) {
4862                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4863                         pid_v = items->spec;
4864                         MLX5_ASSERT(pid_v);
4865                         port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
4866                         if (!port_priv)
4867                                 return rte_flow_error_set(error,
4868                                                 rte_errno,
4869                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
4870                                                 pid_v,
4871                                                 "Failed to get port info.");
4872                         flow_src_port = port_priv->representor_id;
4873                         if (!fm->def_policy && wks->policy->is_hierarchy &&
4874                             flow_src_port != priv->representor_id) {
4875                                 if (flow_drv_mtr_hierarchy_rule_create(dev,
4876                                                                 flow, fm,
4877                                                                 flow_src_port,
4878                                                                 items,
4879                                                                 error))
4880                                         return -rte_errno;
4881                         }
4882                         memcpy(sfx_items, items, sizeof(*sfx_items));
4883                         sfx_items++;
4884                         break;
4885                 case RTE_FLOW_ITEM_TYPE_VLAN:
4886                         /* Determine if copy vlan item below. */
4887                         vlan_item_src = items;
4888                         vlan_item_dst = sfx_items++;
4889                         vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
4890                         break;
4891                 default:
4892                         break;
4893                 }
4894         }
4895         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4896         sfx_items++;
4897         mtr_first = priv->sh->meter_aso_en &&
4898                 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
4899         /* For ASO meter, meter must be before tag in TX direction. */
4900         if (mtr_first) {
4901                 action_pre_head = actions_pre++;
4902                 /* Leave space for tag action. */
4903                 tag_action = actions_pre++;
4904         }
4905         /* Prepare the actions for prefix and suffix flow. */
4906         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4907                 struct rte_flow_action *action_cur = NULL;
4908
4909                 switch (actions->type) {
4910                 case RTE_FLOW_ACTION_TYPE_METER:
4911                         if (mtr_first) {
4912                                 action_cur = action_pre_head;
4913                         } else {
4914                                 /* Leave space for tag action. */
4915                                 tag_action = actions_pre++;
4916                                 action_cur = actions_pre++;
4917                         }
4918                         break;
4919                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4920                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4921                         action_cur = actions_pre++;
4922                         break;
4923                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4924                         raw_encap = actions->conf;
4925                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4926                                 action_cur = actions_pre++;
4927                         break;
4928                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4929                         raw_decap = actions->conf;
4930                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4931                                 action_cur = actions_pre++;
4932                         break;
4933                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4934                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4935                         if (vlan_item_dst && vlan_item_src) {
4936                                 memcpy(vlan_item_dst, vlan_item_src,
4937                                         sizeof(*vlan_item_dst));
4938                                 /*
4939                                  * Convert to internal match item, it is used
4940                                  * for vlan push and set vid.
4941                                  */
4942                                 vlan_item_dst->type = (enum rte_flow_item_type)
4943                                                 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4944                         }
4945                         break;
4946                 default:
4947                         break;
4948                 }
4949                 if (!action_cur)
4950                         action_cur = (fm->def_policy) ?
4951                                         actions_sfx++ : actions_pre++;
4952                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
4953         }
4954         /* Add end action to the actions. */
4955         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4956         if (priv->sh->meter_aso_en) {
4957                 /**
4958                  * For ASO meter, need to add an extra jump action explicitly,
4959                  * to jump from meter to policer table.
4960                  */
4961                 struct mlx5_flow_meter_sub_policy *sub_policy;
4962                 struct mlx5_flow_tbl_data_entry *tbl_data;
4963
4964                 if (!fm->def_policy) {
4965                         sub_policy = get_meter_sub_policy(dev, flow, wks,
4966                                                           attr, items, error);
4967                         if (!sub_policy)
4968                                 return -rte_errno;
4969                 } else {
4970                         enum mlx5_meter_domain mtr_domain =
4971                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4972                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4973                                                 MLX5_MTR_DOMAIN_INGRESS);
4974
4975                         sub_policy =
4976                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
4977                 }
4978                 tbl_data = container_of(sub_policy->tbl_rsc,
4979                                         struct mlx5_flow_tbl_data_entry, tbl);
4980                 hw_mtr_action = actions_pre++;
4981                 hw_mtr_action->type = (enum rte_flow_action_type)
4982                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
4983                 hw_mtr_action->conf = tbl_data->jump.action;
4984         }
4985         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4986         actions_pre++;
4987         if (!tag_action)
4988                 return rte_flow_error_set(error, ENOMEM,
4989                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4990                                           NULL, "No tag action space.");
4991         if (!mtr_flow_id) {
4992                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
4993                 goto exit;
4994         }
4995         /* Only default-policy Meter creates mtr flow id. */
4996         if (fm->def_policy) {
4997                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
4998                 if (!tag_id)
4999                         return rte_flow_error_set(error, ENOMEM,
5000                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5001                                         "Failed to allocate meter flow id.");
5002                 flow_id = tag_id - 1;
5003                 flow_id_bits = (!flow_id) ? 1 :
5004                                 (MLX5_REG_BITS - __builtin_clz(flow_id));
5005                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
5006                     mtr_reg_bits) {
5007                         mlx5_ipool_free(fm->flow_ipool, tag_id);
5008                         return rte_flow_error_set(error, EINVAL,
5009                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5010                                         "Meter flow id exceeds max limit.");
5011                 }
5012                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5013                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5014         }
5015         /* Build tag actions and items for meter_id/meter flow_id. */
5016         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5017         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5018         tag_item_mask = tag_item_spec + 1;
5019         /* Both flow_id and meter_id share the same register. */
5020         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5021                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5022                                                             0, error),
5023                 .offset = mtr_id_offset,
5024                 .length = mtr_reg_bits,
5025                 .data = flow->meter,
5026         };
5027         /*
5028          * The color Reg bits used by flow_id are growing from
5029          * msb to lsb, so must do bit reverse for flow_id val in RegC.
5030          */
5031         for (shift = 0; shift < flow_id_bits; shift++)
5032                 flow_id_reversed = (flow_id_reversed << 1) |
5033                                 ((flow_id >> shift) & 0x1);
5034         set_tag->data |=
5035                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5036         tag_item_spec->id = set_tag->id;
5037         tag_item_spec->data = set_tag->data << mtr_id_offset;
5038         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5039         tag_action->type = (enum rte_flow_action_type)
5040                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5041         tag_action->conf = set_tag;
5042         tag_item->type = (enum rte_flow_item_type)
5043                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5044         tag_item->spec = tag_item_spec;
5045         tag_item->last = NULL;
5046         tag_item->mask = tag_item_mask;
5047 exit:
5048         if (mtr_flow_id)
5049                 *mtr_flow_id = tag_id;
5050         return 0;
5051 }
5052
5053 /**
5054  * Split action list having QUEUE/RSS for metadata register copy.
5055  *
5056  * Once Q/RSS action is detected in user's action list, the flow action
5057  * should be split in order to copy metadata registers, which will happen in
5058  * RX_CP_TBL like,
5059  *   - CQE->flow_tag := reg_c[1] (MARK)
5060  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5061  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5062  * This is because the last action of each flow must be a terminal action
5063  * (QUEUE, RSS or DROP).
5064  *
5065  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5066  * stored and kept in the mlx5_flow structure per each sub_flow.
5067  *
5068  * The Q/RSS action is replaced with,
5069  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
5070  * And the following JUMP action is added at the end,
5071  *   - JUMP, to RX_CP_TBL.
5072  *
5073  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5074  * flow_create_split_metadata() routine. The flow will look like,
5075  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
5076  *
5077  * @param dev
5078  *   Pointer to Ethernet device.
5079  * @param[out] split_actions
5080  *   Pointer to store split actions to jump to CP_TBL.
5081  * @param[in] actions
5082  *   Pointer to the list of original flow actions.
5083  * @param[in] qrss
5084  *   Pointer to the Q/RSS action.
5085  * @param[in] actions_n
5086  *   Number of original actions.
5087  * @param[out] error
5088  *   Perform verbose error reporting if not NULL.
5089  *
5090  * @return
5091  *   non-zero unique flow_id on success, otherwise 0 and
5092  *   error/rte_error are set.
5093  */
5094 static uint32_t
5095 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5096                           struct rte_flow_action *split_actions,
5097                           const struct rte_flow_action *actions,
5098                           const struct rte_flow_action *qrss,
5099                           int actions_n, struct rte_flow_error *error)
5100 {
5101         struct mlx5_priv *priv = dev->data->dev_private;
5102         struct mlx5_rte_flow_action_set_tag *set_tag;
5103         struct rte_flow_action_jump *jump;
5104         const int qrss_idx = qrss - actions;
5105         uint32_t flow_id = 0;
5106         int ret = 0;
5107
5108         /*
5109          * Given actions will be split
5110          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5111          * - Add jump to mreg CP_TBL.
5112          * As a result, there will be one more action.
5113          */
5114         ++actions_n;
5115         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5116         set_tag = (void *)(split_actions + actions_n);
5117         /*
5118          * If tag action is not set to void(it means we are not the meter
5119          * suffix flow), add the tag action. Since meter suffix flow already
5120          * has the tag added.
5121          */
5122         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
5123                 /*
5124                  * Allocate the new subflow ID. This one is unique within
5125                  * device and not shared with representors. Otherwise,
5126                  * we would have to resolve multi-thread access synch
5127                  * issue. Each flow on the shared device is appended
5128                  * with source vport identifier, so the resulting
5129                  * flows will be unique in the shared (by master and
5130                  * representors) domain even if they have coinciding
5131                  * IDs.
5132                  */
5133                 mlx5_ipool_malloc(priv->sh->ipool
5134                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5135                 if (!flow_id)
5136                         return rte_flow_error_set(error, ENOMEM,
5137                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5138                                                   NULL, "can't allocate id "
5139                                                   "for split Q/RSS subflow");
5140                 /* Internal SET_TAG action to set flow ID. */
5141                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5142                         .data = flow_id,
5143                 };
5144                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5145                 if (ret < 0)
5146                         return ret;
5147                 set_tag->id = ret;
5148                 /* Construct new actions array. */
5149                 /* Replace QUEUE/RSS action. */
5150                 split_actions[qrss_idx] = (struct rte_flow_action){
5151                         .type = (enum rte_flow_action_type)
5152                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5153                         .conf = set_tag,
5154                 };
5155         }
5156         /* JUMP action to jump to mreg copy table (CP_TBL). */
5157         jump = (void *)(set_tag + 1);
5158         *jump = (struct rte_flow_action_jump){
5159                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5160         };
5161         split_actions[actions_n - 2] = (struct rte_flow_action){
5162                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5163                 .conf = jump,
5164         };
5165         split_actions[actions_n - 1] = (struct rte_flow_action){
5166                 .type = RTE_FLOW_ACTION_TYPE_END,
5167         };
5168         return flow_id;
5169 }
5170
5171 /**
5172  * Extend the given action list for Tx metadata copy.
5173  *
5174  * Copy the given action list to the ext_actions and add flow metadata register
5175  * copy action in order to copy reg_a set by WQE to reg_c[0].
5176  *
5177  * @param[out] ext_actions
5178  *   Pointer to the extended action list.
5179  * @param[in] actions
5180  *   Pointer to the list of actions.
5181  * @param[in] actions_n
5182  *   Number of actions in the list.
5183  * @param[out] error
5184  *   Perform verbose error reporting if not NULL.
5185  * @param[in] encap_idx
5186  *   The encap action inndex.
5187  *
5188  * @return
5189  *   0 on success, negative value otherwise
5190  */
5191 static int
5192 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5193                        struct rte_flow_action *ext_actions,
5194                        const struct rte_flow_action *actions,
5195                        int actions_n, struct rte_flow_error *error,
5196                        int encap_idx)
5197 {
5198         struct mlx5_flow_action_copy_mreg *cp_mreg =
5199                 (struct mlx5_flow_action_copy_mreg *)
5200                         (ext_actions + actions_n + 1);
5201         int ret;
5202
5203         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5204         if (ret < 0)
5205                 return ret;
5206         cp_mreg->dst = ret;
5207         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5208         if (ret < 0)
5209                 return ret;
5210         cp_mreg->src = ret;
5211         if (encap_idx != 0)
5212                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5213         if (encap_idx == actions_n - 1) {
5214                 ext_actions[actions_n - 1] = (struct rte_flow_action){
5215                         .type = (enum rte_flow_action_type)
5216                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5217                         .conf = cp_mreg,
5218                 };
5219                 ext_actions[actions_n] = (struct rte_flow_action){
5220                         .type = RTE_FLOW_ACTION_TYPE_END,
5221                 };
5222         } else {
5223                 ext_actions[encap_idx] = (struct rte_flow_action){
5224                         .type = (enum rte_flow_action_type)
5225                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5226                         .conf = cp_mreg,
5227                 };
5228                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5229                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5230         }
5231         return 0;
5232 }
5233
5234 /**
5235  * Check the match action from the action list.
5236  *
5237  * @param[in] actions
5238  *   Pointer to the list of actions.
5239  * @param[in] attr
5240  *   Flow rule attributes.
5241  * @param[in] action
5242  *   The action to be check if exist.
5243  * @param[out] match_action_pos
5244  *   Pointer to the position of the matched action if exists, otherwise is -1.
5245  * @param[out] qrss_action_pos
5246  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5247  * @param[out] modify_after_mirror
5248  *   Pointer to the flag of modify action after FDB mirroring.
5249  *
5250  * @return
5251  *   > 0 the total number of actions.
5252  *   0 if not found match action in action list.
5253  */
5254 static int
5255 flow_check_match_action(const struct rte_flow_action actions[],
5256                         const struct rte_flow_attr *attr,
5257                         enum rte_flow_action_type action,
5258                         int *match_action_pos, int *qrss_action_pos,
5259                         int *modify_after_mirror)
5260 {
5261         const struct rte_flow_action_sample *sample;
5262         int actions_n = 0;
5263         uint32_t ratio = 0;
5264         int sub_type = 0;
5265         int flag = 0;
5266         int fdb_mirror = 0;
5267
5268         *match_action_pos = -1;
5269         *qrss_action_pos = -1;
5270         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5271                 if (actions->type == action) {
5272                         flag = 1;
5273                         *match_action_pos = actions_n;
5274                 }
5275                 switch (actions->type) {
5276                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5277                 case RTE_FLOW_ACTION_TYPE_RSS:
5278                         *qrss_action_pos = actions_n;
5279                         break;
5280                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5281                         sample = actions->conf;
5282                         ratio = sample->ratio;
5283                         sub_type = ((const struct rte_flow_action *)
5284                                         (sample->actions))->type;
5285                         if (ratio == 1 && attr->transfer)
5286                                 fdb_mirror = 1;
5287                         break;
5288                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5289                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5290                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5291                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5292                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5293                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5294                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5295                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5296                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5297                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5298                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5299                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5300                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5301                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5302                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5303                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5304                 case RTE_FLOW_ACTION_TYPE_FLAG:
5305                 case RTE_FLOW_ACTION_TYPE_MARK:
5306                 case RTE_FLOW_ACTION_TYPE_SET_META:
5307                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5308                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5309                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5310                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5311                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5312                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5313                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5314                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5315                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5316                 case RTE_FLOW_ACTION_TYPE_METER:
5317                         if (fdb_mirror)
5318                                 *modify_after_mirror = 1;
5319                         break;
5320                 default:
5321                         break;
5322                 }
5323                 actions_n++;
5324         }
5325         if (flag && fdb_mirror && !*modify_after_mirror) {
5326                 /* FDB mirroring uses the destination array to implement
5327                  * instead of FLOW_SAMPLER object.
5328                  */
5329                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5330                         flag = 0;
5331         }
5332         /* Count RTE_FLOW_ACTION_TYPE_END. */
5333         return flag ? actions_n + 1 : 0;
5334 }
5335
5336 #define SAMPLE_SUFFIX_ITEM 2
5337
5338 /**
5339  * Split the sample flow.
5340  *
5341  * As sample flow will split to two sub flow, sample flow with
5342  * sample action, the other actions will move to new suffix flow.
5343  *
5344  * Also add unique tag id with tag action in the sample flow,
5345  * the same tag id will be as match in the suffix flow.
5346  *
5347  * @param dev
5348  *   Pointer to Ethernet device.
5349  * @param[in] add_tag
5350  *   Add extra tag action flag.
5351  * @param[out] sfx_items
5352  *   Suffix flow match items (list terminated by the END pattern item).
5353  * @param[in] actions
5354  *   Associated actions (list terminated by the END action).
5355  * @param[out] actions_sfx
5356  *   Suffix flow actions.
5357  * @param[out] actions_pre
5358  *   Prefix flow actions.
5359  * @param[in] actions_n
5360  *  The total number of actions.
5361  * @param[in] sample_action_pos
5362  *   The sample action position.
5363  * @param[in] qrss_action_pos
5364  *   The Queue/RSS action position.
5365  * @param[in] jump_table
5366  *   Add extra jump action flag.
5367  * @param[out] error
5368  *   Perform verbose error reporting if not NULL.
5369  *
5370  * @return
5371  *   0 on success, or unique flow_id, a negative errno value
5372  *   otherwise and rte_errno is set.
5373  */
5374 static int
5375 flow_sample_split_prep(struct rte_eth_dev *dev,
5376                        int add_tag,
5377                        struct rte_flow_item sfx_items[],
5378                        const struct rte_flow_action actions[],
5379                        struct rte_flow_action actions_sfx[],
5380                        struct rte_flow_action actions_pre[],
5381                        int actions_n,
5382                        int sample_action_pos,
5383                        int qrss_action_pos,
5384                        int jump_table,
5385                        struct rte_flow_error *error)
5386 {
5387         struct mlx5_priv *priv = dev->data->dev_private;
5388         struct mlx5_rte_flow_action_set_tag *set_tag;
5389         struct mlx5_rte_flow_item_tag *tag_spec;
5390         struct mlx5_rte_flow_item_tag *tag_mask;
5391         struct rte_flow_action_jump *jump_action;
5392         uint32_t tag_id = 0;
5393         int index;
5394         int append_index = 0;
5395         int ret;
5396
5397         if (sample_action_pos < 0)
5398                 return rte_flow_error_set(error, EINVAL,
5399                                           RTE_FLOW_ERROR_TYPE_ACTION,
5400                                           NULL, "invalid position of sample "
5401                                           "action in list");
5402         /* Prepare the actions for prefix and suffix flow. */
5403         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5404                 index = qrss_action_pos;
5405                 /* Put the preceding the Queue/RSS action into prefix flow. */
5406                 if (index != 0)
5407                         memcpy(actions_pre, actions,
5408                                sizeof(struct rte_flow_action) * index);
5409                 /* Put others preceding the sample action into prefix flow. */
5410                 if (sample_action_pos > index + 1)
5411                         memcpy(actions_pre + index, actions + index + 1,
5412                                sizeof(struct rte_flow_action) *
5413                                (sample_action_pos - index - 1));
5414                 index = sample_action_pos - 1;
5415                 /* Put Queue/RSS action into Suffix flow. */
5416                 memcpy(actions_sfx, actions + qrss_action_pos,
5417                        sizeof(struct rte_flow_action));
5418                 actions_sfx++;
5419         } else {
5420                 index = sample_action_pos;
5421                 if (index != 0)
5422                         memcpy(actions_pre, actions,
5423                                sizeof(struct rte_flow_action) * index);
5424         }
5425         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5426          * For CX6DX and above, metadata registers Cx preserve their value,
5427          * add an extra tag action for NIC-RX and E-Switch Domain.
5428          */
5429         if (add_tag) {
5430                 /* Prepare the prefix tag action. */
5431                 append_index++;
5432                 set_tag = (void *)(actions_pre + actions_n + append_index);
5433                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
5434                 if (ret < 0)
5435                         return ret;
5436                 mlx5_ipool_malloc(priv->sh->ipool
5437                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5438                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5439                         .id = ret,
5440                         .data = tag_id,
5441                 };
5442                 /* Prepare the suffix subflow items. */
5443                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5444                 tag_spec->data = tag_id;
5445                 tag_spec->id = set_tag->id;
5446                 tag_mask = tag_spec + 1;
5447                 tag_mask->data = UINT32_MAX;
5448                 sfx_items[0] = (struct rte_flow_item){
5449                         .type = (enum rte_flow_item_type)
5450                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5451                         .spec = tag_spec,
5452                         .last = NULL,
5453                         .mask = tag_mask,
5454                 };
5455                 sfx_items[1] = (struct rte_flow_item){
5456                         .type = (enum rte_flow_item_type)
5457                                 RTE_FLOW_ITEM_TYPE_END,
5458                 };
5459                 /* Prepare the tag action in prefix subflow. */
5460                 actions_pre[index++] =
5461                         (struct rte_flow_action){
5462                         .type = (enum rte_flow_action_type)
5463                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5464                         .conf = set_tag,
5465                 };
5466         }
5467         memcpy(actions_pre + index, actions + sample_action_pos,
5468                sizeof(struct rte_flow_action));
5469         index += 1;
5470         /* For the modify action after the sample action in E-Switch mirroring,
5471          * Add the extra jump action in prefix subflow and jump into the next
5472          * table, then do the modify action in the new table.
5473          */
5474         if (jump_table) {
5475                 /* Prepare the prefix jump action. */
5476                 append_index++;
5477                 jump_action = (void *)(actions_pre + actions_n + append_index);
5478                 jump_action->group = jump_table;
5479                 actions_pre[index++] =
5480                         (struct rte_flow_action){
5481                         .type = (enum rte_flow_action_type)
5482                                 RTE_FLOW_ACTION_TYPE_JUMP,
5483                         .conf = jump_action,
5484                 };
5485         }
5486         actions_pre[index] = (struct rte_flow_action){
5487                 .type = (enum rte_flow_action_type)
5488                         RTE_FLOW_ACTION_TYPE_END,
5489         };
5490         /* Put the actions after sample into Suffix flow. */
5491         memcpy(actions_sfx, actions + sample_action_pos + 1,
5492                sizeof(struct rte_flow_action) *
5493                (actions_n - sample_action_pos - 1));
5494         return tag_id;
5495 }
5496
5497 /**
5498  * The splitting for metadata feature.
5499  *
5500  * - Q/RSS action on NIC Rx should be split in order to pass by
5501  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5502  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5503  *
5504  * - All the actions on NIC Tx should have a mreg copy action to
5505  *   copy reg_a from WQE to reg_c[0].
5506  *
5507  * @param dev
5508  *   Pointer to Ethernet device.
5509  * @param[in] flow
5510  *   Parent flow structure pointer.
5511  * @param[in] attr
5512  *   Flow rule attributes.
5513  * @param[in] items
5514  *   Pattern specification (list terminated by the END pattern item).
5515  * @param[in] actions
5516  *   Associated actions (list terminated by the END action).
5517  * @param[in] flow_split_info
5518  *   Pointer to flow split info structure.
5519  * @param[out] error
5520  *   Perform verbose error reporting if not NULL.
5521  * @return
5522  *   0 on success, negative value otherwise
5523  */
5524 static int
5525 flow_create_split_metadata(struct rte_eth_dev *dev,
5526                            struct rte_flow *flow,
5527                            const struct rte_flow_attr *attr,
5528                            const struct rte_flow_item items[],
5529                            const struct rte_flow_action actions[],
5530                            struct mlx5_flow_split_info *flow_split_info,
5531                            struct rte_flow_error *error)
5532 {
5533         struct mlx5_priv *priv = dev->data->dev_private;
5534         struct mlx5_dev_config *config = &priv->config;
5535         const struct rte_flow_action *qrss = NULL;
5536         struct rte_flow_action *ext_actions = NULL;
5537         struct mlx5_flow *dev_flow = NULL;
5538         uint32_t qrss_id = 0;
5539         int mtr_sfx = 0;
5540         size_t act_size;
5541         int actions_n;
5542         int encap_idx;
5543         int ret;
5544
5545         /* Check whether extensive metadata feature is engaged. */
5546         if (!config->dv_flow_en ||
5547             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5548             !mlx5_flow_ext_mreg_supported(dev))
5549                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5550                                                actions, flow_split_info, error);
5551         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5552                                                            &encap_idx);
5553         if (qrss) {
5554                 /* Exclude hairpin flows from splitting. */
5555                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5556                         const struct rte_flow_action_queue *queue;
5557
5558                         queue = qrss->conf;
5559                         if (mlx5_rxq_get_type(dev, queue->index) ==
5560                             MLX5_RXQ_TYPE_HAIRPIN)
5561                                 qrss = NULL;
5562                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5563                         const struct rte_flow_action_rss *rss;
5564
5565                         rss = qrss->conf;
5566                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5567                             MLX5_RXQ_TYPE_HAIRPIN)
5568                                 qrss = NULL;
5569                 }
5570         }
5571         if (qrss) {
5572                 /* Check if it is in meter suffix table. */
5573                 mtr_sfx = attr->group == (attr->transfer ?
5574                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5575                           MLX5_FLOW_TABLE_LEVEL_METER);
5576                 /*
5577                  * Q/RSS action on NIC Rx should be split in order to pass by
5578                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5579                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5580                  */
5581                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5582                            sizeof(struct rte_flow_action_set_tag) +
5583                            sizeof(struct rte_flow_action_jump);
5584                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5585                                           SOCKET_ID_ANY);
5586                 if (!ext_actions)
5587                         return rte_flow_error_set(error, ENOMEM,
5588                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5589                                                   NULL, "no memory to split "
5590                                                   "metadata flow");
5591                 /*
5592                  * If we are the suffix flow of meter, tag already exist.
5593                  * Set the tag action to void.
5594                  */
5595                 if (mtr_sfx)
5596                         ext_actions[qrss - actions].type =
5597                                                 RTE_FLOW_ACTION_TYPE_VOID;
5598                 else
5599                         ext_actions[qrss - actions].type =
5600                                                 (enum rte_flow_action_type)
5601                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5602                 /*
5603                  * Create the new actions list with removed Q/RSS action
5604                  * and appended set tag and jump to register copy table
5605                  * (RX_CP_TBL). We should preallocate unique tag ID here
5606                  * in advance, because it is needed for set tag action.
5607                  */
5608                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5609                                                     qrss, actions_n, error);
5610                 if (!mtr_sfx && !qrss_id) {
5611                         ret = -rte_errno;
5612                         goto exit;
5613                 }
5614         } else if (attr->egress && !attr->transfer) {
5615                 /*
5616                  * All the actions on NIC Tx should have a metadata register
5617                  * copy action to copy reg_a from WQE to reg_c[meta]
5618                  */
5619                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5620                            sizeof(struct mlx5_flow_action_copy_mreg);
5621                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5622                                           SOCKET_ID_ANY);
5623                 if (!ext_actions)
5624                         return rte_flow_error_set(error, ENOMEM,
5625                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5626                                                   NULL, "no memory to split "
5627                                                   "metadata flow");
5628                 /* Create the action list appended with copy register. */
5629                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5630                                              actions_n, error, encap_idx);
5631                 if (ret < 0)
5632                         goto exit;
5633         }
5634         /* Add the unmodified original or prefix subflow. */
5635         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5636                                       items, ext_actions ? ext_actions :
5637                                       actions, flow_split_info, error);
5638         if (ret < 0)
5639                 goto exit;
5640         MLX5_ASSERT(dev_flow);
5641         if (qrss) {
5642                 const struct rte_flow_attr q_attr = {
5643                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5644                         .ingress = 1,
5645                 };
5646                 /* Internal PMD action to set register. */
5647                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5648                         .data = qrss_id,
5649                         .id = REG_NON,
5650                 };
5651                 struct rte_flow_item q_items[] = {
5652                         {
5653                                 .type = (enum rte_flow_item_type)
5654                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5655                                 .spec = &q_tag_spec,
5656                                 .last = NULL,
5657                                 .mask = NULL,
5658                         },
5659                         {
5660                                 .type = RTE_FLOW_ITEM_TYPE_END,
5661                         },
5662                 };
5663                 struct rte_flow_action q_actions[] = {
5664                         {
5665                                 .type = qrss->type,
5666                                 .conf = qrss->conf,
5667                         },
5668                         {
5669                                 .type = RTE_FLOW_ACTION_TYPE_END,
5670                         },
5671                 };
5672                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5673
5674                 /*
5675                  * Configure the tag item only if there is no meter subflow.
5676                  * Since tag is already marked in the meter suffix subflow
5677                  * we can just use the meter suffix items as is.
5678                  */
5679                 if (qrss_id) {
5680                         /* Not meter subflow. */
5681                         MLX5_ASSERT(!mtr_sfx);
5682                         /*
5683                          * Put unique id in prefix flow due to it is destroyed
5684                          * after suffix flow and id will be freed after there
5685                          * is no actual flows with this id and identifier
5686                          * reallocation becomes possible (for example, for
5687                          * other flows in other threads).
5688                          */
5689                         dev_flow->handle->split_flow_id = qrss_id;
5690                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5691                                                    error);
5692                         if (ret < 0)
5693                                 goto exit;
5694                         q_tag_spec.id = ret;
5695                 }
5696                 dev_flow = NULL;
5697                 /* Add suffix subflow to execute Q/RSS. */
5698                 flow_split_info->prefix_layers = layers;
5699                 flow_split_info->prefix_mark = 0;
5700                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5701                                               &q_attr, mtr_sfx ? items :
5702                                               q_items, q_actions,
5703                                               flow_split_info, error);
5704                 if (ret < 0)
5705                         goto exit;
5706                 /* qrss ID should be freed if failed. */
5707                 qrss_id = 0;
5708                 MLX5_ASSERT(dev_flow);
5709         }
5710
5711 exit:
5712         /*
5713          * We do not destroy the partially created sub_flows in case of error.
5714          * These ones are included into parent flow list and will be destroyed
5715          * by flow_drv_destroy.
5716          */
5717         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5718                         qrss_id);
5719         mlx5_free(ext_actions);
5720         return ret;
5721 }
5722
5723 /**
5724  * Create meter internal drop flow with the original pattern.
5725  *
5726  * @param dev
5727  *   Pointer to Ethernet device.
5728  * @param[in] flow
5729  *   Parent flow structure pointer.
5730  * @param[in] attr
5731  *   Flow rule attributes.
5732  * @param[in] items
5733  *   Pattern specification (list terminated by the END pattern item).
5734  * @param[in] flow_split_info
5735  *   Pointer to flow split info structure.
5736  * @param[in] fm
5737  *   Pointer to flow meter structure.
5738  * @param[out] error
5739  *   Perform verbose error reporting if not NULL.
5740  * @return
5741  *   0 on success, negative value otherwise
5742  */
5743 static uint32_t
5744 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5745                         struct rte_flow *flow,
5746                         const struct rte_flow_attr *attr,
5747                         const struct rte_flow_item items[],
5748                         struct mlx5_flow_split_info *flow_split_info,
5749                         struct mlx5_flow_meter_info *fm,
5750                         struct rte_flow_error *error)
5751 {
5752         struct mlx5_flow *dev_flow = NULL;
5753         struct rte_flow_attr drop_attr = *attr;
5754         struct rte_flow_action drop_actions[3];
5755         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5756
5757         MLX5_ASSERT(fm->drop_cnt);
5758         drop_actions[0].type =
5759                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5760         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5761         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5762         drop_actions[1].conf = NULL;
5763         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5764         drop_actions[2].conf = NULL;
5765         drop_split_info.external = false;
5766         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5767         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5768         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5769         return flow_create_split_inner(dev, flow, &dev_flow,
5770                                 &drop_attr, items, drop_actions,
5771                                 &drop_split_info, error);
5772 }
5773
5774 /**
5775  * The splitting for meter feature.
5776  *
5777  * - The meter flow will be split to two flows as prefix and
5778  *   suffix flow. The packets make sense only it pass the prefix
5779  *   meter action.
5780  *
5781  * - Reg_C_5 is used for the packet to match betweend prefix and
5782  *   suffix flow.
5783  *
5784  * @param dev
5785  *   Pointer to Ethernet device.
5786  * @param[in] flow
5787  *   Parent flow structure pointer.
5788  * @param[in] attr
5789  *   Flow rule attributes.
5790  * @param[in] items
5791  *   Pattern specification (list terminated by the END pattern item).
5792  * @param[in] actions
5793  *   Associated actions (list terminated by the END action).
5794  * @param[in] flow_split_info
5795  *   Pointer to flow split info structure.
5796  * @param[out] error
5797  *   Perform verbose error reporting if not NULL.
5798  * @return
5799  *   0 on success, negative value otherwise
5800  */
5801 static int
5802 flow_create_split_meter(struct rte_eth_dev *dev,
5803                         struct rte_flow *flow,
5804                         const struct rte_flow_attr *attr,
5805                         const struct rte_flow_item items[],
5806                         const struct rte_flow_action actions[],
5807                         struct mlx5_flow_split_info *flow_split_info,
5808                         struct rte_flow_error *error)
5809 {
5810         struct mlx5_priv *priv = dev->data->dev_private;
5811         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5812         struct rte_flow_action *sfx_actions = NULL;
5813         struct rte_flow_action *pre_actions = NULL;
5814         struct rte_flow_item *sfx_items = NULL;
5815         struct mlx5_flow *dev_flow = NULL;
5816         struct rte_flow_attr sfx_attr = *attr;
5817         struct mlx5_flow_meter_info *fm = NULL;
5818         uint8_t skip_scale_restore;
5819         bool has_mtr = false;
5820         bool has_modify = false;
5821         bool set_mtr_reg = true;
5822         bool is_mtr_hierarchy = false;
5823         uint32_t meter_id = 0;
5824         uint32_t mtr_idx = 0;
5825         uint32_t mtr_flow_id = 0;
5826         size_t act_size;
5827         size_t item_size;
5828         int actions_n = 0;
5829         int ret = 0;
5830
5831         if (priv->mtr_en)
5832                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
5833                                                     &has_modify, &meter_id);
5834         if (has_mtr) {
5835                 if (flow->meter) {
5836                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
5837                         if (!fm)
5838                                 return rte_flow_error_set(error, EINVAL,
5839                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5840                                                 NULL, "Meter not found.");
5841                 } else {
5842                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
5843                         if (!fm)
5844                                 return rte_flow_error_set(error, EINVAL,
5845                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5846                                                 NULL, "Meter not found.");
5847                         ret = mlx5_flow_meter_attach(priv, fm,
5848                                                      &sfx_attr, error);
5849                         if (ret)
5850                                 return -rte_errno;
5851                         flow->meter = mtr_idx;
5852                 }
5853                 MLX5_ASSERT(wks);
5854                 wks->fm = fm;
5855                 if (!fm->def_policy) {
5856                         wks->policy = mlx5_flow_meter_policy_find(dev,
5857                                                                   fm->policy_id,
5858                                                                   NULL);
5859                         MLX5_ASSERT(wks->policy);
5860                         if (wks->policy->is_hierarchy) {
5861                                 wks->final_policy =
5862                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
5863                                                                 wks->policy);
5864                                 if (!wks->final_policy)
5865                                         return rte_flow_error_set(error,
5866                                         EINVAL,
5867                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5868                                 "Failed to find terminal policy of hierarchy.");
5869                                 is_mtr_hierarchy = true;
5870                         }
5871                 }
5872                 /*
5873                  * If it isn't default-policy Meter, and
5874                  * 1. There's no action in flow to change
5875                  *    packet (modify/encap/decap etc.), OR
5876                  * 2. No drop count needed for this meter.
5877                  * 3. It's not meter hierarchy.
5878                  * Then no need to use regC to save meter id anymore.
5879                  */
5880                 if (!fm->def_policy && !is_mtr_hierarchy &&
5881                     (!has_modify || !fm->drop_cnt))
5882                         set_mtr_reg = false;
5883                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
5884                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
5885                            sizeof(struct mlx5_rte_flow_action_set_tag);
5886                 /* Suffix items: tag, vlan, port id, end. */
5887 #define METER_SUFFIX_ITEM 4
5888                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5889                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5890                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5891                                           0, SOCKET_ID_ANY);
5892                 if (!sfx_actions)
5893                         return rte_flow_error_set(error, ENOMEM,
5894                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5895                                                   NULL, "no memory to split "
5896                                                   "meter flow");
5897                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5898                              act_size);
5899                 /* There's no suffix flow for meter of non-default policy. */
5900                 if (!fm->def_policy)
5901                         pre_actions = sfx_actions + 1;
5902                 else
5903                         pre_actions = sfx_actions + actions_n;
5904                 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
5905                                             items, sfx_items, actions,
5906                                             sfx_actions, pre_actions,
5907                                             (set_mtr_reg ? &mtr_flow_id : NULL),
5908                                             error);
5909                 if (ret) {
5910                         ret = -rte_errno;
5911                         goto exit;
5912                 }
5913                 /* Add the prefix subflow. */
5914                 flow_split_info->prefix_mark = 0;
5915                 skip_scale_restore = flow_split_info->skip_scale;
5916                 flow_split_info->skip_scale |=
5917                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5918                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5919                                               attr, items, pre_actions,
5920                                               flow_split_info, error);
5921                 flow_split_info->skip_scale = skip_scale_restore;
5922                 if (ret) {
5923                         if (mtr_flow_id)
5924                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
5925                         ret = -rte_errno;
5926                         goto exit;
5927                 }
5928                 if (mtr_flow_id) {
5929                         dev_flow->handle->split_flow_id = mtr_flow_id;
5930                         dev_flow->handle->is_meter_flow_id = 1;
5931                 }
5932                 if (!fm->def_policy) {
5933                         if (!set_mtr_reg && fm->drop_cnt)
5934                                 ret =
5935                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
5936                                                         &sfx_attr, items,
5937                                                         flow_split_info,
5938                                                         fm, error);
5939                         goto exit;
5940                 }
5941                 /* Setting the sfx group atrr. */
5942                 sfx_attr.group = sfx_attr.transfer ?
5943                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5944                                  MLX5_FLOW_TABLE_LEVEL_METER;
5945                 flow_split_info->prefix_layers =
5946                                 flow_get_prefix_layer_flags(dev_flow);
5947                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5948                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
5949         }
5950         /* Add the prefix subflow. */
5951         ret = flow_create_split_metadata(dev, flow,
5952                                          &sfx_attr, sfx_items ?
5953                                          sfx_items : items,
5954                                          sfx_actions ? sfx_actions : actions,
5955                                          flow_split_info, error);
5956 exit:
5957         if (sfx_actions)
5958                 mlx5_free(sfx_actions);
5959         return ret;
5960 }
5961
5962 /**
5963  * The splitting for sample feature.
5964  *
5965  * Once Sample action is detected in the action list, the flow actions should
5966  * be split into prefix sub flow and suffix sub flow.
5967  *
5968  * The original items remain in the prefix sub flow, all actions preceding the
5969  * sample action and the sample action itself will be copied to the prefix
5970  * sub flow, the actions following the sample action will be copied to the
5971  * suffix sub flow, Queue action always be located in the suffix sub flow.
5972  *
5973  * In order to make the packet from prefix sub flow matches with suffix sub
5974  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5975  * flow uses tag item with the unique flow id.
5976  *
5977  * @param dev
5978  *   Pointer to Ethernet device.
5979  * @param[in] flow
5980  *   Parent flow structure pointer.
5981  * @param[in] attr
5982  *   Flow rule attributes.
5983  * @param[in] items
5984  *   Pattern specification (list terminated by the END pattern item).
5985  * @param[in] actions
5986  *   Associated actions (list terminated by the END action).
5987  * @param[in] flow_split_info
5988  *   Pointer to flow split info structure.
5989  * @param[out] error
5990  *   Perform verbose error reporting if not NULL.
5991  * @return
5992  *   0 on success, negative value otherwise
5993  */
5994 static int
5995 flow_create_split_sample(struct rte_eth_dev *dev,
5996                          struct rte_flow *flow,
5997                          const struct rte_flow_attr *attr,
5998                          const struct rte_flow_item items[],
5999                          const struct rte_flow_action actions[],
6000                          struct mlx5_flow_split_info *flow_split_info,
6001                          struct rte_flow_error *error)
6002 {
6003         struct mlx5_priv *priv = dev->data->dev_private;
6004         struct rte_flow_action *sfx_actions = NULL;
6005         struct rte_flow_action *pre_actions = NULL;
6006         struct rte_flow_item *sfx_items = NULL;
6007         struct mlx5_flow *dev_flow = NULL;
6008         struct rte_flow_attr sfx_attr = *attr;
6009 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6010         struct mlx5_flow_dv_sample_resource *sample_res;
6011         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
6012         struct mlx5_flow_tbl_resource *sfx_tbl;
6013 #endif
6014         size_t act_size;
6015         size_t item_size;
6016         uint32_t fdb_tx = 0;
6017         int32_t tag_id = 0;
6018         int actions_n = 0;
6019         int sample_action_pos;
6020         int qrss_action_pos;
6021         int add_tag = 0;
6022         int modify_after_mirror = 0;
6023         uint16_t jump_table = 0;
6024         const uint32_t next_ft_step = 1;
6025         int ret = 0;
6026
6027         if (priv->sampler_en)
6028                 actions_n = flow_check_match_action(actions, attr,
6029                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
6030                                         &sample_action_pos, &qrss_action_pos,
6031                                         &modify_after_mirror);
6032         if (actions_n) {
6033                 /* The prefix actions must includes sample, tag, end. */
6034                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6035                            + sizeof(struct mlx5_rte_flow_action_set_tag);
6036                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6037                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6038                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6039                                           item_size), 0, SOCKET_ID_ANY);
6040                 if (!sfx_actions)
6041                         return rte_flow_error_set(error, ENOMEM,
6042                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6043                                                   NULL, "no memory to split "
6044                                                   "sample flow");
6045                 /* The representor_id is UINT16_MAX for uplink. */
6046                 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6047                 /*
6048                  * When reg_c_preserve is set, metadata registers Cx preserve
6049                  * their value even through packet duplication.
6050                  */
6051                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
6052                 if (add_tag)
6053                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6054                                         + act_size);
6055                 if (modify_after_mirror)
6056                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6057                                      next_ft_step;
6058                 pre_actions = sfx_actions + actions_n;
6059                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6060                                                 actions, sfx_actions,
6061                                                 pre_actions, actions_n,
6062                                                 sample_action_pos,
6063                                                 qrss_action_pos, jump_table,
6064                                                 error);
6065                 if (tag_id < 0 || (add_tag && !tag_id)) {
6066                         ret = -rte_errno;
6067                         goto exit;
6068                 }
6069                 if (modify_after_mirror)
6070                         flow_split_info->skip_scale =
6071                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6072                 /* Add the prefix subflow. */
6073                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6074                                               items, pre_actions,
6075                                               flow_split_info, error);
6076                 if (ret) {
6077                         ret = -rte_errno;
6078                         goto exit;
6079                 }
6080                 dev_flow->handle->split_flow_id = tag_id;
6081 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6082                 if (!modify_after_mirror) {
6083                         /* Set the sfx group attr. */
6084                         sample_res = (struct mlx5_flow_dv_sample_resource *)
6085                                                 dev_flow->dv.sample_res;
6086                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
6087                                                 sample_res->normal_path_tbl;
6088                         sfx_tbl_data = container_of(sfx_tbl,
6089                                                 struct mlx5_flow_tbl_data_entry,
6090                                                 tbl);
6091                         sfx_attr.group = sfx_attr.transfer ?
6092                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6093                 } else {
6094                         MLX5_ASSERT(attr->transfer);
6095                         sfx_attr.group = jump_table;
6096                 }
6097                 flow_split_info->prefix_layers =
6098                                 flow_get_prefix_layer_flags(dev_flow);
6099                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6100                 /* Suffix group level already be scaled with factor, set
6101                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6102                  * again in translation.
6103                  */
6104                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6105 #endif
6106         }
6107         /* Add the suffix subflow. */
6108         ret = flow_create_split_meter(dev, flow, &sfx_attr,
6109                                       sfx_items ? sfx_items : items,
6110                                       sfx_actions ? sfx_actions : actions,
6111                                       flow_split_info, error);
6112 exit:
6113         if (sfx_actions)
6114                 mlx5_free(sfx_actions);
6115         return ret;
6116 }
6117
6118 /**
6119  * Split the flow to subflow set. The splitters might be linked
6120  * in the chain, like this:
6121  * flow_create_split_outer() calls:
6122  *   flow_create_split_meter() calls:
6123  *     flow_create_split_metadata(meter_subflow_0) calls:
6124  *       flow_create_split_inner(metadata_subflow_0)
6125  *       flow_create_split_inner(metadata_subflow_1)
6126  *       flow_create_split_inner(metadata_subflow_2)
6127  *     flow_create_split_metadata(meter_subflow_1) calls:
6128  *       flow_create_split_inner(metadata_subflow_0)
6129  *       flow_create_split_inner(metadata_subflow_1)
6130  *       flow_create_split_inner(metadata_subflow_2)
6131  *
6132  * This provide flexible way to add new levels of flow splitting.
6133  * The all of successfully created subflows are included to the
6134  * parent flow dev_flow list.
6135  *
6136  * @param dev
6137  *   Pointer to Ethernet device.
6138  * @param[in] flow
6139  *   Parent flow structure pointer.
6140  * @param[in] attr
6141  *   Flow rule attributes.
6142  * @param[in] items
6143  *   Pattern specification (list terminated by the END pattern item).
6144  * @param[in] actions
6145  *   Associated actions (list terminated by the END action).
6146  * @param[in] flow_split_info
6147  *   Pointer to flow split info structure.
6148  * @param[out] error
6149  *   Perform verbose error reporting if not NULL.
6150  * @return
6151  *   0 on success, negative value otherwise
6152  */
6153 static int
6154 flow_create_split_outer(struct rte_eth_dev *dev,
6155                         struct rte_flow *flow,
6156                         const struct rte_flow_attr *attr,
6157                         const struct rte_flow_item items[],
6158                         const struct rte_flow_action actions[],
6159                         struct mlx5_flow_split_info *flow_split_info,
6160                         struct rte_flow_error *error)
6161 {
6162         int ret;
6163
6164         ret = flow_create_split_sample(dev, flow, attr, items,
6165                                        actions, flow_split_info, error);
6166         MLX5_ASSERT(ret <= 0);
6167         return ret;
6168 }
6169
6170 static inline struct mlx5_flow_tunnel *
6171 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6172 {
6173         struct mlx5_flow_tunnel *tunnel;
6174
6175 #pragma GCC diagnostic push
6176 #pragma GCC diagnostic ignored "-Wcast-qual"
6177         tunnel = (typeof(tunnel))flow->tunnel;
6178 #pragma GCC diagnostic pop
6179
6180         return tunnel;
6181 }
6182
6183 /**
6184  * Adjust flow RSS workspace if needed.
6185  *
6186  * @param wks
6187  *   Pointer to thread flow work space.
6188  * @param rss_desc
6189  *   Pointer to RSS descriptor.
6190  * @param[in] nrssq_num
6191  *   New RSS queue number.
6192  *
6193  * @return
6194  *   0 on success, -1 otherwise and rte_errno is set.
6195  */
6196 static int
6197 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6198                           struct mlx5_flow_rss_desc *rss_desc,
6199                           uint32_t nrssq_num)
6200 {
6201         if (likely(nrssq_num <= wks->rssq_num))
6202                 return 0;
6203         rss_desc->queue = realloc(rss_desc->queue,
6204                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6205         if (!rss_desc->queue) {
6206                 rte_errno = ENOMEM;
6207                 return -1;
6208         }
6209         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6210         return 0;
6211 }
6212
6213 /**
6214  * Create a flow and add it to @p list.
6215  *
6216  * @param dev
6217  *   Pointer to Ethernet device.
6218  * @param list
6219  *   Pointer to a TAILQ flow list. If this parameter NULL,
6220  *   no list insertion occurred, flow is just created,
6221  *   this is caller's responsibility to track the
6222  *   created flow.
6223  * @param[in] attr
6224  *   Flow rule attributes.
6225  * @param[in] items
6226  *   Pattern specification (list terminated by the END pattern item).
6227  * @param[in] actions
6228  *   Associated actions (list terminated by the END action).
6229  * @param[in] external
6230  *   This flow rule is created by request external to PMD.
6231  * @param[out] error
6232  *   Perform verbose error reporting if not NULL.
6233  *
6234  * @return
6235  *   A flow index on success, 0 otherwise and rte_errno is set.
6236  */
6237 static uint32_t
6238 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6239                  const struct rte_flow_attr *attr,
6240                  const struct rte_flow_item items[],
6241                  const struct rte_flow_action original_actions[],
6242                  bool external, struct rte_flow_error *error)
6243 {
6244         struct mlx5_priv *priv = dev->data->dev_private;
6245         struct rte_flow *flow = NULL;
6246         struct mlx5_flow *dev_flow;
6247         const struct rte_flow_action_rss *rss = NULL;
6248         struct mlx5_translated_action_handle
6249                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6250         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6251         union {
6252                 struct mlx5_flow_expand_rss buf;
6253                 uint8_t buffer[2048];
6254         } expand_buffer;
6255         union {
6256                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6257                 uint8_t buffer[2048];
6258         } actions_rx;
6259         union {
6260                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6261                 uint8_t buffer[2048];
6262         } actions_hairpin_tx;
6263         union {
6264                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6265                 uint8_t buffer[2048];
6266         } items_tx;
6267         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6268         struct mlx5_flow_rss_desc *rss_desc;
6269         const struct rte_flow_action *p_actions_rx;
6270         uint32_t i;
6271         uint32_t idx = 0;
6272         int hairpin_flow;
6273         struct rte_flow_attr attr_tx = { .priority = 0 };
6274         const struct rte_flow_action *actions;
6275         struct rte_flow_action *translated_actions = NULL;
6276         struct mlx5_flow_tunnel *tunnel;
6277         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6278         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6279         struct mlx5_flow_split_info flow_split_info = {
6280                 .external = !!external,
6281                 .skip_scale = 0,
6282                 .flow_idx = 0,
6283                 .prefix_mark = 0,
6284                 .prefix_layers = 0,
6285                 .table_id = 0
6286         };
6287         int ret;
6288
6289         MLX5_ASSERT(wks);
6290         rss_desc = &wks->rss_desc;
6291         ret = flow_action_handles_translate(dev, original_actions,
6292                                             indir_actions,
6293                                             &indir_actions_n,
6294                                             &translated_actions, error);
6295         if (ret < 0) {
6296                 MLX5_ASSERT(translated_actions == NULL);
6297                 return 0;
6298         }
6299         actions = translated_actions ? translated_actions : original_actions;
6300         p_actions_rx = actions;
6301         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6302         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6303                                 external, hairpin_flow, error);
6304         if (ret < 0)
6305                 goto error_before_hairpin_split;
6306         flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6307         if (!flow) {
6308                 rte_errno = ENOMEM;
6309                 goto error_before_hairpin_split;
6310         }
6311         if (hairpin_flow > 0) {
6312                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6313                         rte_errno = EINVAL;
6314                         goto error_before_hairpin_split;
6315                 }
6316                 flow_hairpin_split(dev, actions, actions_rx.actions,
6317                                    actions_hairpin_tx.actions, items_tx.items,
6318                                    idx);
6319                 p_actions_rx = actions_rx.actions;
6320         }
6321         flow_split_info.flow_idx = idx;
6322         flow->drv_type = flow_get_drv_type(dev, attr);
6323         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6324                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6325         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6326         /* RSS Action only works on NIC RX domain */
6327         if (attr->ingress && !attr->transfer)
6328                 rss = flow_get_rss_action(dev, p_actions_rx);
6329         if (rss) {
6330                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6331                         return 0;
6332                 /*
6333                  * The following information is required by
6334                  * mlx5_flow_hashfields_adjust() in advance.
6335                  */
6336                 rss_desc->level = rss->level;
6337                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
6338                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
6339         }
6340         flow->dev_handles = 0;
6341         if (rss && rss->types) {
6342                 unsigned int graph_root;
6343
6344                 graph_root = find_graph_root(items, rss->level);
6345                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6346                                            items, rss->types,
6347                                            mlx5_support_expansion, graph_root);
6348                 MLX5_ASSERT(ret > 0 &&
6349                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6350                 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6351                         for (i = 0; i < buf->entries; ++i)
6352                                 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6353                 }
6354         } else {
6355                 buf->entries = 1;
6356                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6357         }
6358         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6359                                                       indir_actions_n);
6360         for (i = 0; i < buf->entries; ++i) {
6361                 /* Initialize flow split data. */
6362                 flow_split_info.prefix_layers = 0;
6363                 flow_split_info.prefix_mark = 0;
6364                 flow_split_info.skip_scale = 0;
6365                 /*
6366                  * The splitter may create multiple dev_flows,
6367                  * depending on configuration. In the simplest
6368                  * case it just creates unmodified original flow.
6369                  */
6370                 ret = flow_create_split_outer(dev, flow, attr,
6371                                               buf->entry[i].pattern,
6372                                               p_actions_rx, &flow_split_info,
6373                                               error);
6374                 if (ret < 0)
6375                         goto error;
6376                 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6377                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6378                                                            p_actions_rx,
6379                                                            idx,
6380                                                            wks->flows[0].tunnel,
6381                                                            &default_miss_ctx,
6382                                                            error);
6383                         if (ret < 0) {
6384                                 mlx5_free(default_miss_ctx.queue);
6385                                 goto error;
6386                         }
6387                 }
6388         }
6389         /* Create the tx flow. */
6390         if (hairpin_flow) {
6391                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6392                 attr_tx.ingress = 0;
6393                 attr_tx.egress = 1;
6394                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6395                                          actions_hairpin_tx.actions,
6396                                          idx, error);
6397                 if (!dev_flow)
6398                         goto error;
6399                 dev_flow->flow = flow;
6400                 dev_flow->external = 0;
6401                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6402                               dev_flow->handle, next);
6403                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6404                                          items_tx.items,
6405                                          actions_hairpin_tx.actions, error);
6406                 if (ret < 0)
6407                         goto error;
6408         }
6409         /*
6410          * Update the metadata register copy table. If extensive
6411          * metadata feature is enabled and registers are supported
6412          * we might create the extra rte_flow for each unique
6413          * MARK/FLAG action ID.
6414          *
6415          * The table is updated for ingress Flows only, because
6416          * the egress Flows belong to the different device and
6417          * copy table should be updated in peer NIC Rx domain.
6418          */
6419         if (attr->ingress &&
6420             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6421                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6422                 if (ret)
6423                         goto error;
6424         }
6425         /*
6426          * If the flow is external (from application) OR device is started,
6427          * OR mreg discover, then apply immediately.
6428          */
6429         if (external || dev->data->dev_started ||
6430             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6431              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6432                 ret = flow_drv_apply(dev, flow, error);
6433                 if (ret < 0)
6434                         goto error;
6435         }
6436         flow->type = type;
6437         flow_rxq_flags_set(dev, flow);
6438         rte_free(translated_actions);
6439         tunnel = flow_tunnel_from_rule(wks->flows);
6440         if (tunnel) {
6441                 flow->tunnel = 1;
6442                 flow->tunnel_id = tunnel->tunnel_id;
6443                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6444                 mlx5_free(default_miss_ctx.queue);
6445         }
6446         mlx5_flow_pop_thread_workspace();
6447         return idx;
6448 error:
6449         MLX5_ASSERT(flow);
6450         ret = rte_errno; /* Save rte_errno before cleanup. */
6451         flow_mreg_del_copy_action(dev, flow);
6452         flow_drv_destroy(dev, flow);
6453         if (rss_desc->shared_rss)
6454                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6455                         mlx5_ipool_get
6456                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6457                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6458         mlx5_ipool_free(priv->flows[type], idx);
6459         rte_errno = ret; /* Restore rte_errno. */
6460         ret = rte_errno;
6461         rte_errno = ret;
6462         mlx5_flow_pop_thread_workspace();
6463 error_before_hairpin_split:
6464         rte_free(translated_actions);
6465         return 0;
6466 }
6467
6468 /**
6469  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6470  * incoming packets to table 1.
6471  *
6472  * Other flow rules, requested for group n, will be created in
6473  * e-switch table n+1.
6474  * Jump action to e-switch group n will be created to group n+1.
6475  *
6476  * Used when working in switchdev mode, to utilise advantages of table 1
6477  * and above.
6478  *
6479  * @param dev
6480  *   Pointer to Ethernet device.
6481  *
6482  * @return
6483  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6484  */
6485 struct rte_flow *
6486 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6487 {
6488         const struct rte_flow_attr attr = {
6489                 .group = 0,
6490                 .priority = 0,
6491                 .ingress = 1,
6492                 .egress = 0,
6493                 .transfer = 1,
6494         };
6495         const struct rte_flow_item pattern = {
6496                 .type = RTE_FLOW_ITEM_TYPE_END,
6497         };
6498         struct rte_flow_action_jump jump = {
6499                 .group = 1,
6500         };
6501         const struct rte_flow_action actions[] = {
6502                 {
6503                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6504                         .conf = &jump,
6505                 },
6506                 {
6507                         .type = RTE_FLOW_ACTION_TYPE_END,
6508                 },
6509         };
6510         struct rte_flow_error error;
6511
6512         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6513                                                    &attr, &pattern,
6514                                                    actions, false, &error);
6515 }
6516
6517 /**
6518  * Validate a flow supported by the NIC.
6519  *
6520  * @see rte_flow_validate()
6521  * @see rte_flow_ops
6522  */
6523 int
6524 mlx5_flow_validate(struct rte_eth_dev *dev,
6525                    const struct rte_flow_attr *attr,
6526                    const struct rte_flow_item items[],
6527                    const struct rte_flow_action original_actions[],
6528                    struct rte_flow_error *error)
6529 {
6530         int hairpin_flow;
6531         struct mlx5_translated_action_handle
6532                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6533         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6534         const struct rte_flow_action *actions;
6535         struct rte_flow_action *translated_actions = NULL;
6536         int ret = flow_action_handles_translate(dev, original_actions,
6537                                                 indir_actions,
6538                                                 &indir_actions_n,
6539                                                 &translated_actions, error);
6540
6541         if (ret)
6542                 return ret;
6543         actions = translated_actions ? translated_actions : original_actions;
6544         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6545         ret = flow_drv_validate(dev, attr, items, actions,
6546                                 true, hairpin_flow, error);
6547         rte_free(translated_actions);
6548         return ret;
6549 }
6550
6551 /**
6552  * Create a flow.
6553  *
6554  * @see rte_flow_create()
6555  * @see rte_flow_ops
6556  */
6557 struct rte_flow *
6558 mlx5_flow_create(struct rte_eth_dev *dev,
6559                  const struct rte_flow_attr *attr,
6560                  const struct rte_flow_item items[],
6561                  const struct rte_flow_action actions[],
6562                  struct rte_flow_error *error)
6563 {
6564         /*
6565          * If the device is not started yet, it is not allowed to created a
6566          * flow from application. PMD default flows and traffic control flows
6567          * are not affected.
6568          */
6569         if (unlikely(!dev->data->dev_started)) {
6570                 DRV_LOG(DEBUG, "port %u is not started when "
6571                         "inserting a flow", dev->data->port_id);
6572                 rte_flow_error_set(error, ENODEV,
6573                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6574                                    NULL,
6575                                    "port not started");
6576                 return NULL;
6577         }
6578
6579         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
6580                                                    attr, items, actions,
6581                                                    true, error);
6582 }
6583
6584 /**
6585  * Destroy a flow in a list.
6586  *
6587  * @param dev
6588  *   Pointer to Ethernet device.
6589  * @param[in] flow_idx
6590  *   Index of flow to destroy.
6591  */
6592 static void
6593 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6594                   uint32_t flow_idx)
6595 {
6596         struct mlx5_priv *priv = dev->data->dev_private;
6597         struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
6598
6599         if (!flow)
6600                 return;
6601         MLX5_ASSERT(flow->type == type);
6602         /*
6603          * Update RX queue flags only if port is started, otherwise it is
6604          * already clean.
6605          */
6606         if (dev->data->dev_started)
6607                 flow_rxq_flags_trim(dev, flow);
6608         flow_drv_destroy(dev, flow);
6609         if (flow->tunnel) {
6610                 struct mlx5_flow_tunnel *tunnel;
6611
6612                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6613                 RTE_VERIFY(tunnel);
6614                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6615                         mlx5_flow_tunnel_free(dev, tunnel);
6616         }
6617         flow_mreg_del_copy_action(dev, flow);
6618         mlx5_ipool_free(priv->flows[type], flow_idx);
6619 }
6620
6621 /**
6622  * Destroy all flows.
6623  *
6624  * @param dev
6625  *   Pointer to Ethernet device.
6626  * @param type
6627  *   Flow type to be flushed.
6628  * @param active
6629  *   If flushing is called avtively.
6630  */
6631 void
6632 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6633                      bool active)
6634 {
6635         struct mlx5_priv *priv = dev->data->dev_private;
6636         uint32_t num_flushed = 0, fidx = 1;
6637         struct rte_flow *flow;
6638
6639         MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
6640                 flow_list_destroy(dev, type, fidx);
6641                 num_flushed++;
6642         }
6643         if (active) {
6644                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6645                         dev->data->port_id, num_flushed);
6646         }
6647 }
6648
6649 /**
6650  * Stop all default actions for flows.
6651  *
6652  * @param dev
6653  *   Pointer to Ethernet device.
6654  */
6655 void
6656 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6657 {
6658         flow_mreg_del_default_copy_action(dev);
6659         flow_rxq_flags_clear(dev);
6660 }
6661
6662 /**
6663  * Start all default actions for flows.
6664  *
6665  * @param dev
6666  *   Pointer to Ethernet device.
6667  * @return
6668  *   0 on success, a negative errno value otherwise and rte_errno is set.
6669  */
6670 int
6671 mlx5_flow_start_default(struct rte_eth_dev *dev)
6672 {
6673         struct rte_flow_error error;
6674
6675         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6676         return flow_mreg_add_default_copy_action(dev, &error);
6677 }
6678
6679 /**
6680  * Release key of thread specific flow workspace data.
6681  */
6682 void
6683 flow_release_workspace(void *data)
6684 {
6685         struct mlx5_flow_workspace *wks = data;
6686         struct mlx5_flow_workspace *next;
6687
6688         while (wks) {
6689                 next = wks->next;
6690                 free(wks->rss_desc.queue);
6691                 free(wks);
6692                 wks = next;
6693         }
6694 }
6695
6696 /**
6697  * Get thread specific current flow workspace.
6698  *
6699  * @return pointer to thread specific flow workspace data, NULL on error.
6700  */
6701 struct mlx5_flow_workspace*
6702 mlx5_flow_get_thread_workspace(void)
6703 {
6704         struct mlx5_flow_workspace *data;
6705
6706         data = mlx5_flow_os_get_specific_workspace();
6707         MLX5_ASSERT(data && data->inuse);
6708         if (!data || !data->inuse)
6709                 DRV_LOG(ERR, "flow workspace not initialized.");
6710         return data;
6711 }
6712
6713 /**
6714  * Allocate and init new flow workspace.
6715  *
6716  * @return pointer to flow workspace data, NULL on error.
6717  */
6718 static struct mlx5_flow_workspace*
6719 flow_alloc_thread_workspace(void)
6720 {
6721         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6722
6723         if (!data) {
6724                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6725                         "memory.");
6726                 return NULL;
6727         }
6728         data->rss_desc.queue = calloc(1,
6729                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6730         if (!data->rss_desc.queue)
6731                 goto err;
6732         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6733         return data;
6734 err:
6735         if (data->rss_desc.queue)
6736                 free(data->rss_desc.queue);
6737         free(data);
6738         return NULL;
6739 }
6740
6741 /**
6742  * Get new thread specific flow workspace.
6743  *
6744  * If current workspace inuse, create new one and set as current.
6745  *
6746  * @return pointer to thread specific flow workspace data, NULL on error.
6747  */
6748 static struct mlx5_flow_workspace*
6749 mlx5_flow_push_thread_workspace(void)
6750 {
6751         struct mlx5_flow_workspace *curr;
6752         struct mlx5_flow_workspace *data;
6753
6754         curr = mlx5_flow_os_get_specific_workspace();
6755         if (!curr) {
6756                 data = flow_alloc_thread_workspace();
6757                 if (!data)
6758                         return NULL;
6759         } else if (!curr->inuse) {
6760                 data = curr;
6761         } else if (curr->next) {
6762                 data = curr->next;
6763         } else {
6764                 data = flow_alloc_thread_workspace();
6765                 if (!data)
6766                         return NULL;
6767                 curr->next = data;
6768                 data->prev = curr;
6769         }
6770         data->inuse = 1;
6771         data->flow_idx = 0;
6772         /* Set as current workspace */
6773         if (mlx5_flow_os_set_specific_workspace(data))
6774                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6775         return data;
6776 }
6777
6778 /**
6779  * Close current thread specific flow workspace.
6780  *
6781  * If previous workspace available, set it as current.
6782  *
6783  * @return pointer to thread specific flow workspace data, NULL on error.
6784  */
6785 static void
6786 mlx5_flow_pop_thread_workspace(void)
6787 {
6788         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6789
6790         if (!data)
6791                 return;
6792         if (!data->inuse) {
6793                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6794                 return;
6795         }
6796         data->inuse = 0;
6797         if (!data->prev)
6798                 return;
6799         if (mlx5_flow_os_set_specific_workspace(data->prev))
6800                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6801 }
6802
6803 /**
6804  * Verify the flow list is empty
6805  *
6806  * @param dev
6807  *  Pointer to Ethernet device.
6808  *
6809  * @return the number of flows not released.
6810  */
6811 int
6812 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
6813 {
6814         struct mlx5_priv *priv = dev->data->dev_private;
6815         struct rte_flow *flow;
6816         uint32_t idx = 0;
6817         int ret = 0, i;
6818
6819         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
6820                 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
6821                         DRV_LOG(DEBUG, "port %u flow %p still referenced",
6822                                 dev->data->port_id, (void *)flow);
6823                         ret++;
6824                 }
6825         }
6826         return ret;
6827 }
6828
6829 /**
6830  * Enable default hairpin egress flow.
6831  *
6832  * @param dev
6833  *   Pointer to Ethernet device.
6834  * @param queue
6835  *   The queue index.
6836  *
6837  * @return
6838  *   0 on success, a negative errno value otherwise and rte_errno is set.
6839  */
6840 int
6841 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6842                             uint32_t queue)
6843 {
6844         const struct rte_flow_attr attr = {
6845                 .egress = 1,
6846                 .priority = 0,
6847         };
6848         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6849                 .queue = queue,
6850         };
6851         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6852                 .queue = UINT32_MAX,
6853         };
6854         struct rte_flow_item items[] = {
6855                 {
6856                         .type = (enum rte_flow_item_type)
6857                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6858                         .spec = &queue_spec,
6859                         .last = NULL,
6860                         .mask = &queue_mask,
6861                 },
6862                 {
6863                         .type = RTE_FLOW_ITEM_TYPE_END,
6864                 },
6865         };
6866         struct rte_flow_action_jump jump = {
6867                 .group = MLX5_HAIRPIN_TX_TABLE,
6868         };
6869         struct rte_flow_action actions[2];
6870         uint32_t flow_idx;
6871         struct rte_flow_error error;
6872
6873         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6874         actions[0].conf = &jump;
6875         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6876         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6877                                     &attr, items, actions, false, &error);
6878         if (!flow_idx) {
6879                 DRV_LOG(DEBUG,
6880                         "Failed to create ctrl flow: rte_errno(%d),"
6881                         " type(%d), message(%s)",
6882                         rte_errno, error.type,
6883                         error.message ? error.message : " (no stated reason)");
6884                 return -rte_errno;
6885         }
6886         return 0;
6887 }
6888
6889 /**
6890  * Enable a control flow configured from the control plane.
6891  *
6892  * @param dev
6893  *   Pointer to Ethernet device.
6894  * @param eth_spec
6895  *   An Ethernet flow spec to apply.
6896  * @param eth_mask
6897  *   An Ethernet flow mask to apply.
6898  * @param vlan_spec
6899  *   A VLAN flow spec to apply.
6900  * @param vlan_mask
6901  *   A VLAN flow mask to apply.
6902  *
6903  * @return
6904  *   0 on success, a negative errno value otherwise and rte_errno is set.
6905  */
6906 int
6907 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6908                     struct rte_flow_item_eth *eth_spec,
6909                     struct rte_flow_item_eth *eth_mask,
6910                     struct rte_flow_item_vlan *vlan_spec,
6911                     struct rte_flow_item_vlan *vlan_mask)
6912 {
6913         struct mlx5_priv *priv = dev->data->dev_private;
6914         const struct rte_flow_attr attr = {
6915                 .ingress = 1,
6916                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6917         };
6918         struct rte_flow_item items[] = {
6919                 {
6920                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6921                         .spec = eth_spec,
6922                         .last = NULL,
6923                         .mask = eth_mask,
6924                 },
6925                 {
6926                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6927                                               RTE_FLOW_ITEM_TYPE_END,
6928                         .spec = vlan_spec,
6929                         .last = NULL,
6930                         .mask = vlan_mask,
6931                 },
6932                 {
6933                         .type = RTE_FLOW_ITEM_TYPE_END,
6934                 },
6935         };
6936         uint16_t queue[priv->reta_idx_n];
6937         struct rte_flow_action_rss action_rss = {
6938                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6939                 .level = 0,
6940                 .types = priv->rss_conf.rss_hf,
6941                 .key_len = priv->rss_conf.rss_key_len,
6942                 .queue_num = priv->reta_idx_n,
6943                 .key = priv->rss_conf.rss_key,
6944                 .queue = queue,
6945         };
6946         struct rte_flow_action actions[] = {
6947                 {
6948                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6949                         .conf = &action_rss,
6950                 },
6951                 {
6952                         .type = RTE_FLOW_ACTION_TYPE_END,
6953                 },
6954         };
6955         uint32_t flow_idx;
6956         struct rte_flow_error error;
6957         unsigned int i;
6958
6959         if (!priv->reta_idx_n || !priv->rxqs_n) {
6960                 return 0;
6961         }
6962         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6963                 action_rss.types = 0;
6964         for (i = 0; i != priv->reta_idx_n; ++i)
6965                 queue[i] = (*priv->reta_idx)[i];
6966         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6967                                     &attr, items, actions, false, &error);
6968         if (!flow_idx)
6969                 return -rte_errno;
6970         return 0;
6971 }
6972
6973 /**
6974  * Enable a flow control configured from the control plane.
6975  *
6976  * @param dev
6977  *   Pointer to Ethernet device.
6978  * @param eth_spec
6979  *   An Ethernet flow spec to apply.
6980  * @param eth_mask
6981  *   An Ethernet flow mask to apply.
6982  *
6983  * @return
6984  *   0 on success, a negative errno value otherwise and rte_errno is set.
6985  */
6986 int
6987 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6988                struct rte_flow_item_eth *eth_spec,
6989                struct rte_flow_item_eth *eth_mask)
6990 {
6991         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6992 }
6993
6994 /**
6995  * Create default miss flow rule matching lacp traffic
6996  *
6997  * @param dev
6998  *   Pointer to Ethernet device.
6999  * @param eth_spec
7000  *   An Ethernet flow spec to apply.
7001  *
7002  * @return
7003  *   0 on success, a negative errno value otherwise and rte_errno is set.
7004  */
7005 int
7006 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
7007 {
7008         /*
7009          * The LACP matching is done by only using ether type since using
7010          * a multicast dst mac causes kernel to give low priority to this flow.
7011          */
7012         static const struct rte_flow_item_eth lacp_spec = {
7013                 .type = RTE_BE16(0x8809),
7014         };
7015         static const struct rte_flow_item_eth lacp_mask = {
7016                 .type = 0xffff,
7017         };
7018         const struct rte_flow_attr attr = {
7019                 .ingress = 1,
7020         };
7021         struct rte_flow_item items[] = {
7022                 {
7023                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7024                         .spec = &lacp_spec,
7025                         .mask = &lacp_mask,
7026                 },
7027                 {
7028                         .type = RTE_FLOW_ITEM_TYPE_END,
7029                 },
7030         };
7031         struct rte_flow_action actions[] = {
7032                 {
7033                         .type = (enum rte_flow_action_type)
7034                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7035                 },
7036                 {
7037                         .type = RTE_FLOW_ACTION_TYPE_END,
7038                 },
7039         };
7040         struct rte_flow_error error;
7041         uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7042                                         &attr, items, actions,
7043                                         false, &error);
7044
7045         if (!flow_idx)
7046                 return -rte_errno;
7047         return 0;
7048 }
7049
7050 /**
7051  * Destroy a flow.
7052  *
7053  * @see rte_flow_destroy()
7054  * @see rte_flow_ops
7055  */
7056 int
7057 mlx5_flow_destroy(struct rte_eth_dev *dev,
7058                   struct rte_flow *flow,
7059                   struct rte_flow_error *error __rte_unused)
7060 {
7061         flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7062                                 (uintptr_t)(void *)flow);
7063         return 0;
7064 }
7065
7066 /**
7067  * Destroy all flows.
7068  *
7069  * @see rte_flow_flush()
7070  * @see rte_flow_ops
7071  */
7072 int
7073 mlx5_flow_flush(struct rte_eth_dev *dev,
7074                 struct rte_flow_error *error __rte_unused)
7075 {
7076         mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7077         return 0;
7078 }
7079
7080 /**
7081  * Isolated mode.
7082  *
7083  * @see rte_flow_isolate()
7084  * @see rte_flow_ops
7085  */
7086 int
7087 mlx5_flow_isolate(struct rte_eth_dev *dev,
7088                   int enable,
7089                   struct rte_flow_error *error)
7090 {
7091         struct mlx5_priv *priv = dev->data->dev_private;
7092
7093         if (dev->data->dev_started) {
7094                 rte_flow_error_set(error, EBUSY,
7095                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7096                                    NULL,
7097                                    "port must be stopped first");
7098                 return -rte_errno;
7099         }
7100         priv->isolated = !!enable;
7101         if (enable)
7102                 dev->dev_ops = &mlx5_dev_ops_isolate;
7103         else
7104                 dev->dev_ops = &mlx5_dev_ops;
7105
7106         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7107         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7108
7109         return 0;
7110 }
7111
7112 /**
7113  * Query a flow.
7114  *
7115  * @see rte_flow_query()
7116  * @see rte_flow_ops
7117  */
7118 static int
7119 flow_drv_query(struct rte_eth_dev *dev,
7120                uint32_t flow_idx,
7121                const struct rte_flow_action *actions,
7122                void *data,
7123                struct rte_flow_error *error)
7124 {
7125         struct mlx5_priv *priv = dev->data->dev_private;
7126         const struct mlx5_flow_driver_ops *fops;
7127         struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7128                                                flow_idx);
7129         enum mlx5_flow_drv_type ftype;
7130
7131         if (!flow) {
7132                 return rte_flow_error_set(error, ENOENT,
7133                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7134                           NULL,
7135                           "invalid flow handle");
7136         }
7137         ftype = flow->drv_type;
7138         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7139         fops = flow_get_drv_ops(ftype);
7140
7141         return fops->query(dev, flow, actions, data, error);
7142 }
7143
7144 /**
7145  * Query a flow.
7146  *
7147  * @see rte_flow_query()
7148  * @see rte_flow_ops
7149  */
7150 int
7151 mlx5_flow_query(struct rte_eth_dev *dev,
7152                 struct rte_flow *flow,
7153                 const struct rte_flow_action *actions,
7154                 void *data,
7155                 struct rte_flow_error *error)
7156 {
7157         int ret;
7158
7159         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7160                              error);
7161         if (ret < 0)
7162                 return ret;
7163         return 0;
7164 }
7165
7166 /**
7167  * Get rte_flow callbacks.
7168  *
7169  * @param dev
7170  *   Pointer to Ethernet device structure.
7171  * @param ops
7172  *   Pointer to operation-specific structure.
7173  *
7174  * @return 0
7175  */
7176 int
7177 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7178                   const struct rte_flow_ops **ops)
7179 {
7180         *ops = &mlx5_flow_ops;
7181         return 0;
7182 }
7183
7184 /**
7185  * Validate meter policy actions.
7186  * Dispatcher for action type specific validation.
7187  *
7188  * @param[in] dev
7189  *   Pointer to the Ethernet device structure.
7190  * @param[in] action
7191  *   The meter policy action object to validate.
7192  * @param[in] attr
7193  *   Attributes of flow to determine steering domain.
7194  * @param[out] is_rss
7195  *   Is RSS or not.
7196  * @param[out] domain_bitmap
7197  *   Domain bitmap.
7198  * @param[out] is_def_policy
7199  *   Is default policy or not.
7200  * @param[out] error
7201  *   Perform verbose error reporting if not NULL. Initialized in case of
7202  *   error only.
7203  *
7204  * @return
7205  *   0 on success, otherwise negative errno value.
7206  */
7207 int
7208 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7209                         const struct rte_flow_action *actions[RTE_COLORS],
7210                         struct rte_flow_attr *attr,
7211                         bool *is_rss,
7212                         uint8_t *domain_bitmap,
7213                         uint8_t *policy_mode,
7214                         struct rte_mtr_error *error)
7215 {
7216         const struct mlx5_flow_driver_ops *fops;
7217
7218         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7219         return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7220                                        domain_bitmap, policy_mode, error);
7221 }
7222
7223 /**
7224  * Destroy the meter table set.
7225  *
7226  * @param[in] dev
7227  *   Pointer to Ethernet device.
7228  * @param[in] mtr_policy
7229  *   Meter policy struct.
7230  */
7231 void
7232 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7233                       struct mlx5_flow_meter_policy *mtr_policy)
7234 {
7235         const struct mlx5_flow_driver_ops *fops;
7236
7237         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7238         fops->destroy_mtr_acts(dev, mtr_policy);
7239 }
7240
7241 /**
7242  * Create policy action, lock free,
7243  * (mutex should be acquired by caller).
7244  * Dispatcher for action type specific call.
7245  *
7246  * @param[in] dev
7247  *   Pointer to the Ethernet device structure.
7248  * @param[in] mtr_policy
7249  *   Meter policy struct.
7250  * @param[in] action
7251  *   Action specification used to create meter actions.
7252  * @param[out] error
7253  *   Perform verbose error reporting if not NULL. Initialized in case of
7254  *   error only.
7255  *
7256  * @return
7257  *   0 on success, otherwise negative errno value.
7258  */
7259 int
7260 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7261                       struct mlx5_flow_meter_policy *mtr_policy,
7262                       const struct rte_flow_action *actions[RTE_COLORS],
7263                       struct rte_mtr_error *error)
7264 {
7265         const struct mlx5_flow_driver_ops *fops;
7266
7267         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7268         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7269 }
7270
7271 /**
7272  * Create policy rules, lock free,
7273  * (mutex should be acquired by caller).
7274  * Dispatcher for action type specific call.
7275  *
7276  * @param[in] dev
7277  *   Pointer to the Ethernet device structure.
7278  * @param[in] mtr_policy
7279  *   Meter policy struct.
7280  *
7281  * @return
7282  *   0 on success, -1 otherwise.
7283  */
7284 int
7285 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7286                              struct mlx5_flow_meter_policy *mtr_policy)
7287 {
7288         const struct mlx5_flow_driver_ops *fops;
7289
7290         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7291         return fops->create_policy_rules(dev, mtr_policy);
7292 }
7293
7294 /**
7295  * Destroy policy rules, lock free,
7296  * (mutex should be acquired by caller).
7297  * Dispatcher for action type specific call.
7298  *
7299  * @param[in] dev
7300  *   Pointer to the Ethernet device structure.
7301  * @param[in] mtr_policy
7302  *   Meter policy struct.
7303  */
7304 void
7305 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7306                              struct mlx5_flow_meter_policy *mtr_policy)
7307 {
7308         const struct mlx5_flow_driver_ops *fops;
7309
7310         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7311         fops->destroy_policy_rules(dev, mtr_policy);
7312 }
7313
7314 /**
7315  * Destroy the default policy table set.
7316  *
7317  * @param[in] dev
7318  *   Pointer to Ethernet device.
7319  */
7320 void
7321 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7322 {
7323         const struct mlx5_flow_driver_ops *fops;
7324
7325         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7326         fops->destroy_def_policy(dev);
7327 }
7328
7329 /**
7330  * Destroy the default policy table set.
7331  *
7332  * @param[in] dev
7333  *   Pointer to Ethernet device.
7334  *
7335  * @return
7336  *   0 on success, -1 otherwise.
7337  */
7338 int
7339 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7340 {
7341         const struct mlx5_flow_driver_ops *fops;
7342
7343         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7344         return fops->create_def_policy(dev);
7345 }
7346
7347 /**
7348  * Create the needed meter and suffix tables.
7349  *
7350  * @param[in] dev
7351  *   Pointer to Ethernet device.
7352  *
7353  * @return
7354  *   0 on success, -1 otherwise.
7355  */
7356 int
7357 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7358                         struct mlx5_flow_meter_info *fm,
7359                         uint32_t mtr_idx,
7360                         uint8_t domain_bitmap)
7361 {
7362         const struct mlx5_flow_driver_ops *fops;
7363
7364         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7365         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7366 }
7367
7368 /**
7369  * Destroy the meter table set.
7370  *
7371  * @param[in] dev
7372  *   Pointer to Ethernet device.
7373  * @param[in] tbl
7374  *   Pointer to the meter table set.
7375  */
7376 void
7377 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7378                            struct mlx5_flow_meter_info *fm)
7379 {
7380         const struct mlx5_flow_driver_ops *fops;
7381
7382         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7383         fops->destroy_mtr_tbls(dev, fm);
7384 }
7385
7386 /**
7387  * Destroy the global meter drop table.
7388  *
7389  * @param[in] dev
7390  *   Pointer to Ethernet device.
7391  */
7392 void
7393 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7394 {
7395         const struct mlx5_flow_driver_ops *fops;
7396
7397         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7398         fops->destroy_mtr_drop_tbls(dev);
7399 }
7400
7401 /**
7402  * Destroy the sub policy table with RX queue.
7403  *
7404  * @param[in] dev
7405  *   Pointer to Ethernet device.
7406  * @param[in] mtr_policy
7407  *   Pointer to meter policy table.
7408  */
7409 void
7410 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7411                 struct mlx5_flow_meter_policy *mtr_policy)
7412 {
7413         const struct mlx5_flow_driver_ops *fops;
7414
7415         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7416         fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7417 }
7418
7419 /**
7420  * Allocate the needed aso flow meter id.
7421  *
7422  * @param[in] dev
7423  *   Pointer to Ethernet device.
7424  *
7425  * @return
7426  *   Index to aso flow meter on success, NULL otherwise.
7427  */
7428 uint32_t
7429 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7430 {
7431         const struct mlx5_flow_driver_ops *fops;
7432
7433         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7434         return fops->create_meter(dev);
7435 }
7436
7437 /**
7438  * Free the aso flow meter id.
7439  *
7440  * @param[in] dev
7441  *   Pointer to Ethernet device.
7442  * @param[in] mtr_idx
7443  *  Index to aso flow meter to be free.
7444  *
7445  * @return
7446  *   0 on success.
7447  */
7448 void
7449 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7450 {
7451         const struct mlx5_flow_driver_ops *fops;
7452
7453         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7454         fops->free_meter(dev, mtr_idx);
7455 }
7456
7457 /**
7458  * Allocate a counter.
7459  *
7460  * @param[in] dev
7461  *   Pointer to Ethernet device structure.
7462  *
7463  * @return
7464  *   Index to allocated counter  on success, 0 otherwise.
7465  */
7466 uint32_t
7467 mlx5_counter_alloc(struct rte_eth_dev *dev)
7468 {
7469         const struct mlx5_flow_driver_ops *fops;
7470         struct rte_flow_attr attr = { .transfer = 0 };
7471
7472         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7473                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7474                 return fops->counter_alloc(dev);
7475         }
7476         DRV_LOG(ERR,
7477                 "port %u counter allocate is not supported.",
7478                  dev->data->port_id);
7479         return 0;
7480 }
7481
7482 /**
7483  * Free a counter.
7484  *
7485  * @param[in] dev
7486  *   Pointer to Ethernet device structure.
7487  * @param[in] cnt
7488  *   Index to counter to be free.
7489  */
7490 void
7491 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7492 {
7493         const struct mlx5_flow_driver_ops *fops;
7494         struct rte_flow_attr attr = { .transfer = 0 };
7495
7496         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7497                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7498                 fops->counter_free(dev, cnt);
7499                 return;
7500         }
7501         DRV_LOG(ERR,
7502                 "port %u counter free is not supported.",
7503                  dev->data->port_id);
7504 }
7505
7506 /**
7507  * Query counter statistics.
7508  *
7509  * @param[in] dev
7510  *   Pointer to Ethernet device structure.
7511  * @param[in] cnt
7512  *   Index to counter to query.
7513  * @param[in] clear
7514  *   Set to clear counter statistics.
7515  * @param[out] pkts
7516  *   The counter hits packets number to save.
7517  * @param[out] bytes
7518  *   The counter hits bytes number to save.
7519  *
7520  * @return
7521  *   0 on success, a negative errno value otherwise.
7522  */
7523 int
7524 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7525                    bool clear, uint64_t *pkts, uint64_t *bytes)
7526 {
7527         const struct mlx5_flow_driver_ops *fops;
7528         struct rte_flow_attr attr = { .transfer = 0 };
7529
7530         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7531                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7532                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7533         }
7534         DRV_LOG(ERR,
7535                 "port %u counter query is not supported.",
7536                  dev->data->port_id);
7537         return -ENOTSUP;
7538 }
7539
7540 /**
7541  * Allocate a new memory for the counter values wrapped by all the needed
7542  * management.
7543  *
7544  * @param[in] sh
7545  *   Pointer to mlx5_dev_ctx_shared object.
7546  *
7547  * @return
7548  *   0 on success, a negative errno value otherwise.
7549  */
7550 static int
7551 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7552 {
7553         struct mlx5_devx_mkey_attr mkey_attr;
7554         struct mlx5_counter_stats_mem_mng *mem_mng;
7555         volatile struct flow_counter_stats *raw_data;
7556         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7557         int size = (sizeof(struct flow_counter_stats) *
7558                         MLX5_COUNTERS_PER_POOL +
7559                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7560                         sizeof(struct mlx5_counter_stats_mem_mng);
7561         size_t pgsize = rte_mem_page_size();
7562         uint8_t *mem;
7563         int i;
7564
7565         if (pgsize == (size_t)-1) {
7566                 DRV_LOG(ERR, "Failed to get mem page size");
7567                 rte_errno = ENOMEM;
7568                 return -ENOMEM;
7569         }
7570         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7571         if (!mem) {
7572                 rte_errno = ENOMEM;
7573                 return -ENOMEM;
7574         }
7575         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7576         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7577         mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,
7578                                                  IBV_ACCESS_LOCAL_WRITE);
7579         if (!mem_mng->umem) {
7580                 rte_errno = errno;
7581                 mlx5_free(mem);
7582                 return -rte_errno;
7583         }
7584         memset(&mkey_attr, 0, sizeof(mkey_attr));
7585         mkey_attr.addr = (uintptr_t)mem;
7586         mkey_attr.size = size;
7587         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7588         mkey_attr.pd = sh->pdn;
7589         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
7590         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
7591         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
7592         if (!mem_mng->dm) {
7593                 mlx5_os_umem_dereg(mem_mng->umem);
7594                 rte_errno = errno;
7595                 mlx5_free(mem);
7596                 return -rte_errno;
7597         }
7598         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7599         raw_data = (volatile struct flow_counter_stats *)mem;
7600         for (i = 0; i < raws_n; ++i) {
7601                 mem_mng->raws[i].mem_mng = mem_mng;
7602                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7603         }
7604         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7605                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7606                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7607                                  next);
7608         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7609         sh->cmng.mem_mng = mem_mng;
7610         return 0;
7611 }
7612
7613 /**
7614  * Set the statistic memory to the new counter pool.
7615  *
7616  * @param[in] sh
7617  *   Pointer to mlx5_dev_ctx_shared object.
7618  * @param[in] pool
7619  *   Pointer to the pool to set the statistic memory.
7620  *
7621  * @return
7622  *   0 on success, a negative errno value otherwise.
7623  */
7624 static int
7625 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7626                                struct mlx5_flow_counter_pool *pool)
7627 {
7628         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7629         /* Resize statistic memory once used out. */
7630         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7631             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7632                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7633                 return -1;
7634         }
7635         rte_spinlock_lock(&pool->sl);
7636         pool->raw = cmng->mem_mng->raws + pool->index %
7637                     MLX5_CNT_CONTAINER_RESIZE;
7638         rte_spinlock_unlock(&pool->sl);
7639         pool->raw_hw = NULL;
7640         return 0;
7641 }
7642
7643 #define MLX5_POOL_QUERY_FREQ_US 1000000
7644
7645 /**
7646  * Set the periodic procedure for triggering asynchronous batch queries for all
7647  * the counter pools.
7648  *
7649  * @param[in] sh
7650  *   Pointer to mlx5_dev_ctx_shared object.
7651  */
7652 void
7653 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7654 {
7655         uint32_t pools_n, us;
7656
7657         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7658         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7659         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7660         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7661                 sh->cmng.query_thread_on = 0;
7662                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7663         } else {
7664                 sh->cmng.query_thread_on = 1;
7665         }
7666 }
7667
7668 /**
7669  * The periodic procedure for triggering asynchronous batch queries for all the
7670  * counter pools. This function is probably called by the host thread.
7671  *
7672  * @param[in] arg
7673  *   The parameter for the alarm process.
7674  */
7675 void
7676 mlx5_flow_query_alarm(void *arg)
7677 {
7678         struct mlx5_dev_ctx_shared *sh = arg;
7679         int ret;
7680         uint16_t pool_index = sh->cmng.pool_index;
7681         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7682         struct mlx5_flow_counter_pool *pool;
7683         uint16_t n_valid;
7684
7685         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7686                 goto set_alarm;
7687         rte_spinlock_lock(&cmng->pool_update_sl);
7688         pool = cmng->pools[pool_index];
7689         n_valid = cmng->n_valid;
7690         rte_spinlock_unlock(&cmng->pool_update_sl);
7691         /* Set the statistic memory to the new created pool. */
7692         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7693                 goto set_alarm;
7694         if (pool->raw_hw)
7695                 /* There is a pool query in progress. */
7696                 goto set_alarm;
7697         pool->raw_hw =
7698                 LIST_FIRST(&sh->cmng.free_stat_raws);
7699         if (!pool->raw_hw)
7700                 /* No free counter statistics raw memory. */
7701                 goto set_alarm;
7702         /*
7703          * Identify the counters released between query trigger and query
7704          * handle more efficiently. The counter released in this gap period
7705          * should wait for a new round of query as the new arrived packets
7706          * will not be taken into account.
7707          */
7708         pool->query_gen++;
7709         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7710                                                MLX5_COUNTERS_PER_POOL,
7711                                                NULL, NULL,
7712                                                pool->raw_hw->mem_mng->dm->id,
7713                                                (void *)(uintptr_t)
7714                                                pool->raw_hw->data,
7715                                                sh->devx_comp,
7716                                                (uint64_t)(uintptr_t)pool);
7717         if (ret) {
7718                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7719                         " %d", pool->min_dcs->id);
7720                 pool->raw_hw = NULL;
7721                 goto set_alarm;
7722         }
7723         LIST_REMOVE(pool->raw_hw, next);
7724         sh->cmng.pending_queries++;
7725         pool_index++;
7726         if (pool_index >= n_valid)
7727                 pool_index = 0;
7728 set_alarm:
7729         sh->cmng.pool_index = pool_index;
7730         mlx5_set_query_alarm(sh);
7731 }
7732
7733 /**
7734  * Check and callback event for new aged flow in the counter pool
7735  *
7736  * @param[in] sh
7737  *   Pointer to mlx5_dev_ctx_shared object.
7738  * @param[in] pool
7739  *   Pointer to Current counter pool.
7740  */
7741 static void
7742 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7743                    struct mlx5_flow_counter_pool *pool)
7744 {
7745         struct mlx5_priv *priv;
7746         struct mlx5_flow_counter *cnt;
7747         struct mlx5_age_info *age_info;
7748         struct mlx5_age_param *age_param;
7749         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7750         struct mlx5_counter_stats_raw *prev = pool->raw;
7751         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7752         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7753         uint16_t expected = AGE_CANDIDATE;
7754         uint32_t i;
7755
7756         pool->time_of_last_age_check = curr_time;
7757         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7758                 cnt = MLX5_POOL_GET_CNT(pool, i);
7759                 age_param = MLX5_CNT_TO_AGE(cnt);
7760                 if (__atomic_load_n(&age_param->state,
7761                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7762                         continue;
7763                 if (cur->data[i].hits != prev->data[i].hits) {
7764                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7765                                          __ATOMIC_RELAXED);
7766                         continue;
7767                 }
7768                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7769                                        time_delta,
7770                                        __ATOMIC_RELAXED) <= age_param->timeout)
7771                         continue;
7772                 /**
7773                  * Hold the lock first, or if between the
7774                  * state AGE_TMOUT and tailq operation the
7775                  * release happened, the release procedure
7776                  * may delete a non-existent tailq node.
7777                  */
7778                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7779                 age_info = GET_PORT_AGE_INFO(priv);
7780                 rte_spinlock_lock(&age_info->aged_sl);
7781                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7782                                                 AGE_TMOUT, false,
7783                                                 __ATOMIC_RELAXED,
7784                                                 __ATOMIC_RELAXED)) {
7785                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
7786                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
7787                 }
7788                 rte_spinlock_unlock(&age_info->aged_sl);
7789         }
7790         mlx5_age_event_prepare(sh);
7791 }
7792
7793 /**
7794  * Handler for the HW respond about ready values from an asynchronous batch
7795  * query. This function is probably called by the host thread.
7796  *
7797  * @param[in] sh
7798  *   The pointer to the shared device context.
7799  * @param[in] async_id
7800  *   The Devx async ID.
7801  * @param[in] status
7802  *   The status of the completion.
7803  */
7804 void
7805 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
7806                                   uint64_t async_id, int status)
7807 {
7808         struct mlx5_flow_counter_pool *pool =
7809                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
7810         struct mlx5_counter_stats_raw *raw_to_free;
7811         uint8_t query_gen = pool->query_gen ^ 1;
7812         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7813         enum mlx5_counter_type cnt_type =
7814                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
7815                                 MLX5_COUNTER_TYPE_ORIGIN;
7816
7817         if (unlikely(status)) {
7818                 raw_to_free = pool->raw_hw;
7819         } else {
7820                 raw_to_free = pool->raw;
7821                 if (pool->is_aged)
7822                         mlx5_flow_aging_check(sh, pool);
7823                 rte_spinlock_lock(&pool->sl);
7824                 pool->raw = pool->raw_hw;
7825                 rte_spinlock_unlock(&pool->sl);
7826                 /* Be sure the new raw counters data is updated in memory. */
7827                 rte_io_wmb();
7828                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
7829                         rte_spinlock_lock(&cmng->csl[cnt_type]);
7830                         TAILQ_CONCAT(&cmng->counters[cnt_type],
7831                                      &pool->counters[query_gen], next);
7832                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
7833                 }
7834         }
7835         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
7836         pool->raw_hw = NULL;
7837         sh->cmng.pending_queries--;
7838 }
7839
7840 static int
7841 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7842                     const struct flow_grp_info *grp_info,
7843                     struct rte_flow_error *error)
7844 {
7845         if (grp_info->transfer && grp_info->external &&
7846             grp_info->fdb_def_rule) {
7847                 if (group == UINT32_MAX)
7848                         return rte_flow_error_set
7849                                                 (error, EINVAL,
7850                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7851                                                  NULL,
7852                                                  "group index not supported");
7853                 *table = group + 1;
7854         } else {
7855                 *table = group;
7856         }
7857         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7858         return 0;
7859 }
7860
7861 /**
7862  * Translate the rte_flow group index to HW table value.
7863  *
7864  * If tunnel offload is disabled, all group ids converted to flow table
7865  * id using the standard method.
7866  * If tunnel offload is enabled, group id can be converted using the
7867  * standard or tunnel conversion method. Group conversion method
7868  * selection depends on flags in `grp_info` parameter:
7869  * - Internal (grp_info.external == 0) groups conversion uses the
7870  *   standard method.
7871  * - Group ids in JUMP action converted with the tunnel conversion.
7872  * - Group id in rule attribute conversion depends on a rule type and
7873  *   group id value:
7874  *   ** non zero group attributes converted with the tunnel method
7875  *   ** zero group attribute in non-tunnel rule is converted using the
7876  *      standard method - there's only one root table
7877  *   ** zero group attribute in steer tunnel rule is converted with the
7878  *      standard method - single root table
7879  *   ** zero group attribute in match tunnel rule is a special OvS
7880  *      case: that value is used for portability reasons. That group
7881  *      id is converted with the tunnel conversion method.
7882  *
7883  * @param[in] dev
7884  *   Port device
7885  * @param[in] tunnel
7886  *   PMD tunnel offload object
7887  * @param[in] group
7888  *   rte_flow group index value.
7889  * @param[out] table
7890  *   HW table value.
7891  * @param[in] grp_info
7892  *   flags used for conversion
7893  * @param[out] error
7894  *   Pointer to error structure.
7895  *
7896  * @return
7897  *   0 on success, a negative errno value otherwise and rte_errno is set.
7898  */
7899 int
7900 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7901                          const struct mlx5_flow_tunnel *tunnel,
7902                          uint32_t group, uint32_t *table,
7903                          const struct flow_grp_info *grp_info,
7904                          struct rte_flow_error *error)
7905 {
7906         int ret;
7907         bool standard_translation;
7908
7909         if (!grp_info->skip_scale && grp_info->external &&
7910             group < MLX5_MAX_TABLES_EXTERNAL)
7911                 group *= MLX5_FLOW_TABLE_FACTOR;
7912         if (is_tunnel_offload_active(dev)) {
7913                 standard_translation = !grp_info->external ||
7914                                         grp_info->std_tbl_fix;
7915         } else {
7916                 standard_translation = true;
7917         }
7918         DRV_LOG(DEBUG,
7919                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
7920                 dev->data->port_id, group, grp_info->transfer,
7921                 grp_info->external, grp_info->fdb_def_rule,
7922                 standard_translation ? "STANDARD" : "TUNNEL");
7923         if (standard_translation)
7924                 ret = flow_group_to_table(dev->data->port_id, group, table,
7925                                           grp_info, error);
7926         else
7927                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7928                                                       table, error);
7929
7930         return ret;
7931 }
7932
7933 /**
7934  * Discover availability of metadata reg_c's.
7935  *
7936  * Iteratively use test flows to check availability.
7937  *
7938  * @param[in] dev
7939  *   Pointer to the Ethernet device structure.
7940  *
7941  * @return
7942  *   0 on success, a negative errno value otherwise and rte_errno is set.
7943  */
7944 int
7945 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7946 {
7947         struct mlx5_priv *priv = dev->data->dev_private;
7948         struct mlx5_dev_config *config = &priv->config;
7949         enum modify_reg idx;
7950         int n = 0;
7951
7952         /* reg_c[0] and reg_c[1] are reserved. */
7953         config->flow_mreg_c[n++] = REG_C_0;
7954         config->flow_mreg_c[n++] = REG_C_1;
7955         /* Discover availability of other reg_c's. */
7956         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7957                 struct rte_flow_attr attr = {
7958                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7959                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7960                         .ingress = 1,
7961                 };
7962                 struct rte_flow_item items[] = {
7963                         [0] = {
7964                                 .type = RTE_FLOW_ITEM_TYPE_END,
7965                         },
7966                 };
7967                 struct rte_flow_action actions[] = {
7968                         [0] = {
7969                                 .type = (enum rte_flow_action_type)
7970                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7971                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7972                                         .src = REG_C_1,
7973                                         .dst = idx,
7974                                 },
7975                         },
7976                         [1] = {
7977                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7978                                 .conf = &(struct rte_flow_action_jump){
7979                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7980                                 },
7981                         },
7982                         [2] = {
7983                                 .type = RTE_FLOW_ACTION_TYPE_END,
7984                         },
7985                 };
7986                 uint32_t flow_idx;
7987                 struct rte_flow *flow;
7988                 struct rte_flow_error error;
7989
7990                 if (!config->dv_flow_en)
7991                         break;
7992                 /* Create internal flow, validation skips copy action. */
7993                 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
7994                                         items, actions, false, &error);
7995                 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7996                                       flow_idx);
7997                 if (!flow)
7998                         continue;
7999                 config->flow_mreg_c[n++] = idx;
8000                 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
8001         }
8002         for (; n < MLX5_MREG_C_NUM; ++n)
8003                 config->flow_mreg_c[n] = REG_NON;
8004         return 0;
8005 }
8006
8007 int
8008 save_dump_file(const uint8_t *data, uint32_t size,
8009         uint32_t type, uint32_t id, void *arg, FILE *file)
8010 {
8011         char line[BUF_SIZE];
8012         uint32_t out = 0;
8013         uint32_t k;
8014         uint32_t actions_num;
8015         struct rte_flow_query_count *count;
8016
8017         memset(line, 0, BUF_SIZE);
8018         switch (type) {
8019         case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
8020                 actions_num = *(uint32_t *)(arg);
8021                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,%d,",
8022                                 type, id, actions_num);
8023                 break;
8024         case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
8025                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,",
8026                                 type, id);
8027                 break;
8028         case DR_DUMP_REC_TYPE_PMD_COUNTER:
8029                 count = (struct rte_flow_query_count *)arg;
8030                 fprintf(file, "%d,0x%x,%" PRIu64 ",%" PRIu64 "\n", type,
8031                                 id, count->hits, count->bytes);
8032                 return 0;
8033         default:
8034                 return -1;
8035         }
8036
8037         for (k = 0; k < size; k++) {
8038                 /* Make sure we do not overrun the line buffer length. */
8039                 if (out >= BUF_SIZE - 4) {
8040                         line[out] = '\0';
8041                         break;
8042                 }
8043                 out += snprintf(line + out, BUF_SIZE - out, "%02x",
8044                                 (data[k]) & 0xff);
8045         }
8046         fprintf(file, "%s\n", line);
8047         return 0;
8048 }
8049
8050 int
8051 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
8052         struct rte_flow_query_count *count, struct rte_flow_error *error)
8053 {
8054         struct rte_flow_action action[2];
8055         enum mlx5_flow_drv_type ftype;
8056         const struct mlx5_flow_driver_ops *fops;
8057
8058         if (!flow) {
8059                 return rte_flow_error_set(error, ENOENT,
8060                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8061                                 NULL,
8062                                 "invalid flow handle");
8063         }
8064         action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
8065         action[1].type = RTE_FLOW_ACTION_TYPE_END;
8066         if (flow->counter) {
8067                 memset(count, 0, sizeof(struct rte_flow_query_count));
8068                 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
8069                 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
8070                                                 ftype < MLX5_FLOW_TYPE_MAX);
8071                 fops = flow_get_drv_ops(ftype);
8072                 return fops->query(dev, flow, action, count, error);
8073         }
8074         return -1;
8075 }
8076
8077 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8078 /**
8079  * Dump flow ipool data to file
8080  *
8081  * @param[in] dev
8082  *   The pointer to Ethernet device.
8083  * @param[in] file
8084  *   A pointer to a file for output.
8085  * @param[out] error
8086  *   Perform verbose error reporting if not NULL. PMDs initialize this
8087  *   structure in case of error only.
8088  * @return
8089  *   0 on success, a negative value otherwise.
8090  */
8091 int
8092 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
8093         struct rte_flow *flow, FILE *file,
8094         struct rte_flow_error *error)
8095 {
8096         struct mlx5_priv *priv = dev->data->dev_private;
8097         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8098         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8099         uint32_t handle_idx;
8100         struct mlx5_flow_handle *dh;
8101         struct rte_flow_query_count count;
8102         uint32_t actions_num;
8103         const uint8_t *data;
8104         size_t size;
8105         uint32_t id;
8106         uint32_t type;
8107
8108         if (!flow) {
8109                 return rte_flow_error_set(error, ENOENT,
8110                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8111                         NULL,
8112                         "invalid flow handle");
8113         }
8114         handle_idx = flow->dev_handles;
8115         while (handle_idx) {
8116                 dh = mlx5_ipool_get(priv->sh->ipool
8117                         [MLX5_IPOOL_MLX5_FLOW], handle_idx);
8118                 if (!dh)
8119                         continue;
8120                 handle_idx = dh->next.next;
8121                 id = (uint32_t)(uintptr_t)dh->drv_flow;
8122
8123                 /* query counter */
8124                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8125                 if (!mlx5_flow_query_counter(dev, flow, &count, error))
8126                         save_dump_file(NULL, 0, type,
8127                                         id, (void *)&count, file);
8128
8129                 /* Get modify_hdr and encap_decap buf from ipools. */
8130                 encap_decap = NULL;
8131                 modify_hdr = dh->dvh.modify_hdr;
8132
8133                 if (dh->dvh.rix_encap_decap) {
8134                         encap_decap = mlx5_ipool_get(priv->sh->ipool
8135                                                 [MLX5_IPOOL_DECAP_ENCAP],
8136                                                 dh->dvh.rix_encap_decap);
8137                 }
8138                 if (modify_hdr) {
8139                         data = (const uint8_t *)modify_hdr->actions;
8140                         size = (size_t)(modify_hdr->actions_num) * 8;
8141                         actions_num = modify_hdr->actions_num;
8142                         type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8143                         save_dump_file(data, size, type, id,
8144                                         (void *)(&actions_num), file);
8145                 }
8146                 if (encap_decap) {
8147                         data = encap_decap->buf;
8148                         size = encap_decap->size;
8149                         type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8150                         save_dump_file(data, size, type,
8151                                                 id, NULL, file);
8152                 }
8153         }
8154         return 0;
8155 }
8156 #endif
8157
8158 /**
8159  * Dump flow raw hw data to file
8160  *
8161  * @param[in] dev
8162  *    The pointer to Ethernet device.
8163  * @param[in] file
8164  *   A pointer to a file for output.
8165  * @param[out] error
8166  *   Perform verbose error reporting if not NULL. PMDs initialize this
8167  *   structure in case of error only.
8168  * @return
8169  *   0 on success, a nagative value otherwise.
8170  */
8171 int
8172 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
8173                    FILE *file,
8174                    struct rte_flow_error *error __rte_unused)
8175 {
8176         struct mlx5_priv *priv = dev->data->dev_private;
8177         struct mlx5_dev_ctx_shared *sh = priv->sh;
8178         uint32_t handle_idx;
8179         int ret;
8180         struct mlx5_flow_handle *dh;
8181         struct rte_flow *flow;
8182 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8183         uint32_t idx;
8184 #endif
8185
8186         if (!priv->config.dv_flow_en) {
8187                 if (fputs("device dv flow disabled\n", file) <= 0)
8188                         return -errno;
8189                 return -ENOTSUP;
8190         }
8191
8192         /* dump all */
8193         if (!flow_idx) {
8194 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8195                 MLX5_IPOOL_FOREACH(priv->flows[MLX5_FLOW_TYPE_GEN], idx, flow)
8196                         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8197 #endif
8198                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
8199                                         sh->rx_domain,
8200                                         sh->tx_domain, file);
8201         }
8202         /* dump one */
8203         flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8204                         (uintptr_t)(void *)flow_idx);
8205         if (!flow)
8206                 return -ENOENT;
8207
8208 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8209         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8210 #endif
8211         handle_idx = flow->dev_handles;
8212         while (handle_idx) {
8213                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8214                                 handle_idx);
8215                 if (!dh)
8216                         return -ENOENT;
8217                 if (dh->drv_flow) {
8218                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
8219                                         file);
8220                         if (ret)
8221                                 return -ENOENT;
8222                 }
8223                 handle_idx = dh->next.next;
8224         }
8225         return 0;
8226 }
8227
8228 /**
8229  * Get aged-out flows.
8230  *
8231  * @param[in] dev
8232  *   Pointer to the Ethernet device structure.
8233  * @param[in] context
8234  *   The address of an array of pointers to the aged-out flows contexts.
8235  * @param[in] nb_countexts
8236  *   The length of context array pointers.
8237  * @param[out] error
8238  *   Perform verbose error reporting if not NULL. Initialized in case of
8239  *   error only.
8240  *
8241  * @return
8242  *   how many contexts get in success, otherwise negative errno value.
8243  *   if nb_contexts is 0, return the amount of all aged contexts.
8244  *   if nb_contexts is not 0 , return the amount of aged flows reported
8245  *   in the context array.
8246  */
8247 int
8248 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
8249                         uint32_t nb_contexts, struct rte_flow_error *error)
8250 {
8251         const struct mlx5_flow_driver_ops *fops;
8252         struct rte_flow_attr attr = { .transfer = 0 };
8253
8254         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8255                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8256                 return fops->get_aged_flows(dev, contexts, nb_contexts,
8257                                                     error);
8258         }
8259         DRV_LOG(ERR,
8260                 "port %u get aged flows is not supported.",
8261                  dev->data->port_id);
8262         return -ENOTSUP;
8263 }
8264
8265 /* Wrapper for driver action_validate op callback */
8266 static int
8267 flow_drv_action_validate(struct rte_eth_dev *dev,
8268                          const struct rte_flow_indir_action_conf *conf,
8269                          const struct rte_flow_action *action,
8270                          const struct mlx5_flow_driver_ops *fops,
8271                          struct rte_flow_error *error)
8272 {
8273         static const char err_msg[] = "indirect action validation unsupported";
8274
8275         if (!fops->action_validate) {
8276                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8277                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8278                                    NULL, err_msg);
8279                 return -rte_errno;
8280         }
8281         return fops->action_validate(dev, conf, action, error);
8282 }
8283
8284 /**
8285  * Destroys the shared action by handle.
8286  *
8287  * @param dev
8288  *   Pointer to Ethernet device structure.
8289  * @param[in] handle
8290  *   Handle for the indirect action object to be destroyed.
8291  * @param[out] error
8292  *   Perform verbose error reporting if not NULL. PMDs initialize this
8293  *   structure in case of error only.
8294  *
8295  * @return
8296  *   0 on success, a negative errno value otherwise and rte_errno is set.
8297  *
8298  * @note: wrapper for driver action_create op callback.
8299  */
8300 static int
8301 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
8302                            struct rte_flow_action_handle *handle,
8303                            struct rte_flow_error *error)
8304 {
8305         static const char err_msg[] = "indirect action destruction unsupported";
8306         struct rte_flow_attr attr = { .transfer = 0 };
8307         const struct mlx5_flow_driver_ops *fops =
8308                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8309
8310         if (!fops->action_destroy) {
8311                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8312                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8313                                    NULL, err_msg);
8314                 return -rte_errno;
8315         }
8316         return fops->action_destroy(dev, handle, error);
8317 }
8318
8319 /* Wrapper for driver action_destroy op callback */
8320 static int
8321 flow_drv_action_update(struct rte_eth_dev *dev,
8322                        struct rte_flow_action_handle *handle,
8323                        const void *update,
8324                        const struct mlx5_flow_driver_ops *fops,
8325                        struct rte_flow_error *error)
8326 {
8327         static const char err_msg[] = "indirect action update unsupported";
8328
8329         if (!fops->action_update) {
8330                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8331                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8332                                    NULL, err_msg);
8333                 return -rte_errno;
8334         }
8335         return fops->action_update(dev, handle, update, error);
8336 }
8337
8338 /* Wrapper for driver action_destroy op callback */
8339 static int
8340 flow_drv_action_query(struct rte_eth_dev *dev,
8341                       const struct rte_flow_action_handle *handle,
8342                       void *data,
8343                       const struct mlx5_flow_driver_ops *fops,
8344                       struct rte_flow_error *error)
8345 {
8346         static const char err_msg[] = "indirect action query unsupported";
8347
8348         if (!fops->action_query) {
8349                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8350                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8351                                    NULL, err_msg);
8352                 return -rte_errno;
8353         }
8354         return fops->action_query(dev, handle, data, error);
8355 }
8356
8357 /**
8358  * Create indirect action for reuse in multiple flow rules.
8359  *
8360  * @param dev
8361  *   Pointer to Ethernet device structure.
8362  * @param conf
8363  *   Pointer to indirect action object configuration.
8364  * @param[in] action
8365  *   Action configuration for indirect action object creation.
8366  * @param[out] error
8367  *   Perform verbose error reporting if not NULL. PMDs initialize this
8368  *   structure in case of error only.
8369  * @return
8370  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
8371  */
8372 static struct rte_flow_action_handle *
8373 mlx5_action_handle_create(struct rte_eth_dev *dev,
8374                           const struct rte_flow_indir_action_conf *conf,
8375                           const struct rte_flow_action *action,
8376                           struct rte_flow_error *error)
8377 {
8378         static const char err_msg[] = "indirect action creation unsupported";
8379         struct rte_flow_attr attr = { .transfer = 0 };
8380         const struct mlx5_flow_driver_ops *fops =
8381                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8382
8383         if (flow_drv_action_validate(dev, conf, action, fops, error))
8384                 return NULL;
8385         if (!fops->action_create) {
8386                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8387                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8388                                    NULL, err_msg);
8389                 return NULL;
8390         }
8391         return fops->action_create(dev, conf, action, error);
8392 }
8393
8394 /**
8395  * Updates inplace the indirect action configuration pointed by *handle*
8396  * with the configuration provided as *update* argument.
8397  * The update of the indirect action configuration effects all flow rules
8398  * reusing the action via handle.
8399  *
8400  * @param dev
8401  *   Pointer to Ethernet device structure.
8402  * @param[in] handle
8403  *   Handle for the indirect action to be updated.
8404  * @param[in] update
8405  *   Action specification used to modify the action pointed by handle.
8406  *   *update* could be of same type with the action pointed by the *handle*
8407  *   handle argument, or some other structures like a wrapper, depending on
8408  *   the indirect action type.
8409  * @param[out] error
8410  *   Perform verbose error reporting if not NULL. PMDs initialize this
8411  *   structure in case of error only.
8412  *
8413  * @return
8414  *   0 on success, a negative errno value otherwise and rte_errno is set.
8415  */
8416 static int
8417 mlx5_action_handle_update(struct rte_eth_dev *dev,
8418                 struct rte_flow_action_handle *handle,
8419                 const void *update,
8420                 struct rte_flow_error *error)
8421 {
8422         struct rte_flow_attr attr = { .transfer = 0 };
8423         const struct mlx5_flow_driver_ops *fops =
8424                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8425         int ret;
8426
8427         ret = flow_drv_action_validate(dev, NULL,
8428                         (const struct rte_flow_action *)update, fops, error);
8429         if (ret)
8430                 return ret;
8431         return flow_drv_action_update(dev, handle, update, fops,
8432                                       error);
8433 }
8434
8435 /**
8436  * Query the indirect action by handle.
8437  *
8438  * This function allows retrieving action-specific data such as counters.
8439  * Data is gathered by special action which may be present/referenced in
8440  * more than one flow rule definition.
8441  *
8442  * see @RTE_FLOW_ACTION_TYPE_COUNT
8443  *
8444  * @param dev
8445  *   Pointer to Ethernet device structure.
8446  * @param[in] handle
8447  *   Handle for the indirect action to query.
8448  * @param[in, out] data
8449  *   Pointer to storage for the associated query data type.
8450  * @param[out] error
8451  *   Perform verbose error reporting if not NULL. PMDs initialize this
8452  *   structure in case of error only.
8453  *
8454  * @return
8455  *   0 on success, a negative errno value otherwise and rte_errno is set.
8456  */
8457 static int
8458 mlx5_action_handle_query(struct rte_eth_dev *dev,
8459                          const struct rte_flow_action_handle *handle,
8460                          void *data,
8461                          struct rte_flow_error *error)
8462 {
8463         struct rte_flow_attr attr = { .transfer = 0 };
8464         const struct mlx5_flow_driver_ops *fops =
8465                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8466
8467         return flow_drv_action_query(dev, handle, data, fops, error);
8468 }
8469
8470 /**
8471  * Destroy all indirect actions (shared RSS).
8472  *
8473  * @param dev
8474  *   Pointer to Ethernet device.
8475  *
8476  * @return
8477  *   0 on success, a negative errno value otherwise and rte_errno is set.
8478  */
8479 int
8480 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8481 {
8482         struct rte_flow_error error;
8483         struct mlx5_priv *priv = dev->data->dev_private;
8484         struct mlx5_shared_action_rss *shared_rss;
8485         int ret = 0;
8486         uint32_t idx;
8487
8488         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8489                       priv->rss_shared_actions, idx, shared_rss, next) {
8490                 ret |= mlx5_action_handle_destroy(dev,
8491                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8492         }
8493         return ret;
8494 }
8495
8496 #ifndef HAVE_MLX5DV_DR
8497 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8498 #else
8499 #define MLX5_DOMAIN_SYNC_FLOW \
8500         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8501 #endif
8502
8503 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8504 {
8505         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8506         const struct mlx5_flow_driver_ops *fops;
8507         int ret;
8508         struct rte_flow_attr attr = { .transfer = 0 };
8509
8510         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8511         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8512         if (ret > 0)
8513                 ret = -ret;
8514         return ret;
8515 }
8516
8517 const struct mlx5_flow_tunnel *
8518 mlx5_get_tof(const struct rte_flow_item *item,
8519              const struct rte_flow_action *action,
8520              enum mlx5_tof_rule_type *rule_type)
8521 {
8522         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
8523                 if (item->type == (typeof(item->type))
8524                                   MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
8525                         *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
8526                         return flow_items_to_tunnel(item);
8527                 }
8528         }
8529         for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
8530                 if (action->type == (typeof(action->type))
8531                                     MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
8532                         *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
8533                         return flow_actions_to_tunnel(action);
8534                 }
8535         }
8536         return NULL;
8537 }
8538
8539 /**
8540  * tunnel offload functionalilty is defined for DV environment only
8541  */
8542 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8543 __extension__
8544 union tunnel_offload_mark {
8545         uint32_t val;
8546         struct {
8547                 uint32_t app_reserve:8;
8548                 uint32_t table_id:15;
8549                 uint32_t transfer:1;
8550                 uint32_t _unused_:8;
8551         };
8552 };
8553
8554 static bool
8555 mlx5_access_tunnel_offload_db
8556         (struct rte_eth_dev *dev,
8557          bool (*match)(struct rte_eth_dev *,
8558                        struct mlx5_flow_tunnel *, const void *),
8559          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8560          void (*miss)(struct rte_eth_dev *, void *),
8561          void *ctx, bool lock_op);
8562
8563 static int
8564 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
8565                              struct rte_flow *flow,
8566                              const struct rte_flow_attr *attr,
8567                              const struct rte_flow_action *app_actions,
8568                              uint32_t flow_idx,
8569                              const struct mlx5_flow_tunnel *tunnel,
8570                              struct tunnel_default_miss_ctx *ctx,
8571                              struct rte_flow_error *error)
8572 {
8573         struct mlx5_priv *priv = dev->data->dev_private;
8574         struct mlx5_flow *dev_flow;
8575         struct rte_flow_attr miss_attr = *attr;
8576         const struct rte_flow_item miss_items[2] = {
8577                 {
8578                         .type = RTE_FLOW_ITEM_TYPE_ETH,
8579                         .spec = NULL,
8580                         .last = NULL,
8581                         .mask = NULL
8582                 },
8583                 {
8584                         .type = RTE_FLOW_ITEM_TYPE_END,
8585                         .spec = NULL,
8586                         .last = NULL,
8587                         .mask = NULL
8588                 }
8589         };
8590         union tunnel_offload_mark mark_id;
8591         struct rte_flow_action_mark miss_mark;
8592         struct rte_flow_action miss_actions[3] = {
8593                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
8594                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
8595         };
8596         const struct rte_flow_action_jump *jump_data;
8597         uint32_t i, flow_table = 0; /* prevent compilation warning */
8598         struct flow_grp_info grp_info = {
8599                 .external = 1,
8600                 .transfer = attr->transfer,
8601                 .fdb_def_rule = !!priv->fdb_def_rule,
8602                 .std_tbl_fix = 0,
8603         };
8604         int ret;
8605
8606         if (!attr->transfer) {
8607                 uint32_t q_size;
8608
8609                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
8610                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
8611                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
8612                                          0, SOCKET_ID_ANY);
8613                 if (!ctx->queue)
8614                         return rte_flow_error_set
8615                                 (error, ENOMEM,
8616                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8617                                 NULL, "invalid default miss RSS");
8618                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
8619                 ctx->action_rss.level = 0,
8620                 ctx->action_rss.types = priv->rss_conf.rss_hf,
8621                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
8622                 ctx->action_rss.queue_num = priv->reta_idx_n,
8623                 ctx->action_rss.key = priv->rss_conf.rss_key,
8624                 ctx->action_rss.queue = ctx->queue;
8625                 if (!priv->reta_idx_n || !priv->rxqs_n)
8626                         return rte_flow_error_set
8627                                 (error, EINVAL,
8628                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8629                                 NULL, "invalid port configuration");
8630                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
8631                         ctx->action_rss.types = 0;
8632                 for (i = 0; i != priv->reta_idx_n; ++i)
8633                         ctx->queue[i] = (*priv->reta_idx)[i];
8634         } else {
8635                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
8636                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
8637         }
8638         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
8639         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
8640         jump_data = app_actions->conf;
8641         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
8642         miss_attr.group = jump_data->group;
8643         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
8644                                        &flow_table, &grp_info, error);
8645         if (ret)
8646                 return rte_flow_error_set(error, EINVAL,
8647                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8648                                           NULL, "invalid tunnel id");
8649         mark_id.app_reserve = 0;
8650         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
8651         mark_id.transfer = !!attr->transfer;
8652         mark_id._unused_ = 0;
8653         miss_mark.id = mark_id.val;
8654         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
8655                                     miss_items, miss_actions, flow_idx, error);
8656         if (!dev_flow)
8657                 return -rte_errno;
8658         dev_flow->flow = flow;
8659         dev_flow->external = true;
8660         dev_flow->tunnel = tunnel;
8661         dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
8662         /* Subflow object was created, we must include one in the list. */
8663         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
8664                       dev_flow->handle, next);
8665         DRV_LOG(DEBUG,
8666                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
8667                 dev->data->port_id, tunnel->app_tunnel.type,
8668                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
8669         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
8670                                   miss_actions, error);
8671         if (!ret)
8672                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
8673                                                   error);
8674
8675         return ret;
8676 }
8677
8678 static const struct mlx5_flow_tbl_data_entry  *
8679 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
8680 {
8681         struct mlx5_priv *priv = dev->data->dev_private;
8682         struct mlx5_dev_ctx_shared *sh = priv->sh;
8683         struct mlx5_list_entry *he;
8684         union tunnel_offload_mark mbits = { .val = mark };
8685         union mlx5_flow_tbl_key table_key = {
8686                 {
8687                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
8688                         .id = 0,
8689                         .reserved = 0,
8690                         .dummy = 0,
8691                         .is_fdb = !!mbits.transfer,
8692                         .is_egress = 0,
8693                 }
8694         };
8695         struct mlx5_flow_cb_ctx ctx = {
8696                 .data = &table_key.v64,
8697         };
8698
8699         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
8700         return he ?
8701                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
8702 }
8703
8704 static void
8705 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
8706                                    struct mlx5_list_entry *entry)
8707 {
8708         struct mlx5_dev_ctx_shared *sh = tool_ctx;
8709         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8710
8711         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8712                         tunnel_flow_tbl_to_id(tte->flow_table));
8713         mlx5_free(tte);
8714 }
8715
8716 static int
8717 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
8718                                   struct mlx5_list_entry *entry, void *cb_ctx)
8719 {
8720         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8721         union tunnel_tbl_key tbl = {
8722                 .val = *(uint64_t *)(ctx->data),
8723         };
8724         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8725
8726         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
8727 }
8728
8729 static struct mlx5_list_entry *
8730 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
8731 {
8732         struct mlx5_dev_ctx_shared *sh = tool_ctx;
8733         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8734         struct tunnel_tbl_entry *tte;
8735         union tunnel_tbl_key tbl = {
8736                 .val = *(uint64_t *)(ctx->data),
8737         };
8738
8739         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
8740                           sizeof(*tte), 0,
8741                           SOCKET_ID_ANY);
8742         if (!tte)
8743                 goto err;
8744         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8745                           &tte->flow_table);
8746         if (tte->flow_table >= MLX5_MAX_TABLES) {
8747                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
8748                         tte->flow_table);
8749                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8750                                 tte->flow_table);
8751                 goto err;
8752         } else if (!tte->flow_table) {
8753                 goto err;
8754         }
8755         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
8756         tte->tunnel_id = tbl.tunnel_id;
8757         tte->group = tbl.group;
8758         return &tte->hash;
8759 err:
8760         if (tte)
8761                 mlx5_free(tte);
8762         return NULL;
8763 }
8764
8765 static struct mlx5_list_entry *
8766 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
8767                                   struct mlx5_list_entry *oentry,
8768                                   void *cb_ctx __rte_unused)
8769 {
8770         struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
8771                                                    0, SOCKET_ID_ANY);
8772
8773         if (!tte)
8774                 return NULL;
8775         memcpy(tte, oentry, sizeof(*tte));
8776         return &tte->hash;
8777 }
8778
8779 static void
8780 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
8781                                        struct mlx5_list_entry *entry)
8782 {
8783         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8784
8785         mlx5_free(tte);
8786 }
8787
8788 static uint32_t
8789 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
8790                                 const struct mlx5_flow_tunnel *tunnel,
8791                                 uint32_t group, uint32_t *table,
8792                                 struct rte_flow_error *error)
8793 {
8794         struct mlx5_list_entry *he;
8795         struct tunnel_tbl_entry *tte;
8796         union tunnel_tbl_key key = {
8797                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
8798                 .group = group
8799         };
8800         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8801         struct mlx5_hlist *group_hash;
8802         struct mlx5_flow_cb_ctx ctx = {
8803                 .data = &key.val,
8804         };
8805
8806         group_hash = tunnel ? tunnel->groups : thub->groups;
8807         he = mlx5_hlist_register(group_hash, key.val, &ctx);
8808         if (!he)
8809                 return rte_flow_error_set(error, EINVAL,
8810                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8811                                           NULL,
8812                                           "tunnel group index not supported");
8813         tte = container_of(he, typeof(*tte), hash);
8814         *table = tte->flow_table;
8815         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
8816                 dev->data->port_id, key.tunnel_id, group, *table);
8817         return 0;
8818 }
8819
8820 static void
8821 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
8822                       struct mlx5_flow_tunnel *tunnel)
8823 {
8824         struct mlx5_priv *priv = dev->data->dev_private;
8825         struct mlx5_indexed_pool *ipool;
8826
8827         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
8828                 dev->data->port_id, tunnel->tunnel_id);
8829         LIST_REMOVE(tunnel, chain);
8830         mlx5_hlist_destroy(tunnel->groups);
8831         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8832         mlx5_ipool_free(ipool, tunnel->tunnel_id);
8833 }
8834
8835 static bool
8836 mlx5_access_tunnel_offload_db
8837         (struct rte_eth_dev *dev,
8838          bool (*match)(struct rte_eth_dev *,
8839                        struct mlx5_flow_tunnel *, const void *),
8840          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8841          void (*miss)(struct rte_eth_dev *, void *),
8842          void *ctx, bool lock_op)
8843 {
8844         bool verdict = false;
8845         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8846         struct mlx5_flow_tunnel *tunnel;
8847
8848         rte_spinlock_lock(&thub->sl);
8849         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
8850                 verdict = match(dev, tunnel, (const void *)ctx);
8851                 if (verdict)
8852                         break;
8853         }
8854         if (!lock_op)
8855                 rte_spinlock_unlock(&thub->sl);
8856         if (verdict && hit)
8857                 hit(dev, tunnel, ctx);
8858         if (!verdict && miss)
8859                 miss(dev, ctx);
8860         if (lock_op)
8861                 rte_spinlock_unlock(&thub->sl);
8862
8863         return verdict;
8864 }
8865
8866 struct tunnel_db_find_tunnel_id_ctx {
8867         uint32_t tunnel_id;
8868         struct mlx5_flow_tunnel *tunnel;
8869 };
8870
8871 static bool
8872 find_tunnel_id_match(struct rte_eth_dev *dev,
8873                      struct mlx5_flow_tunnel *tunnel, const void *x)
8874 {
8875         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8876
8877         RTE_SET_USED(dev);
8878         return tunnel->tunnel_id == ctx->tunnel_id;
8879 }
8880
8881 static void
8882 find_tunnel_id_hit(struct rte_eth_dev *dev,
8883                    struct mlx5_flow_tunnel *tunnel, void *x)
8884 {
8885         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8886         RTE_SET_USED(dev);
8887         ctx->tunnel = tunnel;
8888 }
8889
8890 static struct mlx5_flow_tunnel *
8891 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
8892 {
8893         struct tunnel_db_find_tunnel_id_ctx ctx = {
8894                 .tunnel_id = id,
8895         };
8896
8897         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
8898                                       find_tunnel_id_hit, NULL, &ctx, true);
8899
8900         return ctx.tunnel;
8901 }
8902
8903 static struct mlx5_flow_tunnel *
8904 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
8905                           const struct rte_flow_tunnel *app_tunnel)
8906 {
8907         struct mlx5_priv *priv = dev->data->dev_private;
8908         struct mlx5_indexed_pool *ipool;
8909         struct mlx5_flow_tunnel *tunnel;
8910         uint32_t id;
8911
8912         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8913         tunnel = mlx5_ipool_zmalloc(ipool, &id);
8914         if (!tunnel)
8915                 return NULL;
8916         if (id >= MLX5_MAX_TUNNELS) {
8917                 mlx5_ipool_free(ipool, id);
8918                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
8919                 return NULL;
8920         }
8921         tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
8922                                            priv->sh,
8923                                            mlx5_flow_tunnel_grp2tbl_create_cb,
8924                                            mlx5_flow_tunnel_grp2tbl_match_cb,
8925                                            mlx5_flow_tunnel_grp2tbl_remove_cb,
8926                                            mlx5_flow_tunnel_grp2tbl_clone_cb,
8927                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
8928         if (!tunnel->groups) {
8929                 mlx5_ipool_free(ipool, id);
8930                 return NULL;
8931         }
8932         /* initiate new PMD tunnel */
8933         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
8934         tunnel->tunnel_id = id;
8935         tunnel->action.type = (typeof(tunnel->action.type))
8936                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
8937         tunnel->action.conf = tunnel;
8938         tunnel->item.type = (typeof(tunnel->item.type))
8939                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
8940         tunnel->item.spec = tunnel;
8941         tunnel->item.last = NULL;
8942         tunnel->item.mask = NULL;
8943
8944         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
8945                 dev->data->port_id, tunnel->tunnel_id);
8946
8947         return tunnel;
8948 }
8949
8950 struct tunnel_db_get_tunnel_ctx {
8951         const struct rte_flow_tunnel *app_tunnel;
8952         struct mlx5_flow_tunnel *tunnel;
8953 };
8954
8955 static bool get_tunnel_match(struct rte_eth_dev *dev,
8956                              struct mlx5_flow_tunnel *tunnel, const void *x)
8957 {
8958         const struct tunnel_db_get_tunnel_ctx *ctx = x;
8959
8960         RTE_SET_USED(dev);
8961         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
8962                        sizeof(*ctx->app_tunnel));
8963 }
8964
8965 static void get_tunnel_hit(struct rte_eth_dev *dev,
8966                            struct mlx5_flow_tunnel *tunnel, void *x)
8967 {
8968         /* called under tunnel spinlock protection */
8969         struct tunnel_db_get_tunnel_ctx *ctx = x;
8970
8971         RTE_SET_USED(dev);
8972         tunnel->refctn++;
8973         ctx->tunnel = tunnel;
8974 }
8975
8976 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
8977 {
8978         /* called under tunnel spinlock protection */
8979         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8980         struct tunnel_db_get_tunnel_ctx *ctx = x;
8981
8982         rte_spinlock_unlock(&thub->sl);
8983         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
8984         rte_spinlock_lock(&thub->sl);
8985         if (ctx->tunnel) {
8986                 ctx->tunnel->refctn = 1;
8987                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
8988         }
8989 }
8990
8991
8992 static int
8993 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
8994                      const struct rte_flow_tunnel *app_tunnel,
8995                      struct mlx5_flow_tunnel **tunnel)
8996 {
8997         struct tunnel_db_get_tunnel_ctx ctx = {
8998                 .app_tunnel = app_tunnel,
8999         };
9000
9001         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
9002                                       get_tunnel_miss, &ctx, true);
9003         *tunnel = ctx.tunnel;
9004         return ctx.tunnel ? 0 : -ENOMEM;
9005 }
9006
9007 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
9008 {
9009         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
9010
9011         if (!thub)
9012                 return;
9013         if (!LIST_EMPTY(&thub->tunnels))
9014                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
9015         mlx5_hlist_destroy(thub->groups);
9016         mlx5_free(thub);
9017 }
9018
9019 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
9020 {
9021         int err;
9022         struct mlx5_flow_tunnel_hub *thub;
9023
9024         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
9025                            0, SOCKET_ID_ANY);
9026         if (!thub)
9027                 return -ENOMEM;
9028         LIST_INIT(&thub->tunnels);
9029         rte_spinlock_init(&thub->sl);
9030         thub->groups = mlx5_hlist_create("flow groups", 64,
9031                                          false, true, sh,
9032                                          mlx5_flow_tunnel_grp2tbl_create_cb,
9033                                          mlx5_flow_tunnel_grp2tbl_match_cb,
9034                                          mlx5_flow_tunnel_grp2tbl_remove_cb,
9035                                          mlx5_flow_tunnel_grp2tbl_clone_cb,
9036                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9037         if (!thub->groups) {
9038                 err = -rte_errno;
9039                 goto err;
9040         }
9041         sh->tunnel_hub = thub;
9042
9043         return 0;
9044
9045 err:
9046         if (thub->groups)
9047                 mlx5_hlist_destroy(thub->groups);
9048         if (thub)
9049                 mlx5_free(thub);
9050         return err;
9051 }
9052
9053 static inline bool
9054 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
9055                           struct rte_flow_tunnel *tunnel,
9056                           const char *err_msg)
9057 {
9058         err_msg = NULL;
9059         if (!is_tunnel_offload_active(dev)) {
9060                 err_msg = "tunnel offload was not activated";
9061                 goto out;
9062         } else if (!tunnel) {
9063                 err_msg = "no application tunnel";
9064                 goto out;
9065         }
9066
9067         switch (tunnel->type) {
9068         default:
9069                 err_msg = "unsupported tunnel type";
9070                 goto out;
9071         case RTE_FLOW_ITEM_TYPE_VXLAN:
9072                 break;
9073         }
9074
9075 out:
9076         return !err_msg;
9077 }
9078
9079 static int
9080 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
9081                     struct rte_flow_tunnel *app_tunnel,
9082                     struct rte_flow_action **actions,
9083                     uint32_t *num_of_actions,
9084                     struct rte_flow_error *error)
9085 {
9086         int ret;
9087         struct mlx5_flow_tunnel *tunnel;
9088         const char *err_msg = NULL;
9089         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9090
9091         if (!verdict)
9092                 return rte_flow_error_set(error, EINVAL,
9093                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9094                                           err_msg);
9095         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9096         if (ret < 0) {
9097                 return rte_flow_error_set(error, ret,
9098                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9099                                           "failed to initialize pmd tunnel");
9100         }
9101         *actions = &tunnel->action;
9102         *num_of_actions = 1;
9103         return 0;
9104 }
9105
9106 static int
9107 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
9108                        struct rte_flow_tunnel *app_tunnel,
9109                        struct rte_flow_item **items,
9110                        uint32_t *num_of_items,
9111                        struct rte_flow_error *error)
9112 {
9113         int ret;
9114         struct mlx5_flow_tunnel *tunnel;
9115         const char *err_msg = NULL;
9116         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9117
9118         if (!verdict)
9119                 return rte_flow_error_set(error, EINVAL,
9120                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9121                                           err_msg);
9122         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9123         if (ret < 0) {
9124                 return rte_flow_error_set(error, ret,
9125                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9126                                           "failed to initialize pmd tunnel");
9127         }
9128         *items = &tunnel->item;
9129         *num_of_items = 1;
9130         return 0;
9131 }
9132
9133 struct tunnel_db_element_release_ctx {
9134         struct rte_flow_item *items;
9135         struct rte_flow_action *actions;
9136         uint32_t num_elements;
9137         struct rte_flow_error *error;
9138         int ret;
9139 };
9140
9141 static bool
9142 tunnel_element_release_match(struct rte_eth_dev *dev,
9143                              struct mlx5_flow_tunnel *tunnel, const void *x)
9144 {
9145         const struct tunnel_db_element_release_ctx *ctx = x;
9146
9147         RTE_SET_USED(dev);
9148         if (ctx->num_elements != 1)
9149                 return false;
9150         else if (ctx->items)
9151                 return ctx->items == &tunnel->item;
9152         else if (ctx->actions)
9153                 return ctx->actions == &tunnel->action;
9154
9155         return false;
9156 }
9157
9158 static void
9159 tunnel_element_release_hit(struct rte_eth_dev *dev,
9160                            struct mlx5_flow_tunnel *tunnel, void *x)
9161 {
9162         struct tunnel_db_element_release_ctx *ctx = x;
9163         ctx->ret = 0;
9164         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
9165                 mlx5_flow_tunnel_free(dev, tunnel);
9166 }
9167
9168 static void
9169 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
9170 {
9171         struct tunnel_db_element_release_ctx *ctx = x;
9172         RTE_SET_USED(dev);
9173         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
9174                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9175                                       "invalid argument");
9176 }
9177
9178 static int
9179 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
9180                        struct rte_flow_item *pmd_items,
9181                        uint32_t num_items, struct rte_flow_error *err)
9182 {
9183         struct tunnel_db_element_release_ctx ctx = {
9184                 .items = pmd_items,
9185                 .actions = NULL,
9186                 .num_elements = num_items,
9187                 .error = err,
9188         };
9189
9190         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9191                                       tunnel_element_release_hit,
9192                                       tunnel_element_release_miss, &ctx, false);
9193
9194         return ctx.ret;
9195 }
9196
9197 static int
9198 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
9199                          struct rte_flow_action *pmd_actions,
9200                          uint32_t num_actions, struct rte_flow_error *err)
9201 {
9202         struct tunnel_db_element_release_ctx ctx = {
9203                 .items = NULL,
9204                 .actions = pmd_actions,
9205                 .num_elements = num_actions,
9206                 .error = err,
9207         };
9208
9209         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9210                                       tunnel_element_release_hit,
9211                                       tunnel_element_release_miss, &ctx, false);
9212
9213         return ctx.ret;
9214 }
9215
9216 static int
9217 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
9218                                   struct rte_mbuf *m,
9219                                   struct rte_flow_restore_info *info,
9220                                   struct rte_flow_error *err)
9221 {
9222         uint64_t ol_flags = m->ol_flags;
9223         const struct mlx5_flow_tbl_data_entry *tble;
9224         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
9225
9226         if (!is_tunnel_offload_active(dev)) {
9227                 info->flags = 0;
9228                 return 0;
9229         }
9230
9231         if ((ol_flags & mask) != mask)
9232                 goto err;
9233         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
9234         if (!tble) {
9235                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
9236                         dev->data->port_id, m->hash.fdir.hi);
9237                 goto err;
9238         }
9239         MLX5_ASSERT(tble->tunnel);
9240         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
9241         info->group_id = tble->group_id;
9242         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
9243                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
9244                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
9245
9246         return 0;
9247
9248 err:
9249         return rte_flow_error_set(err, EINVAL,
9250                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9251                                   "failed to get restore info");
9252 }
9253
9254 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
9255 static int
9256 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
9257                            __rte_unused struct rte_flow_tunnel *app_tunnel,
9258                            __rte_unused struct rte_flow_action **actions,
9259                            __rte_unused uint32_t *num_of_actions,
9260                            __rte_unused struct rte_flow_error *error)
9261 {
9262         return -ENOTSUP;
9263 }
9264
9265 static int
9266 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
9267                        __rte_unused struct rte_flow_tunnel *app_tunnel,
9268                        __rte_unused struct rte_flow_item **items,
9269                        __rte_unused uint32_t *num_of_items,
9270                        __rte_unused struct rte_flow_error *error)
9271 {
9272         return -ENOTSUP;
9273 }
9274
9275 static int
9276 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
9277                               __rte_unused struct rte_flow_item *pmd_items,
9278                               __rte_unused uint32_t num_items,
9279                               __rte_unused struct rte_flow_error *err)
9280 {
9281         return -ENOTSUP;
9282 }
9283
9284 static int
9285 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
9286                                 __rte_unused struct rte_flow_action *pmd_action,
9287                                 __rte_unused uint32_t num_actions,
9288                                 __rte_unused struct rte_flow_error *err)
9289 {
9290         return -ENOTSUP;
9291 }
9292
9293 static int
9294 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
9295                                   __rte_unused struct rte_mbuf *m,
9296                                   __rte_unused struct rte_flow_restore_info *i,
9297                                   __rte_unused struct rte_flow_error *err)
9298 {
9299         return -ENOTSUP;
9300 }
9301
9302 static int
9303 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
9304                              __rte_unused struct rte_flow *flow,
9305                              __rte_unused const struct rte_flow_attr *attr,
9306                              __rte_unused const struct rte_flow_action *actions,
9307                              __rte_unused uint32_t flow_idx,
9308                              __rte_unused const struct mlx5_flow_tunnel *tunnel,
9309                              __rte_unused struct tunnel_default_miss_ctx *ctx,
9310                              __rte_unused struct rte_flow_error *error)
9311 {
9312         return -ENOTSUP;
9313 }
9314
9315 static struct mlx5_flow_tunnel *
9316 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
9317                     __rte_unused uint32_t id)
9318 {
9319         return NULL;
9320 }
9321
9322 static void
9323 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
9324                       __rte_unused struct mlx5_flow_tunnel *tunnel)
9325 {
9326 }
9327
9328 static uint32_t
9329 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
9330                                 __rte_unused const struct mlx5_flow_tunnel *t,
9331                                 __rte_unused uint32_t group,
9332                                 __rte_unused uint32_t *table,
9333                                 struct rte_flow_error *error)
9334 {
9335         return rte_flow_error_set(error, ENOTSUP,
9336                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9337                                   "tunnel offload requires DV support");
9338 }
9339
9340 void
9341 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
9342                         __rte_unused  uint16_t port_id)
9343 {
9344 }
9345 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
9346
9347 static void
9348 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
9349 {
9350         int ret;
9351         struct rte_flow_error error;
9352
9353         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9354                 char *item_name;
9355                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
9356                                     sizeof(item_name),
9357                                     (void *)(uintptr_t)item->type, &error);
9358                 if (ret > 0)
9359                         printf("%s ", item_name);
9360                 else
9361                         printf("%d\n", (int)item->type);
9362         }
9363         printf("END\n");
9364 }