drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11 #include <stdbool.h>
  12
  13 /* Verbs header. */
  14 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  15 #ifdef PEDANTIC
  16 #pragma GCC diagnostic ignored "-Wpedantic"
  17 #endif
  18 #include <infiniband/verbs.h>
  19 #ifdef PEDANTIC
  20 #pragma GCC diagnostic error "-Wpedantic"
  21 #endif
  22
  23 #include <rte_common.h>
  24 #include <rte_ether.h>
  25 #include <rte_ethdev_driver.h>
  26 #include <rte_flow.h>
  27 #include <rte_flow_driver.h>
  28 #include <rte_malloc.h>
  29 #include <rte_ip.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_prm.h>
  34
  35 #include "mlx5_defs.h"
  36 #include "mlx5.h"
  37 #include "mlx5_flow.h"
  38 #include "mlx5_rxtx.h"
  39
  40 /* Dev ops structure defined in mlx5.c */
  41 extern const struct eth_dev_ops mlx5_dev_ops;
  42 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
  43
  44 /** Device flow drivers. */
  45 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  46 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
  47 #endif
  48 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  49
  50 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  51
  52 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  53         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  54 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  55         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  56 #endif
  57         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  58         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  59 };
  60
  61 enum mlx5_expansion {
  62         MLX5_EXPANSION_ROOT,
  63         MLX5_EXPANSION_ROOT_OUTER,
  64         MLX5_EXPANSION_ROOT_ETH_VLAN,
  65         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
  66         MLX5_EXPANSION_OUTER_ETH,
  67         MLX5_EXPANSION_OUTER_ETH_VLAN,
  68         MLX5_EXPANSION_OUTER_VLAN,
  69         MLX5_EXPANSION_OUTER_IPV4,
  70         MLX5_EXPANSION_OUTER_IPV4_UDP,
  71         MLX5_EXPANSION_OUTER_IPV4_TCP,
  72         MLX5_EXPANSION_OUTER_IPV6,
  73         MLX5_EXPANSION_OUTER_IPV6_UDP,
  74         MLX5_EXPANSION_OUTER_IPV6_TCP,
  75         MLX5_EXPANSION_VXLAN,
  76         MLX5_EXPANSION_VXLAN_GPE,
  77         MLX5_EXPANSION_GRE,
  78         MLX5_EXPANSION_MPLS,
  79         MLX5_EXPANSION_ETH,
  80         MLX5_EXPANSION_ETH_VLAN,
  81         MLX5_EXPANSION_VLAN,
  82         MLX5_EXPANSION_IPV4,
  83         MLX5_EXPANSION_IPV4_UDP,
  84         MLX5_EXPANSION_IPV4_TCP,
  85         MLX5_EXPANSION_IPV6,
  86         MLX5_EXPANSION_IPV6_UDP,
  87         MLX5_EXPANSION_IPV6_TCP,
  88 };
  89
  90 /** Supported expansion of items. */
  91 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
  92         [MLX5_EXPANSION_ROOT] = {
  93                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
  94                                                  MLX5_EXPANSION_IPV4,
  95                                                  MLX5_EXPANSION_IPV6),
  96                 .type = RTE_FLOW_ITEM_TYPE_END,
  97         },
  98         [MLX5_EXPANSION_ROOT_OUTER] = {
  99                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 100                                                  MLX5_EXPANSION_OUTER_IPV4,
 101                                                  MLX5_EXPANSION_OUTER_IPV6),
 102                 .type = RTE_FLOW_ITEM_TYPE_END,
 103         },
 104         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 105                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 106                 .type = RTE_FLOW_ITEM_TYPE_END,
 107         },
 108         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 109                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
 110                 .type = RTE_FLOW_ITEM_TYPE_END,
 111         },
 112         [MLX5_EXPANSION_OUTER_ETH] = {
 113                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 114                                                  MLX5_EXPANSION_OUTER_IPV6,
 115                                                  MLX5_EXPANSION_MPLS),
 116                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 117                 .rss_types = 0,
 118         },
 119         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 120                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 121                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 122                 .rss_types = 0,
 123         },
 124         [MLX5_EXPANSION_OUTER_VLAN] = {
 125                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 126                                                  MLX5_EXPANSION_OUTER_IPV6),
 127                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 128         },
 129         [MLX5_EXPANSION_OUTER_IPV4] = {
 130                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 131                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 132                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 133                          MLX5_EXPANSION_GRE,
 134                          MLX5_EXPANSION_IPV4,
 135                          MLX5_EXPANSION_IPV6),
 136                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 137                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 138                         ETH_RSS_NONFRAG_IPV4_OTHER,
 139         },
 140         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 141                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 142                                                  MLX5_EXPANSION_VXLAN_GPE),
 143                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 144                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 145         },
 146         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 147                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 148                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 149         },
 150         [MLX5_EXPANSION_OUTER_IPV6] = {
 151                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 152                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 153                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 154                          MLX5_EXPANSION_IPV4,
 155                          MLX5_EXPANSION_IPV6),
 156                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 157                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 158                         ETH_RSS_NONFRAG_IPV6_OTHER,
 159         },
 160         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 161                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 162                                                  MLX5_EXPANSION_VXLAN_GPE),
 163                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 164                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 165         },
 166         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 167                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 168                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 169         },
 170         [MLX5_EXPANSION_VXLAN] = {
 171                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 172                                                  MLX5_EXPANSION_IPV4,
 173                                                  MLX5_EXPANSION_IPV6),
 174                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 175         },
 176         [MLX5_EXPANSION_VXLAN_GPE] = {
 177                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 178                                                  MLX5_EXPANSION_IPV4,
 179                                                  MLX5_EXPANSION_IPV6),
 180                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 181         },
 182         [MLX5_EXPANSION_GRE] = {
 183                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 184                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 185         },
 186         [MLX5_EXPANSION_MPLS] = {
 187                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 188                                                  MLX5_EXPANSION_IPV6),
 189                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 190         },
 191         [MLX5_EXPANSION_ETH] = {
 192                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 193                                                  MLX5_EXPANSION_IPV6),
 194                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 195         },
 196         [MLX5_EXPANSION_ETH_VLAN] = {
 197                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 198                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 199         },
 200         [MLX5_EXPANSION_VLAN] = {
 201                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 202                                                  MLX5_EXPANSION_IPV6),
 203                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 204         },
 205         [MLX5_EXPANSION_IPV4] = {
 206                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 207                                                  MLX5_EXPANSION_IPV4_TCP),
 208                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 209                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 210                         ETH_RSS_NONFRAG_IPV4_OTHER,
 211         },
 212         [MLX5_EXPANSION_IPV4_UDP] = {
 213                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 214                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 215         },
 216         [MLX5_EXPANSION_IPV4_TCP] = {
 217                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 218                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 219         },
 220         [MLX5_EXPANSION_IPV6] = {
 221                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 222                                                  MLX5_EXPANSION_IPV6_TCP),
 223                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 224                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 225                         ETH_RSS_NONFRAG_IPV6_OTHER,
 226         },
 227         [MLX5_EXPANSION_IPV6_UDP] = {
 228                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 229                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 230         },
 231         [MLX5_EXPANSION_IPV6_TCP] = {
 232                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 233                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 234         },
 235 };
 236
 237 static const struct rte_flow_ops mlx5_flow_ops = {
 238         .validate = mlx5_flow_validate,
 239         .create = mlx5_flow_create,
 240         .destroy = mlx5_flow_destroy,
 241         .flush = mlx5_flow_flush,
 242         .isolate = mlx5_flow_isolate,
 243         .query = mlx5_flow_query,
 244         .dev_dump = mlx5_flow_dev_dump,
 245 };
 246
 247 /* Convert FDIR request to Generic flow. */
 248 struct mlx5_fdir {
 249         struct rte_flow_attr attr;
 250         struct rte_flow_item items[4];
 251         struct rte_flow_item_eth l2;
 252         struct rte_flow_item_eth l2_mask;
 253         union {
 254                 struct rte_flow_item_ipv4 ipv4;
 255                 struct rte_flow_item_ipv6 ipv6;
 256         } l3;
 257         union {
 258                 struct rte_flow_item_ipv4 ipv4;
 259                 struct rte_flow_item_ipv6 ipv6;
 260         } l3_mask;
 261         union {
 262                 struct rte_flow_item_udp udp;
 263                 struct rte_flow_item_tcp tcp;
 264         } l4;
 265         union {
 266                 struct rte_flow_item_udp udp;
 267                 struct rte_flow_item_tcp tcp;
 268         } l4_mask;
 269         struct rte_flow_action actions[2];
 270         struct rte_flow_action_queue queue;
 271 };
 272
 273 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
 274 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
 275         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
 276 };
 277
 278 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
 279 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
 280         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
 281         { 9, 10, 11 }, { 12, 13, 14 },
 282 };
 283
 284 /* Tunnel information. */
 285 struct mlx5_flow_tunnel_info {
 286         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 287         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 288 };
 289
 290 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 291         {
 292                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 293                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 294         },
 295         {
 296                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 297                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 298         },
 299         {
 300                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 301                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 302         },
 303         {
 304                 .tunnel = MLX5_FLOW_LAYER_GRE,
 305                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 306         },
 307         {
 308                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 309                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 310         },
 311         {
 312                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 313                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 314         },
 315         {
 316                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 317                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 318         },
 319         {
 320                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 321                 .ptype = RTE_PTYPE_TUNNEL_IP,
 322         },
 323         {
 324                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 325                 .ptype = RTE_PTYPE_TUNNEL_IP,
 326         },
 327         {
 328                 .tunnel = MLX5_FLOW_LAYER_GTP,
 329                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 330         },
 331 };
 332
 333 /**
 334  * Translate tag ID to register.
 335  *
 336  * @param[in] dev
 337  *   Pointer to the Ethernet device structure.
 338  * @param[in] feature
 339  *   The feature that request the register.
 340  * @param[in] id
 341  *   The request register ID.
 342  * @param[out] error
 343  *   Error description in case of any.
 344  *
 345  * @return
 346  *   The request register on success, a negative errno
 347  *   value otherwise and rte_errno is set.
 348  */
 349 int
 350 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 351                      enum mlx5_feature_name feature,
 352                      uint32_t id,
 353                      struct rte_flow_error *error)
 354 {
 355         struct mlx5_priv *priv = dev->data->dev_private;
 356         struct mlx5_dev_config *config = &priv->config;
 357         enum modify_reg start_reg;
 358         bool skip_mtr_reg = false;
 359
 360         switch (feature) {
 361         case MLX5_HAIRPIN_RX:
 362                 return REG_B;
 363         case MLX5_HAIRPIN_TX:
 364                 return REG_A;
 365         case MLX5_METADATA_RX:
 366                 switch (config->dv_xmeta_en) {
 367                 case MLX5_XMETA_MODE_LEGACY:
 368                         return REG_B;
 369                 case MLX5_XMETA_MODE_META16:
 370                         return REG_C_0;
 371                 case MLX5_XMETA_MODE_META32:
 372                         return REG_C_1;
 373                 }
 374                 break;
 375         case MLX5_METADATA_TX:
 376                 return REG_A;
 377         case MLX5_METADATA_FDB:
 378                 switch (config->dv_xmeta_en) {
 379                 case MLX5_XMETA_MODE_LEGACY:
 380                         return REG_NONE;
 381                 case MLX5_XMETA_MODE_META16:
 382                         return REG_C_0;
 383                 case MLX5_XMETA_MODE_META32:
 384                         return REG_C_1;
 385                 }
 386                 break;
 387         case MLX5_FLOW_MARK:
 388                 switch (config->dv_xmeta_en) {
 389                 case MLX5_XMETA_MODE_LEGACY:
 390                         return REG_NONE;
 391                 case MLX5_XMETA_MODE_META16:
 392                         return REG_C_1;
 393                 case MLX5_XMETA_MODE_META32:
 394                         return REG_C_0;
 395                 }
 396                 break;
 397         case MLX5_MTR_SFX:
 398                 /*
 399                  * If meter color and flow match share one register, flow match
 400                  * should use the meter color register for match.
 401                  */
 402                 if (priv->mtr_reg_share)
 403                         return priv->mtr_color_reg;
 404                 else
 405                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 406                                REG_C_3;
 407         case MLX5_MTR_COLOR:
 408                 MLX5_ASSERT(priv->mtr_color_reg != REG_NONE);
 409                 return priv->mtr_color_reg;
 410         case MLX5_COPY_MARK:
 411                 /*
 412                  * Metadata COPY_MARK register using is in meter suffix sub
 413                  * flow while with meter. It's safe to share the same register.
 414                  */
 415                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 416         case MLX5_APP_TAG:
 417                 /*
 418                  * If meter is enable, it will engage the register for color
 419                  * match and flow match. If meter color match is not using the
 420                  * REG_C_2, need to skip the REG_C_x be used by meter color
 421                  * match.
 422                  * If meter is disable, free to use all available registers.
 423                  */
 424                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 425                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 426                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 427                 if (id > (REG_C_7 - start_reg))
 428                         return rte_flow_error_set(error, EINVAL,
 429                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 430                                                   NULL, "invalid tag id");
 431                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NONE)
 432                         return rte_flow_error_set(error, ENOTSUP,
 433                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 434                                                   NULL, "unsupported tag id");
 435                 /*
 436                  * This case means meter is using the REG_C_x great than 2.
 437                  * Take care not to conflict with meter color REG_C_x.
 438                  * If the available index REG_C_y >= REG_C_x, skip the
 439                  * color register.
 440                  */
 441                 if (skip_mtr_reg && config->flow_mreg_c
 442                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 443                         if (config->flow_mreg_c
 444                             [id + 1 + start_reg - REG_C_0] != REG_NONE)
 445                                 return config->flow_mreg_c
 446                                                [id + 1 + start_reg - REG_C_0];
 447                         return rte_flow_error_set(error, ENOTSUP,
 448                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 449                                                   NULL, "unsupported tag id");
 450                 }
 451                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 452         }
 453         MLX5_ASSERT(false);
 454         return rte_flow_error_set(error, EINVAL,
 455                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 456                                   NULL, "invalid feature name");
 457 }
 458
 459 /**
 460  * Check extensive flow metadata register support.
 461  *
 462  * @param dev
 463  *   Pointer to rte_eth_dev structure.
 464  *
 465  * @return
 466  *   True if device supports extensive flow metadata register, otherwise false.
 467  */
 468 bool
 469 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 470 {
 471         struct mlx5_priv *priv = dev->data->dev_private;
 472         struct mlx5_dev_config *config = &priv->config;
 473
 474         /*
 475          * Having available reg_c can be regarded inclusively as supporting
 476          * extensive flow metadata register, which could mean,
 477          * - metadata register copy action by modify header.
 478          * - 16 modify header actions is supported.
 479          * - reg_c's are preserved across different domain (FDB and NIC) on
 480          *   packet loopback by flow lookup miss.
 481          */
 482         return config->flow_mreg_c[2] != REG_NONE;
 483 }
 484
 485 /**
 486  * Discover the maximum number of priority available.
 487  *
 488  * @param[in] dev
 489  *   Pointer to the Ethernet device structure.
 490  *
 491  * @return
 492  *   number of supported flow priority on success, a negative errno
 493  *   value otherwise and rte_errno is set.
 494  */
 495 int
 496 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 497 {
 498         struct mlx5_priv *priv = dev->data->dev_private;
 499         struct {
 500                 struct ibv_flow_attr attr;
 501                 struct ibv_flow_spec_eth eth;
 502                 struct ibv_flow_spec_action_drop drop;
 503         } flow_attr = {
 504                 .attr = {
 505                         .num_of_specs = 2,
 506                         .port = (uint8_t)priv->ibv_port,
 507                 },
 508                 .eth = {
 509                         .type = IBV_FLOW_SPEC_ETH,
 510                         .size = sizeof(struct ibv_flow_spec_eth),
 511                 },
 512                 .drop = {
 513                         .size = sizeof(struct ibv_flow_spec_action_drop),
 514                         .type = IBV_FLOW_SPEC_ACTION_DROP,
 515                 },
 516         };
 517         struct ibv_flow *flow;
 518         struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
 519         uint16_t vprio[] = { 8, 16 };
 520         int i;
 521         int priority = 0;
 522
 523         if (!drop) {
 524                 rte_errno = ENOTSUP;
 525                 return -rte_errno;
 526         }
 527         for (i = 0; i != RTE_DIM(vprio); i++) {
 528                 flow_attr.attr.priority = vprio[i] - 1;
 529                 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
 530                 if (!flow)
 531                         break;
 532                 claim_zero(mlx5_glue->destroy_flow(flow));
 533                 priority = vprio[i];
 534         }
 535         mlx5_hrxq_drop_release(dev);
 536         switch (priority) {
 537         case 8:
 538                 priority = RTE_DIM(priority_map_3);
 539                 break;
 540         case 16:
 541                 priority = RTE_DIM(priority_map_5);
 542                 break;
 543         default:
 544                 rte_errno = ENOTSUP;
 545                 DRV_LOG(ERR,
 546                         "port %u verbs maximum priority: %d expected 8/16",
 547                         dev->data->port_id, priority);
 548                 return -rte_errno;
 549         }
 550         DRV_LOG(INFO, "port %u flow maximum priority: %d",
 551                 dev->data->port_id, priority);
 552         return priority;
 553 }
 554
 555 /**
 556  * Adjust flow priority based on the highest layer and the request priority.
 557  *
 558  * @param[in] dev
 559  *   Pointer to the Ethernet device structure.
 560  * @param[in] priority
 561  *   The rule base priority.
 562  * @param[in] subpriority
 563  *   The priority based on the items.
 564  *
 565  * @return
 566  *   The new priority.
 567  */
 568 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 569                                    uint32_t subpriority)
 570 {
 571         uint32_t res = 0;
 572         struct mlx5_priv *priv = dev->data->dev_private;
 573
 574         switch (priv->config.flow_prio) {
 575         case RTE_DIM(priority_map_3):
 576                 res = priority_map_3[priority][subpriority];
 577                 break;
 578         case RTE_DIM(priority_map_5):
 579                 res = priority_map_5[priority][subpriority];
 580                 break;
 581         }
 582         return  res;
 583 }
 584
 585 /**
 586  * Verify the @p item specifications (spec, last, mask) are compatible with the
 587  * NIC capabilities.
 588  *
 589  * @param[in] item
 590  *   Item specification.
 591  * @param[in] mask
 592  *   @p item->mask or flow default bit-masks.
 593  * @param[in] nic_mask
 594  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 595  * @param[in] size
 596  *   Bit-masks size in bytes.
 597  * @param[out] error
 598  *   Pointer to error structure.
 599  *
 600  * @return
 601  *   0 on success, a negative errno value otherwise and rte_errno is set.
 602  */
 603 int
 604 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 605                           const uint8_t *mask,
 606                           const uint8_t *nic_mask,
 607                           unsigned int size,
 608                           struct rte_flow_error *error)
 609 {
 610         unsigned int i;
 611
 612         MLX5_ASSERT(nic_mask);
 613         for (i = 0; i < size; ++i)
 614                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 615                         return rte_flow_error_set(error, ENOTSUP,
 616                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 617                                                   item,
 618                                                   "mask enables non supported"
 619                                                   " bits");
 620         if (!item->spec && (item->mask || item->last))
 621                 return rte_flow_error_set(error, EINVAL,
 622                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 623                                           "mask/last without a spec is not"
 624                                           " supported");
 625         if (item->spec && item->last) {
 626                 uint8_t spec[size];
 627                 uint8_t last[size];
 628                 unsigned int i;
 629                 int ret;
 630
 631                 for (i = 0; i < size; ++i) {
 632                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 633                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 634                 }
 635                 ret = memcmp(spec, last, size);
 636                 if (ret != 0)
 637                         return rte_flow_error_set(error, EINVAL,
 638                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 639                                                   item,
 640                                                   "range is not valid");
 641         }
 642         return 0;
 643 }
 644
 645 /**
 646  * Adjust the hash fields according to the @p flow information.
 647  *
 648  * @param[in] dev_flow.
 649  *   Pointer to the mlx5_flow.
 650  * @param[in] tunnel
 651  *   1 when the hash field is for a tunnel item.
 652  * @param[in] layer_types
 653  *   ETH_RSS_* types.
 654  * @param[in] hash_fields
 655  *   Item hash fields.
 656  *
 657  * @return
 658  *   The hash fields that should be used.
 659  */
 660 uint64_t
 661 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
 662                             int tunnel __rte_unused, uint64_t layer_types,
 663                             uint64_t hash_fields)
 664 {
 665         struct rte_flow *flow = dev_flow->flow;
 666 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 667         int rss_request_inner = flow->rss.level >= 2;
 668
 669         /* Check RSS hash level for tunnel. */
 670         if (tunnel && rss_request_inner)
 671                 hash_fields |= IBV_RX_HASH_INNER;
 672         else if (tunnel || rss_request_inner)
 673                 return 0;
 674 #endif
 675         /* Check if requested layer matches RSS hash fields. */
 676         if (!(flow->rss.types & layer_types))
 677                 return 0;
 678         return hash_fields;
 679 }
 680
 681 /**
 682  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 683  * if several tunnel rules are used on this queue, the tunnel ptype will be
 684  * cleared.
 685  *
 686  * @param rxq_ctrl
 687  *   Rx queue to update.
 688  */
 689 static void
 690 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 691 {
 692         unsigned int i;
 693         uint32_t tunnel_ptype = 0;
 694
 695         /* Look up for the ptype to use. */
 696         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 697                 if (!rxq_ctrl->flow_tunnels_n[i])
 698                         continue;
 699                 if (!tunnel_ptype) {
 700                         tunnel_ptype = tunnels_info[i].ptype;
 701                 } else {
 702                         tunnel_ptype = 0;
 703                         break;
 704                 }
 705         }
 706         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 707 }
 708
 709 /**
 710  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 711  * flow.
 712  *
 713  * @param[in] dev
 714  *   Pointer to the Ethernet device structure.
 715  * @param[in] dev_flow
 716  *   Pointer to device flow structure.
 717  */
 718 static void
 719 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 720 {
 721         struct mlx5_priv *priv = dev->data->dev_private;
 722         struct rte_flow *flow = dev_flow->flow;
 723         const int mark = !!(dev_flow->actions &
 724                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 725         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 726         unsigned int i;
 727
 728         for (i = 0; i != flow->rss.queue_num; ++i) {
 729                 int idx = (*flow->rss.queue)[i];
 730                 struct mlx5_rxq_ctrl *rxq_ctrl =
 731                         container_of((*priv->rxqs)[idx],
 732                                      struct mlx5_rxq_ctrl, rxq);
 733
 734                 /*
 735                  * To support metadata register copy on Tx loopback,
 736                  * this must be always enabled (metadata may arive
 737                  * from other port - not from local flows only.
 738                  */
 739                 if (priv->config.dv_flow_en &&
 740                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 741                     mlx5_flow_ext_mreg_supported(dev)) {
 742                         rxq_ctrl->rxq.mark = 1;
 743                         rxq_ctrl->flow_mark_n = 1;
 744                 } else if (mark) {
 745                         rxq_ctrl->rxq.mark = 1;
 746                         rxq_ctrl->flow_mark_n++;
 747                 }
 748                 if (tunnel) {
 749                         unsigned int j;
 750
 751                         /* Increase the counter matching the flow. */
 752                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 753                                 if ((tunnels_info[j].tunnel &
 754                                      dev_flow->layers) ==
 755                                     tunnels_info[j].tunnel) {
 756                                         rxq_ctrl->flow_tunnels_n[j]++;
 757                                         break;
 758                                 }
 759                         }
 760                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 761                 }
 762         }
 763 }
 764
 765 /**
 766  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
 767  *
 768  * @param[in] dev
 769  *   Pointer to the Ethernet device structure.
 770  * @param[in] flow
 771  *   Pointer to flow structure.
 772  */
 773 static void
 774 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
 775 {
 776         struct mlx5_flow *dev_flow;
 777
 778         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 779                 flow_drv_rxq_flags_set(dev, dev_flow);
 780 }
 781
 782 /**
 783  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 784  * device flow if no other flow uses it with the same kind of request.
 785  *
 786  * @param dev
 787  *   Pointer to Ethernet device.
 788  * @param[in] dev_flow
 789  *   Pointer to the device flow.
 790  */
 791 static void
 792 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 793 {
 794         struct mlx5_priv *priv = dev->data->dev_private;
 795         struct rte_flow *flow = dev_flow->flow;
 796         const int mark = !!(dev_flow->actions &
 797                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 798         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 799         unsigned int i;
 800
 801         MLX5_ASSERT(dev->data->dev_started);
 802         for (i = 0; i != flow->rss.queue_num; ++i) {
 803                 int idx = (*flow->rss.queue)[i];
 804                 struct mlx5_rxq_ctrl *rxq_ctrl =
 805                         container_of((*priv->rxqs)[idx],
 806                                      struct mlx5_rxq_ctrl, rxq);
 807
 808                 if (priv->config.dv_flow_en &&
 809                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 810                     mlx5_flow_ext_mreg_supported(dev)) {
 811                         rxq_ctrl->rxq.mark = 1;
 812                         rxq_ctrl->flow_mark_n = 1;
 813                 } else if (mark) {
 814                         rxq_ctrl->flow_mark_n--;
 815                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
 816                 }
 817                 if (tunnel) {
 818                         unsigned int j;
 819
 820                         /* Decrease the counter matching the flow. */
 821                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 822                                 if ((tunnels_info[j].tunnel &
 823                                      dev_flow->layers) ==
 824                                     tunnels_info[j].tunnel) {
 825                                         rxq_ctrl->flow_tunnels_n[j]--;
 826                                         break;
 827                                 }
 828                         }
 829                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 830                 }
 831         }
 832 }
 833
 834 /**
 835  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 836  * @p flow if no other flow uses it with the same kind of request.
 837  *
 838  * @param dev
 839  *   Pointer to Ethernet device.
 840  * @param[in] flow
 841  *   Pointer to the flow.
 842  */
 843 static void
 844 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
 845 {
 846         struct mlx5_flow *dev_flow;
 847
 848         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 849                 flow_drv_rxq_flags_trim(dev, dev_flow);
 850 }
 851
 852 /**
 853  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
 854  *
 855  * @param dev
 856  *   Pointer to Ethernet device.
 857  */
 858 static void
 859 flow_rxq_flags_clear(struct rte_eth_dev *dev)
 860 {
 861         struct mlx5_priv *priv = dev->data->dev_private;
 862         unsigned int i;
 863
 864         for (i = 0; i != priv->rxqs_n; ++i) {
 865                 struct mlx5_rxq_ctrl *rxq_ctrl;
 866                 unsigned int j;
 867
 868                 if (!(*priv->rxqs)[i])
 869                         continue;
 870                 rxq_ctrl = container_of((*priv->rxqs)[i],
 871                                         struct mlx5_rxq_ctrl, rxq);
 872                 rxq_ctrl->flow_mark_n = 0;
 873                 rxq_ctrl->rxq.mark = 0;
 874                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
 875                         rxq_ctrl->flow_tunnels_n[j] = 0;
 876                 rxq_ctrl->rxq.tunnel = 0;
 877         }
 878 }
 879
 880 /*
 881  * return a pointer to the desired action in the list of actions.
 882  *
 883  * @param[in] actions
 884  *   The list of actions to search the action in.
 885  * @param[in] action
 886  *   The action to find.
 887  *
 888  * @return
 889  *   Pointer to the action in the list, if found. NULL otherwise.
 890  */
 891 const struct rte_flow_action *
 892 mlx5_flow_find_action(const struct rte_flow_action *actions,
 893                       enum rte_flow_action_type action)
 894 {
 895         if (actions == NULL)
 896                 return NULL;
 897         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
 898                 if (actions->type == action)
 899                         return actions;
 900         return NULL;
 901 }
 902
 903 /*
 904  * Validate the flag action.
 905  *
 906  * @param[in] action_flags
 907  *   Bit-fields that holds the actions detected until now.
 908  * @param[in] attr
 909  *   Attributes of flow that includes this action.
 910  * @param[out] error
 911  *   Pointer to error structure.
 912  *
 913  * @return
 914  *   0 on success, a negative errno value otherwise and rte_errno is set.
 915  */
 916 int
 917 mlx5_flow_validate_action_flag(uint64_t action_flags,
 918                                const struct rte_flow_attr *attr,
 919                                struct rte_flow_error *error)
 920 {
 921         if (action_flags & MLX5_FLOW_ACTION_MARK)
 922                 return rte_flow_error_set(error, EINVAL,
 923                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 924                                           "can't mark and flag in same flow");
 925         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 926                 return rte_flow_error_set(error, EINVAL,
 927                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 928                                           "can't have 2 flag"
 929                                           " actions in same flow");
 930         if (attr->egress)
 931                 return rte_flow_error_set(error, ENOTSUP,
 932                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 933                                           "flag action not supported for "
 934                                           "egress");
 935         return 0;
 936 }
 937
 938 /*
 939  * Validate the mark action.
 940  *
 941  * @param[in] action
 942  *   Pointer to the queue action.
 943  * @param[in] action_flags
 944  *   Bit-fields that holds the actions detected until now.
 945  * @param[in] attr
 946  *   Attributes of flow that includes this action.
 947  * @param[out] error
 948  *   Pointer to error structure.
 949  *
 950  * @return
 951  *   0 on success, a negative errno value otherwise and rte_errno is set.
 952  */
 953 int
 954 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
 955                                uint64_t action_flags,
 956                                const struct rte_flow_attr *attr,
 957                                struct rte_flow_error *error)
 958 {
 959         const struct rte_flow_action_mark *mark = action->conf;
 960
 961         if (!mark)
 962                 return rte_flow_error_set(error, EINVAL,
 963                                           RTE_FLOW_ERROR_TYPE_ACTION,
 964                                           action,
 965                                           "configuration cannot be null");
 966         if (mark->id >= MLX5_FLOW_MARK_MAX)
 967                 return rte_flow_error_set(error, EINVAL,
 968                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 969                                           &mark->id,
 970                                           "mark id must in 0 <= id < "
 971                                           RTE_STR(MLX5_FLOW_MARK_MAX));
 972         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 973                 return rte_flow_error_set(error, EINVAL,
 974                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 975                                           "can't flag and mark in same flow");
 976         if (action_flags & MLX5_FLOW_ACTION_MARK)
 977                 return rte_flow_error_set(error, EINVAL,
 978                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 979                                           "can't have 2 mark actions in same"
 980                                           " flow");
 981         if (attr->egress)
 982                 return rte_flow_error_set(error, ENOTSUP,
 983                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 984                                           "mark action not supported for "
 985                                           "egress");
 986         return 0;
 987 }
 988
 989 /*
 990  * Validate the drop action.
 991  *
 992  * @param[in] action_flags
 993  *   Bit-fields that holds the actions detected until now.
 994  * @param[in] attr
 995  *   Attributes of flow that includes this action.
 996  * @param[out] error
 997  *   Pointer to error structure.
 998  *
 999  * @return
1000  *   0 on success, a negative errno value otherwise and rte_errno is set.
1001  */
1002 int
1003 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1004                                const struct rte_flow_attr *attr,
1005                                struct rte_flow_error *error)
1006 {
1007         if (attr->egress)
1008                 return rte_flow_error_set(error, ENOTSUP,
1009                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1010                                           "drop action not supported for "
1011                                           "egress");
1012         return 0;
1013 }
1014
1015 /*
1016  * Validate the queue action.
1017  *
1018  * @param[in] action
1019  *   Pointer to the queue action.
1020  * @param[in] action_flags
1021  *   Bit-fields that holds the actions detected until now.
1022  * @param[in] dev
1023  *   Pointer to the Ethernet device structure.
1024  * @param[in] attr
1025  *   Attributes of flow that includes this action.
1026  * @param[out] error
1027  *   Pointer to error structure.
1028  *
1029  * @return
1030  *   0 on success, a negative errno value otherwise and rte_errno is set.
1031  */
1032 int
1033 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1034                                 uint64_t action_flags,
1035                                 struct rte_eth_dev *dev,
1036                                 const struct rte_flow_attr *attr,
1037                                 struct rte_flow_error *error)
1038 {
1039         struct mlx5_priv *priv = dev->data->dev_private;
1040         const struct rte_flow_action_queue *queue = action->conf;
1041
1042         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1043                 return rte_flow_error_set(error, EINVAL,
1044                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1045                                           "can't have 2 fate actions in"
1046                                           " same flow");
1047         if (!priv->rxqs_n)
1048                 return rte_flow_error_set(error, EINVAL,
1049                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1050                                           NULL, "No Rx queues configured");
1051         if (queue->index >= priv->rxqs_n)
1052                 return rte_flow_error_set(error, EINVAL,
1053                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1054                                           &queue->index,
1055                                           "queue index out of range");
1056         if (!(*priv->rxqs)[queue->index])
1057                 return rte_flow_error_set(error, EINVAL,
1058                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1059                                           &queue->index,
1060                                           "queue is not configured");
1061         if (attr->egress)
1062                 return rte_flow_error_set(error, ENOTSUP,
1063                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1064                                           "queue action not supported for "
1065                                           "egress");
1066         return 0;
1067 }
1068
1069 /*
1070  * Validate the rss action.
1071  *
1072  * @param[in] action
1073  *   Pointer to the queue action.
1074  * @param[in] action_flags
1075  *   Bit-fields that holds the actions detected until now.
1076  * @param[in] dev
1077  *   Pointer to the Ethernet device structure.
1078  * @param[in] attr
1079  *   Attributes of flow that includes this action.
1080  * @param[in] item_flags
1081  *   Items that were detected.
1082  * @param[out] error
1083  *   Pointer to error structure.
1084  *
1085  * @return
1086  *   0 on success, a negative errno value otherwise and rte_errno is set.
1087  */
1088 int
1089 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1090                               uint64_t action_flags,
1091                               struct rte_eth_dev *dev,
1092                               const struct rte_flow_attr *attr,
1093                               uint64_t item_flags,
1094                               struct rte_flow_error *error)
1095 {
1096         struct mlx5_priv *priv = dev->data->dev_private;
1097         const struct rte_flow_action_rss *rss = action->conf;
1098         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1099         unsigned int i;
1100
1101         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1102                 return rte_flow_error_set(error, EINVAL,
1103                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1104                                           "can't have 2 fate actions"
1105                                           " in same flow");
1106         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1107             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1108                 return rte_flow_error_set(error, ENOTSUP,
1109                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1110                                           &rss->func,
1111                                           "RSS hash function not supported");
1112 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1113         if (rss->level > 2)
1114 #else
1115         if (rss->level > 1)
1116 #endif
1117                 return rte_flow_error_set(error, ENOTSUP,
1118                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1119                                           &rss->level,
1120                                           "tunnel RSS is not supported");
1121         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1122         if (rss->key_len == 0 && rss->key != NULL)
1123                 return rte_flow_error_set(error, ENOTSUP,
1124                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1125                                           &rss->key_len,
1126                                           "RSS hash key length 0");
1127         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1128                 return rte_flow_error_set(error, ENOTSUP,
1129                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1130                                           &rss->key_len,
1131                                           "RSS hash key too small");
1132         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1133                 return rte_flow_error_set(error, ENOTSUP,
1134                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1135                                           &rss->key_len,
1136                                           "RSS hash key too large");
1137         if (rss->queue_num > priv->config.ind_table_max_size)
1138                 return rte_flow_error_set(error, ENOTSUP,
1139                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1140                                           &rss->queue_num,
1141                                           "number of queues too large");
1142         if (rss->types & MLX5_RSS_HF_MASK)
1143                 return rte_flow_error_set(error, ENOTSUP,
1144                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1145                                           &rss->types,
1146                                           "some RSS protocols are not"
1147                                           " supported");
1148         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1149             !(rss->types & ETH_RSS_IP))
1150                 return rte_flow_error_set(error, EINVAL,
1151                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1152                                           "L3 partial RSS requested but L3 RSS"
1153                                           " type not specified");
1154         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1155             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1156                 return rte_flow_error_set(error, EINVAL,
1157                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1158                                           "L4 partial RSS requested but L4 RSS"
1159                                           " type not specified");
1160         if (!priv->rxqs_n)
1161                 return rte_flow_error_set(error, EINVAL,
1162                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1163                                           NULL, "No Rx queues configured");
1164         if (!rss->queue_num)
1165                 return rte_flow_error_set(error, EINVAL,
1166                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1167                                           NULL, "No queues configured");
1168         for (i = 0; i != rss->queue_num; ++i) {
1169                 if (rss->queue[i] >= priv->rxqs_n)
1170                         return rte_flow_error_set
1171                                 (error, EINVAL,
1172                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1173                                  &rss->queue[i], "queue index out of range");
1174                 if (!(*priv->rxqs)[rss->queue[i]])
1175                         return rte_flow_error_set
1176                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1177                                  &rss->queue[i], "queue is not configured");
1178         }
1179         if (attr->egress)
1180                 return rte_flow_error_set(error, ENOTSUP,
1181                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1182                                           "rss action not supported for "
1183                                           "egress");
1184         if (rss->level > 1 &&  !tunnel)
1185                 return rte_flow_error_set(error, EINVAL,
1186                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1187                                           "inner RSS is not supported for "
1188                                           "non-tunnel flows");
1189         return 0;
1190 }
1191
1192 /*
1193  * Validate the count action.
1194  *
1195  * @param[in] dev
1196  *   Pointer to the Ethernet device structure.
1197  * @param[in] attr
1198  *   Attributes of flow that includes this action.
1199  * @param[out] error
1200  *   Pointer to error structure.
1201  *
1202  * @return
1203  *   0 on success, a negative errno value otherwise and rte_errno is set.
1204  */
1205 int
1206 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1207                                 const struct rte_flow_attr *attr,
1208                                 struct rte_flow_error *error)
1209 {
1210         if (attr->egress)
1211                 return rte_flow_error_set(error, ENOTSUP,
1212                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1213                                           "count action not supported for "
1214                                           "egress");
1215         return 0;
1216 }
1217
1218 /**
1219  * Verify the @p attributes will be correctly understood by the NIC and store
1220  * them in the @p flow if everything is correct.
1221  *
1222  * @param[in] dev
1223  *   Pointer to the Ethernet device structure.
1224  * @param[in] attributes
1225  *   Pointer to flow attributes
1226  * @param[out] error
1227  *   Pointer to error structure.
1228  *
1229  * @return
1230  *   0 on success, a negative errno value otherwise and rte_errno is set.
1231  */
1232 int
1233 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1234                               const struct rte_flow_attr *attributes,
1235                               struct rte_flow_error *error)
1236 {
1237         struct mlx5_priv *priv = dev->data->dev_private;
1238         uint32_t priority_max = priv->config.flow_prio - 1;
1239
1240         if (attributes->group)
1241                 return rte_flow_error_set(error, ENOTSUP,
1242                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1243                                           NULL, "groups is not supported");
1244         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1245             attributes->priority >= priority_max)
1246                 return rte_flow_error_set(error, ENOTSUP,
1247                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1248                                           NULL, "priority out of range");
1249         if (attributes->egress)
1250                 return rte_flow_error_set(error, ENOTSUP,
1251                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1252                                           "egress is not supported");
1253         if (attributes->transfer && !priv->config.dv_esw_en)
1254                 return rte_flow_error_set(error, ENOTSUP,
1255                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1256                                           NULL, "transfer is not supported");
1257         if (!attributes->ingress)
1258                 return rte_flow_error_set(error, EINVAL,
1259                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1260                                           NULL,
1261                                           "ingress attribute is mandatory");
1262         return 0;
1263 }
1264
1265 /**
1266  * Validate ICMP6 item.
1267  *
1268  * @param[in] item
1269  *   Item specification.
1270  * @param[in] item_flags
1271  *   Bit-fields that holds the items detected until now.
1272  * @param[out] error
1273  *   Pointer to error structure.
1274  *
1275  * @return
1276  *   0 on success, a negative errno value otherwise and rte_errno is set.
1277  */
1278 int
1279 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1280                                uint64_t item_flags,
1281                                uint8_t target_protocol,
1282                                struct rte_flow_error *error)
1283 {
1284         const struct rte_flow_item_icmp6 *mask = item->mask;
1285         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1286         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1287                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1288         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1289                                       MLX5_FLOW_LAYER_OUTER_L4;
1290         int ret;
1291
1292         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1293                 return rte_flow_error_set(error, EINVAL,
1294                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1295                                           "protocol filtering not compatible"
1296                                           " with ICMP6 layer");
1297         if (!(item_flags & l3m))
1298                 return rte_flow_error_set(error, EINVAL,
1299                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1300                                           "IPv6 is mandatory to filter on"
1301                                           " ICMP6");
1302         if (item_flags & l4m)
1303                 return rte_flow_error_set(error, EINVAL,
1304                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1305                                           "multiple L4 layers not supported");
1306         if (!mask)
1307                 mask = &rte_flow_item_icmp6_mask;
1308         ret = mlx5_flow_item_acceptable
1309                 (item, (const uint8_t *)mask,
1310                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1311                  sizeof(struct rte_flow_item_icmp6), error);
1312         if (ret < 0)
1313                 return ret;
1314         return 0;
1315 }
1316
1317 /**
1318  * Validate ICMP item.
1319  *
1320  * @param[in] item
1321  *   Item specification.
1322  * @param[in] item_flags
1323  *   Bit-fields that holds the items detected until now.
1324  * @param[out] error
1325  *   Pointer to error structure.
1326  *
1327  * @return
1328  *   0 on success, a negative errno value otherwise and rte_errno is set.
1329  */
1330 int
1331 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1332                              uint64_t item_flags,
1333                              uint8_t target_protocol,
1334                              struct rte_flow_error *error)
1335 {
1336         const struct rte_flow_item_icmp *mask = item->mask;
1337         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1338         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1339                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1340         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1341                                       MLX5_FLOW_LAYER_OUTER_L4;
1342         int ret;
1343
1344         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1345                 return rte_flow_error_set(error, EINVAL,
1346                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1347                                           "protocol filtering not compatible"
1348                                           " with ICMP layer");
1349         if (!(item_flags & l3m))
1350                 return rte_flow_error_set(error, EINVAL,
1351                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1352                                           "IPv4 is mandatory to filter"
1353                                           " on ICMP");
1354         if (item_flags & l4m)
1355                 return rte_flow_error_set(error, EINVAL,
1356                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1357                                           "multiple L4 layers not supported");
1358         if (!mask)
1359                 mask = &rte_flow_item_icmp_mask;
1360         ret = mlx5_flow_item_acceptable
1361                 (item, (const uint8_t *)mask,
1362                  (const uint8_t *)&rte_flow_item_icmp_mask,
1363                  sizeof(struct rte_flow_item_icmp), error);
1364         if (ret < 0)
1365                 return ret;
1366         return 0;
1367 }
1368
1369 /**
1370  * Validate Ethernet item.
1371  *
1372  * @param[in] item
1373  *   Item specification.
1374  * @param[in] item_flags
1375  *   Bit-fields that holds the items detected until now.
1376  * @param[out] error
1377  *   Pointer to error structure.
1378  *
1379  * @return
1380  *   0 on success, a negative errno value otherwise and rte_errno is set.
1381  */
1382 int
1383 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1384                             uint64_t item_flags,
1385                             struct rte_flow_error *error)
1386 {
1387         const struct rte_flow_item_eth *mask = item->mask;
1388         const struct rte_flow_item_eth nic_mask = {
1389                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1390                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1391                 .type = RTE_BE16(0xffff),
1392         };
1393         int ret;
1394         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1395         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1396                                        MLX5_FLOW_LAYER_OUTER_L2;
1397
1398         if (item_flags & ethm)
1399                 return rte_flow_error_set(error, ENOTSUP,
1400                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1401                                           "multiple L2 layers not supported");
1402         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1403             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1404                 return rte_flow_error_set(error, EINVAL,
1405                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1406                                           "L2 layer should not follow "
1407                                           "L3 layers");
1408         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1409             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1410                 return rte_flow_error_set(error, EINVAL,
1411                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1412                                           "L2 layer should not follow VLAN");
1413         if (!mask)
1414                 mask = &rte_flow_item_eth_mask;
1415         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1416                                         (const uint8_t *)&nic_mask,
1417                                         sizeof(struct rte_flow_item_eth),
1418                                         error);
1419         return ret;
1420 }
1421
1422 /**
1423  * Validate VLAN item.
1424  *
1425  * @param[in] item
1426  *   Item specification.
1427  * @param[in] item_flags
1428  *   Bit-fields that holds the items detected until now.
1429  * @param[in] dev
1430  *   Ethernet device flow is being created on.
1431  * @param[out] error
1432  *   Pointer to error structure.
1433  *
1434  * @return
1435  *   0 on success, a negative errno value otherwise and rte_errno is set.
1436  */
1437 int
1438 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1439                              uint64_t item_flags,
1440                              struct rte_eth_dev *dev,
1441                              struct rte_flow_error *error)
1442 {
1443         const struct rte_flow_item_vlan *spec = item->spec;
1444         const struct rte_flow_item_vlan *mask = item->mask;
1445         const struct rte_flow_item_vlan nic_mask = {
1446                 .tci = RTE_BE16(UINT16_MAX),
1447                 .inner_type = RTE_BE16(UINT16_MAX),
1448         };
1449         uint16_t vlan_tag = 0;
1450         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1451         int ret;
1452         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1453                                         MLX5_FLOW_LAYER_INNER_L4) :
1454                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1455                                         MLX5_FLOW_LAYER_OUTER_L4);
1456         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1457                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1458
1459         if (item_flags & vlanm)
1460                 return rte_flow_error_set(error, EINVAL,
1461                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1462                                           "multiple VLAN layers not supported");
1463         else if ((item_flags & l34m) != 0)
1464                 return rte_flow_error_set(error, EINVAL,
1465                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1466                                           "VLAN cannot follow L3/L4 layer");
1467         if (!mask)
1468                 mask = &rte_flow_item_vlan_mask;
1469         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1470                                         (const uint8_t *)&nic_mask,
1471                                         sizeof(struct rte_flow_item_vlan),
1472                                         error);
1473         if (ret)
1474                 return ret;
1475         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1476                 struct mlx5_priv *priv = dev->data->dev_private;
1477
1478                 if (priv->vmwa_context) {
1479                         /*
1480                          * Non-NULL context means we have a virtual machine
1481                          * and SR-IOV enabled, we have to create VLAN interface
1482                          * to make hypervisor to setup E-Switch vport
1483                          * context correctly. We avoid creating the multiple
1484                          * VLAN interfaces, so we cannot support VLAN tag mask.
1485                          */
1486                         return rte_flow_error_set(error, EINVAL,
1487                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1488                                                   item,
1489                                                   "VLAN tag mask is not"
1490                                                   " supported in virtual"
1491                                                   " environment");
1492                 }
1493         }
1494         if (spec) {
1495                 vlan_tag = spec->tci;
1496                 vlan_tag &= mask->tci;
1497         }
1498         /*
1499          * From verbs perspective an empty VLAN is equivalent
1500          * to a packet without VLAN layer.
1501          */
1502         if (!vlan_tag)
1503                 return rte_flow_error_set(error, EINVAL,
1504                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1505                                           item->spec,
1506                                           "VLAN cannot be empty");
1507         return 0;
1508 }
1509
1510 /**
1511  * Validate IPV4 item.
1512  *
1513  * @param[in] item
1514  *   Item specification.
1515  * @param[in] item_flags
1516  *   Bit-fields that holds the items detected until now.
1517  * @param[in] acc_mask
1518  *   Acceptable mask, if NULL default internal default mask
1519  *   will be used to check whether item fields are supported.
1520  * @param[out] error
1521  *   Pointer to error structure.
1522  *
1523  * @return
1524  *   0 on success, a negative errno value otherwise and rte_errno is set.
1525  */
1526 int
1527 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1528                              uint64_t item_flags,
1529                              uint64_t last_item,
1530                              uint16_t ether_type,
1531                              const struct rte_flow_item_ipv4 *acc_mask,
1532                              struct rte_flow_error *error)
1533 {
1534         const struct rte_flow_item_ipv4 *mask = item->mask;
1535         const struct rte_flow_item_ipv4 *spec = item->spec;
1536         const struct rte_flow_item_ipv4 nic_mask = {
1537                 .hdr = {
1538                         .src_addr = RTE_BE32(0xffffffff),
1539                         .dst_addr = RTE_BE32(0xffffffff),
1540                         .type_of_service = 0xff,
1541                         .next_proto_id = 0xff,
1542                 },
1543         };
1544         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1545         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1546                                       MLX5_FLOW_LAYER_OUTER_L3;
1547         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1548                                       MLX5_FLOW_LAYER_OUTER_L4;
1549         int ret;
1550         uint8_t next_proto = 0xFF;
1551         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1552                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1553                                   MLX5_FLOW_LAYER_INNER_VLAN);
1554
1555         if ((last_item & l2_vlan) && ether_type &&
1556             ether_type != RTE_ETHER_TYPE_IPV4)
1557                 return rte_flow_error_set(error, EINVAL,
1558                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1559                                           "IPv4 cannot follow L2/VLAN layer "
1560                                           "which ether type is not IPv4");
1561         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1562                 if (mask && spec)
1563                         next_proto = mask->hdr.next_proto_id &
1564                                      spec->hdr.next_proto_id;
1565                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1566                         return rte_flow_error_set(error, EINVAL,
1567                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1568                                                   item,
1569                                                   "multiple tunnel "
1570                                                   "not supported");
1571         }
1572         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1573                 return rte_flow_error_set(error, EINVAL,
1574                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1575                                           "wrong tunnel type - IPv6 specified "
1576                                           "but IPv4 item provided");
1577         if (item_flags & l3m)
1578                 return rte_flow_error_set(error, ENOTSUP,
1579                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1580                                           "multiple L3 layers not supported");
1581         else if (item_flags & l4m)
1582                 return rte_flow_error_set(error, EINVAL,
1583                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1584                                           "L3 cannot follow an L4 layer.");
1585         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1586                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1587                 return rte_flow_error_set(error, EINVAL,
1588                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1589                                           "L3 cannot follow an NVGRE layer.");
1590         if (!mask)
1591                 mask = &rte_flow_item_ipv4_mask;
1592         else if (mask->hdr.next_proto_id != 0 &&
1593                  mask->hdr.next_proto_id != 0xff)
1594                 return rte_flow_error_set(error, EINVAL,
1595                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1596                                           "partial mask is not supported"
1597                                           " for protocol");
1598         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1599                                         acc_mask ? (const uint8_t *)acc_mask
1600                                                  : (const uint8_t *)&nic_mask,
1601                                         sizeof(struct rte_flow_item_ipv4),
1602                                         error);
1603         if (ret < 0)
1604                 return ret;
1605         return 0;
1606 }
1607
1608 /**
1609  * Validate IPV6 item.
1610  *
1611  * @param[in] item
1612  *   Item specification.
1613  * @param[in] item_flags
1614  *   Bit-fields that holds the items detected until now.
1615  * @param[in] acc_mask
1616  *   Acceptable mask, if NULL default internal default mask
1617  *   will be used to check whether item fields are supported.
1618  * @param[out] error
1619  *   Pointer to error structure.
1620  *
1621  * @return
1622  *   0 on success, a negative errno value otherwise and rte_errno is set.
1623  */
1624 int
1625 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1626                              uint64_t item_flags,
1627                              uint64_t last_item,
1628                              uint16_t ether_type,
1629                              const struct rte_flow_item_ipv6 *acc_mask,
1630                              struct rte_flow_error *error)
1631 {
1632         const struct rte_flow_item_ipv6 *mask = item->mask;
1633         const struct rte_flow_item_ipv6 *spec = item->spec;
1634         const struct rte_flow_item_ipv6 nic_mask = {
1635                 .hdr = {
1636                         .src_addr =
1637                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1638                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1639                         .dst_addr =
1640                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1641                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1642                         .vtc_flow = RTE_BE32(0xffffffff),
1643                         .proto = 0xff,
1644                 },
1645         };
1646         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1647         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1648                                       MLX5_FLOW_LAYER_OUTER_L3;
1649         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1650                                       MLX5_FLOW_LAYER_OUTER_L4;
1651         int ret;
1652         uint8_t next_proto = 0xFF;
1653         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1654                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1655                                   MLX5_FLOW_LAYER_INNER_VLAN);
1656
1657         if ((last_item & l2_vlan) && ether_type &&
1658             ether_type != RTE_ETHER_TYPE_IPV6)
1659                 return rte_flow_error_set(error, EINVAL,
1660                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1661                                           "IPv6 cannot follow L2/VLAN layer "
1662                                           "which ether type is not IPv6");
1663         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1664                 if (mask && spec)
1665                         next_proto = mask->hdr.proto & spec->hdr.proto;
1666                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1667                         return rte_flow_error_set(error, EINVAL,
1668                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1669                                                   item,
1670                                                   "multiple tunnel "
1671                                                   "not supported");
1672         }
1673         if (item_flags & MLX5_FLOW_LAYER_IPIP)
1674                 return rte_flow_error_set(error, EINVAL,
1675                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1676                                           "wrong tunnel type - IPv4 specified "
1677                                           "but IPv6 item provided");
1678         if (item_flags & l3m)
1679                 return rte_flow_error_set(error, ENOTSUP,
1680                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1681                                           "multiple L3 layers not supported");
1682         else if (item_flags & l4m)
1683                 return rte_flow_error_set(error, EINVAL,
1684                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1685                                           "L3 cannot follow an L4 layer.");
1686         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1687                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1688                 return rte_flow_error_set(error, EINVAL,
1689                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1690                                           "L3 cannot follow an NVGRE layer.");
1691         if (!mask)
1692                 mask = &rte_flow_item_ipv6_mask;
1693         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1694                                         acc_mask ? (const uint8_t *)acc_mask
1695                                                  : (const uint8_t *)&nic_mask,
1696                                         sizeof(struct rte_flow_item_ipv6),
1697                                         error);
1698         if (ret < 0)
1699                 return ret;
1700         return 0;
1701 }
1702
1703 /**
1704  * Validate UDP item.
1705  *
1706  * @param[in] item
1707  *   Item specification.
1708  * @param[in] item_flags
1709  *   Bit-fields that holds the items detected until now.
1710  * @param[in] target_protocol
1711  *   The next protocol in the previous item.
1712  * @param[in] flow_mask
1713  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1714  * @param[out] error
1715  *   Pointer to error structure.
1716  *
1717  * @return
1718  *   0 on success, a negative errno value otherwise and rte_errno is set.
1719  */
1720 int
1721 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1722                             uint64_t item_flags,
1723                             uint8_t target_protocol,
1724                             struct rte_flow_error *error)
1725 {
1726         const struct rte_flow_item_udp *mask = item->mask;
1727         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1728         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1729                                       MLX5_FLOW_LAYER_OUTER_L3;
1730         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1731                                       MLX5_FLOW_LAYER_OUTER_L4;
1732         int ret;
1733
1734         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1735                 return rte_flow_error_set(error, EINVAL,
1736                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1737                                           "protocol filtering not compatible"
1738                                           " with UDP layer");
1739         if (!(item_flags & l3m))
1740                 return rte_flow_error_set(error, EINVAL,
1741                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1742                                           "L3 is mandatory to filter on L4");
1743         if (item_flags & l4m)
1744                 return rte_flow_error_set(error, EINVAL,
1745                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1746                                           "multiple L4 layers not supported");
1747         if (!mask)
1748                 mask = &rte_flow_item_udp_mask;
1749         ret = mlx5_flow_item_acceptable
1750                 (item, (const uint8_t *)mask,
1751                  (const uint8_t *)&rte_flow_item_udp_mask,
1752                  sizeof(struct rte_flow_item_udp), error);
1753         if (ret < 0)
1754                 return ret;
1755         return 0;
1756 }
1757
1758 /**
1759  * Validate TCP item.
1760  *
1761  * @param[in] item
1762  *   Item specification.
1763  * @param[in] item_flags
1764  *   Bit-fields that holds the items detected until now.
1765  * @param[in] target_protocol
1766  *   The next protocol in the previous item.
1767  * @param[out] error
1768  *   Pointer to error structure.
1769  *
1770  * @return
1771  *   0 on success, a negative errno value otherwise and rte_errno is set.
1772  */
1773 int
1774 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1775                             uint64_t item_flags,
1776                             uint8_t target_protocol,
1777                             const struct rte_flow_item_tcp *flow_mask,
1778                             struct rte_flow_error *error)
1779 {
1780         const struct rte_flow_item_tcp *mask = item->mask;
1781         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1782         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1783                                       MLX5_FLOW_LAYER_OUTER_L3;
1784         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1785                                       MLX5_FLOW_LAYER_OUTER_L4;
1786         int ret;
1787
1788         MLX5_ASSERT(flow_mask);
1789         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1790                 return rte_flow_error_set(error, EINVAL,
1791                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1792                                           "protocol filtering not compatible"
1793                                           " with TCP layer");
1794         if (!(item_flags & l3m))
1795                 return rte_flow_error_set(error, EINVAL,
1796                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1797                                           "L3 is mandatory to filter on L4");
1798         if (item_flags & l4m)
1799                 return rte_flow_error_set(error, EINVAL,
1800                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1801                                           "multiple L4 layers not supported");
1802         if (!mask)
1803                 mask = &rte_flow_item_tcp_mask;
1804         ret = mlx5_flow_item_acceptable
1805                 (item, (const uint8_t *)mask,
1806                  (const uint8_t *)flow_mask,
1807                  sizeof(struct rte_flow_item_tcp), error);
1808         if (ret < 0)
1809                 return ret;
1810         return 0;
1811 }
1812
1813 /**
1814  * Validate VXLAN item.
1815  *
1816  * @param[in] item
1817  *   Item specification.
1818  * @param[in] item_flags
1819  *   Bit-fields that holds the items detected until now.
1820  * @param[in] target_protocol
1821  *   The next protocol in the previous item.
1822  * @param[out] error
1823  *   Pointer to error structure.
1824  *
1825  * @return
1826  *   0 on success, a negative errno value otherwise and rte_errno is set.
1827  */
1828 int
1829 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1830                               uint64_t item_flags,
1831                               struct rte_flow_error *error)
1832 {
1833         const struct rte_flow_item_vxlan *spec = item->spec;
1834         const struct rte_flow_item_vxlan *mask = item->mask;
1835         int ret;
1836         union vni {
1837                 uint32_t vlan_id;
1838                 uint8_t vni[4];
1839         } id = { .vlan_id = 0, };
1840
1841
1842         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1843                 return rte_flow_error_set(error, ENOTSUP,
1844                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1845                                           "multiple tunnel layers not"
1846                                           " supported");
1847         /*
1848          * Verify only UDPv4 is present as defined in
1849          * https://tools.ietf.org/html/rfc7348
1850          */
1851         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1852                 return rte_flow_error_set(error, EINVAL,
1853                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1854                                           "no outer UDP layer found");
1855         if (!mask)
1856                 mask = &rte_flow_item_vxlan_mask;
1857         ret = mlx5_flow_item_acceptable
1858                 (item, (const uint8_t *)mask,
1859                  (const uint8_t *)&rte_flow_item_vxlan_mask,
1860                  sizeof(struct rte_flow_item_vxlan),
1861                  error);
1862         if (ret < 0)
1863                 return ret;
1864         if (spec) {
1865                 memcpy(&id.vni[1], spec->vni, 3);
1866                 memcpy(&id.vni[1], mask->vni, 3);
1867         }
1868         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1869                 return rte_flow_error_set(error, ENOTSUP,
1870                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1871                                           "VXLAN tunnel must be fully defined");
1872         return 0;
1873 }
1874
1875 /**
1876  * Validate VXLAN_GPE item.
1877  *
1878  * @param[in] item
1879  *   Item specification.
1880  * @param[in] item_flags
1881  *   Bit-fields that holds the items detected until now.
1882  * @param[in] priv
1883  *   Pointer to the private data structure.
1884  * @param[in] target_protocol
1885  *   The next protocol in the previous item.
1886  * @param[out] error
1887  *   Pointer to error structure.
1888  *
1889  * @return
1890  *   0 on success, a negative errno value otherwise and rte_errno is set.
1891  */
1892 int
1893 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1894                                   uint64_t item_flags,
1895                                   struct rte_eth_dev *dev,
1896                                   struct rte_flow_error *error)
1897 {
1898         struct mlx5_priv *priv = dev->data->dev_private;
1899         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1900         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1901         int ret;
1902         union vni {
1903                 uint32_t vlan_id;
1904                 uint8_t vni[4];
1905         } id = { .vlan_id = 0, };
1906
1907         if (!priv->config.l3_vxlan_en)
1908                 return rte_flow_error_set(error, ENOTSUP,
1909                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1910                                           "L3 VXLAN is not enabled by device"
1911                                           " parameter and/or not configured in"
1912                                           " firmware");
1913         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1914                 return rte_flow_error_set(error, ENOTSUP,
1915                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1916                                           "multiple tunnel layers not"
1917                                           " supported");
1918         /*
1919          * Verify only UDPv4 is present as defined in
1920          * https://tools.ietf.org/html/rfc7348
1921          */
1922         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1923                 return rte_flow_error_set(error, EINVAL,
1924                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1925                                           "no outer UDP layer found");
1926         if (!mask)
1927                 mask = &rte_flow_item_vxlan_gpe_mask;
1928         ret = mlx5_flow_item_acceptable
1929                 (item, (const uint8_t *)mask,
1930                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1931                  sizeof(struct rte_flow_item_vxlan_gpe),
1932                  error);
1933         if (ret < 0)
1934                 return ret;
1935         if (spec) {
1936                 if (spec->protocol)
1937                         return rte_flow_error_set(error, ENOTSUP,
1938                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1939                                                   item,
1940                                                   "VxLAN-GPE protocol"
1941                                                   " not supported");
1942                 memcpy(&id.vni[1], spec->vni, 3);
1943                 memcpy(&id.vni[1], mask->vni, 3);
1944         }
1945         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1946                 return rte_flow_error_set(error, ENOTSUP,
1947                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1948                                           "VXLAN-GPE tunnel must be fully"
1949                                           " defined");
1950         return 0;
1951 }
1952 /**
1953  * Validate GRE Key item.
1954  *
1955  * @param[in] item
1956  *   Item specification.
1957  * @param[in] item_flags
1958  *   Bit flags to mark detected items.
1959  * @param[in] gre_item
1960  *   Pointer to gre_item
1961  * @param[out] error
1962  *   Pointer to error structure.
1963  *
1964  * @return
1965  *   0 on success, a negative errno value otherwise and rte_errno is set.
1966  */
1967 int
1968 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1969                                 uint64_t item_flags,
1970                                 const struct rte_flow_item *gre_item,
1971                                 struct rte_flow_error *error)
1972 {
1973         const rte_be32_t *mask = item->mask;
1974         int ret = 0;
1975         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1976         const struct rte_flow_item_gre *gre_spec;
1977         const struct rte_flow_item_gre *gre_mask;
1978
1979         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1980                 return rte_flow_error_set(error, ENOTSUP,
1981                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1982                                           "Multiple GRE key not support");
1983         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1984                 return rte_flow_error_set(error, ENOTSUP,
1985                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1986                                           "No preceding GRE header");
1987         if (item_flags & MLX5_FLOW_LAYER_INNER)
1988                 return rte_flow_error_set(error, ENOTSUP,
1989                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1990                                           "GRE key following a wrong item");
1991         gre_mask = gre_item->mask;
1992         if (!gre_mask)
1993                 gre_mask = &rte_flow_item_gre_mask;
1994         gre_spec = gre_item->spec;
1995         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
1996                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
1997                 return rte_flow_error_set(error, EINVAL,
1998                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1999                                           "Key bit must be on");
2000
2001         if (!mask)
2002                 mask = &gre_key_default_mask;
2003         ret = mlx5_flow_item_acceptable
2004                 (item, (const uint8_t *)mask,
2005                  (const uint8_t *)&gre_key_default_mask,
2006                  sizeof(rte_be32_t), error);
2007         return ret;
2008 }
2009
2010 /**
2011  * Validate GRE item.
2012  *
2013  * @param[in] item
2014  *   Item specification.
2015  * @param[in] item_flags
2016  *   Bit flags to mark detected items.
2017  * @param[in] target_protocol
2018  *   The next protocol in the previous item.
2019  * @param[out] error
2020  *   Pointer to error structure.
2021  *
2022  * @return
2023  *   0 on success, a negative errno value otherwise and rte_errno is set.
2024  */
2025 int
2026 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2027                             uint64_t item_flags,
2028                             uint8_t target_protocol,
2029                             struct rte_flow_error *error)
2030 {
2031         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2032         const struct rte_flow_item_gre *mask = item->mask;
2033         int ret;
2034         const struct rte_flow_item_gre nic_mask = {
2035                 .c_rsvd0_ver = RTE_BE16(0xB000),
2036                 .protocol = RTE_BE16(UINT16_MAX),
2037         };
2038
2039         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2042                                           "protocol filtering not compatible"
2043                                           " with this GRE layer");
2044         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2045                 return rte_flow_error_set(error, ENOTSUP,
2046                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2047                                           "multiple tunnel layers not"
2048                                           " supported");
2049         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2050                 return rte_flow_error_set(error, ENOTSUP,
2051                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2052                                           "L3 Layer is missing");
2053         if (!mask)
2054                 mask = &rte_flow_item_gre_mask;
2055         ret = mlx5_flow_item_acceptable
2056                 (item, (const uint8_t *)mask,
2057                  (const uint8_t *)&nic_mask,
2058                  sizeof(struct rte_flow_item_gre), error);
2059         if (ret < 0)
2060                 return ret;
2061 #ifndef HAVE_MLX5DV_DR
2062 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2063         if (spec && (spec->protocol & mask->protocol))
2064                 return rte_flow_error_set(error, ENOTSUP,
2065                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2066                                           "without MPLS support the"
2067                                           " specification cannot be used for"
2068                                           " filtering");
2069 #endif
2070 #endif
2071         return 0;
2072 }
2073
2074 /**
2075  * Validate Geneve item.
2076  *
2077  * @param[in] item
2078  *   Item specification.
2079  * @param[in] itemFlags
2080  *   Bit-fields that holds the items detected until now.
2081  * @param[in] enPriv
2082  *   Pointer to the private data structure.
2083  * @param[out] error
2084  *   Pointer to error structure.
2085  *
2086  * @return
2087  *   0 on success, a negative errno value otherwise and rte_errno is set.
2088  */
2089
2090 int
2091 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2092                                uint64_t item_flags,
2093                                struct rte_eth_dev *dev,
2094                                struct rte_flow_error *error)
2095 {
2096         struct mlx5_priv *priv = dev->data->dev_private;
2097         const struct rte_flow_item_geneve *spec = item->spec;
2098         const struct rte_flow_item_geneve *mask = item->mask;
2099         int ret;
2100         uint16_t gbhdr;
2101         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2102                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2103         const struct rte_flow_item_geneve nic_mask = {
2104                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2105                 .vni = "\xff\xff\xff",
2106                 .protocol = RTE_BE16(UINT16_MAX),
2107         };
2108
2109         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2110                 return rte_flow_error_set(error, ENOTSUP,
2111                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2112                                           "L3 Geneve is not enabled by device"
2113                                           " parameter and/or not configured in"
2114                                           " firmware");
2115         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2116                 return rte_flow_error_set(error, ENOTSUP,
2117                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2118                                           "multiple tunnel layers not"
2119                                           " supported");
2120         /*
2121          * Verify only UDPv4 is present as defined in
2122          * https://tools.ietf.org/html/rfc7348
2123          */
2124         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2125                 return rte_flow_error_set(error, EINVAL,
2126                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2127                                           "no outer UDP layer found");
2128         if (!mask)
2129                 mask = &rte_flow_item_geneve_mask;
2130         ret = mlx5_flow_item_acceptable
2131                                   (item, (const uint8_t *)mask,
2132                                    (const uint8_t *)&nic_mask,
2133                                    sizeof(struct rte_flow_item_geneve), error);
2134         if (ret)
2135                 return ret;
2136         if (spec) {
2137                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2138                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2139                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2140                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2141                         return rte_flow_error_set(error, ENOTSUP,
2142                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2143                                                   item,
2144                                                   "Geneve protocol unsupported"
2145                                                   " fields are being used");
2146                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2147                         return rte_flow_error_set
2148                                         (error, ENOTSUP,
2149                                          RTE_FLOW_ERROR_TYPE_ITEM,
2150                                          item,
2151                                          "Unsupported Geneve options length");
2152         }
2153         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2154                 return rte_flow_error_set
2155                                     (error, ENOTSUP,
2156                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2157                                      "Geneve tunnel must be fully defined");
2158         return 0;
2159 }
2160
2161 /**
2162  * Validate MPLS item.
2163  *
2164  * @param[in] dev
2165  *   Pointer to the rte_eth_dev structure.
2166  * @param[in] item
2167  *   Item specification.
2168  * @param[in] item_flags
2169  *   Bit-fields that holds the items detected until now.
2170  * @param[in] prev_layer
2171  *   The protocol layer indicated in previous item.
2172  * @param[out] error
2173  *   Pointer to error structure.
2174  *
2175  * @return
2176  *   0 on success, a negative errno value otherwise and rte_errno is set.
2177  */
2178 int
2179 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2180                              const struct rte_flow_item *item __rte_unused,
2181                              uint64_t item_flags __rte_unused,
2182                              uint64_t prev_layer __rte_unused,
2183                              struct rte_flow_error *error)
2184 {
2185 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2186         const struct rte_flow_item_mpls *mask = item->mask;
2187         struct mlx5_priv *priv = dev->data->dev_private;
2188         int ret;
2189
2190         if (!priv->config.mpls_en)
2191                 return rte_flow_error_set(error, ENOTSUP,
2192                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2193                                           "MPLS not supported or"
2194                                           " disabled in firmware"
2195                                           " configuration.");
2196         /* MPLS over IP, UDP, GRE is allowed */
2197         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2198                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2199                             MLX5_FLOW_LAYER_GRE)))
2200                 return rte_flow_error_set(error, EINVAL,
2201                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2202                                           "protocol filtering not compatible"
2203                                           " with MPLS layer");
2204         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2205         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2206             !(item_flags & MLX5_FLOW_LAYER_GRE))
2207                 return rte_flow_error_set(error, ENOTSUP,
2208                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2209                                           "multiple tunnel layers not"
2210                                           " supported");
2211         if (!mask)
2212                 mask = &rte_flow_item_mpls_mask;
2213         ret = mlx5_flow_item_acceptable
2214                 (item, (const uint8_t *)mask,
2215                  (const uint8_t *)&rte_flow_item_mpls_mask,
2216                  sizeof(struct rte_flow_item_mpls), error);
2217         if (ret < 0)
2218                 return ret;
2219         return 0;
2220 #endif
2221         return rte_flow_error_set(error, ENOTSUP,
2222                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2223                                   "MPLS is not supported by Verbs, please"
2224                                   " update.");
2225 }
2226
2227 /**
2228  * Validate NVGRE item.
2229  *
2230  * @param[in] item
2231  *   Item specification.
2232  * @param[in] item_flags
2233  *   Bit flags to mark detected items.
2234  * @param[in] target_protocol
2235  *   The next protocol in the previous item.
2236  * @param[out] error
2237  *   Pointer to error structure.
2238  *
2239  * @return
2240  *   0 on success, a negative errno value otherwise and rte_errno is set.
2241  */
2242 int
2243 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2244                               uint64_t item_flags,
2245                               uint8_t target_protocol,
2246                               struct rte_flow_error *error)
2247 {
2248         const struct rte_flow_item_nvgre *mask = item->mask;
2249         int ret;
2250
2251         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2252                 return rte_flow_error_set(error, EINVAL,
2253                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2254                                           "protocol filtering not compatible"
2255                                           " with this GRE layer");
2256         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2257                 return rte_flow_error_set(error, ENOTSUP,
2258                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2259                                           "multiple tunnel layers not"
2260                                           " supported");
2261         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2262                 return rte_flow_error_set(error, ENOTSUP,
2263                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2264                                           "L3 Layer is missing");
2265         if (!mask)
2266                 mask = &rte_flow_item_nvgre_mask;
2267         ret = mlx5_flow_item_acceptable
2268                 (item, (const uint8_t *)mask,
2269                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2270                  sizeof(struct rte_flow_item_nvgre), error);
2271         if (ret < 0)
2272                 return ret;
2273         return 0;
2274 }
2275
2276 /* Allocate unique ID for the split Q/RSS subflows. */
2277 static uint32_t
2278 flow_qrss_get_id(struct rte_eth_dev *dev)
2279 {
2280         struct mlx5_priv *priv = dev->data->dev_private;
2281         uint32_t qrss_id, ret;
2282
2283         ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2284         if (ret)
2285                 return 0;
2286         MLX5_ASSERT(qrss_id);
2287         return qrss_id;
2288 }
2289
2290 /* Free unique ID for the split Q/RSS subflows. */
2291 static void
2292 flow_qrss_free_id(struct rte_eth_dev *dev,  uint32_t qrss_id)
2293 {
2294         struct mlx5_priv *priv = dev->data->dev_private;
2295
2296         if (qrss_id)
2297                 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2298 }
2299
2300 /**
2301  * Release resource related QUEUE/RSS action split.
2302  *
2303  * @param dev
2304  *   Pointer to Ethernet device.
2305  * @param flow
2306  *   Flow to release id's from.
2307  */
2308 static void
2309 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2310                              struct rte_flow *flow)
2311 {
2312         struct mlx5_flow *dev_flow;
2313
2314         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
2315                 if (dev_flow->qrss_id)
2316                         flow_qrss_free_id(dev, dev_flow->qrss_id);
2317 }
2318
2319 static int
2320 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2321                    const struct rte_flow_attr *attr __rte_unused,
2322                    const struct rte_flow_item items[] __rte_unused,
2323                    const struct rte_flow_action actions[] __rte_unused,
2324                    bool external __rte_unused,
2325                    struct rte_flow_error *error)
2326 {
2327         return rte_flow_error_set(error, ENOTSUP,
2328                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2329 }
2330
2331 static struct mlx5_flow *
2332 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
2333                   const struct rte_flow_item items[] __rte_unused,
2334                   const struct rte_flow_action actions[] __rte_unused,
2335                   struct rte_flow_error *error)
2336 {
2337         rte_flow_error_set(error, ENOTSUP,
2338                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2339         return NULL;
2340 }
2341
2342 static int
2343 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2344                     struct mlx5_flow *dev_flow __rte_unused,
2345                     const struct rte_flow_attr *attr __rte_unused,
2346                     const struct rte_flow_item items[] __rte_unused,
2347                     const struct rte_flow_action actions[] __rte_unused,
2348                     struct rte_flow_error *error)
2349 {
2350         return rte_flow_error_set(error, ENOTSUP,
2351                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2352 }
2353
2354 static int
2355 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2356                 struct rte_flow *flow __rte_unused,
2357                 struct rte_flow_error *error)
2358 {
2359         return rte_flow_error_set(error, ENOTSUP,
2360                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2361 }
2362
2363 static void
2364 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2365                  struct rte_flow *flow __rte_unused)
2366 {
2367 }
2368
2369 static void
2370 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2371                   struct rte_flow *flow __rte_unused)
2372 {
2373 }
2374
2375 static int
2376 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2377                 struct rte_flow *flow __rte_unused,
2378                 const struct rte_flow_action *actions __rte_unused,
2379                 void *data __rte_unused,
2380                 struct rte_flow_error *error)
2381 {
2382         return rte_flow_error_set(error, ENOTSUP,
2383                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2384 }
2385
2386 /* Void driver to protect from null pointer reference. */
2387 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2388         .validate = flow_null_validate,
2389         .prepare = flow_null_prepare,
2390         .translate = flow_null_translate,
2391         .apply = flow_null_apply,
2392         .remove = flow_null_remove,
2393         .destroy = flow_null_destroy,
2394         .query = flow_null_query,
2395 };
2396
2397 /**
2398  * Select flow driver type according to flow attributes and device
2399  * configuration.
2400  *
2401  * @param[in] dev
2402  *   Pointer to the dev structure.
2403  * @param[in] attr
2404  *   Pointer to the flow attributes.
2405  *
2406  * @return
2407  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2408  */
2409 static enum mlx5_flow_drv_type
2410 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2411 {
2412         struct mlx5_priv *priv = dev->data->dev_private;
2413         enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2414
2415         if (attr->transfer && priv->config.dv_esw_en)
2416                 type = MLX5_FLOW_TYPE_DV;
2417         if (!attr->transfer)
2418                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2419                                                  MLX5_FLOW_TYPE_VERBS;
2420         return type;
2421 }
2422
2423 #define flow_get_drv_ops(type) flow_drv_ops[type]
2424
2425 /**
2426  * Flow driver validation API. This abstracts calling driver specific functions.
2427  * The type of flow driver is determined according to flow attributes.
2428  *
2429  * @param[in] dev
2430  *   Pointer to the dev structure.
2431  * @param[in] attr
2432  *   Pointer to the flow attributes.
2433  * @param[in] items
2434  *   Pointer to the list of items.
2435  * @param[in] actions
2436  *   Pointer to the list of actions.
2437  * @param[in] external
2438  *   This flow rule is created by request external to PMD.
2439  * @param[out] error
2440  *   Pointer to the error structure.
2441  *
2442  * @return
2443  *   0 on success, a negative errno value otherwise and rte_errno is set.
2444  */
2445 static inline int
2446 flow_drv_validate(struct rte_eth_dev *dev,
2447                   const struct rte_flow_attr *attr,
2448                   const struct rte_flow_item items[],
2449                   const struct rte_flow_action actions[],
2450                   bool external, struct rte_flow_error *error)
2451 {
2452         const struct mlx5_flow_driver_ops *fops;
2453         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2454
2455         fops = flow_get_drv_ops(type);
2456         return fops->validate(dev, attr, items, actions, external, error);
2457 }
2458
2459 /**
2460  * Flow driver preparation API. This abstracts calling driver specific
2461  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2462  * calculates the size of memory required for device flow, allocates the memory,
2463  * initializes the device flow and returns the pointer.
2464  *
2465  * @note
2466  *   This function initializes device flow structure such as dv or verbs in
2467  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
2468  *   rest. For example, adding returning device flow to flow->dev_flow list and
2469  *   setting backward reference to the flow should be done out of this function.
2470  *   layers field is not filled either.
2471  *
2472  * @param[in] attr
2473  *   Pointer to the flow attributes.
2474  * @param[in] items
2475  *   Pointer to the list of items.
2476  * @param[in] actions
2477  *   Pointer to the list of actions.
2478  * @param[out] error
2479  *   Pointer to the error structure.
2480  *
2481  * @return
2482  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
2483  */
2484 static inline struct mlx5_flow *
2485 flow_drv_prepare(const struct rte_flow *flow,
2486                  const struct rte_flow_attr *attr,
2487                  const struct rte_flow_item items[],
2488                  const struct rte_flow_action actions[],
2489                  struct rte_flow_error *error)
2490 {
2491         const struct mlx5_flow_driver_ops *fops;
2492         enum mlx5_flow_drv_type type = flow->drv_type;
2493
2494         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2495         fops = flow_get_drv_ops(type);
2496         return fops->prepare(attr, items, actions, error);
2497 }
2498
2499 /**
2500  * Flow driver translation API. This abstracts calling driver specific
2501  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2502  * translates a generic flow into a driver flow. flow_drv_prepare() must
2503  * precede.
2504  *
2505  * @note
2506  *   dev_flow->layers could be filled as a result of parsing during translation
2507  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2508  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2509  *   flow->actions could be overwritten even though all the expanded dev_flows
2510  *   have the same actions.
2511  *
2512  * @param[in] dev
2513  *   Pointer to the rte dev structure.
2514  * @param[in, out] dev_flow
2515  *   Pointer to the mlx5 flow.
2516  * @param[in] attr
2517  *   Pointer to the flow attributes.
2518  * @param[in] items
2519  *   Pointer to the list of items.
2520  * @param[in] actions
2521  *   Pointer to the list of actions.
2522  * @param[out] error
2523  *   Pointer to the error structure.
2524  *
2525  * @return
2526  *   0 on success, a negative errno value otherwise and rte_errno is set.
2527  */
2528 static inline int
2529 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2530                    const struct rte_flow_attr *attr,
2531                    const struct rte_flow_item items[],
2532                    const struct rte_flow_action actions[],
2533                    struct rte_flow_error *error)
2534 {
2535         const struct mlx5_flow_driver_ops *fops;
2536         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2537
2538         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2539         fops = flow_get_drv_ops(type);
2540         return fops->translate(dev, dev_flow, attr, items, actions, error);
2541 }
2542
2543 /**
2544  * Flow driver apply API. This abstracts calling driver specific functions.
2545  * Parent flow (rte_flow) should have driver type (drv_type). It applies
2546  * translated driver flows on to device. flow_drv_translate() must precede.
2547  *
2548  * @param[in] dev
2549  *   Pointer to Ethernet device structure.
2550  * @param[in, out] flow
2551  *   Pointer to flow structure.
2552  * @param[out] error
2553  *   Pointer to error structure.
2554  *
2555  * @return
2556  *   0 on success, a negative errno value otherwise and rte_errno is set.
2557  */
2558 static inline int
2559 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2560                struct rte_flow_error *error)
2561 {
2562         const struct mlx5_flow_driver_ops *fops;
2563         enum mlx5_flow_drv_type type = flow->drv_type;
2564
2565         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2566         fops = flow_get_drv_ops(type);
2567         return fops->apply(dev, flow, error);
2568 }
2569
2570 /**
2571  * Flow driver remove API. This abstracts calling driver specific functions.
2572  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2573  * on device. All the resources of the flow should be freed by calling
2574  * flow_drv_destroy().
2575  *
2576  * @param[in] dev
2577  *   Pointer to Ethernet device.
2578  * @param[in, out] flow
2579  *   Pointer to flow structure.
2580  */
2581 static inline void
2582 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2583 {
2584         const struct mlx5_flow_driver_ops *fops;
2585         enum mlx5_flow_drv_type type = flow->drv_type;
2586
2587         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2588         fops = flow_get_drv_ops(type);
2589         fops->remove(dev, flow);
2590 }
2591
2592 /**
2593  * Flow driver destroy API. This abstracts calling driver specific functions.
2594  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2595  * on device and releases resources of the flow.
2596  *
2597  * @param[in] dev
2598  *   Pointer to Ethernet device.
2599  * @param[in, out] flow
2600  *   Pointer to flow structure.
2601  */
2602 static inline void
2603 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2604 {
2605         const struct mlx5_flow_driver_ops *fops;
2606         enum mlx5_flow_drv_type type = flow->drv_type;
2607
2608         flow_mreg_split_qrss_release(dev, flow);
2609         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2610         fops = flow_get_drv_ops(type);
2611         fops->destroy(dev, flow);
2612 }
2613
2614 /**
2615  * Validate a flow supported by the NIC.
2616  *
2617  * @see rte_flow_validate()
2618  * @see rte_flow_ops
2619  */
2620 int
2621 mlx5_flow_validate(struct rte_eth_dev *dev,
2622                    const struct rte_flow_attr *attr,
2623                    const struct rte_flow_item items[],
2624                    const struct rte_flow_action actions[],
2625                    struct rte_flow_error *error)
2626 {
2627         int ret;
2628
2629         ret = flow_drv_validate(dev, attr, items, actions, true, error);
2630         if (ret < 0)
2631                 return ret;
2632         return 0;
2633 }
2634
2635 /**
2636  * Get RSS action from the action list.
2637  *
2638  * @param[in] actions
2639  *   Pointer to the list of actions.
2640  *
2641  * @return
2642  *   Pointer to the RSS action if exist, else return NULL.
2643  */
2644 static const struct rte_flow_action_rss*
2645 flow_get_rss_action(const struct rte_flow_action actions[])
2646 {
2647         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2648                 switch (actions->type) {
2649                 case RTE_FLOW_ACTION_TYPE_RSS:
2650                         return (const struct rte_flow_action_rss *)
2651                                actions->conf;
2652                 default:
2653                         break;
2654                 }
2655         }
2656         return NULL;
2657 }
2658
2659 static unsigned int
2660 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2661 {
2662         const struct rte_flow_item *item;
2663         unsigned int has_vlan = 0;
2664
2665         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2666                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2667                         has_vlan = 1;
2668                         break;
2669                 }
2670         }
2671         if (has_vlan)
2672                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2673                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2674         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2675                                MLX5_EXPANSION_ROOT_OUTER;
2676 }
2677
2678 /**
2679  *  Get layer flags from the prefix flow.
2680  *
2681  *  Some flows may be split to several subflows, the prefix subflow gets the
2682  *  match items and the suffix sub flow gets the actions.
2683  *  Some actions need the user defined match item flags to get the detail for
2684  *  the action.
2685  *  This function helps the suffix flow to get the item layer flags from prefix
2686  *  subflow.
2687  *
2688  * @param[in] dev_flow
2689  *   Pointer the created preifx subflow.
2690  *
2691  * @return
2692  *   The layers get from prefix subflow.
2693  */
2694 static inline uint64_t
2695 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
2696 {
2697         uint64_t layers = 0;
2698
2699         /* If no decap actions, use the layers directly. */
2700         if (!(dev_flow->actions & MLX5_FLOW_ACTION_DECAP))
2701                 return dev_flow->layers;
2702         /* Convert L3 layers with decap action. */
2703         if (dev_flow->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
2704                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2705         else if (dev_flow->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
2706                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2707         /* Convert L4 layers with decap action.  */
2708         if (dev_flow->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
2709                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
2710         else if (dev_flow->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
2711                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
2712         return layers;
2713 }
2714
2715 /**
2716  * Get metadata split action information.
2717  *
2718  * @param[in] actions
2719  *   Pointer to the list of actions.
2720  * @param[out] qrss
2721  *   Pointer to the return pointer.
2722  * @param[out] qrss_type
2723  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
2724  *   if no QUEUE/RSS is found.
2725  * @param[out] encap_idx
2726  *   Pointer to the index of the encap action if exists, otherwise the last
2727  *   action index.
2728  *
2729  * @return
2730  *   Total number of actions.
2731  */
2732 static int
2733 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
2734                                        const struct rte_flow_action **qrss,
2735                                        int *encap_idx)
2736 {
2737         const struct rte_flow_action_raw_encap *raw_encap;
2738         int actions_n = 0;
2739         int raw_decap_idx = -1;
2740
2741         *encap_idx = -1;
2742         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2743                 switch (actions->type) {
2744                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2745                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2746                         *encap_idx = actions_n;
2747                         break;
2748                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
2749                         raw_decap_idx = actions_n;
2750                         break;
2751                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2752                         raw_encap = actions->conf;
2753                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2754                                 *encap_idx = raw_decap_idx != -1 ?
2755                                                       raw_decap_idx : actions_n;
2756                         break;
2757                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2758                 case RTE_FLOW_ACTION_TYPE_RSS:
2759                         *qrss = actions;
2760                         break;
2761                 default:
2762                         break;
2763                 }
2764                 actions_n++;
2765         }
2766         if (*encap_idx == -1)
2767                 *encap_idx = actions_n;
2768         /* Count RTE_FLOW_ACTION_TYPE_END. */
2769         return actions_n + 1;
2770 }
2771
2772 /**
2773  * Check meter action from the action list.
2774  *
2775  * @param[in] actions
2776  *   Pointer to the list of actions.
2777  * @param[out] mtr
2778  *   Pointer to the meter exist flag.
2779  *
2780  * @return
2781  *   Total number of actions.
2782  */
2783 static int
2784 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
2785 {
2786         int actions_n = 0;
2787
2788         MLX5_ASSERT(mtr);
2789         *mtr = 0;
2790         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2791                 switch (actions->type) {
2792                 case RTE_FLOW_ACTION_TYPE_METER:
2793                         *mtr = 1;
2794                         break;
2795                 default:
2796                         break;
2797                 }
2798                 actions_n++;
2799         }
2800         /* Count RTE_FLOW_ACTION_TYPE_END. */
2801         return actions_n + 1;
2802 }
2803
2804 /**
2805  * Check if the flow should be splited due to hairpin.
2806  * The reason for the split is that in current HW we can't
2807  * support encap on Rx, so if a flow have encap we move it
2808  * to Tx.
2809  *
2810  * @param dev
2811  *   Pointer to Ethernet device.
2812  * @param[in] attr
2813  *   Flow rule attributes.
2814  * @param[in] actions
2815  *   Associated actions (list terminated by the END action).
2816  *
2817  * @return
2818  *   > 0 the number of actions and the flow should be split,
2819  *   0 when no split required.
2820  */
2821 static int
2822 flow_check_hairpin_split(struct rte_eth_dev *dev,
2823                          const struct rte_flow_attr *attr,
2824                          const struct rte_flow_action actions[])
2825 {
2826         int queue_action = 0;
2827         int action_n = 0;
2828         int encap = 0;
2829         const struct rte_flow_action_queue *queue;
2830         const struct rte_flow_action_rss *rss;
2831         const struct rte_flow_action_raw_encap *raw_encap;
2832
2833         if (!attr->ingress)
2834                 return 0;
2835         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2836                 switch (actions->type) {
2837                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2838                         queue = actions->conf;
2839                         if (queue == NULL)
2840                                 return 0;
2841                         if (mlx5_rxq_get_type(dev, queue->index) !=
2842                             MLX5_RXQ_TYPE_HAIRPIN)
2843                                 return 0;
2844                         queue_action = 1;
2845                         action_n++;
2846                         break;
2847                 case RTE_FLOW_ACTION_TYPE_RSS:
2848                         rss = actions->conf;
2849                         if (rss == NULL || rss->queue_num == 0)
2850                                 return 0;
2851                         if (mlx5_rxq_get_type(dev, rss->queue[0]) !=
2852                             MLX5_RXQ_TYPE_HAIRPIN)
2853                                 return 0;
2854                         queue_action = 1;
2855                         action_n++;
2856                         break;
2857                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2858                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2859                         encap = 1;
2860                         action_n++;
2861                         break;
2862                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2863                         raw_encap = actions->conf;
2864                         if (raw_encap->size >
2865                             (sizeof(struct rte_flow_item_eth) +
2866                              sizeof(struct rte_flow_item_ipv4)))
2867                                 encap = 1;
2868                         action_n++;
2869                         break;
2870                 default:
2871                         action_n++;
2872                         break;
2873                 }
2874         }
2875         if (encap == 1 && queue_action)
2876                 return action_n;
2877         return 0;
2878 }
2879
2880 /* Declare flow create/destroy prototype in advance. */
2881 static struct rte_flow *
2882 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2883                  const struct rte_flow_attr *attr,
2884                  const struct rte_flow_item items[],
2885                  const struct rte_flow_action actions[],
2886                  bool external, struct rte_flow_error *error);
2887
2888 static void
2889 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2890                   struct rte_flow *flow);
2891
2892 /**
2893  * Add a flow of copying flow metadata registers in RX_CP_TBL.
2894  *
2895  * As mark_id is unique, if there's already a registered flow for the mark_id,
2896  * return by increasing the reference counter of the resource. Otherwise, create
2897  * the resource (mcp_res) and flow.
2898  *
2899  * Flow looks like,
2900  *   - If ingress port is ANY and reg_c[1] is mark_id,
2901  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
2902  *
2903  * For default flow (zero mark_id), flow is like,
2904  *   - If ingress port is ANY,
2905  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
2906  *
2907  * @param dev
2908  *   Pointer to Ethernet device.
2909  * @param mark_id
2910  *   ID of MARK action, zero means default flow for META.
2911  * @param[out] error
2912  *   Perform verbose error reporting if not NULL.
2913  *
2914  * @return
2915  *   Associated resource on success, NULL otherwise and rte_errno is set.
2916  */
2917 static struct mlx5_flow_mreg_copy_resource *
2918 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
2919                           struct rte_flow_error *error)
2920 {
2921         struct mlx5_priv *priv = dev->data->dev_private;
2922         struct rte_flow_attr attr = {
2923                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
2924                 .ingress = 1,
2925         };
2926         struct mlx5_rte_flow_item_tag tag_spec = {
2927                 .data = mark_id,
2928         };
2929         struct rte_flow_item items[] = {
2930                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
2931         };
2932         struct rte_flow_action_mark ftag = {
2933                 .id = mark_id,
2934         };
2935         struct mlx5_flow_action_copy_mreg cp_mreg = {
2936                 .dst = REG_B,
2937                 .src = 0,
2938         };
2939         struct rte_flow_action_jump jump = {
2940                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
2941         };
2942         struct rte_flow_action actions[] = {
2943                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
2944         };
2945         struct mlx5_flow_mreg_copy_resource *mcp_res;
2946         int ret;
2947
2948         /* Fill the register fileds in the flow. */
2949         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2950         if (ret < 0)
2951                 return NULL;
2952         tag_spec.id = ret;
2953         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
2954         if (ret < 0)
2955                 return NULL;
2956         cp_mreg.src = ret;
2957         /* Check if already registered. */
2958         MLX5_ASSERT(priv->mreg_cp_tbl);
2959         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id);
2960         if (mcp_res) {
2961                 /* For non-default rule. */
2962                 if (mark_id != MLX5_DEFAULT_COPY_ID)
2963                         mcp_res->refcnt++;
2964                 MLX5_ASSERT(mark_id != MLX5_DEFAULT_COPY_ID ||
2965                             mcp_res->refcnt == 1);
2966                 return mcp_res;
2967         }
2968         /* Provide the full width of FLAG specific value. */
2969         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
2970                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
2971         /* Build a new flow. */
2972         if (mark_id != MLX5_DEFAULT_COPY_ID) {
2973                 items[0] = (struct rte_flow_item){
2974                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
2975                         .spec = &tag_spec,
2976                 };
2977                 items[1] = (struct rte_flow_item){
2978                         .type = RTE_FLOW_ITEM_TYPE_END,
2979                 };
2980                 actions[0] = (struct rte_flow_action){
2981                         .type = MLX5_RTE_FLOW_ACTION_TYPE_MARK,
2982                         .conf = &ftag,
2983                 };
2984                 actions[1] = (struct rte_flow_action){
2985                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
2986                         .conf = &cp_mreg,
2987                 };
2988                 actions[2] = (struct rte_flow_action){
2989                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
2990                         .conf = &jump,
2991                 };
2992                 actions[3] = (struct rte_flow_action){
2993                         .type = RTE_FLOW_ACTION_TYPE_END,
2994                 };
2995         } else {
2996                 /* Default rule, wildcard match. */
2997                 attr.priority = MLX5_FLOW_PRIO_RSVD;
2998                 items[0] = (struct rte_flow_item){
2999                         .type = RTE_FLOW_ITEM_TYPE_END,
3000                 };
3001                 actions[0] = (struct rte_flow_action){
3002                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3003                         .conf = &cp_mreg,
3004                 };
3005                 actions[1] = (struct rte_flow_action){
3006                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3007                         .conf = &jump,
3008                 };
3009                 actions[2] = (struct rte_flow_action){
3010                         .type = RTE_FLOW_ACTION_TYPE_END,
3011                 };
3012         }
3013         /* Build a new entry. */
3014         mcp_res = rte_zmalloc(__func__, sizeof(*mcp_res), 0);
3015         if (!mcp_res) {
3016                 rte_errno = ENOMEM;
3017                 return NULL;
3018         }
3019         /*
3020          * The copy Flows are not included in any list. There
3021          * ones are referenced from other Flows and can not
3022          * be applied, removed, deleted in ardbitrary order
3023          * by list traversing.
3024          */
3025         mcp_res->flow = flow_list_create(dev, NULL, &attr, items,
3026                                          actions, false, error);
3027         if (!mcp_res->flow)
3028                 goto error;
3029         mcp_res->refcnt++;
3030         mcp_res->hlist_ent.key = mark_id;
3031         ret = mlx5_hlist_insert(priv->mreg_cp_tbl,
3032                                 &mcp_res->hlist_ent);
3033         MLX5_ASSERT(!ret);
3034         if (ret)
3035                 goto error;
3036         return mcp_res;
3037 error:
3038         if (mcp_res->flow)
3039                 flow_list_destroy(dev, NULL, mcp_res->flow);
3040         rte_free(mcp_res);
3041         return NULL;
3042 }
3043
3044 /**
3045  * Release flow in RX_CP_TBL.
3046  *
3047  * @param dev
3048  *   Pointer to Ethernet device.
3049  * @flow
3050  *   Parent flow for wich copying is provided.
3051  */
3052 static void
3053 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3054                           struct rte_flow *flow)
3055 {
3056         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3057         struct mlx5_priv *priv = dev->data->dev_private;
3058
3059         if (!mcp_res || !priv->mreg_cp_tbl)
3060                 return;
3061         if (flow->copy_applied) {
3062                 MLX5_ASSERT(mcp_res->appcnt);
3063                 flow->copy_applied = 0;
3064                 --mcp_res->appcnt;
3065                 if (!mcp_res->appcnt)
3066                         flow_drv_remove(dev, mcp_res->flow);
3067         }
3068         /*
3069          * We do not check availability of metadata registers here,
3070          * because copy resources are not allocated in this case.
3071          */
3072         if (--mcp_res->refcnt)
3073                 return;
3074         MLX5_ASSERT(mcp_res->flow);
3075         flow_list_destroy(dev, NULL, mcp_res->flow);
3076         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3077         rte_free(mcp_res);
3078         flow->mreg_copy = NULL;
3079 }
3080
3081 /**
3082  * Start flow in RX_CP_TBL.
3083  *
3084  * @param dev
3085  *   Pointer to Ethernet device.
3086  * @flow
3087  *   Parent flow for wich copying is provided.
3088  *
3089  * @return
3090  *   0 on success, a negative errno value otherwise and rte_errno is set.
3091  */
3092 static int
3093 flow_mreg_start_copy_action(struct rte_eth_dev *dev,
3094                             struct rte_flow *flow)
3095 {
3096         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3097         int ret;
3098
3099         if (!mcp_res || flow->copy_applied)
3100                 return 0;
3101         if (!mcp_res->appcnt) {
3102                 ret = flow_drv_apply(dev, mcp_res->flow, NULL);
3103                 if (ret)
3104                         return ret;
3105         }
3106         ++mcp_res->appcnt;
3107         flow->copy_applied = 1;
3108         return 0;
3109 }
3110
3111 /**
3112  * Stop flow in RX_CP_TBL.
3113  *
3114  * @param dev
3115  *   Pointer to Ethernet device.
3116  * @flow
3117  *   Parent flow for wich copying is provided.
3118  */
3119 static void
3120 flow_mreg_stop_copy_action(struct rte_eth_dev *dev,
3121                            struct rte_flow *flow)
3122 {
3123         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3124
3125         if (!mcp_res || !flow->copy_applied)
3126                 return;
3127         MLX5_ASSERT(mcp_res->appcnt);
3128         --mcp_res->appcnt;
3129         flow->copy_applied = 0;
3130         if (!mcp_res->appcnt)
3131                 flow_drv_remove(dev, mcp_res->flow);
3132 }
3133
3134 /**
3135  * Remove the default copy action from RX_CP_TBL.
3136  *
3137  * @param dev
3138  *   Pointer to Ethernet device.
3139  */
3140 static void
3141 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3142 {
3143         struct mlx5_flow_mreg_copy_resource *mcp_res;
3144         struct mlx5_priv *priv = dev->data->dev_private;
3145
3146         /* Check if default flow is registered. */
3147         if (!priv->mreg_cp_tbl)
3148                 return;
3149         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl,
3150                                             MLX5_DEFAULT_COPY_ID);
3151         if (!mcp_res)
3152                 return;
3153         MLX5_ASSERT(mcp_res->flow);
3154         flow_list_destroy(dev, NULL, mcp_res->flow);
3155         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3156         rte_free(mcp_res);
3157 }
3158
3159 /**
3160  * Add the default copy action in in RX_CP_TBL.
3161  *
3162  * @param dev
3163  *   Pointer to Ethernet device.
3164  * @param[out] error
3165  *   Perform verbose error reporting if not NULL.
3166  *
3167  * @return
3168  *   0 for success, negative value otherwise and rte_errno is set.
3169  */
3170 static int
3171 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3172                                   struct rte_flow_error *error)
3173 {
3174         struct mlx5_priv *priv = dev->data->dev_private;
3175         struct mlx5_flow_mreg_copy_resource *mcp_res;
3176
3177         /* Check whether extensive metadata feature is engaged. */
3178         if (!priv->config.dv_flow_en ||
3179             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3180             !mlx5_flow_ext_mreg_supported(dev) ||
3181             !priv->sh->dv_regc0_mask)
3182                 return 0;
3183         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
3184         if (!mcp_res)
3185                 return -rte_errno;
3186         return 0;
3187 }
3188
3189 /**
3190  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3191  *
3192  * All the flow having Q/RSS action should be split by
3193  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3194  * performs the following,
3195  *   - CQE->flow_tag := reg_c[1] (MARK)
3196  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3197  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3198  * but there should be a flow per each MARK ID set by MARK action.
3199  *
3200  * For the aforementioned reason, if there's a MARK action in flow's action
3201  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3202  * the MARK ID to CQE's flow_tag like,
3203  *   - If reg_c[1] is mark_id,
3204  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3205  *
3206  * For SET_META action which stores value in reg_c[0], as the destination is
3207  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3208  * MARK ID means the default flow. The default flow looks like,
3209  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3210  *
3211  * @param dev
3212  *   Pointer to Ethernet device.
3213  * @param flow
3214  *   Pointer to flow structure.
3215  * @param[in] actions
3216  *   Pointer to the list of actions.
3217  * @param[out] error
3218  *   Perform verbose error reporting if not NULL.
3219  *
3220  * @return
3221  *   0 on success, negative value otherwise and rte_errno is set.
3222  */
3223 static int
3224 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3225                             struct rte_flow *flow,
3226                             const struct rte_flow_action *actions,
3227                             struct rte_flow_error *error)
3228 {
3229         struct mlx5_priv *priv = dev->data->dev_private;
3230         struct mlx5_dev_config *config = &priv->config;
3231         struct mlx5_flow_mreg_copy_resource *mcp_res;
3232         const struct rte_flow_action_mark *mark;
3233
3234         /* Check whether extensive metadata feature is engaged. */
3235         if (!config->dv_flow_en ||
3236             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3237             !mlx5_flow_ext_mreg_supported(dev) ||
3238             !priv->sh->dv_regc0_mask)
3239                 return 0;
3240         /* Find MARK action. */
3241         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3242                 switch (actions->type) {
3243                 case RTE_FLOW_ACTION_TYPE_FLAG:
3244                         mcp_res = flow_mreg_add_copy_action
3245                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
3246                         if (!mcp_res)
3247                                 return -rte_errno;
3248                         flow->mreg_copy = mcp_res;
3249                         if (dev->data->dev_started) {
3250                                 mcp_res->appcnt++;
3251                                 flow->copy_applied = 1;
3252                         }
3253                         return 0;
3254                 case RTE_FLOW_ACTION_TYPE_MARK:
3255                         mark = (const struct rte_flow_action_mark *)
3256                                 actions->conf;
3257                         mcp_res =
3258                                 flow_mreg_add_copy_action(dev, mark->id, error);
3259                         if (!mcp_res)
3260                                 return -rte_errno;
3261                         flow->mreg_copy = mcp_res;
3262                         if (dev->data->dev_started) {
3263                                 mcp_res->appcnt++;
3264                                 flow->copy_applied = 1;
3265                         }
3266                         return 0;
3267                 default:
3268                         break;
3269                 }
3270         }
3271         return 0;
3272 }
3273
3274 #define MLX5_MAX_SPLIT_ACTIONS 24
3275 #define MLX5_MAX_SPLIT_ITEMS 24
3276
3277 /**
3278  * Split the hairpin flow.
3279  * Since HW can't support encap on Rx we move the encap to Tx.
3280  * If the count action is after the encap then we also
3281  * move the count action. in this case the count will also measure
3282  * the outer bytes.
3283  *
3284  * @param dev
3285  *   Pointer to Ethernet device.
3286  * @param[in] actions
3287  *   Associated actions (list terminated by the END action).
3288  * @param[out] actions_rx
3289  *   Rx flow actions.
3290  * @param[out] actions_tx
3291  *   Tx flow actions..
3292  * @param[out] pattern_tx
3293  *   The pattern items for the Tx flow.
3294  * @param[out] flow_id
3295  *   The flow ID connected to this flow.
3296  *
3297  * @return
3298  *   0 on success.
3299  */
3300 static int
3301 flow_hairpin_split(struct rte_eth_dev *dev,
3302                    const struct rte_flow_action actions[],
3303                    struct rte_flow_action actions_rx[],
3304                    struct rte_flow_action actions_tx[],
3305                    struct rte_flow_item pattern_tx[],
3306                    uint32_t *flow_id)
3307 {
3308         struct mlx5_priv *priv = dev->data->dev_private;
3309         const struct rte_flow_action_raw_encap *raw_encap;
3310         const struct rte_flow_action_raw_decap *raw_decap;
3311         struct mlx5_rte_flow_action_set_tag *set_tag;
3312         struct rte_flow_action *tag_action;
3313         struct mlx5_rte_flow_item_tag *tag_item;
3314         struct rte_flow_item *item;
3315         char *addr;
3316         int encap = 0;
3317
3318         mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
3319         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3320                 switch (actions->type) {
3321                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3322                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3323                         rte_memcpy(actions_tx, actions,
3324                                sizeof(struct rte_flow_action));
3325                         actions_tx++;
3326                         break;
3327                 case RTE_FLOW_ACTION_TYPE_COUNT:
3328                         if (encap) {
3329                                 rte_memcpy(actions_tx, actions,
3330                                            sizeof(struct rte_flow_action));
3331                                 actions_tx++;
3332                         } else {
3333                                 rte_memcpy(actions_rx, actions,
3334                                            sizeof(struct rte_flow_action));
3335                                 actions_rx++;
3336                         }
3337                         break;
3338                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3339                         raw_encap = actions->conf;
3340                         if (raw_encap->size >
3341                             (sizeof(struct rte_flow_item_eth) +
3342                              sizeof(struct rte_flow_item_ipv4))) {
3343                                 memcpy(actions_tx, actions,
3344                                        sizeof(struct rte_flow_action));
3345                                 actions_tx++;
3346                                 encap = 1;
3347                         } else {
3348                                 rte_memcpy(actions_rx, actions,
3349                                            sizeof(struct rte_flow_action));
3350                                 actions_rx++;
3351                         }
3352                         break;
3353                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3354                         raw_decap = actions->conf;
3355                         if (raw_decap->size <
3356                             (sizeof(struct rte_flow_item_eth) +
3357                              sizeof(struct rte_flow_item_ipv4))) {
3358                                 memcpy(actions_tx, actions,
3359                                        sizeof(struct rte_flow_action));
3360                                 actions_tx++;
3361                         } else {
3362                                 rte_memcpy(actions_rx, actions,
3363                                            sizeof(struct rte_flow_action));
3364                                 actions_rx++;
3365                         }
3366                         break;
3367                 default:
3368                         rte_memcpy(actions_rx, actions,
3369                                    sizeof(struct rte_flow_action));
3370                         actions_rx++;
3371                         break;
3372                 }
3373         }
3374         /* Add set meta action and end action for the Rx flow. */
3375         tag_action = actions_rx;
3376         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3377         actions_rx++;
3378         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
3379         actions_rx++;
3380         set_tag = (void *)actions_rx;
3381         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
3382         MLX5_ASSERT(set_tag->id > REG_NONE);
3383         set_tag->data = *flow_id;
3384         tag_action->conf = set_tag;
3385         /* Create Tx item list. */
3386         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
3387         addr = (void *)&pattern_tx[2];
3388         item = pattern_tx;
3389         item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3390         tag_item = (void *)addr;
3391         tag_item->data = *flow_id;
3392         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
3393         MLX5_ASSERT(set_tag->id > REG_NONE);
3394         item->spec = tag_item;
3395         addr += sizeof(struct mlx5_rte_flow_item_tag);
3396         tag_item = (void *)addr;
3397         tag_item->data = UINT32_MAX;
3398         tag_item->id = UINT16_MAX;
3399         item->mask = tag_item;
3400         addr += sizeof(struct mlx5_rte_flow_item_tag);
3401         item->last = NULL;
3402         item++;
3403         item->type = RTE_FLOW_ITEM_TYPE_END;
3404         return 0;
3405 }
3406
3407 /**
3408  * The last stage of splitting chain, just creates the subflow
3409  * without any modification.
3410  *
3411  * @param dev
3412  *   Pointer to Ethernet device.
3413  * @param[in] flow
3414  *   Parent flow structure pointer.
3415  * @param[in, out] sub_flow
3416  *   Pointer to return the created subflow, may be NULL.
3417  * @param[in] prefix_layers
3418  *   Prefix subflow layers, may be 0.
3419  * @param[in] attr
3420  *   Flow rule attributes.
3421  * @param[in] items
3422  *   Pattern specification (list terminated by the END pattern item).
3423  * @param[in] actions
3424  *   Associated actions (list terminated by the END action).
3425  * @param[in] external
3426  *   This flow rule is created by request external to PMD.
3427  * @param[out] error
3428  *   Perform verbose error reporting if not NULL.
3429  * @return
3430  *   0 on success, negative value otherwise
3431  */
3432 static int
3433 flow_create_split_inner(struct rte_eth_dev *dev,
3434                         struct rte_flow *flow,
3435                         struct mlx5_flow **sub_flow,
3436                         uint64_t prefix_layers,
3437                         const struct rte_flow_attr *attr,
3438                         const struct rte_flow_item items[],
3439                         const struct rte_flow_action actions[],
3440                         bool external, struct rte_flow_error *error)
3441 {
3442         struct mlx5_flow *dev_flow;
3443
3444         dev_flow = flow_drv_prepare(flow, attr, items, actions, error);
3445         if (!dev_flow)
3446                 return -rte_errno;
3447         dev_flow->flow = flow;
3448         dev_flow->external = external;
3449         /* Subflow object was created, we must include one in the list. */
3450         LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
3451         /*
3452          * If dev_flow is as one of the suffix flow, some actions in suffix
3453          * flow may need some user defined item layer flags.
3454          */
3455         if (prefix_layers)
3456                 dev_flow->layers = prefix_layers;
3457         if (sub_flow)
3458                 *sub_flow = dev_flow;
3459         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
3460 }
3461
3462 /**
3463  * Split the meter flow.
3464  *
3465  * As meter flow will split to three sub flow, other than meter
3466  * action, the other actions make sense to only meter accepts
3467  * the packet. If it need to be dropped, no other additional
3468  * actions should be take.
3469  *
3470  * One kind of special action which decapsulates the L3 tunnel
3471  * header will be in the prefix sub flow, as not to take the
3472  * L3 tunnel header into account.
3473  *
3474  * @param dev
3475  *   Pointer to Ethernet device.
3476  * @param[in] items
3477  *   Pattern specification (list terminated by the END pattern item).
3478  * @param[out] sfx_items
3479  *   Suffix flow match items (list terminated by the END pattern item).
3480  * @param[in] actions
3481  *   Associated actions (list terminated by the END action).
3482  * @param[out] actions_sfx
3483  *   Suffix flow actions.
3484  * @param[out] actions_pre
3485  *   Prefix flow actions.
3486  * @param[out] pattern_sfx
3487  *   The pattern items for the suffix flow.
3488  * @param[out] tag_sfx
3489  *   Pointer to suffix flow tag.
3490  *
3491  * @return
3492  *   0 on success.
3493  */
3494 static int
3495 flow_meter_split_prep(struct rte_eth_dev *dev,
3496                  const struct rte_flow_item items[],
3497                  struct rte_flow_item sfx_items[],
3498                  const struct rte_flow_action actions[],
3499                  struct rte_flow_action actions_sfx[],
3500                  struct rte_flow_action actions_pre[])
3501 {
3502         struct rte_flow_action *tag_action = NULL;
3503         struct rte_flow_item *tag_item;
3504         struct mlx5_rte_flow_action_set_tag *set_tag;
3505         struct rte_flow_error error;
3506         const struct rte_flow_action_raw_encap *raw_encap;
3507         const struct rte_flow_action_raw_decap *raw_decap;
3508         struct mlx5_rte_flow_item_tag *tag_spec;
3509         struct mlx5_rte_flow_item_tag *tag_mask;
3510         uint32_t tag_id;
3511         bool copy_vlan = false;
3512
3513         /* Prepare the actions for prefix and suffix flow. */
3514         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3515                 struct rte_flow_action **action_cur = NULL;
3516
3517                 switch (actions->type) {
3518                 case RTE_FLOW_ACTION_TYPE_METER:
3519                         /* Add the extra tag action first. */
3520                         tag_action = actions_pre;
3521                         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3522                         actions_pre++;
3523                         action_cur = &actions_pre;
3524                         break;
3525                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3526                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3527                         action_cur = &actions_pre;
3528                         break;
3529                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3530                         raw_encap = actions->conf;
3531                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
3532                                 action_cur = &actions_pre;
3533                         break;
3534                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3535                         raw_decap = actions->conf;
3536                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3537                                 action_cur = &actions_pre;
3538                         break;
3539                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3540                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3541                         copy_vlan = true;
3542                         break;
3543                 default:
3544                         break;
3545                 }
3546                 if (!action_cur)
3547                         action_cur = &actions_sfx;
3548                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
3549                 (*action_cur)++;
3550         }
3551         /* Add end action to the actions. */
3552         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
3553         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
3554         actions_pre++;
3555         /* Set the tag. */
3556         set_tag = (void *)actions_pre;
3557         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3558         /*
3559          * Get the id from the qrss_pool to make qrss share the id with meter.
3560          */
3561         tag_id = flow_qrss_get_id(dev);
3562         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
3563         assert(tag_action);
3564         tag_action->conf = set_tag;
3565         /* Prepare the suffix subflow items. */
3566         tag_item = sfx_items++;
3567         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3568                 int item_type = items->type;
3569
3570                 switch (item_type) {
3571                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
3572                         memcpy(sfx_items, items, sizeof(*sfx_items));
3573                         sfx_items++;
3574                         break;
3575                 case RTE_FLOW_ITEM_TYPE_VLAN:
3576                         if (copy_vlan) {
3577                                 memcpy(sfx_items, items, sizeof(*sfx_items));
3578                                 /*
3579                                  * Convert to internal match item, it is used
3580                                  * for vlan push and set vid.
3581                                  */
3582                                 sfx_items->type = MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
3583                                 sfx_items++;
3584                         }
3585                         break;
3586                 default:
3587                         break;
3588                 }
3589         }
3590         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
3591         sfx_items++;
3592         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
3593         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
3594         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3595         tag_mask = tag_spec + 1;
3596         tag_mask->data = 0xffffff00;
3597         tag_item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3598         tag_item->spec = tag_spec;
3599         tag_item->last = NULL;
3600         tag_item->mask = tag_mask;
3601         return tag_id;
3602 }
3603
3604 /**
3605  * Split action list having QUEUE/RSS for metadata register copy.
3606  *
3607  * Once Q/RSS action is detected in user's action list, the flow action
3608  * should be split in order to copy metadata registers, which will happen in
3609  * RX_CP_TBL like,
3610  *   - CQE->flow_tag := reg_c[1] (MARK)
3611  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3612  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
3613  * This is because the last action of each flow must be a terminal action
3614  * (QUEUE, RSS or DROP).
3615  *
3616  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
3617  * stored and kept in the mlx5_flow structure per each sub_flow.
3618  *
3619  * The Q/RSS action is replaced with,
3620  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
3621  * And the following JUMP action is added at the end,
3622  *   - JUMP, to RX_CP_TBL.
3623  *
3624  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
3625  * flow_create_split_metadata() routine. The flow will look like,
3626  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
3627  *
3628  * @param dev
3629  *   Pointer to Ethernet device.
3630  * @param[out] split_actions
3631  *   Pointer to store split actions to jump to CP_TBL.
3632  * @param[in] actions
3633  *   Pointer to the list of original flow actions.
3634  * @param[in] qrss
3635  *   Pointer to the Q/RSS action.
3636  * @param[in] actions_n
3637  *   Number of original actions.
3638  * @param[out] error
3639  *   Perform verbose error reporting if not NULL.
3640  *
3641  * @return
3642  *   non-zero unique flow_id on success, otherwise 0 and
3643  *   error/rte_error are set.
3644  */
3645 static uint32_t
3646 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
3647                           struct rte_flow_action *split_actions,
3648                           const struct rte_flow_action *actions,
3649                           const struct rte_flow_action *qrss,
3650                           int actions_n, struct rte_flow_error *error)
3651 {
3652         struct mlx5_rte_flow_action_set_tag *set_tag;
3653         struct rte_flow_action_jump *jump;
3654         const int qrss_idx = qrss - actions;
3655         uint32_t flow_id = 0;
3656         int ret = 0;
3657
3658         /*
3659          * Given actions will be split
3660          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
3661          * - Add jump to mreg CP_TBL.
3662          * As a result, there will be one more action.
3663          */
3664         ++actions_n;
3665         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
3666         set_tag = (void *)(split_actions + actions_n);
3667         /*
3668          * If tag action is not set to void(it means we are not the meter
3669          * suffix flow), add the tag action. Since meter suffix flow already
3670          * has the tag added.
3671          */
3672         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
3673                 /*
3674                  * Allocate the new subflow ID. This one is unique within
3675                  * device and not shared with representors. Otherwise,
3676                  * we would have to resolve multi-thread access synch
3677                  * issue. Each flow on the shared device is appended
3678                  * with source vport identifier, so the resulting
3679                  * flows will be unique in the shared (by master and
3680                  * representors) domain even if they have coinciding
3681                  * IDs.
3682                  */
3683                 flow_id = flow_qrss_get_id(dev);
3684                 if (!flow_id)
3685                         return rte_flow_error_set(error, ENOMEM,
3686                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3687                                                   NULL, "can't allocate id "
3688                                                   "for split Q/RSS subflow");
3689                 /* Internal SET_TAG action to set flow ID. */
3690                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
3691                         .data = flow_id,
3692                 };
3693                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3694                 if (ret < 0)
3695                         return ret;
3696                 set_tag->id = ret;
3697                 /* Construct new actions array. */
3698                 /* Replace QUEUE/RSS action. */
3699                 split_actions[qrss_idx] = (struct rte_flow_action){
3700                         .type = MLX5_RTE_FLOW_ACTION_TYPE_TAG,
3701                         .conf = set_tag,
3702                 };
3703         }
3704         /* JUMP action to jump to mreg copy table (CP_TBL). */
3705         jump = (void *)(set_tag + 1);
3706         *jump = (struct rte_flow_action_jump){
3707                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3708         };
3709         split_actions[actions_n - 2] = (struct rte_flow_action){
3710                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3711                 .conf = jump,
3712         };
3713         split_actions[actions_n - 1] = (struct rte_flow_action){
3714                 .type = RTE_FLOW_ACTION_TYPE_END,
3715         };
3716         return flow_id;
3717 }
3718
3719 /**
3720  * Extend the given action list for Tx metadata copy.
3721  *
3722  * Copy the given action list to the ext_actions and add flow metadata register
3723  * copy action in order to copy reg_a set by WQE to reg_c[0].
3724  *
3725  * @param[out] ext_actions
3726  *   Pointer to the extended action list.
3727  * @param[in] actions
3728  *   Pointer to the list of actions.
3729  * @param[in] actions_n
3730  *   Number of actions in the list.
3731  * @param[out] error
3732  *   Perform verbose error reporting if not NULL.
3733  * @param[in] encap_idx
3734  *   The encap action inndex.
3735  *
3736  * @return
3737  *   0 on success, negative value otherwise
3738  */
3739 static int
3740 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
3741                        struct rte_flow_action *ext_actions,
3742                        const struct rte_flow_action *actions,
3743                        int actions_n, struct rte_flow_error *error,
3744                        int encap_idx)
3745 {
3746         struct mlx5_flow_action_copy_mreg *cp_mreg =
3747                 (struct mlx5_flow_action_copy_mreg *)
3748                         (ext_actions + actions_n + 1);
3749         int ret;
3750
3751         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3752         if (ret < 0)
3753                 return ret;
3754         cp_mreg->dst = ret;
3755         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
3756         if (ret < 0)
3757                 return ret;
3758         cp_mreg->src = ret;
3759         if (encap_idx != 0)
3760                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
3761         if (encap_idx == actions_n - 1) {
3762                 ext_actions[actions_n - 1] = (struct rte_flow_action){
3763                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3764                         .conf = cp_mreg,
3765                 };
3766                 ext_actions[actions_n] = (struct rte_flow_action){
3767                         .type = RTE_FLOW_ACTION_TYPE_END,
3768                 };
3769         } else {
3770                 ext_actions[encap_idx] = (struct rte_flow_action){
3771                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3772                         .conf = cp_mreg,
3773                 };
3774                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
3775                                 sizeof(*ext_actions) * (actions_n - encap_idx));
3776         }
3777         return 0;
3778 }
3779
3780 /**
3781  * The splitting for metadata feature.
3782  *
3783  * - Q/RSS action on NIC Rx should be split in order to pass by
3784  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
3785  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
3786  *
3787  * - All the actions on NIC Tx should have a mreg copy action to
3788  *   copy reg_a from WQE to reg_c[0].
3789  *
3790  * @param dev
3791  *   Pointer to Ethernet device.
3792  * @param[in] flow
3793  *   Parent flow structure pointer.
3794  * @param[in] prefix_layers
3795  *   Prefix flow layer flags.
3796  * @param[in] attr
3797  *   Flow rule attributes.
3798  * @param[in] items
3799  *   Pattern specification (list terminated by the END pattern item).
3800  * @param[in] actions
3801  *   Associated actions (list terminated by the END action).
3802  * @param[in] external
3803  *   This flow rule is created by request external to PMD.
3804  * @param[out] error
3805  *   Perform verbose error reporting if not NULL.
3806  * @return
3807  *   0 on success, negative value otherwise
3808  */
3809 static int
3810 flow_create_split_metadata(struct rte_eth_dev *dev,
3811                            struct rte_flow *flow,
3812                            uint64_t prefix_layers,
3813                            const struct rte_flow_attr *attr,
3814                            const struct rte_flow_item items[],
3815                            const struct rte_flow_action actions[],
3816                            bool external, struct rte_flow_error *error)
3817 {
3818         struct mlx5_priv *priv = dev->data->dev_private;
3819         struct mlx5_dev_config *config = &priv->config;
3820         const struct rte_flow_action *qrss = NULL;
3821         struct rte_flow_action *ext_actions = NULL;
3822         struct mlx5_flow *dev_flow = NULL;
3823         uint32_t qrss_id = 0;
3824         int mtr_sfx = 0;
3825         size_t act_size;
3826         int actions_n;
3827         int encap_idx;
3828         int ret;
3829
3830         /* Check whether extensive metadata feature is engaged. */
3831         if (!config->dv_flow_en ||
3832             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3833             !mlx5_flow_ext_mreg_supported(dev))
3834                 return flow_create_split_inner(dev, flow, NULL, prefix_layers,
3835                                                attr, items, actions, external,
3836                                                error);
3837         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
3838                                                            &encap_idx);
3839         if (qrss) {
3840                 /* Exclude hairpin flows from splitting. */
3841                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
3842                         const struct rte_flow_action_queue *queue;
3843
3844                         queue = qrss->conf;
3845                         if (mlx5_rxq_get_type(dev, queue->index) ==
3846                             MLX5_RXQ_TYPE_HAIRPIN)
3847                                 qrss = NULL;
3848                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
3849                         const struct rte_flow_action_rss *rss;
3850
3851                         rss = qrss->conf;
3852                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
3853                             MLX5_RXQ_TYPE_HAIRPIN)
3854                                 qrss = NULL;
3855                 }
3856         }
3857         if (qrss) {
3858                 /* Check if it is in meter suffix table. */
3859                 mtr_sfx = attr->group == (attr->transfer ?
3860                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
3861                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
3862                 /*
3863                  * Q/RSS action on NIC Rx should be split in order to pass by
3864                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
3865                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
3866                  */
3867                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3868                            sizeof(struct rte_flow_action_set_tag) +
3869                            sizeof(struct rte_flow_action_jump);
3870                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3871                 if (!ext_actions)
3872                         return rte_flow_error_set(error, ENOMEM,
3873                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3874                                                   NULL, "no memory to split "
3875                                                   "metadata flow");
3876                 /*
3877                  * If we are the suffix flow of meter, tag already exist.
3878                  * Set the tag action to void.
3879                  */
3880                 if (mtr_sfx)
3881                         ext_actions[qrss - actions].type =
3882                                                 RTE_FLOW_ACTION_TYPE_VOID;
3883                 else
3884                         ext_actions[qrss - actions].type =
3885                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3886                 /*
3887                  * Create the new actions list with removed Q/RSS action
3888                  * and appended set tag and jump to register copy table
3889                  * (RX_CP_TBL). We should preallocate unique tag ID here
3890                  * in advance, because it is needed for set tag action.
3891                  */
3892                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
3893                                                     qrss, actions_n, error);
3894                 if (!mtr_sfx && !qrss_id) {
3895                         ret = -rte_errno;
3896                         goto exit;
3897                 }
3898         } else if (attr->egress && !attr->transfer) {
3899                 /*
3900                  * All the actions on NIC Tx should have a metadata register
3901                  * copy action to copy reg_a from WQE to reg_c[meta]
3902                  */
3903                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3904                            sizeof(struct mlx5_flow_action_copy_mreg);
3905                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3906                 if (!ext_actions)
3907                         return rte_flow_error_set(error, ENOMEM,
3908                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3909                                                   NULL, "no memory to split "
3910                                                   "metadata flow");
3911                 /* Create the action list appended with copy register. */
3912                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
3913                                              actions_n, error, encap_idx);
3914                 if (ret < 0)
3915                         goto exit;
3916         }
3917         /* Add the unmodified original or prefix subflow. */
3918         ret = flow_create_split_inner(dev, flow, &dev_flow, prefix_layers, attr,
3919                                       items, ext_actions ? ext_actions :
3920                                       actions, external, error);
3921         if (ret < 0)
3922                 goto exit;
3923         MLX5_ASSERT(dev_flow);
3924         if (qrss) {
3925                 const struct rte_flow_attr q_attr = {
3926                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3927                         .ingress = 1,
3928                 };
3929                 /* Internal PMD action to set register. */
3930                 struct mlx5_rte_flow_item_tag q_tag_spec = {
3931                         .data = qrss_id,
3932                         .id = 0,
3933                 };
3934                 struct rte_flow_item q_items[] = {
3935                         {
3936                                 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3937                                 .spec = &q_tag_spec,
3938                                 .last = NULL,
3939                                 .mask = NULL,
3940                         },
3941                         {
3942                                 .type = RTE_FLOW_ITEM_TYPE_END,
3943                         },
3944                 };
3945                 struct rte_flow_action q_actions[] = {
3946                         {
3947                                 .type = qrss->type,
3948                                 .conf = qrss->conf,
3949                         },
3950                         {
3951                                 .type = RTE_FLOW_ACTION_TYPE_END,
3952                         },
3953                 };
3954                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
3955
3956                 /*
3957                  * Configure the tag item only if there is no meter subflow.
3958                  * Since tag is already marked in the meter suffix subflow
3959                  * we can just use the meter suffix items as is.
3960                  */
3961                 if (qrss_id) {
3962                         /* Not meter subflow. */
3963                         MLX5_ASSERT(!mtr_sfx);
3964                         /*
3965                          * Put unique id in prefix flow due to it is destroyed
3966                          * after suffix flow and id will be freed after there
3967                          * is no actual flows with this id and identifier
3968                          * reallocation becomes possible (for example, for
3969                          * other flows in other threads).
3970                          */
3971                         dev_flow->qrss_id = qrss_id;
3972                         qrss_id = 0;
3973                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
3974                                                    error);
3975                         if (ret < 0)
3976                                 goto exit;
3977                         q_tag_spec.id = ret;
3978                 }
3979                 dev_flow = NULL;
3980                 /* Add suffix subflow to execute Q/RSS. */
3981                 ret = flow_create_split_inner(dev, flow, &dev_flow, layers,
3982                                               &q_attr, mtr_sfx ? items :
3983                                               q_items, q_actions,
3984                                               external, error);
3985                 if (ret < 0)
3986                         goto exit;
3987                 MLX5_ASSERT(dev_flow);
3988         }
3989
3990 exit:
3991         /*
3992          * We do not destroy the partially created sub_flows in case of error.
3993          * These ones are included into parent flow list and will be destroyed
3994          * by flow_drv_destroy.
3995          */
3996         flow_qrss_free_id(dev, qrss_id);
3997         rte_free(ext_actions);
3998         return ret;
3999 }
4000
4001 /**
4002  * The splitting for meter feature.
4003  *
4004  * - The meter flow will be split to two flows as prefix and
4005  *   suffix flow. The packets make sense only it pass the prefix
4006  *   meter action.
4007  *
4008  * - Reg_C_5 is used for the packet to match betweend prefix and
4009  *   suffix flow.
4010  *
4011  * @param dev
4012  *   Pointer to Ethernet device.
4013  * @param[in] flow
4014  *   Parent flow structure pointer.
4015  * @param[in] attr
4016  *   Flow rule attributes.
4017  * @param[in] items
4018  *   Pattern specification (list terminated by the END pattern item).
4019  * @param[in] actions
4020  *   Associated actions (list terminated by the END action).
4021  * @param[in] external
4022  *   This flow rule is created by request external to PMD.
4023  * @param[out] error
4024  *   Perform verbose error reporting if not NULL.
4025  * @return
4026  *   0 on success, negative value otherwise
4027  */
4028 static int
4029 flow_create_split_meter(struct rte_eth_dev *dev,
4030                            struct rte_flow *flow,
4031                            const struct rte_flow_attr *attr,
4032                            const struct rte_flow_item items[],
4033                            const struct rte_flow_action actions[],
4034                            bool external, struct rte_flow_error *error)
4035 {
4036         struct mlx5_priv *priv = dev->data->dev_private;
4037         struct rte_flow_action *sfx_actions = NULL;
4038         struct rte_flow_action *pre_actions = NULL;
4039         struct rte_flow_item *sfx_items = NULL;
4040         struct mlx5_flow *dev_flow = NULL;
4041         struct rte_flow_attr sfx_attr = *attr;
4042         uint32_t mtr = 0;
4043         uint32_t mtr_tag_id = 0;
4044         size_t act_size;
4045         size_t item_size;
4046         int actions_n = 0;
4047         int ret;
4048
4049         if (priv->mtr_en)
4050                 actions_n = flow_check_meter_action(actions, &mtr);
4051         if (mtr) {
4052                 /* The five prefix actions: meter, decap, encap, tag, end. */
4053                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
4054                            sizeof(struct mlx5_rte_flow_action_set_tag);
4055                 /* tag, vlan, port id, end. */
4056 #define METER_SUFFIX_ITEM 4
4057                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
4058                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
4059                 sfx_actions = rte_zmalloc(__func__, (act_size + item_size), 0);
4060                 if (!sfx_actions)
4061                         return rte_flow_error_set(error, ENOMEM,
4062                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4063                                                   NULL, "no memory to split "
4064                                                   "meter flow");
4065                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
4066                              act_size);
4067                 pre_actions = sfx_actions + actions_n;
4068                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
4069                                                    actions, sfx_actions,
4070                                                    pre_actions);
4071                 if (!mtr_tag_id) {
4072                         ret = -rte_errno;
4073                         goto exit;
4074                 }
4075                 /* Add the prefix subflow. */
4076                 ret = flow_create_split_inner(dev, flow, &dev_flow, 0, attr,
4077                                               items, pre_actions, external,
4078                                               error);
4079                 if (ret) {
4080                         ret = -rte_errno;
4081                         goto exit;
4082                 }
4083                 dev_flow->mtr_flow_id = mtr_tag_id;
4084                 /* Setting the sfx group atrr. */
4085                 sfx_attr.group = sfx_attr.transfer ?
4086                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4087                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
4088         }
4089         /* Add the prefix subflow. */
4090         ret = flow_create_split_metadata(dev, flow, dev_flow ?
4091                                          flow_get_prefix_layer_flags(dev_flow) :
4092                                          0, &sfx_attr,
4093                                          sfx_items ? sfx_items : items,
4094                                          sfx_actions ? sfx_actions : actions,
4095                                          external, error);
4096 exit:
4097         if (sfx_actions)
4098                 rte_free(sfx_actions);
4099         return ret;
4100 }
4101
4102 /**
4103  * Split the flow to subflow set. The splitters might be linked
4104  * in the chain, like this:
4105  * flow_create_split_outer() calls:
4106  *   flow_create_split_meter() calls:
4107  *     flow_create_split_metadata(meter_subflow_0) calls:
4108  *       flow_create_split_inner(metadata_subflow_0)
4109  *       flow_create_split_inner(metadata_subflow_1)
4110  *       flow_create_split_inner(metadata_subflow_2)
4111  *     flow_create_split_metadata(meter_subflow_1) calls:
4112  *       flow_create_split_inner(metadata_subflow_0)
4113  *       flow_create_split_inner(metadata_subflow_1)
4114  *       flow_create_split_inner(metadata_subflow_2)
4115  *
4116  * This provide flexible way to add new levels of flow splitting.
4117  * The all of successfully created subflows are included to the
4118  * parent flow dev_flow list.
4119  *
4120  * @param dev
4121  *   Pointer to Ethernet device.
4122  * @param[in] flow
4123  *   Parent flow structure pointer.
4124  * @param[in] attr
4125  *   Flow rule attributes.
4126  * @param[in] items
4127  *   Pattern specification (list terminated by the END pattern item).
4128  * @param[in] actions
4129  *   Associated actions (list terminated by the END action).
4130  * @param[in] external
4131  *   This flow rule is created by request external to PMD.
4132  * @param[out] error
4133  *   Perform verbose error reporting if not NULL.
4134  * @return
4135  *   0 on success, negative value otherwise
4136  */
4137 static int
4138 flow_create_split_outer(struct rte_eth_dev *dev,
4139                         struct rte_flow *flow,
4140                         const struct rte_flow_attr *attr,
4141                         const struct rte_flow_item items[],
4142                         const struct rte_flow_action actions[],
4143                         bool external, struct rte_flow_error *error)
4144 {
4145         int ret;
4146
4147         ret = flow_create_split_meter(dev, flow, attr, items,
4148                                          actions, external, error);
4149         MLX5_ASSERT(ret <= 0);
4150         return ret;
4151 }
4152
4153 /**
4154  * Create a flow and add it to @p list.
4155  *
4156  * @param dev
4157  *   Pointer to Ethernet device.
4158  * @param list
4159  *   Pointer to a TAILQ flow list. If this parameter NULL,
4160  *   no list insertion occurred, flow is just created,
4161  *   this is caller's responsibility to track the
4162  *   created flow.
4163  * @param[in] attr
4164  *   Flow rule attributes.
4165  * @param[in] items
4166  *   Pattern specification (list terminated by the END pattern item).
4167  * @param[in] actions
4168  *   Associated actions (list terminated by the END action).
4169  * @param[in] external
4170  *   This flow rule is created by request external to PMD.
4171  * @param[out] error
4172  *   Perform verbose error reporting if not NULL.
4173  *
4174  * @return
4175  *   A flow on success, NULL otherwise and rte_errno is set.
4176  */
4177 static struct rte_flow *
4178 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
4179                  const struct rte_flow_attr *attr,
4180                  const struct rte_flow_item items[],
4181                  const struct rte_flow_action actions[],
4182                  bool external, struct rte_flow_error *error)
4183 {
4184         struct mlx5_priv *priv = dev->data->dev_private;
4185         struct rte_flow *flow = NULL;
4186         struct mlx5_flow *dev_flow;
4187         const struct rte_flow_action_rss *rss;
4188         union {
4189                 struct rte_flow_expand_rss buf;
4190                 uint8_t buffer[2048];
4191         } expand_buffer;
4192         union {
4193                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4194                 uint8_t buffer[2048];
4195         } actions_rx;
4196         union {
4197                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4198                 uint8_t buffer[2048];
4199         } actions_hairpin_tx;
4200         union {
4201                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
4202                 uint8_t buffer[2048];
4203         } items_tx;
4204         struct rte_flow_expand_rss *buf = &expand_buffer.buf;
4205         const struct rte_flow_action *p_actions_rx = actions;
4206         uint32_t i;
4207         uint32_t flow_size;
4208         int hairpin_flow = 0;
4209         uint32_t hairpin_id = 0;
4210         struct rte_flow_attr attr_tx = { .priority = 0 };
4211         int ret = flow_drv_validate(dev, attr, items, p_actions_rx, external,
4212                                     error);
4213
4214         if (ret < 0)
4215                 return NULL;
4216         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
4217         if (hairpin_flow > 0) {
4218                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
4219                         rte_errno = EINVAL;
4220                         return NULL;
4221                 }
4222                 flow_hairpin_split(dev, actions, actions_rx.actions,
4223                                    actions_hairpin_tx.actions, items_tx.items,
4224                                    &hairpin_id);
4225                 p_actions_rx = actions_rx.actions;
4226         }
4227         flow_size = sizeof(struct rte_flow);
4228         rss = flow_get_rss_action(p_actions_rx);
4229         if (rss)
4230                 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
4231                                             sizeof(void *));
4232         else
4233                 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
4234         flow = rte_calloc(__func__, 1, flow_size, 0);
4235         if (!flow) {
4236                 rte_errno = ENOMEM;
4237                 goto error_before_flow;
4238         }
4239         flow->drv_type = flow_get_drv_type(dev, attr);
4240         if (hairpin_id != 0)
4241                 flow->hairpin_flow_id = hairpin_id;
4242         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
4243                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
4244         flow->rss.queue = (void *)(flow + 1);
4245         if (rss) {
4246                 /*
4247                  * The following information is required by
4248                  * mlx5_flow_hashfields_adjust() in advance.
4249                  */
4250                 flow->rss.level = rss->level;
4251                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
4252                 flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
4253         }
4254         LIST_INIT(&flow->dev_flows);
4255         if (rss && rss->types) {
4256                 unsigned int graph_root;
4257
4258                 graph_root = find_graph_root(items, rss->level);
4259                 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
4260                                           items, rss->types,
4261                                           mlx5_support_expansion,
4262                                           graph_root);
4263                 MLX5_ASSERT(ret > 0 &&
4264                        (unsigned int)ret < sizeof(expand_buffer.buffer));
4265         } else {
4266                 buf->entries = 1;
4267                 buf->entry[0].pattern = (void *)(uintptr_t)items;
4268         }
4269         for (i = 0; i < buf->entries; ++i) {
4270                 /*
4271                  * The splitter may create multiple dev_flows,
4272                  * depending on configuration. In the simplest
4273                  * case it just creates unmodified original flow.
4274                  */
4275                 ret = flow_create_split_outer(dev, flow, attr,
4276                                               buf->entry[i].pattern,
4277                                               p_actions_rx, external,
4278                                               error);
4279                 if (ret < 0)
4280                         goto error;
4281         }
4282         /* Create the tx flow. */
4283         if (hairpin_flow) {
4284                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
4285                 attr_tx.ingress = 0;
4286                 attr_tx.egress = 1;
4287                 dev_flow = flow_drv_prepare(flow, &attr_tx, items_tx.items,
4288                                             actions_hairpin_tx.actions, error);
4289                 if (!dev_flow)
4290                         goto error;
4291                 dev_flow->flow = flow;
4292                 dev_flow->external = 0;
4293                 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
4294                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
4295                                          items_tx.items,
4296                                          actions_hairpin_tx.actions, error);
4297                 if (ret < 0)
4298                         goto error;
4299         }
4300         /*
4301          * Update the metadata register copy table. If extensive
4302          * metadata feature is enabled and registers are supported
4303          * we might create the extra rte_flow for each unique
4304          * MARK/FLAG action ID.
4305          *
4306          * The table is updated for ingress Flows only, because
4307          * the egress Flows belong to the different device and
4308          * copy table should be updated in peer NIC Rx domain.
4309          */
4310         if (attr->ingress &&
4311             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
4312                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
4313                 if (ret)
4314                         goto error;
4315         }
4316         if (dev->data->dev_started) {
4317                 ret = flow_drv_apply(dev, flow, error);
4318                 if (ret < 0)
4319                         goto error;
4320         }
4321         if (list)
4322                 TAILQ_INSERT_TAIL(list, flow, next);
4323         flow_rxq_flags_set(dev, flow);
4324         return flow;
4325 error_before_flow:
4326         if (hairpin_id)
4327                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4328                                      hairpin_id);
4329         return NULL;
4330 error:
4331         MLX5_ASSERT(flow);
4332         flow_mreg_del_copy_action(dev, flow);
4333         ret = rte_errno; /* Save rte_errno before cleanup. */
4334         if (flow->hairpin_flow_id)
4335                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4336                                      flow->hairpin_flow_id);
4337         MLX5_ASSERT(flow);
4338         flow_drv_destroy(dev, flow);
4339         rte_free(flow);
4340         rte_errno = ret; /* Restore rte_errno. */
4341         return NULL;
4342 }
4343
4344 /**
4345  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
4346  * incoming packets to table 1.
4347  *
4348  * Other flow rules, requested for group n, will be created in
4349  * e-switch table n+1.
4350  * Jump action to e-switch group n will be created to group n+1.
4351  *
4352  * Used when working in switchdev mode, to utilise advantages of table 1
4353  * and above.
4354  *
4355  * @param dev
4356  *   Pointer to Ethernet device.
4357  *
4358  * @return
4359  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
4360  */
4361 struct rte_flow *
4362 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
4363 {
4364         const struct rte_flow_attr attr = {
4365                 .group = 0,
4366                 .priority = 0,
4367                 .ingress = 1,
4368                 .egress = 0,
4369                 .transfer = 1,
4370         };
4371         const struct rte_flow_item pattern = {
4372                 .type = RTE_FLOW_ITEM_TYPE_END,
4373         };
4374         struct rte_flow_action_jump jump = {
4375                 .group = 1,
4376         };
4377         const struct rte_flow_action actions[] = {
4378                 {
4379                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4380                         .conf = &jump,
4381                 },
4382                 {
4383                         .type = RTE_FLOW_ACTION_TYPE_END,
4384                 },
4385         };
4386         struct mlx5_priv *priv = dev->data->dev_private;
4387         struct rte_flow_error error;
4388
4389         return flow_list_create(dev, &priv->ctrl_flows, &attr, &pattern,
4390                                 actions, false, &error);
4391 }
4392
4393 /**
4394  * Create a flow.
4395  *
4396  * @see rte_flow_create()
4397  * @see rte_flow_ops
4398  */
4399 struct rte_flow *
4400 mlx5_flow_create(struct rte_eth_dev *dev,
4401                  const struct rte_flow_attr *attr,
4402                  const struct rte_flow_item items[],
4403                  const struct rte_flow_action actions[],
4404                  struct rte_flow_error *error)
4405 {
4406         struct mlx5_priv *priv = dev->data->dev_private;
4407
4408         return flow_list_create(dev, &priv->flows,
4409                                 attr, items, actions, true, error);
4410 }
4411
4412 /**
4413  * Destroy a flow in a list.
4414  *
4415  * @param dev
4416  *   Pointer to Ethernet device.
4417  * @param list
4418  *   Pointer to a TAILQ flow list. If this parameter NULL,
4419  *   there is no flow removal from the list.
4420  * @param[in] flow
4421  *   Flow to destroy.
4422  */
4423 static void
4424 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
4425                   struct rte_flow *flow)
4426 {
4427         struct mlx5_priv *priv = dev->data->dev_private;
4428
4429         /*
4430          * Update RX queue flags only if port is started, otherwise it is
4431          * already clean.
4432          */
4433         if (dev->data->dev_started)
4434                 flow_rxq_flags_trim(dev, flow);
4435         if (flow->hairpin_flow_id)
4436                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4437                                      flow->hairpin_flow_id);
4438         flow_drv_destroy(dev, flow);
4439         if (list)
4440                 TAILQ_REMOVE(list, flow, next);
4441         flow_mreg_del_copy_action(dev, flow);
4442         rte_free(flow->fdir);
4443         rte_free(flow);
4444 }
4445
4446 /**
4447  * Destroy all flows.
4448  *
4449  * @param dev
4450  *   Pointer to Ethernet device.
4451  * @param list
4452  *   Pointer to a TAILQ flow list.
4453  * @param active
4454  *   If flushing is called avtively.
4455  */
4456 void
4457 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list,
4458                      bool active)
4459 {
4460         uint32_t num_flushed = 0;
4461
4462         while (!TAILQ_EMPTY(list)) {
4463                 struct rte_flow *flow;
4464
4465                 flow = TAILQ_FIRST(list);
4466                 flow_list_destroy(dev, list, flow);
4467                 num_flushed++;
4468         }
4469         if (active) {
4470                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
4471                         dev->data->port_id, num_flushed);
4472         }
4473 }
4474
4475 /**
4476  * Remove all flows.
4477  *
4478  * @param dev
4479  *   Pointer to Ethernet device.
4480  * @param list
4481  *   Pointer to a TAILQ flow list.
4482  */
4483 void
4484 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
4485 {
4486         struct rte_flow *flow;
4487
4488         TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) {
4489                 flow_drv_remove(dev, flow);
4490                 flow_mreg_stop_copy_action(dev, flow);
4491         }
4492         flow_mreg_del_default_copy_action(dev);
4493         flow_rxq_flags_clear(dev);
4494 }
4495
4496 /**
4497  * Add all flows.
4498  *
4499  * @param dev
4500  *   Pointer to Ethernet device.
4501  * @param list
4502  *   Pointer to a TAILQ flow list.
4503  *
4504  * @return
4505  *   0 on success, a negative errno value otherwise and rte_errno is set.
4506  */
4507 int
4508 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
4509 {
4510         struct rte_flow *flow;
4511         struct rte_flow_error error;
4512         int ret = 0;
4513
4514         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4515         ret = flow_mreg_add_default_copy_action(dev, &error);
4516         if (ret < 0)
4517                 return -rte_errno;
4518         /* Apply Flows created by application. */
4519         TAILQ_FOREACH(flow, list, next) {
4520                 ret = flow_mreg_start_copy_action(dev, flow);
4521                 if (ret < 0)
4522                         goto error;
4523                 ret = flow_drv_apply(dev, flow, &error);
4524                 if (ret < 0)
4525                         goto error;
4526                 flow_rxq_flags_set(dev, flow);
4527         }
4528         return 0;
4529 error:
4530         ret = rte_errno; /* Save rte_errno before cleanup. */
4531         mlx5_flow_stop(dev, list);
4532         rte_errno = ret; /* Restore rte_errno. */
4533         return -rte_errno;
4534 }
4535
4536 /**
4537  * Stop all default actions for flows.
4538  *
4539  * @param dev
4540  *   Pointer to Ethernet device.
4541  * @param list
4542  *   Pointer to a TAILQ flow list.
4543  */
4544 void
4545 mlx5_flow_stop_default(struct rte_eth_dev *dev)
4546 {
4547         flow_mreg_del_default_copy_action(dev);
4548 }
4549
4550 /**
4551  * Start all default actions for flows.
4552  *
4553  * @param dev
4554  *   Pointer to Ethernet device.
4555  * @return
4556  *   0 on success, a negative errno value otherwise and rte_errno is set.
4557  */
4558 int
4559 mlx5_flow_start_default(struct rte_eth_dev *dev)
4560 {
4561         struct rte_flow_error error;
4562
4563         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4564         return flow_mreg_add_default_copy_action(dev, &error);
4565 }
4566
4567 /**
4568  * Verify the flow list is empty
4569  *
4570  * @param dev
4571  *  Pointer to Ethernet device.
4572  *
4573  * @return the number of flows not released.
4574  */
4575 int
4576 mlx5_flow_verify(struct rte_eth_dev *dev)
4577 {
4578         struct mlx5_priv *priv = dev->data->dev_private;
4579         struct rte_flow *flow;
4580         int ret = 0;
4581
4582         TAILQ_FOREACH(flow, &priv->flows, next) {
4583                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
4584                         dev->data->port_id, (void *)flow);
4585                 ++ret;
4586         }
4587         return ret;
4588 }
4589
4590 /**
4591  * Enable default hairpin egress flow.
4592  *
4593  * @param dev
4594  *   Pointer to Ethernet device.
4595  * @param queue
4596  *   The queue index.
4597  *
4598  * @return
4599  *   0 on success, a negative errno value otherwise and rte_errno is set.
4600  */
4601 int
4602 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
4603                             uint32_t queue)
4604 {
4605         struct mlx5_priv *priv = dev->data->dev_private;
4606         const struct rte_flow_attr attr = {
4607                 .egress = 1,
4608                 .priority = 0,
4609         };
4610         struct mlx5_rte_flow_item_tx_queue queue_spec = {
4611                 .queue = queue,
4612         };
4613         struct mlx5_rte_flow_item_tx_queue queue_mask = {
4614                 .queue = UINT32_MAX,
4615         };
4616         struct rte_flow_item items[] = {
4617                 {
4618                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
4619                         .spec = &queue_spec,
4620                         .last = NULL,
4621                         .mask = &queue_mask,
4622                 },
4623                 {
4624                         .type = RTE_FLOW_ITEM_TYPE_END,
4625                 },
4626         };
4627         struct rte_flow_action_jump jump = {
4628                 .group = MLX5_HAIRPIN_TX_TABLE,
4629         };
4630         struct rte_flow_action actions[2];
4631         struct rte_flow *flow;
4632         struct rte_flow_error error;
4633
4634         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
4635         actions[0].conf = &jump;
4636         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
4637         flow = flow_list_create(dev, &priv->ctrl_flows,
4638                                 &attr, items, actions, false, &error);
4639         if (!flow) {
4640                 DRV_LOG(DEBUG,
4641                         "Failed to create ctrl flow: rte_errno(%d),"
4642                         " type(%d), message(%s)",
4643                         rte_errno, error.type,
4644                         error.message ? error.message : " (no stated reason)");
4645                 return -rte_errno;
4646         }
4647         return 0;
4648 }
4649
4650 /**
4651  * Enable a control flow configured from the control plane.
4652  *
4653  * @param dev
4654  *   Pointer to Ethernet device.
4655  * @param eth_spec
4656  *   An Ethernet flow spec to apply.
4657  * @param eth_mask
4658  *   An Ethernet flow mask to apply.
4659  * @param vlan_spec
4660  *   A VLAN flow spec to apply.
4661  * @param vlan_mask
4662  *   A VLAN flow mask to apply.
4663  *
4664  * @return
4665  *   0 on success, a negative errno value otherwise and rte_errno is set.
4666  */
4667 int
4668 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
4669                     struct rte_flow_item_eth *eth_spec,
4670                     struct rte_flow_item_eth *eth_mask,
4671                     struct rte_flow_item_vlan *vlan_spec,
4672                     struct rte_flow_item_vlan *vlan_mask)
4673 {
4674         struct mlx5_priv *priv = dev->data->dev_private;
4675         const struct rte_flow_attr attr = {
4676                 .ingress = 1,
4677                 .priority = MLX5_FLOW_PRIO_RSVD,
4678         };
4679         struct rte_flow_item items[] = {
4680                 {
4681                         .type = RTE_FLOW_ITEM_TYPE_ETH,
4682                         .spec = eth_spec,
4683                         .last = NULL,
4684                         .mask = eth_mask,
4685                 },
4686                 {
4687                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
4688                                               RTE_FLOW_ITEM_TYPE_END,
4689                         .spec = vlan_spec,
4690                         .last = NULL,
4691                         .mask = vlan_mask,
4692                 },
4693                 {
4694                         .type = RTE_FLOW_ITEM_TYPE_END,
4695                 },
4696         };
4697         uint16_t queue[priv->reta_idx_n];
4698         struct rte_flow_action_rss action_rss = {
4699                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4700                 .level = 0,
4701                 .types = priv->rss_conf.rss_hf,
4702                 .key_len = priv->rss_conf.rss_key_len,
4703                 .queue_num = priv->reta_idx_n,
4704                 .key = priv->rss_conf.rss_key,
4705                 .queue = queue,
4706         };
4707         struct rte_flow_action actions[] = {
4708                 {
4709                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4710                         .conf = &action_rss,
4711                 },
4712                 {
4713                         .type = RTE_FLOW_ACTION_TYPE_END,
4714                 },
4715         };
4716         struct rte_flow *flow;
4717         struct rte_flow_error error;
4718         unsigned int i;
4719
4720         if (!priv->reta_idx_n || !priv->rxqs_n) {
4721                 return 0;
4722         }
4723         for (i = 0; i != priv->reta_idx_n; ++i)
4724                 queue[i] = (*priv->reta_idx)[i];
4725         flow = flow_list_create(dev, &priv->ctrl_flows,
4726                                 &attr, items, actions, false, &error);
4727         if (!flow)
4728                 return -rte_errno;
4729         return 0;
4730 }
4731
4732 /**
4733  * Enable a flow control configured from the control plane.
4734  *
4735  * @param dev
4736  *   Pointer to Ethernet device.
4737  * @param eth_spec
4738  *   An Ethernet flow spec to apply.
4739  * @param eth_mask
4740  *   An Ethernet flow mask to apply.
4741  *
4742  * @return
4743  *   0 on success, a negative errno value otherwise and rte_errno is set.
4744  */
4745 int
4746 mlx5_ctrl_flow(struct rte_eth_dev *dev,
4747                struct rte_flow_item_eth *eth_spec,
4748                struct rte_flow_item_eth *eth_mask)
4749 {
4750         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
4751 }
4752
4753 /**
4754  * Destroy a flow.
4755  *
4756  * @see rte_flow_destroy()
4757  * @see rte_flow_ops
4758  */
4759 int
4760 mlx5_flow_destroy(struct rte_eth_dev *dev,
4761                   struct rte_flow *flow,
4762                   struct rte_flow_error *error __rte_unused)
4763 {
4764         struct mlx5_priv *priv = dev->data->dev_private;
4765
4766         flow_list_destroy(dev, &priv->flows, flow);
4767         return 0;
4768 }
4769
4770 /**
4771  * Destroy all flows.
4772  *
4773  * @see rte_flow_flush()
4774  * @see rte_flow_ops
4775  */
4776 int
4777 mlx5_flow_flush(struct rte_eth_dev *dev,
4778                 struct rte_flow_error *error __rte_unused)
4779 {
4780         struct mlx5_priv *priv = dev->data->dev_private;
4781
4782         mlx5_flow_list_flush(dev, &priv->flows, false);
4783         return 0;
4784 }
4785
4786 /**
4787  * Isolated mode.
4788  *
4789  * @see rte_flow_isolate()
4790  * @see rte_flow_ops
4791  */
4792 int
4793 mlx5_flow_isolate(struct rte_eth_dev *dev,
4794                   int enable,
4795                   struct rte_flow_error *error)
4796 {
4797         struct mlx5_priv *priv = dev->data->dev_private;
4798
4799         if (dev->data->dev_started) {
4800                 rte_flow_error_set(error, EBUSY,
4801                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4802                                    NULL,
4803                                    "port must be stopped first");
4804                 return -rte_errno;
4805         }
4806         priv->isolated = !!enable;
4807         if (enable)
4808                 dev->dev_ops = &mlx5_dev_ops_isolate;
4809         else
4810                 dev->dev_ops = &mlx5_dev_ops;
4811         return 0;
4812 }
4813
4814 /**
4815  * Query a flow.
4816  *
4817  * @see rte_flow_query()
4818  * @see rte_flow_ops
4819  */
4820 static int
4821 flow_drv_query(struct rte_eth_dev *dev,
4822                struct rte_flow *flow,
4823                const struct rte_flow_action *actions,
4824                void *data,
4825                struct rte_flow_error *error)
4826 {
4827         const struct mlx5_flow_driver_ops *fops;
4828         enum mlx5_flow_drv_type ftype = flow->drv_type;
4829
4830         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
4831         fops = flow_get_drv_ops(ftype);
4832
4833         return fops->query(dev, flow, actions, data, error);
4834 }
4835
4836 /**
4837  * Query a flow.
4838  *
4839  * @see rte_flow_query()
4840  * @see rte_flow_ops
4841  */
4842 int
4843 mlx5_flow_query(struct rte_eth_dev *dev,
4844                 struct rte_flow *flow,
4845                 const struct rte_flow_action *actions,
4846                 void *data,
4847                 struct rte_flow_error *error)
4848 {
4849         int ret;
4850
4851         ret = flow_drv_query(dev, flow, actions, data, error);
4852         if (ret < 0)
4853                 return ret;
4854         return 0;
4855 }
4856
4857 /**
4858  * Convert a flow director filter to a generic flow.
4859  *
4860  * @param dev
4861  *   Pointer to Ethernet device.
4862  * @param fdir_filter
4863  *   Flow director filter to add.
4864  * @param attributes
4865  *   Generic flow parameters structure.
4866  *
4867  * @return
4868  *   0 on success, a negative errno value otherwise and rte_errno is set.
4869  */
4870 static int
4871 flow_fdir_filter_convert(struct rte_eth_dev *dev,
4872                          const struct rte_eth_fdir_filter *fdir_filter,
4873                          struct mlx5_fdir *attributes)
4874 {
4875         struct mlx5_priv *priv = dev->data->dev_private;
4876         const struct rte_eth_fdir_input *input = &fdir_filter->input;
4877         const struct rte_eth_fdir_masks *mask =
4878                 &dev->data->dev_conf.fdir_conf.mask;
4879
4880         /* Validate queue number. */
4881         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
4882                 DRV_LOG(ERR, "port %u invalid queue number %d",
4883                         dev->data->port_id, fdir_filter->action.rx_queue);
4884                 rte_errno = EINVAL;
4885                 return -rte_errno;
4886         }
4887         attributes->attr.ingress = 1;
4888         attributes->items[0] = (struct rte_flow_item) {
4889                 .type = RTE_FLOW_ITEM_TYPE_ETH,
4890                 .spec = &attributes->l2,
4891                 .mask = &attributes->l2_mask,
4892         };
4893         switch (fdir_filter->action.behavior) {
4894         case RTE_ETH_FDIR_ACCEPT:
4895                 attributes->actions[0] = (struct rte_flow_action){
4896                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
4897                         .conf = &attributes->queue,
4898                 };
4899                 break;
4900         case RTE_ETH_FDIR_REJECT:
4901                 attributes->actions[0] = (struct rte_flow_action){
4902                         .type = RTE_FLOW_ACTION_TYPE_DROP,
4903                 };
4904                 break;
4905         default:
4906                 DRV_LOG(ERR, "port %u invalid behavior %d",
4907                         dev->data->port_id,
4908                         fdir_filter->action.behavior);
4909                 rte_errno = ENOTSUP;
4910                 return -rte_errno;
4911         }
4912         attributes->queue.index = fdir_filter->action.rx_queue;
4913         /* Handle L3. */
4914         switch (fdir_filter->input.flow_type) {
4915         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4916         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4917         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4918                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
4919                         .src_addr = input->flow.ip4_flow.src_ip,
4920                         .dst_addr = input->flow.ip4_flow.dst_ip,
4921                         .time_to_live = input->flow.ip4_flow.ttl,
4922                         .type_of_service = input->flow.ip4_flow.tos,
4923                 };
4924                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
4925                         .src_addr = mask->ipv4_mask.src_ip,
4926                         .dst_addr = mask->ipv4_mask.dst_ip,
4927                         .time_to_live = mask->ipv4_mask.ttl,
4928                         .type_of_service = mask->ipv4_mask.tos,
4929                         .next_proto_id = mask->ipv4_mask.proto,
4930                 };
4931                 attributes->items[1] = (struct rte_flow_item){
4932                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
4933                         .spec = &attributes->l3,
4934                         .mask = &attributes->l3_mask,
4935                 };
4936                 break;
4937         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4938         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4939         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4940                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
4941                         .hop_limits = input->flow.ipv6_flow.hop_limits,
4942                         .proto = input->flow.ipv6_flow.proto,
4943                 };
4944
4945                 memcpy(attributes->l3.ipv6.hdr.src_addr,
4946                        input->flow.ipv6_flow.src_ip,
4947                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4948                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
4949                        input->flow.ipv6_flow.dst_ip,
4950                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4951                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
4952                        mask->ipv6_mask.src_ip,
4953                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4954                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
4955                        mask->ipv6_mask.dst_ip,
4956                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4957                 attributes->items[1] = (struct rte_flow_item){
4958                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
4959                         .spec = &attributes->l3,
4960                         .mask = &attributes->l3_mask,
4961                 };
4962                 break;
4963         default:
4964                 DRV_LOG(ERR, "port %u invalid flow type%d",
4965                         dev->data->port_id, fdir_filter->input.flow_type);
4966                 rte_errno = ENOTSUP;
4967                 return -rte_errno;
4968         }
4969         /* Handle L4. */
4970         switch (fdir_filter->input.flow_type) {
4971         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4972                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4973                         .src_port = input->flow.udp4_flow.src_port,
4974                         .dst_port = input->flow.udp4_flow.dst_port,
4975                 };
4976                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4977                         .src_port = mask->src_port_mask,
4978                         .dst_port = mask->dst_port_mask,
4979                 };
4980                 attributes->items[2] = (struct rte_flow_item){
4981                         .type = RTE_FLOW_ITEM_TYPE_UDP,
4982                         .spec = &attributes->l4,
4983                         .mask = &attributes->l4_mask,
4984                 };
4985                 break;
4986         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4987                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4988                         .src_port = input->flow.tcp4_flow.src_port,
4989                         .dst_port = input->flow.tcp4_flow.dst_port,
4990                 };
4991                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4992                         .src_port = mask->src_port_mask,
4993                         .dst_port = mask->dst_port_mask,
4994                 };
4995                 attributes->items[2] = (struct rte_flow_item){
4996                         .type = RTE_FLOW_ITEM_TYPE_TCP,
4997                         .spec = &attributes->l4,
4998                         .mask = &attributes->l4_mask,
4999                 };
5000                 break;
5001         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
5002                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
5003                         .src_port = input->flow.udp6_flow.src_port,
5004                         .dst_port = input->flow.udp6_flow.dst_port,
5005                 };
5006                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
5007                         .src_port = mask->src_port_mask,
5008                         .dst_port = mask->dst_port_mask,
5009                 };
5010                 attributes->items[2] = (struct rte_flow_item){
5011                         .type = RTE_FLOW_ITEM_TYPE_UDP,
5012                         .spec = &attributes->l4,
5013                         .mask = &attributes->l4_mask,
5014                 };
5015                 break;
5016         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
5017                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
5018                         .src_port = input->flow.tcp6_flow.src_port,
5019                         .dst_port = input->flow.tcp6_flow.dst_port,
5020                 };
5021                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
5022                         .src_port = mask->src_port_mask,
5023                         .dst_port = mask->dst_port_mask,
5024                 };
5025                 attributes->items[2] = (struct rte_flow_item){
5026                         .type = RTE_FLOW_ITEM_TYPE_TCP,
5027                         .spec = &attributes->l4,
5028                         .mask = &attributes->l4_mask,
5029                 };
5030                 break;
5031         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
5032         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
5033                 break;
5034         default:
5035                 DRV_LOG(ERR, "port %u invalid flow type%d",
5036                         dev->data->port_id, fdir_filter->input.flow_type);
5037                 rte_errno = ENOTSUP;
5038                 return -rte_errno;
5039         }
5040         return 0;
5041 }
5042
5043 #define FLOW_FDIR_CMP(f1, f2, fld) \
5044         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
5045
5046 /**
5047  * Compare two FDIR flows. If items and actions are identical, the two flows are
5048  * regarded as same.
5049  *
5050  * @param dev
5051  *   Pointer to Ethernet device.
5052  * @param f1
5053  *   FDIR flow to compare.
5054  * @param f2
5055  *   FDIR flow to compare.
5056  *
5057  * @return
5058  *   Zero on match, 1 otherwise.
5059  */
5060 static int
5061 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
5062 {
5063         if (FLOW_FDIR_CMP(f1, f2, attr) ||
5064             FLOW_FDIR_CMP(f1, f2, l2) ||
5065             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
5066             FLOW_FDIR_CMP(f1, f2, l3) ||
5067             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
5068             FLOW_FDIR_CMP(f1, f2, l4) ||
5069             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
5070             FLOW_FDIR_CMP(f1, f2, actions[0].type))
5071                 return 1;
5072         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
5073             FLOW_FDIR_CMP(f1, f2, queue))
5074                 return 1;
5075         return 0;
5076 }
5077
5078 /**
5079  * Search device flow list to find out a matched FDIR flow.
5080  *
5081  * @param dev
5082  *   Pointer to Ethernet device.
5083  * @param fdir_flow
5084  *   FDIR flow to lookup.
5085  *
5086  * @return
5087  *   Pointer of flow if found, NULL otherwise.
5088  */
5089 static struct rte_flow *
5090 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
5091 {
5092         struct mlx5_priv *priv = dev->data->dev_private;
5093         struct rte_flow *flow = NULL;
5094
5095         MLX5_ASSERT(fdir_flow);
5096         TAILQ_FOREACH(flow, &priv->flows, next) {
5097                 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
5098                         DRV_LOG(DEBUG, "port %u found FDIR flow %p",
5099                                 dev->data->port_id, (void *)flow);
5100                         break;
5101                 }
5102         }
5103         return flow;
5104 }
5105
5106 /**
5107  * Add new flow director filter and store it in list.
5108  *
5109  * @param dev
5110  *   Pointer to Ethernet device.
5111  * @param fdir_filter
5112  *   Flow director filter to add.
5113  *
5114  * @return
5115  *   0 on success, a negative errno value otherwise and rte_errno is set.
5116  */
5117 static int
5118 flow_fdir_filter_add(struct rte_eth_dev *dev,
5119                      const struct rte_eth_fdir_filter *fdir_filter)
5120 {
5121         struct mlx5_priv *priv = dev->data->dev_private;
5122         struct mlx5_fdir *fdir_flow;
5123         struct rte_flow *flow;
5124         int ret;
5125
5126         fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
5127         if (!fdir_flow) {
5128                 rte_errno = ENOMEM;
5129                 return -rte_errno;
5130         }
5131         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
5132         if (ret)
5133                 goto error;
5134         flow = flow_fdir_filter_lookup(dev, fdir_flow);
5135         if (flow) {
5136                 rte_errno = EEXIST;
5137                 goto error;
5138         }
5139         flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
5140                                 fdir_flow->items, fdir_flow->actions, true,
5141                                 NULL);
5142         if (!flow)
5143                 goto error;
5144         MLX5_ASSERT(!flow->fdir);
5145         flow->fdir = fdir_flow;
5146         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
5147                 dev->data->port_id, (void *)flow);
5148         return 0;
5149 error:
5150         rte_free(fdir_flow);
5151         return -rte_errno;
5152 }
5153
5154 /**
5155  * Delete specific filter.
5156  *
5157  * @param dev
5158  *   Pointer to Ethernet device.
5159  * @param fdir_filter
5160  *   Filter to be deleted.
5161  *
5162  * @return
5163  *   0 on success, a negative errno value otherwise and rte_errno is set.
5164  */
5165 static int
5166 flow_fdir_filter_delete(struct rte_eth_dev *dev,
5167                         const struct rte_eth_fdir_filter *fdir_filter)
5168 {
5169         struct mlx5_priv *priv = dev->data->dev_private;
5170         struct rte_flow *flow;
5171         struct mlx5_fdir fdir_flow = {
5172                 .attr.group = 0,
5173         };
5174         int ret;
5175
5176         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
5177         if (ret)
5178                 return -rte_errno;
5179         flow = flow_fdir_filter_lookup(dev, &fdir_flow);
5180         if (!flow) {
5181                 rte_errno = ENOENT;
5182                 return -rte_errno;
5183         }
5184         flow_list_destroy(dev, &priv->flows, flow);
5185         DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
5186                 dev->data->port_id, (void *)flow);
5187         return 0;
5188 }
5189
5190 /**
5191  * Update queue for specific filter.
5192  *
5193  * @param dev
5194  *   Pointer to Ethernet device.
5195  * @param fdir_filter
5196  *   Filter to be updated.
5197  *
5198  * @return
5199  *   0 on success, a negative errno value otherwise and rte_errno is set.
5200  */
5201 static int
5202 flow_fdir_filter_update(struct rte_eth_dev *dev,
5203                         const struct rte_eth_fdir_filter *fdir_filter)
5204 {
5205         int ret;
5206
5207         ret = flow_fdir_filter_delete(dev, fdir_filter);
5208         if (ret)
5209                 return ret;
5210         return flow_fdir_filter_add(dev, fdir_filter);
5211 }
5212
5213 /**
5214  * Flush all filters.
5215  *
5216  * @param dev
5217  *   Pointer to Ethernet device.
5218  */
5219 static void
5220 flow_fdir_filter_flush(struct rte_eth_dev *dev)
5221 {
5222         struct mlx5_priv *priv = dev->data->dev_private;
5223
5224         mlx5_flow_list_flush(dev, &priv->flows, false);
5225 }
5226
5227 /**
5228  * Get flow director information.
5229  *
5230  * @param dev
5231  *   Pointer to Ethernet device.
5232  * @param[out] fdir_info
5233  *   Resulting flow director information.
5234  */
5235 static void
5236 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
5237 {
5238         struct rte_eth_fdir_masks *mask =
5239                 &dev->data->dev_conf.fdir_conf.mask;
5240
5241         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
5242         fdir_info->guarant_spc = 0;
5243         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
5244         fdir_info->max_flexpayload = 0;
5245         fdir_info->flow_types_mask[0] = 0;
5246         fdir_info->flex_payload_unit = 0;
5247         fdir_info->max_flex_payload_segment_num = 0;
5248         fdir_info->flex_payload_limit = 0;
5249         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
5250 }
5251
5252 /**
5253  * Deal with flow director operations.
5254  *
5255  * @param dev
5256  *   Pointer to Ethernet device.
5257  * @param filter_op
5258  *   Operation to perform.
5259  * @param arg
5260  *   Pointer to operation-specific structure.
5261  *
5262  * @return
5263  *   0 on success, a negative errno value otherwise and rte_errno is set.
5264  */
5265 static int
5266 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
5267                     void *arg)
5268 {
5269         enum rte_fdir_mode fdir_mode =
5270                 dev->data->dev_conf.fdir_conf.mode;
5271
5272         if (filter_op == RTE_ETH_FILTER_NOP)
5273                 return 0;
5274         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
5275             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
5276                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
5277                         dev->data->port_id, fdir_mode);
5278                 rte_errno = EINVAL;
5279                 return -rte_errno;
5280         }
5281         switch (filter_op) {
5282         case RTE_ETH_FILTER_ADD:
5283                 return flow_fdir_filter_add(dev, arg);
5284         case RTE_ETH_FILTER_UPDATE:
5285                 return flow_fdir_filter_update(dev, arg);
5286         case RTE_ETH_FILTER_DELETE:
5287                 return flow_fdir_filter_delete(dev, arg);
5288         case RTE_ETH_FILTER_FLUSH:
5289                 flow_fdir_filter_flush(dev);
5290                 break;
5291         case RTE_ETH_FILTER_INFO:
5292                 flow_fdir_info_get(dev, arg);
5293                 break;
5294         default:
5295                 DRV_LOG(DEBUG, "port %u unknown operation %u",
5296                         dev->data->port_id, filter_op);
5297                 rte_errno = EINVAL;
5298                 return -rte_errno;
5299         }
5300         return 0;
5301 }
5302
5303 /**
5304  * Manage filter operations.
5305  *
5306  * @param dev
5307  *   Pointer to Ethernet device structure.
5308  * @param filter_type
5309  *   Filter type.
5310  * @param filter_op
5311  *   Operation to perform.
5312  * @param arg
5313  *   Pointer to operation-specific structure.
5314  *
5315  * @return
5316  *   0 on success, a negative errno value otherwise and rte_errno is set.
5317  */
5318 int
5319 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
5320                      enum rte_filter_type filter_type,
5321                      enum rte_filter_op filter_op,
5322                      void *arg)
5323 {
5324         switch (filter_type) {
5325         case RTE_ETH_FILTER_GENERIC:
5326                 if (filter_op != RTE_ETH_FILTER_GET) {
5327                         rte_errno = EINVAL;
5328                         return -rte_errno;
5329                 }
5330                 *(const void **)arg = &mlx5_flow_ops;
5331                 return 0;
5332         case RTE_ETH_FILTER_FDIR:
5333                 return flow_fdir_ctrl_func(dev, filter_op, arg);
5334         default:
5335                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
5336                         dev->data->port_id, filter_type);
5337                 rte_errno = ENOTSUP;
5338                 return -rte_errno;
5339         }
5340         return 0;
5341 }
5342
5343 /**
5344  * Create the needed meter and suffix tables.
5345  *
5346  * @param[in] dev
5347  *   Pointer to Ethernet device.
5348  * @param[in] fm
5349  *   Pointer to the flow meter.
5350  *
5351  * @return
5352  *   Pointer to table set on success, NULL otherwise.
5353  */
5354 struct mlx5_meter_domains_infos *
5355 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
5356                           const struct mlx5_flow_meter *fm)
5357 {
5358         const struct mlx5_flow_driver_ops *fops;
5359
5360         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5361         return fops->create_mtr_tbls(dev, fm);
5362 }
5363
5364 /**
5365  * Destroy the meter table set.
5366  *
5367  * @param[in] dev
5368  *   Pointer to Ethernet device.
5369  * @param[in] tbl
5370  *   Pointer to the meter table set.
5371  *
5372  * @return
5373  *   0 on success.
5374  */
5375 int
5376 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
5377                            struct mlx5_meter_domains_infos *tbls)
5378 {
5379         const struct mlx5_flow_driver_ops *fops;
5380
5381         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5382         return fops->destroy_mtr_tbls(dev, tbls);
5383 }
5384
5385 /**
5386  * Create policer rules.
5387  *
5388  * @param[in] dev
5389  *   Pointer to Ethernet device.
5390  * @param[in] fm
5391  *   Pointer to flow meter structure.
5392  * @param[in] attr
5393  *   Pointer to flow attributes.
5394  *
5395  * @return
5396  *   0 on success, -1 otherwise.
5397  */
5398 int
5399 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
5400                                struct mlx5_flow_meter *fm,
5401                                const struct rte_flow_attr *attr)
5402 {
5403         const struct mlx5_flow_driver_ops *fops;
5404
5405         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5406         return fops->create_policer_rules(dev, fm, attr);
5407 }
5408
5409 /**
5410  * Destroy policer rules.
5411  *
5412  * @param[in] fm
5413  *   Pointer to flow meter structure.
5414  * @param[in] attr
5415  *   Pointer to flow attributes.
5416  *
5417  * @return
5418  *   0 on success, -1 otherwise.
5419  */
5420 int
5421 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
5422                                 struct mlx5_flow_meter *fm,
5423                                 const struct rte_flow_attr *attr)
5424 {
5425         const struct mlx5_flow_driver_ops *fops;
5426
5427         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5428         return fops->destroy_policer_rules(dev, fm, attr);
5429 }
5430
5431 /**
5432  * Allocate a counter.
5433  *
5434  * @param[in] dev
5435  *   Pointer to Ethernet device structure.
5436  *
5437  * @return
5438  *   Pointer to allocated counter  on success, NULL otherwise.
5439  */
5440 struct mlx5_flow_counter *
5441 mlx5_counter_alloc(struct rte_eth_dev *dev)
5442 {
5443         const struct mlx5_flow_driver_ops *fops;
5444         struct rte_flow_attr attr = { .transfer = 0 };
5445
5446         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5447                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5448                 return fops->counter_alloc(dev);
5449         }
5450         DRV_LOG(ERR,
5451                 "port %u counter allocate is not supported.",
5452                  dev->data->port_id);
5453         return NULL;
5454 }
5455
5456 /**
5457  * Free a counter.
5458  *
5459  * @param[in] dev
5460  *   Pointer to Ethernet device structure.
5461  * @param[in] cnt
5462  *   Pointer to counter to be free.
5463  */
5464 void
5465 mlx5_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
5466 {
5467         const struct mlx5_flow_driver_ops *fops;
5468         struct rte_flow_attr attr = { .transfer = 0 };
5469
5470         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5471                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5472                 fops->counter_free(dev, cnt);
5473                 return;
5474         }
5475         DRV_LOG(ERR,
5476                 "port %u counter free is not supported.",
5477                  dev->data->port_id);
5478 }
5479
5480 /**
5481  * Query counter statistics.
5482  *
5483  * @param[in] dev
5484  *   Pointer to Ethernet device structure.
5485  * @param[in] cnt
5486  *   Pointer to counter to query.
5487  * @param[in] clear
5488  *   Set to clear counter statistics.
5489  * @param[out] pkts
5490  *   The counter hits packets number to save.
5491  * @param[out] bytes
5492  *   The counter hits bytes number to save.
5493  *
5494  * @return
5495  *   0 on success, a negative errno value otherwise.
5496  */
5497 int
5498 mlx5_counter_query(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt,
5499                    bool clear, uint64_t *pkts, uint64_t *bytes)
5500 {
5501         const struct mlx5_flow_driver_ops *fops;
5502         struct rte_flow_attr attr = { .transfer = 0 };
5503
5504         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5505                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5506                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
5507         }
5508         DRV_LOG(ERR,
5509                 "port %u counter query is not supported.",
5510                  dev->data->port_id);
5511         return -ENOTSUP;
5512 }
5513
5514 #define MLX5_POOL_QUERY_FREQ_US 1000000
5515
5516 /**
5517  * Set the periodic procedure for triggering asynchronous batch queries for all
5518  * the counter pools.
5519  *
5520  * @param[in] sh
5521  *   Pointer to mlx5_ibv_shared object.
5522  */
5523 void
5524 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
5525 {
5526         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
5527         uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
5528         uint32_t us;
5529
5530         cont = MLX5_CNT_CONTAINER(sh, 1, 0);
5531         pools_n += rte_atomic16_read(&cont->n_valid);
5532         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
5533         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
5534         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
5535                 sh->cmng.query_thread_on = 0;
5536                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
5537         } else {
5538                 sh->cmng.query_thread_on = 1;
5539         }
5540 }
5541
5542 /**
5543  * The periodic procedure for triggering asynchronous batch queries for all the
5544  * counter pools. This function is probably called by the host thread.
5545  *
5546  * @param[in] arg
5547  *   The parameter for the alarm process.
5548  */
5549 void
5550 mlx5_flow_query_alarm(void *arg)
5551 {
5552         struct mlx5_ibv_shared *sh = arg;
5553         struct mlx5_devx_obj *dcs;
5554         uint16_t offset;
5555         int ret;
5556         uint8_t batch = sh->cmng.batch;
5557         uint16_t pool_index = sh->cmng.pool_index;
5558         struct mlx5_pools_container *cont;
5559         struct mlx5_pools_container *mcont;
5560         struct mlx5_flow_counter_pool *pool;
5561
5562         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
5563                 goto set_alarm;
5564 next_container:
5565         cont = MLX5_CNT_CONTAINER(sh, batch, 1);
5566         mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
5567         /* Check if resize was done and need to flip a container. */
5568         if (cont != mcont) {
5569                 if (cont->pools) {
5570                         /* Clean the old container. */
5571                         rte_free(cont->pools);
5572                         memset(cont, 0, sizeof(*cont));
5573                 }
5574                 rte_cio_wmb();
5575                  /* Flip the host container. */
5576                 sh->cmng.mhi[batch] ^= (uint8_t)2;
5577                 cont = mcont;
5578         }
5579         if (!cont->pools) {
5580                 /* 2 empty containers case is unexpected. */
5581                 if (unlikely(batch != sh->cmng.batch))
5582                         goto set_alarm;
5583                 batch ^= 0x1;
5584                 pool_index = 0;
5585                 goto next_container;
5586         }
5587         pool = cont->pools[pool_index];
5588         if (pool->raw_hw)
5589                 /* There is a pool query in progress. */
5590                 goto set_alarm;
5591         pool->raw_hw =
5592                 LIST_FIRST(&sh->cmng.free_stat_raws);
5593         if (!pool->raw_hw)
5594                 /* No free counter statistics raw memory. */
5595                 goto set_alarm;
5596         dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
5597                                                               (&pool->a64_dcs);
5598         offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
5599         ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
5600                                                offset, NULL, NULL,
5601                                                pool->raw_hw->mem_mng->dm->id,
5602                                                (void *)(uintptr_t)
5603                                                (pool->raw_hw->data + offset),
5604                                                sh->devx_comp,
5605                                                (uint64_t)(uintptr_t)pool);
5606         if (ret) {
5607                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
5608                         " %d", pool->min_dcs->id);
5609                 pool->raw_hw = NULL;
5610                 goto set_alarm;
5611         }
5612         pool->raw_hw->min_dcs_id = dcs->id;
5613         LIST_REMOVE(pool->raw_hw, next);
5614         sh->cmng.pending_queries++;
5615         pool_index++;
5616         if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
5617                 batch ^= 0x1;
5618                 pool_index = 0;
5619         }
5620 set_alarm:
5621         sh->cmng.batch = batch;
5622         sh->cmng.pool_index = pool_index;
5623         mlx5_set_query_alarm(sh);
5624 }
5625
5626 /**
5627  * Handler for the HW respond about ready values from an asynchronous batch
5628  * query. This function is probably called by the host thread.
5629  *
5630  * @param[in] sh
5631  *   The pointer to the shared IB device context.
5632  * @param[in] async_id
5633  *   The Devx async ID.
5634  * @param[in] status
5635  *   The status of the completion.
5636  */
5637 void
5638 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
5639                                   uint64_t async_id, int status)
5640 {
5641         struct mlx5_flow_counter_pool *pool =
5642                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
5643         struct mlx5_counter_stats_raw *raw_to_free;
5644
5645         if (unlikely(status)) {
5646                 raw_to_free = pool->raw_hw;
5647         } else {
5648                 raw_to_free = pool->raw;
5649                 rte_spinlock_lock(&pool->sl);
5650                 pool->raw = pool->raw_hw;
5651                 rte_spinlock_unlock(&pool->sl);
5652                 rte_atomic64_add(&pool->query_gen, 1);
5653                 /* Be sure the new raw counters data is updated in memory. */
5654                 rte_cio_wmb();
5655         }
5656         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
5657         pool->raw_hw = NULL;
5658         sh->cmng.pending_queries--;
5659 }
5660
5661 /**
5662  * Translate the rte_flow group index to HW table value.
5663  *
5664  * @param[in] attributes
5665  *   Pointer to flow attributes
5666  * @param[in] external
5667  *   Value is part of flow rule created by request external to PMD.
5668  * @param[in] group
5669  *   rte_flow group index value.
5670  * @param[out] fdb_def_rule
5671  *   Whether fdb jump to table 1 is configured.
5672  * @param[out] table
5673  *   HW table value.
5674  * @param[out] error
5675  *   Pointer to error structure.
5676  *
5677  * @return
5678  *   0 on success, a negative errno value otherwise and rte_errno is set.
5679  */
5680 int
5681 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
5682                          uint32_t group, bool fdb_def_rule, uint32_t *table,
5683                          struct rte_flow_error *error)
5684 {
5685         if (attributes->transfer && external && fdb_def_rule) {
5686                 if (group == UINT32_MAX)
5687                         return rte_flow_error_set
5688                                                 (error, EINVAL,
5689                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
5690                                                  NULL,
5691                                                  "group index not supported");
5692                 *table = group + 1;
5693         } else {
5694                 *table = group;
5695         }
5696         return 0;
5697 }
5698
5699 /**
5700  * Discover availability of metadata reg_c's.
5701  *
5702  * Iteratively use test flows to check availability.
5703  *
5704  * @param[in] dev
5705  *   Pointer to the Ethernet device structure.
5706  *
5707  * @return
5708  *   0 on success, a negative errno value otherwise and rte_errno is set.
5709  */
5710 int
5711 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
5712 {
5713         struct mlx5_priv *priv = dev->data->dev_private;
5714         struct mlx5_dev_config *config = &priv->config;
5715         enum modify_reg idx;
5716         int n = 0;
5717
5718         /* reg_c[0] and reg_c[1] are reserved. */
5719         config->flow_mreg_c[n++] = REG_C_0;
5720         config->flow_mreg_c[n++] = REG_C_1;
5721         /* Discover availability of other reg_c's. */
5722         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
5723                 struct rte_flow_attr attr = {
5724                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5725                         .priority = MLX5_FLOW_PRIO_RSVD,
5726                         .ingress = 1,
5727                 };
5728                 struct rte_flow_item items[] = {
5729                         [0] = {
5730                                 .type = RTE_FLOW_ITEM_TYPE_END,
5731                         },
5732                 };
5733                 struct rte_flow_action actions[] = {
5734                         [0] = {
5735                                 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5736                                 .conf = &(struct mlx5_flow_action_copy_mreg){
5737                                         .src = REG_C_1,
5738                                         .dst = idx,
5739                                 },
5740                         },
5741                         [1] = {
5742                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5743                                 .conf = &(struct rte_flow_action_jump){
5744                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5745                                 },
5746                         },
5747                         [2] = {
5748                                 .type = RTE_FLOW_ACTION_TYPE_END,
5749                         },
5750                 };
5751                 struct rte_flow *flow;
5752                 struct rte_flow_error error;
5753
5754                 if (!config->dv_flow_en)
5755                         break;
5756                 /* Create internal flow, validation skips copy action. */
5757                 flow = flow_list_create(dev, NULL, &attr, items,
5758                                         actions, false, &error);
5759                 if (!flow)
5760                         continue;
5761                 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
5762                         config->flow_mreg_c[n++] = idx;
5763                 flow_list_destroy(dev, NULL, flow);
5764         }
5765         for (; n < MLX5_MREG_C_NUM; ++n)
5766                 config->flow_mreg_c[n] = REG_NONE;
5767         return 0;
5768 }
5769
5770 /**
5771  * Dump flow raw hw data to file
5772  *
5773  * @param[in] dev
5774  *    The pointer to Ethernet device.
5775  * @param[in] file
5776  *   A pointer to a file for output.
5777  * @param[out] error
5778  *   Perform verbose error reporting if not NULL. PMDs initialize this
5779  *   structure in case of error only.
5780  * @return
5781  *   0 on success, a nagative value otherwise.
5782  */
5783 int
5784 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
5785                    FILE *file,
5786                    struct rte_flow_error *error __rte_unused)
5787 {
5788         struct mlx5_priv *priv = dev->data->dev_private;
5789         struct mlx5_ibv_shared *sh = priv->sh;
5790
5791         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
5792                                        sh->tx_domain, file);
5793 }