drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11 #include <stdbool.h>
  12
  13 /* Verbs header. */
  14 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  15 #ifdef PEDANTIC
  16 #pragma GCC diagnostic ignored "-Wpedantic"
  17 #endif
  18 #include <infiniband/verbs.h>
  19 #ifdef PEDANTIC
  20 #pragma GCC diagnostic error "-Wpedantic"
  21 #endif
  22
  23 #include <rte_common.h>
  24 #include <rte_ether.h>
  25 #include <rte_ethdev_driver.h>
  26 #include <rte_flow.h>
  27 #include <rte_cycles.h>
  28 #include <rte_flow_driver.h>
  29 #include <rte_malloc.h>
  30 #include <rte_ip.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_prm.h>
  35
  36 #include "mlx5_defs.h"
  37 #include "mlx5.h"
  38 #include "mlx5_flow.h"
  39 #include "mlx5_rxtx.h"
  40
  41 /* Dev ops structure defined in mlx5.c */
  42 extern const struct eth_dev_ops mlx5_dev_ops;
  43 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
  44
  45 /** Device flow drivers. */
  46 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  47 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
  48 #endif
  49 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  50
  51 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  52
  53 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  54         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  55 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  56         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  57 #endif
  58         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  59         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  60 };
  61
  62 enum mlx5_expansion {
  63         MLX5_EXPANSION_ROOT,
  64         MLX5_EXPANSION_ROOT_OUTER,
  65         MLX5_EXPANSION_ROOT_ETH_VLAN,
  66         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
  67         MLX5_EXPANSION_OUTER_ETH,
  68         MLX5_EXPANSION_OUTER_ETH_VLAN,
  69         MLX5_EXPANSION_OUTER_VLAN,
  70         MLX5_EXPANSION_OUTER_IPV4,
  71         MLX5_EXPANSION_OUTER_IPV4_UDP,
  72         MLX5_EXPANSION_OUTER_IPV4_TCP,
  73         MLX5_EXPANSION_OUTER_IPV6,
  74         MLX5_EXPANSION_OUTER_IPV6_UDP,
  75         MLX5_EXPANSION_OUTER_IPV6_TCP,
  76         MLX5_EXPANSION_VXLAN,
  77         MLX5_EXPANSION_VXLAN_GPE,
  78         MLX5_EXPANSION_GRE,
  79         MLX5_EXPANSION_MPLS,
  80         MLX5_EXPANSION_ETH,
  81         MLX5_EXPANSION_ETH_VLAN,
  82         MLX5_EXPANSION_VLAN,
  83         MLX5_EXPANSION_IPV4,
  84         MLX5_EXPANSION_IPV4_UDP,
  85         MLX5_EXPANSION_IPV4_TCP,
  86         MLX5_EXPANSION_IPV6,
  87         MLX5_EXPANSION_IPV6_UDP,
  88         MLX5_EXPANSION_IPV6_TCP,
  89 };
  90
  91 /** Supported expansion of items. */
  92 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
  93         [MLX5_EXPANSION_ROOT] = {
  94                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
  95                                                  MLX5_EXPANSION_IPV4,
  96                                                  MLX5_EXPANSION_IPV6),
  97                 .type = RTE_FLOW_ITEM_TYPE_END,
  98         },
  99         [MLX5_EXPANSION_ROOT_OUTER] = {
 100                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 101                                                  MLX5_EXPANSION_OUTER_IPV4,
 102                                                  MLX5_EXPANSION_OUTER_IPV6),
 103                 .type = RTE_FLOW_ITEM_TYPE_END,
 104         },
 105         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 106                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 107                 .type = RTE_FLOW_ITEM_TYPE_END,
 108         },
 109         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 110                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
 111                 .type = RTE_FLOW_ITEM_TYPE_END,
 112         },
 113         [MLX5_EXPANSION_OUTER_ETH] = {
 114                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 115                                                  MLX5_EXPANSION_OUTER_IPV6,
 116                                                  MLX5_EXPANSION_MPLS),
 117                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 118                 .rss_types = 0,
 119         },
 120         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 121                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 122                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 123                 .rss_types = 0,
 124         },
 125         [MLX5_EXPANSION_OUTER_VLAN] = {
 126                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 127                                                  MLX5_EXPANSION_OUTER_IPV6),
 128                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 129         },
 130         [MLX5_EXPANSION_OUTER_IPV4] = {
 131                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 132                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 133                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 134                          MLX5_EXPANSION_GRE,
 135                          MLX5_EXPANSION_IPV4,
 136                          MLX5_EXPANSION_IPV6),
 137                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 138                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 139                         ETH_RSS_NONFRAG_IPV4_OTHER,
 140         },
 141         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 142                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 143                                                  MLX5_EXPANSION_VXLAN_GPE),
 144                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 145                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 146         },
 147         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 148                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 149                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 150         },
 151         [MLX5_EXPANSION_OUTER_IPV6] = {
 152                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 153                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 154                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 155                          MLX5_EXPANSION_IPV4,
 156                          MLX5_EXPANSION_IPV6),
 157                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 158                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 159                         ETH_RSS_NONFRAG_IPV6_OTHER,
 160         },
 161         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 162                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 163                                                  MLX5_EXPANSION_VXLAN_GPE),
 164                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 165                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 166         },
 167         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 168                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 169                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 170         },
 171         [MLX5_EXPANSION_VXLAN] = {
 172                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 173                                                  MLX5_EXPANSION_IPV4,
 174                                                  MLX5_EXPANSION_IPV6),
 175                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 176         },
 177         [MLX5_EXPANSION_VXLAN_GPE] = {
 178                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 179                                                  MLX5_EXPANSION_IPV4,
 180                                                  MLX5_EXPANSION_IPV6),
 181                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 182         },
 183         [MLX5_EXPANSION_GRE] = {
 184                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 185                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 186         },
 187         [MLX5_EXPANSION_MPLS] = {
 188                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 189                                                  MLX5_EXPANSION_IPV6),
 190                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 191         },
 192         [MLX5_EXPANSION_ETH] = {
 193                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 194                                                  MLX5_EXPANSION_IPV6),
 195                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 196         },
 197         [MLX5_EXPANSION_ETH_VLAN] = {
 198                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 199                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 200         },
 201         [MLX5_EXPANSION_VLAN] = {
 202                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 203                                                  MLX5_EXPANSION_IPV6),
 204                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 205         },
 206         [MLX5_EXPANSION_IPV4] = {
 207                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 208                                                  MLX5_EXPANSION_IPV4_TCP),
 209                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 210                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 211                         ETH_RSS_NONFRAG_IPV4_OTHER,
 212         },
 213         [MLX5_EXPANSION_IPV4_UDP] = {
 214                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 215                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 216         },
 217         [MLX5_EXPANSION_IPV4_TCP] = {
 218                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 219                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 220         },
 221         [MLX5_EXPANSION_IPV6] = {
 222                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 223                                                  MLX5_EXPANSION_IPV6_TCP),
 224                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 225                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 226                         ETH_RSS_NONFRAG_IPV6_OTHER,
 227         },
 228         [MLX5_EXPANSION_IPV6_UDP] = {
 229                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 230                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 231         },
 232         [MLX5_EXPANSION_IPV6_TCP] = {
 233                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 234                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 235         },
 236 };
 237
 238 static const struct rte_flow_ops mlx5_flow_ops = {
 239         .validate = mlx5_flow_validate,
 240         .create = mlx5_flow_create,
 241         .destroy = mlx5_flow_destroy,
 242         .flush = mlx5_flow_flush,
 243         .isolate = mlx5_flow_isolate,
 244         .query = mlx5_flow_query,
 245         .dev_dump = mlx5_flow_dev_dump,
 246         .get_aged_flows = mlx5_flow_get_aged_flows,
 247 };
 248
 249 /* Convert FDIR request to Generic flow. */
 250 struct mlx5_fdir {
 251         struct rte_flow_attr attr;
 252         struct rte_flow_item items[4];
 253         struct rte_flow_item_eth l2;
 254         struct rte_flow_item_eth l2_mask;
 255         union {
 256                 struct rte_flow_item_ipv4 ipv4;
 257                 struct rte_flow_item_ipv6 ipv6;
 258         } l3;
 259         union {
 260                 struct rte_flow_item_ipv4 ipv4;
 261                 struct rte_flow_item_ipv6 ipv6;
 262         } l3_mask;
 263         union {
 264                 struct rte_flow_item_udp udp;
 265                 struct rte_flow_item_tcp tcp;
 266         } l4;
 267         union {
 268                 struct rte_flow_item_udp udp;
 269                 struct rte_flow_item_tcp tcp;
 270         } l4_mask;
 271         struct rte_flow_action actions[2];
 272         struct rte_flow_action_queue queue;
 273 };
 274
 275 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
 276 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
 277         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
 278 };
 279
 280 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
 281 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
 282         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
 283         { 9, 10, 11 }, { 12, 13, 14 },
 284 };
 285
 286 /* Tunnel information. */
 287 struct mlx5_flow_tunnel_info {
 288         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 289         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 290 };
 291
 292 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 293         {
 294                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 295                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 296         },
 297         {
 298                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 299                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 300         },
 301         {
 302                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 303                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 304         },
 305         {
 306                 .tunnel = MLX5_FLOW_LAYER_GRE,
 307                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 308         },
 309         {
 310                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 311                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 312         },
 313         {
 314                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 315                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 316         },
 317         {
 318                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 319                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 320         },
 321         {
 322                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 323                 .ptype = RTE_PTYPE_TUNNEL_IP,
 324         },
 325         {
 326                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 327                 .ptype = RTE_PTYPE_TUNNEL_IP,
 328         },
 329         {
 330                 .tunnel = MLX5_FLOW_LAYER_GTP,
 331                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 332         },
 333 };
 334
 335 /**
 336  * Translate tag ID to register.
 337  *
 338  * @param[in] dev
 339  *   Pointer to the Ethernet device structure.
 340  * @param[in] feature
 341  *   The feature that request the register.
 342  * @param[in] id
 343  *   The request register ID.
 344  * @param[out] error
 345  *   Error description in case of any.
 346  *
 347  * @return
 348  *   The request register on success, a negative errno
 349  *   value otherwise and rte_errno is set.
 350  */
 351 int
 352 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 353                      enum mlx5_feature_name feature,
 354                      uint32_t id,
 355                      struct rte_flow_error *error)
 356 {
 357         struct mlx5_priv *priv = dev->data->dev_private;
 358         struct mlx5_dev_config *config = &priv->config;
 359         enum modify_reg start_reg;
 360         bool skip_mtr_reg = false;
 361
 362         switch (feature) {
 363         case MLX5_HAIRPIN_RX:
 364                 return REG_B;
 365         case MLX5_HAIRPIN_TX:
 366                 return REG_A;
 367         case MLX5_METADATA_RX:
 368                 switch (config->dv_xmeta_en) {
 369                 case MLX5_XMETA_MODE_LEGACY:
 370                         return REG_B;
 371                 case MLX5_XMETA_MODE_META16:
 372                         return REG_C_0;
 373                 case MLX5_XMETA_MODE_META32:
 374                         return REG_C_1;
 375                 }
 376                 break;
 377         case MLX5_METADATA_TX:
 378                 return REG_A;
 379         case MLX5_METADATA_FDB:
 380                 switch (config->dv_xmeta_en) {
 381                 case MLX5_XMETA_MODE_LEGACY:
 382                         return REG_NONE;
 383                 case MLX5_XMETA_MODE_META16:
 384                         return REG_C_0;
 385                 case MLX5_XMETA_MODE_META32:
 386                         return REG_C_1;
 387                 }
 388                 break;
 389         case MLX5_FLOW_MARK:
 390                 switch (config->dv_xmeta_en) {
 391                 case MLX5_XMETA_MODE_LEGACY:
 392                         return REG_NONE;
 393                 case MLX5_XMETA_MODE_META16:
 394                         return REG_C_1;
 395                 case MLX5_XMETA_MODE_META32:
 396                         return REG_C_0;
 397                 }
 398                 break;
 399         case MLX5_MTR_SFX:
 400                 /*
 401                  * If meter color and flow match share one register, flow match
 402                  * should use the meter color register for match.
 403                  */
 404                 if (priv->mtr_reg_share)
 405                         return priv->mtr_color_reg;
 406                 else
 407                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 408                                REG_C_3;
 409         case MLX5_MTR_COLOR:
 410                 MLX5_ASSERT(priv->mtr_color_reg != REG_NONE);
 411                 return priv->mtr_color_reg;
 412         case MLX5_COPY_MARK:
 413                 /*
 414                  * Metadata COPY_MARK register using is in meter suffix sub
 415                  * flow while with meter. It's safe to share the same register.
 416                  */
 417                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 418         case MLX5_APP_TAG:
 419                 /*
 420                  * If meter is enable, it will engage the register for color
 421                  * match and flow match. If meter color match is not using the
 422                  * REG_C_2, need to skip the REG_C_x be used by meter color
 423                  * match.
 424                  * If meter is disable, free to use all available registers.
 425                  */
 426                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 427                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 428                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 429                 if (id > (REG_C_7 - start_reg))
 430                         return rte_flow_error_set(error, EINVAL,
 431                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 432                                                   NULL, "invalid tag id");
 433                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NONE)
 434                         return rte_flow_error_set(error, ENOTSUP,
 435                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 436                                                   NULL, "unsupported tag id");
 437                 /*
 438                  * This case means meter is using the REG_C_x great than 2.
 439                  * Take care not to conflict with meter color REG_C_x.
 440                  * If the available index REG_C_y >= REG_C_x, skip the
 441                  * color register.
 442                  */
 443                 if (skip_mtr_reg && config->flow_mreg_c
 444                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 445                         if (id >= (REG_C_7 - start_reg))
 446                                 return rte_flow_error_set(error, EINVAL,
 447                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 448                                                         NULL, "invalid tag id");
 449                         if (config->flow_mreg_c
 450                             [id + 1 + start_reg - REG_C_0] != REG_NONE)
 451                                 return config->flow_mreg_c
 452                                                [id + 1 + start_reg - REG_C_0];
 453                         return rte_flow_error_set(error, ENOTSUP,
 454                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 455                                                   NULL, "unsupported tag id");
 456                 }
 457                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 458         }
 459         MLX5_ASSERT(false);
 460         return rte_flow_error_set(error, EINVAL,
 461                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 462                                   NULL, "invalid feature name");
 463 }
 464
 465 /**
 466  * Check extensive flow metadata register support.
 467  *
 468  * @param dev
 469  *   Pointer to rte_eth_dev structure.
 470  *
 471  * @return
 472  *   True if device supports extensive flow metadata register, otherwise false.
 473  */
 474 bool
 475 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 476 {
 477         struct mlx5_priv *priv = dev->data->dev_private;
 478         struct mlx5_dev_config *config = &priv->config;
 479
 480         /*
 481          * Having available reg_c can be regarded inclusively as supporting
 482          * extensive flow metadata register, which could mean,
 483          * - metadata register copy action by modify header.
 484          * - 16 modify header actions is supported.
 485          * - reg_c's are preserved across different domain (FDB and NIC) on
 486          *   packet loopback by flow lookup miss.
 487          */
 488         return config->flow_mreg_c[2] != REG_NONE;
 489 }
 490
 491 /**
 492  * Discover the maximum number of priority available.
 493  *
 494  * @param[in] dev
 495  *   Pointer to the Ethernet device structure.
 496  *
 497  * @return
 498  *   number of supported flow priority on success, a negative errno
 499  *   value otherwise and rte_errno is set.
 500  */
 501 int
 502 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 503 {
 504         struct mlx5_priv *priv = dev->data->dev_private;
 505         struct {
 506                 struct ibv_flow_attr attr;
 507                 struct ibv_flow_spec_eth eth;
 508                 struct ibv_flow_spec_action_drop drop;
 509         } flow_attr = {
 510                 .attr = {
 511                         .num_of_specs = 2,
 512                         .port = (uint8_t)priv->ibv_port,
 513                 },
 514                 .eth = {
 515                         .type = IBV_FLOW_SPEC_ETH,
 516                         .size = sizeof(struct ibv_flow_spec_eth),
 517                 },
 518                 .drop = {
 519                         .size = sizeof(struct ibv_flow_spec_action_drop),
 520                         .type = IBV_FLOW_SPEC_ACTION_DROP,
 521                 },
 522         };
 523         struct ibv_flow *flow;
 524         struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
 525         uint16_t vprio[] = { 8, 16 };
 526         int i;
 527         int priority = 0;
 528
 529         if (!drop) {
 530                 rte_errno = ENOTSUP;
 531                 return -rte_errno;
 532         }
 533         for (i = 0; i != RTE_DIM(vprio); i++) {
 534                 flow_attr.attr.priority = vprio[i] - 1;
 535                 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
 536                 if (!flow)
 537                         break;
 538                 claim_zero(mlx5_glue->destroy_flow(flow));
 539                 priority = vprio[i];
 540         }
 541         mlx5_hrxq_drop_release(dev);
 542         switch (priority) {
 543         case 8:
 544                 priority = RTE_DIM(priority_map_3);
 545                 break;
 546         case 16:
 547                 priority = RTE_DIM(priority_map_5);
 548                 break;
 549         default:
 550                 rte_errno = ENOTSUP;
 551                 DRV_LOG(ERR,
 552                         "port %u verbs maximum priority: %d expected 8/16",
 553                         dev->data->port_id, priority);
 554                 return -rte_errno;
 555         }
 556         DRV_LOG(INFO, "port %u flow maximum priority: %d",
 557                 dev->data->port_id, priority);
 558         return priority;
 559 }
 560
 561 /**
 562  * Adjust flow priority based on the highest layer and the request priority.
 563  *
 564  * @param[in] dev
 565  *   Pointer to the Ethernet device structure.
 566  * @param[in] priority
 567  *   The rule base priority.
 568  * @param[in] subpriority
 569  *   The priority based on the items.
 570  *
 571  * @return
 572  *   The new priority.
 573  */
 574 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 575                                    uint32_t subpriority)
 576 {
 577         uint32_t res = 0;
 578         struct mlx5_priv *priv = dev->data->dev_private;
 579
 580         switch (priv->config.flow_prio) {
 581         case RTE_DIM(priority_map_3):
 582                 res = priority_map_3[priority][subpriority];
 583                 break;
 584         case RTE_DIM(priority_map_5):
 585                 res = priority_map_5[priority][subpriority];
 586                 break;
 587         }
 588         return  res;
 589 }
 590
 591 /**
 592  * Verify the @p item specifications (spec, last, mask) are compatible with the
 593  * NIC capabilities.
 594  *
 595  * @param[in] item
 596  *   Item specification.
 597  * @param[in] mask
 598  *   @p item->mask or flow default bit-masks.
 599  * @param[in] nic_mask
 600  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 601  * @param[in] size
 602  *   Bit-masks size in bytes.
 603  * @param[out] error
 604  *   Pointer to error structure.
 605  *
 606  * @return
 607  *   0 on success, a negative errno value otherwise and rte_errno is set.
 608  */
 609 int
 610 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 611                           const uint8_t *mask,
 612                           const uint8_t *nic_mask,
 613                           unsigned int size,
 614                           struct rte_flow_error *error)
 615 {
 616         unsigned int i;
 617
 618         MLX5_ASSERT(nic_mask);
 619         for (i = 0; i < size; ++i)
 620                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 621                         return rte_flow_error_set(error, ENOTSUP,
 622                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 623                                                   item,
 624                                                   "mask enables non supported"
 625                                                   " bits");
 626         if (!item->spec && (item->mask || item->last))
 627                 return rte_flow_error_set(error, EINVAL,
 628                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 629                                           "mask/last without a spec is not"
 630                                           " supported");
 631         if (item->spec && item->last) {
 632                 uint8_t spec[size];
 633                 uint8_t last[size];
 634                 unsigned int i;
 635                 int ret;
 636
 637                 for (i = 0; i < size; ++i) {
 638                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 639                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 640                 }
 641                 ret = memcmp(spec, last, size);
 642                 if (ret != 0)
 643                         return rte_flow_error_set(error, EINVAL,
 644                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 645                                                   item,
 646                                                   "range is not valid");
 647         }
 648         return 0;
 649 }
 650
 651 /**
 652  * Adjust the hash fields according to the @p flow information.
 653  *
 654  * @param[in] dev_flow.
 655  *   Pointer to the mlx5_flow.
 656  * @param[in] tunnel
 657  *   1 when the hash field is for a tunnel item.
 658  * @param[in] layer_types
 659  *   ETH_RSS_* types.
 660  * @param[in] hash_fields
 661  *   Item hash fields.
 662  *
 663  * @return
 664  *   The hash fields that should be used.
 665  */
 666 uint64_t
 667 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
 668                             int tunnel __rte_unused, uint64_t layer_types,
 669                             uint64_t hash_fields)
 670 {
 671 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 672         int rss_request_inner = rss_desc->level >= 2;
 673
 674         /* Check RSS hash level for tunnel. */
 675         if (tunnel && rss_request_inner)
 676                 hash_fields |= IBV_RX_HASH_INNER;
 677         else if (tunnel || rss_request_inner)
 678                 return 0;
 679 #endif
 680         /* Check if requested layer matches RSS hash fields. */
 681         if (!(rss_desc->types & layer_types))
 682                 return 0;
 683         return hash_fields;
 684 }
 685
 686 /**
 687  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 688  * if several tunnel rules are used on this queue, the tunnel ptype will be
 689  * cleared.
 690  *
 691  * @param rxq_ctrl
 692  *   Rx queue to update.
 693  */
 694 static void
 695 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 696 {
 697         unsigned int i;
 698         uint32_t tunnel_ptype = 0;
 699
 700         /* Look up for the ptype to use. */
 701         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 702                 if (!rxq_ctrl->flow_tunnels_n[i])
 703                         continue;
 704                 if (!tunnel_ptype) {
 705                         tunnel_ptype = tunnels_info[i].ptype;
 706                 } else {
 707                         tunnel_ptype = 0;
 708                         break;
 709                 }
 710         }
 711         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 712 }
 713
 714 /**
 715  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 716  * flow.
 717  *
 718  * @param[in] dev
 719  *   Pointer to the Ethernet device structure.
 720  * @param[in] dev_handle
 721  *   Pointer to device flow handle structure.
 722  */
 723 static void
 724 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
 725                        struct mlx5_flow_handle *dev_handle)
 726 {
 727         struct mlx5_priv *priv = dev->data->dev_private;
 728         const int mark = dev_handle->mark;
 729         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
 730         struct mlx5_hrxq *hrxq;
 731         unsigned int i;
 732
 733         if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
 734                 return;
 735         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
 736                               dev_handle->rix_hrxq);
 737         if (!hrxq)
 738                 return;
 739         for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
 740                 int idx = hrxq->ind_table->queues[i];
 741                 struct mlx5_rxq_ctrl *rxq_ctrl =
 742                         container_of((*priv->rxqs)[idx],
 743                                      struct mlx5_rxq_ctrl, rxq);
 744
 745                 /*
 746                  * To support metadata register copy on Tx loopback,
 747                  * this must be always enabled (metadata may arive
 748                  * from other port - not from local flows only.
 749                  */
 750                 if (priv->config.dv_flow_en &&
 751                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 752                     mlx5_flow_ext_mreg_supported(dev)) {
 753                         rxq_ctrl->rxq.mark = 1;
 754                         rxq_ctrl->flow_mark_n = 1;
 755                 } else if (mark) {
 756                         rxq_ctrl->rxq.mark = 1;
 757                         rxq_ctrl->flow_mark_n++;
 758                 }
 759                 if (tunnel) {
 760                         unsigned int j;
 761
 762                         /* Increase the counter matching the flow. */
 763                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 764                                 if ((tunnels_info[j].tunnel &
 765                                      dev_handle->layers) ==
 766                                     tunnels_info[j].tunnel) {
 767                                         rxq_ctrl->flow_tunnels_n[j]++;
 768                                         break;
 769                                 }
 770                         }
 771                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 772                 }
 773         }
 774 }
 775
 776 /**
 777  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
 778  *
 779  * @param[in] dev
 780  *   Pointer to the Ethernet device structure.
 781  * @param[in] flow
 782  *   Pointer to flow structure.
 783  */
 784 static void
 785 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
 786 {
 787         struct mlx5_priv *priv = dev->data->dev_private;
 788         uint32_t handle_idx;
 789         struct mlx5_flow_handle *dev_handle;
 790
 791         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
 792                        handle_idx, dev_handle, next)
 793                 flow_drv_rxq_flags_set(dev, dev_handle);
 794 }
 795
 796 /**
 797  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 798  * device flow if no other flow uses it with the same kind of request.
 799  *
 800  * @param dev
 801  *   Pointer to Ethernet device.
 802  * @param[in] dev_handle
 803  *   Pointer to the device flow handle structure.
 804  */
 805 static void
 806 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
 807                         struct mlx5_flow_handle *dev_handle)
 808 {
 809         struct mlx5_priv *priv = dev->data->dev_private;
 810         const int mark = dev_handle->mark;
 811         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
 812         struct mlx5_hrxq *hrxq;
 813         unsigned int i;
 814
 815         if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
 816                 return;
 817         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
 818                               dev_handle->rix_hrxq);
 819         if (!hrxq)
 820                 return;
 821         MLX5_ASSERT(dev->data->dev_started);
 822         for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
 823                 int idx = hrxq->ind_table->queues[i];
 824                 struct mlx5_rxq_ctrl *rxq_ctrl =
 825                         container_of((*priv->rxqs)[idx],
 826                                      struct mlx5_rxq_ctrl, rxq);
 827
 828                 if (priv->config.dv_flow_en &&
 829                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 830                     mlx5_flow_ext_mreg_supported(dev)) {
 831                         rxq_ctrl->rxq.mark = 1;
 832                         rxq_ctrl->flow_mark_n = 1;
 833                 } else if (mark) {
 834                         rxq_ctrl->flow_mark_n--;
 835                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
 836                 }
 837                 if (tunnel) {
 838                         unsigned int j;
 839
 840                         /* Decrease the counter matching the flow. */
 841                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 842                                 if ((tunnels_info[j].tunnel &
 843                                      dev_handle->layers) ==
 844                                     tunnels_info[j].tunnel) {
 845                                         rxq_ctrl->flow_tunnels_n[j]--;
 846                                         break;
 847                                 }
 848                         }
 849                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 850                 }
 851         }
 852 }
 853
 854 /**
 855  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 856  * @p flow if no other flow uses it with the same kind of request.
 857  *
 858  * @param dev
 859  *   Pointer to Ethernet device.
 860  * @param[in] flow
 861  *   Pointer to the flow.
 862  */
 863 static void
 864 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
 865 {
 866         struct mlx5_priv *priv = dev->data->dev_private;
 867         uint32_t handle_idx;
 868         struct mlx5_flow_handle *dev_handle;
 869
 870         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
 871                        handle_idx, dev_handle, next)
 872                 flow_drv_rxq_flags_trim(dev, dev_handle);
 873 }
 874
 875 /**
 876  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
 877  *
 878  * @param dev
 879  *   Pointer to Ethernet device.
 880  */
 881 static void
 882 flow_rxq_flags_clear(struct rte_eth_dev *dev)
 883 {
 884         struct mlx5_priv *priv = dev->data->dev_private;
 885         unsigned int i;
 886
 887         for (i = 0; i != priv->rxqs_n; ++i) {
 888                 struct mlx5_rxq_ctrl *rxq_ctrl;
 889                 unsigned int j;
 890
 891                 if (!(*priv->rxqs)[i])
 892                         continue;
 893                 rxq_ctrl = container_of((*priv->rxqs)[i],
 894                                         struct mlx5_rxq_ctrl, rxq);
 895                 rxq_ctrl->flow_mark_n = 0;
 896                 rxq_ctrl->rxq.mark = 0;
 897                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
 898                         rxq_ctrl->flow_tunnels_n[j] = 0;
 899                 rxq_ctrl->rxq.tunnel = 0;
 900         }
 901 }
 902
 903 /**
 904  * Set the Rx queue dynamic metadata (mask and offset) for a flow
 905  *
 906  * @param[in] dev
 907  *   Pointer to the Ethernet device structure.
 908  */
 909 void
 910 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
 911 {
 912         struct mlx5_priv *priv = dev->data->dev_private;
 913         struct mlx5_rxq_data *data;
 914         unsigned int i;
 915
 916         for (i = 0; i != priv->rxqs_n; ++i) {
 917                 if (!(*priv->rxqs)[i])
 918                         continue;
 919                 data = (*priv->rxqs)[i];
 920                 if (!rte_flow_dynf_metadata_avail()) {
 921                         data->dynf_meta = 0;
 922                         data->flow_meta_mask = 0;
 923                         data->flow_meta_offset = -1;
 924                 } else {
 925                         data->dynf_meta = 1;
 926                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
 927                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
 928                 }
 929         }
 930 }
 931
 932 /*
 933  * return a pointer to the desired action in the list of actions.
 934  *
 935  * @param[in] actions
 936  *   The list of actions to search the action in.
 937  * @param[in] action
 938  *   The action to find.
 939  *
 940  * @return
 941  *   Pointer to the action in the list, if found. NULL otherwise.
 942  */
 943 const struct rte_flow_action *
 944 mlx5_flow_find_action(const struct rte_flow_action *actions,
 945                       enum rte_flow_action_type action)
 946 {
 947         if (actions == NULL)
 948                 return NULL;
 949         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
 950                 if (actions->type == action)
 951                         return actions;
 952         return NULL;
 953 }
 954
 955 /*
 956  * Validate the flag action.
 957  *
 958  * @param[in] action_flags
 959  *   Bit-fields that holds the actions detected until now.
 960  * @param[in] attr
 961  *   Attributes of flow that includes this action.
 962  * @param[out] error
 963  *   Pointer to error structure.
 964  *
 965  * @return
 966  *   0 on success, a negative errno value otherwise and rte_errno is set.
 967  */
 968 int
 969 mlx5_flow_validate_action_flag(uint64_t action_flags,
 970                                const struct rte_flow_attr *attr,
 971                                struct rte_flow_error *error)
 972 {
 973         if (action_flags & MLX5_FLOW_ACTION_MARK)
 974                 return rte_flow_error_set(error, EINVAL,
 975                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 976                                           "can't mark and flag in same flow");
 977         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 978                 return rte_flow_error_set(error, EINVAL,
 979                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 980                                           "can't have 2 flag"
 981                                           " actions in same flow");
 982         if (attr->egress)
 983                 return rte_flow_error_set(error, ENOTSUP,
 984                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 985                                           "flag action not supported for "
 986                                           "egress");
 987         return 0;
 988 }
 989
 990 /*
 991  * Validate the mark action.
 992  *
 993  * @param[in] action
 994  *   Pointer to the queue action.
 995  * @param[in] action_flags
 996  *   Bit-fields that holds the actions detected until now.
 997  * @param[in] attr
 998  *   Attributes of flow that includes this action.
 999  * @param[out] error
1000  *   Pointer to error structure.
1001  *
1002  * @return
1003  *   0 on success, a negative errno value otherwise and rte_errno is set.
1004  */
1005 int
1006 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1007                                uint64_t action_flags,
1008                                const struct rte_flow_attr *attr,
1009                                struct rte_flow_error *error)
1010 {
1011         const struct rte_flow_action_mark *mark = action->conf;
1012
1013         if (!mark)
1014                 return rte_flow_error_set(error, EINVAL,
1015                                           RTE_FLOW_ERROR_TYPE_ACTION,
1016                                           action,
1017                                           "configuration cannot be null");
1018         if (mark->id >= MLX5_FLOW_MARK_MAX)
1019                 return rte_flow_error_set(error, EINVAL,
1020                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1021                                           &mark->id,
1022                                           "mark id must in 0 <= id < "
1023                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1024         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1025                 return rte_flow_error_set(error, EINVAL,
1026                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1027                                           "can't flag and mark in same flow");
1028         if (action_flags & MLX5_FLOW_ACTION_MARK)
1029                 return rte_flow_error_set(error, EINVAL,
1030                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1031                                           "can't have 2 mark actions in same"
1032                                           " flow");
1033         if (attr->egress)
1034                 return rte_flow_error_set(error, ENOTSUP,
1035                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1036                                           "mark action not supported for "
1037                                           "egress");
1038         return 0;
1039 }
1040
1041 /*
1042  * Validate the drop action.
1043  *
1044  * @param[in] action_flags
1045  *   Bit-fields that holds the actions detected until now.
1046  * @param[in] attr
1047  *   Attributes of flow that includes this action.
1048  * @param[out] error
1049  *   Pointer to error structure.
1050  *
1051  * @return
1052  *   0 on success, a negative errno value otherwise and rte_errno is set.
1053  */
1054 int
1055 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1056                                const struct rte_flow_attr *attr,
1057                                struct rte_flow_error *error)
1058 {
1059         if (attr->egress)
1060                 return rte_flow_error_set(error, ENOTSUP,
1061                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1062                                           "drop action not supported for "
1063                                           "egress");
1064         return 0;
1065 }
1066
1067 /*
1068  * Validate the queue action.
1069  *
1070  * @param[in] action
1071  *   Pointer to the queue action.
1072  * @param[in] action_flags
1073  *   Bit-fields that holds the actions detected until now.
1074  * @param[in] dev
1075  *   Pointer to the Ethernet device structure.
1076  * @param[in] attr
1077  *   Attributes of flow that includes this action.
1078  * @param[out] error
1079  *   Pointer to error structure.
1080  *
1081  * @return
1082  *   0 on success, a negative errno value otherwise and rte_errno is set.
1083  */
1084 int
1085 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1086                                 uint64_t action_flags,
1087                                 struct rte_eth_dev *dev,
1088                                 const struct rte_flow_attr *attr,
1089                                 struct rte_flow_error *error)
1090 {
1091         struct mlx5_priv *priv = dev->data->dev_private;
1092         const struct rte_flow_action_queue *queue = action->conf;
1093
1094         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1095                 return rte_flow_error_set(error, EINVAL,
1096                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1097                                           "can't have 2 fate actions in"
1098                                           " same flow");
1099         if (!priv->rxqs_n)
1100                 return rte_flow_error_set(error, EINVAL,
1101                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1102                                           NULL, "No Rx queues configured");
1103         if (queue->index >= priv->rxqs_n)
1104                 return rte_flow_error_set(error, EINVAL,
1105                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1106                                           &queue->index,
1107                                           "queue index out of range");
1108         if (!(*priv->rxqs)[queue->index])
1109                 return rte_flow_error_set(error, EINVAL,
1110                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1111                                           &queue->index,
1112                                           "queue is not configured");
1113         if (attr->egress)
1114                 return rte_flow_error_set(error, ENOTSUP,
1115                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1116                                           "queue action not supported for "
1117                                           "egress");
1118         return 0;
1119 }
1120
1121 /*
1122  * Validate the rss action.
1123  *
1124  * @param[in] action
1125  *   Pointer to the queue action.
1126  * @param[in] action_flags
1127  *   Bit-fields that holds the actions detected until now.
1128  * @param[in] dev
1129  *   Pointer to the Ethernet device structure.
1130  * @param[in] attr
1131  *   Attributes of flow that includes this action.
1132  * @param[in] item_flags
1133  *   Items that were detected.
1134  * @param[out] error
1135  *   Pointer to error structure.
1136  *
1137  * @return
1138  *   0 on success, a negative errno value otherwise and rte_errno is set.
1139  */
1140 int
1141 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1142                               uint64_t action_flags,
1143                               struct rte_eth_dev *dev,
1144                               const struct rte_flow_attr *attr,
1145                               uint64_t item_flags,
1146                               struct rte_flow_error *error)
1147 {
1148         struct mlx5_priv *priv = dev->data->dev_private;
1149         const struct rte_flow_action_rss *rss = action->conf;
1150         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1151         unsigned int i;
1152
1153         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1154                 return rte_flow_error_set(error, EINVAL,
1155                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1156                                           "can't have 2 fate actions"
1157                                           " in same flow");
1158         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1159             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1160                 return rte_flow_error_set(error, ENOTSUP,
1161                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1162                                           &rss->func,
1163                                           "RSS hash function not supported");
1164 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1165         if (rss->level > 2)
1166 #else
1167         if (rss->level > 1)
1168 #endif
1169                 return rte_flow_error_set(error, ENOTSUP,
1170                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1171                                           &rss->level,
1172                                           "tunnel RSS is not supported");
1173         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1174         if (rss->key_len == 0 && rss->key != NULL)
1175                 return rte_flow_error_set(error, ENOTSUP,
1176                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1177                                           &rss->key_len,
1178                                           "RSS hash key length 0");
1179         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1180                 return rte_flow_error_set(error, ENOTSUP,
1181                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1182                                           &rss->key_len,
1183                                           "RSS hash key too small");
1184         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1185                 return rte_flow_error_set(error, ENOTSUP,
1186                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1187                                           &rss->key_len,
1188                                           "RSS hash key too large");
1189         if (rss->queue_num > priv->config.ind_table_max_size)
1190                 return rte_flow_error_set(error, ENOTSUP,
1191                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1192                                           &rss->queue_num,
1193                                           "number of queues too large");
1194         if (rss->types & MLX5_RSS_HF_MASK)
1195                 return rte_flow_error_set(error, ENOTSUP,
1196                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1197                                           &rss->types,
1198                                           "some RSS protocols are not"
1199                                           " supported");
1200         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1201             !(rss->types & ETH_RSS_IP))
1202                 return rte_flow_error_set(error, EINVAL,
1203                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1204                                           "L3 partial RSS requested but L3 RSS"
1205                                           " type not specified");
1206         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1207             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1208                 return rte_flow_error_set(error, EINVAL,
1209                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1210                                           "L4 partial RSS requested but L4 RSS"
1211                                           " type not specified");
1212         if (!priv->rxqs_n)
1213                 return rte_flow_error_set(error, EINVAL,
1214                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1215                                           NULL, "No Rx queues configured");
1216         if (!rss->queue_num)
1217                 return rte_flow_error_set(error, EINVAL,
1218                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1219                                           NULL, "No queues configured");
1220         for (i = 0; i != rss->queue_num; ++i) {
1221                 if (rss->queue[i] >= priv->rxqs_n)
1222                         return rte_flow_error_set
1223                                 (error, EINVAL,
1224                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1225                                  &rss->queue[i], "queue index out of range");
1226                 if (!(*priv->rxqs)[rss->queue[i]])
1227                         return rte_flow_error_set
1228                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1229                                  &rss->queue[i], "queue is not configured");
1230         }
1231         if (attr->egress)
1232                 return rte_flow_error_set(error, ENOTSUP,
1233                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1234                                           "rss action not supported for "
1235                                           "egress");
1236         if (rss->level > 1 &&  !tunnel)
1237                 return rte_flow_error_set(error, EINVAL,
1238                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1239                                           "inner RSS is not supported for "
1240                                           "non-tunnel flows");
1241         return 0;
1242 }
1243
1244 /*
1245  * Validate the count action.
1246  *
1247  * @param[in] dev
1248  *   Pointer to the Ethernet device structure.
1249  * @param[in] attr
1250  *   Attributes of flow that includes this action.
1251  * @param[out] error
1252  *   Pointer to error structure.
1253  *
1254  * @return
1255  *   0 on success, a negative errno value otherwise and rte_errno is set.
1256  */
1257 int
1258 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1259                                 const struct rte_flow_attr *attr,
1260                                 struct rte_flow_error *error)
1261 {
1262         if (attr->egress)
1263                 return rte_flow_error_set(error, ENOTSUP,
1264                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1265                                           "count action not supported for "
1266                                           "egress");
1267         return 0;
1268 }
1269
1270 /**
1271  * Verify the @p attributes will be correctly understood by the NIC and store
1272  * them in the @p flow if everything is correct.
1273  *
1274  * @param[in] dev
1275  *   Pointer to the Ethernet device structure.
1276  * @param[in] attributes
1277  *   Pointer to flow attributes
1278  * @param[out] error
1279  *   Pointer to error structure.
1280  *
1281  * @return
1282  *   0 on success, a negative errno value otherwise and rte_errno is set.
1283  */
1284 int
1285 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1286                               const struct rte_flow_attr *attributes,
1287                               struct rte_flow_error *error)
1288 {
1289         struct mlx5_priv *priv = dev->data->dev_private;
1290         uint32_t priority_max = priv->config.flow_prio - 1;
1291
1292         if (attributes->group)
1293                 return rte_flow_error_set(error, ENOTSUP,
1294                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1295                                           NULL, "groups is not supported");
1296         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1297             attributes->priority >= priority_max)
1298                 return rte_flow_error_set(error, ENOTSUP,
1299                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1300                                           NULL, "priority out of range");
1301         if (attributes->egress)
1302                 return rte_flow_error_set(error, ENOTSUP,
1303                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1304                                           "egress is not supported");
1305         if (attributes->transfer && !priv->config.dv_esw_en)
1306                 return rte_flow_error_set(error, ENOTSUP,
1307                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1308                                           NULL, "transfer is not supported");
1309         if (!attributes->ingress)
1310                 return rte_flow_error_set(error, EINVAL,
1311                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1312                                           NULL,
1313                                           "ingress attribute is mandatory");
1314         return 0;
1315 }
1316
1317 /**
1318  * Validate ICMP6 item.
1319  *
1320  * @param[in] item
1321  *   Item specification.
1322  * @param[in] item_flags
1323  *   Bit-fields that holds the items detected until now.
1324  * @param[out] error
1325  *   Pointer to error structure.
1326  *
1327  * @return
1328  *   0 on success, a negative errno value otherwise and rte_errno is set.
1329  */
1330 int
1331 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1332                                uint64_t item_flags,
1333                                uint8_t target_protocol,
1334                                struct rte_flow_error *error)
1335 {
1336         const struct rte_flow_item_icmp6 *mask = item->mask;
1337         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1338         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1339                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1340         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1341                                       MLX5_FLOW_LAYER_OUTER_L4;
1342         int ret;
1343
1344         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1345                 return rte_flow_error_set(error, EINVAL,
1346                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1347                                           "protocol filtering not compatible"
1348                                           " with ICMP6 layer");
1349         if (!(item_flags & l3m))
1350                 return rte_flow_error_set(error, EINVAL,
1351                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1352                                           "IPv6 is mandatory to filter on"
1353                                           " ICMP6");
1354         if (item_flags & l4m)
1355                 return rte_flow_error_set(error, EINVAL,
1356                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1357                                           "multiple L4 layers not supported");
1358         if (!mask)
1359                 mask = &rte_flow_item_icmp6_mask;
1360         ret = mlx5_flow_item_acceptable
1361                 (item, (const uint8_t *)mask,
1362                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1363                  sizeof(struct rte_flow_item_icmp6), error);
1364         if (ret < 0)
1365                 return ret;
1366         return 0;
1367 }
1368
1369 /**
1370  * Validate ICMP item.
1371  *
1372  * @param[in] item
1373  *   Item specification.
1374  * @param[in] item_flags
1375  *   Bit-fields that holds the items detected until now.
1376  * @param[out] error
1377  *   Pointer to error structure.
1378  *
1379  * @return
1380  *   0 on success, a negative errno value otherwise and rte_errno is set.
1381  */
1382 int
1383 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1384                              uint64_t item_flags,
1385                              uint8_t target_protocol,
1386                              struct rte_flow_error *error)
1387 {
1388         const struct rte_flow_item_icmp *mask = item->mask;
1389         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1390         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1391                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1392         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1393                                       MLX5_FLOW_LAYER_OUTER_L4;
1394         int ret;
1395
1396         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1397                 return rte_flow_error_set(error, EINVAL,
1398                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1399                                           "protocol filtering not compatible"
1400                                           " with ICMP layer");
1401         if (!(item_flags & l3m))
1402                 return rte_flow_error_set(error, EINVAL,
1403                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1404                                           "IPv4 is mandatory to filter"
1405                                           " on ICMP");
1406         if (item_flags & l4m)
1407                 return rte_flow_error_set(error, EINVAL,
1408                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1409                                           "multiple L4 layers not supported");
1410         if (!mask)
1411                 mask = &rte_flow_item_icmp_mask;
1412         ret = mlx5_flow_item_acceptable
1413                 (item, (const uint8_t *)mask,
1414                  (const uint8_t *)&rte_flow_item_icmp_mask,
1415                  sizeof(struct rte_flow_item_icmp), error);
1416         if (ret < 0)
1417                 return ret;
1418         return 0;
1419 }
1420
1421 /**
1422  * Validate Ethernet item.
1423  *
1424  * @param[in] item
1425  *   Item specification.
1426  * @param[in] item_flags
1427  *   Bit-fields that holds the items detected until now.
1428  * @param[out] error
1429  *   Pointer to error structure.
1430  *
1431  * @return
1432  *   0 on success, a negative errno value otherwise and rte_errno is set.
1433  */
1434 int
1435 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1436                             uint64_t item_flags,
1437                             struct rte_flow_error *error)
1438 {
1439         const struct rte_flow_item_eth *mask = item->mask;
1440         const struct rte_flow_item_eth nic_mask = {
1441                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1442                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1443                 .type = RTE_BE16(0xffff),
1444         };
1445         int ret;
1446         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1447         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1448                                        MLX5_FLOW_LAYER_OUTER_L2;
1449
1450         if (item_flags & ethm)
1451                 return rte_flow_error_set(error, ENOTSUP,
1452                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1453                                           "multiple L2 layers not supported");
1454         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1455             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1456                 return rte_flow_error_set(error, EINVAL,
1457                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1458                                           "L2 layer should not follow "
1459                                           "L3 layers");
1460         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1461             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1462                 return rte_flow_error_set(error, EINVAL,
1463                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1464                                           "L2 layer should not follow VLAN");
1465         if (!mask)
1466                 mask = &rte_flow_item_eth_mask;
1467         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1468                                         (const uint8_t *)&nic_mask,
1469                                         sizeof(struct rte_flow_item_eth),
1470                                         error);
1471         return ret;
1472 }
1473
1474 /**
1475  * Validate VLAN item.
1476  *
1477  * @param[in] item
1478  *   Item specification.
1479  * @param[in] item_flags
1480  *   Bit-fields that holds the items detected until now.
1481  * @param[in] dev
1482  *   Ethernet device flow is being created on.
1483  * @param[out] error
1484  *   Pointer to error structure.
1485  *
1486  * @return
1487  *   0 on success, a negative errno value otherwise and rte_errno is set.
1488  */
1489 int
1490 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1491                              uint64_t item_flags,
1492                              struct rte_eth_dev *dev,
1493                              struct rte_flow_error *error)
1494 {
1495         const struct rte_flow_item_vlan *spec = item->spec;
1496         const struct rte_flow_item_vlan *mask = item->mask;
1497         const struct rte_flow_item_vlan nic_mask = {
1498                 .tci = RTE_BE16(UINT16_MAX),
1499                 .inner_type = RTE_BE16(UINT16_MAX),
1500         };
1501         uint16_t vlan_tag = 0;
1502         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1503         int ret;
1504         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1505                                         MLX5_FLOW_LAYER_INNER_L4) :
1506                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1507                                         MLX5_FLOW_LAYER_OUTER_L4);
1508         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1509                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1510
1511         if (item_flags & vlanm)
1512                 return rte_flow_error_set(error, EINVAL,
1513                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1514                                           "multiple VLAN layers not supported");
1515         else if ((item_flags & l34m) != 0)
1516                 return rte_flow_error_set(error, EINVAL,
1517                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1518                                           "VLAN cannot follow L3/L4 layer");
1519         if (!mask)
1520                 mask = &rte_flow_item_vlan_mask;
1521         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1522                                         (const uint8_t *)&nic_mask,
1523                                         sizeof(struct rte_flow_item_vlan),
1524                                         error);
1525         if (ret)
1526                 return ret;
1527         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1528                 struct mlx5_priv *priv = dev->data->dev_private;
1529
1530                 if (priv->vmwa_context) {
1531                         /*
1532                          * Non-NULL context means we have a virtual machine
1533                          * and SR-IOV enabled, we have to create VLAN interface
1534                          * to make hypervisor to setup E-Switch vport
1535                          * context correctly. We avoid creating the multiple
1536                          * VLAN interfaces, so we cannot support VLAN tag mask.
1537                          */
1538                         return rte_flow_error_set(error, EINVAL,
1539                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1540                                                   item,
1541                                                   "VLAN tag mask is not"
1542                                                   " supported in virtual"
1543                                                   " environment");
1544                 }
1545         }
1546         if (spec) {
1547                 vlan_tag = spec->tci;
1548                 vlan_tag &= mask->tci;
1549         }
1550         /*
1551          * From verbs perspective an empty VLAN is equivalent
1552          * to a packet without VLAN layer.
1553          */
1554         if (!vlan_tag)
1555                 return rte_flow_error_set(error, EINVAL,
1556                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1557                                           item->spec,
1558                                           "VLAN cannot be empty");
1559         return 0;
1560 }
1561
1562 /**
1563  * Validate IPV4 item.
1564  *
1565  * @param[in] item
1566  *   Item specification.
1567  * @param[in] item_flags
1568  *   Bit-fields that holds the items detected until now.
1569  * @param[in] acc_mask
1570  *   Acceptable mask, if NULL default internal default mask
1571  *   will be used to check whether item fields are supported.
1572  * @param[out] error
1573  *   Pointer to error structure.
1574  *
1575  * @return
1576  *   0 on success, a negative errno value otherwise and rte_errno is set.
1577  */
1578 int
1579 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1580                              uint64_t item_flags,
1581                              uint64_t last_item,
1582                              uint16_t ether_type,
1583                              const struct rte_flow_item_ipv4 *acc_mask,
1584                              struct rte_flow_error *error)
1585 {
1586         const struct rte_flow_item_ipv4 *mask = item->mask;
1587         const struct rte_flow_item_ipv4 *spec = item->spec;
1588         const struct rte_flow_item_ipv4 nic_mask = {
1589                 .hdr = {
1590                         .src_addr = RTE_BE32(0xffffffff),
1591                         .dst_addr = RTE_BE32(0xffffffff),
1592                         .type_of_service = 0xff,
1593                         .next_proto_id = 0xff,
1594                 },
1595         };
1596         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1597         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1598                                       MLX5_FLOW_LAYER_OUTER_L3;
1599         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1600                                       MLX5_FLOW_LAYER_OUTER_L4;
1601         int ret;
1602         uint8_t next_proto = 0xFF;
1603         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1604                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1605                                   MLX5_FLOW_LAYER_INNER_VLAN);
1606
1607         if ((last_item & l2_vlan) && ether_type &&
1608             ether_type != RTE_ETHER_TYPE_IPV4)
1609                 return rte_flow_error_set(error, EINVAL,
1610                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1611                                           "IPv4 cannot follow L2/VLAN layer "
1612                                           "which ether type is not IPv4");
1613         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1614                 if (mask && spec)
1615                         next_proto = mask->hdr.next_proto_id &
1616                                      spec->hdr.next_proto_id;
1617                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1618                         return rte_flow_error_set(error, EINVAL,
1619                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1620                                                   item,
1621                                                   "multiple tunnel "
1622                                                   "not supported");
1623         }
1624         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1625                 return rte_flow_error_set(error, EINVAL,
1626                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1627                                           "wrong tunnel type - IPv6 specified "
1628                                           "but IPv4 item provided");
1629         if (item_flags & l3m)
1630                 return rte_flow_error_set(error, ENOTSUP,
1631                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1632                                           "multiple L3 layers not supported");
1633         else if (item_flags & l4m)
1634                 return rte_flow_error_set(error, EINVAL,
1635                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1636                                           "L3 cannot follow an L4 layer.");
1637         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1638                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1639                 return rte_flow_error_set(error, EINVAL,
1640                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1641                                           "L3 cannot follow an NVGRE layer.");
1642         if (!mask)
1643                 mask = &rte_flow_item_ipv4_mask;
1644         else if (mask->hdr.next_proto_id != 0 &&
1645                  mask->hdr.next_proto_id != 0xff)
1646                 return rte_flow_error_set(error, EINVAL,
1647                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1648                                           "partial mask is not supported"
1649                                           " for protocol");
1650         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1651                                         acc_mask ? (const uint8_t *)acc_mask
1652                                                  : (const uint8_t *)&nic_mask,
1653                                         sizeof(struct rte_flow_item_ipv4),
1654                                         error);
1655         if (ret < 0)
1656                 return ret;
1657         return 0;
1658 }
1659
1660 /**
1661  * Validate IPV6 item.
1662  *
1663  * @param[in] item
1664  *   Item specification.
1665  * @param[in] item_flags
1666  *   Bit-fields that holds the items detected until now.
1667  * @param[in] acc_mask
1668  *   Acceptable mask, if NULL default internal default mask
1669  *   will be used to check whether item fields are supported.
1670  * @param[out] error
1671  *   Pointer to error structure.
1672  *
1673  * @return
1674  *   0 on success, a negative errno value otherwise and rte_errno is set.
1675  */
1676 int
1677 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1678                              uint64_t item_flags,
1679                              uint64_t last_item,
1680                              uint16_t ether_type,
1681                              const struct rte_flow_item_ipv6 *acc_mask,
1682                              struct rte_flow_error *error)
1683 {
1684         const struct rte_flow_item_ipv6 *mask = item->mask;
1685         const struct rte_flow_item_ipv6 *spec = item->spec;
1686         const struct rte_flow_item_ipv6 nic_mask = {
1687                 .hdr = {
1688                         .src_addr =
1689                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1690                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1691                         .dst_addr =
1692                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1693                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1694                         .vtc_flow = RTE_BE32(0xffffffff),
1695                         .proto = 0xff,
1696                 },
1697         };
1698         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1699         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1700                                       MLX5_FLOW_LAYER_OUTER_L3;
1701         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1702                                       MLX5_FLOW_LAYER_OUTER_L4;
1703         int ret;
1704         uint8_t next_proto = 0xFF;
1705         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1706                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1707                                   MLX5_FLOW_LAYER_INNER_VLAN);
1708
1709         if ((last_item & l2_vlan) && ether_type &&
1710             ether_type != RTE_ETHER_TYPE_IPV6)
1711                 return rte_flow_error_set(error, EINVAL,
1712                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1713                                           "IPv6 cannot follow L2/VLAN layer "
1714                                           "which ether type is not IPv6");
1715         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1716                 if (mask && spec)
1717                         next_proto = mask->hdr.proto & spec->hdr.proto;
1718                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1719                         return rte_flow_error_set(error, EINVAL,
1720                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1721                                                   item,
1722                                                   "multiple tunnel "
1723                                                   "not supported");
1724         }
1725         if (item_flags & MLX5_FLOW_LAYER_IPIP)
1726                 return rte_flow_error_set(error, EINVAL,
1727                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1728                                           "wrong tunnel type - IPv4 specified "
1729                                           "but IPv6 item provided");
1730         if (item_flags & l3m)
1731                 return rte_flow_error_set(error, ENOTSUP,
1732                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1733                                           "multiple L3 layers not supported");
1734         else if (item_flags & l4m)
1735                 return rte_flow_error_set(error, EINVAL,
1736                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1737                                           "L3 cannot follow an L4 layer.");
1738         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1739                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1740                 return rte_flow_error_set(error, EINVAL,
1741                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1742                                           "L3 cannot follow an NVGRE layer.");
1743         if (!mask)
1744                 mask = &rte_flow_item_ipv6_mask;
1745         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1746                                         acc_mask ? (const uint8_t *)acc_mask
1747                                                  : (const uint8_t *)&nic_mask,
1748                                         sizeof(struct rte_flow_item_ipv6),
1749                                         error);
1750         if (ret < 0)
1751                 return ret;
1752         return 0;
1753 }
1754
1755 /**
1756  * Validate UDP item.
1757  *
1758  * @param[in] item
1759  *   Item specification.
1760  * @param[in] item_flags
1761  *   Bit-fields that holds the items detected until now.
1762  * @param[in] target_protocol
1763  *   The next protocol in the previous item.
1764  * @param[in] flow_mask
1765  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1766  * @param[out] error
1767  *   Pointer to error structure.
1768  *
1769  * @return
1770  *   0 on success, a negative errno value otherwise and rte_errno is set.
1771  */
1772 int
1773 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1774                             uint64_t item_flags,
1775                             uint8_t target_protocol,
1776                             struct rte_flow_error *error)
1777 {
1778         const struct rte_flow_item_udp *mask = item->mask;
1779         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1780         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1781                                       MLX5_FLOW_LAYER_OUTER_L3;
1782         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1783                                       MLX5_FLOW_LAYER_OUTER_L4;
1784         int ret;
1785
1786         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1787                 return rte_flow_error_set(error, EINVAL,
1788                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1789                                           "protocol filtering not compatible"
1790                                           " with UDP layer");
1791         if (!(item_flags & l3m))
1792                 return rte_flow_error_set(error, EINVAL,
1793                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1794                                           "L3 is mandatory to filter on L4");
1795         if (item_flags & l4m)
1796                 return rte_flow_error_set(error, EINVAL,
1797                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1798                                           "multiple L4 layers not supported");
1799         if (!mask)
1800                 mask = &rte_flow_item_udp_mask;
1801         ret = mlx5_flow_item_acceptable
1802                 (item, (const uint8_t *)mask,
1803                  (const uint8_t *)&rte_flow_item_udp_mask,
1804                  sizeof(struct rte_flow_item_udp), error);
1805         if (ret < 0)
1806                 return ret;
1807         return 0;
1808 }
1809
1810 /**
1811  * Validate TCP item.
1812  *
1813  * @param[in] item
1814  *   Item specification.
1815  * @param[in] item_flags
1816  *   Bit-fields that holds the items detected until now.
1817  * @param[in] target_protocol
1818  *   The next protocol in the previous item.
1819  * @param[out] error
1820  *   Pointer to error structure.
1821  *
1822  * @return
1823  *   0 on success, a negative errno value otherwise and rte_errno is set.
1824  */
1825 int
1826 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1827                             uint64_t item_flags,
1828                             uint8_t target_protocol,
1829                             const struct rte_flow_item_tcp *flow_mask,
1830                             struct rte_flow_error *error)
1831 {
1832         const struct rte_flow_item_tcp *mask = item->mask;
1833         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1834         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1835                                       MLX5_FLOW_LAYER_OUTER_L3;
1836         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1837                                       MLX5_FLOW_LAYER_OUTER_L4;
1838         int ret;
1839
1840         MLX5_ASSERT(flow_mask);
1841         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1842                 return rte_flow_error_set(error, EINVAL,
1843                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1844                                           "protocol filtering not compatible"
1845                                           " with TCP layer");
1846         if (!(item_flags & l3m))
1847                 return rte_flow_error_set(error, EINVAL,
1848                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1849                                           "L3 is mandatory to filter on L4");
1850         if (item_flags & l4m)
1851                 return rte_flow_error_set(error, EINVAL,
1852                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1853                                           "multiple L4 layers not supported");
1854         if (!mask)
1855                 mask = &rte_flow_item_tcp_mask;
1856         ret = mlx5_flow_item_acceptable
1857                 (item, (const uint8_t *)mask,
1858                  (const uint8_t *)flow_mask,
1859                  sizeof(struct rte_flow_item_tcp), error);
1860         if (ret < 0)
1861                 return ret;
1862         return 0;
1863 }
1864
1865 /**
1866  * Validate VXLAN item.
1867  *
1868  * @param[in] item
1869  *   Item specification.
1870  * @param[in] item_flags
1871  *   Bit-fields that holds the items detected until now.
1872  * @param[in] target_protocol
1873  *   The next protocol in the previous item.
1874  * @param[out] error
1875  *   Pointer to error structure.
1876  *
1877  * @return
1878  *   0 on success, a negative errno value otherwise and rte_errno is set.
1879  */
1880 int
1881 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1882                               uint64_t item_flags,
1883                               struct rte_flow_error *error)
1884 {
1885         const struct rte_flow_item_vxlan *spec = item->spec;
1886         const struct rte_flow_item_vxlan *mask = item->mask;
1887         int ret;
1888         union vni {
1889                 uint32_t vlan_id;
1890                 uint8_t vni[4];
1891         } id = { .vlan_id = 0, };
1892
1893
1894         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1895                 return rte_flow_error_set(error, ENOTSUP,
1896                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1897                                           "multiple tunnel layers not"
1898                                           " supported");
1899         /*
1900          * Verify only UDPv4 is present as defined in
1901          * https://tools.ietf.org/html/rfc7348
1902          */
1903         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1904                 return rte_flow_error_set(error, EINVAL,
1905                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1906                                           "no outer UDP layer found");
1907         if (!mask)
1908                 mask = &rte_flow_item_vxlan_mask;
1909         ret = mlx5_flow_item_acceptable
1910                 (item, (const uint8_t *)mask,
1911                  (const uint8_t *)&rte_flow_item_vxlan_mask,
1912                  sizeof(struct rte_flow_item_vxlan),
1913                  error);
1914         if (ret < 0)
1915                 return ret;
1916         if (spec) {
1917                 memcpy(&id.vni[1], spec->vni, 3);
1918                 memcpy(&id.vni[1], mask->vni, 3);
1919         }
1920         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1921                 return rte_flow_error_set(error, ENOTSUP,
1922                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1923                                           "VXLAN tunnel must be fully defined");
1924         return 0;
1925 }
1926
1927 /**
1928  * Validate VXLAN_GPE item.
1929  *
1930  * @param[in] item
1931  *   Item specification.
1932  * @param[in] item_flags
1933  *   Bit-fields that holds the items detected until now.
1934  * @param[in] priv
1935  *   Pointer to the private data structure.
1936  * @param[in] target_protocol
1937  *   The next protocol in the previous item.
1938  * @param[out] error
1939  *   Pointer to error structure.
1940  *
1941  * @return
1942  *   0 on success, a negative errno value otherwise and rte_errno is set.
1943  */
1944 int
1945 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1946                                   uint64_t item_flags,
1947                                   struct rte_eth_dev *dev,
1948                                   struct rte_flow_error *error)
1949 {
1950         struct mlx5_priv *priv = dev->data->dev_private;
1951         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1952         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1953         int ret;
1954         union vni {
1955                 uint32_t vlan_id;
1956                 uint8_t vni[4];
1957         } id = { .vlan_id = 0, };
1958
1959         if (!priv->config.l3_vxlan_en)
1960                 return rte_flow_error_set(error, ENOTSUP,
1961                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1962                                           "L3 VXLAN is not enabled by device"
1963                                           " parameter and/or not configured in"
1964                                           " firmware");
1965         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1966                 return rte_flow_error_set(error, ENOTSUP,
1967                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1968                                           "multiple tunnel layers not"
1969                                           " supported");
1970         /*
1971          * Verify only UDPv4 is present as defined in
1972          * https://tools.ietf.org/html/rfc7348
1973          */
1974         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1975                 return rte_flow_error_set(error, EINVAL,
1976                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1977                                           "no outer UDP layer found");
1978         if (!mask)
1979                 mask = &rte_flow_item_vxlan_gpe_mask;
1980         ret = mlx5_flow_item_acceptable
1981                 (item, (const uint8_t *)mask,
1982                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1983                  sizeof(struct rte_flow_item_vxlan_gpe),
1984                  error);
1985         if (ret < 0)
1986                 return ret;
1987         if (spec) {
1988                 if (spec->protocol)
1989                         return rte_flow_error_set(error, ENOTSUP,
1990                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1991                                                   item,
1992                                                   "VxLAN-GPE protocol"
1993                                                   " not supported");
1994                 memcpy(&id.vni[1], spec->vni, 3);
1995                 memcpy(&id.vni[1], mask->vni, 3);
1996         }
1997         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1998                 return rte_flow_error_set(error, ENOTSUP,
1999                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2000                                           "VXLAN-GPE tunnel must be fully"
2001                                           " defined");
2002         return 0;
2003 }
2004 /**
2005  * Validate GRE Key item.
2006  *
2007  * @param[in] item
2008  *   Item specification.
2009  * @param[in] item_flags
2010  *   Bit flags to mark detected items.
2011  * @param[in] gre_item
2012  *   Pointer to gre_item
2013  * @param[out] error
2014  *   Pointer to error structure.
2015  *
2016  * @return
2017  *   0 on success, a negative errno value otherwise and rte_errno is set.
2018  */
2019 int
2020 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2021                                 uint64_t item_flags,
2022                                 const struct rte_flow_item *gre_item,
2023                                 struct rte_flow_error *error)
2024 {
2025         const rte_be32_t *mask = item->mask;
2026         int ret = 0;
2027         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2028         const struct rte_flow_item_gre *gre_spec;
2029         const struct rte_flow_item_gre *gre_mask;
2030
2031         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2032                 return rte_flow_error_set(error, ENOTSUP,
2033                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2034                                           "Multiple GRE key not support");
2035         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2036                 return rte_flow_error_set(error, ENOTSUP,
2037                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2038                                           "No preceding GRE header");
2039         if (item_flags & MLX5_FLOW_LAYER_INNER)
2040                 return rte_flow_error_set(error, ENOTSUP,
2041                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2042                                           "GRE key following a wrong item");
2043         gre_mask = gre_item->mask;
2044         if (!gre_mask)
2045                 gre_mask = &rte_flow_item_gre_mask;
2046         gre_spec = gre_item->spec;
2047         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2048                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2049                 return rte_flow_error_set(error, EINVAL,
2050                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2051                                           "Key bit must be on");
2052
2053         if (!mask)
2054                 mask = &gre_key_default_mask;
2055         ret = mlx5_flow_item_acceptable
2056                 (item, (const uint8_t *)mask,
2057                  (const uint8_t *)&gre_key_default_mask,
2058                  sizeof(rte_be32_t), error);
2059         return ret;
2060 }
2061
2062 /**
2063  * Validate GRE item.
2064  *
2065  * @param[in] item
2066  *   Item specification.
2067  * @param[in] item_flags
2068  *   Bit flags to mark detected items.
2069  * @param[in] target_protocol
2070  *   The next protocol in the previous item.
2071  * @param[out] error
2072  *   Pointer to error structure.
2073  *
2074  * @return
2075  *   0 on success, a negative errno value otherwise and rte_errno is set.
2076  */
2077 int
2078 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2079                             uint64_t item_flags,
2080                             uint8_t target_protocol,
2081                             struct rte_flow_error *error)
2082 {
2083         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2084         const struct rte_flow_item_gre *mask = item->mask;
2085         int ret;
2086         const struct rte_flow_item_gre nic_mask = {
2087                 .c_rsvd0_ver = RTE_BE16(0xB000),
2088                 .protocol = RTE_BE16(UINT16_MAX),
2089         };
2090
2091         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2092                 return rte_flow_error_set(error, EINVAL,
2093                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2094                                           "protocol filtering not compatible"
2095                                           " with this GRE layer");
2096         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2097                 return rte_flow_error_set(error, ENOTSUP,
2098                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2099                                           "multiple tunnel layers not"
2100                                           " supported");
2101         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2102                 return rte_flow_error_set(error, ENOTSUP,
2103                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2104                                           "L3 Layer is missing");
2105         if (!mask)
2106                 mask = &rte_flow_item_gre_mask;
2107         ret = mlx5_flow_item_acceptable
2108                 (item, (const uint8_t *)mask,
2109                  (const uint8_t *)&nic_mask,
2110                  sizeof(struct rte_flow_item_gre), error);
2111         if (ret < 0)
2112                 return ret;
2113 #ifndef HAVE_MLX5DV_DR
2114 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2115         if (spec && (spec->protocol & mask->protocol))
2116                 return rte_flow_error_set(error, ENOTSUP,
2117                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2118                                           "without MPLS support the"
2119                                           " specification cannot be used for"
2120                                           " filtering");
2121 #endif
2122 #endif
2123         return 0;
2124 }
2125
2126 /**
2127  * Validate Geneve item.
2128  *
2129  * @param[in] item
2130  *   Item specification.
2131  * @param[in] itemFlags
2132  *   Bit-fields that holds the items detected until now.
2133  * @param[in] enPriv
2134  *   Pointer to the private data structure.
2135  * @param[out] error
2136  *   Pointer to error structure.
2137  *
2138  * @return
2139  *   0 on success, a negative errno value otherwise and rte_errno is set.
2140  */
2141
2142 int
2143 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2144                                uint64_t item_flags,
2145                                struct rte_eth_dev *dev,
2146                                struct rte_flow_error *error)
2147 {
2148         struct mlx5_priv *priv = dev->data->dev_private;
2149         const struct rte_flow_item_geneve *spec = item->spec;
2150         const struct rte_flow_item_geneve *mask = item->mask;
2151         int ret;
2152         uint16_t gbhdr;
2153         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2154                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2155         const struct rte_flow_item_geneve nic_mask = {
2156                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2157                 .vni = "\xff\xff\xff",
2158                 .protocol = RTE_BE16(UINT16_MAX),
2159         };
2160
2161         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2162                 return rte_flow_error_set(error, ENOTSUP,
2163                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2164                                           "L3 Geneve is not enabled by device"
2165                                           " parameter and/or not configured in"
2166                                           " firmware");
2167         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2168                 return rte_flow_error_set(error, ENOTSUP,
2169                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2170                                           "multiple tunnel layers not"
2171                                           " supported");
2172         /*
2173          * Verify only UDPv4 is present as defined in
2174          * https://tools.ietf.org/html/rfc7348
2175          */
2176         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2177                 return rte_flow_error_set(error, EINVAL,
2178                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2179                                           "no outer UDP layer found");
2180         if (!mask)
2181                 mask = &rte_flow_item_geneve_mask;
2182         ret = mlx5_flow_item_acceptable
2183                                   (item, (const uint8_t *)mask,
2184                                    (const uint8_t *)&nic_mask,
2185                                    sizeof(struct rte_flow_item_geneve), error);
2186         if (ret)
2187                 return ret;
2188         if (spec) {
2189                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2190                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2191                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2192                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2193                         return rte_flow_error_set(error, ENOTSUP,
2194                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2195                                                   item,
2196                                                   "Geneve protocol unsupported"
2197                                                   " fields are being used");
2198                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2199                         return rte_flow_error_set
2200                                         (error, ENOTSUP,
2201                                          RTE_FLOW_ERROR_TYPE_ITEM,
2202                                          item,
2203                                          "Unsupported Geneve options length");
2204         }
2205         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2206                 return rte_flow_error_set
2207                                     (error, ENOTSUP,
2208                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2209                                      "Geneve tunnel must be fully defined");
2210         return 0;
2211 }
2212
2213 /**
2214  * Validate MPLS item.
2215  *
2216  * @param[in] dev
2217  *   Pointer to the rte_eth_dev structure.
2218  * @param[in] item
2219  *   Item specification.
2220  * @param[in] item_flags
2221  *   Bit-fields that holds the items detected until now.
2222  * @param[in] prev_layer
2223  *   The protocol layer indicated in previous item.
2224  * @param[out] error
2225  *   Pointer to error structure.
2226  *
2227  * @return
2228  *   0 on success, a negative errno value otherwise and rte_errno is set.
2229  */
2230 int
2231 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2232                              const struct rte_flow_item *item __rte_unused,
2233                              uint64_t item_flags __rte_unused,
2234                              uint64_t prev_layer __rte_unused,
2235                              struct rte_flow_error *error)
2236 {
2237 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2238         const struct rte_flow_item_mpls *mask = item->mask;
2239         struct mlx5_priv *priv = dev->data->dev_private;
2240         int ret;
2241
2242         if (!priv->config.mpls_en)
2243                 return rte_flow_error_set(error, ENOTSUP,
2244                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2245                                           "MPLS not supported or"
2246                                           " disabled in firmware"
2247                                           " configuration.");
2248         /* MPLS over IP, UDP, GRE is allowed */
2249         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2250                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2251                             MLX5_FLOW_LAYER_GRE)))
2252                 return rte_flow_error_set(error, EINVAL,
2253                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2254                                           "protocol filtering not compatible"
2255                                           " with MPLS layer");
2256         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2257         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2258             !(item_flags & MLX5_FLOW_LAYER_GRE))
2259                 return rte_flow_error_set(error, ENOTSUP,
2260                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2261                                           "multiple tunnel layers not"
2262                                           " supported");
2263         if (!mask)
2264                 mask = &rte_flow_item_mpls_mask;
2265         ret = mlx5_flow_item_acceptable
2266                 (item, (const uint8_t *)mask,
2267                  (const uint8_t *)&rte_flow_item_mpls_mask,
2268                  sizeof(struct rte_flow_item_mpls), error);
2269         if (ret < 0)
2270                 return ret;
2271         return 0;
2272 #endif
2273         return rte_flow_error_set(error, ENOTSUP,
2274                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2275                                   "MPLS is not supported by Verbs, please"
2276                                   " update.");
2277 }
2278
2279 /**
2280  * Validate NVGRE item.
2281  *
2282  * @param[in] item
2283  *   Item specification.
2284  * @param[in] item_flags
2285  *   Bit flags to mark detected items.
2286  * @param[in] target_protocol
2287  *   The next protocol in the previous item.
2288  * @param[out] error
2289  *   Pointer to error structure.
2290  *
2291  * @return
2292  *   0 on success, a negative errno value otherwise and rte_errno is set.
2293  */
2294 int
2295 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2296                               uint64_t item_flags,
2297                               uint8_t target_protocol,
2298                               struct rte_flow_error *error)
2299 {
2300         const struct rte_flow_item_nvgre *mask = item->mask;
2301         int ret;
2302
2303         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2304                 return rte_flow_error_set(error, EINVAL,
2305                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2306                                           "protocol filtering not compatible"
2307                                           " with this GRE layer");
2308         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2309                 return rte_flow_error_set(error, ENOTSUP,
2310                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2311                                           "multiple tunnel layers not"
2312                                           " supported");
2313         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2314                 return rte_flow_error_set(error, ENOTSUP,
2315                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2316                                           "L3 Layer is missing");
2317         if (!mask)
2318                 mask = &rte_flow_item_nvgre_mask;
2319         ret = mlx5_flow_item_acceptable
2320                 (item, (const uint8_t *)mask,
2321                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2322                  sizeof(struct rte_flow_item_nvgre), error);
2323         if (ret < 0)
2324                 return ret;
2325         return 0;
2326 }
2327
2328 /* Allocate unique ID for the split Q/RSS subflows. */
2329 static uint32_t
2330 flow_qrss_get_id(struct rte_eth_dev *dev)
2331 {
2332         struct mlx5_priv *priv = dev->data->dev_private;
2333         uint32_t qrss_id, ret;
2334
2335         ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2336         if (ret)
2337                 return 0;
2338         MLX5_ASSERT(qrss_id);
2339         return qrss_id;
2340 }
2341
2342 /* Free unique ID for the split Q/RSS subflows. */
2343 static void
2344 flow_qrss_free_id(struct rte_eth_dev *dev,  uint32_t qrss_id)
2345 {
2346         struct mlx5_priv *priv = dev->data->dev_private;
2347
2348         if (qrss_id)
2349                 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2350 }
2351
2352 /**
2353  * Release resource related QUEUE/RSS action split.
2354  *
2355  * @param dev
2356  *   Pointer to Ethernet device.
2357  * @param flow
2358  *   Flow to release id's from.
2359  */
2360 static void
2361 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2362                              struct rte_flow *flow)
2363 {
2364         struct mlx5_priv *priv = dev->data->dev_private;
2365         uint32_t handle_idx;
2366         struct mlx5_flow_handle *dev_handle;
2367
2368         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
2369                        handle_idx, dev_handle, next)
2370                 if (dev_handle->split_flow_id)
2371                         flow_qrss_free_id(dev, dev_handle->split_flow_id);
2372 }
2373
2374 static int
2375 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2376                    const struct rte_flow_attr *attr __rte_unused,
2377                    const struct rte_flow_item items[] __rte_unused,
2378                    const struct rte_flow_action actions[] __rte_unused,
2379                    bool external __rte_unused,
2380                    int hairpin __rte_unused,
2381                    struct rte_flow_error *error)
2382 {
2383         return rte_flow_error_set(error, ENOTSUP,
2384                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2385 }
2386
2387 static struct mlx5_flow *
2388 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
2389                   const struct rte_flow_attr *attr __rte_unused,
2390                   const struct rte_flow_item items[] __rte_unused,
2391                   const struct rte_flow_action actions[] __rte_unused,
2392                   struct rte_flow_error *error)
2393 {
2394         rte_flow_error_set(error, ENOTSUP,
2395                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2396         return NULL;
2397 }
2398
2399 static int
2400 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2401                     struct mlx5_flow *dev_flow __rte_unused,
2402                     const struct rte_flow_attr *attr __rte_unused,
2403                     const struct rte_flow_item items[] __rte_unused,
2404                     const struct rte_flow_action actions[] __rte_unused,
2405                     struct rte_flow_error *error)
2406 {
2407         return rte_flow_error_set(error, ENOTSUP,
2408                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2409 }
2410
2411 static int
2412 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2413                 struct rte_flow *flow __rte_unused,
2414                 struct rte_flow_error *error)
2415 {
2416         return rte_flow_error_set(error, ENOTSUP,
2417                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2418 }
2419
2420 static void
2421 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2422                  struct rte_flow *flow __rte_unused)
2423 {
2424 }
2425
2426 static void
2427 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2428                   struct rte_flow *flow __rte_unused)
2429 {
2430 }
2431
2432 static int
2433 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2434                 struct rte_flow *flow __rte_unused,
2435                 const struct rte_flow_action *actions __rte_unused,
2436                 void *data __rte_unused,
2437                 struct rte_flow_error *error)
2438 {
2439         return rte_flow_error_set(error, ENOTSUP,
2440                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2441 }
2442
2443 /* Void driver to protect from null pointer reference. */
2444 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2445         .validate = flow_null_validate,
2446         .prepare = flow_null_prepare,
2447         .translate = flow_null_translate,
2448         .apply = flow_null_apply,
2449         .remove = flow_null_remove,
2450         .destroy = flow_null_destroy,
2451         .query = flow_null_query,
2452 };
2453
2454 /**
2455  * Select flow driver type according to flow attributes and device
2456  * configuration.
2457  *
2458  * @param[in] dev
2459  *   Pointer to the dev structure.
2460  * @param[in] attr
2461  *   Pointer to the flow attributes.
2462  *
2463  * @return
2464  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2465  */
2466 static enum mlx5_flow_drv_type
2467 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2468 {
2469         struct mlx5_priv *priv = dev->data->dev_private;
2470         enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2471
2472         if (attr->transfer && priv->config.dv_esw_en)
2473                 type = MLX5_FLOW_TYPE_DV;
2474         if (!attr->transfer)
2475                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2476                                                  MLX5_FLOW_TYPE_VERBS;
2477         return type;
2478 }
2479
2480 #define flow_get_drv_ops(type) flow_drv_ops[type]
2481
2482 /**
2483  * Flow driver validation API. This abstracts calling driver specific functions.
2484  * The type of flow driver is determined according to flow attributes.
2485  *
2486  * @param[in] dev
2487  *   Pointer to the dev structure.
2488  * @param[in] attr
2489  *   Pointer to the flow attributes.
2490  * @param[in] items
2491  *   Pointer to the list of items.
2492  * @param[in] actions
2493  *   Pointer to the list of actions.
2494  * @param[in] external
2495  *   This flow rule is created by request external to PMD.
2496  * @param[in] hairpin
2497  *   Number of hairpin TX actions, 0 means classic flow.
2498  * @param[out] error
2499  *   Pointer to the error structure.
2500  *
2501  * @return
2502  *   0 on success, a negative errno value otherwise and rte_errno is set.
2503  */
2504 static inline int
2505 flow_drv_validate(struct rte_eth_dev *dev,
2506                   const struct rte_flow_attr *attr,
2507                   const struct rte_flow_item items[],
2508                   const struct rte_flow_action actions[],
2509                   bool external, int hairpin, struct rte_flow_error *error)
2510 {
2511         const struct mlx5_flow_driver_ops *fops;
2512         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2513
2514         fops = flow_get_drv_ops(type);
2515         return fops->validate(dev, attr, items, actions, external,
2516                               hairpin, error);
2517 }
2518
2519 /**
2520  * Flow driver preparation API. This abstracts calling driver specific
2521  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2522  * calculates the size of memory required for device flow, allocates the memory,
2523  * initializes the device flow and returns the pointer.
2524  *
2525  * @note
2526  *   This function initializes device flow structure such as dv or verbs in
2527  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
2528  *   rest. For example, adding returning device flow to flow->dev_flow list and
2529  *   setting backward reference to the flow should be done out of this function.
2530  *   layers field is not filled either.
2531  *
2532  * @param[in] dev
2533  *   Pointer to the dev structure.
2534  * @param[in] attr
2535  *   Pointer to the flow attributes.
2536  * @param[in] items
2537  *   Pointer to the list of items.
2538  * @param[in] actions
2539  *   Pointer to the list of actions.
2540  * @param[in] flow_idx
2541  *   This memory pool index to the flow.
2542  * @param[out] error
2543  *   Pointer to the error structure.
2544  *
2545  * @return
2546  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
2547  */
2548 static inline struct mlx5_flow *
2549 flow_drv_prepare(struct rte_eth_dev *dev,
2550                  const struct rte_flow *flow,
2551                  const struct rte_flow_attr *attr,
2552                  const struct rte_flow_item items[],
2553                  const struct rte_flow_action actions[],
2554                  uint32_t flow_idx,
2555                  struct rte_flow_error *error)
2556 {
2557         const struct mlx5_flow_driver_ops *fops;
2558         enum mlx5_flow_drv_type type = flow->drv_type;
2559         struct mlx5_flow *mlx5_flow = NULL;
2560
2561         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2562         fops = flow_get_drv_ops(type);
2563         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
2564         if (mlx5_flow)
2565                 mlx5_flow->flow_idx = flow_idx;
2566         return mlx5_flow;
2567 }
2568
2569 /**
2570  * Flow driver translation API. This abstracts calling driver specific
2571  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2572  * translates a generic flow into a driver flow. flow_drv_prepare() must
2573  * precede.
2574  *
2575  * @note
2576  *   dev_flow->layers could be filled as a result of parsing during translation
2577  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2578  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2579  *   flow->actions could be overwritten even though all the expanded dev_flows
2580  *   have the same actions.
2581  *
2582  * @param[in] dev
2583  *   Pointer to the rte dev structure.
2584  * @param[in, out] dev_flow
2585  *   Pointer to the mlx5 flow.
2586  * @param[in] attr
2587  *   Pointer to the flow attributes.
2588  * @param[in] items
2589  *   Pointer to the list of items.
2590  * @param[in] actions
2591  *   Pointer to the list of actions.
2592  * @param[out] error
2593  *   Pointer to the error structure.
2594  *
2595  * @return
2596  *   0 on success, a negative errno value otherwise and rte_errno is set.
2597  */
2598 static inline int
2599 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2600                    const struct rte_flow_attr *attr,
2601                    const struct rte_flow_item items[],
2602                    const struct rte_flow_action actions[],
2603                    struct rte_flow_error *error)
2604 {
2605         const struct mlx5_flow_driver_ops *fops;
2606         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2607
2608         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2609         fops = flow_get_drv_ops(type);
2610         return fops->translate(dev, dev_flow, attr, items, actions, error);
2611 }
2612
2613 /**
2614  * Flow driver apply API. This abstracts calling driver specific functions.
2615  * Parent flow (rte_flow) should have driver type (drv_type). It applies
2616  * translated driver flows on to device. flow_drv_translate() must precede.
2617  *
2618  * @param[in] dev
2619  *   Pointer to Ethernet device structure.
2620  * @param[in, out] flow
2621  *   Pointer to flow structure.
2622  * @param[out] error
2623  *   Pointer to error structure.
2624  *
2625  * @return
2626  *   0 on success, a negative errno value otherwise and rte_errno is set.
2627  */
2628 static inline int
2629 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2630                struct rte_flow_error *error)
2631 {
2632         const struct mlx5_flow_driver_ops *fops;
2633         enum mlx5_flow_drv_type type = flow->drv_type;
2634
2635         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2636         fops = flow_get_drv_ops(type);
2637         return fops->apply(dev, flow, error);
2638 }
2639
2640 /**
2641  * Flow driver remove API. This abstracts calling driver specific functions.
2642  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2643  * on device. All the resources of the flow should be freed by calling
2644  * flow_drv_destroy().
2645  *
2646  * @param[in] dev
2647  *   Pointer to Ethernet device.
2648  * @param[in, out] flow
2649  *   Pointer to flow structure.
2650  */
2651 static inline void
2652 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2653 {
2654         const struct mlx5_flow_driver_ops *fops;
2655         enum mlx5_flow_drv_type type = flow->drv_type;
2656
2657         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2658         fops = flow_get_drv_ops(type);
2659         fops->remove(dev, flow);
2660 }
2661
2662 /**
2663  * Flow driver destroy API. This abstracts calling driver specific functions.
2664  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2665  * on device and releases resources of the flow.
2666  *
2667  * @param[in] dev
2668  *   Pointer to Ethernet device.
2669  * @param[in, out] flow
2670  *   Pointer to flow structure.
2671  */
2672 static inline void
2673 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2674 {
2675         const struct mlx5_flow_driver_ops *fops;
2676         enum mlx5_flow_drv_type type = flow->drv_type;
2677
2678         flow_mreg_split_qrss_release(dev, flow);
2679         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2680         fops = flow_get_drv_ops(type);
2681         fops->destroy(dev, flow);
2682 }
2683
2684 /**
2685  * Get RSS action from the action list.
2686  *
2687  * @param[in] actions
2688  *   Pointer to the list of actions.
2689  *
2690  * @return
2691  *   Pointer to the RSS action if exist, else return NULL.
2692  */
2693 static const struct rte_flow_action_rss*
2694 flow_get_rss_action(const struct rte_flow_action actions[])
2695 {
2696         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2697                 switch (actions->type) {
2698                 case RTE_FLOW_ACTION_TYPE_RSS:
2699                         return (const struct rte_flow_action_rss *)
2700                                actions->conf;
2701                 default:
2702                         break;
2703                 }
2704         }
2705         return NULL;
2706 }
2707
2708 static unsigned int
2709 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2710 {
2711         const struct rte_flow_item *item;
2712         unsigned int has_vlan = 0;
2713
2714         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2715                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2716                         has_vlan = 1;
2717                         break;
2718                 }
2719         }
2720         if (has_vlan)
2721                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2722                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2723         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2724                                MLX5_EXPANSION_ROOT_OUTER;
2725 }
2726
2727 /**
2728  *  Get layer flags from the prefix flow.
2729  *
2730  *  Some flows may be split to several subflows, the prefix subflow gets the
2731  *  match items and the suffix sub flow gets the actions.
2732  *  Some actions need the user defined match item flags to get the detail for
2733  *  the action.
2734  *  This function helps the suffix flow to get the item layer flags from prefix
2735  *  subflow.
2736  *
2737  * @param[in] dev_flow
2738  *   Pointer the created preifx subflow.
2739  *
2740  * @return
2741  *   The layers get from prefix subflow.
2742  */
2743 static inline uint64_t
2744 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
2745 {
2746         uint64_t layers = 0;
2747
2748         /*
2749          * Layers bits could be localization, but usually the compiler will
2750          * help to do the optimization work for source code.
2751          * If no decap actions, use the layers directly.
2752          */
2753         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
2754                 return dev_flow->handle->layers;
2755         /* Convert L3 layers with decap action. */
2756         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
2757                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2758         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
2759                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2760         /* Convert L4 layers with decap action.  */
2761         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
2762                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
2763         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
2764                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
2765         return layers;
2766 }
2767
2768 /**
2769  * Get metadata split action information.
2770  *
2771  * @param[in] actions
2772  *   Pointer to the list of actions.
2773  * @param[out] qrss
2774  *   Pointer to the return pointer.
2775  * @param[out] qrss_type
2776  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
2777  *   if no QUEUE/RSS is found.
2778  * @param[out] encap_idx
2779  *   Pointer to the index of the encap action if exists, otherwise the last
2780  *   action index.
2781  *
2782  * @return
2783  *   Total number of actions.
2784  */
2785 static int
2786 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
2787                                        const struct rte_flow_action **qrss,
2788                                        int *encap_idx)
2789 {
2790         const struct rte_flow_action_raw_encap *raw_encap;
2791         int actions_n = 0;
2792         int raw_decap_idx = -1;
2793
2794         *encap_idx = -1;
2795         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2796                 switch (actions->type) {
2797                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2798                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2799                         *encap_idx = actions_n;
2800                         break;
2801                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
2802                         raw_decap_idx = actions_n;
2803                         break;
2804                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2805                         raw_encap = actions->conf;
2806                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2807                                 *encap_idx = raw_decap_idx != -1 ?
2808                                                       raw_decap_idx : actions_n;
2809                         break;
2810                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2811                 case RTE_FLOW_ACTION_TYPE_RSS:
2812                         *qrss = actions;
2813                         break;
2814                 default:
2815                         break;
2816                 }
2817                 actions_n++;
2818         }
2819         if (*encap_idx == -1)
2820                 *encap_idx = actions_n;
2821         /* Count RTE_FLOW_ACTION_TYPE_END. */
2822         return actions_n + 1;
2823 }
2824
2825 /**
2826  * Check meter action from the action list.
2827  *
2828  * @param[in] actions
2829  *   Pointer to the list of actions.
2830  * @param[out] mtr
2831  *   Pointer to the meter exist flag.
2832  *
2833  * @return
2834  *   Total number of actions.
2835  */
2836 static int
2837 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
2838 {
2839         int actions_n = 0;
2840
2841         MLX5_ASSERT(mtr);
2842         *mtr = 0;
2843         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2844                 switch (actions->type) {
2845                 case RTE_FLOW_ACTION_TYPE_METER:
2846                         *mtr = 1;
2847                         break;
2848                 default:
2849                         break;
2850                 }
2851                 actions_n++;
2852         }
2853         /* Count RTE_FLOW_ACTION_TYPE_END. */
2854         return actions_n + 1;
2855 }
2856
2857 /**
2858  * Check if the flow should be splited due to hairpin.
2859  * The reason for the split is that in current HW we can't
2860  * support encap on Rx, so if a flow have encap we move it
2861  * to Tx.
2862  *
2863  * @param dev
2864  *   Pointer to Ethernet device.
2865  * @param[in] attr
2866  *   Flow rule attributes.
2867  * @param[in] actions
2868  *   Associated actions (list terminated by the END action).
2869  *
2870  * @return
2871  *   > 0 the number of actions and the flow should be split,
2872  *   0 when no split required.
2873  */
2874 static int
2875 flow_check_hairpin_split(struct rte_eth_dev *dev,
2876                          const struct rte_flow_attr *attr,
2877                          const struct rte_flow_action actions[])
2878 {
2879         int queue_action = 0;
2880         int action_n = 0;
2881         int encap = 0;
2882         const struct rte_flow_action_queue *queue;
2883         const struct rte_flow_action_rss *rss;
2884         const struct rte_flow_action_raw_encap *raw_encap;
2885
2886         if (!attr->ingress)
2887                 return 0;
2888         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2889                 switch (actions->type) {
2890                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2891                         queue = actions->conf;
2892                         if (queue == NULL)
2893                                 return 0;
2894                         if (mlx5_rxq_get_type(dev, queue->index) !=
2895                             MLX5_RXQ_TYPE_HAIRPIN)
2896                                 return 0;
2897                         queue_action = 1;
2898                         action_n++;
2899                         break;
2900                 case RTE_FLOW_ACTION_TYPE_RSS:
2901                         rss = actions->conf;
2902                         if (rss == NULL || rss->queue_num == 0)
2903                                 return 0;
2904                         if (mlx5_rxq_get_type(dev, rss->queue[0]) !=
2905                             MLX5_RXQ_TYPE_HAIRPIN)
2906                                 return 0;
2907                         queue_action = 1;
2908                         action_n++;
2909                         break;
2910                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2911                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2912                         encap = 1;
2913                         action_n++;
2914                         break;
2915                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2916                         raw_encap = actions->conf;
2917                         if (raw_encap->size >
2918                             (sizeof(struct rte_flow_item_eth) +
2919                              sizeof(struct rte_flow_item_ipv4)))
2920                                 encap = 1;
2921                         action_n++;
2922                         break;
2923                 default:
2924                         action_n++;
2925                         break;
2926                 }
2927         }
2928         if (encap == 1 && queue_action)
2929                 return action_n;
2930         return 0;
2931 }
2932
2933 /* Declare flow create/destroy prototype in advance. */
2934 static uint32_t
2935 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
2936                  const struct rte_flow_attr *attr,
2937                  const struct rte_flow_item items[],
2938                  const struct rte_flow_action actions[],
2939                  bool external, struct rte_flow_error *error);
2940
2941 static void
2942 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
2943                   uint32_t flow_idx);
2944
2945 /**
2946  * Add a flow of copying flow metadata registers in RX_CP_TBL.
2947  *
2948  * As mark_id is unique, if there's already a registered flow for the mark_id,
2949  * return by increasing the reference counter of the resource. Otherwise, create
2950  * the resource (mcp_res) and flow.
2951  *
2952  * Flow looks like,
2953  *   - If ingress port is ANY and reg_c[1] is mark_id,
2954  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
2955  *
2956  * For default flow (zero mark_id), flow is like,
2957  *   - If ingress port is ANY,
2958  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
2959  *
2960  * @param dev
2961  *   Pointer to Ethernet device.
2962  * @param mark_id
2963  *   ID of MARK action, zero means default flow for META.
2964  * @param[out] error
2965  *   Perform verbose error reporting if not NULL.
2966  *
2967  * @return
2968  *   Associated resource on success, NULL otherwise and rte_errno is set.
2969  */
2970 static struct mlx5_flow_mreg_copy_resource *
2971 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
2972                           struct rte_flow_error *error)
2973 {
2974         struct mlx5_priv *priv = dev->data->dev_private;
2975         struct rte_flow_attr attr = {
2976                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
2977                 .ingress = 1,
2978         };
2979         struct mlx5_rte_flow_item_tag tag_spec = {
2980                 .data = mark_id,
2981         };
2982         struct rte_flow_item items[] = {
2983                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
2984         };
2985         struct rte_flow_action_mark ftag = {
2986                 .id = mark_id,
2987         };
2988         struct mlx5_flow_action_copy_mreg cp_mreg = {
2989                 .dst = REG_B,
2990                 .src = 0,
2991         };
2992         struct rte_flow_action_jump jump = {
2993                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
2994         };
2995         struct rte_flow_action actions[] = {
2996                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
2997         };
2998         struct mlx5_flow_mreg_copy_resource *mcp_res;
2999         uint32_t idx = 0;
3000         int ret;
3001
3002         /* Fill the register fileds in the flow. */
3003         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3004         if (ret < 0)
3005                 return NULL;
3006         tag_spec.id = ret;
3007         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3008         if (ret < 0)
3009                 return NULL;
3010         cp_mreg.src = ret;
3011         /* Check if already registered. */
3012         MLX5_ASSERT(priv->mreg_cp_tbl);
3013         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id);
3014         if (mcp_res) {
3015                 /* For non-default rule. */
3016                 if (mark_id != MLX5_DEFAULT_COPY_ID)
3017                         mcp_res->refcnt++;
3018                 MLX5_ASSERT(mark_id != MLX5_DEFAULT_COPY_ID ||
3019                             mcp_res->refcnt == 1);
3020                 return mcp_res;
3021         }
3022         /* Provide the full width of FLAG specific value. */
3023         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3024                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3025         /* Build a new flow. */
3026         if (mark_id != MLX5_DEFAULT_COPY_ID) {
3027                 items[0] = (struct rte_flow_item){
3028                         .type = (enum rte_flow_item_type)
3029                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3030                         .spec = &tag_spec,
3031                 };
3032                 items[1] = (struct rte_flow_item){
3033                         .type = RTE_FLOW_ITEM_TYPE_END,
3034                 };
3035                 actions[0] = (struct rte_flow_action){
3036                         .type = (enum rte_flow_action_type)
3037                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3038                         .conf = &ftag,
3039                 };
3040                 actions[1] = (struct rte_flow_action){
3041                         .type = (enum rte_flow_action_type)
3042                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3043                         .conf = &cp_mreg,
3044                 };
3045                 actions[2] = (struct rte_flow_action){
3046                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3047                         .conf = &jump,
3048                 };
3049                 actions[3] = (struct rte_flow_action){
3050                         .type = RTE_FLOW_ACTION_TYPE_END,
3051                 };
3052         } else {
3053                 /* Default rule, wildcard match. */
3054                 attr.priority = MLX5_FLOW_PRIO_RSVD;
3055                 items[0] = (struct rte_flow_item){
3056                         .type = RTE_FLOW_ITEM_TYPE_END,
3057                 };
3058                 actions[0] = (struct rte_flow_action){
3059                         .type = (enum rte_flow_action_type)
3060                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3061                         .conf = &cp_mreg,
3062                 };
3063                 actions[1] = (struct rte_flow_action){
3064                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3065                         .conf = &jump,
3066                 };
3067                 actions[2] = (struct rte_flow_action){
3068                         .type = RTE_FLOW_ACTION_TYPE_END,
3069                 };
3070         }
3071         /* Build a new entry. */
3072         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
3073         if (!mcp_res) {
3074                 rte_errno = ENOMEM;
3075                 return NULL;
3076         }
3077         mcp_res->idx = idx;
3078         /*
3079          * The copy Flows are not included in any list. There
3080          * ones are referenced from other Flows and can not
3081          * be applied, removed, deleted in ardbitrary order
3082          * by list traversing.
3083          */
3084         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
3085                                          actions, false, error);
3086         if (!mcp_res->rix_flow)
3087                 goto error;
3088         mcp_res->refcnt++;
3089         mcp_res->hlist_ent.key = mark_id;
3090         ret = mlx5_hlist_insert(priv->mreg_cp_tbl,
3091                                 &mcp_res->hlist_ent);
3092         MLX5_ASSERT(!ret);
3093         if (ret)
3094                 goto error;
3095         return mcp_res;
3096 error:
3097         if (mcp_res->rix_flow)
3098                 flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3099         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3100         return NULL;
3101 }
3102
3103 /**
3104  * Release flow in RX_CP_TBL.
3105  *
3106  * @param dev
3107  *   Pointer to Ethernet device.
3108  * @flow
3109  *   Parent flow for wich copying is provided.
3110  */
3111 static void
3112 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3113                           struct rte_flow *flow)
3114 {
3115         struct mlx5_flow_mreg_copy_resource *mcp_res;
3116         struct mlx5_priv *priv = dev->data->dev_private;
3117
3118         if (!flow->rix_mreg_copy)
3119                 return;
3120         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3121                                  flow->rix_mreg_copy);
3122         if (!mcp_res || !priv->mreg_cp_tbl)
3123                 return;
3124         if (flow->copy_applied) {
3125                 MLX5_ASSERT(mcp_res->appcnt);
3126                 flow->copy_applied = 0;
3127                 --mcp_res->appcnt;
3128                 if (!mcp_res->appcnt) {
3129                         struct rte_flow *mcp_flow = mlx5_ipool_get
3130                                         (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
3131                                         mcp_res->rix_flow);
3132
3133                         if (mcp_flow)
3134                                 flow_drv_remove(dev, mcp_flow);
3135                 }
3136         }
3137         /*
3138          * We do not check availability of metadata registers here,
3139          * because copy resources are not allocated in this case.
3140          */
3141         if (--mcp_res->refcnt)
3142                 return;
3143         MLX5_ASSERT(mcp_res->rix_flow);
3144         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3145         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3146         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3147         flow->rix_mreg_copy = 0;
3148 }
3149
3150 /**
3151  * Start flow in RX_CP_TBL.
3152  *
3153  * @param dev
3154  *   Pointer to Ethernet device.
3155  * @flow
3156  *   Parent flow for wich copying is provided.
3157  *
3158  * @return
3159  *   0 on success, a negative errno value otherwise and rte_errno is set.
3160  */
3161 static int
3162 flow_mreg_start_copy_action(struct rte_eth_dev *dev,
3163                             struct rte_flow *flow)
3164 {
3165         struct mlx5_flow_mreg_copy_resource *mcp_res;
3166         struct mlx5_priv *priv = dev->data->dev_private;
3167         int ret;
3168
3169         if (!flow->rix_mreg_copy || flow->copy_applied)
3170                 return 0;
3171         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3172                                  flow->rix_mreg_copy);
3173         if (!mcp_res)
3174                 return 0;
3175         if (!mcp_res->appcnt) {
3176                 struct rte_flow *mcp_flow = mlx5_ipool_get
3177                                 (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
3178                                 mcp_res->rix_flow);
3179
3180                 if (mcp_flow) {
3181                         ret = flow_drv_apply(dev, mcp_flow, NULL);
3182                         if (ret)
3183                                 return ret;
3184                 }
3185         }
3186         ++mcp_res->appcnt;
3187         flow->copy_applied = 1;
3188         return 0;
3189 }
3190
3191 /**
3192  * Stop flow in RX_CP_TBL.
3193  *
3194  * @param dev
3195  *   Pointer to Ethernet device.
3196  * @flow
3197  *   Parent flow for wich copying is provided.
3198  */
3199 static void
3200 flow_mreg_stop_copy_action(struct rte_eth_dev *dev,
3201                            struct rte_flow *flow)
3202 {
3203         struct mlx5_flow_mreg_copy_resource *mcp_res;
3204         struct mlx5_priv *priv = dev->data->dev_private;
3205
3206         if (!flow->rix_mreg_copy || !flow->copy_applied)
3207                 return;
3208         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3209                                  flow->rix_mreg_copy);
3210         if (!mcp_res)
3211                 return;
3212         MLX5_ASSERT(mcp_res->appcnt);
3213         --mcp_res->appcnt;
3214         flow->copy_applied = 0;
3215         if (!mcp_res->appcnt) {
3216                 struct rte_flow *mcp_flow = mlx5_ipool_get
3217                                 (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
3218                                 mcp_res->rix_flow);
3219
3220                 if (mcp_flow)
3221                         flow_drv_remove(dev, mcp_flow);
3222         }
3223 }
3224
3225 /**
3226  * Remove the default copy action from RX_CP_TBL.
3227  *
3228  * @param dev
3229  *   Pointer to Ethernet device.
3230  */
3231 static void
3232 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3233 {
3234         struct mlx5_flow_mreg_copy_resource *mcp_res;
3235         struct mlx5_priv *priv = dev->data->dev_private;
3236
3237         /* Check if default flow is registered. */
3238         if (!priv->mreg_cp_tbl)
3239                 return;
3240         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl,
3241                                             MLX5_DEFAULT_COPY_ID);
3242         if (!mcp_res)
3243                 return;
3244         MLX5_ASSERT(mcp_res->rix_flow);
3245         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3246         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3247         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3248 }
3249
3250 /**
3251  * Add the default copy action in in RX_CP_TBL.
3252  *
3253  * @param dev
3254  *   Pointer to Ethernet device.
3255  * @param[out] error
3256  *   Perform verbose error reporting if not NULL.
3257  *
3258  * @return
3259  *   0 for success, negative value otherwise and rte_errno is set.
3260  */
3261 static int
3262 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3263                                   struct rte_flow_error *error)
3264 {
3265         struct mlx5_priv *priv = dev->data->dev_private;
3266         struct mlx5_flow_mreg_copy_resource *mcp_res;
3267
3268         /* Check whether extensive metadata feature is engaged. */
3269         if (!priv->config.dv_flow_en ||
3270             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3271             !mlx5_flow_ext_mreg_supported(dev) ||
3272             !priv->sh->dv_regc0_mask)
3273                 return 0;
3274         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
3275         if (!mcp_res)
3276                 return -rte_errno;
3277         return 0;
3278 }
3279
3280 /**
3281  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3282  *
3283  * All the flow having Q/RSS action should be split by
3284  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3285  * performs the following,
3286  *   - CQE->flow_tag := reg_c[1] (MARK)
3287  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3288  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3289  * but there should be a flow per each MARK ID set by MARK action.
3290  *
3291  * For the aforementioned reason, if there's a MARK action in flow's action
3292  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3293  * the MARK ID to CQE's flow_tag like,
3294  *   - If reg_c[1] is mark_id,
3295  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3296  *
3297  * For SET_META action which stores value in reg_c[0], as the destination is
3298  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3299  * MARK ID means the default flow. The default flow looks like,
3300  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3301  *
3302  * @param dev
3303  *   Pointer to Ethernet device.
3304  * @param flow
3305  *   Pointer to flow structure.
3306  * @param[in] actions
3307  *   Pointer to the list of actions.
3308  * @param[out] error
3309  *   Perform verbose error reporting if not NULL.
3310  *
3311  * @return
3312  *   0 on success, negative value otherwise and rte_errno is set.
3313  */
3314 static int
3315 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3316                             struct rte_flow *flow,
3317                             const struct rte_flow_action *actions,
3318                             struct rte_flow_error *error)
3319 {
3320         struct mlx5_priv *priv = dev->data->dev_private;
3321         struct mlx5_dev_config *config = &priv->config;
3322         struct mlx5_flow_mreg_copy_resource *mcp_res;
3323         const struct rte_flow_action_mark *mark;
3324
3325         /* Check whether extensive metadata feature is engaged. */
3326         if (!config->dv_flow_en ||
3327             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3328             !mlx5_flow_ext_mreg_supported(dev) ||
3329             !priv->sh->dv_regc0_mask)
3330                 return 0;
3331         /* Find MARK action. */
3332         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3333                 switch (actions->type) {
3334                 case RTE_FLOW_ACTION_TYPE_FLAG:
3335                         mcp_res = flow_mreg_add_copy_action
3336                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
3337                         if (!mcp_res)
3338                                 return -rte_errno;
3339                         flow->rix_mreg_copy = mcp_res->idx;
3340                         if (dev->data->dev_started) {
3341                                 mcp_res->appcnt++;
3342                                 flow->copy_applied = 1;
3343                         }
3344                         return 0;
3345                 case RTE_FLOW_ACTION_TYPE_MARK:
3346                         mark = (const struct rte_flow_action_mark *)
3347                                 actions->conf;
3348                         mcp_res =
3349                                 flow_mreg_add_copy_action(dev, mark->id, error);
3350                         if (!mcp_res)
3351                                 return -rte_errno;
3352                         flow->rix_mreg_copy = mcp_res->idx;
3353                         if (dev->data->dev_started) {
3354                                 mcp_res->appcnt++;
3355                                 flow->copy_applied = 1;
3356                         }
3357                         return 0;
3358                 default:
3359                         break;
3360                 }
3361         }
3362         return 0;
3363 }
3364
3365 #define MLX5_MAX_SPLIT_ACTIONS 24
3366 #define MLX5_MAX_SPLIT_ITEMS 24
3367
3368 /**
3369  * Split the hairpin flow.
3370  * Since HW can't support encap on Rx we move the encap to Tx.
3371  * If the count action is after the encap then we also
3372  * move the count action. in this case the count will also measure
3373  * the outer bytes.
3374  *
3375  * @param dev
3376  *   Pointer to Ethernet device.
3377  * @param[in] actions
3378  *   Associated actions (list terminated by the END action).
3379  * @param[out] actions_rx
3380  *   Rx flow actions.
3381  * @param[out] actions_tx
3382  *   Tx flow actions..
3383  * @param[out] pattern_tx
3384  *   The pattern items for the Tx flow.
3385  * @param[out] flow_id
3386  *   The flow ID connected to this flow.
3387  *
3388  * @return
3389  *   0 on success.
3390  */
3391 static int
3392 flow_hairpin_split(struct rte_eth_dev *dev,
3393                    const struct rte_flow_action actions[],
3394                    struct rte_flow_action actions_rx[],
3395                    struct rte_flow_action actions_tx[],
3396                    struct rte_flow_item pattern_tx[],
3397                    uint32_t *flow_id)
3398 {
3399         struct mlx5_priv *priv = dev->data->dev_private;
3400         const struct rte_flow_action_raw_encap *raw_encap;
3401         const struct rte_flow_action_raw_decap *raw_decap;
3402         struct mlx5_rte_flow_action_set_tag *set_tag;
3403         struct rte_flow_action *tag_action;
3404         struct mlx5_rte_flow_item_tag *tag_item;
3405         struct rte_flow_item *item;
3406         char *addr;
3407         int encap = 0;
3408
3409         mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
3410         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3411                 switch (actions->type) {
3412                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3413                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3414                         rte_memcpy(actions_tx, actions,
3415                                sizeof(struct rte_flow_action));
3416                         actions_tx++;
3417                         break;
3418                 case RTE_FLOW_ACTION_TYPE_COUNT:
3419                         if (encap) {
3420                                 rte_memcpy(actions_tx, actions,
3421                                            sizeof(struct rte_flow_action));
3422                                 actions_tx++;
3423                         } else {
3424                                 rte_memcpy(actions_rx, actions,
3425                                            sizeof(struct rte_flow_action));
3426                                 actions_rx++;
3427                         }
3428                         break;
3429                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3430                         raw_encap = actions->conf;
3431                         if (raw_encap->size >
3432                             (sizeof(struct rte_flow_item_eth) +
3433                              sizeof(struct rte_flow_item_ipv4))) {
3434                                 memcpy(actions_tx, actions,
3435                                        sizeof(struct rte_flow_action));
3436                                 actions_tx++;
3437                                 encap = 1;
3438                         } else {
3439                                 rte_memcpy(actions_rx, actions,
3440                                            sizeof(struct rte_flow_action));
3441                                 actions_rx++;
3442                         }
3443                         break;
3444                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3445                         raw_decap = actions->conf;
3446                         if (raw_decap->size <
3447                             (sizeof(struct rte_flow_item_eth) +
3448                              sizeof(struct rte_flow_item_ipv4))) {
3449                                 memcpy(actions_tx, actions,
3450                                        sizeof(struct rte_flow_action));
3451                                 actions_tx++;
3452                         } else {
3453                                 rte_memcpy(actions_rx, actions,
3454                                            sizeof(struct rte_flow_action));
3455                                 actions_rx++;
3456                         }
3457                         break;
3458                 default:
3459                         rte_memcpy(actions_rx, actions,
3460                                    sizeof(struct rte_flow_action));
3461                         actions_rx++;
3462                         break;
3463                 }
3464         }
3465         /* Add set meta action and end action for the Rx flow. */
3466         tag_action = actions_rx;
3467         tag_action->type = (enum rte_flow_action_type)
3468                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3469         actions_rx++;
3470         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
3471         actions_rx++;
3472         set_tag = (void *)actions_rx;
3473         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
3474         MLX5_ASSERT(set_tag->id > REG_NONE);
3475         set_tag->data = *flow_id;
3476         tag_action->conf = set_tag;
3477         /* Create Tx item list. */
3478         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
3479         addr = (void *)&pattern_tx[2];
3480         item = pattern_tx;
3481         item->type = (enum rte_flow_item_type)
3482                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3483         tag_item = (void *)addr;
3484         tag_item->data = *flow_id;
3485         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
3486         MLX5_ASSERT(set_tag->id > REG_NONE);
3487         item->spec = tag_item;
3488         addr += sizeof(struct mlx5_rte_flow_item_tag);
3489         tag_item = (void *)addr;
3490         tag_item->data = UINT32_MAX;
3491         tag_item->id = UINT16_MAX;
3492         item->mask = tag_item;
3493         addr += sizeof(struct mlx5_rte_flow_item_tag);
3494         item->last = NULL;
3495         item++;
3496         item->type = RTE_FLOW_ITEM_TYPE_END;
3497         return 0;
3498 }
3499
3500 /**
3501  * The last stage of splitting chain, just creates the subflow
3502  * without any modification.
3503  *
3504  * @param[in] dev
3505  *   Pointer to Ethernet device.
3506  * @param[in] flow
3507  *   Parent flow structure pointer.
3508  * @param[in, out] sub_flow
3509  *   Pointer to return the created subflow, may be NULL.
3510  * @param[in] prefix_layers
3511  *   Prefix subflow layers, may be 0.
3512  * @param[in] attr
3513  *   Flow rule attributes.
3514  * @param[in] items
3515  *   Pattern specification (list terminated by the END pattern item).
3516  * @param[in] actions
3517  *   Associated actions (list terminated by the END action).
3518  * @param[in] external
3519  *   This flow rule is created by request external to PMD.
3520  * @param[in] flow_idx
3521  *   This memory pool index to the flow.
3522  * @param[out] error
3523  *   Perform verbose error reporting if not NULL.
3524  * @return
3525  *   0 on success, negative value otherwise
3526  */
3527 static int
3528 flow_create_split_inner(struct rte_eth_dev *dev,
3529                         struct rte_flow *flow,
3530                         struct mlx5_flow **sub_flow,
3531                         uint64_t prefix_layers,
3532                         const struct rte_flow_attr *attr,
3533                         const struct rte_flow_item items[],
3534                         const struct rte_flow_action actions[],
3535                         bool external, uint32_t flow_idx,
3536                         struct rte_flow_error *error)
3537 {
3538         struct mlx5_flow *dev_flow;
3539
3540         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
3541                 flow_idx, error);
3542         if (!dev_flow)
3543                 return -rte_errno;
3544         dev_flow->flow = flow;
3545         dev_flow->external = external;
3546         /* Subflow object was created, we must include one in the list. */
3547         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
3548                       dev_flow->handle, next);
3549         /*
3550          * If dev_flow is as one of the suffix flow, some actions in suffix
3551          * flow may need some user defined item layer flags.
3552          */
3553         if (prefix_layers)
3554                 dev_flow->handle->layers = prefix_layers;
3555         if (sub_flow)
3556                 *sub_flow = dev_flow;
3557         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
3558 }
3559
3560 /**
3561  * Split the meter flow.
3562  *
3563  * As meter flow will split to three sub flow, other than meter
3564  * action, the other actions make sense to only meter accepts
3565  * the packet. If it need to be dropped, no other additional
3566  * actions should be take.
3567  *
3568  * One kind of special action which decapsulates the L3 tunnel
3569  * header will be in the prefix sub flow, as not to take the
3570  * L3 tunnel header into account.
3571  *
3572  * @param dev
3573  *   Pointer to Ethernet device.
3574  * @param[in] items
3575  *   Pattern specification (list terminated by the END pattern item).
3576  * @param[out] sfx_items
3577  *   Suffix flow match items (list terminated by the END pattern item).
3578  * @param[in] actions
3579  *   Associated actions (list terminated by the END action).
3580  * @param[out] actions_sfx
3581  *   Suffix flow actions.
3582  * @param[out] actions_pre
3583  *   Prefix flow actions.
3584  * @param[out] pattern_sfx
3585  *   The pattern items for the suffix flow.
3586  * @param[out] tag_sfx
3587  *   Pointer to suffix flow tag.
3588  *
3589  * @return
3590  *   0 on success.
3591  */
3592 static int
3593 flow_meter_split_prep(struct rte_eth_dev *dev,
3594                  const struct rte_flow_item items[],
3595                  struct rte_flow_item sfx_items[],
3596                  const struct rte_flow_action actions[],
3597                  struct rte_flow_action actions_sfx[],
3598                  struct rte_flow_action actions_pre[])
3599 {
3600         struct rte_flow_action *tag_action = NULL;
3601         struct rte_flow_item *tag_item;
3602         struct mlx5_rte_flow_action_set_tag *set_tag;
3603         struct rte_flow_error error;
3604         const struct rte_flow_action_raw_encap *raw_encap;
3605         const struct rte_flow_action_raw_decap *raw_decap;
3606         struct mlx5_rte_flow_item_tag *tag_spec;
3607         struct mlx5_rte_flow_item_tag *tag_mask;
3608         uint32_t tag_id;
3609         bool copy_vlan = false;
3610
3611         /* Prepare the actions for prefix and suffix flow. */
3612         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3613                 struct rte_flow_action **action_cur = NULL;
3614
3615                 switch (actions->type) {
3616                 case RTE_FLOW_ACTION_TYPE_METER:
3617                         /* Add the extra tag action first. */
3618                         tag_action = actions_pre;
3619                         tag_action->type = (enum rte_flow_action_type)
3620                                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3621                         actions_pre++;
3622                         action_cur = &actions_pre;
3623                         break;
3624                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3625                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3626                         action_cur = &actions_pre;
3627                         break;
3628                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3629                         raw_encap = actions->conf;
3630                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
3631                                 action_cur = &actions_pre;
3632                         break;
3633                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3634                         raw_decap = actions->conf;
3635                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3636                                 action_cur = &actions_pre;
3637                         break;
3638                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3639                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3640                         copy_vlan = true;
3641                         break;
3642                 default:
3643                         break;
3644                 }
3645                 if (!action_cur)
3646                         action_cur = &actions_sfx;
3647                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
3648                 (*action_cur)++;
3649         }
3650         /* Add end action to the actions. */
3651         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
3652         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
3653         actions_pre++;
3654         /* Set the tag. */
3655         set_tag = (void *)actions_pre;
3656         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3657         /*
3658          * Get the id from the qrss_pool to make qrss share the id with meter.
3659          */
3660         tag_id = flow_qrss_get_id(dev);
3661         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
3662         assert(tag_action);
3663         tag_action->conf = set_tag;
3664         /* Prepare the suffix subflow items. */
3665         tag_item = sfx_items++;
3666         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3667                 int item_type = items->type;
3668
3669                 switch (item_type) {
3670                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
3671                         memcpy(sfx_items, items, sizeof(*sfx_items));
3672                         sfx_items++;
3673                         break;
3674                 case RTE_FLOW_ITEM_TYPE_VLAN:
3675                         if (copy_vlan) {
3676                                 memcpy(sfx_items, items, sizeof(*sfx_items));
3677                                 /*
3678                                  * Convert to internal match item, it is used
3679                                  * for vlan push and set vid.
3680                                  */
3681                                 sfx_items->type = (enum rte_flow_item_type)
3682                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
3683                                 sfx_items++;
3684                         }
3685                         break;
3686                 default:
3687                         break;
3688                 }
3689         }
3690         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
3691         sfx_items++;
3692         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
3693         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
3694         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3695         tag_mask = tag_spec + 1;
3696         tag_mask->data = 0xffffff00;
3697         tag_item->type = (enum rte_flow_item_type)
3698                          MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3699         tag_item->spec = tag_spec;
3700         tag_item->last = NULL;
3701         tag_item->mask = tag_mask;
3702         return tag_id;
3703 }
3704
3705 /**
3706  * Split action list having QUEUE/RSS for metadata register copy.
3707  *
3708  * Once Q/RSS action is detected in user's action list, the flow action
3709  * should be split in order to copy metadata registers, which will happen in
3710  * RX_CP_TBL like,
3711  *   - CQE->flow_tag := reg_c[1] (MARK)
3712  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3713  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
3714  * This is because the last action of each flow must be a terminal action
3715  * (QUEUE, RSS or DROP).
3716  *
3717  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
3718  * stored and kept in the mlx5_flow structure per each sub_flow.
3719  *
3720  * The Q/RSS action is replaced with,
3721  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
3722  * And the following JUMP action is added at the end,
3723  *   - JUMP, to RX_CP_TBL.
3724  *
3725  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
3726  * flow_create_split_metadata() routine. The flow will look like,
3727  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
3728  *
3729  * @param dev
3730  *   Pointer to Ethernet device.
3731  * @param[out] split_actions
3732  *   Pointer to store split actions to jump to CP_TBL.
3733  * @param[in] actions
3734  *   Pointer to the list of original flow actions.
3735  * @param[in] qrss
3736  *   Pointer to the Q/RSS action.
3737  * @param[in] actions_n
3738  *   Number of original actions.
3739  * @param[out] error
3740  *   Perform verbose error reporting if not NULL.
3741  *
3742  * @return
3743  *   non-zero unique flow_id on success, otherwise 0 and
3744  *   error/rte_error are set.
3745  */
3746 static uint32_t
3747 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
3748                           struct rte_flow_action *split_actions,
3749                           const struct rte_flow_action *actions,
3750                           const struct rte_flow_action *qrss,
3751                           int actions_n, struct rte_flow_error *error)
3752 {
3753         struct mlx5_rte_flow_action_set_tag *set_tag;
3754         struct rte_flow_action_jump *jump;
3755         const int qrss_idx = qrss - actions;
3756         uint32_t flow_id = 0;
3757         int ret = 0;
3758
3759         /*
3760          * Given actions will be split
3761          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
3762          * - Add jump to mreg CP_TBL.
3763          * As a result, there will be one more action.
3764          */
3765         ++actions_n;
3766         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
3767         set_tag = (void *)(split_actions + actions_n);
3768         /*
3769          * If tag action is not set to void(it means we are not the meter
3770          * suffix flow), add the tag action. Since meter suffix flow already
3771          * has the tag added.
3772          */
3773         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
3774                 /*
3775                  * Allocate the new subflow ID. This one is unique within
3776                  * device and not shared with representors. Otherwise,
3777                  * we would have to resolve multi-thread access synch
3778                  * issue. Each flow on the shared device is appended
3779                  * with source vport identifier, so the resulting
3780                  * flows will be unique in the shared (by master and
3781                  * representors) domain even if they have coinciding
3782                  * IDs.
3783                  */
3784                 flow_id = flow_qrss_get_id(dev);
3785                 if (!flow_id)
3786                         return rte_flow_error_set(error, ENOMEM,
3787                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3788                                                   NULL, "can't allocate id "
3789                                                   "for split Q/RSS subflow");
3790                 /* Internal SET_TAG action to set flow ID. */
3791                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
3792                         .data = flow_id,
3793                 };
3794                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3795                 if (ret < 0)
3796                         return ret;
3797                 set_tag->id = ret;
3798                 /* Construct new actions array. */
3799                 /* Replace QUEUE/RSS action. */
3800                 split_actions[qrss_idx] = (struct rte_flow_action){
3801                         .type = (enum rte_flow_action_type)
3802                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
3803                         .conf = set_tag,
3804                 };
3805         }
3806         /* JUMP action to jump to mreg copy table (CP_TBL). */
3807         jump = (void *)(set_tag + 1);
3808         *jump = (struct rte_flow_action_jump){
3809                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3810         };
3811         split_actions[actions_n - 2] = (struct rte_flow_action){
3812                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3813                 .conf = jump,
3814         };
3815         split_actions[actions_n - 1] = (struct rte_flow_action){
3816                 .type = RTE_FLOW_ACTION_TYPE_END,
3817         };
3818         return flow_id;
3819 }
3820
3821 /**
3822  * Extend the given action list for Tx metadata copy.
3823  *
3824  * Copy the given action list to the ext_actions and add flow metadata register
3825  * copy action in order to copy reg_a set by WQE to reg_c[0].
3826  *
3827  * @param[out] ext_actions
3828  *   Pointer to the extended action list.
3829  * @param[in] actions
3830  *   Pointer to the list of actions.
3831  * @param[in] actions_n
3832  *   Number of actions in the list.
3833  * @param[out] error
3834  *   Perform verbose error reporting if not NULL.
3835  * @param[in] encap_idx
3836  *   The encap action inndex.
3837  *
3838  * @return
3839  *   0 on success, negative value otherwise
3840  */
3841 static int
3842 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
3843                        struct rte_flow_action *ext_actions,
3844                        const struct rte_flow_action *actions,
3845                        int actions_n, struct rte_flow_error *error,
3846                        int encap_idx)
3847 {
3848         struct mlx5_flow_action_copy_mreg *cp_mreg =
3849                 (struct mlx5_flow_action_copy_mreg *)
3850                         (ext_actions + actions_n + 1);
3851         int ret;
3852
3853         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3854         if (ret < 0)
3855                 return ret;
3856         cp_mreg->dst = ret;
3857         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
3858         if (ret < 0)
3859                 return ret;
3860         cp_mreg->src = ret;
3861         if (encap_idx != 0)
3862                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
3863         if (encap_idx == actions_n - 1) {
3864                 ext_actions[actions_n - 1] = (struct rte_flow_action){
3865                         .type = (enum rte_flow_action_type)
3866                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3867                         .conf = cp_mreg,
3868                 };
3869                 ext_actions[actions_n] = (struct rte_flow_action){
3870                         .type = RTE_FLOW_ACTION_TYPE_END,
3871                 };
3872         } else {
3873                 ext_actions[encap_idx] = (struct rte_flow_action){
3874                         .type = (enum rte_flow_action_type)
3875                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3876                         .conf = cp_mreg,
3877                 };
3878                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
3879                                 sizeof(*ext_actions) * (actions_n - encap_idx));
3880         }
3881         return 0;
3882 }
3883
3884 /**
3885  * The splitting for metadata feature.
3886  *
3887  * - Q/RSS action on NIC Rx should be split in order to pass by
3888  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
3889  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
3890  *
3891  * - All the actions on NIC Tx should have a mreg copy action to
3892  *   copy reg_a from WQE to reg_c[0].
3893  *
3894  * @param dev
3895  *   Pointer to Ethernet device.
3896  * @param[in] flow
3897  *   Parent flow structure pointer.
3898  * @param[in] prefix_layers
3899  *   Prefix flow layer flags.
3900  * @param[in] attr
3901  *   Flow rule attributes.
3902  * @param[in] items
3903  *   Pattern specification (list terminated by the END pattern item).
3904  * @param[in] actions
3905  *   Associated actions (list terminated by the END action).
3906  * @param[in] external
3907  *   This flow rule is created by request external to PMD.
3908  * @param[in] flow_idx
3909  *   This memory pool index to the flow.
3910  * @param[out] error
3911  *   Perform verbose error reporting if not NULL.
3912  * @return
3913  *   0 on success, negative value otherwise
3914  */
3915 static int
3916 flow_create_split_metadata(struct rte_eth_dev *dev,
3917                            struct rte_flow *flow,
3918                            uint64_t prefix_layers,
3919                            const struct rte_flow_attr *attr,
3920                            const struct rte_flow_item items[],
3921                            const struct rte_flow_action actions[],
3922                            bool external, uint32_t flow_idx,
3923                            struct rte_flow_error *error)
3924 {
3925         struct mlx5_priv *priv = dev->data->dev_private;
3926         struct mlx5_dev_config *config = &priv->config;
3927         const struct rte_flow_action *qrss = NULL;
3928         struct rte_flow_action *ext_actions = NULL;
3929         struct mlx5_flow *dev_flow = NULL;
3930         uint32_t qrss_id = 0;
3931         int mtr_sfx = 0;
3932         size_t act_size;
3933         int actions_n;
3934         int encap_idx;
3935         int ret;
3936
3937         /* Check whether extensive metadata feature is engaged. */
3938         if (!config->dv_flow_en ||
3939             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3940             !mlx5_flow_ext_mreg_supported(dev))
3941                 return flow_create_split_inner(dev, flow, NULL, prefix_layers,
3942                                                attr, items, actions, external,
3943                                                flow_idx, error);
3944         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
3945                                                            &encap_idx);
3946         if (qrss) {
3947                 /* Exclude hairpin flows from splitting. */
3948                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
3949                         const struct rte_flow_action_queue *queue;
3950
3951                         queue = qrss->conf;
3952                         if (mlx5_rxq_get_type(dev, queue->index) ==
3953                             MLX5_RXQ_TYPE_HAIRPIN)
3954                                 qrss = NULL;
3955                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
3956                         const struct rte_flow_action_rss *rss;
3957
3958                         rss = qrss->conf;
3959                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
3960                             MLX5_RXQ_TYPE_HAIRPIN)
3961                                 qrss = NULL;
3962                 }
3963         }
3964         if (qrss) {
3965                 /* Check if it is in meter suffix table. */
3966                 mtr_sfx = attr->group == (attr->transfer ?
3967                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
3968                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
3969                 /*
3970                  * Q/RSS action on NIC Rx should be split in order to pass by
3971                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
3972                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
3973                  */
3974                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3975                            sizeof(struct rte_flow_action_set_tag) +
3976                            sizeof(struct rte_flow_action_jump);
3977                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3978                 if (!ext_actions)
3979                         return rte_flow_error_set(error, ENOMEM,
3980                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3981                                                   NULL, "no memory to split "
3982                                                   "metadata flow");
3983                 /*
3984                  * If we are the suffix flow of meter, tag already exist.
3985                  * Set the tag action to void.
3986                  */
3987                 if (mtr_sfx)
3988                         ext_actions[qrss - actions].type =
3989                                                 RTE_FLOW_ACTION_TYPE_VOID;
3990                 else
3991                         ext_actions[qrss - actions].type =
3992                                                 (enum rte_flow_action_type)
3993                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3994                 /*
3995                  * Create the new actions list with removed Q/RSS action
3996                  * and appended set tag and jump to register copy table
3997                  * (RX_CP_TBL). We should preallocate unique tag ID here
3998                  * in advance, because it is needed for set tag action.
3999                  */
4000                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
4001                                                     qrss, actions_n, error);
4002                 if (!mtr_sfx && !qrss_id) {
4003                         ret = -rte_errno;
4004                         goto exit;
4005                 }
4006         } else if (attr->egress && !attr->transfer) {
4007                 /*
4008                  * All the actions on NIC Tx should have a metadata register
4009                  * copy action to copy reg_a from WQE to reg_c[meta]
4010                  */
4011                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
4012                            sizeof(struct mlx5_flow_action_copy_mreg);
4013                 ext_actions = rte_zmalloc(__func__, act_size, 0);
4014                 if (!ext_actions)
4015                         return rte_flow_error_set(error, ENOMEM,
4016                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4017                                                   NULL, "no memory to split "
4018                                                   "metadata flow");
4019                 /* Create the action list appended with copy register. */
4020                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
4021                                              actions_n, error, encap_idx);
4022                 if (ret < 0)
4023                         goto exit;
4024         }
4025         /* Add the unmodified original or prefix subflow. */
4026         ret = flow_create_split_inner(dev, flow, &dev_flow, prefix_layers, attr,
4027                                       items, ext_actions ? ext_actions :
4028                                       actions, external, flow_idx, error);
4029         if (ret < 0)
4030                 goto exit;
4031         MLX5_ASSERT(dev_flow);
4032         if (qrss) {
4033                 const struct rte_flow_attr q_attr = {
4034                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4035                         .ingress = 1,
4036                 };
4037                 /* Internal PMD action to set register. */
4038                 struct mlx5_rte_flow_item_tag q_tag_spec = {
4039                         .data = qrss_id,
4040                         .id = 0,
4041                 };
4042                 struct rte_flow_item q_items[] = {
4043                         {
4044                                 .type = (enum rte_flow_item_type)
4045                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4046                                 .spec = &q_tag_spec,
4047                                 .last = NULL,
4048                                 .mask = NULL,
4049                         },
4050                         {
4051                                 .type = RTE_FLOW_ITEM_TYPE_END,
4052                         },
4053                 };
4054                 struct rte_flow_action q_actions[] = {
4055                         {
4056                                 .type = qrss->type,
4057                                 .conf = qrss->conf,
4058                         },
4059                         {
4060                                 .type = RTE_FLOW_ACTION_TYPE_END,
4061                         },
4062                 };
4063                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
4064
4065                 /*
4066                  * Configure the tag item only if there is no meter subflow.
4067                  * Since tag is already marked in the meter suffix subflow
4068                  * we can just use the meter suffix items as is.
4069                  */
4070                 if (qrss_id) {
4071                         /* Not meter subflow. */
4072                         MLX5_ASSERT(!mtr_sfx);
4073                         /*
4074                          * Put unique id in prefix flow due to it is destroyed
4075                          * after suffix flow and id will be freed after there
4076                          * is no actual flows with this id and identifier
4077                          * reallocation becomes possible (for example, for
4078                          * other flows in other threads).
4079                          */
4080                         dev_flow->handle->split_flow_id = qrss_id;
4081                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
4082                                                    error);
4083                         if (ret < 0)
4084                                 goto exit;
4085                         q_tag_spec.id = ret;
4086                 }
4087                 dev_flow = NULL;
4088                 /* Add suffix subflow to execute Q/RSS. */
4089                 ret = flow_create_split_inner(dev, flow, &dev_flow, layers,
4090                                               &q_attr, mtr_sfx ? items :
4091                                               q_items, q_actions,
4092                                               external, flow_idx, error);
4093                 if (ret < 0)
4094                         goto exit;
4095                 /* qrss ID should be freed if failed. */
4096                 qrss_id = 0;
4097                 MLX5_ASSERT(dev_flow);
4098         }
4099
4100 exit:
4101         /*
4102          * We do not destroy the partially created sub_flows in case of error.
4103          * These ones are included into parent flow list and will be destroyed
4104          * by flow_drv_destroy.
4105          */
4106         flow_qrss_free_id(dev, qrss_id);
4107         rte_free(ext_actions);
4108         return ret;
4109 }
4110
4111 /**
4112  * The splitting for meter feature.
4113  *
4114  * - The meter flow will be split to two flows as prefix and
4115  *   suffix flow. The packets make sense only it pass the prefix
4116  *   meter action.
4117  *
4118  * - Reg_C_5 is used for the packet to match betweend prefix and
4119  *   suffix flow.
4120  *
4121  * @param dev
4122  *   Pointer to Ethernet device.
4123  * @param[in] flow
4124  *   Parent flow structure pointer.
4125  * @param[in] attr
4126  *   Flow rule attributes.
4127  * @param[in] items
4128  *   Pattern specification (list terminated by the END pattern item).
4129  * @param[in] actions
4130  *   Associated actions (list terminated by the END action).
4131  * @param[in] external
4132  *   This flow rule is created by request external to PMD.
4133  * @param[in] flow_idx
4134  *   This memory pool index to the flow.
4135  * @param[out] error
4136  *   Perform verbose error reporting if not NULL.
4137  * @return
4138  *   0 on success, negative value otherwise
4139  */
4140 static int
4141 flow_create_split_meter(struct rte_eth_dev *dev,
4142                            struct rte_flow *flow,
4143                            const struct rte_flow_attr *attr,
4144                            const struct rte_flow_item items[],
4145                            const struct rte_flow_action actions[],
4146                            bool external, uint32_t flow_idx,
4147                            struct rte_flow_error *error)
4148 {
4149         struct mlx5_priv *priv = dev->data->dev_private;
4150         struct rte_flow_action *sfx_actions = NULL;
4151         struct rte_flow_action *pre_actions = NULL;
4152         struct rte_flow_item *sfx_items = NULL;
4153         struct mlx5_flow *dev_flow = NULL;
4154         struct rte_flow_attr sfx_attr = *attr;
4155         uint32_t mtr = 0;
4156         uint32_t mtr_tag_id = 0;
4157         size_t act_size;
4158         size_t item_size;
4159         int actions_n = 0;
4160         int ret;
4161
4162         if (priv->mtr_en)
4163                 actions_n = flow_check_meter_action(actions, &mtr);
4164         if (mtr) {
4165                 /* The five prefix actions: meter, decap, encap, tag, end. */
4166                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
4167                            sizeof(struct mlx5_rte_flow_action_set_tag);
4168                 /* tag, vlan, port id, end. */
4169 #define METER_SUFFIX_ITEM 4
4170                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
4171                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
4172                 sfx_actions = rte_zmalloc(__func__, (act_size + item_size), 0);
4173                 if (!sfx_actions)
4174                         return rte_flow_error_set(error, ENOMEM,
4175                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4176                                                   NULL, "no memory to split "
4177                                                   "meter flow");
4178                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
4179                              act_size);
4180                 pre_actions = sfx_actions + actions_n;
4181                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
4182                                                    actions, sfx_actions,
4183                                                    pre_actions);
4184                 if (!mtr_tag_id) {
4185                         ret = -rte_errno;
4186                         goto exit;
4187                 }
4188                 /* Add the prefix subflow. */
4189                 ret = flow_create_split_inner(dev, flow, &dev_flow, 0, attr,
4190                                               items, pre_actions, external,
4191                                               flow_idx, error);
4192                 if (ret) {
4193                         ret = -rte_errno;
4194                         goto exit;
4195                 }
4196                 dev_flow->handle->split_flow_id = mtr_tag_id;
4197                 /* Setting the sfx group atrr. */
4198                 sfx_attr.group = sfx_attr.transfer ?
4199                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4200                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
4201         }
4202         /* Add the prefix subflow. */
4203         ret = flow_create_split_metadata(dev, flow, dev_flow ?
4204                                          flow_get_prefix_layer_flags(dev_flow) :
4205                                          0, &sfx_attr,
4206                                          sfx_items ? sfx_items : items,
4207                                          sfx_actions ? sfx_actions : actions,
4208                                          external, flow_idx, error);
4209 exit:
4210         if (sfx_actions)
4211                 rte_free(sfx_actions);
4212         return ret;
4213 }
4214
4215 /**
4216  * Split the flow to subflow set. The splitters might be linked
4217  * in the chain, like this:
4218  * flow_create_split_outer() calls:
4219  *   flow_create_split_meter() calls:
4220  *     flow_create_split_metadata(meter_subflow_0) calls:
4221  *       flow_create_split_inner(metadata_subflow_0)
4222  *       flow_create_split_inner(metadata_subflow_1)
4223  *       flow_create_split_inner(metadata_subflow_2)
4224  *     flow_create_split_metadata(meter_subflow_1) calls:
4225  *       flow_create_split_inner(metadata_subflow_0)
4226  *       flow_create_split_inner(metadata_subflow_1)
4227  *       flow_create_split_inner(metadata_subflow_2)
4228  *
4229  * This provide flexible way to add new levels of flow splitting.
4230  * The all of successfully created subflows are included to the
4231  * parent flow dev_flow list.
4232  *
4233  * @param dev
4234  *   Pointer to Ethernet device.
4235  * @param[in] flow
4236  *   Parent flow structure pointer.
4237  * @param[in] attr
4238  *   Flow rule attributes.
4239  * @param[in] items
4240  *   Pattern specification (list terminated by the END pattern item).
4241  * @param[in] actions
4242  *   Associated actions (list terminated by the END action).
4243  * @param[in] external
4244  *   This flow rule is created by request external to PMD.
4245  * @param[in] flow_idx
4246  *   This memory pool index to the flow.
4247  * @param[out] error
4248  *   Perform verbose error reporting if not NULL.
4249  * @return
4250  *   0 on success, negative value otherwise
4251  */
4252 static int
4253 flow_create_split_outer(struct rte_eth_dev *dev,
4254                         struct rte_flow *flow,
4255                         const struct rte_flow_attr *attr,
4256                         const struct rte_flow_item items[],
4257                         const struct rte_flow_action actions[],
4258                         bool external, uint32_t flow_idx,
4259                         struct rte_flow_error *error)
4260 {
4261         int ret;
4262
4263         ret = flow_create_split_meter(dev, flow, attr, items,
4264                                          actions, external, flow_idx, error);
4265         MLX5_ASSERT(ret <= 0);
4266         return ret;
4267 }
4268
4269 /**
4270  * Create a flow and add it to @p list.
4271  *
4272  * @param dev
4273  *   Pointer to Ethernet device.
4274  * @param list
4275  *   Pointer to a TAILQ flow list. If this parameter NULL,
4276  *   no list insertion occurred, flow is just created,
4277  *   this is caller's responsibility to track the
4278  *   created flow.
4279  * @param[in] attr
4280  *   Flow rule attributes.
4281  * @param[in] items
4282  *   Pattern specification (list terminated by the END pattern item).
4283  * @param[in] actions
4284  *   Associated actions (list terminated by the END action).
4285  * @param[in] external
4286  *   This flow rule is created by request external to PMD.
4287  * @param[out] error
4288  *   Perform verbose error reporting if not NULL.
4289  *
4290  * @return
4291  *   A flow index on success, 0 otherwise and rte_errno is set.
4292  */
4293 static uint32_t
4294 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
4295                  const struct rte_flow_attr *attr,
4296                  const struct rte_flow_item items[],
4297                  const struct rte_flow_action actions[],
4298                  bool external, struct rte_flow_error *error)
4299 {
4300         struct mlx5_priv *priv = dev->data->dev_private;
4301         struct rte_flow *flow = NULL;
4302         struct mlx5_flow *dev_flow;
4303         const struct rte_flow_action_rss *rss;
4304         union {
4305                 struct rte_flow_expand_rss buf;
4306                 uint8_t buffer[2048];
4307         } expand_buffer;
4308         union {
4309                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4310                 uint8_t buffer[2048];
4311         } actions_rx;
4312         union {
4313                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4314                 uint8_t buffer[2048];
4315         } actions_hairpin_tx;
4316         union {
4317                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
4318                 uint8_t buffer[2048];
4319         } items_tx;
4320         struct rte_flow_expand_rss *buf = &expand_buffer.buf;
4321         struct mlx5_flow_rss_desc *rss_desc = &((struct mlx5_flow_rss_desc *)
4322                                               priv->rss_desc)[!!priv->flow_idx];
4323         const struct rte_flow_action *p_actions_rx = actions;
4324         uint32_t i;
4325         uint32_t idx = 0;
4326         int hairpin_flow;
4327         uint32_t hairpin_id = 0;
4328         struct rte_flow_attr attr_tx = { .priority = 0 };
4329         int ret;
4330
4331         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
4332         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
4333                                 external, hairpin_flow, error);
4334         if (ret < 0)
4335                 return 0;
4336         if (hairpin_flow > 0) {
4337                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
4338                         rte_errno = EINVAL;
4339                         return 0;
4340                 }
4341                 flow_hairpin_split(dev, actions, actions_rx.actions,
4342                                    actions_hairpin_tx.actions, items_tx.items,
4343                                    &hairpin_id);
4344                 p_actions_rx = actions_rx.actions;
4345         }
4346         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
4347         if (!flow) {
4348                 rte_errno = ENOMEM;
4349                 goto error_before_flow;
4350         }
4351         flow->drv_type = flow_get_drv_type(dev, attr);
4352         if (hairpin_id != 0)
4353                 flow->hairpin_flow_id = hairpin_id;
4354         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
4355                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
4356         memset(rss_desc, 0, sizeof(*rss_desc));
4357         rss = flow_get_rss_action(p_actions_rx);
4358         if (rss) {
4359                 /*
4360                  * The following information is required by
4361                  * mlx5_flow_hashfields_adjust() in advance.
4362                  */
4363                 rss_desc->level = rss->level;
4364                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
4365                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
4366         }
4367         flow->dev_handles = 0;
4368         if (rss && rss->types) {
4369                 unsigned int graph_root;
4370
4371                 graph_root = find_graph_root(items, rss->level);
4372                 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
4373                                           items, rss->types,
4374                                           mlx5_support_expansion,
4375                                           graph_root);
4376                 MLX5_ASSERT(ret > 0 &&
4377                        (unsigned int)ret < sizeof(expand_buffer.buffer));
4378         } else {
4379                 buf->entries = 1;
4380                 buf->entry[0].pattern = (void *)(uintptr_t)items;
4381         }
4382         /*
4383          * Record the start index when there is a nested call. All sub-flows
4384          * need to be translated before another calling.
4385          * No need to use ping-pong buffer to save memory here.
4386          */
4387         if (priv->flow_idx) {
4388                 MLX5_ASSERT(!priv->flow_nested_idx);
4389                 priv->flow_nested_idx = priv->flow_idx;
4390         }
4391         for (i = 0; i < buf->entries; ++i) {
4392                 /*
4393                  * The splitter may create multiple dev_flows,
4394                  * depending on configuration. In the simplest
4395                  * case it just creates unmodified original flow.
4396                  */
4397                 ret = flow_create_split_outer(dev, flow, attr,
4398                                               buf->entry[i].pattern,
4399                                               p_actions_rx, external, idx,
4400                                               error);
4401                 if (ret < 0)
4402                         goto error;
4403         }
4404         /* Create the tx flow. */
4405         if (hairpin_flow) {
4406                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
4407                 attr_tx.ingress = 0;
4408                 attr_tx.egress = 1;
4409                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
4410                                          actions_hairpin_tx.actions,
4411                                          idx, error);
4412                 if (!dev_flow)
4413                         goto error;
4414                 dev_flow->flow = flow;
4415                 dev_flow->external = 0;
4416                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4417                               dev_flow->handle, next);
4418                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
4419                                          items_tx.items,
4420                                          actions_hairpin_tx.actions, error);
4421                 if (ret < 0)
4422                         goto error;
4423         }
4424         /*
4425          * Update the metadata register copy table. If extensive
4426          * metadata feature is enabled and registers are supported
4427          * we might create the extra rte_flow for each unique
4428          * MARK/FLAG action ID.
4429          *
4430          * The table is updated for ingress Flows only, because
4431          * the egress Flows belong to the different device and
4432          * copy table should be updated in peer NIC Rx domain.
4433          */
4434         if (attr->ingress &&
4435             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
4436                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
4437                 if (ret)
4438                         goto error;
4439         }
4440         /*
4441          * If the flow is external (from application) OR device is started, then
4442          * the flow will be applied immediately.
4443          */
4444         if (external || dev->data->dev_started) {
4445                 ret = flow_drv_apply(dev, flow, error);
4446                 if (ret < 0)
4447                         goto error;
4448         }
4449         if (list)
4450                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
4451                              flow, next);
4452         flow_rxq_flags_set(dev, flow);
4453         /* Nested flow creation index recovery. */
4454         priv->flow_idx = priv->flow_nested_idx;
4455         if (priv->flow_nested_idx)
4456                 priv->flow_nested_idx = 0;
4457         return idx;
4458 error:
4459         MLX5_ASSERT(flow);
4460         ret = rte_errno; /* Save rte_errno before cleanup. */
4461         flow_mreg_del_copy_action(dev, flow);
4462         flow_drv_destroy(dev, flow);
4463         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
4464         rte_errno = ret; /* Restore rte_errno. */
4465 error_before_flow:
4466         ret = rte_errno;
4467         if (hairpin_id)
4468                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4469                                      hairpin_id);
4470         rte_errno = ret;
4471         priv->flow_idx = priv->flow_nested_idx;
4472         if (priv->flow_nested_idx)
4473                 priv->flow_nested_idx = 0;
4474         return 0;
4475 }
4476
4477 /**
4478  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
4479  * incoming packets to table 1.
4480  *
4481  * Other flow rules, requested for group n, will be created in
4482  * e-switch table n+1.
4483  * Jump action to e-switch group n will be created to group n+1.
4484  *
4485  * Used when working in switchdev mode, to utilise advantages of table 1
4486  * and above.
4487  *
4488  * @param dev
4489  *   Pointer to Ethernet device.
4490  *
4491  * @return
4492  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
4493  */
4494 struct rte_flow *
4495 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
4496 {
4497         const struct rte_flow_attr attr = {
4498                 .group = 0,
4499                 .priority = 0,
4500                 .ingress = 1,
4501                 .egress = 0,
4502                 .transfer = 1,
4503         };
4504         const struct rte_flow_item pattern = {
4505                 .type = RTE_FLOW_ITEM_TYPE_END,
4506         };
4507         struct rte_flow_action_jump jump = {
4508                 .group = 1,
4509         };
4510         const struct rte_flow_action actions[] = {
4511                 {
4512                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4513                         .conf = &jump,
4514                 },
4515                 {
4516                         .type = RTE_FLOW_ACTION_TYPE_END,
4517                 },
4518         };
4519         struct mlx5_priv *priv = dev->data->dev_private;
4520         struct rte_flow_error error;
4521
4522         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
4523                                                    &attr, &pattern,
4524                                                    actions, false, &error);
4525 }
4526
4527 /**
4528  * Validate a flow supported by the NIC.
4529  *
4530  * @see rte_flow_validate()
4531  * @see rte_flow_ops
4532  */
4533 int
4534 mlx5_flow_validate(struct rte_eth_dev *dev,
4535                    const struct rte_flow_attr *attr,
4536                    const struct rte_flow_item items[],
4537                    const struct rte_flow_action actions[],
4538                    struct rte_flow_error *error)
4539 {
4540         int hairpin_flow;
4541
4542         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
4543         return flow_drv_validate(dev, attr, items, actions,
4544                                 true, hairpin_flow, error);
4545 }
4546
4547 /**
4548  * Create a flow.
4549  *
4550  * @see rte_flow_create()
4551  * @see rte_flow_ops
4552  */
4553 struct rte_flow *
4554 mlx5_flow_create(struct rte_eth_dev *dev,
4555                  const struct rte_flow_attr *attr,
4556                  const struct rte_flow_item items[],
4557                  const struct rte_flow_action actions[],
4558                  struct rte_flow_error *error)
4559 {
4560         struct mlx5_priv *priv = dev->data->dev_private;
4561
4562         /*
4563          * If the device is not started yet, it is not allowed to created a
4564          * flow from application. PMD default flows and traffic control flows
4565          * are not affected.
4566          */
4567         if (unlikely(!dev->data->dev_started)) {
4568                 DRV_LOG(DEBUG, "port %u is not started when "
4569                         "inserting a flow", dev->data->port_id);
4570                 rte_flow_error_set(error, ENODEV,
4571                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4572                                    NULL,
4573                                    "port not started");
4574                 return NULL;
4575         }
4576         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
4577                                   attr, items, actions, true, error);
4578 }
4579
4580 /**
4581  * Destroy a flow in a list.
4582  *
4583  * @param dev
4584  *   Pointer to Ethernet device.
4585  * @param list
4586  *   Pointer to the Indexed flow list. If this parameter NULL,
4587  *   there is no flow removal from the list. Be noted that as
4588  *   flow is add to the indexed list, memory of the indexed
4589  *   list points to maybe changed as flow destroyed.
4590  * @param[in] flow_idx
4591  *   Index of flow to destroy.
4592  */
4593 static void
4594 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
4595                   uint32_t flow_idx)
4596 {
4597         struct mlx5_priv *priv = dev->data->dev_private;
4598         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
4599         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
4600                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
4601
4602         if (!flow)
4603                 return;
4604         /*
4605          * Update RX queue flags only if port is started, otherwise it is
4606          * already clean.
4607          */
4608         if (dev->data->dev_started)
4609                 flow_rxq_flags_trim(dev, flow);
4610         if (flow->hairpin_flow_id)
4611                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4612                                      flow->hairpin_flow_id);
4613         flow_drv_destroy(dev, flow);
4614         if (list)
4615                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
4616                              flow_idx, flow, next);
4617         flow_mreg_del_copy_action(dev, flow);
4618         if (flow->fdir) {
4619                 LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) {
4620                         if (priv_fdir_flow->rix_flow == flow_idx)
4621                                 break;
4622                 }
4623                 if (priv_fdir_flow) {
4624                         LIST_REMOVE(priv_fdir_flow, next);
4625                         rte_free(priv_fdir_flow->fdir);
4626                         rte_free(priv_fdir_flow);
4627                 }
4628         }
4629         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
4630 }
4631
4632 /**
4633  * Destroy all flows.
4634  *
4635  * @param dev
4636  *   Pointer to Ethernet device.
4637  * @param list
4638  *   Pointer to the Indexed flow list.
4639  * @param active
4640  *   If flushing is called avtively.
4641  */
4642 void
4643 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
4644 {
4645         uint32_t num_flushed = 0;
4646
4647         while (*list) {
4648                 flow_list_destroy(dev, list, *list);
4649                 num_flushed++;
4650         }
4651         if (active) {
4652                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
4653                         dev->data->port_id, num_flushed);
4654         }
4655 }
4656
4657 /**
4658  * Remove all flows.
4659  *
4660  * @param dev
4661  *   Pointer to Ethernet device.
4662  * @param list
4663  *   Pointer to the Indexed flow list.
4664  */
4665 void
4666 mlx5_flow_stop(struct rte_eth_dev *dev, uint32_t *list)
4667 {
4668         struct mlx5_priv *priv = dev->data->dev_private;
4669         struct rte_flow *flow = NULL;
4670         uint32_t idx;
4671
4672         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], *list, idx,
4673                       flow, next) {
4674                 flow_drv_remove(dev, flow);
4675                 flow_mreg_stop_copy_action(dev, flow);
4676         }
4677         flow_mreg_del_default_copy_action(dev);
4678         flow_rxq_flags_clear(dev);
4679 }
4680
4681 /**
4682  * Add all flows.
4683  *
4684  * @param dev
4685  *   Pointer to Ethernet device.
4686  * @param list
4687  *   Pointer to the Indexed flow list.
4688  *
4689  * @return
4690  *   0 on success, a negative errno value otherwise and rte_errno is set.
4691  */
4692 int
4693 mlx5_flow_start(struct rte_eth_dev *dev, uint32_t *list)
4694 {
4695         struct mlx5_priv *priv = dev->data->dev_private;
4696         struct rte_flow *flow = NULL;
4697         struct rte_flow_error error;
4698         uint32_t idx;
4699         int ret = 0;
4700
4701         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4702         ret = flow_mreg_add_default_copy_action(dev, &error);
4703         if (ret < 0)
4704                 return -rte_errno;
4705         /* Apply Flows created by application. */
4706         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], *list, idx,
4707                       flow, next) {
4708                 ret = flow_mreg_start_copy_action(dev, flow);
4709                 if (ret < 0)
4710                         goto error;
4711                 ret = flow_drv_apply(dev, flow, &error);
4712                 if (ret < 0)
4713                         goto error;
4714                 flow_rxq_flags_set(dev, flow);
4715         }
4716         return 0;
4717 error:
4718         ret = rte_errno; /* Save rte_errno before cleanup. */
4719         mlx5_flow_stop(dev, list);
4720         rte_errno = ret; /* Restore rte_errno. */
4721         return -rte_errno;
4722 }
4723
4724 /**
4725  * Stop all default actions for flows.
4726  *
4727  * @param dev
4728  *   Pointer to Ethernet device.
4729  */
4730 void
4731 mlx5_flow_stop_default(struct rte_eth_dev *dev)
4732 {
4733         flow_mreg_del_default_copy_action(dev);
4734         flow_rxq_flags_clear(dev);
4735 }
4736
4737 /**
4738  * Start all default actions for flows.
4739  *
4740  * @param dev
4741  *   Pointer to Ethernet device.
4742  * @return
4743  *   0 on success, a negative errno value otherwise and rte_errno is set.
4744  */
4745 int
4746 mlx5_flow_start_default(struct rte_eth_dev *dev)
4747 {
4748         struct rte_flow_error error;
4749
4750         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4751         return flow_mreg_add_default_copy_action(dev, &error);
4752 }
4753
4754 /**
4755  * Allocate intermediate resources for flow creation.
4756  *
4757  * @param dev
4758  *   Pointer to Ethernet device.
4759  */
4760 void
4761 mlx5_flow_alloc_intermediate(struct rte_eth_dev *dev)
4762 {
4763         struct mlx5_priv *priv = dev->data->dev_private;
4764
4765         if (!priv->inter_flows) {
4766                 priv->inter_flows = rte_calloc(__func__, 1,
4767                                     MLX5_NUM_MAX_DEV_FLOWS *
4768                                     sizeof(struct mlx5_flow) +
4769                                     (sizeof(struct mlx5_flow_rss_desc) +
4770                                     sizeof(uint16_t) * UINT16_MAX) * 2, 0);
4771                 if (!priv->inter_flows) {
4772                         DRV_LOG(ERR, "can't allocate intermediate memory.");
4773                         return;
4774                 }
4775         }
4776         priv->rss_desc = &((struct mlx5_flow *)priv->inter_flows)
4777                          [MLX5_NUM_MAX_DEV_FLOWS];
4778         /* Reset the index. */
4779         priv->flow_idx = 0;
4780         priv->flow_nested_idx = 0;
4781 }
4782
4783 /**
4784  * Free intermediate resources for flows.
4785  *
4786  * @param dev
4787  *   Pointer to Ethernet device.
4788  */
4789 void
4790 mlx5_flow_free_intermediate(struct rte_eth_dev *dev)
4791 {
4792         struct mlx5_priv *priv = dev->data->dev_private;
4793
4794         rte_free(priv->inter_flows);
4795         priv->inter_flows = NULL;
4796 }
4797
4798 /**
4799  * Verify the flow list is empty
4800  *
4801  * @param dev
4802  *  Pointer to Ethernet device.
4803  *
4804  * @return the number of flows not released.
4805  */
4806 int
4807 mlx5_flow_verify(struct rte_eth_dev *dev)
4808 {
4809         struct mlx5_priv *priv = dev->data->dev_private;
4810         struct rte_flow *flow;
4811         uint32_t idx;
4812         int ret = 0;
4813
4814         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
4815                       flow, next) {
4816                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
4817                         dev->data->port_id, (void *)flow);
4818                 ++ret;
4819         }
4820         return ret;
4821 }
4822
4823 /**
4824  * Enable default hairpin egress flow.
4825  *
4826  * @param dev
4827  *   Pointer to Ethernet device.
4828  * @param queue
4829  *   The queue index.
4830  *
4831  * @return
4832  *   0 on success, a negative errno value otherwise and rte_errno is set.
4833  */
4834 int
4835 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
4836                             uint32_t queue)
4837 {
4838         struct mlx5_priv *priv = dev->data->dev_private;
4839         const struct rte_flow_attr attr = {
4840                 .egress = 1,
4841                 .priority = 0,
4842         };
4843         struct mlx5_rte_flow_item_tx_queue queue_spec = {
4844                 .queue = queue,
4845         };
4846         struct mlx5_rte_flow_item_tx_queue queue_mask = {
4847                 .queue = UINT32_MAX,
4848         };
4849         struct rte_flow_item items[] = {
4850                 {
4851                         .type = (enum rte_flow_item_type)
4852                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
4853                         .spec = &queue_spec,
4854                         .last = NULL,
4855                         .mask = &queue_mask,
4856                 },
4857                 {
4858                         .type = RTE_FLOW_ITEM_TYPE_END,
4859                 },
4860         };
4861         struct rte_flow_action_jump jump = {
4862                 .group = MLX5_HAIRPIN_TX_TABLE,
4863         };
4864         struct rte_flow_action actions[2];
4865         uint32_t flow_idx;
4866         struct rte_flow_error error;
4867
4868         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
4869         actions[0].conf = &jump;
4870         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
4871         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
4872                                 &attr, items, actions, false, &error);
4873         if (!flow_idx) {
4874                 DRV_LOG(DEBUG,
4875                         "Failed to create ctrl flow: rte_errno(%d),"
4876                         " type(%d), message(%s)",
4877                         rte_errno, error.type,
4878                         error.message ? error.message : " (no stated reason)");
4879                 return -rte_errno;
4880         }
4881         return 0;
4882 }
4883
4884 /**
4885  * Enable a control flow configured from the control plane.
4886  *
4887  * @param dev
4888  *   Pointer to Ethernet device.
4889  * @param eth_spec
4890  *   An Ethernet flow spec to apply.
4891  * @param eth_mask
4892  *   An Ethernet flow mask to apply.
4893  * @param vlan_spec
4894  *   A VLAN flow spec to apply.
4895  * @param vlan_mask
4896  *   A VLAN flow mask to apply.
4897  *
4898  * @return
4899  *   0 on success, a negative errno value otherwise and rte_errno is set.
4900  */
4901 int
4902 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
4903                     struct rte_flow_item_eth *eth_spec,
4904                     struct rte_flow_item_eth *eth_mask,
4905                     struct rte_flow_item_vlan *vlan_spec,
4906                     struct rte_flow_item_vlan *vlan_mask)
4907 {
4908         struct mlx5_priv *priv = dev->data->dev_private;
4909         const struct rte_flow_attr attr = {
4910                 .ingress = 1,
4911                 .priority = MLX5_FLOW_PRIO_RSVD,
4912         };
4913         struct rte_flow_item items[] = {
4914                 {
4915                         .type = RTE_FLOW_ITEM_TYPE_ETH,
4916                         .spec = eth_spec,
4917                         .last = NULL,
4918                         .mask = eth_mask,
4919                 },
4920                 {
4921                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
4922                                               RTE_FLOW_ITEM_TYPE_END,
4923                         .spec = vlan_spec,
4924                         .last = NULL,
4925                         .mask = vlan_mask,
4926                 },
4927                 {
4928                         .type = RTE_FLOW_ITEM_TYPE_END,
4929                 },
4930         };
4931         uint16_t queue[priv->reta_idx_n];
4932         struct rte_flow_action_rss action_rss = {
4933                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4934                 .level = 0,
4935                 .types = priv->rss_conf.rss_hf,
4936                 .key_len = priv->rss_conf.rss_key_len,
4937                 .queue_num = priv->reta_idx_n,
4938                 .key = priv->rss_conf.rss_key,
4939                 .queue = queue,
4940         };
4941         struct rte_flow_action actions[] = {
4942                 {
4943                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4944                         .conf = &action_rss,
4945                 },
4946                 {
4947                         .type = RTE_FLOW_ACTION_TYPE_END,
4948                 },
4949         };
4950         uint32_t flow_idx;
4951         struct rte_flow_error error;
4952         unsigned int i;
4953
4954         if (!priv->reta_idx_n || !priv->rxqs_n) {
4955                 return 0;
4956         }
4957         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
4958                 action_rss.types = 0;
4959         for (i = 0; i != priv->reta_idx_n; ++i)
4960                 queue[i] = (*priv->reta_idx)[i];
4961         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
4962                                 &attr, items, actions, false, &error);
4963         if (!flow_idx)
4964                 return -rte_errno;
4965         return 0;
4966 }
4967
4968 /**
4969  * Enable a flow control configured from the control plane.
4970  *
4971  * @param dev
4972  *   Pointer to Ethernet device.
4973  * @param eth_spec
4974  *   An Ethernet flow spec to apply.
4975  * @param eth_mask
4976  *   An Ethernet flow mask to apply.
4977  *
4978  * @return
4979  *   0 on success, a negative errno value otherwise and rte_errno is set.
4980  */
4981 int
4982 mlx5_ctrl_flow(struct rte_eth_dev *dev,
4983                struct rte_flow_item_eth *eth_spec,
4984                struct rte_flow_item_eth *eth_mask)
4985 {
4986         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
4987 }
4988
4989 /**
4990  * Destroy a flow.
4991  *
4992  * @see rte_flow_destroy()
4993  * @see rte_flow_ops
4994  */
4995 int
4996 mlx5_flow_destroy(struct rte_eth_dev *dev,
4997                   struct rte_flow *flow,
4998                   struct rte_flow_error *error __rte_unused)
4999 {
5000         struct mlx5_priv *priv = dev->data->dev_private;
5001
5002         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
5003         return 0;
5004 }
5005
5006 /**
5007  * Destroy all flows.
5008  *
5009  * @see rte_flow_flush()
5010  * @see rte_flow_ops
5011  */
5012 int
5013 mlx5_flow_flush(struct rte_eth_dev *dev,
5014                 struct rte_flow_error *error __rte_unused)
5015 {
5016         struct mlx5_priv *priv = dev->data->dev_private;
5017
5018         mlx5_flow_list_flush(dev, &priv->flows, false);
5019         return 0;
5020 }
5021
5022 /**
5023  * Isolated mode.
5024  *
5025  * @see rte_flow_isolate()
5026  * @see rte_flow_ops
5027  */
5028 int
5029 mlx5_flow_isolate(struct rte_eth_dev *dev,
5030                   int enable,
5031                   struct rte_flow_error *error)
5032 {
5033         struct mlx5_priv *priv = dev->data->dev_private;
5034
5035         if (dev->data->dev_started) {
5036                 rte_flow_error_set(error, EBUSY,
5037                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5038                                    NULL,
5039                                    "port must be stopped first");
5040                 return -rte_errno;
5041         }
5042         priv->isolated = !!enable;
5043         if (enable)
5044                 dev->dev_ops = &mlx5_dev_ops_isolate;
5045         else
5046                 dev->dev_ops = &mlx5_dev_ops;
5047         return 0;
5048 }
5049
5050 /**
5051  * Query a flow.
5052  *
5053  * @see rte_flow_query()
5054  * @see rte_flow_ops
5055  */
5056 static int
5057 flow_drv_query(struct rte_eth_dev *dev,
5058                uint32_t flow_idx,
5059                const struct rte_flow_action *actions,
5060                void *data,
5061                struct rte_flow_error *error)
5062 {
5063         struct mlx5_priv *priv = dev->data->dev_private;
5064         const struct mlx5_flow_driver_ops *fops;
5065         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
5066                                                [MLX5_IPOOL_RTE_FLOW],
5067                                                flow_idx);
5068         enum mlx5_flow_drv_type ftype;
5069
5070         if (!flow) {
5071                 return rte_flow_error_set(error, ENOENT,
5072                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5073                           NULL,
5074                           "invalid flow handle");
5075         }
5076         ftype = flow->drv_type;
5077         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
5078         fops = flow_get_drv_ops(ftype);
5079
5080         return fops->query(dev, flow, actions, data, error);
5081 }
5082
5083 /**
5084  * Query a flow.
5085  *
5086  * @see rte_flow_query()
5087  * @see rte_flow_ops
5088  */
5089 int
5090 mlx5_flow_query(struct rte_eth_dev *dev,
5091                 struct rte_flow *flow,
5092                 const struct rte_flow_action *actions,
5093                 void *data,
5094                 struct rte_flow_error *error)
5095 {
5096         int ret;
5097
5098         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
5099                              error);
5100         if (ret < 0)
5101                 return ret;
5102         return 0;
5103 }
5104
5105 /**
5106  * Convert a flow director filter to a generic flow.
5107  *
5108  * @param dev
5109  *   Pointer to Ethernet device.
5110  * @param fdir_filter
5111  *   Flow director filter to add.
5112  * @param attributes
5113  *   Generic flow parameters structure.
5114  *
5115  * @return
5116  *   0 on success, a negative errno value otherwise and rte_errno is set.
5117  */
5118 static int
5119 flow_fdir_filter_convert(struct rte_eth_dev *dev,
5120                          const struct rte_eth_fdir_filter *fdir_filter,
5121                          struct mlx5_fdir *attributes)
5122 {
5123         struct mlx5_priv *priv = dev->data->dev_private;
5124         const struct rte_eth_fdir_input *input = &fdir_filter->input;
5125         const struct rte_eth_fdir_masks *mask =
5126                 &dev->data->dev_conf.fdir_conf.mask;
5127
5128         /* Validate queue number. */
5129         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
5130                 DRV_LOG(ERR, "port %u invalid queue number %d",
5131                         dev->data->port_id, fdir_filter->action.rx_queue);
5132                 rte_errno = EINVAL;
5133                 return -rte_errno;
5134         }
5135         attributes->attr.ingress = 1;
5136         attributes->items[0] = (struct rte_flow_item) {
5137                 .type = RTE_FLOW_ITEM_TYPE_ETH,
5138                 .spec = &attributes->l2,
5139                 .mask = &attributes->l2_mask,
5140         };
5141         switch (fdir_filter->action.behavior) {
5142         case RTE_ETH_FDIR_ACCEPT:
5143                 attributes->actions[0] = (struct rte_flow_action){
5144                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
5145                         .conf = &attributes->queue,
5146                 };
5147                 break;
5148         case RTE_ETH_FDIR_REJECT:
5149                 attributes->actions[0] = (struct rte_flow_action){
5150                         .type = RTE_FLOW_ACTION_TYPE_DROP,
5151                 };
5152                 break;
5153         default:
5154                 DRV_LOG(ERR, "port %u invalid behavior %d",
5155                         dev->data->port_id,
5156                         fdir_filter->action.behavior);
5157                 rte_errno = ENOTSUP;
5158                 return -rte_errno;
5159         }
5160         attributes->queue.index = fdir_filter->action.rx_queue;
5161         /* Handle L3. */
5162         switch (fdir_filter->input.flow_type) {
5163         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
5164         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
5165         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
5166                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
5167                         .src_addr = input->flow.ip4_flow.src_ip,
5168                         .dst_addr = input->flow.ip4_flow.dst_ip,
5169                         .time_to_live = input->flow.ip4_flow.ttl,
5170                         .type_of_service = input->flow.ip4_flow.tos,
5171                 };
5172                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
5173                         .src_addr = mask->ipv4_mask.src_ip,
5174                         .dst_addr = mask->ipv4_mask.dst_ip,
5175                         .time_to_live = mask->ipv4_mask.ttl,
5176                         .type_of_service = mask->ipv4_mask.tos,
5177                         .next_proto_id = mask->ipv4_mask.proto,
5178                 };
5179                 attributes->items[1] = (struct rte_flow_item){
5180                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
5181                         .spec = &attributes->l3,
5182                         .mask = &attributes->l3_mask,
5183                 };
5184                 break;
5185         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
5186         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
5187         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
5188                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
5189                         .hop_limits = input->flow.ipv6_flow.hop_limits,
5190                         .proto = input->flow.ipv6_flow.proto,
5191                 };
5192
5193                 memcpy(attributes->l3.ipv6.hdr.src_addr,
5194                        input->flow.ipv6_flow.src_ip,
5195                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
5196                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
5197                        input->flow.ipv6_flow.dst_ip,
5198                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
5199                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
5200                        mask->ipv6_mask.src_ip,
5201                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
5202                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
5203                        mask->ipv6_mask.dst_ip,
5204                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
5205                 attributes->items[1] = (struct rte_flow_item){
5206                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
5207                         .spec = &attributes->l3,
5208                         .mask = &attributes->l3_mask,
5209                 };
5210                 break;
5211         default:
5212                 DRV_LOG(ERR, "port %u invalid flow type%d",
5213                         dev->data->port_id, fdir_filter->input.flow_type);
5214                 rte_errno = ENOTSUP;
5215                 return -rte_errno;
5216         }
5217         /* Handle L4. */
5218         switch (fdir_filter->input.flow_type) {
5219         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
5220                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
5221                         .src_port = input->flow.udp4_flow.src_port,
5222                         .dst_port = input->flow.udp4_flow.dst_port,
5223                 };
5224                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
5225                         .src_port = mask->src_port_mask,
5226                         .dst_port = mask->dst_port_mask,
5227                 };
5228                 attributes->items[2] = (struct rte_flow_item){
5229                         .type = RTE_FLOW_ITEM_TYPE_UDP,
5230                         .spec = &attributes->l4,
5231                         .mask = &attributes->l4_mask,
5232                 };
5233                 break;
5234         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
5235                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
5236                         .src_port = input->flow.tcp4_flow.src_port,
5237                         .dst_port = input->flow.tcp4_flow.dst_port,
5238                 };
5239                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
5240                         .src_port = mask->src_port_mask,
5241                         .dst_port = mask->dst_port_mask,
5242                 };
5243                 attributes->items[2] = (struct rte_flow_item){
5244                         .type = RTE_FLOW_ITEM_TYPE_TCP,
5245                         .spec = &attributes->l4,
5246                         .mask = &attributes->l4_mask,
5247                 };
5248                 break;
5249         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
5250                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
5251                         .src_port = input->flow.udp6_flow.src_port,
5252                         .dst_port = input->flow.udp6_flow.dst_port,
5253                 };
5254                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
5255                         .src_port = mask->src_port_mask,
5256                         .dst_port = mask->dst_port_mask,
5257                 };
5258                 attributes->items[2] = (struct rte_flow_item){
5259                         .type = RTE_FLOW_ITEM_TYPE_UDP,
5260                         .spec = &attributes->l4,
5261                         .mask = &attributes->l4_mask,
5262                 };
5263                 break;
5264         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
5265                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
5266                         .src_port = input->flow.tcp6_flow.src_port,
5267                         .dst_port = input->flow.tcp6_flow.dst_port,
5268                 };
5269                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
5270                         .src_port = mask->src_port_mask,
5271                         .dst_port = mask->dst_port_mask,
5272                 };
5273                 attributes->items[2] = (struct rte_flow_item){
5274                         .type = RTE_FLOW_ITEM_TYPE_TCP,
5275                         .spec = &attributes->l4,
5276                         .mask = &attributes->l4_mask,
5277                 };
5278                 break;
5279         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
5280         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
5281                 break;
5282         default:
5283                 DRV_LOG(ERR, "port %u invalid flow type%d",
5284                         dev->data->port_id, fdir_filter->input.flow_type);
5285                 rte_errno = ENOTSUP;
5286                 return -rte_errno;
5287         }
5288         return 0;
5289 }
5290
5291 #define FLOW_FDIR_CMP(f1, f2, fld) \
5292         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
5293
5294 /**
5295  * Compare two FDIR flows. If items and actions are identical, the two flows are
5296  * regarded as same.
5297  *
5298  * @param dev
5299  *   Pointer to Ethernet device.
5300  * @param f1
5301  *   FDIR flow to compare.
5302  * @param f2
5303  *   FDIR flow to compare.
5304  *
5305  * @return
5306  *   Zero on match, 1 otherwise.
5307  */
5308 static int
5309 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
5310 {
5311         if (FLOW_FDIR_CMP(f1, f2, attr) ||
5312             FLOW_FDIR_CMP(f1, f2, l2) ||
5313             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
5314             FLOW_FDIR_CMP(f1, f2, l3) ||
5315             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
5316             FLOW_FDIR_CMP(f1, f2, l4) ||
5317             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
5318             FLOW_FDIR_CMP(f1, f2, actions[0].type))
5319                 return 1;
5320         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
5321             FLOW_FDIR_CMP(f1, f2, queue))
5322                 return 1;
5323         return 0;
5324 }
5325
5326 /**
5327  * Search device flow list to find out a matched FDIR flow.
5328  *
5329  * @param dev
5330  *   Pointer to Ethernet device.
5331  * @param fdir_flow
5332  *   FDIR flow to lookup.
5333  *
5334  * @return
5335  *   Index of flow if found, 0 otherwise.
5336  */
5337 static uint32_t
5338 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
5339 {
5340         struct mlx5_priv *priv = dev->data->dev_private;
5341         uint32_t flow_idx = 0;
5342         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
5343
5344         MLX5_ASSERT(fdir_flow);
5345         LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) {
5346                 if (!flow_fdir_cmp(priv_fdir_flow->fdir, fdir_flow)) {
5347                         DRV_LOG(DEBUG, "port %u found FDIR flow %u",
5348                                 dev->data->port_id, flow_idx);
5349                         flow_idx = priv_fdir_flow->rix_flow;
5350                         break;
5351                 }
5352         }
5353         return flow_idx;
5354 }
5355
5356 /**
5357  * Add new flow director filter and store it in list.
5358  *
5359  * @param dev
5360  *   Pointer to Ethernet device.
5361  * @param fdir_filter
5362  *   Flow director filter to add.
5363  *
5364  * @return
5365  *   0 on success, a negative errno value otherwise and rte_errno is set.
5366  */
5367 static int
5368 flow_fdir_filter_add(struct rte_eth_dev *dev,
5369                      const struct rte_eth_fdir_filter *fdir_filter)
5370 {
5371         struct mlx5_priv *priv = dev->data->dev_private;
5372         struct mlx5_fdir *fdir_flow;
5373         struct rte_flow *flow;
5374         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
5375         uint32_t flow_idx;
5376         int ret;
5377
5378         fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
5379         if (!fdir_flow) {
5380                 rte_errno = ENOMEM;
5381                 return -rte_errno;
5382         }
5383         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
5384         if (ret)
5385                 goto error;
5386         flow_idx = flow_fdir_filter_lookup(dev, fdir_flow);
5387         if (flow_idx) {
5388                 rte_errno = EEXIST;
5389                 goto error;
5390         }
5391         priv_fdir_flow = rte_zmalloc(__func__, sizeof(struct mlx5_fdir_flow),
5392                                      0);
5393         if (!priv_fdir_flow) {
5394                 rte_errno = ENOMEM;
5395                 goto error;
5396         }
5397         flow_idx = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
5398                                     fdir_flow->items, fdir_flow->actions, true,
5399                                     NULL);
5400         flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
5401         if (!flow)
5402                 goto error;
5403         flow->fdir = 1;
5404         priv_fdir_flow->fdir = fdir_flow;
5405         priv_fdir_flow->rix_flow = flow_idx;
5406         LIST_INSERT_HEAD(&priv->fdir_flows, priv_fdir_flow, next);
5407         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
5408                 dev->data->port_id, (void *)flow);
5409         return 0;
5410 error:
5411         rte_free(priv_fdir_flow);
5412         rte_free(fdir_flow);
5413         return -rte_errno;
5414 }
5415
5416 /**
5417  * Delete specific filter.
5418  *
5419  * @param dev
5420  *   Pointer to Ethernet device.
5421  * @param fdir_filter
5422  *   Filter to be deleted.
5423  *
5424  * @return
5425  *   0 on success, a negative errno value otherwise and rte_errno is set.
5426  */
5427 static int
5428 flow_fdir_filter_delete(struct rte_eth_dev *dev,
5429                         const struct rte_eth_fdir_filter *fdir_filter)
5430 {
5431         struct mlx5_priv *priv = dev->data->dev_private;
5432         uint32_t flow_idx;
5433         struct mlx5_fdir fdir_flow = {
5434                 .attr.group = 0,
5435         };
5436         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
5437         int ret;
5438
5439         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
5440         if (ret)
5441                 return -rte_errno;
5442         LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) {
5443                 /* Find the fdir in priv list */
5444                 if (!flow_fdir_cmp(priv_fdir_flow->fdir, &fdir_flow))
5445                         break;
5446         }
5447         if (!priv_fdir_flow)
5448                 return 0;
5449         LIST_REMOVE(priv_fdir_flow, next);
5450         flow_idx = priv_fdir_flow->rix_flow;
5451         flow_list_destroy(dev, &priv->flows, flow_idx);
5452         rte_free(priv_fdir_flow->fdir);
5453         rte_free(priv_fdir_flow);
5454         DRV_LOG(DEBUG, "port %u deleted FDIR flow %u",
5455                 dev->data->port_id, flow_idx);
5456         return 0;
5457 }
5458
5459 /**
5460  * Update queue for specific filter.
5461  *
5462  * @param dev
5463  *   Pointer to Ethernet device.
5464  * @param fdir_filter
5465  *   Filter to be updated.
5466  *
5467  * @return
5468  *   0 on success, a negative errno value otherwise and rte_errno is set.
5469  */
5470 static int
5471 flow_fdir_filter_update(struct rte_eth_dev *dev,
5472                         const struct rte_eth_fdir_filter *fdir_filter)
5473 {
5474         int ret;
5475
5476         ret = flow_fdir_filter_delete(dev, fdir_filter);
5477         if (ret)
5478                 return ret;
5479         return flow_fdir_filter_add(dev, fdir_filter);
5480 }
5481
5482 /**
5483  * Flush all filters.
5484  *
5485  * @param dev
5486  *   Pointer to Ethernet device.
5487  */
5488 static void
5489 flow_fdir_filter_flush(struct rte_eth_dev *dev)
5490 {
5491         struct mlx5_priv *priv = dev->data->dev_private;
5492         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
5493
5494         while (!LIST_EMPTY(&priv->fdir_flows)) {
5495                 priv_fdir_flow = LIST_FIRST(&priv->fdir_flows);
5496                 LIST_REMOVE(priv_fdir_flow, next);
5497                 flow_list_destroy(dev, &priv->flows, priv_fdir_flow->rix_flow);
5498                 rte_free(priv_fdir_flow->fdir);
5499                 rte_free(priv_fdir_flow);
5500         }
5501 }
5502
5503 /**
5504  * Get flow director information.
5505  *
5506  * @param dev
5507  *   Pointer to Ethernet device.
5508  * @param[out] fdir_info
5509  *   Resulting flow director information.
5510  */
5511 static void
5512 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
5513 {
5514         struct rte_eth_fdir_masks *mask =
5515                 &dev->data->dev_conf.fdir_conf.mask;
5516
5517         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
5518         fdir_info->guarant_spc = 0;
5519         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
5520         fdir_info->max_flexpayload = 0;
5521         fdir_info->flow_types_mask[0] = 0;
5522         fdir_info->flex_payload_unit = 0;
5523         fdir_info->max_flex_payload_segment_num = 0;
5524         fdir_info->flex_payload_limit = 0;
5525         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
5526 }
5527
5528 /**
5529  * Deal with flow director operations.
5530  *
5531  * @param dev
5532  *   Pointer to Ethernet device.
5533  * @param filter_op
5534  *   Operation to perform.
5535  * @param arg
5536  *   Pointer to operation-specific structure.
5537  *
5538  * @return
5539  *   0 on success, a negative errno value otherwise and rte_errno is set.
5540  */
5541 static int
5542 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
5543                     void *arg)
5544 {
5545         enum rte_fdir_mode fdir_mode =
5546                 dev->data->dev_conf.fdir_conf.mode;
5547
5548         if (filter_op == RTE_ETH_FILTER_NOP)
5549                 return 0;
5550         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
5551             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
5552                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
5553                         dev->data->port_id, fdir_mode);
5554                 rte_errno = EINVAL;
5555                 return -rte_errno;
5556         }
5557         switch (filter_op) {
5558         case RTE_ETH_FILTER_ADD:
5559                 return flow_fdir_filter_add(dev, arg);
5560         case RTE_ETH_FILTER_UPDATE:
5561                 return flow_fdir_filter_update(dev, arg);
5562         case RTE_ETH_FILTER_DELETE:
5563                 return flow_fdir_filter_delete(dev, arg);
5564         case RTE_ETH_FILTER_FLUSH:
5565                 flow_fdir_filter_flush(dev);
5566                 break;
5567         case RTE_ETH_FILTER_INFO:
5568                 flow_fdir_info_get(dev, arg);
5569                 break;
5570         default:
5571                 DRV_LOG(DEBUG, "port %u unknown operation %u",
5572                         dev->data->port_id, filter_op);
5573                 rte_errno = EINVAL;
5574                 return -rte_errno;
5575         }
5576         return 0;
5577 }
5578
5579 /**
5580  * Manage filter operations.
5581  *
5582  * @param dev
5583  *   Pointer to Ethernet device structure.
5584  * @param filter_type
5585  *   Filter type.
5586  * @param filter_op
5587  *   Operation to perform.
5588  * @param arg
5589  *   Pointer to operation-specific structure.
5590  *
5591  * @return
5592  *   0 on success, a negative errno value otherwise and rte_errno is set.
5593  */
5594 int
5595 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
5596                      enum rte_filter_type filter_type,
5597                      enum rte_filter_op filter_op,
5598                      void *arg)
5599 {
5600         switch (filter_type) {
5601         case RTE_ETH_FILTER_GENERIC:
5602                 if (filter_op != RTE_ETH_FILTER_GET) {
5603                         rte_errno = EINVAL;
5604                         return -rte_errno;
5605                 }
5606                 *(const void **)arg = &mlx5_flow_ops;
5607                 return 0;
5608         case RTE_ETH_FILTER_FDIR:
5609                 return flow_fdir_ctrl_func(dev, filter_op, arg);
5610         default:
5611                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
5612                         dev->data->port_id, filter_type);
5613                 rte_errno = ENOTSUP;
5614                 return -rte_errno;
5615         }
5616         return 0;
5617 }
5618
5619 /**
5620  * Create the needed meter and suffix tables.
5621  *
5622  * @param[in] dev
5623  *   Pointer to Ethernet device.
5624  * @param[in] fm
5625  *   Pointer to the flow meter.
5626  *
5627  * @return
5628  *   Pointer to table set on success, NULL otherwise.
5629  */
5630 struct mlx5_meter_domains_infos *
5631 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
5632                           const struct mlx5_flow_meter *fm)
5633 {
5634         const struct mlx5_flow_driver_ops *fops;
5635
5636         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5637         return fops->create_mtr_tbls(dev, fm);
5638 }
5639
5640 /**
5641  * Destroy the meter table set.
5642  *
5643  * @param[in] dev
5644  *   Pointer to Ethernet device.
5645  * @param[in] tbl
5646  *   Pointer to the meter table set.
5647  *
5648  * @return
5649  *   0 on success.
5650  */
5651 int
5652 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
5653                            struct mlx5_meter_domains_infos *tbls)
5654 {
5655         const struct mlx5_flow_driver_ops *fops;
5656
5657         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5658         return fops->destroy_mtr_tbls(dev, tbls);
5659 }
5660
5661 /**
5662  * Create policer rules.
5663  *
5664  * @param[in] dev
5665  *   Pointer to Ethernet device.
5666  * @param[in] fm
5667  *   Pointer to flow meter structure.
5668  * @param[in] attr
5669  *   Pointer to flow attributes.
5670  *
5671  * @return
5672  *   0 on success, -1 otherwise.
5673  */
5674 int
5675 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
5676                                struct mlx5_flow_meter *fm,
5677                                const struct rte_flow_attr *attr)
5678 {
5679         const struct mlx5_flow_driver_ops *fops;
5680
5681         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5682         return fops->create_policer_rules(dev, fm, attr);
5683 }
5684
5685 /**
5686  * Destroy policer rules.
5687  *
5688  * @param[in] fm
5689  *   Pointer to flow meter structure.
5690  * @param[in] attr
5691  *   Pointer to flow attributes.
5692  *
5693  * @return
5694  *   0 on success, -1 otherwise.
5695  */
5696 int
5697 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
5698                                 struct mlx5_flow_meter *fm,
5699                                 const struct rte_flow_attr *attr)
5700 {
5701         const struct mlx5_flow_driver_ops *fops;
5702
5703         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5704         return fops->destroy_policer_rules(dev, fm, attr);
5705 }
5706
5707 /**
5708  * Allocate a counter.
5709  *
5710  * @param[in] dev
5711  *   Pointer to Ethernet device structure.
5712  *
5713  * @return
5714  *   Index to allocated counter  on success, 0 otherwise.
5715  */
5716 uint32_t
5717 mlx5_counter_alloc(struct rte_eth_dev *dev)
5718 {
5719         const struct mlx5_flow_driver_ops *fops;
5720         struct rte_flow_attr attr = { .transfer = 0 };
5721
5722         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5723                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5724                 return fops->counter_alloc(dev);
5725         }
5726         DRV_LOG(ERR,
5727                 "port %u counter allocate is not supported.",
5728                  dev->data->port_id);
5729         return 0;
5730 }
5731
5732 /**
5733  * Free a counter.
5734  *
5735  * @param[in] dev
5736  *   Pointer to Ethernet device structure.
5737  * @param[in] cnt
5738  *   Index to counter to be free.
5739  */
5740 void
5741 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
5742 {
5743         const struct mlx5_flow_driver_ops *fops;
5744         struct rte_flow_attr attr = { .transfer = 0 };
5745
5746         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5747                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5748                 fops->counter_free(dev, cnt);
5749                 return;
5750         }
5751         DRV_LOG(ERR,
5752                 "port %u counter free is not supported.",
5753                  dev->data->port_id);
5754 }
5755
5756 /**
5757  * Query counter statistics.
5758  *
5759  * @param[in] dev
5760  *   Pointer to Ethernet device structure.
5761  * @param[in] cnt
5762  *   Index to counter to query.
5763  * @param[in] clear
5764  *   Set to clear counter statistics.
5765  * @param[out] pkts
5766  *   The counter hits packets number to save.
5767  * @param[out] bytes
5768  *   The counter hits bytes number to save.
5769  *
5770  * @return
5771  *   0 on success, a negative errno value otherwise.
5772  */
5773 int
5774 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
5775                    bool clear, uint64_t *pkts, uint64_t *bytes)
5776 {
5777         const struct mlx5_flow_driver_ops *fops;
5778         struct rte_flow_attr attr = { .transfer = 0 };
5779
5780         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5781                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5782                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
5783         }
5784         DRV_LOG(ERR,
5785                 "port %u counter query is not supported.",
5786                  dev->data->port_id);
5787         return -ENOTSUP;
5788 }
5789
5790 #define MLX5_POOL_QUERY_FREQ_US 1000000
5791
5792 /**
5793  * Get number of all validate pools.
5794  *
5795  * @param[in] sh
5796  *   Pointer to mlx5_ibv_shared object.
5797  *
5798  * @return
5799  *   The number of all validate pools.
5800  */
5801 static uint32_t
5802 mlx5_get_all_valid_pool_count(struct mlx5_ibv_shared *sh)
5803 {
5804         int i;
5805         uint32_t pools_n = 0;
5806
5807         for (i = 0; i < MLX5_CCONT_TYPE_MAX; ++i)
5808                 pools_n += rte_atomic16_read(&sh->cmng.ccont[i].n_valid);
5809         return pools_n;
5810 }
5811
5812 /**
5813  * Set the periodic procedure for triggering asynchronous batch queries for all
5814  * the counter pools.
5815  *
5816  * @param[in] sh
5817  *   Pointer to mlx5_ibv_shared object.
5818  */
5819 void
5820 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
5821 {
5822         uint32_t pools_n, us;
5823
5824         pools_n = mlx5_get_all_valid_pool_count(sh);
5825         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
5826         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
5827         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
5828                 sh->cmng.query_thread_on = 0;
5829                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
5830         } else {
5831                 sh->cmng.query_thread_on = 1;
5832         }
5833 }
5834
5835 /**
5836  * The periodic procedure for triggering asynchronous batch queries for all the
5837  * counter pools. This function is probably called by the host thread.
5838  *
5839  * @param[in] arg
5840  *   The parameter for the alarm process.
5841  */
5842 void
5843 mlx5_flow_query_alarm(void *arg)
5844 {
5845         struct mlx5_ibv_shared *sh = arg;
5846         struct mlx5_devx_obj *dcs;
5847         uint16_t offset;
5848         int ret;
5849         uint8_t batch = sh->cmng.batch;
5850         uint8_t age = sh->cmng.age;
5851         uint16_t pool_index = sh->cmng.pool_index;
5852         struct mlx5_pools_container *cont;
5853         struct mlx5_flow_counter_pool *pool;
5854         int cont_loop = MLX5_CCONT_TYPE_MAX;
5855
5856         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
5857                 goto set_alarm;
5858 next_container:
5859         cont = MLX5_CNT_CONTAINER(sh, batch, age);
5860         rte_spinlock_lock(&cont->resize_sl);
5861         if (!cont->pools) {
5862                 rte_spinlock_unlock(&cont->resize_sl);
5863                 /* Check if all the containers are empty. */
5864                 if (unlikely(--cont_loop == 0))
5865                         goto set_alarm;
5866                 batch ^= 0x1;
5867                 pool_index = 0;
5868                 if (batch == 0 && pool_index == 0) {
5869                         age ^= 0x1;
5870                         sh->cmng.batch = batch;
5871                         sh->cmng.age = age;
5872                 }
5873                 goto next_container;
5874         }
5875         pool = cont->pools[pool_index];
5876         rte_spinlock_unlock(&cont->resize_sl);
5877         if (pool->raw_hw)
5878                 /* There is a pool query in progress. */
5879                 goto set_alarm;
5880         pool->raw_hw =
5881                 LIST_FIRST(&sh->cmng.free_stat_raws);
5882         if (!pool->raw_hw)
5883                 /* No free counter statistics raw memory. */
5884                 goto set_alarm;
5885         dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
5886                                                               (&pool->a64_dcs);
5887         offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
5888         /*
5889          * Identify the counters released between query trigger and query
5890          * handle more effiecntly. The counter released in this gap period
5891          * should wait for a new round of query as the new arrived packets
5892          * will not be taken into account.
5893          */
5894         rte_atomic64_add(&pool->start_query_gen, 1);
5895         ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
5896                                                offset, NULL, NULL,
5897                                                pool->raw_hw->mem_mng->dm->id,
5898                                                (void *)(uintptr_t)
5899                                                (pool->raw_hw->data + offset),
5900                                                sh->devx_comp,
5901                                                (uint64_t)(uintptr_t)pool);
5902         if (ret) {
5903                 rte_atomic64_sub(&pool->start_query_gen, 1);
5904                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
5905                         " %d", pool->min_dcs->id);
5906                 pool->raw_hw = NULL;
5907                 goto set_alarm;
5908         }
5909         pool->raw_hw->min_dcs_id = dcs->id;
5910         LIST_REMOVE(pool->raw_hw, next);
5911         sh->cmng.pending_queries++;
5912         pool_index++;
5913         if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
5914                 batch ^= 0x1;
5915                 pool_index = 0;
5916                 if (batch == 0 && pool_index == 0)
5917                         age ^= 0x1;
5918         }
5919 set_alarm:
5920         sh->cmng.batch = batch;
5921         sh->cmng.pool_index = pool_index;
5922         sh->cmng.age = age;
5923         mlx5_set_query_alarm(sh);
5924 }
5925
5926 /**
5927  * Check and callback event for new aged flow in the counter pool
5928  *
5929  * @param[in] sh
5930  *   Pointer to mlx5_ibv_shared object.
5931  * @param[in] pool
5932  *   Pointer to Current counter pool.
5933  */
5934 static void
5935 mlx5_flow_aging_check(struct mlx5_ibv_shared *sh,
5936                    struct mlx5_flow_counter_pool *pool)
5937 {
5938         struct mlx5_priv *priv;
5939         struct mlx5_flow_counter *cnt;
5940         struct mlx5_age_info *age_info;
5941         struct mlx5_age_param *age_param;
5942         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
5943         struct mlx5_counter_stats_raw *prev = pool->raw;
5944         uint16_t curr = rte_rdtsc() / (rte_get_tsc_hz() / 10);
5945         uint32_t i;
5946
5947         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
5948                 cnt = MLX5_POOL_GET_CNT(pool, i);
5949                 age_param = MLX5_CNT_TO_AGE(cnt);
5950                 if (rte_atomic16_read(&age_param->state) != AGE_CANDIDATE)
5951                         continue;
5952                 if (cur->data[i].hits != prev->data[i].hits) {
5953                         age_param->expire = curr + age_param->timeout;
5954                         continue;
5955                 }
5956                 if ((uint16_t)(curr - age_param->expire) >= (UINT16_MAX / 2))
5957                         continue;
5958                 /**
5959                  * Hold the lock first, or if between the
5960                  * state AGE_TMOUT and tailq operation the
5961                  * release happened, the release procedure
5962                  * may delete a non-existent tailq node.
5963                  */
5964                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
5965                 age_info = GET_PORT_AGE_INFO(priv);
5966                 rte_spinlock_lock(&age_info->aged_sl);
5967                 /* If the cpmset fails, release happens. */
5968                 if (rte_atomic16_cmpset((volatile uint16_t *)
5969                                         &age_param->state,
5970                                         AGE_CANDIDATE,
5971                                         AGE_TMOUT) ==
5972                                         AGE_CANDIDATE) {
5973                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
5974                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
5975                 }
5976                 rte_spinlock_unlock(&age_info->aged_sl);
5977         }
5978         for (i = 0; i < sh->max_port; i++) {
5979                 age_info = &sh->port[i].age_info;
5980                 if (!MLX5_AGE_GET(age_info, MLX5_AGE_EVENT_NEW))
5981                         continue;
5982                 if (MLX5_AGE_GET(age_info, MLX5_AGE_TRIGGER))
5983                         _rte_eth_dev_callback_process
5984                                 (&rte_eth_devices[sh->port[i].devx_ih_port_id],
5985                                 RTE_ETH_EVENT_FLOW_AGED, NULL);
5986                 age_info->flags = 0;
5987         }
5988 }
5989
5990 /**
5991  * Handler for the HW respond about ready values from an asynchronous batch
5992  * query. This function is probably called by the host thread.
5993  *
5994  * @param[in] sh
5995  *   The pointer to the shared IB device context.
5996  * @param[in] async_id
5997  *   The Devx async ID.
5998  * @param[in] status
5999  *   The status of the completion.
6000  */
6001 void
6002 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
6003                                   uint64_t async_id, int status)
6004 {
6005         struct mlx5_flow_counter_pool *pool =
6006                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
6007         struct mlx5_counter_stats_raw *raw_to_free;
6008
6009         if (unlikely(status)) {
6010                 rte_atomic64_sub(&pool->start_query_gen, 1);
6011                 raw_to_free = pool->raw_hw;
6012         } else {
6013                 raw_to_free = pool->raw;
6014                 if (IS_AGE_POOL(pool))
6015                         mlx5_flow_aging_check(sh, pool);
6016                 rte_spinlock_lock(&pool->sl);
6017                 pool->raw = pool->raw_hw;
6018                 rte_spinlock_unlock(&pool->sl);
6019                 MLX5_ASSERT(rte_atomic64_read(&pool->end_query_gen) + 1 ==
6020                             rte_atomic64_read(&pool->start_query_gen));
6021                 rte_atomic64_set(&pool->end_query_gen,
6022                                  rte_atomic64_read(&pool->start_query_gen));
6023                 /* Be sure the new raw counters data is updated in memory. */
6024                 rte_cio_wmb();
6025         }
6026         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
6027         pool->raw_hw = NULL;
6028         sh->cmng.pending_queries--;
6029 }
6030
6031 /**
6032  * Translate the rte_flow group index to HW table value.
6033  *
6034  * @param[in] attributes
6035  *   Pointer to flow attributes
6036  * @param[in] external
6037  *   Value is part of flow rule created by request external to PMD.
6038  * @param[in] group
6039  *   rte_flow group index value.
6040  * @param[out] fdb_def_rule
6041  *   Whether fdb jump to table 1 is configured.
6042  * @param[out] table
6043  *   HW table value.
6044  * @param[out] error
6045  *   Pointer to error structure.
6046  *
6047  * @return
6048  *   0 on success, a negative errno value otherwise and rte_errno is set.
6049  */
6050 int
6051 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
6052                          uint32_t group, bool fdb_def_rule, uint32_t *table,
6053                          struct rte_flow_error *error)
6054 {
6055         if (attributes->transfer && external && fdb_def_rule) {
6056                 if (group == UINT32_MAX)
6057                         return rte_flow_error_set
6058                                                 (error, EINVAL,
6059                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6060                                                  NULL,
6061                                                  "group index not supported");
6062                 *table = group + 1;
6063         } else {
6064                 *table = group;
6065         }
6066         return 0;
6067 }
6068
6069 /**
6070  * Discover availability of metadata reg_c's.
6071  *
6072  * Iteratively use test flows to check availability.
6073  *
6074  * @param[in] dev
6075  *   Pointer to the Ethernet device structure.
6076  *
6077  * @return
6078  *   0 on success, a negative errno value otherwise and rte_errno is set.
6079  */
6080 int
6081 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
6082 {
6083         struct mlx5_priv *priv = dev->data->dev_private;
6084         struct mlx5_dev_config *config = &priv->config;
6085         enum modify_reg idx;
6086         int n = 0;
6087
6088         /* reg_c[0] and reg_c[1] are reserved. */
6089         config->flow_mreg_c[n++] = REG_C_0;
6090         config->flow_mreg_c[n++] = REG_C_1;
6091         /* Discover availability of other reg_c's. */
6092         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
6093                 struct rte_flow_attr attr = {
6094                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
6095                         .priority = MLX5_FLOW_PRIO_RSVD,
6096                         .ingress = 1,
6097                 };
6098                 struct rte_flow_item items[] = {
6099                         [0] = {
6100                                 .type = RTE_FLOW_ITEM_TYPE_END,
6101                         },
6102                 };
6103                 struct rte_flow_action actions[] = {
6104                         [0] = {
6105                                 .type = (enum rte_flow_action_type)
6106                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
6107                                 .conf = &(struct mlx5_flow_action_copy_mreg){
6108                                         .src = REG_C_1,
6109                                         .dst = idx,
6110                                 },
6111                         },
6112                         [1] = {
6113                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
6114                                 .conf = &(struct rte_flow_action_jump){
6115                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
6116                                 },
6117                         },
6118                         [2] = {
6119                                 .type = RTE_FLOW_ACTION_TYPE_END,
6120                         },
6121                 };
6122                 uint32_t flow_idx;
6123                 struct rte_flow *flow;
6124                 struct rte_flow_error error;
6125
6126                 if (!config->dv_flow_en)
6127                         break;
6128                 /* Create internal flow, validation skips copy action. */
6129                 flow_idx = flow_list_create(dev, NULL, &attr, items,
6130                                             actions, false, &error);
6131                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
6132                                       flow_idx);
6133                 if (!flow)
6134                         continue;
6135                 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
6136                         config->flow_mreg_c[n++] = idx;
6137                 flow_list_destroy(dev, NULL, flow_idx);
6138         }
6139         for (; n < MLX5_MREG_C_NUM; ++n)
6140                 config->flow_mreg_c[n] = REG_NONE;
6141         return 0;
6142 }
6143
6144 /**
6145  * Dump flow raw hw data to file
6146  *
6147  * @param[in] dev
6148  *    The pointer to Ethernet device.
6149  * @param[in] file
6150  *   A pointer to a file for output.
6151  * @param[out] error
6152  *   Perform verbose error reporting if not NULL. PMDs initialize this
6153  *   structure in case of error only.
6154  * @return
6155  *   0 on success, a nagative value otherwise.
6156  */
6157 int
6158 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
6159                    FILE *file,
6160                    struct rte_flow_error *error __rte_unused)
6161 {
6162         struct mlx5_priv *priv = dev->data->dev_private;
6163         struct mlx5_ibv_shared *sh = priv->sh;
6164
6165         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
6166                                        sh->tx_domain, file);
6167 }
6168
6169 /**
6170  * Get aged-out flows.
6171  *
6172  * @param[in] dev
6173  *   Pointer to the Ethernet device structure.
6174  * @param[in] context
6175  *   The address of an array of pointers to the aged-out flows contexts.
6176  * @param[in] nb_countexts
6177  *   The length of context array pointers.
6178  * @param[out] error
6179  *   Perform verbose error reporting if not NULL. Initialized in case of
6180  *   error only.
6181  *
6182  * @return
6183  *   how many contexts get in success, otherwise negative errno value.
6184  *   if nb_contexts is 0, return the amount of all aged contexts.
6185  *   if nb_contexts is not 0 , return the amount of aged flows reported
6186  *   in the context array.
6187  */
6188 int
6189 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
6190                         uint32_t nb_contexts, struct rte_flow_error *error)
6191 {
6192         const struct mlx5_flow_driver_ops *fops;
6193         struct rte_flow_attr attr = { .transfer = 0 };
6194
6195         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6196                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6197                 return fops->get_aged_flows(dev, contexts, nb_contexts,
6198                                                     error);
6199         }
6200         DRV_LOG(ERR,
6201                 "port %u get aged flows is not supported.",
6202                  dev->data->port_id);
6203         return -ENOTSUP;
6204 }