drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11
  12 /* Verbs header. */
  13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  14 #ifdef PEDANTIC
  15 #pragma GCC diagnostic ignored "-Wpedantic"
  16 #endif
  17 #include <infiniband/verbs.h>
  18 #ifdef PEDANTIC
  19 #pragma GCC diagnostic error "-Wpedantic"
  20 #endif
  21
  22 #include <rte_common.h>
  23 #include <rte_ether.h>
  24 #include <rte_ethdev_driver.h>
  25 #include <rte_flow.h>
  26 #include <rte_flow_driver.h>
  27 #include <rte_malloc.h>
  28 #include <rte_ip.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_flow.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 /* Dev ops structure defined in mlx5.c */
  38 extern const struct eth_dev_ops mlx5_dev_ops;
  39 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
  40
  41 /** Device flow drivers. */
  42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
  44 #endif
  45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  46
  47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  48
  49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  50         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  52         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  53 #endif
  54         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  55         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  56 };
  57
  58 enum mlx5_expansion {
  59         MLX5_EXPANSION_ROOT,
  60         MLX5_EXPANSION_ROOT_OUTER,
  61         MLX5_EXPANSION_ROOT_ETH_VLAN,
  62         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
  63         MLX5_EXPANSION_OUTER_ETH,
  64         MLX5_EXPANSION_OUTER_ETH_VLAN,
  65         MLX5_EXPANSION_OUTER_VLAN,
  66         MLX5_EXPANSION_OUTER_IPV4,
  67         MLX5_EXPANSION_OUTER_IPV4_UDP,
  68         MLX5_EXPANSION_OUTER_IPV4_TCP,
  69         MLX5_EXPANSION_OUTER_IPV6,
  70         MLX5_EXPANSION_OUTER_IPV6_UDP,
  71         MLX5_EXPANSION_OUTER_IPV6_TCP,
  72         MLX5_EXPANSION_VXLAN,
  73         MLX5_EXPANSION_VXLAN_GPE,
  74         MLX5_EXPANSION_GRE,
  75         MLX5_EXPANSION_MPLS,
  76         MLX5_EXPANSION_ETH,
  77         MLX5_EXPANSION_ETH_VLAN,
  78         MLX5_EXPANSION_VLAN,
  79         MLX5_EXPANSION_IPV4,
  80         MLX5_EXPANSION_IPV4_UDP,
  81         MLX5_EXPANSION_IPV4_TCP,
  82         MLX5_EXPANSION_IPV6,
  83         MLX5_EXPANSION_IPV6_UDP,
  84         MLX5_EXPANSION_IPV6_TCP,
  85 };
  86
  87 /** Supported expansion of items. */
  88 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
  89         [MLX5_EXPANSION_ROOT] = {
  90                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
  91                                                  MLX5_EXPANSION_IPV4,
  92                                                  MLX5_EXPANSION_IPV6),
  93                 .type = RTE_FLOW_ITEM_TYPE_END,
  94         },
  95         [MLX5_EXPANSION_ROOT_OUTER] = {
  96                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
  97                                                  MLX5_EXPANSION_OUTER_IPV4,
  98                                                  MLX5_EXPANSION_OUTER_IPV6),
  99                 .type = RTE_FLOW_ITEM_TYPE_END,
 100         },
 101         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 102                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 103                 .type = RTE_FLOW_ITEM_TYPE_END,
 104         },
 105         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 106                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
 107                 .type = RTE_FLOW_ITEM_TYPE_END,
 108         },
 109         [MLX5_EXPANSION_OUTER_ETH] = {
 110                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 111                                                  MLX5_EXPANSION_OUTER_IPV6,
 112                                                  MLX5_EXPANSION_MPLS),
 113                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 114                 .rss_types = 0,
 115         },
 116         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 117                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 118                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 119                 .rss_types = 0,
 120         },
 121         [MLX5_EXPANSION_OUTER_VLAN] = {
 122                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 123                                                  MLX5_EXPANSION_OUTER_IPV6),
 124                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 125         },
 126         [MLX5_EXPANSION_OUTER_IPV4] = {
 127                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 128                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 129                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 130                          MLX5_EXPANSION_GRE,
 131                          MLX5_EXPANSION_IPV4,
 132                          MLX5_EXPANSION_IPV6),
 133                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 134                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 135                         ETH_RSS_NONFRAG_IPV4_OTHER,
 136         },
 137         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 138                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 139                                                  MLX5_EXPANSION_VXLAN_GPE),
 140                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 141                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 142         },
 143         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 144                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 145                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 146         },
 147         [MLX5_EXPANSION_OUTER_IPV6] = {
 148                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 149                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 150                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 151                          MLX5_EXPANSION_IPV4,
 152                          MLX5_EXPANSION_IPV6),
 153                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 154                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 155                         ETH_RSS_NONFRAG_IPV6_OTHER,
 156         },
 157         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 158                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 159                                                  MLX5_EXPANSION_VXLAN_GPE),
 160                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 161                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 162         },
 163         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 164                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 165                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 166         },
 167         [MLX5_EXPANSION_VXLAN] = {
 168                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 169                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 170         },
 171         [MLX5_EXPANSION_VXLAN_GPE] = {
 172                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 173                                                  MLX5_EXPANSION_IPV4,
 174                                                  MLX5_EXPANSION_IPV6),
 175                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 176         },
 177         [MLX5_EXPANSION_GRE] = {
 178                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 179                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 180         },
 181         [MLX5_EXPANSION_MPLS] = {
 182                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 183                                                  MLX5_EXPANSION_IPV6),
 184                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 185         },
 186         [MLX5_EXPANSION_ETH] = {
 187                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 188                                                  MLX5_EXPANSION_IPV6),
 189                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 190         },
 191         [MLX5_EXPANSION_ETH_VLAN] = {
 192                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 193                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 194         },
 195         [MLX5_EXPANSION_VLAN] = {
 196                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 197                                                  MLX5_EXPANSION_IPV6),
 198                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 199         },
 200         [MLX5_EXPANSION_IPV4] = {
 201                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 202                                                  MLX5_EXPANSION_IPV4_TCP),
 203                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 204                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 205                         ETH_RSS_NONFRAG_IPV4_OTHER,
 206         },
 207         [MLX5_EXPANSION_IPV4_UDP] = {
 208                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 209                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 210         },
 211         [MLX5_EXPANSION_IPV4_TCP] = {
 212                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 213                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 214         },
 215         [MLX5_EXPANSION_IPV6] = {
 216                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 217                                                  MLX5_EXPANSION_IPV6_TCP),
 218                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 219                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 220                         ETH_RSS_NONFRAG_IPV6_OTHER,
 221         },
 222         [MLX5_EXPANSION_IPV6_UDP] = {
 223                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 224                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 225         },
 226         [MLX5_EXPANSION_IPV6_TCP] = {
 227                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 228                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 229         },
 230 };
 231
 232 static const struct rte_flow_ops mlx5_flow_ops = {
 233         .validate = mlx5_flow_validate,
 234         .create = mlx5_flow_create,
 235         .destroy = mlx5_flow_destroy,
 236         .flush = mlx5_flow_flush,
 237         .isolate = mlx5_flow_isolate,
 238         .query = mlx5_flow_query,
 239 };
 240
 241 /* Convert FDIR request to Generic flow. */
 242 struct mlx5_fdir {
 243         struct rte_flow_attr attr;
 244         struct rte_flow_item items[4];
 245         struct rte_flow_item_eth l2;
 246         struct rte_flow_item_eth l2_mask;
 247         union {
 248                 struct rte_flow_item_ipv4 ipv4;
 249                 struct rte_flow_item_ipv6 ipv6;
 250         } l3;
 251         union {
 252                 struct rte_flow_item_ipv4 ipv4;
 253                 struct rte_flow_item_ipv6 ipv6;
 254         } l3_mask;
 255         union {
 256                 struct rte_flow_item_udp udp;
 257                 struct rte_flow_item_tcp tcp;
 258         } l4;
 259         union {
 260                 struct rte_flow_item_udp udp;
 261                 struct rte_flow_item_tcp tcp;
 262         } l4_mask;
 263         struct rte_flow_action actions[2];
 264         struct rte_flow_action_queue queue;
 265 };
 266
 267 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
 268 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
 269         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
 270 };
 271
 272 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
 273 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
 274         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
 275         { 9, 10, 11 }, { 12, 13, 14 },
 276 };
 277
 278 /* Tunnel information. */
 279 struct mlx5_flow_tunnel_info {
 280         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 281         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 282 };
 283
 284 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 285         {
 286                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 287                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 288         },
 289         {
 290                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 291                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 292         },
 293         {
 294                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 295                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 296         },
 297         {
 298                 .tunnel = MLX5_FLOW_LAYER_GRE,
 299                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 300         },
 301         {
 302                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 303                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 304         },
 305         {
 306                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 307                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 308         },
 309         {
 310                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 311                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 312         },
 313         {
 314                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 315                 .ptype = RTE_PTYPE_TUNNEL_IP,
 316         },
 317         {
 318                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 319                 .ptype = RTE_PTYPE_TUNNEL_IP,
 320         },
 321 };
 322
 323 /**
 324  * Translate tag ID to register.
 325  *
 326  * @param[in] dev
 327  *   Pointer to the Ethernet device structure.
 328  * @param[in] feature
 329  *   The feature that request the register.
 330  * @param[in] id
 331  *   The request register ID.
 332  * @param[out] error
 333  *   Error description in case of any.
 334  *
 335  * @return
 336  *   The request register on success, a negative errno
 337  *   value otherwise and rte_errno is set.
 338  */
 339 enum modify_reg
 340 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 341                      enum mlx5_feature_name feature,
 342                      uint32_t id,
 343                      struct rte_flow_error *error)
 344 {
 345         struct mlx5_priv *priv = dev->data->dev_private;
 346         struct mlx5_dev_config *config = &priv->config;
 347         enum modify_reg start_reg;
 348
 349         switch (feature) {
 350         case MLX5_HAIRPIN_RX:
 351                 return REG_B;
 352         case MLX5_HAIRPIN_TX:
 353                 return REG_A;
 354         case MLX5_METADATA_RX:
 355                 switch (config->dv_xmeta_en) {
 356                 case MLX5_XMETA_MODE_LEGACY:
 357                         return REG_B;
 358                 case MLX5_XMETA_MODE_META16:
 359                         return REG_C_0;
 360                 case MLX5_XMETA_MODE_META32:
 361                         return REG_C_1;
 362                 }
 363                 break;
 364         case MLX5_METADATA_TX:
 365                 return REG_A;
 366         case MLX5_METADATA_FDB:
 367                 return REG_C_0;
 368         case MLX5_FLOW_MARK:
 369                 switch (config->dv_xmeta_en) {
 370                 case MLX5_XMETA_MODE_LEGACY:
 371                         return REG_NONE;
 372                 case MLX5_XMETA_MODE_META16:
 373                         return REG_C_1;
 374                 case MLX5_XMETA_MODE_META32:
 375                         return REG_C_0;
 376                 }
 377                 break;
 378         case MLX5_COPY_MARK:
 379         case MLX5_MTR_SFX:
 380                 /*
 381                  * Metadata COPY_MARK register using is in meter suffix sub
 382                  * flow while with meter. It's safe to share the same register.
 383                  */
 384                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 385         case MLX5_MTR_COLOR:
 386                 RTE_ASSERT(priv->mtr_color_reg != REG_NONE);
 387                 return priv->mtr_color_reg;
 388         case MLX5_APP_TAG:
 389                 /*
 390                  * If meter is enable, it will engage two registers for color
 391                  * match and flow match. If meter color match is not using the
 392                  * REG_C_2, need to skip the REG_C_x be used by meter color
 393                  * match.
 394                  * If meter is disable, free to use all available registers.
 395                  */
 396                 if (priv->mtr_color_reg != REG_NONE)
 397                         start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_3 :
 398                                     REG_C_4;
 399                 else
 400                         start_reg = REG_C_2;
 401                 if (id > (REG_C_7 - start_reg))
 402                         return rte_flow_error_set(error, EINVAL,
 403                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 404                                                   NULL, "invalid tag id");
 405                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NONE)
 406                         return rte_flow_error_set(error, ENOTSUP,
 407                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 408                                                   NULL, "unsupported tag id");
 409                 /*
 410                  * This case means meter is using the REG_C_x great than 2.
 411                  * Take care not to conflict with meter color REG_C_x.
 412                  * If the available index REG_C_y >= REG_C_x, skip the
 413                  * color register.
 414                  */
 415                 if (start_reg == REG_C_3 && config->flow_mreg_c
 416                     [id + REG_C_3 - REG_C_0] >= priv->mtr_color_reg) {
 417                         if (config->flow_mreg_c[id + 1 + REG_C_3 - REG_C_0] !=
 418                             REG_NONE)
 419                                 return config->flow_mreg_c
 420                                                 [id + 1 + REG_C_3 - REG_C_0];
 421                         return rte_flow_error_set(error, ENOTSUP,
 422                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 423                                                   NULL, "unsupported tag id");
 424                 }
 425                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 426         }
 427         assert(false);
 428         return rte_flow_error_set(error, EINVAL,
 429                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 430                                   NULL, "invalid feature name");
 431 }
 432
 433 /**
 434  * Check extensive flow metadata register support.
 435  *
 436  * @param dev
 437  *   Pointer to rte_eth_dev structure.
 438  *
 439  * @return
 440  *   True if device supports extensive flow metadata register, otherwise false.
 441  */
 442 bool
 443 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 444 {
 445         struct mlx5_priv *priv = dev->data->dev_private;
 446         struct mlx5_dev_config *config = &priv->config;
 447
 448         /*
 449          * Having available reg_c can be regarded inclusively as supporting
 450          * extensive flow metadata register, which could mean,
 451          * - metadata register copy action by modify header.
 452          * - 16 modify header actions is supported.
 453          * - reg_c's are preserved across different domain (FDB and NIC) on
 454          *   packet loopback by flow lookup miss.
 455          */
 456         return config->flow_mreg_c[2] != REG_NONE;
 457 }
 458
 459 /**
 460  * Discover the maximum number of priority available.
 461  *
 462  * @param[in] dev
 463  *   Pointer to the Ethernet device structure.
 464  *
 465  * @return
 466  *   number of supported flow priority on success, a negative errno
 467  *   value otherwise and rte_errno is set.
 468  */
 469 int
 470 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 471 {
 472         struct mlx5_priv *priv = dev->data->dev_private;
 473         struct {
 474                 struct ibv_flow_attr attr;
 475                 struct ibv_flow_spec_eth eth;
 476                 struct ibv_flow_spec_action_drop drop;
 477         } flow_attr = {
 478                 .attr = {
 479                         .num_of_specs = 2,
 480                         .port = (uint8_t)priv->ibv_port,
 481                 },
 482                 .eth = {
 483                         .type = IBV_FLOW_SPEC_ETH,
 484                         .size = sizeof(struct ibv_flow_spec_eth),
 485                 },
 486                 .drop = {
 487                         .size = sizeof(struct ibv_flow_spec_action_drop),
 488                         .type = IBV_FLOW_SPEC_ACTION_DROP,
 489                 },
 490         };
 491         struct ibv_flow *flow;
 492         struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
 493         uint16_t vprio[] = { 8, 16 };
 494         int i;
 495         int priority = 0;
 496
 497         if (!drop) {
 498                 rte_errno = ENOTSUP;
 499                 return -rte_errno;
 500         }
 501         for (i = 0; i != RTE_DIM(vprio); i++) {
 502                 flow_attr.attr.priority = vprio[i] - 1;
 503                 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
 504                 if (!flow)
 505                         break;
 506                 claim_zero(mlx5_glue->destroy_flow(flow));
 507                 priority = vprio[i];
 508         }
 509         mlx5_hrxq_drop_release(dev);
 510         switch (priority) {
 511         case 8:
 512                 priority = RTE_DIM(priority_map_3);
 513                 break;
 514         case 16:
 515                 priority = RTE_DIM(priority_map_5);
 516                 break;
 517         default:
 518                 rte_errno = ENOTSUP;
 519                 DRV_LOG(ERR,
 520                         "port %u verbs maximum priority: %d expected 8/16",
 521                         dev->data->port_id, priority);
 522                 return -rte_errno;
 523         }
 524         DRV_LOG(INFO, "port %u flow maximum priority: %d",
 525                 dev->data->port_id, priority);
 526         return priority;
 527 }
 528
 529 /**
 530  * Adjust flow priority based on the highest layer and the request priority.
 531  *
 532  * @param[in] dev
 533  *   Pointer to the Ethernet device structure.
 534  * @param[in] priority
 535  *   The rule base priority.
 536  * @param[in] subpriority
 537  *   The priority based on the items.
 538  *
 539  * @return
 540  *   The new priority.
 541  */
 542 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 543                                    uint32_t subpriority)
 544 {
 545         uint32_t res = 0;
 546         struct mlx5_priv *priv = dev->data->dev_private;
 547
 548         switch (priv->config.flow_prio) {
 549         case RTE_DIM(priority_map_3):
 550                 res = priority_map_3[priority][subpriority];
 551                 break;
 552         case RTE_DIM(priority_map_5):
 553                 res = priority_map_5[priority][subpriority];
 554                 break;
 555         }
 556         return  res;
 557 }
 558
 559 /**
 560  * Verify the @p item specifications (spec, last, mask) are compatible with the
 561  * NIC capabilities.
 562  *
 563  * @param[in] item
 564  *   Item specification.
 565  * @param[in] mask
 566  *   @p item->mask or flow default bit-masks.
 567  * @param[in] nic_mask
 568  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 569  * @param[in] size
 570  *   Bit-masks size in bytes.
 571  * @param[out] error
 572  *   Pointer to error structure.
 573  *
 574  * @return
 575  *   0 on success, a negative errno value otherwise and rte_errno is set.
 576  */
 577 int
 578 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 579                           const uint8_t *mask,
 580                           const uint8_t *nic_mask,
 581                           unsigned int size,
 582                           struct rte_flow_error *error)
 583 {
 584         unsigned int i;
 585
 586         assert(nic_mask);
 587         for (i = 0; i < size; ++i)
 588                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 589                         return rte_flow_error_set(error, ENOTSUP,
 590                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 591                                                   item,
 592                                                   "mask enables non supported"
 593                                                   " bits");
 594         if (!item->spec && (item->mask || item->last))
 595                 return rte_flow_error_set(error, EINVAL,
 596                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 597                                           "mask/last without a spec is not"
 598                                           " supported");
 599         if (item->spec && item->last) {
 600                 uint8_t spec[size];
 601                 uint8_t last[size];
 602                 unsigned int i;
 603                 int ret;
 604
 605                 for (i = 0; i < size; ++i) {
 606                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 607                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 608                 }
 609                 ret = memcmp(spec, last, size);
 610                 if (ret != 0)
 611                         return rte_flow_error_set(error, EINVAL,
 612                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 613                                                   item,
 614                                                   "range is not valid");
 615         }
 616         return 0;
 617 }
 618
 619 /**
 620  * Adjust the hash fields according to the @p flow information.
 621  *
 622  * @param[in] dev_flow.
 623  *   Pointer to the mlx5_flow.
 624  * @param[in] tunnel
 625  *   1 when the hash field is for a tunnel item.
 626  * @param[in] layer_types
 627  *   ETH_RSS_* types.
 628  * @param[in] hash_fields
 629  *   Item hash fields.
 630  *
 631  * @return
 632  *   The hash fields that should be used.
 633  */
 634 uint64_t
 635 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
 636                             int tunnel __rte_unused, uint64_t layer_types,
 637                             uint64_t hash_fields)
 638 {
 639         struct rte_flow *flow = dev_flow->flow;
 640 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 641         int rss_request_inner = flow->rss.level >= 2;
 642
 643         /* Check RSS hash level for tunnel. */
 644         if (tunnel && rss_request_inner)
 645                 hash_fields |= IBV_RX_HASH_INNER;
 646         else if (tunnel || rss_request_inner)
 647                 return 0;
 648 #endif
 649         /* Check if requested layer matches RSS hash fields. */
 650         if (!(flow->rss.types & layer_types))
 651                 return 0;
 652         return hash_fields;
 653 }
 654
 655 /**
 656  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 657  * if several tunnel rules are used on this queue, the tunnel ptype will be
 658  * cleared.
 659  *
 660  * @param rxq_ctrl
 661  *   Rx queue to update.
 662  */
 663 static void
 664 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 665 {
 666         unsigned int i;
 667         uint32_t tunnel_ptype = 0;
 668
 669         /* Look up for the ptype to use. */
 670         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 671                 if (!rxq_ctrl->flow_tunnels_n[i])
 672                         continue;
 673                 if (!tunnel_ptype) {
 674                         tunnel_ptype = tunnels_info[i].ptype;
 675                 } else {
 676                         tunnel_ptype = 0;
 677                         break;
 678                 }
 679         }
 680         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 681 }
 682
 683 /**
 684  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 685  * flow.
 686  *
 687  * @param[in] dev
 688  *   Pointer to the Ethernet device structure.
 689  * @param[in] dev_flow
 690  *   Pointer to device flow structure.
 691  */
 692 static void
 693 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 694 {
 695         struct mlx5_priv *priv = dev->data->dev_private;
 696         struct rte_flow *flow = dev_flow->flow;
 697         const int mark = !!(dev_flow->actions &
 698                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 699         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 700         unsigned int i;
 701
 702         for (i = 0; i != flow->rss.queue_num; ++i) {
 703                 int idx = (*flow->rss.queue)[i];
 704                 struct mlx5_rxq_ctrl *rxq_ctrl =
 705                         container_of((*priv->rxqs)[idx],
 706                                      struct mlx5_rxq_ctrl, rxq);
 707
 708                 /*
 709                  * To support metadata register copy on Tx loopback,
 710                  * this must be always enabled (metadata may arive
 711                  * from other port - not from local flows only.
 712                  */
 713                 if (priv->config.dv_flow_en &&
 714                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 715                     mlx5_flow_ext_mreg_supported(dev)) {
 716                         rxq_ctrl->rxq.mark = 1;
 717                         rxq_ctrl->flow_mark_n = 1;
 718                 } else if (mark) {
 719                         rxq_ctrl->rxq.mark = 1;
 720                         rxq_ctrl->flow_mark_n++;
 721                 }
 722                 if (tunnel) {
 723                         unsigned int j;
 724
 725                         /* Increase the counter matching the flow. */
 726                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 727                                 if ((tunnels_info[j].tunnel &
 728                                      dev_flow->layers) ==
 729                                     tunnels_info[j].tunnel) {
 730                                         rxq_ctrl->flow_tunnels_n[j]++;
 731                                         break;
 732                                 }
 733                         }
 734                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 735                 }
 736         }
 737 }
 738
 739 /**
 740  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
 741  *
 742  * @param[in] dev
 743  *   Pointer to the Ethernet device structure.
 744  * @param[in] flow
 745  *   Pointer to flow structure.
 746  */
 747 static void
 748 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
 749 {
 750         struct mlx5_flow *dev_flow;
 751
 752         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 753                 flow_drv_rxq_flags_set(dev, dev_flow);
 754 }
 755
 756 /**
 757  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 758  * device flow if no other flow uses it with the same kind of request.
 759  *
 760  * @param dev
 761  *   Pointer to Ethernet device.
 762  * @param[in] dev_flow
 763  *   Pointer to the device flow.
 764  */
 765 static void
 766 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 767 {
 768         struct mlx5_priv *priv = dev->data->dev_private;
 769         struct rte_flow *flow = dev_flow->flow;
 770         const int mark = !!(dev_flow->actions &
 771                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 772         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 773         unsigned int i;
 774
 775         assert(dev->data->dev_started);
 776         for (i = 0; i != flow->rss.queue_num; ++i) {
 777                 int idx = (*flow->rss.queue)[i];
 778                 struct mlx5_rxq_ctrl *rxq_ctrl =
 779                         container_of((*priv->rxqs)[idx],
 780                                      struct mlx5_rxq_ctrl, rxq);
 781
 782                 if (priv->config.dv_flow_en &&
 783                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 784                     mlx5_flow_ext_mreg_supported(dev)) {
 785                         rxq_ctrl->rxq.mark = 1;
 786                         rxq_ctrl->flow_mark_n = 1;
 787                 } else if (mark) {
 788                         rxq_ctrl->flow_mark_n--;
 789                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
 790                 }
 791                 if (tunnel) {
 792                         unsigned int j;
 793
 794                         /* Decrease the counter matching the flow. */
 795                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 796                                 if ((tunnels_info[j].tunnel &
 797                                      dev_flow->layers) ==
 798                                     tunnels_info[j].tunnel) {
 799                                         rxq_ctrl->flow_tunnels_n[j]--;
 800                                         break;
 801                                 }
 802                         }
 803                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 804                 }
 805         }
 806 }
 807
 808 /**
 809  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 810  * @p flow if no other flow uses it with the same kind of request.
 811  *
 812  * @param dev
 813  *   Pointer to Ethernet device.
 814  * @param[in] flow
 815  *   Pointer to the flow.
 816  */
 817 static void
 818 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
 819 {
 820         struct mlx5_flow *dev_flow;
 821
 822         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 823                 flow_drv_rxq_flags_trim(dev, dev_flow);
 824 }
 825
 826 /**
 827  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
 828  *
 829  * @param dev
 830  *   Pointer to Ethernet device.
 831  */
 832 static void
 833 flow_rxq_flags_clear(struct rte_eth_dev *dev)
 834 {
 835         struct mlx5_priv *priv = dev->data->dev_private;
 836         unsigned int i;
 837
 838         for (i = 0; i != priv->rxqs_n; ++i) {
 839                 struct mlx5_rxq_ctrl *rxq_ctrl;
 840                 unsigned int j;
 841
 842                 if (!(*priv->rxqs)[i])
 843                         continue;
 844                 rxq_ctrl = container_of((*priv->rxqs)[i],
 845                                         struct mlx5_rxq_ctrl, rxq);
 846                 rxq_ctrl->flow_mark_n = 0;
 847                 rxq_ctrl->rxq.mark = 0;
 848                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
 849                         rxq_ctrl->flow_tunnels_n[j] = 0;
 850                 rxq_ctrl->rxq.tunnel = 0;
 851         }
 852 }
 853
 854 /*
 855  * return a pointer to the desired action in the list of actions.
 856  *
 857  * @param[in] actions
 858  *   The list of actions to search the action in.
 859  * @param[in] action
 860  *   The action to find.
 861  *
 862  * @return
 863  *   Pointer to the action in the list, if found. NULL otherwise.
 864  */
 865 const struct rte_flow_action *
 866 mlx5_flow_find_action(const struct rte_flow_action *actions,
 867                       enum rte_flow_action_type action)
 868 {
 869         if (actions == NULL)
 870                 return NULL;
 871         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
 872                 if (actions->type == action)
 873                         return actions;
 874         return NULL;
 875 }
 876
 877 /*
 878  * Validate the flag action.
 879  *
 880  * @param[in] action_flags
 881  *   Bit-fields that holds the actions detected until now.
 882  * @param[in] attr
 883  *   Attributes of flow that includes this action.
 884  * @param[out] error
 885  *   Pointer to error structure.
 886  *
 887  * @return
 888  *   0 on success, a negative errno value otherwise and rte_errno is set.
 889  */
 890 int
 891 mlx5_flow_validate_action_flag(uint64_t action_flags,
 892                                const struct rte_flow_attr *attr,
 893                                struct rte_flow_error *error)
 894 {
 895
 896         if (action_flags & MLX5_FLOW_ACTION_DROP)
 897                 return rte_flow_error_set(error, EINVAL,
 898                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 899                                           "can't drop and flag in same flow");
 900         if (action_flags & MLX5_FLOW_ACTION_MARK)
 901                 return rte_flow_error_set(error, EINVAL,
 902                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 903                                           "can't mark and flag in same flow");
 904         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 905                 return rte_flow_error_set(error, EINVAL,
 906                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 907                                           "can't have 2 flag"
 908                                           " actions in same flow");
 909         if (attr->egress)
 910                 return rte_flow_error_set(error, ENOTSUP,
 911                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 912                                           "flag action not supported for "
 913                                           "egress");
 914         return 0;
 915 }
 916
 917 /*
 918  * Validate the mark action.
 919  *
 920  * @param[in] action
 921  *   Pointer to the queue action.
 922  * @param[in] action_flags
 923  *   Bit-fields that holds the actions detected until now.
 924  * @param[in] attr
 925  *   Attributes of flow that includes this action.
 926  * @param[out] error
 927  *   Pointer to error structure.
 928  *
 929  * @return
 930  *   0 on success, a negative errno value otherwise and rte_errno is set.
 931  */
 932 int
 933 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
 934                                uint64_t action_flags,
 935                                const struct rte_flow_attr *attr,
 936                                struct rte_flow_error *error)
 937 {
 938         const struct rte_flow_action_mark *mark = action->conf;
 939
 940         if (!mark)
 941                 return rte_flow_error_set(error, EINVAL,
 942                                           RTE_FLOW_ERROR_TYPE_ACTION,
 943                                           action,
 944                                           "configuration cannot be null");
 945         if (mark->id >= MLX5_FLOW_MARK_MAX)
 946                 return rte_flow_error_set(error, EINVAL,
 947                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 948                                           &mark->id,
 949                                           "mark id must in 0 <= id < "
 950                                           RTE_STR(MLX5_FLOW_MARK_MAX));
 951         if (action_flags & MLX5_FLOW_ACTION_DROP)
 952                 return rte_flow_error_set(error, EINVAL,
 953                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 954                                           "can't drop and mark in same flow");
 955         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 956                 return rte_flow_error_set(error, EINVAL,
 957                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 958                                           "can't flag and mark in same flow");
 959         if (action_flags & MLX5_FLOW_ACTION_MARK)
 960                 return rte_flow_error_set(error, EINVAL,
 961                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 962                                           "can't have 2 mark actions in same"
 963                                           " flow");
 964         if (attr->egress)
 965                 return rte_flow_error_set(error, ENOTSUP,
 966                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 967                                           "mark action not supported for "
 968                                           "egress");
 969         return 0;
 970 }
 971
 972 /*
 973  * Validate the drop action.
 974  *
 975  * @param[in] action_flags
 976  *   Bit-fields that holds the actions detected until now.
 977  * @param[in] attr
 978  *   Attributes of flow that includes this action.
 979  * @param[out] error
 980  *   Pointer to error structure.
 981  *
 982  * @return
 983  *   0 on success, a negative errno value otherwise and rte_errno is set.
 984  */
 985 int
 986 mlx5_flow_validate_action_drop(uint64_t action_flags,
 987                                const struct rte_flow_attr *attr,
 988                                struct rte_flow_error *error)
 989 {
 990         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 991                 return rte_flow_error_set(error, EINVAL,
 992                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 993                                           "can't drop and flag in same flow");
 994         if (action_flags & MLX5_FLOW_ACTION_MARK)
 995                 return rte_flow_error_set(error, EINVAL,
 996                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 997                                           "can't drop and mark in same flow");
 998         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
 999                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
1000                 return rte_flow_error_set(error, EINVAL,
1001                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1002                                           "can't have 2 fate actions in"
1003                                           " same flow");
1004         if (attr->egress)
1005                 return rte_flow_error_set(error, ENOTSUP,
1006                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1007                                           "drop action not supported for "
1008                                           "egress");
1009         return 0;
1010 }
1011
1012 /*
1013  * Validate the queue action.
1014  *
1015  * @param[in] action
1016  *   Pointer to the queue action.
1017  * @param[in] action_flags
1018  *   Bit-fields that holds the actions detected until now.
1019  * @param[in] dev
1020  *   Pointer to the Ethernet device structure.
1021  * @param[in] attr
1022  *   Attributes of flow that includes this action.
1023  * @param[out] error
1024  *   Pointer to error structure.
1025  *
1026  * @return
1027  *   0 on success, a negative errno value otherwise and rte_errno is set.
1028  */
1029 int
1030 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1031                                 uint64_t action_flags,
1032                                 struct rte_eth_dev *dev,
1033                                 const struct rte_flow_attr *attr,
1034                                 struct rte_flow_error *error)
1035 {
1036         struct mlx5_priv *priv = dev->data->dev_private;
1037         const struct rte_flow_action_queue *queue = action->conf;
1038
1039         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1040                 return rte_flow_error_set(error, EINVAL,
1041                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1042                                           "can't have 2 fate actions in"
1043                                           " same flow");
1044         if (!priv->rxqs_n)
1045                 return rte_flow_error_set(error, EINVAL,
1046                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1047                                           NULL, "No Rx queues configured");
1048         if (queue->index >= priv->rxqs_n)
1049                 return rte_flow_error_set(error, EINVAL,
1050                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1051                                           &queue->index,
1052                                           "queue index out of range");
1053         if (!(*priv->rxqs)[queue->index])
1054                 return rte_flow_error_set(error, EINVAL,
1055                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1056                                           &queue->index,
1057                                           "queue is not configured");
1058         if (attr->egress)
1059                 return rte_flow_error_set(error, ENOTSUP,
1060                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1061                                           "queue action not supported for "
1062                                           "egress");
1063         return 0;
1064 }
1065
1066 /*
1067  * Validate the rss action.
1068  *
1069  * @param[in] action
1070  *   Pointer to the queue action.
1071  * @param[in] action_flags
1072  *   Bit-fields that holds the actions detected until now.
1073  * @param[in] dev
1074  *   Pointer to the Ethernet device structure.
1075  * @param[in] attr
1076  *   Attributes of flow that includes this action.
1077  * @param[in] item_flags
1078  *   Items that were detected.
1079  * @param[out] error
1080  *   Pointer to error structure.
1081  *
1082  * @return
1083  *   0 on success, a negative errno value otherwise and rte_errno is set.
1084  */
1085 int
1086 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1087                               uint64_t action_flags,
1088                               struct rte_eth_dev *dev,
1089                               const struct rte_flow_attr *attr,
1090                               uint64_t item_flags,
1091                               struct rte_flow_error *error)
1092 {
1093         struct mlx5_priv *priv = dev->data->dev_private;
1094         const struct rte_flow_action_rss *rss = action->conf;
1095         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1096         unsigned int i;
1097
1098         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1099                 return rte_flow_error_set(error, EINVAL,
1100                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1101                                           "can't have 2 fate actions"
1102                                           " in same flow");
1103         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1104             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1105                 return rte_flow_error_set(error, ENOTSUP,
1106                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1107                                           &rss->func,
1108                                           "RSS hash function not supported");
1109 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1110         if (rss->level > 2)
1111 #else
1112         if (rss->level > 1)
1113 #endif
1114                 return rte_flow_error_set(error, ENOTSUP,
1115                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1116                                           &rss->level,
1117                                           "tunnel RSS is not supported");
1118         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1119         if (rss->key_len == 0 && rss->key != NULL)
1120                 return rte_flow_error_set(error, ENOTSUP,
1121                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1122                                           &rss->key_len,
1123                                           "RSS hash key length 0");
1124         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1125                 return rte_flow_error_set(error, ENOTSUP,
1126                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1127                                           &rss->key_len,
1128                                           "RSS hash key too small");
1129         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1130                 return rte_flow_error_set(error, ENOTSUP,
1131                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1132                                           &rss->key_len,
1133                                           "RSS hash key too large");
1134         if (rss->queue_num > priv->config.ind_table_max_size)
1135                 return rte_flow_error_set(error, ENOTSUP,
1136                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1137                                           &rss->queue_num,
1138                                           "number of queues too large");
1139         if (rss->types & MLX5_RSS_HF_MASK)
1140                 return rte_flow_error_set(error, ENOTSUP,
1141                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1142                                           &rss->types,
1143                                           "some RSS protocols are not"
1144                                           " supported");
1145         if (!priv->rxqs_n)
1146                 return rte_flow_error_set(error, EINVAL,
1147                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1148                                           NULL, "No Rx queues configured");
1149         if (!rss->queue_num)
1150                 return rte_flow_error_set(error, EINVAL,
1151                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1152                                           NULL, "No queues configured");
1153         for (i = 0; i != rss->queue_num; ++i) {
1154                 if (rss->queue[i] >= priv->rxqs_n)
1155                         return rte_flow_error_set
1156                                 (error, EINVAL,
1157                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1158                                  &rss->queue[i], "queue index out of range");
1159                 if (!(*priv->rxqs)[rss->queue[i]])
1160                         return rte_flow_error_set
1161                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1162                                  &rss->queue[i], "queue is not configured");
1163         }
1164         if (attr->egress)
1165                 return rte_flow_error_set(error, ENOTSUP,
1166                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1167                                           "rss action not supported for "
1168                                           "egress");
1169         if (rss->level > 1 &&  !tunnel)
1170                 return rte_flow_error_set(error, EINVAL,
1171                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1172                                           "inner RSS is not supported for "
1173                                           "non-tunnel flows");
1174         return 0;
1175 }
1176
1177 /*
1178  * Validate the count action.
1179  *
1180  * @param[in] dev
1181  *   Pointer to the Ethernet device structure.
1182  * @param[in] attr
1183  *   Attributes of flow that includes this action.
1184  * @param[out] error
1185  *   Pointer to error structure.
1186  *
1187  * @return
1188  *   0 on success, a negative errno value otherwise and rte_errno is set.
1189  */
1190 int
1191 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1192                                 const struct rte_flow_attr *attr,
1193                                 struct rte_flow_error *error)
1194 {
1195         if (attr->egress)
1196                 return rte_flow_error_set(error, ENOTSUP,
1197                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1198                                           "count action not supported for "
1199                                           "egress");
1200         return 0;
1201 }
1202
1203 /**
1204  * Verify the @p attributes will be correctly understood by the NIC and store
1205  * them in the @p flow if everything is correct.
1206  *
1207  * @param[in] dev
1208  *   Pointer to the Ethernet device structure.
1209  * @param[in] attributes
1210  *   Pointer to flow attributes
1211  * @param[out] error
1212  *   Pointer to error structure.
1213  *
1214  * @return
1215  *   0 on success, a negative errno value otherwise and rte_errno is set.
1216  */
1217 int
1218 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1219                               const struct rte_flow_attr *attributes,
1220                               struct rte_flow_error *error)
1221 {
1222         struct mlx5_priv *priv = dev->data->dev_private;
1223         uint32_t priority_max = priv->config.flow_prio - 1;
1224
1225         if (attributes->group)
1226                 return rte_flow_error_set(error, ENOTSUP,
1227                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1228                                           NULL, "groups is not supported");
1229         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1230             attributes->priority >= priority_max)
1231                 return rte_flow_error_set(error, ENOTSUP,
1232                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1233                                           NULL, "priority out of range");
1234         if (attributes->egress)
1235                 return rte_flow_error_set(error, ENOTSUP,
1236                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1237                                           "egress is not supported");
1238         if (attributes->transfer && !priv->config.dv_esw_en)
1239                 return rte_flow_error_set(error, ENOTSUP,
1240                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1241                                           NULL, "transfer is not supported");
1242         if (!attributes->ingress)
1243                 return rte_flow_error_set(error, EINVAL,
1244                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1245                                           NULL,
1246                                           "ingress attribute is mandatory");
1247         return 0;
1248 }
1249
1250 /**
1251  * Validate ICMP6 item.
1252  *
1253  * @param[in] item
1254  *   Item specification.
1255  * @param[in] item_flags
1256  *   Bit-fields that holds the items detected until now.
1257  * @param[out] error
1258  *   Pointer to error structure.
1259  *
1260  * @return
1261  *   0 on success, a negative errno value otherwise and rte_errno is set.
1262  */
1263 int
1264 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1265                                uint64_t item_flags,
1266                                uint8_t target_protocol,
1267                                struct rte_flow_error *error)
1268 {
1269         const struct rte_flow_item_icmp6 *mask = item->mask;
1270         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1271         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1272                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1273         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1274                                       MLX5_FLOW_LAYER_OUTER_L4;
1275         int ret;
1276
1277         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1278                 return rte_flow_error_set(error, EINVAL,
1279                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1280                                           "protocol filtering not compatible"
1281                                           " with ICMP6 layer");
1282         if (!(item_flags & l3m))
1283                 return rte_flow_error_set(error, EINVAL,
1284                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1285                                           "IPv6 is mandatory to filter on"
1286                                           " ICMP6");
1287         if (item_flags & l4m)
1288                 return rte_flow_error_set(error, EINVAL,
1289                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1290                                           "multiple L4 layers not supported");
1291         if (!mask)
1292                 mask = &rte_flow_item_icmp6_mask;
1293         ret = mlx5_flow_item_acceptable
1294                 (item, (const uint8_t *)mask,
1295                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1296                  sizeof(struct rte_flow_item_icmp6), error);
1297         if (ret < 0)
1298                 return ret;
1299         return 0;
1300 }
1301
1302 /**
1303  * Validate ICMP item.
1304  *
1305  * @param[in] item
1306  *   Item specification.
1307  * @param[in] item_flags
1308  *   Bit-fields that holds the items detected until now.
1309  * @param[out] error
1310  *   Pointer to error structure.
1311  *
1312  * @return
1313  *   0 on success, a negative errno value otherwise and rte_errno is set.
1314  */
1315 int
1316 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1317                              uint64_t item_flags,
1318                              uint8_t target_protocol,
1319                              struct rte_flow_error *error)
1320 {
1321         const struct rte_flow_item_icmp *mask = item->mask;
1322         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1323         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1324                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1325         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1326                                       MLX5_FLOW_LAYER_OUTER_L4;
1327         int ret;
1328
1329         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1330                 return rte_flow_error_set(error, EINVAL,
1331                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1332                                           "protocol filtering not compatible"
1333                                           " with ICMP layer");
1334         if (!(item_flags & l3m))
1335                 return rte_flow_error_set(error, EINVAL,
1336                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1337                                           "IPv4 is mandatory to filter"
1338                                           " on ICMP");
1339         if (item_flags & l4m)
1340                 return rte_flow_error_set(error, EINVAL,
1341                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1342                                           "multiple L4 layers not supported");
1343         if (!mask)
1344                 mask = &rte_flow_item_icmp_mask;
1345         ret = mlx5_flow_item_acceptable
1346                 (item, (const uint8_t *)mask,
1347                  (const uint8_t *)&rte_flow_item_icmp_mask,
1348                  sizeof(struct rte_flow_item_icmp), error);
1349         if (ret < 0)
1350                 return ret;
1351         return 0;
1352 }
1353
1354 /**
1355  * Validate Ethernet item.
1356  *
1357  * @param[in] item
1358  *   Item specification.
1359  * @param[in] item_flags
1360  *   Bit-fields that holds the items detected until now.
1361  * @param[out] error
1362  *   Pointer to error structure.
1363  *
1364  * @return
1365  *   0 on success, a negative errno value otherwise and rte_errno is set.
1366  */
1367 int
1368 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1369                             uint64_t item_flags,
1370                             struct rte_flow_error *error)
1371 {
1372         const struct rte_flow_item_eth *mask = item->mask;
1373         const struct rte_flow_item_eth nic_mask = {
1374                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1375                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1376                 .type = RTE_BE16(0xffff),
1377         };
1378         int ret;
1379         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1380         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1381                                        MLX5_FLOW_LAYER_OUTER_L2;
1382
1383         if (item_flags & ethm)
1384                 return rte_flow_error_set(error, ENOTSUP,
1385                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1386                                           "multiple L2 layers not supported");
1387         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1388             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1389                 return rte_flow_error_set(error, EINVAL,
1390                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1391                                           "L2 layer should not follow "
1392                                           "L3 layers");
1393         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1394             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1395                 return rte_flow_error_set(error, EINVAL,
1396                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1397                                           "L2 layer should not follow VLAN");
1398         if (!mask)
1399                 mask = &rte_flow_item_eth_mask;
1400         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1401                                         (const uint8_t *)&nic_mask,
1402                                         sizeof(struct rte_flow_item_eth),
1403                                         error);
1404         return ret;
1405 }
1406
1407 /**
1408  * Validate VLAN item.
1409  *
1410  * @param[in] item
1411  *   Item specification.
1412  * @param[in] item_flags
1413  *   Bit-fields that holds the items detected until now.
1414  * @param[in] dev
1415  *   Ethernet device flow is being created on.
1416  * @param[out] error
1417  *   Pointer to error structure.
1418  *
1419  * @return
1420  *   0 on success, a negative errno value otherwise and rte_errno is set.
1421  */
1422 int
1423 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1424                              uint64_t item_flags,
1425                              struct rte_eth_dev *dev,
1426                              struct rte_flow_error *error)
1427 {
1428         const struct rte_flow_item_vlan *spec = item->spec;
1429         const struct rte_flow_item_vlan *mask = item->mask;
1430         const struct rte_flow_item_vlan nic_mask = {
1431                 .tci = RTE_BE16(UINT16_MAX),
1432                 .inner_type = RTE_BE16(UINT16_MAX),
1433         };
1434         uint16_t vlan_tag = 0;
1435         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1436         int ret;
1437         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1438                                         MLX5_FLOW_LAYER_INNER_L4) :
1439                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1440                                         MLX5_FLOW_LAYER_OUTER_L4);
1441         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1442                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1443
1444         if (item_flags & vlanm)
1445                 return rte_flow_error_set(error, EINVAL,
1446                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1447                                           "multiple VLAN layers not supported");
1448         else if ((item_flags & l34m) != 0)
1449                 return rte_flow_error_set(error, EINVAL,
1450                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1451                                           "VLAN cannot follow L3/L4 layer");
1452         if (!mask)
1453                 mask = &rte_flow_item_vlan_mask;
1454         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1455                                         (const uint8_t *)&nic_mask,
1456                                         sizeof(struct rte_flow_item_vlan),
1457                                         error);
1458         if (ret)
1459                 return ret;
1460         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1461                 struct mlx5_priv *priv = dev->data->dev_private;
1462
1463                 if (priv->vmwa_context) {
1464                         /*
1465                          * Non-NULL context means we have a virtual machine
1466                          * and SR-IOV enabled, we have to create VLAN interface
1467                          * to make hypervisor to setup E-Switch vport
1468                          * context correctly. We avoid creating the multiple
1469                          * VLAN interfaces, so we cannot support VLAN tag mask.
1470                          */
1471                         return rte_flow_error_set(error, EINVAL,
1472                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1473                                                   item,
1474                                                   "VLAN tag mask is not"
1475                                                   " supported in virtual"
1476                                                   " environment");
1477                 }
1478         }
1479         if (spec) {
1480                 vlan_tag = spec->tci;
1481                 vlan_tag &= mask->tci;
1482         }
1483         /*
1484          * From verbs perspective an empty VLAN is equivalent
1485          * to a packet without VLAN layer.
1486          */
1487         if (!vlan_tag)
1488                 return rte_flow_error_set(error, EINVAL,
1489                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1490                                           item->spec,
1491                                           "VLAN cannot be empty");
1492         return 0;
1493 }
1494
1495 /**
1496  * Validate IPV4 item.
1497  *
1498  * @param[in] item
1499  *   Item specification.
1500  * @param[in] item_flags
1501  *   Bit-fields that holds the items detected until now.
1502  * @param[in] acc_mask
1503  *   Acceptable mask, if NULL default internal default mask
1504  *   will be used to check whether item fields are supported.
1505  * @param[out] error
1506  *   Pointer to error structure.
1507  *
1508  * @return
1509  *   0 on success, a negative errno value otherwise and rte_errno is set.
1510  */
1511 int
1512 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1513                              uint64_t item_flags,
1514                              uint64_t last_item,
1515                              uint16_t ether_type,
1516                              const struct rte_flow_item_ipv4 *acc_mask,
1517                              struct rte_flow_error *error)
1518 {
1519         const struct rte_flow_item_ipv4 *mask = item->mask;
1520         const struct rte_flow_item_ipv4 *spec = item->spec;
1521         const struct rte_flow_item_ipv4 nic_mask = {
1522                 .hdr = {
1523                         .src_addr = RTE_BE32(0xffffffff),
1524                         .dst_addr = RTE_BE32(0xffffffff),
1525                         .type_of_service = 0xff,
1526                         .next_proto_id = 0xff,
1527                 },
1528         };
1529         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1530         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1531                                       MLX5_FLOW_LAYER_OUTER_L3;
1532         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1533                                       MLX5_FLOW_LAYER_OUTER_L4;
1534         int ret;
1535         uint8_t next_proto = 0xFF;
1536         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1537                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1538                                   MLX5_FLOW_LAYER_INNER_VLAN);
1539
1540         if ((last_item & l2_vlan) && ether_type &&
1541             ether_type != RTE_ETHER_TYPE_IPV4)
1542                 return rte_flow_error_set(error, EINVAL,
1543                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1544                                           "IPv4 cannot follow L2/VLAN layer "
1545                                           "which ether type is not IPv4");
1546         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1547                 if (mask && spec)
1548                         next_proto = mask->hdr.next_proto_id &
1549                                      spec->hdr.next_proto_id;
1550                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1551                         return rte_flow_error_set(error, EINVAL,
1552                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1553                                                   item,
1554                                                   "multiple tunnel "
1555                                                   "not supported");
1556         }
1557         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1558                 return rte_flow_error_set(error, EINVAL,
1559                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1560                                           "wrong tunnel type - IPv6 specified "
1561                                           "but IPv4 item provided");
1562         if (item_flags & l3m)
1563                 return rte_flow_error_set(error, ENOTSUP,
1564                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1565                                           "multiple L3 layers not supported");
1566         else if (item_flags & l4m)
1567                 return rte_flow_error_set(error, EINVAL,
1568                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1569                                           "L3 cannot follow an L4 layer.");
1570         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1571                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1572                 return rte_flow_error_set(error, EINVAL,
1573                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1574                                           "L3 cannot follow an NVGRE layer.");
1575         if (!mask)
1576                 mask = &rte_flow_item_ipv4_mask;
1577         else if (mask->hdr.next_proto_id != 0 &&
1578                  mask->hdr.next_proto_id != 0xff)
1579                 return rte_flow_error_set(error, EINVAL,
1580                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1581                                           "partial mask is not supported"
1582                                           " for protocol");
1583         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1584                                         acc_mask ? (const uint8_t *)acc_mask
1585                                                  : (const uint8_t *)&nic_mask,
1586                                         sizeof(struct rte_flow_item_ipv4),
1587                                         error);
1588         if (ret < 0)
1589                 return ret;
1590         return 0;
1591 }
1592
1593 /**
1594  * Validate IPV6 item.
1595  *
1596  * @param[in] item
1597  *   Item specification.
1598  * @param[in] item_flags
1599  *   Bit-fields that holds the items detected until now.
1600  * @param[in] acc_mask
1601  *   Acceptable mask, if NULL default internal default mask
1602  *   will be used to check whether item fields are supported.
1603  * @param[out] error
1604  *   Pointer to error structure.
1605  *
1606  * @return
1607  *   0 on success, a negative errno value otherwise and rte_errno is set.
1608  */
1609 int
1610 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1611                              uint64_t item_flags,
1612                              uint64_t last_item,
1613                              uint16_t ether_type,
1614                              const struct rte_flow_item_ipv6 *acc_mask,
1615                              struct rte_flow_error *error)
1616 {
1617         const struct rte_flow_item_ipv6 *mask = item->mask;
1618         const struct rte_flow_item_ipv6 *spec = item->spec;
1619         const struct rte_flow_item_ipv6 nic_mask = {
1620                 .hdr = {
1621                         .src_addr =
1622                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1623                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1624                         .dst_addr =
1625                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1626                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1627                         .vtc_flow = RTE_BE32(0xffffffff),
1628                         .proto = 0xff,
1629                         .hop_limits = 0xff,
1630                 },
1631         };
1632         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1633         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1634                                       MLX5_FLOW_LAYER_OUTER_L3;
1635         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1636                                       MLX5_FLOW_LAYER_OUTER_L4;
1637         int ret;
1638         uint8_t next_proto = 0xFF;
1639         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1640                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1641                                   MLX5_FLOW_LAYER_INNER_VLAN);
1642
1643         if ((last_item & l2_vlan) && ether_type &&
1644             ether_type != RTE_ETHER_TYPE_IPV6)
1645                 return rte_flow_error_set(error, EINVAL,
1646                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1647                                           "IPv6 cannot follow L2/VLAN layer "
1648                                           "which ether type is not IPv6");
1649         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1650                 if (mask && spec)
1651                         next_proto = mask->hdr.proto & spec->hdr.proto;
1652                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1653                         return rte_flow_error_set(error, EINVAL,
1654                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1655                                                   item,
1656                                                   "multiple tunnel "
1657                                                   "not supported");
1658         }
1659         if (item_flags & MLX5_FLOW_LAYER_IPIP)
1660                 return rte_flow_error_set(error, EINVAL,
1661                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1662                                           "wrong tunnel type - IPv4 specified "
1663                                           "but IPv6 item provided");
1664         if (item_flags & l3m)
1665                 return rte_flow_error_set(error, ENOTSUP,
1666                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1667                                           "multiple L3 layers not supported");
1668         else if (item_flags & l4m)
1669                 return rte_flow_error_set(error, EINVAL,
1670                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1671                                           "L3 cannot follow an L4 layer.");
1672         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1673                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1674                 return rte_flow_error_set(error, EINVAL,
1675                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1676                                           "L3 cannot follow an NVGRE layer.");
1677         if (!mask)
1678                 mask = &rte_flow_item_ipv6_mask;
1679         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1680                                         acc_mask ? (const uint8_t *)acc_mask
1681                                                  : (const uint8_t *)&nic_mask,
1682                                         sizeof(struct rte_flow_item_ipv6),
1683                                         error);
1684         if (ret < 0)
1685                 return ret;
1686         return 0;
1687 }
1688
1689 /**
1690  * Validate UDP item.
1691  *
1692  * @param[in] item
1693  *   Item specification.
1694  * @param[in] item_flags
1695  *   Bit-fields that holds the items detected until now.
1696  * @param[in] target_protocol
1697  *   The next protocol in the previous item.
1698  * @param[in] flow_mask
1699  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1700  * @param[out] error
1701  *   Pointer to error structure.
1702  *
1703  * @return
1704  *   0 on success, a negative errno value otherwise and rte_errno is set.
1705  */
1706 int
1707 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1708                             uint64_t item_flags,
1709                             uint8_t target_protocol,
1710                             struct rte_flow_error *error)
1711 {
1712         const struct rte_flow_item_udp *mask = item->mask;
1713         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1714         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1715                                       MLX5_FLOW_LAYER_OUTER_L3;
1716         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1717                                       MLX5_FLOW_LAYER_OUTER_L4;
1718         int ret;
1719
1720         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1721                 return rte_flow_error_set(error, EINVAL,
1722                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1723                                           "protocol filtering not compatible"
1724                                           " with UDP layer");
1725         if (!(item_flags & l3m))
1726                 return rte_flow_error_set(error, EINVAL,
1727                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1728                                           "L3 is mandatory to filter on L4");
1729         if (item_flags & l4m)
1730                 return rte_flow_error_set(error, EINVAL,
1731                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1732                                           "multiple L4 layers not supported");
1733         if (!mask)
1734                 mask = &rte_flow_item_udp_mask;
1735         ret = mlx5_flow_item_acceptable
1736                 (item, (const uint8_t *)mask,
1737                  (const uint8_t *)&rte_flow_item_udp_mask,
1738                  sizeof(struct rte_flow_item_udp), error);
1739         if (ret < 0)
1740                 return ret;
1741         return 0;
1742 }
1743
1744 /**
1745  * Validate TCP item.
1746  *
1747  * @param[in] item
1748  *   Item specification.
1749  * @param[in] item_flags
1750  *   Bit-fields that holds the items detected until now.
1751  * @param[in] target_protocol
1752  *   The next protocol in the previous item.
1753  * @param[out] error
1754  *   Pointer to error structure.
1755  *
1756  * @return
1757  *   0 on success, a negative errno value otherwise and rte_errno is set.
1758  */
1759 int
1760 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1761                             uint64_t item_flags,
1762                             uint8_t target_protocol,
1763                             const struct rte_flow_item_tcp *flow_mask,
1764                             struct rte_flow_error *error)
1765 {
1766         const struct rte_flow_item_tcp *mask = item->mask;
1767         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1768         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1769                                       MLX5_FLOW_LAYER_OUTER_L3;
1770         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1771                                       MLX5_FLOW_LAYER_OUTER_L4;
1772         int ret;
1773
1774         assert(flow_mask);
1775         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1776                 return rte_flow_error_set(error, EINVAL,
1777                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1778                                           "protocol filtering not compatible"
1779                                           " with TCP layer");
1780         if (!(item_flags & l3m))
1781                 return rte_flow_error_set(error, EINVAL,
1782                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1783                                           "L3 is mandatory to filter on L4");
1784         if (item_flags & l4m)
1785                 return rte_flow_error_set(error, EINVAL,
1786                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1787                                           "multiple L4 layers not supported");
1788         if (!mask)
1789                 mask = &rte_flow_item_tcp_mask;
1790         ret = mlx5_flow_item_acceptable
1791                 (item, (const uint8_t *)mask,
1792                  (const uint8_t *)flow_mask,
1793                  sizeof(struct rte_flow_item_tcp), error);
1794         if (ret < 0)
1795                 return ret;
1796         return 0;
1797 }
1798
1799 /**
1800  * Validate VXLAN item.
1801  *
1802  * @param[in] item
1803  *   Item specification.
1804  * @param[in] item_flags
1805  *   Bit-fields that holds the items detected until now.
1806  * @param[in] target_protocol
1807  *   The next protocol in the previous item.
1808  * @param[out] error
1809  *   Pointer to error structure.
1810  *
1811  * @return
1812  *   0 on success, a negative errno value otherwise and rte_errno is set.
1813  */
1814 int
1815 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1816                               uint64_t item_flags,
1817                               struct rte_flow_error *error)
1818 {
1819         const struct rte_flow_item_vxlan *spec = item->spec;
1820         const struct rte_flow_item_vxlan *mask = item->mask;
1821         int ret;
1822         union vni {
1823                 uint32_t vlan_id;
1824                 uint8_t vni[4];
1825         } id = { .vlan_id = 0, };
1826         uint32_t vlan_id = 0;
1827
1828
1829         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1830                 return rte_flow_error_set(error, ENOTSUP,
1831                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1832                                           "multiple tunnel layers not"
1833                                           " supported");
1834         /*
1835          * Verify only UDPv4 is present as defined in
1836          * https://tools.ietf.org/html/rfc7348
1837          */
1838         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1839                 return rte_flow_error_set(error, EINVAL,
1840                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1841                                           "no outer UDP layer found");
1842         if (!mask)
1843                 mask = &rte_flow_item_vxlan_mask;
1844         ret = mlx5_flow_item_acceptable
1845                 (item, (const uint8_t *)mask,
1846                  (const uint8_t *)&rte_flow_item_vxlan_mask,
1847                  sizeof(struct rte_flow_item_vxlan),
1848                  error);
1849         if (ret < 0)
1850                 return ret;
1851         if (spec) {
1852                 memcpy(&id.vni[1], spec->vni, 3);
1853                 vlan_id = id.vlan_id;
1854                 memcpy(&id.vni[1], mask->vni, 3);
1855                 vlan_id &= id.vlan_id;
1856         }
1857         /*
1858          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if
1859          * only this layer is defined in the Verbs specification it is
1860          * interpreted as wildcard and all packets will match this
1861          * rule, if it follows a full stack layer (ex: eth / ipv4 /
1862          * udp), all packets matching the layers before will also
1863          * match this rule.  To avoid such situation, VNI 0 is
1864          * currently refused.
1865          */
1866         if (!vlan_id)
1867                 return rte_flow_error_set(error, ENOTSUP,
1868                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1869                                           "VXLAN vni cannot be 0");
1870         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1871                 return rte_flow_error_set(error, ENOTSUP,
1872                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1873                                           "VXLAN tunnel must be fully defined");
1874         return 0;
1875 }
1876
1877 /**
1878  * Validate VXLAN_GPE item.
1879  *
1880  * @param[in] item
1881  *   Item specification.
1882  * @param[in] item_flags
1883  *   Bit-fields that holds the items detected until now.
1884  * @param[in] priv
1885  *   Pointer to the private data structure.
1886  * @param[in] target_protocol
1887  *   The next protocol in the previous item.
1888  * @param[out] error
1889  *   Pointer to error structure.
1890  *
1891  * @return
1892  *   0 on success, a negative errno value otherwise and rte_errno is set.
1893  */
1894 int
1895 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1896                                   uint64_t item_flags,
1897                                   struct rte_eth_dev *dev,
1898                                   struct rte_flow_error *error)
1899 {
1900         struct mlx5_priv *priv = dev->data->dev_private;
1901         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1902         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1903         int ret;
1904         union vni {
1905                 uint32_t vlan_id;
1906                 uint8_t vni[4];
1907         } id = { .vlan_id = 0, };
1908         uint32_t vlan_id = 0;
1909
1910         if (!priv->config.l3_vxlan_en)
1911                 return rte_flow_error_set(error, ENOTSUP,
1912                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1913                                           "L3 VXLAN is not enabled by device"
1914                                           " parameter and/or not configured in"
1915                                           " firmware");
1916         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1917                 return rte_flow_error_set(error, ENOTSUP,
1918                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1919                                           "multiple tunnel layers not"
1920                                           " supported");
1921         /*
1922          * Verify only UDPv4 is present as defined in
1923          * https://tools.ietf.org/html/rfc7348
1924          */
1925         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1926                 return rte_flow_error_set(error, EINVAL,
1927                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1928                                           "no outer UDP layer found");
1929         if (!mask)
1930                 mask = &rte_flow_item_vxlan_gpe_mask;
1931         ret = mlx5_flow_item_acceptable
1932                 (item, (const uint8_t *)mask,
1933                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1934                  sizeof(struct rte_flow_item_vxlan_gpe),
1935                  error);
1936         if (ret < 0)
1937                 return ret;
1938         if (spec) {
1939                 if (spec->protocol)
1940                         return rte_flow_error_set(error, ENOTSUP,
1941                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1942                                                   item,
1943                                                   "VxLAN-GPE protocol"
1944                                                   " not supported");
1945                 memcpy(&id.vni[1], spec->vni, 3);
1946                 vlan_id = id.vlan_id;
1947                 memcpy(&id.vni[1], mask->vni, 3);
1948                 vlan_id &= id.vlan_id;
1949         }
1950         /*
1951          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this
1952          * layer is defined in the Verbs specification it is interpreted as
1953          * wildcard and all packets will match this rule, if it follows a full
1954          * stack layer (ex: eth / ipv4 / udp), all packets matching the layers
1955          * before will also match this rule.  To avoid such situation, VNI 0
1956          * is currently refused.
1957          */
1958         if (!vlan_id)
1959                 return rte_flow_error_set(error, ENOTSUP,
1960                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1961                                           "VXLAN-GPE vni cannot be 0");
1962         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1963                 return rte_flow_error_set(error, ENOTSUP,
1964                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1965                                           "VXLAN-GPE tunnel must be fully"
1966                                           " defined");
1967         return 0;
1968 }
1969 /**
1970  * Validate GRE Key item.
1971  *
1972  * @param[in] item
1973  *   Item specification.
1974  * @param[in] item_flags
1975  *   Bit flags to mark detected items.
1976  * @param[in] gre_item
1977  *   Pointer to gre_item
1978  * @param[out] error
1979  *   Pointer to error structure.
1980  *
1981  * @return
1982  *   0 on success, a negative errno value otherwise and rte_errno is set.
1983  */
1984 int
1985 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1986                                 uint64_t item_flags,
1987                                 const struct rte_flow_item *gre_item,
1988                                 struct rte_flow_error *error)
1989 {
1990         const rte_be32_t *mask = item->mask;
1991         int ret = 0;
1992         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1993         const struct rte_flow_item_gre *gre_spec = gre_item->spec;
1994         const struct rte_flow_item_gre *gre_mask = gre_item->mask;
1995
1996         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1997                 return rte_flow_error_set(error, ENOTSUP,
1998                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1999                                           "Multiple GRE key not support");
2000         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2001                 return rte_flow_error_set(error, ENOTSUP,
2002                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2003                                           "No preceding GRE header");
2004         if (item_flags & MLX5_FLOW_LAYER_INNER)
2005                 return rte_flow_error_set(error, ENOTSUP,
2006                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2007                                           "GRE key following a wrong item");
2008         if (!gre_mask)
2009                 gre_mask = &rte_flow_item_gre_mask;
2010         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2011                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2012                 return rte_flow_error_set(error, EINVAL,
2013                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2014                                           "Key bit must be on");
2015
2016         if (!mask)
2017                 mask = &gre_key_default_mask;
2018         ret = mlx5_flow_item_acceptable
2019                 (item, (const uint8_t *)mask,
2020                  (const uint8_t *)&gre_key_default_mask,
2021                  sizeof(rte_be32_t), error);
2022         return ret;
2023 }
2024
2025 /**
2026  * Validate GRE item.
2027  *
2028  * @param[in] item
2029  *   Item specification.
2030  * @param[in] item_flags
2031  *   Bit flags to mark detected items.
2032  * @param[in] target_protocol
2033  *   The next protocol in the previous item.
2034  * @param[out] error
2035  *   Pointer to error structure.
2036  *
2037  * @return
2038  *   0 on success, a negative errno value otherwise and rte_errno is set.
2039  */
2040 int
2041 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2042                             uint64_t item_flags,
2043                             uint8_t target_protocol,
2044                             struct rte_flow_error *error)
2045 {
2046         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2047         const struct rte_flow_item_gre *mask = item->mask;
2048         int ret;
2049         const struct rte_flow_item_gre nic_mask = {
2050                 .c_rsvd0_ver = RTE_BE16(0xB000),
2051                 .protocol = RTE_BE16(UINT16_MAX),
2052         };
2053
2054         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2055                 return rte_flow_error_set(error, EINVAL,
2056                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2057                                           "protocol filtering not compatible"
2058                                           " with this GRE layer");
2059         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2060                 return rte_flow_error_set(error, ENOTSUP,
2061                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2062                                           "multiple tunnel layers not"
2063                                           " supported");
2064         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2065                 return rte_flow_error_set(error, ENOTSUP,
2066                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2067                                           "L3 Layer is missing");
2068         if (!mask)
2069                 mask = &rte_flow_item_gre_mask;
2070         ret = mlx5_flow_item_acceptable
2071                 (item, (const uint8_t *)mask,
2072                  (const uint8_t *)&nic_mask,
2073                  sizeof(struct rte_flow_item_gre), error);
2074         if (ret < 0)
2075                 return ret;
2076 #ifndef HAVE_MLX5DV_DR
2077 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2078         if (spec && (spec->protocol & mask->protocol))
2079                 return rte_flow_error_set(error, ENOTSUP,
2080                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2081                                           "without MPLS support the"
2082                                           " specification cannot be used for"
2083                                           " filtering");
2084 #endif
2085 #endif
2086         return 0;
2087 }
2088
2089 /**
2090  * Validate Geneve item.
2091  *
2092  * @param[in] item
2093  *   Item specification.
2094  * @param[in] itemFlags
2095  *   Bit-fields that holds the items detected until now.
2096  * @param[in] enPriv
2097  *   Pointer to the private data structure.
2098  * @param[out] error
2099  *   Pointer to error structure.
2100  *
2101  * @return
2102  *   0 on success, a negative errno value otherwise and rte_errno is set.
2103  */
2104
2105 int
2106 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2107                                uint64_t item_flags,
2108                                struct rte_eth_dev *dev,
2109                                struct rte_flow_error *error)
2110 {
2111         struct mlx5_priv *priv = dev->data->dev_private;
2112         const struct rte_flow_item_geneve *spec = item->spec;
2113         const struct rte_flow_item_geneve *mask = item->mask;
2114         int ret;
2115         uint16_t gbhdr;
2116         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2117                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2118         const struct rte_flow_item_geneve nic_mask = {
2119                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2120                 .vni = "\xff\xff\xff",
2121                 .protocol = RTE_BE16(UINT16_MAX),
2122         };
2123
2124         if (!(priv->config.hca_attr.flex_parser_protocols &
2125               MLX5_HCA_FLEX_GENEVE_ENABLED) ||
2126             !priv->config.hca_attr.tunnel_stateless_geneve_rx)
2127                 return rte_flow_error_set(error, ENOTSUP,
2128                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2129                                           "L3 Geneve is not enabled by device"
2130                                           " parameter and/or not configured in"
2131                                           " firmware");
2132         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2133                 return rte_flow_error_set(error, ENOTSUP,
2134                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2135                                           "multiple tunnel layers not"
2136                                           " supported");
2137         /*
2138          * Verify only UDPv4 is present as defined in
2139          * https://tools.ietf.org/html/rfc7348
2140          */
2141         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2142                 return rte_flow_error_set(error, EINVAL,
2143                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2144                                           "no outer UDP layer found");
2145         if (!mask)
2146                 mask = &rte_flow_item_geneve_mask;
2147         ret = mlx5_flow_item_acceptable
2148                                   (item, (const uint8_t *)mask,
2149                                    (const uint8_t *)&nic_mask,
2150                                    sizeof(struct rte_flow_item_geneve), error);
2151         if (ret)
2152                 return ret;
2153         if (spec) {
2154                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2155                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2156                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2157                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2158                         return rte_flow_error_set(error, ENOTSUP,
2159                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2160                                                   item,
2161                                                   "Geneve protocol unsupported"
2162                                                   " fields are being used");
2163                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2164                         return rte_flow_error_set
2165                                         (error, ENOTSUP,
2166                                          RTE_FLOW_ERROR_TYPE_ITEM,
2167                                          item,
2168                                          "Unsupported Geneve options length");
2169         }
2170         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2171                 return rte_flow_error_set
2172                                     (error, ENOTSUP,
2173                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2174                                      "Geneve tunnel must be fully defined");
2175         return 0;
2176 }
2177
2178 /**
2179  * Validate MPLS item.
2180  *
2181  * @param[in] dev
2182  *   Pointer to the rte_eth_dev structure.
2183  * @param[in] item
2184  *   Item specification.
2185  * @param[in] item_flags
2186  *   Bit-fields that holds the items detected until now.
2187  * @param[in] prev_layer
2188  *   The protocol layer indicated in previous item.
2189  * @param[out] error
2190  *   Pointer to error structure.
2191  *
2192  * @return
2193  *   0 on success, a negative errno value otherwise and rte_errno is set.
2194  */
2195 int
2196 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2197                              const struct rte_flow_item *item __rte_unused,
2198                              uint64_t item_flags __rte_unused,
2199                              uint64_t prev_layer __rte_unused,
2200                              struct rte_flow_error *error)
2201 {
2202 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2203         const struct rte_flow_item_mpls *mask = item->mask;
2204         struct mlx5_priv *priv = dev->data->dev_private;
2205         int ret;
2206
2207         if (!priv->config.mpls_en)
2208                 return rte_flow_error_set(error, ENOTSUP,
2209                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2210                                           "MPLS not supported or"
2211                                           " disabled in firmware"
2212                                           " configuration.");
2213         /* MPLS over IP, UDP, GRE is allowed */
2214         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2215                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2216                             MLX5_FLOW_LAYER_GRE)))
2217                 return rte_flow_error_set(error, EINVAL,
2218                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2219                                           "protocol filtering not compatible"
2220                                           " with MPLS layer");
2221         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2222         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2223             !(item_flags & MLX5_FLOW_LAYER_GRE))
2224                 return rte_flow_error_set(error, ENOTSUP,
2225                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2226                                           "multiple tunnel layers not"
2227                                           " supported");
2228         if (!mask)
2229                 mask = &rte_flow_item_mpls_mask;
2230         ret = mlx5_flow_item_acceptable
2231                 (item, (const uint8_t *)mask,
2232                  (const uint8_t *)&rte_flow_item_mpls_mask,
2233                  sizeof(struct rte_flow_item_mpls), error);
2234         if (ret < 0)
2235                 return ret;
2236         return 0;
2237 #endif
2238         return rte_flow_error_set(error, ENOTSUP,
2239                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2240                                   "MPLS is not supported by Verbs, please"
2241                                   " update.");
2242 }
2243
2244 /**
2245  * Validate NVGRE item.
2246  *
2247  * @param[in] item
2248  *   Item specification.
2249  * @param[in] item_flags
2250  *   Bit flags to mark detected items.
2251  * @param[in] target_protocol
2252  *   The next protocol in the previous item.
2253  * @param[out] error
2254  *   Pointer to error structure.
2255  *
2256  * @return
2257  *   0 on success, a negative errno value otherwise and rte_errno is set.
2258  */
2259 int
2260 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2261                               uint64_t item_flags,
2262                               uint8_t target_protocol,
2263                               struct rte_flow_error *error)
2264 {
2265         const struct rte_flow_item_nvgre *mask = item->mask;
2266         int ret;
2267
2268         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2269                 return rte_flow_error_set(error, EINVAL,
2270                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2271                                           "protocol filtering not compatible"
2272                                           " with this GRE layer");
2273         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2274                 return rte_flow_error_set(error, ENOTSUP,
2275                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2276                                           "multiple tunnel layers not"
2277                                           " supported");
2278         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2279                 return rte_flow_error_set(error, ENOTSUP,
2280                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2281                                           "L3 Layer is missing");
2282         if (!mask)
2283                 mask = &rte_flow_item_nvgre_mask;
2284         ret = mlx5_flow_item_acceptable
2285                 (item, (const uint8_t *)mask,
2286                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2287                  sizeof(struct rte_flow_item_nvgre), error);
2288         if (ret < 0)
2289                 return ret;
2290         return 0;
2291 }
2292
2293 /* Allocate unique ID for the split Q/RSS subflows. */
2294 static uint32_t
2295 flow_qrss_get_id(struct rte_eth_dev *dev)
2296 {
2297         struct mlx5_priv *priv = dev->data->dev_private;
2298         uint32_t qrss_id, ret;
2299
2300         ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2301         if (ret)
2302                 return 0;
2303         assert(qrss_id);
2304         return qrss_id;
2305 }
2306
2307 /* Free unique ID for the split Q/RSS subflows. */
2308 static void
2309 flow_qrss_free_id(struct rte_eth_dev *dev,  uint32_t qrss_id)
2310 {
2311         struct mlx5_priv *priv = dev->data->dev_private;
2312
2313         if (qrss_id)
2314                 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2315 }
2316
2317 /**
2318  * Release resource related QUEUE/RSS action split.
2319  *
2320  * @param dev
2321  *   Pointer to Ethernet device.
2322  * @param flow
2323  *   Flow to release id's from.
2324  */
2325 static void
2326 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2327                              struct rte_flow *flow)
2328 {
2329         struct mlx5_flow *dev_flow;
2330
2331         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
2332                 if (dev_flow->qrss_id)
2333                         flow_qrss_free_id(dev, dev_flow->qrss_id);
2334 }
2335
2336 static int
2337 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2338                    const struct rte_flow_attr *attr __rte_unused,
2339                    const struct rte_flow_item items[] __rte_unused,
2340                    const struct rte_flow_action actions[] __rte_unused,
2341                    bool external __rte_unused,
2342                    struct rte_flow_error *error)
2343 {
2344         return rte_flow_error_set(error, ENOTSUP,
2345                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2346 }
2347
2348 static struct mlx5_flow *
2349 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
2350                   const struct rte_flow_item items[] __rte_unused,
2351                   const struct rte_flow_action actions[] __rte_unused,
2352                   struct rte_flow_error *error)
2353 {
2354         rte_flow_error_set(error, ENOTSUP,
2355                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2356         return NULL;
2357 }
2358
2359 static int
2360 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2361                     struct mlx5_flow *dev_flow __rte_unused,
2362                     const struct rte_flow_attr *attr __rte_unused,
2363                     const struct rte_flow_item items[] __rte_unused,
2364                     const struct rte_flow_action actions[] __rte_unused,
2365                     struct rte_flow_error *error)
2366 {
2367         return rte_flow_error_set(error, ENOTSUP,
2368                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2369 }
2370
2371 static int
2372 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2373                 struct rte_flow *flow __rte_unused,
2374                 struct rte_flow_error *error)
2375 {
2376         return rte_flow_error_set(error, ENOTSUP,
2377                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2378 }
2379
2380 static void
2381 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2382                  struct rte_flow *flow __rte_unused)
2383 {
2384 }
2385
2386 static void
2387 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2388                   struct rte_flow *flow __rte_unused)
2389 {
2390 }
2391
2392 static int
2393 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2394                 struct rte_flow *flow __rte_unused,
2395                 const struct rte_flow_action *actions __rte_unused,
2396                 void *data __rte_unused,
2397                 struct rte_flow_error *error)
2398 {
2399         return rte_flow_error_set(error, ENOTSUP,
2400                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2401 }
2402
2403 /* Void driver to protect from null pointer reference. */
2404 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2405         .validate = flow_null_validate,
2406         .prepare = flow_null_prepare,
2407         .translate = flow_null_translate,
2408         .apply = flow_null_apply,
2409         .remove = flow_null_remove,
2410         .destroy = flow_null_destroy,
2411         .query = flow_null_query,
2412 };
2413
2414 /**
2415  * Select flow driver type according to flow attributes and device
2416  * configuration.
2417  *
2418  * @param[in] dev
2419  *   Pointer to the dev structure.
2420  * @param[in] attr
2421  *   Pointer to the flow attributes.
2422  *
2423  * @return
2424  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2425  */
2426 static enum mlx5_flow_drv_type
2427 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2428 {
2429         struct mlx5_priv *priv = dev->data->dev_private;
2430         enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2431
2432         if (attr->transfer && priv->config.dv_esw_en)
2433                 type = MLX5_FLOW_TYPE_DV;
2434         if (!attr->transfer)
2435                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2436                                                  MLX5_FLOW_TYPE_VERBS;
2437         return type;
2438 }
2439
2440 #define flow_get_drv_ops(type) flow_drv_ops[type]
2441
2442 /**
2443  * Flow driver validation API. This abstracts calling driver specific functions.
2444  * The type of flow driver is determined according to flow attributes.
2445  *
2446  * @param[in] dev
2447  *   Pointer to the dev structure.
2448  * @param[in] attr
2449  *   Pointer to the flow attributes.
2450  * @param[in] items
2451  *   Pointer to the list of items.
2452  * @param[in] actions
2453  *   Pointer to the list of actions.
2454  * @param[in] external
2455  *   This flow rule is created by request external to PMD.
2456  * @param[out] error
2457  *   Pointer to the error structure.
2458  *
2459  * @return
2460  *   0 on success, a negative errno value otherwise and rte_errno is set.
2461  */
2462 static inline int
2463 flow_drv_validate(struct rte_eth_dev *dev,
2464                   const struct rte_flow_attr *attr,
2465                   const struct rte_flow_item items[],
2466                   const struct rte_flow_action actions[],
2467                   bool external, struct rte_flow_error *error)
2468 {
2469         const struct mlx5_flow_driver_ops *fops;
2470         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2471
2472         fops = flow_get_drv_ops(type);
2473         return fops->validate(dev, attr, items, actions, external, error);
2474 }
2475
2476 /**
2477  * Flow driver preparation API. This abstracts calling driver specific
2478  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2479  * calculates the size of memory required for device flow, allocates the memory,
2480  * initializes the device flow and returns the pointer.
2481  *
2482  * @note
2483  *   This function initializes device flow structure such as dv or verbs in
2484  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
2485  *   rest. For example, adding returning device flow to flow->dev_flow list and
2486  *   setting backward reference to the flow should be done out of this function.
2487  *   layers field is not filled either.
2488  *
2489  * @param[in] attr
2490  *   Pointer to the flow attributes.
2491  * @param[in] items
2492  *   Pointer to the list of items.
2493  * @param[in] actions
2494  *   Pointer to the list of actions.
2495  * @param[out] error
2496  *   Pointer to the error structure.
2497  *
2498  * @return
2499  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
2500  */
2501 static inline struct mlx5_flow *
2502 flow_drv_prepare(const struct rte_flow *flow,
2503                  const struct rte_flow_attr *attr,
2504                  const struct rte_flow_item items[],
2505                  const struct rte_flow_action actions[],
2506                  struct rte_flow_error *error)
2507 {
2508         const struct mlx5_flow_driver_ops *fops;
2509         enum mlx5_flow_drv_type type = flow->drv_type;
2510
2511         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2512         fops = flow_get_drv_ops(type);
2513         return fops->prepare(attr, items, actions, error);
2514 }
2515
2516 /**
2517  * Flow driver translation API. This abstracts calling driver specific
2518  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2519  * translates a generic flow into a driver flow. flow_drv_prepare() must
2520  * precede.
2521  *
2522  * @note
2523  *   dev_flow->layers could be filled as a result of parsing during translation
2524  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2525  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2526  *   flow->actions could be overwritten even though all the expanded dev_flows
2527  *   have the same actions.
2528  *
2529  * @param[in] dev
2530  *   Pointer to the rte dev structure.
2531  * @param[in, out] dev_flow
2532  *   Pointer to the mlx5 flow.
2533  * @param[in] attr
2534  *   Pointer to the flow attributes.
2535  * @param[in] items
2536  *   Pointer to the list of items.
2537  * @param[in] actions
2538  *   Pointer to the list of actions.
2539  * @param[out] error
2540  *   Pointer to the error structure.
2541  *
2542  * @return
2543  *   0 on success, a negative errno value otherwise and rte_errno is set.
2544  */
2545 static inline int
2546 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2547                    const struct rte_flow_attr *attr,
2548                    const struct rte_flow_item items[],
2549                    const struct rte_flow_action actions[],
2550                    struct rte_flow_error *error)
2551 {
2552         const struct mlx5_flow_driver_ops *fops;
2553         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2554
2555         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2556         fops = flow_get_drv_ops(type);
2557         return fops->translate(dev, dev_flow, attr, items, actions, error);
2558 }
2559
2560 /**
2561  * Flow driver apply API. This abstracts calling driver specific functions.
2562  * Parent flow (rte_flow) should have driver type (drv_type). It applies
2563  * translated driver flows on to device. flow_drv_translate() must precede.
2564  *
2565  * @param[in] dev
2566  *   Pointer to Ethernet device structure.
2567  * @param[in, out] flow
2568  *   Pointer to flow structure.
2569  * @param[out] error
2570  *   Pointer to error structure.
2571  *
2572  * @return
2573  *   0 on success, a negative errno value otherwise and rte_errno is set.
2574  */
2575 static inline int
2576 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2577                struct rte_flow_error *error)
2578 {
2579         const struct mlx5_flow_driver_ops *fops;
2580         enum mlx5_flow_drv_type type = flow->drv_type;
2581
2582         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2583         fops = flow_get_drv_ops(type);
2584         return fops->apply(dev, flow, error);
2585 }
2586
2587 /**
2588  * Flow driver remove API. This abstracts calling driver specific functions.
2589  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2590  * on device. All the resources of the flow should be freed by calling
2591  * flow_drv_destroy().
2592  *
2593  * @param[in] dev
2594  *   Pointer to Ethernet device.
2595  * @param[in, out] flow
2596  *   Pointer to flow structure.
2597  */
2598 static inline void
2599 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2600 {
2601         const struct mlx5_flow_driver_ops *fops;
2602         enum mlx5_flow_drv_type type = flow->drv_type;
2603
2604         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2605         fops = flow_get_drv_ops(type);
2606         fops->remove(dev, flow);
2607 }
2608
2609 /**
2610  * Flow driver destroy API. This abstracts calling driver specific functions.
2611  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2612  * on device and releases resources of the flow.
2613  *
2614  * @param[in] dev
2615  *   Pointer to Ethernet device.
2616  * @param[in, out] flow
2617  *   Pointer to flow structure.
2618  */
2619 static inline void
2620 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2621 {
2622         const struct mlx5_flow_driver_ops *fops;
2623         enum mlx5_flow_drv_type type = flow->drv_type;
2624
2625         flow_mreg_split_qrss_release(dev, flow);
2626         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2627         fops = flow_get_drv_ops(type);
2628         fops->destroy(dev, flow);
2629 }
2630
2631 /**
2632  * Validate a flow supported by the NIC.
2633  *
2634  * @see rte_flow_validate()
2635  * @see rte_flow_ops
2636  */
2637 int
2638 mlx5_flow_validate(struct rte_eth_dev *dev,
2639                    const struct rte_flow_attr *attr,
2640                    const struct rte_flow_item items[],
2641                    const struct rte_flow_action actions[],
2642                    struct rte_flow_error *error)
2643 {
2644         int ret;
2645
2646         ret = flow_drv_validate(dev, attr, items, actions, true, error);
2647         if (ret < 0)
2648                 return ret;
2649         return 0;
2650 }
2651
2652 /**
2653  * Get port id item from the item list.
2654  *
2655  * @param[in] item
2656  *   Pointer to the list of items.
2657  *
2658  * @return
2659  *   Pointer to the port id item if exist, else return NULL.
2660  */
2661 static const struct rte_flow_item *
2662 find_port_id_item(const struct rte_flow_item *item)
2663 {
2664         assert(item);
2665         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2666                 if (item->type == RTE_FLOW_ITEM_TYPE_PORT_ID)
2667                         return item;
2668         }
2669         return NULL;
2670 }
2671
2672 /**
2673  * Get RSS action from the action list.
2674  *
2675  * @param[in] actions
2676  *   Pointer to the list of actions.
2677  *
2678  * @return
2679  *   Pointer to the RSS action if exist, else return NULL.
2680  */
2681 static const struct rte_flow_action_rss*
2682 flow_get_rss_action(const struct rte_flow_action actions[])
2683 {
2684         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2685                 switch (actions->type) {
2686                 case RTE_FLOW_ACTION_TYPE_RSS:
2687                         return (const struct rte_flow_action_rss *)
2688                                actions->conf;
2689                 default:
2690                         break;
2691                 }
2692         }
2693         return NULL;
2694 }
2695
2696 static unsigned int
2697 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2698 {
2699         const struct rte_flow_item *item;
2700         unsigned int has_vlan = 0;
2701
2702         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2703                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2704                         has_vlan = 1;
2705                         break;
2706                 }
2707         }
2708         if (has_vlan)
2709                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2710                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2711         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2712                                MLX5_EXPANSION_ROOT_OUTER;
2713 }
2714
2715 /**
2716  * Get QUEUE/RSS action from the action list.
2717  *
2718  * @param[in] actions
2719  *   Pointer to the list of actions.
2720  * @param[out] qrss
2721  *   Pointer to the return pointer.
2722  * @param[out] qrss_type
2723  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
2724  *   if no QUEUE/RSS is found.
2725  *
2726  * @return
2727  *   Total number of actions.
2728  */
2729 static int
2730 flow_parse_qrss_action(const struct rte_flow_action actions[],
2731                        const struct rte_flow_action **qrss)
2732 {
2733         int actions_n = 0;
2734
2735         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2736                 switch (actions->type) {
2737                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2738                 case RTE_FLOW_ACTION_TYPE_RSS:
2739                         *qrss = actions;
2740                         break;
2741                 default:
2742                         break;
2743                 }
2744                 actions_n++;
2745         }
2746         /* Count RTE_FLOW_ACTION_TYPE_END. */
2747         return actions_n + 1;
2748 }
2749
2750 /**
2751  * Check meter action from the action list.
2752  *
2753  * @param[in] actions
2754  *   Pointer to the list of actions.
2755  * @param[out] mtr
2756  *   Pointer to the meter exist flag.
2757  *
2758  * @return
2759  *   Total number of actions.
2760  */
2761 static int
2762 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
2763 {
2764         int actions_n = 0;
2765
2766         assert(mtr);
2767         *mtr = 0;
2768         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2769                 switch (actions->type) {
2770                 case RTE_FLOW_ACTION_TYPE_METER:
2771                         *mtr = 1;
2772                         break;
2773                 default:
2774                         break;
2775                 }
2776                 actions_n++;
2777         }
2778         /* Count RTE_FLOW_ACTION_TYPE_END. */
2779         return actions_n + 1;
2780 }
2781
2782 /**
2783  * Check if the flow should be splited due to hairpin.
2784  * The reason for the split is that in current HW we can't
2785  * support encap on Rx, so if a flow have encap we move it
2786  * to Tx.
2787  *
2788  * @param dev
2789  *   Pointer to Ethernet device.
2790  * @param[in] attr
2791  *   Flow rule attributes.
2792  * @param[in] actions
2793  *   Associated actions (list terminated by the END action).
2794  *
2795  * @return
2796  *   > 0 the number of actions and the flow should be split,
2797  *   0 when no split required.
2798  */
2799 static int
2800 flow_check_hairpin_split(struct rte_eth_dev *dev,
2801                          const struct rte_flow_attr *attr,
2802                          const struct rte_flow_action actions[])
2803 {
2804         int queue_action = 0;
2805         int action_n = 0;
2806         int encap = 0;
2807         const struct rte_flow_action_queue *queue;
2808         const struct rte_flow_action_rss *rss;
2809         const struct rte_flow_action_raw_encap *raw_encap;
2810
2811         if (!attr->ingress)
2812                 return 0;
2813         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2814                 switch (actions->type) {
2815                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2816                         queue = actions->conf;
2817                         if (queue == NULL)
2818                                 return 0;
2819                         if (mlx5_rxq_get_type(dev, queue->index) !=
2820                             MLX5_RXQ_TYPE_HAIRPIN)
2821                                 return 0;
2822                         queue_action = 1;
2823                         action_n++;
2824                         break;
2825                 case RTE_FLOW_ACTION_TYPE_RSS:
2826                         rss = actions->conf;
2827                         if (rss == NULL || rss->queue_num == 0)
2828                                 return 0;
2829                         if (mlx5_rxq_get_type(dev, rss->queue[0]) !=
2830                             MLX5_RXQ_TYPE_HAIRPIN)
2831                                 return 0;
2832                         queue_action = 1;
2833                         action_n++;
2834                         break;
2835                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2836                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2837                         encap = 1;
2838                         action_n++;
2839                         break;
2840                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2841                         raw_encap = actions->conf;
2842                         if (raw_encap->size >
2843                             (sizeof(struct rte_flow_item_eth) +
2844                              sizeof(struct rte_flow_item_ipv4)))
2845                                 encap = 1;
2846                         action_n++;
2847                         break;
2848                 default:
2849                         action_n++;
2850                         break;
2851                 }
2852         }
2853         if (encap == 1 && queue_action)
2854                 return action_n;
2855         return 0;
2856 }
2857
2858 /* Declare flow create/destroy prototype in advance. */
2859 static struct rte_flow *
2860 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2861                  const struct rte_flow_attr *attr,
2862                  const struct rte_flow_item items[],
2863                  const struct rte_flow_action actions[],
2864                  bool external, struct rte_flow_error *error);
2865
2866 static void
2867 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2868                   struct rte_flow *flow);
2869
2870 /**
2871  * Add a flow of copying flow metadata registers in RX_CP_TBL.
2872  *
2873  * As mark_id is unique, if there's already a registered flow for the mark_id,
2874  * return by increasing the reference counter of the resource. Otherwise, create
2875  * the resource (mcp_res) and flow.
2876  *
2877  * Flow looks like,
2878  *   - If ingress port is ANY and reg_c[1] is mark_id,
2879  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
2880  *
2881  * For default flow (zero mark_id), flow is like,
2882  *   - If ingress port is ANY,
2883  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
2884  *
2885  * @param dev
2886  *   Pointer to Ethernet device.
2887  * @param mark_id
2888  *   ID of MARK action, zero means default flow for META.
2889  * @param[out] error
2890  *   Perform verbose error reporting if not NULL.
2891  *
2892  * @return
2893  *   Associated resource on success, NULL otherwise and rte_errno is set.
2894  */
2895 static struct mlx5_flow_mreg_copy_resource *
2896 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
2897                           struct rte_flow_error *error)
2898 {
2899         struct mlx5_priv *priv = dev->data->dev_private;
2900         struct rte_flow_attr attr = {
2901                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
2902                 .ingress = 1,
2903         };
2904         struct mlx5_rte_flow_item_tag tag_spec = {
2905                 .data = mark_id,
2906         };
2907         struct rte_flow_item items[] = {
2908                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
2909         };
2910         struct rte_flow_action_mark ftag = {
2911                 .id = mark_id,
2912         };
2913         struct mlx5_flow_action_copy_mreg cp_mreg = {
2914                 .dst = REG_B,
2915                 .src = 0,
2916         };
2917         struct rte_flow_action_jump jump = {
2918                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
2919         };
2920         struct rte_flow_action actions[] = {
2921                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
2922         };
2923         struct mlx5_flow_mreg_copy_resource *mcp_res;
2924         int ret;
2925
2926         /* Fill the register fileds in the flow. */
2927         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2928         if (ret < 0)
2929                 return NULL;
2930         tag_spec.id = ret;
2931         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
2932         if (ret < 0)
2933                 return NULL;
2934         cp_mreg.src = ret;
2935         /* Check if already registered. */
2936         assert(priv->mreg_cp_tbl);
2937         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id);
2938         if (mcp_res) {
2939                 /* For non-default rule. */
2940                 if (mark_id)
2941                         mcp_res->refcnt++;
2942                 assert(mark_id || mcp_res->refcnt == 1);
2943                 return mcp_res;
2944         }
2945         /* Provide the full width of FLAG specific value. */
2946         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
2947                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
2948         /* Build a new flow. */
2949         if (mark_id) {
2950                 items[0] = (struct rte_flow_item){
2951                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
2952                         .spec = &tag_spec,
2953                 };
2954                 items[1] = (struct rte_flow_item){
2955                         .type = RTE_FLOW_ITEM_TYPE_END,
2956                 };
2957                 actions[0] = (struct rte_flow_action){
2958                         .type = MLX5_RTE_FLOW_ACTION_TYPE_MARK,
2959                         .conf = &ftag,
2960                 };
2961                 actions[1] = (struct rte_flow_action){
2962                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
2963                         .conf = &cp_mreg,
2964                 };
2965                 actions[2] = (struct rte_flow_action){
2966                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
2967                         .conf = &jump,
2968                 };
2969                 actions[3] = (struct rte_flow_action){
2970                         .type = RTE_FLOW_ACTION_TYPE_END,
2971                 };
2972         } else {
2973                 /* Default rule, wildcard match. */
2974                 attr.priority = MLX5_FLOW_PRIO_RSVD;
2975                 items[0] = (struct rte_flow_item){
2976                         .type = RTE_FLOW_ITEM_TYPE_END,
2977                 };
2978                 actions[0] = (struct rte_flow_action){
2979                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
2980                         .conf = &cp_mreg,
2981                 };
2982                 actions[1] = (struct rte_flow_action){
2983                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
2984                         .conf = &jump,
2985                 };
2986                 actions[2] = (struct rte_flow_action){
2987                         .type = RTE_FLOW_ACTION_TYPE_END,
2988                 };
2989         }
2990         /* Build a new entry. */
2991         mcp_res = rte_zmalloc(__func__, sizeof(*mcp_res), 0);
2992         if (!mcp_res) {
2993                 rte_errno = ENOMEM;
2994                 return NULL;
2995         }
2996         /*
2997          * The copy Flows are not included in any list. There
2998          * ones are referenced from other Flows and can not
2999          * be applied, removed, deleted in ardbitrary order
3000          * by list traversing.
3001          */
3002         mcp_res->flow = flow_list_create(dev, NULL, &attr, items,
3003                                          actions, false, error);
3004         if (!mcp_res->flow)
3005                 goto error;
3006         mcp_res->refcnt++;
3007         mcp_res->hlist_ent.key = mark_id;
3008         ret = mlx5_hlist_insert(priv->mreg_cp_tbl,
3009                                 &mcp_res->hlist_ent);
3010         assert(!ret);
3011         if (ret)
3012                 goto error;
3013         return mcp_res;
3014 error:
3015         if (mcp_res->flow)
3016                 flow_list_destroy(dev, NULL, mcp_res->flow);
3017         rte_free(mcp_res);
3018         return NULL;
3019 }
3020
3021 /**
3022  * Release flow in RX_CP_TBL.
3023  *
3024  * @param dev
3025  *   Pointer to Ethernet device.
3026  * @flow
3027  *   Parent flow for wich copying is provided.
3028  */
3029 static void
3030 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3031                           struct rte_flow *flow)
3032 {
3033         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3034         struct mlx5_priv *priv = dev->data->dev_private;
3035
3036         if (!mcp_res || !priv->mreg_cp_tbl)
3037                 return;
3038         if (flow->copy_applied) {
3039                 assert(mcp_res->appcnt);
3040                 flow->copy_applied = 0;
3041                 --mcp_res->appcnt;
3042                 if (!mcp_res->appcnt)
3043                         flow_drv_remove(dev, mcp_res->flow);
3044         }
3045         /*
3046          * We do not check availability of metadata registers here,
3047          * because copy resources are allocated in this case.
3048          */
3049         if (--mcp_res->refcnt)
3050                 return;
3051         assert(mcp_res->flow);
3052         flow_list_destroy(dev, NULL, mcp_res->flow);
3053         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3054         rte_free(mcp_res);
3055         flow->mreg_copy = NULL;
3056 }
3057
3058 /**
3059  * Start flow in RX_CP_TBL.
3060  *
3061  * @param dev
3062  *   Pointer to Ethernet device.
3063  * @flow
3064  *   Parent flow for wich copying is provided.
3065  *
3066  * @return
3067  *   0 on success, a negative errno value otherwise and rte_errno is set.
3068  */
3069 static int
3070 flow_mreg_start_copy_action(struct rte_eth_dev *dev,
3071                             struct rte_flow *flow)
3072 {
3073         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3074         int ret;
3075
3076         if (!mcp_res || flow->copy_applied)
3077                 return 0;
3078         if (!mcp_res->appcnt) {
3079                 ret = flow_drv_apply(dev, mcp_res->flow, NULL);
3080                 if (ret)
3081                         return ret;
3082         }
3083         ++mcp_res->appcnt;
3084         flow->copy_applied = 1;
3085         return 0;
3086 }
3087
3088 /**
3089  * Stop flow in RX_CP_TBL.
3090  *
3091  * @param dev
3092  *   Pointer to Ethernet device.
3093  * @flow
3094  *   Parent flow for wich copying is provided.
3095  */
3096 static void
3097 flow_mreg_stop_copy_action(struct rte_eth_dev *dev,
3098                            struct rte_flow *flow)
3099 {
3100         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3101
3102         if (!mcp_res || !flow->copy_applied)
3103                 return;
3104         assert(mcp_res->appcnt);
3105         --mcp_res->appcnt;
3106         flow->copy_applied = 0;
3107         if (!mcp_res->appcnt)
3108                 flow_drv_remove(dev, mcp_res->flow);
3109 }
3110
3111 /**
3112  * Remove the default copy action from RX_CP_TBL.
3113  *
3114  * @param dev
3115  *   Pointer to Ethernet device.
3116  */
3117 static void
3118 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3119 {
3120         struct mlx5_flow_mreg_copy_resource *mcp_res;
3121         struct mlx5_priv *priv = dev->data->dev_private;
3122
3123         /* Check if default flow is registered. */
3124         if (!priv->mreg_cp_tbl)
3125                 return;
3126         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, 0ULL);
3127         if (!mcp_res)
3128                 return;
3129         assert(mcp_res->flow);
3130         flow_list_destroy(dev, NULL, mcp_res->flow);
3131         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3132         rte_free(mcp_res);
3133 }
3134
3135 /**
3136  * Add the default copy action in in RX_CP_TBL.
3137  *
3138  * @param dev
3139  *   Pointer to Ethernet device.
3140  * @param[out] error
3141  *   Perform verbose error reporting if not NULL.
3142  *
3143  * @return
3144  *   0 for success, negative value otherwise and rte_errno is set.
3145  */
3146 static int
3147 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3148                                   struct rte_flow_error *error)
3149 {
3150         struct mlx5_priv *priv = dev->data->dev_private;
3151         struct mlx5_flow_mreg_copy_resource *mcp_res;
3152
3153         /* Check whether extensive metadata feature is engaged. */
3154         if (!priv->config.dv_flow_en ||
3155             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3156             !mlx5_flow_ext_mreg_supported(dev) ||
3157             !priv->sh->dv_regc0_mask)
3158                 return 0;
3159         mcp_res = flow_mreg_add_copy_action(dev, 0, error);
3160         if (!mcp_res)
3161                 return -rte_errno;
3162         return 0;
3163 }
3164
3165 /**
3166  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3167  *
3168  * All the flow having Q/RSS action should be split by
3169  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3170  * performs the following,
3171  *   - CQE->flow_tag := reg_c[1] (MARK)
3172  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3173  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3174  * but there should be a flow per each MARK ID set by MARK action.
3175  *
3176  * For the aforementioned reason, if there's a MARK action in flow's action
3177  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3178  * the MARK ID to CQE's flow_tag like,
3179  *   - If reg_c[1] is mark_id,
3180  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3181  *
3182  * For SET_META action which stores value in reg_c[0], as the destination is
3183  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3184  * MARK ID means the default flow. The default flow looks like,
3185  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3186  *
3187  * @param dev
3188  *   Pointer to Ethernet device.
3189  * @param flow
3190  *   Pointer to flow structure.
3191  * @param[in] actions
3192  *   Pointer to the list of actions.
3193  * @param[out] error
3194  *   Perform verbose error reporting if not NULL.
3195  *
3196  * @return
3197  *   0 on success, negative value otherwise and rte_errno is set.
3198  */
3199 static int
3200 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3201                             struct rte_flow *flow,
3202                             const struct rte_flow_action *actions,
3203                             struct rte_flow_error *error)
3204 {
3205         struct mlx5_priv *priv = dev->data->dev_private;
3206         struct mlx5_dev_config *config = &priv->config;
3207         struct mlx5_flow_mreg_copy_resource *mcp_res;
3208         const struct rte_flow_action_mark *mark;
3209
3210         /* Check whether extensive metadata feature is engaged. */
3211         if (!config->dv_flow_en ||
3212             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3213             !mlx5_flow_ext_mreg_supported(dev) ||
3214             !priv->sh->dv_regc0_mask)
3215                 return 0;
3216         /* Find MARK action. */
3217         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3218                 switch (actions->type) {
3219                 case RTE_FLOW_ACTION_TYPE_FLAG:
3220                         mcp_res = flow_mreg_add_copy_action
3221                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
3222                         if (!mcp_res)
3223                                 return -rte_errno;
3224                         flow->mreg_copy = mcp_res;
3225                         if (dev->data->dev_started) {
3226                                 mcp_res->appcnt++;
3227                                 flow->copy_applied = 1;
3228                         }
3229                         return 0;
3230                 case RTE_FLOW_ACTION_TYPE_MARK:
3231                         mark = (const struct rte_flow_action_mark *)
3232                                 actions->conf;
3233                         mcp_res =
3234                                 flow_mreg_add_copy_action(dev, mark->id, error);
3235                         if (!mcp_res)
3236                                 return -rte_errno;
3237                         flow->mreg_copy = mcp_res;
3238                         if (dev->data->dev_started) {
3239                                 mcp_res->appcnt++;
3240                                 flow->copy_applied = 1;
3241                         }
3242                         return 0;
3243                 default:
3244                         break;
3245                 }
3246         }
3247         return 0;
3248 }
3249
3250 #define MLX5_MAX_SPLIT_ACTIONS 24
3251 #define MLX5_MAX_SPLIT_ITEMS 24
3252
3253 /**
3254  * Split the hairpin flow.
3255  * Since HW can't support encap on Rx we move the encap to Tx.
3256  * If the count action is after the encap then we also
3257  * move the count action. in this case the count will also measure
3258  * the outer bytes.
3259  *
3260  * @param dev
3261  *   Pointer to Ethernet device.
3262  * @param[in] actions
3263  *   Associated actions (list terminated by the END action).
3264  * @param[out] actions_rx
3265  *   Rx flow actions.
3266  * @param[out] actions_tx
3267  *   Tx flow actions..
3268  * @param[out] pattern_tx
3269  *   The pattern items for the Tx flow.
3270  * @param[out] flow_id
3271  *   The flow ID connected to this flow.
3272  *
3273  * @return
3274  *   0 on success.
3275  */
3276 static int
3277 flow_hairpin_split(struct rte_eth_dev *dev,
3278                    const struct rte_flow_action actions[],
3279                    struct rte_flow_action actions_rx[],
3280                    struct rte_flow_action actions_tx[],
3281                    struct rte_flow_item pattern_tx[],
3282                    uint32_t *flow_id)
3283 {
3284         struct mlx5_priv *priv = dev->data->dev_private;
3285         const struct rte_flow_action_raw_encap *raw_encap;
3286         const struct rte_flow_action_raw_decap *raw_decap;
3287         struct mlx5_rte_flow_action_set_tag *set_tag;
3288         struct rte_flow_action *tag_action;
3289         struct mlx5_rte_flow_item_tag *tag_item;
3290         struct rte_flow_item *item;
3291         char *addr;
3292         int encap = 0;
3293
3294         mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
3295         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3296                 switch (actions->type) {
3297                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3298                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3299                         rte_memcpy(actions_tx, actions,
3300                                sizeof(struct rte_flow_action));
3301                         actions_tx++;
3302                         break;
3303                 case RTE_FLOW_ACTION_TYPE_COUNT:
3304                         if (encap) {
3305                                 rte_memcpy(actions_tx, actions,
3306                                            sizeof(struct rte_flow_action));
3307                                 actions_tx++;
3308                         } else {
3309                                 rte_memcpy(actions_rx, actions,
3310                                            sizeof(struct rte_flow_action));
3311                                 actions_rx++;
3312                         }
3313                         break;
3314                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3315                         raw_encap = actions->conf;
3316                         if (raw_encap->size >
3317                             (sizeof(struct rte_flow_item_eth) +
3318                              sizeof(struct rte_flow_item_ipv4))) {
3319                                 memcpy(actions_tx, actions,
3320                                        sizeof(struct rte_flow_action));
3321                                 actions_tx++;
3322                                 encap = 1;
3323                         } else {
3324                                 rte_memcpy(actions_rx, actions,
3325                                            sizeof(struct rte_flow_action));
3326                                 actions_rx++;
3327                         }
3328                         break;
3329                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3330                         raw_decap = actions->conf;
3331                         if (raw_decap->size <
3332                             (sizeof(struct rte_flow_item_eth) +
3333                              sizeof(struct rte_flow_item_ipv4))) {
3334                                 memcpy(actions_tx, actions,
3335                                        sizeof(struct rte_flow_action));
3336                                 actions_tx++;
3337                         } else {
3338                                 rte_memcpy(actions_rx, actions,
3339                                            sizeof(struct rte_flow_action));
3340                                 actions_rx++;
3341                         }
3342                         break;
3343                 default:
3344                         rte_memcpy(actions_rx, actions,
3345                                    sizeof(struct rte_flow_action));
3346                         actions_rx++;
3347                         break;
3348                 }
3349         }
3350         /* Add set meta action and end action for the Rx flow. */
3351         tag_action = actions_rx;
3352         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3353         actions_rx++;
3354         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
3355         actions_rx++;
3356         set_tag = (void *)actions_rx;
3357         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
3358         assert(set_tag->id > REG_NONE);
3359         set_tag->data = *flow_id;
3360         tag_action->conf = set_tag;
3361         /* Create Tx item list. */
3362         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
3363         addr = (void *)&pattern_tx[2];
3364         item = pattern_tx;
3365         item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3366         tag_item = (void *)addr;
3367         tag_item->data = *flow_id;
3368         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
3369         assert(set_tag->id > REG_NONE);
3370         item->spec = tag_item;
3371         addr += sizeof(struct mlx5_rte_flow_item_tag);
3372         tag_item = (void *)addr;
3373         tag_item->data = UINT32_MAX;
3374         tag_item->id = UINT16_MAX;
3375         item->mask = tag_item;
3376         addr += sizeof(struct mlx5_rte_flow_item_tag);
3377         item->last = NULL;
3378         item++;
3379         item->type = RTE_FLOW_ITEM_TYPE_END;
3380         return 0;
3381 }
3382
3383 /**
3384  * The last stage of splitting chain, just creates the subflow
3385  * without any modification.
3386  *
3387  * @param dev
3388  *   Pointer to Ethernet device.
3389  * @param[in] flow
3390  *   Parent flow structure pointer.
3391  * @param[in, out] sub_flow
3392  *   Pointer to return the created subflow, may be NULL.
3393  * @param[in] attr
3394  *   Flow rule attributes.
3395  * @param[in] items
3396  *   Pattern specification (list terminated by the END pattern item).
3397  * @param[in] actions
3398  *   Associated actions (list terminated by the END action).
3399  * @param[in] external
3400  *   This flow rule is created by request external to PMD.
3401  * @param[out] error
3402  *   Perform verbose error reporting if not NULL.
3403  * @return
3404  *   0 on success, negative value otherwise
3405  */
3406 static int
3407 flow_create_split_inner(struct rte_eth_dev *dev,
3408                         struct rte_flow *flow,
3409                         struct mlx5_flow **sub_flow,
3410                         const struct rte_flow_attr *attr,
3411                         const struct rte_flow_item items[],
3412                         const struct rte_flow_action actions[],
3413                         bool external, struct rte_flow_error *error)
3414 {
3415         struct mlx5_flow *dev_flow;
3416
3417         dev_flow = flow_drv_prepare(flow, attr, items, actions, error);
3418         if (!dev_flow)
3419                 return -rte_errno;
3420         dev_flow->flow = flow;
3421         dev_flow->external = external;
3422         /* Subflow object was created, we must include one in the list. */
3423         LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
3424         if (sub_flow)
3425                 *sub_flow = dev_flow;
3426         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
3427 }
3428
3429 /**
3430  * Split the meter flow.
3431  *
3432  * As meter flow will split to three sub flow, other than meter
3433  * action, the other actions make sense to only meter accepts
3434  * the packet. If it need to be dropped, no other additional
3435  * actions should be take.
3436  *
3437  * One kind of special action which decapsulates the L3 tunnel
3438  * header will be in the prefix sub flow, as not to take the
3439  * L3 tunnel header into account.
3440  *
3441  * @param dev
3442  *   Pointer to Ethernet device.
3443  * @param[in] actions
3444  *   Associated actions (list terminated by the END action).
3445  * @param[out] actions_sfx
3446  *   Suffix flow actions.
3447  * @param[out] actions_pre
3448  *   Prefix flow actions.
3449  * @param[out] pattern_sfx
3450  *   The pattern items for the suffix flow.
3451  * @param[out] tag_sfx
3452  *   Pointer to suffix flow tag.
3453  *
3454  * @return
3455  *   0 on success.
3456  */
3457 static int
3458 flow_meter_split_prep(struct rte_eth_dev *dev,
3459                  const struct rte_flow_action actions[],
3460                  struct rte_flow_action actions_sfx[],
3461                  struct rte_flow_action actions_pre[])
3462 {
3463         struct rte_flow_action *tag_action;
3464         struct mlx5_rte_flow_action_set_tag *set_tag;
3465         struct rte_flow_error error;
3466         const struct rte_flow_action_raw_encap *raw_encap;
3467         const struct rte_flow_action_raw_decap *raw_decap;
3468         uint32_t tag_id;
3469
3470         /* Add the extra tag action first. */
3471         tag_action = actions_pre;
3472         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3473         actions_pre++;
3474         /* Prepare the actions for prefix and suffix flow. */
3475         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3476                 switch (actions->type) {
3477                 case RTE_FLOW_ACTION_TYPE_METER:
3478                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3479                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3480                         memcpy(actions_pre, actions,
3481                                sizeof(struct rte_flow_action));
3482                         actions_pre++;
3483                         break;
3484                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3485                         raw_encap = actions->conf;
3486                         if (raw_encap->size >
3487                             (sizeof(struct rte_flow_item_eth) +
3488                              sizeof(struct rte_flow_item_ipv4))) {
3489                                 memcpy(actions_sfx, actions,
3490                                        sizeof(struct rte_flow_action));
3491                                 actions_sfx++;
3492                         } else {
3493                                 rte_memcpy(actions_pre, actions,
3494                                            sizeof(struct rte_flow_action));
3495                                 actions_pre++;
3496                         }
3497                         break;
3498                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3499                         raw_decap = actions->conf;
3500                         /* Size 0 decap means 50 bytes as vxlan decap. */
3501                         if (raw_decap->size && (raw_decap->size <
3502                             (sizeof(struct rte_flow_item_eth) +
3503                              sizeof(struct rte_flow_item_ipv4)))) {
3504                                 memcpy(actions_sfx, actions,
3505                                        sizeof(struct rte_flow_action));
3506                                 actions_sfx++;
3507                         } else {
3508                                 rte_memcpy(actions_pre, actions,
3509                                            sizeof(struct rte_flow_action));
3510                                 actions_pre++;
3511                         }
3512                         break;
3513                 default:
3514                         memcpy(actions_sfx, actions,
3515                                 sizeof(struct rte_flow_action));
3516                         actions_sfx++;
3517                         break;
3518                 }
3519         }
3520         /* Add end action to the actions. */
3521         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
3522         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
3523         actions_pre++;
3524         /* Set the tag. */
3525         set_tag = (void *)actions_pre;
3526         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3527         /*
3528          * Get the id from the qrss_pool to make qrss share the id with meter.
3529          */
3530         tag_id = flow_qrss_get_id(dev);
3531         set_tag->data = rte_cpu_to_be_32(tag_id);
3532         tag_action->conf = set_tag;
3533         return tag_id;
3534 }
3535
3536 /**
3537  * Split action list having QUEUE/RSS for metadata register copy.
3538  *
3539  * Once Q/RSS action is detected in user's action list, the flow action
3540  * should be split in order to copy metadata registers, which will happen in
3541  * RX_CP_TBL like,
3542  *   - CQE->flow_tag := reg_c[1] (MARK)
3543  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3544  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
3545  * This is because the last action of each flow must be a terminal action
3546  * (QUEUE, RSS or DROP).
3547  *
3548  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
3549  * stored and kept in the mlx5_flow structure per each sub_flow.
3550  *
3551  * The Q/RSS action is replaced with,
3552  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
3553  * And the following JUMP action is added at the end,
3554  *   - JUMP, to RX_CP_TBL.
3555  *
3556  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
3557  * flow_create_split_metadata() routine. The flow will look like,
3558  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
3559  *
3560  * @param dev
3561  *   Pointer to Ethernet device.
3562  * @param[out] split_actions
3563  *   Pointer to store split actions to jump to CP_TBL.
3564  * @param[in] actions
3565  *   Pointer to the list of original flow actions.
3566  * @param[in] qrss
3567  *   Pointer to the Q/RSS action.
3568  * @param[in] actions_n
3569  *   Number of original actions.
3570  * @param[out] error
3571  *   Perform verbose error reporting if not NULL.
3572  *
3573  * @return
3574  *   non-zero unique flow_id on success, otherwise 0 and
3575  *   error/rte_error are set.
3576  */
3577 static uint32_t
3578 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
3579                           struct rte_flow_action *split_actions,
3580                           const struct rte_flow_action *actions,
3581                           const struct rte_flow_action *qrss,
3582                           int actions_n, struct rte_flow_error *error)
3583 {
3584         struct mlx5_rte_flow_action_set_tag *set_tag;
3585         struct rte_flow_action_jump *jump;
3586         const int qrss_idx = qrss - actions;
3587         uint32_t flow_id = 0;
3588         int ret = 0;
3589
3590         /*
3591          * Given actions will be split
3592          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
3593          * - Add jump to mreg CP_TBL.
3594          * As a result, there will be one more action.
3595          */
3596         ++actions_n;
3597         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
3598         set_tag = (void *)(split_actions + actions_n);
3599         /*
3600          * If tag action is not set to void(it means we are not the meter
3601          * suffix flow), add the tag action. Since meter suffix flow already
3602          * has the tag added.
3603          */
3604         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
3605                 /*
3606                  * Allocate the new subflow ID. This one is unique within
3607                  * device and not shared with representors. Otherwise,
3608                  * we would have to resolve multi-thread access synch
3609                  * issue. Each flow on the shared device is appended
3610                  * with source vport identifier, so the resulting
3611                  * flows will be unique in the shared (by master and
3612                  * representors) domain even if they have coinciding
3613                  * IDs.
3614                  */
3615                 flow_id = flow_qrss_get_id(dev);
3616                 if (!flow_id)
3617                         return rte_flow_error_set(error, ENOMEM,
3618                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3619                                                   NULL, "can't allocate id "
3620                                                   "for split Q/RSS subflow");
3621                 /* Internal SET_TAG action to set flow ID. */
3622                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
3623                         .data = flow_id,
3624                 };
3625                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3626                 if (ret < 0)
3627                         return ret;
3628                 set_tag->id = ret;
3629                 /* Construct new actions array. */
3630                 /* Replace QUEUE/RSS action. */
3631                 split_actions[qrss_idx] = (struct rte_flow_action){
3632                         .type = MLX5_RTE_FLOW_ACTION_TYPE_TAG,
3633                         .conf = set_tag,
3634                 };
3635         }
3636         /* JUMP action to jump to mreg copy table (CP_TBL). */
3637         jump = (void *)(set_tag + 1);
3638         *jump = (struct rte_flow_action_jump){
3639                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3640         };
3641         split_actions[actions_n - 2] = (struct rte_flow_action){
3642                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3643                 .conf = jump,
3644         };
3645         split_actions[actions_n - 1] = (struct rte_flow_action){
3646                 .type = RTE_FLOW_ACTION_TYPE_END,
3647         };
3648         return flow_id;
3649 }
3650
3651 /**
3652  * Extend the given action list for Tx metadata copy.
3653  *
3654  * Copy the given action list to the ext_actions and add flow metadata register
3655  * copy action in order to copy reg_a set by WQE to reg_c[0].
3656  *
3657  * @param[out] ext_actions
3658  *   Pointer to the extended action list.
3659  * @param[in] actions
3660  *   Pointer to the list of actions.
3661  * @param[in] actions_n
3662  *   Number of actions in the list.
3663  * @param[out] error
3664  *   Perform verbose error reporting if not NULL.
3665  *
3666  * @return
3667  *   0 on success, negative value otherwise
3668  */
3669 static int
3670 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
3671                        struct rte_flow_action *ext_actions,
3672                        const struct rte_flow_action *actions,
3673                        int actions_n, struct rte_flow_error *error)
3674 {
3675         struct mlx5_flow_action_copy_mreg *cp_mreg =
3676                 (struct mlx5_flow_action_copy_mreg *)
3677                         (ext_actions + actions_n + 1);
3678         int ret;
3679
3680         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3681         if (ret < 0)
3682                 return ret;
3683         cp_mreg->dst = ret;
3684         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
3685         if (ret < 0)
3686                 return ret;
3687         cp_mreg->src = ret;
3688         memcpy(ext_actions, actions,
3689                         sizeof(*ext_actions) * actions_n);
3690         ext_actions[actions_n - 1] = (struct rte_flow_action){
3691                 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3692                 .conf = cp_mreg,
3693         };
3694         ext_actions[actions_n] = (struct rte_flow_action){
3695                 .type = RTE_FLOW_ACTION_TYPE_END,
3696         };
3697         return 0;
3698 }
3699
3700 /**
3701  * The splitting for metadata feature.
3702  *
3703  * - Q/RSS action on NIC Rx should be split in order to pass by
3704  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
3705  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
3706  *
3707  * - All the actions on NIC Tx should have a mreg copy action to
3708  *   copy reg_a from WQE to reg_c[0].
3709  *
3710  * @param dev
3711  *   Pointer to Ethernet device.
3712  * @param[in] flow
3713  *   Parent flow structure pointer.
3714  * @param[in] attr
3715  *   Flow rule attributes.
3716  * @param[in] items
3717  *   Pattern specification (list terminated by the END pattern item).
3718  * @param[in] actions
3719  *   Associated actions (list terminated by the END action).
3720  * @param[in] external
3721  *   This flow rule is created by request external to PMD.
3722  * @param[out] error
3723  *   Perform verbose error reporting if not NULL.
3724  * @return
3725  *   0 on success, negative value otherwise
3726  */
3727 static int
3728 flow_create_split_metadata(struct rte_eth_dev *dev,
3729                            struct rte_flow *flow,
3730                            const struct rte_flow_attr *attr,
3731                            const struct rte_flow_item items[],
3732                            const struct rte_flow_action actions[],
3733                            bool external, struct rte_flow_error *error)
3734 {
3735         struct mlx5_priv *priv = dev->data->dev_private;
3736         struct mlx5_dev_config *config = &priv->config;
3737         const struct rte_flow_action *qrss = NULL;
3738         struct rte_flow_action *ext_actions = NULL;
3739         struct mlx5_flow *dev_flow = NULL;
3740         uint32_t qrss_id = 0;
3741         int mtr_sfx = 0;
3742         size_t act_size;
3743         int actions_n;
3744         int ret;
3745
3746         /* Check whether extensive metadata feature is engaged. */
3747         if (!config->dv_flow_en ||
3748             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3749             !mlx5_flow_ext_mreg_supported(dev))
3750                 return flow_create_split_inner(dev, flow, NULL, attr, items,
3751                                                actions, external, error);
3752         actions_n = flow_parse_qrss_action(actions, &qrss);
3753         if (qrss) {
3754                 /* Exclude hairpin flows from splitting. */
3755                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
3756                         const struct rte_flow_action_queue *queue;
3757
3758                         queue = qrss->conf;
3759                         if (mlx5_rxq_get_type(dev, queue->index) ==
3760                             MLX5_RXQ_TYPE_HAIRPIN)
3761                                 qrss = NULL;
3762                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
3763                         const struct rte_flow_action_rss *rss;
3764
3765                         rss = qrss->conf;
3766                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
3767                             MLX5_RXQ_TYPE_HAIRPIN)
3768                                 qrss = NULL;
3769                 }
3770         }
3771         if (qrss) {
3772                 /* Check if it is in meter suffix table. */
3773                 mtr_sfx = attr->group == (attr->transfer ?
3774                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
3775                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
3776                 /*
3777                  * Q/RSS action on NIC Rx should be split in order to pass by
3778                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
3779                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
3780                  */
3781                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3782                            sizeof(struct rte_flow_action_set_tag) +
3783                            sizeof(struct rte_flow_action_jump);
3784                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3785                 if (!ext_actions)
3786                         return rte_flow_error_set(error, ENOMEM,
3787                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3788                                                   NULL, "no memory to split "
3789                                                   "metadata flow");
3790                 /*
3791                  * If we are the suffix flow of meter, tag already exist.
3792                  * Set the tag action to void.
3793                  */
3794                 if (mtr_sfx)
3795                         ext_actions[qrss - actions].type =
3796                                                 RTE_FLOW_ACTION_TYPE_VOID;
3797                 else
3798                         ext_actions[qrss - actions].type =
3799                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3800                 /*
3801                  * Create the new actions list with removed Q/RSS action
3802                  * and appended set tag and jump to register copy table
3803                  * (RX_CP_TBL). We should preallocate unique tag ID here
3804                  * in advance, because it is needed for set tag action.
3805                  */
3806                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
3807                                                     qrss, actions_n, error);
3808                 if (!mtr_sfx && !qrss_id) {
3809                         ret = -rte_errno;
3810                         goto exit;
3811                 }
3812         } else if (attr->egress && !attr->transfer) {
3813                 /*
3814                  * All the actions on NIC Tx should have a metadata register
3815                  * copy action to copy reg_a from WQE to reg_c[meta]
3816                  */
3817                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3818                            sizeof(struct mlx5_flow_action_copy_mreg);
3819                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3820                 if (!ext_actions)
3821                         return rte_flow_error_set(error, ENOMEM,
3822                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3823                                                   NULL, "no memory to split "
3824                                                   "metadata flow");
3825                 /* Create the action list appended with copy register. */
3826                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
3827                                              actions_n, error);
3828                 if (ret < 0)
3829                         goto exit;
3830         }
3831         /* Add the unmodified original or prefix subflow. */
3832         ret = flow_create_split_inner(dev, flow, &dev_flow, attr, items,
3833                                       ext_actions ? ext_actions : actions,
3834                                       external, error);
3835         if (ret < 0)
3836                 goto exit;
3837         assert(dev_flow);
3838         if (qrss) {
3839                 const struct rte_flow_attr q_attr = {
3840                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3841                         .ingress = 1,
3842                 };
3843                 /* Internal PMD action to set register. */
3844                 struct mlx5_rte_flow_item_tag q_tag_spec = {
3845                         .data = qrss_id,
3846                         .id = 0,
3847                 };
3848                 struct rte_flow_item q_items[] = {
3849                         {
3850                                 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3851                                 .spec = &q_tag_spec,
3852                                 .last = NULL,
3853                                 .mask = NULL,
3854                         },
3855                         {
3856                                 .type = RTE_FLOW_ITEM_TYPE_END,
3857                         },
3858                 };
3859                 struct rte_flow_action q_actions[] = {
3860                         {
3861                                 .type = qrss->type,
3862                                 .conf = qrss->conf,
3863                         },
3864                         {
3865                                 .type = RTE_FLOW_ACTION_TYPE_END,
3866                         },
3867                 };
3868                 uint64_t hash_fields = dev_flow->hash_fields;
3869
3870                 /*
3871                  * Configure the tag item only if there is no meter subflow.
3872                  * Since tag is already marked in the meter suffix subflow
3873                  * we can just use the meter suffix items as is.
3874                  */
3875                 if (qrss_id) {
3876                         /* Not meter subflow. */
3877                         assert(!mtr_sfx);
3878                         /*
3879                          * Put unique id in prefix flow due to it is destroyed
3880                          * after suffix flow and id will be freed after there
3881                          * is no actual flows with this id and identifier
3882                          * reallocation becomes possible (for example, for
3883                          * other flows in other threads).
3884                          */
3885                         dev_flow->qrss_id = qrss_id;
3886                         qrss_id = 0;
3887                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
3888                                                    error);
3889                         if (ret < 0)
3890                                 goto exit;
3891                         q_tag_spec.id = ret;
3892                 }
3893                 dev_flow = NULL;
3894                 /* Add suffix subflow to execute Q/RSS. */
3895                 ret = flow_create_split_inner(dev, flow, &dev_flow,
3896                                               &q_attr, mtr_sfx ? items :
3897                                               q_items, q_actions,
3898                                               external, error);
3899                 if (ret < 0)
3900                         goto exit;
3901                 assert(dev_flow);
3902                 dev_flow->hash_fields = hash_fields;
3903         }
3904
3905 exit:
3906         /*
3907          * We do not destroy the partially created sub_flows in case of error.
3908          * These ones are included into parent flow list and will be destroyed
3909          * by flow_drv_destroy.
3910          */
3911         flow_qrss_free_id(dev, qrss_id);
3912         rte_free(ext_actions);
3913         return ret;
3914 }
3915
3916 /**
3917  * The splitting for meter feature.
3918  *
3919  * - The meter flow will be split to two flows as prefix and
3920  *   suffix flow. The packets make sense only it pass the prefix
3921  *   meter action.
3922  *
3923  * - Reg_C_5 is used for the packet to match betweend prefix and
3924  *   suffix flow.
3925  *
3926  * @param dev
3927  *   Pointer to Ethernet device.
3928  * @param[in] flow
3929  *   Parent flow structure pointer.
3930  * @param[in] attr
3931  *   Flow rule attributes.
3932  * @param[in] items
3933  *   Pattern specification (list terminated by the END pattern item).
3934  * @param[in] actions
3935  *   Associated actions (list terminated by the END action).
3936  * @param[in] external
3937  *   This flow rule is created by request external to PMD.
3938  * @param[out] error
3939  *   Perform verbose error reporting if not NULL.
3940  * @return
3941  *   0 on success, negative value otherwise
3942  */
3943 static int
3944 flow_create_split_meter(struct rte_eth_dev *dev,
3945                            struct rte_flow *flow,
3946                            const struct rte_flow_attr *attr,
3947                            const struct rte_flow_item items[],
3948                            const struct rte_flow_action actions[],
3949                            bool external, struct rte_flow_error *error)
3950 {
3951         struct mlx5_priv *priv = dev->data->dev_private;
3952         struct rte_flow_action *sfx_actions = NULL;
3953         struct rte_flow_action *pre_actions = NULL;
3954         struct rte_flow_item *sfx_items = NULL;
3955         const  struct rte_flow_item *sfx_port_id_item;
3956         struct mlx5_flow *dev_flow = NULL;
3957         struct rte_flow_attr sfx_attr = *attr;
3958         uint32_t mtr = 0;
3959         uint32_t mtr_tag_id = 0;
3960         size_t act_size;
3961         size_t item_size;
3962         int actions_n = 0;
3963         int ret;
3964
3965         if (priv->mtr_en)
3966                 actions_n = flow_check_meter_action(actions, &mtr);
3967         if (mtr) {
3968                 struct mlx5_rte_flow_item_tag *tag_spec;
3969                 /* The five prefix actions: meter, decap, encap, tag, end. */
3970                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
3971                            sizeof(struct rte_flow_action_set_tag);
3972                 /* tag, end. */
3973 #define METER_SUFFIX_ITEM 3
3974                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
3975                             sizeof(struct mlx5_rte_flow_item_tag);
3976                 sfx_actions = rte_zmalloc(__func__, (act_size + item_size), 0);
3977                 if (!sfx_actions)
3978                         return rte_flow_error_set(error, ENOMEM,
3979                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3980                                                   NULL, "no memory to split "
3981                                                   "meter flow");
3982                 pre_actions = sfx_actions + actions_n;
3983                 mtr_tag_id = flow_meter_split_prep(dev, actions, sfx_actions,
3984                                                      pre_actions);
3985                 if (!mtr_tag_id) {
3986                         ret = -rte_errno;
3987                         goto exit;
3988                 }
3989                 /* Add the prefix subflow. */
3990                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, items,
3991                                                   pre_actions, external, error);
3992                 if (ret) {
3993                         ret = -rte_errno;
3994                         goto exit;
3995                 }
3996                 dev_flow->mtr_flow_id = mtr_tag_id;
3997                 /* Prepare the suffix flow match pattern. */
3998                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
3999                              act_size);
4000                 tag_spec = (struct mlx5_rte_flow_item_tag *)(sfx_items +
4001                             METER_SUFFIX_ITEM);
4002                 tag_spec->data = rte_cpu_to_be_32(dev_flow->mtr_flow_id);
4003                 tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0,
4004                                                     error);
4005                 sfx_items->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4006                 sfx_items->spec = tag_spec;
4007                 sfx_items->last = NULL;
4008                 sfx_items->mask = NULL;
4009                 sfx_items++;
4010                 sfx_port_id_item = find_port_id_item(items);
4011                 if (sfx_port_id_item) {
4012                         memcpy(sfx_items, sfx_port_id_item,
4013                                sizeof(*sfx_items));
4014                         sfx_items++;
4015                 }
4016                 sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4017                 sfx_items -= METER_SUFFIX_ITEM;
4018                 /* Setting the sfx group atrr. */
4019                 sfx_attr.group = sfx_attr.transfer ?
4020                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4021                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
4022         }
4023         /* Add the prefix subflow. */
4024         ret = flow_create_split_metadata(dev, flow, &sfx_attr,
4025                                          sfx_items ? sfx_items : items,
4026                                          sfx_actions ? sfx_actions : actions,
4027                                          external, error);
4028 exit:
4029         if (sfx_actions)
4030                 rte_free(sfx_actions);
4031         return ret;
4032 }
4033
4034 /**
4035  * Split the flow to subflow set. The splitters might be linked
4036  * in the chain, like this:
4037  * flow_create_split_outer() calls:
4038  *   flow_create_split_meter() calls:
4039  *     flow_create_split_metadata(meter_subflow_0) calls:
4040  *       flow_create_split_inner(metadata_subflow_0)
4041  *       flow_create_split_inner(metadata_subflow_1)
4042  *       flow_create_split_inner(metadata_subflow_2)
4043  *     flow_create_split_metadata(meter_subflow_1) calls:
4044  *       flow_create_split_inner(metadata_subflow_0)
4045  *       flow_create_split_inner(metadata_subflow_1)
4046  *       flow_create_split_inner(metadata_subflow_2)
4047  *
4048  * This provide flexible way to add new levels of flow splitting.
4049  * The all of successfully created subflows are included to the
4050  * parent flow dev_flow list.
4051  *
4052  * @param dev
4053  *   Pointer to Ethernet device.
4054  * @param[in] flow
4055  *   Parent flow structure pointer.
4056  * @param[in] attr
4057  *   Flow rule attributes.
4058  * @param[in] items
4059  *   Pattern specification (list terminated by the END pattern item).
4060  * @param[in] actions
4061  *   Associated actions (list terminated by the END action).
4062  * @param[in] external
4063  *   This flow rule is created by request external to PMD.
4064  * @param[out] error
4065  *   Perform verbose error reporting if not NULL.
4066  * @return
4067  *   0 on success, negative value otherwise
4068  */
4069 static int
4070 flow_create_split_outer(struct rte_eth_dev *dev,
4071                         struct rte_flow *flow,
4072                         const struct rte_flow_attr *attr,
4073                         const struct rte_flow_item items[],
4074                         const struct rte_flow_action actions[],
4075                         bool external, struct rte_flow_error *error)
4076 {
4077         int ret;
4078
4079         ret = flow_create_split_meter(dev, flow, attr, items,
4080                                          actions, external, error);
4081         assert(ret <= 0);
4082         return ret;
4083 }
4084
4085 /**
4086  * Create a flow and add it to @p list.
4087  *
4088  * @param dev
4089  *   Pointer to Ethernet device.
4090  * @param list
4091  *   Pointer to a TAILQ flow list. If this parameter NULL,
4092  *   no list insertion occurred, flow is just created,
4093  *   this is caller's responsibility to track the
4094  *   created flow.
4095  * @param[in] attr
4096  *   Flow rule attributes.
4097  * @param[in] items
4098  *   Pattern specification (list terminated by the END pattern item).
4099  * @param[in] actions
4100  *   Associated actions (list terminated by the END action).
4101  * @param[in] external
4102  *   This flow rule is created by request external to PMD.
4103  * @param[out] error
4104  *   Perform verbose error reporting if not NULL.
4105  *
4106  * @return
4107  *   A flow on success, NULL otherwise and rte_errno is set.
4108  */
4109 static struct rte_flow *
4110 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
4111                  const struct rte_flow_attr *attr,
4112                  const struct rte_flow_item items[],
4113                  const struct rte_flow_action actions[],
4114                  bool external, struct rte_flow_error *error)
4115 {
4116         struct mlx5_priv *priv = dev->data->dev_private;
4117         struct rte_flow *flow = NULL;
4118         struct mlx5_flow *dev_flow;
4119         const struct rte_flow_action_rss *rss;
4120         union {
4121                 struct rte_flow_expand_rss buf;
4122                 uint8_t buffer[2048];
4123         } expand_buffer;
4124         union {
4125                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4126                 uint8_t buffer[2048];
4127         } actions_rx;
4128         union {
4129                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4130                 uint8_t buffer[2048];
4131         } actions_hairpin_tx;
4132         union {
4133                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
4134                 uint8_t buffer[2048];
4135         } items_tx;
4136         struct rte_flow_expand_rss *buf = &expand_buffer.buf;
4137         const struct rte_flow_action *p_actions_rx = actions;
4138         int ret;
4139         uint32_t i;
4140         uint32_t flow_size;
4141         int hairpin_flow = 0;
4142         uint32_t hairpin_id = 0;
4143         struct rte_flow_attr attr_tx = { .priority = 0 };
4144
4145         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
4146         if (hairpin_flow > 0) {
4147                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
4148                         rte_errno = EINVAL;
4149                         return NULL;
4150                 }
4151                 flow_hairpin_split(dev, actions, actions_rx.actions,
4152                                    actions_hairpin_tx.actions, items_tx.items,
4153                                    &hairpin_id);
4154                 p_actions_rx = actions_rx.actions;
4155         }
4156         ret = flow_drv_validate(dev, attr, items, p_actions_rx, external,
4157                                 error);
4158         if (ret < 0)
4159                 goto error_before_flow;
4160         flow_size = sizeof(struct rte_flow);
4161         rss = flow_get_rss_action(p_actions_rx);
4162         if (rss)
4163                 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
4164                                             sizeof(void *));
4165         else
4166                 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
4167         flow = rte_calloc(__func__, 1, flow_size, 0);
4168         if (!flow) {
4169                 rte_errno = ENOMEM;
4170                 goto error_before_flow;
4171         }
4172         flow->drv_type = flow_get_drv_type(dev, attr);
4173         if (hairpin_id != 0)
4174                 flow->hairpin_flow_id = hairpin_id;
4175         assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
4176                flow->drv_type < MLX5_FLOW_TYPE_MAX);
4177         flow->rss.queue = (void *)(flow + 1);
4178         if (rss) {
4179                 /*
4180                  * The following information is required by
4181                  * mlx5_flow_hashfields_adjust() in advance.
4182                  */
4183                 flow->rss.level = rss->level;
4184                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
4185                 flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
4186         }
4187         LIST_INIT(&flow->dev_flows);
4188         if (rss && rss->types) {
4189                 unsigned int graph_root;
4190
4191                 graph_root = find_graph_root(items, rss->level);
4192                 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
4193                                           items, rss->types,
4194                                           mlx5_support_expansion,
4195                                           graph_root);
4196                 assert(ret > 0 &&
4197                        (unsigned int)ret < sizeof(expand_buffer.buffer));
4198         } else {
4199                 buf->entries = 1;
4200                 buf->entry[0].pattern = (void *)(uintptr_t)items;
4201         }
4202         for (i = 0; i < buf->entries; ++i) {
4203                 /*
4204                  * The splitter may create multiple dev_flows,
4205                  * depending on configuration. In the simplest
4206                  * case it just creates unmodified original flow.
4207                  */
4208                 ret = flow_create_split_outer(dev, flow, attr,
4209                                               buf->entry[i].pattern,
4210                                               p_actions_rx, external,
4211                                               error);
4212                 if (ret < 0)
4213                         goto error;
4214         }
4215         /* Create the tx flow. */
4216         if (hairpin_flow) {
4217                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
4218                 attr_tx.ingress = 0;
4219                 attr_tx.egress = 1;
4220                 dev_flow = flow_drv_prepare(flow, &attr_tx, items_tx.items,
4221                                             actions_hairpin_tx.actions, error);
4222                 if (!dev_flow)
4223                         goto error;
4224                 dev_flow->flow = flow;
4225                 dev_flow->external = 0;
4226                 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
4227                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
4228                                          items_tx.items,
4229                                          actions_hairpin_tx.actions, error);
4230                 if (ret < 0)
4231                         goto error;
4232         }
4233         /*
4234          * Update the metadata register copy table. If extensive
4235          * metadata feature is enabled and registers are supported
4236          * we might create the extra rte_flow for each unique
4237          * MARK/FLAG action ID.
4238          *
4239          * The table is updated for ingress Flows only, because
4240          * the egress Flows belong to the different device and
4241          * copy table should be updated in peer NIC Rx domain.
4242          */
4243         if (attr->ingress &&
4244             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
4245                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
4246                 if (ret)
4247                         goto error;
4248         }
4249         if (dev->data->dev_started) {
4250                 ret = flow_drv_apply(dev, flow, error);
4251                 if (ret < 0)
4252                         goto error;
4253         }
4254         if (list)
4255                 TAILQ_INSERT_TAIL(list, flow, next);
4256         flow_rxq_flags_set(dev, flow);
4257         return flow;
4258 error_before_flow:
4259         if (hairpin_id)
4260                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4261                                      hairpin_id);
4262         return NULL;
4263 error:
4264         assert(flow);
4265         flow_mreg_del_copy_action(dev, flow);
4266         ret = rte_errno; /* Save rte_errno before cleanup. */
4267         if (flow->hairpin_flow_id)
4268                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4269                                      flow->hairpin_flow_id);
4270         assert(flow);
4271         flow_drv_destroy(dev, flow);
4272         rte_free(flow);
4273         rte_errno = ret; /* Restore rte_errno. */
4274         return NULL;
4275 }
4276
4277 /**
4278  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
4279  * incoming packets to table 1.
4280  *
4281  * Other flow rules, requested for group n, will be created in
4282  * e-switch table n+1.
4283  * Jump action to e-switch group n will be created to group n+1.
4284  *
4285  * Used when working in switchdev mode, to utilise advantages of table 1
4286  * and above.
4287  *
4288  * @param dev
4289  *   Pointer to Ethernet device.
4290  *
4291  * @return
4292  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
4293  */
4294 struct rte_flow *
4295 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
4296 {
4297         const struct rte_flow_attr attr = {
4298                 .group = 0,
4299                 .priority = 0,
4300                 .ingress = 1,
4301                 .egress = 0,
4302                 .transfer = 1,
4303         };
4304         const struct rte_flow_item pattern = {
4305                 .type = RTE_FLOW_ITEM_TYPE_END,
4306         };
4307         struct rte_flow_action_jump jump = {
4308                 .group = 1,
4309         };
4310         const struct rte_flow_action actions[] = {
4311                 {
4312                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4313                         .conf = &jump,
4314                 },
4315                 {
4316                         .type = RTE_FLOW_ACTION_TYPE_END,
4317                 },
4318         };
4319         struct mlx5_priv *priv = dev->data->dev_private;
4320         struct rte_flow_error error;
4321
4322         return flow_list_create(dev, &priv->ctrl_flows, &attr, &pattern,
4323                                 actions, false, &error);
4324 }
4325
4326 /**
4327  * Create a flow.
4328  *
4329  * @see rte_flow_create()
4330  * @see rte_flow_ops
4331  */
4332 struct rte_flow *
4333 mlx5_flow_create(struct rte_eth_dev *dev,
4334                  const struct rte_flow_attr *attr,
4335                  const struct rte_flow_item items[],
4336                  const struct rte_flow_action actions[],
4337                  struct rte_flow_error *error)
4338 {
4339         struct mlx5_priv *priv = dev->data->dev_private;
4340
4341         return flow_list_create(dev, &priv->flows,
4342                                 attr, items, actions, true, error);
4343 }
4344
4345 /**
4346  * Destroy a flow in a list.
4347  *
4348  * @param dev
4349  *   Pointer to Ethernet device.
4350  * @param list
4351  *   Pointer to a TAILQ flow list. If this parameter NULL,
4352  *   there is no flow removal from the list.
4353  * @param[in] flow
4354  *   Flow to destroy.
4355  */
4356 static void
4357 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
4358                   struct rte_flow *flow)
4359 {
4360         struct mlx5_priv *priv = dev->data->dev_private;
4361
4362         /*
4363          * Update RX queue flags only if port is started, otherwise it is
4364          * already clean.
4365          */
4366         if (dev->data->dev_started)
4367                 flow_rxq_flags_trim(dev, flow);
4368         if (flow->hairpin_flow_id)
4369                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4370                                      flow->hairpin_flow_id);
4371         flow_drv_destroy(dev, flow);
4372         if (list)
4373                 TAILQ_REMOVE(list, flow, next);
4374         flow_mreg_del_copy_action(dev, flow);
4375         rte_free(flow->fdir);
4376         rte_free(flow);
4377 }
4378
4379 /**
4380  * Destroy all flows.
4381  *
4382  * @param dev
4383  *   Pointer to Ethernet device.
4384  * @param list
4385  *   Pointer to a TAILQ flow list.
4386  */
4387 void
4388 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
4389 {
4390         while (!TAILQ_EMPTY(list)) {
4391                 struct rte_flow *flow;
4392
4393                 flow = TAILQ_FIRST(list);
4394                 flow_list_destroy(dev, list, flow);
4395         }
4396 }
4397
4398 /**
4399  * Remove all flows.
4400  *
4401  * @param dev
4402  *   Pointer to Ethernet device.
4403  * @param list
4404  *   Pointer to a TAILQ flow list.
4405  */
4406 void
4407 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
4408 {
4409         struct rte_flow *flow;
4410
4411         TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) {
4412                 flow_drv_remove(dev, flow);
4413                 flow_mreg_stop_copy_action(dev, flow);
4414         }
4415         flow_mreg_del_default_copy_action(dev);
4416         flow_rxq_flags_clear(dev);
4417 }
4418
4419 /**
4420  * Add all flows.
4421  *
4422  * @param dev
4423  *   Pointer to Ethernet device.
4424  * @param list
4425  *   Pointer to a TAILQ flow list.
4426  *
4427  * @return
4428  *   0 on success, a negative errno value otherwise and rte_errno is set.
4429  */
4430 int
4431 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
4432 {
4433         struct rte_flow *flow;
4434         struct rte_flow_error error;
4435         int ret = 0;
4436
4437         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4438         ret = flow_mreg_add_default_copy_action(dev, &error);
4439         if (ret < 0)
4440                 return -rte_errno;
4441         /* Apply Flows created by application. */
4442         TAILQ_FOREACH(flow, list, next) {
4443                 ret = flow_mreg_start_copy_action(dev, flow);
4444                 if (ret < 0)
4445                         goto error;
4446                 ret = flow_drv_apply(dev, flow, &error);
4447                 if (ret < 0)
4448                         goto error;
4449                 flow_rxq_flags_set(dev, flow);
4450         }
4451         return 0;
4452 error:
4453         ret = rte_errno; /* Save rte_errno before cleanup. */
4454         mlx5_flow_stop(dev, list);
4455         rte_errno = ret; /* Restore rte_errno. */
4456         return -rte_errno;
4457 }
4458
4459 /**
4460  * Verify the flow list is empty
4461  *
4462  * @param dev
4463  *  Pointer to Ethernet device.
4464  *
4465  * @return the number of flows not released.
4466  */
4467 int
4468 mlx5_flow_verify(struct rte_eth_dev *dev)
4469 {
4470         struct mlx5_priv *priv = dev->data->dev_private;
4471         struct rte_flow *flow;
4472         int ret = 0;
4473
4474         TAILQ_FOREACH(flow, &priv->flows, next) {
4475                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
4476                         dev->data->port_id, (void *)flow);
4477                 ++ret;
4478         }
4479         return ret;
4480 }
4481
4482 /**
4483  * Enable default hairpin egress flow.
4484  *
4485  * @param dev
4486  *   Pointer to Ethernet device.
4487  * @param queue
4488  *   The queue index.
4489  *
4490  * @return
4491  *   0 on success, a negative errno value otherwise and rte_errno is set.
4492  */
4493 int
4494 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
4495                             uint32_t queue)
4496 {
4497         struct mlx5_priv *priv = dev->data->dev_private;
4498         const struct rte_flow_attr attr = {
4499                 .egress = 1,
4500                 .priority = 0,
4501         };
4502         struct mlx5_rte_flow_item_tx_queue queue_spec = {
4503                 .queue = queue,
4504         };
4505         struct mlx5_rte_flow_item_tx_queue queue_mask = {
4506                 .queue = UINT32_MAX,
4507         };
4508         struct rte_flow_item items[] = {
4509                 {
4510                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
4511                         .spec = &queue_spec,
4512                         .last = NULL,
4513                         .mask = &queue_mask,
4514                 },
4515                 {
4516                         .type = RTE_FLOW_ITEM_TYPE_END,
4517                 },
4518         };
4519         struct rte_flow_action_jump jump = {
4520                 .group = MLX5_HAIRPIN_TX_TABLE,
4521         };
4522         struct rte_flow_action actions[2];
4523         struct rte_flow *flow;
4524         struct rte_flow_error error;
4525
4526         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
4527         actions[0].conf = &jump;
4528         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
4529         flow = flow_list_create(dev, &priv->ctrl_flows,
4530                                 &attr, items, actions, false, &error);
4531         if (!flow) {
4532                 DRV_LOG(DEBUG,
4533                         "Failed to create ctrl flow: rte_errno(%d),"
4534                         " type(%d), message(%s)",
4535                         rte_errno, error.type,
4536                         error.message ? error.message : " (no stated reason)");
4537                 return -rte_errno;
4538         }
4539         return 0;
4540 }
4541
4542 /**
4543  * Enable a control flow configured from the control plane.
4544  *
4545  * @param dev
4546  *   Pointer to Ethernet device.
4547  * @param eth_spec
4548  *   An Ethernet flow spec to apply.
4549  * @param eth_mask
4550  *   An Ethernet flow mask to apply.
4551  * @param vlan_spec
4552  *   A VLAN flow spec to apply.
4553  * @param vlan_mask
4554  *   A VLAN flow mask to apply.
4555  *
4556  * @return
4557  *   0 on success, a negative errno value otherwise and rte_errno is set.
4558  */
4559 int
4560 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
4561                     struct rte_flow_item_eth *eth_spec,
4562                     struct rte_flow_item_eth *eth_mask,
4563                     struct rte_flow_item_vlan *vlan_spec,
4564                     struct rte_flow_item_vlan *vlan_mask)
4565 {
4566         struct mlx5_priv *priv = dev->data->dev_private;
4567         const struct rte_flow_attr attr = {
4568                 .ingress = 1,
4569                 .priority = MLX5_FLOW_PRIO_RSVD,
4570         };
4571         struct rte_flow_item items[] = {
4572                 {
4573                         .type = RTE_FLOW_ITEM_TYPE_ETH,
4574                         .spec = eth_spec,
4575                         .last = NULL,
4576                         .mask = eth_mask,
4577                 },
4578                 {
4579                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
4580                                               RTE_FLOW_ITEM_TYPE_END,
4581                         .spec = vlan_spec,
4582                         .last = NULL,
4583                         .mask = vlan_mask,
4584                 },
4585                 {
4586                         .type = RTE_FLOW_ITEM_TYPE_END,
4587                 },
4588         };
4589         uint16_t queue[priv->reta_idx_n];
4590         struct rte_flow_action_rss action_rss = {
4591                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4592                 .level = 0,
4593                 .types = priv->rss_conf.rss_hf,
4594                 .key_len = priv->rss_conf.rss_key_len,
4595                 .queue_num = priv->reta_idx_n,
4596                 .key = priv->rss_conf.rss_key,
4597                 .queue = queue,
4598         };
4599         struct rte_flow_action actions[] = {
4600                 {
4601                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4602                         .conf = &action_rss,
4603                 },
4604                 {
4605                         .type = RTE_FLOW_ACTION_TYPE_END,
4606                 },
4607         };
4608         struct rte_flow *flow;
4609         struct rte_flow_error error;
4610         unsigned int i;
4611
4612         if (!priv->reta_idx_n || !priv->rxqs_n) {
4613                 return 0;
4614         }
4615         for (i = 0; i != priv->reta_idx_n; ++i)
4616                 queue[i] = (*priv->reta_idx)[i];
4617         flow = flow_list_create(dev, &priv->ctrl_flows,
4618                                 &attr, items, actions, false, &error);
4619         if (!flow)
4620                 return -rte_errno;
4621         return 0;
4622 }
4623
4624 /**
4625  * Enable a flow control configured from the control plane.
4626  *
4627  * @param dev
4628  *   Pointer to Ethernet device.
4629  * @param eth_spec
4630  *   An Ethernet flow spec to apply.
4631  * @param eth_mask
4632  *   An Ethernet flow mask to apply.
4633  *
4634  * @return
4635  *   0 on success, a negative errno value otherwise and rte_errno is set.
4636  */
4637 int
4638 mlx5_ctrl_flow(struct rte_eth_dev *dev,
4639                struct rte_flow_item_eth *eth_spec,
4640                struct rte_flow_item_eth *eth_mask)
4641 {
4642         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
4643 }
4644
4645 /**
4646  * Destroy a flow.
4647  *
4648  * @see rte_flow_destroy()
4649  * @see rte_flow_ops
4650  */
4651 int
4652 mlx5_flow_destroy(struct rte_eth_dev *dev,
4653                   struct rte_flow *flow,
4654                   struct rte_flow_error *error __rte_unused)
4655 {
4656         struct mlx5_priv *priv = dev->data->dev_private;
4657
4658         flow_list_destroy(dev, &priv->flows, flow);
4659         return 0;
4660 }
4661
4662 /**
4663  * Destroy all flows.
4664  *
4665  * @see rte_flow_flush()
4666  * @see rte_flow_ops
4667  */
4668 int
4669 mlx5_flow_flush(struct rte_eth_dev *dev,
4670                 struct rte_flow_error *error __rte_unused)
4671 {
4672         struct mlx5_priv *priv = dev->data->dev_private;
4673
4674         mlx5_flow_list_flush(dev, &priv->flows);
4675         return 0;
4676 }
4677
4678 /**
4679  * Isolated mode.
4680  *
4681  * @see rte_flow_isolate()
4682  * @see rte_flow_ops
4683  */
4684 int
4685 mlx5_flow_isolate(struct rte_eth_dev *dev,
4686                   int enable,
4687                   struct rte_flow_error *error)
4688 {
4689         struct mlx5_priv *priv = dev->data->dev_private;
4690
4691         if (dev->data->dev_started) {
4692                 rte_flow_error_set(error, EBUSY,
4693                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4694                                    NULL,
4695                                    "port must be stopped first");
4696                 return -rte_errno;
4697         }
4698         priv->isolated = !!enable;
4699         if (enable)
4700                 dev->dev_ops = &mlx5_dev_ops_isolate;
4701         else
4702                 dev->dev_ops = &mlx5_dev_ops;
4703         return 0;
4704 }
4705
4706 /**
4707  * Query a flow.
4708  *
4709  * @see rte_flow_query()
4710  * @see rte_flow_ops
4711  */
4712 static int
4713 flow_drv_query(struct rte_eth_dev *dev,
4714                struct rte_flow *flow,
4715                const struct rte_flow_action *actions,
4716                void *data,
4717                struct rte_flow_error *error)
4718 {
4719         const struct mlx5_flow_driver_ops *fops;
4720         enum mlx5_flow_drv_type ftype = flow->drv_type;
4721
4722         assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
4723         fops = flow_get_drv_ops(ftype);
4724
4725         return fops->query(dev, flow, actions, data, error);
4726 }
4727
4728 /**
4729  * Query a flow.
4730  *
4731  * @see rte_flow_query()
4732  * @see rte_flow_ops
4733  */
4734 int
4735 mlx5_flow_query(struct rte_eth_dev *dev,
4736                 struct rte_flow *flow,
4737                 const struct rte_flow_action *actions,
4738                 void *data,
4739                 struct rte_flow_error *error)
4740 {
4741         int ret;
4742
4743         ret = flow_drv_query(dev, flow, actions, data, error);
4744         if (ret < 0)
4745                 return ret;
4746         return 0;
4747 }
4748
4749 /**
4750  * Convert a flow director filter to a generic flow.
4751  *
4752  * @param dev
4753  *   Pointer to Ethernet device.
4754  * @param fdir_filter
4755  *   Flow director filter to add.
4756  * @param attributes
4757  *   Generic flow parameters structure.
4758  *
4759  * @return
4760  *   0 on success, a negative errno value otherwise and rte_errno is set.
4761  */
4762 static int
4763 flow_fdir_filter_convert(struct rte_eth_dev *dev,
4764                          const struct rte_eth_fdir_filter *fdir_filter,
4765                          struct mlx5_fdir *attributes)
4766 {
4767         struct mlx5_priv *priv = dev->data->dev_private;
4768         const struct rte_eth_fdir_input *input = &fdir_filter->input;
4769         const struct rte_eth_fdir_masks *mask =
4770                 &dev->data->dev_conf.fdir_conf.mask;
4771
4772         /* Validate queue number. */
4773         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
4774                 DRV_LOG(ERR, "port %u invalid queue number %d",
4775                         dev->data->port_id, fdir_filter->action.rx_queue);
4776                 rte_errno = EINVAL;
4777                 return -rte_errno;
4778         }
4779         attributes->attr.ingress = 1;
4780         attributes->items[0] = (struct rte_flow_item) {
4781                 .type = RTE_FLOW_ITEM_TYPE_ETH,
4782                 .spec = &attributes->l2,
4783                 .mask = &attributes->l2_mask,
4784         };
4785         switch (fdir_filter->action.behavior) {
4786         case RTE_ETH_FDIR_ACCEPT:
4787                 attributes->actions[0] = (struct rte_flow_action){
4788                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
4789                         .conf = &attributes->queue,
4790                 };
4791                 break;
4792         case RTE_ETH_FDIR_REJECT:
4793                 attributes->actions[0] = (struct rte_flow_action){
4794                         .type = RTE_FLOW_ACTION_TYPE_DROP,
4795                 };
4796                 break;
4797         default:
4798                 DRV_LOG(ERR, "port %u invalid behavior %d",
4799                         dev->data->port_id,
4800                         fdir_filter->action.behavior);
4801                 rte_errno = ENOTSUP;
4802                 return -rte_errno;
4803         }
4804         attributes->queue.index = fdir_filter->action.rx_queue;
4805         /* Handle L3. */
4806         switch (fdir_filter->input.flow_type) {
4807         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4808         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4809         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4810                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
4811                         .src_addr = input->flow.ip4_flow.src_ip,
4812                         .dst_addr = input->flow.ip4_flow.dst_ip,
4813                         .time_to_live = input->flow.ip4_flow.ttl,
4814                         .type_of_service = input->flow.ip4_flow.tos,
4815                 };
4816                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
4817                         .src_addr = mask->ipv4_mask.src_ip,
4818                         .dst_addr = mask->ipv4_mask.dst_ip,
4819                         .time_to_live = mask->ipv4_mask.ttl,
4820                         .type_of_service = mask->ipv4_mask.tos,
4821                         .next_proto_id = mask->ipv4_mask.proto,
4822                 };
4823                 attributes->items[1] = (struct rte_flow_item){
4824                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
4825                         .spec = &attributes->l3,
4826                         .mask = &attributes->l3_mask,
4827                 };
4828                 break;
4829         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4830         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4831         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4832                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
4833                         .hop_limits = input->flow.ipv6_flow.hop_limits,
4834                         .proto = input->flow.ipv6_flow.proto,
4835                 };
4836
4837                 memcpy(attributes->l3.ipv6.hdr.src_addr,
4838                        input->flow.ipv6_flow.src_ip,
4839                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4840                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
4841                        input->flow.ipv6_flow.dst_ip,
4842                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4843                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
4844                        mask->ipv6_mask.src_ip,
4845                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4846                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
4847                        mask->ipv6_mask.dst_ip,
4848                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4849                 attributes->items[1] = (struct rte_flow_item){
4850                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
4851                         .spec = &attributes->l3,
4852                         .mask = &attributes->l3_mask,
4853                 };
4854                 break;
4855         default:
4856                 DRV_LOG(ERR, "port %u invalid flow type%d",
4857                         dev->data->port_id, fdir_filter->input.flow_type);
4858                 rte_errno = ENOTSUP;
4859                 return -rte_errno;
4860         }
4861         /* Handle L4. */
4862         switch (fdir_filter->input.flow_type) {
4863         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4864                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4865                         .src_port = input->flow.udp4_flow.src_port,
4866                         .dst_port = input->flow.udp4_flow.dst_port,
4867                 };
4868                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4869                         .src_port = mask->src_port_mask,
4870                         .dst_port = mask->dst_port_mask,
4871                 };
4872                 attributes->items[2] = (struct rte_flow_item){
4873                         .type = RTE_FLOW_ITEM_TYPE_UDP,
4874                         .spec = &attributes->l4,
4875                         .mask = &attributes->l4_mask,
4876                 };
4877                 break;
4878         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4879                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4880                         .src_port = input->flow.tcp4_flow.src_port,
4881                         .dst_port = input->flow.tcp4_flow.dst_port,
4882                 };
4883                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4884                         .src_port = mask->src_port_mask,
4885                         .dst_port = mask->dst_port_mask,
4886                 };
4887                 attributes->items[2] = (struct rte_flow_item){
4888                         .type = RTE_FLOW_ITEM_TYPE_TCP,
4889                         .spec = &attributes->l4,
4890                         .mask = &attributes->l4_mask,
4891                 };
4892                 break;
4893         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4894                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4895                         .src_port = input->flow.udp6_flow.src_port,
4896                         .dst_port = input->flow.udp6_flow.dst_port,
4897                 };
4898                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4899                         .src_port = mask->src_port_mask,
4900                         .dst_port = mask->dst_port_mask,
4901                 };
4902                 attributes->items[2] = (struct rte_flow_item){
4903                         .type = RTE_FLOW_ITEM_TYPE_UDP,
4904                         .spec = &attributes->l4,
4905                         .mask = &attributes->l4_mask,
4906                 };
4907                 break;
4908         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4909                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4910                         .src_port = input->flow.tcp6_flow.src_port,
4911                         .dst_port = input->flow.tcp6_flow.dst_port,
4912                 };
4913                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4914                         .src_port = mask->src_port_mask,
4915                         .dst_port = mask->dst_port_mask,
4916                 };
4917                 attributes->items[2] = (struct rte_flow_item){
4918                         .type = RTE_FLOW_ITEM_TYPE_TCP,
4919                         .spec = &attributes->l4,
4920                         .mask = &attributes->l4_mask,
4921                 };
4922                 break;
4923         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4924         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4925                 break;
4926         default:
4927                 DRV_LOG(ERR, "port %u invalid flow type%d",
4928                         dev->data->port_id, fdir_filter->input.flow_type);
4929                 rte_errno = ENOTSUP;
4930                 return -rte_errno;
4931         }
4932         return 0;
4933 }
4934
4935 #define FLOW_FDIR_CMP(f1, f2, fld) \
4936         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
4937
4938 /**
4939  * Compare two FDIR flows. If items and actions are identical, the two flows are
4940  * regarded as same.
4941  *
4942  * @param dev
4943  *   Pointer to Ethernet device.
4944  * @param f1
4945  *   FDIR flow to compare.
4946  * @param f2
4947  *   FDIR flow to compare.
4948  *
4949  * @return
4950  *   Zero on match, 1 otherwise.
4951  */
4952 static int
4953 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
4954 {
4955         if (FLOW_FDIR_CMP(f1, f2, attr) ||
4956             FLOW_FDIR_CMP(f1, f2, l2) ||
4957             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
4958             FLOW_FDIR_CMP(f1, f2, l3) ||
4959             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
4960             FLOW_FDIR_CMP(f1, f2, l4) ||
4961             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
4962             FLOW_FDIR_CMP(f1, f2, actions[0].type))
4963                 return 1;
4964         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
4965             FLOW_FDIR_CMP(f1, f2, queue))
4966                 return 1;
4967         return 0;
4968 }
4969
4970 /**
4971  * Search device flow list to find out a matched FDIR flow.
4972  *
4973  * @param dev
4974  *   Pointer to Ethernet device.
4975  * @param fdir_flow
4976  *   FDIR flow to lookup.
4977  *
4978  * @return
4979  *   Pointer of flow if found, NULL otherwise.
4980  */
4981 static struct rte_flow *
4982 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
4983 {
4984         struct mlx5_priv *priv = dev->data->dev_private;
4985         struct rte_flow *flow = NULL;
4986
4987         assert(fdir_flow);
4988         TAILQ_FOREACH(flow, &priv->flows, next) {
4989                 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
4990                         DRV_LOG(DEBUG, "port %u found FDIR flow %p",
4991                                 dev->data->port_id, (void *)flow);
4992                         break;
4993                 }
4994         }
4995         return flow;
4996 }
4997
4998 /**
4999  * Add new flow director filter and store it in list.
5000  *
5001  * @param dev
5002  *   Pointer to Ethernet device.
5003  * @param fdir_filter
5004  *   Flow director filter to add.
5005  *
5006  * @return
5007  *   0 on success, a negative errno value otherwise and rte_errno is set.
5008  */
5009 static int
5010 flow_fdir_filter_add(struct rte_eth_dev *dev,
5011                      const struct rte_eth_fdir_filter *fdir_filter)
5012 {
5013         struct mlx5_priv *priv = dev->data->dev_private;
5014         struct mlx5_fdir *fdir_flow;
5015         struct rte_flow *flow;
5016         int ret;
5017
5018         fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
5019         if (!fdir_flow) {
5020                 rte_errno = ENOMEM;
5021                 return -rte_errno;
5022         }
5023         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
5024         if (ret)
5025                 goto error;
5026         flow = flow_fdir_filter_lookup(dev, fdir_flow);
5027         if (flow) {
5028                 rte_errno = EEXIST;
5029                 goto error;
5030         }
5031         flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
5032                                 fdir_flow->items, fdir_flow->actions, true,
5033                                 NULL);
5034         if (!flow)
5035                 goto error;
5036         assert(!flow->fdir);
5037         flow->fdir = fdir_flow;
5038         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
5039                 dev->data->port_id, (void *)flow);
5040         return 0;
5041 error:
5042         rte_free(fdir_flow);
5043         return -rte_errno;
5044 }
5045
5046 /**
5047  * Delete specific filter.
5048  *
5049  * @param dev
5050  *   Pointer to Ethernet device.
5051  * @param fdir_filter
5052  *   Filter to be deleted.
5053  *
5054  * @return
5055  *   0 on success, a negative errno value otherwise and rte_errno is set.
5056  */
5057 static int
5058 flow_fdir_filter_delete(struct rte_eth_dev *dev,
5059                         const struct rte_eth_fdir_filter *fdir_filter)
5060 {
5061         struct mlx5_priv *priv = dev->data->dev_private;
5062         struct rte_flow *flow;
5063         struct mlx5_fdir fdir_flow = {
5064                 .attr.group = 0,
5065         };
5066         int ret;
5067
5068         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
5069         if (ret)
5070                 return -rte_errno;
5071         flow = flow_fdir_filter_lookup(dev, &fdir_flow);
5072         if (!flow) {
5073                 rte_errno = ENOENT;
5074                 return -rte_errno;
5075         }
5076         flow_list_destroy(dev, &priv->flows, flow);
5077         DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
5078                 dev->data->port_id, (void *)flow);
5079         return 0;
5080 }
5081
5082 /**
5083  * Update queue for specific filter.
5084  *
5085  * @param dev
5086  *   Pointer to Ethernet device.
5087  * @param fdir_filter
5088  *   Filter to be updated.
5089  *
5090  * @return
5091  *   0 on success, a negative errno value otherwise and rte_errno is set.
5092  */
5093 static int
5094 flow_fdir_filter_update(struct rte_eth_dev *dev,
5095                         const struct rte_eth_fdir_filter *fdir_filter)
5096 {
5097         int ret;
5098
5099         ret = flow_fdir_filter_delete(dev, fdir_filter);
5100         if (ret)
5101                 return ret;
5102         return flow_fdir_filter_add(dev, fdir_filter);
5103 }
5104
5105 /**
5106  * Flush all filters.
5107  *
5108  * @param dev
5109  *   Pointer to Ethernet device.
5110  */
5111 static void
5112 flow_fdir_filter_flush(struct rte_eth_dev *dev)
5113 {
5114         struct mlx5_priv *priv = dev->data->dev_private;
5115
5116         mlx5_flow_list_flush(dev, &priv->flows);
5117 }
5118
5119 /**
5120  * Get flow director information.
5121  *
5122  * @param dev
5123  *   Pointer to Ethernet device.
5124  * @param[out] fdir_info
5125  *   Resulting flow director information.
5126  */
5127 static void
5128 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
5129 {
5130         struct rte_eth_fdir_masks *mask =
5131                 &dev->data->dev_conf.fdir_conf.mask;
5132
5133         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
5134         fdir_info->guarant_spc = 0;
5135         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
5136         fdir_info->max_flexpayload = 0;
5137         fdir_info->flow_types_mask[0] = 0;
5138         fdir_info->flex_payload_unit = 0;
5139         fdir_info->max_flex_payload_segment_num = 0;
5140         fdir_info->flex_payload_limit = 0;
5141         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
5142 }
5143
5144 /**
5145  * Deal with flow director operations.
5146  *
5147  * @param dev
5148  *   Pointer to Ethernet device.
5149  * @param filter_op
5150  *   Operation to perform.
5151  * @param arg
5152  *   Pointer to operation-specific structure.
5153  *
5154  * @return
5155  *   0 on success, a negative errno value otherwise and rte_errno is set.
5156  */
5157 static int
5158 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
5159                     void *arg)
5160 {
5161         enum rte_fdir_mode fdir_mode =
5162                 dev->data->dev_conf.fdir_conf.mode;
5163
5164         if (filter_op == RTE_ETH_FILTER_NOP)
5165                 return 0;
5166         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
5167             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
5168                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
5169                         dev->data->port_id, fdir_mode);
5170                 rte_errno = EINVAL;
5171                 return -rte_errno;
5172         }
5173         switch (filter_op) {
5174         case RTE_ETH_FILTER_ADD:
5175                 return flow_fdir_filter_add(dev, arg);
5176         case RTE_ETH_FILTER_UPDATE:
5177                 return flow_fdir_filter_update(dev, arg);
5178         case RTE_ETH_FILTER_DELETE:
5179                 return flow_fdir_filter_delete(dev, arg);
5180         case RTE_ETH_FILTER_FLUSH:
5181                 flow_fdir_filter_flush(dev);
5182                 break;
5183         case RTE_ETH_FILTER_INFO:
5184                 flow_fdir_info_get(dev, arg);
5185                 break;
5186         default:
5187                 DRV_LOG(DEBUG, "port %u unknown operation %u",
5188                         dev->data->port_id, filter_op);
5189                 rte_errno = EINVAL;
5190                 return -rte_errno;
5191         }
5192         return 0;
5193 }
5194
5195 /**
5196  * Manage filter operations.
5197  *
5198  * @param dev
5199  *   Pointer to Ethernet device structure.
5200  * @param filter_type
5201  *   Filter type.
5202  * @param filter_op
5203  *   Operation to perform.
5204  * @param arg
5205  *   Pointer to operation-specific structure.
5206  *
5207  * @return
5208  *   0 on success, a negative errno value otherwise and rte_errno is set.
5209  */
5210 int
5211 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
5212                      enum rte_filter_type filter_type,
5213                      enum rte_filter_op filter_op,
5214                      void *arg)
5215 {
5216         switch (filter_type) {
5217         case RTE_ETH_FILTER_GENERIC:
5218                 if (filter_op != RTE_ETH_FILTER_GET) {
5219                         rte_errno = EINVAL;
5220                         return -rte_errno;
5221                 }
5222                 *(const void **)arg = &mlx5_flow_ops;
5223                 return 0;
5224         case RTE_ETH_FILTER_FDIR:
5225                 return flow_fdir_ctrl_func(dev, filter_op, arg);
5226         default:
5227                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
5228                         dev->data->port_id, filter_type);
5229                 rte_errno = ENOTSUP;
5230                 return -rte_errno;
5231         }
5232         return 0;
5233 }
5234
5235 /**
5236  * Create the needed meter and suffix tables.
5237  *
5238  * @param[in] dev
5239  *   Pointer to Ethernet device.
5240  * @param[in] fm
5241  *   Pointer to the flow meter.
5242  *
5243  * @return
5244  *   Pointer to table set on success, NULL otherwise.
5245  */
5246 struct mlx5_meter_domains_infos *
5247 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
5248                           const struct mlx5_flow_meter *fm)
5249 {
5250         const struct mlx5_flow_driver_ops *fops;
5251
5252         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5253         return fops->create_mtr_tbls(dev, fm);
5254 }
5255
5256 /**
5257  * Destroy the meter table set.
5258  *
5259  * @param[in] dev
5260  *   Pointer to Ethernet device.
5261  * @param[in] tbl
5262  *   Pointer to the meter table set.
5263  *
5264  * @return
5265  *   0 on success.
5266  */
5267 int
5268 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
5269                            struct mlx5_meter_domains_infos *tbls)
5270 {
5271         const struct mlx5_flow_driver_ops *fops;
5272
5273         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5274         return fops->destroy_mtr_tbls(dev, tbls);
5275 }
5276
5277 /**
5278  * Create policer rules.
5279  *
5280  * @param[in] dev
5281  *   Pointer to Ethernet device.
5282  * @param[in] fm
5283  *   Pointer to flow meter structure.
5284  * @param[in] attr
5285  *   Pointer to flow attributes.
5286  *
5287  * @return
5288  *   0 on success, -1 otherwise.
5289  */
5290 int
5291 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
5292                                struct mlx5_flow_meter *fm,
5293                                const struct rte_flow_attr *attr)
5294 {
5295         const struct mlx5_flow_driver_ops *fops;
5296
5297         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5298         return fops->create_policer_rules(dev, fm, attr);
5299 }
5300
5301 /**
5302  * Destroy policer rules.
5303  *
5304  * @param[in] fm
5305  *   Pointer to flow meter structure.
5306  * @param[in] attr
5307  *   Pointer to flow attributes.
5308  *
5309  * @return
5310  *   0 on success, -1 otherwise.
5311  */
5312 int
5313 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
5314                                 struct mlx5_flow_meter *fm,
5315                                 const struct rte_flow_attr *attr)
5316 {
5317         const struct mlx5_flow_driver_ops *fops;
5318
5319         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5320         return fops->destroy_policer_rules(dev, fm, attr);
5321 }
5322
5323 /**
5324  * Allocate a counter.
5325  *
5326  * @param[in] dev
5327  *   Pointer to Ethernet device structure.
5328  *
5329  * @return
5330  *   Pointer to allocated counter  on success, NULL otherwise.
5331  */
5332 struct mlx5_flow_counter *
5333 mlx5_counter_alloc(struct rte_eth_dev *dev)
5334 {
5335         const struct mlx5_flow_driver_ops *fops;
5336         struct rte_flow_attr attr = { .transfer = 0 };
5337
5338         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5339                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5340                 return fops->counter_alloc(dev);
5341         }
5342         DRV_LOG(ERR,
5343                 "port %u counter allocate is not supported.",
5344                  dev->data->port_id);
5345         return NULL;
5346 }
5347
5348 /**
5349  * Free a counter.
5350  *
5351  * @param[in] dev
5352  *   Pointer to Ethernet device structure.
5353  * @param[in] cnt
5354  *   Pointer to counter to be free.
5355  */
5356 void
5357 mlx5_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
5358 {
5359         const struct mlx5_flow_driver_ops *fops;
5360         struct rte_flow_attr attr = { .transfer = 0 };
5361
5362         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5363                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5364                 fops->counter_free(dev, cnt);
5365                 return;
5366         }
5367         DRV_LOG(ERR,
5368                 "port %u counter free is not supported.",
5369                  dev->data->port_id);
5370 }
5371
5372 /**
5373  * Query counter statistics.
5374  *
5375  * @param[in] dev
5376  *   Pointer to Ethernet device structure.
5377  * @param[in] cnt
5378  *   Pointer to counter to query.
5379  * @param[in] clear
5380  *   Set to clear counter statistics.
5381  * @param[out] pkts
5382  *   The counter hits packets number to save.
5383  * @param[out] bytes
5384  *   The counter hits bytes number to save.
5385  *
5386  * @return
5387  *   0 on success, a negative errno value otherwise.
5388  */
5389 int
5390 mlx5_counter_query(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt,
5391                    bool clear, uint64_t *pkts, uint64_t *bytes)
5392 {
5393         const struct mlx5_flow_driver_ops *fops;
5394         struct rte_flow_attr attr = { .transfer = 0 };
5395
5396         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5397                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5398                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
5399         }
5400         DRV_LOG(ERR,
5401                 "port %u counter query is not supported.",
5402                  dev->data->port_id);
5403         return -ENOTSUP;
5404 }
5405
5406 #define MLX5_POOL_QUERY_FREQ_US 1000000
5407
5408 /**
5409  * Set the periodic procedure for triggering asynchronous batch queries for all
5410  * the counter pools.
5411  *
5412  * @param[in] sh
5413  *   Pointer to mlx5_ibv_shared object.
5414  */
5415 void
5416 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
5417 {
5418         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
5419         uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
5420         uint32_t us;
5421
5422         cont = MLX5_CNT_CONTAINER(sh, 1, 0);
5423         pools_n += rte_atomic16_read(&cont->n_valid);
5424         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
5425         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
5426         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
5427                 sh->cmng.query_thread_on = 0;
5428                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
5429         } else {
5430                 sh->cmng.query_thread_on = 1;
5431         }
5432 }
5433
5434 /**
5435  * The periodic procedure for triggering asynchronous batch queries for all the
5436  * counter pools. This function is probably called by the host thread.
5437  *
5438  * @param[in] arg
5439  *   The parameter for the alarm process.
5440  */
5441 void
5442 mlx5_flow_query_alarm(void *arg)
5443 {
5444         struct mlx5_ibv_shared *sh = arg;
5445         struct mlx5_devx_obj *dcs;
5446         uint16_t offset;
5447         int ret;
5448         uint8_t batch = sh->cmng.batch;
5449         uint16_t pool_index = sh->cmng.pool_index;
5450         struct mlx5_pools_container *cont;
5451         struct mlx5_pools_container *mcont;
5452         struct mlx5_flow_counter_pool *pool;
5453
5454         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
5455                 goto set_alarm;
5456 next_container:
5457         cont = MLX5_CNT_CONTAINER(sh, batch, 1);
5458         mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
5459         /* Check if resize was done and need to flip a container. */
5460         if (cont != mcont) {
5461                 if (cont->pools) {
5462                         /* Clean the old container. */
5463                         rte_free(cont->pools);
5464                         memset(cont, 0, sizeof(*cont));
5465                 }
5466                 rte_cio_wmb();
5467                  /* Flip the host container. */
5468                 sh->cmng.mhi[batch] ^= (uint8_t)2;
5469                 cont = mcont;
5470         }
5471         if (!cont->pools) {
5472                 /* 2 empty containers case is unexpected. */
5473                 if (unlikely(batch != sh->cmng.batch))
5474                         goto set_alarm;
5475                 batch ^= 0x1;
5476                 pool_index = 0;
5477                 goto next_container;
5478         }
5479         pool = cont->pools[pool_index];
5480         if (pool->raw_hw)
5481                 /* There is a pool query in progress. */
5482                 goto set_alarm;
5483         pool->raw_hw =
5484                 LIST_FIRST(&sh->cmng.free_stat_raws);
5485         if (!pool->raw_hw)
5486                 /* No free counter statistics raw memory. */
5487                 goto set_alarm;
5488         dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
5489                                                               (&pool->a64_dcs);
5490         offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
5491         ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
5492                                                offset, NULL, NULL,
5493                                                pool->raw_hw->mem_mng->dm->id,
5494                                                (void *)(uintptr_t)
5495                                                (pool->raw_hw->data + offset),
5496                                                sh->devx_comp,
5497                                                (uint64_t)(uintptr_t)pool);
5498         if (ret) {
5499                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
5500                         " %d", pool->min_dcs->id);
5501                 pool->raw_hw = NULL;
5502                 goto set_alarm;
5503         }
5504         pool->raw_hw->min_dcs_id = dcs->id;
5505         LIST_REMOVE(pool->raw_hw, next);
5506         sh->cmng.pending_queries++;
5507         pool_index++;
5508         if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
5509                 batch ^= 0x1;
5510                 pool_index = 0;
5511         }
5512 set_alarm:
5513         sh->cmng.batch = batch;
5514         sh->cmng.pool_index = pool_index;
5515         mlx5_set_query_alarm(sh);
5516 }
5517
5518 /**
5519  * Handler for the HW respond about ready values from an asynchronous batch
5520  * query. This function is probably called by the host thread.
5521  *
5522  * @param[in] sh
5523  *   The pointer to the shared IB device context.
5524  * @param[in] async_id
5525  *   The Devx async ID.
5526  * @param[in] status
5527  *   The status of the completion.
5528  */
5529 void
5530 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
5531                                   uint64_t async_id, int status)
5532 {
5533         struct mlx5_flow_counter_pool *pool =
5534                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
5535         struct mlx5_counter_stats_raw *raw_to_free;
5536
5537         if (unlikely(status)) {
5538                 raw_to_free = pool->raw_hw;
5539         } else {
5540                 raw_to_free = pool->raw;
5541                 rte_spinlock_lock(&pool->sl);
5542                 pool->raw = pool->raw_hw;
5543                 rte_spinlock_unlock(&pool->sl);
5544                 rte_atomic64_add(&pool->query_gen, 1);
5545                 /* Be sure the new raw counters data is updated in memory. */
5546                 rte_cio_wmb();
5547         }
5548         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
5549         pool->raw_hw = NULL;
5550         sh->cmng.pending_queries--;
5551 }
5552
5553 /**
5554  * Translate the rte_flow group index to HW table value.
5555  *
5556  * @param[in] attributes
5557  *   Pointer to flow attributes
5558  * @param[in] external
5559  *   Value is part of flow rule created by request external to PMD.
5560  * @param[in] group
5561  *   rte_flow group index value.
5562  * @param[out] table
5563  *   HW table value.
5564  * @param[out] error
5565  *   Pointer to error structure.
5566  *
5567  * @return
5568  *   0 on success, a negative errno value otherwise and rte_errno is set.
5569  */
5570 int
5571 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
5572                          uint32_t group, uint32_t *table,
5573                          struct rte_flow_error *error)
5574 {
5575         if (attributes->transfer && external) {
5576                 if (group == UINT32_MAX)
5577                         return rte_flow_error_set
5578                                                 (error, EINVAL,
5579                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
5580                                                  NULL,
5581                                                  "group index not supported");
5582                 *table = group + 1;
5583         } else {
5584                 *table = group;
5585         }
5586         return 0;
5587 }
5588
5589 /**
5590  * Discover availability of metadata reg_c's.
5591  *
5592  * Iteratively use test flows to check availability.
5593  *
5594  * @param[in] dev
5595  *   Pointer to the Ethernet device structure.
5596  *
5597  * @return
5598  *   0 on success, a negative errno value otherwise and rte_errno is set.
5599  */
5600 int
5601 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
5602 {
5603         struct mlx5_priv *priv = dev->data->dev_private;
5604         struct mlx5_dev_config *config = &priv->config;
5605         enum modify_reg idx;
5606         int n = 0;
5607
5608         /* reg_c[0] and reg_c[1] are reserved. */
5609         config->flow_mreg_c[n++] = REG_C_0;
5610         config->flow_mreg_c[n++] = REG_C_1;
5611         /* Discover availability of other reg_c's. */
5612         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
5613                 struct rte_flow_attr attr = {
5614                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5615                         .priority = MLX5_FLOW_PRIO_RSVD,
5616                         .ingress = 1,
5617                 };
5618                 struct rte_flow_item items[] = {
5619                         [0] = {
5620                                 .type = RTE_FLOW_ITEM_TYPE_END,
5621                         },
5622                 };
5623                 struct rte_flow_action actions[] = {
5624                         [0] = {
5625                                 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5626                                 .conf = &(struct mlx5_flow_action_copy_mreg){
5627                                         .src = REG_C_1,
5628                                         .dst = idx,
5629                                 },
5630                         },
5631                         [1] = {
5632                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5633                                 .conf = &(struct rte_flow_action_jump){
5634                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5635                                 },
5636                         },
5637                         [2] = {
5638                                 .type = RTE_FLOW_ACTION_TYPE_END,
5639                         },
5640                 };
5641                 struct rte_flow *flow;
5642                 struct rte_flow_error error;
5643
5644                 if (!config->dv_flow_en)
5645                         break;
5646                 /* Create internal flow, validation skips copy action. */
5647                 flow = flow_list_create(dev, NULL, &attr, items,
5648                                         actions, false, &error);
5649                 if (!flow)
5650                         continue;
5651                 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
5652                         config->flow_mreg_c[n++] = idx;
5653                 flow_list_destroy(dev, NULL, flow);
5654         }
5655         for (; n < MLX5_MREG_C_NUM; ++n)
5656                 config->flow_mreg_c[n] = REG_NONE;
5657         return 0;
5658 }