drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11 #include <stdbool.h>
  12
  13 #include <rte_common.h>
  14 #include <rte_ether.h>
  15 #include <rte_ethdev_driver.h>
  16 #include <rte_eal_paging.h>
  17 #include <rte_flow.h>
  18 #include <rte_cycles.h>
  19 #include <rte_flow_driver.h>
  20 #include <rte_malloc.h>
  21 #include <rte_ip.h>
  22
  23 #include <mlx5_glue.h>
  24 #include <mlx5_devx_cmds.h>
  25 #include <mlx5_prm.h>
  26 #include <mlx5_malloc.h>
  27
  28 #include "mlx5_defs.h"
  29 #include "mlx5.h"
  30 #include "mlx5_flow.h"
  31 #include "mlx5_flow_os.h"
  32 #include "mlx5_rxtx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 static struct mlx5_flow_tunnel *
  37 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  38 static void
  39 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  40 static const struct mlx5_flow_tbl_data_entry  *
  41 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark);
  42 static int
  43 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
  44                      const struct rte_flow_tunnel *app_tunnel,
  45                      struct mlx5_flow_tunnel **tunnel);
  46
  47
  48 /** Device flow drivers. */
  49 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  50
  51 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  52
  53 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  54         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  55 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  56         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  57 #endif
  58         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  59         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  60 };
  61
  62 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  63 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  64         (const int []){ \
  65                 __VA_ARGS__, 0, \
  66         }
  67
  68 /** Node object of input graph for mlx5_flow_expand_rss(). */
  69 struct mlx5_flow_expand_node {
  70         const int *const next;
  71         /**<
  72          * List of next node indexes. Index 0 is interpreted as a terminator.
  73          */
  74         const enum rte_flow_item_type type;
  75         /**< Pattern item type of current node. */
  76         uint64_t rss_types;
  77         /**<
  78          * RSS types bit-field associated with this node
  79          * (see ETH_RSS_* definitions).
  80          */
  81 };
  82
  83 /** Object returned by mlx5_flow_expand_rss(). */
  84 struct mlx5_flow_expand_rss {
  85         uint32_t entries;
  86         /**< Number of entries @p patterns and @p priorities. */
  87         struct {
  88                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
  89                 uint32_t priority; /**< Priority offset for each expansion. */
  90         } entry[];
  91 };
  92
  93 static enum rte_flow_item_type
  94 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
  95 {
  96         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
  97         uint16_t ether_type = 0;
  98         uint16_t ether_type_m;
  99         uint8_t ip_next_proto = 0;
 100         uint8_t ip_next_proto_m;
 101
 102         if (item == NULL || item->spec == NULL)
 103                 return ret;
 104         switch (item->type) {
 105         case RTE_FLOW_ITEM_TYPE_ETH:
 106                 if (item->mask)
 107                         ether_type_m = ((const struct rte_flow_item_eth *)
 108                                                 (item->mask))->type;
 109                 else
 110                         ether_type_m = rte_flow_item_eth_mask.type;
 111                 if (ether_type_m != RTE_BE16(0xFFFF))
 112                         break;
 113                 ether_type = ((const struct rte_flow_item_eth *)
 114                                 (item->spec))->type;
 115                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 116                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 117                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 118                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 119                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 120                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 121                 else
 122                         ret = RTE_FLOW_ITEM_TYPE_END;
 123                 break;
 124         case RTE_FLOW_ITEM_TYPE_VLAN:
 125                 if (item->mask)
 126                         ether_type_m = ((const struct rte_flow_item_vlan *)
 127                                                 (item->mask))->inner_type;
 128                 else
 129                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 130                 if (ether_type_m != RTE_BE16(0xFFFF))
 131                         break;
 132                 ether_type = ((const struct rte_flow_item_vlan *)
 133                                 (item->spec))->inner_type;
 134                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 135                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 136                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 137                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 138                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 139                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 140                 else
 141                         ret = RTE_FLOW_ITEM_TYPE_END;
 142                 break;
 143         case RTE_FLOW_ITEM_TYPE_IPV4:
 144                 if (item->mask)
 145                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 146                                         (item->mask))->hdr.next_proto_id;
 147                 else
 148                         ip_next_proto_m =
 149                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 150                 if (ip_next_proto_m != 0xFF)
 151                         break;
 152                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 153                                 (item->spec))->hdr.next_proto_id;
 154                 if (ip_next_proto == IPPROTO_UDP)
 155                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 156                 else if (ip_next_proto == IPPROTO_TCP)
 157                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 158                 else if (ip_next_proto == IPPROTO_IP)
 159                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 160                 else if (ip_next_proto == IPPROTO_IPV6)
 161                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 162                 else
 163                         ret = RTE_FLOW_ITEM_TYPE_END;
 164                 break;
 165         case RTE_FLOW_ITEM_TYPE_IPV6:
 166                 if (item->mask)
 167                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 168                                                 (item->mask))->hdr.proto;
 169                 else
 170                         ip_next_proto_m =
 171                                 rte_flow_item_ipv6_mask.hdr.proto;
 172                 if (ip_next_proto_m != 0xFF)
 173                         break;
 174                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 175                                 (item->spec))->hdr.proto;
 176                 if (ip_next_proto == IPPROTO_UDP)
 177                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 178                 else if (ip_next_proto == IPPROTO_TCP)
 179                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 180                 else if (ip_next_proto == IPPROTO_IP)
 181                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 182                 else if (ip_next_proto == IPPROTO_IPV6)
 183                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 184                 else
 185                         ret = RTE_FLOW_ITEM_TYPE_END;
 186                 break;
 187         default:
 188                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 189                 break;
 190         }
 191         return ret;
 192 }
 193
 194 /**
 195  * Expand RSS flows into several possible flows according to the RSS hash
 196  * fields requested and the driver capabilities.
 197  *
 198  * @param[out] buf
 199  *   Buffer to store the result expansion.
 200  * @param[in] size
 201  *   Buffer size in bytes. If 0, @p buf can be NULL.
 202  * @param[in] pattern
 203  *   User flow pattern.
 204  * @param[in] types
 205  *   RSS types to expand (see ETH_RSS_* definitions).
 206  * @param[in] graph
 207  *   Input graph to expand @p pattern according to @p types.
 208  * @param[in] graph_root_index
 209  *   Index of root node in @p graph, typically 0.
 210  *
 211  * @return
 212  *   A positive value representing the size of @p buf in bytes regardless of
 213  *   @p size on success, a negative errno value otherwise and rte_errno is
 214  *   set, the following errors are defined:
 215  *
 216  *   -E2BIG: graph-depth @p graph is too deep.
 217  */
 218 static int
 219 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 220                      const struct rte_flow_item *pattern, uint64_t types,
 221                      const struct mlx5_flow_expand_node graph[],
 222                      int graph_root_index)
 223 {
 224         const int elt_n = 8;
 225         const struct rte_flow_item *item;
 226         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 227         const int *next_node;
 228         const int *stack[elt_n];
 229         int stack_pos = 0;
 230         struct rte_flow_item flow_items[elt_n];
 231         unsigned int i;
 232         size_t lsize;
 233         size_t user_pattern_size = 0;
 234         void *addr = NULL;
 235         const struct mlx5_flow_expand_node *next = NULL;
 236         struct rte_flow_item missed_item;
 237         int missed = 0;
 238         int elt = 0;
 239         const struct rte_flow_item *last_item = NULL;
 240
 241         memset(&missed_item, 0, sizeof(missed_item));
 242         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 243                 elt_n * sizeof(buf->entry[0]);
 244         if (lsize <= size) {
 245                 buf->entry[0].priority = 0;
 246                 buf->entry[0].pattern = (void *)&buf->entry[elt_n];
 247                 buf->entries = 0;
 248                 addr = buf->entry[0].pattern;
 249         }
 250         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 251                 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
 252                         last_item = item;
 253                 for (i = 0; node->next && node->next[i]; ++i) {
 254                         next = &graph[node->next[i]];
 255                         if (next->type == item->type)
 256                                 break;
 257                 }
 258                 if (next)
 259                         node = next;
 260                 user_pattern_size += sizeof(*item);
 261         }
 262         user_pattern_size += sizeof(*item); /* Handle END item. */
 263         lsize += user_pattern_size;
 264         /* Copy the user pattern in the first entry of the buffer. */
 265         if (lsize <= size) {
 266                 rte_memcpy(addr, pattern, user_pattern_size);
 267                 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 268                 buf->entries = 1;
 269         }
 270         /* Start expanding. */
 271         memset(flow_items, 0, sizeof(flow_items));
 272         user_pattern_size -= sizeof(*item);
 273         /*
 274          * Check if the last valid item has spec set, need complete pattern,
 275          * and the pattern can be used for expansion.
 276          */
 277         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 278         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 279                 /* Item type END indicates expansion is not required. */
 280                 return lsize;
 281         }
 282         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 283                 next = NULL;
 284                 missed = 1;
 285                 for (i = 0; node->next && node->next[i]; ++i) {
 286                         next = &graph[node->next[i]];
 287                         if (next->type == missed_item.type) {
 288                                 flow_items[0].type = missed_item.type;
 289                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 290                                 break;
 291                         }
 292                         next = NULL;
 293                 }
 294         }
 295         if (next && missed) {
 296                 elt = 2; /* missed item + item end. */
 297                 node = next;
 298                 lsize += elt * sizeof(*item) + user_pattern_size;
 299                 if ((node->rss_types & types) && lsize <= size) {
 300                         buf->entry[buf->entries].priority = 1;
 301                         buf->entry[buf->entries].pattern = addr;
 302                         buf->entries++;
 303                         rte_memcpy(addr, buf->entry[0].pattern,
 304                                    user_pattern_size);
 305                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 306                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 307                         addr = (void *)(((uintptr_t)addr) +
 308                                         elt * sizeof(*item));
 309                 }
 310         }
 311         memset(flow_items, 0, sizeof(flow_items));
 312         next_node = node->next;
 313         stack[stack_pos] = next_node;
 314         node = next_node ? &graph[*next_node] : NULL;
 315         while (node) {
 316                 flow_items[stack_pos].type = node->type;
 317                 if (node->rss_types & types) {
 318                         /*
 319                          * compute the number of items to copy from the
 320                          * expansion and copy it.
 321                          * When the stack_pos is 0, there are 1 element in it,
 322                          * plus the addition END item.
 323                          */
 324                         elt = stack_pos + 2;
 325                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 326                         lsize += elt * sizeof(*item) + user_pattern_size;
 327                         if (lsize <= size) {
 328                                 size_t n = elt * sizeof(*item);
 329
 330                                 buf->entry[buf->entries].priority =
 331                                         stack_pos + 1 + missed;
 332                                 buf->entry[buf->entries].pattern = addr;
 333                                 buf->entries++;
 334                                 rte_memcpy(addr, buf->entry[0].pattern,
 335                                            user_pattern_size);
 336                                 addr = (void *)(((uintptr_t)addr) +
 337                                                 user_pattern_size);
 338                                 rte_memcpy(addr, &missed_item,
 339                                            missed * sizeof(*item));
 340                                 addr = (void *)(((uintptr_t)addr) +
 341                                         missed * sizeof(*item));
 342                                 rte_memcpy(addr, flow_items, n);
 343                                 addr = (void *)(((uintptr_t)addr) + n);
 344                         }
 345                 }
 346                 /* Go deeper. */
 347                 if (node->next) {
 348                         next_node = node->next;
 349                         if (stack_pos++ == elt_n) {
 350                                 rte_errno = E2BIG;
 351                                 return -rte_errno;
 352                         }
 353                         stack[stack_pos] = next_node;
 354                 } else if (*(next_node + 1)) {
 355                         /* Follow up with the next possibility. */
 356                         ++next_node;
 357                 } else {
 358                         /* Move to the next path. */
 359                         if (stack_pos)
 360                                 next_node = stack[--stack_pos];
 361                         next_node++;
 362                         stack[stack_pos] = next_node;
 363                 }
 364                 node = *next_node ? &graph[*next_node] : NULL;
 365         };
 366         /* no expanded flows but we have missed item, create one rule for it */
 367         if (buf->entries == 1 && missed != 0) {
 368                 elt = 2;
 369                 lsize += elt * sizeof(*item) + user_pattern_size;
 370                 if (lsize <= size) {
 371                         buf->entry[buf->entries].priority = 1;
 372                         buf->entry[buf->entries].pattern = addr;
 373                         buf->entries++;
 374                         flow_items[0].type = missed_item.type;
 375                         flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 376                         rte_memcpy(addr, buf->entry[0].pattern,
 377                                    user_pattern_size);
 378                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 379                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 380                         addr = (void *)(((uintptr_t)addr) +
 381                                         elt * sizeof(*item));
 382                 }
 383         }
 384         return lsize;
 385 }
 386
 387 enum mlx5_expansion {
 388         MLX5_EXPANSION_ROOT,
 389         MLX5_EXPANSION_ROOT_OUTER,
 390         MLX5_EXPANSION_ROOT_ETH_VLAN,
 391         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 392         MLX5_EXPANSION_OUTER_ETH,
 393         MLX5_EXPANSION_OUTER_ETH_VLAN,
 394         MLX5_EXPANSION_OUTER_VLAN,
 395         MLX5_EXPANSION_OUTER_IPV4,
 396         MLX5_EXPANSION_OUTER_IPV4_UDP,
 397         MLX5_EXPANSION_OUTER_IPV4_TCP,
 398         MLX5_EXPANSION_OUTER_IPV6,
 399         MLX5_EXPANSION_OUTER_IPV6_UDP,
 400         MLX5_EXPANSION_OUTER_IPV6_TCP,
 401         MLX5_EXPANSION_VXLAN,
 402         MLX5_EXPANSION_VXLAN_GPE,
 403         MLX5_EXPANSION_GRE,
 404         MLX5_EXPANSION_MPLS,
 405         MLX5_EXPANSION_ETH,
 406         MLX5_EXPANSION_ETH_VLAN,
 407         MLX5_EXPANSION_VLAN,
 408         MLX5_EXPANSION_IPV4,
 409         MLX5_EXPANSION_IPV4_UDP,
 410         MLX5_EXPANSION_IPV4_TCP,
 411         MLX5_EXPANSION_IPV6,
 412         MLX5_EXPANSION_IPV6_UDP,
 413         MLX5_EXPANSION_IPV6_TCP,
 414 };
 415
 416 /** Supported expansion of items. */
 417 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 418         [MLX5_EXPANSION_ROOT] = {
 419                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 420                                                   MLX5_EXPANSION_IPV4,
 421                                                   MLX5_EXPANSION_IPV6),
 422                 .type = RTE_FLOW_ITEM_TYPE_END,
 423         },
 424         [MLX5_EXPANSION_ROOT_OUTER] = {
 425                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 426                                                   MLX5_EXPANSION_OUTER_IPV4,
 427                                                   MLX5_EXPANSION_OUTER_IPV6),
 428                 .type = RTE_FLOW_ITEM_TYPE_END,
 429         },
 430         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 431                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 432                 .type = RTE_FLOW_ITEM_TYPE_END,
 433         },
 434         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 435                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 436                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 437                 .type = RTE_FLOW_ITEM_TYPE_END,
 438         },
 439         [MLX5_EXPANSION_OUTER_ETH] = {
 440                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 441                                                   MLX5_EXPANSION_OUTER_IPV6,
 442                                                   MLX5_EXPANSION_MPLS),
 443                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 444                 .rss_types = 0,
 445         },
 446         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 447                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 448                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 449                 .rss_types = 0,
 450         },
 451         [MLX5_EXPANSION_OUTER_VLAN] = {
 452                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 453                                                   MLX5_EXPANSION_OUTER_IPV6),
 454                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 455         },
 456         [MLX5_EXPANSION_OUTER_IPV4] = {
 457                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 458                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 459                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 460                          MLX5_EXPANSION_GRE,
 461                          MLX5_EXPANSION_IPV4,
 462                          MLX5_EXPANSION_IPV6),
 463                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 464                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 465                         ETH_RSS_NONFRAG_IPV4_OTHER,
 466         },
 467         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 468                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 469                                                   MLX5_EXPANSION_VXLAN_GPE),
 470                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 471                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 472         },
 473         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 474                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 475                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 476         },
 477         [MLX5_EXPANSION_OUTER_IPV6] = {
 478                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 479                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 480                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 481                          MLX5_EXPANSION_IPV4,
 482                          MLX5_EXPANSION_IPV6),
 483                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 484                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 485                         ETH_RSS_NONFRAG_IPV6_OTHER,
 486         },
 487         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 488                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 489                                                   MLX5_EXPANSION_VXLAN_GPE),
 490                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 491                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 492         },
 493         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 494                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 495                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 496         },
 497         [MLX5_EXPANSION_VXLAN] = {
 498                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 499                                                   MLX5_EXPANSION_IPV4,
 500                                                   MLX5_EXPANSION_IPV6),
 501                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 502         },
 503         [MLX5_EXPANSION_VXLAN_GPE] = {
 504                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 505                                                   MLX5_EXPANSION_IPV4,
 506                                                   MLX5_EXPANSION_IPV6),
 507                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 508         },
 509         [MLX5_EXPANSION_GRE] = {
 510                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 511                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 512         },
 513         [MLX5_EXPANSION_MPLS] = {
 514                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 515                                                   MLX5_EXPANSION_IPV6),
 516                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 517         },
 518         [MLX5_EXPANSION_ETH] = {
 519                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 520                                                   MLX5_EXPANSION_IPV6),
 521                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 522         },
 523         [MLX5_EXPANSION_ETH_VLAN] = {
 524                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 525                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 526         },
 527         [MLX5_EXPANSION_VLAN] = {
 528                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 529                                                   MLX5_EXPANSION_IPV6),
 530                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 531         },
 532         [MLX5_EXPANSION_IPV4] = {
 533                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 534                                                   MLX5_EXPANSION_IPV4_TCP),
 535                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 536                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 537                         ETH_RSS_NONFRAG_IPV4_OTHER,
 538         },
 539         [MLX5_EXPANSION_IPV4_UDP] = {
 540                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 541                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 542         },
 543         [MLX5_EXPANSION_IPV4_TCP] = {
 544                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 545                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 546         },
 547         [MLX5_EXPANSION_IPV6] = {
 548                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 549                                                   MLX5_EXPANSION_IPV6_TCP),
 550                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 551                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 552                         ETH_RSS_NONFRAG_IPV6_OTHER,
 553         },
 554         [MLX5_EXPANSION_IPV6_UDP] = {
 555                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 556                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 557         },
 558         [MLX5_EXPANSION_IPV6_TCP] = {
 559                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 560                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 561         },
 562 };
 563
 564 static struct rte_flow_shared_action *
 565 mlx5_shared_action_create(struct rte_eth_dev *dev,
 566                           const struct rte_flow_shared_action_conf *conf,
 567                           const struct rte_flow_action *action,
 568                           struct rte_flow_error *error);
 569 static int mlx5_shared_action_destroy
 570                                 (struct rte_eth_dev *dev,
 571                                  struct rte_flow_shared_action *shared_action,
 572                                  struct rte_flow_error *error);
 573 static int mlx5_shared_action_update
 574                                 (struct rte_eth_dev *dev,
 575                                  struct rte_flow_shared_action *shared_action,
 576                                  const struct rte_flow_action *action,
 577                                  struct rte_flow_error *error);
 578 static int mlx5_shared_action_query
 579                                 (struct rte_eth_dev *dev,
 580                                  const struct rte_flow_shared_action *action,
 581                                  void *data,
 582                                  struct rte_flow_error *error);
 583 static inline bool
 584 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
 585                           struct rte_flow_tunnel *tunnel,
 586                           const char *err_msg)
 587 {
 588         err_msg = NULL;
 589         if (!is_tunnel_offload_active(dev)) {
 590                 err_msg = "tunnel offload was not activated";
 591                 goto out;
 592         } else if (!tunnel) {
 593                 err_msg = "no application tunnel";
 594                 goto out;
 595         }
 596
 597         switch (tunnel->type) {
 598         default:
 599                 err_msg = "unsupported tunnel type";
 600                 goto out;
 601         case RTE_FLOW_ITEM_TYPE_VXLAN:
 602                 break;
 603         }
 604
 605 out:
 606         return !err_msg;
 607 }
 608
 609
 610 static int
 611 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 612                     struct rte_flow_tunnel *app_tunnel,
 613                     struct rte_flow_action **actions,
 614                     uint32_t *num_of_actions,
 615                     struct rte_flow_error *error)
 616 {
 617         int ret;
 618         struct mlx5_flow_tunnel *tunnel;
 619         const char *err_msg = NULL;
 620         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
 621
 622         if (!verdict)
 623                 return rte_flow_error_set(error, EINVAL,
 624                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
 625                                           err_msg);
 626         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
 627         if (ret < 0) {
 628                 return rte_flow_error_set(error, ret,
 629                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
 630                                           "failed to initialize pmd tunnel");
 631         }
 632         *actions = &tunnel->action;
 633         *num_of_actions = 1;
 634         return 0;
 635 }
 636
 637 static int
 638 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 639                        struct rte_flow_tunnel *app_tunnel,
 640                        struct rte_flow_item **items,
 641                        uint32_t *num_of_items,
 642                        struct rte_flow_error *error)
 643 {
 644         int ret;
 645         struct mlx5_flow_tunnel *tunnel;
 646         const char *err_msg = NULL;
 647         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
 648
 649         if (!verdict)
 650                 return rte_flow_error_set(error, EINVAL,
 651                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 652                                           err_msg);
 653         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
 654         if (ret < 0) {
 655                 return rte_flow_error_set(error, ret,
 656                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 657                                           "failed to initialize pmd tunnel");
 658         }
 659         *items = &tunnel->item;
 660         *num_of_items = 1;
 661         return 0;
 662 }
 663
 664 static int
 665 mlx5_flow_item_release(struct rte_eth_dev *dev,
 666                        struct rte_flow_item *pmd_items,
 667                        uint32_t num_items, struct rte_flow_error *err)
 668 {
 669         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
 670         struct mlx5_flow_tunnel *tun;
 671
 672         LIST_FOREACH(tun, &thub->tunnels, chain) {
 673                 if (&tun->item == pmd_items)
 674                         break;
 675         }
 676         if (!tun || num_items != 1)
 677                 return rte_flow_error_set(err, EINVAL,
 678                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 679                                           "invalid argument");
 680         if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED))
 681                 mlx5_flow_tunnel_free(dev, tun);
 682         return 0;
 683 }
 684
 685 static int
 686 mlx5_flow_action_release(struct rte_eth_dev *dev,
 687                          struct rte_flow_action *pmd_actions,
 688                          uint32_t num_actions, struct rte_flow_error *err)
 689 {
 690         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
 691         struct mlx5_flow_tunnel *tun;
 692
 693         LIST_FOREACH(tun, &thub->tunnels, chain) {
 694                 if (&tun->action == pmd_actions)
 695                         break;
 696         }
 697         if (!tun || num_actions != 1)
 698                 return rte_flow_error_set(err, EINVAL,
 699                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 700                                           "invalid argument");
 701         if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED))
 702                 mlx5_flow_tunnel_free(dev, tun);
 703
 704         return 0;
 705 }
 706
 707 static int
 708 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 709                                   struct rte_mbuf *m,
 710                                   struct rte_flow_restore_info *info,
 711                                   struct rte_flow_error *err)
 712 {
 713         uint64_t ol_flags = m->ol_flags;
 714         const struct mlx5_flow_tbl_data_entry *tble;
 715         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
 716
 717         if ((ol_flags & mask) != mask)
 718                 goto err;
 719         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
 720         if (!tble) {
 721                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
 722                         dev->data->port_id, m->hash.fdir.hi);
 723                 goto err;
 724         }
 725         MLX5_ASSERT(tble->tunnel);
 726         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
 727         info->group_id = tble->group_id;
 728         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
 729                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
 730                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
 731
 732         return 0;
 733
 734 err:
 735         return rte_flow_error_set(err, EINVAL,
 736                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
 737                                   "failed to get restore info");
 738 }
 739
 740 static const struct rte_flow_ops mlx5_flow_ops = {
 741         .validate = mlx5_flow_validate,
 742         .create = mlx5_flow_create,
 743         .destroy = mlx5_flow_destroy,
 744         .flush = mlx5_flow_flush,
 745         .isolate = mlx5_flow_isolate,
 746         .query = mlx5_flow_query,
 747         .dev_dump = mlx5_flow_dev_dump,
 748         .get_aged_flows = mlx5_flow_get_aged_flows,
 749         .shared_action_create = mlx5_shared_action_create,
 750         .shared_action_destroy = mlx5_shared_action_destroy,
 751         .shared_action_update = mlx5_shared_action_update,
 752         .shared_action_query = mlx5_shared_action_query,
 753         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 754         .tunnel_match = mlx5_flow_tunnel_match,
 755         .tunnel_action_decap_release = mlx5_flow_action_release,
 756         .tunnel_item_release = mlx5_flow_item_release,
 757         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 758 };
 759
 760 /* Convert FDIR request to Generic flow. */
 761 struct mlx5_fdir {
 762         struct rte_flow_attr attr;
 763         struct rte_flow_item items[4];
 764         struct rte_flow_item_eth l2;
 765         struct rte_flow_item_eth l2_mask;
 766         union {
 767                 struct rte_flow_item_ipv4 ipv4;
 768                 struct rte_flow_item_ipv6 ipv6;
 769         } l3;
 770         union {
 771                 struct rte_flow_item_ipv4 ipv4;
 772                 struct rte_flow_item_ipv6 ipv6;
 773         } l3_mask;
 774         union {
 775                 struct rte_flow_item_udp udp;
 776                 struct rte_flow_item_tcp tcp;
 777         } l4;
 778         union {
 779                 struct rte_flow_item_udp udp;
 780                 struct rte_flow_item_tcp tcp;
 781         } l4_mask;
 782         struct rte_flow_action actions[2];
 783         struct rte_flow_action_queue queue;
 784 };
 785
 786 /* Tunnel information. */
 787 struct mlx5_flow_tunnel_info {
 788         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 789         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 790 };
 791
 792 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 793         {
 794                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 795                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 796         },
 797         {
 798                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 799                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 800         },
 801         {
 802                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 803                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 804         },
 805         {
 806                 .tunnel = MLX5_FLOW_LAYER_GRE,
 807                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 808         },
 809         {
 810                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 811                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 812         },
 813         {
 814                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 815                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 816         },
 817         {
 818                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 819                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 820         },
 821         {
 822                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 823                 .ptype = RTE_PTYPE_TUNNEL_IP,
 824         },
 825         {
 826                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 827                 .ptype = RTE_PTYPE_TUNNEL_IP,
 828         },
 829         {
 830                 .tunnel = MLX5_FLOW_LAYER_GTP,
 831                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 832         },
 833 };
 834
 835 /* Key of thread specific flow workspace data. */
 836 static pthread_key_t key_workspace;
 837
 838 /* Thread specific flow workspace data once initialization data. */
 839 static pthread_once_t key_workspace_init;
 840
 841
 842 /**
 843  * Translate tag ID to register.
 844  *
 845  * @param[in] dev
 846  *   Pointer to the Ethernet device structure.
 847  * @param[in] feature
 848  *   The feature that request the register.
 849  * @param[in] id
 850  *   The request register ID.
 851  * @param[out] error
 852  *   Error description in case of any.
 853  *
 854  * @return
 855  *   The request register on success, a negative errno
 856  *   value otherwise and rte_errno is set.
 857  */
 858 int
 859 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 860                      enum mlx5_feature_name feature,
 861                      uint32_t id,
 862                      struct rte_flow_error *error)
 863 {
 864         struct mlx5_priv *priv = dev->data->dev_private;
 865         struct mlx5_dev_config *config = &priv->config;
 866         enum modify_reg start_reg;
 867         bool skip_mtr_reg = false;
 868
 869         switch (feature) {
 870         case MLX5_HAIRPIN_RX:
 871                 return REG_B;
 872         case MLX5_HAIRPIN_TX:
 873                 return REG_A;
 874         case MLX5_METADATA_RX:
 875                 switch (config->dv_xmeta_en) {
 876                 case MLX5_XMETA_MODE_LEGACY:
 877                         return REG_B;
 878                 case MLX5_XMETA_MODE_META16:
 879                         return REG_C_0;
 880                 case MLX5_XMETA_MODE_META32:
 881                         return REG_C_1;
 882                 }
 883                 break;
 884         case MLX5_METADATA_TX:
 885                 return REG_A;
 886         case MLX5_METADATA_FDB:
 887                 switch (config->dv_xmeta_en) {
 888                 case MLX5_XMETA_MODE_LEGACY:
 889                         return REG_NON;
 890                 case MLX5_XMETA_MODE_META16:
 891                         return REG_C_0;
 892                 case MLX5_XMETA_MODE_META32:
 893                         return REG_C_1;
 894                 }
 895                 break;
 896         case MLX5_FLOW_MARK:
 897                 switch (config->dv_xmeta_en) {
 898                 case MLX5_XMETA_MODE_LEGACY:
 899                         return REG_NON;
 900                 case MLX5_XMETA_MODE_META16:
 901                         return REG_C_1;
 902                 case MLX5_XMETA_MODE_META32:
 903                         return REG_C_0;
 904                 }
 905                 break;
 906         case MLX5_MTR_SFX:
 907                 /*
 908                  * If meter color and flow match share one register, flow match
 909                  * should use the meter color register for match.
 910                  */
 911                 if (priv->mtr_reg_share)
 912                         return priv->mtr_color_reg;
 913                 else
 914                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 915                                REG_C_3;
 916         case MLX5_MTR_COLOR:
 917                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 918                 return priv->mtr_color_reg;
 919         case MLX5_COPY_MARK:
 920                 /*
 921                  * Metadata COPY_MARK register using is in meter suffix sub
 922                  * flow while with meter. It's safe to share the same register.
 923                  */
 924                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 925         case MLX5_APP_TAG:
 926                 /*
 927                  * If meter is enable, it will engage the register for color
 928                  * match and flow match. If meter color match is not using the
 929                  * REG_C_2, need to skip the REG_C_x be used by meter color
 930                  * match.
 931                  * If meter is disable, free to use all available registers.
 932                  */
 933                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 934                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 935                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 936                 if (id > (REG_C_7 - start_reg))
 937                         return rte_flow_error_set(error, EINVAL,
 938                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 939                                                   NULL, "invalid tag id");
 940                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 941                         return rte_flow_error_set(error, ENOTSUP,
 942                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 943                                                   NULL, "unsupported tag id");
 944                 /*
 945                  * This case means meter is using the REG_C_x great than 2.
 946                  * Take care not to conflict with meter color REG_C_x.
 947                  * If the available index REG_C_y >= REG_C_x, skip the
 948                  * color register.
 949                  */
 950                 if (skip_mtr_reg && config->flow_mreg_c
 951                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 952                         if (id >= (REG_C_7 - start_reg))
 953                                 return rte_flow_error_set(error, EINVAL,
 954                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 955                                                         NULL, "invalid tag id");
 956                         if (config->flow_mreg_c
 957                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 958                                 return config->flow_mreg_c
 959                                                [id + 1 + start_reg - REG_C_0];
 960                         return rte_flow_error_set(error, ENOTSUP,
 961                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 962                                                   NULL, "unsupported tag id");
 963                 }
 964                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 965         }
 966         MLX5_ASSERT(false);
 967         return rte_flow_error_set(error, EINVAL,
 968                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 969                                   NULL, "invalid feature name");
 970 }
 971
 972 /**
 973  * Check extensive flow metadata register support.
 974  *
 975  * @param dev
 976  *   Pointer to rte_eth_dev structure.
 977  *
 978  * @return
 979  *   True if device supports extensive flow metadata register, otherwise false.
 980  */
 981 bool
 982 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 983 {
 984         struct mlx5_priv *priv = dev->data->dev_private;
 985         struct mlx5_dev_config *config = &priv->config;
 986
 987         /*
 988          * Having available reg_c can be regarded inclusively as supporting
 989          * extensive flow metadata register, which could mean,
 990          * - metadata register copy action by modify header.
 991          * - 16 modify header actions is supported.
 992          * - reg_c's are preserved across different domain (FDB and NIC) on
 993          *   packet loopback by flow lookup miss.
 994          */
 995         return config->flow_mreg_c[2] != REG_NON;
 996 }
 997
 998 /**
 999  * Verify the @p item specifications (spec, last, mask) are compatible with the
1000  * NIC capabilities.
1001  *
1002  * @param[in] item
1003  *   Item specification.
1004  * @param[in] mask
1005  *   @p item->mask or flow default bit-masks.
1006  * @param[in] nic_mask
1007  *   Bit-masks covering supported fields by the NIC to compare with user mask.
1008  * @param[in] size
1009  *   Bit-masks size in bytes.
1010  * @param[in] range_accepted
1011  *   True if range of values is accepted for specific fields, false otherwise.
1012  * @param[out] error
1013  *   Pointer to error structure.
1014  *
1015  * @return
1016  *   0 on success, a negative errno value otherwise and rte_errno is set.
1017  */
1018 int
1019 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1020                           const uint8_t *mask,
1021                           const uint8_t *nic_mask,
1022                           unsigned int size,
1023                           bool range_accepted,
1024                           struct rte_flow_error *error)
1025 {
1026         unsigned int i;
1027
1028         MLX5_ASSERT(nic_mask);
1029         for (i = 0; i < size; ++i)
1030                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1031                         return rte_flow_error_set(error, ENOTSUP,
1032                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1033                                                   item,
1034                                                   "mask enables non supported"
1035                                                   " bits");
1036         if (!item->spec && (item->mask || item->last))
1037                 return rte_flow_error_set(error, EINVAL,
1038                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1039                                           "mask/last without a spec is not"
1040                                           " supported");
1041         if (item->spec && item->last && !range_accepted) {
1042                 uint8_t spec[size];
1043                 uint8_t last[size];
1044                 unsigned int i;
1045                 int ret;
1046
1047                 for (i = 0; i < size; ++i) {
1048                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1049                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1050                 }
1051                 ret = memcmp(spec, last, size);
1052                 if (ret != 0)
1053                         return rte_flow_error_set(error, EINVAL,
1054                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1055                                                   item,
1056                                                   "range is not valid");
1057         }
1058         return 0;
1059 }
1060
1061 /**
1062  * Adjust the hash fields according to the @p flow information.
1063  *
1064  * @param[in] dev_flow.
1065  *   Pointer to the mlx5_flow.
1066  * @param[in] tunnel
1067  *   1 when the hash field is for a tunnel item.
1068  * @param[in] layer_types
1069  *   ETH_RSS_* types.
1070  * @param[in] hash_fields
1071  *   Item hash fields.
1072  *
1073  * @return
1074  *   The hash fields that should be used.
1075  */
1076 uint64_t
1077 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1078                             int tunnel __rte_unused, uint64_t layer_types,
1079                             uint64_t hash_fields)
1080 {
1081 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1082         int rss_request_inner = rss_desc->level >= 2;
1083
1084         /* Check RSS hash level for tunnel. */
1085         if (tunnel && rss_request_inner)
1086                 hash_fields |= IBV_RX_HASH_INNER;
1087         else if (tunnel || rss_request_inner)
1088                 return 0;
1089 #endif
1090         /* Check if requested layer matches RSS hash fields. */
1091         if (!(rss_desc->types & layer_types))
1092                 return 0;
1093         return hash_fields;
1094 }
1095
1096 /**
1097  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1098  * if several tunnel rules are used on this queue, the tunnel ptype will be
1099  * cleared.
1100  *
1101  * @param rxq_ctrl
1102  *   Rx queue to update.
1103  */
1104 static void
1105 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1106 {
1107         unsigned int i;
1108         uint32_t tunnel_ptype = 0;
1109
1110         /* Look up for the ptype to use. */
1111         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1112                 if (!rxq_ctrl->flow_tunnels_n[i])
1113                         continue;
1114                 if (!tunnel_ptype) {
1115                         tunnel_ptype = tunnels_info[i].ptype;
1116                 } else {
1117                         tunnel_ptype = 0;
1118                         break;
1119                 }
1120         }
1121         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1122 }
1123
1124 /**
1125  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1126  * flow.
1127  *
1128  * @param[in] dev
1129  *   Pointer to the Ethernet device structure.
1130  * @param[in] dev_handle
1131  *   Pointer to device flow handle structure.
1132  */
1133 static void
1134 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1135                        struct mlx5_flow_handle *dev_handle)
1136 {
1137         struct mlx5_priv *priv = dev->data->dev_private;
1138         const int mark = dev_handle->mark;
1139         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1140         struct mlx5_hrxq *hrxq;
1141         unsigned int i;
1142
1143         if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
1144                 return;
1145         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1146                               dev_handle->rix_hrxq);
1147         if (!hrxq)
1148                 return;
1149         for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
1150                 int idx = hrxq->ind_table->queues[i];
1151                 struct mlx5_rxq_ctrl *rxq_ctrl =
1152                         container_of((*priv->rxqs)[idx],
1153                                      struct mlx5_rxq_ctrl, rxq);
1154
1155                 /*
1156                  * To support metadata register copy on Tx loopback,
1157                  * this must be always enabled (metadata may arive
1158                  * from other port - not from local flows only.
1159                  */
1160                 if (priv->config.dv_flow_en &&
1161                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1162                     mlx5_flow_ext_mreg_supported(dev)) {
1163                         rxq_ctrl->rxq.mark = 1;
1164                         rxq_ctrl->flow_mark_n = 1;
1165                 } else if (mark) {
1166                         rxq_ctrl->rxq.mark = 1;
1167                         rxq_ctrl->flow_mark_n++;
1168                 }
1169                 if (tunnel) {
1170                         unsigned int j;
1171
1172                         /* Increase the counter matching the flow. */
1173                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1174                                 if ((tunnels_info[j].tunnel &
1175                                      dev_handle->layers) ==
1176                                     tunnels_info[j].tunnel) {
1177                                         rxq_ctrl->flow_tunnels_n[j]++;
1178                                         break;
1179                                 }
1180                         }
1181                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1182                 }
1183         }
1184 }
1185
1186 /**
1187  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1188  *
1189  * @param[in] dev
1190  *   Pointer to the Ethernet device structure.
1191  * @param[in] flow
1192  *   Pointer to flow structure.
1193  */
1194 static void
1195 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1196 {
1197         struct mlx5_priv *priv = dev->data->dev_private;
1198         uint32_t handle_idx;
1199         struct mlx5_flow_handle *dev_handle;
1200
1201         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1202                        handle_idx, dev_handle, next)
1203                 flow_drv_rxq_flags_set(dev, dev_handle);
1204 }
1205
1206 /**
1207  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1208  * device flow if no other flow uses it with the same kind of request.
1209  *
1210  * @param dev
1211  *   Pointer to Ethernet device.
1212  * @param[in] dev_handle
1213  *   Pointer to the device flow handle structure.
1214  */
1215 static void
1216 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1217                         struct mlx5_flow_handle *dev_handle)
1218 {
1219         struct mlx5_priv *priv = dev->data->dev_private;
1220         const int mark = dev_handle->mark;
1221         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1222         struct mlx5_hrxq *hrxq;
1223         unsigned int i;
1224
1225         if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
1226                 return;
1227         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1228                               dev_handle->rix_hrxq);
1229         if (!hrxq)
1230                 return;
1231         MLX5_ASSERT(dev->data->dev_started);
1232         for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
1233                 int idx = hrxq->ind_table->queues[i];
1234                 struct mlx5_rxq_ctrl *rxq_ctrl =
1235                         container_of((*priv->rxqs)[idx],
1236                                      struct mlx5_rxq_ctrl, rxq);
1237
1238                 if (priv->config.dv_flow_en &&
1239                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1240                     mlx5_flow_ext_mreg_supported(dev)) {
1241                         rxq_ctrl->rxq.mark = 1;
1242                         rxq_ctrl->flow_mark_n = 1;
1243                 } else if (mark) {
1244                         rxq_ctrl->flow_mark_n--;
1245                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1246                 }
1247                 if (tunnel) {
1248                         unsigned int j;
1249
1250                         /* Decrease the counter matching the flow. */
1251                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1252                                 if ((tunnels_info[j].tunnel &
1253                                      dev_handle->layers) ==
1254                                     tunnels_info[j].tunnel) {
1255                                         rxq_ctrl->flow_tunnels_n[j]--;
1256                                         break;
1257                                 }
1258                         }
1259                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1260                 }
1261         }
1262 }
1263
1264 /**
1265  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1266  * @p flow if no other flow uses it with the same kind of request.
1267  *
1268  * @param dev
1269  *   Pointer to Ethernet device.
1270  * @param[in] flow
1271  *   Pointer to the flow.
1272  */
1273 static void
1274 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1275 {
1276         struct mlx5_priv *priv = dev->data->dev_private;
1277         uint32_t handle_idx;
1278         struct mlx5_flow_handle *dev_handle;
1279
1280         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1281                        handle_idx, dev_handle, next)
1282                 flow_drv_rxq_flags_trim(dev, dev_handle);
1283 }
1284
1285 /**
1286  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1287  *
1288  * @param dev
1289  *   Pointer to Ethernet device.
1290  */
1291 static void
1292 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1293 {
1294         struct mlx5_priv *priv = dev->data->dev_private;
1295         unsigned int i;
1296
1297         for (i = 0; i != priv->rxqs_n; ++i) {
1298                 struct mlx5_rxq_ctrl *rxq_ctrl;
1299                 unsigned int j;
1300
1301                 if (!(*priv->rxqs)[i])
1302                         continue;
1303                 rxq_ctrl = container_of((*priv->rxqs)[i],
1304                                         struct mlx5_rxq_ctrl, rxq);
1305                 rxq_ctrl->flow_mark_n = 0;
1306                 rxq_ctrl->rxq.mark = 0;
1307                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1308                         rxq_ctrl->flow_tunnels_n[j] = 0;
1309                 rxq_ctrl->rxq.tunnel = 0;
1310         }
1311 }
1312
1313 /**
1314  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1315  *
1316  * @param[in] dev
1317  *   Pointer to the Ethernet device structure.
1318  */
1319 void
1320 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1321 {
1322         struct mlx5_priv *priv = dev->data->dev_private;
1323         struct mlx5_rxq_data *data;
1324         unsigned int i;
1325
1326         for (i = 0; i != priv->rxqs_n; ++i) {
1327                 if (!(*priv->rxqs)[i])
1328                         continue;
1329                 data = (*priv->rxqs)[i];
1330                 if (!rte_flow_dynf_metadata_avail()) {
1331                         data->dynf_meta = 0;
1332                         data->flow_meta_mask = 0;
1333                         data->flow_meta_offset = -1;
1334                 } else {
1335                         data->dynf_meta = 1;
1336                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1337                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1338                 }
1339         }
1340 }
1341
1342 /*
1343  * return a pointer to the desired action in the list of actions.
1344  *
1345  * @param[in] actions
1346  *   The list of actions to search the action in.
1347  * @param[in] action
1348  *   The action to find.
1349  *
1350  * @return
1351  *   Pointer to the action in the list, if found. NULL otherwise.
1352  */
1353 const struct rte_flow_action *
1354 mlx5_flow_find_action(const struct rte_flow_action *actions,
1355                       enum rte_flow_action_type action)
1356 {
1357         if (actions == NULL)
1358                 return NULL;
1359         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1360                 if (actions->type == action)
1361                         return actions;
1362         return NULL;
1363 }
1364
1365 /*
1366  * Validate the flag action.
1367  *
1368  * @param[in] action_flags
1369  *   Bit-fields that holds the actions detected until now.
1370  * @param[in] attr
1371  *   Attributes of flow that includes this action.
1372  * @param[out] error
1373  *   Pointer to error structure.
1374  *
1375  * @return
1376  *   0 on success, a negative errno value otherwise and rte_errno is set.
1377  */
1378 int
1379 mlx5_flow_validate_action_flag(uint64_t action_flags,
1380                                const struct rte_flow_attr *attr,
1381                                struct rte_flow_error *error)
1382 {
1383         if (action_flags & MLX5_FLOW_ACTION_MARK)
1384                 return rte_flow_error_set(error, EINVAL,
1385                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1386                                           "can't mark and flag in same flow");
1387         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1388                 return rte_flow_error_set(error, EINVAL,
1389                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1390                                           "can't have 2 flag"
1391                                           " actions in same flow");
1392         if (attr->egress)
1393                 return rte_flow_error_set(error, ENOTSUP,
1394                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1395                                           "flag action not supported for "
1396                                           "egress");
1397         return 0;
1398 }
1399
1400 /*
1401  * Validate the mark action.
1402  *
1403  * @param[in] action
1404  *   Pointer to the queue action.
1405  * @param[in] action_flags
1406  *   Bit-fields that holds the actions detected until now.
1407  * @param[in] attr
1408  *   Attributes of flow that includes this action.
1409  * @param[out] error
1410  *   Pointer to error structure.
1411  *
1412  * @return
1413  *   0 on success, a negative errno value otherwise and rte_errno is set.
1414  */
1415 int
1416 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1417                                uint64_t action_flags,
1418                                const struct rte_flow_attr *attr,
1419                                struct rte_flow_error *error)
1420 {
1421         const struct rte_flow_action_mark *mark = action->conf;
1422
1423         if (!mark)
1424                 return rte_flow_error_set(error, EINVAL,
1425                                           RTE_FLOW_ERROR_TYPE_ACTION,
1426                                           action,
1427                                           "configuration cannot be null");
1428         if (mark->id >= MLX5_FLOW_MARK_MAX)
1429                 return rte_flow_error_set(error, EINVAL,
1430                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1431                                           &mark->id,
1432                                           "mark id must in 0 <= id < "
1433                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1434         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1435                 return rte_flow_error_set(error, EINVAL,
1436                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1437                                           "can't flag and mark in same flow");
1438         if (action_flags & MLX5_FLOW_ACTION_MARK)
1439                 return rte_flow_error_set(error, EINVAL,
1440                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1441                                           "can't have 2 mark actions in same"
1442                                           " flow");
1443         if (attr->egress)
1444                 return rte_flow_error_set(error, ENOTSUP,
1445                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1446                                           "mark action not supported for "
1447                                           "egress");
1448         return 0;
1449 }
1450
1451 /*
1452  * Validate the drop action.
1453  *
1454  * @param[in] action_flags
1455  *   Bit-fields that holds the actions detected until now.
1456  * @param[in] attr
1457  *   Attributes of flow that includes this action.
1458  * @param[out] error
1459  *   Pointer to error structure.
1460  *
1461  * @return
1462  *   0 on success, a negative errno value otherwise and rte_errno is set.
1463  */
1464 int
1465 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1466                                const struct rte_flow_attr *attr,
1467                                struct rte_flow_error *error)
1468 {
1469         if (attr->egress)
1470                 return rte_flow_error_set(error, ENOTSUP,
1471                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1472                                           "drop action not supported for "
1473                                           "egress");
1474         return 0;
1475 }
1476
1477 /*
1478  * Validate the queue action.
1479  *
1480  * @param[in] action
1481  *   Pointer to the queue action.
1482  * @param[in] action_flags
1483  *   Bit-fields that holds the actions detected until now.
1484  * @param[in] dev
1485  *   Pointer to the Ethernet device structure.
1486  * @param[in] attr
1487  *   Attributes of flow that includes this action.
1488  * @param[out] error
1489  *   Pointer to error structure.
1490  *
1491  * @return
1492  *   0 on success, a negative errno value otherwise and rte_errno is set.
1493  */
1494 int
1495 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1496                                 uint64_t action_flags,
1497                                 struct rte_eth_dev *dev,
1498                                 const struct rte_flow_attr *attr,
1499                                 struct rte_flow_error *error)
1500 {
1501         struct mlx5_priv *priv = dev->data->dev_private;
1502         const struct rte_flow_action_queue *queue = action->conf;
1503
1504         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1505                 return rte_flow_error_set(error, EINVAL,
1506                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1507                                           "can't have 2 fate actions in"
1508                                           " same flow");
1509         if (!priv->rxqs_n)
1510                 return rte_flow_error_set(error, EINVAL,
1511                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1512                                           NULL, "No Rx queues configured");
1513         if (queue->index >= priv->rxqs_n)
1514                 return rte_flow_error_set(error, EINVAL,
1515                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1516                                           &queue->index,
1517                                           "queue index out of range");
1518         if (!(*priv->rxqs)[queue->index])
1519                 return rte_flow_error_set(error, EINVAL,
1520                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1521                                           &queue->index,
1522                                           "queue is not configured");
1523         if (attr->egress)
1524                 return rte_flow_error_set(error, ENOTSUP,
1525                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1526                                           "queue action not supported for "
1527                                           "egress");
1528         return 0;
1529 }
1530
1531 /*
1532  * Validate the rss action.
1533  *
1534  * @param[in] dev
1535  *   Pointer to the Ethernet device structure.
1536  * @param[in] action
1537  *   Pointer to the queue action.
1538  * @param[out] error
1539  *   Pointer to error structure.
1540  *
1541  * @return
1542  *   0 on success, a negative errno value otherwise and rte_errno is set.
1543  */
1544 int
1545 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1546                          const struct rte_flow_action *action,
1547                          struct rte_flow_error *error)
1548 {
1549         struct mlx5_priv *priv = dev->data->dev_private;
1550         const struct rte_flow_action_rss *rss = action->conf;
1551         unsigned int i;
1552
1553         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1554             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1555                 return rte_flow_error_set(error, ENOTSUP,
1556                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1557                                           &rss->func,
1558                                           "RSS hash function not supported");
1559 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1560         if (rss->level > 2)
1561 #else
1562         if (rss->level > 1)
1563 #endif
1564                 return rte_flow_error_set(error, ENOTSUP,
1565                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1566                                           &rss->level,
1567                                           "tunnel RSS is not supported");
1568         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1569         if (rss->key_len == 0 && rss->key != NULL)
1570                 return rte_flow_error_set(error, ENOTSUP,
1571                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1572                                           &rss->key_len,
1573                                           "RSS hash key length 0");
1574         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1575                 return rte_flow_error_set(error, ENOTSUP,
1576                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1577                                           &rss->key_len,
1578                                           "RSS hash key too small");
1579         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1580                 return rte_flow_error_set(error, ENOTSUP,
1581                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1582                                           &rss->key_len,
1583                                           "RSS hash key too large");
1584         if (rss->queue_num > priv->config.ind_table_max_size)
1585                 return rte_flow_error_set(error, ENOTSUP,
1586                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1587                                           &rss->queue_num,
1588                                           "number of queues too large");
1589         if (rss->types & MLX5_RSS_HF_MASK)
1590                 return rte_flow_error_set(error, ENOTSUP,
1591                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1592                                           &rss->types,
1593                                           "some RSS protocols are not"
1594                                           " supported");
1595         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1596             !(rss->types & ETH_RSS_IP))
1597                 return rte_flow_error_set(error, EINVAL,
1598                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1599                                           "L3 partial RSS requested but L3 RSS"
1600                                           " type not specified");
1601         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1602             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1603                 return rte_flow_error_set(error, EINVAL,
1604                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1605                                           "L4 partial RSS requested but L4 RSS"
1606                                           " type not specified");
1607         if (!priv->rxqs_n)
1608                 return rte_flow_error_set(error, EINVAL,
1609                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1610                                           NULL, "No Rx queues configured");
1611         if (!rss->queue_num)
1612                 return rte_flow_error_set(error, EINVAL,
1613                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1614                                           NULL, "No queues configured");
1615         for (i = 0; i != rss->queue_num; ++i) {
1616                 if (rss->queue[i] >= priv->rxqs_n)
1617                         return rte_flow_error_set
1618                                 (error, EINVAL,
1619                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1620                                  &rss->queue[i], "queue index out of range");
1621                 if (!(*priv->rxqs)[rss->queue[i]])
1622                         return rte_flow_error_set
1623                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1624                                  &rss->queue[i], "queue is not configured");
1625         }
1626         return 0;
1627 }
1628
1629 /*
1630  * Validate the rss action.
1631  *
1632  * @param[in] action
1633  *   Pointer to the queue action.
1634  * @param[in] action_flags
1635  *   Bit-fields that holds the actions detected until now.
1636  * @param[in] dev
1637  *   Pointer to the Ethernet device structure.
1638  * @param[in] attr
1639  *   Attributes of flow that includes this action.
1640  * @param[in] item_flags
1641  *   Items that were detected.
1642  * @param[out] error
1643  *   Pointer to error structure.
1644  *
1645  * @return
1646  *   0 on success, a negative errno value otherwise and rte_errno is set.
1647  */
1648 int
1649 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1650                               uint64_t action_flags,
1651                               struct rte_eth_dev *dev,
1652                               const struct rte_flow_attr *attr,
1653                               uint64_t item_flags,
1654                               struct rte_flow_error *error)
1655 {
1656         const struct rte_flow_action_rss *rss = action->conf;
1657         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1658         int ret;
1659
1660         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1661                 return rte_flow_error_set(error, EINVAL,
1662                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1663                                           "can't have 2 fate actions"
1664                                           " in same flow");
1665         ret = mlx5_validate_action_rss(dev, action, error);
1666         if (ret)
1667                 return ret;
1668         if (attr->egress)
1669                 return rte_flow_error_set(error, ENOTSUP,
1670                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1671                                           "rss action not supported for "
1672                                           "egress");
1673         if (rss->level > 1 && !tunnel)
1674                 return rte_flow_error_set(error, EINVAL,
1675                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1676                                           "inner RSS is not supported for "
1677                                           "non-tunnel flows");
1678         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1679             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1680                 return rte_flow_error_set(error, EINVAL,
1681                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1682                                           "RSS on eCPRI is not supported now");
1683         }
1684         return 0;
1685 }
1686
1687 /*
1688  * Validate the default miss action.
1689  *
1690  * @param[in] action_flags
1691  *   Bit-fields that holds the actions detected until now.
1692  * @param[out] error
1693  *   Pointer to error structure.
1694  *
1695  * @return
1696  *   0 on success, a negative errno value otherwise and rte_errno is set.
1697  */
1698 int
1699 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1700                                 const struct rte_flow_attr *attr,
1701                                 struct rte_flow_error *error)
1702 {
1703         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1704                 return rte_flow_error_set(error, EINVAL,
1705                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1706                                           "can't have 2 fate actions in"
1707                                           " same flow");
1708         if (attr->egress)
1709                 return rte_flow_error_set(error, ENOTSUP,
1710                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1711                                           "default miss action not supported "
1712                                           "for egress");
1713         if (attr->group)
1714                 return rte_flow_error_set(error, ENOTSUP,
1715                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1716                                           "only group 0 is supported");
1717         if (attr->transfer)
1718                 return rte_flow_error_set(error, ENOTSUP,
1719                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1720                                           NULL, "transfer is not supported");
1721         return 0;
1722 }
1723
1724 /*
1725  * Validate the count action.
1726  *
1727  * @param[in] dev
1728  *   Pointer to the Ethernet device structure.
1729  * @param[in] attr
1730  *   Attributes of flow that includes this action.
1731  * @param[out] error
1732  *   Pointer to error structure.
1733  *
1734  * @return
1735  *   0 on success, a negative errno value otherwise and rte_errno is set.
1736  */
1737 int
1738 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1739                                 const struct rte_flow_attr *attr,
1740                                 struct rte_flow_error *error)
1741 {
1742         if (attr->egress)
1743                 return rte_flow_error_set(error, ENOTSUP,
1744                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1745                                           "count action not supported for "
1746                                           "egress");
1747         return 0;
1748 }
1749
1750 /**
1751  * Verify the @p attributes will be correctly understood by the NIC and store
1752  * them in the @p flow if everything is correct.
1753  *
1754  * @param[in] dev
1755  *   Pointer to the Ethernet device structure.
1756  * @param[in] attributes
1757  *   Pointer to flow attributes
1758  * @param[out] error
1759  *   Pointer to error structure.
1760  *
1761  * @return
1762  *   0 on success, a negative errno value otherwise and rte_errno is set.
1763  */
1764 int
1765 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1766                               const struct rte_flow_attr *attributes,
1767                               struct rte_flow_error *error)
1768 {
1769         struct mlx5_priv *priv = dev->data->dev_private;
1770         uint32_t priority_max = priv->config.flow_prio - 1;
1771
1772         if (attributes->group)
1773                 return rte_flow_error_set(error, ENOTSUP,
1774                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1775                                           NULL, "groups is not supported");
1776         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1777             attributes->priority >= priority_max)
1778                 return rte_flow_error_set(error, ENOTSUP,
1779                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1780                                           NULL, "priority out of range");
1781         if (attributes->egress)
1782                 return rte_flow_error_set(error, ENOTSUP,
1783                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1784                                           "egress is not supported");
1785         if (attributes->transfer && !priv->config.dv_esw_en)
1786                 return rte_flow_error_set(error, ENOTSUP,
1787                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1788                                           NULL, "transfer is not supported");
1789         if (!attributes->ingress)
1790                 return rte_flow_error_set(error, EINVAL,
1791                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1792                                           NULL,
1793                                           "ingress attribute is mandatory");
1794         return 0;
1795 }
1796
1797 /**
1798  * Validate ICMP6 item.
1799  *
1800  * @param[in] item
1801  *   Item specification.
1802  * @param[in] item_flags
1803  *   Bit-fields that holds the items detected until now.
1804  * @param[in] ext_vlan_sup
1805  *   Whether extended VLAN features are supported or not.
1806  * @param[out] error
1807  *   Pointer to error structure.
1808  *
1809  * @return
1810  *   0 on success, a negative errno value otherwise and rte_errno is set.
1811  */
1812 int
1813 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1814                                uint64_t item_flags,
1815                                uint8_t target_protocol,
1816                                struct rte_flow_error *error)
1817 {
1818         const struct rte_flow_item_icmp6 *mask = item->mask;
1819         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1820         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1821                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1822         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1823                                       MLX5_FLOW_LAYER_OUTER_L4;
1824         int ret;
1825
1826         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1827                 return rte_flow_error_set(error, EINVAL,
1828                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1829                                           "protocol filtering not compatible"
1830                                           " with ICMP6 layer");
1831         if (!(item_flags & l3m))
1832                 return rte_flow_error_set(error, EINVAL,
1833                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1834                                           "IPv6 is mandatory to filter on"
1835                                           " ICMP6");
1836         if (item_flags & l4m)
1837                 return rte_flow_error_set(error, EINVAL,
1838                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1839                                           "multiple L4 layers not supported");
1840         if (!mask)
1841                 mask = &rte_flow_item_icmp6_mask;
1842         ret = mlx5_flow_item_acceptable
1843                 (item, (const uint8_t *)mask,
1844                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1845                  sizeof(struct rte_flow_item_icmp6),
1846                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1847         if (ret < 0)
1848                 return ret;
1849         return 0;
1850 }
1851
1852 /**
1853  * Validate ICMP item.
1854  *
1855  * @param[in] item
1856  *   Item specification.
1857  * @param[in] item_flags
1858  *   Bit-fields that holds the items detected until now.
1859  * @param[out] error
1860  *   Pointer to error structure.
1861  *
1862  * @return
1863  *   0 on success, a negative errno value otherwise and rte_errno is set.
1864  */
1865 int
1866 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1867                              uint64_t item_flags,
1868                              uint8_t target_protocol,
1869                              struct rte_flow_error *error)
1870 {
1871         const struct rte_flow_item_icmp *mask = item->mask;
1872         const struct rte_flow_item_icmp nic_mask = {
1873                 .hdr.icmp_type = 0xff,
1874                 .hdr.icmp_code = 0xff,
1875                 .hdr.icmp_ident = RTE_BE16(0xffff),
1876                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1877         };
1878         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1879         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1880                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1881         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1882                                       MLX5_FLOW_LAYER_OUTER_L4;
1883         int ret;
1884
1885         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1886                 return rte_flow_error_set(error, EINVAL,
1887                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1888                                           "protocol filtering not compatible"
1889                                           " with ICMP layer");
1890         if (!(item_flags & l3m))
1891                 return rte_flow_error_set(error, EINVAL,
1892                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1893                                           "IPv4 is mandatory to filter"
1894                                           " on ICMP");
1895         if (item_flags & l4m)
1896                 return rte_flow_error_set(error, EINVAL,
1897                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1898                                           "multiple L4 layers not supported");
1899         if (!mask)
1900                 mask = &nic_mask;
1901         ret = mlx5_flow_item_acceptable
1902                 (item, (const uint8_t *)mask,
1903                  (const uint8_t *)&nic_mask,
1904                  sizeof(struct rte_flow_item_icmp),
1905                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1906         if (ret < 0)
1907                 return ret;
1908         return 0;
1909 }
1910
1911 /**
1912  * Validate Ethernet item.
1913  *
1914  * @param[in] item
1915  *   Item specification.
1916  * @param[in] item_flags
1917  *   Bit-fields that holds the items detected until now.
1918  * @param[out] error
1919  *   Pointer to error structure.
1920  *
1921  * @return
1922  *   0 on success, a negative errno value otherwise and rte_errno is set.
1923  */
1924 int
1925 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1926                             uint64_t item_flags, bool ext_vlan_sup,
1927                             struct rte_flow_error *error)
1928 {
1929         const struct rte_flow_item_eth *mask = item->mask;
1930         const struct rte_flow_item_eth nic_mask = {
1931                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1932                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1933                 .type = RTE_BE16(0xffff),
1934                 .has_vlan = ext_vlan_sup ? 1 : 0,
1935         };
1936         int ret;
1937         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1938         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1939                                        MLX5_FLOW_LAYER_OUTER_L2;
1940
1941         if (item_flags & ethm)
1942                 return rte_flow_error_set(error, ENOTSUP,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1944                                           "multiple L2 layers not supported");
1945         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1946             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1947                 return rte_flow_error_set(error, EINVAL,
1948                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1949                                           "L2 layer should not follow "
1950                                           "L3 layers");
1951         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1952             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1953                 return rte_flow_error_set(error, EINVAL,
1954                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1955                                           "L2 layer should not follow VLAN");
1956         if (!mask)
1957                 mask = &rte_flow_item_eth_mask;
1958         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1959                                         (const uint8_t *)&nic_mask,
1960                                         sizeof(struct rte_flow_item_eth),
1961                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1962         return ret;
1963 }
1964
1965 /**
1966  * Validate VLAN item.
1967  *
1968  * @param[in] item
1969  *   Item specification.
1970  * @param[in] item_flags
1971  *   Bit-fields that holds the items detected until now.
1972  * @param[in] dev
1973  *   Ethernet device flow is being created on.
1974  * @param[out] error
1975  *   Pointer to error structure.
1976  *
1977  * @return
1978  *   0 on success, a negative errno value otherwise and rte_errno is set.
1979  */
1980 int
1981 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1982                              uint64_t item_flags,
1983                              struct rte_eth_dev *dev,
1984                              struct rte_flow_error *error)
1985 {
1986         const struct rte_flow_item_vlan *spec = item->spec;
1987         const struct rte_flow_item_vlan *mask = item->mask;
1988         const struct rte_flow_item_vlan nic_mask = {
1989                 .tci = RTE_BE16(UINT16_MAX),
1990                 .inner_type = RTE_BE16(UINT16_MAX),
1991         };
1992         uint16_t vlan_tag = 0;
1993         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1994         int ret;
1995         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1996                                         MLX5_FLOW_LAYER_INNER_L4) :
1997                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1998                                         MLX5_FLOW_LAYER_OUTER_L4);
1999         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2000                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2001
2002         if (item_flags & vlanm)
2003                 return rte_flow_error_set(error, EINVAL,
2004                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2005                                           "multiple VLAN layers not supported");
2006         else if ((item_flags & l34m) != 0)
2007                 return rte_flow_error_set(error, EINVAL,
2008                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2009                                           "VLAN cannot follow L3/L4 layer");
2010         if (!mask)
2011                 mask = &rte_flow_item_vlan_mask;
2012         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2013                                         (const uint8_t *)&nic_mask,
2014                                         sizeof(struct rte_flow_item_vlan),
2015                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2016         if (ret)
2017                 return ret;
2018         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2019                 struct mlx5_priv *priv = dev->data->dev_private;
2020
2021                 if (priv->vmwa_context) {
2022                         /*
2023                          * Non-NULL context means we have a virtual machine
2024                          * and SR-IOV enabled, we have to create VLAN interface
2025                          * to make hypervisor to setup E-Switch vport
2026                          * context correctly. We avoid creating the multiple
2027                          * VLAN interfaces, so we cannot support VLAN tag mask.
2028                          */
2029                         return rte_flow_error_set(error, EINVAL,
2030                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2031                                                   item,
2032                                                   "VLAN tag mask is not"
2033                                                   " supported in virtual"
2034                                                   " environment");
2035                 }
2036         }
2037         if (spec) {
2038                 vlan_tag = spec->tci;
2039                 vlan_tag &= mask->tci;
2040         }
2041         /*
2042          * From verbs perspective an empty VLAN is equivalent
2043          * to a packet without VLAN layer.
2044          */
2045         if (!vlan_tag)
2046                 return rte_flow_error_set(error, EINVAL,
2047                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2048                                           item->spec,
2049                                           "VLAN cannot be empty");
2050         return 0;
2051 }
2052
2053 /**
2054  * Validate IPV4 item.
2055  *
2056  * @param[in] item
2057  *   Item specification.
2058  * @param[in] item_flags
2059  *   Bit-fields that holds the items detected until now.
2060  * @param[in] last_item
2061  *   Previous validated item in the pattern items.
2062  * @param[in] ether_type
2063  *   Type in the ethernet layer header (including dot1q).
2064  * @param[in] acc_mask
2065  *   Acceptable mask, if NULL default internal default mask
2066  *   will be used to check whether item fields are supported.
2067  * @param[in] range_accepted
2068  *   True if range of values is accepted for specific fields, false otherwise.
2069  * @param[out] error
2070  *   Pointer to error structure.
2071  *
2072  * @return
2073  *   0 on success, a negative errno value otherwise and rte_errno is set.
2074  */
2075 int
2076 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2077                              uint64_t item_flags,
2078                              uint64_t last_item,
2079                              uint16_t ether_type,
2080                              const struct rte_flow_item_ipv4 *acc_mask,
2081                              bool range_accepted,
2082                              struct rte_flow_error *error)
2083 {
2084         const struct rte_flow_item_ipv4 *mask = item->mask;
2085         const struct rte_flow_item_ipv4 *spec = item->spec;
2086         const struct rte_flow_item_ipv4 nic_mask = {
2087                 .hdr = {
2088                         .src_addr = RTE_BE32(0xffffffff),
2089                         .dst_addr = RTE_BE32(0xffffffff),
2090                         .type_of_service = 0xff,
2091                         .next_proto_id = 0xff,
2092                 },
2093         };
2094         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2095         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2096                                       MLX5_FLOW_LAYER_OUTER_L3;
2097         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2098                                       MLX5_FLOW_LAYER_OUTER_L4;
2099         int ret;
2100         uint8_t next_proto = 0xFF;
2101         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2102                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2103                                   MLX5_FLOW_LAYER_INNER_VLAN);
2104
2105         if ((last_item & l2_vlan) && ether_type &&
2106             ether_type != RTE_ETHER_TYPE_IPV4)
2107                 return rte_flow_error_set(error, EINVAL,
2108                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2109                                           "IPv4 cannot follow L2/VLAN layer "
2110                                           "which ether type is not IPv4");
2111         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2112                 if (mask && spec)
2113                         next_proto = mask->hdr.next_proto_id &
2114                                      spec->hdr.next_proto_id;
2115                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2116                         return rte_flow_error_set(error, EINVAL,
2117                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2118                                                   item,
2119                                                   "multiple tunnel "
2120                                                   "not supported");
2121         }
2122         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2123                 return rte_flow_error_set(error, EINVAL,
2124                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2125                                           "wrong tunnel type - IPv6 specified "
2126                                           "but IPv4 item provided");
2127         if (item_flags & l3m)
2128                 return rte_flow_error_set(error, ENOTSUP,
2129                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2130                                           "multiple L3 layers not supported");
2131         else if (item_flags & l4m)
2132                 return rte_flow_error_set(error, EINVAL,
2133                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2134                                           "L3 cannot follow an L4 layer.");
2135         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2136                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2137                 return rte_flow_error_set(error, EINVAL,
2138                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2139                                           "L3 cannot follow an NVGRE layer.");
2140         if (!mask)
2141                 mask = &rte_flow_item_ipv4_mask;
2142         else if (mask->hdr.next_proto_id != 0 &&
2143                  mask->hdr.next_proto_id != 0xff)
2144                 return rte_flow_error_set(error, EINVAL,
2145                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2146                                           "partial mask is not supported"
2147                                           " for protocol");
2148         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2149                                         acc_mask ? (const uint8_t *)acc_mask
2150                                                  : (const uint8_t *)&nic_mask,
2151                                         sizeof(struct rte_flow_item_ipv4),
2152                                         range_accepted, error);
2153         if (ret < 0)
2154                 return ret;
2155         return 0;
2156 }
2157
2158 /**
2159  * Validate IPV6 item.
2160  *
2161  * @param[in] item
2162  *   Item specification.
2163  * @param[in] item_flags
2164  *   Bit-fields that holds the items detected until now.
2165  * @param[in] last_item
2166  *   Previous validated item in the pattern items.
2167  * @param[in] ether_type
2168  *   Type in the ethernet layer header (including dot1q).
2169  * @param[in] acc_mask
2170  *   Acceptable mask, if NULL default internal default mask
2171  *   will be used to check whether item fields are supported.
2172  * @param[out] error
2173  *   Pointer to error structure.
2174  *
2175  * @return
2176  *   0 on success, a negative errno value otherwise and rte_errno is set.
2177  */
2178 int
2179 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2180                              uint64_t item_flags,
2181                              uint64_t last_item,
2182                              uint16_t ether_type,
2183                              const struct rte_flow_item_ipv6 *acc_mask,
2184                              struct rte_flow_error *error)
2185 {
2186         const struct rte_flow_item_ipv6 *mask = item->mask;
2187         const struct rte_flow_item_ipv6 *spec = item->spec;
2188         const struct rte_flow_item_ipv6 nic_mask = {
2189                 .hdr = {
2190                         .src_addr =
2191                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2192                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2193                         .dst_addr =
2194                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2195                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2196                         .vtc_flow = RTE_BE32(0xffffffff),
2197                         .proto = 0xff,
2198                 },
2199         };
2200         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2201         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2202                                       MLX5_FLOW_LAYER_OUTER_L3;
2203         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2204                                       MLX5_FLOW_LAYER_OUTER_L4;
2205         int ret;
2206         uint8_t next_proto = 0xFF;
2207         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2208                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2209                                   MLX5_FLOW_LAYER_INNER_VLAN);
2210
2211         if ((last_item & l2_vlan) && ether_type &&
2212             ether_type != RTE_ETHER_TYPE_IPV6)
2213                 return rte_flow_error_set(error, EINVAL,
2214                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2215                                           "IPv6 cannot follow L2/VLAN layer "
2216                                           "which ether type is not IPv6");
2217         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2218                 next_proto = spec->hdr.proto;
2219         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2220                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2221                         return rte_flow_error_set(error, EINVAL,
2222                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2223                                                   item,
2224                                                   "multiple tunnel "
2225                                                   "not supported");
2226         }
2227         if (next_proto == IPPROTO_HOPOPTS  ||
2228             next_proto == IPPROTO_ROUTING  ||
2229             next_proto == IPPROTO_FRAGMENT ||
2230             next_proto == IPPROTO_ESP      ||
2231             next_proto == IPPROTO_AH       ||
2232             next_proto == IPPROTO_DSTOPTS)
2233                 return rte_flow_error_set(error, EINVAL,
2234                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2235                                           "IPv6 proto (next header) should "
2236                                           "not be set as extension header");
2237         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2238                 return rte_flow_error_set(error, EINVAL,
2239                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2240                                           "wrong tunnel type - IPv4 specified "
2241                                           "but IPv6 item provided");
2242         if (item_flags & l3m)
2243                 return rte_flow_error_set(error, ENOTSUP,
2244                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2245                                           "multiple L3 layers not supported");
2246         else if (item_flags & l4m)
2247                 return rte_flow_error_set(error, EINVAL,
2248                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2249                                           "L3 cannot follow an L4 layer.");
2250         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2251                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2252                 return rte_flow_error_set(error, EINVAL,
2253                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2254                                           "L3 cannot follow an NVGRE layer.");
2255         if (!mask)
2256                 mask = &rte_flow_item_ipv6_mask;
2257         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2258                                         acc_mask ? (const uint8_t *)acc_mask
2259                                                  : (const uint8_t *)&nic_mask,
2260                                         sizeof(struct rte_flow_item_ipv6),
2261                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2262         if (ret < 0)
2263                 return ret;
2264         return 0;
2265 }
2266
2267 /**
2268  * Validate UDP item.
2269  *
2270  * @param[in] item
2271  *   Item specification.
2272  * @param[in] item_flags
2273  *   Bit-fields that holds the items detected until now.
2274  * @param[in] target_protocol
2275  *   The next protocol in the previous item.
2276  * @param[in] flow_mask
2277  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2278  * @param[out] error
2279  *   Pointer to error structure.
2280  *
2281  * @return
2282  *   0 on success, a negative errno value otherwise and rte_errno is set.
2283  */
2284 int
2285 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2286                             uint64_t item_flags,
2287                             uint8_t target_protocol,
2288                             struct rte_flow_error *error)
2289 {
2290         const struct rte_flow_item_udp *mask = item->mask;
2291         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2292         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2293                                       MLX5_FLOW_LAYER_OUTER_L3;
2294         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2295                                       MLX5_FLOW_LAYER_OUTER_L4;
2296         int ret;
2297
2298         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2299                 return rte_flow_error_set(error, EINVAL,
2300                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2301                                           "protocol filtering not compatible"
2302                                           " with UDP layer");
2303         if (!(item_flags & l3m))
2304                 return rte_flow_error_set(error, EINVAL,
2305                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2306                                           "L3 is mandatory to filter on L4");
2307         if (item_flags & l4m)
2308                 return rte_flow_error_set(error, EINVAL,
2309                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2310                                           "multiple L4 layers not supported");
2311         if (!mask)
2312                 mask = &rte_flow_item_udp_mask;
2313         ret = mlx5_flow_item_acceptable
2314                 (item, (const uint8_t *)mask,
2315                  (const uint8_t *)&rte_flow_item_udp_mask,
2316                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2317                  error);
2318         if (ret < 0)
2319                 return ret;
2320         return 0;
2321 }
2322
2323 /**
2324  * Validate TCP item.
2325  *
2326  * @param[in] item
2327  *   Item specification.
2328  * @param[in] item_flags
2329  *   Bit-fields that holds the items detected until now.
2330  * @param[in] target_protocol
2331  *   The next protocol in the previous item.
2332  * @param[out] error
2333  *   Pointer to error structure.
2334  *
2335  * @return
2336  *   0 on success, a negative errno value otherwise and rte_errno is set.
2337  */
2338 int
2339 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2340                             uint64_t item_flags,
2341                             uint8_t target_protocol,
2342                             const struct rte_flow_item_tcp *flow_mask,
2343                             struct rte_flow_error *error)
2344 {
2345         const struct rte_flow_item_tcp *mask = item->mask;
2346         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2347         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2348                                       MLX5_FLOW_LAYER_OUTER_L3;
2349         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2350                                       MLX5_FLOW_LAYER_OUTER_L4;
2351         int ret;
2352
2353         MLX5_ASSERT(flow_mask);
2354         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2355                 return rte_flow_error_set(error, EINVAL,
2356                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2357                                           "protocol filtering not compatible"
2358                                           " with TCP layer");
2359         if (!(item_flags & l3m))
2360                 return rte_flow_error_set(error, EINVAL,
2361                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2362                                           "L3 is mandatory to filter on L4");
2363         if (item_flags & l4m)
2364                 return rte_flow_error_set(error, EINVAL,
2365                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2366                                           "multiple L4 layers not supported");
2367         if (!mask)
2368                 mask = &rte_flow_item_tcp_mask;
2369         ret = mlx5_flow_item_acceptable
2370                 (item, (const uint8_t *)mask,
2371                  (const uint8_t *)flow_mask,
2372                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2373                  error);
2374         if (ret < 0)
2375                 return ret;
2376         return 0;
2377 }
2378
2379 /**
2380  * Validate VXLAN item.
2381  *
2382  * @param[in] item
2383  *   Item specification.
2384  * @param[in] item_flags
2385  *   Bit-fields that holds the items detected until now.
2386  * @param[in] target_protocol
2387  *   The next protocol in the previous item.
2388  * @param[out] error
2389  *   Pointer to error structure.
2390  *
2391  * @return
2392  *   0 on success, a negative errno value otherwise and rte_errno is set.
2393  */
2394 int
2395 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2396                               uint64_t item_flags,
2397                               struct rte_flow_error *error)
2398 {
2399         const struct rte_flow_item_vxlan *spec = item->spec;
2400         const struct rte_flow_item_vxlan *mask = item->mask;
2401         int ret;
2402         union vni {
2403                 uint32_t vlan_id;
2404                 uint8_t vni[4];
2405         } id = { .vlan_id = 0, };
2406
2407
2408         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2409                 return rte_flow_error_set(error, ENOTSUP,
2410                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2411                                           "multiple tunnel layers not"
2412                                           " supported");
2413         /*
2414          * Verify only UDPv4 is present as defined in
2415          * https://tools.ietf.org/html/rfc7348
2416          */
2417         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2418                 return rte_flow_error_set(error, EINVAL,
2419                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2420                                           "no outer UDP layer found");
2421         if (!mask)
2422                 mask = &rte_flow_item_vxlan_mask;
2423         ret = mlx5_flow_item_acceptable
2424                 (item, (const uint8_t *)mask,
2425                  (const uint8_t *)&rte_flow_item_vxlan_mask,
2426                  sizeof(struct rte_flow_item_vxlan),
2427                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2428         if (ret < 0)
2429                 return ret;
2430         if (spec) {
2431                 memcpy(&id.vni[1], spec->vni, 3);
2432                 memcpy(&id.vni[1], mask->vni, 3);
2433         }
2434         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2435                 return rte_flow_error_set(error, ENOTSUP,
2436                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2437                                           "VXLAN tunnel must be fully defined");
2438         return 0;
2439 }
2440
2441 /**
2442  * Validate VXLAN_GPE item.
2443  *
2444  * @param[in] item
2445  *   Item specification.
2446  * @param[in] item_flags
2447  *   Bit-fields that holds the items detected until now.
2448  * @param[in] priv
2449  *   Pointer to the private data structure.
2450  * @param[in] target_protocol
2451  *   The next protocol in the previous item.
2452  * @param[out] error
2453  *   Pointer to error structure.
2454  *
2455  * @return
2456  *   0 on success, a negative errno value otherwise and rte_errno is set.
2457  */
2458 int
2459 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2460                                   uint64_t item_flags,
2461                                   struct rte_eth_dev *dev,
2462                                   struct rte_flow_error *error)
2463 {
2464         struct mlx5_priv *priv = dev->data->dev_private;
2465         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2466         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2467         int ret;
2468         union vni {
2469                 uint32_t vlan_id;
2470                 uint8_t vni[4];
2471         } id = { .vlan_id = 0, };
2472
2473         if (!priv->config.l3_vxlan_en)
2474                 return rte_flow_error_set(error, ENOTSUP,
2475                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2476                                           "L3 VXLAN is not enabled by device"
2477                                           " parameter and/or not configured in"
2478                                           " firmware");
2479         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2480                 return rte_flow_error_set(error, ENOTSUP,
2481                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2482                                           "multiple tunnel layers not"
2483                                           " supported");
2484         /*
2485          * Verify only UDPv4 is present as defined in
2486          * https://tools.ietf.org/html/rfc7348
2487          */
2488         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2489                 return rte_flow_error_set(error, EINVAL,
2490                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2491                                           "no outer UDP layer found");
2492         if (!mask)
2493                 mask = &rte_flow_item_vxlan_gpe_mask;
2494         ret = mlx5_flow_item_acceptable
2495                 (item, (const uint8_t *)mask,
2496                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2497                  sizeof(struct rte_flow_item_vxlan_gpe),
2498                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2499         if (ret < 0)
2500                 return ret;
2501         if (spec) {
2502                 if (spec->protocol)
2503                         return rte_flow_error_set(error, ENOTSUP,
2504                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2505                                                   item,
2506                                                   "VxLAN-GPE protocol"
2507                                                   " not supported");
2508                 memcpy(&id.vni[1], spec->vni, 3);
2509                 memcpy(&id.vni[1], mask->vni, 3);
2510         }
2511         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2512                 return rte_flow_error_set(error, ENOTSUP,
2513                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2514                                           "VXLAN-GPE tunnel must be fully"
2515                                           " defined");
2516         return 0;
2517 }
2518 /**
2519  * Validate GRE Key item.
2520  *
2521  * @param[in] item
2522  *   Item specification.
2523  * @param[in] item_flags
2524  *   Bit flags to mark detected items.
2525  * @param[in] gre_item
2526  *   Pointer to gre_item
2527  * @param[out] error
2528  *   Pointer to error structure.
2529  *
2530  * @return
2531  *   0 on success, a negative errno value otherwise and rte_errno is set.
2532  */
2533 int
2534 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2535                                 uint64_t item_flags,
2536                                 const struct rte_flow_item *gre_item,
2537                                 struct rte_flow_error *error)
2538 {
2539         const rte_be32_t *mask = item->mask;
2540         int ret = 0;
2541         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2542         const struct rte_flow_item_gre *gre_spec;
2543         const struct rte_flow_item_gre *gre_mask;
2544
2545         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2546                 return rte_flow_error_set(error, ENOTSUP,
2547                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2548                                           "Multiple GRE key not support");
2549         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2550                 return rte_flow_error_set(error, ENOTSUP,
2551                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2552                                           "No preceding GRE header");
2553         if (item_flags & MLX5_FLOW_LAYER_INNER)
2554                 return rte_flow_error_set(error, ENOTSUP,
2555                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2556                                           "GRE key following a wrong item");
2557         gre_mask = gre_item->mask;
2558         if (!gre_mask)
2559                 gre_mask = &rte_flow_item_gre_mask;
2560         gre_spec = gre_item->spec;
2561         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2562                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2563                 return rte_flow_error_set(error, EINVAL,
2564                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2565                                           "Key bit must be on");
2566
2567         if (!mask)
2568                 mask = &gre_key_default_mask;
2569         ret = mlx5_flow_item_acceptable
2570                 (item, (const uint8_t *)mask,
2571                  (const uint8_t *)&gre_key_default_mask,
2572                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2573         return ret;
2574 }
2575
2576 /**
2577  * Validate GRE item.
2578  *
2579  * @param[in] item
2580  *   Item specification.
2581  * @param[in] item_flags
2582  *   Bit flags to mark detected items.
2583  * @param[in] target_protocol
2584  *   The next protocol in the previous item.
2585  * @param[out] error
2586  *   Pointer to error structure.
2587  *
2588  * @return
2589  *   0 on success, a negative errno value otherwise and rte_errno is set.
2590  */
2591 int
2592 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2593                             uint64_t item_flags,
2594                             uint8_t target_protocol,
2595                             struct rte_flow_error *error)
2596 {
2597         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2598         const struct rte_flow_item_gre *mask = item->mask;
2599         int ret;
2600         const struct rte_flow_item_gre nic_mask = {
2601                 .c_rsvd0_ver = RTE_BE16(0xB000),
2602                 .protocol = RTE_BE16(UINT16_MAX),
2603         };
2604
2605         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2606                 return rte_flow_error_set(error, EINVAL,
2607                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2608                                           "protocol filtering not compatible"
2609                                           " with this GRE layer");
2610         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2611                 return rte_flow_error_set(error, ENOTSUP,
2612                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2613                                           "multiple tunnel layers not"
2614                                           " supported");
2615         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2616                 return rte_flow_error_set(error, ENOTSUP,
2617                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2618                                           "L3 Layer is missing");
2619         if (!mask)
2620                 mask = &rte_flow_item_gre_mask;
2621         ret = mlx5_flow_item_acceptable
2622                 (item, (const uint8_t *)mask,
2623                  (const uint8_t *)&nic_mask,
2624                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2625                  error);
2626         if (ret < 0)
2627                 return ret;
2628 #ifndef HAVE_MLX5DV_DR
2629 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2630         if (spec && (spec->protocol & mask->protocol))
2631                 return rte_flow_error_set(error, ENOTSUP,
2632                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2633                                           "without MPLS support the"
2634                                           " specification cannot be used for"
2635                                           " filtering");
2636 #endif
2637 #endif
2638         return 0;
2639 }
2640
2641 /**
2642  * Validate Geneve item.
2643  *
2644  * @param[in] item
2645  *   Item specification.
2646  * @param[in] itemFlags
2647  *   Bit-fields that holds the items detected until now.
2648  * @param[in] enPriv
2649  *   Pointer to the private data structure.
2650  * @param[out] error
2651  *   Pointer to error structure.
2652  *
2653  * @return
2654  *   0 on success, a negative errno value otherwise and rte_errno is set.
2655  */
2656
2657 int
2658 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2659                                uint64_t item_flags,
2660                                struct rte_eth_dev *dev,
2661                                struct rte_flow_error *error)
2662 {
2663         struct mlx5_priv *priv = dev->data->dev_private;
2664         const struct rte_flow_item_geneve *spec = item->spec;
2665         const struct rte_flow_item_geneve *mask = item->mask;
2666         int ret;
2667         uint16_t gbhdr;
2668         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2669                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2670         const struct rte_flow_item_geneve nic_mask = {
2671                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2672                 .vni = "\xff\xff\xff",
2673                 .protocol = RTE_BE16(UINT16_MAX),
2674         };
2675
2676         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2677                 return rte_flow_error_set(error, ENOTSUP,
2678                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2679                                           "L3 Geneve is not enabled by device"
2680                                           " parameter and/or not configured in"
2681                                           " firmware");
2682         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2683                 return rte_flow_error_set(error, ENOTSUP,
2684                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2685                                           "multiple tunnel layers not"
2686                                           " supported");
2687         /*
2688          * Verify only UDPv4 is present as defined in
2689          * https://tools.ietf.org/html/rfc7348
2690          */
2691         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2692                 return rte_flow_error_set(error, EINVAL,
2693                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2694                                           "no outer UDP layer found");
2695         if (!mask)
2696                 mask = &rte_flow_item_geneve_mask;
2697         ret = mlx5_flow_item_acceptable
2698                                   (item, (const uint8_t *)mask,
2699                                    (const uint8_t *)&nic_mask,
2700                                    sizeof(struct rte_flow_item_geneve),
2701                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2702         if (ret)
2703                 return ret;
2704         if (spec) {
2705                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2706                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2707                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2708                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2709                         return rte_flow_error_set(error, ENOTSUP,
2710                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2711                                                   item,
2712                                                   "Geneve protocol unsupported"
2713                                                   " fields are being used");
2714                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2715                         return rte_flow_error_set
2716                                         (error, ENOTSUP,
2717                                          RTE_FLOW_ERROR_TYPE_ITEM,
2718                                          item,
2719                                          "Unsupported Geneve options length");
2720         }
2721         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2722                 return rte_flow_error_set
2723                                     (error, ENOTSUP,
2724                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2725                                      "Geneve tunnel must be fully defined");
2726         return 0;
2727 }
2728
2729 /**
2730  * Validate MPLS item.
2731  *
2732  * @param[in] dev
2733  *   Pointer to the rte_eth_dev structure.
2734  * @param[in] item
2735  *   Item specification.
2736  * @param[in] item_flags
2737  *   Bit-fields that holds the items detected until now.
2738  * @param[in] prev_layer
2739  *   The protocol layer indicated in previous item.
2740  * @param[out] error
2741  *   Pointer to error structure.
2742  *
2743  * @return
2744  *   0 on success, a negative errno value otherwise and rte_errno is set.
2745  */
2746 int
2747 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2748                              const struct rte_flow_item *item __rte_unused,
2749                              uint64_t item_flags __rte_unused,
2750                              uint64_t prev_layer __rte_unused,
2751                              struct rte_flow_error *error)
2752 {
2753 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2754         const struct rte_flow_item_mpls *mask = item->mask;
2755         struct mlx5_priv *priv = dev->data->dev_private;
2756         int ret;
2757
2758         if (!priv->config.mpls_en)
2759                 return rte_flow_error_set(error, ENOTSUP,
2760                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2761                                           "MPLS not supported or"
2762                                           " disabled in firmware"
2763                                           " configuration.");
2764         /* MPLS over IP, UDP, GRE is allowed */
2765         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2766                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2767                             MLX5_FLOW_LAYER_GRE)))
2768                 return rte_flow_error_set(error, EINVAL,
2769                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2770                                           "protocol filtering not compatible"
2771                                           " with MPLS layer");
2772         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2773         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2774             !(item_flags & MLX5_FLOW_LAYER_GRE))
2775                 return rte_flow_error_set(error, ENOTSUP,
2776                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2777                                           "multiple tunnel layers not"
2778                                           " supported");
2779         if (!mask)
2780                 mask = &rte_flow_item_mpls_mask;
2781         ret = mlx5_flow_item_acceptable
2782                 (item, (const uint8_t *)mask,
2783                  (const uint8_t *)&rte_flow_item_mpls_mask,
2784                  sizeof(struct rte_flow_item_mpls),
2785                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2786         if (ret < 0)
2787                 return ret;
2788         return 0;
2789 #else
2790         return rte_flow_error_set(error, ENOTSUP,
2791                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2792                                   "MPLS is not supported by Verbs, please"
2793                                   " update.");
2794 #endif
2795 }
2796
2797 /**
2798  * Validate NVGRE item.
2799  *
2800  * @param[in] item
2801  *   Item specification.
2802  * @param[in] item_flags
2803  *   Bit flags to mark detected items.
2804  * @param[in] target_protocol
2805  *   The next protocol in the previous item.
2806  * @param[out] error
2807  *   Pointer to error structure.
2808  *
2809  * @return
2810  *   0 on success, a negative errno value otherwise and rte_errno is set.
2811  */
2812 int
2813 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2814                               uint64_t item_flags,
2815                               uint8_t target_protocol,
2816                               struct rte_flow_error *error)
2817 {
2818         const struct rte_flow_item_nvgre *mask = item->mask;
2819         int ret;
2820
2821         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2822                 return rte_flow_error_set(error, EINVAL,
2823                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2824                                           "protocol filtering not compatible"
2825                                           " with this GRE layer");
2826         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2827                 return rte_flow_error_set(error, ENOTSUP,
2828                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2829                                           "multiple tunnel layers not"
2830                                           " supported");
2831         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2832                 return rte_flow_error_set(error, ENOTSUP,
2833                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2834                                           "L3 Layer is missing");
2835         if (!mask)
2836                 mask = &rte_flow_item_nvgre_mask;
2837         ret = mlx5_flow_item_acceptable
2838                 (item, (const uint8_t *)mask,
2839                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2840                  sizeof(struct rte_flow_item_nvgre),
2841                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2842         if (ret < 0)
2843                 return ret;
2844         return 0;
2845 }
2846
2847 /**
2848  * Validate eCPRI item.
2849  *
2850  * @param[in] item
2851  *   Item specification.
2852  * @param[in] item_flags
2853  *   Bit-fields that holds the items detected until now.
2854  * @param[in] last_item
2855  *   Previous validated item in the pattern items.
2856  * @param[in] ether_type
2857  *   Type in the ethernet layer header (including dot1q).
2858  * @param[in] acc_mask
2859  *   Acceptable mask, if NULL default internal default mask
2860  *   will be used to check whether item fields are supported.
2861  * @param[out] error
2862  *   Pointer to error structure.
2863  *
2864  * @return
2865  *   0 on success, a negative errno value otherwise and rte_errno is set.
2866  */
2867 int
2868 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2869                               uint64_t item_flags,
2870                               uint64_t last_item,
2871                               uint16_t ether_type,
2872                               const struct rte_flow_item_ecpri *acc_mask,
2873                               struct rte_flow_error *error)
2874 {
2875         const struct rte_flow_item_ecpri *mask = item->mask;
2876         const struct rte_flow_item_ecpri nic_mask = {
2877                 .hdr = {
2878                         .common = {
2879                                 .u32 =
2880                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2881                                         .type = 0xFF,
2882                                         }).u32),
2883                         },
2884                         .dummy[0] = 0xFFFFFFFF,
2885                 },
2886         };
2887         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
2888                                         MLX5_FLOW_LAYER_OUTER_VLAN);
2889         struct rte_flow_item_ecpri mask_lo;
2890
2891         if ((last_item & outer_l2_vlan) && ether_type &&
2892             ether_type != RTE_ETHER_TYPE_ECPRI)
2893                 return rte_flow_error_set(error, EINVAL,
2894                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2895                                           "eCPRI cannot follow L2/VLAN layer "
2896                                           "which ether type is not 0xAEFE.");
2897         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2898                 return rte_flow_error_set(error, EINVAL,
2899                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2900                                           "eCPRI with tunnel is not supported "
2901                                           "right now.");
2902         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
2903                 return rte_flow_error_set(error, ENOTSUP,
2904                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2905                                           "multiple L3 layers not supported");
2906         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
2907                 return rte_flow_error_set(error, EINVAL,
2908                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2909                                           "eCPRI cannot follow a TCP layer.");
2910         /* In specification, eCPRI could be over UDP layer. */
2911         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
2912                 return rte_flow_error_set(error, EINVAL,
2913                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2914                                           "eCPRI over UDP layer is not yet "
2915                                           "supported right now.");
2916         /* Mask for type field in common header could be zero. */
2917         if (!mask)
2918                 mask = &rte_flow_item_ecpri_mask;
2919         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
2920         /* Input mask is in big-endian format. */
2921         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
2922                 return rte_flow_error_set(error, EINVAL,
2923                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2924                                           "partial mask is not supported "
2925                                           "for protocol");
2926         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
2927                 return rte_flow_error_set(error, EINVAL,
2928                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2929                                           "message header mask must be after "
2930                                           "a type mask");
2931         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2932                                          acc_mask ? (const uint8_t *)acc_mask
2933                                                   : (const uint8_t *)&nic_mask,
2934                                          sizeof(struct rte_flow_item_ecpri),
2935                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2936 }
2937
2938 /* Allocate unique ID for the split Q/RSS subflows. */
2939 static uint32_t
2940 flow_qrss_get_id(struct rte_eth_dev *dev)
2941 {
2942         struct mlx5_priv *priv = dev->data->dev_private;
2943         uint32_t qrss_id, ret;
2944
2945         ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2946         if (ret)
2947                 return 0;
2948         MLX5_ASSERT(qrss_id);
2949         return qrss_id;
2950 }
2951
2952 /* Free unique ID for the split Q/RSS subflows. */
2953 static void
2954 flow_qrss_free_id(struct rte_eth_dev *dev,  uint32_t qrss_id)
2955 {
2956         struct mlx5_priv *priv = dev->data->dev_private;
2957
2958         if (qrss_id)
2959                 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2960 }
2961
2962 /**
2963  * Release resource related QUEUE/RSS action split.
2964  *
2965  * @param dev
2966  *   Pointer to Ethernet device.
2967  * @param flow
2968  *   Flow to release id's from.
2969  */
2970 static void
2971 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2972                              struct rte_flow *flow)
2973 {
2974         struct mlx5_priv *priv = dev->data->dev_private;
2975         uint32_t handle_idx;
2976         struct mlx5_flow_handle *dev_handle;
2977
2978         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
2979                        handle_idx, dev_handle, next)
2980                 if (dev_handle->split_flow_id)
2981                         flow_qrss_free_id(dev, dev_handle->split_flow_id);
2982 }
2983
2984 static int
2985 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2986                    const struct rte_flow_attr *attr __rte_unused,
2987                    const struct rte_flow_item items[] __rte_unused,
2988                    const struct rte_flow_action actions[] __rte_unused,
2989                    bool external __rte_unused,
2990                    int hairpin __rte_unused,
2991                    struct rte_flow_error *error)
2992 {
2993         return rte_flow_error_set(error, ENOTSUP,
2994                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2995 }
2996
2997 static struct mlx5_flow *
2998 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
2999                   const struct rte_flow_attr *attr __rte_unused,
3000                   const struct rte_flow_item items[] __rte_unused,
3001                   const struct rte_flow_action actions[] __rte_unused,
3002                   struct rte_flow_error *error)
3003 {
3004         rte_flow_error_set(error, ENOTSUP,
3005                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3006         return NULL;
3007 }
3008
3009 static int
3010 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3011                     struct mlx5_flow *dev_flow __rte_unused,
3012                     const struct rte_flow_attr *attr __rte_unused,
3013                     const struct rte_flow_item items[] __rte_unused,
3014                     const struct rte_flow_action actions[] __rte_unused,
3015                     struct rte_flow_error *error)
3016 {
3017         return rte_flow_error_set(error, ENOTSUP,
3018                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3019 }
3020
3021 static int
3022 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3023                 struct rte_flow *flow __rte_unused,
3024                 struct rte_flow_error *error)
3025 {
3026         return rte_flow_error_set(error, ENOTSUP,
3027                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3028 }
3029
3030 static void
3031 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3032                  struct rte_flow *flow __rte_unused)
3033 {
3034 }
3035
3036 static void
3037 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3038                   struct rte_flow *flow __rte_unused)
3039 {
3040 }
3041
3042 static int
3043 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3044                 struct rte_flow *flow __rte_unused,
3045                 const struct rte_flow_action *actions __rte_unused,
3046                 void *data __rte_unused,
3047                 struct rte_flow_error *error)
3048 {
3049         return rte_flow_error_set(error, ENOTSUP,
3050                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3051 }
3052
3053 static int
3054 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3055                       uint32_t domains __rte_unused,
3056                       uint32_t flags __rte_unused)
3057 {
3058         return 0;
3059 }
3060
3061 /* Void driver to protect from null pointer reference. */
3062 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3063         .validate = flow_null_validate,
3064         .prepare = flow_null_prepare,
3065         .translate = flow_null_translate,
3066         .apply = flow_null_apply,
3067         .remove = flow_null_remove,
3068         .destroy = flow_null_destroy,
3069         .query = flow_null_query,
3070         .sync_domain = flow_null_sync_domain,
3071 };
3072
3073 /**
3074  * Select flow driver type according to flow attributes and device
3075  * configuration.
3076  *
3077  * @param[in] dev
3078  *   Pointer to the dev structure.
3079  * @param[in] attr
3080  *   Pointer to the flow attributes.
3081  *
3082  * @return
3083  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3084  */
3085 static enum mlx5_flow_drv_type
3086 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3087 {
3088         struct mlx5_priv *priv = dev->data->dev_private;
3089         /* The OS can determine first a specific flow type (DV, VERBS) */
3090         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3091
3092         if (type != MLX5_FLOW_TYPE_MAX)
3093                 return type;
3094         /* If no OS specific type - continue with DV/VERBS selection */
3095         if (attr->transfer && priv->config.dv_esw_en)
3096                 type = MLX5_FLOW_TYPE_DV;
3097         if (!attr->transfer)
3098                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3099                                                  MLX5_FLOW_TYPE_VERBS;
3100         return type;
3101 }
3102
3103 #define flow_get_drv_ops(type) flow_drv_ops[type]
3104
3105 /**
3106  * Flow driver validation API. This abstracts calling driver specific functions.
3107  * The type of flow driver is determined according to flow attributes.
3108  *
3109  * @param[in] dev
3110  *   Pointer to the dev structure.
3111  * @param[in] attr
3112  *   Pointer to the flow attributes.
3113  * @param[in] items
3114  *   Pointer to the list of items.
3115  * @param[in] actions
3116  *   Pointer to the list of actions.
3117  * @param[in] external
3118  *   This flow rule is created by request external to PMD.
3119  * @param[in] hairpin
3120  *   Number of hairpin TX actions, 0 means classic flow.
3121  * @param[out] error
3122  *   Pointer to the error structure.
3123  *
3124  * @return
3125  *   0 on success, a negative errno value otherwise and rte_errno is set.
3126  */
3127 static inline int
3128 flow_drv_validate(struct rte_eth_dev *dev,
3129                   const struct rte_flow_attr *attr,
3130                   const struct rte_flow_item items[],
3131                   const struct rte_flow_action actions[],
3132                   bool external, int hairpin, struct rte_flow_error *error)
3133 {
3134         const struct mlx5_flow_driver_ops *fops;
3135         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3136
3137         fops = flow_get_drv_ops(type);
3138         return fops->validate(dev, attr, items, actions, external,
3139                               hairpin, error);
3140 }
3141
3142 /**
3143  * Flow driver preparation API. This abstracts calling driver specific
3144  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3145  * calculates the size of memory required for device flow, allocates the memory,
3146  * initializes the device flow and returns the pointer.
3147  *
3148  * @note
3149  *   This function initializes device flow structure such as dv or verbs in
3150  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3151  *   rest. For example, adding returning device flow to flow->dev_flow list and
3152  *   setting backward reference to the flow should be done out of this function.
3153  *   layers field is not filled either.
3154  *
3155  * @param[in] dev
3156  *   Pointer to the dev structure.
3157  * @param[in] attr
3158  *   Pointer to the flow attributes.
3159  * @param[in] items
3160  *   Pointer to the list of items.
3161  * @param[in] actions
3162  *   Pointer to the list of actions.
3163  * @param[in] flow_idx
3164  *   This memory pool index to the flow.
3165  * @param[out] error
3166  *   Pointer to the error structure.
3167  *
3168  * @return
3169  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3170  */
3171 static inline struct mlx5_flow *
3172 flow_drv_prepare(struct rte_eth_dev *dev,
3173                  const struct rte_flow *flow,
3174                  const struct rte_flow_attr *attr,
3175                  const struct rte_flow_item items[],
3176                  const struct rte_flow_action actions[],
3177                  uint32_t flow_idx,
3178                  struct rte_flow_error *error)
3179 {
3180         const struct mlx5_flow_driver_ops *fops;
3181         enum mlx5_flow_drv_type type = flow->drv_type;
3182         struct mlx5_flow *mlx5_flow = NULL;
3183
3184         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3185         fops = flow_get_drv_ops(type);
3186         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3187         if (mlx5_flow)
3188                 mlx5_flow->flow_idx = flow_idx;
3189         return mlx5_flow;
3190 }
3191
3192 /**
3193  * Flow driver translation API. This abstracts calling driver specific
3194  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3195  * translates a generic flow into a driver flow. flow_drv_prepare() must
3196  * precede.
3197  *
3198  * @note
3199  *   dev_flow->layers could be filled as a result of parsing during translation
3200  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3201  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3202  *   flow->actions could be overwritten even though all the expanded dev_flows
3203  *   have the same actions.
3204  *
3205  * @param[in] dev
3206  *   Pointer to the rte dev structure.
3207  * @param[in, out] dev_flow
3208  *   Pointer to the mlx5 flow.
3209  * @param[in] attr
3210  *   Pointer to the flow attributes.
3211  * @param[in] items
3212  *   Pointer to the list of items.
3213  * @param[in] actions
3214  *   Pointer to the list of actions.
3215  * @param[out] error
3216  *   Pointer to the error structure.
3217  *
3218  * @return
3219  *   0 on success, a negative errno value otherwise and rte_errno is set.
3220  */
3221 static inline int
3222 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3223                    const struct rte_flow_attr *attr,
3224                    const struct rte_flow_item items[],
3225                    const struct rte_flow_action actions[],
3226                    struct rte_flow_error *error)
3227 {
3228         const struct mlx5_flow_driver_ops *fops;
3229         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3230
3231         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3232         fops = flow_get_drv_ops(type);
3233         return fops->translate(dev, dev_flow, attr, items, actions, error);
3234 }
3235
3236 /**
3237  * Flow driver apply API. This abstracts calling driver specific functions.
3238  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3239  * translated driver flows on to device. flow_drv_translate() must precede.
3240  *
3241  * @param[in] dev
3242  *   Pointer to Ethernet device structure.
3243  * @param[in, out] flow
3244  *   Pointer to flow structure.
3245  * @param[out] error
3246  *   Pointer to error structure.
3247  *
3248  * @return
3249  *   0 on success, a negative errno value otherwise and rte_errno is set.
3250  */
3251 static inline int
3252 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3253                struct rte_flow_error *error)
3254 {
3255         const struct mlx5_flow_driver_ops *fops;
3256         enum mlx5_flow_drv_type type = flow->drv_type;
3257
3258         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3259         fops = flow_get_drv_ops(type);
3260         return fops->apply(dev, flow, error);
3261 }
3262
3263 /**
3264  * Flow driver remove API. This abstracts calling driver specific functions.
3265  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3266  * on device. All the resources of the flow should be freed by calling
3267  * flow_drv_destroy().
3268  *
3269  * @param[in] dev
3270  *   Pointer to Ethernet device.
3271  * @param[in, out] flow
3272  *   Pointer to flow structure.
3273  */
3274 static inline void
3275 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
3276 {
3277         const struct mlx5_flow_driver_ops *fops;
3278         enum mlx5_flow_drv_type type = flow->drv_type;
3279
3280         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3281         fops = flow_get_drv_ops(type);
3282         fops->remove(dev, flow);
3283 }
3284
3285 /**
3286  * Flow driver destroy API. This abstracts calling driver specific functions.
3287  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3288  * on device and releases resources of the flow.
3289  *
3290  * @param[in] dev
3291  *   Pointer to Ethernet device.
3292  * @param[in, out] flow
3293  *   Pointer to flow structure.
3294  */
3295 static inline void
3296 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3297 {
3298         const struct mlx5_flow_driver_ops *fops;
3299         enum mlx5_flow_drv_type type = flow->drv_type;
3300
3301         flow_mreg_split_qrss_release(dev, flow);
3302         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3303         fops = flow_get_drv_ops(type);
3304         fops->destroy(dev, flow);
3305 }
3306
3307 /**
3308  * Get RSS action from the action list.
3309  *
3310  * @param[in] actions
3311  *   Pointer to the list of actions.
3312  *
3313  * @return
3314  *   Pointer to the RSS action if exist, else return NULL.
3315  */
3316 static const struct rte_flow_action_rss*
3317 flow_get_rss_action(const struct rte_flow_action actions[])
3318 {
3319         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3320                 switch (actions->type) {
3321                 case RTE_FLOW_ACTION_TYPE_RSS:
3322                         return (const struct rte_flow_action_rss *)
3323                                actions->conf;
3324                 default:
3325                         break;
3326                 }
3327         }
3328         return NULL;
3329 }
3330
3331 /* maps shared action to translated non shared in some actions array */
3332 struct mlx5_translated_shared_action {
3333         struct rte_flow_shared_action *action; /**< Shared action */
3334         int index; /**< Index in related array of rte_flow_action */
3335 };
3336
3337 /**
3338  * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
3339  * non shared action if translation possible.
3340  * This functionality used to run same execution path for both shared & non
3341  * shared actions on flow create. All necessary preparations for shared
3342  * action handling should be preformed on *shared* actions list returned
3343  * from this call.
3344  *
3345  * @param[in] actions
3346  *   List of actions to translate.
3347  * @param[out] shared
3348  *   List to store translated shared actions.
3349  * @param[in, out] shared_n
3350  *   Size of *shared* array. On return should be updated with number of shared
3351  *   actions retrieved from the *actions* list.
3352  * @param[out] translated_actions
3353  *   List of actions where all shared actions were translated to non shared
3354  *   if possible. NULL if no translation took place.
3355  * @param[out] error
3356  *   Pointer to the error structure.
3357  *
3358  * @return
3359  *   0 on success, a negative errno value otherwise and rte_errno is set.
3360  */
3361 static int
3362 flow_shared_actions_translate(const struct rte_flow_action actions[],
3363         struct mlx5_translated_shared_action *shared,
3364         int *shared_n,
3365         struct rte_flow_action **translated_actions,
3366         struct rte_flow_error *error)
3367 {
3368         struct rte_flow_action *translated = NULL;
3369         size_t actions_size;
3370         int n;
3371         int copied_n = 0;
3372         struct mlx5_translated_shared_action *shared_end = NULL;
3373
3374         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3375                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
3376                         continue;
3377                 if (copied_n == *shared_n) {
3378                         return rte_flow_error_set
3379                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3380                                  NULL, "too many shared actions");
3381                 }
3382                 rte_memcpy(&shared[copied_n].action, &actions[n].conf,
3383                            sizeof(actions[n].conf));
3384                 shared[copied_n].index = n;
3385                 copied_n++;
3386         }
3387         n++;
3388         *shared_n = copied_n;
3389         if (!copied_n)
3390                 return 0;
3391         actions_size = sizeof(struct rte_flow_action) * n;
3392         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3393         if (!translated) {
3394                 rte_errno = ENOMEM;
3395                 return -ENOMEM;
3396         }
3397         memcpy(translated, actions, actions_size);
3398         for (shared_end = shared + copied_n; shared < shared_end; shared++) {
3399                 const struct rte_flow_shared_action *shared_action;
3400
3401                 shared_action = shared->action;
3402                 switch (shared_action->type) {
3403                 case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
3404                         translated[shared->index].type =
3405                                 RTE_FLOW_ACTION_TYPE_RSS;
3406                         translated[shared->index].conf =
3407                                 &shared_action->rss.origin;
3408                         break;
3409                 default:
3410                         mlx5_free(translated);
3411                         return rte_flow_error_set
3412                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3413                                  NULL, "invalid shared action type");
3414                 }
3415         }
3416         *translated_actions = translated;
3417         return 0;
3418 }
3419
3420 /**
3421  * Get Shared RSS action from the action list.
3422  *
3423  * @param[in] shared
3424  *   Pointer to the list of actions.
3425  * @param[in] shared_n
3426  *   Actions list length.
3427  *
3428  * @return
3429  *   Pointer to the MLX5 RSS action if exists, otherwise return NULL.
3430  */
3431 static struct mlx5_shared_action_rss *
3432 flow_get_shared_rss_action(struct mlx5_translated_shared_action *shared,
3433                            int shared_n)
3434 {
3435         struct mlx5_translated_shared_action *shared_end;
3436
3437         for (shared_end = shared + shared_n; shared < shared_end; shared++) {
3438                 struct rte_flow_shared_action *shared_action;
3439
3440                 shared_action = shared->action;
3441                 switch (shared_action->type) {
3442                 case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
3443                         __atomic_add_fetch(&shared_action->refcnt, 1,
3444                                            __ATOMIC_RELAXED);
3445                         return &shared_action->rss;
3446                 default:
3447                         break;
3448                 }
3449         }
3450         return NULL;
3451 }
3452
3453 struct rte_flow_shared_action *
3454 mlx5_flow_get_shared_rss(struct rte_flow *flow)
3455 {
3456         if (flow->shared_rss)
3457                 return container_of(flow->shared_rss,
3458                                     struct rte_flow_shared_action, rss);
3459         else
3460                 return NULL;
3461 }
3462
3463 static unsigned int
3464 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3465 {
3466         const struct rte_flow_item *item;
3467         unsigned int has_vlan = 0;
3468
3469         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3470                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3471                         has_vlan = 1;
3472                         break;
3473                 }
3474         }
3475         if (has_vlan)
3476                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3477                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3478         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3479                                MLX5_EXPANSION_ROOT_OUTER;
3480 }
3481
3482 /**
3483  *  Get layer flags from the prefix flow.
3484  *
3485  *  Some flows may be split to several subflows, the prefix subflow gets the
3486  *  match items and the suffix sub flow gets the actions.
3487  *  Some actions need the user defined match item flags to get the detail for
3488  *  the action.
3489  *  This function helps the suffix flow to get the item layer flags from prefix
3490  *  subflow.
3491  *
3492  * @param[in] dev_flow
3493  *   Pointer the created preifx subflow.
3494  *
3495  * @return
3496  *   The layers get from prefix subflow.
3497  */
3498 static inline uint64_t
3499 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3500 {
3501         uint64_t layers = 0;
3502
3503         /*
3504          * Layers bits could be localization, but usually the compiler will
3505          * help to do the optimization work for source code.
3506          * If no decap actions, use the layers directly.
3507          */
3508         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3509                 return dev_flow->handle->layers;
3510         /* Convert L3 layers with decap action. */
3511         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3512                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3513         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3514                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3515         /* Convert L4 layers with decap action.  */
3516         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3517                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3518         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3519                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3520         return layers;
3521 }
3522
3523 /**
3524  * Get metadata split action information.
3525  *
3526  * @param[in] actions
3527  *   Pointer to the list of actions.
3528  * @param[out] qrss
3529  *   Pointer to the return pointer.
3530  * @param[out] qrss_type
3531  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3532  *   if no QUEUE/RSS is found.
3533  * @param[out] encap_idx
3534  *   Pointer to the index of the encap action if exists, otherwise the last
3535  *   action index.
3536  *
3537  * @return
3538  *   Total number of actions.
3539  */
3540 static int
3541 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3542                                        const struct rte_flow_action **qrss,
3543                                        int *encap_idx)
3544 {
3545         const struct rte_flow_action_raw_encap *raw_encap;
3546         int actions_n = 0;
3547         int raw_decap_idx = -1;
3548
3549         *encap_idx = -1;
3550         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3551                 switch (actions->type) {
3552                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3553                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3554                         *encap_idx = actions_n;
3555                         break;
3556                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3557                         raw_decap_idx = actions_n;
3558                         break;
3559                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3560                         raw_encap = actions->conf;
3561                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3562                                 *encap_idx = raw_decap_idx != -1 ?
3563                                                       raw_decap_idx : actions_n;
3564                         break;
3565                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3566                 case RTE_FLOW_ACTION_TYPE_RSS:
3567                         *qrss = actions;
3568                         break;
3569                 default:
3570                         break;
3571                 }
3572                 actions_n++;
3573         }
3574         if (*encap_idx == -1)
3575                 *encap_idx = actions_n;
3576         /* Count RTE_FLOW_ACTION_TYPE_END. */
3577         return actions_n + 1;
3578 }
3579
3580 /**
3581  * Check meter action from the action list.
3582  *
3583  * @param[in] actions
3584  *   Pointer to the list of actions.
3585  * @param[out] mtr
3586  *   Pointer to the meter exist flag.
3587  *
3588  * @return
3589  *   Total number of actions.
3590  */
3591 static int
3592 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
3593 {
3594         int actions_n = 0;
3595
3596         MLX5_ASSERT(mtr);
3597         *mtr = 0;
3598         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3599                 switch (actions->type) {
3600                 case RTE_FLOW_ACTION_TYPE_METER:
3601                         *mtr = 1;
3602                         break;
3603                 default:
3604                         break;
3605                 }
3606                 actions_n++;
3607         }
3608         /* Count RTE_FLOW_ACTION_TYPE_END. */
3609         return actions_n + 1;
3610 }
3611
3612 /**
3613  * Check if the flow should be split due to hairpin.
3614  * The reason for the split is that in current HW we can't
3615  * support encap and push-vlan on Rx, so if a flow contains
3616  * these actions we move it to Tx.
3617  *
3618  * @param dev
3619  *   Pointer to Ethernet device.
3620  * @param[in] attr
3621  *   Flow rule attributes.
3622  * @param[in] actions
3623  *   Associated actions (list terminated by the END action).
3624  *
3625  * @return
3626  *   > 0 the number of actions and the flow should be split,
3627  *   0 when no split required.
3628  */
3629 static int
3630 flow_check_hairpin_split(struct rte_eth_dev *dev,
3631                          const struct rte_flow_attr *attr,
3632                          const struct rte_flow_action actions[])
3633 {
3634         int queue_action = 0;
3635         int action_n = 0;
3636         int split = 0;
3637         const struct rte_flow_action_queue *queue;
3638         const struct rte_flow_action_rss *rss;
3639         const struct rte_flow_action_raw_encap *raw_encap;
3640         const struct rte_eth_hairpin_conf *conf;
3641
3642         if (!attr->ingress)
3643                 return 0;
3644         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3645                 switch (actions->type) {
3646                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3647                         queue = actions->conf;
3648                         if (queue == NULL)
3649                                 return 0;
3650                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3651                         if (conf != NULL && !!conf->tx_explicit)
3652                                 return 0;
3653                         queue_action = 1;
3654                         action_n++;
3655                         break;
3656                 case RTE_FLOW_ACTION_TYPE_RSS:
3657                         rss = actions->conf;
3658                         if (rss == NULL || rss->queue_num == 0)
3659                                 return 0;
3660                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3661                         if (conf != NULL && !!conf->tx_explicit)
3662                                 return 0;
3663                         queue_action = 1;
3664                         action_n++;
3665                         break;
3666                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3667                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3668                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3669                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3670                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3671                         split++;
3672                         action_n++;
3673                         break;
3674                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3675                         raw_encap = actions->conf;
3676                         if (raw_encap->size >
3677                             (sizeof(struct rte_flow_item_eth) +
3678                              sizeof(struct rte_flow_item_ipv4)))
3679                                 split++;
3680                         action_n++;
3681                         break;
3682                 default:
3683                         action_n++;
3684                         break;
3685                 }
3686         }
3687         if (split && queue_action)
3688                 return action_n;
3689         return 0;
3690 }
3691
3692 /* Declare flow create/destroy prototype in advance. */
3693 static uint32_t
3694 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3695                  const struct rte_flow_attr *attr,
3696                  const struct rte_flow_item items[],
3697                  const struct rte_flow_action actions[],
3698                  bool external, struct rte_flow_error *error);
3699
3700 static void
3701 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3702                   uint32_t flow_idx);
3703
3704 /**
3705  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3706  *
3707  * As mark_id is unique, if there's already a registered flow for the mark_id,
3708  * return by increasing the reference counter of the resource. Otherwise, create
3709  * the resource (mcp_res) and flow.
3710  *
3711  * Flow looks like,
3712  *   - If ingress port is ANY and reg_c[1] is mark_id,
3713  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3714  *
3715  * For default flow (zero mark_id), flow is like,
3716  *   - If ingress port is ANY,
3717  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
3718  *
3719  * @param dev
3720  *   Pointer to Ethernet device.
3721  * @param mark_id
3722  *   ID of MARK action, zero means default flow for META.
3723  * @param[out] error
3724  *   Perform verbose error reporting if not NULL.
3725  *
3726  * @return
3727  *   Associated resource on success, NULL otherwise and rte_errno is set.
3728  */
3729 static struct mlx5_flow_mreg_copy_resource *
3730 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
3731                           struct rte_flow_error *error)
3732 {
3733         struct mlx5_priv *priv = dev->data->dev_private;
3734         struct rte_flow_attr attr = {
3735                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3736                 .ingress = 1,
3737         };
3738         struct mlx5_rte_flow_item_tag tag_spec = {
3739                 .data = mark_id,
3740         };
3741         struct rte_flow_item items[] = {
3742                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3743         };
3744         struct rte_flow_action_mark ftag = {
3745                 .id = mark_id,
3746         };
3747         struct mlx5_flow_action_copy_mreg cp_mreg = {
3748                 .dst = REG_B,
3749                 .src = REG_NON,
3750         };
3751         struct rte_flow_action_jump jump = {
3752                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3753         };
3754         struct rte_flow_action actions[] = {
3755                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
3756         };
3757         struct mlx5_flow_mreg_copy_resource *mcp_res;
3758         uint32_t idx = 0;
3759         int ret;
3760
3761         /* Fill the register fileds in the flow. */
3762         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3763         if (ret < 0)
3764                 return NULL;
3765         tag_spec.id = ret;
3766         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3767         if (ret < 0)
3768                 return NULL;
3769         cp_mreg.src = ret;
3770         /* Check if already registered. */
3771         MLX5_ASSERT(priv->mreg_cp_tbl);
3772         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id);
3773         if (mcp_res) {
3774                 /* For non-default rule. */
3775                 if (mark_id != MLX5_DEFAULT_COPY_ID)
3776                         mcp_res->refcnt++;
3777                 MLX5_ASSERT(mark_id != MLX5_DEFAULT_COPY_ID ||
3778                             mcp_res->refcnt == 1);
3779                 return mcp_res;
3780         }
3781         /* Provide the full width of FLAG specific value. */
3782         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3783                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3784         /* Build a new flow. */
3785         if (mark_id != MLX5_DEFAULT_COPY_ID) {
3786                 items[0] = (struct rte_flow_item){
3787                         .type = (enum rte_flow_item_type)
3788                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3789                         .spec = &tag_spec,
3790                 };
3791                 items[1] = (struct rte_flow_item){
3792                         .type = RTE_FLOW_ITEM_TYPE_END,
3793                 };
3794                 actions[0] = (struct rte_flow_action){
3795                         .type = (enum rte_flow_action_type)
3796                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3797                         .conf = &ftag,
3798                 };
3799                 actions[1] = (struct rte_flow_action){
3800                         .type = (enum rte_flow_action_type)
3801                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3802                         .conf = &cp_mreg,
3803                 };
3804                 actions[2] = (struct rte_flow_action){
3805                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3806                         .conf = &jump,
3807                 };
3808                 actions[3] = (struct rte_flow_action){
3809                         .type = RTE_FLOW_ACTION_TYPE_END,
3810                 };
3811         } else {
3812                 /* Default rule, wildcard match. */
3813                 attr.priority = MLX5_FLOW_PRIO_RSVD;
3814                 items[0] = (struct rte_flow_item){
3815                         .type = RTE_FLOW_ITEM_TYPE_END,
3816                 };
3817                 actions[0] = (struct rte_flow_action){
3818                         .type = (enum rte_flow_action_type)
3819                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3820                         .conf = &cp_mreg,
3821                 };
3822                 actions[1] = (struct rte_flow_action){
3823                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3824                         .conf = &jump,
3825                 };
3826                 actions[2] = (struct rte_flow_action){
3827                         .type = RTE_FLOW_ACTION_TYPE_END,
3828                 };
3829         }
3830         /* Build a new entry. */
3831         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
3832         if (!mcp_res) {
3833                 rte_errno = ENOMEM;
3834                 return NULL;
3835         }
3836         mcp_res->idx = idx;
3837         /*
3838          * The copy Flows are not included in any list. There
3839          * ones are referenced from other Flows and can not
3840          * be applied, removed, deleted in ardbitrary order
3841          * by list traversing.
3842          */
3843         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
3844                                          actions, false, error);
3845         if (!mcp_res->rix_flow)
3846                 goto error;
3847         mcp_res->refcnt++;
3848         mcp_res->hlist_ent.key = mark_id;
3849         ret = mlx5_hlist_insert(priv->mreg_cp_tbl,
3850                                 &mcp_res->hlist_ent);
3851         MLX5_ASSERT(!ret);
3852         if (ret)
3853                 goto error;
3854         return mcp_res;
3855 error:
3856         if (mcp_res->rix_flow)
3857                 flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3858         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3859         return NULL;
3860 }
3861
3862 /**
3863  * Release flow in RX_CP_TBL.
3864  *
3865  * @param dev
3866  *   Pointer to Ethernet device.
3867  * @flow
3868  *   Parent flow for wich copying is provided.
3869  */
3870 static void
3871 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3872                           struct rte_flow *flow)
3873 {
3874         struct mlx5_flow_mreg_copy_resource *mcp_res;
3875         struct mlx5_priv *priv = dev->data->dev_private;
3876
3877         if (!flow->rix_mreg_copy)
3878                 return;
3879         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3880                                  flow->rix_mreg_copy);
3881         if (!mcp_res || !priv->mreg_cp_tbl)
3882                 return;
3883         if (flow->copy_applied) {
3884                 MLX5_ASSERT(mcp_res->appcnt);
3885                 flow->copy_applied = 0;
3886                 --mcp_res->appcnt;
3887                 if (!mcp_res->appcnt) {
3888                         struct rte_flow *mcp_flow = mlx5_ipool_get
3889                                         (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
3890                                         mcp_res->rix_flow);
3891
3892                         if (mcp_flow)
3893                                 flow_drv_remove(dev, mcp_flow);
3894                 }
3895         }
3896         /*
3897          * We do not check availability of metadata registers here,
3898          * because copy resources are not allocated in this case.
3899          */
3900         if (--mcp_res->refcnt)
3901                 return;
3902         MLX5_ASSERT(mcp_res->rix_flow);
3903         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3904         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3905         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3906         flow->rix_mreg_copy = 0;
3907 }
3908
3909 /**
3910  * Start flow in RX_CP_TBL.
3911  *
3912  * @param dev
3913  *   Pointer to Ethernet device.
3914  * @flow
3915  *   Parent flow for wich copying is provided.
3916  *
3917  * @return
3918  *   0 on success, a negative errno value otherwise and rte_errno is set.
3919  */
3920 static int
3921 flow_mreg_start_copy_action(struct rte_eth_dev *dev,
3922                             struct rte_flow *flow)
3923 {
3924         struct mlx5_flow_mreg_copy_resource *mcp_res;
3925         struct mlx5_priv *priv = dev->data->dev_private;
3926         int ret;
3927
3928         if (!flow->rix_mreg_copy || flow->copy_applied)
3929                 return 0;
3930         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3931                                  flow->rix_mreg_copy);
3932         if (!mcp_res)
3933                 return 0;
3934         if (!mcp_res->appcnt) {
3935                 struct rte_flow *mcp_flow = mlx5_ipool_get
3936                                 (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
3937                                 mcp_res->rix_flow);
3938
3939                 if (mcp_flow) {
3940                         ret = flow_drv_apply(dev, mcp_flow, NULL);
3941                         if (ret)
3942                                 return ret;
3943                 }
3944         }
3945         ++mcp_res->appcnt;
3946         flow->copy_applied = 1;
3947         return 0;
3948 }
3949
3950 /**
3951  * Stop flow in RX_CP_TBL.
3952  *
3953  * @param dev
3954  *   Pointer to Ethernet device.
3955  * @flow
3956  *   Parent flow for wich copying is provided.
3957  */
3958 static void
3959 flow_mreg_stop_copy_action(struct rte_eth_dev *dev,
3960                            struct rte_flow *flow)
3961 {
3962         struct mlx5_flow_mreg_copy_resource *mcp_res;
3963         struct mlx5_priv *priv = dev->data->dev_private;
3964
3965         if (!flow->rix_mreg_copy || !flow->copy_applied)
3966                 return;
3967         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3968                                  flow->rix_mreg_copy);
3969         if (!mcp_res)
3970                 return;
3971         MLX5_ASSERT(mcp_res->appcnt);
3972         --mcp_res->appcnt;
3973         flow->copy_applied = 0;
3974         if (!mcp_res->appcnt) {
3975                 struct rte_flow *mcp_flow = mlx5_ipool_get
3976                                 (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
3977                                 mcp_res->rix_flow);
3978
3979                 if (mcp_flow)
3980                         flow_drv_remove(dev, mcp_flow);
3981         }
3982 }
3983
3984 /**
3985  * Remove the default copy action from RX_CP_TBL.
3986  *
3987  * @param dev
3988  *   Pointer to Ethernet device.
3989  */
3990 static void
3991 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3992 {
3993         struct mlx5_flow_mreg_copy_resource *mcp_res;
3994         struct mlx5_priv *priv = dev->data->dev_private;
3995
3996         /* Check if default flow is registered. */
3997         if (!priv->mreg_cp_tbl)
3998                 return;
3999         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl,
4000                                             MLX5_DEFAULT_COPY_ID);
4001         if (!mcp_res)
4002                 return;
4003         MLX5_ASSERT(mcp_res->rix_flow);
4004         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
4005         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4006         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4007 }
4008
4009 /**
4010  * Add the default copy action in in RX_CP_TBL.
4011  *
4012  * @param dev
4013  *   Pointer to Ethernet device.
4014  * @param[out] error
4015  *   Perform verbose error reporting if not NULL.
4016  *
4017  * @return
4018  *   0 for success, negative value otherwise and rte_errno is set.
4019  */
4020 static int
4021 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4022                                   struct rte_flow_error *error)
4023 {
4024         struct mlx5_priv *priv = dev->data->dev_private;
4025         struct mlx5_flow_mreg_copy_resource *mcp_res;
4026
4027         /* Check whether extensive metadata feature is engaged. */
4028         if (!priv->config.dv_flow_en ||
4029             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4030             !mlx5_flow_ext_mreg_supported(dev) ||
4031             !priv->sh->dv_regc0_mask)
4032                 return 0;
4033         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
4034         if (!mcp_res)
4035                 return -rte_errno;
4036         return 0;
4037 }
4038
4039 /**
4040  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4041  *
4042  * All the flow having Q/RSS action should be split by
4043  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4044  * performs the following,
4045  *   - CQE->flow_tag := reg_c[1] (MARK)
4046  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4047  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4048  * but there should be a flow per each MARK ID set by MARK action.
4049  *
4050  * For the aforementioned reason, if there's a MARK action in flow's action
4051  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4052  * the MARK ID to CQE's flow_tag like,
4053  *   - If reg_c[1] is mark_id,
4054  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4055  *
4056  * For SET_META action which stores value in reg_c[0], as the destination is
4057  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4058  * MARK ID means the default flow. The default flow looks like,
4059  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4060  *
4061  * @param dev
4062  *   Pointer to Ethernet device.
4063  * @param flow
4064  *   Pointer to flow structure.
4065  * @param[in] actions
4066  *   Pointer to the list of actions.
4067  * @param[out] error
4068  *   Perform verbose error reporting if not NULL.
4069  *
4070  * @return
4071  *   0 on success, negative value otherwise and rte_errno is set.
4072  */
4073 static int
4074 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4075                             struct rte_flow *flow,
4076                             const struct rte_flow_action *actions,
4077                             struct rte_flow_error *error)
4078 {
4079         struct mlx5_priv *priv = dev->data->dev_private;
4080         struct mlx5_dev_config *config = &priv->config;
4081         struct mlx5_flow_mreg_copy_resource *mcp_res;
4082         const struct rte_flow_action_mark *mark;
4083
4084         /* Check whether extensive metadata feature is engaged. */
4085         if (!config->dv_flow_en ||
4086             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4087             !mlx5_flow_ext_mreg_supported(dev) ||
4088             !priv->sh->dv_regc0_mask)
4089                 return 0;
4090         /* Find MARK action. */
4091         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4092                 switch (actions->type) {
4093                 case RTE_FLOW_ACTION_TYPE_FLAG:
4094                         mcp_res = flow_mreg_add_copy_action
4095                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4096                         if (!mcp_res)
4097                                 return -rte_errno;
4098                         flow->rix_mreg_copy = mcp_res->idx;
4099                         if (dev->data->dev_started) {
4100                                 mcp_res->appcnt++;
4101                                 flow->copy_applied = 1;
4102                         }
4103                         return 0;
4104                 case RTE_FLOW_ACTION_TYPE_MARK:
4105                         mark = (const struct rte_flow_action_mark *)
4106                                 actions->conf;
4107                         mcp_res =
4108                                 flow_mreg_add_copy_action(dev, mark->id, error);
4109                         if (!mcp_res)
4110                                 return -rte_errno;
4111                         flow->rix_mreg_copy = mcp_res->idx;
4112                         if (dev->data->dev_started) {
4113                                 mcp_res->appcnt++;
4114                                 flow->copy_applied = 1;
4115                         }
4116                         return 0;
4117                 default:
4118                         break;
4119                 }
4120         }
4121         return 0;
4122 }
4123
4124 #define MLX5_MAX_SPLIT_ACTIONS 24
4125 #define MLX5_MAX_SPLIT_ITEMS 24
4126
4127 /**
4128  * Split the hairpin flow.
4129  * Since HW can't support encap and push-vlan on Rx, we move these
4130  * actions to Tx.
4131  * If the count action is after the encap then we also
4132  * move the count action. in this case the count will also measure
4133  * the outer bytes.
4134  *
4135  * @param dev
4136  *   Pointer to Ethernet device.
4137  * @param[in] actions
4138  *   Associated actions (list terminated by the END action).
4139  * @param[out] actions_rx
4140  *   Rx flow actions.
4141  * @param[out] actions_tx
4142  *   Tx flow actions..
4143  * @param[out] pattern_tx
4144  *   The pattern items for the Tx flow.
4145  * @param[out] flow_id
4146  *   The flow ID connected to this flow.
4147  *
4148  * @return
4149  *   0 on success.
4150  */
4151 static int
4152 flow_hairpin_split(struct rte_eth_dev *dev,
4153                    const struct rte_flow_action actions[],
4154                    struct rte_flow_action actions_rx[],
4155                    struct rte_flow_action actions_tx[],
4156                    struct rte_flow_item pattern_tx[],
4157                    uint32_t *flow_id)
4158 {
4159         struct mlx5_priv *priv = dev->data->dev_private;
4160         const struct rte_flow_action_raw_encap *raw_encap;
4161         const struct rte_flow_action_raw_decap *raw_decap;
4162         struct mlx5_rte_flow_action_set_tag *set_tag;
4163         struct rte_flow_action *tag_action;
4164         struct mlx5_rte_flow_item_tag *tag_item;
4165         struct rte_flow_item *item;
4166         char *addr;
4167         int encap = 0;
4168
4169         mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
4170         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4171                 switch (actions->type) {
4172                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4173                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4174                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4175                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4176                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4177                         rte_memcpy(actions_tx, actions,
4178                                sizeof(struct rte_flow_action));
4179                         actions_tx++;
4180                         break;
4181                 case RTE_FLOW_ACTION_TYPE_COUNT:
4182                         if (encap) {
4183                                 rte_memcpy(actions_tx, actions,
4184                                            sizeof(struct rte_flow_action));
4185                                 actions_tx++;
4186                         } else {
4187                                 rte_memcpy(actions_rx, actions,
4188                                            sizeof(struct rte_flow_action));
4189                                 actions_rx++;
4190                         }
4191                         break;
4192                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4193                         raw_encap = actions->conf;
4194                         if (raw_encap->size >
4195                             (sizeof(struct rte_flow_item_eth) +
4196                              sizeof(struct rte_flow_item_ipv4))) {
4197                                 memcpy(actions_tx, actions,
4198                                        sizeof(struct rte_flow_action));
4199                                 actions_tx++;
4200                                 encap = 1;
4201                         } else {
4202                                 rte_memcpy(actions_rx, actions,
4203                                            sizeof(struct rte_flow_action));
4204                                 actions_rx++;
4205                         }
4206                         break;
4207                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4208                         raw_decap = actions->conf;
4209                         if (raw_decap->size <
4210                             (sizeof(struct rte_flow_item_eth) +
4211                              sizeof(struct rte_flow_item_ipv4))) {
4212                                 memcpy(actions_tx, actions,
4213                                        sizeof(struct rte_flow_action));
4214                                 actions_tx++;
4215                         } else {
4216                                 rte_memcpy(actions_rx, actions,
4217                                            sizeof(struct rte_flow_action));
4218                                 actions_rx++;
4219                         }
4220                         break;
4221                 default:
4222                         rte_memcpy(actions_rx, actions,
4223                                    sizeof(struct rte_flow_action));
4224                         actions_rx++;
4225                         break;
4226                 }
4227         }
4228         /* Add set meta action and end action for the Rx flow. */
4229         tag_action = actions_rx;
4230         tag_action->type = (enum rte_flow_action_type)
4231                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4232         actions_rx++;
4233         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4234         actions_rx++;
4235         set_tag = (void *)actions_rx;
4236         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
4237         MLX5_ASSERT(set_tag->id > REG_NON);
4238         set_tag->data = *flow_id;
4239         tag_action->conf = set_tag;
4240         /* Create Tx item list. */
4241         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4242         addr = (void *)&pattern_tx[2];
4243         item = pattern_tx;
4244         item->type = (enum rte_flow_item_type)
4245                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4246         tag_item = (void *)addr;
4247         tag_item->data = *flow_id;
4248         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4249         MLX5_ASSERT(set_tag->id > REG_NON);
4250         item->spec = tag_item;
4251         addr += sizeof(struct mlx5_rte_flow_item_tag);
4252         tag_item = (void *)addr;
4253         tag_item->data = UINT32_MAX;
4254         tag_item->id = UINT16_MAX;
4255         item->mask = tag_item;
4256         item->last = NULL;
4257         item++;
4258         item->type = RTE_FLOW_ITEM_TYPE_END;
4259         return 0;
4260 }
4261
4262 __extension__
4263 union tunnel_offload_mark {
4264         uint32_t val;
4265         struct {
4266                 uint32_t app_reserve:8;
4267                 uint32_t table_id:15;
4268                 uint32_t transfer:1;
4269                 uint32_t _unused_:8;
4270         };
4271 };
4272
4273 struct tunnel_default_miss_ctx {
4274         uint16_t *queue;
4275         __extension__
4276         union {
4277                 struct rte_flow_action_rss action_rss;
4278                 struct rte_flow_action_queue miss_queue;
4279                 struct rte_flow_action_jump miss_jump;
4280                 uint8_t raw[0];
4281         };
4282 };
4283
4284 static int
4285 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
4286                              struct rte_flow *flow,
4287                              const struct rte_flow_attr *attr,
4288                              const struct rte_flow_action *app_actions,
4289                              uint32_t flow_idx,
4290                              struct tunnel_default_miss_ctx *ctx,
4291                              struct rte_flow_error *error)
4292 {
4293         struct mlx5_priv *priv = dev->data->dev_private;
4294         struct mlx5_flow *dev_flow;
4295         struct rte_flow_attr miss_attr = *attr;
4296         const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
4297         const struct rte_flow_item miss_items[2] = {
4298                 {
4299                         .type = RTE_FLOW_ITEM_TYPE_ETH,
4300                         .spec = NULL,
4301                         .last = NULL,
4302                         .mask = NULL
4303                 },
4304                 {
4305                         .type = RTE_FLOW_ITEM_TYPE_END,
4306                         .spec = NULL,
4307                         .last = NULL,
4308                         .mask = NULL
4309                 }
4310         };
4311         union tunnel_offload_mark mark_id;
4312         struct rte_flow_action_mark miss_mark;
4313         struct rte_flow_action miss_actions[3] = {
4314                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
4315                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
4316         };
4317         const struct rte_flow_action_jump *jump_data;
4318         uint32_t i, flow_table = 0; /* prevent compilation warning */
4319         struct flow_grp_info grp_info = {
4320                 .external = 1,
4321                 .transfer = attr->transfer,
4322                 .fdb_def_rule = !!priv->fdb_def_rule,
4323                 .std_tbl_fix = 0,
4324         };
4325         int ret;
4326
4327         if (!attr->transfer) {
4328                 uint32_t q_size;
4329
4330                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
4331                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
4332                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
4333                                          0, SOCKET_ID_ANY);
4334                 if (!ctx->queue)
4335                         return rte_flow_error_set
4336                                 (error, ENOMEM,
4337                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4338                                 NULL, "invalid default miss RSS");
4339                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4340                 ctx->action_rss.level = 0,
4341                 ctx->action_rss.types = priv->rss_conf.rss_hf,
4342                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
4343                 ctx->action_rss.queue_num = priv->reta_idx_n,
4344                 ctx->action_rss.key = priv->rss_conf.rss_key,
4345                 ctx->action_rss.queue = ctx->queue;
4346                 if (!priv->reta_idx_n || !priv->rxqs_n)
4347                         return rte_flow_error_set
4348                                 (error, EINVAL,
4349                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4350                                 NULL, "invalid port configuration");
4351                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
4352                         ctx->action_rss.types = 0;
4353                 for (i = 0; i != priv->reta_idx_n; ++i)
4354                         ctx->queue[i] = (*priv->reta_idx)[i];
4355         } else {
4356                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
4357                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
4358         }
4359         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
4360         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
4361         jump_data = app_actions->conf;
4362         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
4363         miss_attr.group = jump_data->group;
4364         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
4365                                        &flow_table, grp_info, error);
4366         if (ret)
4367                 return rte_flow_error_set(error, EINVAL,
4368                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4369                                           NULL, "invalid tunnel id");
4370         mark_id.app_reserve = 0;
4371         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
4372         mark_id.transfer = !!attr->transfer;
4373         mark_id._unused_ = 0;
4374         miss_mark.id = mark_id.val;
4375         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
4376                                     miss_items, miss_actions, flow_idx, error);
4377         if (!dev_flow)
4378                 return -rte_errno;
4379         dev_flow->flow = flow;
4380         dev_flow->external = true;
4381         dev_flow->tunnel = tunnel;
4382         /* Subflow object was created, we must include one in the list. */
4383         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4384                       dev_flow->handle, next);
4385         DRV_LOG(DEBUG,
4386                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
4387                 dev->data->port_id, tunnel->app_tunnel.type,
4388                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
4389         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
4390                                   miss_actions, error);
4391         if (!ret)
4392                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
4393                                                   error);
4394
4395         return ret;
4396 }
4397
4398 /**
4399  * The last stage of splitting chain, just creates the subflow
4400  * without any modification.
4401  *
4402  * @param[in] dev
4403  *   Pointer to Ethernet device.
4404  * @param[in] flow
4405  *   Parent flow structure pointer.
4406  * @param[in, out] sub_flow
4407  *   Pointer to return the created subflow, may be NULL.
4408  * @param[in] prefix_layers
4409  *   Prefix subflow layers, may be 0.
4410  * @param[in] prefix_mark
4411  *   Prefix subflow mark flag, may be 0.
4412  * @param[in] attr
4413  *   Flow rule attributes.
4414  * @param[in] items
4415  *   Pattern specification (list terminated by the END pattern item).
4416  * @param[in] actions
4417  *   Associated actions (list terminated by the END action).
4418  * @param[in] external
4419  *   This flow rule is created by request external to PMD.
4420  * @param[in] flow_idx
4421  *   This memory pool index to the flow.
4422  * @param[out] error
4423  *   Perform verbose error reporting if not NULL.
4424  * @return
4425  *   0 on success, negative value otherwise
4426  */
4427 static int
4428 flow_create_split_inner(struct rte_eth_dev *dev,
4429                         struct rte_flow *flow,
4430                         struct mlx5_flow **sub_flow,
4431                         uint64_t prefix_layers,
4432                         uint32_t prefix_mark,
4433                         const struct rte_flow_attr *attr,
4434                         const struct rte_flow_item items[],
4435                         const struct rte_flow_action actions[],
4436                         bool external, uint32_t flow_idx,
4437                         struct rte_flow_error *error)
4438 {
4439         struct mlx5_flow *dev_flow;
4440
4441         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4442                 flow_idx, error);
4443         if (!dev_flow)
4444                 return -rte_errno;
4445         dev_flow->flow = flow;
4446         dev_flow->external = external;
4447         /* Subflow object was created, we must include one in the list. */
4448         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4449                       dev_flow->handle, next);
4450         /*
4451          * If dev_flow is as one of the suffix flow, some actions in suffix
4452          * flow may need some user defined item layer flags, and pass the
4453          * Metadate rxq mark flag to suffix flow as well.
4454          */
4455         if (prefix_layers)
4456                 dev_flow->handle->layers = prefix_layers;
4457         if (prefix_mark)
4458                 dev_flow->handle->mark = 1;
4459         if (sub_flow)
4460                 *sub_flow = dev_flow;
4461         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4462 }
4463
4464 /**
4465  * Split the meter flow.
4466  *
4467  * As meter flow will split to three sub flow, other than meter
4468  * action, the other actions make sense to only meter accepts
4469  * the packet. If it need to be dropped, no other additional
4470  * actions should be take.
4471  *
4472  * One kind of special action which decapsulates the L3 tunnel
4473  * header will be in the prefix sub flow, as not to take the
4474  * L3 tunnel header into account.
4475  *
4476  * @param dev
4477  *   Pointer to Ethernet device.
4478  * @param[in] items
4479  *   Pattern specification (list terminated by the END pattern item).
4480  * @param[out] sfx_items
4481  *   Suffix flow match items (list terminated by the END pattern item).
4482  * @param[in] actions
4483  *   Associated actions (list terminated by the END action).
4484  * @param[out] actions_sfx
4485  *   Suffix flow actions.
4486  * @param[out] actions_pre
4487  *   Prefix flow actions.
4488  * @param[out] pattern_sfx
4489  *   The pattern items for the suffix flow.
4490  * @param[out] tag_sfx
4491  *   Pointer to suffix flow tag.
4492  *
4493  * @return
4494  *   0 on success.
4495  */
4496 static int
4497 flow_meter_split_prep(struct rte_eth_dev *dev,
4498                  const struct rte_flow_item items[],
4499                  struct rte_flow_item sfx_items[],
4500                  const struct rte_flow_action actions[],
4501                  struct rte_flow_action actions_sfx[],
4502                  struct rte_flow_action actions_pre[])
4503 {
4504         struct rte_flow_action *tag_action = NULL;
4505         struct rte_flow_item *tag_item;
4506         struct mlx5_rte_flow_action_set_tag *set_tag;
4507         struct rte_flow_error error;
4508         const struct rte_flow_action_raw_encap *raw_encap;
4509         const struct rte_flow_action_raw_decap *raw_decap;
4510         struct mlx5_rte_flow_item_tag *tag_spec;
4511         struct mlx5_rte_flow_item_tag *tag_mask;
4512         uint32_t tag_id;
4513         bool copy_vlan = false;
4514
4515         /* Prepare the actions for prefix and suffix flow. */
4516         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4517                 struct rte_flow_action **action_cur = NULL;
4518
4519                 switch (actions->type) {
4520                 case RTE_FLOW_ACTION_TYPE_METER:
4521                         /* Add the extra tag action first. */
4522                         tag_action = actions_pre;
4523                         tag_action->type = (enum rte_flow_action_type)
4524                                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4525                         actions_pre++;
4526                         action_cur = &actions_pre;
4527                         break;
4528                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4529                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4530                         action_cur = &actions_pre;
4531                         break;
4532                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4533                         raw_encap = actions->conf;
4534                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4535                                 action_cur = &actions_pre;
4536                         break;
4537                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4538                         raw_decap = actions->conf;
4539                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4540                                 action_cur = &actions_pre;
4541                         break;
4542                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4543                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4544                         copy_vlan = true;
4545                         break;
4546                 default:
4547                         break;
4548                 }
4549                 if (!action_cur)
4550                         action_cur = &actions_sfx;
4551                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
4552                 (*action_cur)++;
4553         }
4554         /* Add end action to the actions. */
4555         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4556         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4557         actions_pre++;
4558         /* Set the tag. */
4559         set_tag = (void *)actions_pre;
4560         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4561         /*
4562          * Get the id from the qrss_pool to make qrss share the id with meter.
4563          */
4564         tag_id = flow_qrss_get_id(dev);
4565         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
4566         assert(tag_action);
4567         tag_action->conf = set_tag;
4568         /* Prepare the suffix subflow items. */
4569         tag_item = sfx_items++;
4570         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4571                 int item_type = items->type;
4572
4573                 switch (item_type) {
4574                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4575                         memcpy(sfx_items, items, sizeof(*sfx_items));
4576                         sfx_items++;
4577                         break;
4578                 case RTE_FLOW_ITEM_TYPE_VLAN:
4579                         if (copy_vlan) {
4580                                 memcpy(sfx_items, items, sizeof(*sfx_items));
4581                                 /*
4582                                  * Convert to internal match item, it is used
4583                                  * for vlan push and set vid.
4584                                  */
4585                                 sfx_items->type = (enum rte_flow_item_type)
4586                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4587                                 sfx_items++;
4588                         }
4589                         break;
4590                 default:
4591                         break;
4592                 }
4593         }
4594         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4595         sfx_items++;
4596         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4597         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
4598         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4599         tag_mask = tag_spec + 1;
4600         tag_mask->data = 0xffffff00;
4601         tag_item->type = (enum rte_flow_item_type)
4602                          MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4603         tag_item->spec = tag_spec;
4604         tag_item->last = NULL;
4605         tag_item->mask = tag_mask;
4606         return tag_id;
4607 }
4608
4609 /**
4610  * Split action list having QUEUE/RSS for metadata register copy.
4611  *
4612  * Once Q/RSS action is detected in user's action list, the flow action
4613  * should be split in order to copy metadata registers, which will happen in
4614  * RX_CP_TBL like,
4615  *   - CQE->flow_tag := reg_c[1] (MARK)
4616  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4617  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4618  * This is because the last action of each flow must be a terminal action
4619  * (QUEUE, RSS or DROP).
4620  *
4621  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4622  * stored and kept in the mlx5_flow structure per each sub_flow.
4623  *
4624  * The Q/RSS action is replaced with,
4625  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
4626  * And the following JUMP action is added at the end,
4627  *   - JUMP, to RX_CP_TBL.
4628  *
4629  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4630  * flow_create_split_metadata() routine. The flow will look like,
4631  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
4632  *
4633  * @param dev
4634  *   Pointer to Ethernet device.
4635  * @param[out] split_actions
4636  *   Pointer to store split actions to jump to CP_TBL.
4637  * @param[in] actions
4638  *   Pointer to the list of original flow actions.
4639  * @param[in] qrss
4640  *   Pointer to the Q/RSS action.
4641  * @param[in] actions_n
4642  *   Number of original actions.
4643  * @param[out] error
4644  *   Perform verbose error reporting if not NULL.
4645  *
4646  * @return
4647  *   non-zero unique flow_id on success, otherwise 0 and
4648  *   error/rte_error are set.
4649  */
4650 static uint32_t
4651 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4652                           struct rte_flow_action *split_actions,
4653                           const struct rte_flow_action *actions,
4654                           const struct rte_flow_action *qrss,
4655                           int actions_n, struct rte_flow_error *error)
4656 {
4657         struct mlx5_rte_flow_action_set_tag *set_tag;
4658         struct rte_flow_action_jump *jump;
4659         const int qrss_idx = qrss - actions;
4660         uint32_t flow_id = 0;
4661         int ret = 0;
4662
4663         /*
4664          * Given actions will be split
4665          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4666          * - Add jump to mreg CP_TBL.
4667          * As a result, there will be one more action.
4668          */
4669         ++actions_n;
4670         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4671         set_tag = (void *)(split_actions + actions_n);
4672         /*
4673          * If tag action is not set to void(it means we are not the meter
4674          * suffix flow), add the tag action. Since meter suffix flow already
4675          * has the tag added.
4676          */
4677         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4678                 /*
4679                  * Allocate the new subflow ID. This one is unique within
4680                  * device and not shared with representors. Otherwise,
4681                  * we would have to resolve multi-thread access synch
4682                  * issue. Each flow on the shared device is appended
4683                  * with source vport identifier, so the resulting
4684                  * flows will be unique in the shared (by master and
4685                  * representors) domain even if they have coinciding
4686                  * IDs.
4687                  */
4688                 flow_id = flow_qrss_get_id(dev);
4689                 if (!flow_id)
4690                         return rte_flow_error_set(error, ENOMEM,
4691                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4692                                                   NULL, "can't allocate id "
4693                                                   "for split Q/RSS subflow");
4694                 /* Internal SET_TAG action to set flow ID. */
4695                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4696                         .data = flow_id,
4697                 };
4698                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4699                 if (ret < 0)
4700                         return ret;
4701                 set_tag->id = ret;
4702                 /* Construct new actions array. */
4703                 /* Replace QUEUE/RSS action. */
4704                 split_actions[qrss_idx] = (struct rte_flow_action){
4705                         .type = (enum rte_flow_action_type)
4706                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4707                         .conf = set_tag,
4708                 };
4709         }
4710         /* JUMP action to jump to mreg copy table (CP_TBL). */
4711         jump = (void *)(set_tag + 1);
4712         *jump = (struct rte_flow_action_jump){
4713                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4714         };
4715         split_actions[actions_n - 2] = (struct rte_flow_action){
4716                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4717                 .conf = jump,
4718         };
4719         split_actions[actions_n - 1] = (struct rte_flow_action){
4720                 .type = RTE_FLOW_ACTION_TYPE_END,
4721         };
4722         return flow_id;
4723 }
4724
4725 /**
4726  * Extend the given action list for Tx metadata copy.
4727  *
4728  * Copy the given action list to the ext_actions and add flow metadata register
4729  * copy action in order to copy reg_a set by WQE to reg_c[0].
4730  *
4731  * @param[out] ext_actions
4732  *   Pointer to the extended action list.
4733  * @param[in] actions
4734  *   Pointer to the list of actions.
4735  * @param[in] actions_n
4736  *   Number of actions in the list.
4737  * @param[out] error
4738  *   Perform verbose error reporting if not NULL.
4739  * @param[in] encap_idx
4740  *   The encap action inndex.
4741  *
4742  * @return
4743  *   0 on success, negative value otherwise
4744  */
4745 static int
4746 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
4747                        struct rte_flow_action *ext_actions,
4748                        const struct rte_flow_action *actions,
4749                        int actions_n, struct rte_flow_error *error,
4750                        int encap_idx)
4751 {
4752         struct mlx5_flow_action_copy_mreg *cp_mreg =
4753                 (struct mlx5_flow_action_copy_mreg *)
4754                         (ext_actions + actions_n + 1);
4755         int ret;
4756
4757         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4758         if (ret < 0)
4759                 return ret;
4760         cp_mreg->dst = ret;
4761         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
4762         if (ret < 0)
4763                 return ret;
4764         cp_mreg->src = ret;
4765         if (encap_idx != 0)
4766                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
4767         if (encap_idx == actions_n - 1) {
4768                 ext_actions[actions_n - 1] = (struct rte_flow_action){
4769                         .type = (enum rte_flow_action_type)
4770                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4771                         .conf = cp_mreg,
4772                 };
4773                 ext_actions[actions_n] = (struct rte_flow_action){
4774                         .type = RTE_FLOW_ACTION_TYPE_END,
4775                 };
4776         } else {
4777                 ext_actions[encap_idx] = (struct rte_flow_action){
4778                         .type = (enum rte_flow_action_type)
4779                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4780                         .conf = cp_mreg,
4781                 };
4782                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
4783                                 sizeof(*ext_actions) * (actions_n - encap_idx));
4784         }
4785         return 0;
4786 }
4787
4788 /**
4789  * Check the match action from the action list.
4790  *
4791  * @param[in] actions
4792  *   Pointer to the list of actions.
4793  * @param[in] attr
4794  *   Flow rule attributes.
4795  * @param[in] action
4796  *   The action to be check if exist.
4797  * @param[out] match_action_pos
4798  *   Pointer to the position of the matched action if exists, otherwise is -1.
4799  * @param[out] qrss_action_pos
4800  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
4801  *
4802  * @return
4803  *   > 0 the total number of actions.
4804  *   0 if not found match action in action list.
4805  */
4806 static int
4807 flow_check_match_action(const struct rte_flow_action actions[],
4808                         const struct rte_flow_attr *attr,
4809                         enum rte_flow_action_type action,
4810                         int *match_action_pos, int *qrss_action_pos)
4811 {
4812         const struct rte_flow_action_sample *sample;
4813         int actions_n = 0;
4814         int jump_flag = 0;
4815         uint32_t ratio = 0;
4816         int sub_type = 0;
4817         int flag = 0;
4818
4819         *match_action_pos = -1;
4820         *qrss_action_pos = -1;
4821         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4822                 if (actions->type == action) {
4823                         flag = 1;
4824                         *match_action_pos = actions_n;
4825                 }
4826                 if (actions->type == RTE_FLOW_ACTION_TYPE_QUEUE ||
4827                     actions->type == RTE_FLOW_ACTION_TYPE_RSS)
4828                         *qrss_action_pos = actions_n;
4829                 if (actions->type == RTE_FLOW_ACTION_TYPE_JUMP)
4830                         jump_flag = 1;
4831                 if (actions->type == RTE_FLOW_ACTION_TYPE_SAMPLE) {
4832                         sample = actions->conf;
4833                         ratio = sample->ratio;
4834                         sub_type = ((const struct rte_flow_action *)
4835                                         (sample->actions))->type;
4836                 }
4837                 actions_n++;
4838         }
4839         if (flag && action == RTE_FLOW_ACTION_TYPE_SAMPLE && attr->transfer) {
4840                 if (ratio == 1) {
4841                         /* JUMP Action not support for Mirroring;
4842                          * Mirroring support multi-destination;
4843                          */
4844                         if (!jump_flag && sub_type != RTE_FLOW_ACTION_TYPE_END)
4845                                 flag = 0;
4846                 }
4847         }
4848         /* Count RTE_FLOW_ACTION_TYPE_END. */
4849         return flag ? actions_n + 1 : 0;
4850 }
4851
4852 #define SAMPLE_SUFFIX_ITEM 2
4853
4854 /**
4855  * Split the sample flow.
4856  *
4857  * As sample flow will split to two sub flow, sample flow with
4858  * sample action, the other actions will move to new suffix flow.
4859  *
4860  * Also add unique tag id with tag action in the sample flow,
4861  * the same tag id will be as match in the suffix flow.
4862  *
4863  * @param dev
4864  *   Pointer to Ethernet device.
4865  * @param[in] fdb_tx
4866  *   FDB egress flow flag.
4867  * @param[out] sfx_items
4868  *   Suffix flow match items (list terminated by the END pattern item).
4869  * @param[in] actions
4870  *   Associated actions (list terminated by the END action).
4871  * @param[out] actions_sfx
4872  *   Suffix flow actions.
4873  * @param[out] actions_pre
4874  *   Prefix flow actions.
4875  * @param[in] actions_n
4876  *  The total number of actions.
4877  * @param[in] sample_action_pos
4878  *   The sample action position.
4879  * @param[in] qrss_action_pos
4880  *   The Queue/RSS action position.
4881  * @param[out] error
4882  *   Perform verbose error reporting if not NULL.
4883  *
4884  * @return
4885  *   0 on success, or unique flow_id, a negative errno value
4886  *   otherwise and rte_errno is set.
4887  */
4888 static int
4889 flow_sample_split_prep(struct rte_eth_dev *dev,
4890                        uint32_t fdb_tx,
4891                        struct rte_flow_item sfx_items[],
4892                        const struct rte_flow_action actions[],
4893                        struct rte_flow_action actions_sfx[],
4894                        struct rte_flow_action actions_pre[],
4895                        int actions_n,
4896                        int sample_action_pos,
4897                        int qrss_action_pos,
4898                        struct rte_flow_error *error)
4899 {
4900         struct mlx5_rte_flow_action_set_tag *set_tag;
4901         struct mlx5_rte_flow_item_tag *tag_spec;
4902         struct mlx5_rte_flow_item_tag *tag_mask;
4903         uint32_t tag_id = 0;
4904         int index;
4905         int ret;
4906
4907         if (sample_action_pos < 0)
4908                 return rte_flow_error_set(error, EINVAL,
4909                                           RTE_FLOW_ERROR_TYPE_ACTION,
4910                                           NULL, "invalid position of sample "
4911                                           "action in list");
4912         if (!fdb_tx) {
4913                 /* Prepare the prefix tag action. */
4914                 set_tag = (void *)(actions_pre + actions_n + 1);
4915                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
4916                 if (ret < 0)
4917                         return ret;
4918                 set_tag->id = ret;
4919                 tag_id = flow_qrss_get_id(dev);
4920                 set_tag->data = tag_id;
4921                 /* Prepare the suffix subflow items. */
4922                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
4923                 tag_spec->data = tag_id;
4924                 tag_spec->id = set_tag->id;
4925                 tag_mask = tag_spec + 1;
4926                 tag_mask->data = UINT32_MAX;
4927                 sfx_items[0] = (struct rte_flow_item){
4928                         .type = (enum rte_flow_item_type)
4929                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4930                         .spec = tag_spec,
4931                         .last = NULL,
4932                         .mask = tag_mask,
4933                 };
4934                 sfx_items[1] = (struct rte_flow_item){
4935                         .type = (enum rte_flow_item_type)
4936                                 RTE_FLOW_ITEM_TYPE_END,
4937                 };
4938         }
4939         /* Prepare the actions for prefix and suffix flow. */
4940         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
4941                 index = qrss_action_pos;
4942                 /* Put the preceding the Queue/RSS action into prefix flow. */
4943                 if (index != 0)
4944                         memcpy(actions_pre, actions,
4945                                sizeof(struct rte_flow_action) * index);
4946                 /* Put others preceding the sample action into prefix flow. */
4947                 if (sample_action_pos > index + 1)
4948                         memcpy(actions_pre + index, actions + index + 1,
4949                                sizeof(struct rte_flow_action) *
4950                                (sample_action_pos - index - 1));
4951                 index = sample_action_pos - 1;
4952                 /* Put Queue/RSS action into Suffix flow. */
4953                 memcpy(actions_sfx, actions + qrss_action_pos,
4954                        sizeof(struct rte_flow_action));
4955                 actions_sfx++;
4956         } else {
4957                 index = sample_action_pos;
4958                 if (index != 0)
4959                         memcpy(actions_pre, actions,
4960                                sizeof(struct rte_flow_action) * index);
4961         }
4962         /* Add the extra tag action for NIC-RX and E-Switch ingress. */
4963         if (!fdb_tx) {
4964                 actions_pre[index++] =
4965                         (struct rte_flow_action){
4966                         .type = (enum rte_flow_action_type)
4967                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4968                         .conf = set_tag,
4969                 };
4970         }
4971         memcpy(actions_pre + index, actions + sample_action_pos,
4972                sizeof(struct rte_flow_action));
4973         index += 1;
4974         actions_pre[index] = (struct rte_flow_action){
4975                 .type = (enum rte_flow_action_type)
4976                         RTE_FLOW_ACTION_TYPE_END,
4977         };
4978         /* Put the actions after sample into Suffix flow. */
4979         memcpy(actions_sfx, actions + sample_action_pos + 1,
4980                sizeof(struct rte_flow_action) *
4981                (actions_n - sample_action_pos - 1));
4982         return tag_id;
4983 }
4984
4985 /**
4986  * The splitting for metadata feature.
4987  *
4988  * - Q/RSS action on NIC Rx should be split in order to pass by
4989  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
4990  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
4991  *
4992  * - All the actions on NIC Tx should have a mreg copy action to
4993  *   copy reg_a from WQE to reg_c[0].
4994  *
4995  * @param dev
4996  *   Pointer to Ethernet device.
4997  * @param[in] flow
4998  *   Parent flow structure pointer.
4999  * @param[in] prefix_layers
5000  *   Prefix flow layer flags.
5001  * @param[in] prefix_mark
5002  *   Prefix subflow mark flag, may be 0.
5003  * @param[in] attr
5004  *   Flow rule attributes.
5005  * @param[in] items
5006  *   Pattern specification (list terminated by the END pattern item).
5007  * @param[in] actions
5008  *   Associated actions (list terminated by the END action).
5009  * @param[in] external
5010  *   This flow rule is created by request external to PMD.
5011  * @param[in] flow_idx
5012  *   This memory pool index to the flow.
5013  * @param[out] error
5014  *   Perform verbose error reporting if not NULL.
5015  * @return
5016  *   0 on success, negative value otherwise
5017  */
5018 static int
5019 flow_create_split_metadata(struct rte_eth_dev *dev,
5020                            struct rte_flow *flow,
5021                            uint64_t prefix_layers,
5022                            uint32_t prefix_mark,
5023                            const struct rte_flow_attr *attr,
5024                            const struct rte_flow_item items[],
5025                            const struct rte_flow_action actions[],
5026                            bool external, uint32_t flow_idx,
5027                            struct rte_flow_error *error)
5028 {
5029         struct mlx5_priv *priv = dev->data->dev_private;
5030         struct mlx5_dev_config *config = &priv->config;
5031         const struct rte_flow_action *qrss = NULL;
5032         struct rte_flow_action *ext_actions = NULL;
5033         struct mlx5_flow *dev_flow = NULL;
5034         uint32_t qrss_id = 0;
5035         int mtr_sfx = 0;
5036         size_t act_size;
5037         int actions_n;
5038         int encap_idx;
5039         int ret;
5040
5041         /* Check whether extensive metadata feature is engaged. */
5042         if (!config->dv_flow_en ||
5043             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5044             !mlx5_flow_ext_mreg_supported(dev))
5045                 return flow_create_split_inner(dev, flow, NULL, prefix_layers,
5046                                                prefix_mark, attr, items,
5047                                                actions, external, flow_idx,
5048                                                error);
5049         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5050                                                            &encap_idx);
5051         if (qrss) {
5052                 /* Exclude hairpin flows from splitting. */
5053                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5054                         const struct rte_flow_action_queue *queue;
5055
5056                         queue = qrss->conf;
5057                         if (mlx5_rxq_get_type(dev, queue->index) ==
5058                             MLX5_RXQ_TYPE_HAIRPIN)
5059                                 qrss = NULL;
5060                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5061                         const struct rte_flow_action_rss *rss;
5062
5063                         rss = qrss->conf;
5064                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5065                             MLX5_RXQ_TYPE_HAIRPIN)
5066                                 qrss = NULL;
5067                 }
5068         }
5069         if (qrss) {
5070                 /* Check if it is in meter suffix table. */
5071                 mtr_sfx = attr->group == (attr->transfer ?
5072                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
5073                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
5074                 /*
5075                  * Q/RSS action on NIC Rx should be split in order to pass by
5076                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5077                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5078                  */
5079                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5080                            sizeof(struct rte_flow_action_set_tag) +
5081                            sizeof(struct rte_flow_action_jump);
5082                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5083                                           SOCKET_ID_ANY);
5084                 if (!ext_actions)
5085                         return rte_flow_error_set(error, ENOMEM,
5086                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5087                                                   NULL, "no memory to split "
5088                                                   "metadata flow");
5089                 /*
5090                  * If we are the suffix flow of meter, tag already exist.
5091                  * Set the tag action to void.
5092                  */
5093                 if (mtr_sfx)
5094                         ext_actions[qrss - actions].type =
5095                                                 RTE_FLOW_ACTION_TYPE_VOID;
5096                 else
5097                         ext_actions[qrss - actions].type =
5098                                                 (enum rte_flow_action_type)
5099                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5100                 /*
5101                  * Create the new actions list with removed Q/RSS action
5102                  * and appended set tag and jump to register copy table
5103                  * (RX_CP_TBL). We should preallocate unique tag ID here
5104                  * in advance, because it is needed for set tag action.
5105                  */
5106                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5107                                                     qrss, actions_n, error);
5108                 if (!mtr_sfx && !qrss_id) {
5109                         ret = -rte_errno;
5110                         goto exit;
5111                 }
5112         } else if (attr->egress && !attr->transfer) {
5113                 /*
5114                  * All the actions on NIC Tx should have a metadata register
5115                  * copy action to copy reg_a from WQE to reg_c[meta]
5116                  */
5117                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5118                            sizeof(struct mlx5_flow_action_copy_mreg);
5119                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5120                                           SOCKET_ID_ANY);
5121                 if (!ext_actions)
5122                         return rte_flow_error_set(error, ENOMEM,
5123                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5124                                                   NULL, "no memory to split "
5125                                                   "metadata flow");
5126                 /* Create the action list appended with copy register. */
5127                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5128                                              actions_n, error, encap_idx);
5129                 if (ret < 0)
5130                         goto exit;
5131         }
5132         /* Add the unmodified original or prefix subflow. */
5133         ret = flow_create_split_inner(dev, flow, &dev_flow, prefix_layers,
5134                                       prefix_mark, attr,
5135                                       items, ext_actions ? ext_actions :
5136                                       actions, external, flow_idx, error);
5137         if (ret < 0)
5138                 goto exit;
5139         MLX5_ASSERT(dev_flow);
5140         if (qrss) {
5141                 const struct rte_flow_attr q_attr = {
5142                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5143                         .ingress = 1,
5144                 };
5145                 /* Internal PMD action to set register. */
5146                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5147                         .data = qrss_id,
5148                         .id = REG_NON,
5149                 };
5150                 struct rte_flow_item q_items[] = {
5151                         {
5152                                 .type = (enum rte_flow_item_type)
5153                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5154                                 .spec = &q_tag_spec,
5155                                 .last = NULL,
5156                                 .mask = NULL,
5157                         },
5158                         {
5159                                 .type = RTE_FLOW_ITEM_TYPE_END,
5160                         },
5161                 };
5162                 struct rte_flow_action q_actions[] = {
5163                         {
5164                                 .type = qrss->type,
5165                                 .conf = qrss->conf,
5166                         },
5167                         {
5168                                 .type = RTE_FLOW_ACTION_TYPE_END,
5169                         },
5170                 };
5171                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5172
5173                 /*
5174                  * Configure the tag item only if there is no meter subflow.
5175                  * Since tag is already marked in the meter suffix subflow
5176                  * we can just use the meter suffix items as is.
5177                  */
5178                 if (qrss_id) {
5179                         /* Not meter subflow. */
5180                         MLX5_ASSERT(!mtr_sfx);
5181                         /*
5182                          * Put unique id in prefix flow due to it is destroyed
5183                          * after suffix flow and id will be freed after there
5184                          * is no actual flows with this id and identifier
5185                          * reallocation becomes possible (for example, for
5186                          * other flows in other threads).
5187                          */
5188                         dev_flow->handle->split_flow_id = qrss_id;
5189                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5190                                                    error);
5191                         if (ret < 0)
5192                                 goto exit;
5193                         q_tag_spec.id = ret;
5194                 }
5195                 dev_flow = NULL;
5196                 /* Add suffix subflow to execute Q/RSS. */
5197                 ret = flow_create_split_inner(dev, flow, &dev_flow, layers, 0,
5198                                               &q_attr, mtr_sfx ? items :
5199                                               q_items, q_actions,
5200                                               external, flow_idx, error);
5201                 if (ret < 0)
5202                         goto exit;
5203                 /* qrss ID should be freed if failed. */
5204                 qrss_id = 0;
5205                 MLX5_ASSERT(dev_flow);
5206         }
5207
5208 exit:
5209         /*
5210          * We do not destroy the partially created sub_flows in case of error.
5211          * These ones are included into parent flow list and will be destroyed
5212          * by flow_drv_destroy.
5213          */
5214         flow_qrss_free_id(dev, qrss_id);
5215         mlx5_free(ext_actions);
5216         return ret;
5217 }
5218
5219 /**
5220  * The splitting for meter feature.
5221  *
5222  * - The meter flow will be split to two flows as prefix and
5223  *   suffix flow. The packets make sense only it pass the prefix
5224  *   meter action.
5225  *
5226  * - Reg_C_5 is used for the packet to match betweend prefix and
5227  *   suffix flow.
5228  *
5229  * @param dev
5230  *   Pointer to Ethernet device.
5231  * @param[in] flow
5232  *   Parent flow structure pointer.
5233  * @param[in] prefix_layers
5234  *   Prefix subflow layers, may be 0.
5235  * @param[in] prefix_mark
5236  *   Prefix subflow mark flag, may be 0.
5237  * @param[in] attr
5238  *   Flow rule attributes.
5239  * @param[in] items
5240  *   Pattern specification (list terminated by the END pattern item).
5241  * @param[in] actions
5242  *   Associated actions (list terminated by the END action).
5243  * @param[in] external
5244  *   This flow rule is created by request external to PMD.
5245  * @param[in] flow_idx
5246  *   This memory pool index to the flow.
5247  * @param[out] error
5248  *   Perform verbose error reporting if not NULL.
5249  * @return
5250  *   0 on success, negative value otherwise
5251  */
5252 static int
5253 flow_create_split_meter(struct rte_eth_dev *dev,
5254                         struct rte_flow *flow,
5255                         uint64_t prefix_layers,
5256                         uint32_t prefix_mark,
5257                         const struct rte_flow_attr *attr,
5258                         const struct rte_flow_item items[],
5259                         const struct rte_flow_action actions[],
5260                         bool external, uint32_t flow_idx,
5261                         struct rte_flow_error *error)
5262 {
5263         struct mlx5_priv *priv = dev->data->dev_private;
5264         struct rte_flow_action *sfx_actions = NULL;
5265         struct rte_flow_action *pre_actions = NULL;
5266         struct rte_flow_item *sfx_items = NULL;
5267         struct mlx5_flow *dev_flow = NULL;
5268         struct rte_flow_attr sfx_attr = *attr;
5269         uint32_t mtr = 0;
5270         uint32_t mtr_tag_id = 0;
5271         size_t act_size;
5272         size_t item_size;
5273         int actions_n = 0;
5274         int ret;
5275
5276         if (priv->mtr_en)
5277                 actions_n = flow_check_meter_action(actions, &mtr);
5278         if (mtr) {
5279                 /* The five prefix actions: meter, decap, encap, tag, end. */
5280                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
5281                            sizeof(struct mlx5_rte_flow_action_set_tag);
5282                 /* tag, vlan, port id, end. */
5283 #define METER_SUFFIX_ITEM 4
5284                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5285                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5286                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5287                                           0, SOCKET_ID_ANY);
5288                 if (!sfx_actions)
5289                         return rte_flow_error_set(error, ENOMEM,
5290                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5291                                                   NULL, "no memory to split "
5292                                                   "meter flow");
5293                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5294                              act_size);
5295                 pre_actions = sfx_actions + actions_n;
5296                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
5297                                                    actions, sfx_actions,
5298                                                    pre_actions);
5299                 if (!mtr_tag_id) {
5300                         ret = -rte_errno;
5301                         goto exit;
5302                 }
5303                 /* Add the prefix subflow. */
5304                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5305                                               prefix_layers, 0,
5306                                               attr, items,
5307                                               pre_actions, external,
5308                                               flow_idx, error);
5309                 if (ret) {
5310                         ret = -rte_errno;
5311                         goto exit;
5312                 }
5313                 dev_flow->handle->split_flow_id = mtr_tag_id;
5314                 /* Setting the sfx group atrr. */
5315                 sfx_attr.group = sfx_attr.transfer ?
5316                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
5317                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
5318         }
5319         /* Add the prefix subflow. */
5320         ret = flow_create_split_metadata(dev, flow, dev_flow ?
5321                                          flow_get_prefix_layer_flags(dev_flow) :
5322                                          prefix_layers, dev_flow ?
5323                                          dev_flow->handle->mark : prefix_mark,
5324                                          &sfx_attr, sfx_items ?
5325                                          sfx_items : items,
5326                                          sfx_actions ? sfx_actions : actions,
5327                                          external, flow_idx, error);
5328 exit:
5329         if (sfx_actions)
5330                 mlx5_free(sfx_actions);
5331         return ret;
5332 }
5333
5334 /**
5335  * The splitting for sample feature.
5336  *
5337  * Once Sample action is detected in the action list, the flow actions should
5338  * be split into prefix sub flow and suffix sub flow.
5339  *
5340  * The original items remain in the prefix sub flow, all actions preceding the
5341  * sample action and the sample action itself will be copied to the prefix
5342  * sub flow, the actions following the sample action will be copied to the
5343  * suffix sub flow, Queue action always be located in the suffix sub flow.
5344  *
5345  * In order to make the packet from prefix sub flow matches with suffix sub
5346  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5347  * flow uses tag item with the unique flow id.
5348  *
5349  * @param dev
5350  *   Pointer to Ethernet device.
5351  * @param[in] flow
5352  *   Parent flow structure pointer.
5353  * @param[in] attr
5354  *   Flow rule attributes.
5355  * @param[in] items
5356  *   Pattern specification (list terminated by the END pattern item).
5357  * @param[in] actions
5358  *   Associated actions (list terminated by the END action).
5359  * @param[in] external
5360  *   This flow rule is created by request external to PMD.
5361  * @param[in] flow_idx
5362  *   This memory pool index to the flow.
5363  * @param[out] error
5364  *   Perform verbose error reporting if not NULL.
5365  * @return
5366  *   0 on success, negative value otherwise
5367  */
5368 static int
5369 flow_create_split_sample(struct rte_eth_dev *dev,
5370                          struct rte_flow *flow,
5371                          const struct rte_flow_attr *attr,
5372                          const struct rte_flow_item items[],
5373                          const struct rte_flow_action actions[],
5374                          bool external, uint32_t flow_idx,
5375                          struct rte_flow_error *error)
5376 {
5377         struct mlx5_priv *priv = dev->data->dev_private;
5378         struct rte_flow_action *sfx_actions = NULL;
5379         struct rte_flow_action *pre_actions = NULL;
5380         struct rte_flow_item *sfx_items = NULL;
5381         struct mlx5_flow *dev_flow = NULL;
5382         struct rte_flow_attr sfx_attr = *attr;
5383 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5384         struct mlx5_flow_dv_sample_resource *sample_res;
5385         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5386         struct mlx5_flow_tbl_resource *sfx_tbl;
5387         union mlx5_flow_tbl_key sfx_table_key;
5388 #endif
5389         size_t act_size;
5390         size_t item_size;
5391         uint32_t fdb_tx = 0;
5392         int32_t tag_id = 0;
5393         int actions_n = 0;
5394         int sample_action_pos;
5395         int qrss_action_pos;
5396         int ret = 0;
5397
5398         if (priv->sampler_en)
5399                 actions_n = flow_check_match_action(actions, attr,
5400                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5401                                         &sample_action_pos, &qrss_action_pos);
5402         if (actions_n) {
5403                 /* The prefix actions must includes sample, tag, end. */
5404                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5405                            + sizeof(struct mlx5_rte_flow_action_set_tag);
5406                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5407                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5408                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5409                                           item_size), 0, SOCKET_ID_ANY);
5410                 if (!sfx_actions)
5411                         return rte_flow_error_set(error, ENOMEM,
5412                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5413                                                   NULL, "no memory to split "
5414                                                   "sample flow");
5415                 /* The representor_id is -1 for uplink. */
5416                 fdb_tx = (attr->transfer && priv->representor_id != -1);
5417                 if (!fdb_tx)
5418                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5419                                         + act_size);
5420                 pre_actions = sfx_actions + actions_n;
5421                 tag_id = flow_sample_split_prep(dev, fdb_tx, sfx_items,
5422                                                 actions, sfx_actions,
5423                                                 pre_actions, actions_n,
5424                                                 sample_action_pos,
5425                                                 qrss_action_pos, error);
5426                 if (tag_id < 0 || (!fdb_tx && !tag_id)) {
5427                         ret = -rte_errno;
5428                         goto exit;
5429                 }
5430                 /* Add the prefix subflow. */
5431                 ret = flow_create_split_inner(dev, flow, &dev_flow, 0, 0, attr,
5432                                               items, pre_actions, external,
5433                                               flow_idx, error);
5434                 if (ret) {
5435                         ret = -rte_errno;
5436                         goto exit;
5437                 }
5438                 dev_flow->handle->split_flow_id = tag_id;
5439 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5440                 /* Set the sfx group attr. */
5441                 sample_res = (struct mlx5_flow_dv_sample_resource *)
5442                                         dev_flow->dv.sample_res;
5443                 sfx_tbl = (struct mlx5_flow_tbl_resource *)
5444                                         sample_res->normal_path_tbl;
5445                 sfx_tbl_data = container_of(sfx_tbl,
5446                                         struct mlx5_flow_tbl_data_entry, tbl);
5447                 sfx_table_key.v64 = sfx_tbl_data->entry.key;
5448                 sfx_attr.group = sfx_attr.transfer ?
5449                                         (sfx_table_key.table_id - 1) :
5450                                          sfx_table_key.table_id;
5451 #endif
5452         }
5453         /* Add the suffix subflow. */
5454         ret = flow_create_split_meter(dev, flow, dev_flow ?
5455                                  flow_get_prefix_layer_flags(dev_flow) : 0,
5456                                  dev_flow ? dev_flow->handle->mark : 0,
5457                                  &sfx_attr, sfx_items ? sfx_items : items,
5458                                  sfx_actions ? sfx_actions : actions,
5459                                  external, flow_idx, error);
5460 exit:
5461         if (sfx_actions)
5462                 mlx5_free(sfx_actions);
5463         return ret;
5464 }
5465
5466 /**
5467  * Split the flow to subflow set. The splitters might be linked
5468  * in the chain, like this:
5469  * flow_create_split_outer() calls:
5470  *   flow_create_split_meter() calls:
5471  *     flow_create_split_metadata(meter_subflow_0) calls:
5472  *       flow_create_split_inner(metadata_subflow_0)
5473  *       flow_create_split_inner(metadata_subflow_1)
5474  *       flow_create_split_inner(metadata_subflow_2)
5475  *     flow_create_split_metadata(meter_subflow_1) calls:
5476  *       flow_create_split_inner(metadata_subflow_0)
5477  *       flow_create_split_inner(metadata_subflow_1)
5478  *       flow_create_split_inner(metadata_subflow_2)
5479  *
5480  * This provide flexible way to add new levels of flow splitting.
5481  * The all of successfully created subflows are included to the
5482  * parent flow dev_flow list.
5483  *
5484  * @param dev
5485  *   Pointer to Ethernet device.
5486  * @param[in] flow
5487  *   Parent flow structure pointer.
5488  * @param[in] attr
5489  *   Flow rule attributes.
5490  * @param[in] items
5491  *   Pattern specification (list terminated by the END pattern item).
5492  * @param[in] actions
5493  *   Associated actions (list terminated by the END action).
5494  * @param[in] external
5495  *   This flow rule is created by request external to PMD.
5496  * @param[in] flow_idx
5497  *   This memory pool index to the flow.
5498  * @param[out] error
5499  *   Perform verbose error reporting if not NULL.
5500  * @return
5501  *   0 on success, negative value otherwise
5502  */
5503 static int
5504 flow_create_split_outer(struct rte_eth_dev *dev,
5505                         struct rte_flow *flow,
5506                         const struct rte_flow_attr *attr,
5507                         const struct rte_flow_item items[],
5508                         const struct rte_flow_action actions[],
5509                         bool external, uint32_t flow_idx,
5510                         struct rte_flow_error *error)
5511 {
5512         int ret;
5513
5514         ret = flow_create_split_sample(dev, flow, attr, items,
5515                                        actions, external, flow_idx, error);
5516         MLX5_ASSERT(ret <= 0);
5517         return ret;
5518 }
5519
5520 static struct mlx5_flow_tunnel *
5521 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5522                       const struct rte_flow_attr *attr,
5523                       const struct rte_flow_item items[],
5524                       const struct rte_flow_action actions[])
5525 {
5526         struct mlx5_flow_tunnel *tunnel;
5527
5528 #pragma GCC diagnostic push
5529 #pragma GCC diagnostic ignored "-Wcast-qual"
5530         if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5531                 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5532         else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5533                 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5534         else
5535                 tunnel = NULL;
5536 #pragma GCC diagnostic pop
5537
5538         return tunnel;
5539 }
5540
5541 /**
5542  * Adjust flow RSS workspace if needed.
5543  *
5544  * @param wks
5545  *   Pointer to thread flow work space.
5546  * @param rss_desc
5547  *   Pointer to RSS descriptor.
5548  * @param[in] nrssq_num
5549  *   New RSS queue number.
5550  *
5551  * @return
5552  *   0 on success, -1 otherwise and rte_errno is set.
5553  */
5554 static int
5555 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
5556                           struct mlx5_flow_rss_desc *rss_desc,
5557                           uint32_t nrssq_num)
5558 {
5559         bool fidx = !!wks->flow_idx;
5560
5561         if (likely(nrssq_num <= wks->rssq_num[fidx]))
5562                 return 0;
5563         rss_desc->queue = realloc(rss_desc->queue,
5564                           sizeof(rss_desc->queue[0]) * RTE_ALIGN(nrssq_num, 2));
5565         if (!rss_desc->queue) {
5566                 rte_errno = ENOMEM;
5567                 return -1;
5568         }
5569         wks->rssq_num[fidx] = RTE_ALIGN(nrssq_num, 2);
5570         return 0;
5571 }
5572
5573 /**
5574  * Create a flow and add it to @p list.
5575  *
5576  * @param dev
5577  *   Pointer to Ethernet device.
5578  * @param list
5579  *   Pointer to a TAILQ flow list. If this parameter NULL,
5580  *   no list insertion occurred, flow is just created,
5581  *   this is caller's responsibility to track the
5582  *   created flow.
5583  * @param[in] attr
5584  *   Flow rule attributes.
5585  * @param[in] items
5586  *   Pattern specification (list terminated by the END pattern item).
5587  * @param[in] actions
5588  *   Associated actions (list terminated by the END action).
5589  * @param[in] external
5590  *   This flow rule is created by request external to PMD.
5591  * @param[out] error
5592  *   Perform verbose error reporting if not NULL.
5593  *
5594  * @return
5595  *   A flow index on success, 0 otherwise and rte_errno is set.
5596  */
5597 static uint32_t
5598 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
5599                  const struct rte_flow_attr *attr,
5600                  const struct rte_flow_item items[],
5601                  const struct rte_flow_action original_actions[],
5602                  bool external, struct rte_flow_error *error)
5603 {
5604         struct mlx5_priv *priv = dev->data->dev_private;
5605         struct rte_flow *flow = NULL;
5606         struct mlx5_flow *dev_flow;
5607         const struct rte_flow_action_rss *rss;
5608         struct mlx5_translated_shared_action
5609                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5610         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5611         union {
5612                 struct mlx5_flow_expand_rss buf;
5613                 uint8_t buffer[2048];
5614         } expand_buffer;
5615         union {
5616                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5617                 uint8_t buffer[2048];
5618         } actions_rx;
5619         union {
5620                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5621                 uint8_t buffer[2048];
5622         } actions_hairpin_tx;
5623         union {
5624                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
5625                 uint8_t buffer[2048];
5626         } items_tx;
5627         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
5628         struct mlx5_flow_rss_desc *rss_desc;
5629         const struct rte_flow_action *p_actions_rx;
5630         uint32_t i;
5631         uint32_t idx = 0;
5632         int hairpin_flow;
5633         uint32_t hairpin_id = 0;
5634         struct rte_flow_attr attr_tx = { .priority = 0 };
5635         struct rte_flow_attr attr_factor = {0};
5636         const struct rte_flow_action *actions;
5637         struct rte_flow_action *translated_actions = NULL;
5638         struct mlx5_flow_tunnel *tunnel;
5639         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
5640         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5641         bool fidx = !!wks->flow_idx;
5642         int ret;
5643
5644         MLX5_ASSERT(wks);
5645         rss_desc = &wks->rss_desc[fidx];
5646         ret = flow_shared_actions_translate(original_actions,
5647                                             shared_actions,
5648                                             &shared_actions_n,
5649                                             &translated_actions, error);
5650         if (ret < 0) {
5651                 MLX5_ASSERT(translated_actions == NULL);
5652                 return 0;
5653         }
5654         actions = translated_actions ? translated_actions : original_actions;
5655         memcpy((void *)&attr_factor, (const void *)attr, sizeof(*attr));
5656         p_actions_rx = actions;
5657         hairpin_flow = flow_check_hairpin_split(dev, &attr_factor, actions);
5658         ret = flow_drv_validate(dev, &attr_factor, items, p_actions_rx,
5659                                 external, hairpin_flow, error);
5660         if (ret < 0)
5661                 goto error_before_hairpin_split;
5662         if (hairpin_flow > 0) {
5663                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
5664                         rte_errno = EINVAL;
5665                         goto error_before_hairpin_split;
5666                 }
5667                 flow_hairpin_split(dev, actions, actions_rx.actions,
5668                                    actions_hairpin_tx.actions, items_tx.items,
5669                                    &hairpin_id);
5670                 p_actions_rx = actions_rx.actions;
5671         }
5672         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
5673         if (!flow) {
5674                 rte_errno = ENOMEM;
5675                 goto error_before_flow;
5676         }
5677         flow->drv_type = flow_get_drv_type(dev, &attr_factor);
5678         if (hairpin_id != 0)
5679                 flow->hairpin_flow_id = hairpin_id;
5680         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
5681                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
5682         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
5683         rss = flow_get_rss_action(p_actions_rx);
5684         if (rss) {
5685                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
5686                         return 0;
5687                 /*
5688                  * The following information is required by
5689                  * mlx5_flow_hashfields_adjust() in advance.
5690                  */
5691                 rss_desc->level = rss->level;
5692                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
5693                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
5694         }
5695         flow->dev_handles = 0;
5696         if (rss && rss->types) {
5697                 unsigned int graph_root;
5698
5699                 graph_root = find_graph_root(items, rss->level);
5700                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
5701                                            items, rss->types,
5702                                            mlx5_support_expansion, graph_root);
5703                 MLX5_ASSERT(ret > 0 &&
5704                        (unsigned int)ret < sizeof(expand_buffer.buffer));
5705         } else {
5706                 buf->entries = 1;
5707                 buf->entry[0].pattern = (void *)(uintptr_t)items;
5708         }
5709         flow->shared_rss = flow_get_shared_rss_action(shared_actions,
5710                                                       shared_actions_n);
5711         /*
5712          * Record the start index when there is a nested call. All sub-flows
5713          * need to be translated before another calling.
5714          * No need to use ping-pong buffer to save memory here.
5715          */
5716         if (fidx) {
5717                 MLX5_ASSERT(!wks->flow_nested_idx);
5718                 wks->flow_nested_idx = fidx;
5719         }
5720         for (i = 0; i < buf->entries; ++i) {
5721                 /*
5722                  * The splitter may create multiple dev_flows,
5723                  * depending on configuration. In the simplest
5724                  * case it just creates unmodified original flow.
5725                  */
5726                 ret = flow_create_split_outer(dev, flow, &attr_factor,
5727                                               buf->entry[i].pattern,
5728                                               p_actions_rx, external, idx,
5729                                               error);
5730                 if (ret < 0)
5731                         goto error;
5732                 if (is_flow_tunnel_steer_rule(dev, attr,
5733                                               buf->entry[i].pattern,
5734                                               p_actions_rx)) {
5735                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
5736                                                            p_actions_rx,
5737                                                            idx,
5738                                                            &default_miss_ctx,
5739                                                            error);
5740                         if (ret < 0) {
5741                                 mlx5_free(default_miss_ctx.queue);
5742                                 goto error;
5743                         }
5744                 }
5745         }
5746         /* Create the tx flow. */
5747         if (hairpin_flow) {
5748                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
5749                 attr_tx.ingress = 0;
5750                 attr_tx.egress = 1;
5751                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
5752                                          actions_hairpin_tx.actions,
5753                                          idx, error);
5754                 if (!dev_flow)
5755                         goto error;
5756                 dev_flow->flow = flow;
5757                 dev_flow->external = 0;
5758                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
5759                               dev_flow->handle, next);
5760                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
5761                                          items_tx.items,
5762                                          actions_hairpin_tx.actions, error);
5763                 if (ret < 0)
5764                         goto error;
5765         }
5766         /*
5767          * Update the metadata register copy table. If extensive
5768          * metadata feature is enabled and registers are supported
5769          * we might create the extra rte_flow for each unique
5770          * MARK/FLAG action ID.
5771          *
5772          * The table is updated for ingress Flows only, because
5773          * the egress Flows belong to the different device and
5774          * copy table should be updated in peer NIC Rx domain.
5775          */
5776         if (attr_factor.ingress &&
5777             (external || attr_factor.group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
5778                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
5779                 if (ret)
5780                         goto error;
5781         }
5782         /*
5783          * If the flow is external (from application) OR device is started, then
5784          * the flow will be applied immediately.
5785          */
5786         if (external || dev->data->dev_started) {
5787                 ret = flow_drv_apply(dev, flow, error);
5788                 if (ret < 0)
5789                         goto error;
5790         }
5791         if (list)
5792                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
5793                              flow, next);
5794         flow_rxq_flags_set(dev, flow);
5795         rte_free(translated_actions);
5796         /* Nested flow creation index recovery. */
5797         wks->flow_idx = wks->flow_nested_idx;
5798         if (wks->flow_nested_idx)
5799                 wks->flow_nested_idx = 0;
5800         tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
5801         if (tunnel) {
5802                 flow->tunnel = 1;
5803                 flow->tunnel_id = tunnel->tunnel_id;
5804                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
5805                 mlx5_free(default_miss_ctx.queue);
5806         }
5807         return idx;
5808 error:
5809         MLX5_ASSERT(flow);
5810         ret = rte_errno; /* Save rte_errno before cleanup. */
5811         flow_mreg_del_copy_action(dev, flow);
5812         flow_drv_destroy(dev, flow);
5813         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
5814         rte_errno = ret; /* Restore rte_errno. */
5815 error_before_flow:
5816         ret = rte_errno;
5817         if (hairpin_id)
5818                 mlx5_flow_id_release(priv->sh->flow_id_pool,
5819                                      hairpin_id);
5820         rte_errno = ret;
5821         wks->flow_idx = wks->flow_nested_idx;
5822         if (wks->flow_nested_idx)
5823                 wks->flow_nested_idx = 0;
5824 error_before_hairpin_split:
5825         rte_free(translated_actions);
5826         return 0;
5827 }
5828
5829 /**
5830  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
5831  * incoming packets to table 1.
5832  *
5833  * Other flow rules, requested for group n, will be created in
5834  * e-switch table n+1.
5835  * Jump action to e-switch group n will be created to group n+1.
5836  *
5837  * Used when working in switchdev mode, to utilise advantages of table 1
5838  * and above.
5839  *
5840  * @param dev
5841  *   Pointer to Ethernet device.
5842  *
5843  * @return
5844  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
5845  */
5846 struct rte_flow *
5847 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
5848 {
5849         const struct rte_flow_attr attr = {
5850                 .group = 0,
5851                 .priority = 0,
5852                 .ingress = 1,
5853                 .egress = 0,
5854                 .transfer = 1,
5855         };
5856         const struct rte_flow_item pattern = {
5857                 .type = RTE_FLOW_ITEM_TYPE_END,
5858         };
5859         struct rte_flow_action_jump jump = {
5860                 .group = 1,
5861         };
5862         const struct rte_flow_action actions[] = {
5863                 {
5864                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
5865                         .conf = &jump,
5866                 },
5867                 {
5868                         .type = RTE_FLOW_ACTION_TYPE_END,
5869                 },
5870         };
5871         struct mlx5_priv *priv = dev->data->dev_private;
5872         struct rte_flow_error error;
5873
5874         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
5875                                                    &attr, &pattern,
5876                                                    actions, false, &error);
5877 }
5878
5879 /**
5880  * Validate a flow supported by the NIC.
5881  *
5882  * @see rte_flow_validate()
5883  * @see rte_flow_ops
5884  */
5885 int
5886 mlx5_flow_validate(struct rte_eth_dev *dev,
5887                    const struct rte_flow_attr *attr,
5888                    const struct rte_flow_item items[],
5889                    const struct rte_flow_action original_actions[],
5890                    struct rte_flow_error *error)
5891 {
5892         int hairpin_flow;
5893         struct mlx5_translated_shared_action
5894                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5895         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5896         const struct rte_flow_action *actions;
5897         struct rte_flow_action *translated_actions = NULL;
5898         int ret = flow_shared_actions_translate(original_actions,
5899                                                 shared_actions,
5900                                                 &shared_actions_n,
5901                                                 &translated_actions, error);
5902
5903         if (ret)
5904                 return ret;
5905         actions = translated_actions ? translated_actions : original_actions;
5906         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5907         ret = flow_drv_validate(dev, attr, items, actions,
5908                                 true, hairpin_flow, error);
5909         rte_free(translated_actions);
5910         return ret;
5911 }
5912
5913 /**
5914  * Create a flow.
5915  *
5916  * @see rte_flow_create()
5917  * @see rte_flow_ops
5918  */
5919 struct rte_flow *
5920 mlx5_flow_create(struct rte_eth_dev *dev,
5921                  const struct rte_flow_attr *attr,
5922                  const struct rte_flow_item items[],
5923                  const struct rte_flow_action actions[],
5924                  struct rte_flow_error *error)
5925 {
5926         struct mlx5_priv *priv = dev->data->dev_private;
5927
5928         /*
5929          * If the device is not started yet, it is not allowed to created a
5930          * flow from application. PMD default flows and traffic control flows
5931          * are not affected.
5932          */
5933         if (unlikely(!dev->data->dev_started)) {
5934                 DRV_LOG(DEBUG, "port %u is not started when "
5935                         "inserting a flow", dev->data->port_id);
5936                 rte_flow_error_set(error, ENODEV,
5937                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5938                                    NULL,
5939                                    "port not started");
5940                 return NULL;
5941         }
5942
5943         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
5944                                   attr, items, actions, true, error);
5945 }
5946
5947 /**
5948  * Destroy a flow in a list.
5949  *
5950  * @param dev
5951  *   Pointer to Ethernet device.
5952  * @param list
5953  *   Pointer to the Indexed flow list. If this parameter NULL,
5954  *   there is no flow removal from the list. Be noted that as
5955  *   flow is add to the indexed list, memory of the indexed
5956  *   list points to maybe changed as flow destroyed.
5957  * @param[in] flow_idx
5958  *   Index of flow to destroy.
5959  */
5960 static void
5961 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
5962                   uint32_t flow_idx)
5963 {
5964         struct mlx5_priv *priv = dev->data->dev_private;
5965         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
5966         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
5967                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
5968
5969         if (!flow)
5970                 return;
5971         /*
5972          * Update RX queue flags only if port is started, otherwise it is
5973          * already clean.
5974          */
5975         if (dev->data->dev_started)
5976                 flow_rxq_flags_trim(dev, flow);
5977         if (flow->hairpin_flow_id)
5978                 mlx5_flow_id_release(priv->sh->flow_id_pool,
5979                                      flow->hairpin_flow_id);
5980         flow_drv_destroy(dev, flow);
5981         if (list)
5982                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
5983                              flow_idx, flow, next);
5984         flow_mreg_del_copy_action(dev, flow);
5985         if (flow->fdir) {
5986                 LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) {
5987                         if (priv_fdir_flow->rix_flow == flow_idx)
5988                                 break;
5989                 }
5990                 if (priv_fdir_flow) {
5991                         LIST_REMOVE(priv_fdir_flow, next);
5992                         mlx5_free(priv_fdir_flow->fdir);
5993                         mlx5_free(priv_fdir_flow);
5994                 }
5995         }
5996         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
5997         if (flow->tunnel) {
5998                 struct mlx5_flow_tunnel *tunnel;
5999                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6000                 RTE_VERIFY(tunnel);
6001                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6002                         mlx5_flow_tunnel_free(dev, tunnel);
6003         }
6004 }
6005
6006 /**
6007  * Destroy all flows.
6008  *
6009  * @param dev
6010  *   Pointer to Ethernet device.
6011  * @param list
6012  *   Pointer to the Indexed flow list.
6013  * @param active
6014  *   If flushing is called avtively.
6015  */
6016 void
6017 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
6018 {
6019         uint32_t num_flushed = 0;
6020
6021         while (*list) {
6022                 flow_list_destroy(dev, list, *list);
6023                 num_flushed++;
6024         }
6025         if (active) {
6026                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6027                         dev->data->port_id, num_flushed);
6028         }
6029 }
6030
6031 /**
6032  * Remove all flows.
6033  *
6034  * @param dev
6035  *   Pointer to Ethernet device.
6036  * @param list
6037  *   Pointer to the Indexed flow list.
6038  */
6039 void
6040 mlx5_flow_stop(struct rte_eth_dev *dev, uint32_t *list)
6041 {
6042         struct mlx5_priv *priv = dev->data->dev_private;
6043         struct rte_flow *flow = NULL;
6044         uint32_t idx;
6045
6046         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], *list, idx,
6047                       flow, next) {
6048                 flow_drv_remove(dev, flow);
6049                 flow_mreg_stop_copy_action(dev, flow);
6050         }
6051         flow_mreg_del_default_copy_action(dev);
6052         flow_rxq_flags_clear(dev);
6053 }
6054
6055 /**
6056  * Add all flows.
6057  *
6058  * @param dev
6059  *   Pointer to Ethernet device.
6060  * @param list
6061  *   Pointer to the Indexed flow list.
6062  *
6063  * @return
6064  *   0 on success, a negative errno value otherwise and rte_errno is set.
6065  */
6066 int
6067 mlx5_flow_start(struct rte_eth_dev *dev, uint32_t *list)
6068 {
6069         struct mlx5_priv *priv = dev->data->dev_private;
6070         struct rte_flow *flow = NULL;
6071         struct rte_flow_error error;
6072         uint32_t idx;
6073         int ret = 0;
6074
6075         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6076         ret = flow_mreg_add_default_copy_action(dev, &error);
6077         if (ret < 0)
6078                 return -rte_errno;
6079         /* Apply Flows created by application. */
6080         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], *list, idx,
6081                       flow, next) {
6082                 ret = flow_mreg_start_copy_action(dev, flow);
6083                 if (ret < 0)
6084                         goto error;
6085                 ret = flow_drv_apply(dev, flow, &error);
6086                 if (ret < 0)
6087                         goto error;
6088                 flow_rxq_flags_set(dev, flow);
6089         }
6090         return 0;
6091 error:
6092         ret = rte_errno; /* Save rte_errno before cleanup. */
6093         mlx5_flow_stop(dev, list);
6094         rte_errno = ret; /* Restore rte_errno. */
6095         return -rte_errno;
6096 }
6097
6098 /**
6099  * Stop all default actions for flows.
6100  *
6101  * @param dev
6102  *   Pointer to Ethernet device.
6103  */
6104 void
6105 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6106 {
6107         flow_mreg_del_default_copy_action(dev);
6108         flow_rxq_flags_clear(dev);
6109 }
6110
6111 /**
6112  * Start all default actions for flows.
6113  *
6114  * @param dev
6115  *   Pointer to Ethernet device.
6116  * @return
6117  *   0 on success, a negative errno value otherwise and rte_errno is set.
6118  */
6119 int
6120 mlx5_flow_start_default(struct rte_eth_dev *dev)
6121 {
6122         struct rte_flow_error error;
6123
6124         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6125         return flow_mreg_add_default_copy_action(dev, &error);
6126 }
6127
6128 /**
6129  * Release key of thread specific flow workspace data.
6130  */
6131 static void
6132 flow_release_workspace(void *data)
6133 {
6134         struct mlx5_flow_workspace *wks = data;
6135
6136         if (!wks)
6137                 return;
6138         free(wks->rss_desc[0].queue);
6139         free(wks->rss_desc[1].queue);
6140         free(wks);
6141 }
6142
6143 /**
6144  * Initialize key of thread specific flow workspace data.
6145  */
6146 static void
6147 flow_alloc_workspace(void)
6148 {
6149         if (pthread_key_create(&key_workspace, flow_release_workspace))
6150                 DRV_LOG(ERR, "Can't create flow workspace data thread key.");
6151 }
6152
6153 /**
6154  * Get thread specific flow workspace.
6155  *
6156  * @return pointer to thread specific flowworkspace data, NULL on error.
6157  */
6158 struct mlx5_flow_workspace*
6159 mlx5_flow_get_thread_workspace(void)
6160 {
6161         struct mlx5_flow_workspace *data;
6162
6163         if (pthread_once(&key_workspace_init, flow_alloc_workspace)) {
6164                 DRV_LOG(ERR, "Failed to init flow workspace data thread key.");
6165                 return NULL;
6166         }
6167         data = pthread_getspecific(key_workspace);
6168         if (!data) {
6169                 data = calloc(1, sizeof(*data));
6170                 if (!data) {
6171                         DRV_LOG(ERR, "Failed to allocate flow workspace "
6172                                 "memory.");
6173                         return NULL;
6174                 }
6175                 data->rss_desc[0].queue = calloc(1,
6176                                 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6177                 if (!data->rss_desc[0].queue)
6178                         goto err;
6179                 data->rss_desc[1].queue = calloc(1,
6180                                 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6181                 if (!data->rss_desc[1].queue)
6182                         goto err;
6183                 data->rssq_num[0] = MLX5_RSSQ_DEFAULT_NUM;
6184                 data->rssq_num[1] = MLX5_RSSQ_DEFAULT_NUM;
6185                 if (pthread_setspecific(key_workspace, data)) {
6186                         DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6187                         goto err;
6188                 }
6189         }
6190         return data;
6191 err:
6192         if (data->rss_desc[0].queue)
6193                 free(data->rss_desc[0].queue);
6194         if (data->rss_desc[1].queue)
6195                 free(data->rss_desc[1].queue);
6196         free(data);
6197         return NULL;
6198 }
6199
6200 /**
6201  * Verify the flow list is empty
6202  *
6203  * @param dev
6204  *  Pointer to Ethernet device.
6205  *
6206  * @return the number of flows not released.
6207  */
6208 int
6209 mlx5_flow_verify(struct rte_eth_dev *dev)
6210 {
6211         struct mlx5_priv *priv = dev->data->dev_private;
6212         struct rte_flow *flow;
6213         uint32_t idx;
6214         int ret = 0;
6215
6216         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
6217                       flow, next) {
6218                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
6219                         dev->data->port_id, (void *)flow);
6220                 ++ret;
6221         }
6222         return ret;
6223 }
6224
6225 /**
6226  * Enable default hairpin egress flow.
6227  *
6228  * @param dev
6229  *   Pointer to Ethernet device.
6230  * @param queue
6231  *   The queue index.
6232  *
6233  * @return
6234  *   0 on success, a negative errno value otherwise and rte_errno is set.
6235  */
6236 int
6237 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6238                             uint32_t queue)
6239 {
6240         struct mlx5_priv *priv = dev->data->dev_private;
6241         const struct rte_flow_attr attr = {
6242                 .egress = 1,
6243                 .priority = 0,
6244         };
6245         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6246                 .queue = queue,
6247         };
6248         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6249                 .queue = UINT32_MAX,
6250         };
6251         struct rte_flow_item items[] = {
6252                 {
6253                         .type = (enum rte_flow_item_type)
6254                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6255                         .spec = &queue_spec,
6256                         .last = NULL,
6257                         .mask = &queue_mask,
6258                 },
6259                 {
6260                         .type = RTE_FLOW_ITEM_TYPE_END,
6261                 },
6262         };
6263         struct rte_flow_action_jump jump = {
6264                 .group = MLX5_HAIRPIN_TX_TABLE,
6265         };
6266         struct rte_flow_action actions[2];
6267         uint32_t flow_idx;
6268         struct rte_flow_error error;
6269
6270         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6271         actions[0].conf = &jump;
6272         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6273         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6274                                 &attr, items, actions, false, &error);
6275         if (!flow_idx) {
6276                 DRV_LOG(DEBUG,
6277                         "Failed to create ctrl flow: rte_errno(%d),"
6278                         " type(%d), message(%s)",
6279                         rte_errno, error.type,
6280                         error.message ? error.message : " (no stated reason)");
6281                 return -rte_errno;
6282         }
6283         return 0;
6284 }
6285
6286 /**
6287  * Enable a control flow configured from the control plane.
6288  *
6289  * @param dev
6290  *   Pointer to Ethernet device.
6291  * @param eth_spec
6292  *   An Ethernet flow spec to apply.
6293  * @param eth_mask
6294  *   An Ethernet flow mask to apply.
6295  * @param vlan_spec
6296  *   A VLAN flow spec to apply.
6297  * @param vlan_mask
6298  *   A VLAN flow mask to apply.
6299  *
6300  * @return
6301  *   0 on success, a negative errno value otherwise and rte_errno is set.
6302  */
6303 int
6304 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6305                     struct rte_flow_item_eth *eth_spec,
6306                     struct rte_flow_item_eth *eth_mask,
6307                     struct rte_flow_item_vlan *vlan_spec,
6308                     struct rte_flow_item_vlan *vlan_mask)
6309 {
6310         struct mlx5_priv *priv = dev->data->dev_private;
6311         const struct rte_flow_attr attr = {
6312                 .ingress = 1,
6313                 .priority = MLX5_FLOW_PRIO_RSVD,
6314         };
6315         struct rte_flow_item items[] = {
6316                 {
6317                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6318                         .spec = eth_spec,
6319                         .last = NULL,
6320                         .mask = eth_mask,
6321                 },
6322                 {
6323                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6324                                               RTE_FLOW_ITEM_TYPE_END,
6325                         .spec = vlan_spec,
6326                         .last = NULL,
6327                         .mask = vlan_mask,
6328                 },
6329                 {
6330                         .type = RTE_FLOW_ITEM_TYPE_END,
6331                 },
6332         };
6333         uint16_t queue[priv->reta_idx_n];
6334         struct rte_flow_action_rss action_rss = {
6335                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6336                 .level = 0,
6337                 .types = priv->rss_conf.rss_hf,
6338                 .key_len = priv->rss_conf.rss_key_len,
6339                 .queue_num = priv->reta_idx_n,
6340                 .key = priv->rss_conf.rss_key,
6341                 .queue = queue,
6342         };
6343         struct rte_flow_action actions[] = {
6344                 {
6345                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6346                         .conf = &action_rss,
6347                 },
6348                 {
6349                         .type = RTE_FLOW_ACTION_TYPE_END,
6350                 },
6351         };
6352         uint32_t flow_idx;
6353         struct rte_flow_error error;
6354         unsigned int i;
6355
6356         if (!priv->reta_idx_n || !priv->rxqs_n) {
6357                 return 0;
6358         }
6359         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6360                 action_rss.types = 0;
6361         for (i = 0; i != priv->reta_idx_n; ++i)
6362                 queue[i] = (*priv->reta_idx)[i];
6363         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6364                                 &attr, items, actions, false, &error);
6365         if (!flow_idx)
6366                 return -rte_errno;
6367         return 0;
6368 }
6369
6370 /**
6371  * Enable a flow control configured from the control plane.
6372  *
6373  * @param dev
6374  *   Pointer to Ethernet device.
6375  * @param eth_spec
6376  *   An Ethernet flow spec to apply.
6377  * @param eth_mask
6378  *   An Ethernet flow mask to apply.
6379  *
6380  * @return
6381  *   0 on success, a negative errno value otherwise and rte_errno is set.
6382  */
6383 int
6384 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6385                struct rte_flow_item_eth *eth_spec,
6386                struct rte_flow_item_eth *eth_mask)
6387 {
6388         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6389 }
6390
6391 /**
6392  * Create default miss flow rule matching lacp traffic
6393  *
6394  * @param dev
6395  *   Pointer to Ethernet device.
6396  * @param eth_spec
6397  *   An Ethernet flow spec to apply.
6398  *
6399  * @return
6400  *   0 on success, a negative errno value otherwise and rte_errno is set.
6401  */
6402 int
6403 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6404 {
6405         struct mlx5_priv *priv = dev->data->dev_private;
6406         /*
6407          * The LACP matching is done by only using ether type since using
6408          * a multicast dst mac causes kernel to give low priority to this flow.
6409          */
6410         static const struct rte_flow_item_eth lacp_spec = {
6411                 .type = RTE_BE16(0x8809),
6412         };
6413         static const struct rte_flow_item_eth lacp_mask = {
6414                 .type = 0xffff,
6415         };
6416         const struct rte_flow_attr attr = {
6417                 .ingress = 1,
6418         };
6419         struct rte_flow_item items[] = {
6420                 {
6421                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6422                         .spec = &lacp_spec,
6423                         .mask = &lacp_mask,
6424                 },
6425                 {
6426                         .type = RTE_FLOW_ITEM_TYPE_END,
6427                 },
6428         };
6429         struct rte_flow_action actions[] = {
6430                 {
6431                         .type = (enum rte_flow_action_type)
6432                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6433                 },
6434                 {
6435                         .type = RTE_FLOW_ACTION_TYPE_END,
6436                 },
6437         };
6438         struct rte_flow_error error;
6439         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6440                                 &attr, items, actions, false, &error);
6441
6442         if (!flow_idx)
6443                 return -rte_errno;
6444         return 0;
6445 }
6446
6447 /**
6448  * Destroy a flow.
6449  *
6450  * @see rte_flow_destroy()
6451  * @see rte_flow_ops
6452  */
6453 int
6454 mlx5_flow_destroy(struct rte_eth_dev *dev,
6455                   struct rte_flow *flow,
6456                   struct rte_flow_error *error __rte_unused)
6457 {
6458         struct mlx5_priv *priv = dev->data->dev_private;
6459
6460         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6461         return 0;
6462 }
6463
6464 /**
6465  * Destroy all flows.
6466  *
6467  * @see rte_flow_flush()
6468  * @see rte_flow_ops
6469  */
6470 int
6471 mlx5_flow_flush(struct rte_eth_dev *dev,
6472                 struct rte_flow_error *error __rte_unused)
6473 {
6474         struct mlx5_priv *priv = dev->data->dev_private;
6475
6476         mlx5_flow_list_flush(dev, &priv->flows, false);
6477         return 0;
6478 }
6479
6480 /**
6481  * Isolated mode.
6482  *
6483  * @see rte_flow_isolate()
6484  * @see rte_flow_ops
6485  */
6486 int
6487 mlx5_flow_isolate(struct rte_eth_dev *dev,
6488                   int enable,
6489                   struct rte_flow_error *error)
6490 {
6491         struct mlx5_priv *priv = dev->data->dev_private;
6492
6493         if (dev->data->dev_started) {
6494                 rte_flow_error_set(error, EBUSY,
6495                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6496                                    NULL,
6497                                    "port must be stopped first");
6498                 return -rte_errno;
6499         }
6500         priv->isolated = !!enable;
6501         if (enable)
6502                 dev->dev_ops = &mlx5_os_dev_ops_isolate;
6503         else
6504                 dev->dev_ops = &mlx5_os_dev_ops;
6505
6506         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6507         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6508
6509         return 0;
6510 }
6511
6512 /**
6513  * Query a flow.
6514  *
6515  * @see rte_flow_query()
6516  * @see rte_flow_ops
6517  */
6518 static int
6519 flow_drv_query(struct rte_eth_dev *dev,
6520                uint32_t flow_idx,
6521                const struct rte_flow_action *actions,
6522                void *data,
6523                struct rte_flow_error *error)
6524 {
6525         struct mlx5_priv *priv = dev->data->dev_private;
6526         const struct mlx5_flow_driver_ops *fops;
6527         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6528                                                [MLX5_IPOOL_RTE_FLOW],
6529                                                flow_idx);
6530         enum mlx5_flow_drv_type ftype;
6531
6532         if (!flow) {
6533                 return rte_flow_error_set(error, ENOENT,
6534                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6535                           NULL,
6536                           "invalid flow handle");
6537         }
6538         ftype = flow->drv_type;
6539         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6540         fops = flow_get_drv_ops(ftype);
6541
6542         return fops->query(dev, flow, actions, data, error);
6543 }
6544
6545 /**
6546  * Query a flow.
6547  *
6548  * @see rte_flow_query()
6549  * @see rte_flow_ops
6550  */
6551 int
6552 mlx5_flow_query(struct rte_eth_dev *dev,
6553                 struct rte_flow *flow,
6554                 const struct rte_flow_action *actions,
6555                 void *data,
6556                 struct rte_flow_error *error)
6557 {
6558         int ret;
6559
6560         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6561                              error);
6562         if (ret < 0)
6563                 return ret;
6564         return 0;
6565 }
6566
6567 /**
6568  * Convert a flow director filter to a generic flow.
6569  *
6570  * @param dev
6571  *   Pointer to Ethernet device.
6572  * @param fdir_filter
6573  *   Flow director filter to add.
6574  * @param attributes
6575  *   Generic flow parameters structure.
6576  *
6577  * @return
6578  *   0 on success, a negative errno value otherwise and rte_errno is set.
6579  */
6580 static int
6581 flow_fdir_filter_convert(struct rte_eth_dev *dev,
6582                          const struct rte_eth_fdir_filter *fdir_filter,
6583                          struct mlx5_fdir *attributes)
6584 {
6585         struct mlx5_priv *priv = dev->data->dev_private;
6586         const struct rte_eth_fdir_input *input = &fdir_filter->input;
6587         const struct rte_eth_fdir_masks *mask =
6588                 &dev->data->dev_conf.fdir_conf.mask;
6589
6590         /* Validate queue number. */
6591         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
6592                 DRV_LOG(ERR, "port %u invalid queue number %d",
6593                         dev->data->port_id, fdir_filter->action.rx_queue);
6594                 rte_errno = EINVAL;
6595                 return -rte_errno;
6596         }
6597         attributes->attr.ingress = 1;
6598         attributes->items[0] = (struct rte_flow_item) {
6599                 .type = RTE_FLOW_ITEM_TYPE_ETH,
6600                 .spec = &attributes->l2,
6601                 .mask = &attributes->l2_mask,
6602         };
6603         switch (fdir_filter->action.behavior) {
6604         case RTE_ETH_FDIR_ACCEPT:
6605                 attributes->actions[0] = (struct rte_flow_action){
6606                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
6607                         .conf = &attributes->queue,
6608                 };
6609                 break;
6610         case RTE_ETH_FDIR_REJECT:
6611                 attributes->actions[0] = (struct rte_flow_action){
6612                         .type = RTE_FLOW_ACTION_TYPE_DROP,
6613                 };
6614                 break;
6615         default:
6616                 DRV_LOG(ERR, "port %u invalid behavior %d",
6617                         dev->data->port_id,
6618                         fdir_filter->action.behavior);
6619                 rte_errno = ENOTSUP;
6620                 return -rte_errno;
6621         }
6622         attributes->queue.index = fdir_filter->action.rx_queue;
6623         /* Handle L3. */
6624         switch (fdir_filter->input.flow_type) {
6625         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
6626         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
6627         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
6628                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
6629                         .src_addr = input->flow.ip4_flow.src_ip,
6630                         .dst_addr = input->flow.ip4_flow.dst_ip,
6631                         .time_to_live = input->flow.ip4_flow.ttl,
6632                         .type_of_service = input->flow.ip4_flow.tos,
6633                 };
6634                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
6635                         .src_addr = mask->ipv4_mask.src_ip,
6636                         .dst_addr = mask->ipv4_mask.dst_ip,
6637                         .time_to_live = mask->ipv4_mask.ttl,
6638                         .type_of_service = mask->ipv4_mask.tos,
6639                         .next_proto_id = mask->ipv4_mask.proto,
6640                 };
6641                 attributes->items[1] = (struct rte_flow_item){
6642                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
6643                         .spec = &attributes->l3,
6644                         .mask = &attributes->l3_mask,
6645                 };
6646                 break;
6647         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
6648         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
6649         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
6650                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
6651                         .hop_limits = input->flow.ipv6_flow.hop_limits,
6652                         .proto = input->flow.ipv6_flow.proto,
6653                 };
6654
6655                 memcpy(attributes->l3.ipv6.hdr.src_addr,
6656                        input->flow.ipv6_flow.src_ip,
6657                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
6658                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
6659                        input->flow.ipv6_flow.dst_ip,
6660                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
6661                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
6662                        mask->ipv6_mask.src_ip,
6663                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
6664                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
6665                        mask->ipv6_mask.dst_ip,
6666                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
6667                 attributes->items[1] = (struct rte_flow_item){
6668                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
6669                         .spec = &attributes->l3,
6670                         .mask = &attributes->l3_mask,
6671                 };
6672                 break;
6673         default:
6674                 DRV_LOG(ERR, "port %u invalid flow type%d",
6675                         dev->data->port_id, fdir_filter->input.flow_type);
6676                 rte_errno = ENOTSUP;
6677                 return -rte_errno;
6678         }
6679         /* Handle L4. */
6680         switch (fdir_filter->input.flow_type) {
6681         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
6682                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
6683                         .src_port = input->flow.udp4_flow.src_port,
6684                         .dst_port = input->flow.udp4_flow.dst_port,
6685                 };
6686                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
6687                         .src_port = mask->src_port_mask,
6688                         .dst_port = mask->dst_port_mask,
6689                 };
6690                 attributes->items[2] = (struct rte_flow_item){
6691                         .type = RTE_FLOW_ITEM_TYPE_UDP,
6692                         .spec = &attributes->l4,
6693                         .mask = &attributes->l4_mask,
6694                 };
6695                 break;
6696         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
6697                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
6698                         .src_port = input->flow.tcp4_flow.src_port,
6699                         .dst_port = input->flow.tcp4_flow.dst_port,
6700                 };
6701                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
6702                         .src_port = mask->src_port_mask,
6703                         .dst_port = mask->dst_port_mask,
6704                 };
6705                 attributes->items[2] = (struct rte_flow_item){
6706                         .type = RTE_FLOW_ITEM_TYPE_TCP,
6707                         .spec = &attributes->l4,
6708                         .mask = &attributes->l4_mask,
6709                 };
6710                 break;
6711         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
6712                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
6713                         .src_port = input->flow.udp6_flow.src_port,
6714                         .dst_port = input->flow.udp6_flow.dst_port,
6715                 };
6716                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
6717                         .src_port = mask->src_port_mask,
6718                         .dst_port = mask->dst_port_mask,
6719                 };
6720                 attributes->items[2] = (struct rte_flow_item){
6721                         .type = RTE_FLOW_ITEM_TYPE_UDP,
6722                         .spec = &attributes->l4,
6723                         .mask = &attributes->l4_mask,
6724                 };
6725                 break;
6726         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
6727                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
6728                         .src_port = input->flow.tcp6_flow.src_port,
6729                         .dst_port = input->flow.tcp6_flow.dst_port,
6730                 };
6731                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
6732                         .src_port = mask->src_port_mask,
6733                         .dst_port = mask->dst_port_mask,
6734                 };
6735                 attributes->items[2] = (struct rte_flow_item){
6736                         .type = RTE_FLOW_ITEM_TYPE_TCP,
6737                         .spec = &attributes->l4,
6738                         .mask = &attributes->l4_mask,
6739                 };
6740                 break;
6741         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
6742         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
6743                 break;
6744         default:
6745                 DRV_LOG(ERR, "port %u invalid flow type%d",
6746                         dev->data->port_id, fdir_filter->input.flow_type);
6747                 rte_errno = ENOTSUP;
6748                 return -rte_errno;
6749         }
6750         return 0;
6751 }
6752
6753 #define FLOW_FDIR_CMP(f1, f2, fld) \
6754         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
6755
6756 /**
6757  * Compare two FDIR flows. If items and actions are identical, the two flows are
6758  * regarded as same.
6759  *
6760  * @param dev
6761  *   Pointer to Ethernet device.
6762  * @param f1
6763  *   FDIR flow to compare.
6764  * @param f2
6765  *   FDIR flow to compare.
6766  *
6767  * @return
6768  *   Zero on match, 1 otherwise.
6769  */
6770 static int
6771 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
6772 {
6773         if (FLOW_FDIR_CMP(f1, f2, attr) ||
6774             FLOW_FDIR_CMP(f1, f2, l2) ||
6775             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
6776             FLOW_FDIR_CMP(f1, f2, l3) ||
6777             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
6778             FLOW_FDIR_CMP(f1, f2, l4) ||
6779             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
6780             FLOW_FDIR_CMP(f1, f2, actions[0].type))
6781                 return 1;
6782         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
6783             FLOW_FDIR_CMP(f1, f2, queue))
6784                 return 1;
6785         return 0;
6786 }
6787
6788 /**
6789  * Search device flow list to find out a matched FDIR flow.
6790  *
6791  * @param dev
6792  *   Pointer to Ethernet device.
6793  * @param fdir_flow
6794  *   FDIR flow to lookup.
6795  *
6796  * @return
6797  *   Index of flow if found, 0 otherwise.
6798  */
6799 static uint32_t
6800 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
6801 {
6802         struct mlx5_priv *priv = dev->data->dev_private;
6803         uint32_t flow_idx = 0;
6804         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
6805
6806         MLX5_ASSERT(fdir_flow);
6807         LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) {
6808                 if (!flow_fdir_cmp(priv_fdir_flow->fdir, fdir_flow)) {
6809                         DRV_LOG(DEBUG, "port %u found FDIR flow %u",
6810                                 dev->data->port_id, flow_idx);
6811                         flow_idx = priv_fdir_flow->rix_flow;
6812                         break;
6813                 }
6814         }
6815         return flow_idx;
6816 }
6817
6818 /**
6819  * Add new flow director filter and store it in list.
6820  *
6821  * @param dev
6822  *   Pointer to Ethernet device.
6823  * @param fdir_filter
6824  *   Flow director filter to add.
6825  *
6826  * @return
6827  *   0 on success, a negative errno value otherwise and rte_errno is set.
6828  */
6829 static int
6830 flow_fdir_filter_add(struct rte_eth_dev *dev,
6831                      const struct rte_eth_fdir_filter *fdir_filter)
6832 {
6833         struct mlx5_priv *priv = dev->data->dev_private;
6834         struct mlx5_fdir *fdir_flow;
6835         struct rte_flow *flow;
6836         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
6837         uint32_t flow_idx;
6838         int ret;
6839
6840         fdir_flow = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*fdir_flow), 0,
6841                                 SOCKET_ID_ANY);
6842         if (!fdir_flow) {
6843                 rte_errno = ENOMEM;
6844                 return -rte_errno;
6845         }
6846         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
6847         if (ret)
6848                 goto error;
6849         flow_idx = flow_fdir_filter_lookup(dev, fdir_flow);
6850         if (flow_idx) {
6851                 rte_errno = EEXIST;
6852                 goto error;
6853         }
6854         priv_fdir_flow = mlx5_malloc(MLX5_MEM_ZERO,
6855                                      sizeof(struct mlx5_fdir_flow),
6856                                      0, SOCKET_ID_ANY);
6857         if (!priv_fdir_flow) {
6858                 rte_errno = ENOMEM;
6859                 goto error;
6860         }
6861         flow_idx = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
6862                                     fdir_flow->items, fdir_flow->actions, true,
6863                                     NULL);
6864         flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
6865         if (!flow)
6866                 goto error;
6867         flow->fdir = 1;
6868         priv_fdir_flow->fdir = fdir_flow;
6869         priv_fdir_flow->rix_flow = flow_idx;
6870         LIST_INSERT_HEAD(&priv->fdir_flows, priv_fdir_flow, next);
6871         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
6872                 dev->data->port_id, (void *)flow);
6873         return 0;
6874 error:
6875         mlx5_free(priv_fdir_flow);
6876         mlx5_free(fdir_flow);
6877         return -rte_errno;
6878 }
6879
6880 /**
6881  * Delete specific filter.
6882  *
6883  * @param dev
6884  *   Pointer to Ethernet device.
6885  * @param fdir_filter
6886  *   Filter to be deleted.
6887  *
6888  * @return
6889  *   0 on success, a negative errno value otherwise and rte_errno is set.
6890  */
6891 static int
6892 flow_fdir_filter_delete(struct rte_eth_dev *dev,
6893                         const struct rte_eth_fdir_filter *fdir_filter)
6894 {
6895         struct mlx5_priv *priv = dev->data->dev_private;
6896         uint32_t flow_idx;
6897         struct mlx5_fdir fdir_flow = {
6898                 .attr.group = 0,
6899         };
6900         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
6901         int ret;
6902
6903         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
6904         if (ret)
6905                 return -rte_errno;
6906         LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) {
6907                 /* Find the fdir in priv list */
6908                 if (!flow_fdir_cmp(priv_fdir_flow->fdir, &fdir_flow))
6909                         break;
6910         }
6911         if (!priv_fdir_flow)
6912                 return 0;
6913         LIST_REMOVE(priv_fdir_flow, next);
6914         flow_idx = priv_fdir_flow->rix_flow;
6915         flow_list_destroy(dev, &priv->flows, flow_idx);
6916         mlx5_free(priv_fdir_flow->fdir);
6917         mlx5_free(priv_fdir_flow);
6918         DRV_LOG(DEBUG, "port %u deleted FDIR flow %u",
6919                 dev->data->port_id, flow_idx);
6920         return 0;
6921 }
6922
6923 /**
6924  * Update queue for specific filter.
6925  *
6926  * @param dev
6927  *   Pointer to Ethernet device.
6928  * @param fdir_filter
6929  *   Filter to be updated.
6930  *
6931  * @return
6932  *   0 on success, a negative errno value otherwise and rte_errno is set.
6933  */
6934 static int
6935 flow_fdir_filter_update(struct rte_eth_dev *dev,
6936                         const struct rte_eth_fdir_filter *fdir_filter)
6937 {
6938         int ret;
6939
6940         ret = flow_fdir_filter_delete(dev, fdir_filter);
6941         if (ret)
6942                 return ret;
6943         return flow_fdir_filter_add(dev, fdir_filter);
6944 }
6945
6946 /**
6947  * Flush all filters.
6948  *
6949  * @param dev
6950  *   Pointer to Ethernet device.
6951  */
6952 static void
6953 flow_fdir_filter_flush(struct rte_eth_dev *dev)
6954 {
6955         struct mlx5_priv *priv = dev->data->dev_private;
6956         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
6957
6958         while (!LIST_EMPTY(&priv->fdir_flows)) {
6959                 priv_fdir_flow = LIST_FIRST(&priv->fdir_flows);
6960                 LIST_REMOVE(priv_fdir_flow, next);
6961                 flow_list_destroy(dev, &priv->flows, priv_fdir_flow->rix_flow);
6962                 mlx5_free(priv_fdir_flow->fdir);
6963                 mlx5_free(priv_fdir_flow);
6964         }
6965 }
6966
6967 /**
6968  * Get flow director information.
6969  *
6970  * @param dev
6971  *   Pointer to Ethernet device.
6972  * @param[out] fdir_info
6973  *   Resulting flow director information.
6974  */
6975 static void
6976 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
6977 {
6978         struct rte_eth_fdir_masks *mask =
6979                 &dev->data->dev_conf.fdir_conf.mask;
6980
6981         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
6982         fdir_info->guarant_spc = 0;
6983         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
6984         fdir_info->max_flexpayload = 0;
6985         fdir_info->flow_types_mask[0] = 0;
6986         fdir_info->flex_payload_unit = 0;
6987         fdir_info->max_flex_payload_segment_num = 0;
6988         fdir_info->flex_payload_limit = 0;
6989         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
6990 }
6991
6992 /**
6993  * Deal with flow director operations.
6994  *
6995  * @param dev
6996  *   Pointer to Ethernet device.
6997  * @param filter_op
6998  *   Operation to perform.
6999  * @param arg
7000  *   Pointer to operation-specific structure.
7001  *
7002  * @return
7003  *   0 on success, a negative errno value otherwise and rte_errno is set.
7004  */
7005 static int
7006 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
7007                     void *arg)
7008 {
7009         enum rte_fdir_mode fdir_mode =
7010                 dev->data->dev_conf.fdir_conf.mode;
7011
7012         if (filter_op == RTE_ETH_FILTER_NOP)
7013                 return 0;
7014         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
7015             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
7016                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
7017                         dev->data->port_id, fdir_mode);
7018                 rte_errno = EINVAL;
7019                 return -rte_errno;
7020         }
7021         switch (filter_op) {
7022         case RTE_ETH_FILTER_ADD:
7023                 return flow_fdir_filter_add(dev, arg);
7024         case RTE_ETH_FILTER_UPDATE:
7025                 return flow_fdir_filter_update(dev, arg);
7026         case RTE_ETH_FILTER_DELETE:
7027                 return flow_fdir_filter_delete(dev, arg);
7028         case RTE_ETH_FILTER_FLUSH:
7029                 flow_fdir_filter_flush(dev);
7030                 break;
7031         case RTE_ETH_FILTER_INFO:
7032                 flow_fdir_info_get(dev, arg);
7033                 break;
7034         default:
7035                 DRV_LOG(DEBUG, "port %u unknown operation %u",
7036                         dev->data->port_id, filter_op);
7037                 rte_errno = EINVAL;
7038                 return -rte_errno;
7039         }
7040         return 0;
7041 }
7042
7043 /**
7044  * Manage filter operations.
7045  *
7046  * @param dev
7047  *   Pointer to Ethernet device structure.
7048  * @param filter_type
7049  *   Filter type.
7050  * @param filter_op
7051  *   Operation to perform.
7052  * @param arg
7053  *   Pointer to operation-specific structure.
7054  *
7055  * @return
7056  *   0 on success, a negative errno value otherwise and rte_errno is set.
7057  */
7058 int
7059 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
7060                      enum rte_filter_type filter_type,
7061                      enum rte_filter_op filter_op,
7062                      void *arg)
7063 {
7064         switch (filter_type) {
7065         case RTE_ETH_FILTER_GENERIC:
7066                 if (filter_op != RTE_ETH_FILTER_GET) {
7067                         rte_errno = EINVAL;
7068                         return -rte_errno;
7069                 }
7070                 *(const void **)arg = &mlx5_flow_ops;
7071                 return 0;
7072         case RTE_ETH_FILTER_FDIR:
7073                 return flow_fdir_ctrl_func(dev, filter_op, arg);
7074         default:
7075                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
7076                         dev->data->port_id, filter_type);
7077                 rte_errno = ENOTSUP;
7078                 return -rte_errno;
7079         }
7080         return 0;
7081 }
7082
7083 /**
7084  * Create the needed meter and suffix tables.
7085  *
7086  * @param[in] dev
7087  *   Pointer to Ethernet device.
7088  * @param[in] fm
7089  *   Pointer to the flow meter.
7090  *
7091  * @return
7092  *   Pointer to table set on success, NULL otherwise.
7093  */
7094 struct mlx5_meter_domains_infos *
7095 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7096                           const struct mlx5_flow_meter *fm)
7097 {
7098         const struct mlx5_flow_driver_ops *fops;
7099
7100         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7101         return fops->create_mtr_tbls(dev, fm);
7102 }
7103
7104 /**
7105  * Destroy the meter table set.
7106  *
7107  * @param[in] dev
7108  *   Pointer to Ethernet device.
7109  * @param[in] tbl
7110  *   Pointer to the meter table set.
7111  *
7112  * @return
7113  *   0 on success.
7114  */
7115 int
7116 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7117                            struct mlx5_meter_domains_infos *tbls)
7118 {
7119         const struct mlx5_flow_driver_ops *fops;
7120
7121         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7122         return fops->destroy_mtr_tbls(dev, tbls);
7123 }
7124
7125 /**
7126  * Create policer rules.
7127  *
7128  * @param[in] dev
7129  *   Pointer to Ethernet device.
7130  * @param[in] fm
7131  *   Pointer to flow meter structure.
7132  * @param[in] attr
7133  *   Pointer to flow attributes.
7134  *
7135  * @return
7136  *   0 on success, -1 otherwise.
7137  */
7138 int
7139 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
7140                                struct mlx5_flow_meter *fm,
7141                                const struct rte_flow_attr *attr)
7142 {
7143         const struct mlx5_flow_driver_ops *fops;
7144
7145         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7146         return fops->create_policer_rules(dev, fm, attr);
7147 }
7148
7149 /**
7150  * Destroy policer rules.
7151  *
7152  * @param[in] fm
7153  *   Pointer to flow meter structure.
7154  * @param[in] attr
7155  *   Pointer to flow attributes.
7156  *
7157  * @return
7158  *   0 on success, -1 otherwise.
7159  */
7160 int
7161 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
7162                                 struct mlx5_flow_meter *fm,
7163                                 const struct rte_flow_attr *attr)
7164 {
7165         const struct mlx5_flow_driver_ops *fops;
7166
7167         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7168         return fops->destroy_policer_rules(dev, fm, attr);
7169 }
7170
7171 /**
7172  * Allocate a counter.
7173  *
7174  * @param[in] dev
7175  *   Pointer to Ethernet device structure.
7176  *
7177  * @return
7178  *   Index to allocated counter  on success, 0 otherwise.
7179  */
7180 uint32_t
7181 mlx5_counter_alloc(struct rte_eth_dev *dev)
7182 {
7183         const struct mlx5_flow_driver_ops *fops;
7184         struct rte_flow_attr attr = { .transfer = 0 };
7185
7186         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7187                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7188                 return fops->counter_alloc(dev);
7189         }
7190         DRV_LOG(ERR,
7191                 "port %u counter allocate is not supported.",
7192                  dev->data->port_id);
7193         return 0;
7194 }
7195
7196 /**
7197  * Free a counter.
7198  *
7199  * @param[in] dev
7200  *   Pointer to Ethernet device structure.
7201  * @param[in] cnt
7202  *   Index to counter to be free.
7203  */
7204 void
7205 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7206 {
7207         const struct mlx5_flow_driver_ops *fops;
7208         struct rte_flow_attr attr = { .transfer = 0 };
7209
7210         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7211                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7212                 fops->counter_free(dev, cnt);
7213                 return;
7214         }
7215         DRV_LOG(ERR,
7216                 "port %u counter free is not supported.",
7217                  dev->data->port_id);
7218 }
7219
7220 /**
7221  * Query counter statistics.
7222  *
7223  * @param[in] dev
7224  *   Pointer to Ethernet device structure.
7225  * @param[in] cnt
7226  *   Index to counter to query.
7227  * @param[in] clear
7228  *   Set to clear counter statistics.
7229  * @param[out] pkts
7230  *   The counter hits packets number to save.
7231  * @param[out] bytes
7232  *   The counter hits bytes number to save.
7233  *
7234  * @return
7235  *   0 on success, a negative errno value otherwise.
7236  */
7237 int
7238 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7239                    bool clear, uint64_t *pkts, uint64_t *bytes)
7240 {
7241         const struct mlx5_flow_driver_ops *fops;
7242         struct rte_flow_attr attr = { .transfer = 0 };
7243
7244         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7245                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7246                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7247         }
7248         DRV_LOG(ERR,
7249                 "port %u counter query is not supported.",
7250                  dev->data->port_id);
7251         return -ENOTSUP;
7252 }
7253
7254 /**
7255  * Allocate a new memory for the counter values wrapped by all the needed
7256  * management.
7257  *
7258  * @param[in] sh
7259  *   Pointer to mlx5_dev_ctx_shared object.
7260  *
7261  * @return
7262  *   0 on success, a negative errno value otherwise.
7263  */
7264 static int
7265 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7266 {
7267         struct mlx5_devx_mkey_attr mkey_attr;
7268         struct mlx5_counter_stats_mem_mng *mem_mng;
7269         volatile struct flow_counter_stats *raw_data;
7270         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7271         int size = (sizeof(struct flow_counter_stats) *
7272                         MLX5_COUNTERS_PER_POOL +
7273                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7274                         sizeof(struct mlx5_counter_stats_mem_mng);
7275         size_t pgsize = rte_mem_page_size();
7276         uint8_t *mem;
7277         int i;
7278
7279         if (pgsize == (size_t)-1) {
7280                 DRV_LOG(ERR, "Failed to get mem page size");
7281                 rte_errno = ENOMEM;
7282                 return -ENOMEM;
7283         }
7284         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7285         if (!mem) {
7286                 rte_errno = ENOMEM;
7287                 return -ENOMEM;
7288         }
7289         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7290         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7291         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
7292                                                  IBV_ACCESS_LOCAL_WRITE);
7293         if (!mem_mng->umem) {
7294                 rte_errno = errno;
7295                 mlx5_free(mem);
7296                 return -rte_errno;
7297         }
7298         mkey_attr.addr = (uintptr_t)mem;
7299         mkey_attr.size = size;
7300         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7301         mkey_attr.pd = sh->pdn;
7302         mkey_attr.log_entity_size = 0;
7303         mkey_attr.pg_access = 0;
7304         mkey_attr.klm_array = NULL;
7305         mkey_attr.klm_num = 0;
7306         mkey_attr.relaxed_ordering = sh->cmng.relaxed_ordering;
7307         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
7308         if (!mem_mng->dm) {
7309                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
7310                 rte_errno = errno;
7311                 mlx5_free(mem);
7312                 return -rte_errno;
7313         }
7314         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7315         raw_data = (volatile struct flow_counter_stats *)mem;
7316         for (i = 0; i < raws_n; ++i) {
7317                 mem_mng->raws[i].mem_mng = mem_mng;
7318                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7319         }
7320         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7321                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7322                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7323                                  next);
7324         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7325         sh->cmng.mem_mng = mem_mng;
7326         return 0;
7327 }
7328
7329 /**
7330  * Set the statistic memory to the new counter pool.
7331  *
7332  * @param[in] sh
7333  *   Pointer to mlx5_dev_ctx_shared object.
7334  * @param[in] pool
7335  *   Pointer to the pool to set the statistic memory.
7336  *
7337  * @return
7338  *   0 on success, a negative errno value otherwise.
7339  */
7340 static int
7341 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7342                                struct mlx5_flow_counter_pool *pool)
7343 {
7344         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7345         /* Resize statistic memory once used out. */
7346         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7347             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7348                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7349                 return -1;
7350         }
7351         rte_spinlock_lock(&pool->sl);
7352         pool->raw = cmng->mem_mng->raws + pool->index %
7353                     MLX5_CNT_CONTAINER_RESIZE;
7354         rte_spinlock_unlock(&pool->sl);
7355         pool->raw_hw = NULL;
7356         return 0;
7357 }
7358
7359 #define MLX5_POOL_QUERY_FREQ_US 1000000
7360
7361 /**
7362  * Set the periodic procedure for triggering asynchronous batch queries for all
7363  * the counter pools.
7364  *
7365  * @param[in] sh
7366  *   Pointer to mlx5_dev_ctx_shared object.
7367  */
7368 void
7369 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7370 {
7371         uint32_t pools_n, us;
7372
7373         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7374         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7375         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7376         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7377                 sh->cmng.query_thread_on = 0;
7378                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7379         } else {
7380                 sh->cmng.query_thread_on = 1;
7381         }
7382 }
7383
7384 /**
7385  * The periodic procedure for triggering asynchronous batch queries for all the
7386  * counter pools. This function is probably called by the host thread.
7387  *
7388  * @param[in] arg
7389  *   The parameter for the alarm process.
7390  */
7391 void
7392 mlx5_flow_query_alarm(void *arg)
7393 {
7394         struct mlx5_dev_ctx_shared *sh = arg;
7395         int ret;
7396         uint16_t pool_index = sh->cmng.pool_index;
7397         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7398         struct mlx5_flow_counter_pool *pool;
7399         uint16_t n_valid;
7400
7401         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7402                 goto set_alarm;
7403         rte_spinlock_lock(&cmng->pool_update_sl);
7404         pool = cmng->pools[pool_index];
7405         n_valid = cmng->n_valid;
7406         rte_spinlock_unlock(&cmng->pool_update_sl);
7407         /* Set the statistic memory to the new created pool. */
7408         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7409                 goto set_alarm;
7410         if (pool->raw_hw)
7411                 /* There is a pool query in progress. */
7412                 goto set_alarm;
7413         pool->raw_hw =
7414                 LIST_FIRST(&sh->cmng.free_stat_raws);
7415         if (!pool->raw_hw)
7416                 /* No free counter statistics raw memory. */
7417                 goto set_alarm;
7418         /*
7419          * Identify the counters released between query trigger and query
7420          * handle more efficiently. The counter released in this gap period
7421          * should wait for a new round of query as the new arrived packets
7422          * will not be taken into account.
7423          */
7424         pool->query_gen++;
7425         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7426                                                MLX5_COUNTERS_PER_POOL,
7427                                                NULL, NULL,
7428                                                pool->raw_hw->mem_mng->dm->id,
7429                                                (void *)(uintptr_t)
7430                                                pool->raw_hw->data,
7431                                                sh->devx_comp,
7432                                                (uint64_t)(uintptr_t)pool);
7433         if (ret) {
7434                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7435                         " %d", pool->min_dcs->id);
7436                 pool->raw_hw = NULL;
7437                 goto set_alarm;
7438         }
7439         LIST_REMOVE(pool->raw_hw, next);
7440         sh->cmng.pending_queries++;
7441         pool_index++;
7442         if (pool_index >= n_valid)
7443                 pool_index = 0;
7444 set_alarm:
7445         sh->cmng.pool_index = pool_index;
7446         mlx5_set_query_alarm(sh);
7447 }
7448
7449 /**
7450  * Check and callback event for new aged flow in the counter pool
7451  *
7452  * @param[in] sh
7453  *   Pointer to mlx5_dev_ctx_shared object.
7454  * @param[in] pool
7455  *   Pointer to Current counter pool.
7456  */
7457 static void
7458 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7459                    struct mlx5_flow_counter_pool *pool)
7460 {
7461         struct mlx5_priv *priv;
7462         struct mlx5_flow_counter *cnt;
7463         struct mlx5_age_info *age_info;
7464         struct mlx5_age_param *age_param;
7465         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7466         struct mlx5_counter_stats_raw *prev = pool->raw;
7467         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7468         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7469         uint16_t expected = AGE_CANDIDATE;
7470         uint32_t i;
7471
7472         pool->time_of_last_age_check = curr_time;
7473         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7474                 cnt = MLX5_POOL_GET_CNT(pool, i);
7475                 age_param = MLX5_CNT_TO_AGE(cnt);
7476                 if (__atomic_load_n(&age_param->state,
7477                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7478                         continue;
7479                 if (cur->data[i].hits != prev->data[i].hits) {
7480                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7481                                          __ATOMIC_RELAXED);
7482                         continue;
7483                 }
7484                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7485                                        time_delta,
7486                                        __ATOMIC_RELAXED) <= age_param->timeout)
7487                         continue;
7488                 /**
7489                  * Hold the lock first, or if between the
7490                  * state AGE_TMOUT and tailq operation the
7491                  * release happened, the release procedure
7492                  * may delete a non-existent tailq node.
7493                  */
7494                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7495                 age_info = GET_PORT_AGE_INFO(priv);
7496                 rte_spinlock_lock(&age_info->aged_sl);
7497                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7498                                                 AGE_TMOUT, false,
7499                                                 __ATOMIC_RELAXED,
7500                                                 __ATOMIC_RELAXED)) {
7501                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
7502                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
7503                 }
7504                 rte_spinlock_unlock(&age_info->aged_sl);
7505         }
7506         for (i = 0; i < sh->max_port; i++) {
7507                 age_info = &sh->port[i].age_info;
7508                 if (!MLX5_AGE_GET(age_info, MLX5_AGE_EVENT_NEW))
7509                         continue;
7510                 if (MLX5_AGE_GET(age_info, MLX5_AGE_TRIGGER))
7511                         rte_eth_dev_callback_process
7512                                 (&rte_eth_devices[sh->port[i].devx_ih_port_id],
7513                                 RTE_ETH_EVENT_FLOW_AGED, NULL);
7514                 age_info->flags = 0;
7515         }
7516 }
7517
7518 /**
7519  * Handler for the HW respond about ready values from an asynchronous batch
7520  * query. This function is probably called by the host thread.
7521  *
7522  * @param[in] sh
7523  *   The pointer to the shared device context.
7524  * @param[in] async_id
7525  *   The Devx async ID.
7526  * @param[in] status
7527  *   The status of the completion.
7528  */
7529 void
7530 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
7531                                   uint64_t async_id, int status)
7532 {
7533         struct mlx5_flow_counter_pool *pool =
7534                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
7535         struct mlx5_counter_stats_raw *raw_to_free;
7536         uint8_t query_gen = pool->query_gen ^ 1;
7537         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7538         enum mlx5_counter_type cnt_type =
7539                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
7540                                 MLX5_COUNTER_TYPE_ORIGIN;
7541
7542         if (unlikely(status)) {
7543                 raw_to_free = pool->raw_hw;
7544         } else {
7545                 raw_to_free = pool->raw;
7546                 if (pool->is_aged)
7547                         mlx5_flow_aging_check(sh, pool);
7548                 rte_spinlock_lock(&pool->sl);
7549                 pool->raw = pool->raw_hw;
7550                 rte_spinlock_unlock(&pool->sl);
7551                 /* Be sure the new raw counters data is updated in memory. */
7552                 rte_io_wmb();
7553                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
7554                         rte_spinlock_lock(&cmng->csl[cnt_type]);
7555                         TAILQ_CONCAT(&cmng->counters[cnt_type],
7556                                      &pool->counters[query_gen], next);
7557                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
7558                 }
7559         }
7560         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
7561         pool->raw_hw = NULL;
7562         sh->cmng.pending_queries--;
7563 }
7564
7565 static const struct mlx5_flow_tbl_data_entry  *
7566 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
7567 {
7568         struct mlx5_priv *priv = dev->data->dev_private;
7569         struct mlx5_dev_ctx_shared *sh = priv->sh;
7570         struct mlx5_hlist_entry *he;
7571         union tunnel_offload_mark mbits = { .val = mark };
7572         union mlx5_flow_tbl_key table_key = {
7573                 {
7574                         .table_id = tunnel_id_to_flow_tbl(mbits.table_id),
7575                         .reserved = 0,
7576                         .domain = !!mbits.transfer,
7577                         .direction = 0,
7578                 }
7579         };
7580         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
7581         return he ?
7582                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
7583 }
7584
7585 static uint32_t
7586 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
7587                                 const struct mlx5_flow_tunnel *tunnel,
7588                                 uint32_t group, uint32_t *table,
7589                                 struct rte_flow_error *error)
7590 {
7591         struct mlx5_hlist_entry *he;
7592         struct tunnel_tbl_entry *tte;
7593         union tunnel_tbl_key key = {
7594                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
7595                 .group = group
7596         };
7597         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7598         struct mlx5_hlist *group_hash;
7599
7600         group_hash = tunnel ? tunnel->groups : thub->groups;
7601         he = mlx5_hlist_lookup(group_hash, key.val);
7602         if (!he) {
7603                 int ret;
7604                 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
7605                                   sizeof(*tte), 0,
7606                                   SOCKET_ID_ANY);
7607                 if (!tte)
7608                         goto err;
7609                 tte->hash.key = key.val;
7610                 ret = mlx5_flow_id_get(thub->table_ids, &tte->flow_table);
7611                 if (ret) {
7612                         mlx5_free(tte);
7613                         goto err;
7614                 }
7615                 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
7616                 mlx5_hlist_insert(group_hash, &tte->hash);
7617         } else {
7618                 tte = container_of(he, typeof(*tte), hash);
7619         }
7620         *table = tte->flow_table;
7621         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
7622                 dev->data->port_id, key.tunnel_id, group, *table);
7623         return 0;
7624
7625 err:
7626         return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7627                                   NULL, "tunnel group index not supported");
7628 }
7629
7630 static int
7631 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7632                     struct flow_grp_info grp_info, struct rte_flow_error *error)
7633 {
7634         if (grp_info.transfer && grp_info.external && grp_info.fdb_def_rule) {
7635                 if (group == UINT32_MAX)
7636                         return rte_flow_error_set
7637                                                 (error, EINVAL,
7638                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7639                                                  NULL,
7640                                                  "group index not supported");
7641                 *table = group + 1;
7642         } else {
7643                 *table = group;
7644         }
7645         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7646         return 0;
7647 }
7648
7649 /**
7650  * Translate the rte_flow group index to HW table value.
7651  *
7652  * If tunnel offload is disabled, all group ids converted to flow table
7653  * id using the standard method.
7654  * If tunnel offload is enabled, group id can be converted using the
7655  * standard or tunnel conversion method. Group conversion method
7656  * selection depends on flags in `grp_info` parameter:
7657  * - Internal (grp_info.external == 0) groups conversion uses the
7658  *   standard method.
7659  * - Group ids in JUMP action converted with the tunnel conversion.
7660  * - Group id in rule attribute conversion depends on a rule type and
7661  *   group id value:
7662  *   ** non zero group attributes converted with the tunnel method
7663  *   ** zero group attribute in non-tunnel rule is converted using the
7664  *      standard method - there's only one root table
7665  *   ** zero group attribute in steer tunnel rule is converted with the
7666  *      standard method - single root table
7667  *   ** zero group attribute in match tunnel rule is a special OvS
7668  *      case: that value is used for portability reasons. That group
7669  *      id is converted with the tunnel conversion method.
7670  *
7671  * @param[in] dev
7672  *   Port device
7673  * @param[in] tunnel
7674  *   PMD tunnel offload object
7675  * @param[in] group
7676  *   rte_flow group index value.
7677  * @param[out] table
7678  *   HW table value.
7679  * @param[in] grp_info
7680  *   flags used for conversion
7681  * @param[out] error
7682  *   Pointer to error structure.
7683  *
7684  * @return
7685  *   0 on success, a negative errno value otherwise and rte_errno is set.
7686  */
7687 int
7688 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7689                          const struct mlx5_flow_tunnel *tunnel,
7690                          uint32_t group, uint32_t *table,
7691                          struct flow_grp_info grp_info,
7692                          struct rte_flow_error *error)
7693 {
7694         int ret;
7695         bool standard_translation;
7696
7697         if (grp_info.external && group < MLX5_MAX_TABLES_EXTERNAL)
7698                 group *= MLX5_FLOW_TABLE_FACTOR;
7699         if (is_tunnel_offload_active(dev)) {
7700                 standard_translation = !grp_info.external ||
7701                                         grp_info.std_tbl_fix;
7702         } else {
7703                 standard_translation = true;
7704         }
7705         DRV_LOG(DEBUG,
7706                 "port %u group=%#x transfer=%d external=%d fdb_def_rule=%d translate=%s",
7707                 dev->data->port_id, group, grp_info.transfer,
7708                 grp_info.external, grp_info.fdb_def_rule,
7709                 standard_translation ? "STANDARD" : "TUNNEL");
7710         if (standard_translation)
7711                 ret = flow_group_to_table(dev->data->port_id, group, table,
7712                                           grp_info, error);
7713         else
7714                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7715                                                       table, error);
7716
7717         return ret;
7718 }
7719
7720 /**
7721  * Discover availability of metadata reg_c's.
7722  *
7723  * Iteratively use test flows to check availability.
7724  *
7725  * @param[in] dev
7726  *   Pointer to the Ethernet device structure.
7727  *
7728  * @return
7729  *   0 on success, a negative errno value otherwise and rte_errno is set.
7730  */
7731 int
7732 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7733 {
7734         struct mlx5_priv *priv = dev->data->dev_private;
7735         struct mlx5_dev_config *config = &priv->config;
7736         enum modify_reg idx;
7737         int n = 0;
7738
7739         /* reg_c[0] and reg_c[1] are reserved. */
7740         config->flow_mreg_c[n++] = REG_C_0;
7741         config->flow_mreg_c[n++] = REG_C_1;
7742         /* Discover availability of other reg_c's. */
7743         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7744                 struct rte_flow_attr attr = {
7745                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7746                         .priority = MLX5_FLOW_PRIO_RSVD,
7747                         .ingress = 1,
7748                 };
7749                 struct rte_flow_item items[] = {
7750                         [0] = {
7751                                 .type = RTE_FLOW_ITEM_TYPE_END,
7752                         },
7753                 };
7754                 struct rte_flow_action actions[] = {
7755                         [0] = {
7756                                 .type = (enum rte_flow_action_type)
7757                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7758                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7759                                         .src = REG_C_1,
7760                                         .dst = idx,
7761                                 },
7762                         },
7763                         [1] = {
7764                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7765                                 .conf = &(struct rte_flow_action_jump){
7766                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7767                                 },
7768                         },
7769                         [2] = {
7770                                 .type = RTE_FLOW_ACTION_TYPE_END,
7771                         },
7772                 };
7773                 uint32_t flow_idx;
7774                 struct rte_flow *flow;
7775                 struct rte_flow_error error;
7776
7777                 if (!config->dv_flow_en)
7778                         break;
7779                 /* Create internal flow, validation skips copy action. */
7780                 flow_idx = flow_list_create(dev, NULL, &attr, items,
7781                                             actions, false, &error);
7782                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
7783                                       flow_idx);
7784                 if (!flow)
7785                         continue;
7786                 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
7787                         config->flow_mreg_c[n++] = idx;
7788                 flow_list_destroy(dev, NULL, flow_idx);
7789         }
7790         for (; n < MLX5_MREG_C_NUM; ++n)
7791                 config->flow_mreg_c[n] = REG_NON;
7792         return 0;
7793 }
7794
7795 /**
7796  * Dump flow raw hw data to file
7797  *
7798  * @param[in] dev
7799  *    The pointer to Ethernet device.
7800  * @param[in] file
7801  *   A pointer to a file for output.
7802  * @param[out] error
7803  *   Perform verbose error reporting if not NULL. PMDs initialize this
7804  *   structure in case of error only.
7805  * @return
7806  *   0 on success, a nagative value otherwise.
7807  */
7808 int
7809 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
7810                    FILE *file,
7811                    struct rte_flow_error *error __rte_unused)
7812 {
7813         struct mlx5_priv *priv = dev->data->dev_private;
7814         struct mlx5_dev_ctx_shared *sh = priv->sh;
7815
7816         if (!priv->config.dv_flow_en) {
7817                 if (fputs("device dv flow disabled\n", file) <= 0)
7818                         return -errno;
7819                 return -ENOTSUP;
7820         }
7821         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
7822                                        sh->tx_domain, file);
7823 }
7824
7825 /**
7826  * Get aged-out flows.
7827  *
7828  * @param[in] dev
7829  *   Pointer to the Ethernet device structure.
7830  * @param[in] context
7831  *   The address of an array of pointers to the aged-out flows contexts.
7832  * @param[in] nb_countexts
7833  *   The length of context array pointers.
7834  * @param[out] error
7835  *   Perform verbose error reporting if not NULL. Initialized in case of
7836  *   error only.
7837  *
7838  * @return
7839  *   how many contexts get in success, otherwise negative errno value.
7840  *   if nb_contexts is 0, return the amount of all aged contexts.
7841  *   if nb_contexts is not 0 , return the amount of aged flows reported
7842  *   in the context array.
7843  */
7844 int
7845 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
7846                         uint32_t nb_contexts, struct rte_flow_error *error)
7847 {
7848         const struct mlx5_flow_driver_ops *fops;
7849         struct rte_flow_attr attr = { .transfer = 0 };
7850
7851         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7852                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7853                 return fops->get_aged_flows(dev, contexts, nb_contexts,
7854                                                     error);
7855         }
7856         DRV_LOG(ERR,
7857                 "port %u get aged flows is not supported.",
7858                  dev->data->port_id);
7859         return -ENOTSUP;
7860 }
7861
7862 /* Wrapper for driver action_validate op callback */
7863 static int
7864 flow_drv_action_validate(struct rte_eth_dev *dev,
7865                          const struct rte_flow_shared_action_conf *conf,
7866                          const struct rte_flow_action *action,
7867                          const struct mlx5_flow_driver_ops *fops,
7868                          struct rte_flow_error *error)
7869 {
7870         static const char err_msg[] = "shared action validation unsupported";
7871
7872         if (!fops->action_validate) {
7873                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7874                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7875                                    NULL, err_msg);
7876                 return -rte_errno;
7877         }
7878         return fops->action_validate(dev, conf, action, error);
7879 }
7880
7881 /**
7882  * Destroys the shared action by handle.
7883  *
7884  * @param dev
7885  *   Pointer to Ethernet device structure.
7886  * @param[in] action
7887  *   Handle for the shared action to be destroyed.
7888  * @param[out] error
7889  *   Perform verbose error reporting if not NULL. PMDs initialize this
7890  *   structure in case of error only.
7891  *
7892  * @return
7893  *   0 on success, a negative errno value otherwise and rte_errno is set.
7894  *
7895  * @note: wrapper for driver action_create op callback.
7896  */
7897 static int
7898 mlx5_shared_action_destroy(struct rte_eth_dev *dev,
7899                            struct rte_flow_shared_action *action,
7900                            struct rte_flow_error *error)
7901 {
7902         static const char err_msg[] = "shared action destruction unsupported";
7903         struct rte_flow_attr attr = { .transfer = 0 };
7904         const struct mlx5_flow_driver_ops *fops =
7905                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7906
7907         if (!fops->action_destroy) {
7908                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7909                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7910                                    NULL, err_msg);
7911                 return -rte_errno;
7912         }
7913         return fops->action_destroy(dev, action, error);
7914 }
7915
7916 /* Wrapper for driver action_destroy op callback */
7917 static int
7918 flow_drv_action_update(struct rte_eth_dev *dev,
7919                        struct rte_flow_shared_action *action,
7920                        const void *action_conf,
7921                        const struct mlx5_flow_driver_ops *fops,
7922                        struct rte_flow_error *error)
7923 {
7924         static const char err_msg[] = "shared action update unsupported";
7925
7926         if (!fops->action_update) {
7927                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7928                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7929                                    NULL, err_msg);
7930                 return -rte_errno;
7931         }
7932         return fops->action_update(dev, action, action_conf, error);
7933 }
7934
7935 /**
7936  * Create shared action for reuse in multiple flow rules.
7937  *
7938  * @param dev
7939  *   Pointer to Ethernet device structure.
7940  * @param[in] action
7941  *   Action configuration for shared action creation.
7942  * @param[out] error
7943  *   Perform verbose error reporting if not NULL. PMDs initialize this
7944  *   structure in case of error only.
7945  * @return
7946  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
7947  */
7948 static struct rte_flow_shared_action *
7949 mlx5_shared_action_create(struct rte_eth_dev *dev,
7950                           const struct rte_flow_shared_action_conf *conf,
7951                           const struct rte_flow_action *action,
7952                           struct rte_flow_error *error)
7953 {
7954         static const char err_msg[] = "shared action creation unsupported";
7955         struct rte_flow_attr attr = { .transfer = 0 };
7956         const struct mlx5_flow_driver_ops *fops =
7957                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7958
7959         if (flow_drv_action_validate(dev, conf, action, fops, error))
7960                 return NULL;
7961         if (!fops->action_create) {
7962                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7963                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7964                                    NULL, err_msg);
7965                 return NULL;
7966         }
7967         return fops->action_create(dev, conf, action, error);
7968 }
7969
7970 /**
7971  * Updates inplace the shared action configuration pointed by *action* handle
7972  * with the configuration provided as *action* argument.
7973  * The update of the shared action configuration effects all flow rules reusing
7974  * the action via handle.
7975  *
7976  * @param dev
7977  *   Pointer to Ethernet device structure.
7978  * @param[in] shared_action
7979  *   Handle for the shared action to be updated.
7980  * @param[in] action
7981  *   Action specification used to modify the action pointed by handle.
7982  *   *action* should be of same type with the action pointed by the *action*
7983  *   handle argument, otherwise considered as invalid.
7984  * @param[out] error
7985  *   Perform verbose error reporting if not NULL. PMDs initialize this
7986  *   structure in case of error only.
7987  *
7988  * @return
7989  *   0 on success, a negative errno value otherwise and rte_errno is set.
7990  */
7991 static int
7992 mlx5_shared_action_update(struct rte_eth_dev *dev,
7993                 struct rte_flow_shared_action *shared_action,
7994                 const struct rte_flow_action *action,
7995                 struct rte_flow_error *error)
7996 {
7997         struct rte_flow_attr attr = { .transfer = 0 };
7998         const struct mlx5_flow_driver_ops *fops =
7999                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8000         int ret;
8001
8002         switch (shared_action->type) {
8003         case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
8004                 if (action->type != RTE_FLOW_ACTION_TYPE_RSS) {
8005                         return rte_flow_error_set(error, EINVAL,
8006                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8007                                                   NULL,
8008                                                   "update action type invalid");
8009                 }
8010                 ret = flow_drv_action_validate(dev, NULL, action, fops, error);
8011                 if (ret)
8012                         return ret;
8013                 return flow_drv_action_update(dev, shared_action, action->conf,
8014                                               fops, error);
8015         default:
8016                 return rte_flow_error_set(error, ENOTSUP,
8017                                           RTE_FLOW_ERROR_TYPE_ACTION,
8018                                           NULL,
8019                                           "action type not supported");
8020         }
8021 }
8022
8023 /**
8024  * Query the shared action by handle.
8025  *
8026  * This function allows retrieving action-specific data such as counters.
8027  * Data is gathered by special action which may be present/referenced in
8028  * more than one flow rule definition.
8029  *
8030  * \see RTE_FLOW_ACTION_TYPE_COUNT
8031  *
8032  * @param dev
8033  *   Pointer to Ethernet device structure.
8034  * @param[in] action
8035  *   Handle for the shared action to query.
8036  * @param[in, out] data
8037  *   Pointer to storage for the associated query data type.
8038  * @param[out] error
8039  *   Perform verbose error reporting if not NULL. PMDs initialize this
8040  *   structure in case of error only.
8041  *
8042  * @return
8043  *   0 on success, a negative errno value otherwise and rte_errno is set.
8044  */
8045 static int
8046 mlx5_shared_action_query(struct rte_eth_dev *dev,
8047                          const struct rte_flow_shared_action *action,
8048                          void *data,
8049                          struct rte_flow_error *error)
8050 {
8051         (void)dev;
8052         switch (action->type) {
8053         case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
8054                 __atomic_load(&action->refcnt, (uint32_t *)data,
8055                               __ATOMIC_RELAXED);
8056                 return 0;
8057         default:
8058                 return rte_flow_error_set(error, ENOTSUP,
8059                                           RTE_FLOW_ERROR_TYPE_ACTION,
8060                                           NULL,
8061                                           "action type not supported");
8062         }
8063 }
8064
8065 /**
8066  * Destroy all shared actions.
8067  *
8068  * @param dev
8069  *   Pointer to Ethernet device.
8070  *
8071  * @return
8072  *   0 on success, a negative errno value otherwise and rte_errno is set.
8073  */
8074 int
8075 mlx5_shared_action_flush(struct rte_eth_dev *dev)
8076 {
8077         struct rte_flow_error error;
8078         struct mlx5_priv *priv = dev->data->dev_private;
8079         struct rte_flow_shared_action *action;
8080         int ret = 0;
8081
8082         while (!LIST_EMPTY(&priv->shared_actions)) {
8083                 action = LIST_FIRST(&priv->shared_actions);
8084                 ret = mlx5_shared_action_destroy(dev, action, &error);
8085         }
8086         return ret;
8087 }
8088
8089 static void
8090 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
8091                       struct mlx5_flow_tunnel *tunnel)
8092 {
8093         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8094         struct mlx5_flow_id_pool *id_pool = thub->tunnel_ids;
8095
8096         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
8097                 dev->data->port_id, tunnel->tunnel_id);
8098         RTE_VERIFY(!__atomic_load_n(&tunnel->refctn, __ATOMIC_RELAXED));
8099         LIST_REMOVE(tunnel, chain);
8100         mlx5_flow_id_release(id_pool, tunnel->tunnel_id);
8101         mlx5_hlist_destroy(tunnel->groups, NULL, NULL);
8102         mlx5_free(tunnel);
8103 }
8104
8105 static struct mlx5_flow_tunnel *
8106 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
8107 {
8108         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8109         struct mlx5_flow_tunnel *tun;
8110
8111         LIST_FOREACH(tun, &thub->tunnels, chain) {
8112                 if (tun->tunnel_id == id)
8113                         break;
8114         }
8115
8116         return tun;
8117 }
8118
8119 static struct mlx5_flow_tunnel *
8120 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
8121                           const struct rte_flow_tunnel *app_tunnel)
8122 {
8123         int ret;
8124         struct mlx5_flow_tunnel *tunnel;
8125         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8126         struct mlx5_flow_id_pool *id_pool = thub->tunnel_ids;
8127         uint32_t id;
8128
8129         ret = mlx5_flow_id_get(id_pool, &id);
8130         if (ret)
8131                 return NULL;
8132         /**
8133          * mlx5 flow tunnel is an auxlilary data structure
8134          * It's not part of IO. No need to allocate it from
8135          * huge pages pools dedicated for IO
8136          */
8137         tunnel = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*tunnel),
8138                              0, SOCKET_ID_ANY);
8139         if (!tunnel) {
8140                 mlx5_flow_id_pool_release(id_pool);
8141                 return NULL;
8142         }
8143         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024);
8144         if (!tunnel->groups) {
8145                 mlx5_flow_id_pool_release(id_pool);
8146                 mlx5_free(tunnel);
8147                 return NULL;
8148         }
8149         /* initiate new PMD tunnel */
8150         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
8151         tunnel->tunnel_id = id;
8152         tunnel->action.type = (typeof(tunnel->action.type))
8153                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
8154         tunnel->action.conf = tunnel;
8155         tunnel->item.type = (typeof(tunnel->item.type))
8156                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
8157         tunnel->item.spec = tunnel;
8158         tunnel->item.last = NULL;
8159         tunnel->item.mask = NULL;
8160
8161         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
8162                 dev->data->port_id, tunnel->tunnel_id);
8163
8164         return tunnel;
8165 }
8166
8167 static int
8168 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
8169                      const struct rte_flow_tunnel *app_tunnel,
8170                      struct mlx5_flow_tunnel **tunnel)
8171 {
8172         int ret;
8173         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8174         struct mlx5_flow_tunnel *tun;
8175
8176         LIST_FOREACH(tun, &thub->tunnels, chain) {
8177                 if (!memcmp(app_tunnel, &tun->app_tunnel,
8178                             sizeof(*app_tunnel))) {
8179                         *tunnel = tun;
8180                         ret = 0;
8181                         break;
8182                 }
8183         }
8184         if (!tun) {
8185                 tun = mlx5_flow_tunnel_allocate(dev, app_tunnel);
8186                 if (tun) {
8187                         LIST_INSERT_HEAD(&thub->tunnels, tun, chain);
8188                         *tunnel = tun;
8189                 } else {
8190                         ret = -ENOMEM;
8191                 }
8192         }
8193         if (tun)
8194                 __atomic_add_fetch(&tun->refctn, 1, __ATOMIC_RELAXED);
8195
8196         return ret;
8197 }
8198
8199 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
8200 {
8201         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
8202
8203         if (!thub)
8204                 return;
8205         if (!LIST_EMPTY(&thub->tunnels))
8206                 DRV_LOG(WARNING, "port %u tunnels present\n", port_id);
8207         mlx5_flow_id_pool_release(thub->tunnel_ids);
8208         mlx5_flow_id_pool_release(thub->table_ids);
8209         mlx5_hlist_destroy(thub->groups, NULL, NULL);
8210         mlx5_free(thub);
8211 }
8212
8213 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
8214 {
8215         int err;
8216         struct mlx5_flow_tunnel_hub *thub;
8217
8218         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
8219                            0, SOCKET_ID_ANY);
8220         if (!thub)
8221                 return -ENOMEM;
8222         LIST_INIT(&thub->tunnels);
8223         thub->tunnel_ids = mlx5_flow_id_pool_alloc(MLX5_MAX_TUNNELS);
8224         if (!thub->tunnel_ids) {
8225                 err = -rte_errno;
8226                 goto err;
8227         }
8228         thub->table_ids = mlx5_flow_id_pool_alloc(MLX5_MAX_TABLES);
8229         if (!thub->table_ids) {
8230                 err = -rte_errno;
8231                 goto err;
8232         }
8233         thub->groups = mlx5_hlist_create("flow groups", MLX5_MAX_TABLES);
8234         if (!thub->groups) {
8235                 err = -rte_errno;
8236                 goto err;
8237         }
8238         sh->tunnel_hub = thub;
8239
8240         return 0;
8241
8242 err:
8243         if (thub->groups)
8244                 mlx5_hlist_destroy(thub->groups, NULL, NULL);
8245         if (thub->table_ids)
8246                 mlx5_flow_id_pool_release(thub->table_ids);
8247         if (thub->tunnel_ids)
8248                 mlx5_flow_id_pool_release(thub->tunnel_ids);
8249         if (thub)
8250                 mlx5_free(thub);
8251         return err;
8252 }
8253
8254 #ifndef HAVE_MLX5DV_DR
8255 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8256 #else
8257 #define MLX5_DOMAIN_SYNC_FLOW \
8258         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8259 #endif
8260
8261 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8262 {
8263         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8264         const struct mlx5_flow_driver_ops *fops;
8265         int ret;
8266         struct rte_flow_attr attr = { .transfer = 0 };
8267
8268         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8269         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8270         if (ret > 0)
8271                 ret = -ret;
8272         return ret;
8273 }