drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rx.h"
  32 #include "mlx5_tx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              const struct mlx5_flow_tunnel *tunnel,
  54                              struct tunnel_default_miss_ctx *ctx,
  55                              struct rte_flow_error *error);
  56 static struct mlx5_flow_tunnel *
  57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  58 static void
  59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  60 static uint32_t
  61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  62                                 const struct mlx5_flow_tunnel *tunnel,
  63                                 uint32_t group, uint32_t *table,
  64                                 struct rte_flow_error *error);
  65
  66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  67 static void mlx5_flow_pop_thread_workspace(void);
  68
  69
  70 /** Device flow drivers. */
  71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  72
  73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  74
  75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  76         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  78         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  79 #endif
  80         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  81         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  82 };
  83
  84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  86         (const int []){ \
  87                 __VA_ARGS__, 0, \
  88         }
  89
  90 /** Node object of input graph for mlx5_flow_expand_rss(). */
  91 struct mlx5_flow_expand_node {
  92         const int *const next;
  93         /**<
  94          * List of next node indexes. Index 0 is interpreted as a terminator.
  95          */
  96         const enum rte_flow_item_type type;
  97         /**< Pattern item type of current node. */
  98         uint64_t rss_types;
  99         /**<
 100          * RSS types bit-field associated with this node
 101          * (see ETH_RSS_* definitions).
 102          */
 103         uint8_t optional;
 104         /**< optional expand field. Default 0 to expand, 1 not go deeper. */
 105 };
 106
 107 /** Object returned by mlx5_flow_expand_rss(). */
 108 struct mlx5_flow_expand_rss {
 109         uint32_t entries;
 110         /**< Number of entries @p patterns and @p priorities. */
 111         struct {
 112                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 113                 uint32_t priority; /**< Priority offset for each expansion. */
 114         } entry[];
 115 };
 116
 117 static void
 118 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
 119
 120 static bool
 121 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
 122 {
 123         switch (item->type) {
 124         case RTE_FLOW_ITEM_TYPE_ETH:
 125         case RTE_FLOW_ITEM_TYPE_VLAN:
 126         case RTE_FLOW_ITEM_TYPE_IPV4:
 127         case RTE_FLOW_ITEM_TYPE_IPV6:
 128         case RTE_FLOW_ITEM_TYPE_UDP:
 129         case RTE_FLOW_ITEM_TYPE_TCP:
 130         case RTE_FLOW_ITEM_TYPE_VXLAN:
 131         case RTE_FLOW_ITEM_TYPE_NVGRE:
 132         case RTE_FLOW_ITEM_TYPE_GRE:
 133         case RTE_FLOW_ITEM_TYPE_GENEVE:
 134         case RTE_FLOW_ITEM_TYPE_MPLS:
 135         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 136         case RTE_FLOW_ITEM_TYPE_GRE_KEY:
 137         case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
 138         case RTE_FLOW_ITEM_TYPE_GTP:
 139                 return true;
 140         default:
 141                 break;
 142         }
 143         return false;
 144 }
 145
 146 static enum rte_flow_item_type
 147 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 148 {
 149         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 150         uint16_t ether_type = 0;
 151         uint16_t ether_type_m;
 152         uint8_t ip_next_proto = 0;
 153         uint8_t ip_next_proto_m;
 154
 155         if (item == NULL || item->spec == NULL)
 156                 return ret;
 157         switch (item->type) {
 158         case RTE_FLOW_ITEM_TYPE_ETH:
 159                 if (item->mask)
 160                         ether_type_m = ((const struct rte_flow_item_eth *)
 161                                                 (item->mask))->type;
 162                 else
 163                         ether_type_m = rte_flow_item_eth_mask.type;
 164                 if (ether_type_m != RTE_BE16(0xFFFF))
 165                         break;
 166                 ether_type = ((const struct rte_flow_item_eth *)
 167                                 (item->spec))->type;
 168                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 169                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 170                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 171                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 172                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 173                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 174                 else
 175                         ret = RTE_FLOW_ITEM_TYPE_END;
 176                 break;
 177         case RTE_FLOW_ITEM_TYPE_VLAN:
 178                 if (item->mask)
 179                         ether_type_m = ((const struct rte_flow_item_vlan *)
 180                                                 (item->mask))->inner_type;
 181                 else
 182                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 183                 if (ether_type_m != RTE_BE16(0xFFFF))
 184                         break;
 185                 ether_type = ((const struct rte_flow_item_vlan *)
 186                                 (item->spec))->inner_type;
 187                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 188                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 189                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 190                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 191                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 192                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 193                 else
 194                         ret = RTE_FLOW_ITEM_TYPE_END;
 195                 break;
 196         case RTE_FLOW_ITEM_TYPE_IPV4:
 197                 if (item->mask)
 198                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 199                                         (item->mask))->hdr.next_proto_id;
 200                 else
 201                         ip_next_proto_m =
 202                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 203                 if (ip_next_proto_m != 0xFF)
 204                         break;
 205                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 206                                 (item->spec))->hdr.next_proto_id;
 207                 if (ip_next_proto == IPPROTO_UDP)
 208                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 209                 else if (ip_next_proto == IPPROTO_TCP)
 210                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 211                 else if (ip_next_proto == IPPROTO_IP)
 212                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 213                 else if (ip_next_proto == IPPROTO_IPV6)
 214                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 215                 else
 216                         ret = RTE_FLOW_ITEM_TYPE_END;
 217                 break;
 218         case RTE_FLOW_ITEM_TYPE_IPV6:
 219                 if (item->mask)
 220                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 221                                                 (item->mask))->hdr.proto;
 222                 else
 223                         ip_next_proto_m =
 224                                 rte_flow_item_ipv6_mask.hdr.proto;
 225                 if (ip_next_proto_m != 0xFF)
 226                         break;
 227                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 228                                 (item->spec))->hdr.proto;
 229                 if (ip_next_proto == IPPROTO_UDP)
 230                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 231                 else if (ip_next_proto == IPPROTO_TCP)
 232                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 233                 else if (ip_next_proto == IPPROTO_IP)
 234                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 235                 else if (ip_next_proto == IPPROTO_IPV6)
 236                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 237                 else
 238                         ret = RTE_FLOW_ITEM_TYPE_END;
 239                 break;
 240         default:
 241                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 242                 break;
 243         }
 244         return ret;
 245 }
 246
 247 #define MLX5_RSS_EXP_ELT_N 16
 248
 249 /**
 250  * Expand RSS flows into several possible flows according to the RSS hash
 251  * fields requested and the driver capabilities.
 252  *
 253  * @param[out] buf
 254  *   Buffer to store the result expansion.
 255  * @param[in] size
 256  *   Buffer size in bytes. If 0, @p buf can be NULL.
 257  * @param[in] pattern
 258  *   User flow pattern.
 259  * @param[in] types
 260  *   RSS types to expand (see ETH_RSS_* definitions).
 261  * @param[in] graph
 262  *   Input graph to expand @p pattern according to @p types.
 263  * @param[in] graph_root_index
 264  *   Index of root node in @p graph, typically 0.
 265  *
 266  * @return
 267  *   A positive value representing the size of @p buf in bytes regardless of
 268  *   @p size on success, a negative errno value otherwise and rte_errno is
 269  *   set, the following errors are defined:
 270  *
 271  *   -E2BIG: graph-depth @p graph is too deep.
 272  *   -EINVAL: @p size has not enough space for expanded pattern.
 273  */
 274 static int
 275 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 276                      const struct rte_flow_item *pattern, uint64_t types,
 277                      const struct mlx5_flow_expand_node graph[],
 278                      int graph_root_index)
 279 {
 280         const struct rte_flow_item *item;
 281         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 282         const int *next_node;
 283         const int *stack[MLX5_RSS_EXP_ELT_N];
 284         int stack_pos = 0;
 285         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 286         unsigned int i;
 287         size_t lsize;
 288         size_t user_pattern_size = 0;
 289         void *addr = NULL;
 290         const struct mlx5_flow_expand_node *next = NULL;
 291         struct rte_flow_item missed_item;
 292         int missed = 0;
 293         int elt = 0;
 294         const struct rte_flow_item *last_item = NULL;
 295
 296         memset(&missed_item, 0, sizeof(missed_item));
 297         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 298                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 299         if (lsize > size)
 300                 return -EINVAL;
 301         buf->entry[0].priority = 0;
 302         buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 303         buf->entries = 0;
 304         addr = buf->entry[0].pattern;
 305         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 306                 if (!mlx5_flow_is_rss_expandable_item(item)) {
 307                         user_pattern_size += sizeof(*item);
 308                         continue;
 309                 }
 310                 last_item = item;
 311                 for (i = 0; node->next && node->next[i]; ++i) {
 312                         next = &graph[node->next[i]];
 313                         if (next->type == item->type)
 314                                 break;
 315                 }
 316                 if (next)
 317                         node = next;
 318                 user_pattern_size += sizeof(*item);
 319         }
 320         user_pattern_size += sizeof(*item); /* Handle END item. */
 321         lsize += user_pattern_size;
 322         if (lsize > size)
 323                 return -EINVAL;
 324         /* Copy the user pattern in the first entry of the buffer. */
 325         rte_memcpy(addr, pattern, user_pattern_size);
 326         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 327         buf->entries = 1;
 328         /* Start expanding. */
 329         memset(flow_items, 0, sizeof(flow_items));
 330         user_pattern_size -= sizeof(*item);
 331         /*
 332          * Check if the last valid item has spec set, need complete pattern,
 333          * and the pattern can be used for expansion.
 334          */
 335         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 336         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 337                 /* Item type END indicates expansion is not required. */
 338                 return lsize;
 339         }
 340         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 341                 next = NULL;
 342                 missed = 1;
 343                 for (i = 0; node->next && node->next[i]; ++i) {
 344                         next = &graph[node->next[i]];
 345                         if (next->type == missed_item.type) {
 346                                 flow_items[0].type = missed_item.type;
 347                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 348                                 break;
 349                         }
 350                         next = NULL;
 351                 }
 352         }
 353         if (next && missed) {
 354                 elt = 2; /* missed item + item end. */
 355                 node = next;
 356                 lsize += elt * sizeof(*item) + user_pattern_size;
 357                 if (lsize > size)
 358                         return -EINVAL;
 359                 if (node->rss_types & types) {
 360                         buf->entry[buf->entries].priority = 1;
 361                         buf->entry[buf->entries].pattern = addr;
 362                         buf->entries++;
 363                         rte_memcpy(addr, buf->entry[0].pattern,
 364                                    user_pattern_size);
 365                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 366                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 367                         addr = (void *)(((uintptr_t)addr) +
 368                                         elt * sizeof(*item));
 369                 }
 370         }
 371         memset(flow_items, 0, sizeof(flow_items));
 372         next_node = node->next;
 373         stack[stack_pos] = next_node;
 374         node = next_node ? &graph[*next_node] : NULL;
 375         while (node) {
 376                 flow_items[stack_pos].type = node->type;
 377                 if (node->rss_types & types) {
 378                         size_t n;
 379                         /*
 380                          * compute the number of items to copy from the
 381                          * expansion and copy it.
 382                          * When the stack_pos is 0, there are 1 element in it,
 383                          * plus the addition END item.
 384                          */
 385                         elt = stack_pos + 2;
 386                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 387                         lsize += elt * sizeof(*item) + user_pattern_size;
 388                         if (lsize > size)
 389                                 return -EINVAL;
 390                         n = elt * sizeof(*item);
 391                         buf->entry[buf->entries].priority =
 392                                 stack_pos + 1 + missed;
 393                         buf->entry[buf->entries].pattern = addr;
 394                         buf->entries++;
 395                         rte_memcpy(addr, buf->entry[0].pattern,
 396                                    user_pattern_size);
 397                         addr = (void *)(((uintptr_t)addr) +
 398                                         user_pattern_size);
 399                         rte_memcpy(addr, &missed_item,
 400                                    missed * sizeof(*item));
 401                         addr = (void *)(((uintptr_t)addr) +
 402                                 missed * sizeof(*item));
 403                         rte_memcpy(addr, flow_items, n);
 404                         addr = (void *)(((uintptr_t)addr) + n);
 405                 }
 406                 /* Go deeper. */
 407                 if (!node->optional && node->next) {
 408                         next_node = node->next;
 409                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 410                                 rte_errno = E2BIG;
 411                                 return -rte_errno;
 412                         }
 413                         stack[stack_pos] = next_node;
 414                 } else if (*(next_node + 1)) {
 415                         /* Follow up with the next possibility. */
 416                         ++next_node;
 417                 } else {
 418                         /* Move to the next path. */
 419                         if (stack_pos)
 420                                 next_node = stack[--stack_pos];
 421                         next_node++;
 422                         stack[stack_pos] = next_node;
 423                 }
 424                 node = *next_node ? &graph[*next_node] : NULL;
 425         };
 426         return lsize;
 427 }
 428
 429 enum mlx5_expansion {
 430         MLX5_EXPANSION_ROOT,
 431         MLX5_EXPANSION_ROOT_OUTER,
 432         MLX5_EXPANSION_ROOT_ETH_VLAN,
 433         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 434         MLX5_EXPANSION_OUTER_ETH,
 435         MLX5_EXPANSION_OUTER_ETH_VLAN,
 436         MLX5_EXPANSION_OUTER_VLAN,
 437         MLX5_EXPANSION_OUTER_IPV4,
 438         MLX5_EXPANSION_OUTER_IPV4_UDP,
 439         MLX5_EXPANSION_OUTER_IPV4_TCP,
 440         MLX5_EXPANSION_OUTER_IPV6,
 441         MLX5_EXPANSION_OUTER_IPV6_UDP,
 442         MLX5_EXPANSION_OUTER_IPV6_TCP,
 443         MLX5_EXPANSION_VXLAN,
 444         MLX5_EXPANSION_VXLAN_GPE,
 445         MLX5_EXPANSION_GRE,
 446         MLX5_EXPANSION_NVGRE,
 447         MLX5_EXPANSION_GRE_KEY,
 448         MLX5_EXPANSION_MPLS,
 449         MLX5_EXPANSION_ETH,
 450         MLX5_EXPANSION_ETH_VLAN,
 451         MLX5_EXPANSION_VLAN,
 452         MLX5_EXPANSION_IPV4,
 453         MLX5_EXPANSION_IPV4_UDP,
 454         MLX5_EXPANSION_IPV4_TCP,
 455         MLX5_EXPANSION_IPV6,
 456         MLX5_EXPANSION_IPV6_UDP,
 457         MLX5_EXPANSION_IPV6_TCP,
 458         MLX5_EXPANSION_IPV6_FRAG_EXT,
 459         MLX5_EXPANSION_GTP
 460 };
 461
 462 /** Supported expansion of items. */
 463 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 464         [MLX5_EXPANSION_ROOT] = {
 465                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 466                                                   MLX5_EXPANSION_IPV4,
 467                                                   MLX5_EXPANSION_IPV6),
 468                 .type = RTE_FLOW_ITEM_TYPE_END,
 469         },
 470         [MLX5_EXPANSION_ROOT_OUTER] = {
 471                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 472                                                   MLX5_EXPANSION_OUTER_IPV4,
 473                                                   MLX5_EXPANSION_OUTER_IPV6),
 474                 .type = RTE_FLOW_ITEM_TYPE_END,
 475         },
 476         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 477                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 478                 .type = RTE_FLOW_ITEM_TYPE_END,
 479         },
 480         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 481                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 482                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 483                 .type = RTE_FLOW_ITEM_TYPE_END,
 484         },
 485         [MLX5_EXPANSION_OUTER_ETH] = {
 486                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 487                                                   MLX5_EXPANSION_OUTER_IPV6),
 488                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 489                 .rss_types = 0,
 490         },
 491         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 492                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 493                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 494                 .rss_types = 0,
 495         },
 496         [MLX5_EXPANSION_OUTER_VLAN] = {
 497                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 498                                                   MLX5_EXPANSION_OUTER_IPV6),
 499                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 500         },
 501         [MLX5_EXPANSION_OUTER_IPV4] = {
 502                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 503                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 504                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 505                          MLX5_EXPANSION_GRE,
 506                          MLX5_EXPANSION_NVGRE,
 507                          MLX5_EXPANSION_IPV4,
 508                          MLX5_EXPANSION_IPV6),
 509                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 510                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 511                         ETH_RSS_NONFRAG_IPV4_OTHER,
 512         },
 513         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 514                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 515                                                   MLX5_EXPANSION_VXLAN_GPE,
 516                                                   MLX5_EXPANSION_MPLS,
 517                                                   MLX5_EXPANSION_GTP),
 518                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 519                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 520         },
 521         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 522                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 523                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 524         },
 525         [MLX5_EXPANSION_OUTER_IPV6] = {
 526                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 527                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 528                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 529                          MLX5_EXPANSION_IPV4,
 530                          MLX5_EXPANSION_IPV6,
 531                          MLX5_EXPANSION_GRE,
 532                          MLX5_EXPANSION_NVGRE),
 533                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 534                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 535                         ETH_RSS_NONFRAG_IPV6_OTHER,
 536         },
 537         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 538                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 539                                                   MLX5_EXPANSION_VXLAN_GPE,
 540                                                   MLX5_EXPANSION_MPLS,
 541                                                   MLX5_EXPANSION_GTP),
 542                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 543                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 544         },
 545         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 546                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 547                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 548         },
 549         [MLX5_EXPANSION_VXLAN] = {
 550                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 551                                                   MLX5_EXPANSION_IPV4,
 552                                                   MLX5_EXPANSION_IPV6),
 553                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 554         },
 555         [MLX5_EXPANSION_VXLAN_GPE] = {
 556                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 557                                                   MLX5_EXPANSION_IPV4,
 558                                                   MLX5_EXPANSION_IPV6),
 559                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 560         },
 561         [MLX5_EXPANSION_GRE] = {
 562                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 563                                                   MLX5_EXPANSION_IPV6,
 564                                                   MLX5_EXPANSION_GRE_KEY,
 565                                                   MLX5_EXPANSION_MPLS),
 566                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 567         },
 568         [MLX5_EXPANSION_GRE_KEY] = {
 569                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 570                                                   MLX5_EXPANSION_IPV6,
 571                                                   MLX5_EXPANSION_MPLS),
 572                 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
 573                 .optional = 1,
 574         },
 575         [MLX5_EXPANSION_NVGRE] = {
 576                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 577                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
 578         },
 579         [MLX5_EXPANSION_MPLS] = {
 580                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 581                                                   MLX5_EXPANSION_IPV6,
 582                                                   MLX5_EXPANSION_ETH),
 583                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 584                 .optional = 1,
 585         },
 586         [MLX5_EXPANSION_ETH] = {
 587                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 588                                                   MLX5_EXPANSION_IPV6),
 589                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 590         },
 591         [MLX5_EXPANSION_ETH_VLAN] = {
 592                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 593                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 594         },
 595         [MLX5_EXPANSION_VLAN] = {
 596                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 597                                                   MLX5_EXPANSION_IPV6),
 598                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 599         },
 600         [MLX5_EXPANSION_IPV4] = {
 601                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 602                                                   MLX5_EXPANSION_IPV4_TCP),
 603                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 604                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 605                         ETH_RSS_NONFRAG_IPV4_OTHER,
 606         },
 607         [MLX5_EXPANSION_IPV4_UDP] = {
 608                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 609                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 610         },
 611         [MLX5_EXPANSION_IPV4_TCP] = {
 612                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 613                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 614         },
 615         [MLX5_EXPANSION_IPV6] = {
 616                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 617                                                   MLX5_EXPANSION_IPV6_TCP,
 618                                                   MLX5_EXPANSION_IPV6_FRAG_EXT),
 619                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 620                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 621                         ETH_RSS_NONFRAG_IPV6_OTHER,
 622         },
 623         [MLX5_EXPANSION_IPV6_UDP] = {
 624                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 625                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 626         },
 627         [MLX5_EXPANSION_IPV6_TCP] = {
 628                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 629                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 630         },
 631         [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
 632                 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
 633         },
 634         [MLX5_EXPANSION_GTP] = {
 635                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 636                                                           MLX5_EXPANSION_IPV6),
 637                         .type = RTE_FLOW_ITEM_TYPE_GTP
 638         }
 639 };
 640
 641 static struct rte_flow_action_handle *
 642 mlx5_action_handle_create(struct rte_eth_dev *dev,
 643                           const struct rte_flow_indir_action_conf *conf,
 644                           const struct rte_flow_action *action,
 645                           struct rte_flow_error *error);
 646 static int mlx5_action_handle_destroy
 647                                 (struct rte_eth_dev *dev,
 648                                  struct rte_flow_action_handle *handle,
 649                                  struct rte_flow_error *error);
 650 static int mlx5_action_handle_update
 651                                 (struct rte_eth_dev *dev,
 652                                  struct rte_flow_action_handle *handle,
 653                                  const void *update,
 654                                  struct rte_flow_error *error);
 655 static int mlx5_action_handle_query
 656                                 (struct rte_eth_dev *dev,
 657                                  const struct rte_flow_action_handle *handle,
 658                                  void *data,
 659                                  struct rte_flow_error *error);
 660 static int
 661 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 662                     struct rte_flow_tunnel *app_tunnel,
 663                     struct rte_flow_action **actions,
 664                     uint32_t *num_of_actions,
 665                     struct rte_flow_error *error);
 666 static int
 667 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 668                        struct rte_flow_tunnel *app_tunnel,
 669                        struct rte_flow_item **items,
 670                        uint32_t *num_of_items,
 671                        struct rte_flow_error *error);
 672 static int
 673 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 674                               struct rte_flow_item *pmd_items,
 675                               uint32_t num_items, struct rte_flow_error *err);
 676 static int
 677 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 678                                 struct rte_flow_action *pmd_actions,
 679                                 uint32_t num_actions,
 680                                 struct rte_flow_error *err);
 681 static int
 682 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 683                                   struct rte_mbuf *m,
 684                                   struct rte_flow_restore_info *info,
 685                                   struct rte_flow_error *err);
 686
 687 static const struct rte_flow_ops mlx5_flow_ops = {
 688         .validate = mlx5_flow_validate,
 689         .create = mlx5_flow_create,
 690         .destroy = mlx5_flow_destroy,
 691         .flush = mlx5_flow_flush,
 692         .isolate = mlx5_flow_isolate,
 693         .query = mlx5_flow_query,
 694         .dev_dump = mlx5_flow_dev_dump,
 695         .get_aged_flows = mlx5_flow_get_aged_flows,
 696         .action_handle_create = mlx5_action_handle_create,
 697         .action_handle_destroy = mlx5_action_handle_destroy,
 698         .action_handle_update = mlx5_action_handle_update,
 699         .action_handle_query = mlx5_action_handle_query,
 700         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 701         .tunnel_match = mlx5_flow_tunnel_match,
 702         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 703         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 704         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 705 };
 706
 707 /* Tunnel information. */
 708 struct mlx5_flow_tunnel_info {
 709         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 710         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 711 };
 712
 713 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 714         {
 715                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 716                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 717         },
 718         {
 719                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 720                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 721         },
 722         {
 723                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 724                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 725         },
 726         {
 727                 .tunnel = MLX5_FLOW_LAYER_GRE,
 728                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 729         },
 730         {
 731                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 732                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 733         },
 734         {
 735                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 736                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 737         },
 738         {
 739                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 740                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 741         },
 742         {
 743                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 744                 .ptype = RTE_PTYPE_TUNNEL_IP,
 745         },
 746         {
 747                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 748                 .ptype = RTE_PTYPE_TUNNEL_IP,
 749         },
 750         {
 751                 .tunnel = MLX5_FLOW_LAYER_GTP,
 752                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 753         },
 754 };
 755
 756
 757
 758 /**
 759  * Translate tag ID to register.
 760  *
 761  * @param[in] dev
 762  *   Pointer to the Ethernet device structure.
 763  * @param[in] feature
 764  *   The feature that request the register.
 765  * @param[in] id
 766  *   The request register ID.
 767  * @param[out] error
 768  *   Error description in case of any.
 769  *
 770  * @return
 771  *   The request register on success, a negative errno
 772  *   value otherwise and rte_errno is set.
 773  */
 774 int
 775 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 776                      enum mlx5_feature_name feature,
 777                      uint32_t id,
 778                      struct rte_flow_error *error)
 779 {
 780         struct mlx5_priv *priv = dev->data->dev_private;
 781         struct mlx5_dev_config *config = &priv->config;
 782         enum modify_reg start_reg;
 783         bool skip_mtr_reg = false;
 784
 785         switch (feature) {
 786         case MLX5_HAIRPIN_RX:
 787                 return REG_B;
 788         case MLX5_HAIRPIN_TX:
 789                 return REG_A;
 790         case MLX5_METADATA_RX:
 791                 switch (config->dv_xmeta_en) {
 792                 case MLX5_XMETA_MODE_LEGACY:
 793                         return REG_B;
 794                 case MLX5_XMETA_MODE_META16:
 795                         return REG_C_0;
 796                 case MLX5_XMETA_MODE_META32:
 797                         return REG_C_1;
 798                 }
 799                 break;
 800         case MLX5_METADATA_TX:
 801                 return REG_A;
 802         case MLX5_METADATA_FDB:
 803                 switch (config->dv_xmeta_en) {
 804                 case MLX5_XMETA_MODE_LEGACY:
 805                         return REG_NON;
 806                 case MLX5_XMETA_MODE_META16:
 807                         return REG_C_0;
 808                 case MLX5_XMETA_MODE_META32:
 809                         return REG_C_1;
 810                 }
 811                 break;
 812         case MLX5_FLOW_MARK:
 813                 switch (config->dv_xmeta_en) {
 814                 case MLX5_XMETA_MODE_LEGACY:
 815                         return REG_NON;
 816                 case MLX5_XMETA_MODE_META16:
 817                         return REG_C_1;
 818                 case MLX5_XMETA_MODE_META32:
 819                         return REG_C_0;
 820                 }
 821                 break;
 822         case MLX5_MTR_ID:
 823                 /*
 824                  * If meter color and meter id share one register, flow match
 825                  * should use the meter color register for match.
 826                  */
 827                 if (priv->mtr_reg_share)
 828                         return priv->mtr_color_reg;
 829                 else
 830                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 831                                REG_C_3;
 832         case MLX5_MTR_COLOR:
 833         case MLX5_ASO_FLOW_HIT:
 834         case MLX5_ASO_CONNTRACK:
 835                 /* All features use the same REG_C. */
 836                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 837                 return priv->mtr_color_reg;
 838         case MLX5_COPY_MARK:
 839                 /*
 840                  * Metadata COPY_MARK register using is in meter suffix sub
 841                  * flow while with meter. It's safe to share the same register.
 842                  */
 843                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 844         case MLX5_APP_TAG:
 845                 /*
 846                  * If meter is enable, it will engage the register for color
 847                  * match and flow match. If meter color match is not using the
 848                  * REG_C_2, need to skip the REG_C_x be used by meter color
 849                  * match.
 850                  * If meter is disable, free to use all available registers.
 851                  */
 852                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 853                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 854                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 855                 if (id > (uint32_t)(REG_C_7 - start_reg))
 856                         return rte_flow_error_set(error, EINVAL,
 857                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 858                                                   NULL, "invalid tag id");
 859                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 860                         return rte_flow_error_set(error, ENOTSUP,
 861                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 862                                                   NULL, "unsupported tag id");
 863                 /*
 864                  * This case means meter is using the REG_C_x great than 2.
 865                  * Take care not to conflict with meter color REG_C_x.
 866                  * If the available index REG_C_y >= REG_C_x, skip the
 867                  * color register.
 868                  */
 869                 if (skip_mtr_reg && config->flow_mreg_c
 870                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 871                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 872                                 return rte_flow_error_set(error, EINVAL,
 873                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 874                                                         NULL, "invalid tag id");
 875                         if (config->flow_mreg_c
 876                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 877                                 return config->flow_mreg_c
 878                                                [id + 1 + start_reg - REG_C_0];
 879                         return rte_flow_error_set(error, ENOTSUP,
 880                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 881                                                   NULL, "unsupported tag id");
 882                 }
 883                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 884         }
 885         MLX5_ASSERT(false);
 886         return rte_flow_error_set(error, EINVAL,
 887                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 888                                   NULL, "invalid feature name");
 889 }
 890
 891 /**
 892  * Check extensive flow metadata register support.
 893  *
 894  * @param dev
 895  *   Pointer to rte_eth_dev structure.
 896  *
 897  * @return
 898  *   True if device supports extensive flow metadata register, otherwise false.
 899  */
 900 bool
 901 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 902 {
 903         struct mlx5_priv *priv = dev->data->dev_private;
 904         struct mlx5_dev_config *config = &priv->config;
 905
 906         /*
 907          * Having available reg_c can be regarded inclusively as supporting
 908          * extensive flow metadata register, which could mean,
 909          * - metadata register copy action by modify header.
 910          * - 16 modify header actions is supported.
 911          * - reg_c's are preserved across different domain (FDB and NIC) on
 912          *   packet loopback by flow lookup miss.
 913          */
 914         return config->flow_mreg_c[2] != REG_NON;
 915 }
 916
 917 /**
 918  * Get the lowest priority.
 919  *
 920  * @param[in] dev
 921  *   Pointer to the Ethernet device structure.
 922  * @param[in] attributes
 923  *   Pointer to device flow rule attributes.
 924  *
 925  * @return
 926  *   The value of lowest priority of flow.
 927  */
 928 uint32_t
 929 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 930                           const struct rte_flow_attr *attr)
 931 {
 932         struct mlx5_priv *priv = dev->data->dev_private;
 933
 934         if (!attr->group && !attr->transfer)
 935                 return priv->config.flow_prio - 2;
 936         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
 937 }
 938
 939 /**
 940  * Calculate matcher priority of the flow.
 941  *
 942  * @param[in] dev
 943  *   Pointer to the Ethernet device structure.
 944  * @param[in] attr
 945  *   Pointer to device flow rule attributes.
 946  * @param[in] subpriority
 947  *   The priority based on the items.
 948  * @return
 949  *   The matcher priority of the flow.
 950  */
 951 uint16_t
 952 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 953                           const struct rte_flow_attr *attr,
 954                           uint32_t subpriority)
 955 {
 956         uint16_t priority = (uint16_t)attr->priority;
 957         struct mlx5_priv *priv = dev->data->dev_private;
 958
 959         if (!attr->group && !attr->transfer) {
 960                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 961                         priority = priv->config.flow_prio - 1;
 962                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
 963         }
 964         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 965                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
 966         return priority * 3 + subpriority;
 967 }
 968
 969 /**
 970  * Verify the @p item specifications (spec, last, mask) are compatible with the
 971  * NIC capabilities.
 972  *
 973  * @param[in] item
 974  *   Item specification.
 975  * @param[in] mask
 976  *   @p item->mask or flow default bit-masks.
 977  * @param[in] nic_mask
 978  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 979  * @param[in] size
 980  *   Bit-masks size in bytes.
 981  * @param[in] range_accepted
 982  *   True if range of values is accepted for specific fields, false otherwise.
 983  * @param[out] error
 984  *   Pointer to error structure.
 985  *
 986  * @return
 987  *   0 on success, a negative errno value otherwise and rte_errno is set.
 988  */
 989 int
 990 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 991                           const uint8_t *mask,
 992                           const uint8_t *nic_mask,
 993                           unsigned int size,
 994                           bool range_accepted,
 995                           struct rte_flow_error *error)
 996 {
 997         unsigned int i;
 998
 999         MLX5_ASSERT(nic_mask);
1000         for (i = 0; i < size; ++i)
1001                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1002                         return rte_flow_error_set(error, ENOTSUP,
1003                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1004                                                   item,
1005                                                   "mask enables non supported"
1006                                                   " bits");
1007         if (!item->spec && (item->mask || item->last))
1008                 return rte_flow_error_set(error, EINVAL,
1009                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1010                                           "mask/last without a spec is not"
1011                                           " supported");
1012         if (item->spec && item->last && !range_accepted) {
1013                 uint8_t spec[size];
1014                 uint8_t last[size];
1015                 unsigned int i;
1016                 int ret;
1017
1018                 for (i = 0; i < size; ++i) {
1019                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1020                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1021                 }
1022                 ret = memcmp(spec, last, size);
1023                 if (ret != 0)
1024                         return rte_flow_error_set(error, EINVAL,
1025                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1026                                                   item,
1027                                                   "range is not valid");
1028         }
1029         return 0;
1030 }
1031
1032 /**
1033  * Adjust the hash fields according to the @p flow information.
1034  *
1035  * @param[in] dev_flow.
1036  *   Pointer to the mlx5_flow.
1037  * @param[in] tunnel
1038  *   1 when the hash field is for a tunnel item.
1039  * @param[in] layer_types
1040  *   ETH_RSS_* types.
1041  * @param[in] hash_fields
1042  *   Item hash fields.
1043  *
1044  * @return
1045  *   The hash fields that should be used.
1046  */
1047 uint64_t
1048 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1049                             int tunnel __rte_unused, uint64_t layer_types,
1050                             uint64_t hash_fields)
1051 {
1052 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1053         int rss_request_inner = rss_desc->level >= 2;
1054
1055         /* Check RSS hash level for tunnel. */
1056         if (tunnel && rss_request_inner)
1057                 hash_fields |= IBV_RX_HASH_INNER;
1058         else if (tunnel || rss_request_inner)
1059                 return 0;
1060 #endif
1061         /* Check if requested layer matches RSS hash fields. */
1062         if (!(rss_desc->types & layer_types))
1063                 return 0;
1064         return hash_fields;
1065 }
1066
1067 /**
1068  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1069  * if several tunnel rules are used on this queue, the tunnel ptype will be
1070  * cleared.
1071  *
1072  * @param rxq_ctrl
1073  *   Rx queue to update.
1074  */
1075 static void
1076 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1077 {
1078         unsigned int i;
1079         uint32_t tunnel_ptype = 0;
1080
1081         /* Look up for the ptype to use. */
1082         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1083                 if (!rxq_ctrl->flow_tunnels_n[i])
1084                         continue;
1085                 if (!tunnel_ptype) {
1086                         tunnel_ptype = tunnels_info[i].ptype;
1087                 } else {
1088                         tunnel_ptype = 0;
1089                         break;
1090                 }
1091         }
1092         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1093 }
1094
1095 /**
1096  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1097  * flow.
1098  *
1099  * @param[in] dev
1100  *   Pointer to the Ethernet device structure.
1101  * @param[in] dev_handle
1102  *   Pointer to device flow handle structure.
1103  */
1104 void
1105 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1106                        struct mlx5_flow_handle *dev_handle)
1107 {
1108         struct mlx5_priv *priv = dev->data->dev_private;
1109         const int mark = dev_handle->mark;
1110         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1111         struct mlx5_ind_table_obj *ind_tbl = NULL;
1112         unsigned int i;
1113
1114         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1115                 struct mlx5_hrxq *hrxq;
1116
1117                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1118                               dev_handle->rix_hrxq);
1119                 if (hrxq)
1120                         ind_tbl = hrxq->ind_table;
1121         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1122                 struct mlx5_shared_action_rss *shared_rss;
1123
1124                 shared_rss = mlx5_ipool_get
1125                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1126                          dev_handle->rix_srss);
1127                 if (shared_rss)
1128                         ind_tbl = shared_rss->ind_tbl;
1129         }
1130         if (!ind_tbl)
1131                 return;
1132         for (i = 0; i != ind_tbl->queues_n; ++i) {
1133                 int idx = ind_tbl->queues[i];
1134                 struct mlx5_rxq_ctrl *rxq_ctrl =
1135                         container_of((*priv->rxqs)[idx],
1136                                      struct mlx5_rxq_ctrl, rxq);
1137
1138                 /*
1139                  * To support metadata register copy on Tx loopback,
1140                  * this must be always enabled (metadata may arive
1141                  * from other port - not from local flows only.
1142                  */
1143                 if (priv->config.dv_flow_en &&
1144                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1145                     mlx5_flow_ext_mreg_supported(dev)) {
1146                         rxq_ctrl->rxq.mark = 1;
1147                         rxq_ctrl->flow_mark_n = 1;
1148                 } else if (mark) {
1149                         rxq_ctrl->rxq.mark = 1;
1150                         rxq_ctrl->flow_mark_n++;
1151                 }
1152                 if (tunnel) {
1153                         unsigned int j;
1154
1155                         /* Increase the counter matching the flow. */
1156                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1157                                 if ((tunnels_info[j].tunnel &
1158                                      dev_handle->layers) ==
1159                                     tunnels_info[j].tunnel) {
1160                                         rxq_ctrl->flow_tunnels_n[j]++;
1161                                         break;
1162                                 }
1163                         }
1164                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1165                 }
1166         }
1167 }
1168
1169 /**
1170  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1171  *
1172  * @param[in] dev
1173  *   Pointer to the Ethernet device structure.
1174  * @param[in] flow
1175  *   Pointer to flow structure.
1176  */
1177 static void
1178 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1179 {
1180         struct mlx5_priv *priv = dev->data->dev_private;
1181         uint32_t handle_idx;
1182         struct mlx5_flow_handle *dev_handle;
1183
1184         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1185                        handle_idx, dev_handle, next)
1186                 flow_drv_rxq_flags_set(dev, dev_handle);
1187 }
1188
1189 /**
1190  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1191  * device flow if no other flow uses it with the same kind of request.
1192  *
1193  * @param dev
1194  *   Pointer to Ethernet device.
1195  * @param[in] dev_handle
1196  *   Pointer to the device flow handle structure.
1197  */
1198 static void
1199 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1200                         struct mlx5_flow_handle *dev_handle)
1201 {
1202         struct mlx5_priv *priv = dev->data->dev_private;
1203         const int mark = dev_handle->mark;
1204         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1205         struct mlx5_ind_table_obj *ind_tbl = NULL;
1206         unsigned int i;
1207
1208         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1209                 struct mlx5_hrxq *hrxq;
1210
1211                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1212                               dev_handle->rix_hrxq);
1213                 if (hrxq)
1214                         ind_tbl = hrxq->ind_table;
1215         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1216                 struct mlx5_shared_action_rss *shared_rss;
1217
1218                 shared_rss = mlx5_ipool_get
1219                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1220                          dev_handle->rix_srss);
1221                 if (shared_rss)
1222                         ind_tbl = shared_rss->ind_tbl;
1223         }
1224         if (!ind_tbl)
1225                 return;
1226         MLX5_ASSERT(dev->data->dev_started);
1227         for (i = 0; i != ind_tbl->queues_n; ++i) {
1228                 int idx = ind_tbl->queues[i];
1229                 struct mlx5_rxq_ctrl *rxq_ctrl =
1230                         container_of((*priv->rxqs)[idx],
1231                                      struct mlx5_rxq_ctrl, rxq);
1232
1233                 if (priv->config.dv_flow_en &&
1234                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1235                     mlx5_flow_ext_mreg_supported(dev)) {
1236                         rxq_ctrl->rxq.mark = 1;
1237                         rxq_ctrl->flow_mark_n = 1;
1238                 } else if (mark) {
1239                         rxq_ctrl->flow_mark_n--;
1240                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1241                 }
1242                 if (tunnel) {
1243                         unsigned int j;
1244
1245                         /* Decrease the counter matching the flow. */
1246                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1247                                 if ((tunnels_info[j].tunnel &
1248                                      dev_handle->layers) ==
1249                                     tunnels_info[j].tunnel) {
1250                                         rxq_ctrl->flow_tunnels_n[j]--;
1251                                         break;
1252                                 }
1253                         }
1254                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1255                 }
1256         }
1257 }
1258
1259 /**
1260  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1261  * @p flow if no other flow uses it with the same kind of request.
1262  *
1263  * @param dev
1264  *   Pointer to Ethernet device.
1265  * @param[in] flow
1266  *   Pointer to the flow.
1267  */
1268 static void
1269 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1270 {
1271         struct mlx5_priv *priv = dev->data->dev_private;
1272         uint32_t handle_idx;
1273         struct mlx5_flow_handle *dev_handle;
1274
1275         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1276                        handle_idx, dev_handle, next)
1277                 flow_drv_rxq_flags_trim(dev, dev_handle);
1278 }
1279
1280 /**
1281  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1282  *
1283  * @param dev
1284  *   Pointer to Ethernet device.
1285  */
1286 static void
1287 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1288 {
1289         struct mlx5_priv *priv = dev->data->dev_private;
1290         unsigned int i;
1291
1292         for (i = 0; i != priv->rxqs_n; ++i) {
1293                 struct mlx5_rxq_ctrl *rxq_ctrl;
1294                 unsigned int j;
1295
1296                 if (!(*priv->rxqs)[i])
1297                         continue;
1298                 rxq_ctrl = container_of((*priv->rxqs)[i],
1299                                         struct mlx5_rxq_ctrl, rxq);
1300                 rxq_ctrl->flow_mark_n = 0;
1301                 rxq_ctrl->rxq.mark = 0;
1302                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1303                         rxq_ctrl->flow_tunnels_n[j] = 0;
1304                 rxq_ctrl->rxq.tunnel = 0;
1305         }
1306 }
1307
1308 /**
1309  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1310  *
1311  * @param[in] dev
1312  *   Pointer to the Ethernet device structure.
1313  */
1314 void
1315 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1316 {
1317         struct mlx5_priv *priv = dev->data->dev_private;
1318         struct mlx5_rxq_data *data;
1319         unsigned int i;
1320
1321         for (i = 0; i != priv->rxqs_n; ++i) {
1322                 if (!(*priv->rxqs)[i])
1323                         continue;
1324                 data = (*priv->rxqs)[i];
1325                 if (!rte_flow_dynf_metadata_avail()) {
1326                         data->dynf_meta = 0;
1327                         data->flow_meta_mask = 0;
1328                         data->flow_meta_offset = -1;
1329                         data->flow_meta_port_mask = 0;
1330                 } else {
1331                         data->dynf_meta = 1;
1332                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1333                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1334                         data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1335                 }
1336         }
1337 }
1338
1339 /*
1340  * return a pointer to the desired action in the list of actions.
1341  *
1342  * @param[in] actions
1343  *   The list of actions to search the action in.
1344  * @param[in] action
1345  *   The action to find.
1346  *
1347  * @return
1348  *   Pointer to the action in the list, if found. NULL otherwise.
1349  */
1350 const struct rte_flow_action *
1351 mlx5_flow_find_action(const struct rte_flow_action *actions,
1352                       enum rte_flow_action_type action)
1353 {
1354         if (actions == NULL)
1355                 return NULL;
1356         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1357                 if (actions->type == action)
1358                         return actions;
1359         return NULL;
1360 }
1361
1362 /*
1363  * Validate the flag action.
1364  *
1365  * @param[in] action_flags
1366  *   Bit-fields that holds the actions detected until now.
1367  * @param[in] attr
1368  *   Attributes of flow that includes this action.
1369  * @param[out] error
1370  *   Pointer to error structure.
1371  *
1372  * @return
1373  *   0 on success, a negative errno value otherwise and rte_errno is set.
1374  */
1375 int
1376 mlx5_flow_validate_action_flag(uint64_t action_flags,
1377                                const struct rte_flow_attr *attr,
1378                                struct rte_flow_error *error)
1379 {
1380         if (action_flags & MLX5_FLOW_ACTION_MARK)
1381                 return rte_flow_error_set(error, EINVAL,
1382                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1383                                           "can't mark and flag in same flow");
1384         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1385                 return rte_flow_error_set(error, EINVAL,
1386                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1387                                           "can't have 2 flag"
1388                                           " actions in same flow");
1389         if (attr->egress)
1390                 return rte_flow_error_set(error, ENOTSUP,
1391                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1392                                           "flag action not supported for "
1393                                           "egress");
1394         return 0;
1395 }
1396
1397 /*
1398  * Validate the mark action.
1399  *
1400  * @param[in] action
1401  *   Pointer to the queue action.
1402  * @param[in] action_flags
1403  *   Bit-fields that holds the actions detected until now.
1404  * @param[in] attr
1405  *   Attributes of flow that includes this action.
1406  * @param[out] error
1407  *   Pointer to error structure.
1408  *
1409  * @return
1410  *   0 on success, a negative errno value otherwise and rte_errno is set.
1411  */
1412 int
1413 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1414                                uint64_t action_flags,
1415                                const struct rte_flow_attr *attr,
1416                                struct rte_flow_error *error)
1417 {
1418         const struct rte_flow_action_mark *mark = action->conf;
1419
1420         if (!mark)
1421                 return rte_flow_error_set(error, EINVAL,
1422                                           RTE_FLOW_ERROR_TYPE_ACTION,
1423                                           action,
1424                                           "configuration cannot be null");
1425         if (mark->id >= MLX5_FLOW_MARK_MAX)
1426                 return rte_flow_error_set(error, EINVAL,
1427                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1428                                           &mark->id,
1429                                           "mark id must in 0 <= id < "
1430                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1431         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1432                 return rte_flow_error_set(error, EINVAL,
1433                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1434                                           "can't flag and mark in same flow");
1435         if (action_flags & MLX5_FLOW_ACTION_MARK)
1436                 return rte_flow_error_set(error, EINVAL,
1437                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1438                                           "can't have 2 mark actions in same"
1439                                           " flow");
1440         if (attr->egress)
1441                 return rte_flow_error_set(error, ENOTSUP,
1442                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1443                                           "mark action not supported for "
1444                                           "egress");
1445         return 0;
1446 }
1447
1448 /*
1449  * Validate the drop action.
1450  *
1451  * @param[in] action_flags
1452  *   Bit-fields that holds the actions detected until now.
1453  * @param[in] attr
1454  *   Attributes of flow that includes this action.
1455  * @param[out] error
1456  *   Pointer to error structure.
1457  *
1458  * @return
1459  *   0 on success, a negative errno value otherwise and rte_errno is set.
1460  */
1461 int
1462 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1463                                const struct rte_flow_attr *attr,
1464                                struct rte_flow_error *error)
1465 {
1466         if (attr->egress)
1467                 return rte_flow_error_set(error, ENOTSUP,
1468                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1469                                           "drop action not supported for "
1470                                           "egress");
1471         return 0;
1472 }
1473
1474 /*
1475  * Validate the queue action.
1476  *
1477  * @param[in] action
1478  *   Pointer to the queue action.
1479  * @param[in] action_flags
1480  *   Bit-fields that holds the actions detected until now.
1481  * @param[in] dev
1482  *   Pointer to the Ethernet device structure.
1483  * @param[in] attr
1484  *   Attributes of flow that includes this action.
1485  * @param[out] error
1486  *   Pointer to error structure.
1487  *
1488  * @return
1489  *   0 on success, a negative errno value otherwise and rte_errno is set.
1490  */
1491 int
1492 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1493                                 uint64_t action_flags,
1494                                 struct rte_eth_dev *dev,
1495                                 const struct rte_flow_attr *attr,
1496                                 struct rte_flow_error *error)
1497 {
1498         struct mlx5_priv *priv = dev->data->dev_private;
1499         const struct rte_flow_action_queue *queue = action->conf;
1500
1501         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1502                 return rte_flow_error_set(error, EINVAL,
1503                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1504                                           "can't have 2 fate actions in"
1505                                           " same flow");
1506         if (!priv->rxqs_n)
1507                 return rte_flow_error_set(error, EINVAL,
1508                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1509                                           NULL, "No Rx queues configured");
1510         if (queue->index >= priv->rxqs_n)
1511                 return rte_flow_error_set(error, EINVAL,
1512                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1513                                           &queue->index,
1514                                           "queue index out of range");
1515         if (!(*priv->rxqs)[queue->index])
1516                 return rte_flow_error_set(error, EINVAL,
1517                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1518                                           &queue->index,
1519                                           "queue is not configured");
1520         if (attr->egress)
1521                 return rte_flow_error_set(error, ENOTSUP,
1522                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1523                                           "queue action not supported for "
1524                                           "egress");
1525         return 0;
1526 }
1527
1528 /*
1529  * Validate the rss action.
1530  *
1531  * @param[in] dev
1532  *   Pointer to the Ethernet device structure.
1533  * @param[in] action
1534  *   Pointer to the queue action.
1535  * @param[out] error
1536  *   Pointer to error structure.
1537  *
1538  * @return
1539  *   0 on success, a negative errno value otherwise and rte_errno is set.
1540  */
1541 int
1542 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1543                          const struct rte_flow_action *action,
1544                          struct rte_flow_error *error)
1545 {
1546         struct mlx5_priv *priv = dev->data->dev_private;
1547         const struct rte_flow_action_rss *rss = action->conf;
1548         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1549         unsigned int i;
1550
1551         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1552             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1553                 return rte_flow_error_set(error, ENOTSUP,
1554                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1555                                           &rss->func,
1556                                           "RSS hash function not supported");
1557 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1558         if (rss->level > 2)
1559 #else
1560         if (rss->level > 1)
1561 #endif
1562                 return rte_flow_error_set(error, ENOTSUP,
1563                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1564                                           &rss->level,
1565                                           "tunnel RSS is not supported");
1566         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1567         if (rss->key_len == 0 && rss->key != NULL)
1568                 return rte_flow_error_set(error, ENOTSUP,
1569                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1570                                           &rss->key_len,
1571                                           "RSS hash key length 0");
1572         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1573                 return rte_flow_error_set(error, ENOTSUP,
1574                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1575                                           &rss->key_len,
1576                                           "RSS hash key too small");
1577         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1578                 return rte_flow_error_set(error, ENOTSUP,
1579                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1580                                           &rss->key_len,
1581                                           "RSS hash key too large");
1582         if (rss->queue_num > priv->config.ind_table_max_size)
1583                 return rte_flow_error_set(error, ENOTSUP,
1584                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1585                                           &rss->queue_num,
1586                                           "number of queues too large");
1587         if (rss->types & MLX5_RSS_HF_MASK)
1588                 return rte_flow_error_set(error, ENOTSUP,
1589                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1590                                           &rss->types,
1591                                           "some RSS protocols are not"
1592                                           " supported");
1593         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1594             !(rss->types & ETH_RSS_IP))
1595                 return rte_flow_error_set(error, EINVAL,
1596                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1597                                           "L3 partial RSS requested but L3 RSS"
1598                                           " type not specified");
1599         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1600             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1601                 return rte_flow_error_set(error, EINVAL,
1602                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1603                                           "L4 partial RSS requested but L4 RSS"
1604                                           " type not specified");
1605         if (!priv->rxqs_n)
1606                 return rte_flow_error_set(error, EINVAL,
1607                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1608                                           NULL, "No Rx queues configured");
1609         if (!rss->queue_num)
1610                 return rte_flow_error_set(error, EINVAL,
1611                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1612                                           NULL, "No queues configured");
1613         for (i = 0; i != rss->queue_num; ++i) {
1614                 struct mlx5_rxq_ctrl *rxq_ctrl;
1615
1616                 if (rss->queue[i] >= priv->rxqs_n)
1617                         return rte_flow_error_set
1618                                 (error, EINVAL,
1619                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1620                                  &rss->queue[i], "queue index out of range");
1621                 if (!(*priv->rxqs)[rss->queue[i]])
1622                         return rte_flow_error_set
1623                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1624                                  &rss->queue[i], "queue is not configured");
1625                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1626                                         struct mlx5_rxq_ctrl, rxq);
1627                 if (i == 0)
1628                         rxq_type = rxq_ctrl->type;
1629                 if (rxq_type != rxq_ctrl->type)
1630                         return rte_flow_error_set
1631                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1632                                  &rss->queue[i],
1633                                  "combining hairpin and regular RSS queues is not supported");
1634         }
1635         return 0;
1636 }
1637
1638 /*
1639  * Validate the rss action.
1640  *
1641  * @param[in] action
1642  *   Pointer to the queue action.
1643  * @param[in] action_flags
1644  *   Bit-fields that holds the actions detected until now.
1645  * @param[in] dev
1646  *   Pointer to the Ethernet device structure.
1647  * @param[in] attr
1648  *   Attributes of flow that includes this action.
1649  * @param[in] item_flags
1650  *   Items that were detected.
1651  * @param[out] error
1652  *   Pointer to error structure.
1653  *
1654  * @return
1655  *   0 on success, a negative errno value otherwise and rte_errno is set.
1656  */
1657 int
1658 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1659                               uint64_t action_flags,
1660                               struct rte_eth_dev *dev,
1661                               const struct rte_flow_attr *attr,
1662                               uint64_t item_flags,
1663                               struct rte_flow_error *error)
1664 {
1665         const struct rte_flow_action_rss *rss = action->conf;
1666         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1667         int ret;
1668
1669         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1670                 return rte_flow_error_set(error, EINVAL,
1671                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1672                                           "can't have 2 fate actions"
1673                                           " in same flow");
1674         ret = mlx5_validate_action_rss(dev, action, error);
1675         if (ret)
1676                 return ret;
1677         if (attr->egress)
1678                 return rte_flow_error_set(error, ENOTSUP,
1679                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1680                                           "rss action not supported for "
1681                                           "egress");
1682         if (rss->level > 1 && !tunnel)
1683                 return rte_flow_error_set(error, EINVAL,
1684                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1685                                           "inner RSS is not supported for "
1686                                           "non-tunnel flows");
1687         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1688             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1689                 return rte_flow_error_set(error, EINVAL,
1690                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1691                                           "RSS on eCPRI is not supported now");
1692         }
1693         if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1694             !(item_flags &
1695               (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1696             rss->level > 1)
1697                 return rte_flow_error_set(error, EINVAL,
1698                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1699                                           "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1700         return 0;
1701 }
1702
1703 /*
1704  * Validate the default miss action.
1705  *
1706  * @param[in] action_flags
1707  *   Bit-fields that holds the actions detected until now.
1708  * @param[out] error
1709  *   Pointer to error structure.
1710  *
1711  * @return
1712  *   0 on success, a negative errno value otherwise and rte_errno is set.
1713  */
1714 int
1715 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1716                                 const struct rte_flow_attr *attr,
1717                                 struct rte_flow_error *error)
1718 {
1719         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1720                 return rte_flow_error_set(error, EINVAL,
1721                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1722                                           "can't have 2 fate actions in"
1723                                           " same flow");
1724         if (attr->egress)
1725                 return rte_flow_error_set(error, ENOTSUP,
1726                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1727                                           "default miss action not supported "
1728                                           "for egress");
1729         if (attr->group)
1730                 return rte_flow_error_set(error, ENOTSUP,
1731                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1732                                           "only group 0 is supported");
1733         if (attr->transfer)
1734                 return rte_flow_error_set(error, ENOTSUP,
1735                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1736                                           NULL, "transfer is not supported");
1737         return 0;
1738 }
1739
1740 /*
1741  * Validate the count action.
1742  *
1743  * @param[in] dev
1744  *   Pointer to the Ethernet device structure.
1745  * @param[in] attr
1746  *   Attributes of flow that includes this action.
1747  * @param[out] error
1748  *   Pointer to error structure.
1749  *
1750  * @return
1751  *   0 on success, a negative errno value otherwise and rte_errno is set.
1752  */
1753 int
1754 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1755                                 const struct rte_flow_attr *attr,
1756                                 struct rte_flow_error *error)
1757 {
1758         if (attr->egress)
1759                 return rte_flow_error_set(error, ENOTSUP,
1760                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1761                                           "count action not supported for "
1762                                           "egress");
1763         return 0;
1764 }
1765
1766 /*
1767  * Validate the ASO CT action.
1768  *
1769  * @param[in] dev
1770  *   Pointer to the Ethernet device structure.
1771  * @param[in] conntrack
1772  *   Pointer to the CT action profile.
1773  * @param[out] error
1774  *   Pointer to error structure.
1775  *
1776  * @return
1777  *   0 on success, a negative errno value otherwise and rte_errno is set.
1778  */
1779 int
1780 mlx5_validate_action_ct(struct rte_eth_dev *dev,
1781                         const struct rte_flow_action_conntrack *conntrack,
1782                         struct rte_flow_error *error)
1783 {
1784         RTE_SET_USED(dev);
1785
1786         if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
1787                 return rte_flow_error_set(error, EINVAL,
1788                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1789                                           "Invalid CT state");
1790         if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
1791                 return rte_flow_error_set(error, EINVAL,
1792                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1793                                           "Invalid last TCP packet flag");
1794         return 0;
1795 }
1796
1797 /**
1798  * Verify the @p attributes will be correctly understood by the NIC and store
1799  * them in the @p flow if everything is correct.
1800  *
1801  * @param[in] dev
1802  *   Pointer to the Ethernet device structure.
1803  * @param[in] attributes
1804  *   Pointer to flow attributes
1805  * @param[out] error
1806  *   Pointer to error structure.
1807  *
1808  * @return
1809  *   0 on success, a negative errno value otherwise and rte_errno is set.
1810  */
1811 int
1812 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1813                               const struct rte_flow_attr *attributes,
1814                               struct rte_flow_error *error)
1815 {
1816         struct mlx5_priv *priv = dev->data->dev_private;
1817         uint32_t priority_max = priv->config.flow_prio - 1;
1818
1819         if (attributes->group)
1820                 return rte_flow_error_set(error, ENOTSUP,
1821                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1822                                           NULL, "groups is not supported");
1823         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1824             attributes->priority >= priority_max)
1825                 return rte_flow_error_set(error, ENOTSUP,
1826                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1827                                           NULL, "priority out of range");
1828         if (attributes->egress)
1829                 return rte_flow_error_set(error, ENOTSUP,
1830                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1831                                           "egress is not supported");
1832         if (attributes->transfer && !priv->config.dv_esw_en)
1833                 return rte_flow_error_set(error, ENOTSUP,
1834                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1835                                           NULL, "transfer is not supported");
1836         if (!attributes->ingress)
1837                 return rte_flow_error_set(error, EINVAL,
1838                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1839                                           NULL,
1840                                           "ingress attribute is mandatory");
1841         return 0;
1842 }
1843
1844 /**
1845  * Validate ICMP6 item.
1846  *
1847  * @param[in] item
1848  *   Item specification.
1849  * @param[in] item_flags
1850  *   Bit-fields that holds the items detected until now.
1851  * @param[in] ext_vlan_sup
1852  *   Whether extended VLAN features are supported or not.
1853  * @param[out] error
1854  *   Pointer to error structure.
1855  *
1856  * @return
1857  *   0 on success, a negative errno value otherwise and rte_errno is set.
1858  */
1859 int
1860 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1861                                uint64_t item_flags,
1862                                uint8_t target_protocol,
1863                                struct rte_flow_error *error)
1864 {
1865         const struct rte_flow_item_icmp6 *mask = item->mask;
1866         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1867         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1868                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1869         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1870                                       MLX5_FLOW_LAYER_OUTER_L4;
1871         int ret;
1872
1873         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1874                 return rte_flow_error_set(error, EINVAL,
1875                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1876                                           "protocol filtering not compatible"
1877                                           " with ICMP6 layer");
1878         if (!(item_flags & l3m))
1879                 return rte_flow_error_set(error, EINVAL,
1880                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1881                                           "IPv6 is mandatory to filter on"
1882                                           " ICMP6");
1883         if (item_flags & l4m)
1884                 return rte_flow_error_set(error, EINVAL,
1885                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1886                                           "multiple L4 layers not supported");
1887         if (!mask)
1888                 mask = &rte_flow_item_icmp6_mask;
1889         ret = mlx5_flow_item_acceptable
1890                 (item, (const uint8_t *)mask,
1891                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1892                  sizeof(struct rte_flow_item_icmp6),
1893                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1894         if (ret < 0)
1895                 return ret;
1896         return 0;
1897 }
1898
1899 /**
1900  * Validate ICMP item.
1901  *
1902  * @param[in] item
1903  *   Item specification.
1904  * @param[in] item_flags
1905  *   Bit-fields that holds the items detected until now.
1906  * @param[out] error
1907  *   Pointer to error structure.
1908  *
1909  * @return
1910  *   0 on success, a negative errno value otherwise and rte_errno is set.
1911  */
1912 int
1913 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1914                              uint64_t item_flags,
1915                              uint8_t target_protocol,
1916                              struct rte_flow_error *error)
1917 {
1918         const struct rte_flow_item_icmp *mask = item->mask;
1919         const struct rte_flow_item_icmp nic_mask = {
1920                 .hdr.icmp_type = 0xff,
1921                 .hdr.icmp_code = 0xff,
1922                 .hdr.icmp_ident = RTE_BE16(0xffff),
1923                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1924         };
1925         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1926         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1927                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1928         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1929                                       MLX5_FLOW_LAYER_OUTER_L4;
1930         int ret;
1931
1932         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1933                 return rte_flow_error_set(error, EINVAL,
1934                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1935                                           "protocol filtering not compatible"
1936                                           " with ICMP layer");
1937         if (!(item_flags & l3m))
1938                 return rte_flow_error_set(error, EINVAL,
1939                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1940                                           "IPv4 is mandatory to filter"
1941                                           " on ICMP");
1942         if (item_flags & l4m)
1943                 return rte_flow_error_set(error, EINVAL,
1944                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1945                                           "multiple L4 layers not supported");
1946         if (!mask)
1947                 mask = &nic_mask;
1948         ret = mlx5_flow_item_acceptable
1949                 (item, (const uint8_t *)mask,
1950                  (const uint8_t *)&nic_mask,
1951                  sizeof(struct rte_flow_item_icmp),
1952                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1953         if (ret < 0)
1954                 return ret;
1955         return 0;
1956 }
1957
1958 /**
1959  * Validate Ethernet item.
1960  *
1961  * @param[in] item
1962  *   Item specification.
1963  * @param[in] item_flags
1964  *   Bit-fields that holds the items detected until now.
1965  * @param[out] error
1966  *   Pointer to error structure.
1967  *
1968  * @return
1969  *   0 on success, a negative errno value otherwise and rte_errno is set.
1970  */
1971 int
1972 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1973                             uint64_t item_flags, bool ext_vlan_sup,
1974                             struct rte_flow_error *error)
1975 {
1976         const struct rte_flow_item_eth *mask = item->mask;
1977         const struct rte_flow_item_eth nic_mask = {
1978                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1979                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1980                 .type = RTE_BE16(0xffff),
1981                 .has_vlan = ext_vlan_sup ? 1 : 0,
1982         };
1983         int ret;
1984         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1985         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1986                                        MLX5_FLOW_LAYER_OUTER_L2;
1987
1988         if (item_flags & ethm)
1989                 return rte_flow_error_set(error, ENOTSUP,
1990                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1991                                           "multiple L2 layers not supported");
1992         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1993             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1994                 return rte_flow_error_set(error, EINVAL,
1995                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1996                                           "L2 layer should not follow "
1997                                           "L3 layers");
1998         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1999             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
2000                 return rte_flow_error_set(error, EINVAL,
2001                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2002                                           "L2 layer should not follow VLAN");
2003         if (item_flags & MLX5_FLOW_LAYER_GTP)
2004                 return rte_flow_error_set(error, EINVAL,
2005                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2006                                           "L2 layer should not follow GTP");
2007         if (!mask)
2008                 mask = &rte_flow_item_eth_mask;
2009         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2010                                         (const uint8_t *)&nic_mask,
2011                                         sizeof(struct rte_flow_item_eth),
2012                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2013         return ret;
2014 }
2015
2016 /**
2017  * Validate VLAN item.
2018  *
2019  * @param[in] item
2020  *   Item specification.
2021  * @param[in] item_flags
2022  *   Bit-fields that holds the items detected until now.
2023  * @param[in] dev
2024  *   Ethernet device flow is being created on.
2025  * @param[out] error
2026  *   Pointer to error structure.
2027  *
2028  * @return
2029  *   0 on success, a negative errno value otherwise and rte_errno is set.
2030  */
2031 int
2032 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2033                              uint64_t item_flags,
2034                              struct rte_eth_dev *dev,
2035                              struct rte_flow_error *error)
2036 {
2037         const struct rte_flow_item_vlan *spec = item->spec;
2038         const struct rte_flow_item_vlan *mask = item->mask;
2039         const struct rte_flow_item_vlan nic_mask = {
2040                 .tci = RTE_BE16(UINT16_MAX),
2041                 .inner_type = RTE_BE16(UINT16_MAX),
2042         };
2043         uint16_t vlan_tag = 0;
2044         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2045         int ret;
2046         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2047                                         MLX5_FLOW_LAYER_INNER_L4) :
2048                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2049                                         MLX5_FLOW_LAYER_OUTER_L4);
2050         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2051                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2052
2053         if (item_flags & vlanm)
2054                 return rte_flow_error_set(error, EINVAL,
2055                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2056                                           "multiple VLAN layers not supported");
2057         else if ((item_flags & l34m) != 0)
2058                 return rte_flow_error_set(error, EINVAL,
2059                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2060                                           "VLAN cannot follow L3/L4 layer");
2061         if (!mask)
2062                 mask = &rte_flow_item_vlan_mask;
2063         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2064                                         (const uint8_t *)&nic_mask,
2065                                         sizeof(struct rte_flow_item_vlan),
2066                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2067         if (ret)
2068                 return ret;
2069         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2070                 struct mlx5_priv *priv = dev->data->dev_private;
2071
2072                 if (priv->vmwa_context) {
2073                         /*
2074                          * Non-NULL context means we have a virtual machine
2075                          * and SR-IOV enabled, we have to create VLAN interface
2076                          * to make hypervisor to setup E-Switch vport
2077                          * context correctly. We avoid creating the multiple
2078                          * VLAN interfaces, so we cannot support VLAN tag mask.
2079                          */
2080                         return rte_flow_error_set(error, EINVAL,
2081                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2082                                                   item,
2083                                                   "VLAN tag mask is not"
2084                                                   " supported in virtual"
2085                                                   " environment");
2086                 }
2087         }
2088         if (spec) {
2089                 vlan_tag = spec->tci;
2090                 vlan_tag &= mask->tci;
2091         }
2092         /*
2093          * From verbs perspective an empty VLAN is equivalent
2094          * to a packet without VLAN layer.
2095          */
2096         if (!vlan_tag)
2097                 return rte_flow_error_set(error, EINVAL,
2098                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2099                                           item->spec,
2100                                           "VLAN cannot be empty");
2101         return 0;
2102 }
2103
2104 /**
2105  * Validate IPV4 item.
2106  *
2107  * @param[in] item
2108  *   Item specification.
2109  * @param[in] item_flags
2110  *   Bit-fields that holds the items detected until now.
2111  * @param[in] last_item
2112  *   Previous validated item in the pattern items.
2113  * @param[in] ether_type
2114  *   Type in the ethernet layer header (including dot1q).
2115  * @param[in] acc_mask
2116  *   Acceptable mask, if NULL default internal default mask
2117  *   will be used to check whether item fields are supported.
2118  * @param[in] range_accepted
2119  *   True if range of values is accepted for specific fields, false otherwise.
2120  * @param[out] error
2121  *   Pointer to error structure.
2122  *
2123  * @return
2124  *   0 on success, a negative errno value otherwise and rte_errno is set.
2125  */
2126 int
2127 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2128                              uint64_t item_flags,
2129                              uint64_t last_item,
2130                              uint16_t ether_type,
2131                              const struct rte_flow_item_ipv4 *acc_mask,
2132                              bool range_accepted,
2133                              struct rte_flow_error *error)
2134 {
2135         const struct rte_flow_item_ipv4 *mask = item->mask;
2136         const struct rte_flow_item_ipv4 *spec = item->spec;
2137         const struct rte_flow_item_ipv4 nic_mask = {
2138                 .hdr = {
2139                         .src_addr = RTE_BE32(0xffffffff),
2140                         .dst_addr = RTE_BE32(0xffffffff),
2141                         .type_of_service = 0xff,
2142                         .next_proto_id = 0xff,
2143                 },
2144         };
2145         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2146         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2147                                       MLX5_FLOW_LAYER_OUTER_L3;
2148         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2149                                       MLX5_FLOW_LAYER_OUTER_L4;
2150         int ret;
2151         uint8_t next_proto = 0xFF;
2152         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2153                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2154                                   MLX5_FLOW_LAYER_INNER_VLAN);
2155
2156         if ((last_item & l2_vlan) && ether_type &&
2157             ether_type != RTE_ETHER_TYPE_IPV4)
2158                 return rte_flow_error_set(error, EINVAL,
2159                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2160                                           "IPv4 cannot follow L2/VLAN layer "
2161                                           "which ether type is not IPv4");
2162         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2163                 if (mask && spec)
2164                         next_proto = mask->hdr.next_proto_id &
2165                                      spec->hdr.next_proto_id;
2166                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2167                         return rte_flow_error_set(error, EINVAL,
2168                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2169                                                   item,
2170                                                   "multiple tunnel "
2171                                                   "not supported");
2172         }
2173         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2174                 return rte_flow_error_set(error, EINVAL,
2175                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2176                                           "wrong tunnel type - IPv6 specified "
2177                                           "but IPv4 item provided");
2178         if (item_flags & l3m)
2179                 return rte_flow_error_set(error, ENOTSUP,
2180                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2181                                           "multiple L3 layers not supported");
2182         else if (item_flags & l4m)
2183                 return rte_flow_error_set(error, EINVAL,
2184                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2185                                           "L3 cannot follow an L4 layer.");
2186         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2187                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2188                 return rte_flow_error_set(error, EINVAL,
2189                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2190                                           "L3 cannot follow an NVGRE layer.");
2191         if (!mask)
2192                 mask = &rte_flow_item_ipv4_mask;
2193         else if (mask->hdr.next_proto_id != 0 &&
2194                  mask->hdr.next_proto_id != 0xff)
2195                 return rte_flow_error_set(error, EINVAL,
2196                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2197                                           "partial mask is not supported"
2198                                           " for protocol");
2199         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2200                                         acc_mask ? (const uint8_t *)acc_mask
2201                                                  : (const uint8_t *)&nic_mask,
2202                                         sizeof(struct rte_flow_item_ipv4),
2203                                         range_accepted, error);
2204         if (ret < 0)
2205                 return ret;
2206         return 0;
2207 }
2208
2209 /**
2210  * Validate IPV6 item.
2211  *
2212  * @param[in] item
2213  *   Item specification.
2214  * @param[in] item_flags
2215  *   Bit-fields that holds the items detected until now.
2216  * @param[in] last_item
2217  *   Previous validated item in the pattern items.
2218  * @param[in] ether_type
2219  *   Type in the ethernet layer header (including dot1q).
2220  * @param[in] acc_mask
2221  *   Acceptable mask, if NULL default internal default mask
2222  *   will be used to check whether item fields are supported.
2223  * @param[out] error
2224  *   Pointer to error structure.
2225  *
2226  * @return
2227  *   0 on success, a negative errno value otherwise and rte_errno is set.
2228  */
2229 int
2230 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2231                              uint64_t item_flags,
2232                              uint64_t last_item,
2233                              uint16_t ether_type,
2234                              const struct rte_flow_item_ipv6 *acc_mask,
2235                              struct rte_flow_error *error)
2236 {
2237         const struct rte_flow_item_ipv6 *mask = item->mask;
2238         const struct rte_flow_item_ipv6 *spec = item->spec;
2239         const struct rte_flow_item_ipv6 nic_mask = {
2240                 .hdr = {
2241                         .src_addr =
2242                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2243                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2244                         .dst_addr =
2245                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2246                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2247                         .vtc_flow = RTE_BE32(0xffffffff),
2248                         .proto = 0xff,
2249                 },
2250         };
2251         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2252         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2253                                       MLX5_FLOW_LAYER_OUTER_L3;
2254         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2255                                       MLX5_FLOW_LAYER_OUTER_L4;
2256         int ret;
2257         uint8_t next_proto = 0xFF;
2258         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2259                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2260                                   MLX5_FLOW_LAYER_INNER_VLAN);
2261
2262         if ((last_item & l2_vlan) && ether_type &&
2263             ether_type != RTE_ETHER_TYPE_IPV6)
2264                 return rte_flow_error_set(error, EINVAL,
2265                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2266                                           "IPv6 cannot follow L2/VLAN layer "
2267                                           "which ether type is not IPv6");
2268         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2269                 next_proto = spec->hdr.proto;
2270         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2271                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2272                         return rte_flow_error_set(error, EINVAL,
2273                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2274                                                   item,
2275                                                   "multiple tunnel "
2276                                                   "not supported");
2277         }
2278         if (next_proto == IPPROTO_HOPOPTS  ||
2279             next_proto == IPPROTO_ROUTING  ||
2280             next_proto == IPPROTO_FRAGMENT ||
2281             next_proto == IPPROTO_ESP      ||
2282             next_proto == IPPROTO_AH       ||
2283             next_proto == IPPROTO_DSTOPTS)
2284                 return rte_flow_error_set(error, EINVAL,
2285                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2286                                           "IPv6 proto (next header) should "
2287                                           "not be set as extension header");
2288         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2289                 return rte_flow_error_set(error, EINVAL,
2290                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2291                                           "wrong tunnel type - IPv4 specified "
2292                                           "but IPv6 item provided");
2293         if (item_flags & l3m)
2294                 return rte_flow_error_set(error, ENOTSUP,
2295                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2296                                           "multiple L3 layers not supported");
2297         else if (item_flags & l4m)
2298                 return rte_flow_error_set(error, EINVAL,
2299                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2300                                           "L3 cannot follow an L4 layer.");
2301         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2302                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2303                 return rte_flow_error_set(error, EINVAL,
2304                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2305                                           "L3 cannot follow an NVGRE layer.");
2306         if (!mask)
2307                 mask = &rte_flow_item_ipv6_mask;
2308         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2309                                         acc_mask ? (const uint8_t *)acc_mask
2310                                                  : (const uint8_t *)&nic_mask,
2311                                         sizeof(struct rte_flow_item_ipv6),
2312                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2313         if (ret < 0)
2314                 return ret;
2315         return 0;
2316 }
2317
2318 /**
2319  * Validate UDP item.
2320  *
2321  * @param[in] item
2322  *   Item specification.
2323  * @param[in] item_flags
2324  *   Bit-fields that holds the items detected until now.
2325  * @param[in] target_protocol
2326  *   The next protocol in the previous item.
2327  * @param[in] flow_mask
2328  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2329  * @param[out] error
2330  *   Pointer to error structure.
2331  *
2332  * @return
2333  *   0 on success, a negative errno value otherwise and rte_errno is set.
2334  */
2335 int
2336 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2337                             uint64_t item_flags,
2338                             uint8_t target_protocol,
2339                             struct rte_flow_error *error)
2340 {
2341         const struct rte_flow_item_udp *mask = item->mask;
2342         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2343         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2344                                       MLX5_FLOW_LAYER_OUTER_L3;
2345         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2346                                       MLX5_FLOW_LAYER_OUTER_L4;
2347         int ret;
2348
2349         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2350                 return rte_flow_error_set(error, EINVAL,
2351                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2352                                           "protocol filtering not compatible"
2353                                           " with UDP layer");
2354         if (!(item_flags & l3m))
2355                 return rte_flow_error_set(error, EINVAL,
2356                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2357                                           "L3 is mandatory to filter on L4");
2358         if (item_flags & l4m)
2359                 return rte_flow_error_set(error, EINVAL,
2360                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2361                                           "multiple L4 layers not supported");
2362         if (!mask)
2363                 mask = &rte_flow_item_udp_mask;
2364         ret = mlx5_flow_item_acceptable
2365                 (item, (const uint8_t *)mask,
2366                  (const uint8_t *)&rte_flow_item_udp_mask,
2367                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2368                  error);
2369         if (ret < 0)
2370                 return ret;
2371         return 0;
2372 }
2373
2374 /**
2375  * Validate TCP item.
2376  *
2377  * @param[in] item
2378  *   Item specification.
2379  * @param[in] item_flags
2380  *   Bit-fields that holds the items detected until now.
2381  * @param[in] target_protocol
2382  *   The next protocol in the previous item.
2383  * @param[out] error
2384  *   Pointer to error structure.
2385  *
2386  * @return
2387  *   0 on success, a negative errno value otherwise and rte_errno is set.
2388  */
2389 int
2390 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2391                             uint64_t item_flags,
2392                             uint8_t target_protocol,
2393                             const struct rte_flow_item_tcp *flow_mask,
2394                             struct rte_flow_error *error)
2395 {
2396         const struct rte_flow_item_tcp *mask = item->mask;
2397         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2398         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2399                                       MLX5_FLOW_LAYER_OUTER_L3;
2400         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2401                                       MLX5_FLOW_LAYER_OUTER_L4;
2402         int ret;
2403
2404         MLX5_ASSERT(flow_mask);
2405         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2406                 return rte_flow_error_set(error, EINVAL,
2407                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2408                                           "protocol filtering not compatible"
2409                                           " with TCP layer");
2410         if (!(item_flags & l3m))
2411                 return rte_flow_error_set(error, EINVAL,
2412                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2413                                           "L3 is mandatory to filter on L4");
2414         if (item_flags & l4m)
2415                 return rte_flow_error_set(error, EINVAL,
2416                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2417                                           "multiple L4 layers not supported");
2418         if (!mask)
2419                 mask = &rte_flow_item_tcp_mask;
2420         ret = mlx5_flow_item_acceptable
2421                 (item, (const uint8_t *)mask,
2422                  (const uint8_t *)flow_mask,
2423                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2424                  error);
2425         if (ret < 0)
2426                 return ret;
2427         return 0;
2428 }
2429
2430 /**
2431  * Validate VXLAN item.
2432  *
2433  * @param[in] dev
2434  *   Pointer to the Ethernet device structure.
2435  * @param[in] item
2436  *   Item specification.
2437  * @param[in] item_flags
2438  *   Bit-fields that holds the items detected until now.
2439  * @param[in] attr
2440  *   Flow rule attributes.
2441  * @param[out] error
2442  *   Pointer to error structure.
2443  *
2444  * @return
2445  *   0 on success, a negative errno value otherwise and rte_errno is set.
2446  */
2447 int
2448 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2449                               const struct rte_flow_item *item,
2450                               uint64_t item_flags,
2451                               const struct rte_flow_attr *attr,
2452                               struct rte_flow_error *error)
2453 {
2454         const struct rte_flow_item_vxlan *spec = item->spec;
2455         const struct rte_flow_item_vxlan *mask = item->mask;
2456         int ret;
2457         struct mlx5_priv *priv = dev->data->dev_private;
2458         union vni {
2459                 uint32_t vlan_id;
2460                 uint8_t vni[4];
2461         } id = { .vlan_id = 0, };
2462         const struct rte_flow_item_vxlan nic_mask = {
2463                 .vni = "\xff\xff\xff",
2464                 .rsvd1 = 0xff,
2465         };
2466         const struct rte_flow_item_vxlan *valid_mask;
2467
2468         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2469                 return rte_flow_error_set(error, ENOTSUP,
2470                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2471                                           "multiple tunnel layers not"
2472                                           " supported");
2473         valid_mask = &rte_flow_item_vxlan_mask;
2474         /*
2475          * Verify only UDPv4 is present as defined in
2476          * https://tools.ietf.org/html/rfc7348
2477          */
2478         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2479                 return rte_flow_error_set(error, EINVAL,
2480                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2481                                           "no outer UDP layer found");
2482         if (!mask)
2483                 mask = &rte_flow_item_vxlan_mask;
2484         /* FDB domain & NIC domain non-zero group */
2485         if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2486                 valid_mask = &nic_mask;
2487         /* Group zero in NIC domain */
2488         if (!attr->group && !attr->transfer && priv->sh->tunnel_header_0_1)
2489                 valid_mask = &nic_mask;
2490         ret = mlx5_flow_item_acceptable
2491                 (item, (const uint8_t *)mask,
2492                  (const uint8_t *)valid_mask,
2493                  sizeof(struct rte_flow_item_vxlan),
2494                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2495         if (ret < 0)
2496                 return ret;
2497         if (spec) {
2498                 memcpy(&id.vni[1], spec->vni, 3);
2499                 memcpy(&id.vni[1], mask->vni, 3);
2500         }
2501         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2502                 return rte_flow_error_set(error, ENOTSUP,
2503                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2504                                           "VXLAN tunnel must be fully defined");
2505         return 0;
2506 }
2507
2508 /**
2509  * Validate VXLAN_GPE item.
2510  *
2511  * @param[in] item
2512  *   Item specification.
2513  * @param[in] item_flags
2514  *   Bit-fields that holds the items detected until now.
2515  * @param[in] priv
2516  *   Pointer to the private data structure.
2517  * @param[in] target_protocol
2518  *   The next protocol in the previous item.
2519  * @param[out] error
2520  *   Pointer to error structure.
2521  *
2522  * @return
2523  *   0 on success, a negative errno value otherwise and rte_errno is set.
2524  */
2525 int
2526 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2527                                   uint64_t item_flags,
2528                                   struct rte_eth_dev *dev,
2529                                   struct rte_flow_error *error)
2530 {
2531         struct mlx5_priv *priv = dev->data->dev_private;
2532         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2533         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2534         int ret;
2535         union vni {
2536                 uint32_t vlan_id;
2537                 uint8_t vni[4];
2538         } id = { .vlan_id = 0, };
2539
2540         if (!priv->config.l3_vxlan_en)
2541                 return rte_flow_error_set(error, ENOTSUP,
2542                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2543                                           "L3 VXLAN is not enabled by device"
2544                                           " parameter and/or not configured in"
2545                                           " firmware");
2546         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2547                 return rte_flow_error_set(error, ENOTSUP,
2548                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2549                                           "multiple tunnel layers not"
2550                                           " supported");
2551         /*
2552          * Verify only UDPv4 is present as defined in
2553          * https://tools.ietf.org/html/rfc7348
2554          */
2555         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2556                 return rte_flow_error_set(error, EINVAL,
2557                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2558                                           "no outer UDP layer found");
2559         if (!mask)
2560                 mask = &rte_flow_item_vxlan_gpe_mask;
2561         ret = mlx5_flow_item_acceptable
2562                 (item, (const uint8_t *)mask,
2563                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2564                  sizeof(struct rte_flow_item_vxlan_gpe),
2565                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2566         if (ret < 0)
2567                 return ret;
2568         if (spec) {
2569                 if (spec->protocol)
2570                         return rte_flow_error_set(error, ENOTSUP,
2571                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2572                                                   item,
2573                                                   "VxLAN-GPE protocol"
2574                                                   " not supported");
2575                 memcpy(&id.vni[1], spec->vni, 3);
2576                 memcpy(&id.vni[1], mask->vni, 3);
2577         }
2578         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2579                 return rte_flow_error_set(error, ENOTSUP,
2580                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2581                                           "VXLAN-GPE tunnel must be fully"
2582                                           " defined");
2583         return 0;
2584 }
2585 /**
2586  * Validate GRE Key item.
2587  *
2588  * @param[in] item
2589  *   Item specification.
2590  * @param[in] item_flags
2591  *   Bit flags to mark detected items.
2592  * @param[in] gre_item
2593  *   Pointer to gre_item
2594  * @param[out] error
2595  *   Pointer to error structure.
2596  *
2597  * @return
2598  *   0 on success, a negative errno value otherwise and rte_errno is set.
2599  */
2600 int
2601 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2602                                 uint64_t item_flags,
2603                                 const struct rte_flow_item *gre_item,
2604                                 struct rte_flow_error *error)
2605 {
2606         const rte_be32_t *mask = item->mask;
2607         int ret = 0;
2608         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2609         const struct rte_flow_item_gre *gre_spec;
2610         const struct rte_flow_item_gre *gre_mask;
2611
2612         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2613                 return rte_flow_error_set(error, ENOTSUP,
2614                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2615                                           "Multiple GRE key not support");
2616         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2617                 return rte_flow_error_set(error, ENOTSUP,
2618                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2619                                           "No preceding GRE header");
2620         if (item_flags & MLX5_FLOW_LAYER_INNER)
2621                 return rte_flow_error_set(error, ENOTSUP,
2622                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2623                                           "GRE key following a wrong item");
2624         gre_mask = gre_item->mask;
2625         if (!gre_mask)
2626                 gre_mask = &rte_flow_item_gre_mask;
2627         gre_spec = gre_item->spec;
2628         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2629                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2630                 return rte_flow_error_set(error, EINVAL,
2631                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2632                                           "Key bit must be on");
2633
2634         if (!mask)
2635                 mask = &gre_key_default_mask;
2636         ret = mlx5_flow_item_acceptable
2637                 (item, (const uint8_t *)mask,
2638                  (const uint8_t *)&gre_key_default_mask,
2639                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2640         return ret;
2641 }
2642
2643 /**
2644  * Validate GRE item.
2645  *
2646  * @param[in] item
2647  *   Item specification.
2648  * @param[in] item_flags
2649  *   Bit flags to mark detected items.
2650  * @param[in] target_protocol
2651  *   The next protocol in the previous item.
2652  * @param[out] error
2653  *   Pointer to error structure.
2654  *
2655  * @return
2656  *   0 on success, a negative errno value otherwise and rte_errno is set.
2657  */
2658 int
2659 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2660                             uint64_t item_flags,
2661                             uint8_t target_protocol,
2662                             struct rte_flow_error *error)
2663 {
2664         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2665         const struct rte_flow_item_gre *mask = item->mask;
2666         int ret;
2667         const struct rte_flow_item_gre nic_mask = {
2668                 .c_rsvd0_ver = RTE_BE16(0xB000),
2669                 .protocol = RTE_BE16(UINT16_MAX),
2670         };
2671
2672         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2673                 return rte_flow_error_set(error, EINVAL,
2674                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2675                                           "protocol filtering not compatible"
2676                                           " with this GRE layer");
2677         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2678                 return rte_flow_error_set(error, ENOTSUP,
2679                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2680                                           "multiple tunnel layers not"
2681                                           " supported");
2682         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2683                 return rte_flow_error_set(error, ENOTSUP,
2684                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2685                                           "L3 Layer is missing");
2686         if (!mask)
2687                 mask = &rte_flow_item_gre_mask;
2688         ret = mlx5_flow_item_acceptable
2689                 (item, (const uint8_t *)mask,
2690                  (const uint8_t *)&nic_mask,
2691                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2692                  error);
2693         if (ret < 0)
2694                 return ret;
2695 #ifndef HAVE_MLX5DV_DR
2696 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2697         if (spec && (spec->protocol & mask->protocol))
2698                 return rte_flow_error_set(error, ENOTSUP,
2699                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2700                                           "without MPLS support the"
2701                                           " specification cannot be used for"
2702                                           " filtering");
2703 #endif
2704 #endif
2705         return 0;
2706 }
2707
2708 /**
2709  * Validate Geneve item.
2710  *
2711  * @param[in] item
2712  *   Item specification.
2713  * @param[in] itemFlags
2714  *   Bit-fields that holds the items detected until now.
2715  * @param[in] enPriv
2716  *   Pointer to the private data structure.
2717  * @param[out] error
2718  *   Pointer to error structure.
2719  *
2720  * @return
2721  *   0 on success, a negative errno value otherwise and rte_errno is set.
2722  */
2723
2724 int
2725 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2726                                uint64_t item_flags,
2727                                struct rte_eth_dev *dev,
2728                                struct rte_flow_error *error)
2729 {
2730         struct mlx5_priv *priv = dev->data->dev_private;
2731         const struct rte_flow_item_geneve *spec = item->spec;
2732         const struct rte_flow_item_geneve *mask = item->mask;
2733         int ret;
2734         uint16_t gbhdr;
2735         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2736                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2737         const struct rte_flow_item_geneve nic_mask = {
2738                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2739                 .vni = "\xff\xff\xff",
2740                 .protocol = RTE_BE16(UINT16_MAX),
2741         };
2742
2743         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2744                 return rte_flow_error_set(error, ENOTSUP,
2745                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2746                                           "L3 Geneve is not enabled by device"
2747                                           " parameter and/or not configured in"
2748                                           " firmware");
2749         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2750                 return rte_flow_error_set(error, ENOTSUP,
2751                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2752                                           "multiple tunnel layers not"
2753                                           " supported");
2754         /*
2755          * Verify only UDPv4 is present as defined in
2756          * https://tools.ietf.org/html/rfc7348
2757          */
2758         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2759                 return rte_flow_error_set(error, EINVAL,
2760                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2761                                           "no outer UDP layer found");
2762         if (!mask)
2763                 mask = &rte_flow_item_geneve_mask;
2764         ret = mlx5_flow_item_acceptable
2765                                   (item, (const uint8_t *)mask,
2766                                    (const uint8_t *)&nic_mask,
2767                                    sizeof(struct rte_flow_item_geneve),
2768                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2769         if (ret)
2770                 return ret;
2771         if (spec) {
2772                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2773                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2774                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2775                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2776                         return rte_flow_error_set(error, ENOTSUP,
2777                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2778                                                   item,
2779                                                   "Geneve protocol unsupported"
2780                                                   " fields are being used");
2781                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2782                         return rte_flow_error_set
2783                                         (error, ENOTSUP,
2784                                          RTE_FLOW_ERROR_TYPE_ITEM,
2785                                          item,
2786                                          "Unsupported Geneve options length");
2787         }
2788         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2789                 return rte_flow_error_set
2790                                     (error, ENOTSUP,
2791                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2792                                      "Geneve tunnel must be fully defined");
2793         return 0;
2794 }
2795
2796 /**
2797  * Validate Geneve TLV option item.
2798  *
2799  * @param[in] item
2800  *   Item specification.
2801  * @param[in] last_item
2802  *   Previous validated item in the pattern items.
2803  * @param[in] geneve_item
2804  *   Previous GENEVE item specification.
2805  * @param[in] dev
2806  *   Pointer to the rte_eth_dev structure.
2807  * @param[out] error
2808  *   Pointer to error structure.
2809  *
2810  * @return
2811  *   0 on success, a negative errno value otherwise and rte_errno is set.
2812  */
2813 int
2814 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2815                                    uint64_t last_item,
2816                                    const struct rte_flow_item *geneve_item,
2817                                    struct rte_eth_dev *dev,
2818                                    struct rte_flow_error *error)
2819 {
2820         struct mlx5_priv *priv = dev->data->dev_private;
2821         struct mlx5_dev_ctx_shared *sh = priv->sh;
2822         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2823         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2824         uint8_t data_max_supported =
2825                         hca_attr->max_geneve_tlv_option_data_len * 4;
2826         struct mlx5_dev_config *config = &priv->config;
2827         const struct rte_flow_item_geneve *geneve_spec;
2828         const struct rte_flow_item_geneve *geneve_mask;
2829         const struct rte_flow_item_geneve_opt *spec = item->spec;
2830         const struct rte_flow_item_geneve_opt *mask = item->mask;
2831         unsigned int i;
2832         unsigned int data_len;
2833         uint8_t tlv_option_len;
2834         uint16_t optlen_m, optlen_v;
2835         const struct rte_flow_item_geneve_opt full_mask = {
2836                 .option_class = RTE_BE16(0xffff),
2837                 .option_type = 0xff,
2838                 .option_len = 0x1f,
2839         };
2840
2841         if (!mask)
2842                 mask = &rte_flow_item_geneve_opt_mask;
2843         if (!spec)
2844                 return rte_flow_error_set
2845                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2846                         "Geneve TLV opt class/type/length must be specified");
2847         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2848                 return rte_flow_error_set
2849                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2850                         "Geneve TLV opt length exceeeds the limit (31)");
2851         /* Check if class type and length masks are full. */
2852         if (full_mask.option_class != mask->option_class ||
2853             full_mask.option_type != mask->option_type ||
2854             full_mask.option_len != (mask->option_len & full_mask.option_len))
2855                 return rte_flow_error_set
2856                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2857                         "Geneve TLV opt class/type/length masks must be full");
2858         /* Check if length is supported */
2859         if ((uint32_t)spec->option_len >
2860                         config->hca_attr.max_geneve_tlv_option_data_len)
2861                 return rte_flow_error_set
2862                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2863                         "Geneve TLV opt length not supported");
2864         if (config->hca_attr.max_geneve_tlv_options > 1)
2865                 DRV_LOG(DEBUG,
2866                         "max_geneve_tlv_options supports more than 1 option");
2867         /* Check GENEVE item preceding. */
2868         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2869                 return rte_flow_error_set
2870                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2871                         "Geneve opt item must be preceded with Geneve item");
2872         geneve_spec = geneve_item->spec;
2873         geneve_mask = geneve_item->mask ? geneve_item->mask :
2874                                           &rte_flow_item_geneve_mask;
2875         /* Check if GENEVE TLV option size doesn't exceed option length */
2876         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2877                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2878                 tlv_option_len = spec->option_len & mask->option_len;
2879                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2880                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2881                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2882                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2883                 if ((optlen_v & optlen_m) <= tlv_option_len)
2884                         return rte_flow_error_set
2885                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2886                                  "GENEVE TLV option length exceeds optlen");
2887         }
2888         /* Check if length is 0 or data is 0. */
2889         if (spec->data == NULL || spec->option_len == 0)
2890                 return rte_flow_error_set
2891                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2892                         "Geneve TLV opt with zero data/length not supported");
2893         /* Check not all data & mask are 0. */
2894         data_len = spec->option_len * 4;
2895         if (mask->data == NULL) {
2896                 for (i = 0; i < data_len; i++)
2897                         if (spec->data[i])
2898                                 break;
2899                 if (i == data_len)
2900                         return rte_flow_error_set(error, ENOTSUP,
2901                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2902                                 "Can't match on Geneve option data 0");
2903         } else {
2904                 for (i = 0; i < data_len; i++)
2905                         if (spec->data[i] & mask->data[i])
2906                                 break;
2907                 if (i == data_len)
2908                         return rte_flow_error_set(error, ENOTSUP,
2909                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2910                                 "Can't match on Geneve option data and mask 0");
2911                 /* Check data mask supported. */
2912                 for (i = data_max_supported; i < data_len ; i++)
2913                         if (mask->data[i])
2914                                 return rte_flow_error_set(error, ENOTSUP,
2915                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2916                                         "Data mask is of unsupported size");
2917         }
2918         /* Check GENEVE option is supported in NIC. */
2919         if (!config->hca_attr.geneve_tlv_opt)
2920                 return rte_flow_error_set
2921                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2922                         "Geneve TLV opt not supported");
2923         /* Check if we already have geneve option with different type/class. */
2924         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
2925         geneve_opt_resource = sh->geneve_tlv_option_resource;
2926         if (geneve_opt_resource != NULL)
2927                 if (geneve_opt_resource->option_class != spec->option_class ||
2928                     geneve_opt_resource->option_type != spec->option_type ||
2929                     geneve_opt_resource->length != spec->option_len) {
2930                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2931                         return rte_flow_error_set(error, ENOTSUP,
2932                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2933                                 "Only one Geneve TLV option supported");
2934                 }
2935         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2936         return 0;
2937 }
2938
2939 /**
2940  * Validate MPLS item.
2941  *
2942  * @param[in] dev
2943  *   Pointer to the rte_eth_dev structure.
2944  * @param[in] item
2945  *   Item specification.
2946  * @param[in] item_flags
2947  *   Bit-fields that holds the items detected until now.
2948  * @param[in] prev_layer
2949  *   The protocol layer indicated in previous item.
2950  * @param[out] error
2951  *   Pointer to error structure.
2952  *
2953  * @return
2954  *   0 on success, a negative errno value otherwise and rte_errno is set.
2955  */
2956 int
2957 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2958                              const struct rte_flow_item *item __rte_unused,
2959                              uint64_t item_flags __rte_unused,
2960                              uint64_t prev_layer __rte_unused,
2961                              struct rte_flow_error *error)
2962 {
2963 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2964         const struct rte_flow_item_mpls *mask = item->mask;
2965         struct mlx5_priv *priv = dev->data->dev_private;
2966         int ret;
2967
2968         if (!priv->config.mpls_en)
2969                 return rte_flow_error_set(error, ENOTSUP,
2970                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2971                                           "MPLS not supported or"
2972                                           " disabled in firmware"
2973                                           " configuration.");
2974         /* MPLS over UDP, GRE is allowed */
2975         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
2976                             MLX5_FLOW_LAYER_GRE |
2977                             MLX5_FLOW_LAYER_GRE_KEY)))
2978                 return rte_flow_error_set(error, EINVAL,
2979                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2980                                           "protocol filtering not compatible"
2981                                           " with MPLS layer");
2982         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2983         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2984             !(item_flags & MLX5_FLOW_LAYER_GRE))
2985                 return rte_flow_error_set(error, ENOTSUP,
2986                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2987                                           "multiple tunnel layers not"
2988                                           " supported");
2989         if (!mask)
2990                 mask = &rte_flow_item_mpls_mask;
2991         ret = mlx5_flow_item_acceptable
2992                 (item, (const uint8_t *)mask,
2993                  (const uint8_t *)&rte_flow_item_mpls_mask,
2994                  sizeof(struct rte_flow_item_mpls),
2995                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2996         if (ret < 0)
2997                 return ret;
2998         return 0;
2999 #else
3000         return rte_flow_error_set(error, ENOTSUP,
3001                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
3002                                   "MPLS is not supported by Verbs, please"
3003                                   " update.");
3004 #endif
3005 }
3006
3007 /**
3008  * Validate NVGRE item.
3009  *
3010  * @param[in] item
3011  *   Item specification.
3012  * @param[in] item_flags
3013  *   Bit flags to mark detected items.
3014  * @param[in] target_protocol
3015  *   The next protocol in the previous item.
3016  * @param[out] error
3017  *   Pointer to error structure.
3018  *
3019  * @return
3020  *   0 on success, a negative errno value otherwise and rte_errno is set.
3021  */
3022 int
3023 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3024                               uint64_t item_flags,
3025                               uint8_t target_protocol,
3026                               struct rte_flow_error *error)
3027 {
3028         const struct rte_flow_item_nvgre *mask = item->mask;
3029         int ret;
3030
3031         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3032                 return rte_flow_error_set(error, EINVAL,
3033                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3034                                           "protocol filtering not compatible"
3035                                           " with this GRE layer");
3036         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3037                 return rte_flow_error_set(error, ENOTSUP,
3038                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3039                                           "multiple tunnel layers not"
3040                                           " supported");
3041         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3042                 return rte_flow_error_set(error, ENOTSUP,
3043                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3044                                           "L3 Layer is missing");
3045         if (!mask)
3046                 mask = &rte_flow_item_nvgre_mask;
3047         ret = mlx5_flow_item_acceptable
3048                 (item, (const uint8_t *)mask,
3049                  (const uint8_t *)&rte_flow_item_nvgre_mask,
3050                  sizeof(struct rte_flow_item_nvgre),
3051                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3052         if (ret < 0)
3053                 return ret;
3054         return 0;
3055 }
3056
3057 /**
3058  * Validate eCPRI item.
3059  *
3060  * @param[in] item
3061  *   Item specification.
3062  * @param[in] item_flags
3063  *   Bit-fields that holds the items detected until now.
3064  * @param[in] last_item
3065  *   Previous validated item in the pattern items.
3066  * @param[in] ether_type
3067  *   Type in the ethernet layer header (including dot1q).
3068  * @param[in] acc_mask
3069  *   Acceptable mask, if NULL default internal default mask
3070  *   will be used to check whether item fields are supported.
3071  * @param[out] error
3072  *   Pointer to error structure.
3073  *
3074  * @return
3075  *   0 on success, a negative errno value otherwise and rte_errno is set.
3076  */
3077 int
3078 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3079                               uint64_t item_flags,
3080                               uint64_t last_item,
3081                               uint16_t ether_type,
3082                               const struct rte_flow_item_ecpri *acc_mask,
3083                               struct rte_flow_error *error)
3084 {
3085         const struct rte_flow_item_ecpri *mask = item->mask;
3086         const struct rte_flow_item_ecpri nic_mask = {
3087                 .hdr = {
3088                         .common = {
3089                                 .u32 =
3090                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3091                                         .type = 0xFF,
3092                                         }).u32),
3093                         },
3094                         .dummy[0] = 0xFFFFFFFF,
3095                 },
3096         };
3097         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3098                                         MLX5_FLOW_LAYER_OUTER_VLAN);
3099         struct rte_flow_item_ecpri mask_lo;
3100
3101         if (!(last_item & outer_l2_vlan) &&
3102             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3103                 return rte_flow_error_set(error, EINVAL,
3104                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3105                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
3106         if ((last_item & outer_l2_vlan) && ether_type &&
3107             ether_type != RTE_ETHER_TYPE_ECPRI)
3108                 return rte_flow_error_set(error, EINVAL,
3109                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3110                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3111         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3112                 return rte_flow_error_set(error, EINVAL,
3113                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3114                                           "eCPRI with tunnel is not supported right now");
3115         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3116                 return rte_flow_error_set(error, ENOTSUP,
3117                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3118                                           "multiple L3 layers not supported");
3119         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3120                 return rte_flow_error_set(error, EINVAL,
3121                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3122                                           "eCPRI cannot coexist with a TCP layer");
3123         /* In specification, eCPRI could be over UDP layer. */
3124         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3125                 return rte_flow_error_set(error, EINVAL,
3126                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3127                                           "eCPRI over UDP layer is not yet supported right now");
3128         /* Mask for type field in common header could be zero. */
3129         if (!mask)
3130                 mask = &rte_flow_item_ecpri_mask;
3131         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3132         /* Input mask is in big-endian format. */
3133         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3134                 return rte_flow_error_set(error, EINVAL,
3135                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3136                                           "partial mask is not supported for protocol");
3137         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3138                 return rte_flow_error_set(error, EINVAL,
3139                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3140                                           "message header mask must be after a type mask");
3141         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3142                                          acc_mask ? (const uint8_t *)acc_mask
3143                                                   : (const uint8_t *)&nic_mask,
3144                                          sizeof(struct rte_flow_item_ecpri),
3145                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3146 }
3147
3148 static int
3149 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3150                    const struct rte_flow_attr *attr __rte_unused,
3151                    const struct rte_flow_item items[] __rte_unused,
3152                    const struct rte_flow_action actions[] __rte_unused,
3153                    bool external __rte_unused,
3154                    int hairpin __rte_unused,
3155                    struct rte_flow_error *error)
3156 {
3157         return rte_flow_error_set(error, ENOTSUP,
3158                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3159 }
3160
3161 static struct mlx5_flow *
3162 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3163                   const struct rte_flow_attr *attr __rte_unused,
3164                   const struct rte_flow_item items[] __rte_unused,
3165                   const struct rte_flow_action actions[] __rte_unused,
3166                   struct rte_flow_error *error)
3167 {
3168         rte_flow_error_set(error, ENOTSUP,
3169                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3170         return NULL;
3171 }
3172
3173 static int
3174 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3175                     struct mlx5_flow *dev_flow __rte_unused,
3176                     const struct rte_flow_attr *attr __rte_unused,
3177                     const struct rte_flow_item items[] __rte_unused,
3178                     const struct rte_flow_action actions[] __rte_unused,
3179                     struct rte_flow_error *error)
3180 {
3181         return rte_flow_error_set(error, ENOTSUP,
3182                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3183 }
3184
3185 static int
3186 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3187                 struct rte_flow *flow __rte_unused,
3188                 struct rte_flow_error *error)
3189 {
3190         return rte_flow_error_set(error, ENOTSUP,
3191                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3192 }
3193
3194 static void
3195 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3196                  struct rte_flow *flow __rte_unused)
3197 {
3198 }
3199
3200 static void
3201 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3202                   struct rte_flow *flow __rte_unused)
3203 {
3204 }
3205
3206 static int
3207 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3208                 struct rte_flow *flow __rte_unused,
3209                 const struct rte_flow_action *actions __rte_unused,
3210                 void *data __rte_unused,
3211                 struct rte_flow_error *error)
3212 {
3213         return rte_flow_error_set(error, ENOTSUP,
3214                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3215 }
3216
3217 static int
3218 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3219                       uint32_t domains __rte_unused,
3220                       uint32_t flags __rte_unused)
3221 {
3222         return 0;
3223 }
3224
3225 /* Void driver to protect from null pointer reference. */
3226 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3227         .validate = flow_null_validate,
3228         .prepare = flow_null_prepare,
3229         .translate = flow_null_translate,
3230         .apply = flow_null_apply,
3231         .remove = flow_null_remove,
3232         .destroy = flow_null_destroy,
3233         .query = flow_null_query,
3234         .sync_domain = flow_null_sync_domain,
3235 };
3236
3237 /**
3238  * Select flow driver type according to flow attributes and device
3239  * configuration.
3240  *
3241  * @param[in] dev
3242  *   Pointer to the dev structure.
3243  * @param[in] attr
3244  *   Pointer to the flow attributes.
3245  *
3246  * @return
3247  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3248  */
3249 static enum mlx5_flow_drv_type
3250 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3251 {
3252         struct mlx5_priv *priv = dev->data->dev_private;
3253         /* The OS can determine first a specific flow type (DV, VERBS) */
3254         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3255
3256         if (type != MLX5_FLOW_TYPE_MAX)
3257                 return type;
3258         /* If no OS specific type - continue with DV/VERBS selection */
3259         if (attr->transfer && priv->config.dv_esw_en)
3260                 type = MLX5_FLOW_TYPE_DV;
3261         if (!attr->transfer)
3262                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3263                                                  MLX5_FLOW_TYPE_VERBS;
3264         return type;
3265 }
3266
3267 #define flow_get_drv_ops(type) flow_drv_ops[type]
3268
3269 /**
3270  * Flow driver validation API. This abstracts calling driver specific functions.
3271  * The type of flow driver is determined according to flow attributes.
3272  *
3273  * @param[in] dev
3274  *   Pointer to the dev structure.
3275  * @param[in] attr
3276  *   Pointer to the flow attributes.
3277  * @param[in] items
3278  *   Pointer to the list of items.
3279  * @param[in] actions
3280  *   Pointer to the list of actions.
3281  * @param[in] external
3282  *   This flow rule is created by request external to PMD.
3283  * @param[in] hairpin
3284  *   Number of hairpin TX actions, 0 means classic flow.
3285  * @param[out] error
3286  *   Pointer to the error structure.
3287  *
3288  * @return
3289  *   0 on success, a negative errno value otherwise and rte_errno is set.
3290  */
3291 static inline int
3292 flow_drv_validate(struct rte_eth_dev *dev,
3293                   const struct rte_flow_attr *attr,
3294                   const struct rte_flow_item items[],
3295                   const struct rte_flow_action actions[],
3296                   bool external, int hairpin, struct rte_flow_error *error)
3297 {
3298         const struct mlx5_flow_driver_ops *fops;
3299         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3300
3301         fops = flow_get_drv_ops(type);
3302         return fops->validate(dev, attr, items, actions, external,
3303                               hairpin, error);
3304 }
3305
3306 /**
3307  * Flow driver preparation API. This abstracts calling driver specific
3308  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3309  * calculates the size of memory required for device flow, allocates the memory,
3310  * initializes the device flow and returns the pointer.
3311  *
3312  * @note
3313  *   This function initializes device flow structure such as dv or verbs in
3314  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3315  *   rest. For example, adding returning device flow to flow->dev_flow list and
3316  *   setting backward reference to the flow should be done out of this function.
3317  *   layers field is not filled either.
3318  *
3319  * @param[in] dev
3320  *   Pointer to the dev structure.
3321  * @param[in] attr
3322  *   Pointer to the flow attributes.
3323  * @param[in] items
3324  *   Pointer to the list of items.
3325  * @param[in] actions
3326  *   Pointer to the list of actions.
3327  * @param[in] flow_idx
3328  *   This memory pool index to the flow.
3329  * @param[out] error
3330  *   Pointer to the error structure.
3331  *
3332  * @return
3333  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3334  */
3335 static inline struct mlx5_flow *
3336 flow_drv_prepare(struct rte_eth_dev *dev,
3337                  const struct rte_flow *flow,
3338                  const struct rte_flow_attr *attr,
3339                  const struct rte_flow_item items[],
3340                  const struct rte_flow_action actions[],
3341                  uint32_t flow_idx,
3342                  struct rte_flow_error *error)
3343 {
3344         const struct mlx5_flow_driver_ops *fops;
3345         enum mlx5_flow_drv_type type = flow->drv_type;
3346         struct mlx5_flow *mlx5_flow = NULL;
3347
3348         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3349         fops = flow_get_drv_ops(type);
3350         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3351         if (mlx5_flow)
3352                 mlx5_flow->flow_idx = flow_idx;
3353         return mlx5_flow;
3354 }
3355
3356 /**
3357  * Flow driver translation API. This abstracts calling driver specific
3358  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3359  * translates a generic flow into a driver flow. flow_drv_prepare() must
3360  * precede.
3361  *
3362  * @note
3363  *   dev_flow->layers could be filled as a result of parsing during translation
3364  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3365  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3366  *   flow->actions could be overwritten even though all the expanded dev_flows
3367  *   have the same actions.
3368  *
3369  * @param[in] dev
3370  *   Pointer to the rte dev structure.
3371  * @param[in, out] dev_flow
3372  *   Pointer to the mlx5 flow.
3373  * @param[in] attr
3374  *   Pointer to the flow attributes.
3375  * @param[in] items
3376  *   Pointer to the list of items.
3377  * @param[in] actions
3378  *   Pointer to the list of actions.
3379  * @param[out] error
3380  *   Pointer to the error structure.
3381  *
3382  * @return
3383  *   0 on success, a negative errno value otherwise and rte_errno is set.
3384  */
3385 static inline int
3386 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3387                    const struct rte_flow_attr *attr,
3388                    const struct rte_flow_item items[],
3389                    const struct rte_flow_action actions[],
3390                    struct rte_flow_error *error)
3391 {
3392         const struct mlx5_flow_driver_ops *fops;
3393         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3394
3395         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3396         fops = flow_get_drv_ops(type);
3397         return fops->translate(dev, dev_flow, attr, items, actions, error);
3398 }
3399
3400 /**
3401  * Flow driver apply API. This abstracts calling driver specific functions.
3402  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3403  * translated driver flows on to device. flow_drv_translate() must precede.
3404  *
3405  * @param[in] dev
3406  *   Pointer to Ethernet device structure.
3407  * @param[in, out] flow
3408  *   Pointer to flow structure.
3409  * @param[out] error
3410  *   Pointer to error structure.
3411  *
3412  * @return
3413  *   0 on success, a negative errno value otherwise and rte_errno is set.
3414  */
3415 static inline int
3416 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3417                struct rte_flow_error *error)
3418 {
3419         const struct mlx5_flow_driver_ops *fops;
3420         enum mlx5_flow_drv_type type = flow->drv_type;
3421
3422         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3423         fops = flow_get_drv_ops(type);
3424         return fops->apply(dev, flow, error);
3425 }
3426
3427 /**
3428  * Flow driver destroy API. This abstracts calling driver specific functions.
3429  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3430  * on device and releases resources of the flow.
3431  *
3432  * @param[in] dev
3433  *   Pointer to Ethernet device.
3434  * @param[in, out] flow
3435  *   Pointer to flow structure.
3436  */
3437 static inline void
3438 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3439 {
3440         const struct mlx5_flow_driver_ops *fops;
3441         enum mlx5_flow_drv_type type = flow->drv_type;
3442
3443         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3444         fops = flow_get_drv_ops(type);
3445         fops->destroy(dev, flow);
3446 }
3447
3448 /**
3449  * Flow driver find RSS policy tbl API. This abstracts calling driver
3450  * specific functions. Parent flow (rte_flow) should have driver
3451  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3452  *
3453  * @param[in] dev
3454  *   Pointer to Ethernet device.
3455  * @param[in, out] flow
3456  *   Pointer to flow structure.
3457  * @param[in] policy
3458  *   Pointer to meter policy table.
3459  * @param[in] rss_desc
3460  *   Pointer to rss_desc
3461  */
3462 static struct mlx5_flow_meter_sub_policy *
3463 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3464                 struct rte_flow *flow,
3465                 struct mlx5_flow_meter_policy *policy,
3466                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3467 {
3468         const struct mlx5_flow_driver_ops *fops;
3469         enum mlx5_flow_drv_type type = flow->drv_type;
3470
3471         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3472         fops = flow_get_drv_ops(type);
3473         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3474 }
3475
3476 /**
3477  * Flow driver color tag rule API. This abstracts calling driver
3478  * specific functions. Parent flow (rte_flow) should have driver
3479  * type (drv_type). It will create the color tag rules in hierarchy meter.
3480  *
3481  * @param[in] dev
3482  *   Pointer to Ethernet device.
3483  * @param[in, out] flow
3484  *   Pointer to flow structure.
3485  * @param[in] fm
3486  *   Pointer to flow meter structure.
3487  * @param[in] src_port
3488  *   The src port this extra rule should use.
3489  * @param[in] item
3490  *   The src port id match item.
3491  * @param[out] error
3492  *   Pointer to error structure.
3493  */
3494 static int
3495 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3496                 struct rte_flow *flow,
3497                 struct mlx5_flow_meter_info *fm,
3498                 int32_t src_port,
3499                 const struct rte_flow_item *item,
3500                 struct rte_flow_error *error)
3501 {
3502         const struct mlx5_flow_driver_ops *fops;
3503         enum mlx5_flow_drv_type type = flow->drv_type;
3504
3505         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3506         fops = flow_get_drv_ops(type);
3507         return fops->meter_hierarchy_rule_create(dev, fm,
3508                                                 src_port, item, error);
3509 }
3510
3511 /**
3512  * Get RSS action from the action list.
3513  *
3514  * @param[in] dev
3515  *   Pointer to Ethernet device.
3516  * @param[in] actions
3517  *   Pointer to the list of actions.
3518  * @param[in] flow
3519  *   Parent flow structure pointer.
3520  *
3521  * @return
3522  *   Pointer to the RSS action if exist, else return NULL.
3523  */
3524 static const struct rte_flow_action_rss*
3525 flow_get_rss_action(struct rte_eth_dev *dev,
3526                     const struct rte_flow_action actions[])
3527 {
3528         struct mlx5_priv *priv = dev->data->dev_private;
3529         const struct rte_flow_action_rss *rss = NULL;
3530
3531         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3532                 switch (actions->type) {
3533                 case RTE_FLOW_ACTION_TYPE_RSS:
3534                         rss = actions->conf;
3535                         break;
3536                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3537                 {
3538                         const struct rte_flow_action_sample *sample =
3539                                                                 actions->conf;
3540                         const struct rte_flow_action *act = sample->actions;
3541                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3542                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3543                                         rss = act->conf;
3544                         break;
3545                 }
3546                 case RTE_FLOW_ACTION_TYPE_METER:
3547                 {
3548                         uint32_t mtr_idx;
3549                         struct mlx5_flow_meter_info *fm;
3550                         struct mlx5_flow_meter_policy *policy;
3551                         const struct rte_flow_action_meter *mtr = actions->conf;
3552
3553                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3554                         if (fm && !fm->def_policy) {
3555                                 policy = mlx5_flow_meter_policy_find(dev,
3556                                                 fm->policy_id, NULL);
3557                                 MLX5_ASSERT(policy);
3558                                 if (policy->is_hierarchy) {
3559                                         policy =
3560                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3561                                                                         policy);
3562                                         if (!policy)
3563                                                 return NULL;
3564                                 }
3565                                 if (policy->is_rss)
3566                                         rss =
3567                                 policy->act_cnt[RTE_COLOR_GREEN].rss->conf;
3568                         }
3569                         break;
3570                 }
3571                 default:
3572                         break;
3573                 }
3574         }
3575         return rss;
3576 }
3577
3578 /**
3579  * Get ASO age action by index.
3580  *
3581  * @param[in] dev
3582  *   Pointer to the Ethernet device structure.
3583  * @param[in] age_idx
3584  *   Index to the ASO age action.
3585  *
3586  * @return
3587  *   The specified ASO age action.
3588  */
3589 struct mlx5_aso_age_action*
3590 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3591 {
3592         uint16_t pool_idx = age_idx & UINT16_MAX;
3593         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3594         struct mlx5_priv *priv = dev->data->dev_private;
3595         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3596         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3597
3598         return &pool->actions[offset - 1];
3599 }
3600
3601 /* maps indirect action to translated direct in some actions array */
3602 struct mlx5_translated_action_handle {
3603         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3604         int index; /**< Index in related array of rte_flow_action. */
3605 };
3606
3607 /**
3608  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3609  * direct action if translation possible.
3610  * This functionality used to run same execution path for both direct and
3611  * indirect actions on flow create. All necessary preparations for indirect
3612  * action handling should be performed on *handle* actions list returned
3613  * from this call.
3614  *
3615  * @param[in] dev
3616  *   Pointer to Ethernet device.
3617  * @param[in] actions
3618  *   List of actions to translate.
3619  * @param[out] handle
3620  *   List to store translated indirect action object handles.
3621  * @param[in, out] indir_n
3622  *   Size of *handle* array. On return should be updated with number of
3623  *   indirect actions retrieved from the *actions* list.
3624  * @param[out] translated_actions
3625  *   List of actions where all indirect actions were translated to direct
3626  *   if possible. NULL if no translation took place.
3627  * @param[out] error
3628  *   Pointer to the error structure.
3629  *
3630  * @return
3631  *   0 on success, a negative errno value otherwise and rte_errno is set.
3632  */
3633 static int
3634 flow_action_handles_translate(struct rte_eth_dev *dev,
3635                               const struct rte_flow_action actions[],
3636                               struct mlx5_translated_action_handle *handle,
3637                               int *indir_n,
3638                               struct rte_flow_action **translated_actions,
3639                               struct rte_flow_error *error)
3640 {
3641         struct mlx5_priv *priv = dev->data->dev_private;
3642         struct rte_flow_action *translated = NULL;
3643         size_t actions_size;
3644         int n;
3645         int copied_n = 0;
3646         struct mlx5_translated_action_handle *handle_end = NULL;
3647
3648         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3649                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3650                         continue;
3651                 if (copied_n == *indir_n) {
3652                         return rte_flow_error_set
3653                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3654                                  NULL, "too many shared actions");
3655                 }
3656                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3657                            sizeof(actions[n].conf));
3658                 handle[copied_n].index = n;
3659                 copied_n++;
3660         }
3661         n++;
3662         *indir_n = copied_n;
3663         if (!copied_n)
3664                 return 0;
3665         actions_size = sizeof(struct rte_flow_action) * n;
3666         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3667         if (!translated) {
3668                 rte_errno = ENOMEM;
3669                 return -ENOMEM;
3670         }
3671         memcpy(translated, actions, actions_size);
3672         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3673                 struct mlx5_shared_action_rss *shared_rss;
3674                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3675                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3676                 uint32_t idx = act_idx &
3677                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3678
3679                 switch (type) {
3680                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3681                         shared_rss = mlx5_ipool_get
3682                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3683                         translated[handle->index].type =
3684                                 RTE_FLOW_ACTION_TYPE_RSS;
3685                         translated[handle->index].conf =
3686                                 &shared_rss->origin;
3687                         break;
3688                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3689                         translated[handle->index].type =
3690                                                 (enum rte_flow_action_type)
3691                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3692                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3693                         break;
3694                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3695                         if (priv->sh->flow_hit_aso_en) {
3696                                 translated[handle->index].type =
3697                                         (enum rte_flow_action_type)
3698                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3699                                 translated[handle->index].conf =
3700                                                          (void *)(uintptr_t)idx;
3701                                 break;
3702                         }
3703                         /* Fall-through */
3704                 case MLX5_INDIRECT_ACTION_TYPE_CT:
3705                         if (priv->sh->ct_aso_en) {
3706                                 translated[handle->index].type =
3707                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
3708                                 translated[handle->index].conf =
3709                                                          (void *)(uintptr_t)idx;
3710                                 break;
3711                         }
3712                         /* Fall-through */
3713                 default:
3714                         mlx5_free(translated);
3715                         return rte_flow_error_set
3716                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3717                                  NULL, "invalid indirect action type");
3718                 }
3719         }
3720         *translated_actions = translated;
3721         return 0;
3722 }
3723
3724 /**
3725  * Get Shared RSS action from the action list.
3726  *
3727  * @param[in] dev
3728  *   Pointer to Ethernet device.
3729  * @param[in] shared
3730  *   Pointer to the list of actions.
3731  * @param[in] shared_n
3732  *   Actions list length.
3733  *
3734  * @return
3735  *   The MLX5 RSS action ID if exists, otherwise return 0.
3736  */
3737 static uint32_t
3738 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3739                            struct mlx5_translated_action_handle *handle,
3740                            int shared_n)
3741 {
3742         struct mlx5_translated_action_handle *handle_end;
3743         struct mlx5_priv *priv = dev->data->dev_private;
3744         struct mlx5_shared_action_rss *shared_rss;
3745
3746
3747         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3748                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3749                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3750                 uint32_t idx = act_idx &
3751                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3752                 switch (type) {
3753                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3754                         shared_rss = mlx5_ipool_get
3755                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3756                                                                            idx);
3757                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3758                                            __ATOMIC_RELAXED);
3759                         return idx;
3760                 default:
3761                         break;
3762                 }
3763         }
3764         return 0;
3765 }
3766
3767 static unsigned int
3768 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3769 {
3770         const struct rte_flow_item *item;
3771         unsigned int has_vlan = 0;
3772
3773         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3774                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3775                         has_vlan = 1;
3776                         break;
3777                 }
3778         }
3779         if (has_vlan)
3780                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3781                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3782         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3783                                MLX5_EXPANSION_ROOT_OUTER;
3784 }
3785
3786 /**
3787  *  Get layer flags from the prefix flow.
3788  *
3789  *  Some flows may be split to several subflows, the prefix subflow gets the
3790  *  match items and the suffix sub flow gets the actions.
3791  *  Some actions need the user defined match item flags to get the detail for
3792  *  the action.
3793  *  This function helps the suffix flow to get the item layer flags from prefix
3794  *  subflow.
3795  *
3796  * @param[in] dev_flow
3797  *   Pointer the created preifx subflow.
3798  *
3799  * @return
3800  *   The layers get from prefix subflow.
3801  */
3802 static inline uint64_t
3803 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3804 {
3805         uint64_t layers = 0;
3806
3807         /*
3808          * Layers bits could be localization, but usually the compiler will
3809          * help to do the optimization work for source code.
3810          * If no decap actions, use the layers directly.
3811          */
3812         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3813                 return dev_flow->handle->layers;
3814         /* Convert L3 layers with decap action. */
3815         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3816                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3817         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3818                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3819         /* Convert L4 layers with decap action.  */
3820         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3821                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3822         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3823                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3824         return layers;
3825 }
3826
3827 /**
3828  * Get metadata split action information.
3829  *
3830  * @param[in] actions
3831  *   Pointer to the list of actions.
3832  * @param[out] qrss
3833  *   Pointer to the return pointer.
3834  * @param[out] qrss_type
3835  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3836  *   if no QUEUE/RSS is found.
3837  * @param[out] encap_idx
3838  *   Pointer to the index of the encap action if exists, otherwise the last
3839  *   action index.
3840  *
3841  * @return
3842  *   Total number of actions.
3843  */
3844 static int
3845 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3846                                        const struct rte_flow_action **qrss,
3847                                        int *encap_idx)
3848 {
3849         const struct rte_flow_action_raw_encap *raw_encap;
3850         int actions_n = 0;
3851         int raw_decap_idx = -1;
3852
3853         *encap_idx = -1;
3854         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3855                 switch (actions->type) {
3856                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3857                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3858                         *encap_idx = actions_n;
3859                         break;
3860                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3861                         raw_decap_idx = actions_n;
3862                         break;
3863                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3864                         raw_encap = actions->conf;
3865                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3866                                 *encap_idx = raw_decap_idx != -1 ?
3867                                                       raw_decap_idx : actions_n;
3868                         break;
3869                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3870                 case RTE_FLOW_ACTION_TYPE_RSS:
3871                         *qrss = actions;
3872                         break;
3873                 default:
3874                         break;
3875                 }
3876                 actions_n++;
3877         }
3878         if (*encap_idx == -1)
3879                 *encap_idx = actions_n;
3880         /* Count RTE_FLOW_ACTION_TYPE_END. */
3881         return actions_n + 1;
3882 }
3883
3884 /**
3885  * Check if the action will change packet.
3886  *
3887  * @param dev
3888  *   Pointer to Ethernet device.
3889  * @param[in] type
3890  *   action type.
3891  *
3892  * @return
3893  *   true if action will change packet, false otherwise.
3894  */
3895 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
3896                                           enum rte_flow_action_type type)
3897 {
3898         struct mlx5_priv *priv = dev->data->dev_private;
3899
3900         switch (type) {
3901         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3902         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3903         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3904         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3905         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3906         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3907         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3908         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3909         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3910         case RTE_FLOW_ACTION_TYPE_SET_TTL:
3911         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3912         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3913         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3914         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3915         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
3916         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
3917         case RTE_FLOW_ACTION_TYPE_SET_META:
3918         case RTE_FLOW_ACTION_TYPE_SET_TAG:
3919         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3920         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3921         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3922         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3923         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3924         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3925         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3926         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3927         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3928         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3929         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
3930                 return true;
3931         case RTE_FLOW_ACTION_TYPE_FLAG:
3932         case RTE_FLOW_ACTION_TYPE_MARK:
3933                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
3934                         return true;
3935                 else
3936                         return false;
3937         default:
3938                 return false;
3939         }
3940 }
3941
3942 /**
3943  * Check meter action from the action list.
3944  *
3945  * @param dev
3946  *   Pointer to Ethernet device.
3947  * @param[in] actions
3948  *   Pointer to the list of actions.
3949  * @param[out] has_mtr
3950  *   Pointer to the meter exist flag.
3951  * @param[out] has_modify
3952  *   Pointer to the flag showing there's packet change action.
3953  * @param[out] meter_id
3954  *   Pointer to the meter id.
3955  *
3956  * @return
3957  *   Total number of actions.
3958  */
3959 static int
3960 flow_check_meter_action(struct rte_eth_dev *dev,
3961                         const struct rte_flow_action actions[],
3962                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
3963 {
3964         const struct rte_flow_action_meter *mtr = NULL;
3965         int actions_n = 0;
3966
3967         MLX5_ASSERT(has_mtr);
3968         *has_mtr = false;
3969         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3970                 switch (actions->type) {
3971                 case RTE_FLOW_ACTION_TYPE_METER:
3972                         mtr = actions->conf;
3973                         *meter_id = mtr->mtr_id;
3974                         *has_mtr = true;
3975                         break;
3976                 default:
3977                         break;
3978                 }
3979                 if (!*has_mtr)
3980                         *has_modify |= flow_check_modify_action_type(dev,
3981                                                                 actions->type);
3982                 actions_n++;
3983         }
3984         /* Count RTE_FLOW_ACTION_TYPE_END. */
3985         return actions_n + 1;
3986 }
3987
3988 /**
3989  * Check if the flow should be split due to hairpin.
3990  * The reason for the split is that in current HW we can't
3991  * support encap and push-vlan on Rx, so if a flow contains
3992  * these actions we move it to Tx.
3993  *
3994  * @param dev
3995  *   Pointer to Ethernet device.
3996  * @param[in] attr
3997  *   Flow rule attributes.
3998  * @param[in] actions
3999  *   Associated actions (list terminated by the END action).
4000  *
4001  * @return
4002  *   > 0 the number of actions and the flow should be split,
4003  *   0 when no split required.
4004  */
4005 static int
4006 flow_check_hairpin_split(struct rte_eth_dev *dev,
4007                          const struct rte_flow_attr *attr,
4008                          const struct rte_flow_action actions[])
4009 {
4010         int queue_action = 0;
4011         int action_n = 0;
4012         int split = 0;
4013         const struct rte_flow_action_queue *queue;
4014         const struct rte_flow_action_rss *rss;
4015         const struct rte_flow_action_raw_encap *raw_encap;
4016         const struct rte_eth_hairpin_conf *conf;
4017
4018         if (!attr->ingress)
4019                 return 0;
4020         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4021                 switch (actions->type) {
4022                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4023                         queue = actions->conf;
4024                         if (queue == NULL)
4025                                 return 0;
4026                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4027                         if (conf == NULL || conf->tx_explicit != 0)
4028                                 return 0;
4029                         queue_action = 1;
4030                         action_n++;
4031                         break;
4032                 case RTE_FLOW_ACTION_TYPE_RSS:
4033                         rss = actions->conf;
4034                         if (rss == NULL || rss->queue_num == 0)
4035                                 return 0;
4036                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4037                         if (conf == NULL || conf->tx_explicit != 0)
4038                                 return 0;
4039                         queue_action = 1;
4040                         action_n++;
4041                         break;
4042                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4043                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4044                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4045                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4046                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4047                         split++;
4048                         action_n++;
4049                         break;
4050                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4051                         raw_encap = actions->conf;
4052                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4053                                 split++;
4054                         action_n++;
4055                         break;
4056                 default:
4057                         action_n++;
4058                         break;
4059                 }
4060         }
4061         if (split && queue_action)
4062                 return action_n;
4063         return 0;
4064 }
4065
4066 /* Declare flow create/destroy prototype in advance. */
4067 static uint32_t
4068 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4069                  const struct rte_flow_attr *attr,
4070                  const struct rte_flow_item items[],
4071                  const struct rte_flow_action actions[],
4072                  bool external, struct rte_flow_error *error);
4073
4074 static void
4075 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4076                   uint32_t flow_idx);
4077
4078 int
4079 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4080                       struct mlx5_list_entry *entry, void *cb_ctx)
4081 {
4082         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4083         struct mlx5_flow_mreg_copy_resource *mcp_res =
4084                                container_of(entry, typeof(*mcp_res), hlist_ent);
4085
4086         return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4087 }
4088
4089 struct mlx5_list_entry *
4090 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4091 {
4092         struct rte_eth_dev *dev = tool_ctx;
4093         struct mlx5_priv *priv = dev->data->dev_private;
4094         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4095         struct mlx5_flow_mreg_copy_resource *mcp_res;
4096         struct rte_flow_error *error = ctx->error;
4097         uint32_t idx = 0;
4098         int ret;
4099         uint32_t mark_id = *(uint32_t *)(ctx->data);
4100         struct rte_flow_attr attr = {
4101                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4102                 .ingress = 1,
4103         };
4104         struct mlx5_rte_flow_item_tag tag_spec = {
4105                 .data = mark_id,
4106         };
4107         struct rte_flow_item items[] = {
4108                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4109         };
4110         struct rte_flow_action_mark ftag = {
4111                 .id = mark_id,
4112         };
4113         struct mlx5_flow_action_copy_mreg cp_mreg = {
4114                 .dst = REG_B,
4115                 .src = REG_NON,
4116         };
4117         struct rte_flow_action_jump jump = {
4118                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4119         };
4120         struct rte_flow_action actions[] = {
4121                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4122         };
4123
4124         /* Fill the register fileds in the flow. */
4125         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4126         if (ret < 0)
4127                 return NULL;
4128         tag_spec.id = ret;
4129         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4130         if (ret < 0)
4131                 return NULL;
4132         cp_mreg.src = ret;
4133         /* Provide the full width of FLAG specific value. */
4134         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4135                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4136         /* Build a new flow. */
4137         if (mark_id != MLX5_DEFAULT_COPY_ID) {
4138                 items[0] = (struct rte_flow_item){
4139                         .type = (enum rte_flow_item_type)
4140                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4141                         .spec = &tag_spec,
4142                 };
4143                 items[1] = (struct rte_flow_item){
4144                         .type = RTE_FLOW_ITEM_TYPE_END,
4145                 };
4146                 actions[0] = (struct rte_flow_action){
4147                         .type = (enum rte_flow_action_type)
4148                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4149                         .conf = &ftag,
4150                 };
4151                 actions[1] = (struct rte_flow_action){
4152                         .type = (enum rte_flow_action_type)
4153                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4154                         .conf = &cp_mreg,
4155                 };
4156                 actions[2] = (struct rte_flow_action){
4157                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4158                         .conf = &jump,
4159                 };
4160                 actions[3] = (struct rte_flow_action){
4161                         .type = RTE_FLOW_ACTION_TYPE_END,
4162                 };
4163         } else {
4164                 /* Default rule, wildcard match. */
4165                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4166                 items[0] = (struct rte_flow_item){
4167                         .type = RTE_FLOW_ITEM_TYPE_END,
4168                 };
4169                 actions[0] = (struct rte_flow_action){
4170                         .type = (enum rte_flow_action_type)
4171                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4172                         .conf = &cp_mreg,
4173                 };
4174                 actions[1] = (struct rte_flow_action){
4175                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4176                         .conf = &jump,
4177                 };
4178                 actions[2] = (struct rte_flow_action){
4179                         .type = RTE_FLOW_ACTION_TYPE_END,
4180                 };
4181         }
4182         /* Build a new entry. */
4183         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4184         if (!mcp_res) {
4185                 rte_errno = ENOMEM;
4186                 return NULL;
4187         }
4188         mcp_res->idx = idx;
4189         mcp_res->mark_id = mark_id;
4190         /*
4191          * The copy Flows are not included in any list. There
4192          * ones are referenced from other Flows and can not
4193          * be applied, removed, deleted in ardbitrary order
4194          * by list traversing.
4195          */
4196         mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4197                                         &attr, items, actions, false, error);
4198         if (!mcp_res->rix_flow) {
4199                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4200                 return NULL;
4201         }
4202         return &mcp_res->hlist_ent;
4203 }
4204
4205 struct mlx5_list_entry *
4206 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4207                       void *cb_ctx __rte_unused)
4208 {
4209         struct rte_eth_dev *dev = tool_ctx;
4210         struct mlx5_priv *priv = dev->data->dev_private;
4211         struct mlx5_flow_mreg_copy_resource *mcp_res;
4212         uint32_t idx = 0;
4213
4214         mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4215         if (!mcp_res) {
4216                 rte_errno = ENOMEM;
4217                 return NULL;
4218         }
4219         memcpy(mcp_res, oentry, sizeof(*mcp_res));
4220         mcp_res->idx = idx;
4221         return &mcp_res->hlist_ent;
4222 }
4223
4224 void
4225 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4226 {
4227         struct mlx5_flow_mreg_copy_resource *mcp_res =
4228                                container_of(entry, typeof(*mcp_res), hlist_ent);
4229         struct rte_eth_dev *dev = tool_ctx;
4230         struct mlx5_priv *priv = dev->data->dev_private;
4231
4232         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4233 }
4234
4235 /**
4236  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4237  *
4238  * As mark_id is unique, if there's already a registered flow for the mark_id,
4239  * return by increasing the reference counter of the resource. Otherwise, create
4240  * the resource (mcp_res) and flow.
4241  *
4242  * Flow looks like,
4243  *   - If ingress port is ANY and reg_c[1] is mark_id,
4244  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4245  *
4246  * For default flow (zero mark_id), flow is like,
4247  *   - If ingress port is ANY,
4248  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4249  *
4250  * @param dev
4251  *   Pointer to Ethernet device.
4252  * @param mark_id
4253  *   ID of MARK action, zero means default flow for META.
4254  * @param[out] error
4255  *   Perform verbose error reporting if not NULL.
4256  *
4257  * @return
4258  *   Associated resource on success, NULL otherwise and rte_errno is set.
4259  */
4260 static struct mlx5_flow_mreg_copy_resource *
4261 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4262                           struct rte_flow_error *error)
4263 {
4264         struct mlx5_priv *priv = dev->data->dev_private;
4265         struct mlx5_list_entry *entry;
4266         struct mlx5_flow_cb_ctx ctx = {
4267                 .dev = dev,
4268                 .error = error,
4269                 .data = &mark_id,
4270         };
4271
4272         /* Check if already registered. */
4273         MLX5_ASSERT(priv->mreg_cp_tbl);
4274         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4275         if (!entry)
4276                 return NULL;
4277         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4278                             hlist_ent);
4279 }
4280
4281 void
4282 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4283 {
4284         struct mlx5_flow_mreg_copy_resource *mcp_res =
4285                                container_of(entry, typeof(*mcp_res), hlist_ent);
4286         struct rte_eth_dev *dev = tool_ctx;
4287         struct mlx5_priv *priv = dev->data->dev_private;
4288
4289         MLX5_ASSERT(mcp_res->rix_flow);
4290         flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4291         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4292 }
4293
4294 /**
4295  * Release flow in RX_CP_TBL.
4296  *
4297  * @param dev
4298  *   Pointer to Ethernet device.
4299  * @flow
4300  *   Parent flow for wich copying is provided.
4301  */
4302 static void
4303 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4304                           struct rte_flow *flow)
4305 {
4306         struct mlx5_flow_mreg_copy_resource *mcp_res;
4307         struct mlx5_priv *priv = dev->data->dev_private;
4308
4309         if (!flow->rix_mreg_copy)
4310                 return;
4311         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4312                                  flow->rix_mreg_copy);
4313         if (!mcp_res || !priv->mreg_cp_tbl)
4314                 return;
4315         MLX5_ASSERT(mcp_res->rix_flow);
4316         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4317         flow->rix_mreg_copy = 0;
4318 }
4319
4320 /**
4321  * Remove the default copy action from RX_CP_TBL.
4322  *
4323  * This functions is called in the mlx5_dev_start(). No thread safe
4324  * is guaranteed.
4325  *
4326  * @param dev
4327  *   Pointer to Ethernet device.
4328  */
4329 static void
4330 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4331 {
4332         struct mlx5_list_entry *entry;
4333         struct mlx5_priv *priv = dev->data->dev_private;
4334         struct mlx5_flow_cb_ctx ctx;
4335         uint32_t mark_id;
4336
4337         /* Check if default flow is registered. */
4338         if (!priv->mreg_cp_tbl)
4339                 return;
4340         mark_id = MLX5_DEFAULT_COPY_ID;
4341         ctx.data = &mark_id;
4342         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4343         if (!entry)
4344                 return;
4345         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4346 }
4347
4348 /**
4349  * Add the default copy action in in RX_CP_TBL.
4350  *
4351  * This functions is called in the mlx5_dev_start(). No thread safe
4352  * is guaranteed.
4353  *
4354  * @param dev
4355  *   Pointer to Ethernet device.
4356  * @param[out] error
4357  *   Perform verbose error reporting if not NULL.
4358  *
4359  * @return
4360  *   0 for success, negative value otherwise and rte_errno is set.
4361  */
4362 static int
4363 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4364                                   struct rte_flow_error *error)
4365 {
4366         struct mlx5_priv *priv = dev->data->dev_private;
4367         struct mlx5_flow_mreg_copy_resource *mcp_res;
4368         struct mlx5_flow_cb_ctx ctx;
4369         uint32_t mark_id;
4370
4371         /* Check whether extensive metadata feature is engaged. */
4372         if (!priv->config.dv_flow_en ||
4373             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4374             !mlx5_flow_ext_mreg_supported(dev) ||
4375             !priv->sh->dv_regc0_mask)
4376                 return 0;
4377         /*
4378          * Add default mreg copy flow may be called multiple time, but
4379          * only be called once in stop. Avoid register it twice.
4380          */
4381         mark_id = MLX5_DEFAULT_COPY_ID;
4382         ctx.data = &mark_id;
4383         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4384                 return 0;
4385         mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4386         if (!mcp_res)
4387                 return -rte_errno;
4388         return 0;
4389 }
4390
4391 /**
4392  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4393  *
4394  * All the flow having Q/RSS action should be split by
4395  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4396  * performs the following,
4397  *   - CQE->flow_tag := reg_c[1] (MARK)
4398  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4399  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4400  * but there should be a flow per each MARK ID set by MARK action.
4401  *
4402  * For the aforementioned reason, if there's a MARK action in flow's action
4403  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4404  * the MARK ID to CQE's flow_tag like,
4405  *   - If reg_c[1] is mark_id,
4406  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4407  *
4408  * For SET_META action which stores value in reg_c[0], as the destination is
4409  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4410  * MARK ID means the default flow. The default flow looks like,
4411  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4412  *
4413  * @param dev
4414  *   Pointer to Ethernet device.
4415  * @param flow
4416  *   Pointer to flow structure.
4417  * @param[in] actions
4418  *   Pointer to the list of actions.
4419  * @param[out] error
4420  *   Perform verbose error reporting if not NULL.
4421  *
4422  * @return
4423  *   0 on success, negative value otherwise and rte_errno is set.
4424  */
4425 static int
4426 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4427                             struct rte_flow *flow,
4428                             const struct rte_flow_action *actions,
4429                             struct rte_flow_error *error)
4430 {
4431         struct mlx5_priv *priv = dev->data->dev_private;
4432         struct mlx5_dev_config *config = &priv->config;
4433         struct mlx5_flow_mreg_copy_resource *mcp_res;
4434         const struct rte_flow_action_mark *mark;
4435
4436         /* Check whether extensive metadata feature is engaged. */
4437         if (!config->dv_flow_en ||
4438             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4439             !mlx5_flow_ext_mreg_supported(dev) ||
4440             !priv->sh->dv_regc0_mask)
4441                 return 0;
4442         /* Find MARK action. */
4443         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4444                 switch (actions->type) {
4445                 case RTE_FLOW_ACTION_TYPE_FLAG:
4446                         mcp_res = flow_mreg_add_copy_action
4447                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4448                         if (!mcp_res)
4449                                 return -rte_errno;
4450                         flow->rix_mreg_copy = mcp_res->idx;
4451                         return 0;
4452                 case RTE_FLOW_ACTION_TYPE_MARK:
4453                         mark = (const struct rte_flow_action_mark *)
4454                                 actions->conf;
4455                         mcp_res =
4456                                 flow_mreg_add_copy_action(dev, mark->id, error);
4457                         if (!mcp_res)
4458                                 return -rte_errno;
4459                         flow->rix_mreg_copy = mcp_res->idx;
4460                         return 0;
4461                 default:
4462                         break;
4463                 }
4464         }
4465         return 0;
4466 }
4467
4468 #define MLX5_MAX_SPLIT_ACTIONS 24
4469 #define MLX5_MAX_SPLIT_ITEMS 24
4470
4471 /**
4472  * Split the hairpin flow.
4473  * Since HW can't support encap and push-vlan on Rx, we move these
4474  * actions to Tx.
4475  * If the count action is after the encap then we also
4476  * move the count action. in this case the count will also measure
4477  * the outer bytes.
4478  *
4479  * @param dev
4480  *   Pointer to Ethernet device.
4481  * @param[in] actions
4482  *   Associated actions (list terminated by the END action).
4483  * @param[out] actions_rx
4484  *   Rx flow actions.
4485  * @param[out] actions_tx
4486  *   Tx flow actions..
4487  * @param[out] pattern_tx
4488  *   The pattern items for the Tx flow.
4489  * @param[out] flow_id
4490  *   The flow ID connected to this flow.
4491  *
4492  * @return
4493  *   0 on success.
4494  */
4495 static int
4496 flow_hairpin_split(struct rte_eth_dev *dev,
4497                    const struct rte_flow_action actions[],
4498                    struct rte_flow_action actions_rx[],
4499                    struct rte_flow_action actions_tx[],
4500                    struct rte_flow_item pattern_tx[],
4501                    uint32_t flow_id)
4502 {
4503         const struct rte_flow_action_raw_encap *raw_encap;
4504         const struct rte_flow_action_raw_decap *raw_decap;
4505         struct mlx5_rte_flow_action_set_tag *set_tag;
4506         struct rte_flow_action *tag_action;
4507         struct mlx5_rte_flow_item_tag *tag_item;
4508         struct rte_flow_item *item;
4509         char *addr;
4510         int encap = 0;
4511
4512         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4513                 switch (actions->type) {
4514                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4515                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4516                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4517                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4518                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4519                         rte_memcpy(actions_tx, actions,
4520                                sizeof(struct rte_flow_action));
4521                         actions_tx++;
4522                         break;
4523                 case RTE_FLOW_ACTION_TYPE_COUNT:
4524                         if (encap) {
4525                                 rte_memcpy(actions_tx, actions,
4526                                            sizeof(struct rte_flow_action));
4527                                 actions_tx++;
4528                         } else {
4529                                 rte_memcpy(actions_rx, actions,
4530                                            sizeof(struct rte_flow_action));
4531                                 actions_rx++;
4532                         }
4533                         break;
4534                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4535                         raw_encap = actions->conf;
4536                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4537                                 memcpy(actions_tx, actions,
4538                                        sizeof(struct rte_flow_action));
4539                                 actions_tx++;
4540                                 encap = 1;
4541                         } else {
4542                                 rte_memcpy(actions_rx, actions,
4543                                            sizeof(struct rte_flow_action));
4544                                 actions_rx++;
4545                         }
4546                         break;
4547                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4548                         raw_decap = actions->conf;
4549                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4550                                 memcpy(actions_tx, actions,
4551                                        sizeof(struct rte_flow_action));
4552                                 actions_tx++;
4553                         } else {
4554                                 rte_memcpy(actions_rx, actions,
4555                                            sizeof(struct rte_flow_action));
4556                                 actions_rx++;
4557                         }
4558                         break;
4559                 default:
4560                         rte_memcpy(actions_rx, actions,
4561                                    sizeof(struct rte_flow_action));
4562                         actions_rx++;
4563                         break;
4564                 }
4565         }
4566         /* Add set meta action and end action for the Rx flow. */
4567         tag_action = actions_rx;
4568         tag_action->type = (enum rte_flow_action_type)
4569                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4570         actions_rx++;
4571         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4572         actions_rx++;
4573         set_tag = (void *)actions_rx;
4574         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4575                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4576                 .data = flow_id,
4577         };
4578         MLX5_ASSERT(set_tag->id > REG_NON);
4579         tag_action->conf = set_tag;
4580         /* Create Tx item list. */
4581         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4582         addr = (void *)&pattern_tx[2];
4583         item = pattern_tx;
4584         item->type = (enum rte_flow_item_type)
4585                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4586         tag_item = (void *)addr;
4587         tag_item->data = flow_id;
4588         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4589         MLX5_ASSERT(set_tag->id > REG_NON);
4590         item->spec = tag_item;
4591         addr += sizeof(struct mlx5_rte_flow_item_tag);
4592         tag_item = (void *)addr;
4593         tag_item->data = UINT32_MAX;
4594         tag_item->id = UINT16_MAX;
4595         item->mask = tag_item;
4596         item->last = NULL;
4597         item++;
4598         item->type = RTE_FLOW_ITEM_TYPE_END;
4599         return 0;
4600 }
4601
4602 /**
4603  * The last stage of splitting chain, just creates the subflow
4604  * without any modification.
4605  *
4606  * @param[in] dev
4607  *   Pointer to Ethernet device.
4608  * @param[in] flow
4609  *   Parent flow structure pointer.
4610  * @param[in, out] sub_flow
4611  *   Pointer to return the created subflow, may be NULL.
4612  * @param[in] attr
4613  *   Flow rule attributes.
4614  * @param[in] items
4615  *   Pattern specification (list terminated by the END pattern item).
4616  * @param[in] actions
4617  *   Associated actions (list terminated by the END action).
4618  * @param[in] flow_split_info
4619  *   Pointer to flow split info structure.
4620  * @param[out] error
4621  *   Perform verbose error reporting if not NULL.
4622  * @return
4623  *   0 on success, negative value otherwise
4624  */
4625 static int
4626 flow_create_split_inner(struct rte_eth_dev *dev,
4627                         struct rte_flow *flow,
4628                         struct mlx5_flow **sub_flow,
4629                         const struct rte_flow_attr *attr,
4630                         const struct rte_flow_item items[],
4631                         const struct rte_flow_action actions[],
4632                         struct mlx5_flow_split_info *flow_split_info,
4633                         struct rte_flow_error *error)
4634 {
4635         struct mlx5_flow *dev_flow;
4636
4637         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4638                                     flow_split_info->flow_idx, error);
4639         if (!dev_flow)
4640                 return -rte_errno;
4641         dev_flow->flow = flow;
4642         dev_flow->external = flow_split_info->external;
4643         dev_flow->skip_scale = flow_split_info->skip_scale;
4644         /* Subflow object was created, we must include one in the list. */
4645         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4646                       dev_flow->handle, next);
4647         /*
4648          * If dev_flow is as one of the suffix flow, some actions in suffix
4649          * flow may need some user defined item layer flags, and pass the
4650          * Metadate rxq mark flag to suffix flow as well.
4651          */
4652         if (flow_split_info->prefix_layers)
4653                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4654         if (flow_split_info->prefix_mark)
4655                 dev_flow->handle->mark = 1;
4656         if (sub_flow)
4657                 *sub_flow = dev_flow;
4658 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4659         dev_flow->dv.table_id = flow_split_info->table_id;
4660 #endif
4661         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4662 }
4663
4664 /**
4665  * Get the sub policy of a meter.
4666  *
4667  * @param[in] dev
4668  *   Pointer to Ethernet device.
4669  * @param[in] flow
4670  *   Parent flow structure pointer.
4671  * @param wks
4672  *   Pointer to thread flow work space.
4673  * @param[in] attr
4674  *   Flow rule attributes.
4675  * @param[in] items
4676  *   Pattern specification (list terminated by the END pattern item).
4677  * @param[out] error
4678  *   Perform verbose error reporting if not NULL.
4679  *
4680  * @return
4681  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4682  */
4683 static struct mlx5_flow_meter_sub_policy *
4684 get_meter_sub_policy(struct rte_eth_dev *dev,
4685                      struct rte_flow *flow,
4686                      struct mlx5_flow_workspace *wks,
4687                      const struct rte_flow_attr *attr,
4688                      const struct rte_flow_item items[],
4689                      struct rte_flow_error *error)
4690 {
4691         struct mlx5_flow_meter_policy *policy;
4692         struct mlx5_flow_meter_policy *final_policy;
4693         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4694
4695         policy = wks->policy;
4696         final_policy = policy->is_hierarchy ? wks->final_policy : policy;
4697         if (final_policy->is_rss || final_policy->is_queue) {
4698                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4699                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4700                 uint32_t i;
4701
4702                 /*
4703                  * This is a tmp dev_flow,
4704                  * no need to register any matcher for it in translate.
4705                  */
4706                 wks->skip_matcher_reg = 1;
4707                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4708                         struct mlx5_flow dev_flow = {0};
4709                         struct mlx5_flow_handle dev_handle = { {0} };
4710                         uint8_t fate = final_policy->act_cnt[i].fate_action;
4711
4712                         if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
4713                                 const struct rte_flow_action_rss *rss_act =
4714                                         final_policy->act_cnt[i].rss->conf;
4715                                 struct rte_flow_action rss_actions[2] = {
4716                                         [0] = {
4717                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4718                                         .conf = rss_act,
4719                                         },
4720                                         [1] = {
4721                                         .type = RTE_FLOW_ACTION_TYPE_END,
4722                                         .conf = NULL,
4723                                         }
4724                                 };
4725
4726                                 dev_flow.handle = &dev_handle;
4727                                 dev_flow.ingress = attr->ingress;
4728                                 dev_flow.flow = flow;
4729                                 dev_flow.external = 0;
4730 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4731                                 dev_flow.dv.transfer = attr->transfer;
4732 #endif
4733                                 /**
4734                                  * Translate RSS action to get rss hash fields.
4735                                  */
4736                                 if (flow_drv_translate(dev, &dev_flow, attr,
4737                                                 items, rss_actions, error))
4738                                         goto exit;
4739                                 rss_desc_v[i] = wks->rss_desc;
4740                                 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4741                                 rss_desc_v[i].hash_fields =
4742                                                 dev_flow.hash_fields;
4743                                 rss_desc_v[i].queue_num =
4744                                                 rss_desc_v[i].hash_fields ?
4745                                                 rss_desc_v[i].queue_num : 1;
4746                                 rss_desc_v[i].tunnel =
4747                                                 !!(dev_flow.handle->layers &
4748                                                    MLX5_FLOW_LAYER_TUNNEL);
4749                                 /* Use the RSS queues in the containers. */
4750                                 rss_desc_v[i].queue =
4751                                         (uint16_t *)(uintptr_t)rss_act->queue;
4752                                 rss_desc[i] = &rss_desc_v[i];
4753                         } else if (fate == MLX5_FLOW_FATE_QUEUE) {
4754                                 /* This is queue action. */
4755                                 rss_desc_v[i] = wks->rss_desc;
4756                                 rss_desc_v[i].key_len = 0;
4757                                 rss_desc_v[i].hash_fields = 0;
4758                                 rss_desc_v[i].queue =
4759                                         &final_policy->act_cnt[i].queue;
4760                                 rss_desc_v[i].queue_num = 1;
4761                                 rss_desc[i] = &rss_desc_v[i];
4762                         } else {
4763                                 rss_desc[i] = NULL;
4764                         }
4765                 }
4766                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4767                                                 flow, policy, rss_desc);
4768         } else {
4769                 enum mlx5_meter_domain mtr_domain =
4770                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4771                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4772                                                 MLX5_MTR_DOMAIN_INGRESS);
4773                 sub_policy = policy->sub_policys[mtr_domain][0];
4774         }
4775         if (!sub_policy)
4776                 rte_flow_error_set(error, EINVAL,
4777                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4778                                    "Failed to get meter sub-policy.");
4779 exit:
4780         return sub_policy;
4781 }
4782
4783 /**
4784  * Split the meter flow.
4785  *
4786  * As meter flow will split to three sub flow, other than meter
4787  * action, the other actions make sense to only meter accepts
4788  * the packet. If it need to be dropped, no other additional
4789  * actions should be take.
4790  *
4791  * One kind of special action which decapsulates the L3 tunnel
4792  * header will be in the prefix sub flow, as not to take the
4793  * L3 tunnel header into account.
4794  *
4795  * @param[in] dev
4796  *   Pointer to Ethernet device.
4797  * @param[in] flow
4798  *   Parent flow structure pointer.
4799  * @param wks
4800  *   Pointer to thread flow work space.
4801  * @param[in] attr
4802  *   Flow rule attributes.
4803  * @param[in] items
4804  *   Pattern specification (list terminated by the END pattern item).
4805  * @param[out] sfx_items
4806  *   Suffix flow match items (list terminated by the END pattern item).
4807  * @param[in] actions
4808  *   Associated actions (list terminated by the END action).
4809  * @param[out] actions_sfx
4810  *   Suffix flow actions.
4811  * @param[out] actions_pre
4812  *   Prefix flow actions.
4813  * @param[out] mtr_flow_id
4814  *   Pointer to meter flow id.
4815  * @param[out] error
4816  *   Perform verbose error reporting if not NULL.
4817  *
4818  * @return
4819  *   0 on success, a negative errno value otherwise and rte_errno is set.
4820  */
4821 static int
4822 flow_meter_split_prep(struct rte_eth_dev *dev,
4823                       struct rte_flow *flow,
4824                       struct mlx5_flow_workspace *wks,
4825                       const struct rte_flow_attr *attr,
4826                       const struct rte_flow_item items[],
4827                       struct rte_flow_item sfx_items[],
4828                       const struct rte_flow_action actions[],
4829                       struct rte_flow_action actions_sfx[],
4830                       struct rte_flow_action actions_pre[],
4831                       uint32_t *mtr_flow_id,
4832                       struct rte_flow_error *error)
4833 {
4834         struct mlx5_priv *priv = dev->data->dev_private;
4835         struct mlx5_flow_meter_info *fm = wks->fm;
4836         struct rte_flow_action *tag_action = NULL;
4837         struct rte_flow_item *tag_item;
4838         struct mlx5_rte_flow_action_set_tag *set_tag;
4839         const struct rte_flow_action_raw_encap *raw_encap;
4840         const struct rte_flow_action_raw_decap *raw_decap;
4841         struct mlx5_rte_flow_item_tag *tag_item_spec;
4842         struct mlx5_rte_flow_item_tag *tag_item_mask;
4843         uint32_t tag_id = 0;
4844         struct rte_flow_item *vlan_item_dst = NULL;
4845         const struct rte_flow_item *vlan_item_src = NULL;
4846         struct rte_flow_action *hw_mtr_action;
4847         struct rte_flow_action *action_pre_head = NULL;
4848         int32_t flow_src_port = priv->representor_id;
4849         bool mtr_first;
4850         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
4851         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
4852                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
4853         uint32_t flow_id = 0;
4854         uint32_t flow_id_reversed = 0;
4855         uint8_t flow_id_bits = 0;
4856         int shift;
4857
4858         /* Prepare the suffix subflow items. */
4859         tag_item = sfx_items++;
4860         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4861                 struct mlx5_priv *port_priv;
4862                 const struct rte_flow_item_port_id *pid_v;
4863                 int item_type = items->type;
4864
4865                 switch (item_type) {
4866                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4867                         pid_v = items->spec;
4868                         MLX5_ASSERT(pid_v);
4869                         port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
4870                         if (!port_priv)
4871                                 return rte_flow_error_set(error,
4872                                                 rte_errno,
4873                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
4874                                                 pid_v,
4875                                                 "Failed to get port info.");
4876                         flow_src_port = port_priv->representor_id;
4877                         if (!fm->def_policy && wks->policy->is_hierarchy &&
4878                             flow_src_port != priv->representor_id) {
4879                                 if (flow_drv_mtr_hierarchy_rule_create(dev,
4880                                                                 flow, fm,
4881                                                                 flow_src_port,
4882                                                                 items,
4883                                                                 error))
4884                                         return -rte_errno;
4885                         }
4886                         memcpy(sfx_items, items, sizeof(*sfx_items));
4887                         sfx_items++;
4888                         break;
4889                 case RTE_FLOW_ITEM_TYPE_VLAN:
4890                         /* Determine if copy vlan item below. */
4891                         vlan_item_src = items;
4892                         vlan_item_dst = sfx_items++;
4893                         vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
4894                         break;
4895                 default:
4896                         break;
4897                 }
4898         }
4899         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4900         sfx_items++;
4901         mtr_first = priv->sh->meter_aso_en &&
4902                 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
4903         /* For ASO meter, meter must be before tag in TX direction. */
4904         if (mtr_first) {
4905                 action_pre_head = actions_pre++;
4906                 /* Leave space for tag action. */
4907                 tag_action = actions_pre++;
4908         }
4909         /* Prepare the actions for prefix and suffix flow. */
4910         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4911                 struct rte_flow_action *action_cur = NULL;
4912
4913                 switch (actions->type) {
4914                 case RTE_FLOW_ACTION_TYPE_METER:
4915                         if (mtr_first) {
4916                                 action_cur = action_pre_head;
4917                         } else {
4918                                 /* Leave space for tag action. */
4919                                 tag_action = actions_pre++;
4920                                 action_cur = actions_pre++;
4921                         }
4922                         break;
4923                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4924                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4925                         action_cur = actions_pre++;
4926                         break;
4927                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4928                         raw_encap = actions->conf;
4929                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4930                                 action_cur = actions_pre++;
4931                         break;
4932                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4933                         raw_decap = actions->conf;
4934                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4935                                 action_cur = actions_pre++;
4936                         break;
4937                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4938                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4939                         if (vlan_item_dst && vlan_item_src) {
4940                                 memcpy(vlan_item_dst, vlan_item_src,
4941                                         sizeof(*vlan_item_dst));
4942                                 /*
4943                                  * Convert to internal match item, it is used
4944                                  * for vlan push and set vid.
4945                                  */
4946                                 vlan_item_dst->type = (enum rte_flow_item_type)
4947                                                 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4948                         }
4949                         break;
4950                 default:
4951                         break;
4952                 }
4953                 if (!action_cur)
4954                         action_cur = (fm->def_policy) ?
4955                                         actions_sfx++ : actions_pre++;
4956                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
4957         }
4958         /* Add end action to the actions. */
4959         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4960         if (priv->sh->meter_aso_en) {
4961                 /**
4962                  * For ASO meter, need to add an extra jump action explicitly,
4963                  * to jump from meter to policer table.
4964                  */
4965                 struct mlx5_flow_meter_sub_policy *sub_policy;
4966                 struct mlx5_flow_tbl_data_entry *tbl_data;
4967
4968                 if (!fm->def_policy) {
4969                         sub_policy = get_meter_sub_policy(dev, flow, wks,
4970                                                           attr, items, error);
4971                         if (!sub_policy)
4972                                 return -rte_errno;
4973                 } else {
4974                         enum mlx5_meter_domain mtr_domain =
4975                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4976                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4977                                                 MLX5_MTR_DOMAIN_INGRESS);
4978
4979                         sub_policy =
4980                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
4981                 }
4982                 tbl_data = container_of(sub_policy->tbl_rsc,
4983                                         struct mlx5_flow_tbl_data_entry, tbl);
4984                 hw_mtr_action = actions_pre++;
4985                 hw_mtr_action->type = (enum rte_flow_action_type)
4986                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
4987                 hw_mtr_action->conf = tbl_data->jump.action;
4988         }
4989         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4990         actions_pre++;
4991         if (!tag_action)
4992                 return rte_flow_error_set(error, ENOMEM,
4993                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4994                                           NULL, "No tag action space.");
4995         if (!mtr_flow_id) {
4996                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
4997                 goto exit;
4998         }
4999         /* Only default-policy Meter creates mtr flow id. */
5000         if (fm->def_policy) {
5001                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
5002                 if (!tag_id)
5003                         return rte_flow_error_set(error, ENOMEM,
5004                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5005                                         "Failed to allocate meter flow id.");
5006                 flow_id = tag_id - 1;
5007                 flow_id_bits = (!flow_id) ? 1 :
5008                                 (MLX5_REG_BITS - __builtin_clz(flow_id));
5009                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
5010                     mtr_reg_bits) {
5011                         mlx5_ipool_free(fm->flow_ipool, tag_id);
5012                         return rte_flow_error_set(error, EINVAL,
5013                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5014                                         "Meter flow id exceeds max limit.");
5015                 }
5016                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5017                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5018         }
5019         /* Build tag actions and items for meter_id/meter flow_id. */
5020         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5021         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5022         tag_item_mask = tag_item_spec + 1;
5023         /* Both flow_id and meter_id share the same register. */
5024         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5025                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5026                                                             0, error),
5027                 .offset = mtr_id_offset,
5028                 .length = mtr_reg_bits,
5029                 .data = flow->meter,
5030         };
5031         /*
5032          * The color Reg bits used by flow_id are growing from
5033          * msb to lsb, so must do bit reverse for flow_id val in RegC.
5034          */
5035         for (shift = 0; shift < flow_id_bits; shift++)
5036                 flow_id_reversed = (flow_id_reversed << 1) |
5037                                 ((flow_id >> shift) & 0x1);
5038         set_tag->data |=
5039                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5040         tag_item_spec->id = set_tag->id;
5041         tag_item_spec->data = set_tag->data << mtr_id_offset;
5042         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5043         tag_action->type = (enum rte_flow_action_type)
5044                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5045         tag_action->conf = set_tag;
5046         tag_item->type = (enum rte_flow_item_type)
5047                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5048         tag_item->spec = tag_item_spec;
5049         tag_item->last = NULL;
5050         tag_item->mask = tag_item_mask;
5051 exit:
5052         if (mtr_flow_id)
5053                 *mtr_flow_id = tag_id;
5054         return 0;
5055 }
5056
5057 /**
5058  * Split action list having QUEUE/RSS for metadata register copy.
5059  *
5060  * Once Q/RSS action is detected in user's action list, the flow action
5061  * should be split in order to copy metadata registers, which will happen in
5062  * RX_CP_TBL like,
5063  *   - CQE->flow_tag := reg_c[1] (MARK)
5064  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5065  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5066  * This is because the last action of each flow must be a terminal action
5067  * (QUEUE, RSS or DROP).
5068  *
5069  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5070  * stored and kept in the mlx5_flow structure per each sub_flow.
5071  *
5072  * The Q/RSS action is replaced with,
5073  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
5074  * And the following JUMP action is added at the end,
5075  *   - JUMP, to RX_CP_TBL.
5076  *
5077  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5078  * flow_create_split_metadata() routine. The flow will look like,
5079  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
5080  *
5081  * @param dev
5082  *   Pointer to Ethernet device.
5083  * @param[out] split_actions
5084  *   Pointer to store split actions to jump to CP_TBL.
5085  * @param[in] actions
5086  *   Pointer to the list of original flow actions.
5087  * @param[in] qrss
5088  *   Pointer to the Q/RSS action.
5089  * @param[in] actions_n
5090  *   Number of original actions.
5091  * @param[out] error
5092  *   Perform verbose error reporting if not NULL.
5093  *
5094  * @return
5095  *   non-zero unique flow_id on success, otherwise 0 and
5096  *   error/rte_error are set.
5097  */
5098 static uint32_t
5099 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5100                           struct rte_flow_action *split_actions,
5101                           const struct rte_flow_action *actions,
5102                           const struct rte_flow_action *qrss,
5103                           int actions_n, struct rte_flow_error *error)
5104 {
5105         struct mlx5_priv *priv = dev->data->dev_private;
5106         struct mlx5_rte_flow_action_set_tag *set_tag;
5107         struct rte_flow_action_jump *jump;
5108         const int qrss_idx = qrss - actions;
5109         uint32_t flow_id = 0;
5110         int ret = 0;
5111
5112         /*
5113          * Given actions will be split
5114          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5115          * - Add jump to mreg CP_TBL.
5116          * As a result, there will be one more action.
5117          */
5118         ++actions_n;
5119         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5120         set_tag = (void *)(split_actions + actions_n);
5121         /*
5122          * If tag action is not set to void(it means we are not the meter
5123          * suffix flow), add the tag action. Since meter suffix flow already
5124          * has the tag added.
5125          */
5126         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
5127                 /*
5128                  * Allocate the new subflow ID. This one is unique within
5129                  * device and not shared with representors. Otherwise,
5130                  * we would have to resolve multi-thread access synch
5131                  * issue. Each flow on the shared device is appended
5132                  * with source vport identifier, so the resulting
5133                  * flows will be unique in the shared (by master and
5134                  * representors) domain even if they have coinciding
5135                  * IDs.
5136                  */
5137                 mlx5_ipool_malloc(priv->sh->ipool
5138                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5139                 if (!flow_id)
5140                         return rte_flow_error_set(error, ENOMEM,
5141                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5142                                                   NULL, "can't allocate id "
5143                                                   "for split Q/RSS subflow");
5144                 /* Internal SET_TAG action to set flow ID. */
5145                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5146                         .data = flow_id,
5147                 };
5148                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5149                 if (ret < 0)
5150                         return ret;
5151                 set_tag->id = ret;
5152                 /* Construct new actions array. */
5153                 /* Replace QUEUE/RSS action. */
5154                 split_actions[qrss_idx] = (struct rte_flow_action){
5155                         .type = (enum rte_flow_action_type)
5156                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5157                         .conf = set_tag,
5158                 };
5159         }
5160         /* JUMP action to jump to mreg copy table (CP_TBL). */
5161         jump = (void *)(set_tag + 1);
5162         *jump = (struct rte_flow_action_jump){
5163                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5164         };
5165         split_actions[actions_n - 2] = (struct rte_flow_action){
5166                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5167                 .conf = jump,
5168         };
5169         split_actions[actions_n - 1] = (struct rte_flow_action){
5170                 .type = RTE_FLOW_ACTION_TYPE_END,
5171         };
5172         return flow_id;
5173 }
5174
5175 /**
5176  * Extend the given action list for Tx metadata copy.
5177  *
5178  * Copy the given action list to the ext_actions and add flow metadata register
5179  * copy action in order to copy reg_a set by WQE to reg_c[0].
5180  *
5181  * @param[out] ext_actions
5182  *   Pointer to the extended action list.
5183  * @param[in] actions
5184  *   Pointer to the list of actions.
5185  * @param[in] actions_n
5186  *   Number of actions in the list.
5187  * @param[out] error
5188  *   Perform verbose error reporting if not NULL.
5189  * @param[in] encap_idx
5190  *   The encap action inndex.
5191  *
5192  * @return
5193  *   0 on success, negative value otherwise
5194  */
5195 static int
5196 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5197                        struct rte_flow_action *ext_actions,
5198                        const struct rte_flow_action *actions,
5199                        int actions_n, struct rte_flow_error *error,
5200                        int encap_idx)
5201 {
5202         struct mlx5_flow_action_copy_mreg *cp_mreg =
5203                 (struct mlx5_flow_action_copy_mreg *)
5204                         (ext_actions + actions_n + 1);
5205         int ret;
5206
5207         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5208         if (ret < 0)
5209                 return ret;
5210         cp_mreg->dst = ret;
5211         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5212         if (ret < 0)
5213                 return ret;
5214         cp_mreg->src = ret;
5215         if (encap_idx != 0)
5216                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5217         if (encap_idx == actions_n - 1) {
5218                 ext_actions[actions_n - 1] = (struct rte_flow_action){
5219                         .type = (enum rte_flow_action_type)
5220                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5221                         .conf = cp_mreg,
5222                 };
5223                 ext_actions[actions_n] = (struct rte_flow_action){
5224                         .type = RTE_FLOW_ACTION_TYPE_END,
5225                 };
5226         } else {
5227                 ext_actions[encap_idx] = (struct rte_flow_action){
5228                         .type = (enum rte_flow_action_type)
5229                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5230                         .conf = cp_mreg,
5231                 };
5232                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5233                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5234         }
5235         return 0;
5236 }
5237
5238 /**
5239  * Check the match action from the action list.
5240  *
5241  * @param[in] actions
5242  *   Pointer to the list of actions.
5243  * @param[in] attr
5244  *   Flow rule attributes.
5245  * @param[in] action
5246  *   The action to be check if exist.
5247  * @param[out] match_action_pos
5248  *   Pointer to the position of the matched action if exists, otherwise is -1.
5249  * @param[out] qrss_action_pos
5250  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5251  * @param[out] modify_after_mirror
5252  *   Pointer to the flag of modify action after FDB mirroring.
5253  *
5254  * @return
5255  *   > 0 the total number of actions.
5256  *   0 if not found match action in action list.
5257  */
5258 static int
5259 flow_check_match_action(const struct rte_flow_action actions[],
5260                         const struct rte_flow_attr *attr,
5261                         enum rte_flow_action_type action,
5262                         int *match_action_pos, int *qrss_action_pos,
5263                         int *modify_after_mirror)
5264 {
5265         const struct rte_flow_action_sample *sample;
5266         const struct rte_flow_action_raw_decap *decap;
5267         int actions_n = 0;
5268         uint32_t ratio = 0;
5269         int sub_type = 0;
5270         int flag = 0;
5271         int fdb_mirror = 0;
5272
5273         *match_action_pos = -1;
5274         *qrss_action_pos = -1;
5275         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5276                 if (actions->type == action) {
5277                         flag = 1;
5278                         *match_action_pos = actions_n;
5279                 }
5280                 switch (actions->type) {
5281                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5282                 case RTE_FLOW_ACTION_TYPE_RSS:
5283                         *qrss_action_pos = actions_n;
5284                         break;
5285                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5286                         sample = actions->conf;
5287                         ratio = sample->ratio;
5288                         sub_type = ((const struct rte_flow_action *)
5289                                         (sample->actions))->type;
5290                         if (ratio == 1 && attr->transfer)
5291                                 fdb_mirror = 1;
5292                         break;
5293                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5294                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5295                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5296                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5297                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5298                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5299                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5300                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5301                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5302                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5303                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5304                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5305                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5306                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5307                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5308                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5309                 case RTE_FLOW_ACTION_TYPE_FLAG:
5310                 case RTE_FLOW_ACTION_TYPE_MARK:
5311                 case RTE_FLOW_ACTION_TYPE_SET_META:
5312                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5313                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5314                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5315                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5316                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5317                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5318                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5319                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5320                 case RTE_FLOW_ACTION_TYPE_METER:
5321                         if (fdb_mirror)
5322                                 *modify_after_mirror = 1;
5323                         break;
5324                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5325                         decap = actions->conf;
5326                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5327                                 ;
5328                         actions_n++;
5329                         if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5330                                 const struct rte_flow_action_raw_encap *encap =
5331                                                                 actions->conf;
5332                                 if (decap->size <=
5333                                         MLX5_ENCAPSULATION_DECISION_SIZE &&
5334                                     encap->size >
5335                                         MLX5_ENCAPSULATION_DECISION_SIZE)
5336                                         /* L3 encap. */
5337                                         break;
5338                         }
5339                         if (fdb_mirror)
5340                                 *modify_after_mirror = 1;
5341                         break;
5342                 default:
5343                         break;
5344                 }
5345                 actions_n++;
5346         }
5347         if (flag && fdb_mirror && !*modify_after_mirror) {
5348                 /* FDB mirroring uses the destination array to implement
5349                  * instead of FLOW_SAMPLER object.
5350                  */
5351                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5352                         flag = 0;
5353         }
5354         /* Count RTE_FLOW_ACTION_TYPE_END. */
5355         return flag ? actions_n + 1 : 0;
5356 }
5357
5358 #define SAMPLE_SUFFIX_ITEM 2
5359
5360 /**
5361  * Split the sample flow.
5362  *
5363  * As sample flow will split to two sub flow, sample flow with
5364  * sample action, the other actions will move to new suffix flow.
5365  *
5366  * Also add unique tag id with tag action in the sample flow,
5367  * the same tag id will be as match in the suffix flow.
5368  *
5369  * @param dev
5370  *   Pointer to Ethernet device.
5371  * @param[in] add_tag
5372  *   Add extra tag action flag.
5373  * @param[out] sfx_items
5374  *   Suffix flow match items (list terminated by the END pattern item).
5375  * @param[in] actions
5376  *   Associated actions (list terminated by the END action).
5377  * @param[out] actions_sfx
5378  *   Suffix flow actions.
5379  * @param[out] actions_pre
5380  *   Prefix flow actions.
5381  * @param[in] actions_n
5382  *  The total number of actions.
5383  * @param[in] sample_action_pos
5384  *   The sample action position.
5385  * @param[in] qrss_action_pos
5386  *   The Queue/RSS action position.
5387  * @param[in] jump_table
5388  *   Add extra jump action flag.
5389  * @param[out] error
5390  *   Perform verbose error reporting if not NULL.
5391  *
5392  * @return
5393  *   0 on success, or unique flow_id, a negative errno value
5394  *   otherwise and rte_errno is set.
5395  */
5396 static int
5397 flow_sample_split_prep(struct rte_eth_dev *dev,
5398                        int add_tag,
5399                        struct rte_flow_item sfx_items[],
5400                        const struct rte_flow_action actions[],
5401                        struct rte_flow_action actions_sfx[],
5402                        struct rte_flow_action actions_pre[],
5403                        int actions_n,
5404                        int sample_action_pos,
5405                        int qrss_action_pos,
5406                        int jump_table,
5407                        struct rte_flow_error *error)
5408 {
5409         struct mlx5_priv *priv = dev->data->dev_private;
5410         struct mlx5_rte_flow_action_set_tag *set_tag;
5411         struct mlx5_rte_flow_item_tag *tag_spec;
5412         struct mlx5_rte_flow_item_tag *tag_mask;
5413         struct rte_flow_action_jump *jump_action;
5414         uint32_t tag_id = 0;
5415         int index;
5416         int append_index = 0;
5417         int ret;
5418
5419         if (sample_action_pos < 0)
5420                 return rte_flow_error_set(error, EINVAL,
5421                                           RTE_FLOW_ERROR_TYPE_ACTION,
5422                                           NULL, "invalid position of sample "
5423                                           "action in list");
5424         /* Prepare the actions for prefix and suffix flow. */
5425         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5426                 index = qrss_action_pos;
5427                 /* Put the preceding the Queue/RSS action into prefix flow. */
5428                 if (index != 0)
5429                         memcpy(actions_pre, actions,
5430                                sizeof(struct rte_flow_action) * index);
5431                 /* Put others preceding the sample action into prefix flow. */
5432                 if (sample_action_pos > index + 1)
5433                         memcpy(actions_pre + index, actions + index + 1,
5434                                sizeof(struct rte_flow_action) *
5435                                (sample_action_pos - index - 1));
5436                 index = sample_action_pos - 1;
5437                 /* Put Queue/RSS action into Suffix flow. */
5438                 memcpy(actions_sfx, actions + qrss_action_pos,
5439                        sizeof(struct rte_flow_action));
5440                 actions_sfx++;
5441         } else {
5442                 index = sample_action_pos;
5443                 if (index != 0)
5444                         memcpy(actions_pre, actions,
5445                                sizeof(struct rte_flow_action) * index);
5446         }
5447         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5448          * For CX6DX and above, metadata registers Cx preserve their value,
5449          * add an extra tag action for NIC-RX and E-Switch Domain.
5450          */
5451         if (add_tag) {
5452                 /* Prepare the prefix tag action. */
5453                 append_index++;
5454                 set_tag = (void *)(actions_pre + actions_n + append_index);
5455                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
5456                 if (ret < 0)
5457                         return ret;
5458                 mlx5_ipool_malloc(priv->sh->ipool
5459                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5460                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5461                         .id = ret,
5462                         .data = tag_id,
5463                 };
5464                 /* Prepare the suffix subflow items. */
5465                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5466                 tag_spec->data = tag_id;
5467                 tag_spec->id = set_tag->id;
5468                 tag_mask = tag_spec + 1;
5469                 tag_mask->data = UINT32_MAX;
5470                 sfx_items[0] = (struct rte_flow_item){
5471                         .type = (enum rte_flow_item_type)
5472                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5473                         .spec = tag_spec,
5474                         .last = NULL,
5475                         .mask = tag_mask,
5476                 };
5477                 sfx_items[1] = (struct rte_flow_item){
5478                         .type = (enum rte_flow_item_type)
5479                                 RTE_FLOW_ITEM_TYPE_END,
5480                 };
5481                 /* Prepare the tag action in prefix subflow. */
5482                 actions_pre[index++] =
5483                         (struct rte_flow_action){
5484                         .type = (enum rte_flow_action_type)
5485                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5486                         .conf = set_tag,
5487                 };
5488         }
5489         memcpy(actions_pre + index, actions + sample_action_pos,
5490                sizeof(struct rte_flow_action));
5491         index += 1;
5492         /* For the modify action after the sample action in E-Switch mirroring,
5493          * Add the extra jump action in prefix subflow and jump into the next
5494          * table, then do the modify action in the new table.
5495          */
5496         if (jump_table) {
5497                 /* Prepare the prefix jump action. */
5498                 append_index++;
5499                 jump_action = (void *)(actions_pre + actions_n + append_index);
5500                 jump_action->group = jump_table;
5501                 actions_pre[index++] =
5502                         (struct rte_flow_action){
5503                         .type = (enum rte_flow_action_type)
5504                                 RTE_FLOW_ACTION_TYPE_JUMP,
5505                         .conf = jump_action,
5506                 };
5507         }
5508         actions_pre[index] = (struct rte_flow_action){
5509                 .type = (enum rte_flow_action_type)
5510                         RTE_FLOW_ACTION_TYPE_END,
5511         };
5512         /* Put the actions after sample into Suffix flow. */
5513         memcpy(actions_sfx, actions + sample_action_pos + 1,
5514                sizeof(struct rte_flow_action) *
5515                (actions_n - sample_action_pos - 1));
5516         return tag_id;
5517 }
5518
5519 /**
5520  * The splitting for metadata feature.
5521  *
5522  * - Q/RSS action on NIC Rx should be split in order to pass by
5523  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5524  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5525  *
5526  * - All the actions on NIC Tx should have a mreg copy action to
5527  *   copy reg_a from WQE to reg_c[0].
5528  *
5529  * @param dev
5530  *   Pointer to Ethernet device.
5531  * @param[in] flow
5532  *   Parent flow structure pointer.
5533  * @param[in] attr
5534  *   Flow rule attributes.
5535  * @param[in] items
5536  *   Pattern specification (list terminated by the END pattern item).
5537  * @param[in] actions
5538  *   Associated actions (list terminated by the END action).
5539  * @param[in] flow_split_info
5540  *   Pointer to flow split info structure.
5541  * @param[out] error
5542  *   Perform verbose error reporting if not NULL.
5543  * @return
5544  *   0 on success, negative value otherwise
5545  */
5546 static int
5547 flow_create_split_metadata(struct rte_eth_dev *dev,
5548                            struct rte_flow *flow,
5549                            const struct rte_flow_attr *attr,
5550                            const struct rte_flow_item items[],
5551                            const struct rte_flow_action actions[],
5552                            struct mlx5_flow_split_info *flow_split_info,
5553                            struct rte_flow_error *error)
5554 {
5555         struct mlx5_priv *priv = dev->data->dev_private;
5556         struct mlx5_dev_config *config = &priv->config;
5557         const struct rte_flow_action *qrss = NULL;
5558         struct rte_flow_action *ext_actions = NULL;
5559         struct mlx5_flow *dev_flow = NULL;
5560         uint32_t qrss_id = 0;
5561         int mtr_sfx = 0;
5562         size_t act_size;
5563         int actions_n;
5564         int encap_idx;
5565         int ret;
5566
5567         /* Check whether extensive metadata feature is engaged. */
5568         if (!config->dv_flow_en ||
5569             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5570             !mlx5_flow_ext_mreg_supported(dev))
5571                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5572                                                actions, flow_split_info, error);
5573         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5574                                                            &encap_idx);
5575         if (qrss) {
5576                 /* Exclude hairpin flows from splitting. */
5577                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5578                         const struct rte_flow_action_queue *queue;
5579
5580                         queue = qrss->conf;
5581                         if (mlx5_rxq_get_type(dev, queue->index) ==
5582                             MLX5_RXQ_TYPE_HAIRPIN)
5583                                 qrss = NULL;
5584                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5585                         const struct rte_flow_action_rss *rss;
5586
5587                         rss = qrss->conf;
5588                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5589                             MLX5_RXQ_TYPE_HAIRPIN)
5590                                 qrss = NULL;
5591                 }
5592         }
5593         if (qrss) {
5594                 /* Check if it is in meter suffix table. */
5595                 mtr_sfx = attr->group == (attr->transfer ?
5596                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5597                           MLX5_FLOW_TABLE_LEVEL_METER);
5598                 /*
5599                  * Q/RSS action on NIC Rx should be split in order to pass by
5600                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5601                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5602                  */
5603                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5604                            sizeof(struct rte_flow_action_set_tag) +
5605                            sizeof(struct rte_flow_action_jump);
5606                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5607                                           SOCKET_ID_ANY);
5608                 if (!ext_actions)
5609                         return rte_flow_error_set(error, ENOMEM,
5610                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5611                                                   NULL, "no memory to split "
5612                                                   "metadata flow");
5613                 /*
5614                  * If we are the suffix flow of meter, tag already exist.
5615                  * Set the tag action to void.
5616                  */
5617                 if (mtr_sfx)
5618                         ext_actions[qrss - actions].type =
5619                                                 RTE_FLOW_ACTION_TYPE_VOID;
5620                 else
5621                         ext_actions[qrss - actions].type =
5622                                                 (enum rte_flow_action_type)
5623                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5624                 /*
5625                  * Create the new actions list with removed Q/RSS action
5626                  * and appended set tag and jump to register copy table
5627                  * (RX_CP_TBL). We should preallocate unique tag ID here
5628                  * in advance, because it is needed for set tag action.
5629                  */
5630                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5631                                                     qrss, actions_n, error);
5632                 if (!mtr_sfx && !qrss_id) {
5633                         ret = -rte_errno;
5634                         goto exit;
5635                 }
5636         } else if (attr->egress && !attr->transfer) {
5637                 /*
5638                  * All the actions on NIC Tx should have a metadata register
5639                  * copy action to copy reg_a from WQE to reg_c[meta]
5640                  */
5641                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5642                            sizeof(struct mlx5_flow_action_copy_mreg);
5643                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5644                                           SOCKET_ID_ANY);
5645                 if (!ext_actions)
5646                         return rte_flow_error_set(error, ENOMEM,
5647                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5648                                                   NULL, "no memory to split "
5649                                                   "metadata flow");
5650                 /* Create the action list appended with copy register. */
5651                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5652                                              actions_n, error, encap_idx);
5653                 if (ret < 0)
5654                         goto exit;
5655         }
5656         /* Add the unmodified original or prefix subflow. */
5657         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5658                                       items, ext_actions ? ext_actions :
5659                                       actions, flow_split_info, error);
5660         if (ret < 0)
5661                 goto exit;
5662         MLX5_ASSERT(dev_flow);
5663         if (qrss) {
5664                 const struct rte_flow_attr q_attr = {
5665                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5666                         .ingress = 1,
5667                 };
5668                 /* Internal PMD action to set register. */
5669                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5670                         .data = qrss_id,
5671                         .id = REG_NON,
5672                 };
5673                 struct rte_flow_item q_items[] = {
5674                         {
5675                                 .type = (enum rte_flow_item_type)
5676                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5677                                 .spec = &q_tag_spec,
5678                                 .last = NULL,
5679                                 .mask = NULL,
5680                         },
5681                         {
5682                                 .type = RTE_FLOW_ITEM_TYPE_END,
5683                         },
5684                 };
5685                 struct rte_flow_action q_actions[] = {
5686                         {
5687                                 .type = qrss->type,
5688                                 .conf = qrss->conf,
5689                         },
5690                         {
5691                                 .type = RTE_FLOW_ACTION_TYPE_END,
5692                         },
5693                 };
5694                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5695
5696                 /*
5697                  * Configure the tag item only if there is no meter subflow.
5698                  * Since tag is already marked in the meter suffix subflow
5699                  * we can just use the meter suffix items as is.
5700                  */
5701                 if (qrss_id) {
5702                         /* Not meter subflow. */
5703                         MLX5_ASSERT(!mtr_sfx);
5704                         /*
5705                          * Put unique id in prefix flow due to it is destroyed
5706                          * after suffix flow and id will be freed after there
5707                          * is no actual flows with this id and identifier
5708                          * reallocation becomes possible (for example, for
5709                          * other flows in other threads).
5710                          */
5711                         dev_flow->handle->split_flow_id = qrss_id;
5712                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5713                                                    error);
5714                         if (ret < 0)
5715                                 goto exit;
5716                         q_tag_spec.id = ret;
5717                 }
5718                 dev_flow = NULL;
5719                 /* Add suffix subflow to execute Q/RSS. */
5720                 flow_split_info->prefix_layers = layers;
5721                 flow_split_info->prefix_mark = 0;
5722                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5723                                               &q_attr, mtr_sfx ? items :
5724                                               q_items, q_actions,
5725                                               flow_split_info, error);
5726                 if (ret < 0)
5727                         goto exit;
5728                 /* qrss ID should be freed if failed. */
5729                 qrss_id = 0;
5730                 MLX5_ASSERT(dev_flow);
5731         }
5732
5733 exit:
5734         /*
5735          * We do not destroy the partially created sub_flows in case of error.
5736          * These ones are included into parent flow list and will be destroyed
5737          * by flow_drv_destroy.
5738          */
5739         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5740                         qrss_id);
5741         mlx5_free(ext_actions);
5742         return ret;
5743 }
5744
5745 /**
5746  * Create meter internal drop flow with the original pattern.
5747  *
5748  * @param dev
5749  *   Pointer to Ethernet device.
5750  * @param[in] flow
5751  *   Parent flow structure pointer.
5752  * @param[in] attr
5753  *   Flow rule attributes.
5754  * @param[in] items
5755  *   Pattern specification (list terminated by the END pattern item).
5756  * @param[in] flow_split_info
5757  *   Pointer to flow split info structure.
5758  * @param[in] fm
5759  *   Pointer to flow meter structure.
5760  * @param[out] error
5761  *   Perform verbose error reporting if not NULL.
5762  * @return
5763  *   0 on success, negative value otherwise
5764  */
5765 static uint32_t
5766 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5767                         struct rte_flow *flow,
5768                         const struct rte_flow_attr *attr,
5769                         const struct rte_flow_item items[],
5770                         struct mlx5_flow_split_info *flow_split_info,
5771                         struct mlx5_flow_meter_info *fm,
5772                         struct rte_flow_error *error)
5773 {
5774         struct mlx5_flow *dev_flow = NULL;
5775         struct rte_flow_attr drop_attr = *attr;
5776         struct rte_flow_action drop_actions[3];
5777         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5778
5779         MLX5_ASSERT(fm->drop_cnt);
5780         drop_actions[0].type =
5781                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5782         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5783         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5784         drop_actions[1].conf = NULL;
5785         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5786         drop_actions[2].conf = NULL;
5787         drop_split_info.external = false;
5788         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5789         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5790         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5791         return flow_create_split_inner(dev, flow, &dev_flow,
5792                                 &drop_attr, items, drop_actions,
5793                                 &drop_split_info, error);
5794 }
5795
5796 /**
5797  * The splitting for meter feature.
5798  *
5799  * - The meter flow will be split to two flows as prefix and
5800  *   suffix flow. The packets make sense only it pass the prefix
5801  *   meter action.
5802  *
5803  * - Reg_C_5 is used for the packet to match betweend prefix and
5804  *   suffix flow.
5805  *
5806  * @param dev
5807  *   Pointer to Ethernet device.
5808  * @param[in] flow
5809  *   Parent flow structure pointer.
5810  * @param[in] attr
5811  *   Flow rule attributes.
5812  * @param[in] items
5813  *   Pattern specification (list terminated by the END pattern item).
5814  * @param[in] actions
5815  *   Associated actions (list terminated by the END action).
5816  * @param[in] flow_split_info
5817  *   Pointer to flow split info structure.
5818  * @param[out] error
5819  *   Perform verbose error reporting if not NULL.
5820  * @return
5821  *   0 on success, negative value otherwise
5822  */
5823 static int
5824 flow_create_split_meter(struct rte_eth_dev *dev,
5825                         struct rte_flow *flow,
5826                         const struct rte_flow_attr *attr,
5827                         const struct rte_flow_item items[],
5828                         const struct rte_flow_action actions[],
5829                         struct mlx5_flow_split_info *flow_split_info,
5830                         struct rte_flow_error *error)
5831 {
5832         struct mlx5_priv *priv = dev->data->dev_private;
5833         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5834         struct rte_flow_action *sfx_actions = NULL;
5835         struct rte_flow_action *pre_actions = NULL;
5836         struct rte_flow_item *sfx_items = NULL;
5837         struct mlx5_flow *dev_flow = NULL;
5838         struct rte_flow_attr sfx_attr = *attr;
5839         struct mlx5_flow_meter_info *fm = NULL;
5840         uint8_t skip_scale_restore;
5841         bool has_mtr = false;
5842         bool has_modify = false;
5843         bool set_mtr_reg = true;
5844         bool is_mtr_hierarchy = false;
5845         uint32_t meter_id = 0;
5846         uint32_t mtr_idx = 0;
5847         uint32_t mtr_flow_id = 0;
5848         size_t act_size;
5849         size_t item_size;
5850         int actions_n = 0;
5851         int ret = 0;
5852
5853         if (priv->mtr_en)
5854                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
5855                                                     &has_modify, &meter_id);
5856         if (has_mtr) {
5857                 if (flow->meter) {
5858                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
5859                         if (!fm)
5860                                 return rte_flow_error_set(error, EINVAL,
5861                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5862                                                 NULL, "Meter not found.");
5863                 } else {
5864                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
5865                         if (!fm)
5866                                 return rte_flow_error_set(error, EINVAL,
5867                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5868                                                 NULL, "Meter not found.");
5869                         ret = mlx5_flow_meter_attach(priv, fm,
5870                                                      &sfx_attr, error);
5871                         if (ret)
5872                                 return -rte_errno;
5873                         flow->meter = mtr_idx;
5874                 }
5875                 MLX5_ASSERT(wks);
5876                 wks->fm = fm;
5877                 if (!fm->def_policy) {
5878                         wks->policy = mlx5_flow_meter_policy_find(dev,
5879                                                                   fm->policy_id,
5880                                                                   NULL);
5881                         MLX5_ASSERT(wks->policy);
5882                         if (wks->policy->is_hierarchy) {
5883                                 wks->final_policy =
5884                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
5885                                                                 wks->policy);
5886                                 if (!wks->final_policy)
5887                                         return rte_flow_error_set(error,
5888                                         EINVAL,
5889                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5890                                 "Failed to find terminal policy of hierarchy.");
5891                                 is_mtr_hierarchy = true;
5892                         }
5893                 }
5894                 /*
5895                  * If it isn't default-policy Meter, and
5896                  * 1. There's no action in flow to change
5897                  *    packet (modify/encap/decap etc.), OR
5898                  * 2. No drop count needed for this meter.
5899                  * 3. It's not meter hierarchy.
5900                  * Then no need to use regC to save meter id anymore.
5901                  */
5902                 if (!fm->def_policy && !is_mtr_hierarchy &&
5903                     (!has_modify || !fm->drop_cnt))
5904                         set_mtr_reg = false;
5905                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
5906                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
5907                            sizeof(struct mlx5_rte_flow_action_set_tag);
5908                 /* Suffix items: tag, vlan, port id, end. */
5909 #define METER_SUFFIX_ITEM 4
5910                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5911                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5912                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5913                                           0, SOCKET_ID_ANY);
5914                 if (!sfx_actions)
5915                         return rte_flow_error_set(error, ENOMEM,
5916                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5917                                                   NULL, "no memory to split "
5918                                                   "meter flow");
5919                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5920                              act_size);
5921                 /* There's no suffix flow for meter of non-default policy. */
5922                 if (!fm->def_policy)
5923                         pre_actions = sfx_actions + 1;
5924                 else
5925                         pre_actions = sfx_actions + actions_n;
5926                 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
5927                                             items, sfx_items, actions,
5928                                             sfx_actions, pre_actions,
5929                                             (set_mtr_reg ? &mtr_flow_id : NULL),
5930                                             error);
5931                 if (ret) {
5932                         ret = -rte_errno;
5933                         goto exit;
5934                 }
5935                 /* Add the prefix subflow. */
5936                 flow_split_info->prefix_mark = 0;
5937                 skip_scale_restore = flow_split_info->skip_scale;
5938                 flow_split_info->skip_scale |=
5939                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5940                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5941                                               attr, items, pre_actions,
5942                                               flow_split_info, error);
5943                 flow_split_info->skip_scale = skip_scale_restore;
5944                 if (ret) {
5945                         if (mtr_flow_id)
5946                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
5947                         ret = -rte_errno;
5948                         goto exit;
5949                 }
5950                 if (mtr_flow_id) {
5951                         dev_flow->handle->split_flow_id = mtr_flow_id;
5952                         dev_flow->handle->is_meter_flow_id = 1;
5953                 }
5954                 if (!fm->def_policy) {
5955                         if (!set_mtr_reg && fm->drop_cnt)
5956                                 ret =
5957                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
5958                                                         &sfx_attr, items,
5959                                                         flow_split_info,
5960                                                         fm, error);
5961                         goto exit;
5962                 }
5963                 /* Setting the sfx group atrr. */
5964                 sfx_attr.group = sfx_attr.transfer ?
5965                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5966                                  MLX5_FLOW_TABLE_LEVEL_METER;
5967                 flow_split_info->prefix_layers =
5968                                 flow_get_prefix_layer_flags(dev_flow);
5969                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5970                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
5971         }
5972         /* Add the prefix subflow. */
5973         ret = flow_create_split_metadata(dev, flow,
5974                                          &sfx_attr, sfx_items ?
5975                                          sfx_items : items,
5976                                          sfx_actions ? sfx_actions : actions,
5977                                          flow_split_info, error);
5978 exit:
5979         if (sfx_actions)
5980                 mlx5_free(sfx_actions);
5981         return ret;
5982 }
5983
5984 /**
5985  * The splitting for sample feature.
5986  *
5987  * Once Sample action is detected in the action list, the flow actions should
5988  * be split into prefix sub flow and suffix sub flow.
5989  *
5990  * The original items remain in the prefix sub flow, all actions preceding the
5991  * sample action and the sample action itself will be copied to the prefix
5992  * sub flow, the actions following the sample action will be copied to the
5993  * suffix sub flow, Queue action always be located in the suffix sub flow.
5994  *
5995  * In order to make the packet from prefix sub flow matches with suffix sub
5996  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5997  * flow uses tag item with the unique flow id.
5998  *
5999  * @param dev
6000  *   Pointer to Ethernet device.
6001  * @param[in] flow
6002  *   Parent flow structure pointer.
6003  * @param[in] attr
6004  *   Flow rule attributes.
6005  * @param[in] items
6006  *   Pattern specification (list terminated by the END pattern item).
6007  * @param[in] actions
6008  *   Associated actions (list terminated by the END action).
6009  * @param[in] flow_split_info
6010  *   Pointer to flow split info structure.
6011  * @param[out] error
6012  *   Perform verbose error reporting if not NULL.
6013  * @return
6014  *   0 on success, negative value otherwise
6015  */
6016 static int
6017 flow_create_split_sample(struct rte_eth_dev *dev,
6018                          struct rte_flow *flow,
6019                          const struct rte_flow_attr *attr,
6020                          const struct rte_flow_item items[],
6021                          const struct rte_flow_action actions[],
6022                          struct mlx5_flow_split_info *flow_split_info,
6023                          struct rte_flow_error *error)
6024 {
6025         struct mlx5_priv *priv = dev->data->dev_private;
6026         struct rte_flow_action *sfx_actions = NULL;
6027         struct rte_flow_action *pre_actions = NULL;
6028         struct rte_flow_item *sfx_items = NULL;
6029         struct mlx5_flow *dev_flow = NULL;
6030         struct rte_flow_attr sfx_attr = *attr;
6031 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6032         struct mlx5_flow_dv_sample_resource *sample_res;
6033         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
6034         struct mlx5_flow_tbl_resource *sfx_tbl;
6035 #endif
6036         size_t act_size;
6037         size_t item_size;
6038         uint32_t fdb_tx = 0;
6039         int32_t tag_id = 0;
6040         int actions_n = 0;
6041         int sample_action_pos;
6042         int qrss_action_pos;
6043         int add_tag = 0;
6044         int modify_after_mirror = 0;
6045         uint16_t jump_table = 0;
6046         const uint32_t next_ft_step = 1;
6047         int ret = 0;
6048
6049         if (priv->sampler_en)
6050                 actions_n = flow_check_match_action(actions, attr,
6051                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
6052                                         &sample_action_pos, &qrss_action_pos,
6053                                         &modify_after_mirror);
6054         if (actions_n) {
6055                 /* The prefix actions must includes sample, tag, end. */
6056                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6057                            + sizeof(struct mlx5_rte_flow_action_set_tag);
6058                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6059                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6060                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6061                                           item_size), 0, SOCKET_ID_ANY);
6062                 if (!sfx_actions)
6063                         return rte_flow_error_set(error, ENOMEM,
6064                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6065                                                   NULL, "no memory to split "
6066                                                   "sample flow");
6067                 /* The representor_id is UINT16_MAX for uplink. */
6068                 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6069                 /*
6070                  * When reg_c_preserve is set, metadata registers Cx preserve
6071                  * their value even through packet duplication.
6072                  */
6073                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
6074                 if (add_tag)
6075                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6076                                         + act_size);
6077                 if (modify_after_mirror)
6078                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6079                                      next_ft_step;
6080                 pre_actions = sfx_actions + actions_n;
6081                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6082                                                 actions, sfx_actions,
6083                                                 pre_actions, actions_n,
6084                                                 sample_action_pos,
6085                                                 qrss_action_pos, jump_table,
6086                                                 error);
6087                 if (tag_id < 0 || (add_tag && !tag_id)) {
6088                         ret = -rte_errno;
6089                         goto exit;
6090                 }
6091                 if (modify_after_mirror)
6092                         flow_split_info->skip_scale =
6093                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6094                 /* Add the prefix subflow. */
6095                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6096                                               items, pre_actions,
6097                                               flow_split_info, error);
6098                 if (ret) {
6099                         ret = -rte_errno;
6100                         goto exit;
6101                 }
6102                 dev_flow->handle->split_flow_id = tag_id;
6103 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6104                 if (!modify_after_mirror) {
6105                         /* Set the sfx group attr. */
6106                         sample_res = (struct mlx5_flow_dv_sample_resource *)
6107                                                 dev_flow->dv.sample_res;
6108                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
6109                                                 sample_res->normal_path_tbl;
6110                         sfx_tbl_data = container_of(sfx_tbl,
6111                                                 struct mlx5_flow_tbl_data_entry,
6112                                                 tbl);
6113                         sfx_attr.group = sfx_attr.transfer ?
6114                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6115                 } else {
6116                         MLX5_ASSERT(attr->transfer);
6117                         sfx_attr.group = jump_table;
6118                 }
6119                 flow_split_info->prefix_layers =
6120                                 flow_get_prefix_layer_flags(dev_flow);
6121                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6122                 /* Suffix group level already be scaled with factor, set
6123                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6124                  * again in translation.
6125                  */
6126                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6127 #endif
6128         }
6129         /* Add the suffix subflow. */
6130         ret = flow_create_split_meter(dev, flow, &sfx_attr,
6131                                       sfx_items ? sfx_items : items,
6132                                       sfx_actions ? sfx_actions : actions,
6133                                       flow_split_info, error);
6134 exit:
6135         if (sfx_actions)
6136                 mlx5_free(sfx_actions);
6137         return ret;
6138 }
6139
6140 /**
6141  * Split the flow to subflow set. The splitters might be linked
6142  * in the chain, like this:
6143  * flow_create_split_outer() calls:
6144  *   flow_create_split_meter() calls:
6145  *     flow_create_split_metadata(meter_subflow_0) calls:
6146  *       flow_create_split_inner(metadata_subflow_0)
6147  *       flow_create_split_inner(metadata_subflow_1)
6148  *       flow_create_split_inner(metadata_subflow_2)
6149  *     flow_create_split_metadata(meter_subflow_1) calls:
6150  *       flow_create_split_inner(metadata_subflow_0)
6151  *       flow_create_split_inner(metadata_subflow_1)
6152  *       flow_create_split_inner(metadata_subflow_2)
6153  *
6154  * This provide flexible way to add new levels of flow splitting.
6155  * The all of successfully created subflows are included to the
6156  * parent flow dev_flow list.
6157  *
6158  * @param dev
6159  *   Pointer to Ethernet device.
6160  * @param[in] flow
6161  *   Parent flow structure pointer.
6162  * @param[in] attr
6163  *   Flow rule attributes.
6164  * @param[in] items
6165  *   Pattern specification (list terminated by the END pattern item).
6166  * @param[in] actions
6167  *   Associated actions (list terminated by the END action).
6168  * @param[in] flow_split_info
6169  *   Pointer to flow split info structure.
6170  * @param[out] error
6171  *   Perform verbose error reporting if not NULL.
6172  * @return
6173  *   0 on success, negative value otherwise
6174  */
6175 static int
6176 flow_create_split_outer(struct rte_eth_dev *dev,
6177                         struct rte_flow *flow,
6178                         const struct rte_flow_attr *attr,
6179                         const struct rte_flow_item items[],
6180                         const struct rte_flow_action actions[],
6181                         struct mlx5_flow_split_info *flow_split_info,
6182                         struct rte_flow_error *error)
6183 {
6184         int ret;
6185
6186         ret = flow_create_split_sample(dev, flow, attr, items,
6187                                        actions, flow_split_info, error);
6188         MLX5_ASSERT(ret <= 0);
6189         return ret;
6190 }
6191
6192 static inline struct mlx5_flow_tunnel *
6193 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6194 {
6195         struct mlx5_flow_tunnel *tunnel;
6196
6197 #pragma GCC diagnostic push
6198 #pragma GCC diagnostic ignored "-Wcast-qual"
6199         tunnel = (typeof(tunnel))flow->tunnel;
6200 #pragma GCC diagnostic pop
6201
6202         return tunnel;
6203 }
6204
6205 /**
6206  * Adjust flow RSS workspace if needed.
6207  *
6208  * @param wks
6209  *   Pointer to thread flow work space.
6210  * @param rss_desc
6211  *   Pointer to RSS descriptor.
6212  * @param[in] nrssq_num
6213  *   New RSS queue number.
6214  *
6215  * @return
6216  *   0 on success, -1 otherwise and rte_errno is set.
6217  */
6218 static int
6219 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6220                           struct mlx5_flow_rss_desc *rss_desc,
6221                           uint32_t nrssq_num)
6222 {
6223         if (likely(nrssq_num <= wks->rssq_num))
6224                 return 0;
6225         rss_desc->queue = realloc(rss_desc->queue,
6226                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6227         if (!rss_desc->queue) {
6228                 rte_errno = ENOMEM;
6229                 return -1;
6230         }
6231         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6232         return 0;
6233 }
6234
6235 /**
6236  * Create a flow and add it to @p list.
6237  *
6238  * @param dev
6239  *   Pointer to Ethernet device.
6240  * @param list
6241  *   Pointer to a TAILQ flow list. If this parameter NULL,
6242  *   no list insertion occurred, flow is just created,
6243  *   this is caller's responsibility to track the
6244  *   created flow.
6245  * @param[in] attr
6246  *   Flow rule attributes.
6247  * @param[in] items
6248  *   Pattern specification (list terminated by the END pattern item).
6249  * @param[in] actions
6250  *   Associated actions (list terminated by the END action).
6251  * @param[in] external
6252  *   This flow rule is created by request external to PMD.
6253  * @param[out] error
6254  *   Perform verbose error reporting if not NULL.
6255  *
6256  * @return
6257  *   A flow index on success, 0 otherwise and rte_errno is set.
6258  */
6259 static uint32_t
6260 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6261                  const struct rte_flow_attr *attr,
6262                  const struct rte_flow_item items[],
6263                  const struct rte_flow_action original_actions[],
6264                  bool external, struct rte_flow_error *error)
6265 {
6266         struct mlx5_priv *priv = dev->data->dev_private;
6267         struct rte_flow *flow = NULL;
6268         struct mlx5_flow *dev_flow;
6269         const struct rte_flow_action_rss *rss = NULL;
6270         struct mlx5_translated_action_handle
6271                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6272         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6273         union {
6274                 struct mlx5_flow_expand_rss buf;
6275                 uint8_t buffer[2048];
6276         } expand_buffer;
6277         union {
6278                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6279                 uint8_t buffer[2048];
6280         } actions_rx;
6281         union {
6282                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6283                 uint8_t buffer[2048];
6284         } actions_hairpin_tx;
6285         union {
6286                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6287                 uint8_t buffer[2048];
6288         } items_tx;
6289         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6290         struct mlx5_flow_rss_desc *rss_desc;
6291         const struct rte_flow_action *p_actions_rx;
6292         uint32_t i;
6293         uint32_t idx = 0;
6294         int hairpin_flow;
6295         struct rte_flow_attr attr_tx = { .priority = 0 };
6296         const struct rte_flow_action *actions;
6297         struct rte_flow_action *translated_actions = NULL;
6298         struct mlx5_flow_tunnel *tunnel;
6299         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6300         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6301         struct mlx5_flow_split_info flow_split_info = {
6302                 .external = !!external,
6303                 .skip_scale = 0,
6304                 .flow_idx = 0,
6305                 .prefix_mark = 0,
6306                 .prefix_layers = 0,
6307                 .table_id = 0
6308         };
6309         int ret;
6310
6311         MLX5_ASSERT(wks);
6312         rss_desc = &wks->rss_desc;
6313         ret = flow_action_handles_translate(dev, original_actions,
6314                                             indir_actions,
6315                                             &indir_actions_n,
6316                                             &translated_actions, error);
6317         if (ret < 0) {
6318                 MLX5_ASSERT(translated_actions == NULL);
6319                 return 0;
6320         }
6321         actions = translated_actions ? translated_actions : original_actions;
6322         p_actions_rx = actions;
6323         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6324         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6325                                 external, hairpin_flow, error);
6326         if (ret < 0)
6327                 goto error_before_hairpin_split;
6328         flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6329         if (!flow) {
6330                 rte_errno = ENOMEM;
6331                 goto error_before_hairpin_split;
6332         }
6333         if (hairpin_flow > 0) {
6334                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6335                         rte_errno = EINVAL;
6336                         goto error_before_hairpin_split;
6337                 }
6338                 flow_hairpin_split(dev, actions, actions_rx.actions,
6339                                    actions_hairpin_tx.actions, items_tx.items,
6340                                    idx);
6341                 p_actions_rx = actions_rx.actions;
6342         }
6343         flow_split_info.flow_idx = idx;
6344         flow->drv_type = flow_get_drv_type(dev, attr);
6345         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6346                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6347         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6348         /* RSS Action only works on NIC RX domain */
6349         if (attr->ingress && !attr->transfer)
6350                 rss = flow_get_rss_action(dev, p_actions_rx);
6351         if (rss) {
6352                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6353                         return 0;
6354                 /*
6355                  * The following information is required by
6356                  * mlx5_flow_hashfields_adjust() in advance.
6357                  */
6358                 rss_desc->level = rss->level;
6359                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
6360                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
6361         }
6362         flow->dev_handles = 0;
6363         if (rss && rss->types) {
6364                 unsigned int graph_root;
6365
6366                 graph_root = find_graph_root(items, rss->level);
6367                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6368                                            items, rss->types,
6369                                            mlx5_support_expansion, graph_root);
6370                 MLX5_ASSERT(ret > 0 &&
6371                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6372                 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6373                         for (i = 0; i < buf->entries; ++i)
6374                                 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6375                 }
6376         } else {
6377                 buf->entries = 1;
6378                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6379         }
6380         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6381                                                       indir_actions_n);
6382         for (i = 0; i < buf->entries; ++i) {
6383                 /* Initialize flow split data. */
6384                 flow_split_info.prefix_layers = 0;
6385                 flow_split_info.prefix_mark = 0;
6386                 flow_split_info.skip_scale = 0;
6387                 /*
6388                  * The splitter may create multiple dev_flows,
6389                  * depending on configuration. In the simplest
6390                  * case it just creates unmodified original flow.
6391                  */
6392                 ret = flow_create_split_outer(dev, flow, attr,
6393                                               buf->entry[i].pattern,
6394                                               p_actions_rx, &flow_split_info,
6395                                               error);
6396                 if (ret < 0)
6397                         goto error;
6398                 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6399                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6400                                                            p_actions_rx,
6401                                                            idx,
6402                                                            wks->flows[0].tunnel,
6403                                                            &default_miss_ctx,
6404                                                            error);
6405                         if (ret < 0) {
6406                                 mlx5_free(default_miss_ctx.queue);
6407                                 goto error;
6408                         }
6409                 }
6410         }
6411         /* Create the tx flow. */
6412         if (hairpin_flow) {
6413                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6414                 attr_tx.ingress = 0;
6415                 attr_tx.egress = 1;
6416                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6417                                          actions_hairpin_tx.actions,
6418                                          idx, error);
6419                 if (!dev_flow)
6420                         goto error;
6421                 dev_flow->flow = flow;
6422                 dev_flow->external = 0;
6423                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6424                               dev_flow->handle, next);
6425                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6426                                          items_tx.items,
6427                                          actions_hairpin_tx.actions, error);
6428                 if (ret < 0)
6429                         goto error;
6430         }
6431         /*
6432          * Update the metadata register copy table. If extensive
6433          * metadata feature is enabled and registers are supported
6434          * we might create the extra rte_flow for each unique
6435          * MARK/FLAG action ID.
6436          *
6437          * The table is updated for ingress Flows only, because
6438          * the egress Flows belong to the different device and
6439          * copy table should be updated in peer NIC Rx domain.
6440          */
6441         if (attr->ingress &&
6442             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6443                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6444                 if (ret)
6445                         goto error;
6446         }
6447         /*
6448          * If the flow is external (from application) OR device is started,
6449          * OR mreg discover, then apply immediately.
6450          */
6451         if (external || dev->data->dev_started ||
6452             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6453              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6454                 ret = flow_drv_apply(dev, flow, error);
6455                 if (ret < 0)
6456                         goto error;
6457         }
6458         flow->type = type;
6459         flow_rxq_flags_set(dev, flow);
6460         rte_free(translated_actions);
6461         tunnel = flow_tunnel_from_rule(wks->flows);
6462         if (tunnel) {
6463                 flow->tunnel = 1;
6464                 flow->tunnel_id = tunnel->tunnel_id;
6465                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6466                 mlx5_free(default_miss_ctx.queue);
6467         }
6468         mlx5_flow_pop_thread_workspace();
6469         return idx;
6470 error:
6471         MLX5_ASSERT(flow);
6472         ret = rte_errno; /* Save rte_errno before cleanup. */
6473         flow_mreg_del_copy_action(dev, flow);
6474         flow_drv_destroy(dev, flow);
6475         if (rss_desc->shared_rss)
6476                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6477                         mlx5_ipool_get
6478                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6479                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6480         mlx5_ipool_free(priv->flows[type], idx);
6481         rte_errno = ret; /* Restore rte_errno. */
6482         ret = rte_errno;
6483         rte_errno = ret;
6484         mlx5_flow_pop_thread_workspace();
6485 error_before_hairpin_split:
6486         rte_free(translated_actions);
6487         return 0;
6488 }
6489
6490 /**
6491  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6492  * incoming packets to table 1.
6493  *
6494  * Other flow rules, requested for group n, will be created in
6495  * e-switch table n+1.
6496  * Jump action to e-switch group n will be created to group n+1.
6497  *
6498  * Used when working in switchdev mode, to utilise advantages of table 1
6499  * and above.
6500  *
6501  * @param dev
6502  *   Pointer to Ethernet device.
6503  *
6504  * @return
6505  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6506  */
6507 struct rte_flow *
6508 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6509 {
6510         const struct rte_flow_attr attr = {
6511                 .group = 0,
6512                 .priority = 0,
6513                 .ingress = 1,
6514                 .egress = 0,
6515                 .transfer = 1,
6516         };
6517         const struct rte_flow_item pattern = {
6518                 .type = RTE_FLOW_ITEM_TYPE_END,
6519         };
6520         struct rte_flow_action_jump jump = {
6521                 .group = 1,
6522         };
6523         const struct rte_flow_action actions[] = {
6524                 {
6525                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6526                         .conf = &jump,
6527                 },
6528                 {
6529                         .type = RTE_FLOW_ACTION_TYPE_END,
6530                 },
6531         };
6532         struct rte_flow_error error;
6533
6534         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6535                                                    &attr, &pattern,
6536                                                    actions, false, &error);
6537 }
6538
6539 /**
6540  * Validate a flow supported by the NIC.
6541  *
6542  * @see rte_flow_validate()
6543  * @see rte_flow_ops
6544  */
6545 int
6546 mlx5_flow_validate(struct rte_eth_dev *dev,
6547                    const struct rte_flow_attr *attr,
6548                    const struct rte_flow_item items[],
6549                    const struct rte_flow_action original_actions[],
6550                    struct rte_flow_error *error)
6551 {
6552         int hairpin_flow;
6553         struct mlx5_translated_action_handle
6554                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6555         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6556         const struct rte_flow_action *actions;
6557         struct rte_flow_action *translated_actions = NULL;
6558         int ret = flow_action_handles_translate(dev, original_actions,
6559                                                 indir_actions,
6560                                                 &indir_actions_n,
6561                                                 &translated_actions, error);
6562
6563         if (ret)
6564                 return ret;
6565         actions = translated_actions ? translated_actions : original_actions;
6566         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6567         ret = flow_drv_validate(dev, attr, items, actions,
6568                                 true, hairpin_flow, error);
6569         rte_free(translated_actions);
6570         return ret;
6571 }
6572
6573 /**
6574  * Create a flow.
6575  *
6576  * @see rte_flow_create()
6577  * @see rte_flow_ops
6578  */
6579 struct rte_flow *
6580 mlx5_flow_create(struct rte_eth_dev *dev,
6581                  const struct rte_flow_attr *attr,
6582                  const struct rte_flow_item items[],
6583                  const struct rte_flow_action actions[],
6584                  struct rte_flow_error *error)
6585 {
6586         /*
6587          * If the device is not started yet, it is not allowed to created a
6588          * flow from application. PMD default flows and traffic control flows
6589          * are not affected.
6590          */
6591         if (unlikely(!dev->data->dev_started)) {
6592                 DRV_LOG(DEBUG, "port %u is not started when "
6593                         "inserting a flow", dev->data->port_id);
6594                 rte_flow_error_set(error, ENODEV,
6595                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6596                                    NULL,
6597                                    "port not started");
6598                 return NULL;
6599         }
6600
6601         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
6602                                                    attr, items, actions,
6603                                                    true, error);
6604 }
6605
6606 /**
6607  * Destroy a flow in a list.
6608  *
6609  * @param dev
6610  *   Pointer to Ethernet device.
6611  * @param[in] flow_idx
6612  *   Index of flow to destroy.
6613  */
6614 static void
6615 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6616                   uint32_t flow_idx)
6617 {
6618         struct mlx5_priv *priv = dev->data->dev_private;
6619         struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
6620
6621         if (!flow)
6622                 return;
6623         MLX5_ASSERT(flow->type == type);
6624         /*
6625          * Update RX queue flags only if port is started, otherwise it is
6626          * already clean.
6627          */
6628         if (dev->data->dev_started)
6629                 flow_rxq_flags_trim(dev, flow);
6630         flow_drv_destroy(dev, flow);
6631         if (flow->tunnel) {
6632                 struct mlx5_flow_tunnel *tunnel;
6633
6634                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6635                 RTE_VERIFY(tunnel);
6636                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6637                         mlx5_flow_tunnel_free(dev, tunnel);
6638         }
6639         flow_mreg_del_copy_action(dev, flow);
6640         mlx5_ipool_free(priv->flows[type], flow_idx);
6641 }
6642
6643 /**
6644  * Destroy all flows.
6645  *
6646  * @param dev
6647  *   Pointer to Ethernet device.
6648  * @param type
6649  *   Flow type to be flushed.
6650  * @param active
6651  *   If flushing is called avtively.
6652  */
6653 void
6654 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6655                      bool active)
6656 {
6657         struct mlx5_priv *priv = dev->data->dev_private;
6658         uint32_t num_flushed = 0, fidx = 1;
6659         struct rte_flow *flow;
6660
6661         MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
6662                 flow_list_destroy(dev, type, fidx);
6663                 num_flushed++;
6664         }
6665         if (active) {
6666                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6667                         dev->data->port_id, num_flushed);
6668         }
6669 }
6670
6671 /**
6672  * Stop all default actions for flows.
6673  *
6674  * @param dev
6675  *   Pointer to Ethernet device.
6676  */
6677 void
6678 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6679 {
6680         flow_mreg_del_default_copy_action(dev);
6681         flow_rxq_flags_clear(dev);
6682 }
6683
6684 /**
6685  * Start all default actions for flows.
6686  *
6687  * @param dev
6688  *   Pointer to Ethernet device.
6689  * @return
6690  *   0 on success, a negative errno value otherwise and rte_errno is set.
6691  */
6692 int
6693 mlx5_flow_start_default(struct rte_eth_dev *dev)
6694 {
6695         struct rte_flow_error error;
6696
6697         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6698         return flow_mreg_add_default_copy_action(dev, &error);
6699 }
6700
6701 /**
6702  * Release key of thread specific flow workspace data.
6703  */
6704 void
6705 flow_release_workspace(void *data)
6706 {
6707         struct mlx5_flow_workspace *wks = data;
6708         struct mlx5_flow_workspace *next;
6709
6710         while (wks) {
6711                 next = wks->next;
6712                 free(wks->rss_desc.queue);
6713                 free(wks);
6714                 wks = next;
6715         }
6716 }
6717
6718 /**
6719  * Get thread specific current flow workspace.
6720  *
6721  * @return pointer to thread specific flow workspace data, NULL on error.
6722  */
6723 struct mlx5_flow_workspace*
6724 mlx5_flow_get_thread_workspace(void)
6725 {
6726         struct mlx5_flow_workspace *data;
6727
6728         data = mlx5_flow_os_get_specific_workspace();
6729         MLX5_ASSERT(data && data->inuse);
6730         if (!data || !data->inuse)
6731                 DRV_LOG(ERR, "flow workspace not initialized.");
6732         return data;
6733 }
6734
6735 /**
6736  * Allocate and init new flow workspace.
6737  *
6738  * @return pointer to flow workspace data, NULL on error.
6739  */
6740 static struct mlx5_flow_workspace*
6741 flow_alloc_thread_workspace(void)
6742 {
6743         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6744
6745         if (!data) {
6746                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6747                         "memory.");
6748                 return NULL;
6749         }
6750         data->rss_desc.queue = calloc(1,
6751                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6752         if (!data->rss_desc.queue)
6753                 goto err;
6754         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6755         return data;
6756 err:
6757         if (data->rss_desc.queue)
6758                 free(data->rss_desc.queue);
6759         free(data);
6760         return NULL;
6761 }
6762
6763 /**
6764  * Get new thread specific flow workspace.
6765  *
6766  * If current workspace inuse, create new one and set as current.
6767  *
6768  * @return pointer to thread specific flow workspace data, NULL on error.
6769  */
6770 static struct mlx5_flow_workspace*
6771 mlx5_flow_push_thread_workspace(void)
6772 {
6773         struct mlx5_flow_workspace *curr;
6774         struct mlx5_flow_workspace *data;
6775
6776         curr = mlx5_flow_os_get_specific_workspace();
6777         if (!curr) {
6778                 data = flow_alloc_thread_workspace();
6779                 if (!data)
6780                         return NULL;
6781         } else if (!curr->inuse) {
6782                 data = curr;
6783         } else if (curr->next) {
6784                 data = curr->next;
6785         } else {
6786                 data = flow_alloc_thread_workspace();
6787                 if (!data)
6788                         return NULL;
6789                 curr->next = data;
6790                 data->prev = curr;
6791         }
6792         data->inuse = 1;
6793         data->flow_idx = 0;
6794         /* Set as current workspace */
6795         if (mlx5_flow_os_set_specific_workspace(data))
6796                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6797         return data;
6798 }
6799
6800 /**
6801  * Close current thread specific flow workspace.
6802  *
6803  * If previous workspace available, set it as current.
6804  *
6805  * @return pointer to thread specific flow workspace data, NULL on error.
6806  */
6807 static void
6808 mlx5_flow_pop_thread_workspace(void)
6809 {
6810         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6811
6812         if (!data)
6813                 return;
6814         if (!data->inuse) {
6815                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6816                 return;
6817         }
6818         data->inuse = 0;
6819         if (!data->prev)
6820                 return;
6821         if (mlx5_flow_os_set_specific_workspace(data->prev))
6822                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6823 }
6824
6825 /**
6826  * Verify the flow list is empty
6827  *
6828  * @param dev
6829  *  Pointer to Ethernet device.
6830  *
6831  * @return the number of flows not released.
6832  */
6833 int
6834 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
6835 {
6836         struct mlx5_priv *priv = dev->data->dev_private;
6837         struct rte_flow *flow;
6838         uint32_t idx = 0;
6839         int ret = 0, i;
6840
6841         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
6842                 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
6843                         DRV_LOG(DEBUG, "port %u flow %p still referenced",
6844                                 dev->data->port_id, (void *)flow);
6845                         ret++;
6846                 }
6847         }
6848         return ret;
6849 }
6850
6851 /**
6852  * Enable default hairpin egress flow.
6853  *
6854  * @param dev
6855  *   Pointer to Ethernet device.
6856  * @param queue
6857  *   The queue index.
6858  *
6859  * @return
6860  *   0 on success, a negative errno value otherwise and rte_errno is set.
6861  */
6862 int
6863 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6864                             uint32_t queue)
6865 {
6866         const struct rte_flow_attr attr = {
6867                 .egress = 1,
6868                 .priority = 0,
6869         };
6870         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6871                 .queue = queue,
6872         };
6873         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6874                 .queue = UINT32_MAX,
6875         };
6876         struct rte_flow_item items[] = {
6877                 {
6878                         .type = (enum rte_flow_item_type)
6879                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6880                         .spec = &queue_spec,
6881                         .last = NULL,
6882                         .mask = &queue_mask,
6883                 },
6884                 {
6885                         .type = RTE_FLOW_ITEM_TYPE_END,
6886                 },
6887         };
6888         struct rte_flow_action_jump jump = {
6889                 .group = MLX5_HAIRPIN_TX_TABLE,
6890         };
6891         struct rte_flow_action actions[2];
6892         uint32_t flow_idx;
6893         struct rte_flow_error error;
6894
6895         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6896         actions[0].conf = &jump;
6897         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6898         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6899                                     &attr, items, actions, false, &error);
6900         if (!flow_idx) {
6901                 DRV_LOG(DEBUG,
6902                         "Failed to create ctrl flow: rte_errno(%d),"
6903                         " type(%d), message(%s)",
6904                         rte_errno, error.type,
6905                         error.message ? error.message : " (no stated reason)");
6906                 return -rte_errno;
6907         }
6908         return 0;
6909 }
6910
6911 /**
6912  * Enable a control flow configured from the control plane.
6913  *
6914  * @param dev
6915  *   Pointer to Ethernet device.
6916  * @param eth_spec
6917  *   An Ethernet flow spec to apply.
6918  * @param eth_mask
6919  *   An Ethernet flow mask to apply.
6920  * @param vlan_spec
6921  *   A VLAN flow spec to apply.
6922  * @param vlan_mask
6923  *   A VLAN flow mask to apply.
6924  *
6925  * @return
6926  *   0 on success, a negative errno value otherwise and rte_errno is set.
6927  */
6928 int
6929 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6930                     struct rte_flow_item_eth *eth_spec,
6931                     struct rte_flow_item_eth *eth_mask,
6932                     struct rte_flow_item_vlan *vlan_spec,
6933                     struct rte_flow_item_vlan *vlan_mask)
6934 {
6935         struct mlx5_priv *priv = dev->data->dev_private;
6936         const struct rte_flow_attr attr = {
6937                 .ingress = 1,
6938                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6939         };
6940         struct rte_flow_item items[] = {
6941                 {
6942                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6943                         .spec = eth_spec,
6944                         .last = NULL,
6945                         .mask = eth_mask,
6946                 },
6947                 {
6948                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6949                                               RTE_FLOW_ITEM_TYPE_END,
6950                         .spec = vlan_spec,
6951                         .last = NULL,
6952                         .mask = vlan_mask,
6953                 },
6954                 {
6955                         .type = RTE_FLOW_ITEM_TYPE_END,
6956                 },
6957         };
6958         uint16_t queue[priv->reta_idx_n];
6959         struct rte_flow_action_rss action_rss = {
6960                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6961                 .level = 0,
6962                 .types = priv->rss_conf.rss_hf,
6963                 .key_len = priv->rss_conf.rss_key_len,
6964                 .queue_num = priv->reta_idx_n,
6965                 .key = priv->rss_conf.rss_key,
6966                 .queue = queue,
6967         };
6968         struct rte_flow_action actions[] = {
6969                 {
6970                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6971                         .conf = &action_rss,
6972                 },
6973                 {
6974                         .type = RTE_FLOW_ACTION_TYPE_END,
6975                 },
6976         };
6977         uint32_t flow_idx;
6978         struct rte_flow_error error;
6979         unsigned int i;
6980
6981         if (!priv->reta_idx_n || !priv->rxqs_n) {
6982                 return 0;
6983         }
6984         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6985                 action_rss.types = 0;
6986         for (i = 0; i != priv->reta_idx_n; ++i)
6987                 queue[i] = (*priv->reta_idx)[i];
6988         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6989                                     &attr, items, actions, false, &error);
6990         if (!flow_idx)
6991                 return -rte_errno;
6992         return 0;
6993 }
6994
6995 /**
6996  * Enable a flow control configured from the control plane.
6997  *
6998  * @param dev
6999  *   Pointer to Ethernet device.
7000  * @param eth_spec
7001  *   An Ethernet flow spec to apply.
7002  * @param eth_mask
7003  *   An Ethernet flow mask to apply.
7004  *
7005  * @return
7006  *   0 on success, a negative errno value otherwise and rte_errno is set.
7007  */
7008 int
7009 mlx5_ctrl_flow(struct rte_eth_dev *dev,
7010                struct rte_flow_item_eth *eth_spec,
7011                struct rte_flow_item_eth *eth_mask)
7012 {
7013         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
7014 }
7015
7016 /**
7017  * Create default miss flow rule matching lacp traffic
7018  *
7019  * @param dev
7020  *   Pointer to Ethernet device.
7021  * @param eth_spec
7022  *   An Ethernet flow spec to apply.
7023  *
7024  * @return
7025  *   0 on success, a negative errno value otherwise and rte_errno is set.
7026  */
7027 int
7028 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
7029 {
7030         /*
7031          * The LACP matching is done by only using ether type since using
7032          * a multicast dst mac causes kernel to give low priority to this flow.
7033          */
7034         static const struct rte_flow_item_eth lacp_spec = {
7035                 .type = RTE_BE16(0x8809),
7036         };
7037         static const struct rte_flow_item_eth lacp_mask = {
7038                 .type = 0xffff,
7039         };
7040         const struct rte_flow_attr attr = {
7041                 .ingress = 1,
7042         };
7043         struct rte_flow_item items[] = {
7044                 {
7045                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7046                         .spec = &lacp_spec,
7047                         .mask = &lacp_mask,
7048                 },
7049                 {
7050                         .type = RTE_FLOW_ITEM_TYPE_END,
7051                 },
7052         };
7053         struct rte_flow_action actions[] = {
7054                 {
7055                         .type = (enum rte_flow_action_type)
7056                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7057                 },
7058                 {
7059                         .type = RTE_FLOW_ACTION_TYPE_END,
7060                 },
7061         };
7062         struct rte_flow_error error;
7063         uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7064                                         &attr, items, actions,
7065                                         false, &error);
7066
7067         if (!flow_idx)
7068                 return -rte_errno;
7069         return 0;
7070 }
7071
7072 /**
7073  * Destroy a flow.
7074  *
7075  * @see rte_flow_destroy()
7076  * @see rte_flow_ops
7077  */
7078 int
7079 mlx5_flow_destroy(struct rte_eth_dev *dev,
7080                   struct rte_flow *flow,
7081                   struct rte_flow_error *error __rte_unused)
7082 {
7083         flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7084                                 (uintptr_t)(void *)flow);
7085         return 0;
7086 }
7087
7088 /**
7089  * Destroy all flows.
7090  *
7091  * @see rte_flow_flush()
7092  * @see rte_flow_ops
7093  */
7094 int
7095 mlx5_flow_flush(struct rte_eth_dev *dev,
7096                 struct rte_flow_error *error __rte_unused)
7097 {
7098         mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7099         return 0;
7100 }
7101
7102 /**
7103  * Isolated mode.
7104  *
7105  * @see rte_flow_isolate()
7106  * @see rte_flow_ops
7107  */
7108 int
7109 mlx5_flow_isolate(struct rte_eth_dev *dev,
7110                   int enable,
7111                   struct rte_flow_error *error)
7112 {
7113         struct mlx5_priv *priv = dev->data->dev_private;
7114
7115         if (dev->data->dev_started) {
7116                 rte_flow_error_set(error, EBUSY,
7117                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7118                                    NULL,
7119                                    "port must be stopped first");
7120                 return -rte_errno;
7121         }
7122         priv->isolated = !!enable;
7123         if (enable)
7124                 dev->dev_ops = &mlx5_dev_ops_isolate;
7125         else
7126                 dev->dev_ops = &mlx5_dev_ops;
7127
7128         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7129         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7130
7131         return 0;
7132 }
7133
7134 /**
7135  * Query a flow.
7136  *
7137  * @see rte_flow_query()
7138  * @see rte_flow_ops
7139  */
7140 static int
7141 flow_drv_query(struct rte_eth_dev *dev,
7142                uint32_t flow_idx,
7143                const struct rte_flow_action *actions,
7144                void *data,
7145                struct rte_flow_error *error)
7146 {
7147         struct mlx5_priv *priv = dev->data->dev_private;
7148         const struct mlx5_flow_driver_ops *fops;
7149         struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7150                                                flow_idx);
7151         enum mlx5_flow_drv_type ftype;
7152
7153         if (!flow) {
7154                 return rte_flow_error_set(error, ENOENT,
7155                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7156                           NULL,
7157                           "invalid flow handle");
7158         }
7159         ftype = flow->drv_type;
7160         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7161         fops = flow_get_drv_ops(ftype);
7162
7163         return fops->query(dev, flow, actions, data, error);
7164 }
7165
7166 /**
7167  * Query a flow.
7168  *
7169  * @see rte_flow_query()
7170  * @see rte_flow_ops
7171  */
7172 int
7173 mlx5_flow_query(struct rte_eth_dev *dev,
7174                 struct rte_flow *flow,
7175                 const struct rte_flow_action *actions,
7176                 void *data,
7177                 struct rte_flow_error *error)
7178 {
7179         int ret;
7180
7181         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7182                              error);
7183         if (ret < 0)
7184                 return ret;
7185         return 0;
7186 }
7187
7188 /**
7189  * Get rte_flow callbacks.
7190  *
7191  * @param dev
7192  *   Pointer to Ethernet device structure.
7193  * @param ops
7194  *   Pointer to operation-specific structure.
7195  *
7196  * @return 0
7197  */
7198 int
7199 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7200                   const struct rte_flow_ops **ops)
7201 {
7202         *ops = &mlx5_flow_ops;
7203         return 0;
7204 }
7205
7206 /**
7207  * Validate meter policy actions.
7208  * Dispatcher for action type specific validation.
7209  *
7210  * @param[in] dev
7211  *   Pointer to the Ethernet device structure.
7212  * @param[in] action
7213  *   The meter policy action object to validate.
7214  * @param[in] attr
7215  *   Attributes of flow to determine steering domain.
7216  * @param[out] is_rss
7217  *   Is RSS or not.
7218  * @param[out] domain_bitmap
7219  *   Domain bitmap.
7220  * @param[out] is_def_policy
7221  *   Is default policy or not.
7222  * @param[out] error
7223  *   Perform verbose error reporting if not NULL. Initialized in case of
7224  *   error only.
7225  *
7226  * @return
7227  *   0 on success, otherwise negative errno value.
7228  */
7229 int
7230 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7231                         const struct rte_flow_action *actions[RTE_COLORS],
7232                         struct rte_flow_attr *attr,
7233                         bool *is_rss,
7234                         uint8_t *domain_bitmap,
7235                         uint8_t *policy_mode,
7236                         struct rte_mtr_error *error)
7237 {
7238         const struct mlx5_flow_driver_ops *fops;
7239
7240         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7241         return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7242                                        domain_bitmap, policy_mode, error);
7243 }
7244
7245 /**
7246  * Destroy the meter table set.
7247  *
7248  * @param[in] dev
7249  *   Pointer to Ethernet device.
7250  * @param[in] mtr_policy
7251  *   Meter policy struct.
7252  */
7253 void
7254 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7255                       struct mlx5_flow_meter_policy *mtr_policy)
7256 {
7257         const struct mlx5_flow_driver_ops *fops;
7258
7259         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7260         fops->destroy_mtr_acts(dev, mtr_policy);
7261 }
7262
7263 /**
7264  * Create policy action, lock free,
7265  * (mutex should be acquired by caller).
7266  * Dispatcher for action type specific call.
7267  *
7268  * @param[in] dev
7269  *   Pointer to the Ethernet device structure.
7270  * @param[in] mtr_policy
7271  *   Meter policy struct.
7272  * @param[in] action
7273  *   Action specification used to create meter actions.
7274  * @param[out] error
7275  *   Perform verbose error reporting if not NULL. Initialized in case of
7276  *   error only.
7277  *
7278  * @return
7279  *   0 on success, otherwise negative errno value.
7280  */
7281 int
7282 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7283                       struct mlx5_flow_meter_policy *mtr_policy,
7284                       const struct rte_flow_action *actions[RTE_COLORS],
7285                       struct rte_mtr_error *error)
7286 {
7287         const struct mlx5_flow_driver_ops *fops;
7288
7289         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7290         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7291 }
7292
7293 /**
7294  * Create policy rules, lock free,
7295  * (mutex should be acquired by caller).
7296  * Dispatcher for action type specific call.
7297  *
7298  * @param[in] dev
7299  *   Pointer to the Ethernet device structure.
7300  * @param[in] mtr_policy
7301  *   Meter policy struct.
7302  *
7303  * @return
7304  *   0 on success, -1 otherwise.
7305  */
7306 int
7307 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7308                              struct mlx5_flow_meter_policy *mtr_policy)
7309 {
7310         const struct mlx5_flow_driver_ops *fops;
7311
7312         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7313         return fops->create_policy_rules(dev, mtr_policy);
7314 }
7315
7316 /**
7317  * Destroy policy rules, lock free,
7318  * (mutex should be acquired by caller).
7319  * Dispatcher for action type specific call.
7320  *
7321  * @param[in] dev
7322  *   Pointer to the Ethernet device structure.
7323  * @param[in] mtr_policy
7324  *   Meter policy struct.
7325  */
7326 void
7327 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7328                              struct mlx5_flow_meter_policy *mtr_policy)
7329 {
7330         const struct mlx5_flow_driver_ops *fops;
7331
7332         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7333         fops->destroy_policy_rules(dev, mtr_policy);
7334 }
7335
7336 /**
7337  * Destroy the default policy table set.
7338  *
7339  * @param[in] dev
7340  *   Pointer to Ethernet device.
7341  */
7342 void
7343 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7344 {
7345         const struct mlx5_flow_driver_ops *fops;
7346
7347         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7348         fops->destroy_def_policy(dev);
7349 }
7350
7351 /**
7352  * Destroy the default policy table set.
7353  *
7354  * @param[in] dev
7355  *   Pointer to Ethernet device.
7356  *
7357  * @return
7358  *   0 on success, -1 otherwise.
7359  */
7360 int
7361 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7362 {
7363         const struct mlx5_flow_driver_ops *fops;
7364
7365         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7366         return fops->create_def_policy(dev);
7367 }
7368
7369 /**
7370  * Create the needed meter and suffix tables.
7371  *
7372  * @param[in] dev
7373  *   Pointer to Ethernet device.
7374  *
7375  * @return
7376  *   0 on success, -1 otherwise.
7377  */
7378 int
7379 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7380                         struct mlx5_flow_meter_info *fm,
7381                         uint32_t mtr_idx,
7382                         uint8_t domain_bitmap)
7383 {
7384         const struct mlx5_flow_driver_ops *fops;
7385
7386         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7387         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7388 }
7389
7390 /**
7391  * Destroy the meter table set.
7392  *
7393  * @param[in] dev
7394  *   Pointer to Ethernet device.
7395  * @param[in] tbl
7396  *   Pointer to the meter table set.
7397  */
7398 void
7399 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7400                            struct mlx5_flow_meter_info *fm)
7401 {
7402         const struct mlx5_flow_driver_ops *fops;
7403
7404         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7405         fops->destroy_mtr_tbls(dev, fm);
7406 }
7407
7408 /**
7409  * Destroy the global meter drop table.
7410  *
7411  * @param[in] dev
7412  *   Pointer to Ethernet device.
7413  */
7414 void
7415 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7416 {
7417         const struct mlx5_flow_driver_ops *fops;
7418
7419         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7420         fops->destroy_mtr_drop_tbls(dev);
7421 }
7422
7423 /**
7424  * Destroy the sub policy table with RX queue.
7425  *
7426  * @param[in] dev
7427  *   Pointer to Ethernet device.
7428  * @param[in] mtr_policy
7429  *   Pointer to meter policy table.
7430  */
7431 void
7432 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7433                 struct mlx5_flow_meter_policy *mtr_policy)
7434 {
7435         const struct mlx5_flow_driver_ops *fops;
7436
7437         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7438         fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7439 }
7440
7441 /**
7442  * Allocate the needed aso flow meter id.
7443  *
7444  * @param[in] dev
7445  *   Pointer to Ethernet device.
7446  *
7447  * @return
7448  *   Index to aso flow meter on success, NULL otherwise.
7449  */
7450 uint32_t
7451 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7452 {
7453         const struct mlx5_flow_driver_ops *fops;
7454
7455         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7456         return fops->create_meter(dev);
7457 }
7458
7459 /**
7460  * Free the aso flow meter id.
7461  *
7462  * @param[in] dev
7463  *   Pointer to Ethernet device.
7464  * @param[in] mtr_idx
7465  *  Index to aso flow meter to be free.
7466  *
7467  * @return
7468  *   0 on success.
7469  */
7470 void
7471 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7472 {
7473         const struct mlx5_flow_driver_ops *fops;
7474
7475         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7476         fops->free_meter(dev, mtr_idx);
7477 }
7478
7479 /**
7480  * Allocate a counter.
7481  *
7482  * @param[in] dev
7483  *   Pointer to Ethernet device structure.
7484  *
7485  * @return
7486  *   Index to allocated counter  on success, 0 otherwise.
7487  */
7488 uint32_t
7489 mlx5_counter_alloc(struct rte_eth_dev *dev)
7490 {
7491         const struct mlx5_flow_driver_ops *fops;
7492         struct rte_flow_attr attr = { .transfer = 0 };
7493
7494         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7495                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7496                 return fops->counter_alloc(dev);
7497         }
7498         DRV_LOG(ERR,
7499                 "port %u counter allocate is not supported.",
7500                  dev->data->port_id);
7501         return 0;
7502 }
7503
7504 /**
7505  * Free a counter.
7506  *
7507  * @param[in] dev
7508  *   Pointer to Ethernet device structure.
7509  * @param[in] cnt
7510  *   Index to counter to be free.
7511  */
7512 void
7513 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7514 {
7515         const struct mlx5_flow_driver_ops *fops;
7516         struct rte_flow_attr attr = { .transfer = 0 };
7517
7518         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7519                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7520                 fops->counter_free(dev, cnt);
7521                 return;
7522         }
7523         DRV_LOG(ERR,
7524                 "port %u counter free is not supported.",
7525                  dev->data->port_id);
7526 }
7527
7528 /**
7529  * Query counter statistics.
7530  *
7531  * @param[in] dev
7532  *   Pointer to Ethernet device structure.
7533  * @param[in] cnt
7534  *   Index to counter to query.
7535  * @param[in] clear
7536  *   Set to clear counter statistics.
7537  * @param[out] pkts
7538  *   The counter hits packets number to save.
7539  * @param[out] bytes
7540  *   The counter hits bytes number to save.
7541  *
7542  * @return
7543  *   0 on success, a negative errno value otherwise.
7544  */
7545 int
7546 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7547                    bool clear, uint64_t *pkts, uint64_t *bytes)
7548 {
7549         const struct mlx5_flow_driver_ops *fops;
7550         struct rte_flow_attr attr = { .transfer = 0 };
7551
7552         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7553                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7554                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7555         }
7556         DRV_LOG(ERR,
7557                 "port %u counter query is not supported.",
7558                  dev->data->port_id);
7559         return -ENOTSUP;
7560 }
7561
7562 /**
7563  * Allocate a new memory for the counter values wrapped by all the needed
7564  * management.
7565  *
7566  * @param[in] sh
7567  *   Pointer to mlx5_dev_ctx_shared object.
7568  *
7569  * @return
7570  *   0 on success, a negative errno value otherwise.
7571  */
7572 static int
7573 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7574 {
7575         struct mlx5_devx_mkey_attr mkey_attr;
7576         struct mlx5_counter_stats_mem_mng *mem_mng;
7577         volatile struct flow_counter_stats *raw_data;
7578         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7579         int size = (sizeof(struct flow_counter_stats) *
7580                         MLX5_COUNTERS_PER_POOL +
7581                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7582                         sizeof(struct mlx5_counter_stats_mem_mng);
7583         size_t pgsize = rte_mem_page_size();
7584         uint8_t *mem;
7585         int i;
7586
7587         if (pgsize == (size_t)-1) {
7588                 DRV_LOG(ERR, "Failed to get mem page size");
7589                 rte_errno = ENOMEM;
7590                 return -ENOMEM;
7591         }
7592         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7593         if (!mem) {
7594                 rte_errno = ENOMEM;
7595                 return -ENOMEM;
7596         }
7597         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7598         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7599         mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,
7600                                                  IBV_ACCESS_LOCAL_WRITE);
7601         if (!mem_mng->umem) {
7602                 rte_errno = errno;
7603                 mlx5_free(mem);
7604                 return -rte_errno;
7605         }
7606         memset(&mkey_attr, 0, sizeof(mkey_attr));
7607         mkey_attr.addr = (uintptr_t)mem;
7608         mkey_attr.size = size;
7609         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7610         mkey_attr.pd = sh->pdn;
7611         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
7612         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
7613         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
7614         if (!mem_mng->dm) {
7615                 mlx5_os_umem_dereg(mem_mng->umem);
7616                 rte_errno = errno;
7617                 mlx5_free(mem);
7618                 return -rte_errno;
7619         }
7620         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7621         raw_data = (volatile struct flow_counter_stats *)mem;
7622         for (i = 0; i < raws_n; ++i) {
7623                 mem_mng->raws[i].mem_mng = mem_mng;
7624                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7625         }
7626         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7627                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7628                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7629                                  next);
7630         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7631         sh->cmng.mem_mng = mem_mng;
7632         return 0;
7633 }
7634
7635 /**
7636  * Set the statistic memory to the new counter pool.
7637  *
7638  * @param[in] sh
7639  *   Pointer to mlx5_dev_ctx_shared object.
7640  * @param[in] pool
7641  *   Pointer to the pool to set the statistic memory.
7642  *
7643  * @return
7644  *   0 on success, a negative errno value otherwise.
7645  */
7646 static int
7647 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7648                                struct mlx5_flow_counter_pool *pool)
7649 {
7650         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7651         /* Resize statistic memory once used out. */
7652         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7653             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7654                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7655                 return -1;
7656         }
7657         rte_spinlock_lock(&pool->sl);
7658         pool->raw = cmng->mem_mng->raws + pool->index %
7659                     MLX5_CNT_CONTAINER_RESIZE;
7660         rte_spinlock_unlock(&pool->sl);
7661         pool->raw_hw = NULL;
7662         return 0;
7663 }
7664
7665 #define MLX5_POOL_QUERY_FREQ_US 1000000
7666
7667 /**
7668  * Set the periodic procedure for triggering asynchronous batch queries for all
7669  * the counter pools.
7670  *
7671  * @param[in] sh
7672  *   Pointer to mlx5_dev_ctx_shared object.
7673  */
7674 void
7675 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7676 {
7677         uint32_t pools_n, us;
7678
7679         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7680         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7681         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7682         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7683                 sh->cmng.query_thread_on = 0;
7684                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7685         } else {
7686                 sh->cmng.query_thread_on = 1;
7687         }
7688 }
7689
7690 /**
7691  * The periodic procedure for triggering asynchronous batch queries for all the
7692  * counter pools. This function is probably called by the host thread.
7693  *
7694  * @param[in] arg
7695  *   The parameter for the alarm process.
7696  */
7697 void
7698 mlx5_flow_query_alarm(void *arg)
7699 {
7700         struct mlx5_dev_ctx_shared *sh = arg;
7701         int ret;
7702         uint16_t pool_index = sh->cmng.pool_index;
7703         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7704         struct mlx5_flow_counter_pool *pool;
7705         uint16_t n_valid;
7706
7707         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7708                 goto set_alarm;
7709         rte_spinlock_lock(&cmng->pool_update_sl);
7710         pool = cmng->pools[pool_index];
7711         n_valid = cmng->n_valid;
7712         rte_spinlock_unlock(&cmng->pool_update_sl);
7713         /* Set the statistic memory to the new created pool. */
7714         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7715                 goto set_alarm;
7716         if (pool->raw_hw)
7717                 /* There is a pool query in progress. */
7718                 goto set_alarm;
7719         pool->raw_hw =
7720                 LIST_FIRST(&sh->cmng.free_stat_raws);
7721         if (!pool->raw_hw)
7722                 /* No free counter statistics raw memory. */
7723                 goto set_alarm;
7724         /*
7725          * Identify the counters released between query trigger and query
7726          * handle more efficiently. The counter released in this gap period
7727          * should wait for a new round of query as the new arrived packets
7728          * will not be taken into account.
7729          */
7730         pool->query_gen++;
7731         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7732                                                MLX5_COUNTERS_PER_POOL,
7733                                                NULL, NULL,
7734                                                pool->raw_hw->mem_mng->dm->id,
7735                                                (void *)(uintptr_t)
7736                                                pool->raw_hw->data,
7737                                                sh->devx_comp,
7738                                                (uint64_t)(uintptr_t)pool);
7739         if (ret) {
7740                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7741                         " %d", pool->min_dcs->id);
7742                 pool->raw_hw = NULL;
7743                 goto set_alarm;
7744         }
7745         LIST_REMOVE(pool->raw_hw, next);
7746         sh->cmng.pending_queries++;
7747         pool_index++;
7748         if (pool_index >= n_valid)
7749                 pool_index = 0;
7750 set_alarm:
7751         sh->cmng.pool_index = pool_index;
7752         mlx5_set_query_alarm(sh);
7753 }
7754
7755 /**
7756  * Check and callback event for new aged flow in the counter pool
7757  *
7758  * @param[in] sh
7759  *   Pointer to mlx5_dev_ctx_shared object.
7760  * @param[in] pool
7761  *   Pointer to Current counter pool.
7762  */
7763 static void
7764 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7765                    struct mlx5_flow_counter_pool *pool)
7766 {
7767         struct mlx5_priv *priv;
7768         struct mlx5_flow_counter *cnt;
7769         struct mlx5_age_info *age_info;
7770         struct mlx5_age_param *age_param;
7771         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7772         struct mlx5_counter_stats_raw *prev = pool->raw;
7773         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7774         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7775         uint16_t expected = AGE_CANDIDATE;
7776         uint32_t i;
7777
7778         pool->time_of_last_age_check = curr_time;
7779         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7780                 cnt = MLX5_POOL_GET_CNT(pool, i);
7781                 age_param = MLX5_CNT_TO_AGE(cnt);
7782                 if (__atomic_load_n(&age_param->state,
7783                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7784                         continue;
7785                 if (cur->data[i].hits != prev->data[i].hits) {
7786                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7787                                          __ATOMIC_RELAXED);
7788                         continue;
7789                 }
7790                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7791                                        time_delta,
7792                                        __ATOMIC_RELAXED) <= age_param->timeout)
7793                         continue;
7794                 /**
7795                  * Hold the lock first, or if between the
7796                  * state AGE_TMOUT and tailq operation the
7797                  * release happened, the release procedure
7798                  * may delete a non-existent tailq node.
7799                  */
7800                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7801                 age_info = GET_PORT_AGE_INFO(priv);
7802                 rte_spinlock_lock(&age_info->aged_sl);
7803                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7804                                                 AGE_TMOUT, false,
7805                                                 __ATOMIC_RELAXED,
7806                                                 __ATOMIC_RELAXED)) {
7807                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
7808                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
7809                 }
7810                 rte_spinlock_unlock(&age_info->aged_sl);
7811         }
7812         mlx5_age_event_prepare(sh);
7813 }
7814
7815 /**
7816  * Handler for the HW respond about ready values from an asynchronous batch
7817  * query. This function is probably called by the host thread.
7818  *
7819  * @param[in] sh
7820  *   The pointer to the shared device context.
7821  * @param[in] async_id
7822  *   The Devx async ID.
7823  * @param[in] status
7824  *   The status of the completion.
7825  */
7826 void
7827 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
7828                                   uint64_t async_id, int status)
7829 {
7830         struct mlx5_flow_counter_pool *pool =
7831                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
7832         struct mlx5_counter_stats_raw *raw_to_free;
7833         uint8_t query_gen = pool->query_gen ^ 1;
7834         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7835         enum mlx5_counter_type cnt_type =
7836                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
7837                                 MLX5_COUNTER_TYPE_ORIGIN;
7838
7839         if (unlikely(status)) {
7840                 raw_to_free = pool->raw_hw;
7841         } else {
7842                 raw_to_free = pool->raw;
7843                 if (pool->is_aged)
7844                         mlx5_flow_aging_check(sh, pool);
7845                 rte_spinlock_lock(&pool->sl);
7846                 pool->raw = pool->raw_hw;
7847                 rte_spinlock_unlock(&pool->sl);
7848                 /* Be sure the new raw counters data is updated in memory. */
7849                 rte_io_wmb();
7850                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
7851                         rte_spinlock_lock(&cmng->csl[cnt_type]);
7852                         TAILQ_CONCAT(&cmng->counters[cnt_type],
7853                                      &pool->counters[query_gen], next);
7854                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
7855                 }
7856         }
7857         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
7858         pool->raw_hw = NULL;
7859         sh->cmng.pending_queries--;
7860 }
7861
7862 static int
7863 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7864                     const struct flow_grp_info *grp_info,
7865                     struct rte_flow_error *error)
7866 {
7867         if (grp_info->transfer && grp_info->external &&
7868             grp_info->fdb_def_rule) {
7869                 if (group == UINT32_MAX)
7870                         return rte_flow_error_set
7871                                                 (error, EINVAL,
7872                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7873                                                  NULL,
7874                                                  "group index not supported");
7875                 *table = group + 1;
7876         } else {
7877                 *table = group;
7878         }
7879         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7880         return 0;
7881 }
7882
7883 /**
7884  * Translate the rte_flow group index to HW table value.
7885  *
7886  * If tunnel offload is disabled, all group ids converted to flow table
7887  * id using the standard method.
7888  * If tunnel offload is enabled, group id can be converted using the
7889  * standard or tunnel conversion method. Group conversion method
7890  * selection depends on flags in `grp_info` parameter:
7891  * - Internal (grp_info.external == 0) groups conversion uses the
7892  *   standard method.
7893  * - Group ids in JUMP action converted with the tunnel conversion.
7894  * - Group id in rule attribute conversion depends on a rule type and
7895  *   group id value:
7896  *   ** non zero group attributes converted with the tunnel method
7897  *   ** zero group attribute in non-tunnel rule is converted using the
7898  *      standard method - there's only one root table
7899  *   ** zero group attribute in steer tunnel rule is converted with the
7900  *      standard method - single root table
7901  *   ** zero group attribute in match tunnel rule is a special OvS
7902  *      case: that value is used for portability reasons. That group
7903  *      id is converted with the tunnel conversion method.
7904  *
7905  * @param[in] dev
7906  *   Port device
7907  * @param[in] tunnel
7908  *   PMD tunnel offload object
7909  * @param[in] group
7910  *   rte_flow group index value.
7911  * @param[out] table
7912  *   HW table value.
7913  * @param[in] grp_info
7914  *   flags used for conversion
7915  * @param[out] error
7916  *   Pointer to error structure.
7917  *
7918  * @return
7919  *   0 on success, a negative errno value otherwise and rte_errno is set.
7920  */
7921 int
7922 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7923                          const struct mlx5_flow_tunnel *tunnel,
7924                          uint32_t group, uint32_t *table,
7925                          const struct flow_grp_info *grp_info,
7926                          struct rte_flow_error *error)
7927 {
7928         int ret;
7929         bool standard_translation;
7930
7931         if (!grp_info->skip_scale && grp_info->external &&
7932             group < MLX5_MAX_TABLES_EXTERNAL)
7933                 group *= MLX5_FLOW_TABLE_FACTOR;
7934         if (is_tunnel_offload_active(dev)) {
7935                 standard_translation = !grp_info->external ||
7936                                         grp_info->std_tbl_fix;
7937         } else {
7938                 standard_translation = true;
7939         }
7940         DRV_LOG(DEBUG,
7941                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
7942                 dev->data->port_id, group, grp_info->transfer,
7943                 grp_info->external, grp_info->fdb_def_rule,
7944                 standard_translation ? "STANDARD" : "TUNNEL");
7945         if (standard_translation)
7946                 ret = flow_group_to_table(dev->data->port_id, group, table,
7947                                           grp_info, error);
7948         else
7949                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7950                                                       table, error);
7951
7952         return ret;
7953 }
7954
7955 /**
7956  * Discover availability of metadata reg_c's.
7957  *
7958  * Iteratively use test flows to check availability.
7959  *
7960  * @param[in] dev
7961  *   Pointer to the Ethernet device structure.
7962  *
7963  * @return
7964  *   0 on success, a negative errno value otherwise and rte_errno is set.
7965  */
7966 int
7967 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7968 {
7969         struct mlx5_priv *priv = dev->data->dev_private;
7970         struct mlx5_dev_config *config = &priv->config;
7971         enum modify_reg idx;
7972         int n = 0;
7973
7974         /* reg_c[0] and reg_c[1] are reserved. */
7975         config->flow_mreg_c[n++] = REG_C_0;
7976         config->flow_mreg_c[n++] = REG_C_1;
7977         /* Discover availability of other reg_c's. */
7978         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7979                 struct rte_flow_attr attr = {
7980                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7981                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7982                         .ingress = 1,
7983                 };
7984                 struct rte_flow_item items[] = {
7985                         [0] = {
7986                                 .type = RTE_FLOW_ITEM_TYPE_END,
7987                         },
7988                 };
7989                 struct rte_flow_action actions[] = {
7990                         [0] = {
7991                                 .type = (enum rte_flow_action_type)
7992                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7993                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7994                                         .src = REG_C_1,
7995                                         .dst = idx,
7996                                 },
7997                         },
7998                         [1] = {
7999                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
8000                                 .conf = &(struct rte_flow_action_jump){
8001                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
8002                                 },
8003                         },
8004                         [2] = {
8005                                 .type = RTE_FLOW_ACTION_TYPE_END,
8006                         },
8007                 };
8008                 uint32_t flow_idx;
8009                 struct rte_flow *flow;
8010                 struct rte_flow_error error;
8011
8012                 if (!config->dv_flow_en)
8013                         break;
8014                 /* Create internal flow, validation skips copy action. */
8015                 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
8016                                         items, actions, false, &error);
8017                 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8018                                       flow_idx);
8019                 if (!flow)
8020                         continue;
8021                 config->flow_mreg_c[n++] = idx;
8022                 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
8023         }
8024         for (; n < MLX5_MREG_C_NUM; ++n)
8025                 config->flow_mreg_c[n] = REG_NON;
8026         return 0;
8027 }
8028
8029 int
8030 save_dump_file(const uint8_t *data, uint32_t size,
8031         uint32_t type, uint32_t id, void *arg, FILE *file)
8032 {
8033         char line[BUF_SIZE];
8034         uint32_t out = 0;
8035         uint32_t k;
8036         uint32_t actions_num;
8037         struct rte_flow_query_count *count;
8038
8039         memset(line, 0, BUF_SIZE);
8040         switch (type) {
8041         case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
8042                 actions_num = *(uint32_t *)(arg);
8043                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,%d,",
8044                                 type, id, actions_num);
8045                 break;
8046         case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
8047                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,",
8048                                 type, id);
8049                 break;
8050         case DR_DUMP_REC_TYPE_PMD_COUNTER:
8051                 count = (struct rte_flow_query_count *)arg;
8052                 fprintf(file, "%d,0x%x,%" PRIu64 ",%" PRIu64 "\n", type,
8053                                 id, count->hits, count->bytes);
8054                 return 0;
8055         default:
8056                 return -1;
8057         }
8058
8059         for (k = 0; k < size; k++) {
8060                 /* Make sure we do not overrun the line buffer length. */
8061                 if (out >= BUF_SIZE - 4) {
8062                         line[out] = '\0';
8063                         break;
8064                 }
8065                 out += snprintf(line + out, BUF_SIZE - out, "%02x",
8066                                 (data[k]) & 0xff);
8067         }
8068         fprintf(file, "%s\n", line);
8069         return 0;
8070 }
8071
8072 int
8073 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
8074         struct rte_flow_query_count *count, struct rte_flow_error *error)
8075 {
8076         struct rte_flow_action action[2];
8077         enum mlx5_flow_drv_type ftype;
8078         const struct mlx5_flow_driver_ops *fops;
8079
8080         if (!flow) {
8081                 return rte_flow_error_set(error, ENOENT,
8082                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8083                                 NULL,
8084                                 "invalid flow handle");
8085         }
8086         action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
8087         action[1].type = RTE_FLOW_ACTION_TYPE_END;
8088         if (flow->counter) {
8089                 memset(count, 0, sizeof(struct rte_flow_query_count));
8090                 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
8091                 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
8092                                                 ftype < MLX5_FLOW_TYPE_MAX);
8093                 fops = flow_get_drv_ops(ftype);
8094                 return fops->query(dev, flow, action, count, error);
8095         }
8096         return -1;
8097 }
8098
8099 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8100 /**
8101  * Dump flow ipool data to file
8102  *
8103  * @param[in] dev
8104  *   The pointer to Ethernet device.
8105  * @param[in] file
8106  *   A pointer to a file for output.
8107  * @param[out] error
8108  *   Perform verbose error reporting if not NULL. PMDs initialize this
8109  *   structure in case of error only.
8110  * @return
8111  *   0 on success, a negative value otherwise.
8112  */
8113 int
8114 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
8115         struct rte_flow *flow, FILE *file,
8116         struct rte_flow_error *error)
8117 {
8118         struct mlx5_priv *priv = dev->data->dev_private;
8119         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8120         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8121         uint32_t handle_idx;
8122         struct mlx5_flow_handle *dh;
8123         struct rte_flow_query_count count;
8124         uint32_t actions_num;
8125         const uint8_t *data;
8126         size_t size;
8127         uint32_t id;
8128         uint32_t type;
8129
8130         if (!flow) {
8131                 return rte_flow_error_set(error, ENOENT,
8132                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8133                         NULL,
8134                         "invalid flow handle");
8135         }
8136         handle_idx = flow->dev_handles;
8137         while (handle_idx) {
8138                 dh = mlx5_ipool_get(priv->sh->ipool
8139                         [MLX5_IPOOL_MLX5_FLOW], handle_idx);
8140                 if (!dh)
8141                         continue;
8142                 handle_idx = dh->next.next;
8143                 id = (uint32_t)(uintptr_t)dh->drv_flow;
8144
8145                 /* query counter */
8146                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8147                 if (!mlx5_flow_query_counter(dev, flow, &count, error))
8148                         save_dump_file(NULL, 0, type,
8149                                         id, (void *)&count, file);
8150
8151                 /* Get modify_hdr and encap_decap buf from ipools. */
8152                 encap_decap = NULL;
8153                 modify_hdr = dh->dvh.modify_hdr;
8154
8155                 if (dh->dvh.rix_encap_decap) {
8156                         encap_decap = mlx5_ipool_get(priv->sh->ipool
8157                                                 [MLX5_IPOOL_DECAP_ENCAP],
8158                                                 dh->dvh.rix_encap_decap);
8159                 }
8160                 if (modify_hdr) {
8161                         data = (const uint8_t *)modify_hdr->actions;
8162                         size = (size_t)(modify_hdr->actions_num) * 8;
8163                         actions_num = modify_hdr->actions_num;
8164                         type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8165                         save_dump_file(data, size, type, id,
8166                                         (void *)(&actions_num), file);
8167                 }
8168                 if (encap_decap) {
8169                         data = encap_decap->buf;
8170                         size = encap_decap->size;
8171                         type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8172                         save_dump_file(data, size, type,
8173                                                 id, NULL, file);
8174                 }
8175         }
8176         return 0;
8177 }
8178 #endif
8179
8180 /**
8181  * Dump flow raw hw data to file
8182  *
8183  * @param[in] dev
8184  *    The pointer to Ethernet device.
8185  * @param[in] file
8186  *   A pointer to a file for output.
8187  * @param[out] error
8188  *   Perform verbose error reporting if not NULL. PMDs initialize this
8189  *   structure in case of error only.
8190  * @return
8191  *   0 on success, a nagative value otherwise.
8192  */
8193 int
8194 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
8195                    FILE *file,
8196                    struct rte_flow_error *error __rte_unused)
8197 {
8198         struct mlx5_priv *priv = dev->data->dev_private;
8199         struct mlx5_dev_ctx_shared *sh = priv->sh;
8200         uint32_t handle_idx;
8201         int ret;
8202         struct mlx5_flow_handle *dh;
8203         struct rte_flow *flow;
8204 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8205         uint32_t idx;
8206 #endif
8207
8208         if (!priv->config.dv_flow_en) {
8209                 if (fputs("device dv flow disabled\n", file) <= 0)
8210                         return -errno;
8211                 return -ENOTSUP;
8212         }
8213
8214         /* dump all */
8215         if (!flow_idx) {
8216 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8217                 MLX5_IPOOL_FOREACH(priv->flows[MLX5_FLOW_TYPE_GEN], idx, flow)
8218                         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8219 #endif
8220                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
8221                                         sh->rx_domain,
8222                                         sh->tx_domain, file);
8223         }
8224         /* dump one */
8225         flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8226                         (uintptr_t)(void *)flow_idx);
8227         if (!flow)
8228                 return -ENOENT;
8229
8230 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8231         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8232 #endif
8233         handle_idx = flow->dev_handles;
8234         while (handle_idx) {
8235                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8236                                 handle_idx);
8237                 if (!dh)
8238                         return -ENOENT;
8239                 if (dh->drv_flow) {
8240                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
8241                                         file);
8242                         if (ret)
8243                                 return -ENOENT;
8244                 }
8245                 handle_idx = dh->next.next;
8246         }
8247         return 0;
8248 }
8249
8250 /**
8251  * Get aged-out flows.
8252  *
8253  * @param[in] dev
8254  *   Pointer to the Ethernet device structure.
8255  * @param[in] context
8256  *   The address of an array of pointers to the aged-out flows contexts.
8257  * @param[in] nb_countexts
8258  *   The length of context array pointers.
8259  * @param[out] error
8260  *   Perform verbose error reporting if not NULL. Initialized in case of
8261  *   error only.
8262  *
8263  * @return
8264  *   how many contexts get in success, otherwise negative errno value.
8265  *   if nb_contexts is 0, return the amount of all aged contexts.
8266  *   if nb_contexts is not 0 , return the amount of aged flows reported
8267  *   in the context array.
8268  */
8269 int
8270 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
8271                         uint32_t nb_contexts, struct rte_flow_error *error)
8272 {
8273         const struct mlx5_flow_driver_ops *fops;
8274         struct rte_flow_attr attr = { .transfer = 0 };
8275
8276         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8277                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8278                 return fops->get_aged_flows(dev, contexts, nb_contexts,
8279                                                     error);
8280         }
8281         DRV_LOG(ERR,
8282                 "port %u get aged flows is not supported.",
8283                  dev->data->port_id);
8284         return -ENOTSUP;
8285 }
8286
8287 /* Wrapper for driver action_validate op callback */
8288 static int
8289 flow_drv_action_validate(struct rte_eth_dev *dev,
8290                          const struct rte_flow_indir_action_conf *conf,
8291                          const struct rte_flow_action *action,
8292                          const struct mlx5_flow_driver_ops *fops,
8293                          struct rte_flow_error *error)
8294 {
8295         static const char err_msg[] = "indirect action validation unsupported";
8296
8297         if (!fops->action_validate) {
8298                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8299                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8300                                    NULL, err_msg);
8301                 return -rte_errno;
8302         }
8303         return fops->action_validate(dev, conf, action, error);
8304 }
8305
8306 /**
8307  * Destroys the shared action by handle.
8308  *
8309  * @param dev
8310  *   Pointer to Ethernet device structure.
8311  * @param[in] handle
8312  *   Handle for the indirect action object to be destroyed.
8313  * @param[out] error
8314  *   Perform verbose error reporting if not NULL. PMDs initialize this
8315  *   structure in case of error only.
8316  *
8317  * @return
8318  *   0 on success, a negative errno value otherwise and rte_errno is set.
8319  *
8320  * @note: wrapper for driver action_create op callback.
8321  */
8322 static int
8323 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
8324                            struct rte_flow_action_handle *handle,
8325                            struct rte_flow_error *error)
8326 {
8327         static const char err_msg[] = "indirect action destruction unsupported";
8328         struct rte_flow_attr attr = { .transfer = 0 };
8329         const struct mlx5_flow_driver_ops *fops =
8330                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8331
8332         if (!fops->action_destroy) {
8333                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8334                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8335                                    NULL, err_msg);
8336                 return -rte_errno;
8337         }
8338         return fops->action_destroy(dev, handle, error);
8339 }
8340
8341 /* Wrapper for driver action_destroy op callback */
8342 static int
8343 flow_drv_action_update(struct rte_eth_dev *dev,
8344                        struct rte_flow_action_handle *handle,
8345                        const void *update,
8346                        const struct mlx5_flow_driver_ops *fops,
8347                        struct rte_flow_error *error)
8348 {
8349         static const char err_msg[] = "indirect action update unsupported";
8350
8351         if (!fops->action_update) {
8352                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8353                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8354                                    NULL, err_msg);
8355                 return -rte_errno;
8356         }
8357         return fops->action_update(dev, handle, update, error);
8358 }
8359
8360 /* Wrapper for driver action_destroy op callback */
8361 static int
8362 flow_drv_action_query(struct rte_eth_dev *dev,
8363                       const struct rte_flow_action_handle *handle,
8364                       void *data,
8365                       const struct mlx5_flow_driver_ops *fops,
8366                       struct rte_flow_error *error)
8367 {
8368         static const char err_msg[] = "indirect action query unsupported";
8369
8370         if (!fops->action_query) {
8371                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8372                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8373                                    NULL, err_msg);
8374                 return -rte_errno;
8375         }
8376         return fops->action_query(dev, handle, data, error);
8377 }
8378
8379 /**
8380  * Create indirect action for reuse in multiple flow rules.
8381  *
8382  * @param dev
8383  *   Pointer to Ethernet device structure.
8384  * @param conf
8385  *   Pointer to indirect action object configuration.
8386  * @param[in] action
8387  *   Action configuration for indirect action object creation.
8388  * @param[out] error
8389  *   Perform verbose error reporting if not NULL. PMDs initialize this
8390  *   structure in case of error only.
8391  * @return
8392  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
8393  */
8394 static struct rte_flow_action_handle *
8395 mlx5_action_handle_create(struct rte_eth_dev *dev,
8396                           const struct rte_flow_indir_action_conf *conf,
8397                           const struct rte_flow_action *action,
8398                           struct rte_flow_error *error)
8399 {
8400         static const char err_msg[] = "indirect action creation unsupported";
8401         struct rte_flow_attr attr = { .transfer = 0 };
8402         const struct mlx5_flow_driver_ops *fops =
8403                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8404
8405         if (flow_drv_action_validate(dev, conf, action, fops, error))
8406                 return NULL;
8407         if (!fops->action_create) {
8408                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8409                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8410                                    NULL, err_msg);
8411                 return NULL;
8412         }
8413         return fops->action_create(dev, conf, action, error);
8414 }
8415
8416 /**
8417  * Updates inplace the indirect action configuration pointed by *handle*
8418  * with the configuration provided as *update* argument.
8419  * The update of the indirect action configuration effects all flow rules
8420  * reusing the action via handle.
8421  *
8422  * @param dev
8423  *   Pointer to Ethernet device structure.
8424  * @param[in] handle
8425  *   Handle for the indirect action to be updated.
8426  * @param[in] update
8427  *   Action specification used to modify the action pointed by handle.
8428  *   *update* could be of same type with the action pointed by the *handle*
8429  *   handle argument, or some other structures like a wrapper, depending on
8430  *   the indirect action type.
8431  * @param[out] error
8432  *   Perform verbose error reporting if not NULL. PMDs initialize this
8433  *   structure in case of error only.
8434  *
8435  * @return
8436  *   0 on success, a negative errno value otherwise and rte_errno is set.
8437  */
8438 static int
8439 mlx5_action_handle_update(struct rte_eth_dev *dev,
8440                 struct rte_flow_action_handle *handle,
8441                 const void *update,
8442                 struct rte_flow_error *error)
8443 {
8444         struct rte_flow_attr attr = { .transfer = 0 };
8445         const struct mlx5_flow_driver_ops *fops =
8446                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8447         int ret;
8448
8449         ret = flow_drv_action_validate(dev, NULL,
8450                         (const struct rte_flow_action *)update, fops, error);
8451         if (ret)
8452                 return ret;
8453         return flow_drv_action_update(dev, handle, update, fops,
8454                                       error);
8455 }
8456
8457 /**
8458  * Query the indirect action by handle.
8459  *
8460  * This function allows retrieving action-specific data such as counters.
8461  * Data is gathered by special action which may be present/referenced in
8462  * more than one flow rule definition.
8463  *
8464  * see @RTE_FLOW_ACTION_TYPE_COUNT
8465  *
8466  * @param dev
8467  *   Pointer to Ethernet device structure.
8468  * @param[in] handle
8469  *   Handle for the indirect action to query.
8470  * @param[in, out] data
8471  *   Pointer to storage for the associated query data type.
8472  * @param[out] error
8473  *   Perform verbose error reporting if not NULL. PMDs initialize this
8474  *   structure in case of error only.
8475  *
8476  * @return
8477  *   0 on success, a negative errno value otherwise and rte_errno is set.
8478  */
8479 static int
8480 mlx5_action_handle_query(struct rte_eth_dev *dev,
8481                          const struct rte_flow_action_handle *handle,
8482                          void *data,
8483                          struct rte_flow_error *error)
8484 {
8485         struct rte_flow_attr attr = { .transfer = 0 };
8486         const struct mlx5_flow_driver_ops *fops =
8487                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8488
8489         return flow_drv_action_query(dev, handle, data, fops, error);
8490 }
8491
8492 /**
8493  * Destroy all indirect actions (shared RSS).
8494  *
8495  * @param dev
8496  *   Pointer to Ethernet device.
8497  *
8498  * @return
8499  *   0 on success, a negative errno value otherwise and rte_errno is set.
8500  */
8501 int
8502 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8503 {
8504         struct rte_flow_error error;
8505         struct mlx5_priv *priv = dev->data->dev_private;
8506         struct mlx5_shared_action_rss *shared_rss;
8507         int ret = 0;
8508         uint32_t idx;
8509
8510         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8511                       priv->rss_shared_actions, idx, shared_rss, next) {
8512                 ret |= mlx5_action_handle_destroy(dev,
8513                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8514         }
8515         return ret;
8516 }
8517
8518 #ifndef HAVE_MLX5DV_DR
8519 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8520 #else
8521 #define MLX5_DOMAIN_SYNC_FLOW \
8522         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8523 #endif
8524
8525 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8526 {
8527         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8528         const struct mlx5_flow_driver_ops *fops;
8529         int ret;
8530         struct rte_flow_attr attr = { .transfer = 0 };
8531
8532         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8533         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8534         if (ret > 0)
8535                 ret = -ret;
8536         return ret;
8537 }
8538
8539 const struct mlx5_flow_tunnel *
8540 mlx5_get_tof(const struct rte_flow_item *item,
8541              const struct rte_flow_action *action,
8542              enum mlx5_tof_rule_type *rule_type)
8543 {
8544         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
8545                 if (item->type == (typeof(item->type))
8546                                   MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
8547                         *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
8548                         return flow_items_to_tunnel(item);
8549                 }
8550         }
8551         for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
8552                 if (action->type == (typeof(action->type))
8553                                     MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
8554                         *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
8555                         return flow_actions_to_tunnel(action);
8556                 }
8557         }
8558         return NULL;
8559 }
8560
8561 /**
8562  * tunnel offload functionalilty is defined for DV environment only
8563  */
8564 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8565 __extension__
8566 union tunnel_offload_mark {
8567         uint32_t val;
8568         struct {
8569                 uint32_t app_reserve:8;
8570                 uint32_t table_id:15;
8571                 uint32_t transfer:1;
8572                 uint32_t _unused_:8;
8573         };
8574 };
8575
8576 static bool
8577 mlx5_access_tunnel_offload_db
8578         (struct rte_eth_dev *dev,
8579          bool (*match)(struct rte_eth_dev *,
8580                        struct mlx5_flow_tunnel *, const void *),
8581          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8582          void (*miss)(struct rte_eth_dev *, void *),
8583          void *ctx, bool lock_op);
8584
8585 static int
8586 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
8587                              struct rte_flow *flow,
8588                              const struct rte_flow_attr *attr,
8589                              const struct rte_flow_action *app_actions,
8590                              uint32_t flow_idx,
8591                              const struct mlx5_flow_tunnel *tunnel,
8592                              struct tunnel_default_miss_ctx *ctx,
8593                              struct rte_flow_error *error)
8594 {
8595         struct mlx5_priv *priv = dev->data->dev_private;
8596         struct mlx5_flow *dev_flow;
8597         struct rte_flow_attr miss_attr = *attr;
8598         const struct rte_flow_item miss_items[2] = {
8599                 {
8600                         .type = RTE_FLOW_ITEM_TYPE_ETH,
8601                         .spec = NULL,
8602                         .last = NULL,
8603                         .mask = NULL
8604                 },
8605                 {
8606                         .type = RTE_FLOW_ITEM_TYPE_END,
8607                         .spec = NULL,
8608                         .last = NULL,
8609                         .mask = NULL
8610                 }
8611         };
8612         union tunnel_offload_mark mark_id;
8613         struct rte_flow_action_mark miss_mark;
8614         struct rte_flow_action miss_actions[3] = {
8615                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
8616                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
8617         };
8618         const struct rte_flow_action_jump *jump_data;
8619         uint32_t i, flow_table = 0; /* prevent compilation warning */
8620         struct flow_grp_info grp_info = {
8621                 .external = 1,
8622                 .transfer = attr->transfer,
8623                 .fdb_def_rule = !!priv->fdb_def_rule,
8624                 .std_tbl_fix = 0,
8625         };
8626         int ret;
8627
8628         if (!attr->transfer) {
8629                 uint32_t q_size;
8630
8631                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
8632                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
8633                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
8634                                          0, SOCKET_ID_ANY);
8635                 if (!ctx->queue)
8636                         return rte_flow_error_set
8637                                 (error, ENOMEM,
8638                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8639                                 NULL, "invalid default miss RSS");
8640                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
8641                 ctx->action_rss.level = 0,
8642                 ctx->action_rss.types = priv->rss_conf.rss_hf,
8643                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
8644                 ctx->action_rss.queue_num = priv->reta_idx_n,
8645                 ctx->action_rss.key = priv->rss_conf.rss_key,
8646                 ctx->action_rss.queue = ctx->queue;
8647                 if (!priv->reta_idx_n || !priv->rxqs_n)
8648                         return rte_flow_error_set
8649                                 (error, EINVAL,
8650                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8651                                 NULL, "invalid port configuration");
8652                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
8653                         ctx->action_rss.types = 0;
8654                 for (i = 0; i != priv->reta_idx_n; ++i)
8655                         ctx->queue[i] = (*priv->reta_idx)[i];
8656         } else {
8657                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
8658                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
8659         }
8660         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
8661         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
8662         jump_data = app_actions->conf;
8663         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
8664         miss_attr.group = jump_data->group;
8665         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
8666                                        &flow_table, &grp_info, error);
8667         if (ret)
8668                 return rte_flow_error_set(error, EINVAL,
8669                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8670                                           NULL, "invalid tunnel id");
8671         mark_id.app_reserve = 0;
8672         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
8673         mark_id.transfer = !!attr->transfer;
8674         mark_id._unused_ = 0;
8675         miss_mark.id = mark_id.val;
8676         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
8677                                     miss_items, miss_actions, flow_idx, error);
8678         if (!dev_flow)
8679                 return -rte_errno;
8680         dev_flow->flow = flow;
8681         dev_flow->external = true;
8682         dev_flow->tunnel = tunnel;
8683         dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
8684         /* Subflow object was created, we must include one in the list. */
8685         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
8686                       dev_flow->handle, next);
8687         DRV_LOG(DEBUG,
8688                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
8689                 dev->data->port_id, tunnel->app_tunnel.type,
8690                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
8691         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
8692                                   miss_actions, error);
8693         if (!ret)
8694                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
8695                                                   error);
8696
8697         return ret;
8698 }
8699
8700 static const struct mlx5_flow_tbl_data_entry  *
8701 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
8702 {
8703         struct mlx5_priv *priv = dev->data->dev_private;
8704         struct mlx5_dev_ctx_shared *sh = priv->sh;
8705         struct mlx5_list_entry *he;
8706         union tunnel_offload_mark mbits = { .val = mark };
8707         union mlx5_flow_tbl_key table_key = {
8708                 {
8709                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
8710                         .id = 0,
8711                         .reserved = 0,
8712                         .dummy = 0,
8713                         .is_fdb = !!mbits.transfer,
8714                         .is_egress = 0,
8715                 }
8716         };
8717         struct mlx5_flow_cb_ctx ctx = {
8718                 .data = &table_key.v64,
8719         };
8720
8721         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
8722         return he ?
8723                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
8724 }
8725
8726 static void
8727 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
8728                                    struct mlx5_list_entry *entry)
8729 {
8730         struct mlx5_dev_ctx_shared *sh = tool_ctx;
8731         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8732
8733         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8734                         tunnel_flow_tbl_to_id(tte->flow_table));
8735         mlx5_free(tte);
8736 }
8737
8738 static int
8739 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
8740                                   struct mlx5_list_entry *entry, void *cb_ctx)
8741 {
8742         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8743         union tunnel_tbl_key tbl = {
8744                 .val = *(uint64_t *)(ctx->data),
8745         };
8746         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8747
8748         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
8749 }
8750
8751 static struct mlx5_list_entry *
8752 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
8753 {
8754         struct mlx5_dev_ctx_shared *sh = tool_ctx;
8755         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8756         struct tunnel_tbl_entry *tte;
8757         union tunnel_tbl_key tbl = {
8758                 .val = *(uint64_t *)(ctx->data),
8759         };
8760
8761         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
8762                           sizeof(*tte), 0,
8763                           SOCKET_ID_ANY);
8764         if (!tte)
8765                 goto err;
8766         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8767                           &tte->flow_table);
8768         if (tte->flow_table >= MLX5_MAX_TABLES) {
8769                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
8770                         tte->flow_table);
8771                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8772                                 tte->flow_table);
8773                 goto err;
8774         } else if (!tte->flow_table) {
8775                 goto err;
8776         }
8777         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
8778         tte->tunnel_id = tbl.tunnel_id;
8779         tte->group = tbl.group;
8780         return &tte->hash;
8781 err:
8782         if (tte)
8783                 mlx5_free(tte);
8784         return NULL;
8785 }
8786
8787 static struct mlx5_list_entry *
8788 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
8789                                   struct mlx5_list_entry *oentry,
8790                                   void *cb_ctx __rte_unused)
8791 {
8792         struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
8793                                                    0, SOCKET_ID_ANY);
8794
8795         if (!tte)
8796                 return NULL;
8797         memcpy(tte, oentry, sizeof(*tte));
8798         return &tte->hash;
8799 }
8800
8801 static void
8802 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
8803                                        struct mlx5_list_entry *entry)
8804 {
8805         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8806
8807         mlx5_free(tte);
8808 }
8809
8810 static uint32_t
8811 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
8812                                 const struct mlx5_flow_tunnel *tunnel,
8813                                 uint32_t group, uint32_t *table,
8814                                 struct rte_flow_error *error)
8815 {
8816         struct mlx5_list_entry *he;
8817         struct tunnel_tbl_entry *tte;
8818         union tunnel_tbl_key key = {
8819                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
8820                 .group = group
8821         };
8822         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8823         struct mlx5_hlist *group_hash;
8824         struct mlx5_flow_cb_ctx ctx = {
8825                 .data = &key.val,
8826         };
8827
8828         group_hash = tunnel ? tunnel->groups : thub->groups;
8829         he = mlx5_hlist_register(group_hash, key.val, &ctx);
8830         if (!he)
8831                 return rte_flow_error_set(error, EINVAL,
8832                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8833                                           NULL,
8834                                           "tunnel group index not supported");
8835         tte = container_of(he, typeof(*tte), hash);
8836         *table = tte->flow_table;
8837         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
8838                 dev->data->port_id, key.tunnel_id, group, *table);
8839         return 0;
8840 }
8841
8842 static void
8843 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
8844                       struct mlx5_flow_tunnel *tunnel)
8845 {
8846         struct mlx5_priv *priv = dev->data->dev_private;
8847         struct mlx5_indexed_pool *ipool;
8848
8849         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
8850                 dev->data->port_id, tunnel->tunnel_id);
8851         LIST_REMOVE(tunnel, chain);
8852         mlx5_hlist_destroy(tunnel->groups);
8853         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8854         mlx5_ipool_free(ipool, tunnel->tunnel_id);
8855 }
8856
8857 static bool
8858 mlx5_access_tunnel_offload_db
8859         (struct rte_eth_dev *dev,
8860          bool (*match)(struct rte_eth_dev *,
8861                        struct mlx5_flow_tunnel *, const void *),
8862          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8863          void (*miss)(struct rte_eth_dev *, void *),
8864          void *ctx, bool lock_op)
8865 {
8866         bool verdict = false;
8867         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8868         struct mlx5_flow_tunnel *tunnel;
8869
8870         rte_spinlock_lock(&thub->sl);
8871         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
8872                 verdict = match(dev, tunnel, (const void *)ctx);
8873                 if (verdict)
8874                         break;
8875         }
8876         if (!lock_op)
8877                 rte_spinlock_unlock(&thub->sl);
8878         if (verdict && hit)
8879                 hit(dev, tunnel, ctx);
8880         if (!verdict && miss)
8881                 miss(dev, ctx);
8882         if (lock_op)
8883                 rte_spinlock_unlock(&thub->sl);
8884
8885         return verdict;
8886 }
8887
8888 struct tunnel_db_find_tunnel_id_ctx {
8889         uint32_t tunnel_id;
8890         struct mlx5_flow_tunnel *tunnel;
8891 };
8892
8893 static bool
8894 find_tunnel_id_match(struct rte_eth_dev *dev,
8895                      struct mlx5_flow_tunnel *tunnel, const void *x)
8896 {
8897         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8898
8899         RTE_SET_USED(dev);
8900         return tunnel->tunnel_id == ctx->tunnel_id;
8901 }
8902
8903 static void
8904 find_tunnel_id_hit(struct rte_eth_dev *dev,
8905                    struct mlx5_flow_tunnel *tunnel, void *x)
8906 {
8907         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8908         RTE_SET_USED(dev);
8909         ctx->tunnel = tunnel;
8910 }
8911
8912 static struct mlx5_flow_tunnel *
8913 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
8914 {
8915         struct tunnel_db_find_tunnel_id_ctx ctx = {
8916                 .tunnel_id = id,
8917         };
8918
8919         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
8920                                       find_tunnel_id_hit, NULL, &ctx, true);
8921
8922         return ctx.tunnel;
8923 }
8924
8925 static struct mlx5_flow_tunnel *
8926 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
8927                           const struct rte_flow_tunnel *app_tunnel)
8928 {
8929         struct mlx5_priv *priv = dev->data->dev_private;
8930         struct mlx5_indexed_pool *ipool;
8931         struct mlx5_flow_tunnel *tunnel;
8932         uint32_t id;
8933
8934         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8935         tunnel = mlx5_ipool_zmalloc(ipool, &id);
8936         if (!tunnel)
8937                 return NULL;
8938         if (id >= MLX5_MAX_TUNNELS) {
8939                 mlx5_ipool_free(ipool, id);
8940                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
8941                 return NULL;
8942         }
8943         tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
8944                                            priv->sh,
8945                                            mlx5_flow_tunnel_grp2tbl_create_cb,
8946                                            mlx5_flow_tunnel_grp2tbl_match_cb,
8947                                            mlx5_flow_tunnel_grp2tbl_remove_cb,
8948                                            mlx5_flow_tunnel_grp2tbl_clone_cb,
8949                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
8950         if (!tunnel->groups) {
8951                 mlx5_ipool_free(ipool, id);
8952                 return NULL;
8953         }
8954         /* initiate new PMD tunnel */
8955         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
8956         tunnel->tunnel_id = id;
8957         tunnel->action.type = (typeof(tunnel->action.type))
8958                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
8959         tunnel->action.conf = tunnel;
8960         tunnel->item.type = (typeof(tunnel->item.type))
8961                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
8962         tunnel->item.spec = tunnel;
8963         tunnel->item.last = NULL;
8964         tunnel->item.mask = NULL;
8965
8966         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
8967                 dev->data->port_id, tunnel->tunnel_id);
8968
8969         return tunnel;
8970 }
8971
8972 struct tunnel_db_get_tunnel_ctx {
8973         const struct rte_flow_tunnel *app_tunnel;
8974         struct mlx5_flow_tunnel *tunnel;
8975 };
8976
8977 static bool get_tunnel_match(struct rte_eth_dev *dev,
8978                              struct mlx5_flow_tunnel *tunnel, const void *x)
8979 {
8980         const struct tunnel_db_get_tunnel_ctx *ctx = x;
8981
8982         RTE_SET_USED(dev);
8983         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
8984                        sizeof(*ctx->app_tunnel));
8985 }
8986
8987 static void get_tunnel_hit(struct rte_eth_dev *dev,
8988                            struct mlx5_flow_tunnel *tunnel, void *x)
8989 {
8990         /* called under tunnel spinlock protection */
8991         struct tunnel_db_get_tunnel_ctx *ctx = x;
8992
8993         RTE_SET_USED(dev);
8994         tunnel->refctn++;
8995         ctx->tunnel = tunnel;
8996 }
8997
8998 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
8999 {
9000         /* called under tunnel spinlock protection */
9001         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9002         struct tunnel_db_get_tunnel_ctx *ctx = x;
9003
9004         rte_spinlock_unlock(&thub->sl);
9005         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
9006         rte_spinlock_lock(&thub->sl);
9007         if (ctx->tunnel) {
9008                 ctx->tunnel->refctn = 1;
9009                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
9010         }
9011 }
9012
9013
9014 static int
9015 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
9016                      const struct rte_flow_tunnel *app_tunnel,
9017                      struct mlx5_flow_tunnel **tunnel)
9018 {
9019         struct tunnel_db_get_tunnel_ctx ctx = {
9020                 .app_tunnel = app_tunnel,
9021         };
9022
9023         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
9024                                       get_tunnel_miss, &ctx, true);
9025         *tunnel = ctx.tunnel;
9026         return ctx.tunnel ? 0 : -ENOMEM;
9027 }
9028
9029 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
9030 {
9031         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
9032
9033         if (!thub)
9034                 return;
9035         if (!LIST_EMPTY(&thub->tunnels))
9036                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
9037         mlx5_hlist_destroy(thub->groups);
9038         mlx5_free(thub);
9039 }
9040
9041 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
9042 {
9043         int err;
9044         struct mlx5_flow_tunnel_hub *thub;
9045
9046         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
9047                            0, SOCKET_ID_ANY);
9048         if (!thub)
9049                 return -ENOMEM;
9050         LIST_INIT(&thub->tunnels);
9051         rte_spinlock_init(&thub->sl);
9052         thub->groups = mlx5_hlist_create("flow groups", 64,
9053                                          false, true, sh,
9054                                          mlx5_flow_tunnel_grp2tbl_create_cb,
9055                                          mlx5_flow_tunnel_grp2tbl_match_cb,
9056                                          mlx5_flow_tunnel_grp2tbl_remove_cb,
9057                                          mlx5_flow_tunnel_grp2tbl_clone_cb,
9058                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9059         if (!thub->groups) {
9060                 err = -rte_errno;
9061                 goto err;
9062         }
9063         sh->tunnel_hub = thub;
9064
9065         return 0;
9066
9067 err:
9068         if (thub->groups)
9069                 mlx5_hlist_destroy(thub->groups);
9070         if (thub)
9071                 mlx5_free(thub);
9072         return err;
9073 }
9074
9075 static inline bool
9076 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
9077                           struct rte_flow_tunnel *tunnel,
9078                           const char *err_msg)
9079 {
9080         err_msg = NULL;
9081         if (!is_tunnel_offload_active(dev)) {
9082                 err_msg = "tunnel offload was not activated";
9083                 goto out;
9084         } else if (!tunnel) {
9085                 err_msg = "no application tunnel";
9086                 goto out;
9087         }
9088
9089         switch (tunnel->type) {
9090         default:
9091                 err_msg = "unsupported tunnel type";
9092                 goto out;
9093         case RTE_FLOW_ITEM_TYPE_VXLAN:
9094                 break;
9095         }
9096
9097 out:
9098         return !err_msg;
9099 }
9100
9101 static int
9102 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
9103                     struct rte_flow_tunnel *app_tunnel,
9104                     struct rte_flow_action **actions,
9105                     uint32_t *num_of_actions,
9106                     struct rte_flow_error *error)
9107 {
9108         int ret;
9109         struct mlx5_flow_tunnel *tunnel;
9110         const char *err_msg = NULL;
9111         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9112
9113         if (!verdict)
9114                 return rte_flow_error_set(error, EINVAL,
9115                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9116                                           err_msg);
9117         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9118         if (ret < 0) {
9119                 return rte_flow_error_set(error, ret,
9120                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9121                                           "failed to initialize pmd tunnel");
9122         }
9123         *actions = &tunnel->action;
9124         *num_of_actions = 1;
9125         return 0;
9126 }
9127
9128 static int
9129 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
9130                        struct rte_flow_tunnel *app_tunnel,
9131                        struct rte_flow_item **items,
9132                        uint32_t *num_of_items,
9133                        struct rte_flow_error *error)
9134 {
9135         int ret;
9136         struct mlx5_flow_tunnel *tunnel;
9137         const char *err_msg = NULL;
9138         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9139
9140         if (!verdict)
9141                 return rte_flow_error_set(error, EINVAL,
9142                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9143                                           err_msg);
9144         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9145         if (ret < 0) {
9146                 return rte_flow_error_set(error, ret,
9147                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9148                                           "failed to initialize pmd tunnel");
9149         }
9150         *items = &tunnel->item;
9151         *num_of_items = 1;
9152         return 0;
9153 }
9154
9155 struct tunnel_db_element_release_ctx {
9156         struct rte_flow_item *items;
9157         struct rte_flow_action *actions;
9158         uint32_t num_elements;
9159         struct rte_flow_error *error;
9160         int ret;
9161 };
9162
9163 static bool
9164 tunnel_element_release_match(struct rte_eth_dev *dev,
9165                              struct mlx5_flow_tunnel *tunnel, const void *x)
9166 {
9167         const struct tunnel_db_element_release_ctx *ctx = x;
9168
9169         RTE_SET_USED(dev);
9170         if (ctx->num_elements != 1)
9171                 return false;
9172         else if (ctx->items)
9173                 return ctx->items == &tunnel->item;
9174         else if (ctx->actions)
9175                 return ctx->actions == &tunnel->action;
9176
9177         return false;
9178 }
9179
9180 static void
9181 tunnel_element_release_hit(struct rte_eth_dev *dev,
9182                            struct mlx5_flow_tunnel *tunnel, void *x)
9183 {
9184         struct tunnel_db_element_release_ctx *ctx = x;
9185         ctx->ret = 0;
9186         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
9187                 mlx5_flow_tunnel_free(dev, tunnel);
9188 }
9189
9190 static void
9191 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
9192 {
9193         struct tunnel_db_element_release_ctx *ctx = x;
9194         RTE_SET_USED(dev);
9195         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
9196                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9197                                       "invalid argument");
9198 }
9199
9200 static int
9201 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
9202                        struct rte_flow_item *pmd_items,
9203                        uint32_t num_items, struct rte_flow_error *err)
9204 {
9205         struct tunnel_db_element_release_ctx ctx = {
9206                 .items = pmd_items,
9207                 .actions = NULL,
9208                 .num_elements = num_items,
9209                 .error = err,
9210         };
9211
9212         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9213                                       tunnel_element_release_hit,
9214                                       tunnel_element_release_miss, &ctx, false);
9215
9216         return ctx.ret;
9217 }
9218
9219 static int
9220 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
9221                          struct rte_flow_action *pmd_actions,
9222                          uint32_t num_actions, struct rte_flow_error *err)
9223 {
9224         struct tunnel_db_element_release_ctx ctx = {
9225                 .items = NULL,
9226                 .actions = pmd_actions,
9227                 .num_elements = num_actions,
9228                 .error = err,
9229         };
9230
9231         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9232                                       tunnel_element_release_hit,
9233                                       tunnel_element_release_miss, &ctx, false);
9234
9235         return ctx.ret;
9236 }
9237
9238 static int
9239 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
9240                                   struct rte_mbuf *m,
9241                                   struct rte_flow_restore_info *info,
9242                                   struct rte_flow_error *err)
9243 {
9244         uint64_t ol_flags = m->ol_flags;
9245         const struct mlx5_flow_tbl_data_entry *tble;
9246         const uint64_t mask = RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID;
9247
9248         if (!is_tunnel_offload_active(dev)) {
9249                 info->flags = 0;
9250                 return 0;
9251         }
9252
9253         if ((ol_flags & mask) != mask)
9254                 goto err;
9255         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
9256         if (!tble) {
9257                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
9258                         dev->data->port_id, m->hash.fdir.hi);
9259                 goto err;
9260         }
9261         MLX5_ASSERT(tble->tunnel);
9262         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
9263         info->group_id = tble->group_id;
9264         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
9265                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
9266                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
9267
9268         return 0;
9269
9270 err:
9271         return rte_flow_error_set(err, EINVAL,
9272                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9273                                   "failed to get restore info");
9274 }
9275
9276 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
9277 static int
9278 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
9279                            __rte_unused struct rte_flow_tunnel *app_tunnel,
9280                            __rte_unused struct rte_flow_action **actions,
9281                            __rte_unused uint32_t *num_of_actions,
9282                            __rte_unused struct rte_flow_error *error)
9283 {
9284         return -ENOTSUP;
9285 }
9286
9287 static int
9288 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
9289                        __rte_unused struct rte_flow_tunnel *app_tunnel,
9290                        __rte_unused struct rte_flow_item **items,
9291                        __rte_unused uint32_t *num_of_items,
9292                        __rte_unused struct rte_flow_error *error)
9293 {
9294         return -ENOTSUP;
9295 }
9296
9297 static int
9298 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
9299                               __rte_unused struct rte_flow_item *pmd_items,
9300                               __rte_unused uint32_t num_items,
9301                               __rte_unused struct rte_flow_error *err)
9302 {
9303         return -ENOTSUP;
9304 }
9305
9306 static int
9307 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
9308                                 __rte_unused struct rte_flow_action *pmd_action,
9309                                 __rte_unused uint32_t num_actions,
9310                                 __rte_unused struct rte_flow_error *err)
9311 {
9312         return -ENOTSUP;
9313 }
9314
9315 static int
9316 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
9317                                   __rte_unused struct rte_mbuf *m,
9318                                   __rte_unused struct rte_flow_restore_info *i,
9319                                   __rte_unused struct rte_flow_error *err)
9320 {
9321         return -ENOTSUP;
9322 }
9323
9324 static int
9325 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
9326                              __rte_unused struct rte_flow *flow,
9327                              __rte_unused const struct rte_flow_attr *attr,
9328                              __rte_unused const struct rte_flow_action *actions,
9329                              __rte_unused uint32_t flow_idx,
9330                              __rte_unused const struct mlx5_flow_tunnel *tunnel,
9331                              __rte_unused struct tunnel_default_miss_ctx *ctx,
9332                              __rte_unused struct rte_flow_error *error)
9333 {
9334         return -ENOTSUP;
9335 }
9336
9337 static struct mlx5_flow_tunnel *
9338 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
9339                     __rte_unused uint32_t id)
9340 {
9341         return NULL;
9342 }
9343
9344 static void
9345 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
9346                       __rte_unused struct mlx5_flow_tunnel *tunnel)
9347 {
9348 }
9349
9350 static uint32_t
9351 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
9352                                 __rte_unused const struct mlx5_flow_tunnel *t,
9353                                 __rte_unused uint32_t group,
9354                                 __rte_unused uint32_t *table,
9355                                 struct rte_flow_error *error)
9356 {
9357         return rte_flow_error_set(error, ENOTSUP,
9358                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9359                                   "tunnel offload requires DV support");
9360 }
9361
9362 void
9363 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
9364                         __rte_unused  uint16_t port_id)
9365 {
9366 }
9367 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
9368
9369 static void
9370 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
9371 {
9372         int ret;
9373         struct rte_flow_error error;
9374
9375         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9376                 char *item_name;
9377                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
9378                                     sizeof(item_name),
9379                                     (void *)(uintptr_t)item->type, &error);
9380                 if (ret > 0)
9381                         printf("%s ", item_name);
9382                 else
9383                         printf("%d\n", (int)item->type);
9384         }
9385         printf("END\n");
9386 }