drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11
  12 /* Verbs header. */
  13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  14 #ifdef PEDANTIC
  15 #pragma GCC diagnostic ignored "-Wpedantic"
  16 #endif
  17 #include <infiniband/verbs.h>
  18 #ifdef PEDANTIC
  19 #pragma GCC diagnostic error "-Wpedantic"
  20 #endif
  21
  22 #include <rte_common.h>
  23 #include <rte_ether.h>
  24 #include <rte_ethdev_driver.h>
  25 #include <rte_flow.h>
  26 #include <rte_flow_driver.h>
  27 #include <rte_malloc.h>
  28 #include <rte_ip.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_flow.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 /* Dev ops structure defined in mlx5.c */
  38 extern const struct eth_dev_ops mlx5_dev_ops;
  39 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
  40
  41 /** Device flow drivers. */
  42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
  44 #endif
  45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  46
  47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  48
  49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  50         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  52         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  53 #endif
  54         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  55         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  56 };
  57
  58 enum mlx5_expansion {
  59         MLX5_EXPANSION_ROOT,
  60         MLX5_EXPANSION_ROOT_OUTER,
  61         MLX5_EXPANSION_ROOT_ETH_VLAN,
  62         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
  63         MLX5_EXPANSION_OUTER_ETH,
  64         MLX5_EXPANSION_OUTER_ETH_VLAN,
  65         MLX5_EXPANSION_OUTER_VLAN,
  66         MLX5_EXPANSION_OUTER_IPV4,
  67         MLX5_EXPANSION_OUTER_IPV4_UDP,
  68         MLX5_EXPANSION_OUTER_IPV4_TCP,
  69         MLX5_EXPANSION_OUTER_IPV6,
  70         MLX5_EXPANSION_OUTER_IPV6_UDP,
  71         MLX5_EXPANSION_OUTER_IPV6_TCP,
  72         MLX5_EXPANSION_VXLAN,
  73         MLX5_EXPANSION_VXLAN_GPE,
  74         MLX5_EXPANSION_GRE,
  75         MLX5_EXPANSION_MPLS,
  76         MLX5_EXPANSION_ETH,
  77         MLX5_EXPANSION_ETH_VLAN,
  78         MLX5_EXPANSION_VLAN,
  79         MLX5_EXPANSION_IPV4,
  80         MLX5_EXPANSION_IPV4_UDP,
  81         MLX5_EXPANSION_IPV4_TCP,
  82         MLX5_EXPANSION_IPV6,
  83         MLX5_EXPANSION_IPV6_UDP,
  84         MLX5_EXPANSION_IPV6_TCP,
  85 };
  86
  87 /** Supported expansion of items. */
  88 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
  89         [MLX5_EXPANSION_ROOT] = {
  90                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
  91                                                  MLX5_EXPANSION_IPV4,
  92                                                  MLX5_EXPANSION_IPV6),
  93                 .type = RTE_FLOW_ITEM_TYPE_END,
  94         },
  95         [MLX5_EXPANSION_ROOT_OUTER] = {
  96                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
  97                                                  MLX5_EXPANSION_OUTER_IPV4,
  98                                                  MLX5_EXPANSION_OUTER_IPV6),
  99                 .type = RTE_FLOW_ITEM_TYPE_END,
 100         },
 101         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 102                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 103                 .type = RTE_FLOW_ITEM_TYPE_END,
 104         },
 105         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 106                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
 107                 .type = RTE_FLOW_ITEM_TYPE_END,
 108         },
 109         [MLX5_EXPANSION_OUTER_ETH] = {
 110                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 111                                                  MLX5_EXPANSION_OUTER_IPV6,
 112                                                  MLX5_EXPANSION_MPLS),
 113                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 114                 .rss_types = 0,
 115         },
 116         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 117                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 118                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 119                 .rss_types = 0,
 120         },
 121         [MLX5_EXPANSION_OUTER_VLAN] = {
 122                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 123                                                  MLX5_EXPANSION_OUTER_IPV6),
 124                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 125         },
 126         [MLX5_EXPANSION_OUTER_IPV4] = {
 127                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 128                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 129                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 130                          MLX5_EXPANSION_GRE,
 131                          MLX5_EXPANSION_IPV4,
 132                          MLX5_EXPANSION_IPV6),
 133                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 134                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 135                         ETH_RSS_NONFRAG_IPV4_OTHER,
 136         },
 137         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 138                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 139                                                  MLX5_EXPANSION_VXLAN_GPE),
 140                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 141                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 142         },
 143         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 144                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 145                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 146         },
 147         [MLX5_EXPANSION_OUTER_IPV6] = {
 148                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 149                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 150                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 151                          MLX5_EXPANSION_IPV4,
 152                          MLX5_EXPANSION_IPV6),
 153                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 154                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 155                         ETH_RSS_NONFRAG_IPV6_OTHER,
 156         },
 157         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 158                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 159                                                  MLX5_EXPANSION_VXLAN_GPE),
 160                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 161                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 162         },
 163         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 164                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 165                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 166         },
 167         [MLX5_EXPANSION_VXLAN] = {
 168                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 169                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 170         },
 171         [MLX5_EXPANSION_VXLAN_GPE] = {
 172                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 173                                                  MLX5_EXPANSION_IPV4,
 174                                                  MLX5_EXPANSION_IPV6),
 175                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 176         },
 177         [MLX5_EXPANSION_GRE] = {
 178                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 179                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 180         },
 181         [MLX5_EXPANSION_MPLS] = {
 182                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 183                                                  MLX5_EXPANSION_IPV6),
 184                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 185         },
 186         [MLX5_EXPANSION_ETH] = {
 187                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 188                                                  MLX5_EXPANSION_IPV6),
 189                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 190         },
 191         [MLX5_EXPANSION_ETH_VLAN] = {
 192                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 193                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 194         },
 195         [MLX5_EXPANSION_VLAN] = {
 196                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 197                                                  MLX5_EXPANSION_IPV6),
 198                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 199         },
 200         [MLX5_EXPANSION_IPV4] = {
 201                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 202                                                  MLX5_EXPANSION_IPV4_TCP),
 203                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 204                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 205                         ETH_RSS_NONFRAG_IPV4_OTHER,
 206         },
 207         [MLX5_EXPANSION_IPV4_UDP] = {
 208                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 209                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 210         },
 211         [MLX5_EXPANSION_IPV4_TCP] = {
 212                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 213                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 214         },
 215         [MLX5_EXPANSION_IPV6] = {
 216                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 217                                                  MLX5_EXPANSION_IPV6_TCP),
 218                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 219                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 220                         ETH_RSS_NONFRAG_IPV6_OTHER,
 221         },
 222         [MLX5_EXPANSION_IPV6_UDP] = {
 223                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 224                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 225         },
 226         [MLX5_EXPANSION_IPV6_TCP] = {
 227                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 228                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 229         },
 230 };
 231
 232 static const struct rte_flow_ops mlx5_flow_ops = {
 233         .validate = mlx5_flow_validate,
 234         .create = mlx5_flow_create,
 235         .destroy = mlx5_flow_destroy,
 236         .flush = mlx5_flow_flush,
 237         .isolate = mlx5_flow_isolate,
 238         .query = mlx5_flow_query,
 239 };
 240
 241 /* Convert FDIR request to Generic flow. */
 242 struct mlx5_fdir {
 243         struct rte_flow_attr attr;
 244         struct rte_flow_item items[4];
 245         struct rte_flow_item_eth l2;
 246         struct rte_flow_item_eth l2_mask;
 247         union {
 248                 struct rte_flow_item_ipv4 ipv4;
 249                 struct rte_flow_item_ipv6 ipv6;
 250         } l3;
 251         union {
 252                 struct rte_flow_item_ipv4 ipv4;
 253                 struct rte_flow_item_ipv6 ipv6;
 254         } l3_mask;
 255         union {
 256                 struct rte_flow_item_udp udp;
 257                 struct rte_flow_item_tcp tcp;
 258         } l4;
 259         union {
 260                 struct rte_flow_item_udp udp;
 261                 struct rte_flow_item_tcp tcp;
 262         } l4_mask;
 263         struct rte_flow_action actions[2];
 264         struct rte_flow_action_queue queue;
 265 };
 266
 267 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
 268 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
 269         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
 270 };
 271
 272 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
 273 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
 274         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
 275         { 9, 10, 11 }, { 12, 13, 14 },
 276 };
 277
 278 /* Tunnel information. */
 279 struct mlx5_flow_tunnel_info {
 280         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 281         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 282 };
 283
 284 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 285         {
 286                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 287                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 288         },
 289         {
 290                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 291                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 292         },
 293         {
 294                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 295                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 296         },
 297         {
 298                 .tunnel = MLX5_FLOW_LAYER_GRE,
 299                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 300         },
 301         {
 302                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 303                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 304         },
 305         {
 306                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 307                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 308         },
 309         {
 310                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 311                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 312         },
 313         {
 314                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 315                 .ptype = RTE_PTYPE_TUNNEL_IP,
 316         },
 317         {
 318                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 319                 .ptype = RTE_PTYPE_TUNNEL_IP,
 320         },
 321 };
 322
 323 /**
 324  * Translate tag ID to register.
 325  *
 326  * @param[in] dev
 327  *   Pointer to the Ethernet device structure.
 328  * @param[in] feature
 329  *   The feature that request the register.
 330  * @param[in] id
 331  *   The request register ID.
 332  * @param[out] error
 333  *   Error description in case of any.
 334  *
 335  * @return
 336  *   The request register on success, a negative errno
 337  *   value otherwise and rte_errno is set.
 338  */
 339 enum modify_reg
 340 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 341                      enum mlx5_feature_name feature,
 342                      uint32_t id,
 343                      struct rte_flow_error *error)
 344 {
 345         struct mlx5_priv *priv = dev->data->dev_private;
 346         struct mlx5_dev_config *config = &priv->config;
 347
 348         switch (feature) {
 349         case MLX5_HAIRPIN_RX:
 350                 return REG_B;
 351         case MLX5_HAIRPIN_TX:
 352                 return REG_A;
 353         case MLX5_METADATA_RX:
 354                 switch (config->dv_xmeta_en) {
 355                 case MLX5_XMETA_MODE_LEGACY:
 356                         return REG_B;
 357                 case MLX5_XMETA_MODE_META16:
 358                         return REG_C_0;
 359                 case MLX5_XMETA_MODE_META32:
 360                         return REG_C_1;
 361                 }
 362                 break;
 363         case MLX5_METADATA_TX:
 364                 return REG_A;
 365         case MLX5_METADATA_FDB:
 366                 return REG_C_0;
 367         case MLX5_FLOW_MARK:
 368                 switch (config->dv_xmeta_en) {
 369                 case MLX5_XMETA_MODE_LEGACY:
 370                         return REG_NONE;
 371                 case MLX5_XMETA_MODE_META16:
 372                         return REG_C_1;
 373                 case MLX5_XMETA_MODE_META32:
 374                         return REG_C_0;
 375                 }
 376                 break;
 377         case MLX5_COPY_MARK:
 378                 return REG_C_3;
 379         case MLX5_APP_TAG:
 380                 /*
 381                  * Suppose engaging reg_c_2 .. reg_c_7 registers.
 382                  * reg_c_2 is reserved for coloring by meters.
 383                  * reg_c_3 is reserved for split flows TAG.
 384                  */
 385                 if (id > (REG_C_7 - REG_C_4))
 386                         return rte_flow_error_set
 387                                         (error, EINVAL,
 388                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 389                                          NULL, "invalid tag id");
 390                 if (config->flow_mreg_c[id + REG_C_4 - REG_C_0] == REG_NONE)
 391                         return rte_flow_error_set
 392                                         (error, ENOTSUP,
 393                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 394                                          NULL, "unsupported tag id");
 395                 return config->flow_mreg_c[id + REG_C_4 - REG_C_0];
 396         }
 397         assert(false);
 398         return rte_flow_error_set(error, EINVAL,
 399                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 400                                   NULL, "invalid feature name");
 401 }
 402
 403 /**
 404  * Check extensive flow metadata register support.
 405  *
 406  * @param dev
 407  *   Pointer to rte_eth_dev structure.
 408  *
 409  * @return
 410  *   True if device supports extensive flow metadata register, otherwise false.
 411  */
 412 bool
 413 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 414 {
 415         struct mlx5_priv *priv = dev->data->dev_private;
 416         struct mlx5_dev_config *config = &priv->config;
 417
 418         /*
 419          * Having available reg_c can be regarded inclusively as supporting
 420          * extensive flow metadata register, which could mean,
 421          * - metadata register copy action by modify header.
 422          * - 16 modify header actions is supported.
 423          * - reg_c's are preserved across different domain (FDB and NIC) on
 424          *   packet loopback by flow lookup miss.
 425          */
 426         return config->flow_mreg_c[2] != REG_NONE;
 427 }
 428
 429 /**
 430  * Discover the maximum number of priority available.
 431  *
 432  * @param[in] dev
 433  *   Pointer to the Ethernet device structure.
 434  *
 435  * @return
 436  *   number of supported flow priority on success, a negative errno
 437  *   value otherwise and rte_errno is set.
 438  */
 439 int
 440 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 441 {
 442         struct mlx5_priv *priv = dev->data->dev_private;
 443         struct {
 444                 struct ibv_flow_attr attr;
 445                 struct ibv_flow_spec_eth eth;
 446                 struct ibv_flow_spec_action_drop drop;
 447         } flow_attr = {
 448                 .attr = {
 449                         .num_of_specs = 2,
 450                         .port = (uint8_t)priv->ibv_port,
 451                 },
 452                 .eth = {
 453                         .type = IBV_FLOW_SPEC_ETH,
 454                         .size = sizeof(struct ibv_flow_spec_eth),
 455                 },
 456                 .drop = {
 457                         .size = sizeof(struct ibv_flow_spec_action_drop),
 458                         .type = IBV_FLOW_SPEC_ACTION_DROP,
 459                 },
 460         };
 461         struct ibv_flow *flow;
 462         struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
 463         uint16_t vprio[] = { 8, 16 };
 464         int i;
 465         int priority = 0;
 466
 467         if (!drop) {
 468                 rte_errno = ENOTSUP;
 469                 return -rte_errno;
 470         }
 471         for (i = 0; i != RTE_DIM(vprio); i++) {
 472                 flow_attr.attr.priority = vprio[i] - 1;
 473                 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
 474                 if (!flow)
 475                         break;
 476                 claim_zero(mlx5_glue->destroy_flow(flow));
 477                 priority = vprio[i];
 478         }
 479         mlx5_hrxq_drop_release(dev);
 480         switch (priority) {
 481         case 8:
 482                 priority = RTE_DIM(priority_map_3);
 483                 break;
 484         case 16:
 485                 priority = RTE_DIM(priority_map_5);
 486                 break;
 487         default:
 488                 rte_errno = ENOTSUP;
 489                 DRV_LOG(ERR,
 490                         "port %u verbs maximum priority: %d expected 8/16",
 491                         dev->data->port_id, priority);
 492                 return -rte_errno;
 493         }
 494         DRV_LOG(INFO, "port %u flow maximum priority: %d",
 495                 dev->data->port_id, priority);
 496         return priority;
 497 }
 498
 499 /**
 500  * Adjust flow priority based on the highest layer and the request priority.
 501  *
 502  * @param[in] dev
 503  *   Pointer to the Ethernet device structure.
 504  * @param[in] priority
 505  *   The rule base priority.
 506  * @param[in] subpriority
 507  *   The priority based on the items.
 508  *
 509  * @return
 510  *   The new priority.
 511  */
 512 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 513                                    uint32_t subpriority)
 514 {
 515         uint32_t res = 0;
 516         struct mlx5_priv *priv = dev->data->dev_private;
 517
 518         switch (priv->config.flow_prio) {
 519         case RTE_DIM(priority_map_3):
 520                 res = priority_map_3[priority][subpriority];
 521                 break;
 522         case RTE_DIM(priority_map_5):
 523                 res = priority_map_5[priority][subpriority];
 524                 break;
 525         }
 526         return  res;
 527 }
 528
 529 /**
 530  * Verify the @p item specifications (spec, last, mask) are compatible with the
 531  * NIC capabilities.
 532  *
 533  * @param[in] item
 534  *   Item specification.
 535  * @param[in] mask
 536  *   @p item->mask or flow default bit-masks.
 537  * @param[in] nic_mask
 538  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 539  * @param[in] size
 540  *   Bit-masks size in bytes.
 541  * @param[out] error
 542  *   Pointer to error structure.
 543  *
 544  * @return
 545  *   0 on success, a negative errno value otherwise and rte_errno is set.
 546  */
 547 int
 548 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 549                           const uint8_t *mask,
 550                           const uint8_t *nic_mask,
 551                           unsigned int size,
 552                           struct rte_flow_error *error)
 553 {
 554         unsigned int i;
 555
 556         assert(nic_mask);
 557         for (i = 0; i < size; ++i)
 558                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 559                         return rte_flow_error_set(error, ENOTSUP,
 560                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 561                                                   item,
 562                                                   "mask enables non supported"
 563                                                   " bits");
 564         if (!item->spec && (item->mask || item->last))
 565                 return rte_flow_error_set(error, EINVAL,
 566                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 567                                           "mask/last without a spec is not"
 568                                           " supported");
 569         if (item->spec && item->last) {
 570                 uint8_t spec[size];
 571                 uint8_t last[size];
 572                 unsigned int i;
 573                 int ret;
 574
 575                 for (i = 0; i < size; ++i) {
 576                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 577                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 578                 }
 579                 ret = memcmp(spec, last, size);
 580                 if (ret != 0)
 581                         return rte_flow_error_set(error, EINVAL,
 582                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 583                                                   item,
 584                                                   "range is not valid");
 585         }
 586         return 0;
 587 }
 588
 589 /**
 590  * Adjust the hash fields according to the @p flow information.
 591  *
 592  * @param[in] dev_flow.
 593  *   Pointer to the mlx5_flow.
 594  * @param[in] tunnel
 595  *   1 when the hash field is for a tunnel item.
 596  * @param[in] layer_types
 597  *   ETH_RSS_* types.
 598  * @param[in] hash_fields
 599  *   Item hash fields.
 600  *
 601  * @return
 602  *   The hash fields that should be used.
 603  */
 604 uint64_t
 605 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
 606                             int tunnel __rte_unused, uint64_t layer_types,
 607                             uint64_t hash_fields)
 608 {
 609         struct rte_flow *flow = dev_flow->flow;
 610 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 611         int rss_request_inner = flow->rss.level >= 2;
 612
 613         /* Check RSS hash level for tunnel. */
 614         if (tunnel && rss_request_inner)
 615                 hash_fields |= IBV_RX_HASH_INNER;
 616         else if (tunnel || rss_request_inner)
 617                 return 0;
 618 #endif
 619         /* Check if requested layer matches RSS hash fields. */
 620         if (!(flow->rss.types & layer_types))
 621                 return 0;
 622         return hash_fields;
 623 }
 624
 625 /**
 626  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 627  * if several tunnel rules are used on this queue, the tunnel ptype will be
 628  * cleared.
 629  *
 630  * @param rxq_ctrl
 631  *   Rx queue to update.
 632  */
 633 static void
 634 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 635 {
 636         unsigned int i;
 637         uint32_t tunnel_ptype = 0;
 638
 639         /* Look up for the ptype to use. */
 640         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 641                 if (!rxq_ctrl->flow_tunnels_n[i])
 642                         continue;
 643                 if (!tunnel_ptype) {
 644                         tunnel_ptype = tunnels_info[i].ptype;
 645                 } else {
 646                         tunnel_ptype = 0;
 647                         break;
 648                 }
 649         }
 650         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 651 }
 652
 653 /**
 654  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 655  * flow.
 656  *
 657  * @param[in] dev
 658  *   Pointer to the Ethernet device structure.
 659  * @param[in] dev_flow
 660  *   Pointer to device flow structure.
 661  */
 662 static void
 663 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 664 {
 665         struct mlx5_priv *priv = dev->data->dev_private;
 666         struct rte_flow *flow = dev_flow->flow;
 667         const int mark = !!(dev_flow->actions &
 668                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 669         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 670         unsigned int i;
 671
 672         for (i = 0; i != flow->rss.queue_num; ++i) {
 673                 int idx = (*flow->rss.queue)[i];
 674                 struct mlx5_rxq_ctrl *rxq_ctrl =
 675                         container_of((*priv->rxqs)[idx],
 676                                      struct mlx5_rxq_ctrl, rxq);
 677
 678                 if (mark) {
 679                         rxq_ctrl->rxq.mark = 1;
 680                         rxq_ctrl->flow_mark_n++;
 681                 }
 682                 if (tunnel) {
 683                         unsigned int j;
 684
 685                         /* Increase the counter matching the flow. */
 686                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 687                                 if ((tunnels_info[j].tunnel &
 688                                      dev_flow->layers) ==
 689                                     tunnels_info[j].tunnel) {
 690                                         rxq_ctrl->flow_tunnels_n[j]++;
 691                                         break;
 692                                 }
 693                         }
 694                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 695                 }
 696         }
 697 }
 698
 699 /**
 700  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
 701  *
 702  * @param[in] dev
 703  *   Pointer to the Ethernet device structure.
 704  * @param[in] flow
 705  *   Pointer to flow structure.
 706  */
 707 static void
 708 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
 709 {
 710         struct mlx5_flow *dev_flow;
 711
 712         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 713                 flow_drv_rxq_flags_set(dev, dev_flow);
 714 }
 715
 716 /**
 717  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 718  * device flow if no other flow uses it with the same kind of request.
 719  *
 720  * @param dev
 721  *   Pointer to Ethernet device.
 722  * @param[in] dev_flow
 723  *   Pointer to the device flow.
 724  */
 725 static void
 726 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 727 {
 728         struct mlx5_priv *priv = dev->data->dev_private;
 729         struct rte_flow *flow = dev_flow->flow;
 730         const int mark = !!(dev_flow->actions &
 731                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 732         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 733         unsigned int i;
 734
 735         assert(dev->data->dev_started);
 736         for (i = 0; i != flow->rss.queue_num; ++i) {
 737                 int idx = (*flow->rss.queue)[i];
 738                 struct mlx5_rxq_ctrl *rxq_ctrl =
 739                         container_of((*priv->rxqs)[idx],
 740                                      struct mlx5_rxq_ctrl, rxq);
 741
 742                 if (mark) {
 743                         rxq_ctrl->flow_mark_n--;
 744                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
 745                 }
 746                 if (tunnel) {
 747                         unsigned int j;
 748
 749                         /* Decrease the counter matching the flow. */
 750                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 751                                 if ((tunnels_info[j].tunnel &
 752                                      dev_flow->layers) ==
 753                                     tunnels_info[j].tunnel) {
 754                                         rxq_ctrl->flow_tunnels_n[j]--;
 755                                         break;
 756                                 }
 757                         }
 758                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 759                 }
 760         }
 761 }
 762
 763 /**
 764  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 765  * @p flow if no other flow uses it with the same kind of request.
 766  *
 767  * @param dev
 768  *   Pointer to Ethernet device.
 769  * @param[in] flow
 770  *   Pointer to the flow.
 771  */
 772 static void
 773 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
 774 {
 775         struct mlx5_flow *dev_flow;
 776
 777         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 778                 flow_drv_rxq_flags_trim(dev, dev_flow);
 779 }
 780
 781 /**
 782  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
 783  *
 784  * @param dev
 785  *   Pointer to Ethernet device.
 786  */
 787 static void
 788 flow_rxq_flags_clear(struct rte_eth_dev *dev)
 789 {
 790         struct mlx5_priv *priv = dev->data->dev_private;
 791         unsigned int i;
 792
 793         for (i = 0; i != priv->rxqs_n; ++i) {
 794                 struct mlx5_rxq_ctrl *rxq_ctrl;
 795                 unsigned int j;
 796
 797                 if (!(*priv->rxqs)[i])
 798                         continue;
 799                 rxq_ctrl = container_of((*priv->rxqs)[i],
 800                                         struct mlx5_rxq_ctrl, rxq);
 801                 rxq_ctrl->flow_mark_n = 0;
 802                 rxq_ctrl->rxq.mark = 0;
 803                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
 804                         rxq_ctrl->flow_tunnels_n[j] = 0;
 805                 rxq_ctrl->rxq.tunnel = 0;
 806         }
 807 }
 808
 809 /*
 810  * return a pointer to the desired action in the list of actions.
 811  *
 812  * @param[in] actions
 813  *   The list of actions to search the action in.
 814  * @param[in] action
 815  *   The action to find.
 816  *
 817  * @return
 818  *   Pointer to the action in the list, if found. NULL otherwise.
 819  */
 820 const struct rte_flow_action *
 821 mlx5_flow_find_action(const struct rte_flow_action *actions,
 822                       enum rte_flow_action_type action)
 823 {
 824         if (actions == NULL)
 825                 return NULL;
 826         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
 827                 if (actions->type == action)
 828                         return actions;
 829         return NULL;
 830 }
 831
 832 /*
 833  * Validate the flag action.
 834  *
 835  * @param[in] action_flags
 836  *   Bit-fields that holds the actions detected until now.
 837  * @param[in] attr
 838  *   Attributes of flow that includes this action.
 839  * @param[out] error
 840  *   Pointer to error structure.
 841  *
 842  * @return
 843  *   0 on success, a negative errno value otherwise and rte_errno is set.
 844  */
 845 int
 846 mlx5_flow_validate_action_flag(uint64_t action_flags,
 847                                const struct rte_flow_attr *attr,
 848                                struct rte_flow_error *error)
 849 {
 850
 851         if (action_flags & MLX5_FLOW_ACTION_DROP)
 852                 return rte_flow_error_set(error, EINVAL,
 853                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 854                                           "can't drop and flag in same flow");
 855         if (action_flags & MLX5_FLOW_ACTION_MARK)
 856                 return rte_flow_error_set(error, EINVAL,
 857                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 858                                           "can't mark and flag in same flow");
 859         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 860                 return rte_flow_error_set(error, EINVAL,
 861                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 862                                           "can't have 2 flag"
 863                                           " actions in same flow");
 864         if (attr->egress)
 865                 return rte_flow_error_set(error, ENOTSUP,
 866                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 867                                           "flag action not supported for "
 868                                           "egress");
 869         return 0;
 870 }
 871
 872 /*
 873  * Validate the mark action.
 874  *
 875  * @param[in] action
 876  *   Pointer to the queue action.
 877  * @param[in] action_flags
 878  *   Bit-fields that holds the actions detected until now.
 879  * @param[in] attr
 880  *   Attributes of flow that includes this action.
 881  * @param[out] error
 882  *   Pointer to error structure.
 883  *
 884  * @return
 885  *   0 on success, a negative errno value otherwise and rte_errno is set.
 886  */
 887 int
 888 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
 889                                uint64_t action_flags,
 890                                const struct rte_flow_attr *attr,
 891                                struct rte_flow_error *error)
 892 {
 893         const struct rte_flow_action_mark *mark = action->conf;
 894
 895         if (!mark)
 896                 return rte_flow_error_set(error, EINVAL,
 897                                           RTE_FLOW_ERROR_TYPE_ACTION,
 898                                           action,
 899                                           "configuration cannot be null");
 900         if (mark->id >= MLX5_FLOW_MARK_MAX)
 901                 return rte_flow_error_set(error, EINVAL,
 902                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 903                                           &mark->id,
 904                                           "mark id must in 0 <= id < "
 905                                           RTE_STR(MLX5_FLOW_MARK_MAX));
 906         if (action_flags & MLX5_FLOW_ACTION_DROP)
 907                 return rte_flow_error_set(error, EINVAL,
 908                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 909                                           "can't drop and mark in same flow");
 910         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 911                 return rte_flow_error_set(error, EINVAL,
 912                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 913                                           "can't flag and mark in same flow");
 914         if (action_flags & MLX5_FLOW_ACTION_MARK)
 915                 return rte_flow_error_set(error, EINVAL,
 916                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 917                                           "can't have 2 mark actions in same"
 918                                           " flow");
 919         if (attr->egress)
 920                 return rte_flow_error_set(error, ENOTSUP,
 921                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 922                                           "mark action not supported for "
 923                                           "egress");
 924         return 0;
 925 }
 926
 927 /*
 928  * Validate the drop action.
 929  *
 930  * @param[in] action_flags
 931  *   Bit-fields that holds the actions detected until now.
 932  * @param[in] attr
 933  *   Attributes of flow that includes this action.
 934  * @param[out] error
 935  *   Pointer to error structure.
 936  *
 937  * @return
 938  *   0 on success, a negative errno value otherwise and rte_errno is set.
 939  */
 940 int
 941 mlx5_flow_validate_action_drop(uint64_t action_flags,
 942                                const struct rte_flow_attr *attr,
 943                                struct rte_flow_error *error)
 944 {
 945         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 946                 return rte_flow_error_set(error, EINVAL,
 947                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 948                                           "can't drop and flag in same flow");
 949         if (action_flags & MLX5_FLOW_ACTION_MARK)
 950                 return rte_flow_error_set(error, EINVAL,
 951                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 952                                           "can't drop and mark in same flow");
 953         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
 954                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
 955                 return rte_flow_error_set(error, EINVAL,
 956                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 957                                           "can't have 2 fate actions in"
 958                                           " same flow");
 959         if (attr->egress)
 960                 return rte_flow_error_set(error, ENOTSUP,
 961                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 962                                           "drop action not supported for "
 963                                           "egress");
 964         return 0;
 965 }
 966
 967 /*
 968  * Validate the queue action.
 969  *
 970  * @param[in] action
 971  *   Pointer to the queue action.
 972  * @param[in] action_flags
 973  *   Bit-fields that holds the actions detected until now.
 974  * @param[in] dev
 975  *   Pointer to the Ethernet device structure.
 976  * @param[in] attr
 977  *   Attributes of flow that includes this action.
 978  * @param[out] error
 979  *   Pointer to error structure.
 980  *
 981  * @return
 982  *   0 on success, a negative errno value otherwise and rte_errno is set.
 983  */
 984 int
 985 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
 986                                 uint64_t action_flags,
 987                                 struct rte_eth_dev *dev,
 988                                 const struct rte_flow_attr *attr,
 989                                 struct rte_flow_error *error)
 990 {
 991         struct mlx5_priv *priv = dev->data->dev_private;
 992         const struct rte_flow_action_queue *queue = action->conf;
 993
 994         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
 995                 return rte_flow_error_set(error, EINVAL,
 996                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 997                                           "can't have 2 fate actions in"
 998                                           " same flow");
 999         if (!priv->rxqs_n)
1000                 return rte_flow_error_set(error, EINVAL,
1001                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1002                                           NULL, "No Rx queues configured");
1003         if (queue->index >= priv->rxqs_n)
1004                 return rte_flow_error_set(error, EINVAL,
1005                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1006                                           &queue->index,
1007                                           "queue index out of range");
1008         if (!(*priv->rxqs)[queue->index])
1009                 return rte_flow_error_set(error, EINVAL,
1010                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1011                                           &queue->index,
1012                                           "queue is not configured");
1013         if (attr->egress)
1014                 return rte_flow_error_set(error, ENOTSUP,
1015                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1016                                           "queue action not supported for "
1017                                           "egress");
1018         return 0;
1019 }
1020
1021 /*
1022  * Validate the rss action.
1023  *
1024  * @param[in] action
1025  *   Pointer to the queue action.
1026  * @param[in] action_flags
1027  *   Bit-fields that holds the actions detected until now.
1028  * @param[in] dev
1029  *   Pointer to the Ethernet device structure.
1030  * @param[in] attr
1031  *   Attributes of flow that includes this action.
1032  * @param[in] item_flags
1033  *   Items that were detected.
1034  * @param[out] error
1035  *   Pointer to error structure.
1036  *
1037  * @return
1038  *   0 on success, a negative errno value otherwise and rte_errno is set.
1039  */
1040 int
1041 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1042                               uint64_t action_flags,
1043                               struct rte_eth_dev *dev,
1044                               const struct rte_flow_attr *attr,
1045                               uint64_t item_flags,
1046                               struct rte_flow_error *error)
1047 {
1048         struct mlx5_priv *priv = dev->data->dev_private;
1049         const struct rte_flow_action_rss *rss = action->conf;
1050         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1051         unsigned int i;
1052
1053         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1054                 return rte_flow_error_set(error, EINVAL,
1055                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1056                                           "can't have 2 fate actions"
1057                                           " in same flow");
1058         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1059             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1060                 return rte_flow_error_set(error, ENOTSUP,
1061                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1062                                           &rss->func,
1063                                           "RSS hash function not supported");
1064 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1065         if (rss->level > 2)
1066 #else
1067         if (rss->level > 1)
1068 #endif
1069                 return rte_flow_error_set(error, ENOTSUP,
1070                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1071                                           &rss->level,
1072                                           "tunnel RSS is not supported");
1073         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1074         if (rss->key_len == 0 && rss->key != NULL)
1075                 return rte_flow_error_set(error, ENOTSUP,
1076                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1077                                           &rss->key_len,
1078                                           "RSS hash key length 0");
1079         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1080                 return rte_flow_error_set(error, ENOTSUP,
1081                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1082                                           &rss->key_len,
1083                                           "RSS hash key too small");
1084         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1085                 return rte_flow_error_set(error, ENOTSUP,
1086                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1087                                           &rss->key_len,
1088                                           "RSS hash key too large");
1089         if (rss->queue_num > priv->config.ind_table_max_size)
1090                 return rte_flow_error_set(error, ENOTSUP,
1091                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1092                                           &rss->queue_num,
1093                                           "number of queues too large");
1094         if (rss->types & MLX5_RSS_HF_MASK)
1095                 return rte_flow_error_set(error, ENOTSUP,
1096                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1097                                           &rss->types,
1098                                           "some RSS protocols are not"
1099                                           " supported");
1100         if (!priv->rxqs_n)
1101                 return rte_flow_error_set(error, EINVAL,
1102                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1103                                           NULL, "No Rx queues configured");
1104         if (!rss->queue_num)
1105                 return rte_flow_error_set(error, EINVAL,
1106                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1107                                           NULL, "No queues configured");
1108         for (i = 0; i != rss->queue_num; ++i) {
1109                 if (!(*priv->rxqs)[rss->queue[i]])
1110                         return rte_flow_error_set
1111                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1112                                  &rss->queue[i], "queue is not configured");
1113         }
1114         if (attr->egress)
1115                 return rte_flow_error_set(error, ENOTSUP,
1116                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1117                                           "rss action not supported for "
1118                                           "egress");
1119         if (rss->level > 1 &&  !tunnel)
1120                 return rte_flow_error_set(error, EINVAL,
1121                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1122                                           "inner RSS is not supported for "
1123                                           "non-tunnel flows");
1124         return 0;
1125 }
1126
1127 /*
1128  * Validate the count action.
1129  *
1130  * @param[in] dev
1131  *   Pointer to the Ethernet device structure.
1132  * @param[in] attr
1133  *   Attributes of flow that includes this action.
1134  * @param[out] error
1135  *   Pointer to error structure.
1136  *
1137  * @return
1138  *   0 on success, a negative errno value otherwise and rte_errno is set.
1139  */
1140 int
1141 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1142                                 const struct rte_flow_attr *attr,
1143                                 struct rte_flow_error *error)
1144 {
1145         if (attr->egress)
1146                 return rte_flow_error_set(error, ENOTSUP,
1147                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1148                                           "count action not supported for "
1149                                           "egress");
1150         return 0;
1151 }
1152
1153 /**
1154  * Verify the @p attributes will be correctly understood by the NIC and store
1155  * them in the @p flow if everything is correct.
1156  *
1157  * @param[in] dev
1158  *   Pointer to the Ethernet device structure.
1159  * @param[in] attributes
1160  *   Pointer to flow attributes
1161  * @param[out] error
1162  *   Pointer to error structure.
1163  *
1164  * @return
1165  *   0 on success, a negative errno value otherwise and rte_errno is set.
1166  */
1167 int
1168 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1169                               const struct rte_flow_attr *attributes,
1170                               struct rte_flow_error *error)
1171 {
1172         struct mlx5_priv *priv = dev->data->dev_private;
1173         uint32_t priority_max = priv->config.flow_prio - 1;
1174
1175         if (attributes->group)
1176                 return rte_flow_error_set(error, ENOTSUP,
1177                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1178                                           NULL, "groups is not supported");
1179         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1180             attributes->priority >= priority_max)
1181                 return rte_flow_error_set(error, ENOTSUP,
1182                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1183                                           NULL, "priority out of range");
1184         if (attributes->egress)
1185                 return rte_flow_error_set(error, ENOTSUP,
1186                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1187                                           "egress is not supported");
1188         if (attributes->transfer && !priv->config.dv_esw_en)
1189                 return rte_flow_error_set(error, ENOTSUP,
1190                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1191                                           NULL, "transfer is not supported");
1192         if (!attributes->ingress)
1193                 return rte_flow_error_set(error, EINVAL,
1194                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1195                                           NULL,
1196                                           "ingress attribute is mandatory");
1197         return 0;
1198 }
1199
1200 /**
1201  * Validate ICMP6 item.
1202  *
1203  * @param[in] item
1204  *   Item specification.
1205  * @param[in] item_flags
1206  *   Bit-fields that holds the items detected until now.
1207  * @param[out] error
1208  *   Pointer to error structure.
1209  *
1210  * @return
1211  *   0 on success, a negative errno value otherwise and rte_errno is set.
1212  */
1213 int
1214 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1215                                uint64_t item_flags,
1216                                uint8_t target_protocol,
1217                                struct rte_flow_error *error)
1218 {
1219         const struct rte_flow_item_icmp6 *mask = item->mask;
1220         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1221         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1222                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1223         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1224                                       MLX5_FLOW_LAYER_OUTER_L4;
1225         int ret;
1226
1227         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1228                 return rte_flow_error_set(error, EINVAL,
1229                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1230                                           "protocol filtering not compatible"
1231                                           " with ICMP6 layer");
1232         if (!(item_flags & l3m))
1233                 return rte_flow_error_set(error, EINVAL,
1234                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1235                                           "IPv6 is mandatory to filter on"
1236                                           " ICMP6");
1237         if (item_flags & l4m)
1238                 return rte_flow_error_set(error, EINVAL,
1239                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1240                                           "multiple L4 layers not supported");
1241         if (!mask)
1242                 mask = &rte_flow_item_icmp6_mask;
1243         ret = mlx5_flow_item_acceptable
1244                 (item, (const uint8_t *)mask,
1245                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1246                  sizeof(struct rte_flow_item_icmp6), error);
1247         if (ret < 0)
1248                 return ret;
1249         return 0;
1250 }
1251
1252 /**
1253  * Validate ICMP item.
1254  *
1255  * @param[in] item
1256  *   Item specification.
1257  * @param[in] item_flags
1258  *   Bit-fields that holds the items detected until now.
1259  * @param[out] error
1260  *   Pointer to error structure.
1261  *
1262  * @return
1263  *   0 on success, a negative errno value otherwise and rte_errno is set.
1264  */
1265 int
1266 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1267                              uint64_t item_flags,
1268                              uint8_t target_protocol,
1269                              struct rte_flow_error *error)
1270 {
1271         const struct rte_flow_item_icmp *mask = item->mask;
1272         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1273         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1274                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1275         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1276                                       MLX5_FLOW_LAYER_OUTER_L4;
1277         int ret;
1278
1279         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1280                 return rte_flow_error_set(error, EINVAL,
1281                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1282                                           "protocol filtering not compatible"
1283                                           " with ICMP layer");
1284         if (!(item_flags & l3m))
1285                 return rte_flow_error_set(error, EINVAL,
1286                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1287                                           "IPv4 is mandatory to filter"
1288                                           " on ICMP");
1289         if (item_flags & l4m)
1290                 return rte_flow_error_set(error, EINVAL,
1291                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1292                                           "multiple L4 layers not supported");
1293         if (!mask)
1294                 mask = &rte_flow_item_icmp_mask;
1295         ret = mlx5_flow_item_acceptable
1296                 (item, (const uint8_t *)mask,
1297                  (const uint8_t *)&rte_flow_item_icmp_mask,
1298                  sizeof(struct rte_flow_item_icmp), error);
1299         if (ret < 0)
1300                 return ret;
1301         return 0;
1302 }
1303
1304 /**
1305  * Validate Ethernet item.
1306  *
1307  * @param[in] item
1308  *   Item specification.
1309  * @param[in] item_flags
1310  *   Bit-fields that holds the items detected until now.
1311  * @param[out] error
1312  *   Pointer to error structure.
1313  *
1314  * @return
1315  *   0 on success, a negative errno value otherwise and rte_errno is set.
1316  */
1317 int
1318 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1319                             uint64_t item_flags,
1320                             struct rte_flow_error *error)
1321 {
1322         const struct rte_flow_item_eth *mask = item->mask;
1323         const struct rte_flow_item_eth nic_mask = {
1324                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1325                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1326                 .type = RTE_BE16(0xffff),
1327         };
1328         int ret;
1329         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1330         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1331                                        MLX5_FLOW_LAYER_OUTER_L2;
1332
1333         if (item_flags & ethm)
1334                 return rte_flow_error_set(error, ENOTSUP,
1335                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1336                                           "multiple L2 layers not supported");
1337         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1338             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1339                 return rte_flow_error_set(error, EINVAL,
1340                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1341                                           "L2 layer should not follow "
1342                                           "L3 layers");
1343         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1344             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1345                 return rte_flow_error_set(error, EINVAL,
1346                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1347                                           "L2 layer should not follow VLAN");
1348         if (!mask)
1349                 mask = &rte_flow_item_eth_mask;
1350         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1351                                         (const uint8_t *)&nic_mask,
1352                                         sizeof(struct rte_flow_item_eth),
1353                                         error);
1354         return ret;
1355 }
1356
1357 /**
1358  * Validate VLAN item.
1359  *
1360  * @param[in] item
1361  *   Item specification.
1362  * @param[in] item_flags
1363  *   Bit-fields that holds the items detected until now.
1364  * @param[in] dev
1365  *   Ethernet device flow is being created on.
1366  * @param[out] error
1367  *   Pointer to error structure.
1368  *
1369  * @return
1370  *   0 on success, a negative errno value otherwise and rte_errno is set.
1371  */
1372 int
1373 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1374                              uint64_t item_flags,
1375                              struct rte_eth_dev *dev,
1376                              struct rte_flow_error *error)
1377 {
1378         const struct rte_flow_item_vlan *spec = item->spec;
1379         const struct rte_flow_item_vlan *mask = item->mask;
1380         const struct rte_flow_item_vlan nic_mask = {
1381                 .tci = RTE_BE16(UINT16_MAX),
1382                 .inner_type = RTE_BE16(UINT16_MAX),
1383         };
1384         uint16_t vlan_tag = 0;
1385         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1386         int ret;
1387         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1388                                         MLX5_FLOW_LAYER_INNER_L4) :
1389                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1390                                         MLX5_FLOW_LAYER_OUTER_L4);
1391         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1392                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1393
1394         if (item_flags & vlanm)
1395                 return rte_flow_error_set(error, EINVAL,
1396                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1397                                           "multiple VLAN layers not supported");
1398         else if ((item_flags & l34m) != 0)
1399                 return rte_flow_error_set(error, EINVAL,
1400                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1401                                           "VLAN cannot follow L3/L4 layer");
1402         if (!mask)
1403                 mask = &rte_flow_item_vlan_mask;
1404         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1405                                         (const uint8_t *)&nic_mask,
1406                                         sizeof(struct rte_flow_item_vlan),
1407                                         error);
1408         if (ret)
1409                 return ret;
1410         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1411                 struct mlx5_priv *priv = dev->data->dev_private;
1412
1413                 if (priv->vmwa_context) {
1414                         /*
1415                          * Non-NULL context means we have a virtual machine
1416                          * and SR-IOV enabled, we have to create VLAN interface
1417                          * to make hypervisor to setup E-Switch vport
1418                          * context correctly. We avoid creating the multiple
1419                          * VLAN interfaces, so we cannot support VLAN tag mask.
1420                          */
1421                         return rte_flow_error_set(error, EINVAL,
1422                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1423                                                   item,
1424                                                   "VLAN tag mask is not"
1425                                                   " supported in virtual"
1426                                                   " environment");
1427                 }
1428         }
1429         if (spec) {
1430                 vlan_tag = spec->tci;
1431                 vlan_tag &= mask->tci;
1432         }
1433         /*
1434          * From verbs perspective an empty VLAN is equivalent
1435          * to a packet without VLAN layer.
1436          */
1437         if (!vlan_tag)
1438                 return rte_flow_error_set(error, EINVAL,
1439                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1440                                           item->spec,
1441                                           "VLAN cannot be empty");
1442         return 0;
1443 }
1444
1445 /**
1446  * Validate IPV4 item.
1447  *
1448  * @param[in] item
1449  *   Item specification.
1450  * @param[in] item_flags
1451  *   Bit-fields that holds the items detected until now.
1452  * @param[in] acc_mask
1453  *   Acceptable mask, if NULL default internal default mask
1454  *   will be used to check whether item fields are supported.
1455  * @param[out] error
1456  *   Pointer to error structure.
1457  *
1458  * @return
1459  *   0 on success, a negative errno value otherwise and rte_errno is set.
1460  */
1461 int
1462 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1463                              uint64_t item_flags,
1464                              uint64_t last_item,
1465                              uint16_t ether_type,
1466                              const struct rte_flow_item_ipv4 *acc_mask,
1467                              struct rte_flow_error *error)
1468 {
1469         const struct rte_flow_item_ipv4 *mask = item->mask;
1470         const struct rte_flow_item_ipv4 *spec = item->spec;
1471         const struct rte_flow_item_ipv4 nic_mask = {
1472                 .hdr = {
1473                         .src_addr = RTE_BE32(0xffffffff),
1474                         .dst_addr = RTE_BE32(0xffffffff),
1475                         .type_of_service = 0xff,
1476                         .next_proto_id = 0xff,
1477                 },
1478         };
1479         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1480         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1481                                       MLX5_FLOW_LAYER_OUTER_L3;
1482         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1483                                       MLX5_FLOW_LAYER_OUTER_L4;
1484         int ret;
1485         uint8_t next_proto = 0xFF;
1486         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1487                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1488                                   MLX5_FLOW_LAYER_INNER_VLAN);
1489
1490         if ((last_item & l2_vlan) && ether_type &&
1491             ether_type != RTE_ETHER_TYPE_IPV4)
1492                 return rte_flow_error_set(error, EINVAL,
1493                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1494                                           "IPv4 cannot follow L2/VLAN layer "
1495                                           "which ether type is not IPv4");
1496         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1497                 if (mask && spec)
1498                         next_proto = mask->hdr.next_proto_id &
1499                                      spec->hdr.next_proto_id;
1500                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1501                         return rte_flow_error_set(error, EINVAL,
1502                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1503                                                   item,
1504                                                   "multiple tunnel "
1505                                                   "not supported");
1506         }
1507         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1508                 return rte_flow_error_set(error, EINVAL,
1509                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1510                                           "wrong tunnel type - IPv6 specified "
1511                                           "but IPv4 item provided");
1512         if (item_flags & l3m)
1513                 return rte_flow_error_set(error, ENOTSUP,
1514                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1515                                           "multiple L3 layers not supported");
1516         else if (item_flags & l4m)
1517                 return rte_flow_error_set(error, EINVAL,
1518                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1519                                           "L3 cannot follow an L4 layer.");
1520         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1521                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1522                 return rte_flow_error_set(error, EINVAL,
1523                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1524                                           "L3 cannot follow an NVGRE layer.");
1525         if (!mask)
1526                 mask = &rte_flow_item_ipv4_mask;
1527         else if (mask->hdr.next_proto_id != 0 &&
1528                  mask->hdr.next_proto_id != 0xff)
1529                 return rte_flow_error_set(error, EINVAL,
1530                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1531                                           "partial mask is not supported"
1532                                           " for protocol");
1533         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1534                                         acc_mask ? (const uint8_t *)acc_mask
1535                                                  : (const uint8_t *)&nic_mask,
1536                                         sizeof(struct rte_flow_item_ipv4),
1537                                         error);
1538         if (ret < 0)
1539                 return ret;
1540         return 0;
1541 }
1542
1543 /**
1544  * Validate IPV6 item.
1545  *
1546  * @param[in] item
1547  *   Item specification.
1548  * @param[in] item_flags
1549  *   Bit-fields that holds the items detected until now.
1550  * @param[in] acc_mask
1551  *   Acceptable mask, if NULL default internal default mask
1552  *   will be used to check whether item fields are supported.
1553  * @param[out] error
1554  *   Pointer to error structure.
1555  *
1556  * @return
1557  *   0 on success, a negative errno value otherwise and rte_errno is set.
1558  */
1559 int
1560 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1561                              uint64_t item_flags,
1562                              uint64_t last_item,
1563                              uint16_t ether_type,
1564                              const struct rte_flow_item_ipv6 *acc_mask,
1565                              struct rte_flow_error *error)
1566 {
1567         const struct rte_flow_item_ipv6 *mask = item->mask;
1568         const struct rte_flow_item_ipv6 *spec = item->spec;
1569         const struct rte_flow_item_ipv6 nic_mask = {
1570                 .hdr = {
1571                         .src_addr =
1572                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1573                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1574                         .dst_addr =
1575                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1576                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1577                         .vtc_flow = RTE_BE32(0xffffffff),
1578                         .proto = 0xff,
1579                         .hop_limits = 0xff,
1580                 },
1581         };
1582         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1583         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1584                                       MLX5_FLOW_LAYER_OUTER_L3;
1585         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1586                                       MLX5_FLOW_LAYER_OUTER_L4;
1587         int ret;
1588         uint8_t next_proto = 0xFF;
1589         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1590                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1591                                   MLX5_FLOW_LAYER_INNER_VLAN);
1592
1593         if ((last_item & l2_vlan) && ether_type &&
1594             ether_type != RTE_ETHER_TYPE_IPV6)
1595                 return rte_flow_error_set(error, EINVAL,
1596                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1597                                           "IPv6 cannot follow L2/VLAN layer "
1598                                           "which ether type is not IPv6");
1599         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1600                 if (mask && spec)
1601                         next_proto = mask->hdr.proto & spec->hdr.proto;
1602                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1603                         return rte_flow_error_set(error, EINVAL,
1604                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1605                                                   item,
1606                                                   "multiple tunnel "
1607                                                   "not supported");
1608         }
1609         if (item_flags & MLX5_FLOW_LAYER_IPIP)
1610                 return rte_flow_error_set(error, EINVAL,
1611                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1612                                           "wrong tunnel type - IPv4 specified "
1613                                           "but IPv6 item provided");
1614         if (item_flags & l3m)
1615                 return rte_flow_error_set(error, ENOTSUP,
1616                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1617                                           "multiple L3 layers not supported");
1618         else if (item_flags & l4m)
1619                 return rte_flow_error_set(error, EINVAL,
1620                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1621                                           "L3 cannot follow an L4 layer.");
1622         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1623                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1624                 return rte_flow_error_set(error, EINVAL,
1625                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1626                                           "L3 cannot follow an NVGRE layer.");
1627         if (!mask)
1628                 mask = &rte_flow_item_ipv6_mask;
1629         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1630                                         acc_mask ? (const uint8_t *)acc_mask
1631                                                  : (const uint8_t *)&nic_mask,
1632                                         sizeof(struct rte_flow_item_ipv6),
1633                                         error);
1634         if (ret < 0)
1635                 return ret;
1636         return 0;
1637 }
1638
1639 /**
1640  * Validate UDP item.
1641  *
1642  * @param[in] item
1643  *   Item specification.
1644  * @param[in] item_flags
1645  *   Bit-fields that holds the items detected until now.
1646  * @param[in] target_protocol
1647  *   The next protocol in the previous item.
1648  * @param[in] flow_mask
1649  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1650  * @param[out] error
1651  *   Pointer to error structure.
1652  *
1653  * @return
1654  *   0 on success, a negative errno value otherwise and rte_errno is set.
1655  */
1656 int
1657 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1658                             uint64_t item_flags,
1659                             uint8_t target_protocol,
1660                             struct rte_flow_error *error)
1661 {
1662         const struct rte_flow_item_udp *mask = item->mask;
1663         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1664         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1665                                       MLX5_FLOW_LAYER_OUTER_L3;
1666         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1667                                       MLX5_FLOW_LAYER_OUTER_L4;
1668         int ret;
1669
1670         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1671                 return rte_flow_error_set(error, EINVAL,
1672                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1673                                           "protocol filtering not compatible"
1674                                           " with UDP layer");
1675         if (!(item_flags & l3m))
1676                 return rte_flow_error_set(error, EINVAL,
1677                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1678                                           "L3 is mandatory to filter on L4");
1679         if (item_flags & l4m)
1680                 return rte_flow_error_set(error, EINVAL,
1681                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1682                                           "multiple L4 layers not supported");
1683         if (!mask)
1684                 mask = &rte_flow_item_udp_mask;
1685         ret = mlx5_flow_item_acceptable
1686                 (item, (const uint8_t *)mask,
1687                  (const uint8_t *)&rte_flow_item_udp_mask,
1688                  sizeof(struct rte_flow_item_udp), error);
1689         if (ret < 0)
1690                 return ret;
1691         return 0;
1692 }
1693
1694 /**
1695  * Validate TCP item.
1696  *
1697  * @param[in] item
1698  *   Item specification.
1699  * @param[in] item_flags
1700  *   Bit-fields that holds the items detected until now.
1701  * @param[in] target_protocol
1702  *   The next protocol in the previous item.
1703  * @param[out] error
1704  *   Pointer to error structure.
1705  *
1706  * @return
1707  *   0 on success, a negative errno value otherwise and rte_errno is set.
1708  */
1709 int
1710 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1711                             uint64_t item_flags,
1712                             uint8_t target_protocol,
1713                             const struct rte_flow_item_tcp *flow_mask,
1714                             struct rte_flow_error *error)
1715 {
1716         const struct rte_flow_item_tcp *mask = item->mask;
1717         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1718         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1719                                       MLX5_FLOW_LAYER_OUTER_L3;
1720         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1721                                       MLX5_FLOW_LAYER_OUTER_L4;
1722         int ret;
1723
1724         assert(flow_mask);
1725         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1726                 return rte_flow_error_set(error, EINVAL,
1727                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1728                                           "protocol filtering not compatible"
1729                                           " with TCP layer");
1730         if (!(item_flags & l3m))
1731                 return rte_flow_error_set(error, EINVAL,
1732                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1733                                           "L3 is mandatory to filter on L4");
1734         if (item_flags & l4m)
1735                 return rte_flow_error_set(error, EINVAL,
1736                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1737                                           "multiple L4 layers not supported");
1738         if (!mask)
1739                 mask = &rte_flow_item_tcp_mask;
1740         ret = mlx5_flow_item_acceptable
1741                 (item, (const uint8_t *)mask,
1742                  (const uint8_t *)flow_mask,
1743                  sizeof(struct rte_flow_item_tcp), error);
1744         if (ret < 0)
1745                 return ret;
1746         return 0;
1747 }
1748
1749 /**
1750  * Validate VXLAN item.
1751  *
1752  * @param[in] item
1753  *   Item specification.
1754  * @param[in] item_flags
1755  *   Bit-fields that holds the items detected until now.
1756  * @param[in] target_protocol
1757  *   The next protocol in the previous item.
1758  * @param[out] error
1759  *   Pointer to error structure.
1760  *
1761  * @return
1762  *   0 on success, a negative errno value otherwise and rte_errno is set.
1763  */
1764 int
1765 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1766                               uint64_t item_flags,
1767                               struct rte_flow_error *error)
1768 {
1769         const struct rte_flow_item_vxlan *spec = item->spec;
1770         const struct rte_flow_item_vxlan *mask = item->mask;
1771         int ret;
1772         union vni {
1773                 uint32_t vlan_id;
1774                 uint8_t vni[4];
1775         } id = { .vlan_id = 0, };
1776         uint32_t vlan_id = 0;
1777
1778
1779         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1780                 return rte_flow_error_set(error, ENOTSUP,
1781                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1782                                           "multiple tunnel layers not"
1783                                           " supported");
1784         /*
1785          * Verify only UDPv4 is present as defined in
1786          * https://tools.ietf.org/html/rfc7348
1787          */
1788         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1789                 return rte_flow_error_set(error, EINVAL,
1790                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1791                                           "no outer UDP layer found");
1792         if (!mask)
1793                 mask = &rte_flow_item_vxlan_mask;
1794         ret = mlx5_flow_item_acceptable
1795                 (item, (const uint8_t *)mask,
1796                  (const uint8_t *)&rte_flow_item_vxlan_mask,
1797                  sizeof(struct rte_flow_item_vxlan),
1798                  error);
1799         if (ret < 0)
1800                 return ret;
1801         if (spec) {
1802                 memcpy(&id.vni[1], spec->vni, 3);
1803                 vlan_id = id.vlan_id;
1804                 memcpy(&id.vni[1], mask->vni, 3);
1805                 vlan_id &= id.vlan_id;
1806         }
1807         /*
1808          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if
1809          * only this layer is defined in the Verbs specification it is
1810          * interpreted as wildcard and all packets will match this
1811          * rule, if it follows a full stack layer (ex: eth / ipv4 /
1812          * udp), all packets matching the layers before will also
1813          * match this rule.  To avoid such situation, VNI 0 is
1814          * currently refused.
1815          */
1816         if (!vlan_id)
1817                 return rte_flow_error_set(error, ENOTSUP,
1818                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1819                                           "VXLAN vni cannot be 0");
1820         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1821                 return rte_flow_error_set(error, ENOTSUP,
1822                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1823                                           "VXLAN tunnel must be fully defined");
1824         return 0;
1825 }
1826
1827 /**
1828  * Validate VXLAN_GPE item.
1829  *
1830  * @param[in] item
1831  *   Item specification.
1832  * @param[in] item_flags
1833  *   Bit-fields that holds the items detected until now.
1834  * @param[in] priv
1835  *   Pointer to the private data structure.
1836  * @param[in] target_protocol
1837  *   The next protocol in the previous item.
1838  * @param[out] error
1839  *   Pointer to error structure.
1840  *
1841  * @return
1842  *   0 on success, a negative errno value otherwise and rte_errno is set.
1843  */
1844 int
1845 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1846                                   uint64_t item_flags,
1847                                   struct rte_eth_dev *dev,
1848                                   struct rte_flow_error *error)
1849 {
1850         struct mlx5_priv *priv = dev->data->dev_private;
1851         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1852         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1853         int ret;
1854         union vni {
1855                 uint32_t vlan_id;
1856                 uint8_t vni[4];
1857         } id = { .vlan_id = 0, };
1858         uint32_t vlan_id = 0;
1859
1860         if (!priv->config.l3_vxlan_en)
1861                 return rte_flow_error_set(error, ENOTSUP,
1862                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1863                                           "L3 VXLAN is not enabled by device"
1864                                           " parameter and/or not configured in"
1865                                           " firmware");
1866         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1867                 return rte_flow_error_set(error, ENOTSUP,
1868                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1869                                           "multiple tunnel layers not"
1870                                           " supported");
1871         /*
1872          * Verify only UDPv4 is present as defined in
1873          * https://tools.ietf.org/html/rfc7348
1874          */
1875         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1876                 return rte_flow_error_set(error, EINVAL,
1877                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1878                                           "no outer UDP layer found");
1879         if (!mask)
1880                 mask = &rte_flow_item_vxlan_gpe_mask;
1881         ret = mlx5_flow_item_acceptable
1882                 (item, (const uint8_t *)mask,
1883                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1884                  sizeof(struct rte_flow_item_vxlan_gpe),
1885                  error);
1886         if (ret < 0)
1887                 return ret;
1888         if (spec) {
1889                 if (spec->protocol)
1890                         return rte_flow_error_set(error, ENOTSUP,
1891                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1892                                                   item,
1893                                                   "VxLAN-GPE protocol"
1894                                                   " not supported");
1895                 memcpy(&id.vni[1], spec->vni, 3);
1896                 vlan_id = id.vlan_id;
1897                 memcpy(&id.vni[1], mask->vni, 3);
1898                 vlan_id &= id.vlan_id;
1899         }
1900         /*
1901          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this
1902          * layer is defined in the Verbs specification it is interpreted as
1903          * wildcard and all packets will match this rule, if it follows a full
1904          * stack layer (ex: eth / ipv4 / udp), all packets matching the layers
1905          * before will also match this rule.  To avoid such situation, VNI 0
1906          * is currently refused.
1907          */
1908         if (!vlan_id)
1909                 return rte_flow_error_set(error, ENOTSUP,
1910                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1911                                           "VXLAN-GPE vni cannot be 0");
1912         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1913                 return rte_flow_error_set(error, ENOTSUP,
1914                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1915                                           "VXLAN-GPE tunnel must be fully"
1916                                           " defined");
1917         return 0;
1918 }
1919 /**
1920  * Validate GRE Key item.
1921  *
1922  * @param[in] item
1923  *   Item specification.
1924  * @param[in] item_flags
1925  *   Bit flags to mark detected items.
1926  * @param[in] gre_item
1927  *   Pointer to gre_item
1928  * @param[out] error
1929  *   Pointer to error structure.
1930  *
1931  * @return
1932  *   0 on success, a negative errno value otherwise and rte_errno is set.
1933  */
1934 int
1935 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1936                                 uint64_t item_flags,
1937                                 const struct rte_flow_item *gre_item,
1938                                 struct rte_flow_error *error)
1939 {
1940         const rte_be32_t *mask = item->mask;
1941         int ret = 0;
1942         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1943         const struct rte_flow_item_gre *gre_spec = gre_item->spec;
1944         const struct rte_flow_item_gre *gre_mask = gre_item->mask;
1945
1946         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1947                 return rte_flow_error_set(error, ENOTSUP,
1948                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1949                                           "Multiple GRE key not support");
1950         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1951                 return rte_flow_error_set(error, ENOTSUP,
1952                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1953                                           "No preceding GRE header");
1954         if (item_flags & MLX5_FLOW_LAYER_INNER)
1955                 return rte_flow_error_set(error, ENOTSUP,
1956                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1957                                           "GRE key following a wrong item");
1958         if (!gre_mask)
1959                 gre_mask = &rte_flow_item_gre_mask;
1960         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
1961                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
1962                 return rte_flow_error_set(error, EINVAL,
1963                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1964                                           "Key bit must be on");
1965
1966         if (!mask)
1967                 mask = &gre_key_default_mask;
1968         ret = mlx5_flow_item_acceptable
1969                 (item, (const uint8_t *)mask,
1970                  (const uint8_t *)&gre_key_default_mask,
1971                  sizeof(rte_be32_t), error);
1972         return ret;
1973 }
1974
1975 /**
1976  * Validate GRE item.
1977  *
1978  * @param[in] item
1979  *   Item specification.
1980  * @param[in] item_flags
1981  *   Bit flags to mark detected items.
1982  * @param[in] target_protocol
1983  *   The next protocol in the previous item.
1984  * @param[out] error
1985  *   Pointer to error structure.
1986  *
1987  * @return
1988  *   0 on success, a negative errno value otherwise and rte_errno is set.
1989  */
1990 int
1991 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
1992                             uint64_t item_flags,
1993                             uint8_t target_protocol,
1994                             struct rte_flow_error *error)
1995 {
1996         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
1997         const struct rte_flow_item_gre *mask = item->mask;
1998         int ret;
1999         const struct rte_flow_item_gre nic_mask = {
2000                 .c_rsvd0_ver = RTE_BE16(0xB000),
2001                 .protocol = RTE_BE16(UINT16_MAX),
2002         };
2003
2004         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2005                 return rte_flow_error_set(error, EINVAL,
2006                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2007                                           "protocol filtering not compatible"
2008                                           " with this GRE layer");
2009         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2010                 return rte_flow_error_set(error, ENOTSUP,
2011                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2012                                           "multiple tunnel layers not"
2013                                           " supported");
2014         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2015                 return rte_flow_error_set(error, ENOTSUP,
2016                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2017                                           "L3 Layer is missing");
2018         if (!mask)
2019                 mask = &rte_flow_item_gre_mask;
2020         ret = mlx5_flow_item_acceptable
2021                 (item, (const uint8_t *)mask,
2022                  (const uint8_t *)&nic_mask,
2023                  sizeof(struct rte_flow_item_gre), error);
2024         if (ret < 0)
2025                 return ret;
2026 #ifndef HAVE_MLX5DV_DR
2027 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2028         if (spec && (spec->protocol & mask->protocol))
2029                 return rte_flow_error_set(error, ENOTSUP,
2030                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2031                                           "without MPLS support the"
2032                                           " specification cannot be used for"
2033                                           " filtering");
2034 #endif
2035 #endif
2036         return 0;
2037 }
2038
2039 /**
2040  * Validate Geneve item.
2041  *
2042  * @param[in] item
2043  *   Item specification.
2044  * @param[in] itemFlags
2045  *   Bit-fields that holds the items detected until now.
2046  * @param[in] enPriv
2047  *   Pointer to the private data structure.
2048  * @param[out] error
2049  *   Pointer to error structure.
2050  *
2051  * @return
2052  *   0 on success, a negative errno value otherwise and rte_errno is set.
2053  */
2054
2055 int
2056 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2057                                uint64_t item_flags,
2058                                struct rte_eth_dev *dev,
2059                                struct rte_flow_error *error)
2060 {
2061         struct mlx5_priv *priv = dev->data->dev_private;
2062         const struct rte_flow_item_geneve *spec = item->spec;
2063         const struct rte_flow_item_geneve *mask = item->mask;
2064         int ret;
2065         uint16_t gbhdr;
2066         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2067                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2068         const struct rte_flow_item_geneve nic_mask = {
2069                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2070                 .vni = "\xff\xff\xff",
2071                 .protocol = RTE_BE16(UINT16_MAX),
2072         };
2073
2074         if (!(priv->config.hca_attr.flex_parser_protocols &
2075               MLX5_HCA_FLEX_GENEVE_ENABLED) ||
2076             !priv->config.hca_attr.tunnel_stateless_geneve_rx)
2077                 return rte_flow_error_set(error, ENOTSUP,
2078                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2079                                           "L3 Geneve is not enabled by device"
2080                                           " parameter and/or not configured in"
2081                                           " firmware");
2082         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2083                 return rte_flow_error_set(error, ENOTSUP,
2084                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2085                                           "multiple tunnel layers not"
2086                                           " supported");
2087         /*
2088          * Verify only UDPv4 is present as defined in
2089          * https://tools.ietf.org/html/rfc7348
2090          */
2091         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2092                 return rte_flow_error_set(error, EINVAL,
2093                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2094                                           "no outer UDP layer found");
2095         if (!mask)
2096                 mask = &rte_flow_item_geneve_mask;
2097         ret = mlx5_flow_item_acceptable
2098                                   (item, (const uint8_t *)mask,
2099                                    (const uint8_t *)&nic_mask,
2100                                    sizeof(struct rte_flow_item_geneve), error);
2101         if (ret)
2102                 return ret;
2103         if (spec) {
2104                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2105                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2106                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2107                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2108                         return rte_flow_error_set(error, ENOTSUP,
2109                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2110                                                   item,
2111                                                   "Geneve protocol unsupported"
2112                                                   " fields are being used");
2113                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2114                         return rte_flow_error_set
2115                                         (error, ENOTSUP,
2116                                          RTE_FLOW_ERROR_TYPE_ITEM,
2117                                          item,
2118                                          "Unsupported Geneve options length");
2119         }
2120         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2121                 return rte_flow_error_set
2122                                     (error, ENOTSUP,
2123                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2124                                      "Geneve tunnel must be fully defined");
2125         return 0;
2126 }
2127
2128 /**
2129  * Validate MPLS item.
2130  *
2131  * @param[in] dev
2132  *   Pointer to the rte_eth_dev structure.
2133  * @param[in] item
2134  *   Item specification.
2135  * @param[in] item_flags
2136  *   Bit-fields that holds the items detected until now.
2137  * @param[in] prev_layer
2138  *   The protocol layer indicated in previous item.
2139  * @param[out] error
2140  *   Pointer to error structure.
2141  *
2142  * @return
2143  *   0 on success, a negative errno value otherwise and rte_errno is set.
2144  */
2145 int
2146 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2147                              const struct rte_flow_item *item __rte_unused,
2148                              uint64_t item_flags __rte_unused,
2149                              uint64_t prev_layer __rte_unused,
2150                              struct rte_flow_error *error)
2151 {
2152 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2153         const struct rte_flow_item_mpls *mask = item->mask;
2154         struct mlx5_priv *priv = dev->data->dev_private;
2155         int ret;
2156
2157         if (!priv->config.mpls_en)
2158                 return rte_flow_error_set(error, ENOTSUP,
2159                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2160                                           "MPLS not supported or"
2161                                           " disabled in firmware"
2162                                           " configuration.");
2163         /* MPLS over IP, UDP, GRE is allowed */
2164         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2165                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2166                             MLX5_FLOW_LAYER_GRE)))
2167                 return rte_flow_error_set(error, EINVAL,
2168                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2169                                           "protocol filtering not compatible"
2170                                           " with MPLS layer");
2171         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2172         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2173             !(item_flags & MLX5_FLOW_LAYER_GRE))
2174                 return rte_flow_error_set(error, ENOTSUP,
2175                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2176                                           "multiple tunnel layers not"
2177                                           " supported");
2178         if (!mask)
2179                 mask = &rte_flow_item_mpls_mask;
2180         ret = mlx5_flow_item_acceptable
2181                 (item, (const uint8_t *)mask,
2182                  (const uint8_t *)&rte_flow_item_mpls_mask,
2183                  sizeof(struct rte_flow_item_mpls), error);
2184         if (ret < 0)
2185                 return ret;
2186         return 0;
2187 #endif
2188         return rte_flow_error_set(error, ENOTSUP,
2189                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2190                                   "MPLS is not supported by Verbs, please"
2191                                   " update.");
2192 }
2193
2194 /**
2195  * Validate NVGRE item.
2196  *
2197  * @param[in] item
2198  *   Item specification.
2199  * @param[in] item_flags
2200  *   Bit flags to mark detected items.
2201  * @param[in] target_protocol
2202  *   The next protocol in the previous item.
2203  * @param[out] error
2204  *   Pointer to error structure.
2205  *
2206  * @return
2207  *   0 on success, a negative errno value otherwise and rte_errno is set.
2208  */
2209 int
2210 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2211                               uint64_t item_flags,
2212                               uint8_t target_protocol,
2213                               struct rte_flow_error *error)
2214 {
2215         const struct rte_flow_item_nvgre *mask = item->mask;
2216         int ret;
2217
2218         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2219                 return rte_flow_error_set(error, EINVAL,
2220                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2221                                           "protocol filtering not compatible"
2222                                           " with this GRE layer");
2223         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2224                 return rte_flow_error_set(error, ENOTSUP,
2225                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2226                                           "multiple tunnel layers not"
2227                                           " supported");
2228         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2229                 return rte_flow_error_set(error, ENOTSUP,
2230                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2231                                           "L3 Layer is missing");
2232         if (!mask)
2233                 mask = &rte_flow_item_nvgre_mask;
2234         ret = mlx5_flow_item_acceptable
2235                 (item, (const uint8_t *)mask,
2236                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2237                  sizeof(struct rte_flow_item_nvgre), error);
2238         if (ret < 0)
2239                 return ret;
2240         return 0;
2241 }
2242
2243 static int
2244 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2245                    const struct rte_flow_attr *attr __rte_unused,
2246                    const struct rte_flow_item items[] __rte_unused,
2247                    const struct rte_flow_action actions[] __rte_unused,
2248                    bool external __rte_unused,
2249                    struct rte_flow_error *error)
2250 {
2251         return rte_flow_error_set(error, ENOTSUP,
2252                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2253 }
2254
2255 static struct mlx5_flow *
2256 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
2257                   const struct rte_flow_item items[] __rte_unused,
2258                   const struct rte_flow_action actions[] __rte_unused,
2259                   struct rte_flow_error *error)
2260 {
2261         rte_flow_error_set(error, ENOTSUP,
2262                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2263         return NULL;
2264 }
2265
2266 static int
2267 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2268                     struct mlx5_flow *dev_flow __rte_unused,
2269                     const struct rte_flow_attr *attr __rte_unused,
2270                     const struct rte_flow_item items[] __rte_unused,
2271                     const struct rte_flow_action actions[] __rte_unused,
2272                     struct rte_flow_error *error)
2273 {
2274         return rte_flow_error_set(error, ENOTSUP,
2275                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2276 }
2277
2278 static int
2279 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2280                 struct rte_flow *flow __rte_unused,
2281                 struct rte_flow_error *error)
2282 {
2283         return rte_flow_error_set(error, ENOTSUP,
2284                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2285 }
2286
2287 static void
2288 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2289                  struct rte_flow *flow __rte_unused)
2290 {
2291 }
2292
2293 static void
2294 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2295                   struct rte_flow *flow __rte_unused)
2296 {
2297 }
2298
2299 static int
2300 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2301                 struct rte_flow *flow __rte_unused,
2302                 const struct rte_flow_action *actions __rte_unused,
2303                 void *data __rte_unused,
2304                 struct rte_flow_error *error)
2305 {
2306         return rte_flow_error_set(error, ENOTSUP,
2307                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2308 }
2309
2310 /* Void driver to protect from null pointer reference. */
2311 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2312         .validate = flow_null_validate,
2313         .prepare = flow_null_prepare,
2314         .translate = flow_null_translate,
2315         .apply = flow_null_apply,
2316         .remove = flow_null_remove,
2317         .destroy = flow_null_destroy,
2318         .query = flow_null_query,
2319 };
2320
2321 /**
2322  * Select flow driver type according to flow attributes and device
2323  * configuration.
2324  *
2325  * @param[in] dev
2326  *   Pointer to the dev structure.
2327  * @param[in] attr
2328  *   Pointer to the flow attributes.
2329  *
2330  * @return
2331  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2332  */
2333 static enum mlx5_flow_drv_type
2334 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2335 {
2336         struct mlx5_priv *priv = dev->data->dev_private;
2337         enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2338
2339         if (attr->transfer && priv->config.dv_esw_en)
2340                 type = MLX5_FLOW_TYPE_DV;
2341         if (!attr->transfer)
2342                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2343                                                  MLX5_FLOW_TYPE_VERBS;
2344         return type;
2345 }
2346
2347 #define flow_get_drv_ops(type) flow_drv_ops[type]
2348
2349 /**
2350  * Flow driver validation API. This abstracts calling driver specific functions.
2351  * The type of flow driver is determined according to flow attributes.
2352  *
2353  * @param[in] dev
2354  *   Pointer to the dev structure.
2355  * @param[in] attr
2356  *   Pointer to the flow attributes.
2357  * @param[in] items
2358  *   Pointer to the list of items.
2359  * @param[in] actions
2360  *   Pointer to the list of actions.
2361  * @param[in] external
2362  *   This flow rule is created by request external to PMD.
2363  * @param[out] error
2364  *   Pointer to the error structure.
2365  *
2366  * @return
2367  *   0 on success, a negative errno value otherwise and rte_errno is set.
2368  */
2369 static inline int
2370 flow_drv_validate(struct rte_eth_dev *dev,
2371                   const struct rte_flow_attr *attr,
2372                   const struct rte_flow_item items[],
2373                   const struct rte_flow_action actions[],
2374                   bool external, struct rte_flow_error *error)
2375 {
2376         const struct mlx5_flow_driver_ops *fops;
2377         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2378
2379         fops = flow_get_drv_ops(type);
2380         return fops->validate(dev, attr, items, actions, external, error);
2381 }
2382
2383 /**
2384  * Flow driver preparation API. This abstracts calling driver specific
2385  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2386  * calculates the size of memory required for device flow, allocates the memory,
2387  * initializes the device flow and returns the pointer.
2388  *
2389  * @note
2390  *   This function initializes device flow structure such as dv or verbs in
2391  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
2392  *   rest. For example, adding returning device flow to flow->dev_flow list and
2393  *   setting backward reference to the flow should be done out of this function.
2394  *   layers field is not filled either.
2395  *
2396  * @param[in] attr
2397  *   Pointer to the flow attributes.
2398  * @param[in] items
2399  *   Pointer to the list of items.
2400  * @param[in] actions
2401  *   Pointer to the list of actions.
2402  * @param[out] error
2403  *   Pointer to the error structure.
2404  *
2405  * @return
2406  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
2407  */
2408 static inline struct mlx5_flow *
2409 flow_drv_prepare(const struct rte_flow *flow,
2410                  const struct rte_flow_attr *attr,
2411                  const struct rte_flow_item items[],
2412                  const struct rte_flow_action actions[],
2413                  struct rte_flow_error *error)
2414 {
2415         const struct mlx5_flow_driver_ops *fops;
2416         enum mlx5_flow_drv_type type = flow->drv_type;
2417
2418         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2419         fops = flow_get_drv_ops(type);
2420         return fops->prepare(attr, items, actions, error);
2421 }
2422
2423 /**
2424  * Flow driver translation API. This abstracts calling driver specific
2425  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2426  * translates a generic flow into a driver flow. flow_drv_prepare() must
2427  * precede.
2428  *
2429  * @note
2430  *   dev_flow->layers could be filled as a result of parsing during translation
2431  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2432  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2433  *   flow->actions could be overwritten even though all the expanded dev_flows
2434  *   have the same actions.
2435  *
2436  * @param[in] dev
2437  *   Pointer to the rte dev structure.
2438  * @param[in, out] dev_flow
2439  *   Pointer to the mlx5 flow.
2440  * @param[in] attr
2441  *   Pointer to the flow attributes.
2442  * @param[in] items
2443  *   Pointer to the list of items.
2444  * @param[in] actions
2445  *   Pointer to the list of actions.
2446  * @param[out] error
2447  *   Pointer to the error structure.
2448  *
2449  * @return
2450  *   0 on success, a negative errno value otherwise and rte_errno is set.
2451  */
2452 static inline int
2453 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2454                    const struct rte_flow_attr *attr,
2455                    const struct rte_flow_item items[],
2456                    const struct rte_flow_action actions[],
2457                    struct rte_flow_error *error)
2458 {
2459         const struct mlx5_flow_driver_ops *fops;
2460         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2461
2462         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2463         fops = flow_get_drv_ops(type);
2464         return fops->translate(dev, dev_flow, attr, items, actions, error);
2465 }
2466
2467 /**
2468  * Flow driver apply API. This abstracts calling driver specific functions.
2469  * Parent flow (rte_flow) should have driver type (drv_type). It applies
2470  * translated driver flows on to device. flow_drv_translate() must precede.
2471  *
2472  * @param[in] dev
2473  *   Pointer to Ethernet device structure.
2474  * @param[in, out] flow
2475  *   Pointer to flow structure.
2476  * @param[out] error
2477  *   Pointer to error structure.
2478  *
2479  * @return
2480  *   0 on success, a negative errno value otherwise and rte_errno is set.
2481  */
2482 static inline int
2483 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2484                struct rte_flow_error *error)
2485 {
2486         const struct mlx5_flow_driver_ops *fops;
2487         enum mlx5_flow_drv_type type = flow->drv_type;
2488
2489         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2490         fops = flow_get_drv_ops(type);
2491         return fops->apply(dev, flow, error);
2492 }
2493
2494 /**
2495  * Flow driver remove API. This abstracts calling driver specific functions.
2496  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2497  * on device. All the resources of the flow should be freed by calling
2498  * flow_drv_destroy().
2499  *
2500  * @param[in] dev
2501  *   Pointer to Ethernet device.
2502  * @param[in, out] flow
2503  *   Pointer to flow structure.
2504  */
2505 static inline void
2506 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2507 {
2508         const struct mlx5_flow_driver_ops *fops;
2509         enum mlx5_flow_drv_type type = flow->drv_type;
2510
2511         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2512         fops = flow_get_drv_ops(type);
2513         fops->remove(dev, flow);
2514 }
2515
2516 /**
2517  * Flow driver destroy API. This abstracts calling driver specific functions.
2518  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2519  * on device and releases resources of the flow.
2520  *
2521  * @param[in] dev
2522  *   Pointer to Ethernet device.
2523  * @param[in, out] flow
2524  *   Pointer to flow structure.
2525  */
2526 static inline void
2527 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2528 {
2529         const struct mlx5_flow_driver_ops *fops;
2530         enum mlx5_flow_drv_type type = flow->drv_type;
2531
2532         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2533         fops = flow_get_drv_ops(type);
2534         fops->destroy(dev, flow);
2535 }
2536
2537 /**
2538  * Validate a flow supported by the NIC.
2539  *
2540  * @see rte_flow_validate()
2541  * @see rte_flow_ops
2542  */
2543 int
2544 mlx5_flow_validate(struct rte_eth_dev *dev,
2545                    const struct rte_flow_attr *attr,
2546                    const struct rte_flow_item items[],
2547                    const struct rte_flow_action actions[],
2548                    struct rte_flow_error *error)
2549 {
2550         int ret;
2551
2552         ret = flow_drv_validate(dev, attr, items, actions, true, error);
2553         if (ret < 0)
2554                 return ret;
2555         return 0;
2556 }
2557
2558 /**
2559  * Get RSS action from the action list.
2560  *
2561  * @param[in] actions
2562  *   Pointer to the list of actions.
2563  *
2564  * @return
2565  *   Pointer to the RSS action if exist, else return NULL.
2566  */
2567 static const struct rte_flow_action_rss*
2568 flow_get_rss_action(const struct rte_flow_action actions[])
2569 {
2570         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2571                 switch (actions->type) {
2572                 case RTE_FLOW_ACTION_TYPE_RSS:
2573                         return (const struct rte_flow_action_rss *)
2574                                actions->conf;
2575                 default:
2576                         break;
2577                 }
2578         }
2579         return NULL;
2580 }
2581
2582 static unsigned int
2583 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2584 {
2585         const struct rte_flow_item *item;
2586         unsigned int has_vlan = 0;
2587
2588         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2589                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2590                         has_vlan = 1;
2591                         break;
2592                 }
2593         }
2594         if (has_vlan)
2595                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2596                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2597         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2598                                MLX5_EXPANSION_ROOT_OUTER;
2599 }
2600
2601 /**
2602  * Check if the flow should be splited due to hairpin.
2603  * The reason for the split is that in current HW we can't
2604  * support encap on Rx, so if a flow have encap we move it
2605  * to Tx.
2606  *
2607  * @param dev
2608  *   Pointer to Ethernet device.
2609  * @param[in] attr
2610  *   Flow rule attributes.
2611  * @param[in] actions
2612  *   Associated actions (list terminated by the END action).
2613  *
2614  * @return
2615  *   > 0 the number of actions and the flow should be split,
2616  *   0 when no split required.
2617  */
2618 static int
2619 flow_check_hairpin_split(struct rte_eth_dev *dev,
2620                          const struct rte_flow_attr *attr,
2621                          const struct rte_flow_action actions[])
2622 {
2623         int queue_action = 0;
2624         int action_n = 0;
2625         int encap = 0;
2626         const struct rte_flow_action_queue *queue;
2627         const struct rte_flow_action_rss *rss;
2628         const struct rte_flow_action_raw_encap *raw_encap;
2629
2630         if (!attr->ingress)
2631                 return 0;
2632         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2633                 switch (actions->type) {
2634                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2635                         queue = actions->conf;
2636                         if (mlx5_rxq_get_type(dev, queue->index) !=
2637                             MLX5_RXQ_TYPE_HAIRPIN)
2638                                 return 0;
2639                         queue_action = 1;
2640                         action_n++;
2641                         break;
2642                 case RTE_FLOW_ACTION_TYPE_RSS:
2643                         rss = actions->conf;
2644                         if (mlx5_rxq_get_type(dev, rss->queue[0]) !=
2645                             MLX5_RXQ_TYPE_HAIRPIN)
2646                                 return 0;
2647                         queue_action = 1;
2648                         action_n++;
2649                         break;
2650                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2651                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2652                         encap = 1;
2653                         action_n++;
2654                         break;
2655                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2656                         raw_encap = actions->conf;
2657                         if (raw_encap->size >
2658                             (sizeof(struct rte_flow_item_eth) +
2659                              sizeof(struct rte_flow_item_ipv4)))
2660                                 encap = 1;
2661                         action_n++;
2662                         break;
2663                 default:
2664                         action_n++;
2665                         break;
2666                 }
2667         }
2668         if (encap == 1 && queue_action)
2669                 return action_n;
2670         return 0;
2671 }
2672
2673 #define MLX5_MAX_SPLIT_ACTIONS 24
2674 #define MLX5_MAX_SPLIT_ITEMS 24
2675
2676 /**
2677  * Split the hairpin flow.
2678  * Since HW can't support encap on Rx we move the encap to Tx.
2679  * If the count action is after the encap then we also
2680  * move the count action. in this case the count will also measure
2681  * the outer bytes.
2682  *
2683  * @param dev
2684  *   Pointer to Ethernet device.
2685  * @param[in] actions
2686  *   Associated actions (list terminated by the END action).
2687  * @param[out] actions_rx
2688  *   Rx flow actions.
2689  * @param[out] actions_tx
2690  *   Tx flow actions..
2691  * @param[out] pattern_tx
2692  *   The pattern items for the Tx flow.
2693  * @param[out] flow_id
2694  *   The flow ID connected to this flow.
2695  *
2696  * @return
2697  *   0 on success.
2698  */
2699 static int
2700 flow_hairpin_split(struct rte_eth_dev *dev,
2701                    const struct rte_flow_action actions[],
2702                    struct rte_flow_action actions_rx[],
2703                    struct rte_flow_action actions_tx[],
2704                    struct rte_flow_item pattern_tx[],
2705                    uint32_t *flow_id)
2706 {
2707         struct mlx5_priv *priv = dev->data->dev_private;
2708         const struct rte_flow_action_raw_encap *raw_encap;
2709         const struct rte_flow_action_raw_decap *raw_decap;
2710         struct mlx5_rte_flow_action_set_tag *set_tag;
2711         struct rte_flow_action *tag_action;
2712         struct mlx5_rte_flow_item_tag *tag_item;
2713         struct rte_flow_item *item;
2714         char *addr;
2715         int encap = 0;
2716
2717         mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
2718         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2719                 switch (actions->type) {
2720                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2721                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2722                         rte_memcpy(actions_tx, actions,
2723                                sizeof(struct rte_flow_action));
2724                         actions_tx++;
2725                         break;
2726                 case RTE_FLOW_ACTION_TYPE_COUNT:
2727                         if (encap) {
2728                                 rte_memcpy(actions_tx, actions,
2729                                            sizeof(struct rte_flow_action));
2730                                 actions_tx++;
2731                         } else {
2732                                 rte_memcpy(actions_rx, actions,
2733                                            sizeof(struct rte_flow_action));
2734                                 actions_rx++;
2735                         }
2736                         break;
2737                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2738                         raw_encap = actions->conf;
2739                         if (raw_encap->size >
2740                             (sizeof(struct rte_flow_item_eth) +
2741                              sizeof(struct rte_flow_item_ipv4))) {
2742                                 memcpy(actions_tx, actions,
2743                                        sizeof(struct rte_flow_action));
2744                                 actions_tx++;
2745                                 encap = 1;
2746                         } else {
2747                                 rte_memcpy(actions_rx, actions,
2748                                            sizeof(struct rte_flow_action));
2749                                 actions_rx++;
2750                         }
2751                         break;
2752                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
2753                         raw_decap = actions->conf;
2754                         if (raw_decap->size <
2755                             (sizeof(struct rte_flow_item_eth) +
2756                              sizeof(struct rte_flow_item_ipv4))) {
2757                                 memcpy(actions_tx, actions,
2758                                        sizeof(struct rte_flow_action));
2759                                 actions_tx++;
2760                         } else {
2761                                 rte_memcpy(actions_rx, actions,
2762                                            sizeof(struct rte_flow_action));
2763                                 actions_rx++;
2764                         }
2765                         break;
2766                 default:
2767                         rte_memcpy(actions_rx, actions,
2768                                    sizeof(struct rte_flow_action));
2769                         actions_rx++;
2770                         break;
2771                 }
2772         }
2773         /* Add set meta action and end action for the Rx flow. */
2774         tag_action = actions_rx;
2775         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
2776         actions_rx++;
2777         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
2778         actions_rx++;
2779         set_tag = (void *)actions_rx;
2780         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
2781         assert(set_tag->id > REG_NONE);
2782         set_tag->data = *flow_id;
2783         tag_action->conf = set_tag;
2784         /* Create Tx item list. */
2785         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
2786         addr = (void *)&pattern_tx[2];
2787         item = pattern_tx;
2788         item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
2789         tag_item = (void *)addr;
2790         tag_item->data = *flow_id;
2791         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
2792         assert(set_tag->id > REG_NONE);
2793         item->spec = tag_item;
2794         addr += sizeof(struct mlx5_rte_flow_item_tag);
2795         tag_item = (void *)addr;
2796         tag_item->data = UINT32_MAX;
2797         tag_item->id = UINT16_MAX;
2798         item->mask = tag_item;
2799         addr += sizeof(struct mlx5_rte_flow_item_tag);
2800         item->last = NULL;
2801         item++;
2802         item->type = RTE_FLOW_ITEM_TYPE_END;
2803         return 0;
2804 }
2805
2806 /**
2807  * The last stage of splitting chain, just creates the subflow
2808  * without any modification.
2809  *
2810  * @param dev
2811  *   Pointer to Ethernet device.
2812  * @param[in] flow
2813  *   Parent flow structure pointer.
2814  * @param[in, out] sub_flow
2815  *   Pointer to return the created subflow, may be NULL.
2816  * @param[in] attr
2817  *   Flow rule attributes.
2818  * @param[in] items
2819  *   Pattern specification (list terminated by the END pattern item).
2820  * @param[in] actions
2821  *   Associated actions (list terminated by the END action).
2822  * @param[in] external
2823  *   This flow rule is created by request external to PMD.
2824  * @param[out] error
2825  *   Perform verbose error reporting if not NULL.
2826  * @return
2827  *   0 on success, negative value otherwise
2828  */
2829 static int
2830 flow_create_split_inner(struct rte_eth_dev *dev,
2831                         struct rte_flow *flow,
2832                         struct mlx5_flow **sub_flow,
2833                         const struct rte_flow_attr *attr,
2834                         const struct rte_flow_item items[],
2835                         const struct rte_flow_action actions[],
2836                         bool external, struct rte_flow_error *error)
2837 {
2838         struct mlx5_flow *dev_flow;
2839
2840         dev_flow = flow_drv_prepare(flow, attr, items, actions, error);
2841         if (!dev_flow)
2842                 return -rte_errno;
2843         dev_flow->flow = flow;
2844         dev_flow->external = external;
2845         /* Subflow object was created, we must include one in the list. */
2846         LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
2847         if (sub_flow)
2848                 *sub_flow = dev_flow;
2849         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
2850 }
2851
2852 /**
2853  * Split the flow to subflow set. The splitters might be linked
2854  * in the chain, like this:
2855  * flow_create_split_outer() calls:
2856  *   flow_create_split_meter() calls:
2857  *     flow_create_split_metadata(meter_subflow_0) calls:
2858  *       flow_create_split_inner(metadata_subflow_0)
2859  *       flow_create_split_inner(metadata_subflow_1)
2860  *       flow_create_split_inner(metadata_subflow_2)
2861  *     flow_create_split_metadata(meter_subflow_1) calls:
2862  *       flow_create_split_inner(metadata_subflow_0)
2863  *       flow_create_split_inner(metadata_subflow_1)
2864  *       flow_create_split_inner(metadata_subflow_2)
2865  *
2866  * This provide flexible way to add new levels of flow splitting.
2867  * The all of successfully created subflows are included to the
2868  * parent flow dev_flow list.
2869  *
2870  * @param dev
2871  *   Pointer to Ethernet device.
2872  * @param[in] flow
2873  *   Parent flow structure pointer.
2874  * @param[in] attr
2875  *   Flow rule attributes.
2876  * @param[in] items
2877  *   Pattern specification (list terminated by the END pattern item).
2878  * @param[in] actions
2879  *   Associated actions (list terminated by the END action).
2880  * @param[in] external
2881  *   This flow rule is created by request external to PMD.
2882  * @param[out] error
2883  *   Perform verbose error reporting if not NULL.
2884  * @return
2885  *   0 on success, negative value otherwise
2886  */
2887 static int
2888 flow_create_split_outer(struct rte_eth_dev *dev,
2889                         struct rte_flow *flow,
2890                         const struct rte_flow_attr *attr,
2891                         const struct rte_flow_item items[],
2892                         const struct rte_flow_action actions[],
2893                         bool external, struct rte_flow_error *error)
2894 {
2895         int ret;
2896
2897         ret = flow_create_split_inner(dev, flow, NULL, attr, items,
2898                                       actions, external, error);
2899         assert(ret <= 0);
2900         return ret;
2901 }
2902
2903 /**
2904  * Create a flow and add it to @p list.
2905  *
2906  * @param dev
2907  *   Pointer to Ethernet device.
2908  * @param list
2909  *   Pointer to a TAILQ flow list. If this parameter NULL,
2910  *   no list insertion occurred, flow is just created,
2911  *   this is caller's responsibility to track the
2912  *   created flow.
2913  * @param[in] attr
2914  *   Flow rule attributes.
2915  * @param[in] items
2916  *   Pattern specification (list terminated by the END pattern item).
2917  * @param[in] actions
2918  *   Associated actions (list terminated by the END action).
2919  * @param[in] external
2920  *   This flow rule is created by request external to PMD.
2921  * @param[out] error
2922  *   Perform verbose error reporting if not NULL.
2923  *
2924  * @return
2925  *   A flow on success, NULL otherwise and rte_errno is set.
2926  */
2927 static struct rte_flow *
2928 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2929                  const struct rte_flow_attr *attr,
2930                  const struct rte_flow_item items[],
2931                  const struct rte_flow_action actions[],
2932                  bool external, struct rte_flow_error *error)
2933 {
2934         struct mlx5_priv *priv = dev->data->dev_private;
2935         struct rte_flow *flow = NULL;
2936         struct mlx5_flow *dev_flow;
2937         const struct rte_flow_action_rss *rss;
2938         union {
2939                 struct rte_flow_expand_rss buf;
2940                 uint8_t buffer[2048];
2941         } expand_buffer;
2942         union {
2943                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
2944                 uint8_t buffer[2048];
2945         } actions_rx;
2946         union {
2947                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
2948                 uint8_t buffer[2048];
2949         } actions_hairpin_tx;
2950         union {
2951                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
2952                 uint8_t buffer[2048];
2953         } items_tx;
2954         struct rte_flow_expand_rss *buf = &expand_buffer.buf;
2955         const struct rte_flow_action *p_actions_rx = actions;
2956         int ret;
2957         uint32_t i;
2958         uint32_t flow_size;
2959         int hairpin_flow = 0;
2960         uint32_t hairpin_id = 0;
2961         struct rte_flow_attr attr_tx = { .priority = 0 };
2962
2963         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
2964         if (hairpin_flow > 0) {
2965                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
2966                         rte_errno = EINVAL;
2967                         return NULL;
2968                 }
2969                 flow_hairpin_split(dev, actions, actions_rx.actions,
2970                                    actions_hairpin_tx.actions, items_tx.items,
2971                                    &hairpin_id);
2972                 p_actions_rx = actions_rx.actions;
2973         }
2974         ret = flow_drv_validate(dev, attr, items, p_actions_rx, external,
2975                                 error);
2976         if (ret < 0)
2977                 goto error_before_flow;
2978         flow_size = sizeof(struct rte_flow);
2979         rss = flow_get_rss_action(p_actions_rx);
2980         if (rss)
2981                 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
2982                                             sizeof(void *));
2983         else
2984                 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
2985         flow = rte_calloc(__func__, 1, flow_size, 0);
2986         if (!flow) {
2987                 rte_errno = ENOMEM;
2988                 goto error_before_flow;
2989         }
2990         flow->drv_type = flow_get_drv_type(dev, attr);
2991         if (hairpin_id != 0)
2992                 flow->hairpin_flow_id = hairpin_id;
2993         assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
2994                flow->drv_type < MLX5_FLOW_TYPE_MAX);
2995         flow->rss.queue = (void *)(flow + 1);
2996         if (rss) {
2997                 /*
2998                  * The following information is required by
2999                  * mlx5_flow_hashfields_adjust() in advance.
3000                  */
3001                 flow->rss.level = rss->level;
3002                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
3003                 flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
3004         }
3005         LIST_INIT(&flow->dev_flows);
3006         if (rss && rss->types) {
3007                 unsigned int graph_root;
3008
3009                 graph_root = find_graph_root(items, rss->level);
3010                 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
3011                                           items, rss->types,
3012                                           mlx5_support_expansion,
3013                                           graph_root);
3014                 assert(ret > 0 &&
3015                        (unsigned int)ret < sizeof(expand_buffer.buffer));
3016         } else {
3017                 buf->entries = 1;
3018                 buf->entry[0].pattern = (void *)(uintptr_t)items;
3019         }
3020         for (i = 0; i < buf->entries; ++i) {
3021                 /*
3022                  * The splitter may create multiple dev_flows,
3023                  * depending on configuration. In the simplest
3024                  * case it just creates unmodified original flow.
3025                  */
3026                 ret = flow_create_split_outer(dev, flow, attr,
3027                                               buf->entry[i].pattern,
3028                                               p_actions_rx, external,
3029                                               error);
3030                 if (ret < 0)
3031                         goto error;
3032         }
3033         /* Create the tx flow. */
3034         if (hairpin_flow) {
3035                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
3036                 attr_tx.ingress = 0;
3037                 attr_tx.egress = 1;
3038                 dev_flow = flow_drv_prepare(flow, &attr_tx, items_tx.items,
3039                                             actions_hairpin_tx.actions, error);
3040                 if (!dev_flow)
3041                         goto error;
3042                 dev_flow->flow = flow;
3043                 dev_flow->external = 0;
3044                 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
3045                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
3046                                          items_tx.items,
3047                                          actions_hairpin_tx.actions, error);
3048                 if (ret < 0)
3049                         goto error;
3050         }
3051         if (dev->data->dev_started) {
3052                 ret = flow_drv_apply(dev, flow, error);
3053                 if (ret < 0)
3054                         goto error;
3055         }
3056         if (list)
3057                 TAILQ_INSERT_TAIL(list, flow, next);
3058         flow_rxq_flags_set(dev, flow);
3059         return flow;
3060 error_before_flow:
3061         if (hairpin_id)
3062                 mlx5_flow_id_release(priv->sh->flow_id_pool,
3063                                      hairpin_id);
3064         return NULL;
3065 error:
3066         ret = rte_errno; /* Save rte_errno before cleanup. */
3067         if (flow->hairpin_flow_id)
3068                 mlx5_flow_id_release(priv->sh->flow_id_pool,
3069                                      flow->hairpin_flow_id);
3070         assert(flow);
3071         flow_drv_destroy(dev, flow);
3072         rte_free(flow);
3073         rte_errno = ret; /* Restore rte_errno. */
3074         return NULL;
3075 }
3076
3077 /**
3078  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
3079  * incoming packets to table 1.
3080  *
3081  * Other flow rules, requested for group n, will be created in
3082  * e-switch table n+1.
3083  * Jump action to e-switch group n will be created to group n+1.
3084  *
3085  * Used when working in switchdev mode, to utilise advantages of table 1
3086  * and above.
3087  *
3088  * @param dev
3089  *   Pointer to Ethernet device.
3090  *
3091  * @return
3092  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
3093  */
3094 struct rte_flow *
3095 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
3096 {
3097         const struct rte_flow_attr attr = {
3098                 .group = 0,
3099                 .priority = 0,
3100                 .ingress = 1,
3101                 .egress = 0,
3102                 .transfer = 1,
3103         };
3104         const struct rte_flow_item pattern = {
3105                 .type = RTE_FLOW_ITEM_TYPE_END,
3106         };
3107         struct rte_flow_action_jump jump = {
3108                 .group = 1,
3109         };
3110         const struct rte_flow_action actions[] = {
3111                 {
3112                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3113                         .conf = &jump,
3114                 },
3115                 {
3116                         .type = RTE_FLOW_ACTION_TYPE_END,
3117                 },
3118         };
3119         struct mlx5_priv *priv = dev->data->dev_private;
3120         struct rte_flow_error error;
3121
3122         return flow_list_create(dev, &priv->ctrl_flows, &attr, &pattern,
3123                                 actions, false, &error);
3124 }
3125
3126 /**
3127  * Create a flow.
3128  *
3129  * @see rte_flow_create()
3130  * @see rte_flow_ops
3131  */
3132 struct rte_flow *
3133 mlx5_flow_create(struct rte_eth_dev *dev,
3134                  const struct rte_flow_attr *attr,
3135                  const struct rte_flow_item items[],
3136                  const struct rte_flow_action actions[],
3137                  struct rte_flow_error *error)
3138 {
3139         struct mlx5_priv *priv = dev->data->dev_private;
3140
3141         return flow_list_create(dev, &priv->flows,
3142                                 attr, items, actions, true, error);
3143 }
3144
3145 /**
3146  * Destroy a flow in a list.
3147  *
3148  * @param dev
3149  *   Pointer to Ethernet device.
3150  * @param list
3151  *   Pointer to a TAILQ flow list. If this parameter NULL,
3152  *   there is no flow removal from the list.
3153  * @param[in] flow
3154  *   Flow to destroy.
3155  */
3156 static void
3157 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
3158                   struct rte_flow *flow)
3159 {
3160         struct mlx5_priv *priv = dev->data->dev_private;
3161
3162         /*
3163          * Update RX queue flags only if port is started, otherwise it is
3164          * already clean.
3165          */
3166         if (dev->data->dev_started)
3167                 flow_rxq_flags_trim(dev, flow);
3168         if (flow->hairpin_flow_id)
3169                 mlx5_flow_id_release(priv->sh->flow_id_pool,
3170                                      flow->hairpin_flow_id);
3171         flow_drv_destroy(dev, flow);
3172         if (list)
3173                 TAILQ_REMOVE(list, flow, next);
3174         rte_free(flow->fdir);
3175         rte_free(flow);
3176 }
3177
3178 /**
3179  * Destroy all flows.
3180  *
3181  * @param dev
3182  *   Pointer to Ethernet device.
3183  * @param list
3184  *   Pointer to a TAILQ flow list.
3185  */
3186 void
3187 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
3188 {
3189         while (!TAILQ_EMPTY(list)) {
3190                 struct rte_flow *flow;
3191
3192                 flow = TAILQ_FIRST(list);
3193                 flow_list_destroy(dev, list, flow);
3194         }
3195 }
3196
3197 /**
3198  * Remove all flows.
3199  *
3200  * @param dev
3201  *   Pointer to Ethernet device.
3202  * @param list
3203  *   Pointer to a TAILQ flow list.
3204  */
3205 void
3206 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
3207 {
3208         struct rte_flow *flow;
3209
3210         TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next)
3211                 flow_drv_remove(dev, flow);
3212         flow_rxq_flags_clear(dev);
3213 }
3214
3215 /**
3216  * Add all flows.
3217  *
3218  * @param dev
3219  *   Pointer to Ethernet device.
3220  * @param list
3221  *   Pointer to a TAILQ flow list.
3222  *
3223  * @return
3224  *   0 on success, a negative errno value otherwise and rte_errno is set.
3225  */
3226 int
3227 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
3228 {
3229         struct rte_flow *flow;
3230         struct rte_flow_error error;
3231         int ret = 0;
3232
3233         TAILQ_FOREACH(flow, list, next) {
3234                 ret = flow_drv_apply(dev, flow, &error);
3235                 if (ret < 0)
3236                         goto error;
3237                 flow_rxq_flags_set(dev, flow);
3238         }
3239         return 0;
3240 error:
3241         ret = rte_errno; /* Save rte_errno before cleanup. */
3242         mlx5_flow_stop(dev, list);
3243         rte_errno = ret; /* Restore rte_errno. */
3244         return -rte_errno;
3245 }
3246
3247 /**
3248  * Verify the flow list is empty
3249  *
3250  * @param dev
3251  *  Pointer to Ethernet device.
3252  *
3253  * @return the number of flows not released.
3254  */
3255 int
3256 mlx5_flow_verify(struct rte_eth_dev *dev)
3257 {
3258         struct mlx5_priv *priv = dev->data->dev_private;
3259         struct rte_flow *flow;
3260         int ret = 0;
3261
3262         TAILQ_FOREACH(flow, &priv->flows, next) {
3263                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
3264                         dev->data->port_id, (void *)flow);
3265                 ++ret;
3266         }
3267         return ret;
3268 }
3269
3270 /**
3271  * Enable default hairpin egress flow.
3272  *
3273  * @param dev
3274  *   Pointer to Ethernet device.
3275  * @param queue
3276  *   The queue index.
3277  *
3278  * @return
3279  *   0 on success, a negative errno value otherwise and rte_errno is set.
3280  */
3281 int
3282 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
3283                             uint32_t queue)
3284 {
3285         struct mlx5_priv *priv = dev->data->dev_private;
3286         const struct rte_flow_attr attr = {
3287                 .egress = 1,
3288                 .priority = 0,
3289         };
3290         struct mlx5_rte_flow_item_tx_queue queue_spec = {
3291                 .queue = queue,
3292         };
3293         struct mlx5_rte_flow_item_tx_queue queue_mask = {
3294                 .queue = UINT32_MAX,
3295         };
3296         struct rte_flow_item items[] = {
3297                 {
3298                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
3299                         .spec = &queue_spec,
3300                         .last = NULL,
3301                         .mask = &queue_mask,
3302                 },
3303                 {
3304                         .type = RTE_FLOW_ITEM_TYPE_END,
3305                 },
3306         };
3307         struct rte_flow_action_jump jump = {
3308                 .group = MLX5_HAIRPIN_TX_TABLE,
3309         };
3310         struct rte_flow_action actions[2];
3311         struct rte_flow *flow;
3312         struct rte_flow_error error;
3313
3314         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
3315         actions[0].conf = &jump;
3316         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
3317         flow = flow_list_create(dev, &priv->ctrl_flows,
3318                                 &attr, items, actions, false, &error);
3319         if (!flow) {
3320                 DRV_LOG(DEBUG,
3321                         "Failed to create ctrl flow: rte_errno(%d),"
3322                         " type(%d), message(%s)",
3323                         rte_errno, error.type,
3324                         error.message ? error.message : " (no stated reason)");
3325                 return -rte_errno;
3326         }
3327         return 0;
3328 }
3329
3330 /**
3331  * Enable a control flow configured from the control plane.
3332  *
3333  * @param dev
3334  *   Pointer to Ethernet device.
3335  * @param eth_spec
3336  *   An Ethernet flow spec to apply.
3337  * @param eth_mask
3338  *   An Ethernet flow mask to apply.
3339  * @param vlan_spec
3340  *   A VLAN flow spec to apply.
3341  * @param vlan_mask
3342  *   A VLAN flow mask to apply.
3343  *
3344  * @return
3345  *   0 on success, a negative errno value otherwise and rte_errno is set.
3346  */
3347 int
3348 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
3349                     struct rte_flow_item_eth *eth_spec,
3350                     struct rte_flow_item_eth *eth_mask,
3351                     struct rte_flow_item_vlan *vlan_spec,
3352                     struct rte_flow_item_vlan *vlan_mask)
3353 {
3354         struct mlx5_priv *priv = dev->data->dev_private;
3355         const struct rte_flow_attr attr = {
3356                 .ingress = 1,
3357                 .priority = MLX5_FLOW_PRIO_RSVD,
3358         };
3359         struct rte_flow_item items[] = {
3360                 {
3361                         .type = RTE_FLOW_ITEM_TYPE_ETH,
3362                         .spec = eth_spec,
3363                         .last = NULL,
3364                         .mask = eth_mask,
3365                 },
3366                 {
3367                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
3368                                               RTE_FLOW_ITEM_TYPE_END,
3369                         .spec = vlan_spec,
3370                         .last = NULL,
3371                         .mask = vlan_mask,
3372                 },
3373                 {
3374                         .type = RTE_FLOW_ITEM_TYPE_END,
3375                 },
3376         };
3377         uint16_t queue[priv->reta_idx_n];
3378         struct rte_flow_action_rss action_rss = {
3379                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
3380                 .level = 0,
3381                 .types = priv->rss_conf.rss_hf,
3382                 .key_len = priv->rss_conf.rss_key_len,
3383                 .queue_num = priv->reta_idx_n,
3384                 .key = priv->rss_conf.rss_key,
3385                 .queue = queue,
3386         };
3387         struct rte_flow_action actions[] = {
3388                 {
3389                         .type = RTE_FLOW_ACTION_TYPE_RSS,
3390                         .conf = &action_rss,
3391                 },
3392                 {
3393                         .type = RTE_FLOW_ACTION_TYPE_END,
3394                 },
3395         };
3396         struct rte_flow *flow;
3397         struct rte_flow_error error;
3398         unsigned int i;
3399
3400         if (!priv->reta_idx_n || !priv->rxqs_n) {
3401                 return 0;
3402         }
3403         for (i = 0; i != priv->reta_idx_n; ++i)
3404                 queue[i] = (*priv->reta_idx)[i];
3405         flow = flow_list_create(dev, &priv->ctrl_flows,
3406                                 &attr, items, actions, false, &error);
3407         if (!flow)
3408                 return -rte_errno;
3409         return 0;
3410 }
3411
3412 /**
3413  * Enable a flow control configured from the control plane.
3414  *
3415  * @param dev
3416  *   Pointer to Ethernet device.
3417  * @param eth_spec
3418  *   An Ethernet flow spec to apply.
3419  * @param eth_mask
3420  *   An Ethernet flow mask to apply.
3421  *
3422  * @return
3423  *   0 on success, a negative errno value otherwise and rte_errno is set.
3424  */
3425 int
3426 mlx5_ctrl_flow(struct rte_eth_dev *dev,
3427                struct rte_flow_item_eth *eth_spec,
3428                struct rte_flow_item_eth *eth_mask)
3429 {
3430         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
3431 }
3432
3433 /**
3434  * Destroy a flow.
3435  *
3436  * @see rte_flow_destroy()
3437  * @see rte_flow_ops
3438  */
3439 int
3440 mlx5_flow_destroy(struct rte_eth_dev *dev,
3441                   struct rte_flow *flow,
3442                   struct rte_flow_error *error __rte_unused)
3443 {
3444         struct mlx5_priv *priv = dev->data->dev_private;
3445
3446         flow_list_destroy(dev, &priv->flows, flow);
3447         return 0;
3448 }
3449
3450 /**
3451  * Destroy all flows.
3452  *
3453  * @see rte_flow_flush()
3454  * @see rte_flow_ops
3455  */
3456 int
3457 mlx5_flow_flush(struct rte_eth_dev *dev,
3458                 struct rte_flow_error *error __rte_unused)
3459 {
3460         struct mlx5_priv *priv = dev->data->dev_private;
3461
3462         mlx5_flow_list_flush(dev, &priv->flows);
3463         return 0;
3464 }
3465
3466 /**
3467  * Isolated mode.
3468  *
3469  * @see rte_flow_isolate()
3470  * @see rte_flow_ops
3471  */
3472 int
3473 mlx5_flow_isolate(struct rte_eth_dev *dev,
3474                   int enable,
3475                   struct rte_flow_error *error)
3476 {
3477         struct mlx5_priv *priv = dev->data->dev_private;
3478
3479         if (dev->data->dev_started) {
3480                 rte_flow_error_set(error, EBUSY,
3481                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3482                                    NULL,
3483                                    "port must be stopped first");
3484                 return -rte_errno;
3485         }
3486         priv->isolated = !!enable;
3487         if (enable)
3488                 dev->dev_ops = &mlx5_dev_ops_isolate;
3489         else
3490                 dev->dev_ops = &mlx5_dev_ops;
3491         return 0;
3492 }
3493
3494 /**
3495  * Query a flow.
3496  *
3497  * @see rte_flow_query()
3498  * @see rte_flow_ops
3499  */
3500 static int
3501 flow_drv_query(struct rte_eth_dev *dev,
3502                struct rte_flow *flow,
3503                const struct rte_flow_action *actions,
3504                void *data,
3505                struct rte_flow_error *error)
3506 {
3507         const struct mlx5_flow_driver_ops *fops;
3508         enum mlx5_flow_drv_type ftype = flow->drv_type;
3509
3510         assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
3511         fops = flow_get_drv_ops(ftype);
3512
3513         return fops->query(dev, flow, actions, data, error);
3514 }
3515
3516 /**
3517  * Query a flow.
3518  *
3519  * @see rte_flow_query()
3520  * @see rte_flow_ops
3521  */
3522 int
3523 mlx5_flow_query(struct rte_eth_dev *dev,
3524                 struct rte_flow *flow,
3525                 const struct rte_flow_action *actions,
3526                 void *data,
3527                 struct rte_flow_error *error)
3528 {
3529         int ret;
3530
3531         ret = flow_drv_query(dev, flow, actions, data, error);
3532         if (ret < 0)
3533                 return ret;
3534         return 0;
3535 }
3536
3537 /**
3538  * Convert a flow director filter to a generic flow.
3539  *
3540  * @param dev
3541  *   Pointer to Ethernet device.
3542  * @param fdir_filter
3543  *   Flow director filter to add.
3544  * @param attributes
3545  *   Generic flow parameters structure.
3546  *
3547  * @return
3548  *   0 on success, a negative errno value otherwise and rte_errno is set.
3549  */
3550 static int
3551 flow_fdir_filter_convert(struct rte_eth_dev *dev,
3552                          const struct rte_eth_fdir_filter *fdir_filter,
3553                          struct mlx5_fdir *attributes)
3554 {
3555         struct mlx5_priv *priv = dev->data->dev_private;
3556         const struct rte_eth_fdir_input *input = &fdir_filter->input;
3557         const struct rte_eth_fdir_masks *mask =
3558                 &dev->data->dev_conf.fdir_conf.mask;
3559
3560         /* Validate queue number. */
3561         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
3562                 DRV_LOG(ERR, "port %u invalid queue number %d",
3563                         dev->data->port_id, fdir_filter->action.rx_queue);
3564                 rte_errno = EINVAL;
3565                 return -rte_errno;
3566         }
3567         attributes->attr.ingress = 1;
3568         attributes->items[0] = (struct rte_flow_item) {
3569                 .type = RTE_FLOW_ITEM_TYPE_ETH,
3570                 .spec = &attributes->l2,
3571                 .mask = &attributes->l2_mask,
3572         };
3573         switch (fdir_filter->action.behavior) {
3574         case RTE_ETH_FDIR_ACCEPT:
3575                 attributes->actions[0] = (struct rte_flow_action){
3576                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
3577                         .conf = &attributes->queue,
3578                 };
3579                 break;
3580         case RTE_ETH_FDIR_REJECT:
3581                 attributes->actions[0] = (struct rte_flow_action){
3582                         .type = RTE_FLOW_ACTION_TYPE_DROP,
3583                 };
3584                 break;
3585         default:
3586                 DRV_LOG(ERR, "port %u invalid behavior %d",
3587                         dev->data->port_id,
3588                         fdir_filter->action.behavior);
3589                 rte_errno = ENOTSUP;
3590                 return -rte_errno;
3591         }
3592         attributes->queue.index = fdir_filter->action.rx_queue;
3593         /* Handle L3. */
3594         switch (fdir_filter->input.flow_type) {
3595         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
3596         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
3597         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
3598                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
3599                         .src_addr = input->flow.ip4_flow.src_ip,
3600                         .dst_addr = input->flow.ip4_flow.dst_ip,
3601                         .time_to_live = input->flow.ip4_flow.ttl,
3602                         .type_of_service = input->flow.ip4_flow.tos,
3603                 };
3604                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
3605                         .src_addr = mask->ipv4_mask.src_ip,
3606                         .dst_addr = mask->ipv4_mask.dst_ip,
3607                         .time_to_live = mask->ipv4_mask.ttl,
3608                         .type_of_service = mask->ipv4_mask.tos,
3609                         .next_proto_id = mask->ipv4_mask.proto,
3610                 };
3611                 attributes->items[1] = (struct rte_flow_item){
3612                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
3613                         .spec = &attributes->l3,
3614                         .mask = &attributes->l3_mask,
3615                 };
3616                 break;
3617         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
3618         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
3619         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
3620                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
3621                         .hop_limits = input->flow.ipv6_flow.hop_limits,
3622                         .proto = input->flow.ipv6_flow.proto,
3623                 };
3624
3625                 memcpy(attributes->l3.ipv6.hdr.src_addr,
3626                        input->flow.ipv6_flow.src_ip,
3627                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
3628                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
3629                        input->flow.ipv6_flow.dst_ip,
3630                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
3631                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
3632                        mask->ipv6_mask.src_ip,
3633                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
3634                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
3635                        mask->ipv6_mask.dst_ip,
3636                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
3637                 attributes->items[1] = (struct rte_flow_item){
3638                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
3639                         .spec = &attributes->l3,
3640                         .mask = &attributes->l3_mask,
3641                 };
3642                 break;
3643         default:
3644                 DRV_LOG(ERR, "port %u invalid flow type%d",
3645                         dev->data->port_id, fdir_filter->input.flow_type);
3646                 rte_errno = ENOTSUP;
3647                 return -rte_errno;
3648         }
3649         /* Handle L4. */
3650         switch (fdir_filter->input.flow_type) {
3651         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
3652                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
3653                         .src_port = input->flow.udp4_flow.src_port,
3654                         .dst_port = input->flow.udp4_flow.dst_port,
3655                 };
3656                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
3657                         .src_port = mask->src_port_mask,
3658                         .dst_port = mask->dst_port_mask,
3659                 };
3660                 attributes->items[2] = (struct rte_flow_item){
3661                         .type = RTE_FLOW_ITEM_TYPE_UDP,
3662                         .spec = &attributes->l4,
3663                         .mask = &attributes->l4_mask,
3664                 };
3665                 break;
3666         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
3667                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
3668                         .src_port = input->flow.tcp4_flow.src_port,
3669                         .dst_port = input->flow.tcp4_flow.dst_port,
3670                 };
3671                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
3672                         .src_port = mask->src_port_mask,
3673                         .dst_port = mask->dst_port_mask,
3674                 };
3675                 attributes->items[2] = (struct rte_flow_item){
3676                         .type = RTE_FLOW_ITEM_TYPE_TCP,
3677                         .spec = &attributes->l4,
3678                         .mask = &attributes->l4_mask,
3679                 };
3680                 break;
3681         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
3682                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
3683                         .src_port = input->flow.udp6_flow.src_port,
3684                         .dst_port = input->flow.udp6_flow.dst_port,
3685                 };
3686                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
3687                         .src_port = mask->src_port_mask,
3688                         .dst_port = mask->dst_port_mask,
3689                 };
3690                 attributes->items[2] = (struct rte_flow_item){
3691                         .type = RTE_FLOW_ITEM_TYPE_UDP,
3692                         .spec = &attributes->l4,
3693                         .mask = &attributes->l4_mask,
3694                 };
3695                 break;
3696         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
3697                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
3698                         .src_port = input->flow.tcp6_flow.src_port,
3699                         .dst_port = input->flow.tcp6_flow.dst_port,
3700                 };
3701                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
3702                         .src_port = mask->src_port_mask,
3703                         .dst_port = mask->dst_port_mask,
3704                 };
3705                 attributes->items[2] = (struct rte_flow_item){
3706                         .type = RTE_FLOW_ITEM_TYPE_TCP,
3707                         .spec = &attributes->l4,
3708                         .mask = &attributes->l4_mask,
3709                 };
3710                 break;
3711         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
3712         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
3713                 break;
3714         default:
3715                 DRV_LOG(ERR, "port %u invalid flow type%d",
3716                         dev->data->port_id, fdir_filter->input.flow_type);
3717                 rte_errno = ENOTSUP;
3718                 return -rte_errno;
3719         }
3720         return 0;
3721 }
3722
3723 #define FLOW_FDIR_CMP(f1, f2, fld) \
3724         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
3725
3726 /**
3727  * Compare two FDIR flows. If items and actions are identical, the two flows are
3728  * regarded as same.
3729  *
3730  * @param dev
3731  *   Pointer to Ethernet device.
3732  * @param f1
3733  *   FDIR flow to compare.
3734  * @param f2
3735  *   FDIR flow to compare.
3736  *
3737  * @return
3738  *   Zero on match, 1 otherwise.
3739  */
3740 static int
3741 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
3742 {
3743         if (FLOW_FDIR_CMP(f1, f2, attr) ||
3744             FLOW_FDIR_CMP(f1, f2, l2) ||
3745             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
3746             FLOW_FDIR_CMP(f1, f2, l3) ||
3747             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
3748             FLOW_FDIR_CMP(f1, f2, l4) ||
3749             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
3750             FLOW_FDIR_CMP(f1, f2, actions[0].type))
3751                 return 1;
3752         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
3753             FLOW_FDIR_CMP(f1, f2, queue))
3754                 return 1;
3755         return 0;
3756 }
3757
3758 /**
3759  * Search device flow list to find out a matched FDIR flow.
3760  *
3761  * @param dev
3762  *   Pointer to Ethernet device.
3763  * @param fdir_flow
3764  *   FDIR flow to lookup.
3765  *
3766  * @return
3767  *   Pointer of flow if found, NULL otherwise.
3768  */
3769 static struct rte_flow *
3770 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
3771 {
3772         struct mlx5_priv *priv = dev->data->dev_private;
3773         struct rte_flow *flow = NULL;
3774
3775         assert(fdir_flow);
3776         TAILQ_FOREACH(flow, &priv->flows, next) {
3777                 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
3778                         DRV_LOG(DEBUG, "port %u found FDIR flow %p",
3779                                 dev->data->port_id, (void *)flow);
3780                         break;
3781                 }
3782         }
3783         return flow;
3784 }
3785
3786 /**
3787  * Add new flow director filter and store it in list.
3788  *
3789  * @param dev
3790  *   Pointer to Ethernet device.
3791  * @param fdir_filter
3792  *   Flow director filter to add.
3793  *
3794  * @return
3795  *   0 on success, a negative errno value otherwise and rte_errno is set.
3796  */
3797 static int
3798 flow_fdir_filter_add(struct rte_eth_dev *dev,
3799                      const struct rte_eth_fdir_filter *fdir_filter)
3800 {
3801         struct mlx5_priv *priv = dev->data->dev_private;
3802         struct mlx5_fdir *fdir_flow;
3803         struct rte_flow *flow;
3804         int ret;
3805
3806         fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
3807         if (!fdir_flow) {
3808                 rte_errno = ENOMEM;
3809                 return -rte_errno;
3810         }
3811         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
3812         if (ret)
3813                 goto error;
3814         flow = flow_fdir_filter_lookup(dev, fdir_flow);
3815         if (flow) {
3816                 rte_errno = EEXIST;
3817                 goto error;
3818         }
3819         flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
3820                                 fdir_flow->items, fdir_flow->actions, true,
3821                                 NULL);
3822         if (!flow)
3823                 goto error;
3824         assert(!flow->fdir);
3825         flow->fdir = fdir_flow;
3826         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
3827                 dev->data->port_id, (void *)flow);
3828         return 0;
3829 error:
3830         rte_free(fdir_flow);
3831         return -rte_errno;
3832 }
3833
3834 /**
3835  * Delete specific filter.
3836  *
3837  * @param dev
3838  *   Pointer to Ethernet device.
3839  * @param fdir_filter
3840  *   Filter to be deleted.
3841  *
3842  * @return
3843  *   0 on success, a negative errno value otherwise and rte_errno is set.
3844  */
3845 static int
3846 flow_fdir_filter_delete(struct rte_eth_dev *dev,
3847                         const struct rte_eth_fdir_filter *fdir_filter)
3848 {
3849         struct mlx5_priv *priv = dev->data->dev_private;
3850         struct rte_flow *flow;
3851         struct mlx5_fdir fdir_flow = {
3852                 .attr.group = 0,
3853         };
3854         int ret;
3855
3856         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
3857         if (ret)
3858                 return -rte_errno;
3859         flow = flow_fdir_filter_lookup(dev, &fdir_flow);
3860         if (!flow) {
3861                 rte_errno = ENOENT;
3862                 return -rte_errno;
3863         }
3864         flow_list_destroy(dev, &priv->flows, flow);
3865         DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
3866                 dev->data->port_id, (void *)flow);
3867         return 0;
3868 }
3869
3870 /**
3871  * Update queue for specific filter.
3872  *
3873  * @param dev
3874  *   Pointer to Ethernet device.
3875  * @param fdir_filter
3876  *   Filter to be updated.
3877  *
3878  * @return
3879  *   0 on success, a negative errno value otherwise and rte_errno is set.
3880  */
3881 static int
3882 flow_fdir_filter_update(struct rte_eth_dev *dev,
3883                         const struct rte_eth_fdir_filter *fdir_filter)
3884 {
3885         int ret;
3886
3887         ret = flow_fdir_filter_delete(dev, fdir_filter);
3888         if (ret)
3889                 return ret;
3890         return flow_fdir_filter_add(dev, fdir_filter);
3891 }
3892
3893 /**
3894  * Flush all filters.
3895  *
3896  * @param dev
3897  *   Pointer to Ethernet device.
3898  */
3899 static void
3900 flow_fdir_filter_flush(struct rte_eth_dev *dev)
3901 {
3902         struct mlx5_priv *priv = dev->data->dev_private;
3903
3904         mlx5_flow_list_flush(dev, &priv->flows);
3905 }
3906
3907 /**
3908  * Get flow director information.
3909  *
3910  * @param dev
3911  *   Pointer to Ethernet device.
3912  * @param[out] fdir_info
3913  *   Resulting flow director information.
3914  */
3915 static void
3916 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
3917 {
3918         struct rte_eth_fdir_masks *mask =
3919                 &dev->data->dev_conf.fdir_conf.mask;
3920
3921         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
3922         fdir_info->guarant_spc = 0;
3923         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
3924         fdir_info->max_flexpayload = 0;
3925         fdir_info->flow_types_mask[0] = 0;
3926         fdir_info->flex_payload_unit = 0;
3927         fdir_info->max_flex_payload_segment_num = 0;
3928         fdir_info->flex_payload_limit = 0;
3929         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
3930 }
3931
3932 /**
3933  * Deal with flow director operations.
3934  *
3935  * @param dev
3936  *   Pointer to Ethernet device.
3937  * @param filter_op
3938  *   Operation to perform.
3939  * @param arg
3940  *   Pointer to operation-specific structure.
3941  *
3942  * @return
3943  *   0 on success, a negative errno value otherwise and rte_errno is set.
3944  */
3945 static int
3946 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
3947                     void *arg)
3948 {
3949         enum rte_fdir_mode fdir_mode =
3950                 dev->data->dev_conf.fdir_conf.mode;
3951
3952         if (filter_op == RTE_ETH_FILTER_NOP)
3953                 return 0;
3954         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
3955             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
3956                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
3957                         dev->data->port_id, fdir_mode);
3958                 rte_errno = EINVAL;
3959                 return -rte_errno;
3960         }
3961         switch (filter_op) {
3962         case RTE_ETH_FILTER_ADD:
3963                 return flow_fdir_filter_add(dev, arg);
3964         case RTE_ETH_FILTER_UPDATE:
3965                 return flow_fdir_filter_update(dev, arg);
3966         case RTE_ETH_FILTER_DELETE:
3967                 return flow_fdir_filter_delete(dev, arg);
3968         case RTE_ETH_FILTER_FLUSH:
3969                 flow_fdir_filter_flush(dev);
3970                 break;
3971         case RTE_ETH_FILTER_INFO:
3972                 flow_fdir_info_get(dev, arg);
3973                 break;
3974         default:
3975                 DRV_LOG(DEBUG, "port %u unknown operation %u",
3976                         dev->data->port_id, filter_op);
3977                 rte_errno = EINVAL;
3978                 return -rte_errno;
3979         }
3980         return 0;
3981 }
3982
3983 /**
3984  * Manage filter operations.
3985  *
3986  * @param dev
3987  *   Pointer to Ethernet device structure.
3988  * @param filter_type
3989  *   Filter type.
3990  * @param filter_op
3991  *   Operation to perform.
3992  * @param arg
3993  *   Pointer to operation-specific structure.
3994  *
3995  * @return
3996  *   0 on success, a negative errno value otherwise and rte_errno is set.
3997  */
3998 int
3999 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
4000                      enum rte_filter_type filter_type,
4001                      enum rte_filter_op filter_op,
4002                      void *arg)
4003 {
4004         switch (filter_type) {
4005         case RTE_ETH_FILTER_GENERIC:
4006                 if (filter_op != RTE_ETH_FILTER_GET) {
4007                         rte_errno = EINVAL;
4008                         return -rte_errno;
4009                 }
4010                 *(const void **)arg = &mlx5_flow_ops;
4011                 return 0;
4012         case RTE_ETH_FILTER_FDIR:
4013                 return flow_fdir_ctrl_func(dev, filter_op, arg);
4014         default:
4015                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
4016                         dev->data->port_id, filter_type);
4017                 rte_errno = ENOTSUP;
4018                 return -rte_errno;
4019         }
4020         return 0;
4021 }
4022
4023 #define MLX5_POOL_QUERY_FREQ_US 1000000
4024
4025 /**
4026  * Set the periodic procedure for triggering asynchronous batch queries for all
4027  * the counter pools.
4028  *
4029  * @param[in] sh
4030  *   Pointer to mlx5_ibv_shared object.
4031  */
4032 void
4033 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
4034 {
4035         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
4036         uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
4037         uint32_t us;
4038
4039         cont = MLX5_CNT_CONTAINER(sh, 1, 0);
4040         pools_n += rte_atomic16_read(&cont->n_valid);
4041         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
4042         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
4043         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
4044                 sh->cmng.query_thread_on = 0;
4045                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
4046         } else {
4047                 sh->cmng.query_thread_on = 1;
4048         }
4049 }
4050
4051 /**
4052  * The periodic procedure for triggering asynchronous batch queries for all the
4053  * counter pools. This function is probably called by the host thread.
4054  *
4055  * @param[in] arg
4056  *   The parameter for the alarm process.
4057  */
4058 void
4059 mlx5_flow_query_alarm(void *arg)
4060 {
4061         struct mlx5_ibv_shared *sh = arg;
4062         struct mlx5_devx_obj *dcs;
4063         uint16_t offset;
4064         int ret;
4065         uint8_t batch = sh->cmng.batch;
4066         uint16_t pool_index = sh->cmng.pool_index;
4067         struct mlx5_pools_container *cont;
4068         struct mlx5_pools_container *mcont;
4069         struct mlx5_flow_counter_pool *pool;
4070
4071         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
4072                 goto set_alarm;
4073 next_container:
4074         cont = MLX5_CNT_CONTAINER(sh, batch, 1);
4075         mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
4076         /* Check if resize was done and need to flip a container. */
4077         if (cont != mcont) {
4078                 if (cont->pools) {
4079                         /* Clean the old container. */
4080                         rte_free(cont->pools);
4081                         memset(cont, 0, sizeof(*cont));
4082                 }
4083                 rte_cio_wmb();
4084                  /* Flip the host container. */
4085                 sh->cmng.mhi[batch] ^= (uint8_t)2;
4086                 cont = mcont;
4087         }
4088         if (!cont->pools) {
4089                 /* 2 empty containers case is unexpected. */
4090                 if (unlikely(batch != sh->cmng.batch))
4091                         goto set_alarm;
4092                 batch ^= 0x1;
4093                 pool_index = 0;
4094                 goto next_container;
4095         }
4096         pool = cont->pools[pool_index];
4097         if (pool->raw_hw)
4098                 /* There is a pool query in progress. */
4099                 goto set_alarm;
4100         pool->raw_hw =
4101                 LIST_FIRST(&sh->cmng.free_stat_raws);
4102         if (!pool->raw_hw)
4103                 /* No free counter statistics raw memory. */
4104                 goto set_alarm;
4105         dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
4106                                                               (&pool->a64_dcs);
4107         offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
4108         ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
4109                                                offset, NULL, NULL,
4110                                                pool->raw_hw->mem_mng->dm->id,
4111                                                (void *)(uintptr_t)
4112                                                (pool->raw_hw->data + offset),
4113                                                sh->devx_comp,
4114                                                (uint64_t)(uintptr_t)pool);
4115         if (ret) {
4116                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
4117                         " %d", pool->min_dcs->id);
4118                 pool->raw_hw = NULL;
4119                 goto set_alarm;
4120         }
4121         pool->raw_hw->min_dcs_id = dcs->id;
4122         LIST_REMOVE(pool->raw_hw, next);
4123         sh->cmng.pending_queries++;
4124         pool_index++;
4125         if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
4126                 batch ^= 0x1;
4127                 pool_index = 0;
4128         }
4129 set_alarm:
4130         sh->cmng.batch = batch;
4131         sh->cmng.pool_index = pool_index;
4132         mlx5_set_query_alarm(sh);
4133 }
4134
4135 /**
4136  * Handler for the HW respond about ready values from an asynchronous batch
4137  * query. This function is probably called by the host thread.
4138  *
4139  * @param[in] sh
4140  *   The pointer to the shared IB device context.
4141  * @param[in] async_id
4142  *   The Devx async ID.
4143  * @param[in] status
4144  *   The status of the completion.
4145  */
4146 void
4147 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
4148                                   uint64_t async_id, int status)
4149 {
4150         struct mlx5_flow_counter_pool *pool =
4151                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
4152         struct mlx5_counter_stats_raw *raw_to_free;
4153
4154         if (unlikely(status)) {
4155                 raw_to_free = pool->raw_hw;
4156         } else {
4157                 raw_to_free = pool->raw;
4158                 rte_spinlock_lock(&pool->sl);
4159                 pool->raw = pool->raw_hw;
4160                 rte_spinlock_unlock(&pool->sl);
4161                 rte_atomic64_add(&pool->query_gen, 1);
4162                 /* Be sure the new raw counters data is updated in memory. */
4163                 rte_cio_wmb();
4164         }
4165         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
4166         pool->raw_hw = NULL;
4167         sh->cmng.pending_queries--;
4168 }
4169
4170 /**
4171  * Translate the rte_flow group index to HW table value.
4172  *
4173  * @param[in] attributes
4174  *   Pointer to flow attributes
4175  * @param[in] external
4176  *   Value is part of flow rule created by request external to PMD.
4177  * @param[in] group
4178  *   rte_flow group index value.
4179  * @param[out] table
4180  *   HW table value.
4181  * @param[out] error
4182  *   Pointer to error structure.
4183  *
4184  * @return
4185  *   0 on success, a negative errno value otherwise and rte_errno is set.
4186  */
4187 int
4188 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
4189                          uint32_t group, uint32_t *table,
4190                          struct rte_flow_error *error)
4191 {
4192         if (attributes->transfer && external) {
4193                 if (group == UINT32_MAX)
4194                         return rte_flow_error_set
4195                                                 (error, EINVAL,
4196                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4197                                                  NULL,
4198                                                  "group index not supported");
4199                 *table = group + 1;
4200         } else {
4201                 *table = group;
4202         }
4203         return 0;
4204 }
4205
4206 /**
4207  * Discover availability of metadata reg_c's.
4208  *
4209  * Iteratively use test flows to check availability.
4210  *
4211  * @param[in] dev
4212  *   Pointer to the Ethernet device structure.
4213  *
4214  * @return
4215  *   0 on success, a negative errno value otherwise and rte_errno is set.
4216  */
4217 int
4218 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
4219 {
4220         struct mlx5_priv *priv = dev->data->dev_private;
4221         struct mlx5_dev_config *config = &priv->config;
4222         enum modify_reg idx;
4223         int n = 0;
4224
4225         /* reg_c[0] and reg_c[1] are reserved. */
4226         config->flow_mreg_c[n++] = REG_C_0;
4227         config->flow_mreg_c[n++] = REG_C_1;
4228         /* Discover availability of other reg_c's. */
4229         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
4230                 struct rte_flow_attr attr = {
4231                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4232                         .priority = MLX5_FLOW_PRIO_RSVD,
4233                         .ingress = 1,
4234                 };
4235                 struct rte_flow_item items[] = {
4236                         [0] = {
4237                                 .type = RTE_FLOW_ITEM_TYPE_END,
4238                         },
4239                 };
4240                 struct rte_flow_action actions[] = {
4241                         [0] = {
4242                                 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4243                                 .conf = &(struct mlx5_flow_action_copy_mreg){
4244                                         .src = REG_C_1,
4245                                         .dst = idx,
4246                                 },
4247                         },
4248                         [1] = {
4249                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4250                                 .conf = &(struct rte_flow_action_jump){
4251                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4252                                 },
4253                         },
4254                         [2] = {
4255                                 .type = RTE_FLOW_ACTION_TYPE_END,
4256                         },
4257                 };
4258                 struct rte_flow *flow;
4259                 struct rte_flow_error error;
4260
4261                 if (!config->dv_flow_en)
4262                         break;
4263                 /* Create internal flow, validation skips copy action. */
4264                 flow = flow_list_create(dev, NULL, &attr, items,
4265                                         actions, false, &error);
4266                 if (!flow)
4267                         continue;
4268                 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
4269                         config->flow_mreg_c[n++] = idx;
4270                 flow_list_destroy(dev, NULL, flow);
4271         }
4272         for (; n < MLX5_MREG_C_NUM; ++n)
4273                 config->flow_mreg_c[n] = REG_NONE;
4274         return 0;
4275 }