drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11
  12 /* Verbs header. */
  13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  14 #ifdef PEDANTIC
  15 #pragma GCC diagnostic ignored "-Wpedantic"
  16 #endif
  17 #include <infiniband/verbs.h>
  18 #ifdef PEDANTIC
  19 #pragma GCC diagnostic error "-Wpedantic"
  20 #endif
  21
  22 #include <rte_common.h>
  23 #include <rte_ether.h>
  24 #include <rte_ethdev_driver.h>
  25 #include <rte_flow.h>
  26 #include <rte_flow_driver.h>
  27 #include <rte_malloc.h>
  28 #include <rte_ip.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_flow.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 /* Dev ops structure defined in mlx5.c */
  38 extern const struct eth_dev_ops mlx5_dev_ops;
  39 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
  40
  41 /** Device flow drivers. */
  42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
  44 #endif
  45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  46
  47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  48
  49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  50         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  52         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  53 #endif
  54         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  55         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  56 };
  57
  58 enum mlx5_expansion {
  59         MLX5_EXPANSION_ROOT,
  60         MLX5_EXPANSION_ROOT_OUTER,
  61         MLX5_EXPANSION_ROOT_ETH_VLAN,
  62         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
  63         MLX5_EXPANSION_OUTER_ETH,
  64         MLX5_EXPANSION_OUTER_ETH_VLAN,
  65         MLX5_EXPANSION_OUTER_VLAN,
  66         MLX5_EXPANSION_OUTER_IPV4,
  67         MLX5_EXPANSION_OUTER_IPV4_UDP,
  68         MLX5_EXPANSION_OUTER_IPV4_TCP,
  69         MLX5_EXPANSION_OUTER_IPV6,
  70         MLX5_EXPANSION_OUTER_IPV6_UDP,
  71         MLX5_EXPANSION_OUTER_IPV6_TCP,
  72         MLX5_EXPANSION_VXLAN,
  73         MLX5_EXPANSION_VXLAN_GPE,
  74         MLX5_EXPANSION_GRE,
  75         MLX5_EXPANSION_MPLS,
  76         MLX5_EXPANSION_ETH,
  77         MLX5_EXPANSION_ETH_VLAN,
  78         MLX5_EXPANSION_VLAN,
  79         MLX5_EXPANSION_IPV4,
  80         MLX5_EXPANSION_IPV4_UDP,
  81         MLX5_EXPANSION_IPV4_TCP,
  82         MLX5_EXPANSION_IPV6,
  83         MLX5_EXPANSION_IPV6_UDP,
  84         MLX5_EXPANSION_IPV6_TCP,
  85 };
  86
  87 /** Supported expansion of items. */
  88 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
  89         [MLX5_EXPANSION_ROOT] = {
  90                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
  91                                                  MLX5_EXPANSION_IPV4,
  92                                                  MLX5_EXPANSION_IPV6),
  93                 .type = RTE_FLOW_ITEM_TYPE_END,
  94         },
  95         [MLX5_EXPANSION_ROOT_OUTER] = {
  96                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
  97                                                  MLX5_EXPANSION_OUTER_IPV4,
  98                                                  MLX5_EXPANSION_OUTER_IPV6),
  99                 .type = RTE_FLOW_ITEM_TYPE_END,
 100         },
 101         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 102                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 103                 .type = RTE_FLOW_ITEM_TYPE_END,
 104         },
 105         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 106                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
 107                 .type = RTE_FLOW_ITEM_TYPE_END,
 108         },
 109         [MLX5_EXPANSION_OUTER_ETH] = {
 110                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 111                                                  MLX5_EXPANSION_OUTER_IPV6,
 112                                                  MLX5_EXPANSION_MPLS),
 113                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 114                 .rss_types = 0,
 115         },
 116         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 117                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 118                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 119                 .rss_types = 0,
 120         },
 121         [MLX5_EXPANSION_OUTER_VLAN] = {
 122                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 123                                                  MLX5_EXPANSION_OUTER_IPV6),
 124                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 125         },
 126         [MLX5_EXPANSION_OUTER_IPV4] = {
 127                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 128                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 129                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 130                          MLX5_EXPANSION_GRE,
 131                          MLX5_EXPANSION_IPV4,
 132                          MLX5_EXPANSION_IPV6),
 133                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 134                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 135                         ETH_RSS_NONFRAG_IPV4_OTHER,
 136         },
 137         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 138                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 139                                                  MLX5_EXPANSION_VXLAN_GPE),
 140                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 141                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 142         },
 143         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 144                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 145                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 146         },
 147         [MLX5_EXPANSION_OUTER_IPV6] = {
 148                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 149                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 150                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 151                          MLX5_EXPANSION_IPV4,
 152                          MLX5_EXPANSION_IPV6),
 153                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 154                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 155                         ETH_RSS_NONFRAG_IPV6_OTHER,
 156         },
 157         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 158                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 159                                                  MLX5_EXPANSION_VXLAN_GPE),
 160                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 161                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 162         },
 163         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 164                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 165                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 166         },
 167         [MLX5_EXPANSION_VXLAN] = {
 168                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 169                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 170         },
 171         [MLX5_EXPANSION_VXLAN_GPE] = {
 172                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 173                                                  MLX5_EXPANSION_IPV4,
 174                                                  MLX5_EXPANSION_IPV6),
 175                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 176         },
 177         [MLX5_EXPANSION_GRE] = {
 178                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 179                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 180         },
 181         [MLX5_EXPANSION_MPLS] = {
 182                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 183                                                  MLX5_EXPANSION_IPV6),
 184                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 185         },
 186         [MLX5_EXPANSION_ETH] = {
 187                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 188                                                  MLX5_EXPANSION_IPV6),
 189                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 190         },
 191         [MLX5_EXPANSION_ETH_VLAN] = {
 192                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 193                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 194         },
 195         [MLX5_EXPANSION_VLAN] = {
 196                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 197                                                  MLX5_EXPANSION_IPV6),
 198                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 199         },
 200         [MLX5_EXPANSION_IPV4] = {
 201                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 202                                                  MLX5_EXPANSION_IPV4_TCP),
 203                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 204                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 205                         ETH_RSS_NONFRAG_IPV4_OTHER,
 206         },
 207         [MLX5_EXPANSION_IPV4_UDP] = {
 208                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 209                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 210         },
 211         [MLX5_EXPANSION_IPV4_TCP] = {
 212                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 213                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 214         },
 215         [MLX5_EXPANSION_IPV6] = {
 216                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 217                                                  MLX5_EXPANSION_IPV6_TCP),
 218                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 219                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 220                         ETH_RSS_NONFRAG_IPV6_OTHER,
 221         },
 222         [MLX5_EXPANSION_IPV6_UDP] = {
 223                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 224                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 225         },
 226         [MLX5_EXPANSION_IPV6_TCP] = {
 227                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 228                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 229         },
 230 };
 231
 232 static const struct rte_flow_ops mlx5_flow_ops = {
 233         .validate = mlx5_flow_validate,
 234         .create = mlx5_flow_create,
 235         .destroy = mlx5_flow_destroy,
 236         .flush = mlx5_flow_flush,
 237         .isolate = mlx5_flow_isolate,
 238         .query = mlx5_flow_query,
 239 };
 240
 241 /* Convert FDIR request to Generic flow. */
 242 struct mlx5_fdir {
 243         struct rte_flow_attr attr;
 244         struct rte_flow_item items[4];
 245         struct rte_flow_item_eth l2;
 246         struct rte_flow_item_eth l2_mask;
 247         union {
 248                 struct rte_flow_item_ipv4 ipv4;
 249                 struct rte_flow_item_ipv6 ipv6;
 250         } l3;
 251         union {
 252                 struct rte_flow_item_ipv4 ipv4;
 253                 struct rte_flow_item_ipv6 ipv6;
 254         } l3_mask;
 255         union {
 256                 struct rte_flow_item_udp udp;
 257                 struct rte_flow_item_tcp tcp;
 258         } l4;
 259         union {
 260                 struct rte_flow_item_udp udp;
 261                 struct rte_flow_item_tcp tcp;
 262         } l4_mask;
 263         struct rte_flow_action actions[2];
 264         struct rte_flow_action_queue queue;
 265 };
 266
 267 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
 268 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
 269         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
 270 };
 271
 272 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
 273 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
 274         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
 275         { 9, 10, 11 }, { 12, 13, 14 },
 276 };
 277
 278 /* Tunnel information. */
 279 struct mlx5_flow_tunnel_info {
 280         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 281         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 282 };
 283
 284 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 285         {
 286                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 287                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 288         },
 289         {
 290                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 291                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 292         },
 293         {
 294                 .tunnel = MLX5_FLOW_LAYER_GRE,
 295                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 296         },
 297         {
 298                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 299                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 300         },
 301         {
 302                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 303                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 304         },
 305         {
 306                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 307                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 308         },
 309         {
 310                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 311                 .ptype = RTE_PTYPE_TUNNEL_IP,
 312         },
 313         {
 314                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 315                 .ptype = RTE_PTYPE_TUNNEL_IP,
 316         },
 317 };
 318
 319 /**
 320  * Discover the maximum number of priority available.
 321  *
 322  * @param[in] dev
 323  *   Pointer to the Ethernet device structure.
 324  *
 325  * @return
 326  *   number of supported flow priority on success, a negative errno
 327  *   value otherwise and rte_errno is set.
 328  */
 329 int
 330 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 331 {
 332         struct mlx5_priv *priv = dev->data->dev_private;
 333         struct {
 334                 struct ibv_flow_attr attr;
 335                 struct ibv_flow_spec_eth eth;
 336                 struct ibv_flow_spec_action_drop drop;
 337         } flow_attr = {
 338                 .attr = {
 339                         .num_of_specs = 2,
 340                         .port = (uint8_t)priv->ibv_port,
 341                 },
 342                 .eth = {
 343                         .type = IBV_FLOW_SPEC_ETH,
 344                         .size = sizeof(struct ibv_flow_spec_eth),
 345                 },
 346                 .drop = {
 347                         .size = sizeof(struct ibv_flow_spec_action_drop),
 348                         .type = IBV_FLOW_SPEC_ACTION_DROP,
 349                 },
 350         };
 351         struct ibv_flow *flow;
 352         struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
 353         uint16_t vprio[] = { 8, 16 };
 354         int i;
 355         int priority = 0;
 356
 357         if (!drop) {
 358                 rte_errno = ENOTSUP;
 359                 return -rte_errno;
 360         }
 361         for (i = 0; i != RTE_DIM(vprio); i++) {
 362                 flow_attr.attr.priority = vprio[i] - 1;
 363                 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
 364                 if (!flow)
 365                         break;
 366                 claim_zero(mlx5_glue->destroy_flow(flow));
 367                 priority = vprio[i];
 368         }
 369         mlx5_hrxq_drop_release(dev);
 370         switch (priority) {
 371         case 8:
 372                 priority = RTE_DIM(priority_map_3);
 373                 break;
 374         case 16:
 375                 priority = RTE_DIM(priority_map_5);
 376                 break;
 377         default:
 378                 rte_errno = ENOTSUP;
 379                 DRV_LOG(ERR,
 380                         "port %u verbs maximum priority: %d expected 8/16",
 381                         dev->data->port_id, priority);
 382                 return -rte_errno;
 383         }
 384         DRV_LOG(INFO, "port %u flow maximum priority: %d",
 385                 dev->data->port_id, priority);
 386         return priority;
 387 }
 388
 389 /**
 390  * Adjust flow priority based on the highest layer and the request priority.
 391  *
 392  * @param[in] dev
 393  *   Pointer to the Ethernet device structure.
 394  * @param[in] priority
 395  *   The rule base priority.
 396  * @param[in] subpriority
 397  *   The priority based on the items.
 398  *
 399  * @return
 400  *   The new priority.
 401  */
 402 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 403                                    uint32_t subpriority)
 404 {
 405         uint32_t res = 0;
 406         struct mlx5_priv *priv = dev->data->dev_private;
 407
 408         switch (priv->config.flow_prio) {
 409         case RTE_DIM(priority_map_3):
 410                 res = priority_map_3[priority][subpriority];
 411                 break;
 412         case RTE_DIM(priority_map_5):
 413                 res = priority_map_5[priority][subpriority];
 414                 break;
 415         }
 416         return  res;
 417 }
 418
 419 /**
 420  * Verify the @p item specifications (spec, last, mask) are compatible with the
 421  * NIC capabilities.
 422  *
 423  * @param[in] item
 424  *   Item specification.
 425  * @param[in] mask
 426  *   @p item->mask or flow default bit-masks.
 427  * @param[in] nic_mask
 428  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 429  * @param[in] size
 430  *   Bit-masks size in bytes.
 431  * @param[out] error
 432  *   Pointer to error structure.
 433  *
 434  * @return
 435  *   0 on success, a negative errno value otherwise and rte_errno is set.
 436  */
 437 int
 438 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 439                           const uint8_t *mask,
 440                           const uint8_t *nic_mask,
 441                           unsigned int size,
 442                           struct rte_flow_error *error)
 443 {
 444         unsigned int i;
 445
 446         assert(nic_mask);
 447         for (i = 0; i < size; ++i)
 448                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 449                         return rte_flow_error_set(error, ENOTSUP,
 450                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 451                                                   item,
 452                                                   "mask enables non supported"
 453                                                   " bits");
 454         if (!item->spec && (item->mask || item->last))
 455                 return rte_flow_error_set(error, EINVAL,
 456                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 457                                           "mask/last without a spec is not"
 458                                           " supported");
 459         if (item->spec && item->last) {
 460                 uint8_t spec[size];
 461                 uint8_t last[size];
 462                 unsigned int i;
 463                 int ret;
 464
 465                 for (i = 0; i < size; ++i) {
 466                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 467                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 468                 }
 469                 ret = memcmp(spec, last, size);
 470                 if (ret != 0)
 471                         return rte_flow_error_set(error, EINVAL,
 472                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 473                                                   item,
 474                                                   "range is not valid");
 475         }
 476         return 0;
 477 }
 478
 479 /**
 480  * Adjust the hash fields according to the @p flow information.
 481  *
 482  * @param[in] dev_flow.
 483  *   Pointer to the mlx5_flow.
 484  * @param[in] tunnel
 485  *   1 when the hash field is for a tunnel item.
 486  * @param[in] layer_types
 487  *   ETH_RSS_* types.
 488  * @param[in] hash_fields
 489  *   Item hash fields.
 490  *
 491  * @return
 492  *   The hash fields that should be used.
 493  */
 494 uint64_t
 495 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
 496                             int tunnel __rte_unused, uint64_t layer_types,
 497                             uint64_t hash_fields)
 498 {
 499         struct rte_flow *flow = dev_flow->flow;
 500 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 501         int rss_request_inner = flow->rss.level >= 2;
 502
 503         /* Check RSS hash level for tunnel. */
 504         if (tunnel && rss_request_inner)
 505                 hash_fields |= IBV_RX_HASH_INNER;
 506         else if (tunnel || rss_request_inner)
 507                 return 0;
 508 #endif
 509         /* Check if requested layer matches RSS hash fields. */
 510         if (!(flow->rss.types & layer_types))
 511                 return 0;
 512         return hash_fields;
 513 }
 514
 515 /**
 516  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 517  * if several tunnel rules are used on this queue, the tunnel ptype will be
 518  * cleared.
 519  *
 520  * @param rxq_ctrl
 521  *   Rx queue to update.
 522  */
 523 static void
 524 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 525 {
 526         unsigned int i;
 527         uint32_t tunnel_ptype = 0;
 528
 529         /* Look up for the ptype to use. */
 530         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 531                 if (!rxq_ctrl->flow_tunnels_n[i])
 532                         continue;
 533                 if (!tunnel_ptype) {
 534                         tunnel_ptype = tunnels_info[i].ptype;
 535                 } else {
 536                         tunnel_ptype = 0;
 537                         break;
 538                 }
 539         }
 540         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 541 }
 542
 543 /**
 544  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 545  * flow.
 546  *
 547  * @param[in] dev
 548  *   Pointer to the Ethernet device structure.
 549  * @param[in] dev_flow
 550  *   Pointer to device flow structure.
 551  */
 552 static void
 553 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 554 {
 555         struct mlx5_priv *priv = dev->data->dev_private;
 556         struct rte_flow *flow = dev_flow->flow;
 557         const int mark = !!(flow->actions &
 558                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 559         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 560         unsigned int i;
 561
 562         for (i = 0; i != flow->rss.queue_num; ++i) {
 563                 int idx = (*flow->queue)[i];
 564                 struct mlx5_rxq_ctrl *rxq_ctrl =
 565                         container_of((*priv->rxqs)[idx],
 566                                      struct mlx5_rxq_ctrl, rxq);
 567
 568                 if (mark) {
 569                         rxq_ctrl->rxq.mark = 1;
 570                         rxq_ctrl->flow_mark_n++;
 571                 }
 572                 if (tunnel) {
 573                         unsigned int j;
 574
 575                         /* Increase the counter matching the flow. */
 576                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 577                                 if ((tunnels_info[j].tunnel &
 578                                      dev_flow->layers) ==
 579                                     tunnels_info[j].tunnel) {
 580                                         rxq_ctrl->flow_tunnels_n[j]++;
 581                                         break;
 582                                 }
 583                         }
 584                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 585                 }
 586         }
 587 }
 588
 589 /**
 590  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
 591  *
 592  * @param[in] dev
 593  *   Pointer to the Ethernet device structure.
 594  * @param[in] flow
 595  *   Pointer to flow structure.
 596  */
 597 static void
 598 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
 599 {
 600         struct mlx5_flow *dev_flow;
 601
 602         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 603                 flow_drv_rxq_flags_set(dev, dev_flow);
 604 }
 605
 606 /**
 607  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 608  * device flow if no other flow uses it with the same kind of request.
 609  *
 610  * @param dev
 611  *   Pointer to Ethernet device.
 612  * @param[in] dev_flow
 613  *   Pointer to the device flow.
 614  */
 615 static void
 616 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 617 {
 618         struct mlx5_priv *priv = dev->data->dev_private;
 619         struct rte_flow *flow = dev_flow->flow;
 620         const int mark = !!(flow->actions &
 621                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 622         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 623         unsigned int i;
 624
 625         assert(dev->data->dev_started);
 626         for (i = 0; i != flow->rss.queue_num; ++i) {
 627                 int idx = (*flow->queue)[i];
 628                 struct mlx5_rxq_ctrl *rxq_ctrl =
 629                         container_of((*priv->rxqs)[idx],
 630                                      struct mlx5_rxq_ctrl, rxq);
 631
 632                 if (mark) {
 633                         rxq_ctrl->flow_mark_n--;
 634                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
 635                 }
 636                 if (tunnel) {
 637                         unsigned int j;
 638
 639                         /* Decrease the counter matching the flow. */
 640                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 641                                 if ((tunnels_info[j].tunnel &
 642                                      dev_flow->layers) ==
 643                                     tunnels_info[j].tunnel) {
 644                                         rxq_ctrl->flow_tunnels_n[j]--;
 645                                         break;
 646                                 }
 647                         }
 648                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 649                 }
 650         }
 651 }
 652
 653 /**
 654  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 655  * @p flow if no other flow uses it with the same kind of request.
 656  *
 657  * @param dev
 658  *   Pointer to Ethernet device.
 659  * @param[in] flow
 660  *   Pointer to the flow.
 661  */
 662 static void
 663 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
 664 {
 665         struct mlx5_flow *dev_flow;
 666
 667         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 668                 flow_drv_rxq_flags_trim(dev, dev_flow);
 669 }
 670
 671 /**
 672  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
 673  *
 674  * @param dev
 675  *   Pointer to Ethernet device.
 676  */
 677 static void
 678 flow_rxq_flags_clear(struct rte_eth_dev *dev)
 679 {
 680         struct mlx5_priv *priv = dev->data->dev_private;
 681         unsigned int i;
 682
 683         for (i = 0; i != priv->rxqs_n; ++i) {
 684                 struct mlx5_rxq_ctrl *rxq_ctrl;
 685                 unsigned int j;
 686
 687                 if (!(*priv->rxqs)[i])
 688                         continue;
 689                 rxq_ctrl = container_of((*priv->rxqs)[i],
 690                                         struct mlx5_rxq_ctrl, rxq);
 691                 rxq_ctrl->flow_mark_n = 0;
 692                 rxq_ctrl->rxq.mark = 0;
 693                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
 694                         rxq_ctrl->flow_tunnels_n[j] = 0;
 695                 rxq_ctrl->rxq.tunnel = 0;
 696         }
 697 }
 698
 699 /*
 700  * return a pointer to the desired action in the list of actions.
 701  *
 702  * @param[in] actions
 703  *   The list of actions to search the action in.
 704  * @param[in] action
 705  *   The action to find.
 706  *
 707  * @return
 708  *   Pointer to the action in the list, if found. NULL otherwise.
 709  */
 710 const struct rte_flow_action *
 711 mlx5_flow_find_action(const struct rte_flow_action *actions,
 712                       enum rte_flow_action_type action)
 713 {
 714         if (actions == NULL)
 715                 return NULL;
 716         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
 717                 if (actions->type == action)
 718                         return actions;
 719         return NULL;
 720 }
 721
 722 /*
 723  * Validate the flag action.
 724  *
 725  * @param[in] action_flags
 726  *   Bit-fields that holds the actions detected until now.
 727  * @param[in] attr
 728  *   Attributes of flow that includes this action.
 729  * @param[out] error
 730  *   Pointer to error structure.
 731  *
 732  * @return
 733  *   0 on success, a negative errno value otherwise and rte_errno is set.
 734  */
 735 int
 736 mlx5_flow_validate_action_flag(uint64_t action_flags,
 737                                const struct rte_flow_attr *attr,
 738                                struct rte_flow_error *error)
 739 {
 740
 741         if (action_flags & MLX5_FLOW_ACTION_DROP)
 742                 return rte_flow_error_set(error, EINVAL,
 743                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 744                                           "can't drop and flag in same flow");
 745         if (action_flags & MLX5_FLOW_ACTION_MARK)
 746                 return rte_flow_error_set(error, EINVAL,
 747                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 748                                           "can't mark and flag in same flow");
 749         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 750                 return rte_flow_error_set(error, EINVAL,
 751                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 752                                           "can't have 2 flag"
 753                                           " actions in same flow");
 754         if (attr->egress)
 755                 return rte_flow_error_set(error, ENOTSUP,
 756                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 757                                           "flag action not supported for "
 758                                           "egress");
 759         return 0;
 760 }
 761
 762 /*
 763  * Validate the mark action.
 764  *
 765  * @param[in] action
 766  *   Pointer to the queue action.
 767  * @param[in] action_flags
 768  *   Bit-fields that holds the actions detected until now.
 769  * @param[in] attr
 770  *   Attributes of flow that includes this action.
 771  * @param[out] error
 772  *   Pointer to error structure.
 773  *
 774  * @return
 775  *   0 on success, a negative errno value otherwise and rte_errno is set.
 776  */
 777 int
 778 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
 779                                uint64_t action_flags,
 780                                const struct rte_flow_attr *attr,
 781                                struct rte_flow_error *error)
 782 {
 783         const struct rte_flow_action_mark *mark = action->conf;
 784
 785         if (!mark)
 786                 return rte_flow_error_set(error, EINVAL,
 787                                           RTE_FLOW_ERROR_TYPE_ACTION,
 788                                           action,
 789                                           "configuration cannot be null");
 790         if (mark->id >= MLX5_FLOW_MARK_MAX)
 791                 return rte_flow_error_set(error, EINVAL,
 792                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 793                                           &mark->id,
 794                                           "mark id must in 0 <= id < "
 795                                           RTE_STR(MLX5_FLOW_MARK_MAX));
 796         if (action_flags & MLX5_FLOW_ACTION_DROP)
 797                 return rte_flow_error_set(error, EINVAL,
 798                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 799                                           "can't drop and mark in same flow");
 800         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 801                 return rte_flow_error_set(error, EINVAL,
 802                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 803                                           "can't flag and mark in same flow");
 804         if (action_flags & MLX5_FLOW_ACTION_MARK)
 805                 return rte_flow_error_set(error, EINVAL,
 806                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 807                                           "can't have 2 mark actions in same"
 808                                           " flow");
 809         if (attr->egress)
 810                 return rte_flow_error_set(error, ENOTSUP,
 811                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 812                                           "mark action not supported for "
 813                                           "egress");
 814         return 0;
 815 }
 816
 817 /*
 818  * Validate the drop action.
 819  *
 820  * @param[in] action_flags
 821  *   Bit-fields that holds the actions detected until now.
 822  * @param[in] attr
 823  *   Attributes of flow that includes this action.
 824  * @param[out] error
 825  *   Pointer to error structure.
 826  *
 827  * @return
 828  *   0 on success, a negative errno value otherwise and rte_errno is set.
 829  */
 830 int
 831 mlx5_flow_validate_action_drop(uint64_t action_flags,
 832                                const struct rte_flow_attr *attr,
 833                                struct rte_flow_error *error)
 834 {
 835         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 836                 return rte_flow_error_set(error, EINVAL,
 837                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 838                                           "can't drop and flag in same flow");
 839         if (action_flags & MLX5_FLOW_ACTION_MARK)
 840                 return rte_flow_error_set(error, EINVAL,
 841                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 842                                           "can't drop and mark in same flow");
 843         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
 844                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
 845                 return rte_flow_error_set(error, EINVAL,
 846                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 847                                           "can't have 2 fate actions in"
 848                                           " same flow");
 849         if (attr->egress)
 850                 return rte_flow_error_set(error, ENOTSUP,
 851                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 852                                           "drop action not supported for "
 853                                           "egress");
 854         return 0;
 855 }
 856
 857 /*
 858  * Validate the queue action.
 859  *
 860  * @param[in] action
 861  *   Pointer to the queue action.
 862  * @param[in] action_flags
 863  *   Bit-fields that holds the actions detected until now.
 864  * @param[in] dev
 865  *   Pointer to the Ethernet device structure.
 866  * @param[in] attr
 867  *   Attributes of flow that includes this action.
 868  * @param[out] error
 869  *   Pointer to error structure.
 870  *
 871  * @return
 872  *   0 on success, a negative errno value otherwise and rte_errno is set.
 873  */
 874 int
 875 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
 876                                 uint64_t action_flags,
 877                                 struct rte_eth_dev *dev,
 878                                 const struct rte_flow_attr *attr,
 879                                 struct rte_flow_error *error)
 880 {
 881         struct mlx5_priv *priv = dev->data->dev_private;
 882         const struct rte_flow_action_queue *queue = action->conf;
 883
 884         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
 885                 return rte_flow_error_set(error, EINVAL,
 886                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 887                                           "can't have 2 fate actions in"
 888                                           " same flow");
 889         if (!priv->rxqs_n)
 890                 return rte_flow_error_set(error, EINVAL,
 891                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 892                                           NULL, "No Rx queues configured");
 893         if (queue->index >= priv->rxqs_n)
 894                 return rte_flow_error_set(error, EINVAL,
 895                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 896                                           &queue->index,
 897                                           "queue index out of range");
 898         if (!(*priv->rxqs)[queue->index])
 899                 return rte_flow_error_set(error, EINVAL,
 900                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 901                                           &queue->index,
 902                                           "queue is not configured");
 903         if (attr->egress)
 904                 return rte_flow_error_set(error, ENOTSUP,
 905                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 906                                           "queue action not supported for "
 907                                           "egress");
 908         return 0;
 909 }
 910
 911 /*
 912  * Validate the rss action.
 913  *
 914  * @param[in] action
 915  *   Pointer to the queue action.
 916  * @param[in] action_flags
 917  *   Bit-fields that holds the actions detected until now.
 918  * @param[in] dev
 919  *   Pointer to the Ethernet device structure.
 920  * @param[in] attr
 921  *   Attributes of flow that includes this action.
 922  * @param[in] item_flags
 923  *   Items that were detected.
 924  * @param[out] error
 925  *   Pointer to error structure.
 926  *
 927  * @return
 928  *   0 on success, a negative errno value otherwise and rte_errno is set.
 929  */
 930 int
 931 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
 932                               uint64_t action_flags,
 933                               struct rte_eth_dev *dev,
 934                               const struct rte_flow_attr *attr,
 935                               uint64_t item_flags,
 936                               struct rte_flow_error *error)
 937 {
 938         struct mlx5_priv *priv = dev->data->dev_private;
 939         const struct rte_flow_action_rss *rss = action->conf;
 940         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
 941         unsigned int i;
 942
 943         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
 944                 return rte_flow_error_set(error, EINVAL,
 945                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 946                                           "can't have 2 fate actions"
 947                                           " in same flow");
 948         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
 949             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
 950                 return rte_flow_error_set(error, ENOTSUP,
 951                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 952                                           &rss->func,
 953                                           "RSS hash function not supported");
 954 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 955         if (rss->level > 2)
 956 #else
 957         if (rss->level > 1)
 958 #endif
 959                 return rte_flow_error_set(error, ENOTSUP,
 960                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 961                                           &rss->level,
 962                                           "tunnel RSS is not supported");
 963         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
 964         if (rss->key_len == 0 && rss->key != NULL)
 965                 return rte_flow_error_set(error, ENOTSUP,
 966                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 967                                           &rss->key_len,
 968                                           "RSS hash key length 0");
 969         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
 970                 return rte_flow_error_set(error, ENOTSUP,
 971                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 972                                           &rss->key_len,
 973                                           "RSS hash key too small");
 974         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
 975                 return rte_flow_error_set(error, ENOTSUP,
 976                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 977                                           &rss->key_len,
 978                                           "RSS hash key too large");
 979         if (rss->queue_num > priv->config.ind_table_max_size)
 980                 return rte_flow_error_set(error, ENOTSUP,
 981                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 982                                           &rss->queue_num,
 983                                           "number of queues too large");
 984         if (rss->types & MLX5_RSS_HF_MASK)
 985                 return rte_flow_error_set(error, ENOTSUP,
 986                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 987                                           &rss->types,
 988                                           "some RSS protocols are not"
 989                                           " supported");
 990         if (!priv->rxqs_n)
 991                 return rte_flow_error_set(error, EINVAL,
 992                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 993                                           NULL, "No Rx queues configured");
 994         if (!rss->queue_num)
 995                 return rte_flow_error_set(error, EINVAL,
 996                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 997                                           NULL, "No queues configured");
 998         for (i = 0; i != rss->queue_num; ++i) {
 999                 if (!(*priv->rxqs)[rss->queue[i]])
1000                         return rte_flow_error_set
1001                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1002                                  &rss->queue[i], "queue is not configured");
1003         }
1004         if (attr->egress)
1005                 return rte_flow_error_set(error, ENOTSUP,
1006                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1007                                           "rss action not supported for "
1008                                           "egress");
1009         if (rss->level > 1 &&  !tunnel)
1010                 return rte_flow_error_set(error, EINVAL,
1011                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1012                                           "inner RSS is not supported for "
1013                                           "non-tunnel flows");
1014         return 0;
1015 }
1016
1017 /*
1018  * Validate the count action.
1019  *
1020  * @param[in] dev
1021  *   Pointer to the Ethernet device structure.
1022  * @param[in] attr
1023  *   Attributes of flow that includes this action.
1024  * @param[out] error
1025  *   Pointer to error structure.
1026  *
1027  * @return
1028  *   0 on success, a negative errno value otherwise and rte_errno is set.
1029  */
1030 int
1031 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1032                                 const struct rte_flow_attr *attr,
1033                                 struct rte_flow_error *error)
1034 {
1035         if (attr->egress)
1036                 return rte_flow_error_set(error, ENOTSUP,
1037                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1038                                           "count action not supported for "
1039                                           "egress");
1040         return 0;
1041 }
1042
1043 /**
1044  * Verify the @p attributes will be correctly understood by the NIC and store
1045  * them in the @p flow if everything is correct.
1046  *
1047  * @param[in] dev
1048  *   Pointer to the Ethernet device structure.
1049  * @param[in] attributes
1050  *   Pointer to flow attributes
1051  * @param[out] error
1052  *   Pointer to error structure.
1053  *
1054  * @return
1055  *   0 on success, a negative errno value otherwise and rte_errno is set.
1056  */
1057 int
1058 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1059                               const struct rte_flow_attr *attributes,
1060                               struct rte_flow_error *error)
1061 {
1062         struct mlx5_priv *priv = dev->data->dev_private;
1063         uint32_t priority_max = priv->config.flow_prio - 1;
1064
1065         if (attributes->group)
1066                 return rte_flow_error_set(error, ENOTSUP,
1067                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1068                                           NULL, "groups is not supported");
1069         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1070             attributes->priority >= priority_max)
1071                 return rte_flow_error_set(error, ENOTSUP,
1072                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1073                                           NULL, "priority out of range");
1074         if (attributes->egress)
1075                 return rte_flow_error_set(error, ENOTSUP,
1076                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1077                                           "egress is not supported");
1078         if (attributes->transfer && !priv->config.dv_esw_en)
1079                 return rte_flow_error_set(error, ENOTSUP,
1080                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1081                                           NULL, "transfer is not supported");
1082         if (!attributes->ingress)
1083                 return rte_flow_error_set(error, EINVAL,
1084                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1085                                           NULL,
1086                                           "ingress attribute is mandatory");
1087         return 0;
1088 }
1089
1090 /**
1091  * Validate ICMP6 item.
1092  *
1093  * @param[in] item
1094  *   Item specification.
1095  * @param[in] item_flags
1096  *   Bit-fields that holds the items detected until now.
1097  * @param[out] error
1098  *   Pointer to error structure.
1099  *
1100  * @return
1101  *   0 on success, a negative errno value otherwise and rte_errno is set.
1102  */
1103 int
1104 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1105                                uint64_t item_flags,
1106                                uint8_t target_protocol,
1107                                struct rte_flow_error *error)
1108 {
1109         const struct rte_flow_item_icmp6 *mask = item->mask;
1110         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1111         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1112                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1113         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1114                                       MLX5_FLOW_LAYER_OUTER_L4;
1115         int ret;
1116
1117         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1118                 return rte_flow_error_set(error, EINVAL,
1119                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1120                                           "protocol filtering not compatible"
1121                                           " with ICMP6 layer");
1122         if (!(item_flags & l3m))
1123                 return rte_flow_error_set(error, EINVAL,
1124                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1125                                           "IPv6 is mandatory to filter on"
1126                                           " ICMP6");
1127         if (item_flags & l4m)
1128                 return rte_flow_error_set(error, EINVAL,
1129                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1130                                           "multiple L4 layers not supported");
1131         if (!mask)
1132                 mask = &rte_flow_item_icmp6_mask;
1133         ret = mlx5_flow_item_acceptable
1134                 (item, (const uint8_t *)mask,
1135                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1136                  sizeof(struct rte_flow_item_icmp6), error);
1137         if (ret < 0)
1138                 return ret;
1139         return 0;
1140 }
1141
1142 /**
1143  * Validate ICMP item.
1144  *
1145  * @param[in] item
1146  *   Item specification.
1147  * @param[in] item_flags
1148  *   Bit-fields that holds the items detected until now.
1149  * @param[out] error
1150  *   Pointer to error structure.
1151  *
1152  * @return
1153  *   0 on success, a negative errno value otherwise and rte_errno is set.
1154  */
1155 int
1156 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1157                              uint64_t item_flags,
1158                              uint8_t target_protocol,
1159                              struct rte_flow_error *error)
1160 {
1161         const struct rte_flow_item_icmp *mask = item->mask;
1162         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1163         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1164                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1165         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1166                                       MLX5_FLOW_LAYER_OUTER_L4;
1167         int ret;
1168
1169         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1170                 return rte_flow_error_set(error, EINVAL,
1171                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1172                                           "protocol filtering not compatible"
1173                                           " with ICMP layer");
1174         if (!(item_flags & l3m))
1175                 return rte_flow_error_set(error, EINVAL,
1176                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1177                                           "IPv4 is mandatory to filter"
1178                                           " on ICMP");
1179         if (item_flags & l4m)
1180                 return rte_flow_error_set(error, EINVAL,
1181                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1182                                           "multiple L4 layers not supported");
1183         if (!mask)
1184                 mask = &rte_flow_item_icmp_mask;
1185         ret = mlx5_flow_item_acceptable
1186                 (item, (const uint8_t *)mask,
1187                  (const uint8_t *)&rte_flow_item_icmp_mask,
1188                  sizeof(struct rte_flow_item_icmp), error);
1189         if (ret < 0)
1190                 return ret;
1191         return 0;
1192 }
1193
1194 /**
1195  * Validate Ethernet item.
1196  *
1197  * @param[in] item
1198  *   Item specification.
1199  * @param[in] item_flags
1200  *   Bit-fields that holds the items detected until now.
1201  * @param[out] error
1202  *   Pointer to error structure.
1203  *
1204  * @return
1205  *   0 on success, a negative errno value otherwise and rte_errno is set.
1206  */
1207 int
1208 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1209                             uint64_t item_flags,
1210                             struct rte_flow_error *error)
1211 {
1212         const struct rte_flow_item_eth *mask = item->mask;
1213         const struct rte_flow_item_eth nic_mask = {
1214                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1215                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1216                 .type = RTE_BE16(0xffff),
1217         };
1218         int ret;
1219         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1220         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1221                                        MLX5_FLOW_LAYER_OUTER_L2;
1222
1223         if (item_flags & ethm)
1224                 return rte_flow_error_set(error, ENOTSUP,
1225                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1226                                           "multiple L2 layers not supported");
1227         if (!mask)
1228                 mask = &rte_flow_item_eth_mask;
1229         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1230                                         (const uint8_t *)&nic_mask,
1231                                         sizeof(struct rte_flow_item_eth),
1232                                         error);
1233         return ret;
1234 }
1235
1236 /**
1237  * Validate VLAN item.
1238  *
1239  * @param[in] item
1240  *   Item specification.
1241  * @param[in] item_flags
1242  *   Bit-fields that holds the items detected until now.
1243  * @param[in] dev
1244  *   Ethernet device flow is being created on.
1245  * @param[out] error
1246  *   Pointer to error structure.
1247  *
1248  * @return
1249  *   0 on success, a negative errno value otherwise and rte_errno is set.
1250  */
1251 int
1252 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1253                              uint64_t item_flags,
1254                              struct rte_eth_dev *dev,
1255                              struct rte_flow_error *error)
1256 {
1257         const struct rte_flow_item_vlan *spec = item->spec;
1258         const struct rte_flow_item_vlan *mask = item->mask;
1259         const struct rte_flow_item_vlan nic_mask = {
1260                 .tci = RTE_BE16(UINT16_MAX),
1261                 .inner_type = RTE_BE16(UINT16_MAX),
1262         };
1263         uint16_t vlan_tag = 0;
1264         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1265         int ret;
1266         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1267                                         MLX5_FLOW_LAYER_INNER_L4) :
1268                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1269                                         MLX5_FLOW_LAYER_OUTER_L4);
1270         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1271                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1272
1273         if (item_flags & vlanm)
1274                 return rte_flow_error_set(error, EINVAL,
1275                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1276                                           "multiple VLAN layers not supported");
1277         else if ((item_flags & l34m) != 0)
1278                 return rte_flow_error_set(error, EINVAL,
1279                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1280                                           "L2 layer cannot follow L3/L4 layer");
1281         if (!mask)
1282                 mask = &rte_flow_item_vlan_mask;
1283         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1284                                         (const uint8_t *)&nic_mask,
1285                                         sizeof(struct rte_flow_item_vlan),
1286                                         error);
1287         if (ret)
1288                 return ret;
1289         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1290                 struct mlx5_priv *priv = dev->data->dev_private;
1291
1292                 if (priv->vmwa_context) {
1293                         /*
1294                          * Non-NULL context means we have a virtual machine
1295                          * and SR-IOV enabled, we have to create VLAN interface
1296                          * to make hypervisor to setup E-Switch vport
1297                          * context correctly. We avoid creating the multiple
1298                          * VLAN interfaces, so we cannot support VLAN tag mask.
1299                          */
1300                         return rte_flow_error_set(error, EINVAL,
1301                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1302                                                   item,
1303                                                   "VLAN tag mask is not"
1304                                                   " supported in virtual"
1305                                                   " environment");
1306                 }
1307         }
1308         if (spec) {
1309                 vlan_tag = spec->tci;
1310                 vlan_tag &= mask->tci;
1311         }
1312         /*
1313          * From verbs perspective an empty VLAN is equivalent
1314          * to a packet without VLAN layer.
1315          */
1316         if (!vlan_tag)
1317                 return rte_flow_error_set(error, EINVAL,
1318                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1319                                           item->spec,
1320                                           "VLAN cannot be empty");
1321         return 0;
1322 }
1323
1324 /**
1325  * Validate IPV4 item.
1326  *
1327  * @param[in] item
1328  *   Item specification.
1329  * @param[in] item_flags
1330  *   Bit-fields that holds the items detected until now.
1331  * @param[in] acc_mask
1332  *   Acceptable mask, if NULL default internal default mask
1333  *   will be used to check whether item fields are supported.
1334  * @param[out] error
1335  *   Pointer to error structure.
1336  *
1337  * @return
1338  *   0 on success, a negative errno value otherwise and rte_errno is set.
1339  */
1340 int
1341 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1342                              uint64_t item_flags,
1343                              const struct rte_flow_item_ipv4 *acc_mask,
1344                              struct rte_flow_error *error)
1345 {
1346         const struct rte_flow_item_ipv4 *mask = item->mask;
1347         const struct rte_flow_item_ipv4 *spec = item->spec;
1348         const struct rte_flow_item_ipv4 nic_mask = {
1349                 .hdr = {
1350                         .src_addr = RTE_BE32(0xffffffff),
1351                         .dst_addr = RTE_BE32(0xffffffff),
1352                         .type_of_service = 0xff,
1353                         .next_proto_id = 0xff,
1354                 },
1355         };
1356         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1357         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1358                                       MLX5_FLOW_LAYER_OUTER_L3;
1359         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1360                                       MLX5_FLOW_LAYER_OUTER_L4;
1361         int ret;
1362         uint8_t next_proto = 0xFF;
1363
1364         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1365                 if (mask && spec)
1366                         next_proto = mask->hdr.next_proto_id &
1367                                      spec->hdr.next_proto_id;
1368                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1369                         return rte_flow_error_set(error, EINVAL,
1370                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1371                                                   item,
1372                                                   "multiple tunnel "
1373                                                   "not supported");
1374         }
1375         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1376                 return rte_flow_error_set(error, EINVAL,
1377                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1378                                           "wrong tunnel type - IPv6 specified "
1379                                           "but IPv4 item provided");
1380         if (item_flags & l3m)
1381                 return rte_flow_error_set(error, ENOTSUP,
1382                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1383                                           "multiple L3 layers not supported");
1384         else if (item_flags & l4m)
1385                 return rte_flow_error_set(error, EINVAL,
1386                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1387                                           "L3 cannot follow an L4 layer.");
1388         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1389                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1390                 return rte_flow_error_set(error, EINVAL,
1391                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1392                                           "L3 cannot follow an NVGRE layer.");
1393         if (!mask)
1394                 mask = &rte_flow_item_ipv4_mask;
1395         else if (mask->hdr.next_proto_id != 0 &&
1396                  mask->hdr.next_proto_id != 0xff)
1397                 return rte_flow_error_set(error, EINVAL,
1398                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1399                                           "partial mask is not supported"
1400                                           " for protocol");
1401         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1402                                         acc_mask ? (const uint8_t *)acc_mask
1403                                                  : (const uint8_t *)&nic_mask,
1404                                         sizeof(struct rte_flow_item_ipv4),
1405                                         error);
1406         if (ret < 0)
1407                 return ret;
1408         return 0;
1409 }
1410
1411 /**
1412  * Validate IPV6 item.
1413  *
1414  * @param[in] item
1415  *   Item specification.
1416  * @param[in] item_flags
1417  *   Bit-fields that holds the items detected until now.
1418  * @param[in] acc_mask
1419  *   Acceptable mask, if NULL default internal default mask
1420  *   will be used to check whether item fields are supported.
1421  * @param[out] error
1422  *   Pointer to error structure.
1423  *
1424  * @return
1425  *   0 on success, a negative errno value otherwise and rte_errno is set.
1426  */
1427 int
1428 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1429                              uint64_t item_flags,
1430                              const struct rte_flow_item_ipv6 *acc_mask,
1431                              struct rte_flow_error *error)
1432 {
1433         const struct rte_flow_item_ipv6 *mask = item->mask;
1434         const struct rte_flow_item_ipv6 *spec = item->spec;
1435         const struct rte_flow_item_ipv6 nic_mask = {
1436                 .hdr = {
1437                         .src_addr =
1438                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1439                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1440                         .dst_addr =
1441                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1442                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1443                         .vtc_flow = RTE_BE32(0xffffffff),
1444                         .proto = 0xff,
1445                         .hop_limits = 0xff,
1446                 },
1447         };
1448         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1449         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1450                                       MLX5_FLOW_LAYER_OUTER_L3;
1451         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1452                                       MLX5_FLOW_LAYER_OUTER_L4;
1453         int ret;
1454         uint8_t next_proto = 0xFF;
1455
1456         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1457                 if (mask && spec)
1458                         next_proto = mask->hdr.proto & spec->hdr.proto;
1459                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1460                         return rte_flow_error_set(error, EINVAL,
1461                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1462                                                   item,
1463                                                   "multiple tunnel "
1464                                                   "not supported");
1465         }
1466         if (item_flags & MLX5_FLOW_LAYER_IPIP)
1467                 return rte_flow_error_set(error, EINVAL,
1468                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1469                                           "wrong tunnel type - IPv4 specified "
1470                                           "but IPv6 item provided");
1471         if (item_flags & l3m)
1472                 return rte_flow_error_set(error, ENOTSUP,
1473                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1474                                           "multiple L3 layers not supported");
1475         else if (item_flags & l4m)
1476                 return rte_flow_error_set(error, EINVAL,
1477                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1478                                           "L3 cannot follow an L4 layer.");
1479         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1480                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1481                 return rte_flow_error_set(error, EINVAL,
1482                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1483                                           "L3 cannot follow an NVGRE layer.");
1484         if (!mask)
1485                 mask = &rte_flow_item_ipv6_mask;
1486         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1487                                         acc_mask ? (const uint8_t *)acc_mask
1488                                                  : (const uint8_t *)&nic_mask,
1489                                         sizeof(struct rte_flow_item_ipv6),
1490                                         error);
1491         if (ret < 0)
1492                 return ret;
1493         return 0;
1494 }
1495
1496 /**
1497  * Validate UDP item.
1498  *
1499  * @param[in] item
1500  *   Item specification.
1501  * @param[in] item_flags
1502  *   Bit-fields that holds the items detected until now.
1503  * @param[in] target_protocol
1504  *   The next protocol in the previous item.
1505  * @param[in] flow_mask
1506  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1507  * @param[out] error
1508  *   Pointer to error structure.
1509  *
1510  * @return
1511  *   0 on success, a negative errno value otherwise and rte_errno is set.
1512  */
1513 int
1514 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1515                             uint64_t item_flags,
1516                             uint8_t target_protocol,
1517                             struct rte_flow_error *error)
1518 {
1519         const struct rte_flow_item_udp *mask = item->mask;
1520         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1521         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1522                                       MLX5_FLOW_LAYER_OUTER_L3;
1523         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1524                                       MLX5_FLOW_LAYER_OUTER_L4;
1525         int ret;
1526
1527         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1528                 return rte_flow_error_set(error, EINVAL,
1529                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1530                                           "protocol filtering not compatible"
1531                                           " with UDP layer");
1532         if (!(item_flags & l3m))
1533                 return rte_flow_error_set(error, EINVAL,
1534                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1535                                           "L3 is mandatory to filter on L4");
1536         if (item_flags & l4m)
1537                 return rte_flow_error_set(error, EINVAL,
1538                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1539                                           "multiple L4 layers not supported");
1540         if (!mask)
1541                 mask = &rte_flow_item_udp_mask;
1542         ret = mlx5_flow_item_acceptable
1543                 (item, (const uint8_t *)mask,
1544                  (const uint8_t *)&rte_flow_item_udp_mask,
1545                  sizeof(struct rte_flow_item_udp), error);
1546         if (ret < 0)
1547                 return ret;
1548         return 0;
1549 }
1550
1551 /**
1552  * Validate TCP item.
1553  *
1554  * @param[in] item
1555  *   Item specification.
1556  * @param[in] item_flags
1557  *   Bit-fields that holds the items detected until now.
1558  * @param[in] target_protocol
1559  *   The next protocol in the previous item.
1560  * @param[out] error
1561  *   Pointer to error structure.
1562  *
1563  * @return
1564  *   0 on success, a negative errno value otherwise and rte_errno is set.
1565  */
1566 int
1567 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1568                             uint64_t item_flags,
1569                             uint8_t target_protocol,
1570                             const struct rte_flow_item_tcp *flow_mask,
1571                             struct rte_flow_error *error)
1572 {
1573         const struct rte_flow_item_tcp *mask = item->mask;
1574         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1575         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1576                                       MLX5_FLOW_LAYER_OUTER_L3;
1577         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1578                                       MLX5_FLOW_LAYER_OUTER_L4;
1579         int ret;
1580
1581         assert(flow_mask);
1582         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1583                 return rte_flow_error_set(error, EINVAL,
1584                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1585                                           "protocol filtering not compatible"
1586                                           " with TCP layer");
1587         if (!(item_flags & l3m))
1588                 return rte_flow_error_set(error, EINVAL,
1589                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1590                                           "L3 is mandatory to filter on L4");
1591         if (item_flags & l4m)
1592                 return rte_flow_error_set(error, EINVAL,
1593                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1594                                           "multiple L4 layers not supported");
1595         if (!mask)
1596                 mask = &rte_flow_item_tcp_mask;
1597         ret = mlx5_flow_item_acceptable
1598                 (item, (const uint8_t *)mask,
1599                  (const uint8_t *)flow_mask,
1600                  sizeof(struct rte_flow_item_tcp), error);
1601         if (ret < 0)
1602                 return ret;
1603         return 0;
1604 }
1605
1606 /**
1607  * Validate VXLAN item.
1608  *
1609  * @param[in] item
1610  *   Item specification.
1611  * @param[in] item_flags
1612  *   Bit-fields that holds the items detected until now.
1613  * @param[in] target_protocol
1614  *   The next protocol in the previous item.
1615  * @param[out] error
1616  *   Pointer to error structure.
1617  *
1618  * @return
1619  *   0 on success, a negative errno value otherwise and rte_errno is set.
1620  */
1621 int
1622 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1623                               uint64_t item_flags,
1624                               struct rte_flow_error *error)
1625 {
1626         const struct rte_flow_item_vxlan *spec = item->spec;
1627         const struct rte_flow_item_vxlan *mask = item->mask;
1628         int ret;
1629         union vni {
1630                 uint32_t vlan_id;
1631                 uint8_t vni[4];
1632         } id = { .vlan_id = 0, };
1633         uint32_t vlan_id = 0;
1634
1635
1636         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1637                 return rte_flow_error_set(error, ENOTSUP,
1638                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1639                                           "multiple tunnel layers not"
1640                                           " supported");
1641         /*
1642          * Verify only UDPv4 is present as defined in
1643          * https://tools.ietf.org/html/rfc7348
1644          */
1645         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1646                 return rte_flow_error_set(error, EINVAL,
1647                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1648                                           "no outer UDP layer found");
1649         if (!mask)
1650                 mask = &rte_flow_item_vxlan_mask;
1651         ret = mlx5_flow_item_acceptable
1652                 (item, (const uint8_t *)mask,
1653                  (const uint8_t *)&rte_flow_item_vxlan_mask,
1654                  sizeof(struct rte_flow_item_vxlan),
1655                  error);
1656         if (ret < 0)
1657                 return ret;
1658         if (spec) {
1659                 memcpy(&id.vni[1], spec->vni, 3);
1660                 vlan_id = id.vlan_id;
1661                 memcpy(&id.vni[1], mask->vni, 3);
1662                 vlan_id &= id.vlan_id;
1663         }
1664         /*
1665          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if
1666          * only this layer is defined in the Verbs specification it is
1667          * interpreted as wildcard and all packets will match this
1668          * rule, if it follows a full stack layer (ex: eth / ipv4 /
1669          * udp), all packets matching the layers before will also
1670          * match this rule.  To avoid such situation, VNI 0 is
1671          * currently refused.
1672          */
1673         if (!vlan_id)
1674                 return rte_flow_error_set(error, ENOTSUP,
1675                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1676                                           "VXLAN vni cannot be 0");
1677         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1678                 return rte_flow_error_set(error, ENOTSUP,
1679                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1680                                           "VXLAN tunnel must be fully defined");
1681         return 0;
1682 }
1683
1684 /**
1685  * Validate VXLAN_GPE item.
1686  *
1687  * @param[in] item
1688  *   Item specification.
1689  * @param[in] item_flags
1690  *   Bit-fields that holds the items detected until now.
1691  * @param[in] priv
1692  *   Pointer to the private data structure.
1693  * @param[in] target_protocol
1694  *   The next protocol in the previous item.
1695  * @param[out] error
1696  *   Pointer to error structure.
1697  *
1698  * @return
1699  *   0 on success, a negative errno value otherwise and rte_errno is set.
1700  */
1701 int
1702 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1703                                   uint64_t item_flags,
1704                                   struct rte_eth_dev *dev,
1705                                   struct rte_flow_error *error)
1706 {
1707         struct mlx5_priv *priv = dev->data->dev_private;
1708         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1709         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1710         int ret;
1711         union vni {
1712                 uint32_t vlan_id;
1713                 uint8_t vni[4];
1714         } id = { .vlan_id = 0, };
1715         uint32_t vlan_id = 0;
1716
1717         if (!priv->config.l3_vxlan_en)
1718                 return rte_flow_error_set(error, ENOTSUP,
1719                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1720                                           "L3 VXLAN is not enabled by device"
1721                                           " parameter and/or not configured in"
1722                                           " firmware");
1723         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1724                 return rte_flow_error_set(error, ENOTSUP,
1725                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1726                                           "multiple tunnel layers not"
1727                                           " supported");
1728         /*
1729          * Verify only UDPv4 is present as defined in
1730          * https://tools.ietf.org/html/rfc7348
1731          */
1732         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1733                 return rte_flow_error_set(error, EINVAL,
1734                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1735                                           "no outer UDP layer found");
1736         if (!mask)
1737                 mask = &rte_flow_item_vxlan_gpe_mask;
1738         ret = mlx5_flow_item_acceptable
1739                 (item, (const uint8_t *)mask,
1740                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1741                  sizeof(struct rte_flow_item_vxlan_gpe),
1742                  error);
1743         if (ret < 0)
1744                 return ret;
1745         if (spec) {
1746                 if (spec->protocol)
1747                         return rte_flow_error_set(error, ENOTSUP,
1748                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1749                                                   item,
1750                                                   "VxLAN-GPE protocol"
1751                                                   " not supported");
1752                 memcpy(&id.vni[1], spec->vni, 3);
1753                 vlan_id = id.vlan_id;
1754                 memcpy(&id.vni[1], mask->vni, 3);
1755                 vlan_id &= id.vlan_id;
1756         }
1757         /*
1758          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this
1759          * layer is defined in the Verbs specification it is interpreted as
1760          * wildcard and all packets will match this rule, if it follows a full
1761          * stack layer (ex: eth / ipv4 / udp), all packets matching the layers
1762          * before will also match this rule.  To avoid such situation, VNI 0
1763          * is currently refused.
1764          */
1765         if (!vlan_id)
1766                 return rte_flow_error_set(error, ENOTSUP,
1767                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1768                                           "VXLAN-GPE vni cannot be 0");
1769         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1770                 return rte_flow_error_set(error, ENOTSUP,
1771                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1772                                           "VXLAN-GPE tunnel must be fully"
1773                                           " defined");
1774         return 0;
1775 }
1776 /**
1777  * Validate GRE Key item.
1778  *
1779  * @param[in] item
1780  *   Item specification.
1781  * @param[in] item_flags
1782  *   Bit flags to mark detected items.
1783  * @param[in] gre_item
1784  *   Pointer to gre_item
1785  * @param[out] error
1786  *   Pointer to error structure.
1787  *
1788  * @return
1789  *   0 on success, a negative errno value otherwise and rte_errno is set.
1790  */
1791 int
1792 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1793                                 uint64_t item_flags,
1794                                 const struct rte_flow_item *gre_item,
1795                                 struct rte_flow_error *error)
1796 {
1797         const rte_be32_t *mask = item->mask;
1798         int ret = 0;
1799         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1800         const struct rte_flow_item_gre *gre_spec = gre_item->spec;
1801         const struct rte_flow_item_gre *gre_mask = gre_item->mask;
1802
1803         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1804                 return rte_flow_error_set(error, ENOTSUP,
1805                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1806                                           "Multiple GRE key not support");
1807         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1808                 return rte_flow_error_set(error, ENOTSUP,
1809                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1810                                           "No preceding GRE header");
1811         if (item_flags & MLX5_FLOW_LAYER_INNER)
1812                 return rte_flow_error_set(error, ENOTSUP,
1813                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1814                                           "GRE key following a wrong item");
1815         if (!gre_mask)
1816                 gre_mask = &rte_flow_item_gre_mask;
1817         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
1818                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
1819                 return rte_flow_error_set(error, EINVAL,
1820                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1821                                           "Key bit must be on");
1822
1823         if (!mask)
1824                 mask = &gre_key_default_mask;
1825         ret = mlx5_flow_item_acceptable
1826                 (item, (const uint8_t *)mask,
1827                  (const uint8_t *)&gre_key_default_mask,
1828                  sizeof(rte_be32_t), error);
1829         return ret;
1830 }
1831
1832 /**
1833  * Validate GRE item.
1834  *
1835  * @param[in] item
1836  *   Item specification.
1837  * @param[in] item_flags
1838  *   Bit flags to mark detected items.
1839  * @param[in] target_protocol
1840  *   The next protocol in the previous item.
1841  * @param[out] error
1842  *   Pointer to error structure.
1843  *
1844  * @return
1845  *   0 on success, a negative errno value otherwise and rte_errno is set.
1846  */
1847 int
1848 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
1849                             uint64_t item_flags,
1850                             uint8_t target_protocol,
1851                             struct rte_flow_error *error)
1852 {
1853         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
1854         const struct rte_flow_item_gre *mask = item->mask;
1855         int ret;
1856         const struct rte_flow_item_gre nic_mask = {
1857                 .c_rsvd0_ver = RTE_BE16(0xB000),
1858                 .protocol = RTE_BE16(UINT16_MAX),
1859         };
1860
1861         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
1862                 return rte_flow_error_set(error, EINVAL,
1863                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1864                                           "protocol filtering not compatible"
1865                                           " with this GRE layer");
1866         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1867                 return rte_flow_error_set(error, ENOTSUP,
1868                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1869                                           "multiple tunnel layers not"
1870                                           " supported");
1871         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
1872                 return rte_flow_error_set(error, ENOTSUP,
1873                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1874                                           "L3 Layer is missing");
1875         if (!mask)
1876                 mask = &rte_flow_item_gre_mask;
1877         ret = mlx5_flow_item_acceptable
1878                 (item, (const uint8_t *)mask,
1879                  (const uint8_t *)&nic_mask,
1880                  sizeof(struct rte_flow_item_gre), error);
1881         if (ret < 0)
1882                 return ret;
1883 #ifndef HAVE_MLX5DV_DR
1884 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
1885         if (spec && (spec->protocol & mask->protocol))
1886                 return rte_flow_error_set(error, ENOTSUP,
1887                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1888                                           "without MPLS support the"
1889                                           " specification cannot be used for"
1890                                           " filtering");
1891 #endif
1892 #endif
1893         return 0;
1894 }
1895
1896 /**
1897  * Validate MPLS item.
1898  *
1899  * @param[in] dev
1900  *   Pointer to the rte_eth_dev structure.
1901  * @param[in] item
1902  *   Item specification.
1903  * @param[in] item_flags
1904  *   Bit-fields that holds the items detected until now.
1905  * @param[in] prev_layer
1906  *   The protocol layer indicated in previous item.
1907  * @param[out] error
1908  *   Pointer to error structure.
1909  *
1910  * @return
1911  *   0 on success, a negative errno value otherwise and rte_errno is set.
1912  */
1913 int
1914 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
1915                              const struct rte_flow_item *item __rte_unused,
1916                              uint64_t item_flags __rte_unused,
1917                              uint64_t prev_layer __rte_unused,
1918                              struct rte_flow_error *error)
1919 {
1920 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1921         const struct rte_flow_item_mpls *mask = item->mask;
1922         struct mlx5_priv *priv = dev->data->dev_private;
1923         int ret;
1924
1925         if (!priv->config.mpls_en)
1926                 return rte_flow_error_set(error, ENOTSUP,
1927                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1928                                           "MPLS not supported or"
1929                                           " disabled in firmware"
1930                                           " configuration.");
1931         /* MPLS over IP, UDP, GRE is allowed */
1932         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
1933                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
1934                             MLX5_FLOW_LAYER_GRE)))
1935                 return rte_flow_error_set(error, EINVAL,
1936                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1937                                           "protocol filtering not compatible"
1938                                           " with MPLS layer");
1939         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
1940         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
1941             !(item_flags & MLX5_FLOW_LAYER_GRE))
1942                 return rte_flow_error_set(error, ENOTSUP,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1944                                           "multiple tunnel layers not"
1945                                           " supported");
1946         if (!mask)
1947                 mask = &rte_flow_item_mpls_mask;
1948         ret = mlx5_flow_item_acceptable
1949                 (item, (const uint8_t *)mask,
1950                  (const uint8_t *)&rte_flow_item_mpls_mask,
1951                  sizeof(struct rte_flow_item_mpls), error);
1952         if (ret < 0)
1953                 return ret;
1954         return 0;
1955 #endif
1956         return rte_flow_error_set(error, ENOTSUP,
1957                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
1958                                   "MPLS is not supported by Verbs, please"
1959                                   " update.");
1960 }
1961
1962 /**
1963  * Validate NVGRE item.
1964  *
1965  * @param[in] item
1966  *   Item specification.
1967  * @param[in] item_flags
1968  *   Bit flags to mark detected items.
1969  * @param[in] target_protocol
1970  *   The next protocol in the previous item.
1971  * @param[out] error
1972  *   Pointer to error structure.
1973  *
1974  * @return
1975  *   0 on success, a negative errno value otherwise and rte_errno is set.
1976  */
1977 int
1978 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
1979                               uint64_t item_flags,
1980                               uint8_t target_protocol,
1981                               struct rte_flow_error *error)
1982 {
1983         const struct rte_flow_item_nvgre *mask = item->mask;
1984         int ret;
1985
1986         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
1987                 return rte_flow_error_set(error, EINVAL,
1988                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1989                                           "protocol filtering not compatible"
1990                                           " with this GRE layer");
1991         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1992                 return rte_flow_error_set(error, ENOTSUP,
1993                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1994                                           "multiple tunnel layers not"
1995                                           " supported");
1996         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
1997                 return rte_flow_error_set(error, ENOTSUP,
1998                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1999                                           "L3 Layer is missing");
2000         if (!mask)
2001                 mask = &rte_flow_item_nvgre_mask;
2002         ret = mlx5_flow_item_acceptable
2003                 (item, (const uint8_t *)mask,
2004                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2005                  sizeof(struct rte_flow_item_nvgre), error);
2006         if (ret < 0)
2007                 return ret;
2008         return 0;
2009 }
2010
2011 static int
2012 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2013                    const struct rte_flow_attr *attr __rte_unused,
2014                    const struct rte_flow_item items[] __rte_unused,
2015                    const struct rte_flow_action actions[] __rte_unused,
2016                    struct rte_flow_error *error)
2017 {
2018         return rte_flow_error_set(error, ENOTSUP,
2019                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2020 }
2021
2022 static struct mlx5_flow *
2023 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
2024                   const struct rte_flow_item items[] __rte_unused,
2025                   const struct rte_flow_action actions[] __rte_unused,
2026                   struct rte_flow_error *error)
2027 {
2028         rte_flow_error_set(error, ENOTSUP,
2029                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2030         return NULL;
2031 }
2032
2033 static int
2034 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2035                     struct mlx5_flow *dev_flow __rte_unused,
2036                     const struct rte_flow_attr *attr __rte_unused,
2037                     const struct rte_flow_item items[] __rte_unused,
2038                     const struct rte_flow_action actions[] __rte_unused,
2039                     struct rte_flow_error *error)
2040 {
2041         return rte_flow_error_set(error, ENOTSUP,
2042                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2043 }
2044
2045 static int
2046 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2047                 struct rte_flow *flow __rte_unused,
2048                 struct rte_flow_error *error)
2049 {
2050         return rte_flow_error_set(error, ENOTSUP,
2051                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2052 }
2053
2054 static void
2055 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2056                  struct rte_flow *flow __rte_unused)
2057 {
2058 }
2059
2060 static void
2061 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2062                   struct rte_flow *flow __rte_unused)
2063 {
2064 }
2065
2066 static int
2067 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2068                 struct rte_flow *flow __rte_unused,
2069                 const struct rte_flow_action *actions __rte_unused,
2070                 void *data __rte_unused,
2071                 struct rte_flow_error *error)
2072 {
2073         return rte_flow_error_set(error, ENOTSUP,
2074                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2075 }
2076
2077 /* Void driver to protect from null pointer reference. */
2078 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2079         .validate = flow_null_validate,
2080         .prepare = flow_null_prepare,
2081         .translate = flow_null_translate,
2082         .apply = flow_null_apply,
2083         .remove = flow_null_remove,
2084         .destroy = flow_null_destroy,
2085         .query = flow_null_query,
2086 };
2087
2088 /**
2089  * Select flow driver type according to flow attributes and device
2090  * configuration.
2091  *
2092  * @param[in] dev
2093  *   Pointer to the dev structure.
2094  * @param[in] attr
2095  *   Pointer to the flow attributes.
2096  *
2097  * @return
2098  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2099  */
2100 static enum mlx5_flow_drv_type
2101 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2102 {
2103         struct mlx5_priv *priv = dev->data->dev_private;
2104         enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2105
2106         if (attr->transfer && priv->config.dv_esw_en)
2107                 type = MLX5_FLOW_TYPE_DV;
2108         if (!attr->transfer)
2109                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2110                                                  MLX5_FLOW_TYPE_VERBS;
2111         return type;
2112 }
2113
2114 #define flow_get_drv_ops(type) flow_drv_ops[type]
2115
2116 /**
2117  * Flow driver validation API. This abstracts calling driver specific functions.
2118  * The type of flow driver is determined according to flow attributes.
2119  *
2120  * @param[in] dev
2121  *   Pointer to the dev structure.
2122  * @param[in] attr
2123  *   Pointer to the flow attributes.
2124  * @param[in] items
2125  *   Pointer to the list of items.
2126  * @param[in] actions
2127  *   Pointer to the list of actions.
2128  * @param[out] error
2129  *   Pointer to the error structure.
2130  *
2131  * @return
2132  *   0 on success, a negative errno value otherwise and rte_errno is set.
2133  */
2134 static inline int
2135 flow_drv_validate(struct rte_eth_dev *dev,
2136                   const struct rte_flow_attr *attr,
2137                   const struct rte_flow_item items[],
2138                   const struct rte_flow_action actions[],
2139                   struct rte_flow_error *error)
2140 {
2141         const struct mlx5_flow_driver_ops *fops;
2142         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2143
2144         fops = flow_get_drv_ops(type);
2145         return fops->validate(dev, attr, items, actions, error);
2146 }
2147
2148 /**
2149  * Flow driver preparation API. This abstracts calling driver specific
2150  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2151  * calculates the size of memory required for device flow, allocates the memory,
2152  * initializes the device flow and returns the pointer.
2153  *
2154  * @note
2155  *   This function initializes device flow structure such as dv or verbs in
2156  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
2157  *   rest. For example, adding returning device flow to flow->dev_flow list and
2158  *   setting backward reference to the flow should be done out of this function.
2159  *   layers field is not filled either.
2160  *
2161  * @param[in] attr
2162  *   Pointer to the flow attributes.
2163  * @param[in] items
2164  *   Pointer to the list of items.
2165  * @param[in] actions
2166  *   Pointer to the list of actions.
2167  * @param[out] error
2168  *   Pointer to the error structure.
2169  *
2170  * @return
2171  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
2172  */
2173 static inline struct mlx5_flow *
2174 flow_drv_prepare(const struct rte_flow *flow,
2175                  const struct rte_flow_attr *attr,
2176                  const struct rte_flow_item items[],
2177                  const struct rte_flow_action actions[],
2178                  struct rte_flow_error *error)
2179 {
2180         const struct mlx5_flow_driver_ops *fops;
2181         enum mlx5_flow_drv_type type = flow->drv_type;
2182
2183         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2184         fops = flow_get_drv_ops(type);
2185         return fops->prepare(attr, items, actions, error);
2186 }
2187
2188 /**
2189  * Flow driver translation API. This abstracts calling driver specific
2190  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2191  * translates a generic flow into a driver flow. flow_drv_prepare() must
2192  * precede.
2193  *
2194  * @note
2195  *   dev_flow->layers could be filled as a result of parsing during translation
2196  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2197  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2198  *   flow->actions could be overwritten even though all the expanded dev_flows
2199  *   have the same actions.
2200  *
2201  * @param[in] dev
2202  *   Pointer to the rte dev structure.
2203  * @param[in, out] dev_flow
2204  *   Pointer to the mlx5 flow.
2205  * @param[in] attr
2206  *   Pointer to the flow attributes.
2207  * @param[in] items
2208  *   Pointer to the list of items.
2209  * @param[in] actions
2210  *   Pointer to the list of actions.
2211  * @param[out] error
2212  *   Pointer to the error structure.
2213  *
2214  * @return
2215  *   0 on success, a negative errno value otherwise and rte_errno is set.
2216  */
2217 static inline int
2218 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2219                    const struct rte_flow_attr *attr,
2220                    const struct rte_flow_item items[],
2221                    const struct rte_flow_action actions[],
2222                    struct rte_flow_error *error)
2223 {
2224         const struct mlx5_flow_driver_ops *fops;
2225         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2226
2227         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2228         fops = flow_get_drv_ops(type);
2229         return fops->translate(dev, dev_flow, attr, items, actions, error);
2230 }
2231
2232 /**
2233  * Flow driver apply API. This abstracts calling driver specific functions.
2234  * Parent flow (rte_flow) should have driver type (drv_type). It applies
2235  * translated driver flows on to device. flow_drv_translate() must precede.
2236  *
2237  * @param[in] dev
2238  *   Pointer to Ethernet device structure.
2239  * @param[in, out] flow
2240  *   Pointer to flow structure.
2241  * @param[out] error
2242  *   Pointer to error structure.
2243  *
2244  * @return
2245  *   0 on success, a negative errno value otherwise and rte_errno is set.
2246  */
2247 static inline int
2248 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2249                struct rte_flow_error *error)
2250 {
2251         const struct mlx5_flow_driver_ops *fops;
2252         enum mlx5_flow_drv_type type = flow->drv_type;
2253
2254         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2255         fops = flow_get_drv_ops(type);
2256         return fops->apply(dev, flow, error);
2257 }
2258
2259 /**
2260  * Flow driver remove API. This abstracts calling driver specific functions.
2261  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2262  * on device. All the resources of the flow should be freed by calling
2263  * flow_drv_destroy().
2264  *
2265  * @param[in] dev
2266  *   Pointer to Ethernet device.
2267  * @param[in, out] flow
2268  *   Pointer to flow structure.
2269  */
2270 static inline void
2271 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2272 {
2273         const struct mlx5_flow_driver_ops *fops;
2274         enum mlx5_flow_drv_type type = flow->drv_type;
2275
2276         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2277         fops = flow_get_drv_ops(type);
2278         fops->remove(dev, flow);
2279 }
2280
2281 /**
2282  * Flow driver destroy API. This abstracts calling driver specific functions.
2283  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2284  * on device and releases resources of the flow.
2285  *
2286  * @param[in] dev
2287  *   Pointer to Ethernet device.
2288  * @param[in, out] flow
2289  *   Pointer to flow structure.
2290  */
2291 static inline void
2292 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2293 {
2294         const struct mlx5_flow_driver_ops *fops;
2295         enum mlx5_flow_drv_type type = flow->drv_type;
2296
2297         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2298         fops = flow_get_drv_ops(type);
2299         fops->destroy(dev, flow);
2300 }
2301
2302 /**
2303  * Validate a flow supported by the NIC.
2304  *
2305  * @see rte_flow_validate()
2306  * @see rte_flow_ops
2307  */
2308 int
2309 mlx5_flow_validate(struct rte_eth_dev *dev,
2310                    const struct rte_flow_attr *attr,
2311                    const struct rte_flow_item items[],
2312                    const struct rte_flow_action actions[],
2313                    struct rte_flow_error *error)
2314 {
2315         int ret;
2316
2317         ret = flow_drv_validate(dev, attr, items, actions, error);
2318         if (ret < 0)
2319                 return ret;
2320         return 0;
2321 }
2322
2323 /**
2324  * Get RSS action from the action list.
2325  *
2326  * @param[in] actions
2327  *   Pointer to the list of actions.
2328  *
2329  * @return
2330  *   Pointer to the RSS action if exist, else return NULL.
2331  */
2332 static const struct rte_flow_action_rss*
2333 flow_get_rss_action(const struct rte_flow_action actions[])
2334 {
2335         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2336                 switch (actions->type) {
2337                 case RTE_FLOW_ACTION_TYPE_RSS:
2338                         return (const struct rte_flow_action_rss *)
2339                                actions->conf;
2340                 default:
2341                         break;
2342                 }
2343         }
2344         return NULL;
2345 }
2346
2347 static unsigned int
2348 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2349 {
2350         const struct rte_flow_item *item;
2351         unsigned int has_vlan = 0;
2352
2353         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2354                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2355                         has_vlan = 1;
2356                         break;
2357                 }
2358         }
2359         if (has_vlan)
2360                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2361                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2362         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2363                                MLX5_EXPANSION_ROOT_OUTER;
2364 }
2365
2366 /**
2367  * Create a flow and add it to @p list.
2368  *
2369  * @param dev
2370  *   Pointer to Ethernet device.
2371  * @param list
2372  *   Pointer to a TAILQ flow list.
2373  * @param[in] attr
2374  *   Flow rule attributes.
2375  * @param[in] items
2376  *   Pattern specification (list terminated by the END pattern item).
2377  * @param[in] actions
2378  *   Associated actions (list terminated by the END action).
2379  * @param[out] error
2380  *   Perform verbose error reporting if not NULL.
2381  *
2382  * @return
2383  *   A flow on success, NULL otherwise and rte_errno is set.
2384  */
2385 static struct rte_flow *
2386 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2387                  const struct rte_flow_attr *attr,
2388                  const struct rte_flow_item items[],
2389                  const struct rte_flow_action actions[],
2390                  struct rte_flow_error *error)
2391 {
2392         struct rte_flow *flow = NULL;
2393         struct mlx5_flow *dev_flow;
2394         const struct rte_flow_action_rss *rss;
2395         union {
2396                 struct rte_flow_expand_rss buf;
2397                 uint8_t buffer[2048];
2398         } expand_buffer;
2399         struct rte_flow_expand_rss *buf = &expand_buffer.buf;
2400         int ret;
2401         uint32_t i;
2402         uint32_t flow_size;
2403
2404         ret = flow_drv_validate(dev, attr, items, actions, error);
2405         if (ret < 0)
2406                 return NULL;
2407         flow_size = sizeof(struct rte_flow);
2408         rss = flow_get_rss_action(actions);
2409         if (rss)
2410                 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
2411                                             sizeof(void *));
2412         else
2413                 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
2414         flow = rte_calloc(__func__, 1, flow_size, 0);
2415         if (!flow) {
2416                 rte_errno = ENOMEM;
2417                 return NULL;
2418         }
2419         flow->drv_type = flow_get_drv_type(dev, attr);
2420         flow->ingress = attr->ingress;
2421         flow->transfer = attr->transfer;
2422         assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
2423                flow->drv_type < MLX5_FLOW_TYPE_MAX);
2424         flow->queue = (void *)(flow + 1);
2425         LIST_INIT(&flow->dev_flows);
2426         if (rss && rss->types) {
2427                 unsigned int graph_root;
2428
2429                 graph_root = find_graph_root(items, rss->level);
2430                 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
2431                                           items, rss->types,
2432                                           mlx5_support_expansion,
2433                                           graph_root);
2434                 assert(ret > 0 &&
2435                        (unsigned int)ret < sizeof(expand_buffer.buffer));
2436         } else {
2437                 buf->entries = 1;
2438                 buf->entry[0].pattern = (void *)(uintptr_t)items;
2439         }
2440         for (i = 0; i < buf->entries; ++i) {
2441                 dev_flow = flow_drv_prepare(flow, attr, buf->entry[i].pattern,
2442                                             actions, error);
2443                 if (!dev_flow)
2444                         goto error;
2445                 dev_flow->flow = flow;
2446                 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
2447                 ret = flow_drv_translate(dev, dev_flow, attr,
2448                                          buf->entry[i].pattern,
2449                                          actions, error);
2450                 if (ret < 0)
2451                         goto error;
2452         }
2453         if (dev->data->dev_started) {
2454                 ret = flow_drv_apply(dev, flow, error);
2455                 if (ret < 0)
2456                         goto error;
2457         }
2458         TAILQ_INSERT_TAIL(list, flow, next);
2459         flow_rxq_flags_set(dev, flow);
2460         return flow;
2461 error:
2462         ret = rte_errno; /* Save rte_errno before cleanup. */
2463         assert(flow);
2464         flow_drv_destroy(dev, flow);
2465         rte_free(flow);
2466         rte_errno = ret; /* Restore rte_errno. */
2467         return NULL;
2468 }
2469
2470 /**
2471  * Create a flow.
2472  *
2473  * @see rte_flow_create()
2474  * @see rte_flow_ops
2475  */
2476 struct rte_flow *
2477 mlx5_flow_create(struct rte_eth_dev *dev,
2478                  const struct rte_flow_attr *attr,
2479                  const struct rte_flow_item items[],
2480                  const struct rte_flow_action actions[],
2481                  struct rte_flow_error *error)
2482 {
2483         struct mlx5_priv *priv = dev->data->dev_private;
2484
2485         return flow_list_create(dev, &priv->flows,
2486                                 attr, items, actions, error);
2487 }
2488
2489 /**
2490  * Destroy a flow in a list.
2491  *
2492  * @param dev
2493  *   Pointer to Ethernet device.
2494  * @param list
2495  *   Pointer to a TAILQ flow list.
2496  * @param[in] flow
2497  *   Flow to destroy.
2498  */
2499 static void
2500 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2501                   struct rte_flow *flow)
2502 {
2503         /*
2504          * Update RX queue flags only if port is started, otherwise it is
2505          * already clean.
2506          */
2507         if (dev->data->dev_started)
2508                 flow_rxq_flags_trim(dev, flow);
2509         flow_drv_destroy(dev, flow);
2510         TAILQ_REMOVE(list, flow, next);
2511         rte_free(flow->fdir);
2512         rte_free(flow);
2513 }
2514
2515 /**
2516  * Destroy all flows.
2517  *
2518  * @param dev
2519  *   Pointer to Ethernet device.
2520  * @param list
2521  *   Pointer to a TAILQ flow list.
2522  */
2523 void
2524 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
2525 {
2526         while (!TAILQ_EMPTY(list)) {
2527                 struct rte_flow *flow;
2528
2529                 flow = TAILQ_FIRST(list);
2530                 flow_list_destroy(dev, list, flow);
2531         }
2532 }
2533
2534 /**
2535  * Remove all flows.
2536  *
2537  * @param dev
2538  *   Pointer to Ethernet device.
2539  * @param list
2540  *   Pointer to a TAILQ flow list.
2541  */
2542 void
2543 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
2544 {
2545         struct rte_flow *flow;
2546
2547         TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next)
2548                 flow_drv_remove(dev, flow);
2549         flow_rxq_flags_clear(dev);
2550 }
2551
2552 /**
2553  * Add all flows.
2554  *
2555  * @param dev
2556  *   Pointer to Ethernet device.
2557  * @param list
2558  *   Pointer to a TAILQ flow list.
2559  *
2560  * @return
2561  *   0 on success, a negative errno value otherwise and rte_errno is set.
2562  */
2563 int
2564 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
2565 {
2566         struct rte_flow *flow;
2567         struct rte_flow_error error;
2568         int ret = 0;
2569
2570         TAILQ_FOREACH(flow, list, next) {
2571                 ret = flow_drv_apply(dev, flow, &error);
2572                 if (ret < 0)
2573                         goto error;
2574                 flow_rxq_flags_set(dev, flow);
2575         }
2576         return 0;
2577 error:
2578         ret = rte_errno; /* Save rte_errno before cleanup. */
2579         mlx5_flow_stop(dev, list);
2580         rte_errno = ret; /* Restore rte_errno. */
2581         return -rte_errno;
2582 }
2583
2584 /**
2585  * Verify the flow list is empty
2586  *
2587  * @param dev
2588  *  Pointer to Ethernet device.
2589  *
2590  * @return the number of flows not released.
2591  */
2592 int
2593 mlx5_flow_verify(struct rte_eth_dev *dev)
2594 {
2595         struct mlx5_priv *priv = dev->data->dev_private;
2596         struct rte_flow *flow;
2597         int ret = 0;
2598
2599         TAILQ_FOREACH(flow, &priv->flows, next) {
2600                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
2601                         dev->data->port_id, (void *)flow);
2602                 ++ret;
2603         }
2604         return ret;
2605 }
2606
2607 /**
2608  * Enable a control flow configured from the control plane.
2609  *
2610  * @param dev
2611  *   Pointer to Ethernet device.
2612  * @param eth_spec
2613  *   An Ethernet flow spec to apply.
2614  * @param eth_mask
2615  *   An Ethernet flow mask to apply.
2616  * @param vlan_spec
2617  *   A VLAN flow spec to apply.
2618  * @param vlan_mask
2619  *   A VLAN flow mask to apply.
2620  *
2621  * @return
2622  *   0 on success, a negative errno value otherwise and rte_errno is set.
2623  */
2624 int
2625 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
2626                     struct rte_flow_item_eth *eth_spec,
2627                     struct rte_flow_item_eth *eth_mask,
2628                     struct rte_flow_item_vlan *vlan_spec,
2629                     struct rte_flow_item_vlan *vlan_mask)
2630 {
2631         struct mlx5_priv *priv = dev->data->dev_private;
2632         const struct rte_flow_attr attr = {
2633                 .ingress = 1,
2634                 .priority = MLX5_FLOW_PRIO_RSVD,
2635         };
2636         struct rte_flow_item items[] = {
2637                 {
2638                         .type = RTE_FLOW_ITEM_TYPE_ETH,
2639                         .spec = eth_spec,
2640                         .last = NULL,
2641                         .mask = eth_mask,
2642                 },
2643                 {
2644                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
2645                                               RTE_FLOW_ITEM_TYPE_END,
2646                         .spec = vlan_spec,
2647                         .last = NULL,
2648                         .mask = vlan_mask,
2649                 },
2650                 {
2651                         .type = RTE_FLOW_ITEM_TYPE_END,
2652                 },
2653         };
2654         uint16_t queue[priv->reta_idx_n];
2655         struct rte_flow_action_rss action_rss = {
2656                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
2657                 .level = 0,
2658                 .types = priv->rss_conf.rss_hf,
2659                 .key_len = priv->rss_conf.rss_key_len,
2660                 .queue_num = priv->reta_idx_n,
2661                 .key = priv->rss_conf.rss_key,
2662                 .queue = queue,
2663         };
2664         struct rte_flow_action actions[] = {
2665                 {
2666                         .type = RTE_FLOW_ACTION_TYPE_RSS,
2667                         .conf = &action_rss,
2668                 },
2669                 {
2670                         .type = RTE_FLOW_ACTION_TYPE_END,
2671                 },
2672         };
2673         struct rte_flow *flow;
2674         struct rte_flow_error error;
2675         unsigned int i;
2676
2677         if (!priv->reta_idx_n || !priv->rxqs_n) {
2678                 return 0;
2679         }
2680         for (i = 0; i != priv->reta_idx_n; ++i)
2681                 queue[i] = (*priv->reta_idx)[i];
2682         flow = flow_list_create(dev, &priv->ctrl_flows,
2683                                 &attr, items, actions, &error);
2684         if (!flow)
2685                 return -rte_errno;
2686         return 0;
2687 }
2688
2689 /**
2690  * Enable a flow control configured from the control plane.
2691  *
2692  * @param dev
2693  *   Pointer to Ethernet device.
2694  * @param eth_spec
2695  *   An Ethernet flow spec to apply.
2696  * @param eth_mask
2697  *   An Ethernet flow mask to apply.
2698  *
2699  * @return
2700  *   0 on success, a negative errno value otherwise and rte_errno is set.
2701  */
2702 int
2703 mlx5_ctrl_flow(struct rte_eth_dev *dev,
2704                struct rte_flow_item_eth *eth_spec,
2705                struct rte_flow_item_eth *eth_mask)
2706 {
2707         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
2708 }
2709
2710 /**
2711  * Destroy a flow.
2712  *
2713  * @see rte_flow_destroy()
2714  * @see rte_flow_ops
2715  */
2716 int
2717 mlx5_flow_destroy(struct rte_eth_dev *dev,
2718                   struct rte_flow *flow,
2719                   struct rte_flow_error *error __rte_unused)
2720 {
2721         struct mlx5_priv *priv = dev->data->dev_private;
2722
2723         flow_list_destroy(dev, &priv->flows, flow);
2724         return 0;
2725 }
2726
2727 /**
2728  * Destroy all flows.
2729  *
2730  * @see rte_flow_flush()
2731  * @see rte_flow_ops
2732  */
2733 int
2734 mlx5_flow_flush(struct rte_eth_dev *dev,
2735                 struct rte_flow_error *error __rte_unused)
2736 {
2737         struct mlx5_priv *priv = dev->data->dev_private;
2738
2739         mlx5_flow_list_flush(dev, &priv->flows);
2740         return 0;
2741 }
2742
2743 /**
2744  * Isolated mode.
2745  *
2746  * @see rte_flow_isolate()
2747  * @see rte_flow_ops
2748  */
2749 int
2750 mlx5_flow_isolate(struct rte_eth_dev *dev,
2751                   int enable,
2752                   struct rte_flow_error *error)
2753 {
2754         struct mlx5_priv *priv = dev->data->dev_private;
2755
2756         if (dev->data->dev_started) {
2757                 rte_flow_error_set(error, EBUSY,
2758                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2759                                    NULL,
2760                                    "port must be stopped first");
2761                 return -rte_errno;
2762         }
2763         priv->isolated = !!enable;
2764         if (enable)
2765                 dev->dev_ops = &mlx5_dev_ops_isolate;
2766         else
2767                 dev->dev_ops = &mlx5_dev_ops;
2768         return 0;
2769 }
2770
2771 /**
2772  * Query a flow.
2773  *
2774  * @see rte_flow_query()
2775  * @see rte_flow_ops
2776  */
2777 static int
2778 flow_drv_query(struct rte_eth_dev *dev,
2779                struct rte_flow *flow,
2780                const struct rte_flow_action *actions,
2781                void *data,
2782                struct rte_flow_error *error)
2783 {
2784         const struct mlx5_flow_driver_ops *fops;
2785         enum mlx5_flow_drv_type ftype = flow->drv_type;
2786
2787         assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
2788         fops = flow_get_drv_ops(ftype);
2789
2790         return fops->query(dev, flow, actions, data, error);
2791 }
2792
2793 /**
2794  * Query a flow.
2795  *
2796  * @see rte_flow_query()
2797  * @see rte_flow_ops
2798  */
2799 int
2800 mlx5_flow_query(struct rte_eth_dev *dev,
2801                 struct rte_flow *flow,
2802                 const struct rte_flow_action *actions,
2803                 void *data,
2804                 struct rte_flow_error *error)
2805 {
2806         int ret;
2807
2808         ret = flow_drv_query(dev, flow, actions, data, error);
2809         if (ret < 0)
2810                 return ret;
2811         return 0;
2812 }
2813
2814 /**
2815  * Convert a flow director filter to a generic flow.
2816  *
2817  * @param dev
2818  *   Pointer to Ethernet device.
2819  * @param fdir_filter
2820  *   Flow director filter to add.
2821  * @param attributes
2822  *   Generic flow parameters structure.
2823  *
2824  * @return
2825  *   0 on success, a negative errno value otherwise and rte_errno is set.
2826  */
2827 static int
2828 flow_fdir_filter_convert(struct rte_eth_dev *dev,
2829                          const struct rte_eth_fdir_filter *fdir_filter,
2830                          struct mlx5_fdir *attributes)
2831 {
2832         struct mlx5_priv *priv = dev->data->dev_private;
2833         const struct rte_eth_fdir_input *input = &fdir_filter->input;
2834         const struct rte_eth_fdir_masks *mask =
2835                 &dev->data->dev_conf.fdir_conf.mask;
2836
2837         /* Validate queue number. */
2838         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
2839                 DRV_LOG(ERR, "port %u invalid queue number %d",
2840                         dev->data->port_id, fdir_filter->action.rx_queue);
2841                 rte_errno = EINVAL;
2842                 return -rte_errno;
2843         }
2844         attributes->attr.ingress = 1;
2845         attributes->items[0] = (struct rte_flow_item) {
2846                 .type = RTE_FLOW_ITEM_TYPE_ETH,
2847                 .spec = &attributes->l2,
2848                 .mask = &attributes->l2_mask,
2849         };
2850         switch (fdir_filter->action.behavior) {
2851         case RTE_ETH_FDIR_ACCEPT:
2852                 attributes->actions[0] = (struct rte_flow_action){
2853                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
2854                         .conf = &attributes->queue,
2855                 };
2856                 break;
2857         case RTE_ETH_FDIR_REJECT:
2858                 attributes->actions[0] = (struct rte_flow_action){
2859                         .type = RTE_FLOW_ACTION_TYPE_DROP,
2860                 };
2861                 break;
2862         default:
2863                 DRV_LOG(ERR, "port %u invalid behavior %d",
2864                         dev->data->port_id,
2865                         fdir_filter->action.behavior);
2866                 rte_errno = ENOTSUP;
2867                 return -rte_errno;
2868         }
2869         attributes->queue.index = fdir_filter->action.rx_queue;
2870         /* Handle L3. */
2871         switch (fdir_filter->input.flow_type) {
2872         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2873         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2874         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2875                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
2876                         .src_addr = input->flow.ip4_flow.src_ip,
2877                         .dst_addr = input->flow.ip4_flow.dst_ip,
2878                         .time_to_live = input->flow.ip4_flow.ttl,
2879                         .type_of_service = input->flow.ip4_flow.tos,
2880                 };
2881                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
2882                         .src_addr = mask->ipv4_mask.src_ip,
2883                         .dst_addr = mask->ipv4_mask.dst_ip,
2884                         .time_to_live = mask->ipv4_mask.ttl,
2885                         .type_of_service = mask->ipv4_mask.tos,
2886                         .next_proto_id = mask->ipv4_mask.proto,
2887                 };
2888                 attributes->items[1] = (struct rte_flow_item){
2889                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
2890                         .spec = &attributes->l3,
2891                         .mask = &attributes->l3_mask,
2892                 };
2893                 break;
2894         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2895         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2896         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2897                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
2898                         .hop_limits = input->flow.ipv6_flow.hop_limits,
2899                         .proto = input->flow.ipv6_flow.proto,
2900                 };
2901
2902                 memcpy(attributes->l3.ipv6.hdr.src_addr,
2903                        input->flow.ipv6_flow.src_ip,
2904                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
2905                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
2906                        input->flow.ipv6_flow.dst_ip,
2907                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
2908                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
2909                        mask->ipv6_mask.src_ip,
2910                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
2911                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
2912                        mask->ipv6_mask.dst_ip,
2913                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
2914                 attributes->items[1] = (struct rte_flow_item){
2915                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
2916                         .spec = &attributes->l3,
2917                         .mask = &attributes->l3_mask,
2918                 };
2919                 break;
2920         default:
2921                 DRV_LOG(ERR, "port %u invalid flow type%d",
2922                         dev->data->port_id, fdir_filter->input.flow_type);
2923                 rte_errno = ENOTSUP;
2924                 return -rte_errno;
2925         }
2926         /* Handle L4. */
2927         switch (fdir_filter->input.flow_type) {
2928         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2929                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
2930                         .src_port = input->flow.udp4_flow.src_port,
2931                         .dst_port = input->flow.udp4_flow.dst_port,
2932                 };
2933                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
2934                         .src_port = mask->src_port_mask,
2935                         .dst_port = mask->dst_port_mask,
2936                 };
2937                 attributes->items[2] = (struct rte_flow_item){
2938                         .type = RTE_FLOW_ITEM_TYPE_UDP,
2939                         .spec = &attributes->l4,
2940                         .mask = &attributes->l4_mask,
2941                 };
2942                 break;
2943         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2944                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
2945                         .src_port = input->flow.tcp4_flow.src_port,
2946                         .dst_port = input->flow.tcp4_flow.dst_port,
2947                 };
2948                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
2949                         .src_port = mask->src_port_mask,
2950                         .dst_port = mask->dst_port_mask,
2951                 };
2952                 attributes->items[2] = (struct rte_flow_item){
2953                         .type = RTE_FLOW_ITEM_TYPE_TCP,
2954                         .spec = &attributes->l4,
2955                         .mask = &attributes->l4_mask,
2956                 };
2957                 break;
2958         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2959                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
2960                         .src_port = input->flow.udp6_flow.src_port,
2961                         .dst_port = input->flow.udp6_flow.dst_port,
2962                 };
2963                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
2964                         .src_port = mask->src_port_mask,
2965                         .dst_port = mask->dst_port_mask,
2966                 };
2967                 attributes->items[2] = (struct rte_flow_item){
2968                         .type = RTE_FLOW_ITEM_TYPE_UDP,
2969                         .spec = &attributes->l4,
2970                         .mask = &attributes->l4_mask,
2971                 };
2972                 break;
2973         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2974                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
2975                         .src_port = input->flow.tcp6_flow.src_port,
2976                         .dst_port = input->flow.tcp6_flow.dst_port,
2977                 };
2978                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
2979                         .src_port = mask->src_port_mask,
2980                         .dst_port = mask->dst_port_mask,
2981                 };
2982                 attributes->items[2] = (struct rte_flow_item){
2983                         .type = RTE_FLOW_ITEM_TYPE_TCP,
2984                         .spec = &attributes->l4,
2985                         .mask = &attributes->l4_mask,
2986                 };
2987                 break;
2988         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2989         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2990                 break;
2991         default:
2992                 DRV_LOG(ERR, "port %u invalid flow type%d",
2993                         dev->data->port_id, fdir_filter->input.flow_type);
2994                 rte_errno = ENOTSUP;
2995                 return -rte_errno;
2996         }
2997         return 0;
2998 }
2999
3000 #define FLOW_FDIR_CMP(f1, f2, fld) \
3001         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
3002
3003 /**
3004  * Compare two FDIR flows. If items and actions are identical, the two flows are
3005  * regarded as same.
3006  *
3007  * @param dev
3008  *   Pointer to Ethernet device.
3009  * @param f1
3010  *   FDIR flow to compare.
3011  * @param f2
3012  *   FDIR flow to compare.
3013  *
3014  * @return
3015  *   Zero on match, 1 otherwise.
3016  */
3017 static int
3018 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
3019 {
3020         if (FLOW_FDIR_CMP(f1, f2, attr) ||
3021             FLOW_FDIR_CMP(f1, f2, l2) ||
3022             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
3023             FLOW_FDIR_CMP(f1, f2, l3) ||
3024             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
3025             FLOW_FDIR_CMP(f1, f2, l4) ||
3026             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
3027             FLOW_FDIR_CMP(f1, f2, actions[0].type))
3028                 return 1;
3029         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
3030             FLOW_FDIR_CMP(f1, f2, queue))
3031                 return 1;
3032         return 0;
3033 }
3034
3035 /**
3036  * Search device flow list to find out a matched FDIR flow.
3037  *
3038  * @param dev
3039  *   Pointer to Ethernet device.
3040  * @param fdir_flow
3041  *   FDIR flow to lookup.
3042  *
3043  * @return
3044  *   Pointer of flow if found, NULL otherwise.
3045  */
3046 static struct rte_flow *
3047 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
3048 {
3049         struct mlx5_priv *priv = dev->data->dev_private;
3050         struct rte_flow *flow = NULL;
3051
3052         assert(fdir_flow);
3053         TAILQ_FOREACH(flow, &priv->flows, next) {
3054                 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
3055                         DRV_LOG(DEBUG, "port %u found FDIR flow %p",
3056                                 dev->data->port_id, (void *)flow);
3057                         break;
3058                 }
3059         }
3060         return flow;
3061 }
3062
3063 /**
3064  * Add new flow director filter and store it in list.
3065  *
3066  * @param dev
3067  *   Pointer to Ethernet device.
3068  * @param fdir_filter
3069  *   Flow director filter to add.
3070  *
3071  * @return
3072  *   0 on success, a negative errno value otherwise and rte_errno is set.
3073  */
3074 static int
3075 flow_fdir_filter_add(struct rte_eth_dev *dev,
3076                      const struct rte_eth_fdir_filter *fdir_filter)
3077 {
3078         struct mlx5_priv *priv = dev->data->dev_private;
3079         struct mlx5_fdir *fdir_flow;
3080         struct rte_flow *flow;
3081         int ret;
3082
3083         fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
3084         if (!fdir_flow) {
3085                 rte_errno = ENOMEM;
3086                 return -rte_errno;
3087         }
3088         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
3089         if (ret)
3090                 goto error;
3091         flow = flow_fdir_filter_lookup(dev, fdir_flow);
3092         if (flow) {
3093                 rte_errno = EEXIST;
3094                 goto error;
3095         }
3096         flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
3097                                 fdir_flow->items, fdir_flow->actions, NULL);
3098         if (!flow)
3099                 goto error;
3100         assert(!flow->fdir);
3101         flow->fdir = fdir_flow;
3102         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
3103                 dev->data->port_id, (void *)flow);
3104         return 0;
3105 error:
3106         rte_free(fdir_flow);
3107         return -rte_errno;
3108 }
3109
3110 /**
3111  * Delete specific filter.
3112  *
3113  * @param dev
3114  *   Pointer to Ethernet device.
3115  * @param fdir_filter
3116  *   Filter to be deleted.
3117  *
3118  * @return
3119  *   0 on success, a negative errno value otherwise and rte_errno is set.
3120  */
3121 static int
3122 flow_fdir_filter_delete(struct rte_eth_dev *dev,
3123                         const struct rte_eth_fdir_filter *fdir_filter)
3124 {
3125         struct mlx5_priv *priv = dev->data->dev_private;
3126         struct rte_flow *flow;
3127         struct mlx5_fdir fdir_flow = {
3128                 .attr.group = 0,
3129         };
3130         int ret;
3131
3132         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
3133         if (ret)
3134                 return -rte_errno;
3135         flow = flow_fdir_filter_lookup(dev, &fdir_flow);
3136         if (!flow) {
3137                 rte_errno = ENOENT;
3138                 return -rte_errno;
3139         }
3140         flow_list_destroy(dev, &priv->flows, flow);
3141         DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
3142                 dev->data->port_id, (void *)flow);
3143         return 0;
3144 }
3145
3146 /**
3147  * Update queue for specific filter.
3148  *
3149  * @param dev
3150  *   Pointer to Ethernet device.
3151  * @param fdir_filter
3152  *   Filter to be updated.
3153  *
3154  * @return
3155  *   0 on success, a negative errno value otherwise and rte_errno is set.
3156  */
3157 static int
3158 flow_fdir_filter_update(struct rte_eth_dev *dev,
3159                         const struct rte_eth_fdir_filter *fdir_filter)
3160 {
3161         int ret;
3162
3163         ret = flow_fdir_filter_delete(dev, fdir_filter);
3164         if (ret)
3165                 return ret;
3166         return flow_fdir_filter_add(dev, fdir_filter);
3167 }
3168
3169 /**
3170  * Flush all filters.
3171  *
3172  * @param dev
3173  *   Pointer to Ethernet device.
3174  */
3175 static void
3176 flow_fdir_filter_flush(struct rte_eth_dev *dev)
3177 {
3178         struct mlx5_priv *priv = dev->data->dev_private;
3179
3180         mlx5_flow_list_flush(dev, &priv->flows);
3181 }
3182
3183 /**
3184  * Get flow director information.
3185  *
3186  * @param dev
3187  *   Pointer to Ethernet device.
3188  * @param[out] fdir_info
3189  *   Resulting flow director information.
3190  */
3191 static void
3192 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
3193 {
3194         struct rte_eth_fdir_masks *mask =
3195                 &dev->data->dev_conf.fdir_conf.mask;
3196
3197         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
3198         fdir_info->guarant_spc = 0;
3199         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
3200         fdir_info->max_flexpayload = 0;
3201         fdir_info->flow_types_mask[0] = 0;
3202         fdir_info->flex_payload_unit = 0;
3203         fdir_info->max_flex_payload_segment_num = 0;
3204         fdir_info->flex_payload_limit = 0;
3205         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
3206 }
3207
3208 /**
3209  * Deal with flow director operations.
3210  *
3211  * @param dev
3212  *   Pointer to Ethernet device.
3213  * @param filter_op
3214  *   Operation to perform.
3215  * @param arg
3216  *   Pointer to operation-specific structure.
3217  *
3218  * @return
3219  *   0 on success, a negative errno value otherwise and rte_errno is set.
3220  */
3221 static int
3222 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
3223                     void *arg)
3224 {
3225         enum rte_fdir_mode fdir_mode =
3226                 dev->data->dev_conf.fdir_conf.mode;
3227
3228         if (filter_op == RTE_ETH_FILTER_NOP)
3229                 return 0;
3230         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
3231             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
3232                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
3233                         dev->data->port_id, fdir_mode);
3234                 rte_errno = EINVAL;
3235                 return -rte_errno;
3236         }
3237         switch (filter_op) {
3238         case RTE_ETH_FILTER_ADD:
3239                 return flow_fdir_filter_add(dev, arg);
3240         case RTE_ETH_FILTER_UPDATE:
3241                 return flow_fdir_filter_update(dev, arg);
3242         case RTE_ETH_FILTER_DELETE:
3243                 return flow_fdir_filter_delete(dev, arg);
3244         case RTE_ETH_FILTER_FLUSH:
3245                 flow_fdir_filter_flush(dev);
3246                 break;
3247         case RTE_ETH_FILTER_INFO:
3248                 flow_fdir_info_get(dev, arg);
3249                 break;
3250         default:
3251                 DRV_LOG(DEBUG, "port %u unknown operation %u",
3252                         dev->data->port_id, filter_op);
3253                 rte_errno = EINVAL;
3254                 return -rte_errno;
3255         }
3256         return 0;
3257 }
3258
3259 /**
3260  * Manage filter operations.
3261  *
3262  * @param dev
3263  *   Pointer to Ethernet device structure.
3264  * @param filter_type
3265  *   Filter type.
3266  * @param filter_op
3267  *   Operation to perform.
3268  * @param arg
3269  *   Pointer to operation-specific structure.
3270  *
3271  * @return
3272  *   0 on success, a negative errno value otherwise and rte_errno is set.
3273  */
3274 int
3275 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
3276                      enum rte_filter_type filter_type,
3277                      enum rte_filter_op filter_op,
3278                      void *arg)
3279 {
3280         switch (filter_type) {
3281         case RTE_ETH_FILTER_GENERIC:
3282                 if (filter_op != RTE_ETH_FILTER_GET) {
3283                         rte_errno = EINVAL;
3284                         return -rte_errno;
3285                 }
3286                 *(const void **)arg = &mlx5_flow_ops;
3287                 return 0;
3288         case RTE_ETH_FILTER_FDIR:
3289                 return flow_fdir_ctrl_func(dev, filter_op, arg);
3290         default:
3291                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
3292                         dev->data->port_id, filter_type);
3293                 rte_errno = ENOTSUP;
3294                 return -rte_errno;
3295         }
3296         return 0;
3297 }
3298
3299 #define MLX5_POOL_QUERY_FREQ_US 1000000
3300
3301 /**
3302  * Set the periodic procedure for triggering asynchronous batch queries for all
3303  * the counter pools.
3304  *
3305  * @param[in] sh
3306  *   Pointer to mlx5_ibv_shared object.
3307  */
3308 void
3309 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
3310 {
3311         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
3312         uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
3313         uint32_t us;
3314
3315         cont = MLX5_CNT_CONTAINER(sh, 1, 0);
3316         pools_n += rte_atomic16_read(&cont->n_valid);
3317         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
3318         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us\n", pools_n, us);
3319         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
3320                 sh->cmng.query_thread_on = 0;
3321                 DRV_LOG(ERR, "Cannot reinitialize query alarm\n");
3322         } else {
3323                 sh->cmng.query_thread_on = 1;
3324         }
3325 }
3326
3327 /**
3328  * The periodic procedure for triggering asynchronous batch queries for all the
3329  * counter pools. This function is probably called by the host thread.
3330  *
3331  * @param[in] arg
3332  *   The parameter for the alarm process.
3333  */
3334 void
3335 mlx5_flow_query_alarm(void *arg)
3336 {
3337         struct mlx5_ibv_shared *sh = arg;
3338         struct mlx5_devx_obj *dcs;
3339         uint16_t offset;
3340         int ret;
3341         uint8_t batch = sh->cmng.batch;
3342         uint16_t pool_index = sh->cmng.pool_index;
3343         struct mlx5_pools_container *cont;
3344         struct mlx5_pools_container *mcont;
3345         struct mlx5_flow_counter_pool *pool;
3346
3347         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
3348                 goto set_alarm;
3349 next_container:
3350         cont = MLX5_CNT_CONTAINER(sh, batch, 1);
3351         mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
3352         /* Check if resize was done and need to flip a container. */
3353         if (cont != mcont) {
3354                 if (cont->pools) {
3355                         /* Clean the old container. */
3356                         rte_free(cont->pools);
3357                         memset(cont, 0, sizeof(*cont));
3358                 }
3359                 rte_cio_wmb();
3360                  /* Flip the host container. */
3361                 sh->cmng.mhi[batch] ^= (uint8_t)2;
3362                 cont = mcont;
3363         }
3364         if (!cont->pools) {
3365                 /* 2 empty containers case is unexpected. */
3366                 if (unlikely(batch != sh->cmng.batch))
3367                         goto set_alarm;
3368                 batch ^= 0x1;
3369                 pool_index = 0;
3370                 goto next_container;
3371         }
3372         pool = cont->pools[pool_index];
3373         if (pool->raw_hw)
3374                 /* There is a pool query in progress. */
3375                 goto set_alarm;
3376         pool->raw_hw =
3377                 LIST_FIRST(&sh->cmng.free_stat_raws);
3378         if (!pool->raw_hw)
3379                 /* No free counter statistics raw memory. */
3380                 goto set_alarm;
3381         dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
3382                                                               (&pool->a64_dcs);
3383         offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
3384         ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
3385                                                offset, NULL, NULL,
3386                                                pool->raw_hw->mem_mng->dm->id,
3387                                                (void *)(uintptr_t)
3388                                                (pool->raw_hw->data + offset),
3389                                                sh->devx_comp,
3390                                                (uint64_t)(uintptr_t)pool);
3391         if (ret) {
3392                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
3393                         " %d\n", pool->min_dcs->id);
3394                 pool->raw_hw = NULL;
3395                 goto set_alarm;
3396         }
3397         pool->raw_hw->min_dcs_id = dcs->id;
3398         LIST_REMOVE(pool->raw_hw, next);
3399         sh->cmng.pending_queries++;
3400         pool_index++;
3401         if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
3402                 batch ^= 0x1;
3403                 pool_index = 0;
3404         }
3405 set_alarm:
3406         sh->cmng.batch = batch;
3407         sh->cmng.pool_index = pool_index;
3408         mlx5_set_query_alarm(sh);
3409 }
3410
3411 /**
3412  * Handler for the HW respond about ready values from an asynchronous batch
3413  * query. This function is probably called by the host thread.
3414  *
3415  * @param[in] sh
3416  *   The pointer to the shared IB device context.
3417  * @param[in] async_id
3418  *   The Devx async ID.
3419  * @param[in] status
3420  *   The status of the completion.
3421  */
3422 void
3423 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
3424                                   uint64_t async_id, int status)
3425 {
3426         struct mlx5_flow_counter_pool *pool =
3427                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
3428         struct mlx5_counter_stats_raw *raw_to_free;
3429
3430         if (unlikely(status)) {
3431                 raw_to_free = pool->raw_hw;
3432         } else {
3433                 raw_to_free = pool->raw;
3434                 rte_spinlock_lock(&pool->sl);
3435                 pool->raw = pool->raw_hw;
3436                 rte_spinlock_unlock(&pool->sl);
3437                 rte_atomic64_add(&pool->query_gen, 1);
3438                 /* Be sure the new raw counters data is updated in memory. */
3439                 rte_cio_wmb();
3440         }
3441         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
3442         pool->raw_hw = NULL;
3443         sh->cmng.pending_queries--;
3444 }