drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11
  12 /* Verbs header. */
  13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  14 #ifdef PEDANTIC
  15 #pragma GCC diagnostic ignored "-Wpedantic"
  16 #endif
  17 #include <infiniband/verbs.h>
  18 #ifdef PEDANTIC
  19 #pragma GCC diagnostic error "-Wpedantic"
  20 #endif
  21
  22 #include <rte_common.h>
  23 #include <rte_ether.h>
  24 #include <rte_ethdev_driver.h>
  25 #include <rte_flow.h>
  26 #include <rte_flow_driver.h>
  27 #include <rte_malloc.h>
  28 #include <rte_ip.h>
  29
  30 #include <mlx5_glue.h>
  31 #include <mlx5_devx_cmds.h>
  32 #include <mlx5_prm.h>
  33
  34 #include "mlx5_defs.h"
  35 #include "mlx5.h"
  36 #include "mlx5_flow.h"
  37 #include "mlx5_rxtx.h"
  38
  39 /* Dev ops structure defined in mlx5.c */
  40 extern const struct eth_dev_ops mlx5_dev_ops;
  41 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
  42
  43 /** Device flow drivers. */
  44 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  45 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
  46 #endif
  47 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  48
  49 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  50
  51 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  52         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  53 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  54         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  55 #endif
  56         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  57         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  58 };
  59
  60 enum mlx5_expansion {
  61         MLX5_EXPANSION_ROOT,
  62         MLX5_EXPANSION_ROOT_OUTER,
  63         MLX5_EXPANSION_ROOT_ETH_VLAN,
  64         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
  65         MLX5_EXPANSION_OUTER_ETH,
  66         MLX5_EXPANSION_OUTER_ETH_VLAN,
  67         MLX5_EXPANSION_OUTER_VLAN,
  68         MLX5_EXPANSION_OUTER_IPV4,
  69         MLX5_EXPANSION_OUTER_IPV4_UDP,
  70         MLX5_EXPANSION_OUTER_IPV4_TCP,
  71         MLX5_EXPANSION_OUTER_IPV6,
  72         MLX5_EXPANSION_OUTER_IPV6_UDP,
  73         MLX5_EXPANSION_OUTER_IPV6_TCP,
  74         MLX5_EXPANSION_VXLAN,
  75         MLX5_EXPANSION_VXLAN_GPE,
  76         MLX5_EXPANSION_GRE,
  77         MLX5_EXPANSION_MPLS,
  78         MLX5_EXPANSION_ETH,
  79         MLX5_EXPANSION_ETH_VLAN,
  80         MLX5_EXPANSION_VLAN,
  81         MLX5_EXPANSION_IPV4,
  82         MLX5_EXPANSION_IPV4_UDP,
  83         MLX5_EXPANSION_IPV4_TCP,
  84         MLX5_EXPANSION_IPV6,
  85         MLX5_EXPANSION_IPV6_UDP,
  86         MLX5_EXPANSION_IPV6_TCP,
  87 };
  88
  89 /** Supported expansion of items. */
  90 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
  91         [MLX5_EXPANSION_ROOT] = {
  92                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
  93                                                  MLX5_EXPANSION_IPV4,
  94                                                  MLX5_EXPANSION_IPV6),
  95                 .type = RTE_FLOW_ITEM_TYPE_END,
  96         },
  97         [MLX5_EXPANSION_ROOT_OUTER] = {
  98                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
  99                                                  MLX5_EXPANSION_OUTER_IPV4,
 100                                                  MLX5_EXPANSION_OUTER_IPV6),
 101                 .type = RTE_FLOW_ITEM_TYPE_END,
 102         },
 103         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 104                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 105                 .type = RTE_FLOW_ITEM_TYPE_END,
 106         },
 107         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 108                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
 109                 .type = RTE_FLOW_ITEM_TYPE_END,
 110         },
 111         [MLX5_EXPANSION_OUTER_ETH] = {
 112                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 113                                                  MLX5_EXPANSION_OUTER_IPV6,
 114                                                  MLX5_EXPANSION_MPLS),
 115                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 116                 .rss_types = 0,
 117         },
 118         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 119                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 120                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 121                 .rss_types = 0,
 122         },
 123         [MLX5_EXPANSION_OUTER_VLAN] = {
 124                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 125                                                  MLX5_EXPANSION_OUTER_IPV6),
 126                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 127         },
 128         [MLX5_EXPANSION_OUTER_IPV4] = {
 129                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 130                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 131                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 132                          MLX5_EXPANSION_GRE,
 133                          MLX5_EXPANSION_IPV4,
 134                          MLX5_EXPANSION_IPV6),
 135                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 136                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 137                         ETH_RSS_NONFRAG_IPV4_OTHER,
 138         },
 139         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 140                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 141                                                  MLX5_EXPANSION_VXLAN_GPE),
 142                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 143                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 144         },
 145         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 146                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 147                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 148         },
 149         [MLX5_EXPANSION_OUTER_IPV6] = {
 150                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 151                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 152                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 153                          MLX5_EXPANSION_IPV4,
 154                          MLX5_EXPANSION_IPV6),
 155                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 156                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 157                         ETH_RSS_NONFRAG_IPV6_OTHER,
 158         },
 159         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 160                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 161                                                  MLX5_EXPANSION_VXLAN_GPE),
 162                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 163                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 164         },
 165         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 166                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 167                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 168         },
 169         [MLX5_EXPANSION_VXLAN] = {
 170                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 171                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 172         },
 173         [MLX5_EXPANSION_VXLAN_GPE] = {
 174                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 175                                                  MLX5_EXPANSION_IPV4,
 176                                                  MLX5_EXPANSION_IPV6),
 177                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 178         },
 179         [MLX5_EXPANSION_GRE] = {
 180                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 181                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 182         },
 183         [MLX5_EXPANSION_MPLS] = {
 184                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 185                                                  MLX5_EXPANSION_IPV6),
 186                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 187         },
 188         [MLX5_EXPANSION_ETH] = {
 189                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 190                                                  MLX5_EXPANSION_IPV6),
 191                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 192         },
 193         [MLX5_EXPANSION_ETH_VLAN] = {
 194                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 195                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 196         },
 197         [MLX5_EXPANSION_VLAN] = {
 198                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 199                                                  MLX5_EXPANSION_IPV6),
 200                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 201         },
 202         [MLX5_EXPANSION_IPV4] = {
 203                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 204                                                  MLX5_EXPANSION_IPV4_TCP),
 205                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 206                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 207                         ETH_RSS_NONFRAG_IPV4_OTHER,
 208         },
 209         [MLX5_EXPANSION_IPV4_UDP] = {
 210                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 211                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 212         },
 213         [MLX5_EXPANSION_IPV4_TCP] = {
 214                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 215                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 216         },
 217         [MLX5_EXPANSION_IPV6] = {
 218                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 219                                                  MLX5_EXPANSION_IPV6_TCP),
 220                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 221                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 222                         ETH_RSS_NONFRAG_IPV6_OTHER,
 223         },
 224         [MLX5_EXPANSION_IPV6_UDP] = {
 225                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 226                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 227         },
 228         [MLX5_EXPANSION_IPV6_TCP] = {
 229                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 230                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 231         },
 232 };
 233
 234 static const struct rte_flow_ops mlx5_flow_ops = {
 235         .validate = mlx5_flow_validate,
 236         .create = mlx5_flow_create,
 237         .destroy = mlx5_flow_destroy,
 238         .flush = mlx5_flow_flush,
 239         .isolate = mlx5_flow_isolate,
 240         .query = mlx5_flow_query,
 241         .dev_dump = mlx5_flow_dev_dump,
 242 };
 243
 244 /* Convert FDIR request to Generic flow. */
 245 struct mlx5_fdir {
 246         struct rte_flow_attr attr;
 247         struct rte_flow_item items[4];
 248         struct rte_flow_item_eth l2;
 249         struct rte_flow_item_eth l2_mask;
 250         union {
 251                 struct rte_flow_item_ipv4 ipv4;
 252                 struct rte_flow_item_ipv6 ipv6;
 253         } l3;
 254         union {
 255                 struct rte_flow_item_ipv4 ipv4;
 256                 struct rte_flow_item_ipv6 ipv6;
 257         } l3_mask;
 258         union {
 259                 struct rte_flow_item_udp udp;
 260                 struct rte_flow_item_tcp tcp;
 261         } l4;
 262         union {
 263                 struct rte_flow_item_udp udp;
 264                 struct rte_flow_item_tcp tcp;
 265         } l4_mask;
 266         struct rte_flow_action actions[2];
 267         struct rte_flow_action_queue queue;
 268 };
 269
 270 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
 271 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
 272         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
 273 };
 274
 275 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
 276 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
 277         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
 278         { 9, 10, 11 }, { 12, 13, 14 },
 279 };
 280
 281 /* Tunnel information. */
 282 struct mlx5_flow_tunnel_info {
 283         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 284         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 285 };
 286
 287 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 288         {
 289                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 290                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 291         },
 292         {
 293                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 294                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 295         },
 296         {
 297                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 298                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 299         },
 300         {
 301                 .tunnel = MLX5_FLOW_LAYER_GRE,
 302                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 303         },
 304         {
 305                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 306                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 307         },
 308         {
 309                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 310                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 311         },
 312         {
 313                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 314                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 315         },
 316         {
 317                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 318                 .ptype = RTE_PTYPE_TUNNEL_IP,
 319         },
 320         {
 321                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 322                 .ptype = RTE_PTYPE_TUNNEL_IP,
 323         },
 324         {
 325                 .tunnel = MLX5_FLOW_LAYER_GTP,
 326                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 327         },
 328 };
 329
 330 /**
 331  * Translate tag ID to register.
 332  *
 333  * @param[in] dev
 334  *   Pointer to the Ethernet device structure.
 335  * @param[in] feature
 336  *   The feature that request the register.
 337  * @param[in] id
 338  *   The request register ID.
 339  * @param[out] error
 340  *   Error description in case of any.
 341  *
 342  * @return
 343  *   The request register on success, a negative errno
 344  *   value otherwise and rte_errno is set.
 345  */
 346 int
 347 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 348                      enum mlx5_feature_name feature,
 349                      uint32_t id,
 350                      struct rte_flow_error *error)
 351 {
 352         struct mlx5_priv *priv = dev->data->dev_private;
 353         struct mlx5_dev_config *config = &priv->config;
 354         enum modify_reg start_reg;
 355         bool skip_mtr_reg = false;
 356
 357         switch (feature) {
 358         case MLX5_HAIRPIN_RX:
 359                 return REG_B;
 360         case MLX5_HAIRPIN_TX:
 361                 return REG_A;
 362         case MLX5_METADATA_RX:
 363                 switch (config->dv_xmeta_en) {
 364                 case MLX5_XMETA_MODE_LEGACY:
 365                         return REG_B;
 366                 case MLX5_XMETA_MODE_META16:
 367                         return REG_C_0;
 368                 case MLX5_XMETA_MODE_META32:
 369                         return REG_C_1;
 370                 }
 371                 break;
 372         case MLX5_METADATA_TX:
 373                 return REG_A;
 374         case MLX5_METADATA_FDB:
 375                 switch (config->dv_xmeta_en) {
 376                 case MLX5_XMETA_MODE_LEGACY:
 377                         return REG_NONE;
 378                 case MLX5_XMETA_MODE_META16:
 379                         return REG_C_0;
 380                 case MLX5_XMETA_MODE_META32:
 381                         return REG_C_1;
 382                 }
 383                 break;
 384         case MLX5_FLOW_MARK:
 385                 switch (config->dv_xmeta_en) {
 386                 case MLX5_XMETA_MODE_LEGACY:
 387                         return REG_NONE;
 388                 case MLX5_XMETA_MODE_META16:
 389                         return REG_C_1;
 390                 case MLX5_XMETA_MODE_META32:
 391                         return REG_C_0;
 392                 }
 393                 break;
 394         case MLX5_MTR_SFX:
 395                 /*
 396                  * If meter color and flow match share one register, flow match
 397                  * should use the meter color register for match.
 398                  */
 399                 if (priv->mtr_reg_share)
 400                         return priv->mtr_color_reg;
 401                 else
 402                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 403                                REG_C_3;
 404         case MLX5_MTR_COLOR:
 405                 MLX5_ASSERT(priv->mtr_color_reg != REG_NONE);
 406                 return priv->mtr_color_reg;
 407         case MLX5_COPY_MARK:
 408                 /*
 409                  * Metadata COPY_MARK register using is in meter suffix sub
 410                  * flow while with meter. It's safe to share the same register.
 411                  */
 412                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 413         case MLX5_APP_TAG:
 414                 /*
 415                  * If meter is enable, it will engage the register for color
 416                  * match and flow match. If meter color match is not using the
 417                  * REG_C_2, need to skip the REG_C_x be used by meter color
 418                  * match.
 419                  * If meter is disable, free to use all available registers.
 420                  */
 421                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 422                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 423                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 424                 if (id > (REG_C_7 - start_reg))
 425                         return rte_flow_error_set(error, EINVAL,
 426                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 427                                                   NULL, "invalid tag id");
 428                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NONE)
 429                         return rte_flow_error_set(error, ENOTSUP,
 430                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 431                                                   NULL, "unsupported tag id");
 432                 /*
 433                  * This case means meter is using the REG_C_x great than 2.
 434                  * Take care not to conflict with meter color REG_C_x.
 435                  * If the available index REG_C_y >= REG_C_x, skip the
 436                  * color register.
 437                  */
 438                 if (skip_mtr_reg && config->flow_mreg_c
 439                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 440                         if (config->flow_mreg_c
 441                             [id + 1 + start_reg - REG_C_0] != REG_NONE)
 442                                 return config->flow_mreg_c
 443                                                [id + 1 + start_reg - REG_C_0];
 444                         return rte_flow_error_set(error, ENOTSUP,
 445                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 446                                                   NULL, "unsupported tag id");
 447                 }
 448                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 449         }
 450         MLX5_ASSERT(false);
 451         return rte_flow_error_set(error, EINVAL,
 452                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 453                                   NULL, "invalid feature name");
 454 }
 455
 456 /**
 457  * Check extensive flow metadata register support.
 458  *
 459  * @param dev
 460  *   Pointer to rte_eth_dev structure.
 461  *
 462  * @return
 463  *   True if device supports extensive flow metadata register, otherwise false.
 464  */
 465 bool
 466 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 467 {
 468         struct mlx5_priv *priv = dev->data->dev_private;
 469         struct mlx5_dev_config *config = &priv->config;
 470
 471         /*
 472          * Having available reg_c can be regarded inclusively as supporting
 473          * extensive flow metadata register, which could mean,
 474          * - metadata register copy action by modify header.
 475          * - 16 modify header actions is supported.
 476          * - reg_c's are preserved across different domain (FDB and NIC) on
 477          *   packet loopback by flow lookup miss.
 478          */
 479         return config->flow_mreg_c[2] != REG_NONE;
 480 }
 481
 482 /**
 483  * Discover the maximum number of priority available.
 484  *
 485  * @param[in] dev
 486  *   Pointer to the Ethernet device structure.
 487  *
 488  * @return
 489  *   number of supported flow priority on success, a negative errno
 490  *   value otherwise and rte_errno is set.
 491  */
 492 int
 493 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 494 {
 495         struct mlx5_priv *priv = dev->data->dev_private;
 496         struct {
 497                 struct ibv_flow_attr attr;
 498                 struct ibv_flow_spec_eth eth;
 499                 struct ibv_flow_spec_action_drop drop;
 500         } flow_attr = {
 501                 .attr = {
 502                         .num_of_specs = 2,
 503                         .port = (uint8_t)priv->ibv_port,
 504                 },
 505                 .eth = {
 506                         .type = IBV_FLOW_SPEC_ETH,
 507                         .size = sizeof(struct ibv_flow_spec_eth),
 508                 },
 509                 .drop = {
 510                         .size = sizeof(struct ibv_flow_spec_action_drop),
 511                         .type = IBV_FLOW_SPEC_ACTION_DROP,
 512                 },
 513         };
 514         struct ibv_flow *flow;
 515         struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
 516         uint16_t vprio[] = { 8, 16 };
 517         int i;
 518         int priority = 0;
 519
 520         if (!drop) {
 521                 rte_errno = ENOTSUP;
 522                 return -rte_errno;
 523         }
 524         for (i = 0; i != RTE_DIM(vprio); i++) {
 525                 flow_attr.attr.priority = vprio[i] - 1;
 526                 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
 527                 if (!flow)
 528                         break;
 529                 claim_zero(mlx5_glue->destroy_flow(flow));
 530                 priority = vprio[i];
 531         }
 532         mlx5_hrxq_drop_release(dev);
 533         switch (priority) {
 534         case 8:
 535                 priority = RTE_DIM(priority_map_3);
 536                 break;
 537         case 16:
 538                 priority = RTE_DIM(priority_map_5);
 539                 break;
 540         default:
 541                 rte_errno = ENOTSUP;
 542                 DRV_LOG(ERR,
 543                         "port %u verbs maximum priority: %d expected 8/16",
 544                         dev->data->port_id, priority);
 545                 return -rte_errno;
 546         }
 547         DRV_LOG(INFO, "port %u flow maximum priority: %d",
 548                 dev->data->port_id, priority);
 549         return priority;
 550 }
 551
 552 /**
 553  * Adjust flow priority based on the highest layer and the request priority.
 554  *
 555  * @param[in] dev
 556  *   Pointer to the Ethernet device structure.
 557  * @param[in] priority
 558  *   The rule base priority.
 559  * @param[in] subpriority
 560  *   The priority based on the items.
 561  *
 562  * @return
 563  *   The new priority.
 564  */
 565 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 566                                    uint32_t subpriority)
 567 {
 568         uint32_t res = 0;
 569         struct mlx5_priv *priv = dev->data->dev_private;
 570
 571         switch (priv->config.flow_prio) {
 572         case RTE_DIM(priority_map_3):
 573                 res = priority_map_3[priority][subpriority];
 574                 break;
 575         case RTE_DIM(priority_map_5):
 576                 res = priority_map_5[priority][subpriority];
 577                 break;
 578         }
 579         return  res;
 580 }
 581
 582 /**
 583  * Verify the @p item specifications (spec, last, mask) are compatible with the
 584  * NIC capabilities.
 585  *
 586  * @param[in] item
 587  *   Item specification.
 588  * @param[in] mask
 589  *   @p item->mask or flow default bit-masks.
 590  * @param[in] nic_mask
 591  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 592  * @param[in] size
 593  *   Bit-masks size in bytes.
 594  * @param[out] error
 595  *   Pointer to error structure.
 596  *
 597  * @return
 598  *   0 on success, a negative errno value otherwise and rte_errno is set.
 599  */
 600 int
 601 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 602                           const uint8_t *mask,
 603                           const uint8_t *nic_mask,
 604                           unsigned int size,
 605                           struct rte_flow_error *error)
 606 {
 607         unsigned int i;
 608
 609         MLX5_ASSERT(nic_mask);
 610         for (i = 0; i < size; ++i)
 611                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 612                         return rte_flow_error_set(error, ENOTSUP,
 613                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 614                                                   item,
 615                                                   "mask enables non supported"
 616                                                   " bits");
 617         if (!item->spec && (item->mask || item->last))
 618                 return rte_flow_error_set(error, EINVAL,
 619                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 620                                           "mask/last without a spec is not"
 621                                           " supported");
 622         if (item->spec && item->last) {
 623                 uint8_t spec[size];
 624                 uint8_t last[size];
 625                 unsigned int i;
 626                 int ret;
 627
 628                 for (i = 0; i < size; ++i) {
 629                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 630                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 631                 }
 632                 ret = memcmp(spec, last, size);
 633                 if (ret != 0)
 634                         return rte_flow_error_set(error, EINVAL,
 635                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 636                                                   item,
 637                                                   "range is not valid");
 638         }
 639         return 0;
 640 }
 641
 642 /**
 643  * Adjust the hash fields according to the @p flow information.
 644  *
 645  * @param[in] dev_flow.
 646  *   Pointer to the mlx5_flow.
 647  * @param[in] tunnel
 648  *   1 when the hash field is for a tunnel item.
 649  * @param[in] layer_types
 650  *   ETH_RSS_* types.
 651  * @param[in] hash_fields
 652  *   Item hash fields.
 653  *
 654  * @return
 655  *   The hash fields that should be used.
 656  */
 657 uint64_t
 658 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
 659                             int tunnel __rte_unused, uint64_t layer_types,
 660                             uint64_t hash_fields)
 661 {
 662         struct rte_flow *flow = dev_flow->flow;
 663 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 664         int rss_request_inner = flow->rss.level >= 2;
 665
 666         /* Check RSS hash level for tunnel. */
 667         if (tunnel && rss_request_inner)
 668                 hash_fields |= IBV_RX_HASH_INNER;
 669         else if (tunnel || rss_request_inner)
 670                 return 0;
 671 #endif
 672         /* Check if requested layer matches RSS hash fields. */
 673         if (!(flow->rss.types & layer_types))
 674                 return 0;
 675         return hash_fields;
 676 }
 677
 678 /**
 679  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 680  * if several tunnel rules are used on this queue, the tunnel ptype will be
 681  * cleared.
 682  *
 683  * @param rxq_ctrl
 684  *   Rx queue to update.
 685  */
 686 static void
 687 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 688 {
 689         unsigned int i;
 690         uint32_t tunnel_ptype = 0;
 691
 692         /* Look up for the ptype to use. */
 693         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 694                 if (!rxq_ctrl->flow_tunnels_n[i])
 695                         continue;
 696                 if (!tunnel_ptype) {
 697                         tunnel_ptype = tunnels_info[i].ptype;
 698                 } else {
 699                         tunnel_ptype = 0;
 700                         break;
 701                 }
 702         }
 703         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 704 }
 705
 706 /**
 707  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 708  * flow.
 709  *
 710  * @param[in] dev
 711  *   Pointer to the Ethernet device structure.
 712  * @param[in] dev_flow
 713  *   Pointer to device flow structure.
 714  */
 715 static void
 716 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 717 {
 718         struct mlx5_priv *priv = dev->data->dev_private;
 719         struct rte_flow *flow = dev_flow->flow;
 720         const int mark = !!(dev_flow->actions &
 721                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 722         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 723         unsigned int i;
 724
 725         for (i = 0; i != flow->rss.queue_num; ++i) {
 726                 int idx = (*flow->rss.queue)[i];
 727                 struct mlx5_rxq_ctrl *rxq_ctrl =
 728                         container_of((*priv->rxqs)[idx],
 729                                      struct mlx5_rxq_ctrl, rxq);
 730
 731                 /*
 732                  * To support metadata register copy on Tx loopback,
 733                  * this must be always enabled (metadata may arive
 734                  * from other port - not from local flows only.
 735                  */
 736                 if (priv->config.dv_flow_en &&
 737                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 738                     mlx5_flow_ext_mreg_supported(dev)) {
 739                         rxq_ctrl->rxq.mark = 1;
 740                         rxq_ctrl->flow_mark_n = 1;
 741                 } else if (mark) {
 742                         rxq_ctrl->rxq.mark = 1;
 743                         rxq_ctrl->flow_mark_n++;
 744                 }
 745                 if (tunnel) {
 746                         unsigned int j;
 747
 748                         /* Increase the counter matching the flow. */
 749                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 750                                 if ((tunnels_info[j].tunnel &
 751                                      dev_flow->layers) ==
 752                                     tunnels_info[j].tunnel) {
 753                                         rxq_ctrl->flow_tunnels_n[j]++;
 754                                         break;
 755                                 }
 756                         }
 757                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 758                 }
 759         }
 760 }
 761
 762 /**
 763  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
 764  *
 765  * @param[in] dev
 766  *   Pointer to the Ethernet device structure.
 767  * @param[in] flow
 768  *   Pointer to flow structure.
 769  */
 770 static void
 771 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
 772 {
 773         struct mlx5_flow *dev_flow;
 774
 775         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 776                 flow_drv_rxq_flags_set(dev, dev_flow);
 777 }
 778
 779 /**
 780  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 781  * device flow if no other flow uses it with the same kind of request.
 782  *
 783  * @param dev
 784  *   Pointer to Ethernet device.
 785  * @param[in] dev_flow
 786  *   Pointer to the device flow.
 787  */
 788 static void
 789 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 790 {
 791         struct mlx5_priv *priv = dev->data->dev_private;
 792         struct rte_flow *flow = dev_flow->flow;
 793         const int mark = !!(dev_flow->actions &
 794                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 795         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 796         unsigned int i;
 797
 798         MLX5_ASSERT(dev->data->dev_started);
 799         for (i = 0; i != flow->rss.queue_num; ++i) {
 800                 int idx = (*flow->rss.queue)[i];
 801                 struct mlx5_rxq_ctrl *rxq_ctrl =
 802                         container_of((*priv->rxqs)[idx],
 803                                      struct mlx5_rxq_ctrl, rxq);
 804
 805                 if (priv->config.dv_flow_en &&
 806                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 807                     mlx5_flow_ext_mreg_supported(dev)) {
 808                         rxq_ctrl->rxq.mark = 1;
 809                         rxq_ctrl->flow_mark_n = 1;
 810                 } else if (mark) {
 811                         rxq_ctrl->flow_mark_n--;
 812                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
 813                 }
 814                 if (tunnel) {
 815                         unsigned int j;
 816
 817                         /* Decrease the counter matching the flow. */
 818                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 819                                 if ((tunnels_info[j].tunnel &
 820                                      dev_flow->layers) ==
 821                                     tunnels_info[j].tunnel) {
 822                                         rxq_ctrl->flow_tunnels_n[j]--;
 823                                         break;
 824                                 }
 825                         }
 826                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 827                 }
 828         }
 829 }
 830
 831 /**
 832  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 833  * @p flow if no other flow uses it with the same kind of request.
 834  *
 835  * @param dev
 836  *   Pointer to Ethernet device.
 837  * @param[in] flow
 838  *   Pointer to the flow.
 839  */
 840 static void
 841 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
 842 {
 843         struct mlx5_flow *dev_flow;
 844
 845         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 846                 flow_drv_rxq_flags_trim(dev, dev_flow);
 847 }
 848
 849 /**
 850  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
 851  *
 852  * @param dev
 853  *   Pointer to Ethernet device.
 854  */
 855 static void
 856 flow_rxq_flags_clear(struct rte_eth_dev *dev)
 857 {
 858         struct mlx5_priv *priv = dev->data->dev_private;
 859         unsigned int i;
 860
 861         for (i = 0; i != priv->rxqs_n; ++i) {
 862                 struct mlx5_rxq_ctrl *rxq_ctrl;
 863                 unsigned int j;
 864
 865                 if (!(*priv->rxqs)[i])
 866                         continue;
 867                 rxq_ctrl = container_of((*priv->rxqs)[i],
 868                                         struct mlx5_rxq_ctrl, rxq);
 869                 rxq_ctrl->flow_mark_n = 0;
 870                 rxq_ctrl->rxq.mark = 0;
 871                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
 872                         rxq_ctrl->flow_tunnels_n[j] = 0;
 873                 rxq_ctrl->rxq.tunnel = 0;
 874         }
 875 }
 876
 877 /*
 878  * return a pointer to the desired action in the list of actions.
 879  *
 880  * @param[in] actions
 881  *   The list of actions to search the action in.
 882  * @param[in] action
 883  *   The action to find.
 884  *
 885  * @return
 886  *   Pointer to the action in the list, if found. NULL otherwise.
 887  */
 888 const struct rte_flow_action *
 889 mlx5_flow_find_action(const struct rte_flow_action *actions,
 890                       enum rte_flow_action_type action)
 891 {
 892         if (actions == NULL)
 893                 return NULL;
 894         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
 895                 if (actions->type == action)
 896                         return actions;
 897         return NULL;
 898 }
 899
 900 /*
 901  * Validate the flag action.
 902  *
 903  * @param[in] action_flags
 904  *   Bit-fields that holds the actions detected until now.
 905  * @param[in] attr
 906  *   Attributes of flow that includes this action.
 907  * @param[out] error
 908  *   Pointer to error structure.
 909  *
 910  * @return
 911  *   0 on success, a negative errno value otherwise and rte_errno is set.
 912  */
 913 int
 914 mlx5_flow_validate_action_flag(uint64_t action_flags,
 915                                const struct rte_flow_attr *attr,
 916                                struct rte_flow_error *error)
 917 {
 918         if (action_flags & MLX5_FLOW_ACTION_MARK)
 919                 return rte_flow_error_set(error, EINVAL,
 920                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 921                                           "can't mark and flag in same flow");
 922         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 923                 return rte_flow_error_set(error, EINVAL,
 924                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 925                                           "can't have 2 flag"
 926                                           " actions in same flow");
 927         if (attr->egress)
 928                 return rte_flow_error_set(error, ENOTSUP,
 929                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 930                                           "flag action not supported for "
 931                                           "egress");
 932         return 0;
 933 }
 934
 935 /*
 936  * Validate the mark action.
 937  *
 938  * @param[in] action
 939  *   Pointer to the queue action.
 940  * @param[in] action_flags
 941  *   Bit-fields that holds the actions detected until now.
 942  * @param[in] attr
 943  *   Attributes of flow that includes this action.
 944  * @param[out] error
 945  *   Pointer to error structure.
 946  *
 947  * @return
 948  *   0 on success, a negative errno value otherwise and rte_errno is set.
 949  */
 950 int
 951 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
 952                                uint64_t action_flags,
 953                                const struct rte_flow_attr *attr,
 954                                struct rte_flow_error *error)
 955 {
 956         const struct rte_flow_action_mark *mark = action->conf;
 957
 958         if (!mark)
 959                 return rte_flow_error_set(error, EINVAL,
 960                                           RTE_FLOW_ERROR_TYPE_ACTION,
 961                                           action,
 962                                           "configuration cannot be null");
 963         if (mark->id >= MLX5_FLOW_MARK_MAX)
 964                 return rte_flow_error_set(error, EINVAL,
 965                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 966                                           &mark->id,
 967                                           "mark id must in 0 <= id < "
 968                                           RTE_STR(MLX5_FLOW_MARK_MAX));
 969         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 970                 return rte_flow_error_set(error, EINVAL,
 971                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 972                                           "can't flag and mark in same flow");
 973         if (action_flags & MLX5_FLOW_ACTION_MARK)
 974                 return rte_flow_error_set(error, EINVAL,
 975                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 976                                           "can't have 2 mark actions in same"
 977                                           " flow");
 978         if (attr->egress)
 979                 return rte_flow_error_set(error, ENOTSUP,
 980                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 981                                           "mark action not supported for "
 982                                           "egress");
 983         return 0;
 984 }
 985
 986 /*
 987  * Validate the drop action.
 988  *
 989  * @param[in] action_flags
 990  *   Bit-fields that holds the actions detected until now.
 991  * @param[in] attr
 992  *   Attributes of flow that includes this action.
 993  * @param[out] error
 994  *   Pointer to error structure.
 995  *
 996  * @return
 997  *   0 on success, a negative errno value otherwise and rte_errno is set.
 998  */
 999 int
1000 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1001                                const struct rte_flow_attr *attr,
1002                                struct rte_flow_error *error)
1003 {
1004         if (attr->egress)
1005                 return rte_flow_error_set(error, ENOTSUP,
1006                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1007                                           "drop action not supported for "
1008                                           "egress");
1009         return 0;
1010 }
1011
1012 /*
1013  * Validate the queue action.
1014  *
1015  * @param[in] action
1016  *   Pointer to the queue action.
1017  * @param[in] action_flags
1018  *   Bit-fields that holds the actions detected until now.
1019  * @param[in] dev
1020  *   Pointer to the Ethernet device structure.
1021  * @param[in] attr
1022  *   Attributes of flow that includes this action.
1023  * @param[out] error
1024  *   Pointer to error structure.
1025  *
1026  * @return
1027  *   0 on success, a negative errno value otherwise and rte_errno is set.
1028  */
1029 int
1030 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1031                                 uint64_t action_flags,
1032                                 struct rte_eth_dev *dev,
1033                                 const struct rte_flow_attr *attr,
1034                                 struct rte_flow_error *error)
1035 {
1036         struct mlx5_priv *priv = dev->data->dev_private;
1037         const struct rte_flow_action_queue *queue = action->conf;
1038
1039         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1040                 return rte_flow_error_set(error, EINVAL,
1041                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1042                                           "can't have 2 fate actions in"
1043                                           " same flow");
1044         if (!priv->rxqs_n)
1045                 return rte_flow_error_set(error, EINVAL,
1046                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1047                                           NULL, "No Rx queues configured");
1048         if (queue->index >= priv->rxqs_n)
1049                 return rte_flow_error_set(error, EINVAL,
1050                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1051                                           &queue->index,
1052                                           "queue index out of range");
1053         if (!(*priv->rxqs)[queue->index])
1054                 return rte_flow_error_set(error, EINVAL,
1055                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1056                                           &queue->index,
1057                                           "queue is not configured");
1058         if (attr->egress)
1059                 return rte_flow_error_set(error, ENOTSUP,
1060                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1061                                           "queue action not supported for "
1062                                           "egress");
1063         return 0;
1064 }
1065
1066 /*
1067  * Validate the rss action.
1068  *
1069  * @param[in] action
1070  *   Pointer to the queue action.
1071  * @param[in] action_flags
1072  *   Bit-fields that holds the actions detected until now.
1073  * @param[in] dev
1074  *   Pointer to the Ethernet device structure.
1075  * @param[in] attr
1076  *   Attributes of flow that includes this action.
1077  * @param[in] item_flags
1078  *   Items that were detected.
1079  * @param[out] error
1080  *   Pointer to error structure.
1081  *
1082  * @return
1083  *   0 on success, a negative errno value otherwise and rte_errno is set.
1084  */
1085 int
1086 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1087                               uint64_t action_flags,
1088                               struct rte_eth_dev *dev,
1089                               const struct rte_flow_attr *attr,
1090                               uint64_t item_flags,
1091                               struct rte_flow_error *error)
1092 {
1093         struct mlx5_priv *priv = dev->data->dev_private;
1094         const struct rte_flow_action_rss *rss = action->conf;
1095         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1096         unsigned int i;
1097
1098         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1099                 return rte_flow_error_set(error, EINVAL,
1100                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1101                                           "can't have 2 fate actions"
1102                                           " in same flow");
1103         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1104             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1105                 return rte_flow_error_set(error, ENOTSUP,
1106                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1107                                           &rss->func,
1108                                           "RSS hash function not supported");
1109 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1110         if (rss->level > 2)
1111 #else
1112         if (rss->level > 1)
1113 #endif
1114                 return rte_flow_error_set(error, ENOTSUP,
1115                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1116                                           &rss->level,
1117                                           "tunnel RSS is not supported");
1118         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1119         if (rss->key_len == 0 && rss->key != NULL)
1120                 return rte_flow_error_set(error, ENOTSUP,
1121                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1122                                           &rss->key_len,
1123                                           "RSS hash key length 0");
1124         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1125                 return rte_flow_error_set(error, ENOTSUP,
1126                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1127                                           &rss->key_len,
1128                                           "RSS hash key too small");
1129         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1130                 return rte_flow_error_set(error, ENOTSUP,
1131                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1132                                           &rss->key_len,
1133                                           "RSS hash key too large");
1134         if (rss->queue_num > priv->config.ind_table_max_size)
1135                 return rte_flow_error_set(error, ENOTSUP,
1136                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1137                                           &rss->queue_num,
1138                                           "number of queues too large");
1139         if (rss->types & MLX5_RSS_HF_MASK)
1140                 return rte_flow_error_set(error, ENOTSUP,
1141                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1142                                           &rss->types,
1143                                           "some RSS protocols are not"
1144                                           " supported");
1145         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1146             !(rss->types & ETH_RSS_IP))
1147                 return rte_flow_error_set(error, EINVAL,
1148                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1149                                           "L3 partial RSS requested but L3 RSS"
1150                                           " type not specified");
1151         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1152             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1153                 return rte_flow_error_set(error, EINVAL,
1154                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1155                                           "L4 partial RSS requested but L4 RSS"
1156                                           " type not specified");
1157         if (!priv->rxqs_n)
1158                 return rte_flow_error_set(error, EINVAL,
1159                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1160                                           NULL, "No Rx queues configured");
1161         if (!rss->queue_num)
1162                 return rte_flow_error_set(error, EINVAL,
1163                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1164                                           NULL, "No queues configured");
1165         for (i = 0; i != rss->queue_num; ++i) {
1166                 if (rss->queue[i] >= priv->rxqs_n)
1167                         return rte_flow_error_set
1168                                 (error, EINVAL,
1169                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1170                                  &rss->queue[i], "queue index out of range");
1171                 if (!(*priv->rxqs)[rss->queue[i]])
1172                         return rte_flow_error_set
1173                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1174                                  &rss->queue[i], "queue is not configured");
1175         }
1176         if (attr->egress)
1177                 return rte_flow_error_set(error, ENOTSUP,
1178                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1179                                           "rss action not supported for "
1180                                           "egress");
1181         if (rss->level > 1 &&  !tunnel)
1182                 return rte_flow_error_set(error, EINVAL,
1183                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1184                                           "inner RSS is not supported for "
1185                                           "non-tunnel flows");
1186         return 0;
1187 }
1188
1189 /*
1190  * Validate the count action.
1191  *
1192  * @param[in] dev
1193  *   Pointer to the Ethernet device structure.
1194  * @param[in] attr
1195  *   Attributes of flow that includes this action.
1196  * @param[out] error
1197  *   Pointer to error structure.
1198  *
1199  * @return
1200  *   0 on success, a negative errno value otherwise and rte_errno is set.
1201  */
1202 int
1203 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1204                                 const struct rte_flow_attr *attr,
1205                                 struct rte_flow_error *error)
1206 {
1207         if (attr->egress)
1208                 return rte_flow_error_set(error, ENOTSUP,
1209                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1210                                           "count action not supported for "
1211                                           "egress");
1212         return 0;
1213 }
1214
1215 /**
1216  * Verify the @p attributes will be correctly understood by the NIC and store
1217  * them in the @p flow if everything is correct.
1218  *
1219  * @param[in] dev
1220  *   Pointer to the Ethernet device structure.
1221  * @param[in] attributes
1222  *   Pointer to flow attributes
1223  * @param[out] error
1224  *   Pointer to error structure.
1225  *
1226  * @return
1227  *   0 on success, a negative errno value otherwise and rte_errno is set.
1228  */
1229 int
1230 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1231                               const struct rte_flow_attr *attributes,
1232                               struct rte_flow_error *error)
1233 {
1234         struct mlx5_priv *priv = dev->data->dev_private;
1235         uint32_t priority_max = priv->config.flow_prio - 1;
1236
1237         if (attributes->group)
1238                 return rte_flow_error_set(error, ENOTSUP,
1239                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1240                                           NULL, "groups is not supported");
1241         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1242             attributes->priority >= priority_max)
1243                 return rte_flow_error_set(error, ENOTSUP,
1244                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1245                                           NULL, "priority out of range");
1246         if (attributes->egress)
1247                 return rte_flow_error_set(error, ENOTSUP,
1248                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1249                                           "egress is not supported");
1250         if (attributes->transfer && !priv->config.dv_esw_en)
1251                 return rte_flow_error_set(error, ENOTSUP,
1252                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1253                                           NULL, "transfer is not supported");
1254         if (!attributes->ingress)
1255                 return rte_flow_error_set(error, EINVAL,
1256                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1257                                           NULL,
1258                                           "ingress attribute is mandatory");
1259         return 0;
1260 }
1261
1262 /**
1263  * Validate ICMP6 item.
1264  *
1265  * @param[in] item
1266  *   Item specification.
1267  * @param[in] item_flags
1268  *   Bit-fields that holds the items detected until now.
1269  * @param[out] error
1270  *   Pointer to error structure.
1271  *
1272  * @return
1273  *   0 on success, a negative errno value otherwise and rte_errno is set.
1274  */
1275 int
1276 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1277                                uint64_t item_flags,
1278                                uint8_t target_protocol,
1279                                struct rte_flow_error *error)
1280 {
1281         const struct rte_flow_item_icmp6 *mask = item->mask;
1282         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1283         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1284                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1285         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1286                                       MLX5_FLOW_LAYER_OUTER_L4;
1287         int ret;
1288
1289         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1290                 return rte_flow_error_set(error, EINVAL,
1291                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1292                                           "protocol filtering not compatible"
1293                                           " with ICMP6 layer");
1294         if (!(item_flags & l3m))
1295                 return rte_flow_error_set(error, EINVAL,
1296                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1297                                           "IPv6 is mandatory to filter on"
1298                                           " ICMP6");
1299         if (item_flags & l4m)
1300                 return rte_flow_error_set(error, EINVAL,
1301                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1302                                           "multiple L4 layers not supported");
1303         if (!mask)
1304                 mask = &rte_flow_item_icmp6_mask;
1305         ret = mlx5_flow_item_acceptable
1306                 (item, (const uint8_t *)mask,
1307                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1308                  sizeof(struct rte_flow_item_icmp6), error);
1309         if (ret < 0)
1310                 return ret;
1311         return 0;
1312 }
1313
1314 /**
1315  * Validate ICMP item.
1316  *
1317  * @param[in] item
1318  *   Item specification.
1319  * @param[in] item_flags
1320  *   Bit-fields that holds the items detected until now.
1321  * @param[out] error
1322  *   Pointer to error structure.
1323  *
1324  * @return
1325  *   0 on success, a negative errno value otherwise and rte_errno is set.
1326  */
1327 int
1328 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1329                              uint64_t item_flags,
1330                              uint8_t target_protocol,
1331                              struct rte_flow_error *error)
1332 {
1333         const struct rte_flow_item_icmp *mask = item->mask;
1334         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1335         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1336                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1337         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1338                                       MLX5_FLOW_LAYER_OUTER_L4;
1339         int ret;
1340
1341         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1342                 return rte_flow_error_set(error, EINVAL,
1343                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1344                                           "protocol filtering not compatible"
1345                                           " with ICMP layer");
1346         if (!(item_flags & l3m))
1347                 return rte_flow_error_set(error, EINVAL,
1348                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1349                                           "IPv4 is mandatory to filter"
1350                                           " on ICMP");
1351         if (item_flags & l4m)
1352                 return rte_flow_error_set(error, EINVAL,
1353                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1354                                           "multiple L4 layers not supported");
1355         if (!mask)
1356                 mask = &rte_flow_item_icmp_mask;
1357         ret = mlx5_flow_item_acceptable
1358                 (item, (const uint8_t *)mask,
1359                  (const uint8_t *)&rte_flow_item_icmp_mask,
1360                  sizeof(struct rte_flow_item_icmp), error);
1361         if (ret < 0)
1362                 return ret;
1363         return 0;
1364 }
1365
1366 /**
1367  * Validate Ethernet item.
1368  *
1369  * @param[in] item
1370  *   Item specification.
1371  * @param[in] item_flags
1372  *   Bit-fields that holds the items detected until now.
1373  * @param[out] error
1374  *   Pointer to error structure.
1375  *
1376  * @return
1377  *   0 on success, a negative errno value otherwise and rte_errno is set.
1378  */
1379 int
1380 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1381                             uint64_t item_flags,
1382                             struct rte_flow_error *error)
1383 {
1384         const struct rte_flow_item_eth *mask = item->mask;
1385         const struct rte_flow_item_eth nic_mask = {
1386                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1387                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1388                 .type = RTE_BE16(0xffff),
1389         };
1390         int ret;
1391         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1392         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1393                                        MLX5_FLOW_LAYER_OUTER_L2;
1394
1395         if (item_flags & ethm)
1396                 return rte_flow_error_set(error, ENOTSUP,
1397                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1398                                           "multiple L2 layers not supported");
1399         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1400             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1401                 return rte_flow_error_set(error, EINVAL,
1402                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1403                                           "L2 layer should not follow "
1404                                           "L3 layers");
1405         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1406             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1407                 return rte_flow_error_set(error, EINVAL,
1408                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1409                                           "L2 layer should not follow VLAN");
1410         if (!mask)
1411                 mask = &rte_flow_item_eth_mask;
1412         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1413                                         (const uint8_t *)&nic_mask,
1414                                         sizeof(struct rte_flow_item_eth),
1415                                         error);
1416         return ret;
1417 }
1418
1419 /**
1420  * Validate VLAN item.
1421  *
1422  * @param[in] item
1423  *   Item specification.
1424  * @param[in] item_flags
1425  *   Bit-fields that holds the items detected until now.
1426  * @param[in] dev
1427  *   Ethernet device flow is being created on.
1428  * @param[out] error
1429  *   Pointer to error structure.
1430  *
1431  * @return
1432  *   0 on success, a negative errno value otherwise and rte_errno is set.
1433  */
1434 int
1435 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1436                              uint64_t item_flags,
1437                              struct rte_eth_dev *dev,
1438                              struct rte_flow_error *error)
1439 {
1440         const struct rte_flow_item_vlan *spec = item->spec;
1441         const struct rte_flow_item_vlan *mask = item->mask;
1442         const struct rte_flow_item_vlan nic_mask = {
1443                 .tci = RTE_BE16(UINT16_MAX),
1444                 .inner_type = RTE_BE16(UINT16_MAX),
1445         };
1446         uint16_t vlan_tag = 0;
1447         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1448         int ret;
1449         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1450                                         MLX5_FLOW_LAYER_INNER_L4) :
1451                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1452                                         MLX5_FLOW_LAYER_OUTER_L4);
1453         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1454                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1455
1456         if (item_flags & vlanm)
1457                 return rte_flow_error_set(error, EINVAL,
1458                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1459                                           "multiple VLAN layers not supported");
1460         else if ((item_flags & l34m) != 0)
1461                 return rte_flow_error_set(error, EINVAL,
1462                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1463                                           "VLAN cannot follow L3/L4 layer");
1464         if (!mask)
1465                 mask = &rte_flow_item_vlan_mask;
1466         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1467                                         (const uint8_t *)&nic_mask,
1468                                         sizeof(struct rte_flow_item_vlan),
1469                                         error);
1470         if (ret)
1471                 return ret;
1472         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1473                 struct mlx5_priv *priv = dev->data->dev_private;
1474
1475                 if (priv->vmwa_context) {
1476                         /*
1477                          * Non-NULL context means we have a virtual machine
1478                          * and SR-IOV enabled, we have to create VLAN interface
1479                          * to make hypervisor to setup E-Switch vport
1480                          * context correctly. We avoid creating the multiple
1481                          * VLAN interfaces, so we cannot support VLAN tag mask.
1482                          */
1483                         return rte_flow_error_set(error, EINVAL,
1484                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1485                                                   item,
1486                                                   "VLAN tag mask is not"
1487                                                   " supported in virtual"
1488                                                   " environment");
1489                 }
1490         }
1491         if (spec) {
1492                 vlan_tag = spec->tci;
1493                 vlan_tag &= mask->tci;
1494         }
1495         /*
1496          * From verbs perspective an empty VLAN is equivalent
1497          * to a packet without VLAN layer.
1498          */
1499         if (!vlan_tag)
1500                 return rte_flow_error_set(error, EINVAL,
1501                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1502                                           item->spec,
1503                                           "VLAN cannot be empty");
1504         return 0;
1505 }
1506
1507 /**
1508  * Validate IPV4 item.
1509  *
1510  * @param[in] item
1511  *   Item specification.
1512  * @param[in] item_flags
1513  *   Bit-fields that holds the items detected until now.
1514  * @param[in] acc_mask
1515  *   Acceptable mask, if NULL default internal default mask
1516  *   will be used to check whether item fields are supported.
1517  * @param[out] error
1518  *   Pointer to error structure.
1519  *
1520  * @return
1521  *   0 on success, a negative errno value otherwise and rte_errno is set.
1522  */
1523 int
1524 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1525                              uint64_t item_flags,
1526                              uint64_t last_item,
1527                              uint16_t ether_type,
1528                              const struct rte_flow_item_ipv4 *acc_mask,
1529                              struct rte_flow_error *error)
1530 {
1531         const struct rte_flow_item_ipv4 *mask = item->mask;
1532         const struct rte_flow_item_ipv4 *spec = item->spec;
1533         const struct rte_flow_item_ipv4 nic_mask = {
1534                 .hdr = {
1535                         .src_addr = RTE_BE32(0xffffffff),
1536                         .dst_addr = RTE_BE32(0xffffffff),
1537                         .type_of_service = 0xff,
1538                         .next_proto_id = 0xff,
1539                 },
1540         };
1541         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1542         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1543                                       MLX5_FLOW_LAYER_OUTER_L3;
1544         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1545                                       MLX5_FLOW_LAYER_OUTER_L4;
1546         int ret;
1547         uint8_t next_proto = 0xFF;
1548         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1549                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1550                                   MLX5_FLOW_LAYER_INNER_VLAN);
1551
1552         if ((last_item & l2_vlan) && ether_type &&
1553             ether_type != RTE_ETHER_TYPE_IPV4)
1554                 return rte_flow_error_set(error, EINVAL,
1555                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1556                                           "IPv4 cannot follow L2/VLAN layer "
1557                                           "which ether type is not IPv4");
1558         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1559                 if (mask && spec)
1560                         next_proto = mask->hdr.next_proto_id &
1561                                      spec->hdr.next_proto_id;
1562                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1563                         return rte_flow_error_set(error, EINVAL,
1564                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1565                                                   item,
1566                                                   "multiple tunnel "
1567                                                   "not supported");
1568         }
1569         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1570                 return rte_flow_error_set(error, EINVAL,
1571                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1572                                           "wrong tunnel type - IPv6 specified "
1573                                           "but IPv4 item provided");
1574         if (item_flags & l3m)
1575                 return rte_flow_error_set(error, ENOTSUP,
1576                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1577                                           "multiple L3 layers not supported");
1578         else if (item_flags & l4m)
1579                 return rte_flow_error_set(error, EINVAL,
1580                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1581                                           "L3 cannot follow an L4 layer.");
1582         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1583                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1584                 return rte_flow_error_set(error, EINVAL,
1585                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1586                                           "L3 cannot follow an NVGRE layer.");
1587         if (!mask)
1588                 mask = &rte_flow_item_ipv4_mask;
1589         else if (mask->hdr.next_proto_id != 0 &&
1590                  mask->hdr.next_proto_id != 0xff)
1591                 return rte_flow_error_set(error, EINVAL,
1592                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1593                                           "partial mask is not supported"
1594                                           " for protocol");
1595         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1596                                         acc_mask ? (const uint8_t *)acc_mask
1597                                                  : (const uint8_t *)&nic_mask,
1598                                         sizeof(struct rte_flow_item_ipv4),
1599                                         error);
1600         if (ret < 0)
1601                 return ret;
1602         return 0;
1603 }
1604
1605 /**
1606  * Validate IPV6 item.
1607  *
1608  * @param[in] item
1609  *   Item specification.
1610  * @param[in] item_flags
1611  *   Bit-fields that holds the items detected until now.
1612  * @param[in] acc_mask
1613  *   Acceptable mask, if NULL default internal default mask
1614  *   will be used to check whether item fields are supported.
1615  * @param[out] error
1616  *   Pointer to error structure.
1617  *
1618  * @return
1619  *   0 on success, a negative errno value otherwise and rte_errno is set.
1620  */
1621 int
1622 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1623                              uint64_t item_flags,
1624                              uint64_t last_item,
1625                              uint16_t ether_type,
1626                              const struct rte_flow_item_ipv6 *acc_mask,
1627                              struct rte_flow_error *error)
1628 {
1629         const struct rte_flow_item_ipv6 *mask = item->mask;
1630         const struct rte_flow_item_ipv6 *spec = item->spec;
1631         const struct rte_flow_item_ipv6 nic_mask = {
1632                 .hdr = {
1633                         .src_addr =
1634                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1635                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1636                         .dst_addr =
1637                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1638                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1639                         .vtc_flow = RTE_BE32(0xffffffff),
1640                         .proto = 0xff,
1641                         .hop_limits = 0xff,
1642                 },
1643         };
1644         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1645         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1646                                       MLX5_FLOW_LAYER_OUTER_L3;
1647         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1648                                       MLX5_FLOW_LAYER_OUTER_L4;
1649         int ret;
1650         uint8_t next_proto = 0xFF;
1651         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1652                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1653                                   MLX5_FLOW_LAYER_INNER_VLAN);
1654
1655         if ((last_item & l2_vlan) && ether_type &&
1656             ether_type != RTE_ETHER_TYPE_IPV6)
1657                 return rte_flow_error_set(error, EINVAL,
1658                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1659                                           "IPv6 cannot follow L2/VLAN layer "
1660                                           "which ether type is not IPv6");
1661         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1662                 if (mask && spec)
1663                         next_proto = mask->hdr.proto & spec->hdr.proto;
1664                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1665                         return rte_flow_error_set(error, EINVAL,
1666                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1667                                                   item,
1668                                                   "multiple tunnel "
1669                                                   "not supported");
1670         }
1671         if (item_flags & MLX5_FLOW_LAYER_IPIP)
1672                 return rte_flow_error_set(error, EINVAL,
1673                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1674                                           "wrong tunnel type - IPv4 specified "
1675                                           "but IPv6 item provided");
1676         if (item_flags & l3m)
1677                 return rte_flow_error_set(error, ENOTSUP,
1678                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1679                                           "multiple L3 layers not supported");
1680         else if (item_flags & l4m)
1681                 return rte_flow_error_set(error, EINVAL,
1682                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1683                                           "L3 cannot follow an L4 layer.");
1684         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1685                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1686                 return rte_flow_error_set(error, EINVAL,
1687                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1688                                           "L3 cannot follow an NVGRE layer.");
1689         if (!mask)
1690                 mask = &rte_flow_item_ipv6_mask;
1691         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1692                                         acc_mask ? (const uint8_t *)acc_mask
1693                                                  : (const uint8_t *)&nic_mask,
1694                                         sizeof(struct rte_flow_item_ipv6),
1695                                         error);
1696         if (ret < 0)
1697                 return ret;
1698         return 0;
1699 }
1700
1701 /**
1702  * Validate UDP item.
1703  *
1704  * @param[in] item
1705  *   Item specification.
1706  * @param[in] item_flags
1707  *   Bit-fields that holds the items detected until now.
1708  * @param[in] target_protocol
1709  *   The next protocol in the previous item.
1710  * @param[in] flow_mask
1711  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1712  * @param[out] error
1713  *   Pointer to error structure.
1714  *
1715  * @return
1716  *   0 on success, a negative errno value otherwise and rte_errno is set.
1717  */
1718 int
1719 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1720                             uint64_t item_flags,
1721                             uint8_t target_protocol,
1722                             struct rte_flow_error *error)
1723 {
1724         const struct rte_flow_item_udp *mask = item->mask;
1725         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1726         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1727                                       MLX5_FLOW_LAYER_OUTER_L3;
1728         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1729                                       MLX5_FLOW_LAYER_OUTER_L4;
1730         int ret;
1731
1732         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1733                 return rte_flow_error_set(error, EINVAL,
1734                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1735                                           "protocol filtering not compatible"
1736                                           " with UDP layer");
1737         if (!(item_flags & l3m))
1738                 return rte_flow_error_set(error, EINVAL,
1739                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1740                                           "L3 is mandatory to filter on L4");
1741         if (item_flags & l4m)
1742                 return rte_flow_error_set(error, EINVAL,
1743                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1744                                           "multiple L4 layers not supported");
1745         if (!mask)
1746                 mask = &rte_flow_item_udp_mask;
1747         ret = mlx5_flow_item_acceptable
1748                 (item, (const uint8_t *)mask,
1749                  (const uint8_t *)&rte_flow_item_udp_mask,
1750                  sizeof(struct rte_flow_item_udp), error);
1751         if (ret < 0)
1752                 return ret;
1753         return 0;
1754 }
1755
1756 /**
1757  * Validate TCP item.
1758  *
1759  * @param[in] item
1760  *   Item specification.
1761  * @param[in] item_flags
1762  *   Bit-fields that holds the items detected until now.
1763  * @param[in] target_protocol
1764  *   The next protocol in the previous item.
1765  * @param[out] error
1766  *   Pointer to error structure.
1767  *
1768  * @return
1769  *   0 on success, a negative errno value otherwise and rte_errno is set.
1770  */
1771 int
1772 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1773                             uint64_t item_flags,
1774                             uint8_t target_protocol,
1775                             const struct rte_flow_item_tcp *flow_mask,
1776                             struct rte_flow_error *error)
1777 {
1778         const struct rte_flow_item_tcp *mask = item->mask;
1779         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1780         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1781                                       MLX5_FLOW_LAYER_OUTER_L3;
1782         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1783                                       MLX5_FLOW_LAYER_OUTER_L4;
1784         int ret;
1785
1786         MLX5_ASSERT(flow_mask);
1787         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1788                 return rte_flow_error_set(error, EINVAL,
1789                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1790                                           "protocol filtering not compatible"
1791                                           " with TCP layer");
1792         if (!(item_flags & l3m))
1793                 return rte_flow_error_set(error, EINVAL,
1794                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1795                                           "L3 is mandatory to filter on L4");
1796         if (item_flags & l4m)
1797                 return rte_flow_error_set(error, EINVAL,
1798                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1799                                           "multiple L4 layers not supported");
1800         if (!mask)
1801                 mask = &rte_flow_item_tcp_mask;
1802         ret = mlx5_flow_item_acceptable
1803                 (item, (const uint8_t *)mask,
1804                  (const uint8_t *)flow_mask,
1805                  sizeof(struct rte_flow_item_tcp), error);
1806         if (ret < 0)
1807                 return ret;
1808         return 0;
1809 }
1810
1811 /**
1812  * Validate VXLAN item.
1813  *
1814  * @param[in] item
1815  *   Item specification.
1816  * @param[in] item_flags
1817  *   Bit-fields that holds the items detected until now.
1818  * @param[in] target_protocol
1819  *   The next protocol in the previous item.
1820  * @param[out] error
1821  *   Pointer to error structure.
1822  *
1823  * @return
1824  *   0 on success, a negative errno value otherwise and rte_errno is set.
1825  */
1826 int
1827 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1828                               uint64_t item_flags,
1829                               struct rte_flow_error *error)
1830 {
1831         const struct rte_flow_item_vxlan *spec = item->spec;
1832         const struct rte_flow_item_vxlan *mask = item->mask;
1833         int ret;
1834         union vni {
1835                 uint32_t vlan_id;
1836                 uint8_t vni[4];
1837         } id = { .vlan_id = 0, };
1838         uint32_t vlan_id = 0;
1839
1840
1841         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1842                 return rte_flow_error_set(error, ENOTSUP,
1843                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1844                                           "multiple tunnel layers not"
1845                                           " supported");
1846         /*
1847          * Verify only UDPv4 is present as defined in
1848          * https://tools.ietf.org/html/rfc7348
1849          */
1850         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1851                 return rte_flow_error_set(error, EINVAL,
1852                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1853                                           "no outer UDP layer found");
1854         if (!mask)
1855                 mask = &rte_flow_item_vxlan_mask;
1856         ret = mlx5_flow_item_acceptable
1857                 (item, (const uint8_t *)mask,
1858                  (const uint8_t *)&rte_flow_item_vxlan_mask,
1859                  sizeof(struct rte_flow_item_vxlan),
1860                  error);
1861         if (ret < 0)
1862                 return ret;
1863         if (spec) {
1864                 memcpy(&id.vni[1], spec->vni, 3);
1865                 vlan_id = id.vlan_id;
1866                 memcpy(&id.vni[1], mask->vni, 3);
1867                 vlan_id &= id.vlan_id;
1868         }
1869         /*
1870          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if
1871          * only this layer is defined in the Verbs specification it is
1872          * interpreted as wildcard and all packets will match this
1873          * rule, if it follows a full stack layer (ex: eth / ipv4 /
1874          * udp), all packets matching the layers before will also
1875          * match this rule.  To avoid such situation, VNI 0 is
1876          * currently refused.
1877          */
1878         if (!vlan_id)
1879                 return rte_flow_error_set(error, ENOTSUP,
1880                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1881                                           "VXLAN vni cannot be 0");
1882         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1883                 return rte_flow_error_set(error, ENOTSUP,
1884                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1885                                           "VXLAN tunnel must be fully defined");
1886         return 0;
1887 }
1888
1889 /**
1890  * Validate VXLAN_GPE item.
1891  *
1892  * @param[in] item
1893  *   Item specification.
1894  * @param[in] item_flags
1895  *   Bit-fields that holds the items detected until now.
1896  * @param[in] priv
1897  *   Pointer to the private data structure.
1898  * @param[in] target_protocol
1899  *   The next protocol in the previous item.
1900  * @param[out] error
1901  *   Pointer to error structure.
1902  *
1903  * @return
1904  *   0 on success, a negative errno value otherwise and rte_errno is set.
1905  */
1906 int
1907 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1908                                   uint64_t item_flags,
1909                                   struct rte_eth_dev *dev,
1910                                   struct rte_flow_error *error)
1911 {
1912         struct mlx5_priv *priv = dev->data->dev_private;
1913         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1914         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1915         int ret;
1916         union vni {
1917                 uint32_t vlan_id;
1918                 uint8_t vni[4];
1919         } id = { .vlan_id = 0, };
1920         uint32_t vlan_id = 0;
1921
1922         if (!priv->config.l3_vxlan_en)
1923                 return rte_flow_error_set(error, ENOTSUP,
1924                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1925                                           "L3 VXLAN is not enabled by device"
1926                                           " parameter and/or not configured in"
1927                                           " firmware");
1928         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1929                 return rte_flow_error_set(error, ENOTSUP,
1930                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1931                                           "multiple tunnel layers not"
1932                                           " supported");
1933         /*
1934          * Verify only UDPv4 is present as defined in
1935          * https://tools.ietf.org/html/rfc7348
1936          */
1937         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1938                 return rte_flow_error_set(error, EINVAL,
1939                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1940                                           "no outer UDP layer found");
1941         if (!mask)
1942                 mask = &rte_flow_item_vxlan_gpe_mask;
1943         ret = mlx5_flow_item_acceptable
1944                 (item, (const uint8_t *)mask,
1945                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1946                  sizeof(struct rte_flow_item_vxlan_gpe),
1947                  error);
1948         if (ret < 0)
1949                 return ret;
1950         if (spec) {
1951                 if (spec->protocol)
1952                         return rte_flow_error_set(error, ENOTSUP,
1953                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1954                                                   item,
1955                                                   "VxLAN-GPE protocol"
1956                                                   " not supported");
1957                 memcpy(&id.vni[1], spec->vni, 3);
1958                 vlan_id = id.vlan_id;
1959                 memcpy(&id.vni[1], mask->vni, 3);
1960                 vlan_id &= id.vlan_id;
1961         }
1962         /*
1963          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this
1964          * layer is defined in the Verbs specification it is interpreted as
1965          * wildcard and all packets will match this rule, if it follows a full
1966          * stack layer (ex: eth / ipv4 / udp), all packets matching the layers
1967          * before will also match this rule.  To avoid such situation, VNI 0
1968          * is currently refused.
1969          */
1970         if (!vlan_id)
1971                 return rte_flow_error_set(error, ENOTSUP,
1972                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1973                                           "VXLAN-GPE vni cannot be 0");
1974         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1975                 return rte_flow_error_set(error, ENOTSUP,
1976                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1977                                           "VXLAN-GPE tunnel must be fully"
1978                                           " defined");
1979         return 0;
1980 }
1981 /**
1982  * Validate GRE Key item.
1983  *
1984  * @param[in] item
1985  *   Item specification.
1986  * @param[in] item_flags
1987  *   Bit flags to mark detected items.
1988  * @param[in] gre_item
1989  *   Pointer to gre_item
1990  * @param[out] error
1991  *   Pointer to error structure.
1992  *
1993  * @return
1994  *   0 on success, a negative errno value otherwise and rte_errno is set.
1995  */
1996 int
1997 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1998                                 uint64_t item_flags,
1999                                 const struct rte_flow_item *gre_item,
2000                                 struct rte_flow_error *error)
2001 {
2002         const rte_be32_t *mask = item->mask;
2003         int ret = 0;
2004         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2005         const struct rte_flow_item_gre *gre_spec;
2006         const struct rte_flow_item_gre *gre_mask;
2007
2008         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2009                 return rte_flow_error_set(error, ENOTSUP,
2010                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2011                                           "Multiple GRE key not support");
2012         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2013                 return rte_flow_error_set(error, ENOTSUP,
2014                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2015                                           "No preceding GRE header");
2016         if (item_flags & MLX5_FLOW_LAYER_INNER)
2017                 return rte_flow_error_set(error, ENOTSUP,
2018                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2019                                           "GRE key following a wrong item");
2020         gre_mask = gre_item->mask;
2021         if (!gre_mask)
2022                 gre_mask = &rte_flow_item_gre_mask;
2023         gre_spec = gre_item->spec;
2024         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2025                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2026                 return rte_flow_error_set(error, EINVAL,
2027                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2028                                           "Key bit must be on");
2029
2030         if (!mask)
2031                 mask = &gre_key_default_mask;
2032         ret = mlx5_flow_item_acceptable
2033                 (item, (const uint8_t *)mask,
2034                  (const uint8_t *)&gre_key_default_mask,
2035                  sizeof(rte_be32_t), error);
2036         return ret;
2037 }
2038
2039 /**
2040  * Validate GRE item.
2041  *
2042  * @param[in] item
2043  *   Item specification.
2044  * @param[in] item_flags
2045  *   Bit flags to mark detected items.
2046  * @param[in] target_protocol
2047  *   The next protocol in the previous item.
2048  * @param[out] error
2049  *   Pointer to error structure.
2050  *
2051  * @return
2052  *   0 on success, a negative errno value otherwise and rte_errno is set.
2053  */
2054 int
2055 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2056                             uint64_t item_flags,
2057                             uint8_t target_protocol,
2058                             struct rte_flow_error *error)
2059 {
2060         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2061         const struct rte_flow_item_gre *mask = item->mask;
2062         int ret;
2063         const struct rte_flow_item_gre nic_mask = {
2064                 .c_rsvd0_ver = RTE_BE16(0xB000),
2065                 .protocol = RTE_BE16(UINT16_MAX),
2066         };
2067
2068         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2069                 return rte_flow_error_set(error, EINVAL,
2070                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2071                                           "protocol filtering not compatible"
2072                                           " with this GRE layer");
2073         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2074                 return rte_flow_error_set(error, ENOTSUP,
2075                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2076                                           "multiple tunnel layers not"
2077                                           " supported");
2078         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2079                 return rte_flow_error_set(error, ENOTSUP,
2080                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2081                                           "L3 Layer is missing");
2082         if (!mask)
2083                 mask = &rte_flow_item_gre_mask;
2084         ret = mlx5_flow_item_acceptable
2085                 (item, (const uint8_t *)mask,
2086                  (const uint8_t *)&nic_mask,
2087                  sizeof(struct rte_flow_item_gre), error);
2088         if (ret < 0)
2089                 return ret;
2090 #ifndef HAVE_MLX5DV_DR
2091 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2092         if (spec && (spec->protocol & mask->protocol))
2093                 return rte_flow_error_set(error, ENOTSUP,
2094                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2095                                           "without MPLS support the"
2096                                           " specification cannot be used for"
2097                                           " filtering");
2098 #endif
2099 #endif
2100         return 0;
2101 }
2102
2103 /**
2104  * Validate Geneve item.
2105  *
2106  * @param[in] item
2107  *   Item specification.
2108  * @param[in] itemFlags
2109  *   Bit-fields that holds the items detected until now.
2110  * @param[in] enPriv
2111  *   Pointer to the private data structure.
2112  * @param[out] error
2113  *   Pointer to error structure.
2114  *
2115  * @return
2116  *   0 on success, a negative errno value otherwise and rte_errno is set.
2117  */
2118
2119 int
2120 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2121                                uint64_t item_flags,
2122                                struct rte_eth_dev *dev,
2123                                struct rte_flow_error *error)
2124 {
2125         struct mlx5_priv *priv = dev->data->dev_private;
2126         const struct rte_flow_item_geneve *spec = item->spec;
2127         const struct rte_flow_item_geneve *mask = item->mask;
2128         int ret;
2129         uint16_t gbhdr;
2130         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2131                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2132         const struct rte_flow_item_geneve nic_mask = {
2133                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2134                 .vni = "\xff\xff\xff",
2135                 .protocol = RTE_BE16(UINT16_MAX),
2136         };
2137
2138         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2139                 return rte_flow_error_set(error, ENOTSUP,
2140                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2141                                           "L3 Geneve is not enabled by device"
2142                                           " parameter and/or not configured in"
2143                                           " firmware");
2144         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2145                 return rte_flow_error_set(error, ENOTSUP,
2146                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2147                                           "multiple tunnel layers not"
2148                                           " supported");
2149         /*
2150          * Verify only UDPv4 is present as defined in
2151          * https://tools.ietf.org/html/rfc7348
2152          */
2153         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2154                 return rte_flow_error_set(error, EINVAL,
2155                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2156                                           "no outer UDP layer found");
2157         if (!mask)
2158                 mask = &rte_flow_item_geneve_mask;
2159         ret = mlx5_flow_item_acceptable
2160                                   (item, (const uint8_t *)mask,
2161                                    (const uint8_t *)&nic_mask,
2162                                    sizeof(struct rte_flow_item_geneve), error);
2163         if (ret)
2164                 return ret;
2165         if (spec) {
2166                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2167                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2168                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2169                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2170                         return rte_flow_error_set(error, ENOTSUP,
2171                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2172                                                   item,
2173                                                   "Geneve protocol unsupported"
2174                                                   " fields are being used");
2175                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2176                         return rte_flow_error_set
2177                                         (error, ENOTSUP,
2178                                          RTE_FLOW_ERROR_TYPE_ITEM,
2179                                          item,
2180                                          "Unsupported Geneve options length");
2181         }
2182         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2183                 return rte_flow_error_set
2184                                     (error, ENOTSUP,
2185                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2186                                      "Geneve tunnel must be fully defined");
2187         return 0;
2188 }
2189
2190 /**
2191  * Validate MPLS item.
2192  *
2193  * @param[in] dev
2194  *   Pointer to the rte_eth_dev structure.
2195  * @param[in] item
2196  *   Item specification.
2197  * @param[in] item_flags
2198  *   Bit-fields that holds the items detected until now.
2199  * @param[in] prev_layer
2200  *   The protocol layer indicated in previous item.
2201  * @param[out] error
2202  *   Pointer to error structure.
2203  *
2204  * @return
2205  *   0 on success, a negative errno value otherwise and rte_errno is set.
2206  */
2207 int
2208 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2209                              const struct rte_flow_item *item __rte_unused,
2210                              uint64_t item_flags __rte_unused,
2211                              uint64_t prev_layer __rte_unused,
2212                              struct rte_flow_error *error)
2213 {
2214 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2215         const struct rte_flow_item_mpls *mask = item->mask;
2216         struct mlx5_priv *priv = dev->data->dev_private;
2217         int ret;
2218
2219         if (!priv->config.mpls_en)
2220                 return rte_flow_error_set(error, ENOTSUP,
2221                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2222                                           "MPLS not supported or"
2223                                           " disabled in firmware"
2224                                           " configuration.");
2225         /* MPLS over IP, UDP, GRE is allowed */
2226         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2227                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2228                             MLX5_FLOW_LAYER_GRE)))
2229                 return rte_flow_error_set(error, EINVAL,
2230                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2231                                           "protocol filtering not compatible"
2232                                           " with MPLS layer");
2233         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2234         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2235             !(item_flags & MLX5_FLOW_LAYER_GRE))
2236                 return rte_flow_error_set(error, ENOTSUP,
2237                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2238                                           "multiple tunnel layers not"
2239                                           " supported");
2240         if (!mask)
2241                 mask = &rte_flow_item_mpls_mask;
2242         ret = mlx5_flow_item_acceptable
2243                 (item, (const uint8_t *)mask,
2244                  (const uint8_t *)&rte_flow_item_mpls_mask,
2245                  sizeof(struct rte_flow_item_mpls), error);
2246         if (ret < 0)
2247                 return ret;
2248         return 0;
2249 #endif
2250         return rte_flow_error_set(error, ENOTSUP,
2251                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2252                                   "MPLS is not supported by Verbs, please"
2253                                   " update.");
2254 }
2255
2256 /**
2257  * Validate NVGRE item.
2258  *
2259  * @param[in] item
2260  *   Item specification.
2261  * @param[in] item_flags
2262  *   Bit flags to mark detected items.
2263  * @param[in] target_protocol
2264  *   The next protocol in the previous item.
2265  * @param[out] error
2266  *   Pointer to error structure.
2267  *
2268  * @return
2269  *   0 on success, a negative errno value otherwise and rte_errno is set.
2270  */
2271 int
2272 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2273                               uint64_t item_flags,
2274                               uint8_t target_protocol,
2275                               struct rte_flow_error *error)
2276 {
2277         const struct rte_flow_item_nvgre *mask = item->mask;
2278         int ret;
2279
2280         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2281                 return rte_flow_error_set(error, EINVAL,
2282                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2283                                           "protocol filtering not compatible"
2284                                           " with this GRE layer");
2285         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2286                 return rte_flow_error_set(error, ENOTSUP,
2287                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2288                                           "multiple tunnel layers not"
2289                                           " supported");
2290         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2291                 return rte_flow_error_set(error, ENOTSUP,
2292                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2293                                           "L3 Layer is missing");
2294         if (!mask)
2295                 mask = &rte_flow_item_nvgre_mask;
2296         ret = mlx5_flow_item_acceptable
2297                 (item, (const uint8_t *)mask,
2298                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2299                  sizeof(struct rte_flow_item_nvgre), error);
2300         if (ret < 0)
2301                 return ret;
2302         return 0;
2303 }
2304
2305 /* Allocate unique ID for the split Q/RSS subflows. */
2306 static uint32_t
2307 flow_qrss_get_id(struct rte_eth_dev *dev)
2308 {
2309         struct mlx5_priv *priv = dev->data->dev_private;
2310         uint32_t qrss_id, ret;
2311
2312         ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2313         if (ret)
2314                 return 0;
2315         MLX5_ASSERT(qrss_id);
2316         return qrss_id;
2317 }
2318
2319 /* Free unique ID for the split Q/RSS subflows. */
2320 static void
2321 flow_qrss_free_id(struct rte_eth_dev *dev,  uint32_t qrss_id)
2322 {
2323         struct mlx5_priv *priv = dev->data->dev_private;
2324
2325         if (qrss_id)
2326                 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2327 }
2328
2329 /**
2330  * Release resource related QUEUE/RSS action split.
2331  *
2332  * @param dev
2333  *   Pointer to Ethernet device.
2334  * @param flow
2335  *   Flow to release id's from.
2336  */
2337 static void
2338 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2339                              struct rte_flow *flow)
2340 {
2341         struct mlx5_flow *dev_flow;
2342
2343         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
2344                 if (dev_flow->qrss_id)
2345                         flow_qrss_free_id(dev, dev_flow->qrss_id);
2346 }
2347
2348 static int
2349 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2350                    const struct rte_flow_attr *attr __rte_unused,
2351                    const struct rte_flow_item items[] __rte_unused,
2352                    const struct rte_flow_action actions[] __rte_unused,
2353                    bool external __rte_unused,
2354                    struct rte_flow_error *error)
2355 {
2356         return rte_flow_error_set(error, ENOTSUP,
2357                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2358 }
2359
2360 static struct mlx5_flow *
2361 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
2362                   const struct rte_flow_item items[] __rte_unused,
2363                   const struct rte_flow_action actions[] __rte_unused,
2364                   struct rte_flow_error *error)
2365 {
2366         rte_flow_error_set(error, ENOTSUP,
2367                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2368         return NULL;
2369 }
2370
2371 static int
2372 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2373                     struct mlx5_flow *dev_flow __rte_unused,
2374                     const struct rte_flow_attr *attr __rte_unused,
2375                     const struct rte_flow_item items[] __rte_unused,
2376                     const struct rte_flow_action actions[] __rte_unused,
2377                     struct rte_flow_error *error)
2378 {
2379         return rte_flow_error_set(error, ENOTSUP,
2380                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2381 }
2382
2383 static int
2384 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2385                 struct rte_flow *flow __rte_unused,
2386                 struct rte_flow_error *error)
2387 {
2388         return rte_flow_error_set(error, ENOTSUP,
2389                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2390 }
2391
2392 static void
2393 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2394                  struct rte_flow *flow __rte_unused)
2395 {
2396 }
2397
2398 static void
2399 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2400                   struct rte_flow *flow __rte_unused)
2401 {
2402 }
2403
2404 static int
2405 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2406                 struct rte_flow *flow __rte_unused,
2407                 const struct rte_flow_action *actions __rte_unused,
2408                 void *data __rte_unused,
2409                 struct rte_flow_error *error)
2410 {
2411         return rte_flow_error_set(error, ENOTSUP,
2412                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2413 }
2414
2415 /* Void driver to protect from null pointer reference. */
2416 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2417         .validate = flow_null_validate,
2418         .prepare = flow_null_prepare,
2419         .translate = flow_null_translate,
2420         .apply = flow_null_apply,
2421         .remove = flow_null_remove,
2422         .destroy = flow_null_destroy,
2423         .query = flow_null_query,
2424 };
2425
2426 /**
2427  * Select flow driver type according to flow attributes and device
2428  * configuration.
2429  *
2430  * @param[in] dev
2431  *   Pointer to the dev structure.
2432  * @param[in] attr
2433  *   Pointer to the flow attributes.
2434  *
2435  * @return
2436  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2437  */
2438 static enum mlx5_flow_drv_type
2439 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2440 {
2441         struct mlx5_priv *priv = dev->data->dev_private;
2442         enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2443
2444         if (attr->transfer && priv->config.dv_esw_en)
2445                 type = MLX5_FLOW_TYPE_DV;
2446         if (!attr->transfer)
2447                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2448                                                  MLX5_FLOW_TYPE_VERBS;
2449         return type;
2450 }
2451
2452 #define flow_get_drv_ops(type) flow_drv_ops[type]
2453
2454 /**
2455  * Flow driver validation API. This abstracts calling driver specific functions.
2456  * The type of flow driver is determined according to flow attributes.
2457  *
2458  * @param[in] dev
2459  *   Pointer to the dev structure.
2460  * @param[in] attr
2461  *   Pointer to the flow attributes.
2462  * @param[in] items
2463  *   Pointer to the list of items.
2464  * @param[in] actions
2465  *   Pointer to the list of actions.
2466  * @param[in] external
2467  *   This flow rule is created by request external to PMD.
2468  * @param[out] error
2469  *   Pointer to the error structure.
2470  *
2471  * @return
2472  *   0 on success, a negative errno value otherwise and rte_errno is set.
2473  */
2474 static inline int
2475 flow_drv_validate(struct rte_eth_dev *dev,
2476                   const struct rte_flow_attr *attr,
2477                   const struct rte_flow_item items[],
2478                   const struct rte_flow_action actions[],
2479                   bool external, struct rte_flow_error *error)
2480 {
2481         const struct mlx5_flow_driver_ops *fops;
2482         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2483
2484         fops = flow_get_drv_ops(type);
2485         return fops->validate(dev, attr, items, actions, external, error);
2486 }
2487
2488 /**
2489  * Flow driver preparation API. This abstracts calling driver specific
2490  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2491  * calculates the size of memory required for device flow, allocates the memory,
2492  * initializes the device flow and returns the pointer.
2493  *
2494  * @note
2495  *   This function initializes device flow structure such as dv or verbs in
2496  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
2497  *   rest. For example, adding returning device flow to flow->dev_flow list and
2498  *   setting backward reference to the flow should be done out of this function.
2499  *   layers field is not filled either.
2500  *
2501  * @param[in] attr
2502  *   Pointer to the flow attributes.
2503  * @param[in] items
2504  *   Pointer to the list of items.
2505  * @param[in] actions
2506  *   Pointer to the list of actions.
2507  * @param[out] error
2508  *   Pointer to the error structure.
2509  *
2510  * @return
2511  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
2512  */
2513 static inline struct mlx5_flow *
2514 flow_drv_prepare(const struct rte_flow *flow,
2515                  const struct rte_flow_attr *attr,
2516                  const struct rte_flow_item items[],
2517                  const struct rte_flow_action actions[],
2518                  struct rte_flow_error *error)
2519 {
2520         const struct mlx5_flow_driver_ops *fops;
2521         enum mlx5_flow_drv_type type = flow->drv_type;
2522
2523         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2524         fops = flow_get_drv_ops(type);
2525         return fops->prepare(attr, items, actions, error);
2526 }
2527
2528 /**
2529  * Flow driver translation API. This abstracts calling driver specific
2530  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2531  * translates a generic flow into a driver flow. flow_drv_prepare() must
2532  * precede.
2533  *
2534  * @note
2535  *   dev_flow->layers could be filled as a result of parsing during translation
2536  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2537  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2538  *   flow->actions could be overwritten even though all the expanded dev_flows
2539  *   have the same actions.
2540  *
2541  * @param[in] dev
2542  *   Pointer to the rte dev structure.
2543  * @param[in, out] dev_flow
2544  *   Pointer to the mlx5 flow.
2545  * @param[in] attr
2546  *   Pointer to the flow attributes.
2547  * @param[in] items
2548  *   Pointer to the list of items.
2549  * @param[in] actions
2550  *   Pointer to the list of actions.
2551  * @param[out] error
2552  *   Pointer to the error structure.
2553  *
2554  * @return
2555  *   0 on success, a negative errno value otherwise and rte_errno is set.
2556  */
2557 static inline int
2558 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2559                    const struct rte_flow_attr *attr,
2560                    const struct rte_flow_item items[],
2561                    const struct rte_flow_action actions[],
2562                    struct rte_flow_error *error)
2563 {
2564         const struct mlx5_flow_driver_ops *fops;
2565         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2566
2567         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2568         fops = flow_get_drv_ops(type);
2569         return fops->translate(dev, dev_flow, attr, items, actions, error);
2570 }
2571
2572 /**
2573  * Flow driver apply API. This abstracts calling driver specific functions.
2574  * Parent flow (rte_flow) should have driver type (drv_type). It applies
2575  * translated driver flows on to device. flow_drv_translate() must precede.
2576  *
2577  * @param[in] dev
2578  *   Pointer to Ethernet device structure.
2579  * @param[in, out] flow
2580  *   Pointer to flow structure.
2581  * @param[out] error
2582  *   Pointer to error structure.
2583  *
2584  * @return
2585  *   0 on success, a negative errno value otherwise and rte_errno is set.
2586  */
2587 static inline int
2588 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2589                struct rte_flow_error *error)
2590 {
2591         const struct mlx5_flow_driver_ops *fops;
2592         enum mlx5_flow_drv_type type = flow->drv_type;
2593
2594         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2595         fops = flow_get_drv_ops(type);
2596         return fops->apply(dev, flow, error);
2597 }
2598
2599 /**
2600  * Flow driver remove API. This abstracts calling driver specific functions.
2601  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2602  * on device. All the resources of the flow should be freed by calling
2603  * flow_drv_destroy().
2604  *
2605  * @param[in] dev
2606  *   Pointer to Ethernet device.
2607  * @param[in, out] flow
2608  *   Pointer to flow structure.
2609  */
2610 static inline void
2611 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2612 {
2613         const struct mlx5_flow_driver_ops *fops;
2614         enum mlx5_flow_drv_type type = flow->drv_type;
2615
2616         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2617         fops = flow_get_drv_ops(type);
2618         fops->remove(dev, flow);
2619 }
2620
2621 /**
2622  * Flow driver destroy API. This abstracts calling driver specific functions.
2623  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2624  * on device and releases resources of the flow.
2625  *
2626  * @param[in] dev
2627  *   Pointer to Ethernet device.
2628  * @param[in, out] flow
2629  *   Pointer to flow structure.
2630  */
2631 static inline void
2632 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2633 {
2634         const struct mlx5_flow_driver_ops *fops;
2635         enum mlx5_flow_drv_type type = flow->drv_type;
2636
2637         flow_mreg_split_qrss_release(dev, flow);
2638         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2639         fops = flow_get_drv_ops(type);
2640         fops->destroy(dev, flow);
2641 }
2642
2643 /**
2644  * Validate a flow supported by the NIC.
2645  *
2646  * @see rte_flow_validate()
2647  * @see rte_flow_ops
2648  */
2649 int
2650 mlx5_flow_validate(struct rte_eth_dev *dev,
2651                    const struct rte_flow_attr *attr,
2652                    const struct rte_flow_item items[],
2653                    const struct rte_flow_action actions[],
2654                    struct rte_flow_error *error)
2655 {
2656         int ret;
2657
2658         ret = flow_drv_validate(dev, attr, items, actions, true, error);
2659         if (ret < 0)
2660                 return ret;
2661         return 0;
2662 }
2663
2664 /**
2665  * Get port id item from the item list.
2666  *
2667  * @param[in] item
2668  *   Pointer to the list of items.
2669  *
2670  * @return
2671  *   Pointer to the port id item if exist, else return NULL.
2672  */
2673 static const struct rte_flow_item *
2674 find_port_id_item(const struct rte_flow_item *item)
2675 {
2676         MLX5_ASSERT(item);
2677         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2678                 if (item->type == RTE_FLOW_ITEM_TYPE_PORT_ID)
2679                         return item;
2680         }
2681         return NULL;
2682 }
2683
2684 /**
2685  * Get RSS action from the action list.
2686  *
2687  * @param[in] actions
2688  *   Pointer to the list of actions.
2689  *
2690  * @return
2691  *   Pointer to the RSS action if exist, else return NULL.
2692  */
2693 static const struct rte_flow_action_rss*
2694 flow_get_rss_action(const struct rte_flow_action actions[])
2695 {
2696         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2697                 switch (actions->type) {
2698                 case RTE_FLOW_ACTION_TYPE_RSS:
2699                         return (const struct rte_flow_action_rss *)
2700                                actions->conf;
2701                 default:
2702                         break;
2703                 }
2704         }
2705         return NULL;
2706 }
2707
2708 static unsigned int
2709 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2710 {
2711         const struct rte_flow_item *item;
2712         unsigned int has_vlan = 0;
2713
2714         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2715                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2716                         has_vlan = 1;
2717                         break;
2718                 }
2719         }
2720         if (has_vlan)
2721                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2722                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2723         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2724                                MLX5_EXPANSION_ROOT_OUTER;
2725 }
2726
2727 /**
2728  * Get QUEUE/RSS action from the action list.
2729  *
2730  * @param[in] actions
2731  *   Pointer to the list of actions.
2732  * @param[out] qrss
2733  *   Pointer to the return pointer.
2734  * @param[out] qrss_type
2735  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
2736  *   if no QUEUE/RSS is found.
2737  *
2738  * @return
2739  *   Total number of actions.
2740  */
2741 static int
2742 flow_parse_qrss_action(const struct rte_flow_action actions[],
2743                        const struct rte_flow_action **qrss)
2744 {
2745         int actions_n = 0;
2746
2747         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2748                 switch (actions->type) {
2749                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2750                 case RTE_FLOW_ACTION_TYPE_RSS:
2751                         *qrss = actions;
2752                         break;
2753                 default:
2754                         break;
2755                 }
2756                 actions_n++;
2757         }
2758         /* Count RTE_FLOW_ACTION_TYPE_END. */
2759         return actions_n + 1;
2760 }
2761
2762 /**
2763  * Check meter action from the action list.
2764  *
2765  * @param[in] actions
2766  *   Pointer to the list of actions.
2767  * @param[out] mtr
2768  *   Pointer to the meter exist flag.
2769  *
2770  * @return
2771  *   Total number of actions.
2772  */
2773 static int
2774 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
2775 {
2776         int actions_n = 0;
2777
2778         MLX5_ASSERT(mtr);
2779         *mtr = 0;
2780         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2781                 switch (actions->type) {
2782                 case RTE_FLOW_ACTION_TYPE_METER:
2783                         *mtr = 1;
2784                         break;
2785                 default:
2786                         break;
2787                 }
2788                 actions_n++;
2789         }
2790         /* Count RTE_FLOW_ACTION_TYPE_END. */
2791         return actions_n + 1;
2792 }
2793
2794 /**
2795  * Check if the flow should be splited due to hairpin.
2796  * The reason for the split is that in current HW we can't
2797  * support encap on Rx, so if a flow have encap we move it
2798  * to Tx.
2799  *
2800  * @param dev
2801  *   Pointer to Ethernet device.
2802  * @param[in] attr
2803  *   Flow rule attributes.
2804  * @param[in] actions
2805  *   Associated actions (list terminated by the END action).
2806  *
2807  * @return
2808  *   > 0 the number of actions and the flow should be split,
2809  *   0 when no split required.
2810  */
2811 static int
2812 flow_check_hairpin_split(struct rte_eth_dev *dev,
2813                          const struct rte_flow_attr *attr,
2814                          const struct rte_flow_action actions[])
2815 {
2816         int queue_action = 0;
2817         int action_n = 0;
2818         int encap = 0;
2819         const struct rte_flow_action_queue *queue;
2820         const struct rte_flow_action_rss *rss;
2821         const struct rte_flow_action_raw_encap *raw_encap;
2822
2823         if (!attr->ingress)
2824                 return 0;
2825         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2826                 switch (actions->type) {
2827                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2828                         queue = actions->conf;
2829                         if (queue == NULL)
2830                                 return 0;
2831                         if (mlx5_rxq_get_type(dev, queue->index) !=
2832                             MLX5_RXQ_TYPE_HAIRPIN)
2833                                 return 0;
2834                         queue_action = 1;
2835                         action_n++;
2836                         break;
2837                 case RTE_FLOW_ACTION_TYPE_RSS:
2838                         rss = actions->conf;
2839                         if (rss == NULL || rss->queue_num == 0)
2840                                 return 0;
2841                         if (mlx5_rxq_get_type(dev, rss->queue[0]) !=
2842                             MLX5_RXQ_TYPE_HAIRPIN)
2843                                 return 0;
2844                         queue_action = 1;
2845                         action_n++;
2846                         break;
2847                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2848                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2849                         encap = 1;
2850                         action_n++;
2851                         break;
2852                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2853                         raw_encap = actions->conf;
2854                         if (raw_encap->size >
2855                             (sizeof(struct rte_flow_item_eth) +
2856                              sizeof(struct rte_flow_item_ipv4)))
2857                                 encap = 1;
2858                         action_n++;
2859                         break;
2860                 default:
2861                         action_n++;
2862                         break;
2863                 }
2864         }
2865         if (encap == 1 && queue_action)
2866                 return action_n;
2867         return 0;
2868 }
2869
2870 /* Declare flow create/destroy prototype in advance. */
2871 static struct rte_flow *
2872 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2873                  const struct rte_flow_attr *attr,
2874                  const struct rte_flow_item items[],
2875                  const struct rte_flow_action actions[],
2876                  bool external, struct rte_flow_error *error);
2877
2878 static void
2879 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2880                   struct rte_flow *flow);
2881
2882 /**
2883  * Add a flow of copying flow metadata registers in RX_CP_TBL.
2884  *
2885  * As mark_id is unique, if there's already a registered flow for the mark_id,
2886  * return by increasing the reference counter of the resource. Otherwise, create
2887  * the resource (mcp_res) and flow.
2888  *
2889  * Flow looks like,
2890  *   - If ingress port is ANY and reg_c[1] is mark_id,
2891  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
2892  *
2893  * For default flow (zero mark_id), flow is like,
2894  *   - If ingress port is ANY,
2895  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
2896  *
2897  * @param dev
2898  *   Pointer to Ethernet device.
2899  * @param mark_id
2900  *   ID of MARK action, zero means default flow for META.
2901  * @param[out] error
2902  *   Perform verbose error reporting if not NULL.
2903  *
2904  * @return
2905  *   Associated resource on success, NULL otherwise and rte_errno is set.
2906  */
2907 static struct mlx5_flow_mreg_copy_resource *
2908 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
2909                           struct rte_flow_error *error)
2910 {
2911         struct mlx5_priv *priv = dev->data->dev_private;
2912         struct rte_flow_attr attr = {
2913                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
2914                 .ingress = 1,
2915         };
2916         struct mlx5_rte_flow_item_tag tag_spec = {
2917                 .data = mark_id,
2918         };
2919         struct rte_flow_item items[] = {
2920                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
2921         };
2922         struct rte_flow_action_mark ftag = {
2923                 .id = mark_id,
2924         };
2925         struct mlx5_flow_action_copy_mreg cp_mreg = {
2926                 .dst = REG_B,
2927                 .src = 0,
2928         };
2929         struct rte_flow_action_jump jump = {
2930                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
2931         };
2932         struct rte_flow_action actions[] = {
2933                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
2934         };
2935         struct mlx5_flow_mreg_copy_resource *mcp_res;
2936         int ret;
2937
2938         /* Fill the register fileds in the flow. */
2939         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2940         if (ret < 0)
2941                 return NULL;
2942         tag_spec.id = ret;
2943         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
2944         if (ret < 0)
2945                 return NULL;
2946         cp_mreg.src = ret;
2947         /* Check if already registered. */
2948         MLX5_ASSERT(priv->mreg_cp_tbl);
2949         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id);
2950         if (mcp_res) {
2951                 /* For non-default rule. */
2952                 if (mark_id != MLX5_DEFAULT_COPY_ID)
2953                         mcp_res->refcnt++;
2954                 MLX5_ASSERT(mark_id != MLX5_DEFAULT_COPY_ID ||
2955                             mcp_res->refcnt == 1);
2956                 return mcp_res;
2957         }
2958         /* Provide the full width of FLAG specific value. */
2959         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
2960                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
2961         /* Build a new flow. */
2962         if (mark_id != MLX5_DEFAULT_COPY_ID) {
2963                 items[0] = (struct rte_flow_item){
2964                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
2965                         .spec = &tag_spec,
2966                 };
2967                 items[1] = (struct rte_flow_item){
2968                         .type = RTE_FLOW_ITEM_TYPE_END,
2969                 };
2970                 actions[0] = (struct rte_flow_action){
2971                         .type = MLX5_RTE_FLOW_ACTION_TYPE_MARK,
2972                         .conf = &ftag,
2973                 };
2974                 actions[1] = (struct rte_flow_action){
2975                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
2976                         .conf = &cp_mreg,
2977                 };
2978                 actions[2] = (struct rte_flow_action){
2979                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
2980                         .conf = &jump,
2981                 };
2982                 actions[3] = (struct rte_flow_action){
2983                         .type = RTE_FLOW_ACTION_TYPE_END,
2984                 };
2985         } else {
2986                 /* Default rule, wildcard match. */
2987                 attr.priority = MLX5_FLOW_PRIO_RSVD;
2988                 items[0] = (struct rte_flow_item){
2989                         .type = RTE_FLOW_ITEM_TYPE_END,
2990                 };
2991                 actions[0] = (struct rte_flow_action){
2992                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
2993                         .conf = &cp_mreg,
2994                 };
2995                 actions[1] = (struct rte_flow_action){
2996                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
2997                         .conf = &jump,
2998                 };
2999                 actions[2] = (struct rte_flow_action){
3000                         .type = RTE_FLOW_ACTION_TYPE_END,
3001                 };
3002         }
3003         /* Build a new entry. */
3004         mcp_res = rte_zmalloc(__func__, sizeof(*mcp_res), 0);
3005         if (!mcp_res) {
3006                 rte_errno = ENOMEM;
3007                 return NULL;
3008         }
3009         /*
3010          * The copy Flows are not included in any list. There
3011          * ones are referenced from other Flows and can not
3012          * be applied, removed, deleted in ardbitrary order
3013          * by list traversing.
3014          */
3015         mcp_res->flow = flow_list_create(dev, NULL, &attr, items,
3016                                          actions, false, error);
3017         if (!mcp_res->flow)
3018                 goto error;
3019         mcp_res->refcnt++;
3020         mcp_res->hlist_ent.key = mark_id;
3021         ret = mlx5_hlist_insert(priv->mreg_cp_tbl,
3022                                 &mcp_res->hlist_ent);
3023         MLX5_ASSERT(!ret);
3024         if (ret)
3025                 goto error;
3026         return mcp_res;
3027 error:
3028         if (mcp_res->flow)
3029                 flow_list_destroy(dev, NULL, mcp_res->flow);
3030         rte_free(mcp_res);
3031         return NULL;
3032 }
3033
3034 /**
3035  * Release flow in RX_CP_TBL.
3036  *
3037  * @param dev
3038  *   Pointer to Ethernet device.
3039  * @flow
3040  *   Parent flow for wich copying is provided.
3041  */
3042 static void
3043 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3044                           struct rte_flow *flow)
3045 {
3046         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3047         struct mlx5_priv *priv = dev->data->dev_private;
3048
3049         if (!mcp_res || !priv->mreg_cp_tbl)
3050                 return;
3051         if (flow->copy_applied) {
3052                 MLX5_ASSERT(mcp_res->appcnt);
3053                 flow->copy_applied = 0;
3054                 --mcp_res->appcnt;
3055                 if (!mcp_res->appcnt)
3056                         flow_drv_remove(dev, mcp_res->flow);
3057         }
3058         /*
3059          * We do not check availability of metadata registers here,
3060          * because copy resources are not allocated in this case.
3061          */
3062         if (--mcp_res->refcnt)
3063                 return;
3064         MLX5_ASSERT(mcp_res->flow);
3065         flow_list_destroy(dev, NULL, mcp_res->flow);
3066         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3067         rte_free(mcp_res);
3068         flow->mreg_copy = NULL;
3069 }
3070
3071 /**
3072  * Start flow in RX_CP_TBL.
3073  *
3074  * @param dev
3075  *   Pointer to Ethernet device.
3076  * @flow
3077  *   Parent flow for wich copying is provided.
3078  *
3079  * @return
3080  *   0 on success, a negative errno value otherwise and rte_errno is set.
3081  */
3082 static int
3083 flow_mreg_start_copy_action(struct rte_eth_dev *dev,
3084                             struct rte_flow *flow)
3085 {
3086         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3087         int ret;
3088
3089         if (!mcp_res || flow->copy_applied)
3090                 return 0;
3091         if (!mcp_res->appcnt) {
3092                 ret = flow_drv_apply(dev, mcp_res->flow, NULL);
3093                 if (ret)
3094                         return ret;
3095         }
3096         ++mcp_res->appcnt;
3097         flow->copy_applied = 1;
3098         return 0;
3099 }
3100
3101 /**
3102  * Stop flow in RX_CP_TBL.
3103  *
3104  * @param dev
3105  *   Pointer to Ethernet device.
3106  * @flow
3107  *   Parent flow for wich copying is provided.
3108  */
3109 static void
3110 flow_mreg_stop_copy_action(struct rte_eth_dev *dev,
3111                            struct rte_flow *flow)
3112 {
3113         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3114
3115         if (!mcp_res || !flow->copy_applied)
3116                 return;
3117         MLX5_ASSERT(mcp_res->appcnt);
3118         --mcp_res->appcnt;
3119         flow->copy_applied = 0;
3120         if (!mcp_res->appcnt)
3121                 flow_drv_remove(dev, mcp_res->flow);
3122 }
3123
3124 /**
3125  * Remove the default copy action from RX_CP_TBL.
3126  *
3127  * @param dev
3128  *   Pointer to Ethernet device.
3129  */
3130 static void
3131 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3132 {
3133         struct mlx5_flow_mreg_copy_resource *mcp_res;
3134         struct mlx5_priv *priv = dev->data->dev_private;
3135
3136         /* Check if default flow is registered. */
3137         if (!priv->mreg_cp_tbl)
3138                 return;
3139         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl,
3140                                             MLX5_DEFAULT_COPY_ID);
3141         if (!mcp_res)
3142                 return;
3143         MLX5_ASSERT(mcp_res->flow);
3144         flow_list_destroy(dev, NULL, mcp_res->flow);
3145         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3146         rte_free(mcp_res);
3147 }
3148
3149 /**
3150  * Add the default copy action in in RX_CP_TBL.
3151  *
3152  * @param dev
3153  *   Pointer to Ethernet device.
3154  * @param[out] error
3155  *   Perform verbose error reporting if not NULL.
3156  *
3157  * @return
3158  *   0 for success, negative value otherwise and rte_errno is set.
3159  */
3160 static int
3161 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3162                                   struct rte_flow_error *error)
3163 {
3164         struct mlx5_priv *priv = dev->data->dev_private;
3165         struct mlx5_flow_mreg_copy_resource *mcp_res;
3166
3167         /* Check whether extensive metadata feature is engaged. */
3168         if (!priv->config.dv_flow_en ||
3169             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3170             !mlx5_flow_ext_mreg_supported(dev) ||
3171             !priv->sh->dv_regc0_mask)
3172                 return 0;
3173         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
3174         if (!mcp_res)
3175                 return -rte_errno;
3176         return 0;
3177 }
3178
3179 /**
3180  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3181  *
3182  * All the flow having Q/RSS action should be split by
3183  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3184  * performs the following,
3185  *   - CQE->flow_tag := reg_c[1] (MARK)
3186  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3187  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3188  * but there should be a flow per each MARK ID set by MARK action.
3189  *
3190  * For the aforementioned reason, if there's a MARK action in flow's action
3191  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3192  * the MARK ID to CQE's flow_tag like,
3193  *   - If reg_c[1] is mark_id,
3194  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3195  *
3196  * For SET_META action which stores value in reg_c[0], as the destination is
3197  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3198  * MARK ID means the default flow. The default flow looks like,
3199  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3200  *
3201  * @param dev
3202  *   Pointer to Ethernet device.
3203  * @param flow
3204  *   Pointer to flow structure.
3205  * @param[in] actions
3206  *   Pointer to the list of actions.
3207  * @param[out] error
3208  *   Perform verbose error reporting if not NULL.
3209  *
3210  * @return
3211  *   0 on success, negative value otherwise and rte_errno is set.
3212  */
3213 static int
3214 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3215                             struct rte_flow *flow,
3216                             const struct rte_flow_action *actions,
3217                             struct rte_flow_error *error)
3218 {
3219         struct mlx5_priv *priv = dev->data->dev_private;
3220         struct mlx5_dev_config *config = &priv->config;
3221         struct mlx5_flow_mreg_copy_resource *mcp_res;
3222         const struct rte_flow_action_mark *mark;
3223
3224         /* Check whether extensive metadata feature is engaged. */
3225         if (!config->dv_flow_en ||
3226             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3227             !mlx5_flow_ext_mreg_supported(dev) ||
3228             !priv->sh->dv_regc0_mask)
3229                 return 0;
3230         /* Find MARK action. */
3231         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3232                 switch (actions->type) {
3233                 case RTE_FLOW_ACTION_TYPE_FLAG:
3234                         mcp_res = flow_mreg_add_copy_action
3235                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
3236                         if (!mcp_res)
3237                                 return -rte_errno;
3238                         flow->mreg_copy = mcp_res;
3239                         if (dev->data->dev_started) {
3240                                 mcp_res->appcnt++;
3241                                 flow->copy_applied = 1;
3242                         }
3243                         return 0;
3244                 case RTE_FLOW_ACTION_TYPE_MARK:
3245                         mark = (const struct rte_flow_action_mark *)
3246                                 actions->conf;
3247                         mcp_res =
3248                                 flow_mreg_add_copy_action(dev, mark->id, error);
3249                         if (!mcp_res)
3250                                 return -rte_errno;
3251                         flow->mreg_copy = mcp_res;
3252                         if (dev->data->dev_started) {
3253                                 mcp_res->appcnt++;
3254                                 flow->copy_applied = 1;
3255                         }
3256                         return 0;
3257                 default:
3258                         break;
3259                 }
3260         }
3261         return 0;
3262 }
3263
3264 #define MLX5_MAX_SPLIT_ACTIONS 24
3265 #define MLX5_MAX_SPLIT_ITEMS 24
3266
3267 /**
3268  * Split the hairpin flow.
3269  * Since HW can't support encap on Rx we move the encap to Tx.
3270  * If the count action is after the encap then we also
3271  * move the count action. in this case the count will also measure
3272  * the outer bytes.
3273  *
3274  * @param dev
3275  *   Pointer to Ethernet device.
3276  * @param[in] actions
3277  *   Associated actions (list terminated by the END action).
3278  * @param[out] actions_rx
3279  *   Rx flow actions.
3280  * @param[out] actions_tx
3281  *   Tx flow actions..
3282  * @param[out] pattern_tx
3283  *   The pattern items for the Tx flow.
3284  * @param[out] flow_id
3285  *   The flow ID connected to this flow.
3286  *
3287  * @return
3288  *   0 on success.
3289  */
3290 static int
3291 flow_hairpin_split(struct rte_eth_dev *dev,
3292                    const struct rte_flow_action actions[],
3293                    struct rte_flow_action actions_rx[],
3294                    struct rte_flow_action actions_tx[],
3295                    struct rte_flow_item pattern_tx[],
3296                    uint32_t *flow_id)
3297 {
3298         struct mlx5_priv *priv = dev->data->dev_private;
3299         const struct rte_flow_action_raw_encap *raw_encap;
3300         const struct rte_flow_action_raw_decap *raw_decap;
3301         struct mlx5_rte_flow_action_set_tag *set_tag;
3302         struct rte_flow_action *tag_action;
3303         struct mlx5_rte_flow_item_tag *tag_item;
3304         struct rte_flow_item *item;
3305         char *addr;
3306         int encap = 0;
3307
3308         mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
3309         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3310                 switch (actions->type) {
3311                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3312                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3313                         rte_memcpy(actions_tx, actions,
3314                                sizeof(struct rte_flow_action));
3315                         actions_tx++;
3316                         break;
3317                 case RTE_FLOW_ACTION_TYPE_COUNT:
3318                         if (encap) {
3319                                 rte_memcpy(actions_tx, actions,
3320                                            sizeof(struct rte_flow_action));
3321                                 actions_tx++;
3322                         } else {
3323                                 rte_memcpy(actions_rx, actions,
3324                                            sizeof(struct rte_flow_action));
3325                                 actions_rx++;
3326                         }
3327                         break;
3328                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3329                         raw_encap = actions->conf;
3330                         if (raw_encap->size >
3331                             (sizeof(struct rte_flow_item_eth) +
3332                              sizeof(struct rte_flow_item_ipv4))) {
3333                                 memcpy(actions_tx, actions,
3334                                        sizeof(struct rte_flow_action));
3335                                 actions_tx++;
3336                                 encap = 1;
3337                         } else {
3338                                 rte_memcpy(actions_rx, actions,
3339                                            sizeof(struct rte_flow_action));
3340                                 actions_rx++;
3341                         }
3342                         break;
3343                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3344                         raw_decap = actions->conf;
3345                         if (raw_decap->size <
3346                             (sizeof(struct rte_flow_item_eth) +
3347                              sizeof(struct rte_flow_item_ipv4))) {
3348                                 memcpy(actions_tx, actions,
3349                                        sizeof(struct rte_flow_action));
3350                                 actions_tx++;
3351                         } else {
3352                                 rte_memcpy(actions_rx, actions,
3353                                            sizeof(struct rte_flow_action));
3354                                 actions_rx++;
3355                         }
3356                         break;
3357                 default:
3358                         rte_memcpy(actions_rx, actions,
3359                                    sizeof(struct rte_flow_action));
3360                         actions_rx++;
3361                         break;
3362                 }
3363         }
3364         /* Add set meta action and end action for the Rx flow. */
3365         tag_action = actions_rx;
3366         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3367         actions_rx++;
3368         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
3369         actions_rx++;
3370         set_tag = (void *)actions_rx;
3371         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
3372         MLX5_ASSERT(set_tag->id > REG_NONE);
3373         set_tag->data = *flow_id;
3374         tag_action->conf = set_tag;
3375         /* Create Tx item list. */
3376         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
3377         addr = (void *)&pattern_tx[2];
3378         item = pattern_tx;
3379         item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3380         tag_item = (void *)addr;
3381         tag_item->data = *flow_id;
3382         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
3383         MLX5_ASSERT(set_tag->id > REG_NONE);
3384         item->spec = tag_item;
3385         addr += sizeof(struct mlx5_rte_flow_item_tag);
3386         tag_item = (void *)addr;
3387         tag_item->data = UINT32_MAX;
3388         tag_item->id = UINT16_MAX;
3389         item->mask = tag_item;
3390         addr += sizeof(struct mlx5_rte_flow_item_tag);
3391         item->last = NULL;
3392         item++;
3393         item->type = RTE_FLOW_ITEM_TYPE_END;
3394         return 0;
3395 }
3396
3397 /**
3398  * The last stage of splitting chain, just creates the subflow
3399  * without any modification.
3400  *
3401  * @param dev
3402  *   Pointer to Ethernet device.
3403  * @param[in] flow
3404  *   Parent flow structure pointer.
3405  * @param[in, out] sub_flow
3406  *   Pointer to return the created subflow, may be NULL.
3407  * @param[in] attr
3408  *   Flow rule attributes.
3409  * @param[in] items
3410  *   Pattern specification (list terminated by the END pattern item).
3411  * @param[in] actions
3412  *   Associated actions (list terminated by the END action).
3413  * @param[in] external
3414  *   This flow rule is created by request external to PMD.
3415  * @param[out] error
3416  *   Perform verbose error reporting if not NULL.
3417  * @return
3418  *   0 on success, negative value otherwise
3419  */
3420 static int
3421 flow_create_split_inner(struct rte_eth_dev *dev,
3422                         struct rte_flow *flow,
3423                         struct mlx5_flow **sub_flow,
3424                         const struct rte_flow_attr *attr,
3425                         const struct rte_flow_item items[],
3426                         const struct rte_flow_action actions[],
3427                         bool external, struct rte_flow_error *error)
3428 {
3429         struct mlx5_flow *dev_flow;
3430
3431         dev_flow = flow_drv_prepare(flow, attr, items, actions, error);
3432         if (!dev_flow)
3433                 return -rte_errno;
3434         dev_flow->flow = flow;
3435         dev_flow->external = external;
3436         /* Subflow object was created, we must include one in the list. */
3437         LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
3438         if (sub_flow)
3439                 *sub_flow = dev_flow;
3440         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
3441 }
3442
3443 /**
3444  * Split the meter flow.
3445  *
3446  * As meter flow will split to three sub flow, other than meter
3447  * action, the other actions make sense to only meter accepts
3448  * the packet. If it need to be dropped, no other additional
3449  * actions should be take.
3450  *
3451  * One kind of special action which decapsulates the L3 tunnel
3452  * header will be in the prefix sub flow, as not to take the
3453  * L3 tunnel header into account.
3454  *
3455  * @param dev
3456  *   Pointer to Ethernet device.
3457  * @param[in] actions
3458  *   Associated actions (list terminated by the END action).
3459  * @param[out] actions_sfx
3460  *   Suffix flow actions.
3461  * @param[out] actions_pre
3462  *   Prefix flow actions.
3463  * @param[out] pattern_sfx
3464  *   The pattern items for the suffix flow.
3465  * @param[out] tag_sfx
3466  *   Pointer to suffix flow tag.
3467  *
3468  * @return
3469  *   0 on success.
3470  */
3471 static int
3472 flow_meter_split_prep(struct rte_eth_dev *dev,
3473                  const struct rte_flow_action actions[],
3474                  struct rte_flow_action actions_sfx[],
3475                  struct rte_flow_action actions_pre[])
3476 {
3477         struct rte_flow_action *tag_action = NULL;
3478         struct mlx5_rte_flow_action_set_tag *set_tag;
3479         struct rte_flow_error error;
3480         const struct rte_flow_action_raw_encap *raw_encap;
3481         const struct rte_flow_action_raw_decap *raw_decap;
3482         uint32_t tag_id;
3483
3484         /* Prepare the actions for prefix and suffix flow. */
3485         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3486                 switch (actions->type) {
3487                 case RTE_FLOW_ACTION_TYPE_METER:
3488                         /* Add the extra tag action first. */
3489                         tag_action = actions_pre;
3490                         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3491                         actions_pre++;
3492                         memcpy(actions_pre, actions,
3493                                sizeof(struct rte_flow_action));
3494                         actions_pre++;
3495                         break;
3496                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3497                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3498                         memcpy(actions_pre, actions,
3499                                sizeof(struct rte_flow_action));
3500                         actions_pre++;
3501                         break;
3502                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3503                         raw_encap = actions->conf;
3504                         if (raw_encap->size >
3505                             (sizeof(struct rte_flow_item_eth) +
3506                              sizeof(struct rte_flow_item_ipv4))) {
3507                                 memcpy(actions_sfx, actions,
3508                                        sizeof(struct rte_flow_action));
3509                                 actions_sfx++;
3510                         } else {
3511                                 rte_memcpy(actions_pre, actions,
3512                                            sizeof(struct rte_flow_action));
3513                                 actions_pre++;
3514                         }
3515                         break;
3516                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3517                         raw_decap = actions->conf;
3518                         /* Size 0 decap means 50 bytes as vxlan decap. */
3519                         if (raw_decap->size && (raw_decap->size <
3520                             (sizeof(struct rte_flow_item_eth) +
3521                              sizeof(struct rte_flow_item_ipv4)))) {
3522                                 memcpy(actions_sfx, actions,
3523                                        sizeof(struct rte_flow_action));
3524                                 actions_sfx++;
3525                         } else {
3526                                 rte_memcpy(actions_pre, actions,
3527                                            sizeof(struct rte_flow_action));
3528                                 actions_pre++;
3529                         }
3530                         break;
3531                 default:
3532                         memcpy(actions_sfx, actions,
3533                                 sizeof(struct rte_flow_action));
3534                         actions_sfx++;
3535                         break;
3536                 }
3537         }
3538         /* Add end action to the actions. */
3539         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
3540         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
3541         actions_pre++;
3542         /* Set the tag. */
3543         set_tag = (void *)actions_pre;
3544         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3545         /*
3546          * Get the id from the qrss_pool to make qrss share the id with meter.
3547          */
3548         tag_id = flow_qrss_get_id(dev);
3549         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
3550         assert(tag_action);
3551         tag_action->conf = set_tag;
3552         return tag_id;
3553 }
3554
3555 /**
3556  * Split action list having QUEUE/RSS for metadata register copy.
3557  *
3558  * Once Q/RSS action is detected in user's action list, the flow action
3559  * should be split in order to copy metadata registers, which will happen in
3560  * RX_CP_TBL like,
3561  *   - CQE->flow_tag := reg_c[1] (MARK)
3562  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3563  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
3564  * This is because the last action of each flow must be a terminal action
3565  * (QUEUE, RSS or DROP).
3566  *
3567  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
3568  * stored and kept in the mlx5_flow structure per each sub_flow.
3569  *
3570  * The Q/RSS action is replaced with,
3571  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
3572  * And the following JUMP action is added at the end,
3573  *   - JUMP, to RX_CP_TBL.
3574  *
3575  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
3576  * flow_create_split_metadata() routine. The flow will look like,
3577  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
3578  *
3579  * @param dev
3580  *   Pointer to Ethernet device.
3581  * @param[out] split_actions
3582  *   Pointer to store split actions to jump to CP_TBL.
3583  * @param[in] actions
3584  *   Pointer to the list of original flow actions.
3585  * @param[in] qrss
3586  *   Pointer to the Q/RSS action.
3587  * @param[in] actions_n
3588  *   Number of original actions.
3589  * @param[out] error
3590  *   Perform verbose error reporting if not NULL.
3591  *
3592  * @return
3593  *   non-zero unique flow_id on success, otherwise 0 and
3594  *   error/rte_error are set.
3595  */
3596 static uint32_t
3597 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
3598                           struct rte_flow_action *split_actions,
3599                           const struct rte_flow_action *actions,
3600                           const struct rte_flow_action *qrss,
3601                           int actions_n, struct rte_flow_error *error)
3602 {
3603         struct mlx5_rte_flow_action_set_tag *set_tag;
3604         struct rte_flow_action_jump *jump;
3605         const int qrss_idx = qrss - actions;
3606         uint32_t flow_id = 0;
3607         int ret = 0;
3608
3609         /*
3610          * Given actions will be split
3611          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
3612          * - Add jump to mreg CP_TBL.
3613          * As a result, there will be one more action.
3614          */
3615         ++actions_n;
3616         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
3617         set_tag = (void *)(split_actions + actions_n);
3618         /*
3619          * If tag action is not set to void(it means we are not the meter
3620          * suffix flow), add the tag action. Since meter suffix flow already
3621          * has the tag added.
3622          */
3623         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
3624                 /*
3625                  * Allocate the new subflow ID. This one is unique within
3626                  * device and not shared with representors. Otherwise,
3627                  * we would have to resolve multi-thread access synch
3628                  * issue. Each flow on the shared device is appended
3629                  * with source vport identifier, so the resulting
3630                  * flows will be unique in the shared (by master and
3631                  * representors) domain even if they have coinciding
3632                  * IDs.
3633                  */
3634                 flow_id = flow_qrss_get_id(dev);
3635                 if (!flow_id)
3636                         return rte_flow_error_set(error, ENOMEM,
3637                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3638                                                   NULL, "can't allocate id "
3639                                                   "for split Q/RSS subflow");
3640                 /* Internal SET_TAG action to set flow ID. */
3641                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
3642                         .data = flow_id,
3643                 };
3644                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3645                 if (ret < 0)
3646                         return ret;
3647                 set_tag->id = ret;
3648                 /* Construct new actions array. */
3649                 /* Replace QUEUE/RSS action. */
3650                 split_actions[qrss_idx] = (struct rte_flow_action){
3651                         .type = MLX5_RTE_FLOW_ACTION_TYPE_TAG,
3652                         .conf = set_tag,
3653                 };
3654         }
3655         /* JUMP action to jump to mreg copy table (CP_TBL). */
3656         jump = (void *)(set_tag + 1);
3657         *jump = (struct rte_flow_action_jump){
3658                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3659         };
3660         split_actions[actions_n - 2] = (struct rte_flow_action){
3661                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3662                 .conf = jump,
3663         };
3664         split_actions[actions_n - 1] = (struct rte_flow_action){
3665                 .type = RTE_FLOW_ACTION_TYPE_END,
3666         };
3667         return flow_id;
3668 }
3669
3670 /**
3671  * Extend the given action list for Tx metadata copy.
3672  *
3673  * Copy the given action list to the ext_actions and add flow metadata register
3674  * copy action in order to copy reg_a set by WQE to reg_c[0].
3675  *
3676  * @param[out] ext_actions
3677  *   Pointer to the extended action list.
3678  * @param[in] actions
3679  *   Pointer to the list of actions.
3680  * @param[in] actions_n
3681  *   Number of actions in the list.
3682  * @param[out] error
3683  *   Perform verbose error reporting if not NULL.
3684  *
3685  * @return
3686  *   0 on success, negative value otherwise
3687  */
3688 static int
3689 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
3690                        struct rte_flow_action *ext_actions,
3691                        const struct rte_flow_action *actions,
3692                        int actions_n, struct rte_flow_error *error)
3693 {
3694         struct mlx5_flow_action_copy_mreg *cp_mreg =
3695                 (struct mlx5_flow_action_copy_mreg *)
3696                         (ext_actions + actions_n + 1);
3697         int ret;
3698
3699         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3700         if (ret < 0)
3701                 return ret;
3702         cp_mreg->dst = ret;
3703         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
3704         if (ret < 0)
3705                 return ret;
3706         cp_mreg->src = ret;
3707         memcpy(ext_actions, actions,
3708                         sizeof(*ext_actions) * actions_n);
3709         ext_actions[actions_n - 1] = (struct rte_flow_action){
3710                 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3711                 .conf = cp_mreg,
3712         };
3713         ext_actions[actions_n] = (struct rte_flow_action){
3714                 .type = RTE_FLOW_ACTION_TYPE_END,
3715         };
3716         return 0;
3717 }
3718
3719 /**
3720  * The splitting for metadata feature.
3721  *
3722  * - Q/RSS action on NIC Rx should be split in order to pass by
3723  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
3724  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
3725  *
3726  * - All the actions on NIC Tx should have a mreg copy action to
3727  *   copy reg_a from WQE to reg_c[0].
3728  *
3729  * @param dev
3730  *   Pointer to Ethernet device.
3731  * @param[in] flow
3732  *   Parent flow structure pointer.
3733  * @param[in] attr
3734  *   Flow rule attributes.
3735  * @param[in] items
3736  *   Pattern specification (list terminated by the END pattern item).
3737  * @param[in] actions
3738  *   Associated actions (list terminated by the END action).
3739  * @param[in] external
3740  *   This flow rule is created by request external to PMD.
3741  * @param[out] error
3742  *   Perform verbose error reporting if not NULL.
3743  * @return
3744  *   0 on success, negative value otherwise
3745  */
3746 static int
3747 flow_create_split_metadata(struct rte_eth_dev *dev,
3748                            struct rte_flow *flow,
3749                            const struct rte_flow_attr *attr,
3750                            const struct rte_flow_item items[],
3751                            const struct rte_flow_action actions[],
3752                            bool external, struct rte_flow_error *error)
3753 {
3754         struct mlx5_priv *priv = dev->data->dev_private;
3755         struct mlx5_dev_config *config = &priv->config;
3756         const struct rte_flow_action *qrss = NULL;
3757         struct rte_flow_action *ext_actions = NULL;
3758         struct mlx5_flow *dev_flow = NULL;
3759         uint32_t qrss_id = 0;
3760         int mtr_sfx = 0;
3761         size_t act_size;
3762         int actions_n;
3763         int ret;
3764
3765         /* Check whether extensive metadata feature is engaged. */
3766         if (!config->dv_flow_en ||
3767             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3768             !mlx5_flow_ext_mreg_supported(dev))
3769                 return flow_create_split_inner(dev, flow, NULL, attr, items,
3770                                                actions, external, error);
3771         actions_n = flow_parse_qrss_action(actions, &qrss);
3772         if (qrss) {
3773                 /* Exclude hairpin flows from splitting. */
3774                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
3775                         const struct rte_flow_action_queue *queue;
3776
3777                         queue = qrss->conf;
3778                         if (mlx5_rxq_get_type(dev, queue->index) ==
3779                             MLX5_RXQ_TYPE_HAIRPIN)
3780                                 qrss = NULL;
3781                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
3782                         const struct rte_flow_action_rss *rss;
3783
3784                         rss = qrss->conf;
3785                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
3786                             MLX5_RXQ_TYPE_HAIRPIN)
3787                                 qrss = NULL;
3788                 }
3789         }
3790         if (qrss) {
3791                 /* Check if it is in meter suffix table. */
3792                 mtr_sfx = attr->group == (attr->transfer ?
3793                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
3794                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
3795                 /*
3796                  * Q/RSS action on NIC Rx should be split in order to pass by
3797                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
3798                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
3799                  */
3800                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3801                            sizeof(struct rte_flow_action_set_tag) +
3802                            sizeof(struct rte_flow_action_jump);
3803                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3804                 if (!ext_actions)
3805                         return rte_flow_error_set(error, ENOMEM,
3806                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3807                                                   NULL, "no memory to split "
3808                                                   "metadata flow");
3809                 /*
3810                  * If we are the suffix flow of meter, tag already exist.
3811                  * Set the tag action to void.
3812                  */
3813                 if (mtr_sfx)
3814                         ext_actions[qrss - actions].type =
3815                                                 RTE_FLOW_ACTION_TYPE_VOID;
3816                 else
3817                         ext_actions[qrss - actions].type =
3818                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3819                 /*
3820                  * Create the new actions list with removed Q/RSS action
3821                  * and appended set tag and jump to register copy table
3822                  * (RX_CP_TBL). We should preallocate unique tag ID here
3823                  * in advance, because it is needed for set tag action.
3824                  */
3825                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
3826                                                     qrss, actions_n, error);
3827                 if (!mtr_sfx && !qrss_id) {
3828                         ret = -rte_errno;
3829                         goto exit;
3830                 }
3831         } else if (attr->egress && !attr->transfer) {
3832                 /*
3833                  * All the actions on NIC Tx should have a metadata register
3834                  * copy action to copy reg_a from WQE to reg_c[meta]
3835                  */
3836                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3837                            sizeof(struct mlx5_flow_action_copy_mreg);
3838                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3839                 if (!ext_actions)
3840                         return rte_flow_error_set(error, ENOMEM,
3841                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3842                                                   NULL, "no memory to split "
3843                                                   "metadata flow");
3844                 /* Create the action list appended with copy register. */
3845                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
3846                                              actions_n, error);
3847                 if (ret < 0)
3848                         goto exit;
3849         }
3850         /* Add the unmodified original or prefix subflow. */
3851         ret = flow_create_split_inner(dev, flow, &dev_flow, attr, items,
3852                                       ext_actions ? ext_actions : actions,
3853                                       external, error);
3854         if (ret < 0)
3855                 goto exit;
3856         MLX5_ASSERT(dev_flow);
3857         if (qrss) {
3858                 const struct rte_flow_attr q_attr = {
3859                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3860                         .ingress = 1,
3861                 };
3862                 /* Internal PMD action to set register. */
3863                 struct mlx5_rte_flow_item_tag q_tag_spec = {
3864                         .data = qrss_id,
3865                         .id = 0,
3866                 };
3867                 struct rte_flow_item q_items[] = {
3868                         {
3869                                 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3870                                 .spec = &q_tag_spec,
3871                                 .last = NULL,
3872                                 .mask = NULL,
3873                         },
3874                         {
3875                                 .type = RTE_FLOW_ITEM_TYPE_END,
3876                         },
3877                 };
3878                 struct rte_flow_action q_actions[] = {
3879                         {
3880                                 .type = qrss->type,
3881                                 .conf = qrss->conf,
3882                         },
3883                         {
3884                                 .type = RTE_FLOW_ACTION_TYPE_END,
3885                         },
3886                 };
3887                 uint64_t hash_fields = dev_flow->hash_fields;
3888
3889                 /*
3890                  * Configure the tag item only if there is no meter subflow.
3891                  * Since tag is already marked in the meter suffix subflow
3892                  * we can just use the meter suffix items as is.
3893                  */
3894                 if (qrss_id) {
3895                         /* Not meter subflow. */
3896                         MLX5_ASSERT(!mtr_sfx);
3897                         /*
3898                          * Put unique id in prefix flow due to it is destroyed
3899                          * after suffix flow and id will be freed after there
3900                          * is no actual flows with this id and identifier
3901                          * reallocation becomes possible (for example, for
3902                          * other flows in other threads).
3903                          */
3904                         dev_flow->qrss_id = qrss_id;
3905                         qrss_id = 0;
3906                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
3907                                                    error);
3908                         if (ret < 0)
3909                                 goto exit;
3910                         q_tag_spec.id = ret;
3911                 }
3912                 dev_flow = NULL;
3913                 /* Add suffix subflow to execute Q/RSS. */
3914                 ret = flow_create_split_inner(dev, flow, &dev_flow,
3915                                               &q_attr, mtr_sfx ? items :
3916                                               q_items, q_actions,
3917                                               external, error);
3918                 if (ret < 0)
3919                         goto exit;
3920                 MLX5_ASSERT(dev_flow);
3921                 dev_flow->hash_fields = hash_fields;
3922         }
3923
3924 exit:
3925         /*
3926          * We do not destroy the partially created sub_flows in case of error.
3927          * These ones are included into parent flow list and will be destroyed
3928          * by flow_drv_destroy.
3929          */
3930         flow_qrss_free_id(dev, qrss_id);
3931         rte_free(ext_actions);
3932         return ret;
3933 }
3934
3935 /**
3936  * The splitting for meter feature.
3937  *
3938  * - The meter flow will be split to two flows as prefix and
3939  *   suffix flow. The packets make sense only it pass the prefix
3940  *   meter action.
3941  *
3942  * - Reg_C_5 is used for the packet to match betweend prefix and
3943  *   suffix flow.
3944  *
3945  * @param dev
3946  *   Pointer to Ethernet device.
3947  * @param[in] flow
3948  *   Parent flow structure pointer.
3949  * @param[in] attr
3950  *   Flow rule attributes.
3951  * @param[in] items
3952  *   Pattern specification (list terminated by the END pattern item).
3953  * @param[in] actions
3954  *   Associated actions (list terminated by the END action).
3955  * @param[in] external
3956  *   This flow rule is created by request external to PMD.
3957  * @param[out] error
3958  *   Perform verbose error reporting if not NULL.
3959  * @return
3960  *   0 on success, negative value otherwise
3961  */
3962 static int
3963 flow_create_split_meter(struct rte_eth_dev *dev,
3964                            struct rte_flow *flow,
3965                            const struct rte_flow_attr *attr,
3966                            const struct rte_flow_item items[],
3967                            const struct rte_flow_action actions[],
3968                            bool external, struct rte_flow_error *error)
3969 {
3970         struct mlx5_priv *priv = dev->data->dev_private;
3971         struct rte_flow_action *sfx_actions = NULL;
3972         struct rte_flow_action *pre_actions = NULL;
3973         struct rte_flow_item *sfx_items = NULL;
3974         const  struct rte_flow_item *sfx_port_id_item;
3975         struct mlx5_flow *dev_flow = NULL;
3976         struct rte_flow_attr sfx_attr = *attr;
3977         uint32_t mtr = 0;
3978         uint32_t mtr_tag_id = 0;
3979         size_t act_size;
3980         size_t item_size;
3981         int actions_n = 0;
3982         int ret;
3983
3984         if (priv->mtr_en)
3985                 actions_n = flow_check_meter_action(actions, &mtr);
3986         if (mtr) {
3987                 struct mlx5_rte_flow_item_tag *tag_spec;
3988                 struct mlx5_rte_flow_item_tag *tag_mask;
3989                 /* The five prefix actions: meter, decap, encap, tag, end. */
3990                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
3991                            sizeof(struct rte_flow_action_set_tag);
3992                 /* tag, end. */
3993 #define METER_SUFFIX_ITEM 3
3994                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
3995                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
3996                 sfx_actions = rte_zmalloc(__func__, (act_size + item_size), 0);
3997                 if (!sfx_actions)
3998                         return rte_flow_error_set(error, ENOMEM,
3999                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4000                                                   NULL, "no memory to split "
4001                                                   "meter flow");
4002                 pre_actions = sfx_actions + actions_n;
4003                 mtr_tag_id = flow_meter_split_prep(dev, actions, sfx_actions,
4004                                                      pre_actions);
4005                 if (!mtr_tag_id) {
4006                         ret = -rte_errno;
4007                         goto exit;
4008                 }
4009                 /* Add the prefix subflow. */
4010                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, items,
4011                                                   pre_actions, external, error);
4012                 if (ret) {
4013                         ret = -rte_errno;
4014                         goto exit;
4015                 }
4016                 dev_flow->mtr_flow_id = mtr_tag_id;
4017                 /* Prepare the suffix flow match pattern. */
4018                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
4019                              act_size);
4020                 tag_spec = (struct mlx5_rte_flow_item_tag *)(sfx_items +
4021                             METER_SUFFIX_ITEM);
4022                 tag_spec->data = dev_flow->mtr_flow_id << MLX5_MTR_COLOR_BITS;
4023                 tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0,
4024                                                     error);
4025                 tag_mask = tag_spec + 1;
4026                 tag_mask->data = 0xffffff00;
4027                 sfx_items->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4028                 sfx_items->spec = tag_spec;
4029                 sfx_items->last = NULL;
4030                 sfx_items->mask = tag_mask;
4031                 sfx_items++;
4032                 sfx_port_id_item = find_port_id_item(items);
4033                 if (sfx_port_id_item) {
4034                         memcpy(sfx_items, sfx_port_id_item,
4035                                sizeof(*sfx_items));
4036                         sfx_items++;
4037                 }
4038                 sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4039                 sfx_items -= sfx_port_id_item ? 2 : 1;
4040                 /* Setting the sfx group atrr. */
4041                 sfx_attr.group = sfx_attr.transfer ?
4042                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4043                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
4044         }
4045         /* Add the prefix subflow. */
4046         ret = flow_create_split_metadata(dev, flow, &sfx_attr,
4047                                          sfx_items ? sfx_items : items,
4048                                          sfx_actions ? sfx_actions : actions,
4049                                          external, error);
4050 exit:
4051         if (sfx_actions)
4052                 rte_free(sfx_actions);
4053         return ret;
4054 }
4055
4056 /**
4057  * Split the flow to subflow set. The splitters might be linked
4058  * in the chain, like this:
4059  * flow_create_split_outer() calls:
4060  *   flow_create_split_meter() calls:
4061  *     flow_create_split_metadata(meter_subflow_0) calls:
4062  *       flow_create_split_inner(metadata_subflow_0)
4063  *       flow_create_split_inner(metadata_subflow_1)
4064  *       flow_create_split_inner(metadata_subflow_2)
4065  *     flow_create_split_metadata(meter_subflow_1) calls:
4066  *       flow_create_split_inner(metadata_subflow_0)
4067  *       flow_create_split_inner(metadata_subflow_1)
4068  *       flow_create_split_inner(metadata_subflow_2)
4069  *
4070  * This provide flexible way to add new levels of flow splitting.
4071  * The all of successfully created subflows are included to the
4072  * parent flow dev_flow list.
4073  *
4074  * @param dev
4075  *   Pointer to Ethernet device.
4076  * @param[in] flow
4077  *   Parent flow structure pointer.
4078  * @param[in] attr
4079  *   Flow rule attributes.
4080  * @param[in] items
4081  *   Pattern specification (list terminated by the END pattern item).
4082  * @param[in] actions
4083  *   Associated actions (list terminated by the END action).
4084  * @param[in] external
4085  *   This flow rule is created by request external to PMD.
4086  * @param[out] error
4087  *   Perform verbose error reporting if not NULL.
4088  * @return
4089  *   0 on success, negative value otherwise
4090  */
4091 static int
4092 flow_create_split_outer(struct rte_eth_dev *dev,
4093                         struct rte_flow *flow,
4094                         const struct rte_flow_attr *attr,
4095                         const struct rte_flow_item items[],
4096                         const struct rte_flow_action actions[],
4097                         bool external, struct rte_flow_error *error)
4098 {
4099         int ret;
4100
4101         ret = flow_create_split_meter(dev, flow, attr, items,
4102                                          actions, external, error);
4103         MLX5_ASSERT(ret <= 0);
4104         return ret;
4105 }
4106
4107 /**
4108  * Create a flow and add it to @p list.
4109  *
4110  * @param dev
4111  *   Pointer to Ethernet device.
4112  * @param list
4113  *   Pointer to a TAILQ flow list. If this parameter NULL,
4114  *   no list insertion occurred, flow is just created,
4115  *   this is caller's responsibility to track the
4116  *   created flow.
4117  * @param[in] attr
4118  *   Flow rule attributes.
4119  * @param[in] items
4120  *   Pattern specification (list terminated by the END pattern item).
4121  * @param[in] actions
4122  *   Associated actions (list terminated by the END action).
4123  * @param[in] external
4124  *   This flow rule is created by request external to PMD.
4125  * @param[out] error
4126  *   Perform verbose error reporting if not NULL.
4127  *
4128  * @return
4129  *   A flow on success, NULL otherwise and rte_errno is set.
4130  */
4131 static struct rte_flow *
4132 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
4133                  const struct rte_flow_attr *attr,
4134                  const struct rte_flow_item items[],
4135                  const struct rte_flow_action actions[],
4136                  bool external, struct rte_flow_error *error)
4137 {
4138         struct mlx5_priv *priv = dev->data->dev_private;
4139         struct rte_flow *flow = NULL;
4140         struct mlx5_flow *dev_flow;
4141         const struct rte_flow_action_rss *rss;
4142         union {
4143                 struct rte_flow_expand_rss buf;
4144                 uint8_t buffer[2048];
4145         } expand_buffer;
4146         union {
4147                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4148                 uint8_t buffer[2048];
4149         } actions_rx;
4150         union {
4151                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4152                 uint8_t buffer[2048];
4153         } actions_hairpin_tx;
4154         union {
4155                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
4156                 uint8_t buffer[2048];
4157         } items_tx;
4158         struct rte_flow_expand_rss *buf = &expand_buffer.buf;
4159         const struct rte_flow_action *p_actions_rx = actions;
4160         uint32_t i;
4161         uint32_t flow_size;
4162         int hairpin_flow = 0;
4163         uint32_t hairpin_id = 0;
4164         struct rte_flow_attr attr_tx = { .priority = 0 };
4165         int ret = flow_drv_validate(dev, attr, items, p_actions_rx, external,
4166                                     error);
4167
4168         if (ret < 0)
4169                 return NULL;
4170         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
4171         if (hairpin_flow > 0) {
4172                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
4173                         rte_errno = EINVAL;
4174                         return NULL;
4175                 }
4176                 flow_hairpin_split(dev, actions, actions_rx.actions,
4177                                    actions_hairpin_tx.actions, items_tx.items,
4178                                    &hairpin_id);
4179                 p_actions_rx = actions_rx.actions;
4180         }
4181         flow_size = sizeof(struct rte_flow);
4182         rss = flow_get_rss_action(p_actions_rx);
4183         if (rss)
4184                 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
4185                                             sizeof(void *));
4186         else
4187                 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
4188         flow = rte_calloc(__func__, 1, flow_size, 0);
4189         if (!flow) {
4190                 rte_errno = ENOMEM;
4191                 goto error_before_flow;
4192         }
4193         flow->drv_type = flow_get_drv_type(dev, attr);
4194         if (hairpin_id != 0)
4195                 flow->hairpin_flow_id = hairpin_id;
4196         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
4197                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
4198         flow->rss.queue = (void *)(flow + 1);
4199         if (rss) {
4200                 /*
4201                  * The following information is required by
4202                  * mlx5_flow_hashfields_adjust() in advance.
4203                  */
4204                 flow->rss.level = rss->level;
4205                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
4206                 flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
4207         }
4208         LIST_INIT(&flow->dev_flows);
4209         if (rss && rss->types) {
4210                 unsigned int graph_root;
4211
4212                 graph_root = find_graph_root(items, rss->level);
4213                 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
4214                                           items, rss->types,
4215                                           mlx5_support_expansion,
4216                                           graph_root);
4217                 MLX5_ASSERT(ret > 0 &&
4218                        (unsigned int)ret < sizeof(expand_buffer.buffer));
4219         } else {
4220                 buf->entries = 1;
4221                 buf->entry[0].pattern = (void *)(uintptr_t)items;
4222         }
4223         for (i = 0; i < buf->entries; ++i) {
4224                 /*
4225                  * The splitter may create multiple dev_flows,
4226                  * depending on configuration. In the simplest
4227                  * case it just creates unmodified original flow.
4228                  */
4229                 ret = flow_create_split_outer(dev, flow, attr,
4230                                               buf->entry[i].pattern,
4231                                               p_actions_rx, external,
4232                                               error);
4233                 if (ret < 0)
4234                         goto error;
4235         }
4236         /* Create the tx flow. */
4237         if (hairpin_flow) {
4238                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
4239                 attr_tx.ingress = 0;
4240                 attr_tx.egress = 1;
4241                 dev_flow = flow_drv_prepare(flow, &attr_tx, items_tx.items,
4242                                             actions_hairpin_tx.actions, error);
4243                 if (!dev_flow)
4244                         goto error;
4245                 dev_flow->flow = flow;
4246                 dev_flow->external = 0;
4247                 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
4248                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
4249                                          items_tx.items,
4250                                          actions_hairpin_tx.actions, error);
4251                 if (ret < 0)
4252                         goto error;
4253         }
4254         /*
4255          * Update the metadata register copy table. If extensive
4256          * metadata feature is enabled and registers are supported
4257          * we might create the extra rte_flow for each unique
4258          * MARK/FLAG action ID.
4259          *
4260          * The table is updated for ingress Flows only, because
4261          * the egress Flows belong to the different device and
4262          * copy table should be updated in peer NIC Rx domain.
4263          */
4264         if (attr->ingress &&
4265             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
4266                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
4267                 if (ret)
4268                         goto error;
4269         }
4270         if (dev->data->dev_started) {
4271                 ret = flow_drv_apply(dev, flow, error);
4272                 if (ret < 0)
4273                         goto error;
4274         }
4275         if (list)
4276                 TAILQ_INSERT_TAIL(list, flow, next);
4277         flow_rxq_flags_set(dev, flow);
4278         return flow;
4279 error_before_flow:
4280         if (hairpin_id)
4281                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4282                                      hairpin_id);
4283         return NULL;
4284 error:
4285         MLX5_ASSERT(flow);
4286         flow_mreg_del_copy_action(dev, flow);
4287         ret = rte_errno; /* Save rte_errno before cleanup. */
4288         if (flow->hairpin_flow_id)
4289                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4290                                      flow->hairpin_flow_id);
4291         MLX5_ASSERT(flow);
4292         flow_drv_destroy(dev, flow);
4293         rte_free(flow);
4294         rte_errno = ret; /* Restore rte_errno. */
4295         return NULL;
4296 }
4297
4298 /**
4299  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
4300  * incoming packets to table 1.
4301  *
4302  * Other flow rules, requested for group n, will be created in
4303  * e-switch table n+1.
4304  * Jump action to e-switch group n will be created to group n+1.
4305  *
4306  * Used when working in switchdev mode, to utilise advantages of table 1
4307  * and above.
4308  *
4309  * @param dev
4310  *   Pointer to Ethernet device.
4311  *
4312  * @return
4313  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
4314  */
4315 struct rte_flow *
4316 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
4317 {
4318         const struct rte_flow_attr attr = {
4319                 .group = 0,
4320                 .priority = 0,
4321                 .ingress = 1,
4322                 .egress = 0,
4323                 .transfer = 1,
4324         };
4325         const struct rte_flow_item pattern = {
4326                 .type = RTE_FLOW_ITEM_TYPE_END,
4327         };
4328         struct rte_flow_action_jump jump = {
4329                 .group = 1,
4330         };
4331         const struct rte_flow_action actions[] = {
4332                 {
4333                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4334                         .conf = &jump,
4335                 },
4336                 {
4337                         .type = RTE_FLOW_ACTION_TYPE_END,
4338                 },
4339         };
4340         struct mlx5_priv *priv = dev->data->dev_private;
4341         struct rte_flow_error error;
4342
4343         return flow_list_create(dev, &priv->ctrl_flows, &attr, &pattern,
4344                                 actions, false, &error);
4345 }
4346
4347 /**
4348  * Create a flow.
4349  *
4350  * @see rte_flow_create()
4351  * @see rte_flow_ops
4352  */
4353 struct rte_flow *
4354 mlx5_flow_create(struct rte_eth_dev *dev,
4355                  const struct rte_flow_attr *attr,
4356                  const struct rte_flow_item items[],
4357                  const struct rte_flow_action actions[],
4358                  struct rte_flow_error *error)
4359 {
4360         struct mlx5_priv *priv = dev->data->dev_private;
4361
4362         return flow_list_create(dev, &priv->flows,
4363                                 attr, items, actions, true, error);
4364 }
4365
4366 /**
4367  * Destroy a flow in a list.
4368  *
4369  * @param dev
4370  *   Pointer to Ethernet device.
4371  * @param list
4372  *   Pointer to a TAILQ flow list. If this parameter NULL,
4373  *   there is no flow removal from the list.
4374  * @param[in] flow
4375  *   Flow to destroy.
4376  */
4377 static void
4378 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
4379                   struct rte_flow *flow)
4380 {
4381         struct mlx5_priv *priv = dev->data->dev_private;
4382
4383         /*
4384          * Update RX queue flags only if port is started, otherwise it is
4385          * already clean.
4386          */
4387         if (dev->data->dev_started)
4388                 flow_rxq_flags_trim(dev, flow);
4389         if (flow->hairpin_flow_id)
4390                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4391                                      flow->hairpin_flow_id);
4392         flow_drv_destroy(dev, flow);
4393         if (list)
4394                 TAILQ_REMOVE(list, flow, next);
4395         flow_mreg_del_copy_action(dev, flow);
4396         rte_free(flow->fdir);
4397         rte_free(flow);
4398 }
4399
4400 /**
4401  * Destroy all flows.
4402  *
4403  * @param dev
4404  *   Pointer to Ethernet device.
4405  * @param list
4406  *   Pointer to a TAILQ flow list.
4407  */
4408 void
4409 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
4410 {
4411         while (!TAILQ_EMPTY(list)) {
4412                 struct rte_flow *flow;
4413
4414                 flow = TAILQ_FIRST(list);
4415                 flow_list_destroy(dev, list, flow);
4416         }
4417 }
4418
4419 /**
4420  * Remove all flows.
4421  *
4422  * @param dev
4423  *   Pointer to Ethernet device.
4424  * @param list
4425  *   Pointer to a TAILQ flow list.
4426  */
4427 void
4428 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
4429 {
4430         struct rte_flow *flow;
4431
4432         TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) {
4433                 flow_drv_remove(dev, flow);
4434                 flow_mreg_stop_copy_action(dev, flow);
4435         }
4436         flow_mreg_del_default_copy_action(dev);
4437         flow_rxq_flags_clear(dev);
4438 }
4439
4440 /**
4441  * Add all flows.
4442  *
4443  * @param dev
4444  *   Pointer to Ethernet device.
4445  * @param list
4446  *   Pointer to a TAILQ flow list.
4447  *
4448  * @return
4449  *   0 on success, a negative errno value otherwise and rte_errno is set.
4450  */
4451 int
4452 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
4453 {
4454         struct rte_flow *flow;
4455         struct rte_flow_error error;
4456         int ret = 0;
4457
4458         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4459         ret = flow_mreg_add_default_copy_action(dev, &error);
4460         if (ret < 0)
4461                 return -rte_errno;
4462         /* Apply Flows created by application. */
4463         TAILQ_FOREACH(flow, list, next) {
4464                 ret = flow_mreg_start_copy_action(dev, flow);
4465                 if (ret < 0)
4466                         goto error;
4467                 ret = flow_drv_apply(dev, flow, &error);
4468                 if (ret < 0)
4469                         goto error;
4470                 flow_rxq_flags_set(dev, flow);
4471         }
4472         return 0;
4473 error:
4474         ret = rte_errno; /* Save rte_errno before cleanup. */
4475         mlx5_flow_stop(dev, list);
4476         rte_errno = ret; /* Restore rte_errno. */
4477         return -rte_errno;
4478 }
4479
4480 /**
4481  * Verify the flow list is empty
4482  *
4483  * @param dev
4484  *  Pointer to Ethernet device.
4485  *
4486  * @return the number of flows not released.
4487  */
4488 int
4489 mlx5_flow_verify(struct rte_eth_dev *dev)
4490 {
4491         struct mlx5_priv *priv = dev->data->dev_private;
4492         struct rte_flow *flow;
4493         int ret = 0;
4494
4495         TAILQ_FOREACH(flow, &priv->flows, next) {
4496                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
4497                         dev->data->port_id, (void *)flow);
4498                 ++ret;
4499         }
4500         return ret;
4501 }
4502
4503 /**
4504  * Enable default hairpin egress flow.
4505  *
4506  * @param dev
4507  *   Pointer to Ethernet device.
4508  * @param queue
4509  *   The queue index.
4510  *
4511  * @return
4512  *   0 on success, a negative errno value otherwise and rte_errno is set.
4513  */
4514 int
4515 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
4516                             uint32_t queue)
4517 {
4518         struct mlx5_priv *priv = dev->data->dev_private;
4519         const struct rte_flow_attr attr = {
4520                 .egress = 1,
4521                 .priority = 0,
4522         };
4523         struct mlx5_rte_flow_item_tx_queue queue_spec = {
4524                 .queue = queue,
4525         };
4526         struct mlx5_rte_flow_item_tx_queue queue_mask = {
4527                 .queue = UINT32_MAX,
4528         };
4529         struct rte_flow_item items[] = {
4530                 {
4531                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
4532                         .spec = &queue_spec,
4533                         .last = NULL,
4534                         .mask = &queue_mask,
4535                 },
4536                 {
4537                         .type = RTE_FLOW_ITEM_TYPE_END,
4538                 },
4539         };
4540         struct rte_flow_action_jump jump = {
4541                 .group = MLX5_HAIRPIN_TX_TABLE,
4542         };
4543         struct rte_flow_action actions[2];
4544         struct rte_flow *flow;
4545         struct rte_flow_error error;
4546
4547         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
4548         actions[0].conf = &jump;
4549         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
4550         flow = flow_list_create(dev, &priv->ctrl_flows,
4551                                 &attr, items, actions, false, &error);
4552         if (!flow) {
4553                 DRV_LOG(DEBUG,
4554                         "Failed to create ctrl flow: rte_errno(%d),"
4555                         " type(%d), message(%s)",
4556                         rte_errno, error.type,
4557                         error.message ? error.message : " (no stated reason)");
4558                 return -rte_errno;
4559         }
4560         return 0;
4561 }
4562
4563 /**
4564  * Enable a control flow configured from the control plane.
4565  *
4566  * @param dev
4567  *   Pointer to Ethernet device.
4568  * @param eth_spec
4569  *   An Ethernet flow spec to apply.
4570  * @param eth_mask
4571  *   An Ethernet flow mask to apply.
4572  * @param vlan_spec
4573  *   A VLAN flow spec to apply.
4574  * @param vlan_mask
4575  *   A VLAN flow mask to apply.
4576  *
4577  * @return
4578  *   0 on success, a negative errno value otherwise and rte_errno is set.
4579  */
4580 int
4581 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
4582                     struct rte_flow_item_eth *eth_spec,
4583                     struct rte_flow_item_eth *eth_mask,
4584                     struct rte_flow_item_vlan *vlan_spec,
4585                     struct rte_flow_item_vlan *vlan_mask)
4586 {
4587         struct mlx5_priv *priv = dev->data->dev_private;
4588         const struct rte_flow_attr attr = {
4589                 .ingress = 1,
4590                 .priority = MLX5_FLOW_PRIO_RSVD,
4591         };
4592         struct rte_flow_item items[] = {
4593                 {
4594                         .type = RTE_FLOW_ITEM_TYPE_ETH,
4595                         .spec = eth_spec,
4596                         .last = NULL,
4597                         .mask = eth_mask,
4598                 },
4599                 {
4600                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
4601                                               RTE_FLOW_ITEM_TYPE_END,
4602                         .spec = vlan_spec,
4603                         .last = NULL,
4604                         .mask = vlan_mask,
4605                 },
4606                 {
4607                         .type = RTE_FLOW_ITEM_TYPE_END,
4608                 },
4609         };
4610         uint16_t queue[priv->reta_idx_n];
4611         struct rte_flow_action_rss action_rss = {
4612                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4613                 .level = 0,
4614                 .types = priv->rss_conf.rss_hf,
4615                 .key_len = priv->rss_conf.rss_key_len,
4616                 .queue_num = priv->reta_idx_n,
4617                 .key = priv->rss_conf.rss_key,
4618                 .queue = queue,
4619         };
4620         struct rte_flow_action actions[] = {
4621                 {
4622                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4623                         .conf = &action_rss,
4624                 },
4625                 {
4626                         .type = RTE_FLOW_ACTION_TYPE_END,
4627                 },
4628         };
4629         struct rte_flow *flow;
4630         struct rte_flow_error error;
4631         unsigned int i;
4632
4633         if (!priv->reta_idx_n || !priv->rxqs_n) {
4634                 return 0;
4635         }
4636         for (i = 0; i != priv->reta_idx_n; ++i)
4637                 queue[i] = (*priv->reta_idx)[i];
4638         flow = flow_list_create(dev, &priv->ctrl_flows,
4639                                 &attr, items, actions, false, &error);
4640         if (!flow)
4641                 return -rte_errno;
4642         return 0;
4643 }
4644
4645 /**
4646  * Enable a flow control configured from the control plane.
4647  *
4648  * @param dev
4649  *   Pointer to Ethernet device.
4650  * @param eth_spec
4651  *   An Ethernet flow spec to apply.
4652  * @param eth_mask
4653  *   An Ethernet flow mask to apply.
4654  *
4655  * @return
4656  *   0 on success, a negative errno value otherwise and rte_errno is set.
4657  */
4658 int
4659 mlx5_ctrl_flow(struct rte_eth_dev *dev,
4660                struct rte_flow_item_eth *eth_spec,
4661                struct rte_flow_item_eth *eth_mask)
4662 {
4663         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
4664 }
4665
4666 /**
4667  * Destroy a flow.
4668  *
4669  * @see rte_flow_destroy()
4670  * @see rte_flow_ops
4671  */
4672 int
4673 mlx5_flow_destroy(struct rte_eth_dev *dev,
4674                   struct rte_flow *flow,
4675                   struct rte_flow_error *error __rte_unused)
4676 {
4677         struct mlx5_priv *priv = dev->data->dev_private;
4678
4679         flow_list_destroy(dev, &priv->flows, flow);
4680         return 0;
4681 }
4682
4683 /**
4684  * Destroy all flows.
4685  *
4686  * @see rte_flow_flush()
4687  * @see rte_flow_ops
4688  */
4689 int
4690 mlx5_flow_flush(struct rte_eth_dev *dev,
4691                 struct rte_flow_error *error __rte_unused)
4692 {
4693         struct mlx5_priv *priv = dev->data->dev_private;
4694
4695         mlx5_flow_list_flush(dev, &priv->flows);
4696         return 0;
4697 }
4698
4699 /**
4700  * Isolated mode.
4701  *
4702  * @see rte_flow_isolate()
4703  * @see rte_flow_ops
4704  */
4705 int
4706 mlx5_flow_isolate(struct rte_eth_dev *dev,
4707                   int enable,
4708                   struct rte_flow_error *error)
4709 {
4710         struct mlx5_priv *priv = dev->data->dev_private;
4711
4712         if (dev->data->dev_started) {
4713                 rte_flow_error_set(error, EBUSY,
4714                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4715                                    NULL,
4716                                    "port must be stopped first");
4717                 return -rte_errno;
4718         }
4719         priv->isolated = !!enable;
4720         if (enable)
4721                 dev->dev_ops = &mlx5_dev_ops_isolate;
4722         else
4723                 dev->dev_ops = &mlx5_dev_ops;
4724         return 0;
4725 }
4726
4727 /**
4728  * Query a flow.
4729  *
4730  * @see rte_flow_query()
4731  * @see rte_flow_ops
4732  */
4733 static int
4734 flow_drv_query(struct rte_eth_dev *dev,
4735                struct rte_flow *flow,
4736                const struct rte_flow_action *actions,
4737                void *data,
4738                struct rte_flow_error *error)
4739 {
4740         const struct mlx5_flow_driver_ops *fops;
4741         enum mlx5_flow_drv_type ftype = flow->drv_type;
4742
4743         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
4744         fops = flow_get_drv_ops(ftype);
4745
4746         return fops->query(dev, flow, actions, data, error);
4747 }
4748
4749 /**
4750  * Query a flow.
4751  *
4752  * @see rte_flow_query()
4753  * @see rte_flow_ops
4754  */
4755 int
4756 mlx5_flow_query(struct rte_eth_dev *dev,
4757                 struct rte_flow *flow,
4758                 const struct rte_flow_action *actions,
4759                 void *data,
4760                 struct rte_flow_error *error)
4761 {
4762         int ret;
4763
4764         ret = flow_drv_query(dev, flow, actions, data, error);
4765         if (ret < 0)
4766                 return ret;
4767         return 0;
4768 }
4769
4770 /**
4771  * Convert a flow director filter to a generic flow.
4772  *
4773  * @param dev
4774  *   Pointer to Ethernet device.
4775  * @param fdir_filter
4776  *   Flow director filter to add.
4777  * @param attributes
4778  *   Generic flow parameters structure.
4779  *
4780  * @return
4781  *   0 on success, a negative errno value otherwise and rte_errno is set.
4782  */
4783 static int
4784 flow_fdir_filter_convert(struct rte_eth_dev *dev,
4785                          const struct rte_eth_fdir_filter *fdir_filter,
4786                          struct mlx5_fdir *attributes)
4787 {
4788         struct mlx5_priv *priv = dev->data->dev_private;
4789         const struct rte_eth_fdir_input *input = &fdir_filter->input;
4790         const struct rte_eth_fdir_masks *mask =
4791                 &dev->data->dev_conf.fdir_conf.mask;
4792
4793         /* Validate queue number. */
4794         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
4795                 DRV_LOG(ERR, "port %u invalid queue number %d",
4796                         dev->data->port_id, fdir_filter->action.rx_queue);
4797                 rte_errno = EINVAL;
4798                 return -rte_errno;
4799         }
4800         attributes->attr.ingress = 1;
4801         attributes->items[0] = (struct rte_flow_item) {
4802                 .type = RTE_FLOW_ITEM_TYPE_ETH,
4803                 .spec = &attributes->l2,
4804                 .mask = &attributes->l2_mask,
4805         };
4806         switch (fdir_filter->action.behavior) {
4807         case RTE_ETH_FDIR_ACCEPT:
4808                 attributes->actions[0] = (struct rte_flow_action){
4809                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
4810                         .conf = &attributes->queue,
4811                 };
4812                 break;
4813         case RTE_ETH_FDIR_REJECT:
4814                 attributes->actions[0] = (struct rte_flow_action){
4815                         .type = RTE_FLOW_ACTION_TYPE_DROP,
4816                 };
4817                 break;
4818         default:
4819                 DRV_LOG(ERR, "port %u invalid behavior %d",
4820                         dev->data->port_id,
4821                         fdir_filter->action.behavior);
4822                 rte_errno = ENOTSUP;
4823                 return -rte_errno;
4824         }
4825         attributes->queue.index = fdir_filter->action.rx_queue;
4826         /* Handle L3. */
4827         switch (fdir_filter->input.flow_type) {
4828         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4829         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4830         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4831                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
4832                         .src_addr = input->flow.ip4_flow.src_ip,
4833                         .dst_addr = input->flow.ip4_flow.dst_ip,
4834                         .time_to_live = input->flow.ip4_flow.ttl,
4835                         .type_of_service = input->flow.ip4_flow.tos,
4836                 };
4837                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
4838                         .src_addr = mask->ipv4_mask.src_ip,
4839                         .dst_addr = mask->ipv4_mask.dst_ip,
4840                         .time_to_live = mask->ipv4_mask.ttl,
4841                         .type_of_service = mask->ipv4_mask.tos,
4842                         .next_proto_id = mask->ipv4_mask.proto,
4843                 };
4844                 attributes->items[1] = (struct rte_flow_item){
4845                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
4846                         .spec = &attributes->l3,
4847                         .mask = &attributes->l3_mask,
4848                 };
4849                 break;
4850         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4851         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4852         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4853                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
4854                         .hop_limits = input->flow.ipv6_flow.hop_limits,
4855                         .proto = input->flow.ipv6_flow.proto,
4856                 };
4857
4858                 memcpy(attributes->l3.ipv6.hdr.src_addr,
4859                        input->flow.ipv6_flow.src_ip,
4860                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4861                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
4862                        input->flow.ipv6_flow.dst_ip,
4863                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4864                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
4865                        mask->ipv6_mask.src_ip,
4866                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4867                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
4868                        mask->ipv6_mask.dst_ip,
4869                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4870                 attributes->items[1] = (struct rte_flow_item){
4871                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
4872                         .spec = &attributes->l3,
4873                         .mask = &attributes->l3_mask,
4874                 };
4875                 break;
4876         default:
4877                 DRV_LOG(ERR, "port %u invalid flow type%d",
4878                         dev->data->port_id, fdir_filter->input.flow_type);
4879                 rte_errno = ENOTSUP;
4880                 return -rte_errno;
4881         }
4882         /* Handle L4. */
4883         switch (fdir_filter->input.flow_type) {
4884         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4885                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4886                         .src_port = input->flow.udp4_flow.src_port,
4887                         .dst_port = input->flow.udp4_flow.dst_port,
4888                 };
4889                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4890                         .src_port = mask->src_port_mask,
4891                         .dst_port = mask->dst_port_mask,
4892                 };
4893                 attributes->items[2] = (struct rte_flow_item){
4894                         .type = RTE_FLOW_ITEM_TYPE_UDP,
4895                         .spec = &attributes->l4,
4896                         .mask = &attributes->l4_mask,
4897                 };
4898                 break;
4899         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4900                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4901                         .src_port = input->flow.tcp4_flow.src_port,
4902                         .dst_port = input->flow.tcp4_flow.dst_port,
4903                 };
4904                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4905                         .src_port = mask->src_port_mask,
4906                         .dst_port = mask->dst_port_mask,
4907                 };
4908                 attributes->items[2] = (struct rte_flow_item){
4909                         .type = RTE_FLOW_ITEM_TYPE_TCP,
4910                         .spec = &attributes->l4,
4911                         .mask = &attributes->l4_mask,
4912                 };
4913                 break;
4914         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4915                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4916                         .src_port = input->flow.udp6_flow.src_port,
4917                         .dst_port = input->flow.udp6_flow.dst_port,
4918                 };
4919                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4920                         .src_port = mask->src_port_mask,
4921                         .dst_port = mask->dst_port_mask,
4922                 };
4923                 attributes->items[2] = (struct rte_flow_item){
4924                         .type = RTE_FLOW_ITEM_TYPE_UDP,
4925                         .spec = &attributes->l4,
4926                         .mask = &attributes->l4_mask,
4927                 };
4928                 break;
4929         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4930                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4931                         .src_port = input->flow.tcp6_flow.src_port,
4932                         .dst_port = input->flow.tcp6_flow.dst_port,
4933                 };
4934                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4935                         .src_port = mask->src_port_mask,
4936                         .dst_port = mask->dst_port_mask,
4937                 };
4938                 attributes->items[2] = (struct rte_flow_item){
4939                         .type = RTE_FLOW_ITEM_TYPE_TCP,
4940                         .spec = &attributes->l4,
4941                         .mask = &attributes->l4_mask,
4942                 };
4943                 break;
4944         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4945         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4946                 break;
4947         default:
4948                 DRV_LOG(ERR, "port %u invalid flow type%d",
4949                         dev->data->port_id, fdir_filter->input.flow_type);
4950                 rte_errno = ENOTSUP;
4951                 return -rte_errno;
4952         }
4953         return 0;
4954 }
4955
4956 #define FLOW_FDIR_CMP(f1, f2, fld) \
4957         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
4958
4959 /**
4960  * Compare two FDIR flows. If items and actions are identical, the two flows are
4961  * regarded as same.
4962  *
4963  * @param dev
4964  *   Pointer to Ethernet device.
4965  * @param f1
4966  *   FDIR flow to compare.
4967  * @param f2
4968  *   FDIR flow to compare.
4969  *
4970  * @return
4971  *   Zero on match, 1 otherwise.
4972  */
4973 static int
4974 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
4975 {
4976         if (FLOW_FDIR_CMP(f1, f2, attr) ||
4977             FLOW_FDIR_CMP(f1, f2, l2) ||
4978             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
4979             FLOW_FDIR_CMP(f1, f2, l3) ||
4980             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
4981             FLOW_FDIR_CMP(f1, f2, l4) ||
4982             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
4983             FLOW_FDIR_CMP(f1, f2, actions[0].type))
4984                 return 1;
4985         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
4986             FLOW_FDIR_CMP(f1, f2, queue))
4987                 return 1;
4988         return 0;
4989 }
4990
4991 /**
4992  * Search device flow list to find out a matched FDIR flow.
4993  *
4994  * @param dev
4995  *   Pointer to Ethernet device.
4996  * @param fdir_flow
4997  *   FDIR flow to lookup.
4998  *
4999  * @return
5000  *   Pointer of flow if found, NULL otherwise.
5001  */
5002 static struct rte_flow *
5003 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
5004 {
5005         struct mlx5_priv *priv = dev->data->dev_private;
5006         struct rte_flow *flow = NULL;
5007
5008         MLX5_ASSERT(fdir_flow);
5009         TAILQ_FOREACH(flow, &priv->flows, next) {
5010                 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
5011                         DRV_LOG(DEBUG, "port %u found FDIR flow %p",
5012                                 dev->data->port_id, (void *)flow);
5013                         break;
5014                 }
5015         }
5016         return flow;
5017 }
5018
5019 /**
5020  * Add new flow director filter and store it in list.
5021  *
5022  * @param dev
5023  *   Pointer to Ethernet device.
5024  * @param fdir_filter
5025  *   Flow director filter to add.
5026  *
5027  * @return
5028  *   0 on success, a negative errno value otherwise and rte_errno is set.
5029  */
5030 static int
5031 flow_fdir_filter_add(struct rte_eth_dev *dev,
5032                      const struct rte_eth_fdir_filter *fdir_filter)
5033 {
5034         struct mlx5_priv *priv = dev->data->dev_private;
5035         struct mlx5_fdir *fdir_flow;
5036         struct rte_flow *flow;
5037         int ret;
5038
5039         fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
5040         if (!fdir_flow) {
5041                 rte_errno = ENOMEM;
5042                 return -rte_errno;
5043         }
5044         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
5045         if (ret)
5046                 goto error;
5047         flow = flow_fdir_filter_lookup(dev, fdir_flow);
5048         if (flow) {
5049                 rte_errno = EEXIST;
5050                 goto error;
5051         }
5052         flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
5053                                 fdir_flow->items, fdir_flow->actions, true,
5054                                 NULL);
5055         if (!flow)
5056                 goto error;
5057         MLX5_ASSERT(!flow->fdir);
5058         flow->fdir = fdir_flow;
5059         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
5060                 dev->data->port_id, (void *)flow);
5061         return 0;
5062 error:
5063         rte_free(fdir_flow);
5064         return -rte_errno;
5065 }
5066
5067 /**
5068  * Delete specific filter.
5069  *
5070  * @param dev
5071  *   Pointer to Ethernet device.
5072  * @param fdir_filter
5073  *   Filter to be deleted.
5074  *
5075  * @return
5076  *   0 on success, a negative errno value otherwise and rte_errno is set.
5077  */
5078 static int
5079 flow_fdir_filter_delete(struct rte_eth_dev *dev,
5080                         const struct rte_eth_fdir_filter *fdir_filter)
5081 {
5082         struct mlx5_priv *priv = dev->data->dev_private;
5083         struct rte_flow *flow;
5084         struct mlx5_fdir fdir_flow = {
5085                 .attr.group = 0,
5086         };
5087         int ret;
5088
5089         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
5090         if (ret)
5091                 return -rte_errno;
5092         flow = flow_fdir_filter_lookup(dev, &fdir_flow);
5093         if (!flow) {
5094                 rte_errno = ENOENT;
5095                 return -rte_errno;
5096         }
5097         flow_list_destroy(dev, &priv->flows, flow);
5098         DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
5099                 dev->data->port_id, (void *)flow);
5100         return 0;
5101 }
5102
5103 /**
5104  * Update queue for specific filter.
5105  *
5106  * @param dev
5107  *   Pointer to Ethernet device.
5108  * @param fdir_filter
5109  *   Filter to be updated.
5110  *
5111  * @return
5112  *   0 on success, a negative errno value otherwise and rte_errno is set.
5113  */
5114 static int
5115 flow_fdir_filter_update(struct rte_eth_dev *dev,
5116                         const struct rte_eth_fdir_filter *fdir_filter)
5117 {
5118         int ret;
5119
5120         ret = flow_fdir_filter_delete(dev, fdir_filter);
5121         if (ret)
5122                 return ret;
5123         return flow_fdir_filter_add(dev, fdir_filter);
5124 }
5125
5126 /**
5127  * Flush all filters.
5128  *
5129  * @param dev
5130  *   Pointer to Ethernet device.
5131  */
5132 static void
5133 flow_fdir_filter_flush(struct rte_eth_dev *dev)
5134 {
5135         struct mlx5_priv *priv = dev->data->dev_private;
5136
5137         mlx5_flow_list_flush(dev, &priv->flows);
5138 }
5139
5140 /**
5141  * Get flow director information.
5142  *
5143  * @param dev
5144  *   Pointer to Ethernet device.
5145  * @param[out] fdir_info
5146  *   Resulting flow director information.
5147  */
5148 static void
5149 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
5150 {
5151         struct rte_eth_fdir_masks *mask =
5152                 &dev->data->dev_conf.fdir_conf.mask;
5153
5154         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
5155         fdir_info->guarant_spc = 0;
5156         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
5157         fdir_info->max_flexpayload = 0;
5158         fdir_info->flow_types_mask[0] = 0;
5159         fdir_info->flex_payload_unit = 0;
5160         fdir_info->max_flex_payload_segment_num = 0;
5161         fdir_info->flex_payload_limit = 0;
5162         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
5163 }
5164
5165 /**
5166  * Deal with flow director operations.
5167  *
5168  * @param dev
5169  *   Pointer to Ethernet device.
5170  * @param filter_op
5171  *   Operation to perform.
5172  * @param arg
5173  *   Pointer to operation-specific structure.
5174  *
5175  * @return
5176  *   0 on success, a negative errno value otherwise and rte_errno is set.
5177  */
5178 static int
5179 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
5180                     void *arg)
5181 {
5182         enum rte_fdir_mode fdir_mode =
5183                 dev->data->dev_conf.fdir_conf.mode;
5184
5185         if (filter_op == RTE_ETH_FILTER_NOP)
5186                 return 0;
5187         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
5188             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
5189                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
5190                         dev->data->port_id, fdir_mode);
5191                 rte_errno = EINVAL;
5192                 return -rte_errno;
5193         }
5194         switch (filter_op) {
5195         case RTE_ETH_FILTER_ADD:
5196                 return flow_fdir_filter_add(dev, arg);
5197         case RTE_ETH_FILTER_UPDATE:
5198                 return flow_fdir_filter_update(dev, arg);
5199         case RTE_ETH_FILTER_DELETE:
5200                 return flow_fdir_filter_delete(dev, arg);
5201         case RTE_ETH_FILTER_FLUSH:
5202                 flow_fdir_filter_flush(dev);
5203                 break;
5204         case RTE_ETH_FILTER_INFO:
5205                 flow_fdir_info_get(dev, arg);
5206                 break;
5207         default:
5208                 DRV_LOG(DEBUG, "port %u unknown operation %u",
5209                         dev->data->port_id, filter_op);
5210                 rte_errno = EINVAL;
5211                 return -rte_errno;
5212         }
5213         return 0;
5214 }
5215
5216 /**
5217  * Manage filter operations.
5218  *
5219  * @param dev
5220  *   Pointer to Ethernet device structure.
5221  * @param filter_type
5222  *   Filter type.
5223  * @param filter_op
5224  *   Operation to perform.
5225  * @param arg
5226  *   Pointer to operation-specific structure.
5227  *
5228  * @return
5229  *   0 on success, a negative errno value otherwise and rte_errno is set.
5230  */
5231 int
5232 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
5233                      enum rte_filter_type filter_type,
5234                      enum rte_filter_op filter_op,
5235                      void *arg)
5236 {
5237         switch (filter_type) {
5238         case RTE_ETH_FILTER_GENERIC:
5239                 if (filter_op != RTE_ETH_FILTER_GET) {
5240                         rte_errno = EINVAL;
5241                         return -rte_errno;
5242                 }
5243                 *(const void **)arg = &mlx5_flow_ops;
5244                 return 0;
5245         case RTE_ETH_FILTER_FDIR:
5246                 return flow_fdir_ctrl_func(dev, filter_op, arg);
5247         default:
5248                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
5249                         dev->data->port_id, filter_type);
5250                 rte_errno = ENOTSUP;
5251                 return -rte_errno;
5252         }
5253         return 0;
5254 }
5255
5256 /**
5257  * Create the needed meter and suffix tables.
5258  *
5259  * @param[in] dev
5260  *   Pointer to Ethernet device.
5261  * @param[in] fm
5262  *   Pointer to the flow meter.
5263  *
5264  * @return
5265  *   Pointer to table set on success, NULL otherwise.
5266  */
5267 struct mlx5_meter_domains_infos *
5268 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
5269                           const struct mlx5_flow_meter *fm)
5270 {
5271         const struct mlx5_flow_driver_ops *fops;
5272
5273         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5274         return fops->create_mtr_tbls(dev, fm);
5275 }
5276
5277 /**
5278  * Destroy the meter table set.
5279  *
5280  * @param[in] dev
5281  *   Pointer to Ethernet device.
5282  * @param[in] tbl
5283  *   Pointer to the meter table set.
5284  *
5285  * @return
5286  *   0 on success.
5287  */
5288 int
5289 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
5290                            struct mlx5_meter_domains_infos *tbls)
5291 {
5292         const struct mlx5_flow_driver_ops *fops;
5293
5294         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5295         return fops->destroy_mtr_tbls(dev, tbls);
5296 }
5297
5298 /**
5299  * Create policer rules.
5300  *
5301  * @param[in] dev
5302  *   Pointer to Ethernet device.
5303  * @param[in] fm
5304  *   Pointer to flow meter structure.
5305  * @param[in] attr
5306  *   Pointer to flow attributes.
5307  *
5308  * @return
5309  *   0 on success, -1 otherwise.
5310  */
5311 int
5312 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
5313                                struct mlx5_flow_meter *fm,
5314                                const struct rte_flow_attr *attr)
5315 {
5316         const struct mlx5_flow_driver_ops *fops;
5317
5318         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5319         return fops->create_policer_rules(dev, fm, attr);
5320 }
5321
5322 /**
5323  * Destroy policer rules.
5324  *
5325  * @param[in] fm
5326  *   Pointer to flow meter structure.
5327  * @param[in] attr
5328  *   Pointer to flow attributes.
5329  *
5330  * @return
5331  *   0 on success, -1 otherwise.
5332  */
5333 int
5334 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
5335                                 struct mlx5_flow_meter *fm,
5336                                 const struct rte_flow_attr *attr)
5337 {
5338         const struct mlx5_flow_driver_ops *fops;
5339
5340         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5341         return fops->destroy_policer_rules(dev, fm, attr);
5342 }
5343
5344 /**
5345  * Allocate a counter.
5346  *
5347  * @param[in] dev
5348  *   Pointer to Ethernet device structure.
5349  *
5350  * @return
5351  *   Pointer to allocated counter  on success, NULL otherwise.
5352  */
5353 struct mlx5_flow_counter *
5354 mlx5_counter_alloc(struct rte_eth_dev *dev)
5355 {
5356         const struct mlx5_flow_driver_ops *fops;
5357         struct rte_flow_attr attr = { .transfer = 0 };
5358
5359         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5360                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5361                 return fops->counter_alloc(dev);
5362         }
5363         DRV_LOG(ERR,
5364                 "port %u counter allocate is not supported.",
5365                  dev->data->port_id);
5366         return NULL;
5367 }
5368
5369 /**
5370  * Free a counter.
5371  *
5372  * @param[in] dev
5373  *   Pointer to Ethernet device structure.
5374  * @param[in] cnt
5375  *   Pointer to counter to be free.
5376  */
5377 void
5378 mlx5_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
5379 {
5380         const struct mlx5_flow_driver_ops *fops;
5381         struct rte_flow_attr attr = { .transfer = 0 };
5382
5383         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5384                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5385                 fops->counter_free(dev, cnt);
5386                 return;
5387         }
5388         DRV_LOG(ERR,
5389                 "port %u counter free is not supported.",
5390                  dev->data->port_id);
5391 }
5392
5393 /**
5394  * Query counter statistics.
5395  *
5396  * @param[in] dev
5397  *   Pointer to Ethernet device structure.
5398  * @param[in] cnt
5399  *   Pointer to counter to query.
5400  * @param[in] clear
5401  *   Set to clear counter statistics.
5402  * @param[out] pkts
5403  *   The counter hits packets number to save.
5404  * @param[out] bytes
5405  *   The counter hits bytes number to save.
5406  *
5407  * @return
5408  *   0 on success, a negative errno value otherwise.
5409  */
5410 int
5411 mlx5_counter_query(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt,
5412                    bool clear, uint64_t *pkts, uint64_t *bytes)
5413 {
5414         const struct mlx5_flow_driver_ops *fops;
5415         struct rte_flow_attr attr = { .transfer = 0 };
5416
5417         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5418                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5419                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
5420         }
5421         DRV_LOG(ERR,
5422                 "port %u counter query is not supported.",
5423                  dev->data->port_id);
5424         return -ENOTSUP;
5425 }
5426
5427 #define MLX5_POOL_QUERY_FREQ_US 1000000
5428
5429 /**
5430  * Set the periodic procedure for triggering asynchronous batch queries for all
5431  * the counter pools.
5432  *
5433  * @param[in] sh
5434  *   Pointer to mlx5_ibv_shared object.
5435  */
5436 void
5437 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
5438 {
5439         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
5440         uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
5441         uint32_t us;
5442
5443         cont = MLX5_CNT_CONTAINER(sh, 1, 0);
5444         pools_n += rte_atomic16_read(&cont->n_valid);
5445         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
5446         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
5447         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
5448                 sh->cmng.query_thread_on = 0;
5449                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
5450         } else {
5451                 sh->cmng.query_thread_on = 1;
5452         }
5453 }
5454
5455 /**
5456  * The periodic procedure for triggering asynchronous batch queries for all the
5457  * counter pools. This function is probably called by the host thread.
5458  *
5459  * @param[in] arg
5460  *   The parameter for the alarm process.
5461  */
5462 void
5463 mlx5_flow_query_alarm(void *arg)
5464 {
5465         struct mlx5_ibv_shared *sh = arg;
5466         struct mlx5_devx_obj *dcs;
5467         uint16_t offset;
5468         int ret;
5469         uint8_t batch = sh->cmng.batch;
5470         uint16_t pool_index = sh->cmng.pool_index;
5471         struct mlx5_pools_container *cont;
5472         struct mlx5_pools_container *mcont;
5473         struct mlx5_flow_counter_pool *pool;
5474
5475         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
5476                 goto set_alarm;
5477 next_container:
5478         cont = MLX5_CNT_CONTAINER(sh, batch, 1);
5479         mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
5480         /* Check if resize was done and need to flip a container. */
5481         if (cont != mcont) {
5482                 if (cont->pools) {
5483                         /* Clean the old container. */
5484                         rte_free(cont->pools);
5485                         memset(cont, 0, sizeof(*cont));
5486                 }
5487                 rte_cio_wmb();
5488                  /* Flip the host container. */
5489                 sh->cmng.mhi[batch] ^= (uint8_t)2;
5490                 cont = mcont;
5491         }
5492         if (!cont->pools) {
5493                 /* 2 empty containers case is unexpected. */
5494                 if (unlikely(batch != sh->cmng.batch))
5495                         goto set_alarm;
5496                 batch ^= 0x1;
5497                 pool_index = 0;
5498                 goto next_container;
5499         }
5500         pool = cont->pools[pool_index];
5501         if (pool->raw_hw)
5502                 /* There is a pool query in progress. */
5503                 goto set_alarm;
5504         pool->raw_hw =
5505                 LIST_FIRST(&sh->cmng.free_stat_raws);
5506         if (!pool->raw_hw)
5507                 /* No free counter statistics raw memory. */
5508                 goto set_alarm;
5509         dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
5510                                                               (&pool->a64_dcs);
5511         offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
5512         ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
5513                                                offset, NULL, NULL,
5514                                                pool->raw_hw->mem_mng->dm->id,
5515                                                (void *)(uintptr_t)
5516                                                (pool->raw_hw->data + offset),
5517                                                sh->devx_comp,
5518                                                (uint64_t)(uintptr_t)pool);
5519         if (ret) {
5520                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
5521                         " %d", pool->min_dcs->id);
5522                 pool->raw_hw = NULL;
5523                 goto set_alarm;
5524         }
5525         pool->raw_hw->min_dcs_id = dcs->id;
5526         LIST_REMOVE(pool->raw_hw, next);
5527         sh->cmng.pending_queries++;
5528         pool_index++;
5529         if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
5530                 batch ^= 0x1;
5531                 pool_index = 0;
5532         }
5533 set_alarm:
5534         sh->cmng.batch = batch;
5535         sh->cmng.pool_index = pool_index;
5536         mlx5_set_query_alarm(sh);
5537 }
5538
5539 /**
5540  * Handler for the HW respond about ready values from an asynchronous batch
5541  * query. This function is probably called by the host thread.
5542  *
5543  * @param[in] sh
5544  *   The pointer to the shared IB device context.
5545  * @param[in] async_id
5546  *   The Devx async ID.
5547  * @param[in] status
5548  *   The status of the completion.
5549  */
5550 void
5551 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
5552                                   uint64_t async_id, int status)
5553 {
5554         struct mlx5_flow_counter_pool *pool =
5555                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
5556         struct mlx5_counter_stats_raw *raw_to_free;
5557
5558         if (unlikely(status)) {
5559                 raw_to_free = pool->raw_hw;
5560         } else {
5561                 raw_to_free = pool->raw;
5562                 rte_spinlock_lock(&pool->sl);
5563                 pool->raw = pool->raw_hw;
5564                 rte_spinlock_unlock(&pool->sl);
5565                 rte_atomic64_add(&pool->query_gen, 1);
5566                 /* Be sure the new raw counters data is updated in memory. */
5567                 rte_cio_wmb();
5568         }
5569         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
5570         pool->raw_hw = NULL;
5571         sh->cmng.pending_queries--;
5572 }
5573
5574 /**
5575  * Translate the rte_flow group index to HW table value.
5576  *
5577  * @param[in] attributes
5578  *   Pointer to flow attributes
5579  * @param[in] external
5580  *   Value is part of flow rule created by request external to PMD.
5581  * @param[in] group
5582  *   rte_flow group index value.
5583  * @param[out] fdb_def_rule
5584  *   Whether fdb jump to table 1 is configured.
5585  * @param[out] table
5586  *   HW table value.
5587  * @param[out] error
5588  *   Pointer to error structure.
5589  *
5590  * @return
5591  *   0 on success, a negative errno value otherwise and rte_errno is set.
5592  */
5593 int
5594 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
5595                          uint32_t group, bool fdb_def_rule, uint32_t *table,
5596                          struct rte_flow_error *error)
5597 {
5598         if (attributes->transfer && external && fdb_def_rule) {
5599                 if (group == UINT32_MAX)
5600                         return rte_flow_error_set
5601                                                 (error, EINVAL,
5602                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
5603                                                  NULL,
5604                                                  "group index not supported");
5605                 *table = group + 1;
5606         } else {
5607                 *table = group;
5608         }
5609         return 0;
5610 }
5611
5612 /**
5613  * Discover availability of metadata reg_c's.
5614  *
5615  * Iteratively use test flows to check availability.
5616  *
5617  * @param[in] dev
5618  *   Pointer to the Ethernet device structure.
5619  *
5620  * @return
5621  *   0 on success, a negative errno value otherwise and rte_errno is set.
5622  */
5623 int
5624 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
5625 {
5626         struct mlx5_priv *priv = dev->data->dev_private;
5627         struct mlx5_dev_config *config = &priv->config;
5628         enum modify_reg idx;
5629         int n = 0;
5630
5631         /* reg_c[0] and reg_c[1] are reserved. */
5632         config->flow_mreg_c[n++] = REG_C_0;
5633         config->flow_mreg_c[n++] = REG_C_1;
5634         /* Discover availability of other reg_c's. */
5635         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
5636                 struct rte_flow_attr attr = {
5637                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5638                         .priority = MLX5_FLOW_PRIO_RSVD,
5639                         .ingress = 1,
5640                 };
5641                 struct rte_flow_item items[] = {
5642                         [0] = {
5643                                 .type = RTE_FLOW_ITEM_TYPE_END,
5644                         },
5645                 };
5646                 struct rte_flow_action actions[] = {
5647                         [0] = {
5648                                 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5649                                 .conf = &(struct mlx5_flow_action_copy_mreg){
5650                                         .src = REG_C_1,
5651                                         .dst = idx,
5652                                 },
5653                         },
5654                         [1] = {
5655                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5656                                 .conf = &(struct rte_flow_action_jump){
5657                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5658                                 },
5659                         },
5660                         [2] = {
5661                                 .type = RTE_FLOW_ACTION_TYPE_END,
5662                         },
5663                 };
5664                 struct rte_flow *flow;
5665                 struct rte_flow_error error;
5666
5667                 if (!config->dv_flow_en)
5668                         break;
5669                 /* Create internal flow, validation skips copy action. */
5670                 flow = flow_list_create(dev, NULL, &attr, items,
5671                                         actions, false, &error);
5672                 if (!flow)
5673                         continue;
5674                 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
5675                         config->flow_mreg_c[n++] = idx;
5676                 flow_list_destroy(dev, NULL, flow);
5677         }
5678         for (; n < MLX5_MREG_C_NUM; ++n)
5679                 config->flow_mreg_c[n] = REG_NONE;
5680         return 0;
5681 }
5682
5683 /**
5684  * Dump flow raw hw data to file
5685  *
5686  * @param[in] dev
5687  *    The pointer to Ethernet device.
5688  * @param[in] file
5689  *   A pointer to a file for output.
5690  * @param[out] error
5691  *   Perform verbose error reporting if not NULL. PMDs initialize this
5692  *   structure in case of error only.
5693  * @return
5694  *   0 on success, a nagative value otherwise.
5695  */
5696 int
5697 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
5698                    FILE *file,
5699                    struct rte_flow_error *error __rte_unused)
5700 {
5701         struct mlx5_priv *priv = dev->data->dev_private;
5702         struct mlx5_ibv_shared *sh = priv->sh;
5703
5704         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
5705                                        sh->tx_domain, file);
5706 }