drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rx.h"
  32 #include "mlx5_tx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              const struct mlx5_flow_tunnel *tunnel,
  54                              struct tunnel_default_miss_ctx *ctx,
  55                              struct rte_flow_error *error);
  56 static struct mlx5_flow_tunnel *
  57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  58 static void
  59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  60 static uint32_t
  61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  62                                 const struct mlx5_flow_tunnel *tunnel,
  63                                 uint32_t group, uint32_t *table,
  64                                 struct rte_flow_error *error);
  65
  66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  67 static void mlx5_flow_pop_thread_workspace(void);
  68
  69
  70 /** Device flow drivers. */
  71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  72
  73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  74
  75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  76         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  78         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  79 #endif
  80         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  81         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  82 };
  83
  84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  86         (const int []){ \
  87                 __VA_ARGS__, 0, \
  88         }
  89
  90 /** Node object of input graph for mlx5_flow_expand_rss(). */
  91 struct mlx5_flow_expand_node {
  92         const int *const next;
  93         /**<
  94          * List of next node indexes. Index 0 is interpreted as a terminator.
  95          */
  96         const enum rte_flow_item_type type;
  97         /**< Pattern item type of current node. */
  98         uint64_t rss_types;
  99         /**<
 100          * RSS types bit-field associated with this node
 101          * (see ETH_RSS_* definitions).
 102          */
 103         uint8_t optional;
 104         /**< optional expand field. Default 0 to expand, 1 not go deeper. */
 105 };
 106
 107 /** Object returned by mlx5_flow_expand_rss(). */
 108 struct mlx5_flow_expand_rss {
 109         uint32_t entries;
 110         /**< Number of entries @p patterns and @p priorities. */
 111         struct {
 112                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 113                 uint32_t priority; /**< Priority offset for each expansion. */
 114         } entry[];
 115 };
 116
 117 static void
 118 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
 119
 120 static bool
 121 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
 122 {
 123         switch (item->type) {
 124         case RTE_FLOW_ITEM_TYPE_ETH:
 125         case RTE_FLOW_ITEM_TYPE_VLAN:
 126         case RTE_FLOW_ITEM_TYPE_IPV4:
 127         case RTE_FLOW_ITEM_TYPE_IPV6:
 128         case RTE_FLOW_ITEM_TYPE_UDP:
 129         case RTE_FLOW_ITEM_TYPE_TCP:
 130         case RTE_FLOW_ITEM_TYPE_VXLAN:
 131         case RTE_FLOW_ITEM_TYPE_NVGRE:
 132         case RTE_FLOW_ITEM_TYPE_GRE:
 133         case RTE_FLOW_ITEM_TYPE_GENEVE:
 134         case RTE_FLOW_ITEM_TYPE_MPLS:
 135         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 136         case RTE_FLOW_ITEM_TYPE_GRE_KEY:
 137         case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
 138         case RTE_FLOW_ITEM_TYPE_GTP:
 139                 return true;
 140         default:
 141                 break;
 142         }
 143         return false;
 144 }
 145
 146 static enum rte_flow_item_type
 147 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 148 {
 149         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 150         uint16_t ether_type = 0;
 151         uint16_t ether_type_m;
 152         uint8_t ip_next_proto = 0;
 153         uint8_t ip_next_proto_m;
 154
 155         if (item == NULL || item->spec == NULL)
 156                 return ret;
 157         switch (item->type) {
 158         case RTE_FLOW_ITEM_TYPE_ETH:
 159                 if (item->mask)
 160                         ether_type_m = ((const struct rte_flow_item_eth *)
 161                                                 (item->mask))->type;
 162                 else
 163                         ether_type_m = rte_flow_item_eth_mask.type;
 164                 if (ether_type_m != RTE_BE16(0xFFFF))
 165                         break;
 166                 ether_type = ((const struct rte_flow_item_eth *)
 167                                 (item->spec))->type;
 168                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 169                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 170                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 171                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 172                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 173                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 174                 else
 175                         ret = RTE_FLOW_ITEM_TYPE_END;
 176                 break;
 177         case RTE_FLOW_ITEM_TYPE_VLAN:
 178                 if (item->mask)
 179                         ether_type_m = ((const struct rte_flow_item_vlan *)
 180                                                 (item->mask))->inner_type;
 181                 else
 182                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 183                 if (ether_type_m != RTE_BE16(0xFFFF))
 184                         break;
 185                 ether_type = ((const struct rte_flow_item_vlan *)
 186                                 (item->spec))->inner_type;
 187                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 188                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 189                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 190                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 191                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 192                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 193                 else
 194                         ret = RTE_FLOW_ITEM_TYPE_END;
 195                 break;
 196         case RTE_FLOW_ITEM_TYPE_IPV4:
 197                 if (item->mask)
 198                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 199                                         (item->mask))->hdr.next_proto_id;
 200                 else
 201                         ip_next_proto_m =
 202                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 203                 if (ip_next_proto_m != 0xFF)
 204                         break;
 205                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 206                                 (item->spec))->hdr.next_proto_id;
 207                 if (ip_next_proto == IPPROTO_UDP)
 208                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 209                 else if (ip_next_proto == IPPROTO_TCP)
 210                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 211                 else if (ip_next_proto == IPPROTO_IP)
 212                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 213                 else if (ip_next_proto == IPPROTO_IPV6)
 214                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 215                 else
 216                         ret = RTE_FLOW_ITEM_TYPE_END;
 217                 break;
 218         case RTE_FLOW_ITEM_TYPE_IPV6:
 219                 if (item->mask)
 220                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 221                                                 (item->mask))->hdr.proto;
 222                 else
 223                         ip_next_proto_m =
 224                                 rte_flow_item_ipv6_mask.hdr.proto;
 225                 if (ip_next_proto_m != 0xFF)
 226                         break;
 227                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 228                                 (item->spec))->hdr.proto;
 229                 if (ip_next_proto == IPPROTO_UDP)
 230                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 231                 else if (ip_next_proto == IPPROTO_TCP)
 232                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 233                 else if (ip_next_proto == IPPROTO_IP)
 234                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 235                 else if (ip_next_proto == IPPROTO_IPV6)
 236                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 237                 else
 238                         ret = RTE_FLOW_ITEM_TYPE_END;
 239                 break;
 240         default:
 241                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 242                 break;
 243         }
 244         return ret;
 245 }
 246
 247 #define MLX5_RSS_EXP_ELT_N 16
 248
 249 /**
 250  * Expand RSS flows into several possible flows according to the RSS hash
 251  * fields requested and the driver capabilities.
 252  *
 253  * @param[out] buf
 254  *   Buffer to store the result expansion.
 255  * @param[in] size
 256  *   Buffer size in bytes. If 0, @p buf can be NULL.
 257  * @param[in] pattern
 258  *   User flow pattern.
 259  * @param[in] types
 260  *   RSS types to expand (see ETH_RSS_* definitions).
 261  * @param[in] graph
 262  *   Input graph to expand @p pattern according to @p types.
 263  * @param[in] graph_root_index
 264  *   Index of root node in @p graph, typically 0.
 265  *
 266  * @return
 267  *   A positive value representing the size of @p buf in bytes regardless of
 268  *   @p size on success, a negative errno value otherwise and rte_errno is
 269  *   set, the following errors are defined:
 270  *
 271  *   -E2BIG: graph-depth @p graph is too deep.
 272  *   -EINVAL: @p size has not enough space for expanded pattern.
 273  */
 274 static int
 275 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 276                      const struct rte_flow_item *pattern, uint64_t types,
 277                      const struct mlx5_flow_expand_node graph[],
 278                      int graph_root_index)
 279 {
 280         const struct rte_flow_item *item;
 281         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 282         const int *next_node;
 283         const int *stack[MLX5_RSS_EXP_ELT_N];
 284         int stack_pos = 0;
 285         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 286         unsigned int i;
 287         size_t lsize;
 288         size_t user_pattern_size = 0;
 289         void *addr = NULL;
 290         const struct mlx5_flow_expand_node *next = NULL;
 291         struct rte_flow_item missed_item;
 292         int missed = 0;
 293         int elt = 0;
 294         const struct rte_flow_item *last_item = NULL;
 295
 296         memset(&missed_item, 0, sizeof(missed_item));
 297         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 298                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 299         if (lsize > size)
 300                 return -EINVAL;
 301         buf->entry[0].priority = 0;
 302         buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 303         buf->entries = 0;
 304         addr = buf->entry[0].pattern;
 305         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 306                 if (!mlx5_flow_is_rss_expandable_item(item)) {
 307                         user_pattern_size += sizeof(*item);
 308                         continue;
 309                 }
 310                 last_item = item;
 311                 for (i = 0; node->next && node->next[i]; ++i) {
 312                         next = &graph[node->next[i]];
 313                         if (next->type == item->type)
 314                                 break;
 315                 }
 316                 if (next)
 317                         node = next;
 318                 user_pattern_size += sizeof(*item);
 319         }
 320         user_pattern_size += sizeof(*item); /* Handle END item. */
 321         lsize += user_pattern_size;
 322         if (lsize > size)
 323                 return -EINVAL;
 324         /* Copy the user pattern in the first entry of the buffer. */
 325         rte_memcpy(addr, pattern, user_pattern_size);
 326         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 327         buf->entries = 1;
 328         /* Start expanding. */
 329         memset(flow_items, 0, sizeof(flow_items));
 330         user_pattern_size -= sizeof(*item);
 331         /*
 332          * Check if the last valid item has spec set, need complete pattern,
 333          * and the pattern can be used for expansion.
 334          */
 335         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 336         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 337                 /* Item type END indicates expansion is not required. */
 338                 return lsize;
 339         }
 340         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 341                 next = NULL;
 342                 missed = 1;
 343                 for (i = 0; node->next && node->next[i]; ++i) {
 344                         next = &graph[node->next[i]];
 345                         if (next->type == missed_item.type) {
 346                                 flow_items[0].type = missed_item.type;
 347                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 348                                 break;
 349                         }
 350                         next = NULL;
 351                 }
 352         }
 353         if (next && missed) {
 354                 elt = 2; /* missed item + item end. */
 355                 node = next;
 356                 lsize += elt * sizeof(*item) + user_pattern_size;
 357                 if (lsize > size)
 358                         return -EINVAL;
 359                 if (node->rss_types & types) {
 360                         buf->entry[buf->entries].priority = 1;
 361                         buf->entry[buf->entries].pattern = addr;
 362                         buf->entries++;
 363                         rte_memcpy(addr, buf->entry[0].pattern,
 364                                    user_pattern_size);
 365                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 366                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 367                         addr = (void *)(((uintptr_t)addr) +
 368                                         elt * sizeof(*item));
 369                 }
 370         }
 371         memset(flow_items, 0, sizeof(flow_items));
 372         next_node = node->next;
 373         stack[stack_pos] = next_node;
 374         node = next_node ? &graph[*next_node] : NULL;
 375         while (node) {
 376                 flow_items[stack_pos].type = node->type;
 377                 if (node->rss_types & types) {
 378                         size_t n;
 379                         /*
 380                          * compute the number of items to copy from the
 381                          * expansion and copy it.
 382                          * When the stack_pos is 0, there are 1 element in it,
 383                          * plus the addition END item.
 384                          */
 385                         elt = stack_pos + 2;
 386                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 387                         lsize += elt * sizeof(*item) + user_pattern_size;
 388                         if (lsize > size)
 389                                 return -EINVAL;
 390                         n = elt * sizeof(*item);
 391                         buf->entry[buf->entries].priority =
 392                                 stack_pos + 1 + missed;
 393                         buf->entry[buf->entries].pattern = addr;
 394                         buf->entries++;
 395                         rte_memcpy(addr, buf->entry[0].pattern,
 396                                    user_pattern_size);
 397                         addr = (void *)(((uintptr_t)addr) +
 398                                         user_pattern_size);
 399                         rte_memcpy(addr, &missed_item,
 400                                    missed * sizeof(*item));
 401                         addr = (void *)(((uintptr_t)addr) +
 402                                 missed * sizeof(*item));
 403                         rte_memcpy(addr, flow_items, n);
 404                         addr = (void *)(((uintptr_t)addr) + n);
 405                 }
 406                 /* Go deeper. */
 407                 if (!node->optional && node->next) {
 408                         next_node = node->next;
 409                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 410                                 rte_errno = E2BIG;
 411                                 return -rte_errno;
 412                         }
 413                         stack[stack_pos] = next_node;
 414                 } else if (*(next_node + 1)) {
 415                         /* Follow up with the next possibility. */
 416                         ++next_node;
 417                 } else {
 418                         /* Move to the next path. */
 419                         if (stack_pos)
 420                                 next_node = stack[--stack_pos];
 421                         next_node++;
 422                         stack[stack_pos] = next_node;
 423                 }
 424                 node = *next_node ? &graph[*next_node] : NULL;
 425         };
 426         return lsize;
 427 }
 428
 429 enum mlx5_expansion {
 430         MLX5_EXPANSION_ROOT,
 431         MLX5_EXPANSION_ROOT_OUTER,
 432         MLX5_EXPANSION_ROOT_ETH_VLAN,
 433         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 434         MLX5_EXPANSION_OUTER_ETH,
 435         MLX5_EXPANSION_OUTER_ETH_VLAN,
 436         MLX5_EXPANSION_OUTER_VLAN,
 437         MLX5_EXPANSION_OUTER_IPV4,
 438         MLX5_EXPANSION_OUTER_IPV4_UDP,
 439         MLX5_EXPANSION_OUTER_IPV4_TCP,
 440         MLX5_EXPANSION_OUTER_IPV6,
 441         MLX5_EXPANSION_OUTER_IPV6_UDP,
 442         MLX5_EXPANSION_OUTER_IPV6_TCP,
 443         MLX5_EXPANSION_VXLAN,
 444         MLX5_EXPANSION_VXLAN_GPE,
 445         MLX5_EXPANSION_GRE,
 446         MLX5_EXPANSION_NVGRE,
 447         MLX5_EXPANSION_GRE_KEY,
 448         MLX5_EXPANSION_MPLS,
 449         MLX5_EXPANSION_ETH,
 450         MLX5_EXPANSION_ETH_VLAN,
 451         MLX5_EXPANSION_VLAN,
 452         MLX5_EXPANSION_IPV4,
 453         MLX5_EXPANSION_IPV4_UDP,
 454         MLX5_EXPANSION_IPV4_TCP,
 455         MLX5_EXPANSION_IPV6,
 456         MLX5_EXPANSION_IPV6_UDP,
 457         MLX5_EXPANSION_IPV6_TCP,
 458         MLX5_EXPANSION_IPV6_FRAG_EXT,
 459         MLX5_EXPANSION_GTP
 460 };
 461
 462 /** Supported expansion of items. */
 463 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 464         [MLX5_EXPANSION_ROOT] = {
 465                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 466                                                   MLX5_EXPANSION_IPV4,
 467                                                   MLX5_EXPANSION_IPV6),
 468                 .type = RTE_FLOW_ITEM_TYPE_END,
 469         },
 470         [MLX5_EXPANSION_ROOT_OUTER] = {
 471                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 472                                                   MLX5_EXPANSION_OUTER_IPV4,
 473                                                   MLX5_EXPANSION_OUTER_IPV6),
 474                 .type = RTE_FLOW_ITEM_TYPE_END,
 475         },
 476         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 477                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 478                 .type = RTE_FLOW_ITEM_TYPE_END,
 479         },
 480         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 481                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 482                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 483                 .type = RTE_FLOW_ITEM_TYPE_END,
 484         },
 485         [MLX5_EXPANSION_OUTER_ETH] = {
 486                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 487                                                   MLX5_EXPANSION_OUTER_IPV6),
 488                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 489                 .rss_types = 0,
 490         },
 491         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 492                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 493                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 494                 .rss_types = 0,
 495         },
 496         [MLX5_EXPANSION_OUTER_VLAN] = {
 497                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 498                                                   MLX5_EXPANSION_OUTER_IPV6),
 499                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 500         },
 501         [MLX5_EXPANSION_OUTER_IPV4] = {
 502                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 503                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 504                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 505                          MLX5_EXPANSION_GRE,
 506                          MLX5_EXPANSION_NVGRE,
 507                          MLX5_EXPANSION_IPV4,
 508                          MLX5_EXPANSION_IPV6),
 509                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 510                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 511                         ETH_RSS_NONFRAG_IPV4_OTHER,
 512         },
 513         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 514                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 515                                                   MLX5_EXPANSION_VXLAN_GPE,
 516                                                   MLX5_EXPANSION_MPLS,
 517                                                   MLX5_EXPANSION_GTP),
 518                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 519                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 520         },
 521         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 522                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 523                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 524         },
 525         [MLX5_EXPANSION_OUTER_IPV6] = {
 526                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 527                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 528                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 529                          MLX5_EXPANSION_IPV4,
 530                          MLX5_EXPANSION_IPV6,
 531                          MLX5_EXPANSION_GRE,
 532                          MLX5_EXPANSION_NVGRE),
 533                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 534                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 535                         ETH_RSS_NONFRAG_IPV6_OTHER,
 536         },
 537         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 538                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 539                                                   MLX5_EXPANSION_VXLAN_GPE,
 540                                                   MLX5_EXPANSION_MPLS,
 541                                                   MLX5_EXPANSION_GTP),
 542                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 543                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 544         },
 545         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 546                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 547                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 548         },
 549         [MLX5_EXPANSION_VXLAN] = {
 550                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 551                                                   MLX5_EXPANSION_IPV4,
 552                                                   MLX5_EXPANSION_IPV6),
 553                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 554         },
 555         [MLX5_EXPANSION_VXLAN_GPE] = {
 556                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 557                                                   MLX5_EXPANSION_IPV4,
 558                                                   MLX5_EXPANSION_IPV6),
 559                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 560         },
 561         [MLX5_EXPANSION_GRE] = {
 562                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 563                                                   MLX5_EXPANSION_IPV6,
 564                                                   MLX5_EXPANSION_GRE_KEY,
 565                                                   MLX5_EXPANSION_MPLS),
 566                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 567         },
 568         [MLX5_EXPANSION_GRE_KEY] = {
 569                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 570                                                   MLX5_EXPANSION_IPV6,
 571                                                   MLX5_EXPANSION_MPLS),
 572                 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
 573                 .optional = 1,
 574         },
 575         [MLX5_EXPANSION_NVGRE] = {
 576                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 577                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
 578         },
 579         [MLX5_EXPANSION_MPLS] = {
 580                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 581                                                   MLX5_EXPANSION_IPV6,
 582                                                   MLX5_EXPANSION_ETH),
 583                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 584                 .optional = 1,
 585         },
 586         [MLX5_EXPANSION_ETH] = {
 587                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 588                                                   MLX5_EXPANSION_IPV6),
 589                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 590         },
 591         [MLX5_EXPANSION_ETH_VLAN] = {
 592                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 593                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 594         },
 595         [MLX5_EXPANSION_VLAN] = {
 596                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 597                                                   MLX5_EXPANSION_IPV6),
 598                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 599         },
 600         [MLX5_EXPANSION_IPV4] = {
 601                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 602                                                   MLX5_EXPANSION_IPV4_TCP),
 603                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 604                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 605                         ETH_RSS_NONFRAG_IPV4_OTHER,
 606         },
 607         [MLX5_EXPANSION_IPV4_UDP] = {
 608                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 609                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 610         },
 611         [MLX5_EXPANSION_IPV4_TCP] = {
 612                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 613                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 614         },
 615         [MLX5_EXPANSION_IPV6] = {
 616                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 617                                                   MLX5_EXPANSION_IPV6_TCP,
 618                                                   MLX5_EXPANSION_IPV6_FRAG_EXT),
 619                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 620                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 621                         ETH_RSS_NONFRAG_IPV6_OTHER,
 622         },
 623         [MLX5_EXPANSION_IPV6_UDP] = {
 624                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 625                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 626         },
 627         [MLX5_EXPANSION_IPV6_TCP] = {
 628                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 629                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 630         },
 631         [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
 632                 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
 633         },
 634         [MLX5_EXPANSION_GTP] = {
 635                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 636                                                           MLX5_EXPANSION_IPV6),
 637                         .type = RTE_FLOW_ITEM_TYPE_GTP
 638         }
 639 };
 640
 641 static struct rte_flow_action_handle *
 642 mlx5_action_handle_create(struct rte_eth_dev *dev,
 643                           const struct rte_flow_indir_action_conf *conf,
 644                           const struct rte_flow_action *action,
 645                           struct rte_flow_error *error);
 646 static int mlx5_action_handle_destroy
 647                                 (struct rte_eth_dev *dev,
 648                                  struct rte_flow_action_handle *handle,
 649                                  struct rte_flow_error *error);
 650 static int mlx5_action_handle_update
 651                                 (struct rte_eth_dev *dev,
 652                                  struct rte_flow_action_handle *handle,
 653                                  const void *update,
 654                                  struct rte_flow_error *error);
 655 static int mlx5_action_handle_query
 656                                 (struct rte_eth_dev *dev,
 657                                  const struct rte_flow_action_handle *handle,
 658                                  void *data,
 659                                  struct rte_flow_error *error);
 660 static int
 661 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 662                     struct rte_flow_tunnel *app_tunnel,
 663                     struct rte_flow_action **actions,
 664                     uint32_t *num_of_actions,
 665                     struct rte_flow_error *error);
 666 static int
 667 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 668                        struct rte_flow_tunnel *app_tunnel,
 669                        struct rte_flow_item **items,
 670                        uint32_t *num_of_items,
 671                        struct rte_flow_error *error);
 672 static int
 673 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 674                               struct rte_flow_item *pmd_items,
 675                               uint32_t num_items, struct rte_flow_error *err);
 676 static int
 677 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 678                                 struct rte_flow_action *pmd_actions,
 679                                 uint32_t num_actions,
 680                                 struct rte_flow_error *err);
 681 static int
 682 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 683                                   struct rte_mbuf *m,
 684                                   struct rte_flow_restore_info *info,
 685                                   struct rte_flow_error *err);
 686
 687 static const struct rte_flow_ops mlx5_flow_ops = {
 688         .validate = mlx5_flow_validate,
 689         .create = mlx5_flow_create,
 690         .destroy = mlx5_flow_destroy,
 691         .flush = mlx5_flow_flush,
 692         .isolate = mlx5_flow_isolate,
 693         .query = mlx5_flow_query,
 694         .dev_dump = mlx5_flow_dev_dump,
 695         .get_aged_flows = mlx5_flow_get_aged_flows,
 696         .action_handle_create = mlx5_action_handle_create,
 697         .action_handle_destroy = mlx5_action_handle_destroy,
 698         .action_handle_update = mlx5_action_handle_update,
 699         .action_handle_query = mlx5_action_handle_query,
 700         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 701         .tunnel_match = mlx5_flow_tunnel_match,
 702         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 703         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 704         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 705 };
 706
 707 /* Tunnel information. */
 708 struct mlx5_flow_tunnel_info {
 709         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 710         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 711 };
 712
 713 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 714         {
 715                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 716                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 717         },
 718         {
 719                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 720                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 721         },
 722         {
 723                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 724                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 725         },
 726         {
 727                 .tunnel = MLX5_FLOW_LAYER_GRE,
 728                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 729         },
 730         {
 731                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 732                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 733         },
 734         {
 735                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 736                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 737         },
 738         {
 739                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 740                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 741         },
 742         {
 743                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 744                 .ptype = RTE_PTYPE_TUNNEL_IP,
 745         },
 746         {
 747                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 748                 .ptype = RTE_PTYPE_TUNNEL_IP,
 749         },
 750         {
 751                 .tunnel = MLX5_FLOW_LAYER_GTP,
 752                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 753         },
 754 };
 755
 756
 757
 758 /**
 759  * Translate tag ID to register.
 760  *
 761  * @param[in] dev
 762  *   Pointer to the Ethernet device structure.
 763  * @param[in] feature
 764  *   The feature that request the register.
 765  * @param[in] id
 766  *   The request register ID.
 767  * @param[out] error
 768  *   Error description in case of any.
 769  *
 770  * @return
 771  *   The request register on success, a negative errno
 772  *   value otherwise and rte_errno is set.
 773  */
 774 int
 775 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 776                      enum mlx5_feature_name feature,
 777                      uint32_t id,
 778                      struct rte_flow_error *error)
 779 {
 780         struct mlx5_priv *priv = dev->data->dev_private;
 781         struct mlx5_dev_config *config = &priv->config;
 782         enum modify_reg start_reg;
 783         bool skip_mtr_reg = false;
 784
 785         switch (feature) {
 786         case MLX5_HAIRPIN_RX:
 787                 return REG_B;
 788         case MLX5_HAIRPIN_TX:
 789                 return REG_A;
 790         case MLX5_METADATA_RX:
 791                 switch (config->dv_xmeta_en) {
 792                 case MLX5_XMETA_MODE_LEGACY:
 793                         return REG_B;
 794                 case MLX5_XMETA_MODE_META16:
 795                         return REG_C_0;
 796                 case MLX5_XMETA_MODE_META32:
 797                         return REG_C_1;
 798                 }
 799                 break;
 800         case MLX5_METADATA_TX:
 801                 return REG_A;
 802         case MLX5_METADATA_FDB:
 803                 switch (config->dv_xmeta_en) {
 804                 case MLX5_XMETA_MODE_LEGACY:
 805                         return REG_NON;
 806                 case MLX5_XMETA_MODE_META16:
 807                         return REG_C_0;
 808                 case MLX5_XMETA_MODE_META32:
 809                         return REG_C_1;
 810                 }
 811                 break;
 812         case MLX5_FLOW_MARK:
 813                 switch (config->dv_xmeta_en) {
 814                 case MLX5_XMETA_MODE_LEGACY:
 815                         return REG_NON;
 816                 case MLX5_XMETA_MODE_META16:
 817                         return REG_C_1;
 818                 case MLX5_XMETA_MODE_META32:
 819                         return REG_C_0;
 820                 }
 821                 break;
 822         case MLX5_MTR_ID:
 823                 /*
 824                  * If meter color and meter id share one register, flow match
 825                  * should use the meter color register for match.
 826                  */
 827                 if (priv->mtr_reg_share)
 828                         return priv->mtr_color_reg;
 829                 else
 830                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 831                                REG_C_3;
 832         case MLX5_MTR_COLOR:
 833         case MLX5_ASO_FLOW_HIT:
 834         case MLX5_ASO_CONNTRACK:
 835                 /* All features use the same REG_C. */
 836                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 837                 return priv->mtr_color_reg;
 838         case MLX5_COPY_MARK:
 839                 /*
 840                  * Metadata COPY_MARK register using is in meter suffix sub
 841                  * flow while with meter. It's safe to share the same register.
 842                  */
 843                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 844         case MLX5_APP_TAG:
 845                 /*
 846                  * If meter is enable, it will engage the register for color
 847                  * match and flow match. If meter color match is not using the
 848                  * REG_C_2, need to skip the REG_C_x be used by meter color
 849                  * match.
 850                  * If meter is disable, free to use all available registers.
 851                  */
 852                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 853                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 854                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 855                 if (id > (uint32_t)(REG_C_7 - start_reg))
 856                         return rte_flow_error_set(error, EINVAL,
 857                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 858                                                   NULL, "invalid tag id");
 859                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 860                         return rte_flow_error_set(error, ENOTSUP,
 861                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 862                                                   NULL, "unsupported tag id");
 863                 /*
 864                  * This case means meter is using the REG_C_x great than 2.
 865                  * Take care not to conflict with meter color REG_C_x.
 866                  * If the available index REG_C_y >= REG_C_x, skip the
 867                  * color register.
 868                  */
 869                 if (skip_mtr_reg && config->flow_mreg_c
 870                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 871                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 872                                 return rte_flow_error_set(error, EINVAL,
 873                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 874                                                         NULL, "invalid tag id");
 875                         if (config->flow_mreg_c
 876                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 877                                 return config->flow_mreg_c
 878                                                [id + 1 + start_reg - REG_C_0];
 879                         return rte_flow_error_set(error, ENOTSUP,
 880                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 881                                                   NULL, "unsupported tag id");
 882                 }
 883                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 884         }
 885         MLX5_ASSERT(false);
 886         return rte_flow_error_set(error, EINVAL,
 887                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 888                                   NULL, "invalid feature name");
 889 }
 890
 891 /**
 892  * Check extensive flow metadata register support.
 893  *
 894  * @param dev
 895  *   Pointer to rte_eth_dev structure.
 896  *
 897  * @return
 898  *   True if device supports extensive flow metadata register, otherwise false.
 899  */
 900 bool
 901 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 902 {
 903         struct mlx5_priv *priv = dev->data->dev_private;
 904         struct mlx5_dev_config *config = &priv->config;
 905
 906         /*
 907          * Having available reg_c can be regarded inclusively as supporting
 908          * extensive flow metadata register, which could mean,
 909          * - metadata register copy action by modify header.
 910          * - 16 modify header actions is supported.
 911          * - reg_c's are preserved across different domain (FDB and NIC) on
 912          *   packet loopback by flow lookup miss.
 913          */
 914         return config->flow_mreg_c[2] != REG_NON;
 915 }
 916
 917 /**
 918  * Get the lowest priority.
 919  *
 920  * @param[in] dev
 921  *   Pointer to the Ethernet device structure.
 922  * @param[in] attributes
 923  *   Pointer to device flow rule attributes.
 924  *
 925  * @return
 926  *   The value of lowest priority of flow.
 927  */
 928 uint32_t
 929 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 930                           const struct rte_flow_attr *attr)
 931 {
 932         struct mlx5_priv *priv = dev->data->dev_private;
 933
 934         if (!attr->group && !attr->transfer)
 935                 return priv->config.flow_prio - 2;
 936         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
 937 }
 938
 939 /**
 940  * Calculate matcher priority of the flow.
 941  *
 942  * @param[in] dev
 943  *   Pointer to the Ethernet device structure.
 944  * @param[in] attr
 945  *   Pointer to device flow rule attributes.
 946  * @param[in] subpriority
 947  *   The priority based on the items.
 948  * @return
 949  *   The matcher priority of the flow.
 950  */
 951 uint16_t
 952 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 953                           const struct rte_flow_attr *attr,
 954                           uint32_t subpriority)
 955 {
 956         uint16_t priority = (uint16_t)attr->priority;
 957         struct mlx5_priv *priv = dev->data->dev_private;
 958
 959         if (!attr->group && !attr->transfer) {
 960                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 961                         priority = priv->config.flow_prio - 1;
 962                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
 963         }
 964         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 965                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
 966         return priority * 3 + subpriority;
 967 }
 968
 969 /**
 970  * Verify the @p item specifications (spec, last, mask) are compatible with the
 971  * NIC capabilities.
 972  *
 973  * @param[in] item
 974  *   Item specification.
 975  * @param[in] mask
 976  *   @p item->mask or flow default bit-masks.
 977  * @param[in] nic_mask
 978  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 979  * @param[in] size
 980  *   Bit-masks size in bytes.
 981  * @param[in] range_accepted
 982  *   True if range of values is accepted for specific fields, false otherwise.
 983  * @param[out] error
 984  *   Pointer to error structure.
 985  *
 986  * @return
 987  *   0 on success, a negative errno value otherwise and rte_errno is set.
 988  */
 989 int
 990 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 991                           const uint8_t *mask,
 992                           const uint8_t *nic_mask,
 993                           unsigned int size,
 994                           bool range_accepted,
 995                           struct rte_flow_error *error)
 996 {
 997         unsigned int i;
 998
 999         MLX5_ASSERT(nic_mask);
1000         for (i = 0; i < size; ++i)
1001                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1002                         return rte_flow_error_set(error, ENOTSUP,
1003                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1004                                                   item,
1005                                                   "mask enables non supported"
1006                                                   " bits");
1007         if (!item->spec && (item->mask || item->last))
1008                 return rte_flow_error_set(error, EINVAL,
1009                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1010                                           "mask/last without a spec is not"
1011                                           " supported");
1012         if (item->spec && item->last && !range_accepted) {
1013                 uint8_t spec[size];
1014                 uint8_t last[size];
1015                 unsigned int i;
1016                 int ret;
1017
1018                 for (i = 0; i < size; ++i) {
1019                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1020                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1021                 }
1022                 ret = memcmp(spec, last, size);
1023                 if (ret != 0)
1024                         return rte_flow_error_set(error, EINVAL,
1025                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1026                                                   item,
1027                                                   "range is not valid");
1028         }
1029         return 0;
1030 }
1031
1032 /**
1033  * Adjust the hash fields according to the @p flow information.
1034  *
1035  * @param[in] dev_flow.
1036  *   Pointer to the mlx5_flow.
1037  * @param[in] tunnel
1038  *   1 when the hash field is for a tunnel item.
1039  * @param[in] layer_types
1040  *   ETH_RSS_* types.
1041  * @param[in] hash_fields
1042  *   Item hash fields.
1043  *
1044  * @return
1045  *   The hash fields that should be used.
1046  */
1047 uint64_t
1048 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1049                             int tunnel __rte_unused, uint64_t layer_types,
1050                             uint64_t hash_fields)
1051 {
1052 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1053         int rss_request_inner = rss_desc->level >= 2;
1054
1055         /* Check RSS hash level for tunnel. */
1056         if (tunnel && rss_request_inner)
1057                 hash_fields |= IBV_RX_HASH_INNER;
1058         else if (tunnel || rss_request_inner)
1059                 return 0;
1060 #endif
1061         /* Check if requested layer matches RSS hash fields. */
1062         if (!(rss_desc->types & layer_types))
1063                 return 0;
1064         return hash_fields;
1065 }
1066
1067 /**
1068  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1069  * if several tunnel rules are used on this queue, the tunnel ptype will be
1070  * cleared.
1071  *
1072  * @param rxq_ctrl
1073  *   Rx queue to update.
1074  */
1075 static void
1076 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1077 {
1078         unsigned int i;
1079         uint32_t tunnel_ptype = 0;
1080
1081         /* Look up for the ptype to use. */
1082         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1083                 if (!rxq_ctrl->flow_tunnels_n[i])
1084                         continue;
1085                 if (!tunnel_ptype) {
1086                         tunnel_ptype = tunnels_info[i].ptype;
1087                 } else {
1088                         tunnel_ptype = 0;
1089                         break;
1090                 }
1091         }
1092         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1093 }
1094
1095 /**
1096  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1097  * flow.
1098  *
1099  * @param[in] dev
1100  *   Pointer to the Ethernet device structure.
1101  * @param[in] dev_handle
1102  *   Pointer to device flow handle structure.
1103  */
1104 void
1105 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1106                        struct mlx5_flow_handle *dev_handle)
1107 {
1108         struct mlx5_priv *priv = dev->data->dev_private;
1109         const int mark = dev_handle->mark;
1110         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1111         struct mlx5_ind_table_obj *ind_tbl = NULL;
1112         unsigned int i;
1113
1114         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1115                 struct mlx5_hrxq *hrxq;
1116
1117                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1118                               dev_handle->rix_hrxq);
1119                 if (hrxq)
1120                         ind_tbl = hrxq->ind_table;
1121         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1122                 struct mlx5_shared_action_rss *shared_rss;
1123
1124                 shared_rss = mlx5_ipool_get
1125                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1126                          dev_handle->rix_srss);
1127                 if (shared_rss)
1128                         ind_tbl = shared_rss->ind_tbl;
1129         }
1130         if (!ind_tbl)
1131                 return;
1132         for (i = 0; i != ind_tbl->queues_n; ++i) {
1133                 int idx = ind_tbl->queues[i];
1134                 struct mlx5_rxq_ctrl *rxq_ctrl =
1135                         container_of((*priv->rxqs)[idx],
1136                                      struct mlx5_rxq_ctrl, rxq);
1137
1138                 /*
1139                  * To support metadata register copy on Tx loopback,
1140                  * this must be always enabled (metadata may arive
1141                  * from other port - not from local flows only.
1142                  */
1143                 if (priv->config.dv_flow_en &&
1144                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1145                     mlx5_flow_ext_mreg_supported(dev)) {
1146                         rxq_ctrl->rxq.mark = 1;
1147                         rxq_ctrl->flow_mark_n = 1;
1148                 } else if (mark) {
1149                         rxq_ctrl->rxq.mark = 1;
1150                         rxq_ctrl->flow_mark_n++;
1151                 }
1152                 if (tunnel) {
1153                         unsigned int j;
1154
1155                         /* Increase the counter matching the flow. */
1156                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1157                                 if ((tunnels_info[j].tunnel &
1158                                      dev_handle->layers) ==
1159                                     tunnels_info[j].tunnel) {
1160                                         rxq_ctrl->flow_tunnels_n[j]++;
1161                                         break;
1162                                 }
1163                         }
1164                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1165                 }
1166         }
1167 }
1168
1169 /**
1170  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1171  *
1172  * @param[in] dev
1173  *   Pointer to the Ethernet device structure.
1174  * @param[in] flow
1175  *   Pointer to flow structure.
1176  */
1177 static void
1178 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1179 {
1180         struct mlx5_priv *priv = dev->data->dev_private;
1181         uint32_t handle_idx;
1182         struct mlx5_flow_handle *dev_handle;
1183
1184         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1185                        handle_idx, dev_handle, next)
1186                 flow_drv_rxq_flags_set(dev, dev_handle);
1187 }
1188
1189 /**
1190  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1191  * device flow if no other flow uses it with the same kind of request.
1192  *
1193  * @param dev
1194  *   Pointer to Ethernet device.
1195  * @param[in] dev_handle
1196  *   Pointer to the device flow handle structure.
1197  */
1198 static void
1199 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1200                         struct mlx5_flow_handle *dev_handle)
1201 {
1202         struct mlx5_priv *priv = dev->data->dev_private;
1203         const int mark = dev_handle->mark;
1204         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1205         struct mlx5_ind_table_obj *ind_tbl = NULL;
1206         unsigned int i;
1207
1208         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1209                 struct mlx5_hrxq *hrxq;
1210
1211                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1212                               dev_handle->rix_hrxq);
1213                 if (hrxq)
1214                         ind_tbl = hrxq->ind_table;
1215         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1216                 struct mlx5_shared_action_rss *shared_rss;
1217
1218                 shared_rss = mlx5_ipool_get
1219                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1220                          dev_handle->rix_srss);
1221                 if (shared_rss)
1222                         ind_tbl = shared_rss->ind_tbl;
1223         }
1224         if (!ind_tbl)
1225                 return;
1226         MLX5_ASSERT(dev->data->dev_started);
1227         for (i = 0; i != ind_tbl->queues_n; ++i) {
1228                 int idx = ind_tbl->queues[i];
1229                 struct mlx5_rxq_ctrl *rxq_ctrl =
1230                         container_of((*priv->rxqs)[idx],
1231                                      struct mlx5_rxq_ctrl, rxq);
1232
1233                 if (priv->config.dv_flow_en &&
1234                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1235                     mlx5_flow_ext_mreg_supported(dev)) {
1236                         rxq_ctrl->rxq.mark = 1;
1237                         rxq_ctrl->flow_mark_n = 1;
1238                 } else if (mark) {
1239                         rxq_ctrl->flow_mark_n--;
1240                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1241                 }
1242                 if (tunnel) {
1243                         unsigned int j;
1244
1245                         /* Decrease the counter matching the flow. */
1246                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1247                                 if ((tunnels_info[j].tunnel &
1248                                      dev_handle->layers) ==
1249                                     tunnels_info[j].tunnel) {
1250                                         rxq_ctrl->flow_tunnels_n[j]--;
1251                                         break;
1252                                 }
1253                         }
1254                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1255                 }
1256         }
1257 }
1258
1259 /**
1260  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1261  * @p flow if no other flow uses it with the same kind of request.
1262  *
1263  * @param dev
1264  *   Pointer to Ethernet device.
1265  * @param[in] flow
1266  *   Pointer to the flow.
1267  */
1268 static void
1269 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1270 {
1271         struct mlx5_priv *priv = dev->data->dev_private;
1272         uint32_t handle_idx;
1273         struct mlx5_flow_handle *dev_handle;
1274
1275         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1276                        handle_idx, dev_handle, next)
1277                 flow_drv_rxq_flags_trim(dev, dev_handle);
1278 }
1279
1280 /**
1281  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1282  *
1283  * @param dev
1284  *   Pointer to Ethernet device.
1285  */
1286 static void
1287 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1288 {
1289         struct mlx5_priv *priv = dev->data->dev_private;
1290         unsigned int i;
1291
1292         for (i = 0; i != priv->rxqs_n; ++i) {
1293                 struct mlx5_rxq_ctrl *rxq_ctrl;
1294                 unsigned int j;
1295
1296                 if (!(*priv->rxqs)[i])
1297                         continue;
1298                 rxq_ctrl = container_of((*priv->rxqs)[i],
1299                                         struct mlx5_rxq_ctrl, rxq);
1300                 rxq_ctrl->flow_mark_n = 0;
1301                 rxq_ctrl->rxq.mark = 0;
1302                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1303                         rxq_ctrl->flow_tunnels_n[j] = 0;
1304                 rxq_ctrl->rxq.tunnel = 0;
1305         }
1306 }
1307
1308 /**
1309  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1310  *
1311  * @param[in] dev
1312  *   Pointer to the Ethernet device structure.
1313  */
1314 void
1315 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1316 {
1317         struct mlx5_priv *priv = dev->data->dev_private;
1318         struct mlx5_rxq_data *data;
1319         unsigned int i;
1320
1321         for (i = 0; i != priv->rxqs_n; ++i) {
1322                 if (!(*priv->rxqs)[i])
1323                         continue;
1324                 data = (*priv->rxqs)[i];
1325                 if (!rte_flow_dynf_metadata_avail()) {
1326                         data->dynf_meta = 0;
1327                         data->flow_meta_mask = 0;
1328                         data->flow_meta_offset = -1;
1329                         data->flow_meta_port_mask = 0;
1330                 } else {
1331                         data->dynf_meta = 1;
1332                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1333                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1334                         data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1335                 }
1336         }
1337 }
1338
1339 /*
1340  * return a pointer to the desired action in the list of actions.
1341  *
1342  * @param[in] actions
1343  *   The list of actions to search the action in.
1344  * @param[in] action
1345  *   The action to find.
1346  *
1347  * @return
1348  *   Pointer to the action in the list, if found. NULL otherwise.
1349  */
1350 const struct rte_flow_action *
1351 mlx5_flow_find_action(const struct rte_flow_action *actions,
1352                       enum rte_flow_action_type action)
1353 {
1354         if (actions == NULL)
1355                 return NULL;
1356         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1357                 if (actions->type == action)
1358                         return actions;
1359         return NULL;
1360 }
1361
1362 /*
1363  * Validate the flag action.
1364  *
1365  * @param[in] action_flags
1366  *   Bit-fields that holds the actions detected until now.
1367  * @param[in] attr
1368  *   Attributes of flow that includes this action.
1369  * @param[out] error
1370  *   Pointer to error structure.
1371  *
1372  * @return
1373  *   0 on success, a negative errno value otherwise and rte_errno is set.
1374  */
1375 int
1376 mlx5_flow_validate_action_flag(uint64_t action_flags,
1377                                const struct rte_flow_attr *attr,
1378                                struct rte_flow_error *error)
1379 {
1380         if (action_flags & MLX5_FLOW_ACTION_MARK)
1381                 return rte_flow_error_set(error, EINVAL,
1382                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1383                                           "can't mark and flag in same flow");
1384         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1385                 return rte_flow_error_set(error, EINVAL,
1386                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1387                                           "can't have 2 flag"
1388                                           " actions in same flow");
1389         if (attr->egress)
1390                 return rte_flow_error_set(error, ENOTSUP,
1391                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1392                                           "flag action not supported for "
1393                                           "egress");
1394         return 0;
1395 }
1396
1397 /*
1398  * Validate the mark action.
1399  *
1400  * @param[in] action
1401  *   Pointer to the queue action.
1402  * @param[in] action_flags
1403  *   Bit-fields that holds the actions detected until now.
1404  * @param[in] attr
1405  *   Attributes of flow that includes this action.
1406  * @param[out] error
1407  *   Pointer to error structure.
1408  *
1409  * @return
1410  *   0 on success, a negative errno value otherwise and rte_errno is set.
1411  */
1412 int
1413 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1414                                uint64_t action_flags,
1415                                const struct rte_flow_attr *attr,
1416                                struct rte_flow_error *error)
1417 {
1418         const struct rte_flow_action_mark *mark = action->conf;
1419
1420         if (!mark)
1421                 return rte_flow_error_set(error, EINVAL,
1422                                           RTE_FLOW_ERROR_TYPE_ACTION,
1423                                           action,
1424                                           "configuration cannot be null");
1425         if (mark->id >= MLX5_FLOW_MARK_MAX)
1426                 return rte_flow_error_set(error, EINVAL,
1427                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1428                                           &mark->id,
1429                                           "mark id must in 0 <= id < "
1430                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1431         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1432                 return rte_flow_error_set(error, EINVAL,
1433                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1434                                           "can't flag and mark in same flow");
1435         if (action_flags & MLX5_FLOW_ACTION_MARK)
1436                 return rte_flow_error_set(error, EINVAL,
1437                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1438                                           "can't have 2 mark actions in same"
1439                                           " flow");
1440         if (attr->egress)
1441                 return rte_flow_error_set(error, ENOTSUP,
1442                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1443                                           "mark action not supported for "
1444                                           "egress");
1445         return 0;
1446 }
1447
1448 /*
1449  * Validate the drop action.
1450  *
1451  * @param[in] action_flags
1452  *   Bit-fields that holds the actions detected until now.
1453  * @param[in] attr
1454  *   Attributes of flow that includes this action.
1455  * @param[out] error
1456  *   Pointer to error structure.
1457  *
1458  * @return
1459  *   0 on success, a negative errno value otherwise and rte_errno is set.
1460  */
1461 int
1462 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1463                                const struct rte_flow_attr *attr,
1464                                struct rte_flow_error *error)
1465 {
1466         if (attr->egress)
1467                 return rte_flow_error_set(error, ENOTSUP,
1468                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1469                                           "drop action not supported for "
1470                                           "egress");
1471         return 0;
1472 }
1473
1474 /*
1475  * Validate the queue action.
1476  *
1477  * @param[in] action
1478  *   Pointer to the queue action.
1479  * @param[in] action_flags
1480  *   Bit-fields that holds the actions detected until now.
1481  * @param[in] dev
1482  *   Pointer to the Ethernet device structure.
1483  * @param[in] attr
1484  *   Attributes of flow that includes this action.
1485  * @param[out] error
1486  *   Pointer to error structure.
1487  *
1488  * @return
1489  *   0 on success, a negative errno value otherwise and rte_errno is set.
1490  */
1491 int
1492 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1493                                 uint64_t action_flags,
1494                                 struct rte_eth_dev *dev,
1495                                 const struct rte_flow_attr *attr,
1496                                 struct rte_flow_error *error)
1497 {
1498         struct mlx5_priv *priv = dev->data->dev_private;
1499         const struct rte_flow_action_queue *queue = action->conf;
1500
1501         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1502                 return rte_flow_error_set(error, EINVAL,
1503                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1504                                           "can't have 2 fate actions in"
1505                                           " same flow");
1506         if (!priv->rxqs_n)
1507                 return rte_flow_error_set(error, EINVAL,
1508                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1509                                           NULL, "No Rx queues configured");
1510         if (queue->index >= priv->rxqs_n)
1511                 return rte_flow_error_set(error, EINVAL,
1512                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1513                                           &queue->index,
1514                                           "queue index out of range");
1515         if (!(*priv->rxqs)[queue->index])
1516                 return rte_flow_error_set(error, EINVAL,
1517                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1518                                           &queue->index,
1519                                           "queue is not configured");
1520         if (attr->egress)
1521                 return rte_flow_error_set(error, ENOTSUP,
1522                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1523                                           "queue action not supported for "
1524                                           "egress");
1525         return 0;
1526 }
1527
1528 /*
1529  * Validate the rss action.
1530  *
1531  * @param[in] dev
1532  *   Pointer to the Ethernet device structure.
1533  * @param[in] action
1534  *   Pointer to the queue action.
1535  * @param[out] error
1536  *   Pointer to error structure.
1537  *
1538  * @return
1539  *   0 on success, a negative errno value otherwise and rte_errno is set.
1540  */
1541 int
1542 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1543                          const struct rte_flow_action *action,
1544                          struct rte_flow_error *error)
1545 {
1546         struct mlx5_priv *priv = dev->data->dev_private;
1547         const struct rte_flow_action_rss *rss = action->conf;
1548         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1549         unsigned int i;
1550
1551         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1552             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1553                 return rte_flow_error_set(error, ENOTSUP,
1554                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1555                                           &rss->func,
1556                                           "RSS hash function not supported");
1557 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1558         if (rss->level > 2)
1559 #else
1560         if (rss->level > 1)
1561 #endif
1562                 return rte_flow_error_set(error, ENOTSUP,
1563                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1564                                           &rss->level,
1565                                           "tunnel RSS is not supported");
1566         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1567         if (rss->key_len == 0 && rss->key != NULL)
1568                 return rte_flow_error_set(error, ENOTSUP,
1569                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1570                                           &rss->key_len,
1571                                           "RSS hash key length 0");
1572         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1573                 return rte_flow_error_set(error, ENOTSUP,
1574                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1575                                           &rss->key_len,
1576                                           "RSS hash key too small");
1577         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1578                 return rte_flow_error_set(error, ENOTSUP,
1579                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1580                                           &rss->key_len,
1581                                           "RSS hash key too large");
1582         if (rss->queue_num > priv->config.ind_table_max_size)
1583                 return rte_flow_error_set(error, ENOTSUP,
1584                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1585                                           &rss->queue_num,
1586                                           "number of queues too large");
1587         if (rss->types & MLX5_RSS_HF_MASK)
1588                 return rte_flow_error_set(error, ENOTSUP,
1589                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1590                                           &rss->types,
1591                                           "some RSS protocols are not"
1592                                           " supported");
1593         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1594             !(rss->types & ETH_RSS_IP))
1595                 return rte_flow_error_set(error, EINVAL,
1596                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1597                                           "L3 partial RSS requested but L3 RSS"
1598                                           " type not specified");
1599         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1600             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1601                 return rte_flow_error_set(error, EINVAL,
1602                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1603                                           "L4 partial RSS requested but L4 RSS"
1604                                           " type not specified");
1605         if (!priv->rxqs_n)
1606                 return rte_flow_error_set(error, EINVAL,
1607                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1608                                           NULL, "No Rx queues configured");
1609         if (!rss->queue_num)
1610                 return rte_flow_error_set(error, EINVAL,
1611                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1612                                           NULL, "No queues configured");
1613         for (i = 0; i != rss->queue_num; ++i) {
1614                 struct mlx5_rxq_ctrl *rxq_ctrl;
1615
1616                 if (rss->queue[i] >= priv->rxqs_n)
1617                         return rte_flow_error_set
1618                                 (error, EINVAL,
1619                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1620                                  &rss->queue[i], "queue index out of range");
1621                 if (!(*priv->rxqs)[rss->queue[i]])
1622                         return rte_flow_error_set
1623                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1624                                  &rss->queue[i], "queue is not configured");
1625                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1626                                         struct mlx5_rxq_ctrl, rxq);
1627                 if (i == 0)
1628                         rxq_type = rxq_ctrl->type;
1629                 if (rxq_type != rxq_ctrl->type)
1630                         return rte_flow_error_set
1631                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1632                                  &rss->queue[i],
1633                                  "combining hairpin and regular RSS queues is not supported");
1634         }
1635         return 0;
1636 }
1637
1638 /*
1639  * Validate the rss action.
1640  *
1641  * @param[in] action
1642  *   Pointer to the queue action.
1643  * @param[in] action_flags
1644  *   Bit-fields that holds the actions detected until now.
1645  * @param[in] dev
1646  *   Pointer to the Ethernet device structure.
1647  * @param[in] attr
1648  *   Attributes of flow that includes this action.
1649  * @param[in] item_flags
1650  *   Items that were detected.
1651  * @param[out] error
1652  *   Pointer to error structure.
1653  *
1654  * @return
1655  *   0 on success, a negative errno value otherwise and rte_errno is set.
1656  */
1657 int
1658 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1659                               uint64_t action_flags,
1660                               struct rte_eth_dev *dev,
1661                               const struct rte_flow_attr *attr,
1662                               uint64_t item_flags,
1663                               struct rte_flow_error *error)
1664 {
1665         const struct rte_flow_action_rss *rss = action->conf;
1666         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1667         int ret;
1668
1669         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1670                 return rte_flow_error_set(error, EINVAL,
1671                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1672                                           "can't have 2 fate actions"
1673                                           " in same flow");
1674         ret = mlx5_validate_action_rss(dev, action, error);
1675         if (ret)
1676                 return ret;
1677         if (attr->egress)
1678                 return rte_flow_error_set(error, ENOTSUP,
1679                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1680                                           "rss action not supported for "
1681                                           "egress");
1682         if (rss->level > 1 && !tunnel)
1683                 return rte_flow_error_set(error, EINVAL,
1684                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1685                                           "inner RSS is not supported for "
1686                                           "non-tunnel flows");
1687         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1688             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1689                 return rte_flow_error_set(error, EINVAL,
1690                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1691                                           "RSS on eCPRI is not supported now");
1692         }
1693         if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1694             !(item_flags &
1695               (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1696             rss->level > 1)
1697                 return rte_flow_error_set(error, EINVAL,
1698                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1699                                           "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1700         return 0;
1701 }
1702
1703 /*
1704  * Validate the default miss action.
1705  *
1706  * @param[in] action_flags
1707  *   Bit-fields that holds the actions detected until now.
1708  * @param[out] error
1709  *   Pointer to error structure.
1710  *
1711  * @return
1712  *   0 on success, a negative errno value otherwise and rte_errno is set.
1713  */
1714 int
1715 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1716                                 const struct rte_flow_attr *attr,
1717                                 struct rte_flow_error *error)
1718 {
1719         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1720                 return rte_flow_error_set(error, EINVAL,
1721                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1722                                           "can't have 2 fate actions in"
1723                                           " same flow");
1724         if (attr->egress)
1725                 return rte_flow_error_set(error, ENOTSUP,
1726                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1727                                           "default miss action not supported "
1728                                           "for egress");
1729         if (attr->group)
1730                 return rte_flow_error_set(error, ENOTSUP,
1731                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1732                                           "only group 0 is supported");
1733         if (attr->transfer)
1734                 return rte_flow_error_set(error, ENOTSUP,
1735                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1736                                           NULL, "transfer is not supported");
1737         return 0;
1738 }
1739
1740 /*
1741  * Validate the count action.
1742  *
1743  * @param[in] dev
1744  *   Pointer to the Ethernet device structure.
1745  * @param[in] attr
1746  *   Attributes of flow that includes this action.
1747  * @param[out] error
1748  *   Pointer to error structure.
1749  *
1750  * @return
1751  *   0 on success, a negative errno value otherwise and rte_errno is set.
1752  */
1753 int
1754 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1755                                 const struct rte_flow_attr *attr,
1756                                 struct rte_flow_error *error)
1757 {
1758         if (attr->egress)
1759                 return rte_flow_error_set(error, ENOTSUP,
1760                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1761                                           "count action not supported for "
1762                                           "egress");
1763         return 0;
1764 }
1765
1766 /*
1767  * Validate the ASO CT action.
1768  *
1769  * @param[in] dev
1770  *   Pointer to the Ethernet device structure.
1771  * @param[in] conntrack
1772  *   Pointer to the CT action profile.
1773  * @param[out] error
1774  *   Pointer to error structure.
1775  *
1776  * @return
1777  *   0 on success, a negative errno value otherwise and rte_errno is set.
1778  */
1779 int
1780 mlx5_validate_action_ct(struct rte_eth_dev *dev,
1781                         const struct rte_flow_action_conntrack *conntrack,
1782                         struct rte_flow_error *error)
1783 {
1784         RTE_SET_USED(dev);
1785
1786         if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
1787                 return rte_flow_error_set(error, EINVAL,
1788                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1789                                           "Invalid CT state");
1790         if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
1791                 return rte_flow_error_set(error, EINVAL,
1792                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1793                                           "Invalid last TCP packet flag");
1794         return 0;
1795 }
1796
1797 /**
1798  * Verify the @p attributes will be correctly understood by the NIC and store
1799  * them in the @p flow if everything is correct.
1800  *
1801  * @param[in] dev
1802  *   Pointer to the Ethernet device structure.
1803  * @param[in] attributes
1804  *   Pointer to flow attributes
1805  * @param[out] error
1806  *   Pointer to error structure.
1807  *
1808  * @return
1809  *   0 on success, a negative errno value otherwise and rte_errno is set.
1810  */
1811 int
1812 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1813                               const struct rte_flow_attr *attributes,
1814                               struct rte_flow_error *error)
1815 {
1816         struct mlx5_priv *priv = dev->data->dev_private;
1817         uint32_t priority_max = priv->config.flow_prio - 1;
1818
1819         if (attributes->group)
1820                 return rte_flow_error_set(error, ENOTSUP,
1821                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1822                                           NULL, "groups is not supported");
1823         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1824             attributes->priority >= priority_max)
1825                 return rte_flow_error_set(error, ENOTSUP,
1826                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1827                                           NULL, "priority out of range");
1828         if (attributes->egress)
1829                 return rte_flow_error_set(error, ENOTSUP,
1830                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1831                                           "egress is not supported");
1832         if (attributes->transfer && !priv->config.dv_esw_en)
1833                 return rte_flow_error_set(error, ENOTSUP,
1834                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1835                                           NULL, "transfer is not supported");
1836         if (!attributes->ingress)
1837                 return rte_flow_error_set(error, EINVAL,
1838                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1839                                           NULL,
1840                                           "ingress attribute is mandatory");
1841         return 0;
1842 }
1843
1844 /**
1845  * Validate ICMP6 item.
1846  *
1847  * @param[in] item
1848  *   Item specification.
1849  * @param[in] item_flags
1850  *   Bit-fields that holds the items detected until now.
1851  * @param[in] ext_vlan_sup
1852  *   Whether extended VLAN features are supported or not.
1853  * @param[out] error
1854  *   Pointer to error structure.
1855  *
1856  * @return
1857  *   0 on success, a negative errno value otherwise and rte_errno is set.
1858  */
1859 int
1860 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1861                                uint64_t item_flags,
1862                                uint8_t target_protocol,
1863                                struct rte_flow_error *error)
1864 {
1865         const struct rte_flow_item_icmp6 *mask = item->mask;
1866         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1867         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1868                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1869         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1870                                       MLX5_FLOW_LAYER_OUTER_L4;
1871         int ret;
1872
1873         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1874                 return rte_flow_error_set(error, EINVAL,
1875                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1876                                           "protocol filtering not compatible"
1877                                           " with ICMP6 layer");
1878         if (!(item_flags & l3m))
1879                 return rte_flow_error_set(error, EINVAL,
1880                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1881                                           "IPv6 is mandatory to filter on"
1882                                           " ICMP6");
1883         if (item_flags & l4m)
1884                 return rte_flow_error_set(error, EINVAL,
1885                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1886                                           "multiple L4 layers not supported");
1887         if (!mask)
1888                 mask = &rte_flow_item_icmp6_mask;
1889         ret = mlx5_flow_item_acceptable
1890                 (item, (const uint8_t *)mask,
1891                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1892                  sizeof(struct rte_flow_item_icmp6),
1893                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1894         if (ret < 0)
1895                 return ret;
1896         return 0;
1897 }
1898
1899 /**
1900  * Validate ICMP item.
1901  *
1902  * @param[in] item
1903  *   Item specification.
1904  * @param[in] item_flags
1905  *   Bit-fields that holds the items detected until now.
1906  * @param[out] error
1907  *   Pointer to error structure.
1908  *
1909  * @return
1910  *   0 on success, a negative errno value otherwise and rte_errno is set.
1911  */
1912 int
1913 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1914                              uint64_t item_flags,
1915                              uint8_t target_protocol,
1916                              struct rte_flow_error *error)
1917 {
1918         const struct rte_flow_item_icmp *mask = item->mask;
1919         const struct rte_flow_item_icmp nic_mask = {
1920                 .hdr.icmp_type = 0xff,
1921                 .hdr.icmp_code = 0xff,
1922                 .hdr.icmp_ident = RTE_BE16(0xffff),
1923                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1924         };
1925         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1926         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1927                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1928         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1929                                       MLX5_FLOW_LAYER_OUTER_L4;
1930         int ret;
1931
1932         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1933                 return rte_flow_error_set(error, EINVAL,
1934                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1935                                           "protocol filtering not compatible"
1936                                           " with ICMP layer");
1937         if (!(item_flags & l3m))
1938                 return rte_flow_error_set(error, EINVAL,
1939                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1940                                           "IPv4 is mandatory to filter"
1941                                           " on ICMP");
1942         if (item_flags & l4m)
1943                 return rte_flow_error_set(error, EINVAL,
1944                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1945                                           "multiple L4 layers not supported");
1946         if (!mask)
1947                 mask = &nic_mask;
1948         ret = mlx5_flow_item_acceptable
1949                 (item, (const uint8_t *)mask,
1950                  (const uint8_t *)&nic_mask,
1951                  sizeof(struct rte_flow_item_icmp),
1952                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1953         if (ret < 0)
1954                 return ret;
1955         return 0;
1956 }
1957
1958 /**
1959  * Validate Ethernet item.
1960  *
1961  * @param[in] item
1962  *   Item specification.
1963  * @param[in] item_flags
1964  *   Bit-fields that holds the items detected until now.
1965  * @param[out] error
1966  *   Pointer to error structure.
1967  *
1968  * @return
1969  *   0 on success, a negative errno value otherwise and rte_errno is set.
1970  */
1971 int
1972 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1973                             uint64_t item_flags, bool ext_vlan_sup,
1974                             struct rte_flow_error *error)
1975 {
1976         const struct rte_flow_item_eth *mask = item->mask;
1977         const struct rte_flow_item_eth nic_mask = {
1978                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1979                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1980                 .type = RTE_BE16(0xffff),
1981                 .has_vlan = ext_vlan_sup ? 1 : 0,
1982         };
1983         int ret;
1984         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1985         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1986                                        MLX5_FLOW_LAYER_OUTER_L2;
1987
1988         if (item_flags & ethm)
1989                 return rte_flow_error_set(error, ENOTSUP,
1990                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1991                                           "multiple L2 layers not supported");
1992         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1993             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1994                 return rte_flow_error_set(error, EINVAL,
1995                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1996                                           "L2 layer should not follow "
1997                                           "L3 layers");
1998         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1999             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
2000                 return rte_flow_error_set(error, EINVAL,
2001                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2002                                           "L2 layer should not follow VLAN");
2003         if (item_flags & MLX5_FLOW_LAYER_GTP)
2004                 return rte_flow_error_set(error, EINVAL,
2005                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2006                                           "L2 layer should not follow GTP");
2007         if (!mask)
2008                 mask = &rte_flow_item_eth_mask;
2009         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2010                                         (const uint8_t *)&nic_mask,
2011                                         sizeof(struct rte_flow_item_eth),
2012                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2013         return ret;
2014 }
2015
2016 /**
2017  * Validate VLAN item.
2018  *
2019  * @param[in] item
2020  *   Item specification.
2021  * @param[in] item_flags
2022  *   Bit-fields that holds the items detected until now.
2023  * @param[in] dev
2024  *   Ethernet device flow is being created on.
2025  * @param[out] error
2026  *   Pointer to error structure.
2027  *
2028  * @return
2029  *   0 on success, a negative errno value otherwise and rte_errno is set.
2030  */
2031 int
2032 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2033                              uint64_t item_flags,
2034                              struct rte_eth_dev *dev,
2035                              struct rte_flow_error *error)
2036 {
2037         const struct rte_flow_item_vlan *spec = item->spec;
2038         const struct rte_flow_item_vlan *mask = item->mask;
2039         const struct rte_flow_item_vlan nic_mask = {
2040                 .tci = RTE_BE16(UINT16_MAX),
2041                 .inner_type = RTE_BE16(UINT16_MAX),
2042         };
2043         uint16_t vlan_tag = 0;
2044         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2045         int ret;
2046         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2047                                         MLX5_FLOW_LAYER_INNER_L4) :
2048                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2049                                         MLX5_FLOW_LAYER_OUTER_L4);
2050         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2051                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2052
2053         if (item_flags & vlanm)
2054                 return rte_flow_error_set(error, EINVAL,
2055                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2056                                           "multiple VLAN layers not supported");
2057         else if ((item_flags & l34m) != 0)
2058                 return rte_flow_error_set(error, EINVAL,
2059                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2060                                           "VLAN cannot follow L3/L4 layer");
2061         if (!mask)
2062                 mask = &rte_flow_item_vlan_mask;
2063         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2064                                         (const uint8_t *)&nic_mask,
2065                                         sizeof(struct rte_flow_item_vlan),
2066                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2067         if (ret)
2068                 return ret;
2069         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2070                 struct mlx5_priv *priv = dev->data->dev_private;
2071
2072                 if (priv->vmwa_context) {
2073                         /*
2074                          * Non-NULL context means we have a virtual machine
2075                          * and SR-IOV enabled, we have to create VLAN interface
2076                          * to make hypervisor to setup E-Switch vport
2077                          * context correctly. We avoid creating the multiple
2078                          * VLAN interfaces, so we cannot support VLAN tag mask.
2079                          */
2080                         return rte_flow_error_set(error, EINVAL,
2081                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2082                                                   item,
2083                                                   "VLAN tag mask is not"
2084                                                   " supported in virtual"
2085                                                   " environment");
2086                 }
2087         }
2088         if (spec) {
2089                 vlan_tag = spec->tci;
2090                 vlan_tag &= mask->tci;
2091         }
2092         /*
2093          * From verbs perspective an empty VLAN is equivalent
2094          * to a packet without VLAN layer.
2095          */
2096         if (!vlan_tag)
2097                 return rte_flow_error_set(error, EINVAL,
2098                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2099                                           item->spec,
2100                                           "VLAN cannot be empty");
2101         return 0;
2102 }
2103
2104 /**
2105  * Validate IPV4 item.
2106  *
2107  * @param[in] item
2108  *   Item specification.
2109  * @param[in] item_flags
2110  *   Bit-fields that holds the items detected until now.
2111  * @param[in] last_item
2112  *   Previous validated item in the pattern items.
2113  * @param[in] ether_type
2114  *   Type in the ethernet layer header (including dot1q).
2115  * @param[in] acc_mask
2116  *   Acceptable mask, if NULL default internal default mask
2117  *   will be used to check whether item fields are supported.
2118  * @param[in] range_accepted
2119  *   True if range of values is accepted for specific fields, false otherwise.
2120  * @param[out] error
2121  *   Pointer to error structure.
2122  *
2123  * @return
2124  *   0 on success, a negative errno value otherwise and rte_errno is set.
2125  */
2126 int
2127 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2128                              uint64_t item_flags,
2129                              uint64_t last_item,
2130                              uint16_t ether_type,
2131                              const struct rte_flow_item_ipv4 *acc_mask,
2132                              bool range_accepted,
2133                              struct rte_flow_error *error)
2134 {
2135         const struct rte_flow_item_ipv4 *mask = item->mask;
2136         const struct rte_flow_item_ipv4 *spec = item->spec;
2137         const struct rte_flow_item_ipv4 nic_mask = {
2138                 .hdr = {
2139                         .src_addr = RTE_BE32(0xffffffff),
2140                         .dst_addr = RTE_BE32(0xffffffff),
2141                         .type_of_service = 0xff,
2142                         .next_proto_id = 0xff,
2143                 },
2144         };
2145         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2146         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2147                                       MLX5_FLOW_LAYER_OUTER_L3;
2148         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2149                                       MLX5_FLOW_LAYER_OUTER_L4;
2150         int ret;
2151         uint8_t next_proto = 0xFF;
2152         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2153                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2154                                   MLX5_FLOW_LAYER_INNER_VLAN);
2155
2156         if ((last_item & l2_vlan) && ether_type &&
2157             ether_type != RTE_ETHER_TYPE_IPV4)
2158                 return rte_flow_error_set(error, EINVAL,
2159                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2160                                           "IPv4 cannot follow L2/VLAN layer "
2161                                           "which ether type is not IPv4");
2162         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2163                 if (mask && spec)
2164                         next_proto = mask->hdr.next_proto_id &
2165                                      spec->hdr.next_proto_id;
2166                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2167                         return rte_flow_error_set(error, EINVAL,
2168                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2169                                                   item,
2170                                                   "multiple tunnel "
2171                                                   "not supported");
2172         }
2173         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2174                 return rte_flow_error_set(error, EINVAL,
2175                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2176                                           "wrong tunnel type - IPv6 specified "
2177                                           "but IPv4 item provided");
2178         if (item_flags & l3m)
2179                 return rte_flow_error_set(error, ENOTSUP,
2180                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2181                                           "multiple L3 layers not supported");
2182         else if (item_flags & l4m)
2183                 return rte_flow_error_set(error, EINVAL,
2184                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2185                                           "L3 cannot follow an L4 layer.");
2186         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2187                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2188                 return rte_flow_error_set(error, EINVAL,
2189                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2190                                           "L3 cannot follow an NVGRE layer.");
2191         if (!mask)
2192                 mask = &rte_flow_item_ipv4_mask;
2193         else if (mask->hdr.next_proto_id != 0 &&
2194                  mask->hdr.next_proto_id != 0xff)
2195                 return rte_flow_error_set(error, EINVAL,
2196                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2197                                           "partial mask is not supported"
2198                                           " for protocol");
2199         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2200                                         acc_mask ? (const uint8_t *)acc_mask
2201                                                  : (const uint8_t *)&nic_mask,
2202                                         sizeof(struct rte_flow_item_ipv4),
2203                                         range_accepted, error);
2204         if (ret < 0)
2205                 return ret;
2206         return 0;
2207 }
2208
2209 /**
2210  * Validate IPV6 item.
2211  *
2212  * @param[in] item
2213  *   Item specification.
2214  * @param[in] item_flags
2215  *   Bit-fields that holds the items detected until now.
2216  * @param[in] last_item
2217  *   Previous validated item in the pattern items.
2218  * @param[in] ether_type
2219  *   Type in the ethernet layer header (including dot1q).
2220  * @param[in] acc_mask
2221  *   Acceptable mask, if NULL default internal default mask
2222  *   will be used to check whether item fields are supported.
2223  * @param[out] error
2224  *   Pointer to error structure.
2225  *
2226  * @return
2227  *   0 on success, a negative errno value otherwise and rte_errno is set.
2228  */
2229 int
2230 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2231                              uint64_t item_flags,
2232                              uint64_t last_item,
2233                              uint16_t ether_type,
2234                              const struct rte_flow_item_ipv6 *acc_mask,
2235                              struct rte_flow_error *error)
2236 {
2237         const struct rte_flow_item_ipv6 *mask = item->mask;
2238         const struct rte_flow_item_ipv6 *spec = item->spec;
2239         const struct rte_flow_item_ipv6 nic_mask = {
2240                 .hdr = {
2241                         .src_addr =
2242                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2243                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2244                         .dst_addr =
2245                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2246                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2247                         .vtc_flow = RTE_BE32(0xffffffff),
2248                         .proto = 0xff,
2249                 },
2250         };
2251         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2252         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2253                                       MLX5_FLOW_LAYER_OUTER_L3;
2254         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2255                                       MLX5_FLOW_LAYER_OUTER_L4;
2256         int ret;
2257         uint8_t next_proto = 0xFF;
2258         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2259                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2260                                   MLX5_FLOW_LAYER_INNER_VLAN);
2261
2262         if ((last_item & l2_vlan) && ether_type &&
2263             ether_type != RTE_ETHER_TYPE_IPV6)
2264                 return rte_flow_error_set(error, EINVAL,
2265                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2266                                           "IPv6 cannot follow L2/VLAN layer "
2267                                           "which ether type is not IPv6");
2268         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2269                 next_proto = spec->hdr.proto;
2270         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2271                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2272                         return rte_flow_error_set(error, EINVAL,
2273                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2274                                                   item,
2275                                                   "multiple tunnel "
2276                                                   "not supported");
2277         }
2278         if (next_proto == IPPROTO_HOPOPTS  ||
2279             next_proto == IPPROTO_ROUTING  ||
2280             next_proto == IPPROTO_FRAGMENT ||
2281             next_proto == IPPROTO_ESP      ||
2282             next_proto == IPPROTO_AH       ||
2283             next_proto == IPPROTO_DSTOPTS)
2284                 return rte_flow_error_set(error, EINVAL,
2285                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2286                                           "IPv6 proto (next header) should "
2287                                           "not be set as extension header");
2288         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2289                 return rte_flow_error_set(error, EINVAL,
2290                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2291                                           "wrong tunnel type - IPv4 specified "
2292                                           "but IPv6 item provided");
2293         if (item_flags & l3m)
2294                 return rte_flow_error_set(error, ENOTSUP,
2295                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2296                                           "multiple L3 layers not supported");
2297         else if (item_flags & l4m)
2298                 return rte_flow_error_set(error, EINVAL,
2299                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2300                                           "L3 cannot follow an L4 layer.");
2301         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2302                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2303                 return rte_flow_error_set(error, EINVAL,
2304                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2305                                           "L3 cannot follow an NVGRE layer.");
2306         if (!mask)
2307                 mask = &rte_flow_item_ipv6_mask;
2308         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2309                                         acc_mask ? (const uint8_t *)acc_mask
2310                                                  : (const uint8_t *)&nic_mask,
2311                                         sizeof(struct rte_flow_item_ipv6),
2312                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2313         if (ret < 0)
2314                 return ret;
2315         return 0;
2316 }
2317
2318 /**
2319  * Validate UDP item.
2320  *
2321  * @param[in] item
2322  *   Item specification.
2323  * @param[in] item_flags
2324  *   Bit-fields that holds the items detected until now.
2325  * @param[in] target_protocol
2326  *   The next protocol in the previous item.
2327  * @param[in] flow_mask
2328  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2329  * @param[out] error
2330  *   Pointer to error structure.
2331  *
2332  * @return
2333  *   0 on success, a negative errno value otherwise and rte_errno is set.
2334  */
2335 int
2336 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2337                             uint64_t item_flags,
2338                             uint8_t target_protocol,
2339                             struct rte_flow_error *error)
2340 {
2341         const struct rte_flow_item_udp *mask = item->mask;
2342         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2343         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2344                                       MLX5_FLOW_LAYER_OUTER_L3;
2345         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2346                                       MLX5_FLOW_LAYER_OUTER_L4;
2347         int ret;
2348
2349         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2350                 return rte_flow_error_set(error, EINVAL,
2351                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2352                                           "protocol filtering not compatible"
2353                                           " with UDP layer");
2354         if (!(item_flags & l3m))
2355                 return rte_flow_error_set(error, EINVAL,
2356                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2357                                           "L3 is mandatory to filter on L4");
2358         if (item_flags & l4m)
2359                 return rte_flow_error_set(error, EINVAL,
2360                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2361                                           "multiple L4 layers not supported");
2362         if (!mask)
2363                 mask = &rte_flow_item_udp_mask;
2364         ret = mlx5_flow_item_acceptable
2365                 (item, (const uint8_t *)mask,
2366                  (const uint8_t *)&rte_flow_item_udp_mask,
2367                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2368                  error);
2369         if (ret < 0)
2370                 return ret;
2371         return 0;
2372 }
2373
2374 /**
2375  * Validate TCP item.
2376  *
2377  * @param[in] item
2378  *   Item specification.
2379  * @param[in] item_flags
2380  *   Bit-fields that holds the items detected until now.
2381  * @param[in] target_protocol
2382  *   The next protocol in the previous item.
2383  * @param[out] error
2384  *   Pointer to error structure.
2385  *
2386  * @return
2387  *   0 on success, a negative errno value otherwise and rte_errno is set.
2388  */
2389 int
2390 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2391                             uint64_t item_flags,
2392                             uint8_t target_protocol,
2393                             const struct rte_flow_item_tcp *flow_mask,
2394                             struct rte_flow_error *error)
2395 {
2396         const struct rte_flow_item_tcp *mask = item->mask;
2397         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2398         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2399                                       MLX5_FLOW_LAYER_OUTER_L3;
2400         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2401                                       MLX5_FLOW_LAYER_OUTER_L4;
2402         int ret;
2403
2404         MLX5_ASSERT(flow_mask);
2405         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2406                 return rte_flow_error_set(error, EINVAL,
2407                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2408                                           "protocol filtering not compatible"
2409                                           " with TCP layer");
2410         if (!(item_flags & l3m))
2411                 return rte_flow_error_set(error, EINVAL,
2412                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2413                                           "L3 is mandatory to filter on L4");
2414         if (item_flags & l4m)
2415                 return rte_flow_error_set(error, EINVAL,
2416                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2417                                           "multiple L4 layers not supported");
2418         if (!mask)
2419                 mask = &rte_flow_item_tcp_mask;
2420         ret = mlx5_flow_item_acceptable
2421                 (item, (const uint8_t *)mask,
2422                  (const uint8_t *)flow_mask,
2423                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2424                  error);
2425         if (ret < 0)
2426                 return ret;
2427         return 0;
2428 }
2429
2430 /**
2431  * Validate VXLAN item.
2432  *
2433  * @param[in] dev
2434  *   Pointer to the Ethernet device structure.
2435  * @param[in] item
2436  *   Item specification.
2437  * @param[in] item_flags
2438  *   Bit-fields that holds the items detected until now.
2439  * @param[in] attr
2440  *   Flow rule attributes.
2441  * @param[out] error
2442  *   Pointer to error structure.
2443  *
2444  * @return
2445  *   0 on success, a negative errno value otherwise and rte_errno is set.
2446  */
2447 int
2448 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2449                               const struct rte_flow_item *item,
2450                               uint64_t item_flags,
2451                               const struct rte_flow_attr *attr,
2452                               struct rte_flow_error *error)
2453 {
2454         const struct rte_flow_item_vxlan *spec = item->spec;
2455         const struct rte_flow_item_vxlan *mask = item->mask;
2456         int ret;
2457         struct mlx5_priv *priv = dev->data->dev_private;
2458         union vni {
2459                 uint32_t vlan_id;
2460                 uint8_t vni[4];
2461         } id = { .vlan_id = 0, };
2462         const struct rte_flow_item_vxlan nic_mask = {
2463                 .vni = "\xff\xff\xff",
2464                 .rsvd1 = 0xff,
2465         };
2466         const struct rte_flow_item_vxlan *valid_mask;
2467
2468         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2469                 return rte_flow_error_set(error, ENOTSUP,
2470                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2471                                           "multiple tunnel layers not"
2472                                           " supported");
2473         valid_mask = &rte_flow_item_vxlan_mask;
2474         /*
2475          * Verify only UDPv4 is present as defined in
2476          * https://tools.ietf.org/html/rfc7348
2477          */
2478         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2479                 return rte_flow_error_set(error, EINVAL,
2480                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2481                                           "no outer UDP layer found");
2482         if (!mask)
2483                 mask = &rte_flow_item_vxlan_mask;
2484         /* FDB domain & NIC domain non-zero group */
2485         if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2486                 valid_mask = &nic_mask;
2487         /* Group zero in NIC domain */
2488         if (!attr->group && !attr->transfer && priv->sh->tunnel_header_0_1)
2489                 valid_mask = &nic_mask;
2490         ret = mlx5_flow_item_acceptable
2491                 (item, (const uint8_t *)mask,
2492                  (const uint8_t *)valid_mask,
2493                  sizeof(struct rte_flow_item_vxlan),
2494                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2495         if (ret < 0)
2496                 return ret;
2497         if (spec) {
2498                 memcpy(&id.vni[1], spec->vni, 3);
2499                 memcpy(&id.vni[1], mask->vni, 3);
2500         }
2501         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2502                 return rte_flow_error_set(error, ENOTSUP,
2503                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2504                                           "VXLAN tunnel must be fully defined");
2505         return 0;
2506 }
2507
2508 /**
2509  * Validate VXLAN_GPE item.
2510  *
2511  * @param[in] item
2512  *   Item specification.
2513  * @param[in] item_flags
2514  *   Bit-fields that holds the items detected until now.
2515  * @param[in] priv
2516  *   Pointer to the private data structure.
2517  * @param[in] target_protocol
2518  *   The next protocol in the previous item.
2519  * @param[out] error
2520  *   Pointer to error structure.
2521  *
2522  * @return
2523  *   0 on success, a negative errno value otherwise and rte_errno is set.
2524  */
2525 int
2526 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2527                                   uint64_t item_flags,
2528                                   struct rte_eth_dev *dev,
2529                                   struct rte_flow_error *error)
2530 {
2531         struct mlx5_priv *priv = dev->data->dev_private;
2532         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2533         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2534         int ret;
2535         union vni {
2536                 uint32_t vlan_id;
2537                 uint8_t vni[4];
2538         } id = { .vlan_id = 0, };
2539
2540         if (!priv->config.l3_vxlan_en)
2541                 return rte_flow_error_set(error, ENOTSUP,
2542                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2543                                           "L3 VXLAN is not enabled by device"
2544                                           " parameter and/or not configured in"
2545                                           " firmware");
2546         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2547                 return rte_flow_error_set(error, ENOTSUP,
2548                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2549                                           "multiple tunnel layers not"
2550                                           " supported");
2551         /*
2552          * Verify only UDPv4 is present as defined in
2553          * https://tools.ietf.org/html/rfc7348
2554          */
2555         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2556                 return rte_flow_error_set(error, EINVAL,
2557                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2558                                           "no outer UDP layer found");
2559         if (!mask)
2560                 mask = &rte_flow_item_vxlan_gpe_mask;
2561         ret = mlx5_flow_item_acceptable
2562                 (item, (const uint8_t *)mask,
2563                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2564                  sizeof(struct rte_flow_item_vxlan_gpe),
2565                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2566         if (ret < 0)
2567                 return ret;
2568         if (spec) {
2569                 if (spec->protocol)
2570                         return rte_flow_error_set(error, ENOTSUP,
2571                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2572                                                   item,
2573                                                   "VxLAN-GPE protocol"
2574                                                   " not supported");
2575                 memcpy(&id.vni[1], spec->vni, 3);
2576                 memcpy(&id.vni[1], mask->vni, 3);
2577         }
2578         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2579                 return rte_flow_error_set(error, ENOTSUP,
2580                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2581                                           "VXLAN-GPE tunnel must be fully"
2582                                           " defined");
2583         return 0;
2584 }
2585 /**
2586  * Validate GRE Key item.
2587  *
2588  * @param[in] item
2589  *   Item specification.
2590  * @param[in] item_flags
2591  *   Bit flags to mark detected items.
2592  * @param[in] gre_item
2593  *   Pointer to gre_item
2594  * @param[out] error
2595  *   Pointer to error structure.
2596  *
2597  * @return
2598  *   0 on success, a negative errno value otherwise and rte_errno is set.
2599  */
2600 int
2601 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2602                                 uint64_t item_flags,
2603                                 const struct rte_flow_item *gre_item,
2604                                 struct rte_flow_error *error)
2605 {
2606         const rte_be32_t *mask = item->mask;
2607         int ret = 0;
2608         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2609         const struct rte_flow_item_gre *gre_spec;
2610         const struct rte_flow_item_gre *gre_mask;
2611
2612         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2613                 return rte_flow_error_set(error, ENOTSUP,
2614                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2615                                           "Multiple GRE key not support");
2616         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2617                 return rte_flow_error_set(error, ENOTSUP,
2618                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2619                                           "No preceding GRE header");
2620         if (item_flags & MLX5_FLOW_LAYER_INNER)
2621                 return rte_flow_error_set(error, ENOTSUP,
2622                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2623                                           "GRE key following a wrong item");
2624         gre_mask = gre_item->mask;
2625         if (!gre_mask)
2626                 gre_mask = &rte_flow_item_gre_mask;
2627         gre_spec = gre_item->spec;
2628         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2629                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2630                 return rte_flow_error_set(error, EINVAL,
2631                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2632                                           "Key bit must be on");
2633
2634         if (!mask)
2635                 mask = &gre_key_default_mask;
2636         ret = mlx5_flow_item_acceptable
2637                 (item, (const uint8_t *)mask,
2638                  (const uint8_t *)&gre_key_default_mask,
2639                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2640         return ret;
2641 }
2642
2643 /**
2644  * Validate GRE item.
2645  *
2646  * @param[in] item
2647  *   Item specification.
2648  * @param[in] item_flags
2649  *   Bit flags to mark detected items.
2650  * @param[in] target_protocol
2651  *   The next protocol in the previous item.
2652  * @param[out] error
2653  *   Pointer to error structure.
2654  *
2655  * @return
2656  *   0 on success, a negative errno value otherwise and rte_errno is set.
2657  */
2658 int
2659 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2660                             uint64_t item_flags,
2661                             uint8_t target_protocol,
2662                             struct rte_flow_error *error)
2663 {
2664         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2665         const struct rte_flow_item_gre *mask = item->mask;
2666         int ret;
2667         const struct rte_flow_item_gre nic_mask = {
2668                 .c_rsvd0_ver = RTE_BE16(0xB000),
2669                 .protocol = RTE_BE16(UINT16_MAX),
2670         };
2671
2672         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2673                 return rte_flow_error_set(error, EINVAL,
2674                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2675                                           "protocol filtering not compatible"
2676                                           " with this GRE layer");
2677         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2678                 return rte_flow_error_set(error, ENOTSUP,
2679                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2680                                           "multiple tunnel layers not"
2681                                           " supported");
2682         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2683                 return rte_flow_error_set(error, ENOTSUP,
2684                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2685                                           "L3 Layer is missing");
2686         if (!mask)
2687                 mask = &rte_flow_item_gre_mask;
2688         ret = mlx5_flow_item_acceptable
2689                 (item, (const uint8_t *)mask,
2690                  (const uint8_t *)&nic_mask,
2691                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2692                  error);
2693         if (ret < 0)
2694                 return ret;
2695 #ifndef HAVE_MLX5DV_DR
2696 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2697         if (spec && (spec->protocol & mask->protocol))
2698                 return rte_flow_error_set(error, ENOTSUP,
2699                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2700                                           "without MPLS support the"
2701                                           " specification cannot be used for"
2702                                           " filtering");
2703 #endif
2704 #endif
2705         return 0;
2706 }
2707
2708 /**
2709  * Validate Geneve item.
2710  *
2711  * @param[in] item
2712  *   Item specification.
2713  * @param[in] itemFlags
2714  *   Bit-fields that holds the items detected until now.
2715  * @param[in] enPriv
2716  *   Pointer to the private data structure.
2717  * @param[out] error
2718  *   Pointer to error structure.
2719  *
2720  * @return
2721  *   0 on success, a negative errno value otherwise and rte_errno is set.
2722  */
2723
2724 int
2725 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2726                                uint64_t item_flags,
2727                                struct rte_eth_dev *dev,
2728                                struct rte_flow_error *error)
2729 {
2730         struct mlx5_priv *priv = dev->data->dev_private;
2731         const struct rte_flow_item_geneve *spec = item->spec;
2732         const struct rte_flow_item_geneve *mask = item->mask;
2733         int ret;
2734         uint16_t gbhdr;
2735         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2736                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2737         const struct rte_flow_item_geneve nic_mask = {
2738                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2739                 .vni = "\xff\xff\xff",
2740                 .protocol = RTE_BE16(UINT16_MAX),
2741         };
2742
2743         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2744                 return rte_flow_error_set(error, ENOTSUP,
2745                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2746                                           "L3 Geneve is not enabled by device"
2747                                           " parameter and/or not configured in"
2748                                           " firmware");
2749         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2750                 return rte_flow_error_set(error, ENOTSUP,
2751                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2752                                           "multiple tunnel layers not"
2753                                           " supported");
2754         /*
2755          * Verify only UDPv4 is present as defined in
2756          * https://tools.ietf.org/html/rfc7348
2757          */
2758         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2759                 return rte_flow_error_set(error, EINVAL,
2760                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2761                                           "no outer UDP layer found");
2762         if (!mask)
2763                 mask = &rte_flow_item_geneve_mask;
2764         ret = mlx5_flow_item_acceptable
2765                                   (item, (const uint8_t *)mask,
2766                                    (const uint8_t *)&nic_mask,
2767                                    sizeof(struct rte_flow_item_geneve),
2768                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2769         if (ret)
2770                 return ret;
2771         if (spec) {
2772                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2773                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2774                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2775                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2776                         return rte_flow_error_set(error, ENOTSUP,
2777                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2778                                                   item,
2779                                                   "Geneve protocol unsupported"
2780                                                   " fields are being used");
2781                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2782                         return rte_flow_error_set
2783                                         (error, ENOTSUP,
2784                                          RTE_FLOW_ERROR_TYPE_ITEM,
2785                                          item,
2786                                          "Unsupported Geneve options length");
2787         }
2788         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2789                 return rte_flow_error_set
2790                                     (error, ENOTSUP,
2791                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2792                                      "Geneve tunnel must be fully defined");
2793         return 0;
2794 }
2795
2796 /**
2797  * Validate Geneve TLV option item.
2798  *
2799  * @param[in] item
2800  *   Item specification.
2801  * @param[in] last_item
2802  *   Previous validated item in the pattern items.
2803  * @param[in] geneve_item
2804  *   Previous GENEVE item specification.
2805  * @param[in] dev
2806  *   Pointer to the rte_eth_dev structure.
2807  * @param[out] error
2808  *   Pointer to error structure.
2809  *
2810  * @return
2811  *   0 on success, a negative errno value otherwise and rte_errno is set.
2812  */
2813 int
2814 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2815                                    uint64_t last_item,
2816                                    const struct rte_flow_item *geneve_item,
2817                                    struct rte_eth_dev *dev,
2818                                    struct rte_flow_error *error)
2819 {
2820         struct mlx5_priv *priv = dev->data->dev_private;
2821         struct mlx5_dev_ctx_shared *sh = priv->sh;
2822         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2823         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2824         uint8_t data_max_supported =
2825                         hca_attr->max_geneve_tlv_option_data_len * 4;
2826         struct mlx5_dev_config *config = &priv->config;
2827         const struct rte_flow_item_geneve *geneve_spec;
2828         const struct rte_flow_item_geneve *geneve_mask;
2829         const struct rte_flow_item_geneve_opt *spec = item->spec;
2830         const struct rte_flow_item_geneve_opt *mask = item->mask;
2831         unsigned int i;
2832         unsigned int data_len;
2833         uint8_t tlv_option_len;
2834         uint16_t optlen_m, optlen_v;
2835         const struct rte_flow_item_geneve_opt full_mask = {
2836                 .option_class = RTE_BE16(0xffff),
2837                 .option_type = 0xff,
2838                 .option_len = 0x1f,
2839         };
2840
2841         if (!mask)
2842                 mask = &rte_flow_item_geneve_opt_mask;
2843         if (!spec)
2844                 return rte_flow_error_set
2845                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2846                         "Geneve TLV opt class/type/length must be specified");
2847         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2848                 return rte_flow_error_set
2849                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2850                         "Geneve TLV opt length exceeeds the limit (31)");
2851         /* Check if class type and length masks are full. */
2852         if (full_mask.option_class != mask->option_class ||
2853             full_mask.option_type != mask->option_type ||
2854             full_mask.option_len != (mask->option_len & full_mask.option_len))
2855                 return rte_flow_error_set
2856                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2857                         "Geneve TLV opt class/type/length masks must be full");
2858         /* Check if length is supported */
2859         if ((uint32_t)spec->option_len >
2860                         config->hca_attr.max_geneve_tlv_option_data_len)
2861                 return rte_flow_error_set
2862                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2863                         "Geneve TLV opt length not supported");
2864         if (config->hca_attr.max_geneve_tlv_options > 1)
2865                 DRV_LOG(DEBUG,
2866                         "max_geneve_tlv_options supports more than 1 option");
2867         /* Check GENEVE item preceding. */
2868         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2869                 return rte_flow_error_set
2870                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2871                         "Geneve opt item must be preceded with Geneve item");
2872         geneve_spec = geneve_item->spec;
2873         geneve_mask = geneve_item->mask ? geneve_item->mask :
2874                                           &rte_flow_item_geneve_mask;
2875         /* Check if GENEVE TLV option size doesn't exceed option length */
2876         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2877                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2878                 tlv_option_len = spec->option_len & mask->option_len;
2879                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2880                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2881                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2882                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2883                 if ((optlen_v & optlen_m) <= tlv_option_len)
2884                         return rte_flow_error_set
2885                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2886                                  "GENEVE TLV option length exceeds optlen");
2887         }
2888         /* Check if length is 0 or data is 0. */
2889         if (spec->data == NULL || spec->option_len == 0)
2890                 return rte_flow_error_set
2891                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2892                         "Geneve TLV opt with zero data/length not supported");
2893         /* Check not all data & mask are 0. */
2894         data_len = spec->option_len * 4;
2895         if (mask->data == NULL) {
2896                 for (i = 0; i < data_len; i++)
2897                         if (spec->data[i])
2898                                 break;
2899                 if (i == data_len)
2900                         return rte_flow_error_set(error, ENOTSUP,
2901                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2902                                 "Can't match on Geneve option data 0");
2903         } else {
2904                 for (i = 0; i < data_len; i++)
2905                         if (spec->data[i] & mask->data[i])
2906                                 break;
2907                 if (i == data_len)
2908                         return rte_flow_error_set(error, ENOTSUP,
2909                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2910                                 "Can't match on Geneve option data and mask 0");
2911                 /* Check data mask supported. */
2912                 for (i = data_max_supported; i < data_len ; i++)
2913                         if (mask->data[i])
2914                                 return rte_flow_error_set(error, ENOTSUP,
2915                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2916                                         "Data mask is of unsupported size");
2917         }
2918         /* Check GENEVE option is supported in NIC. */
2919         if (!config->hca_attr.geneve_tlv_opt)
2920                 return rte_flow_error_set
2921                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2922                         "Geneve TLV opt not supported");
2923         /* Check if we already have geneve option with different type/class. */
2924         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
2925         geneve_opt_resource = sh->geneve_tlv_option_resource;
2926         if (geneve_opt_resource != NULL)
2927                 if (geneve_opt_resource->option_class != spec->option_class ||
2928                     geneve_opt_resource->option_type != spec->option_type ||
2929                     geneve_opt_resource->length != spec->option_len) {
2930                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2931                         return rte_flow_error_set(error, ENOTSUP,
2932                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2933                                 "Only one Geneve TLV option supported");
2934                 }
2935         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2936         return 0;
2937 }
2938
2939 /**
2940  * Validate MPLS item.
2941  *
2942  * @param[in] dev
2943  *   Pointer to the rte_eth_dev structure.
2944  * @param[in] item
2945  *   Item specification.
2946  * @param[in] item_flags
2947  *   Bit-fields that holds the items detected until now.
2948  * @param[in] prev_layer
2949  *   The protocol layer indicated in previous item.
2950  * @param[out] error
2951  *   Pointer to error structure.
2952  *
2953  * @return
2954  *   0 on success, a negative errno value otherwise and rte_errno is set.
2955  */
2956 int
2957 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2958                              const struct rte_flow_item *item __rte_unused,
2959                              uint64_t item_flags __rte_unused,
2960                              uint64_t prev_layer __rte_unused,
2961                              struct rte_flow_error *error)
2962 {
2963 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2964         const struct rte_flow_item_mpls *mask = item->mask;
2965         struct mlx5_priv *priv = dev->data->dev_private;
2966         int ret;
2967
2968         if (!priv->config.mpls_en)
2969                 return rte_flow_error_set(error, ENOTSUP,
2970                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2971                                           "MPLS not supported or"
2972                                           " disabled in firmware"
2973                                           " configuration.");
2974         /* MPLS over UDP, GRE is allowed */
2975         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
2976                             MLX5_FLOW_LAYER_GRE |
2977                             MLX5_FLOW_LAYER_GRE_KEY)))
2978                 return rte_flow_error_set(error, EINVAL,
2979                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2980                                           "protocol filtering not compatible"
2981                                           " with MPLS layer");
2982         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2983         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2984             !(item_flags & MLX5_FLOW_LAYER_GRE))
2985                 return rte_flow_error_set(error, ENOTSUP,
2986                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2987                                           "multiple tunnel layers not"
2988                                           " supported");
2989         if (!mask)
2990                 mask = &rte_flow_item_mpls_mask;
2991         ret = mlx5_flow_item_acceptable
2992                 (item, (const uint8_t *)mask,
2993                  (const uint8_t *)&rte_flow_item_mpls_mask,
2994                  sizeof(struct rte_flow_item_mpls),
2995                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2996         if (ret < 0)
2997                 return ret;
2998         return 0;
2999 #else
3000         return rte_flow_error_set(error, ENOTSUP,
3001                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
3002                                   "MPLS is not supported by Verbs, please"
3003                                   " update.");
3004 #endif
3005 }
3006
3007 /**
3008  * Validate NVGRE item.
3009  *
3010  * @param[in] item
3011  *   Item specification.
3012  * @param[in] item_flags
3013  *   Bit flags to mark detected items.
3014  * @param[in] target_protocol
3015  *   The next protocol in the previous item.
3016  * @param[out] error
3017  *   Pointer to error structure.
3018  *
3019  * @return
3020  *   0 on success, a negative errno value otherwise and rte_errno is set.
3021  */
3022 int
3023 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3024                               uint64_t item_flags,
3025                               uint8_t target_protocol,
3026                               struct rte_flow_error *error)
3027 {
3028         const struct rte_flow_item_nvgre *mask = item->mask;
3029         int ret;
3030
3031         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3032                 return rte_flow_error_set(error, EINVAL,
3033                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3034                                           "protocol filtering not compatible"
3035                                           " with this GRE layer");
3036         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3037                 return rte_flow_error_set(error, ENOTSUP,
3038                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3039                                           "multiple tunnel layers not"
3040                                           " supported");
3041         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3042                 return rte_flow_error_set(error, ENOTSUP,
3043                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3044                                           "L3 Layer is missing");
3045         if (!mask)
3046                 mask = &rte_flow_item_nvgre_mask;
3047         ret = mlx5_flow_item_acceptable
3048                 (item, (const uint8_t *)mask,
3049                  (const uint8_t *)&rte_flow_item_nvgre_mask,
3050                  sizeof(struct rte_flow_item_nvgre),
3051                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3052         if (ret < 0)
3053                 return ret;
3054         return 0;
3055 }
3056
3057 /**
3058  * Validate eCPRI item.
3059  *
3060  * @param[in] item
3061  *   Item specification.
3062  * @param[in] item_flags
3063  *   Bit-fields that holds the items detected until now.
3064  * @param[in] last_item
3065  *   Previous validated item in the pattern items.
3066  * @param[in] ether_type
3067  *   Type in the ethernet layer header (including dot1q).
3068  * @param[in] acc_mask
3069  *   Acceptable mask, if NULL default internal default mask
3070  *   will be used to check whether item fields are supported.
3071  * @param[out] error
3072  *   Pointer to error structure.
3073  *
3074  * @return
3075  *   0 on success, a negative errno value otherwise and rte_errno is set.
3076  */
3077 int
3078 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3079                               uint64_t item_flags,
3080                               uint64_t last_item,
3081                               uint16_t ether_type,
3082                               const struct rte_flow_item_ecpri *acc_mask,
3083                               struct rte_flow_error *error)
3084 {
3085         const struct rte_flow_item_ecpri *mask = item->mask;
3086         const struct rte_flow_item_ecpri nic_mask = {
3087                 .hdr = {
3088                         .common = {
3089                                 .u32 =
3090                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3091                                         .type = 0xFF,
3092                                         }).u32),
3093                         },
3094                         .dummy[0] = 0xFFFFFFFF,
3095                 },
3096         };
3097         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3098                                         MLX5_FLOW_LAYER_OUTER_VLAN);
3099         struct rte_flow_item_ecpri mask_lo;
3100
3101         if (!(last_item & outer_l2_vlan) &&
3102             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3103                 return rte_flow_error_set(error, EINVAL,
3104                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3105                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
3106         if ((last_item & outer_l2_vlan) && ether_type &&
3107             ether_type != RTE_ETHER_TYPE_ECPRI)
3108                 return rte_flow_error_set(error, EINVAL,
3109                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3110                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3111         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3112                 return rte_flow_error_set(error, EINVAL,
3113                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3114                                           "eCPRI with tunnel is not supported right now");
3115         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3116                 return rte_flow_error_set(error, ENOTSUP,
3117                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3118                                           "multiple L3 layers not supported");
3119         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3120                 return rte_flow_error_set(error, EINVAL,
3121                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3122                                           "eCPRI cannot coexist with a TCP layer");
3123         /* In specification, eCPRI could be over UDP layer. */
3124         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3125                 return rte_flow_error_set(error, EINVAL,
3126                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3127                                           "eCPRI over UDP layer is not yet supported right now");
3128         /* Mask for type field in common header could be zero. */
3129         if (!mask)
3130                 mask = &rte_flow_item_ecpri_mask;
3131         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3132         /* Input mask is in big-endian format. */
3133         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3134                 return rte_flow_error_set(error, EINVAL,
3135                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3136                                           "partial mask is not supported for protocol");
3137         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3138                 return rte_flow_error_set(error, EINVAL,
3139                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3140                                           "message header mask must be after a type mask");
3141         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3142                                          acc_mask ? (const uint8_t *)acc_mask
3143                                                   : (const uint8_t *)&nic_mask,
3144                                          sizeof(struct rte_flow_item_ecpri),
3145                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3146 }
3147
3148 static int
3149 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3150                    const struct rte_flow_attr *attr __rte_unused,
3151                    const struct rte_flow_item items[] __rte_unused,
3152                    const struct rte_flow_action actions[] __rte_unused,
3153                    bool external __rte_unused,
3154                    int hairpin __rte_unused,
3155                    struct rte_flow_error *error)
3156 {
3157         return rte_flow_error_set(error, ENOTSUP,
3158                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3159 }
3160
3161 static struct mlx5_flow *
3162 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3163                   const struct rte_flow_attr *attr __rte_unused,
3164                   const struct rte_flow_item items[] __rte_unused,
3165                   const struct rte_flow_action actions[] __rte_unused,
3166                   struct rte_flow_error *error)
3167 {
3168         rte_flow_error_set(error, ENOTSUP,
3169                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3170         return NULL;
3171 }
3172
3173 static int
3174 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3175                     struct mlx5_flow *dev_flow __rte_unused,
3176                     const struct rte_flow_attr *attr __rte_unused,
3177                     const struct rte_flow_item items[] __rte_unused,
3178                     const struct rte_flow_action actions[] __rte_unused,
3179                     struct rte_flow_error *error)
3180 {
3181         return rte_flow_error_set(error, ENOTSUP,
3182                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3183 }
3184
3185 static int
3186 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3187                 struct rte_flow *flow __rte_unused,
3188                 struct rte_flow_error *error)
3189 {
3190         return rte_flow_error_set(error, ENOTSUP,
3191                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3192 }
3193
3194 static void
3195 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3196                  struct rte_flow *flow __rte_unused)
3197 {
3198 }
3199
3200 static void
3201 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3202                   struct rte_flow *flow __rte_unused)
3203 {
3204 }
3205
3206 static int
3207 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3208                 struct rte_flow *flow __rte_unused,
3209                 const struct rte_flow_action *actions __rte_unused,
3210                 void *data __rte_unused,
3211                 struct rte_flow_error *error)
3212 {
3213         return rte_flow_error_set(error, ENOTSUP,
3214                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3215 }
3216
3217 static int
3218 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3219                       uint32_t domains __rte_unused,
3220                       uint32_t flags __rte_unused)
3221 {
3222         return 0;
3223 }
3224
3225 /* Void driver to protect from null pointer reference. */
3226 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3227         .validate = flow_null_validate,
3228         .prepare = flow_null_prepare,
3229         .translate = flow_null_translate,
3230         .apply = flow_null_apply,
3231         .remove = flow_null_remove,
3232         .destroy = flow_null_destroy,
3233         .query = flow_null_query,
3234         .sync_domain = flow_null_sync_domain,
3235 };
3236
3237 /**
3238  * Select flow driver type according to flow attributes and device
3239  * configuration.
3240  *
3241  * @param[in] dev
3242  *   Pointer to the dev structure.
3243  * @param[in] attr
3244  *   Pointer to the flow attributes.
3245  *
3246  * @return
3247  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3248  */
3249 static enum mlx5_flow_drv_type
3250 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3251 {
3252         struct mlx5_priv *priv = dev->data->dev_private;
3253         /* The OS can determine first a specific flow type (DV, VERBS) */
3254         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3255
3256         if (type != MLX5_FLOW_TYPE_MAX)
3257                 return type;
3258         /* If no OS specific type - continue with DV/VERBS selection */
3259         if (attr->transfer && priv->config.dv_esw_en)
3260                 type = MLX5_FLOW_TYPE_DV;
3261         if (!attr->transfer)
3262                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3263                                                  MLX5_FLOW_TYPE_VERBS;
3264         return type;
3265 }
3266
3267 #define flow_get_drv_ops(type) flow_drv_ops[type]
3268
3269 /**
3270  * Flow driver validation API. This abstracts calling driver specific functions.
3271  * The type of flow driver is determined according to flow attributes.
3272  *
3273  * @param[in] dev
3274  *   Pointer to the dev structure.
3275  * @param[in] attr
3276  *   Pointer to the flow attributes.
3277  * @param[in] items
3278  *   Pointer to the list of items.
3279  * @param[in] actions
3280  *   Pointer to the list of actions.
3281  * @param[in] external
3282  *   This flow rule is created by request external to PMD.
3283  * @param[in] hairpin
3284  *   Number of hairpin TX actions, 0 means classic flow.
3285  * @param[out] error
3286  *   Pointer to the error structure.
3287  *
3288  * @return
3289  *   0 on success, a negative errno value otherwise and rte_errno is set.
3290  */
3291 static inline int
3292 flow_drv_validate(struct rte_eth_dev *dev,
3293                   const struct rte_flow_attr *attr,
3294                   const struct rte_flow_item items[],
3295                   const struct rte_flow_action actions[],
3296                   bool external, int hairpin, struct rte_flow_error *error)
3297 {
3298         const struct mlx5_flow_driver_ops *fops;
3299         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3300
3301         fops = flow_get_drv_ops(type);
3302         return fops->validate(dev, attr, items, actions, external,
3303                               hairpin, error);
3304 }
3305
3306 /**
3307  * Flow driver preparation API. This abstracts calling driver specific
3308  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3309  * calculates the size of memory required for device flow, allocates the memory,
3310  * initializes the device flow and returns the pointer.
3311  *
3312  * @note
3313  *   This function initializes device flow structure such as dv or verbs in
3314  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3315  *   rest. For example, adding returning device flow to flow->dev_flow list and
3316  *   setting backward reference to the flow should be done out of this function.
3317  *   layers field is not filled either.
3318  *
3319  * @param[in] dev
3320  *   Pointer to the dev structure.
3321  * @param[in] attr
3322  *   Pointer to the flow attributes.
3323  * @param[in] items
3324  *   Pointer to the list of items.
3325  * @param[in] actions
3326  *   Pointer to the list of actions.
3327  * @param[in] flow_idx
3328  *   This memory pool index to the flow.
3329  * @param[out] error
3330  *   Pointer to the error structure.
3331  *
3332  * @return
3333  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3334  */
3335 static inline struct mlx5_flow *
3336 flow_drv_prepare(struct rte_eth_dev *dev,
3337                  const struct rte_flow *flow,
3338                  const struct rte_flow_attr *attr,
3339                  const struct rte_flow_item items[],
3340                  const struct rte_flow_action actions[],
3341                  uint32_t flow_idx,
3342                  struct rte_flow_error *error)
3343 {
3344         const struct mlx5_flow_driver_ops *fops;
3345         enum mlx5_flow_drv_type type = flow->drv_type;
3346         struct mlx5_flow *mlx5_flow = NULL;
3347
3348         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3349         fops = flow_get_drv_ops(type);
3350         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3351         if (mlx5_flow)
3352                 mlx5_flow->flow_idx = flow_idx;
3353         return mlx5_flow;
3354 }
3355
3356 /**
3357  * Flow driver translation API. This abstracts calling driver specific
3358  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3359  * translates a generic flow into a driver flow. flow_drv_prepare() must
3360  * precede.
3361  *
3362  * @note
3363  *   dev_flow->layers could be filled as a result of parsing during translation
3364  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3365  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3366  *   flow->actions could be overwritten even though all the expanded dev_flows
3367  *   have the same actions.
3368  *
3369  * @param[in] dev
3370  *   Pointer to the rte dev structure.
3371  * @param[in, out] dev_flow
3372  *   Pointer to the mlx5 flow.
3373  * @param[in] attr
3374  *   Pointer to the flow attributes.
3375  * @param[in] items
3376  *   Pointer to the list of items.
3377  * @param[in] actions
3378  *   Pointer to the list of actions.
3379  * @param[out] error
3380  *   Pointer to the error structure.
3381  *
3382  * @return
3383  *   0 on success, a negative errno value otherwise and rte_errno is set.
3384  */
3385 static inline int
3386 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3387                    const struct rte_flow_attr *attr,
3388                    const struct rte_flow_item items[],
3389                    const struct rte_flow_action actions[],
3390                    struct rte_flow_error *error)
3391 {
3392         const struct mlx5_flow_driver_ops *fops;
3393         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3394
3395         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3396         fops = flow_get_drv_ops(type);
3397         return fops->translate(dev, dev_flow, attr, items, actions, error);
3398 }
3399
3400 /**
3401  * Flow driver apply API. This abstracts calling driver specific functions.
3402  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3403  * translated driver flows on to device. flow_drv_translate() must precede.
3404  *
3405  * @param[in] dev
3406  *   Pointer to Ethernet device structure.
3407  * @param[in, out] flow
3408  *   Pointer to flow structure.
3409  * @param[out] error
3410  *   Pointer to error structure.
3411  *
3412  * @return
3413  *   0 on success, a negative errno value otherwise and rte_errno is set.
3414  */
3415 static inline int
3416 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3417                struct rte_flow_error *error)
3418 {
3419         const struct mlx5_flow_driver_ops *fops;
3420         enum mlx5_flow_drv_type type = flow->drv_type;
3421
3422         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3423         fops = flow_get_drv_ops(type);
3424         return fops->apply(dev, flow, error);
3425 }
3426
3427 /**
3428  * Flow driver destroy API. This abstracts calling driver specific functions.
3429  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3430  * on device and releases resources of the flow.
3431  *
3432  * @param[in] dev
3433  *   Pointer to Ethernet device.
3434  * @param[in, out] flow
3435  *   Pointer to flow structure.
3436  */
3437 static inline void
3438 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3439 {
3440         const struct mlx5_flow_driver_ops *fops;
3441         enum mlx5_flow_drv_type type = flow->drv_type;
3442
3443         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3444         fops = flow_get_drv_ops(type);
3445         fops->destroy(dev, flow);
3446 }
3447
3448 /**
3449  * Flow driver find RSS policy tbl API. This abstracts calling driver
3450  * specific functions. Parent flow (rte_flow) should have driver
3451  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3452  *
3453  * @param[in] dev
3454  *   Pointer to Ethernet device.
3455  * @param[in, out] flow
3456  *   Pointer to flow structure.
3457  * @param[in] policy
3458  *   Pointer to meter policy table.
3459  * @param[in] rss_desc
3460  *   Pointer to rss_desc
3461  */
3462 static struct mlx5_flow_meter_sub_policy *
3463 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3464                 struct rte_flow *flow,
3465                 struct mlx5_flow_meter_policy *policy,
3466                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3467 {
3468         const struct mlx5_flow_driver_ops *fops;
3469         enum mlx5_flow_drv_type type = flow->drv_type;
3470
3471         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3472         fops = flow_get_drv_ops(type);
3473         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3474 }
3475
3476 /**
3477  * Flow driver color tag rule API. This abstracts calling driver
3478  * specific functions. Parent flow (rte_flow) should have driver
3479  * type (drv_type). It will create the color tag rules in hierarchy meter.
3480  *
3481  * @param[in] dev
3482  *   Pointer to Ethernet device.
3483  * @param[in, out] flow
3484  *   Pointer to flow structure.
3485  * @param[in] fm
3486  *   Pointer to flow meter structure.
3487  * @param[in] src_port
3488  *   The src port this extra rule should use.
3489  * @param[in] item
3490  *   The src port id match item.
3491  * @param[out] error
3492  *   Pointer to error structure.
3493  */
3494 static int
3495 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3496                 struct rte_flow *flow,
3497                 struct mlx5_flow_meter_info *fm,
3498                 int32_t src_port,
3499                 const struct rte_flow_item *item,
3500                 struct rte_flow_error *error)
3501 {
3502         const struct mlx5_flow_driver_ops *fops;
3503         enum mlx5_flow_drv_type type = flow->drv_type;
3504
3505         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3506         fops = flow_get_drv_ops(type);
3507         return fops->meter_hierarchy_rule_create(dev, fm,
3508                                                 src_port, item, error);
3509 }
3510
3511 /**
3512  * Get RSS action from the action list.
3513  *
3514  * @param[in] dev
3515  *   Pointer to Ethernet device.
3516  * @param[in] actions
3517  *   Pointer to the list of actions.
3518  * @param[in] flow
3519  *   Parent flow structure pointer.
3520  *
3521  * @return
3522  *   Pointer to the RSS action if exist, else return NULL.
3523  */
3524 static const struct rte_flow_action_rss*
3525 flow_get_rss_action(struct rte_eth_dev *dev,
3526                     const struct rte_flow_action actions[])
3527 {
3528         struct mlx5_priv *priv = dev->data->dev_private;
3529         const struct rte_flow_action_rss *rss = NULL;
3530
3531         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3532                 switch (actions->type) {
3533                 case RTE_FLOW_ACTION_TYPE_RSS:
3534                         rss = actions->conf;
3535                         break;
3536                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3537                 {
3538                         const struct rte_flow_action_sample *sample =
3539                                                                 actions->conf;
3540                         const struct rte_flow_action *act = sample->actions;
3541                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3542                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3543                                         rss = act->conf;
3544                         break;
3545                 }
3546                 case RTE_FLOW_ACTION_TYPE_METER:
3547                 {
3548                         uint32_t mtr_idx;
3549                         struct mlx5_flow_meter_info *fm;
3550                         struct mlx5_flow_meter_policy *policy;
3551                         const struct rte_flow_action_meter *mtr = actions->conf;
3552
3553                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3554                         if (fm && !fm->def_policy) {
3555                                 policy = mlx5_flow_meter_policy_find(dev,
3556                                                 fm->policy_id, NULL);
3557                                 MLX5_ASSERT(policy);
3558                                 if (policy->is_hierarchy) {
3559                                         policy =
3560                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3561                                                                         policy);
3562                                         if (!policy)
3563                                                 return NULL;
3564                                 }
3565                                 if (policy->is_rss)
3566                                         rss =
3567                                 policy->act_cnt[RTE_COLOR_GREEN].rss->conf;
3568                         }
3569                         break;
3570                 }
3571                 default:
3572                         break;
3573                 }
3574         }
3575         return rss;
3576 }
3577
3578 /**
3579  * Get ASO age action by index.
3580  *
3581  * @param[in] dev
3582  *   Pointer to the Ethernet device structure.
3583  * @param[in] age_idx
3584  *   Index to the ASO age action.
3585  *
3586  * @return
3587  *   The specified ASO age action.
3588  */
3589 struct mlx5_aso_age_action*
3590 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3591 {
3592         uint16_t pool_idx = age_idx & UINT16_MAX;
3593         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3594         struct mlx5_priv *priv = dev->data->dev_private;
3595         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3596         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3597
3598         return &pool->actions[offset - 1];
3599 }
3600
3601 /* maps indirect action to translated direct in some actions array */
3602 struct mlx5_translated_action_handle {
3603         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3604         int index; /**< Index in related array of rte_flow_action. */
3605 };
3606
3607 /**
3608  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3609  * direct action if translation possible.
3610  * This functionality used to run same execution path for both direct and
3611  * indirect actions on flow create. All necessary preparations for indirect
3612  * action handling should be performed on *handle* actions list returned
3613  * from this call.
3614  *
3615  * @param[in] dev
3616  *   Pointer to Ethernet device.
3617  * @param[in] actions
3618  *   List of actions to translate.
3619  * @param[out] handle
3620  *   List to store translated indirect action object handles.
3621  * @param[in, out] indir_n
3622  *   Size of *handle* array. On return should be updated with number of
3623  *   indirect actions retrieved from the *actions* list.
3624  * @param[out] translated_actions
3625  *   List of actions where all indirect actions were translated to direct
3626  *   if possible. NULL if no translation took place.
3627  * @param[out] error
3628  *   Pointer to the error structure.
3629  *
3630  * @return
3631  *   0 on success, a negative errno value otherwise and rte_errno is set.
3632  */
3633 static int
3634 flow_action_handles_translate(struct rte_eth_dev *dev,
3635                               const struct rte_flow_action actions[],
3636                               struct mlx5_translated_action_handle *handle,
3637                               int *indir_n,
3638                               struct rte_flow_action **translated_actions,
3639                               struct rte_flow_error *error)
3640 {
3641         struct mlx5_priv *priv = dev->data->dev_private;
3642         struct rte_flow_action *translated = NULL;
3643         size_t actions_size;
3644         int n;
3645         int copied_n = 0;
3646         struct mlx5_translated_action_handle *handle_end = NULL;
3647
3648         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3649                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3650                         continue;
3651                 if (copied_n == *indir_n) {
3652                         return rte_flow_error_set
3653                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3654                                  NULL, "too many shared actions");
3655                 }
3656                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3657                            sizeof(actions[n].conf));
3658                 handle[copied_n].index = n;
3659                 copied_n++;
3660         }
3661         n++;
3662         *indir_n = copied_n;
3663         if (!copied_n)
3664                 return 0;
3665         actions_size = sizeof(struct rte_flow_action) * n;
3666         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3667         if (!translated) {
3668                 rte_errno = ENOMEM;
3669                 return -ENOMEM;
3670         }
3671         memcpy(translated, actions, actions_size);
3672         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3673                 struct mlx5_shared_action_rss *shared_rss;
3674                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3675                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3676                 uint32_t idx = act_idx &
3677                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3678
3679                 switch (type) {
3680                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3681                         shared_rss = mlx5_ipool_get
3682                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3683                         translated[handle->index].type =
3684                                 RTE_FLOW_ACTION_TYPE_RSS;
3685                         translated[handle->index].conf =
3686                                 &shared_rss->origin;
3687                         break;
3688                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3689                         translated[handle->index].type =
3690                                                 (enum rte_flow_action_type)
3691                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3692                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3693                         break;
3694                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3695                         if (priv->sh->flow_hit_aso_en) {
3696                                 translated[handle->index].type =
3697                                         (enum rte_flow_action_type)
3698                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3699                                 translated[handle->index].conf =
3700                                                          (void *)(uintptr_t)idx;
3701                                 break;
3702                         }
3703                         /* Fall-through */
3704                 case MLX5_INDIRECT_ACTION_TYPE_CT:
3705                         if (priv->sh->ct_aso_en) {
3706                                 translated[handle->index].type =
3707                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
3708                                 translated[handle->index].conf =
3709                                                          (void *)(uintptr_t)idx;
3710                                 break;
3711                         }
3712                         /* Fall-through */
3713                 default:
3714                         mlx5_free(translated);
3715                         return rte_flow_error_set
3716                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3717                                  NULL, "invalid indirect action type");
3718                 }
3719         }
3720         *translated_actions = translated;
3721         return 0;
3722 }
3723
3724 /**
3725  * Get Shared RSS action from the action list.
3726  *
3727  * @param[in] dev
3728  *   Pointer to Ethernet device.
3729  * @param[in] shared
3730  *   Pointer to the list of actions.
3731  * @param[in] shared_n
3732  *   Actions list length.
3733  *
3734  * @return
3735  *   The MLX5 RSS action ID if exists, otherwise return 0.
3736  */
3737 static uint32_t
3738 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3739                            struct mlx5_translated_action_handle *handle,
3740                            int shared_n)
3741 {
3742         struct mlx5_translated_action_handle *handle_end;
3743         struct mlx5_priv *priv = dev->data->dev_private;
3744         struct mlx5_shared_action_rss *shared_rss;
3745
3746
3747         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3748                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3749                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3750                 uint32_t idx = act_idx &
3751                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3752                 switch (type) {
3753                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3754                         shared_rss = mlx5_ipool_get
3755                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3756                                                                            idx);
3757                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3758                                            __ATOMIC_RELAXED);
3759                         return idx;
3760                 default:
3761                         break;
3762                 }
3763         }
3764         return 0;
3765 }
3766
3767 static unsigned int
3768 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3769 {
3770         const struct rte_flow_item *item;
3771         unsigned int has_vlan = 0;
3772
3773         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3774                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3775                         has_vlan = 1;
3776                         break;
3777                 }
3778         }
3779         if (has_vlan)
3780                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3781                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3782         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3783                                MLX5_EXPANSION_ROOT_OUTER;
3784 }
3785
3786 /**
3787  *  Get layer flags from the prefix flow.
3788  *
3789  *  Some flows may be split to several subflows, the prefix subflow gets the
3790  *  match items and the suffix sub flow gets the actions.
3791  *  Some actions need the user defined match item flags to get the detail for
3792  *  the action.
3793  *  This function helps the suffix flow to get the item layer flags from prefix
3794  *  subflow.
3795  *
3796  * @param[in] dev_flow
3797  *   Pointer the created preifx subflow.
3798  *
3799  * @return
3800  *   The layers get from prefix subflow.
3801  */
3802 static inline uint64_t
3803 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3804 {
3805         uint64_t layers = 0;
3806
3807         /*
3808          * Layers bits could be localization, but usually the compiler will
3809          * help to do the optimization work for source code.
3810          * If no decap actions, use the layers directly.
3811          */
3812         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3813                 return dev_flow->handle->layers;
3814         /* Convert L3 layers with decap action. */
3815         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3816                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3817         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3818                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3819         /* Convert L4 layers with decap action.  */
3820         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3821                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3822         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3823                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3824         return layers;
3825 }
3826
3827 /**
3828  * Get metadata split action information.
3829  *
3830  * @param[in] actions
3831  *   Pointer to the list of actions.
3832  * @param[out] qrss
3833  *   Pointer to the return pointer.
3834  * @param[out] qrss_type
3835  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3836  *   if no QUEUE/RSS is found.
3837  * @param[out] encap_idx
3838  *   Pointer to the index of the encap action if exists, otherwise the last
3839  *   action index.
3840  *
3841  * @return
3842  *   Total number of actions.
3843  */
3844 static int
3845 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3846                                        const struct rte_flow_action **qrss,
3847                                        int *encap_idx)
3848 {
3849         const struct rte_flow_action_raw_encap *raw_encap;
3850         int actions_n = 0;
3851         int raw_decap_idx = -1;
3852
3853         *encap_idx = -1;
3854         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3855                 switch (actions->type) {
3856                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3857                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3858                         *encap_idx = actions_n;
3859                         break;
3860                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3861                         raw_decap_idx = actions_n;
3862                         break;
3863                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3864                         raw_encap = actions->conf;
3865                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3866                                 *encap_idx = raw_decap_idx != -1 ?
3867                                                       raw_decap_idx : actions_n;
3868                         break;
3869                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3870                 case RTE_FLOW_ACTION_TYPE_RSS:
3871                         *qrss = actions;
3872                         break;
3873                 default:
3874                         break;
3875                 }
3876                 actions_n++;
3877         }
3878         if (*encap_idx == -1)
3879                 *encap_idx = actions_n;
3880         /* Count RTE_FLOW_ACTION_TYPE_END. */
3881         return actions_n + 1;
3882 }
3883
3884 /**
3885  * Check if the action will change packet.
3886  *
3887  * @param dev
3888  *   Pointer to Ethernet device.
3889  * @param[in] type
3890  *   action type.
3891  *
3892  * @return
3893  *   true if action will change packet, false otherwise.
3894  */
3895 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
3896                                           enum rte_flow_action_type type)
3897 {
3898         struct mlx5_priv *priv = dev->data->dev_private;
3899
3900         switch (type) {
3901         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3902         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3903         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3904         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3905         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3906         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3907         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3908         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3909         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3910         case RTE_FLOW_ACTION_TYPE_SET_TTL:
3911         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3912         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3913         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3914         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3915         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
3916         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
3917         case RTE_FLOW_ACTION_TYPE_SET_META:
3918         case RTE_FLOW_ACTION_TYPE_SET_TAG:
3919         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3920         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3921         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3922         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3923         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3924         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3925         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3926         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3927         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3928         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3929         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
3930                 return true;
3931         case RTE_FLOW_ACTION_TYPE_FLAG:
3932         case RTE_FLOW_ACTION_TYPE_MARK:
3933                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
3934                         return true;
3935                 else
3936                         return false;
3937         default:
3938                 return false;
3939         }
3940 }
3941
3942 /**
3943  * Check meter action from the action list.
3944  *
3945  * @param dev
3946  *   Pointer to Ethernet device.
3947  * @param[in] actions
3948  *   Pointer to the list of actions.
3949  * @param[out] has_mtr
3950  *   Pointer to the meter exist flag.
3951  * @param[out] has_modify
3952  *   Pointer to the flag showing there's packet change action.
3953  * @param[out] meter_id
3954  *   Pointer to the meter id.
3955  *
3956  * @return
3957  *   Total number of actions.
3958  */
3959 static int
3960 flow_check_meter_action(struct rte_eth_dev *dev,
3961                         const struct rte_flow_action actions[],
3962                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
3963 {
3964         const struct rte_flow_action_meter *mtr = NULL;
3965         int actions_n = 0;
3966
3967         MLX5_ASSERT(has_mtr);
3968         *has_mtr = false;
3969         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3970                 switch (actions->type) {
3971                 case RTE_FLOW_ACTION_TYPE_METER:
3972                         mtr = actions->conf;
3973                         *meter_id = mtr->mtr_id;
3974                         *has_mtr = true;
3975                         break;
3976                 default:
3977                         break;
3978                 }
3979                 if (!*has_mtr)
3980                         *has_modify |= flow_check_modify_action_type(dev,
3981                                                                 actions->type);
3982                 actions_n++;
3983         }
3984         /* Count RTE_FLOW_ACTION_TYPE_END. */
3985         return actions_n + 1;
3986 }
3987
3988 /**
3989  * Check if the flow should be split due to hairpin.
3990  * The reason for the split is that in current HW we can't
3991  * support encap and push-vlan on Rx, so if a flow contains
3992  * these actions we move it to Tx.
3993  *
3994  * @param dev
3995  *   Pointer to Ethernet device.
3996  * @param[in] attr
3997  *   Flow rule attributes.
3998  * @param[in] actions
3999  *   Associated actions (list terminated by the END action).
4000  *
4001  * @return
4002  *   > 0 the number of actions and the flow should be split,
4003  *   0 when no split required.
4004  */
4005 static int
4006 flow_check_hairpin_split(struct rte_eth_dev *dev,
4007                          const struct rte_flow_attr *attr,
4008                          const struct rte_flow_action actions[])
4009 {
4010         int queue_action = 0;
4011         int action_n = 0;
4012         int split = 0;
4013         const struct rte_flow_action_queue *queue;
4014         const struct rte_flow_action_rss *rss;
4015         const struct rte_flow_action_raw_encap *raw_encap;
4016         const struct rte_eth_hairpin_conf *conf;
4017
4018         if (!attr->ingress)
4019                 return 0;
4020         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4021                 switch (actions->type) {
4022                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4023                         queue = actions->conf;
4024                         if (queue == NULL)
4025                                 return 0;
4026                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4027                         if (conf == NULL || conf->tx_explicit != 0)
4028                                 return 0;
4029                         queue_action = 1;
4030                         action_n++;
4031                         break;
4032                 case RTE_FLOW_ACTION_TYPE_RSS:
4033                         rss = actions->conf;
4034                         if (rss == NULL || rss->queue_num == 0)
4035                                 return 0;
4036                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4037                         if (conf == NULL || conf->tx_explicit != 0)
4038                                 return 0;
4039                         queue_action = 1;
4040                         action_n++;
4041                         break;
4042                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4043                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4044                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4045                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4046                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4047                         split++;
4048                         action_n++;
4049                         break;
4050                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4051                         raw_encap = actions->conf;
4052                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4053                                 split++;
4054                         action_n++;
4055                         break;
4056                 default:
4057                         action_n++;
4058                         break;
4059                 }
4060         }
4061         if (split && queue_action)
4062                 return action_n;
4063         return 0;
4064 }
4065
4066 /* Declare flow create/destroy prototype in advance. */
4067 static uint32_t
4068 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4069                  const struct rte_flow_attr *attr,
4070                  const struct rte_flow_item items[],
4071                  const struct rte_flow_action actions[],
4072                  bool external, struct rte_flow_error *error);
4073
4074 static void
4075 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4076                   uint32_t flow_idx);
4077
4078 int
4079 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4080                       struct mlx5_list_entry *entry, void *cb_ctx)
4081 {
4082         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4083         struct mlx5_flow_mreg_copy_resource *mcp_res =
4084                                container_of(entry, typeof(*mcp_res), hlist_ent);
4085
4086         return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4087 }
4088
4089 struct mlx5_list_entry *
4090 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4091 {
4092         struct rte_eth_dev *dev = tool_ctx;
4093         struct mlx5_priv *priv = dev->data->dev_private;
4094         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4095         struct mlx5_flow_mreg_copy_resource *mcp_res;
4096         struct rte_flow_error *error = ctx->error;
4097         uint32_t idx = 0;
4098         int ret;
4099         uint32_t mark_id = *(uint32_t *)(ctx->data);
4100         struct rte_flow_attr attr = {
4101                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4102                 .ingress = 1,
4103         };
4104         struct mlx5_rte_flow_item_tag tag_spec = {
4105                 .data = mark_id,
4106         };
4107         struct rte_flow_item items[] = {
4108                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4109         };
4110         struct rte_flow_action_mark ftag = {
4111                 .id = mark_id,
4112         };
4113         struct mlx5_flow_action_copy_mreg cp_mreg = {
4114                 .dst = REG_B,
4115                 .src = REG_NON,
4116         };
4117         struct rte_flow_action_jump jump = {
4118                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4119         };
4120         struct rte_flow_action actions[] = {
4121                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4122         };
4123
4124         /* Fill the register fileds in the flow. */
4125         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4126         if (ret < 0)
4127                 return NULL;
4128         tag_spec.id = ret;
4129         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4130         if (ret < 0)
4131                 return NULL;
4132         cp_mreg.src = ret;
4133         /* Provide the full width of FLAG specific value. */
4134         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4135                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4136         /* Build a new flow. */
4137         if (mark_id != MLX5_DEFAULT_COPY_ID) {
4138                 items[0] = (struct rte_flow_item){
4139                         .type = (enum rte_flow_item_type)
4140                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4141                         .spec = &tag_spec,
4142                 };
4143                 items[1] = (struct rte_flow_item){
4144                         .type = RTE_FLOW_ITEM_TYPE_END,
4145                 };
4146                 actions[0] = (struct rte_flow_action){
4147                         .type = (enum rte_flow_action_type)
4148                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4149                         .conf = &ftag,
4150                 };
4151                 actions[1] = (struct rte_flow_action){
4152                         .type = (enum rte_flow_action_type)
4153                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4154                         .conf = &cp_mreg,
4155                 };
4156                 actions[2] = (struct rte_flow_action){
4157                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4158                         .conf = &jump,
4159                 };
4160                 actions[3] = (struct rte_flow_action){
4161                         .type = RTE_FLOW_ACTION_TYPE_END,
4162                 };
4163         } else {
4164                 /* Default rule, wildcard match. */
4165                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4166                 items[0] = (struct rte_flow_item){
4167                         .type = RTE_FLOW_ITEM_TYPE_END,
4168                 };
4169                 actions[0] = (struct rte_flow_action){
4170                         .type = (enum rte_flow_action_type)
4171                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4172                         .conf = &cp_mreg,
4173                 };
4174                 actions[1] = (struct rte_flow_action){
4175                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4176                         .conf = &jump,
4177                 };
4178                 actions[2] = (struct rte_flow_action){
4179                         .type = RTE_FLOW_ACTION_TYPE_END,
4180                 };
4181         }
4182         /* Build a new entry. */
4183         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4184         if (!mcp_res) {
4185                 rte_errno = ENOMEM;
4186                 return NULL;
4187         }
4188         mcp_res->idx = idx;
4189         mcp_res->mark_id = mark_id;
4190         /*
4191          * The copy Flows are not included in any list. There
4192          * ones are referenced from other Flows and can not
4193          * be applied, removed, deleted in ardbitrary order
4194          * by list traversing.
4195          */
4196         mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4197                                         &attr, items, actions, false, error);
4198         if (!mcp_res->rix_flow) {
4199                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4200                 return NULL;
4201         }
4202         return &mcp_res->hlist_ent;
4203 }
4204
4205 struct mlx5_list_entry *
4206 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4207                       void *cb_ctx __rte_unused)
4208 {
4209         struct rte_eth_dev *dev = tool_ctx;
4210         struct mlx5_priv *priv = dev->data->dev_private;
4211         struct mlx5_flow_mreg_copy_resource *mcp_res;
4212         uint32_t idx = 0;
4213
4214         mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4215         if (!mcp_res) {
4216                 rte_errno = ENOMEM;
4217                 return NULL;
4218         }
4219         memcpy(mcp_res, oentry, sizeof(*mcp_res));
4220         mcp_res->idx = idx;
4221         return &mcp_res->hlist_ent;
4222 }
4223
4224 void
4225 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4226 {
4227         struct mlx5_flow_mreg_copy_resource *mcp_res =
4228                                container_of(entry, typeof(*mcp_res), hlist_ent);
4229         struct rte_eth_dev *dev = tool_ctx;
4230         struct mlx5_priv *priv = dev->data->dev_private;
4231
4232         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4233 }
4234
4235 /**
4236  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4237  *
4238  * As mark_id is unique, if there's already a registered flow for the mark_id,
4239  * return by increasing the reference counter of the resource. Otherwise, create
4240  * the resource (mcp_res) and flow.
4241  *
4242  * Flow looks like,
4243  *   - If ingress port is ANY and reg_c[1] is mark_id,
4244  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4245  *
4246  * For default flow (zero mark_id), flow is like,
4247  *   - If ingress port is ANY,
4248  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4249  *
4250  * @param dev
4251  *   Pointer to Ethernet device.
4252  * @param mark_id
4253  *   ID of MARK action, zero means default flow for META.
4254  * @param[out] error
4255  *   Perform verbose error reporting if not NULL.
4256  *
4257  * @return
4258  *   Associated resource on success, NULL otherwise and rte_errno is set.
4259  */
4260 static struct mlx5_flow_mreg_copy_resource *
4261 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4262                           struct rte_flow_error *error)
4263 {
4264         struct mlx5_priv *priv = dev->data->dev_private;
4265         struct mlx5_list_entry *entry;
4266         struct mlx5_flow_cb_ctx ctx = {
4267                 .dev = dev,
4268                 .error = error,
4269                 .data = &mark_id,
4270         };
4271
4272         /* Check if already registered. */
4273         MLX5_ASSERT(priv->mreg_cp_tbl);
4274         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4275         if (!entry)
4276                 return NULL;
4277         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4278                             hlist_ent);
4279 }
4280
4281 void
4282 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4283 {
4284         struct mlx5_flow_mreg_copy_resource *mcp_res =
4285                                container_of(entry, typeof(*mcp_res), hlist_ent);
4286         struct rte_eth_dev *dev = tool_ctx;
4287         struct mlx5_priv *priv = dev->data->dev_private;
4288
4289         MLX5_ASSERT(mcp_res->rix_flow);
4290         flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4291         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4292 }
4293
4294 /**
4295  * Release flow in RX_CP_TBL.
4296  *
4297  * @param dev
4298  *   Pointer to Ethernet device.
4299  * @flow
4300  *   Parent flow for wich copying is provided.
4301  */
4302 static void
4303 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4304                           struct rte_flow *flow)
4305 {
4306         struct mlx5_flow_mreg_copy_resource *mcp_res;
4307         struct mlx5_priv *priv = dev->data->dev_private;
4308
4309         if (!flow->rix_mreg_copy)
4310                 return;
4311         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4312                                  flow->rix_mreg_copy);
4313         if (!mcp_res || !priv->mreg_cp_tbl)
4314                 return;
4315         MLX5_ASSERT(mcp_res->rix_flow);
4316         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4317         flow->rix_mreg_copy = 0;
4318 }
4319
4320 /**
4321  * Remove the default copy action from RX_CP_TBL.
4322  *
4323  * This functions is called in the mlx5_dev_start(). No thread safe
4324  * is guaranteed.
4325  *
4326  * @param dev
4327  *   Pointer to Ethernet device.
4328  */
4329 static void
4330 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4331 {
4332         struct mlx5_list_entry *entry;
4333         struct mlx5_priv *priv = dev->data->dev_private;
4334         struct mlx5_flow_cb_ctx ctx;
4335         uint32_t mark_id;
4336
4337         /* Check if default flow is registered. */
4338         if (!priv->mreg_cp_tbl)
4339                 return;
4340         mark_id = MLX5_DEFAULT_COPY_ID;
4341         ctx.data = &mark_id;
4342         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4343         if (!entry)
4344                 return;
4345         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4346 }
4347
4348 /**
4349  * Add the default copy action in in RX_CP_TBL.
4350  *
4351  * This functions is called in the mlx5_dev_start(). No thread safe
4352  * is guaranteed.
4353  *
4354  * @param dev
4355  *   Pointer to Ethernet device.
4356  * @param[out] error
4357  *   Perform verbose error reporting if not NULL.
4358  *
4359  * @return
4360  *   0 for success, negative value otherwise and rte_errno is set.
4361  */
4362 static int
4363 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4364                                   struct rte_flow_error *error)
4365 {
4366         struct mlx5_priv *priv = dev->data->dev_private;
4367         struct mlx5_flow_mreg_copy_resource *mcp_res;
4368         struct mlx5_flow_cb_ctx ctx;
4369         uint32_t mark_id;
4370
4371         /* Check whether extensive metadata feature is engaged. */
4372         if (!priv->config.dv_flow_en ||
4373             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4374             !mlx5_flow_ext_mreg_supported(dev) ||
4375             !priv->sh->dv_regc0_mask)
4376                 return 0;
4377         /*
4378          * Add default mreg copy flow may be called multiple time, but
4379          * only be called once in stop. Avoid register it twice.
4380          */
4381         mark_id = MLX5_DEFAULT_COPY_ID;
4382         ctx.data = &mark_id;
4383         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4384                 return 0;
4385         mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4386         if (!mcp_res)
4387                 return -rte_errno;
4388         return 0;
4389 }
4390
4391 /**
4392  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4393  *
4394  * All the flow having Q/RSS action should be split by
4395  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4396  * performs the following,
4397  *   - CQE->flow_tag := reg_c[1] (MARK)
4398  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4399  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4400  * but there should be a flow per each MARK ID set by MARK action.
4401  *
4402  * For the aforementioned reason, if there's a MARK action in flow's action
4403  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4404  * the MARK ID to CQE's flow_tag like,
4405  *   - If reg_c[1] is mark_id,
4406  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4407  *
4408  * For SET_META action which stores value in reg_c[0], as the destination is
4409  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4410  * MARK ID means the default flow. The default flow looks like,
4411  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4412  *
4413  * @param dev
4414  *   Pointer to Ethernet device.
4415  * @param flow
4416  *   Pointer to flow structure.
4417  * @param[in] actions
4418  *   Pointer to the list of actions.
4419  * @param[out] error
4420  *   Perform verbose error reporting if not NULL.
4421  *
4422  * @return
4423  *   0 on success, negative value otherwise and rte_errno is set.
4424  */
4425 static int
4426 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4427                             struct rte_flow *flow,
4428                             const struct rte_flow_action *actions,
4429                             struct rte_flow_error *error)
4430 {
4431         struct mlx5_priv *priv = dev->data->dev_private;
4432         struct mlx5_dev_config *config = &priv->config;
4433         struct mlx5_flow_mreg_copy_resource *mcp_res;
4434         const struct rte_flow_action_mark *mark;
4435
4436         /* Check whether extensive metadata feature is engaged. */
4437         if (!config->dv_flow_en ||
4438             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4439             !mlx5_flow_ext_mreg_supported(dev) ||
4440             !priv->sh->dv_regc0_mask)
4441                 return 0;
4442         /* Find MARK action. */
4443         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4444                 switch (actions->type) {
4445                 case RTE_FLOW_ACTION_TYPE_FLAG:
4446                         mcp_res = flow_mreg_add_copy_action
4447                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4448                         if (!mcp_res)
4449                                 return -rte_errno;
4450                         flow->rix_mreg_copy = mcp_res->idx;
4451                         return 0;
4452                 case RTE_FLOW_ACTION_TYPE_MARK:
4453                         mark = (const struct rte_flow_action_mark *)
4454                                 actions->conf;
4455                         mcp_res =
4456                                 flow_mreg_add_copy_action(dev, mark->id, error);
4457                         if (!mcp_res)
4458                                 return -rte_errno;
4459                         flow->rix_mreg_copy = mcp_res->idx;
4460                         return 0;
4461                 default:
4462                         break;
4463                 }
4464         }
4465         return 0;
4466 }
4467
4468 #define MLX5_MAX_SPLIT_ACTIONS 24
4469 #define MLX5_MAX_SPLIT_ITEMS 24
4470
4471 /**
4472  * Split the hairpin flow.
4473  * Since HW can't support encap and push-vlan on Rx, we move these
4474  * actions to Tx.
4475  * If the count action is after the encap then we also
4476  * move the count action. in this case the count will also measure
4477  * the outer bytes.
4478  *
4479  * @param dev
4480  *   Pointer to Ethernet device.
4481  * @param[in] actions
4482  *   Associated actions (list terminated by the END action).
4483  * @param[out] actions_rx
4484  *   Rx flow actions.
4485  * @param[out] actions_tx
4486  *   Tx flow actions..
4487  * @param[out] pattern_tx
4488  *   The pattern items for the Tx flow.
4489  * @param[out] flow_id
4490  *   The flow ID connected to this flow.
4491  *
4492  * @return
4493  *   0 on success.
4494  */
4495 static int
4496 flow_hairpin_split(struct rte_eth_dev *dev,
4497                    const struct rte_flow_action actions[],
4498                    struct rte_flow_action actions_rx[],
4499                    struct rte_flow_action actions_tx[],
4500                    struct rte_flow_item pattern_tx[],
4501                    uint32_t flow_id)
4502 {
4503         const struct rte_flow_action_raw_encap *raw_encap;
4504         const struct rte_flow_action_raw_decap *raw_decap;
4505         struct mlx5_rte_flow_action_set_tag *set_tag;
4506         struct rte_flow_action *tag_action;
4507         struct mlx5_rte_flow_item_tag *tag_item;
4508         struct rte_flow_item *item;
4509         char *addr;
4510         int encap = 0;
4511
4512         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4513                 switch (actions->type) {
4514                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4515                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4516                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4517                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4518                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4519                         rte_memcpy(actions_tx, actions,
4520                                sizeof(struct rte_flow_action));
4521                         actions_tx++;
4522                         break;
4523                 case RTE_FLOW_ACTION_TYPE_COUNT:
4524                         if (encap) {
4525                                 rte_memcpy(actions_tx, actions,
4526                                            sizeof(struct rte_flow_action));
4527                                 actions_tx++;
4528                         } else {
4529                                 rte_memcpy(actions_rx, actions,
4530                                            sizeof(struct rte_flow_action));
4531                                 actions_rx++;
4532                         }
4533                         break;
4534                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4535                         raw_encap = actions->conf;
4536                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4537                                 memcpy(actions_tx, actions,
4538                                        sizeof(struct rte_flow_action));
4539                                 actions_tx++;
4540                                 encap = 1;
4541                         } else {
4542                                 rte_memcpy(actions_rx, actions,
4543                                            sizeof(struct rte_flow_action));
4544                                 actions_rx++;
4545                         }
4546                         break;
4547                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4548                         raw_decap = actions->conf;
4549                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4550                                 memcpy(actions_tx, actions,
4551                                        sizeof(struct rte_flow_action));
4552                                 actions_tx++;
4553                         } else {
4554                                 rte_memcpy(actions_rx, actions,
4555                                            sizeof(struct rte_flow_action));
4556                                 actions_rx++;
4557                         }
4558                         break;
4559                 default:
4560                         rte_memcpy(actions_rx, actions,
4561                                    sizeof(struct rte_flow_action));
4562                         actions_rx++;
4563                         break;
4564                 }
4565         }
4566         /* Add set meta action and end action for the Rx flow. */
4567         tag_action = actions_rx;
4568         tag_action->type = (enum rte_flow_action_type)
4569                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4570         actions_rx++;
4571         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4572         actions_rx++;
4573         set_tag = (void *)actions_rx;
4574         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4575                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4576                 .data = flow_id,
4577         };
4578         MLX5_ASSERT(set_tag->id > REG_NON);
4579         tag_action->conf = set_tag;
4580         /* Create Tx item list. */
4581         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4582         addr = (void *)&pattern_tx[2];
4583         item = pattern_tx;
4584         item->type = (enum rte_flow_item_type)
4585                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4586         tag_item = (void *)addr;
4587         tag_item->data = flow_id;
4588         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4589         MLX5_ASSERT(set_tag->id > REG_NON);
4590         item->spec = tag_item;
4591         addr += sizeof(struct mlx5_rte_flow_item_tag);
4592         tag_item = (void *)addr;
4593         tag_item->data = UINT32_MAX;
4594         tag_item->id = UINT16_MAX;
4595         item->mask = tag_item;
4596         item->last = NULL;
4597         item++;
4598         item->type = RTE_FLOW_ITEM_TYPE_END;
4599         return 0;
4600 }
4601
4602 /**
4603  * The last stage of splitting chain, just creates the subflow
4604  * without any modification.
4605  *
4606  * @param[in] dev
4607  *   Pointer to Ethernet device.
4608  * @param[in] flow
4609  *   Parent flow structure pointer.
4610  * @param[in, out] sub_flow
4611  *   Pointer to return the created subflow, may be NULL.
4612  * @param[in] attr
4613  *   Flow rule attributes.
4614  * @param[in] items
4615  *   Pattern specification (list terminated by the END pattern item).
4616  * @param[in] actions
4617  *   Associated actions (list terminated by the END action).
4618  * @param[in] flow_split_info
4619  *   Pointer to flow split info structure.
4620  * @param[out] error
4621  *   Perform verbose error reporting if not NULL.
4622  * @return
4623  *   0 on success, negative value otherwise
4624  */
4625 static int
4626 flow_create_split_inner(struct rte_eth_dev *dev,
4627                         struct rte_flow *flow,
4628                         struct mlx5_flow **sub_flow,
4629                         const struct rte_flow_attr *attr,
4630                         const struct rte_flow_item items[],
4631                         const struct rte_flow_action actions[],
4632                         struct mlx5_flow_split_info *flow_split_info,
4633                         struct rte_flow_error *error)
4634 {
4635         struct mlx5_flow *dev_flow;
4636
4637         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4638                                     flow_split_info->flow_idx, error);
4639         if (!dev_flow)
4640                 return -rte_errno;
4641         dev_flow->flow = flow;
4642         dev_flow->external = flow_split_info->external;
4643         dev_flow->skip_scale = flow_split_info->skip_scale;
4644         /* Subflow object was created, we must include one in the list. */
4645         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4646                       dev_flow->handle, next);
4647         /*
4648          * If dev_flow is as one of the suffix flow, some actions in suffix
4649          * flow may need some user defined item layer flags, and pass the
4650          * Metadate rxq mark flag to suffix flow as well.
4651          */
4652         if (flow_split_info->prefix_layers)
4653                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4654         if (flow_split_info->prefix_mark)
4655                 dev_flow->handle->mark = 1;
4656         if (sub_flow)
4657                 *sub_flow = dev_flow;
4658 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4659         dev_flow->dv.table_id = flow_split_info->table_id;
4660 #endif
4661         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4662 }
4663
4664 /**
4665  * Get the sub policy of a meter.
4666  *
4667  * @param[in] dev
4668  *   Pointer to Ethernet device.
4669  * @param[in] flow
4670  *   Parent flow structure pointer.
4671  * @param wks
4672  *   Pointer to thread flow work space.
4673  * @param[in] attr
4674  *   Flow rule attributes.
4675  * @param[in] items
4676  *   Pattern specification (list terminated by the END pattern item).
4677  * @param[out] error
4678  *   Perform verbose error reporting if not NULL.
4679  *
4680  * @return
4681  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4682  */
4683 static struct mlx5_flow_meter_sub_policy *
4684 get_meter_sub_policy(struct rte_eth_dev *dev,
4685                      struct rte_flow *flow,
4686                      struct mlx5_flow_workspace *wks,
4687                      const struct rte_flow_attr *attr,
4688                      const struct rte_flow_item items[],
4689                      struct rte_flow_error *error)
4690 {
4691         struct mlx5_flow_meter_policy *policy;
4692         struct mlx5_flow_meter_policy *final_policy;
4693         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4694
4695         policy = wks->policy;
4696         final_policy = policy->is_hierarchy ? wks->final_policy : policy;
4697         if (final_policy->is_rss || final_policy->is_queue) {
4698                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4699                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4700                 uint32_t i;
4701
4702                 /*
4703                  * This is a tmp dev_flow,
4704                  * no need to register any matcher for it in translate.
4705                  */
4706                 wks->skip_matcher_reg = 1;
4707                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4708                         struct mlx5_flow dev_flow = {0};
4709                         struct mlx5_flow_handle dev_handle = { {0} };
4710                         uint8_t fate = final_policy->act_cnt[i].fate_action;
4711
4712                         if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
4713                                 const void *rss_act =
4714                                         final_policy->act_cnt[i].rss->conf;
4715                                 struct rte_flow_action rss_actions[2] = {
4716                                         [0] = {
4717                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4718                                         .conf = rss_act,
4719                                         },
4720                                         [1] = {
4721                                         .type = RTE_FLOW_ACTION_TYPE_END,
4722                                         .conf = NULL,
4723                                         }
4724                                 };
4725
4726                                 dev_flow.handle = &dev_handle;
4727                                 dev_flow.ingress = attr->ingress;
4728                                 dev_flow.flow = flow;
4729                                 dev_flow.external = 0;
4730 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4731                                 dev_flow.dv.transfer = attr->transfer;
4732 #endif
4733                                 /**
4734                                  * Translate RSS action to get rss hash fields.
4735                                  */
4736                                 if (flow_drv_translate(dev, &dev_flow, attr,
4737                                                 items, rss_actions, error))
4738                                         goto exit;
4739                                 rss_desc_v[i] = wks->rss_desc;
4740                                 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4741                                 rss_desc_v[i].hash_fields =
4742                                                 dev_flow.hash_fields;
4743                                 rss_desc_v[i].queue_num =
4744                                                 rss_desc_v[i].hash_fields ?
4745                                                 rss_desc_v[i].queue_num : 1;
4746                                 rss_desc_v[i].tunnel =
4747                                                 !!(dev_flow.handle->layers &
4748                                                    MLX5_FLOW_LAYER_TUNNEL);
4749                                 rss_desc[i] = &rss_desc_v[i];
4750                         } else if (fate == MLX5_FLOW_FATE_QUEUE) {
4751                                 /* This is queue action. */
4752                                 rss_desc_v[i] = wks->rss_desc;
4753                                 rss_desc_v[i].key_len = 0;
4754                                 rss_desc_v[i].hash_fields = 0;
4755                                 rss_desc_v[i].queue =
4756                                         &final_policy->act_cnt[i].queue;
4757                                 rss_desc_v[i].queue_num = 1;
4758                                 rss_desc[i] = &rss_desc_v[i];
4759                         } else {
4760                                 rss_desc[i] = NULL;
4761                         }
4762                 }
4763                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4764                                                 flow, policy, rss_desc);
4765         } else {
4766                 enum mlx5_meter_domain mtr_domain =
4767                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4768                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4769                                                 MLX5_MTR_DOMAIN_INGRESS);
4770                 sub_policy = policy->sub_policys[mtr_domain][0];
4771         }
4772         if (!sub_policy)
4773                 rte_flow_error_set(error, EINVAL,
4774                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4775                                    "Failed to get meter sub-policy.");
4776 exit:
4777         return sub_policy;
4778 }
4779
4780 /**
4781  * Split the meter flow.
4782  *
4783  * As meter flow will split to three sub flow, other than meter
4784  * action, the other actions make sense to only meter accepts
4785  * the packet. If it need to be dropped, no other additional
4786  * actions should be take.
4787  *
4788  * One kind of special action which decapsulates the L3 tunnel
4789  * header will be in the prefix sub flow, as not to take the
4790  * L3 tunnel header into account.
4791  *
4792  * @param[in] dev
4793  *   Pointer to Ethernet device.
4794  * @param[in] flow
4795  *   Parent flow structure pointer.
4796  * @param wks
4797  *   Pointer to thread flow work space.
4798  * @param[in] attr
4799  *   Flow rule attributes.
4800  * @param[in] items
4801  *   Pattern specification (list terminated by the END pattern item).
4802  * @param[out] sfx_items
4803  *   Suffix flow match items (list terminated by the END pattern item).
4804  * @param[in] actions
4805  *   Associated actions (list terminated by the END action).
4806  * @param[out] actions_sfx
4807  *   Suffix flow actions.
4808  * @param[out] actions_pre
4809  *   Prefix flow actions.
4810  * @param[out] mtr_flow_id
4811  *   Pointer to meter flow id.
4812  * @param[out] error
4813  *   Perform verbose error reporting if not NULL.
4814  *
4815  * @return
4816  *   0 on success, a negative errno value otherwise and rte_errno is set.
4817  */
4818 static int
4819 flow_meter_split_prep(struct rte_eth_dev *dev,
4820                       struct rte_flow *flow,
4821                       struct mlx5_flow_workspace *wks,
4822                       const struct rte_flow_attr *attr,
4823                       const struct rte_flow_item items[],
4824                       struct rte_flow_item sfx_items[],
4825                       const struct rte_flow_action actions[],
4826                       struct rte_flow_action actions_sfx[],
4827                       struct rte_flow_action actions_pre[],
4828                       uint32_t *mtr_flow_id,
4829                       struct rte_flow_error *error)
4830 {
4831         struct mlx5_priv *priv = dev->data->dev_private;
4832         struct mlx5_flow_meter_info *fm = wks->fm;
4833         struct rte_flow_action *tag_action = NULL;
4834         struct rte_flow_item *tag_item;
4835         struct mlx5_rte_flow_action_set_tag *set_tag;
4836         const struct rte_flow_action_raw_encap *raw_encap;
4837         const struct rte_flow_action_raw_decap *raw_decap;
4838         struct mlx5_rte_flow_item_tag *tag_item_spec;
4839         struct mlx5_rte_flow_item_tag *tag_item_mask;
4840         uint32_t tag_id = 0;
4841         struct rte_flow_item *vlan_item_dst = NULL;
4842         const struct rte_flow_item *vlan_item_src = NULL;
4843         struct rte_flow_action *hw_mtr_action;
4844         struct rte_flow_action *action_pre_head = NULL;
4845         int32_t flow_src_port = priv->representor_id;
4846         bool mtr_first;
4847         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
4848         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
4849                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
4850         uint32_t flow_id = 0;
4851         uint32_t flow_id_reversed = 0;
4852         uint8_t flow_id_bits = 0;
4853         int shift;
4854
4855         /* Prepare the suffix subflow items. */
4856         tag_item = sfx_items++;
4857         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4858                 struct mlx5_priv *port_priv;
4859                 const struct rte_flow_item_port_id *pid_v;
4860                 int item_type = items->type;
4861
4862                 switch (item_type) {
4863                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4864                         pid_v = items->spec;
4865                         MLX5_ASSERT(pid_v);
4866                         port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
4867                         if (!port_priv)
4868                                 return rte_flow_error_set(error,
4869                                                 rte_errno,
4870                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
4871                                                 pid_v,
4872                                                 "Failed to get port info.");
4873                         flow_src_port = port_priv->representor_id;
4874                         if (!fm->def_policy && wks->policy->is_hierarchy &&
4875                             flow_src_port != priv->representor_id) {
4876                                 if (flow_drv_mtr_hierarchy_rule_create(dev,
4877                                                                 flow, fm,
4878                                                                 flow_src_port,
4879                                                                 items,
4880                                                                 error))
4881                                         return -rte_errno;
4882                         }
4883                         memcpy(sfx_items, items, sizeof(*sfx_items));
4884                         sfx_items++;
4885                         break;
4886                 case RTE_FLOW_ITEM_TYPE_VLAN:
4887                         /* Determine if copy vlan item below. */
4888                         vlan_item_src = items;
4889                         vlan_item_dst = sfx_items++;
4890                         vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
4891                         break;
4892                 default:
4893                         break;
4894                 }
4895         }
4896         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4897         sfx_items++;
4898         mtr_first = priv->sh->meter_aso_en &&
4899                 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
4900         /* For ASO meter, meter must be before tag in TX direction. */
4901         if (mtr_first) {
4902                 action_pre_head = actions_pre++;
4903                 /* Leave space for tag action. */
4904                 tag_action = actions_pre++;
4905         }
4906         /* Prepare the actions for prefix and suffix flow. */
4907         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4908                 struct rte_flow_action *action_cur = NULL;
4909
4910                 switch (actions->type) {
4911                 case RTE_FLOW_ACTION_TYPE_METER:
4912                         if (mtr_first) {
4913                                 action_cur = action_pre_head;
4914                         } else {
4915                                 /* Leave space for tag action. */
4916                                 tag_action = actions_pre++;
4917                                 action_cur = actions_pre++;
4918                         }
4919                         break;
4920                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4921                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4922                         action_cur = actions_pre++;
4923                         break;
4924                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4925                         raw_encap = actions->conf;
4926                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4927                                 action_cur = actions_pre++;
4928                         break;
4929                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4930                         raw_decap = actions->conf;
4931                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4932                                 action_cur = actions_pre++;
4933                         break;
4934                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4935                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4936                         if (vlan_item_dst && vlan_item_src) {
4937                                 memcpy(vlan_item_dst, vlan_item_src,
4938                                         sizeof(*vlan_item_dst));
4939                                 /*
4940                                  * Convert to internal match item, it is used
4941                                  * for vlan push and set vid.
4942                                  */
4943                                 vlan_item_dst->type = (enum rte_flow_item_type)
4944                                                 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4945                         }
4946                         break;
4947                 default:
4948                         break;
4949                 }
4950                 if (!action_cur)
4951                         action_cur = (fm->def_policy) ?
4952                                         actions_sfx++ : actions_pre++;
4953                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
4954         }
4955         /* Add end action to the actions. */
4956         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4957         if (priv->sh->meter_aso_en) {
4958                 /**
4959                  * For ASO meter, need to add an extra jump action explicitly,
4960                  * to jump from meter to policer table.
4961                  */
4962                 struct mlx5_flow_meter_sub_policy *sub_policy;
4963                 struct mlx5_flow_tbl_data_entry *tbl_data;
4964
4965                 if (!fm->def_policy) {
4966                         sub_policy = get_meter_sub_policy(dev, flow, wks,
4967                                                           attr, items, error);
4968                         if (!sub_policy)
4969                                 return -rte_errno;
4970                 } else {
4971                         enum mlx5_meter_domain mtr_domain =
4972                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4973                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4974                                                 MLX5_MTR_DOMAIN_INGRESS);
4975
4976                         sub_policy =
4977                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
4978                 }
4979                 tbl_data = container_of(sub_policy->tbl_rsc,
4980                                         struct mlx5_flow_tbl_data_entry, tbl);
4981                 hw_mtr_action = actions_pre++;
4982                 hw_mtr_action->type = (enum rte_flow_action_type)
4983                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
4984                 hw_mtr_action->conf = tbl_data->jump.action;
4985         }
4986         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4987         actions_pre++;
4988         if (!tag_action)
4989                 return rte_flow_error_set(error, ENOMEM,
4990                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4991                                           NULL, "No tag action space.");
4992         if (!mtr_flow_id) {
4993                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
4994                 goto exit;
4995         }
4996         /* Only default-policy Meter creates mtr flow id. */
4997         if (fm->def_policy) {
4998                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
4999                 if (!tag_id)
5000                         return rte_flow_error_set(error, ENOMEM,
5001                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5002                                         "Failed to allocate meter flow id.");
5003                 flow_id = tag_id - 1;
5004                 flow_id_bits = (!flow_id) ? 1 :
5005                                 (MLX5_REG_BITS - __builtin_clz(flow_id));
5006                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
5007                     mtr_reg_bits) {
5008                         mlx5_ipool_free(fm->flow_ipool, tag_id);
5009                         return rte_flow_error_set(error, EINVAL,
5010                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5011                                         "Meter flow id exceeds max limit.");
5012                 }
5013                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5014                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5015         }
5016         /* Build tag actions and items for meter_id/meter flow_id. */
5017         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5018         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5019         tag_item_mask = tag_item_spec + 1;
5020         /* Both flow_id and meter_id share the same register. */
5021         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5022                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5023                                                             0, error),
5024                 .offset = mtr_id_offset,
5025                 .length = mtr_reg_bits,
5026                 .data = flow->meter,
5027         };
5028         /*
5029          * The color Reg bits used by flow_id are growing from
5030          * msb to lsb, so must do bit reverse for flow_id val in RegC.
5031          */
5032         for (shift = 0; shift < flow_id_bits; shift++)
5033                 flow_id_reversed = (flow_id_reversed << 1) |
5034                                 ((flow_id >> shift) & 0x1);
5035         set_tag->data |=
5036                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5037         tag_item_spec->id = set_tag->id;
5038         tag_item_spec->data = set_tag->data << mtr_id_offset;
5039         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5040         tag_action->type = (enum rte_flow_action_type)
5041                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5042         tag_action->conf = set_tag;
5043         tag_item->type = (enum rte_flow_item_type)
5044                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5045         tag_item->spec = tag_item_spec;
5046         tag_item->last = NULL;
5047         tag_item->mask = tag_item_mask;
5048 exit:
5049         if (mtr_flow_id)
5050                 *mtr_flow_id = tag_id;
5051         return 0;
5052 }
5053
5054 /**
5055  * Split action list having QUEUE/RSS for metadata register copy.
5056  *
5057  * Once Q/RSS action is detected in user's action list, the flow action
5058  * should be split in order to copy metadata registers, which will happen in
5059  * RX_CP_TBL like,
5060  *   - CQE->flow_tag := reg_c[1] (MARK)
5061  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5062  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5063  * This is because the last action of each flow must be a terminal action
5064  * (QUEUE, RSS or DROP).
5065  *
5066  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5067  * stored and kept in the mlx5_flow structure per each sub_flow.
5068  *
5069  * The Q/RSS action is replaced with,
5070  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
5071  * And the following JUMP action is added at the end,
5072  *   - JUMP, to RX_CP_TBL.
5073  *
5074  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5075  * flow_create_split_metadata() routine. The flow will look like,
5076  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
5077  *
5078  * @param dev
5079  *   Pointer to Ethernet device.
5080  * @param[out] split_actions
5081  *   Pointer to store split actions to jump to CP_TBL.
5082  * @param[in] actions
5083  *   Pointer to the list of original flow actions.
5084  * @param[in] qrss
5085  *   Pointer to the Q/RSS action.
5086  * @param[in] actions_n
5087  *   Number of original actions.
5088  * @param[out] error
5089  *   Perform verbose error reporting if not NULL.
5090  *
5091  * @return
5092  *   non-zero unique flow_id on success, otherwise 0 and
5093  *   error/rte_error are set.
5094  */
5095 static uint32_t
5096 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5097                           struct rte_flow_action *split_actions,
5098                           const struct rte_flow_action *actions,
5099                           const struct rte_flow_action *qrss,
5100                           int actions_n, struct rte_flow_error *error)
5101 {
5102         struct mlx5_priv *priv = dev->data->dev_private;
5103         struct mlx5_rte_flow_action_set_tag *set_tag;
5104         struct rte_flow_action_jump *jump;
5105         const int qrss_idx = qrss - actions;
5106         uint32_t flow_id = 0;
5107         int ret = 0;
5108
5109         /*
5110          * Given actions will be split
5111          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5112          * - Add jump to mreg CP_TBL.
5113          * As a result, there will be one more action.
5114          */
5115         ++actions_n;
5116         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5117         set_tag = (void *)(split_actions + actions_n);
5118         /*
5119          * If tag action is not set to void(it means we are not the meter
5120          * suffix flow), add the tag action. Since meter suffix flow already
5121          * has the tag added.
5122          */
5123         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
5124                 /*
5125                  * Allocate the new subflow ID. This one is unique within
5126                  * device and not shared with representors. Otherwise,
5127                  * we would have to resolve multi-thread access synch
5128                  * issue. Each flow on the shared device is appended
5129                  * with source vport identifier, so the resulting
5130                  * flows will be unique in the shared (by master and
5131                  * representors) domain even if they have coinciding
5132                  * IDs.
5133                  */
5134                 mlx5_ipool_malloc(priv->sh->ipool
5135                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5136                 if (!flow_id)
5137                         return rte_flow_error_set(error, ENOMEM,
5138                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5139                                                   NULL, "can't allocate id "
5140                                                   "for split Q/RSS subflow");
5141                 /* Internal SET_TAG action to set flow ID. */
5142                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5143                         .data = flow_id,
5144                 };
5145                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5146                 if (ret < 0)
5147                         return ret;
5148                 set_tag->id = ret;
5149                 /* Construct new actions array. */
5150                 /* Replace QUEUE/RSS action. */
5151                 split_actions[qrss_idx] = (struct rte_flow_action){
5152                         .type = (enum rte_flow_action_type)
5153                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5154                         .conf = set_tag,
5155                 };
5156         }
5157         /* JUMP action to jump to mreg copy table (CP_TBL). */
5158         jump = (void *)(set_tag + 1);
5159         *jump = (struct rte_flow_action_jump){
5160                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5161         };
5162         split_actions[actions_n - 2] = (struct rte_flow_action){
5163                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5164                 .conf = jump,
5165         };
5166         split_actions[actions_n - 1] = (struct rte_flow_action){
5167                 .type = RTE_FLOW_ACTION_TYPE_END,
5168         };
5169         return flow_id;
5170 }
5171
5172 /**
5173  * Extend the given action list for Tx metadata copy.
5174  *
5175  * Copy the given action list to the ext_actions and add flow metadata register
5176  * copy action in order to copy reg_a set by WQE to reg_c[0].
5177  *
5178  * @param[out] ext_actions
5179  *   Pointer to the extended action list.
5180  * @param[in] actions
5181  *   Pointer to the list of actions.
5182  * @param[in] actions_n
5183  *   Number of actions in the list.
5184  * @param[out] error
5185  *   Perform verbose error reporting if not NULL.
5186  * @param[in] encap_idx
5187  *   The encap action inndex.
5188  *
5189  * @return
5190  *   0 on success, negative value otherwise
5191  */
5192 static int
5193 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5194                        struct rte_flow_action *ext_actions,
5195                        const struct rte_flow_action *actions,
5196                        int actions_n, struct rte_flow_error *error,
5197                        int encap_idx)
5198 {
5199         struct mlx5_flow_action_copy_mreg *cp_mreg =
5200                 (struct mlx5_flow_action_copy_mreg *)
5201                         (ext_actions + actions_n + 1);
5202         int ret;
5203
5204         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5205         if (ret < 0)
5206                 return ret;
5207         cp_mreg->dst = ret;
5208         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5209         if (ret < 0)
5210                 return ret;
5211         cp_mreg->src = ret;
5212         if (encap_idx != 0)
5213                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5214         if (encap_idx == actions_n - 1) {
5215                 ext_actions[actions_n - 1] = (struct rte_flow_action){
5216                         .type = (enum rte_flow_action_type)
5217                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5218                         .conf = cp_mreg,
5219                 };
5220                 ext_actions[actions_n] = (struct rte_flow_action){
5221                         .type = RTE_FLOW_ACTION_TYPE_END,
5222                 };
5223         } else {
5224                 ext_actions[encap_idx] = (struct rte_flow_action){
5225                         .type = (enum rte_flow_action_type)
5226                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5227                         .conf = cp_mreg,
5228                 };
5229                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5230                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5231         }
5232         return 0;
5233 }
5234
5235 /**
5236  * Check the match action from the action list.
5237  *
5238  * @param[in] actions
5239  *   Pointer to the list of actions.
5240  * @param[in] attr
5241  *   Flow rule attributes.
5242  * @param[in] action
5243  *   The action to be check if exist.
5244  * @param[out] match_action_pos
5245  *   Pointer to the position of the matched action if exists, otherwise is -1.
5246  * @param[out] qrss_action_pos
5247  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5248  * @param[out] modify_after_mirror
5249  *   Pointer to the flag of modify action after FDB mirroring.
5250  *
5251  * @return
5252  *   > 0 the total number of actions.
5253  *   0 if not found match action in action list.
5254  */
5255 static int
5256 flow_check_match_action(const struct rte_flow_action actions[],
5257                         const struct rte_flow_attr *attr,
5258                         enum rte_flow_action_type action,
5259                         int *match_action_pos, int *qrss_action_pos,
5260                         int *modify_after_mirror)
5261 {
5262         const struct rte_flow_action_sample *sample;
5263         const struct rte_flow_action_raw_decap *decap;
5264         int actions_n = 0;
5265         uint32_t ratio = 0;
5266         int sub_type = 0;
5267         int flag = 0;
5268         int fdb_mirror = 0;
5269
5270         *match_action_pos = -1;
5271         *qrss_action_pos = -1;
5272         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5273                 if (actions->type == action) {
5274                         flag = 1;
5275                         *match_action_pos = actions_n;
5276                 }
5277                 switch (actions->type) {
5278                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5279                 case RTE_FLOW_ACTION_TYPE_RSS:
5280                         *qrss_action_pos = actions_n;
5281                         break;
5282                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5283                         sample = actions->conf;
5284                         ratio = sample->ratio;
5285                         sub_type = ((const struct rte_flow_action *)
5286                                         (sample->actions))->type;
5287                         if (ratio == 1 && attr->transfer)
5288                                 fdb_mirror = 1;
5289                         break;
5290                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5291                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5292                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5293                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5294                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5295                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5296                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5297                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5298                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5299                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5300                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5301                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5302                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5303                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5304                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5305                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5306                 case RTE_FLOW_ACTION_TYPE_FLAG:
5307                 case RTE_FLOW_ACTION_TYPE_MARK:
5308                 case RTE_FLOW_ACTION_TYPE_SET_META:
5309                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5310                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5311                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5312                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5313                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5314                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5315                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5316                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5317                 case RTE_FLOW_ACTION_TYPE_METER:
5318                         if (fdb_mirror)
5319                                 *modify_after_mirror = 1;
5320                         break;
5321                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5322                         decap = actions->conf;
5323                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5324                                 ;
5325                         actions_n++;
5326                         if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5327                                 const struct rte_flow_action_raw_encap *encap =
5328                                                                 actions->conf;
5329                                 if (decap->size <=
5330                                         MLX5_ENCAPSULATION_DECISION_SIZE &&
5331                                     encap->size >
5332                                         MLX5_ENCAPSULATION_DECISION_SIZE)
5333                                         /* L3 encap. */
5334                                         break;
5335                         }
5336                         if (fdb_mirror)
5337                                 *modify_after_mirror = 1;
5338                         break;
5339                 default:
5340                         break;
5341                 }
5342                 actions_n++;
5343         }
5344         if (flag && fdb_mirror && !*modify_after_mirror) {
5345                 /* FDB mirroring uses the destination array to implement
5346                  * instead of FLOW_SAMPLER object.
5347                  */
5348                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5349                         flag = 0;
5350         }
5351         /* Count RTE_FLOW_ACTION_TYPE_END. */
5352         return flag ? actions_n + 1 : 0;
5353 }
5354
5355 #define SAMPLE_SUFFIX_ITEM 2
5356
5357 /**
5358  * Split the sample flow.
5359  *
5360  * As sample flow will split to two sub flow, sample flow with
5361  * sample action, the other actions will move to new suffix flow.
5362  *
5363  * Also add unique tag id with tag action in the sample flow,
5364  * the same tag id will be as match in the suffix flow.
5365  *
5366  * @param dev
5367  *   Pointer to Ethernet device.
5368  * @param[in] add_tag
5369  *   Add extra tag action flag.
5370  * @param[out] sfx_items
5371  *   Suffix flow match items (list terminated by the END pattern item).
5372  * @param[in] actions
5373  *   Associated actions (list terminated by the END action).
5374  * @param[out] actions_sfx
5375  *   Suffix flow actions.
5376  * @param[out] actions_pre
5377  *   Prefix flow actions.
5378  * @param[in] actions_n
5379  *  The total number of actions.
5380  * @param[in] sample_action_pos
5381  *   The sample action position.
5382  * @param[in] qrss_action_pos
5383  *   The Queue/RSS action position.
5384  * @param[in] jump_table
5385  *   Add extra jump action flag.
5386  * @param[out] error
5387  *   Perform verbose error reporting if not NULL.
5388  *
5389  * @return
5390  *   0 on success, or unique flow_id, a negative errno value
5391  *   otherwise and rte_errno is set.
5392  */
5393 static int
5394 flow_sample_split_prep(struct rte_eth_dev *dev,
5395                        int add_tag,
5396                        struct rte_flow_item sfx_items[],
5397                        const struct rte_flow_action actions[],
5398                        struct rte_flow_action actions_sfx[],
5399                        struct rte_flow_action actions_pre[],
5400                        int actions_n,
5401                        int sample_action_pos,
5402                        int qrss_action_pos,
5403                        int jump_table,
5404                        struct rte_flow_error *error)
5405 {
5406         struct mlx5_priv *priv = dev->data->dev_private;
5407         struct mlx5_rte_flow_action_set_tag *set_tag;
5408         struct mlx5_rte_flow_item_tag *tag_spec;
5409         struct mlx5_rte_flow_item_tag *tag_mask;
5410         struct rte_flow_action_jump *jump_action;
5411         uint32_t tag_id = 0;
5412         int index;
5413         int append_index = 0;
5414         int ret;
5415
5416         if (sample_action_pos < 0)
5417                 return rte_flow_error_set(error, EINVAL,
5418                                           RTE_FLOW_ERROR_TYPE_ACTION,
5419                                           NULL, "invalid position of sample "
5420                                           "action in list");
5421         /* Prepare the actions for prefix and suffix flow. */
5422         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5423                 index = qrss_action_pos;
5424                 /* Put the preceding the Queue/RSS action into prefix flow. */
5425                 if (index != 0)
5426                         memcpy(actions_pre, actions,
5427                                sizeof(struct rte_flow_action) * index);
5428                 /* Put others preceding the sample action into prefix flow. */
5429                 if (sample_action_pos > index + 1)
5430                         memcpy(actions_pre + index, actions + index + 1,
5431                                sizeof(struct rte_flow_action) *
5432                                (sample_action_pos - index - 1));
5433                 index = sample_action_pos - 1;
5434                 /* Put Queue/RSS action into Suffix flow. */
5435                 memcpy(actions_sfx, actions + qrss_action_pos,
5436                        sizeof(struct rte_flow_action));
5437                 actions_sfx++;
5438         } else {
5439                 index = sample_action_pos;
5440                 if (index != 0)
5441                         memcpy(actions_pre, actions,
5442                                sizeof(struct rte_flow_action) * index);
5443         }
5444         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5445          * For CX6DX and above, metadata registers Cx preserve their value,
5446          * add an extra tag action for NIC-RX and E-Switch Domain.
5447          */
5448         if (add_tag) {
5449                 /* Prepare the prefix tag action. */
5450                 append_index++;
5451                 set_tag = (void *)(actions_pre + actions_n + append_index);
5452                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
5453                 if (ret < 0)
5454                         return ret;
5455                 mlx5_ipool_malloc(priv->sh->ipool
5456                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5457                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5458                         .id = ret,
5459                         .data = tag_id,
5460                 };
5461                 /* Prepare the suffix subflow items. */
5462                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5463                 tag_spec->data = tag_id;
5464                 tag_spec->id = set_tag->id;
5465                 tag_mask = tag_spec + 1;
5466                 tag_mask->data = UINT32_MAX;
5467                 sfx_items[0] = (struct rte_flow_item){
5468                         .type = (enum rte_flow_item_type)
5469                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5470                         .spec = tag_spec,
5471                         .last = NULL,
5472                         .mask = tag_mask,
5473                 };
5474                 sfx_items[1] = (struct rte_flow_item){
5475                         .type = (enum rte_flow_item_type)
5476                                 RTE_FLOW_ITEM_TYPE_END,
5477                 };
5478                 /* Prepare the tag action in prefix subflow. */
5479                 actions_pre[index++] =
5480                         (struct rte_flow_action){
5481                         .type = (enum rte_flow_action_type)
5482                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5483                         .conf = set_tag,
5484                 };
5485         }
5486         memcpy(actions_pre + index, actions + sample_action_pos,
5487                sizeof(struct rte_flow_action));
5488         index += 1;
5489         /* For the modify action after the sample action in E-Switch mirroring,
5490          * Add the extra jump action in prefix subflow and jump into the next
5491          * table, then do the modify action in the new table.
5492          */
5493         if (jump_table) {
5494                 /* Prepare the prefix jump action. */
5495                 append_index++;
5496                 jump_action = (void *)(actions_pre + actions_n + append_index);
5497                 jump_action->group = jump_table;
5498                 actions_pre[index++] =
5499                         (struct rte_flow_action){
5500                         .type = (enum rte_flow_action_type)
5501                                 RTE_FLOW_ACTION_TYPE_JUMP,
5502                         .conf = jump_action,
5503                 };
5504         }
5505         actions_pre[index] = (struct rte_flow_action){
5506                 .type = (enum rte_flow_action_type)
5507                         RTE_FLOW_ACTION_TYPE_END,
5508         };
5509         /* Put the actions after sample into Suffix flow. */
5510         memcpy(actions_sfx, actions + sample_action_pos + 1,
5511                sizeof(struct rte_flow_action) *
5512                (actions_n - sample_action_pos - 1));
5513         return tag_id;
5514 }
5515
5516 /**
5517  * The splitting for metadata feature.
5518  *
5519  * - Q/RSS action on NIC Rx should be split in order to pass by
5520  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5521  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5522  *
5523  * - All the actions on NIC Tx should have a mreg copy action to
5524  *   copy reg_a from WQE to reg_c[0].
5525  *
5526  * @param dev
5527  *   Pointer to Ethernet device.
5528  * @param[in] flow
5529  *   Parent flow structure pointer.
5530  * @param[in] attr
5531  *   Flow rule attributes.
5532  * @param[in] items
5533  *   Pattern specification (list terminated by the END pattern item).
5534  * @param[in] actions
5535  *   Associated actions (list terminated by the END action).
5536  * @param[in] flow_split_info
5537  *   Pointer to flow split info structure.
5538  * @param[out] error
5539  *   Perform verbose error reporting if not NULL.
5540  * @return
5541  *   0 on success, negative value otherwise
5542  */
5543 static int
5544 flow_create_split_metadata(struct rte_eth_dev *dev,
5545                            struct rte_flow *flow,
5546                            const struct rte_flow_attr *attr,
5547                            const struct rte_flow_item items[],
5548                            const struct rte_flow_action actions[],
5549                            struct mlx5_flow_split_info *flow_split_info,
5550                            struct rte_flow_error *error)
5551 {
5552         struct mlx5_priv *priv = dev->data->dev_private;
5553         struct mlx5_dev_config *config = &priv->config;
5554         const struct rte_flow_action *qrss = NULL;
5555         struct rte_flow_action *ext_actions = NULL;
5556         struct mlx5_flow *dev_flow = NULL;
5557         uint32_t qrss_id = 0;
5558         int mtr_sfx = 0;
5559         size_t act_size;
5560         int actions_n;
5561         int encap_idx;
5562         int ret;
5563
5564         /* Check whether extensive metadata feature is engaged. */
5565         if (!config->dv_flow_en ||
5566             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5567             !mlx5_flow_ext_mreg_supported(dev))
5568                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5569                                                actions, flow_split_info, error);
5570         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5571                                                            &encap_idx);
5572         if (qrss) {
5573                 /* Exclude hairpin flows from splitting. */
5574                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5575                         const struct rte_flow_action_queue *queue;
5576
5577                         queue = qrss->conf;
5578                         if (mlx5_rxq_get_type(dev, queue->index) ==
5579                             MLX5_RXQ_TYPE_HAIRPIN)
5580                                 qrss = NULL;
5581                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5582                         const struct rte_flow_action_rss *rss;
5583
5584                         rss = qrss->conf;
5585                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5586                             MLX5_RXQ_TYPE_HAIRPIN)
5587                                 qrss = NULL;
5588                 }
5589         }
5590         if (qrss) {
5591                 /* Check if it is in meter suffix table. */
5592                 mtr_sfx = attr->group == (attr->transfer ?
5593                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5594                           MLX5_FLOW_TABLE_LEVEL_METER);
5595                 /*
5596                  * Q/RSS action on NIC Rx should be split in order to pass by
5597                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5598                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5599                  */
5600                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5601                            sizeof(struct rte_flow_action_set_tag) +
5602                            sizeof(struct rte_flow_action_jump);
5603                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5604                                           SOCKET_ID_ANY);
5605                 if (!ext_actions)
5606                         return rte_flow_error_set(error, ENOMEM,
5607                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5608                                                   NULL, "no memory to split "
5609                                                   "metadata flow");
5610                 /*
5611                  * If we are the suffix flow of meter, tag already exist.
5612                  * Set the tag action to void.
5613                  */
5614                 if (mtr_sfx)
5615                         ext_actions[qrss - actions].type =
5616                                                 RTE_FLOW_ACTION_TYPE_VOID;
5617                 else
5618                         ext_actions[qrss - actions].type =
5619                                                 (enum rte_flow_action_type)
5620                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5621                 /*
5622                  * Create the new actions list with removed Q/RSS action
5623                  * and appended set tag and jump to register copy table
5624                  * (RX_CP_TBL). We should preallocate unique tag ID here
5625                  * in advance, because it is needed for set tag action.
5626                  */
5627                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5628                                                     qrss, actions_n, error);
5629                 if (!mtr_sfx && !qrss_id) {
5630                         ret = -rte_errno;
5631                         goto exit;
5632                 }
5633         } else if (attr->egress && !attr->transfer) {
5634                 /*
5635                  * All the actions on NIC Tx should have a metadata register
5636                  * copy action to copy reg_a from WQE to reg_c[meta]
5637                  */
5638                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5639                            sizeof(struct mlx5_flow_action_copy_mreg);
5640                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5641                                           SOCKET_ID_ANY);
5642                 if (!ext_actions)
5643                         return rte_flow_error_set(error, ENOMEM,
5644                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5645                                                   NULL, "no memory to split "
5646                                                   "metadata flow");
5647                 /* Create the action list appended with copy register. */
5648                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5649                                              actions_n, error, encap_idx);
5650                 if (ret < 0)
5651                         goto exit;
5652         }
5653         /* Add the unmodified original or prefix subflow. */
5654         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5655                                       items, ext_actions ? ext_actions :
5656                                       actions, flow_split_info, error);
5657         if (ret < 0)
5658                 goto exit;
5659         MLX5_ASSERT(dev_flow);
5660         if (qrss) {
5661                 const struct rte_flow_attr q_attr = {
5662                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5663                         .ingress = 1,
5664                 };
5665                 /* Internal PMD action to set register. */
5666                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5667                         .data = qrss_id,
5668                         .id = REG_NON,
5669                 };
5670                 struct rte_flow_item q_items[] = {
5671                         {
5672                                 .type = (enum rte_flow_item_type)
5673                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5674                                 .spec = &q_tag_spec,
5675                                 .last = NULL,
5676                                 .mask = NULL,
5677                         },
5678                         {
5679                                 .type = RTE_FLOW_ITEM_TYPE_END,
5680                         },
5681                 };
5682                 struct rte_flow_action q_actions[] = {
5683                         {
5684                                 .type = qrss->type,
5685                                 .conf = qrss->conf,
5686                         },
5687                         {
5688                                 .type = RTE_FLOW_ACTION_TYPE_END,
5689                         },
5690                 };
5691                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5692
5693                 /*
5694                  * Configure the tag item only if there is no meter subflow.
5695                  * Since tag is already marked in the meter suffix subflow
5696                  * we can just use the meter suffix items as is.
5697                  */
5698                 if (qrss_id) {
5699                         /* Not meter subflow. */
5700                         MLX5_ASSERT(!mtr_sfx);
5701                         /*
5702                          * Put unique id in prefix flow due to it is destroyed
5703                          * after suffix flow and id will be freed after there
5704                          * is no actual flows with this id and identifier
5705                          * reallocation becomes possible (for example, for
5706                          * other flows in other threads).
5707                          */
5708                         dev_flow->handle->split_flow_id = qrss_id;
5709                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5710                                                    error);
5711                         if (ret < 0)
5712                                 goto exit;
5713                         q_tag_spec.id = ret;
5714                 }
5715                 dev_flow = NULL;
5716                 /* Add suffix subflow to execute Q/RSS. */
5717                 flow_split_info->prefix_layers = layers;
5718                 flow_split_info->prefix_mark = 0;
5719                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5720                                               &q_attr, mtr_sfx ? items :
5721                                               q_items, q_actions,
5722                                               flow_split_info, error);
5723                 if (ret < 0)
5724                         goto exit;
5725                 /* qrss ID should be freed if failed. */
5726                 qrss_id = 0;
5727                 MLX5_ASSERT(dev_flow);
5728         }
5729
5730 exit:
5731         /*
5732          * We do not destroy the partially created sub_flows in case of error.
5733          * These ones are included into parent flow list and will be destroyed
5734          * by flow_drv_destroy.
5735          */
5736         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5737                         qrss_id);
5738         mlx5_free(ext_actions);
5739         return ret;
5740 }
5741
5742 /**
5743  * Create meter internal drop flow with the original pattern.
5744  *
5745  * @param dev
5746  *   Pointer to Ethernet device.
5747  * @param[in] flow
5748  *   Parent flow structure pointer.
5749  * @param[in] attr
5750  *   Flow rule attributes.
5751  * @param[in] items
5752  *   Pattern specification (list terminated by the END pattern item).
5753  * @param[in] flow_split_info
5754  *   Pointer to flow split info structure.
5755  * @param[in] fm
5756  *   Pointer to flow meter structure.
5757  * @param[out] error
5758  *   Perform verbose error reporting if not NULL.
5759  * @return
5760  *   0 on success, negative value otherwise
5761  */
5762 static uint32_t
5763 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5764                         struct rte_flow *flow,
5765                         const struct rte_flow_attr *attr,
5766                         const struct rte_flow_item items[],
5767                         struct mlx5_flow_split_info *flow_split_info,
5768                         struct mlx5_flow_meter_info *fm,
5769                         struct rte_flow_error *error)
5770 {
5771         struct mlx5_flow *dev_flow = NULL;
5772         struct rte_flow_attr drop_attr = *attr;
5773         struct rte_flow_action drop_actions[3];
5774         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5775
5776         MLX5_ASSERT(fm->drop_cnt);
5777         drop_actions[0].type =
5778                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5779         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5780         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5781         drop_actions[1].conf = NULL;
5782         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5783         drop_actions[2].conf = NULL;
5784         drop_split_info.external = false;
5785         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5786         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5787         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5788         return flow_create_split_inner(dev, flow, &dev_flow,
5789                                 &drop_attr, items, drop_actions,
5790                                 &drop_split_info, error);
5791 }
5792
5793 /**
5794  * The splitting for meter feature.
5795  *
5796  * - The meter flow will be split to two flows as prefix and
5797  *   suffix flow. The packets make sense only it pass the prefix
5798  *   meter action.
5799  *
5800  * - Reg_C_5 is used for the packet to match betweend prefix and
5801  *   suffix flow.
5802  *
5803  * @param dev
5804  *   Pointer to Ethernet device.
5805  * @param[in] flow
5806  *   Parent flow structure pointer.
5807  * @param[in] attr
5808  *   Flow rule attributes.
5809  * @param[in] items
5810  *   Pattern specification (list terminated by the END pattern item).
5811  * @param[in] actions
5812  *   Associated actions (list terminated by the END action).
5813  * @param[in] flow_split_info
5814  *   Pointer to flow split info structure.
5815  * @param[out] error
5816  *   Perform verbose error reporting if not NULL.
5817  * @return
5818  *   0 on success, negative value otherwise
5819  */
5820 static int
5821 flow_create_split_meter(struct rte_eth_dev *dev,
5822                         struct rte_flow *flow,
5823                         const struct rte_flow_attr *attr,
5824                         const struct rte_flow_item items[],
5825                         const struct rte_flow_action actions[],
5826                         struct mlx5_flow_split_info *flow_split_info,
5827                         struct rte_flow_error *error)
5828 {
5829         struct mlx5_priv *priv = dev->data->dev_private;
5830         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5831         struct rte_flow_action *sfx_actions = NULL;
5832         struct rte_flow_action *pre_actions = NULL;
5833         struct rte_flow_item *sfx_items = NULL;
5834         struct mlx5_flow *dev_flow = NULL;
5835         struct rte_flow_attr sfx_attr = *attr;
5836         struct mlx5_flow_meter_info *fm = NULL;
5837         uint8_t skip_scale_restore;
5838         bool has_mtr = false;
5839         bool has_modify = false;
5840         bool set_mtr_reg = true;
5841         bool is_mtr_hierarchy = false;
5842         uint32_t meter_id = 0;
5843         uint32_t mtr_idx = 0;
5844         uint32_t mtr_flow_id = 0;
5845         size_t act_size;
5846         size_t item_size;
5847         int actions_n = 0;
5848         int ret = 0;
5849
5850         if (priv->mtr_en)
5851                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
5852                                                     &has_modify, &meter_id);
5853         if (has_mtr) {
5854                 if (flow->meter) {
5855                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
5856                         if (!fm)
5857                                 return rte_flow_error_set(error, EINVAL,
5858                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5859                                                 NULL, "Meter not found.");
5860                 } else {
5861                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
5862                         if (!fm)
5863                                 return rte_flow_error_set(error, EINVAL,
5864                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5865                                                 NULL, "Meter not found.");
5866                         ret = mlx5_flow_meter_attach(priv, fm,
5867                                                      &sfx_attr, error);
5868                         if (ret)
5869                                 return -rte_errno;
5870                         flow->meter = mtr_idx;
5871                 }
5872                 MLX5_ASSERT(wks);
5873                 wks->fm = fm;
5874                 if (!fm->def_policy) {
5875                         wks->policy = mlx5_flow_meter_policy_find(dev,
5876                                                                   fm->policy_id,
5877                                                                   NULL);
5878                         MLX5_ASSERT(wks->policy);
5879                         if (wks->policy->is_hierarchy) {
5880                                 wks->final_policy =
5881                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
5882                                                                 wks->policy);
5883                                 if (!wks->final_policy)
5884                                         return rte_flow_error_set(error,
5885                                         EINVAL,
5886                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5887                                 "Failed to find terminal policy of hierarchy.");
5888                                 is_mtr_hierarchy = true;
5889                         }
5890                 }
5891                 /*
5892                  * If it isn't default-policy Meter, and
5893                  * 1. There's no action in flow to change
5894                  *    packet (modify/encap/decap etc.), OR
5895                  * 2. No drop count needed for this meter.
5896                  * 3. It's not meter hierarchy.
5897                  * Then no need to use regC to save meter id anymore.
5898                  */
5899                 if (!fm->def_policy && !is_mtr_hierarchy &&
5900                     (!has_modify || !fm->drop_cnt))
5901                         set_mtr_reg = false;
5902                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
5903                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
5904                            sizeof(struct mlx5_rte_flow_action_set_tag);
5905                 /* Suffix items: tag, vlan, port id, end. */
5906 #define METER_SUFFIX_ITEM 4
5907                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5908                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5909                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5910                                           0, SOCKET_ID_ANY);
5911                 if (!sfx_actions)
5912                         return rte_flow_error_set(error, ENOMEM,
5913                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5914                                                   NULL, "no memory to split "
5915                                                   "meter flow");
5916                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5917                              act_size);
5918                 /* There's no suffix flow for meter of non-default policy. */
5919                 if (!fm->def_policy)
5920                         pre_actions = sfx_actions + 1;
5921                 else
5922                         pre_actions = sfx_actions + actions_n;
5923                 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
5924                                             items, sfx_items, actions,
5925                                             sfx_actions, pre_actions,
5926                                             (set_mtr_reg ? &mtr_flow_id : NULL),
5927                                             error);
5928                 if (ret) {
5929                         ret = -rte_errno;
5930                         goto exit;
5931                 }
5932                 /* Add the prefix subflow. */
5933                 flow_split_info->prefix_mark = 0;
5934                 skip_scale_restore = flow_split_info->skip_scale;
5935                 flow_split_info->skip_scale |=
5936                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5937                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5938                                               attr, items, pre_actions,
5939                                               flow_split_info, error);
5940                 flow_split_info->skip_scale = skip_scale_restore;
5941                 if (ret) {
5942                         if (mtr_flow_id)
5943                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
5944                         ret = -rte_errno;
5945                         goto exit;
5946                 }
5947                 if (mtr_flow_id) {
5948                         dev_flow->handle->split_flow_id = mtr_flow_id;
5949                         dev_flow->handle->is_meter_flow_id = 1;
5950                 }
5951                 if (!fm->def_policy) {
5952                         if (!set_mtr_reg && fm->drop_cnt)
5953                                 ret =
5954                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
5955                                                         &sfx_attr, items,
5956                                                         flow_split_info,
5957                                                         fm, error);
5958                         goto exit;
5959                 }
5960                 /* Setting the sfx group atrr. */
5961                 sfx_attr.group = sfx_attr.transfer ?
5962                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5963                                  MLX5_FLOW_TABLE_LEVEL_METER;
5964                 flow_split_info->prefix_layers =
5965                                 flow_get_prefix_layer_flags(dev_flow);
5966                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5967                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
5968         }
5969         /* Add the prefix subflow. */
5970         ret = flow_create_split_metadata(dev, flow,
5971                                          &sfx_attr, sfx_items ?
5972                                          sfx_items : items,
5973                                          sfx_actions ? sfx_actions : actions,
5974                                          flow_split_info, error);
5975 exit:
5976         if (sfx_actions)
5977                 mlx5_free(sfx_actions);
5978         return ret;
5979 }
5980
5981 /**
5982  * The splitting for sample feature.
5983  *
5984  * Once Sample action is detected in the action list, the flow actions should
5985  * be split into prefix sub flow and suffix sub flow.
5986  *
5987  * The original items remain in the prefix sub flow, all actions preceding the
5988  * sample action and the sample action itself will be copied to the prefix
5989  * sub flow, the actions following the sample action will be copied to the
5990  * suffix sub flow, Queue action always be located in the suffix sub flow.
5991  *
5992  * In order to make the packet from prefix sub flow matches with suffix sub
5993  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5994  * flow uses tag item with the unique flow id.
5995  *
5996  * @param dev
5997  *   Pointer to Ethernet device.
5998  * @param[in] flow
5999  *   Parent flow structure pointer.
6000  * @param[in] attr
6001  *   Flow rule attributes.
6002  * @param[in] items
6003  *   Pattern specification (list terminated by the END pattern item).
6004  * @param[in] actions
6005  *   Associated actions (list terminated by the END action).
6006  * @param[in] flow_split_info
6007  *   Pointer to flow split info structure.
6008  * @param[out] error
6009  *   Perform verbose error reporting if not NULL.
6010  * @return
6011  *   0 on success, negative value otherwise
6012  */
6013 static int
6014 flow_create_split_sample(struct rte_eth_dev *dev,
6015                          struct rte_flow *flow,
6016                          const struct rte_flow_attr *attr,
6017                          const struct rte_flow_item items[],
6018                          const struct rte_flow_action actions[],
6019                          struct mlx5_flow_split_info *flow_split_info,
6020                          struct rte_flow_error *error)
6021 {
6022         struct mlx5_priv *priv = dev->data->dev_private;
6023         struct rte_flow_action *sfx_actions = NULL;
6024         struct rte_flow_action *pre_actions = NULL;
6025         struct rte_flow_item *sfx_items = NULL;
6026         struct mlx5_flow *dev_flow = NULL;
6027         struct rte_flow_attr sfx_attr = *attr;
6028 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6029         struct mlx5_flow_dv_sample_resource *sample_res;
6030         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
6031         struct mlx5_flow_tbl_resource *sfx_tbl;
6032 #endif
6033         size_t act_size;
6034         size_t item_size;
6035         uint32_t fdb_tx = 0;
6036         int32_t tag_id = 0;
6037         int actions_n = 0;
6038         int sample_action_pos;
6039         int qrss_action_pos;
6040         int add_tag = 0;
6041         int modify_after_mirror = 0;
6042         uint16_t jump_table = 0;
6043         const uint32_t next_ft_step = 1;
6044         int ret = 0;
6045
6046         if (priv->sampler_en)
6047                 actions_n = flow_check_match_action(actions, attr,
6048                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
6049                                         &sample_action_pos, &qrss_action_pos,
6050                                         &modify_after_mirror);
6051         if (actions_n) {
6052                 /* The prefix actions must includes sample, tag, end. */
6053                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6054                            + sizeof(struct mlx5_rte_flow_action_set_tag);
6055                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6056                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6057                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6058                                           item_size), 0, SOCKET_ID_ANY);
6059                 if (!sfx_actions)
6060                         return rte_flow_error_set(error, ENOMEM,
6061                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6062                                                   NULL, "no memory to split "
6063                                                   "sample flow");
6064                 /* The representor_id is UINT16_MAX for uplink. */
6065                 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6066                 /*
6067                  * When reg_c_preserve is set, metadata registers Cx preserve
6068                  * their value even through packet duplication.
6069                  */
6070                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
6071                 if (add_tag)
6072                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6073                                         + act_size);
6074                 if (modify_after_mirror)
6075                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6076                                      next_ft_step;
6077                 pre_actions = sfx_actions + actions_n;
6078                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6079                                                 actions, sfx_actions,
6080                                                 pre_actions, actions_n,
6081                                                 sample_action_pos,
6082                                                 qrss_action_pos, jump_table,
6083                                                 error);
6084                 if (tag_id < 0 || (add_tag && !tag_id)) {
6085                         ret = -rte_errno;
6086                         goto exit;
6087                 }
6088                 if (modify_after_mirror)
6089                         flow_split_info->skip_scale =
6090                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6091                 /* Add the prefix subflow. */
6092                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6093                                               items, pre_actions,
6094                                               flow_split_info, error);
6095                 if (ret) {
6096                         ret = -rte_errno;
6097                         goto exit;
6098                 }
6099                 dev_flow->handle->split_flow_id = tag_id;
6100 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6101                 if (!modify_after_mirror) {
6102                         /* Set the sfx group attr. */
6103                         sample_res = (struct mlx5_flow_dv_sample_resource *)
6104                                                 dev_flow->dv.sample_res;
6105                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
6106                                                 sample_res->normal_path_tbl;
6107                         sfx_tbl_data = container_of(sfx_tbl,
6108                                                 struct mlx5_flow_tbl_data_entry,
6109                                                 tbl);
6110                         sfx_attr.group = sfx_attr.transfer ?
6111                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6112                 } else {
6113                         MLX5_ASSERT(attr->transfer);
6114                         sfx_attr.group = jump_table;
6115                 }
6116                 flow_split_info->prefix_layers =
6117                                 flow_get_prefix_layer_flags(dev_flow);
6118                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6119                 /* Suffix group level already be scaled with factor, set
6120                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6121                  * again in translation.
6122                  */
6123                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6124 #endif
6125         }
6126         /* Add the suffix subflow. */
6127         ret = flow_create_split_meter(dev, flow, &sfx_attr,
6128                                       sfx_items ? sfx_items : items,
6129                                       sfx_actions ? sfx_actions : actions,
6130                                       flow_split_info, error);
6131 exit:
6132         if (sfx_actions)
6133                 mlx5_free(sfx_actions);
6134         return ret;
6135 }
6136
6137 /**
6138  * Split the flow to subflow set. The splitters might be linked
6139  * in the chain, like this:
6140  * flow_create_split_outer() calls:
6141  *   flow_create_split_meter() calls:
6142  *     flow_create_split_metadata(meter_subflow_0) calls:
6143  *       flow_create_split_inner(metadata_subflow_0)
6144  *       flow_create_split_inner(metadata_subflow_1)
6145  *       flow_create_split_inner(metadata_subflow_2)
6146  *     flow_create_split_metadata(meter_subflow_1) calls:
6147  *       flow_create_split_inner(metadata_subflow_0)
6148  *       flow_create_split_inner(metadata_subflow_1)
6149  *       flow_create_split_inner(metadata_subflow_2)
6150  *
6151  * This provide flexible way to add new levels of flow splitting.
6152  * The all of successfully created subflows are included to the
6153  * parent flow dev_flow list.
6154  *
6155  * @param dev
6156  *   Pointer to Ethernet device.
6157  * @param[in] flow
6158  *   Parent flow structure pointer.
6159  * @param[in] attr
6160  *   Flow rule attributes.
6161  * @param[in] items
6162  *   Pattern specification (list terminated by the END pattern item).
6163  * @param[in] actions
6164  *   Associated actions (list terminated by the END action).
6165  * @param[in] flow_split_info
6166  *   Pointer to flow split info structure.
6167  * @param[out] error
6168  *   Perform verbose error reporting if not NULL.
6169  * @return
6170  *   0 on success, negative value otherwise
6171  */
6172 static int
6173 flow_create_split_outer(struct rte_eth_dev *dev,
6174                         struct rte_flow *flow,
6175                         const struct rte_flow_attr *attr,
6176                         const struct rte_flow_item items[],
6177                         const struct rte_flow_action actions[],
6178                         struct mlx5_flow_split_info *flow_split_info,
6179                         struct rte_flow_error *error)
6180 {
6181         int ret;
6182
6183         ret = flow_create_split_sample(dev, flow, attr, items,
6184                                        actions, flow_split_info, error);
6185         MLX5_ASSERT(ret <= 0);
6186         return ret;
6187 }
6188
6189 static inline struct mlx5_flow_tunnel *
6190 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6191 {
6192         struct mlx5_flow_tunnel *tunnel;
6193
6194 #pragma GCC diagnostic push
6195 #pragma GCC diagnostic ignored "-Wcast-qual"
6196         tunnel = (typeof(tunnel))flow->tunnel;
6197 #pragma GCC diagnostic pop
6198
6199         return tunnel;
6200 }
6201
6202 /**
6203  * Adjust flow RSS workspace if needed.
6204  *
6205  * @param wks
6206  *   Pointer to thread flow work space.
6207  * @param rss_desc
6208  *   Pointer to RSS descriptor.
6209  * @param[in] nrssq_num
6210  *   New RSS queue number.
6211  *
6212  * @return
6213  *   0 on success, -1 otherwise and rte_errno is set.
6214  */
6215 static int
6216 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6217                           struct mlx5_flow_rss_desc *rss_desc,
6218                           uint32_t nrssq_num)
6219 {
6220         if (likely(nrssq_num <= wks->rssq_num))
6221                 return 0;
6222         rss_desc->queue = realloc(rss_desc->queue,
6223                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6224         if (!rss_desc->queue) {
6225                 rte_errno = ENOMEM;
6226                 return -1;
6227         }
6228         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6229         return 0;
6230 }
6231
6232 /**
6233  * Create a flow and add it to @p list.
6234  *
6235  * @param dev
6236  *   Pointer to Ethernet device.
6237  * @param list
6238  *   Pointer to a TAILQ flow list. If this parameter NULL,
6239  *   no list insertion occurred, flow is just created,
6240  *   this is caller's responsibility to track the
6241  *   created flow.
6242  * @param[in] attr
6243  *   Flow rule attributes.
6244  * @param[in] items
6245  *   Pattern specification (list terminated by the END pattern item).
6246  * @param[in] actions
6247  *   Associated actions (list terminated by the END action).
6248  * @param[in] external
6249  *   This flow rule is created by request external to PMD.
6250  * @param[out] error
6251  *   Perform verbose error reporting if not NULL.
6252  *
6253  * @return
6254  *   A flow index on success, 0 otherwise and rte_errno is set.
6255  */
6256 static uint32_t
6257 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6258                  const struct rte_flow_attr *attr,
6259                  const struct rte_flow_item items[],
6260                  const struct rte_flow_action original_actions[],
6261                  bool external, struct rte_flow_error *error)
6262 {
6263         struct mlx5_priv *priv = dev->data->dev_private;
6264         struct rte_flow *flow = NULL;
6265         struct mlx5_flow *dev_flow;
6266         const struct rte_flow_action_rss *rss = NULL;
6267         struct mlx5_translated_action_handle
6268                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6269         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6270         union {
6271                 struct mlx5_flow_expand_rss buf;
6272                 uint8_t buffer[2048];
6273         } expand_buffer;
6274         union {
6275                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6276                 uint8_t buffer[2048];
6277         } actions_rx;
6278         union {
6279                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6280                 uint8_t buffer[2048];
6281         } actions_hairpin_tx;
6282         union {
6283                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6284                 uint8_t buffer[2048];
6285         } items_tx;
6286         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6287         struct mlx5_flow_rss_desc *rss_desc;
6288         const struct rte_flow_action *p_actions_rx;
6289         uint32_t i;
6290         uint32_t idx = 0;
6291         int hairpin_flow;
6292         struct rte_flow_attr attr_tx = { .priority = 0 };
6293         const struct rte_flow_action *actions;
6294         struct rte_flow_action *translated_actions = NULL;
6295         struct mlx5_flow_tunnel *tunnel;
6296         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6297         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6298         struct mlx5_flow_split_info flow_split_info = {
6299                 .external = !!external,
6300                 .skip_scale = 0,
6301                 .flow_idx = 0,
6302                 .prefix_mark = 0,
6303                 .prefix_layers = 0,
6304                 .table_id = 0
6305         };
6306         int ret;
6307
6308         MLX5_ASSERT(wks);
6309         rss_desc = &wks->rss_desc;
6310         ret = flow_action_handles_translate(dev, original_actions,
6311                                             indir_actions,
6312                                             &indir_actions_n,
6313                                             &translated_actions, error);
6314         if (ret < 0) {
6315                 MLX5_ASSERT(translated_actions == NULL);
6316                 return 0;
6317         }
6318         actions = translated_actions ? translated_actions : original_actions;
6319         p_actions_rx = actions;
6320         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6321         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6322                                 external, hairpin_flow, error);
6323         if (ret < 0)
6324                 goto error_before_hairpin_split;
6325         flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6326         if (!flow) {
6327                 rte_errno = ENOMEM;
6328                 goto error_before_hairpin_split;
6329         }
6330         if (hairpin_flow > 0) {
6331                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6332                         rte_errno = EINVAL;
6333                         goto error_before_hairpin_split;
6334                 }
6335                 flow_hairpin_split(dev, actions, actions_rx.actions,
6336                                    actions_hairpin_tx.actions, items_tx.items,
6337                                    idx);
6338                 p_actions_rx = actions_rx.actions;
6339         }
6340         flow_split_info.flow_idx = idx;
6341         flow->drv_type = flow_get_drv_type(dev, attr);
6342         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6343                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6344         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6345         /* RSS Action only works on NIC RX domain */
6346         if (attr->ingress && !attr->transfer)
6347                 rss = flow_get_rss_action(dev, p_actions_rx);
6348         if (rss) {
6349                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6350                         return 0;
6351                 /*
6352                  * The following information is required by
6353                  * mlx5_flow_hashfields_adjust() in advance.
6354                  */
6355                 rss_desc->level = rss->level;
6356                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
6357                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
6358         }
6359         flow->dev_handles = 0;
6360         if (rss && rss->types) {
6361                 unsigned int graph_root;
6362
6363                 graph_root = find_graph_root(items, rss->level);
6364                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6365                                            items, rss->types,
6366                                            mlx5_support_expansion, graph_root);
6367                 MLX5_ASSERT(ret > 0 &&
6368                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6369                 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6370                         for (i = 0; i < buf->entries; ++i)
6371                                 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6372                 }
6373         } else {
6374                 buf->entries = 1;
6375                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6376         }
6377         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6378                                                       indir_actions_n);
6379         for (i = 0; i < buf->entries; ++i) {
6380                 /* Initialize flow split data. */
6381                 flow_split_info.prefix_layers = 0;
6382                 flow_split_info.prefix_mark = 0;
6383                 flow_split_info.skip_scale = 0;
6384                 /*
6385                  * The splitter may create multiple dev_flows,
6386                  * depending on configuration. In the simplest
6387                  * case it just creates unmodified original flow.
6388                  */
6389                 ret = flow_create_split_outer(dev, flow, attr,
6390                                               buf->entry[i].pattern,
6391                                               p_actions_rx, &flow_split_info,
6392                                               error);
6393                 if (ret < 0)
6394                         goto error;
6395                 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6396                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6397                                                            p_actions_rx,
6398                                                            idx,
6399                                                            wks->flows[0].tunnel,
6400                                                            &default_miss_ctx,
6401                                                            error);
6402                         if (ret < 0) {
6403                                 mlx5_free(default_miss_ctx.queue);
6404                                 goto error;
6405                         }
6406                 }
6407         }
6408         /* Create the tx flow. */
6409         if (hairpin_flow) {
6410                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6411                 attr_tx.ingress = 0;
6412                 attr_tx.egress = 1;
6413                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6414                                          actions_hairpin_tx.actions,
6415                                          idx, error);
6416                 if (!dev_flow)
6417                         goto error;
6418                 dev_flow->flow = flow;
6419                 dev_flow->external = 0;
6420                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6421                               dev_flow->handle, next);
6422                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6423                                          items_tx.items,
6424                                          actions_hairpin_tx.actions, error);
6425                 if (ret < 0)
6426                         goto error;
6427         }
6428         /*
6429          * Update the metadata register copy table. If extensive
6430          * metadata feature is enabled and registers are supported
6431          * we might create the extra rte_flow for each unique
6432          * MARK/FLAG action ID.
6433          *
6434          * The table is updated for ingress Flows only, because
6435          * the egress Flows belong to the different device and
6436          * copy table should be updated in peer NIC Rx domain.
6437          */
6438         if (attr->ingress &&
6439             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6440                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6441                 if (ret)
6442                         goto error;
6443         }
6444         /*
6445          * If the flow is external (from application) OR device is started,
6446          * OR mreg discover, then apply immediately.
6447          */
6448         if (external || dev->data->dev_started ||
6449             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6450              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6451                 ret = flow_drv_apply(dev, flow, error);
6452                 if (ret < 0)
6453                         goto error;
6454         }
6455         flow->type = type;
6456         flow_rxq_flags_set(dev, flow);
6457         rte_free(translated_actions);
6458         tunnel = flow_tunnel_from_rule(wks->flows);
6459         if (tunnel) {
6460                 flow->tunnel = 1;
6461                 flow->tunnel_id = tunnel->tunnel_id;
6462                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6463                 mlx5_free(default_miss_ctx.queue);
6464         }
6465         mlx5_flow_pop_thread_workspace();
6466         return idx;
6467 error:
6468         MLX5_ASSERT(flow);
6469         ret = rte_errno; /* Save rte_errno before cleanup. */
6470         flow_mreg_del_copy_action(dev, flow);
6471         flow_drv_destroy(dev, flow);
6472         if (rss_desc->shared_rss)
6473                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6474                         mlx5_ipool_get
6475                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6476                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6477         mlx5_ipool_free(priv->flows[type], idx);
6478         rte_errno = ret; /* Restore rte_errno. */
6479         ret = rte_errno;
6480         rte_errno = ret;
6481         mlx5_flow_pop_thread_workspace();
6482 error_before_hairpin_split:
6483         rte_free(translated_actions);
6484         return 0;
6485 }
6486
6487 /**
6488  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6489  * incoming packets to table 1.
6490  *
6491  * Other flow rules, requested for group n, will be created in
6492  * e-switch table n+1.
6493  * Jump action to e-switch group n will be created to group n+1.
6494  *
6495  * Used when working in switchdev mode, to utilise advantages of table 1
6496  * and above.
6497  *
6498  * @param dev
6499  *   Pointer to Ethernet device.
6500  *
6501  * @return
6502  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6503  */
6504 struct rte_flow *
6505 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6506 {
6507         const struct rte_flow_attr attr = {
6508                 .group = 0,
6509                 .priority = 0,
6510                 .ingress = 1,
6511                 .egress = 0,
6512                 .transfer = 1,
6513         };
6514         const struct rte_flow_item pattern = {
6515                 .type = RTE_FLOW_ITEM_TYPE_END,
6516         };
6517         struct rte_flow_action_jump jump = {
6518                 .group = 1,
6519         };
6520         const struct rte_flow_action actions[] = {
6521                 {
6522                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6523                         .conf = &jump,
6524                 },
6525                 {
6526                         .type = RTE_FLOW_ACTION_TYPE_END,
6527                 },
6528         };
6529         struct rte_flow_error error;
6530
6531         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6532                                                    &attr, &pattern,
6533                                                    actions, false, &error);
6534 }
6535
6536 /**
6537  * Validate a flow supported by the NIC.
6538  *
6539  * @see rte_flow_validate()
6540  * @see rte_flow_ops
6541  */
6542 int
6543 mlx5_flow_validate(struct rte_eth_dev *dev,
6544                    const struct rte_flow_attr *attr,
6545                    const struct rte_flow_item items[],
6546                    const struct rte_flow_action original_actions[],
6547                    struct rte_flow_error *error)
6548 {
6549         int hairpin_flow;
6550         struct mlx5_translated_action_handle
6551                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6552         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6553         const struct rte_flow_action *actions;
6554         struct rte_flow_action *translated_actions = NULL;
6555         int ret = flow_action_handles_translate(dev, original_actions,
6556                                                 indir_actions,
6557                                                 &indir_actions_n,
6558                                                 &translated_actions, error);
6559
6560         if (ret)
6561                 return ret;
6562         actions = translated_actions ? translated_actions : original_actions;
6563         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6564         ret = flow_drv_validate(dev, attr, items, actions,
6565                                 true, hairpin_flow, error);
6566         rte_free(translated_actions);
6567         return ret;
6568 }
6569
6570 /**
6571  * Create a flow.
6572  *
6573  * @see rte_flow_create()
6574  * @see rte_flow_ops
6575  */
6576 struct rte_flow *
6577 mlx5_flow_create(struct rte_eth_dev *dev,
6578                  const struct rte_flow_attr *attr,
6579                  const struct rte_flow_item items[],
6580                  const struct rte_flow_action actions[],
6581                  struct rte_flow_error *error)
6582 {
6583         /*
6584          * If the device is not started yet, it is not allowed to created a
6585          * flow from application. PMD default flows and traffic control flows
6586          * are not affected.
6587          */
6588         if (unlikely(!dev->data->dev_started)) {
6589                 DRV_LOG(DEBUG, "port %u is not started when "
6590                         "inserting a flow", dev->data->port_id);
6591                 rte_flow_error_set(error, ENODEV,
6592                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6593                                    NULL,
6594                                    "port not started");
6595                 return NULL;
6596         }
6597
6598         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
6599                                                    attr, items, actions,
6600                                                    true, error);
6601 }
6602
6603 /**
6604  * Destroy a flow in a list.
6605  *
6606  * @param dev
6607  *   Pointer to Ethernet device.
6608  * @param[in] flow_idx
6609  *   Index of flow to destroy.
6610  */
6611 static void
6612 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6613                   uint32_t flow_idx)
6614 {
6615         struct mlx5_priv *priv = dev->data->dev_private;
6616         struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
6617
6618         if (!flow)
6619                 return;
6620         MLX5_ASSERT(flow->type == type);
6621         /*
6622          * Update RX queue flags only if port is started, otherwise it is
6623          * already clean.
6624          */
6625         if (dev->data->dev_started)
6626                 flow_rxq_flags_trim(dev, flow);
6627         flow_drv_destroy(dev, flow);
6628         if (flow->tunnel) {
6629                 struct mlx5_flow_tunnel *tunnel;
6630
6631                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6632                 RTE_VERIFY(tunnel);
6633                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6634                         mlx5_flow_tunnel_free(dev, tunnel);
6635         }
6636         flow_mreg_del_copy_action(dev, flow);
6637         mlx5_ipool_free(priv->flows[type], flow_idx);
6638 }
6639
6640 /**
6641  * Destroy all flows.
6642  *
6643  * @param dev
6644  *   Pointer to Ethernet device.
6645  * @param type
6646  *   Flow type to be flushed.
6647  * @param active
6648  *   If flushing is called avtively.
6649  */
6650 void
6651 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6652                      bool active)
6653 {
6654         struct mlx5_priv *priv = dev->data->dev_private;
6655         uint32_t num_flushed = 0, fidx = 1;
6656         struct rte_flow *flow;
6657
6658         MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
6659                 flow_list_destroy(dev, type, fidx);
6660                 num_flushed++;
6661         }
6662         if (active) {
6663                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6664                         dev->data->port_id, num_flushed);
6665         }
6666 }
6667
6668 /**
6669  * Stop all default actions for flows.
6670  *
6671  * @param dev
6672  *   Pointer to Ethernet device.
6673  */
6674 void
6675 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6676 {
6677         flow_mreg_del_default_copy_action(dev);
6678         flow_rxq_flags_clear(dev);
6679 }
6680
6681 /**
6682  * Start all default actions for flows.
6683  *
6684  * @param dev
6685  *   Pointer to Ethernet device.
6686  * @return
6687  *   0 on success, a negative errno value otherwise and rte_errno is set.
6688  */
6689 int
6690 mlx5_flow_start_default(struct rte_eth_dev *dev)
6691 {
6692         struct rte_flow_error error;
6693
6694         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6695         return flow_mreg_add_default_copy_action(dev, &error);
6696 }
6697
6698 /**
6699  * Release key of thread specific flow workspace data.
6700  */
6701 void
6702 flow_release_workspace(void *data)
6703 {
6704         struct mlx5_flow_workspace *wks = data;
6705         struct mlx5_flow_workspace *next;
6706
6707         while (wks) {
6708                 next = wks->next;
6709                 free(wks->rss_desc.queue);
6710                 free(wks);
6711                 wks = next;
6712         }
6713 }
6714
6715 /**
6716  * Get thread specific current flow workspace.
6717  *
6718  * @return pointer to thread specific flow workspace data, NULL on error.
6719  */
6720 struct mlx5_flow_workspace*
6721 mlx5_flow_get_thread_workspace(void)
6722 {
6723         struct mlx5_flow_workspace *data;
6724
6725         data = mlx5_flow_os_get_specific_workspace();
6726         MLX5_ASSERT(data && data->inuse);
6727         if (!data || !data->inuse)
6728                 DRV_LOG(ERR, "flow workspace not initialized.");
6729         return data;
6730 }
6731
6732 /**
6733  * Allocate and init new flow workspace.
6734  *
6735  * @return pointer to flow workspace data, NULL on error.
6736  */
6737 static struct mlx5_flow_workspace*
6738 flow_alloc_thread_workspace(void)
6739 {
6740         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6741
6742         if (!data) {
6743                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6744                         "memory.");
6745                 return NULL;
6746         }
6747         data->rss_desc.queue = calloc(1,
6748                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6749         if (!data->rss_desc.queue)
6750                 goto err;
6751         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6752         return data;
6753 err:
6754         if (data->rss_desc.queue)
6755                 free(data->rss_desc.queue);
6756         free(data);
6757         return NULL;
6758 }
6759
6760 /**
6761  * Get new thread specific flow workspace.
6762  *
6763  * If current workspace inuse, create new one and set as current.
6764  *
6765  * @return pointer to thread specific flow workspace data, NULL on error.
6766  */
6767 static struct mlx5_flow_workspace*
6768 mlx5_flow_push_thread_workspace(void)
6769 {
6770         struct mlx5_flow_workspace *curr;
6771         struct mlx5_flow_workspace *data;
6772
6773         curr = mlx5_flow_os_get_specific_workspace();
6774         if (!curr) {
6775                 data = flow_alloc_thread_workspace();
6776                 if (!data)
6777                         return NULL;
6778         } else if (!curr->inuse) {
6779                 data = curr;
6780         } else if (curr->next) {
6781                 data = curr->next;
6782         } else {
6783                 data = flow_alloc_thread_workspace();
6784                 if (!data)
6785                         return NULL;
6786                 curr->next = data;
6787                 data->prev = curr;
6788         }
6789         data->inuse = 1;
6790         data->flow_idx = 0;
6791         /* Set as current workspace */
6792         if (mlx5_flow_os_set_specific_workspace(data))
6793                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6794         return data;
6795 }
6796
6797 /**
6798  * Close current thread specific flow workspace.
6799  *
6800  * If previous workspace available, set it as current.
6801  *
6802  * @return pointer to thread specific flow workspace data, NULL on error.
6803  */
6804 static void
6805 mlx5_flow_pop_thread_workspace(void)
6806 {
6807         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6808
6809         if (!data)
6810                 return;
6811         if (!data->inuse) {
6812                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6813                 return;
6814         }
6815         data->inuse = 0;
6816         if (!data->prev)
6817                 return;
6818         if (mlx5_flow_os_set_specific_workspace(data->prev))
6819                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6820 }
6821
6822 /**
6823  * Verify the flow list is empty
6824  *
6825  * @param dev
6826  *  Pointer to Ethernet device.
6827  *
6828  * @return the number of flows not released.
6829  */
6830 int
6831 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
6832 {
6833         struct mlx5_priv *priv = dev->data->dev_private;
6834         struct rte_flow *flow;
6835         uint32_t idx = 0;
6836         int ret = 0, i;
6837
6838         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
6839                 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
6840                         DRV_LOG(DEBUG, "port %u flow %p still referenced",
6841                                 dev->data->port_id, (void *)flow);
6842                         ret++;
6843                 }
6844         }
6845         return ret;
6846 }
6847
6848 /**
6849  * Enable default hairpin egress flow.
6850  *
6851  * @param dev
6852  *   Pointer to Ethernet device.
6853  * @param queue
6854  *   The queue index.
6855  *
6856  * @return
6857  *   0 on success, a negative errno value otherwise and rte_errno is set.
6858  */
6859 int
6860 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6861                             uint32_t queue)
6862 {
6863         const struct rte_flow_attr attr = {
6864                 .egress = 1,
6865                 .priority = 0,
6866         };
6867         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6868                 .queue = queue,
6869         };
6870         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6871                 .queue = UINT32_MAX,
6872         };
6873         struct rte_flow_item items[] = {
6874                 {
6875                         .type = (enum rte_flow_item_type)
6876                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6877                         .spec = &queue_spec,
6878                         .last = NULL,
6879                         .mask = &queue_mask,
6880                 },
6881                 {
6882                         .type = RTE_FLOW_ITEM_TYPE_END,
6883                 },
6884         };
6885         struct rte_flow_action_jump jump = {
6886                 .group = MLX5_HAIRPIN_TX_TABLE,
6887         };
6888         struct rte_flow_action actions[2];
6889         uint32_t flow_idx;
6890         struct rte_flow_error error;
6891
6892         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6893         actions[0].conf = &jump;
6894         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6895         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6896                                     &attr, items, actions, false, &error);
6897         if (!flow_idx) {
6898                 DRV_LOG(DEBUG,
6899                         "Failed to create ctrl flow: rte_errno(%d),"
6900                         " type(%d), message(%s)",
6901                         rte_errno, error.type,
6902                         error.message ? error.message : " (no stated reason)");
6903                 return -rte_errno;
6904         }
6905         return 0;
6906 }
6907
6908 /**
6909  * Enable a control flow configured from the control plane.
6910  *
6911  * @param dev
6912  *   Pointer to Ethernet device.
6913  * @param eth_spec
6914  *   An Ethernet flow spec to apply.
6915  * @param eth_mask
6916  *   An Ethernet flow mask to apply.
6917  * @param vlan_spec
6918  *   A VLAN flow spec to apply.
6919  * @param vlan_mask
6920  *   A VLAN flow mask to apply.
6921  *
6922  * @return
6923  *   0 on success, a negative errno value otherwise and rte_errno is set.
6924  */
6925 int
6926 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6927                     struct rte_flow_item_eth *eth_spec,
6928                     struct rte_flow_item_eth *eth_mask,
6929                     struct rte_flow_item_vlan *vlan_spec,
6930                     struct rte_flow_item_vlan *vlan_mask)
6931 {
6932         struct mlx5_priv *priv = dev->data->dev_private;
6933         const struct rte_flow_attr attr = {
6934                 .ingress = 1,
6935                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6936         };
6937         struct rte_flow_item items[] = {
6938                 {
6939                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6940                         .spec = eth_spec,
6941                         .last = NULL,
6942                         .mask = eth_mask,
6943                 },
6944                 {
6945                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6946                                               RTE_FLOW_ITEM_TYPE_END,
6947                         .spec = vlan_spec,
6948                         .last = NULL,
6949                         .mask = vlan_mask,
6950                 },
6951                 {
6952                         .type = RTE_FLOW_ITEM_TYPE_END,
6953                 },
6954         };
6955         uint16_t queue[priv->reta_idx_n];
6956         struct rte_flow_action_rss action_rss = {
6957                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6958                 .level = 0,
6959                 .types = priv->rss_conf.rss_hf,
6960                 .key_len = priv->rss_conf.rss_key_len,
6961                 .queue_num = priv->reta_idx_n,
6962                 .key = priv->rss_conf.rss_key,
6963                 .queue = queue,
6964         };
6965         struct rte_flow_action actions[] = {
6966                 {
6967                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6968                         .conf = &action_rss,
6969                 },
6970                 {
6971                         .type = RTE_FLOW_ACTION_TYPE_END,
6972                 },
6973         };
6974         uint32_t flow_idx;
6975         struct rte_flow_error error;
6976         unsigned int i;
6977
6978         if (!priv->reta_idx_n || !priv->rxqs_n) {
6979                 return 0;
6980         }
6981         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6982                 action_rss.types = 0;
6983         for (i = 0; i != priv->reta_idx_n; ++i)
6984                 queue[i] = (*priv->reta_idx)[i];
6985         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6986                                     &attr, items, actions, false, &error);
6987         if (!flow_idx)
6988                 return -rte_errno;
6989         return 0;
6990 }
6991
6992 /**
6993  * Enable a flow control configured from the control plane.
6994  *
6995  * @param dev
6996  *   Pointer to Ethernet device.
6997  * @param eth_spec
6998  *   An Ethernet flow spec to apply.
6999  * @param eth_mask
7000  *   An Ethernet flow mask to apply.
7001  *
7002  * @return
7003  *   0 on success, a negative errno value otherwise and rte_errno is set.
7004  */
7005 int
7006 mlx5_ctrl_flow(struct rte_eth_dev *dev,
7007                struct rte_flow_item_eth *eth_spec,
7008                struct rte_flow_item_eth *eth_mask)
7009 {
7010         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
7011 }
7012
7013 /**
7014  * Create default miss flow rule matching lacp traffic
7015  *
7016  * @param dev
7017  *   Pointer to Ethernet device.
7018  * @param eth_spec
7019  *   An Ethernet flow spec to apply.
7020  *
7021  * @return
7022  *   0 on success, a negative errno value otherwise and rte_errno is set.
7023  */
7024 int
7025 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
7026 {
7027         /*
7028          * The LACP matching is done by only using ether type since using
7029          * a multicast dst mac causes kernel to give low priority to this flow.
7030          */
7031         static const struct rte_flow_item_eth lacp_spec = {
7032                 .type = RTE_BE16(0x8809),
7033         };
7034         static const struct rte_flow_item_eth lacp_mask = {
7035                 .type = 0xffff,
7036         };
7037         const struct rte_flow_attr attr = {
7038                 .ingress = 1,
7039         };
7040         struct rte_flow_item items[] = {
7041                 {
7042                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7043                         .spec = &lacp_spec,
7044                         .mask = &lacp_mask,
7045                 },
7046                 {
7047                         .type = RTE_FLOW_ITEM_TYPE_END,
7048                 },
7049         };
7050         struct rte_flow_action actions[] = {
7051                 {
7052                         .type = (enum rte_flow_action_type)
7053                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7054                 },
7055                 {
7056                         .type = RTE_FLOW_ACTION_TYPE_END,
7057                 },
7058         };
7059         struct rte_flow_error error;
7060         uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7061                                         &attr, items, actions,
7062                                         false, &error);
7063
7064         if (!flow_idx)
7065                 return -rte_errno;
7066         return 0;
7067 }
7068
7069 /**
7070  * Destroy a flow.
7071  *
7072  * @see rte_flow_destroy()
7073  * @see rte_flow_ops
7074  */
7075 int
7076 mlx5_flow_destroy(struct rte_eth_dev *dev,
7077                   struct rte_flow *flow,
7078                   struct rte_flow_error *error __rte_unused)
7079 {
7080         flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7081                                 (uintptr_t)(void *)flow);
7082         return 0;
7083 }
7084
7085 /**
7086  * Destroy all flows.
7087  *
7088  * @see rte_flow_flush()
7089  * @see rte_flow_ops
7090  */
7091 int
7092 mlx5_flow_flush(struct rte_eth_dev *dev,
7093                 struct rte_flow_error *error __rte_unused)
7094 {
7095         mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7096         return 0;
7097 }
7098
7099 /**
7100  * Isolated mode.
7101  *
7102  * @see rte_flow_isolate()
7103  * @see rte_flow_ops
7104  */
7105 int
7106 mlx5_flow_isolate(struct rte_eth_dev *dev,
7107                   int enable,
7108                   struct rte_flow_error *error)
7109 {
7110         struct mlx5_priv *priv = dev->data->dev_private;
7111
7112         if (dev->data->dev_started) {
7113                 rte_flow_error_set(error, EBUSY,
7114                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7115                                    NULL,
7116                                    "port must be stopped first");
7117                 return -rte_errno;
7118         }
7119         priv->isolated = !!enable;
7120         if (enable)
7121                 dev->dev_ops = &mlx5_dev_ops_isolate;
7122         else
7123                 dev->dev_ops = &mlx5_dev_ops;
7124
7125         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7126         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7127
7128         return 0;
7129 }
7130
7131 /**
7132  * Query a flow.
7133  *
7134  * @see rte_flow_query()
7135  * @see rte_flow_ops
7136  */
7137 static int
7138 flow_drv_query(struct rte_eth_dev *dev,
7139                uint32_t flow_idx,
7140                const struct rte_flow_action *actions,
7141                void *data,
7142                struct rte_flow_error *error)
7143 {
7144         struct mlx5_priv *priv = dev->data->dev_private;
7145         const struct mlx5_flow_driver_ops *fops;
7146         struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7147                                                flow_idx);
7148         enum mlx5_flow_drv_type ftype;
7149
7150         if (!flow) {
7151                 return rte_flow_error_set(error, ENOENT,
7152                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7153                           NULL,
7154                           "invalid flow handle");
7155         }
7156         ftype = flow->drv_type;
7157         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7158         fops = flow_get_drv_ops(ftype);
7159
7160         return fops->query(dev, flow, actions, data, error);
7161 }
7162
7163 /**
7164  * Query a flow.
7165  *
7166  * @see rte_flow_query()
7167  * @see rte_flow_ops
7168  */
7169 int
7170 mlx5_flow_query(struct rte_eth_dev *dev,
7171                 struct rte_flow *flow,
7172                 const struct rte_flow_action *actions,
7173                 void *data,
7174                 struct rte_flow_error *error)
7175 {
7176         int ret;
7177
7178         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7179                              error);
7180         if (ret < 0)
7181                 return ret;
7182         return 0;
7183 }
7184
7185 /**
7186  * Get rte_flow callbacks.
7187  *
7188  * @param dev
7189  *   Pointer to Ethernet device structure.
7190  * @param ops
7191  *   Pointer to operation-specific structure.
7192  *
7193  * @return 0
7194  */
7195 int
7196 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7197                   const struct rte_flow_ops **ops)
7198 {
7199         *ops = &mlx5_flow_ops;
7200         return 0;
7201 }
7202
7203 /**
7204  * Validate meter policy actions.
7205  * Dispatcher for action type specific validation.
7206  *
7207  * @param[in] dev
7208  *   Pointer to the Ethernet device structure.
7209  * @param[in] action
7210  *   The meter policy action object to validate.
7211  * @param[in] attr
7212  *   Attributes of flow to determine steering domain.
7213  * @param[out] is_rss
7214  *   Is RSS or not.
7215  * @param[out] domain_bitmap
7216  *   Domain bitmap.
7217  * @param[out] is_def_policy
7218  *   Is default policy or not.
7219  * @param[out] error
7220  *   Perform verbose error reporting if not NULL. Initialized in case of
7221  *   error only.
7222  *
7223  * @return
7224  *   0 on success, otherwise negative errno value.
7225  */
7226 int
7227 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7228                         const struct rte_flow_action *actions[RTE_COLORS],
7229                         struct rte_flow_attr *attr,
7230                         bool *is_rss,
7231                         uint8_t *domain_bitmap,
7232                         uint8_t *policy_mode,
7233                         struct rte_mtr_error *error)
7234 {
7235         const struct mlx5_flow_driver_ops *fops;
7236
7237         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7238         return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7239                                        domain_bitmap, policy_mode, error);
7240 }
7241
7242 /**
7243  * Destroy the meter table set.
7244  *
7245  * @param[in] dev
7246  *   Pointer to Ethernet device.
7247  * @param[in] mtr_policy
7248  *   Meter policy struct.
7249  */
7250 void
7251 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7252                       struct mlx5_flow_meter_policy *mtr_policy)
7253 {
7254         const struct mlx5_flow_driver_ops *fops;
7255
7256         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7257         fops->destroy_mtr_acts(dev, mtr_policy);
7258 }
7259
7260 /**
7261  * Create policy action, lock free,
7262  * (mutex should be acquired by caller).
7263  * Dispatcher for action type specific call.
7264  *
7265  * @param[in] dev
7266  *   Pointer to the Ethernet device structure.
7267  * @param[in] mtr_policy
7268  *   Meter policy struct.
7269  * @param[in] action
7270  *   Action specification used to create meter actions.
7271  * @param[out] error
7272  *   Perform verbose error reporting if not NULL. Initialized in case of
7273  *   error only.
7274  *
7275  * @return
7276  *   0 on success, otherwise negative errno value.
7277  */
7278 int
7279 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7280                       struct mlx5_flow_meter_policy *mtr_policy,
7281                       const struct rte_flow_action *actions[RTE_COLORS],
7282                       struct rte_mtr_error *error)
7283 {
7284         const struct mlx5_flow_driver_ops *fops;
7285
7286         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7287         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7288 }
7289
7290 /**
7291  * Create policy rules, lock free,
7292  * (mutex should be acquired by caller).
7293  * Dispatcher for action type specific call.
7294  *
7295  * @param[in] dev
7296  *   Pointer to the Ethernet device structure.
7297  * @param[in] mtr_policy
7298  *   Meter policy struct.
7299  *
7300  * @return
7301  *   0 on success, -1 otherwise.
7302  */
7303 int
7304 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7305                              struct mlx5_flow_meter_policy *mtr_policy)
7306 {
7307         const struct mlx5_flow_driver_ops *fops;
7308
7309         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7310         return fops->create_policy_rules(dev, mtr_policy);
7311 }
7312
7313 /**
7314  * Destroy policy rules, lock free,
7315  * (mutex should be acquired by caller).
7316  * Dispatcher for action type specific call.
7317  *
7318  * @param[in] dev
7319  *   Pointer to the Ethernet device structure.
7320  * @param[in] mtr_policy
7321  *   Meter policy struct.
7322  */
7323 void
7324 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7325                              struct mlx5_flow_meter_policy *mtr_policy)
7326 {
7327         const struct mlx5_flow_driver_ops *fops;
7328
7329         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7330         fops->destroy_policy_rules(dev, mtr_policy);
7331 }
7332
7333 /**
7334  * Destroy the default policy table set.
7335  *
7336  * @param[in] dev
7337  *   Pointer to Ethernet device.
7338  */
7339 void
7340 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7341 {
7342         const struct mlx5_flow_driver_ops *fops;
7343
7344         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7345         fops->destroy_def_policy(dev);
7346 }
7347
7348 /**
7349  * Destroy the default policy table set.
7350  *
7351  * @param[in] dev
7352  *   Pointer to Ethernet device.
7353  *
7354  * @return
7355  *   0 on success, -1 otherwise.
7356  */
7357 int
7358 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7359 {
7360         const struct mlx5_flow_driver_ops *fops;
7361
7362         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7363         return fops->create_def_policy(dev);
7364 }
7365
7366 /**
7367  * Create the needed meter and suffix tables.
7368  *
7369  * @param[in] dev
7370  *   Pointer to Ethernet device.
7371  *
7372  * @return
7373  *   0 on success, -1 otherwise.
7374  */
7375 int
7376 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7377                         struct mlx5_flow_meter_info *fm,
7378                         uint32_t mtr_idx,
7379                         uint8_t domain_bitmap)
7380 {
7381         const struct mlx5_flow_driver_ops *fops;
7382
7383         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7384         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7385 }
7386
7387 /**
7388  * Destroy the meter table set.
7389  *
7390  * @param[in] dev
7391  *   Pointer to Ethernet device.
7392  * @param[in] tbl
7393  *   Pointer to the meter table set.
7394  */
7395 void
7396 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7397                            struct mlx5_flow_meter_info *fm)
7398 {
7399         const struct mlx5_flow_driver_ops *fops;
7400
7401         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7402         fops->destroy_mtr_tbls(dev, fm);
7403 }
7404
7405 /**
7406  * Destroy the global meter drop table.
7407  *
7408  * @param[in] dev
7409  *   Pointer to Ethernet device.
7410  */
7411 void
7412 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7413 {
7414         const struct mlx5_flow_driver_ops *fops;
7415
7416         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7417         fops->destroy_mtr_drop_tbls(dev);
7418 }
7419
7420 /**
7421  * Destroy the sub policy table with RX queue.
7422  *
7423  * @param[in] dev
7424  *   Pointer to Ethernet device.
7425  * @param[in] mtr_policy
7426  *   Pointer to meter policy table.
7427  */
7428 void
7429 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7430                 struct mlx5_flow_meter_policy *mtr_policy)
7431 {
7432         const struct mlx5_flow_driver_ops *fops;
7433
7434         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7435         fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7436 }
7437
7438 /**
7439  * Allocate the needed aso flow meter id.
7440  *
7441  * @param[in] dev
7442  *   Pointer to Ethernet device.
7443  *
7444  * @return
7445  *   Index to aso flow meter on success, NULL otherwise.
7446  */
7447 uint32_t
7448 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7449 {
7450         const struct mlx5_flow_driver_ops *fops;
7451
7452         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7453         return fops->create_meter(dev);
7454 }
7455
7456 /**
7457  * Free the aso flow meter id.
7458  *
7459  * @param[in] dev
7460  *   Pointer to Ethernet device.
7461  * @param[in] mtr_idx
7462  *  Index to aso flow meter to be free.
7463  *
7464  * @return
7465  *   0 on success.
7466  */
7467 void
7468 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7469 {
7470         const struct mlx5_flow_driver_ops *fops;
7471
7472         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7473         fops->free_meter(dev, mtr_idx);
7474 }
7475
7476 /**
7477  * Allocate a counter.
7478  *
7479  * @param[in] dev
7480  *   Pointer to Ethernet device structure.
7481  *
7482  * @return
7483  *   Index to allocated counter  on success, 0 otherwise.
7484  */
7485 uint32_t
7486 mlx5_counter_alloc(struct rte_eth_dev *dev)
7487 {
7488         const struct mlx5_flow_driver_ops *fops;
7489         struct rte_flow_attr attr = { .transfer = 0 };
7490
7491         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7492                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7493                 return fops->counter_alloc(dev);
7494         }
7495         DRV_LOG(ERR,
7496                 "port %u counter allocate is not supported.",
7497                  dev->data->port_id);
7498         return 0;
7499 }
7500
7501 /**
7502  * Free a counter.
7503  *
7504  * @param[in] dev
7505  *   Pointer to Ethernet device structure.
7506  * @param[in] cnt
7507  *   Index to counter to be free.
7508  */
7509 void
7510 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7511 {
7512         const struct mlx5_flow_driver_ops *fops;
7513         struct rte_flow_attr attr = { .transfer = 0 };
7514
7515         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7516                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7517                 fops->counter_free(dev, cnt);
7518                 return;
7519         }
7520         DRV_LOG(ERR,
7521                 "port %u counter free is not supported.",
7522                  dev->data->port_id);
7523 }
7524
7525 /**
7526  * Query counter statistics.
7527  *
7528  * @param[in] dev
7529  *   Pointer to Ethernet device structure.
7530  * @param[in] cnt
7531  *   Index to counter to query.
7532  * @param[in] clear
7533  *   Set to clear counter statistics.
7534  * @param[out] pkts
7535  *   The counter hits packets number to save.
7536  * @param[out] bytes
7537  *   The counter hits bytes number to save.
7538  *
7539  * @return
7540  *   0 on success, a negative errno value otherwise.
7541  */
7542 int
7543 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7544                    bool clear, uint64_t *pkts, uint64_t *bytes)
7545 {
7546         const struct mlx5_flow_driver_ops *fops;
7547         struct rte_flow_attr attr = { .transfer = 0 };
7548
7549         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7550                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7551                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7552         }
7553         DRV_LOG(ERR,
7554                 "port %u counter query is not supported.",
7555                  dev->data->port_id);
7556         return -ENOTSUP;
7557 }
7558
7559 /**
7560  * Allocate a new memory for the counter values wrapped by all the needed
7561  * management.
7562  *
7563  * @param[in] sh
7564  *   Pointer to mlx5_dev_ctx_shared object.
7565  *
7566  * @return
7567  *   0 on success, a negative errno value otherwise.
7568  */
7569 static int
7570 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7571 {
7572         struct mlx5_devx_mkey_attr mkey_attr;
7573         struct mlx5_counter_stats_mem_mng *mem_mng;
7574         volatile struct flow_counter_stats *raw_data;
7575         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7576         int size = (sizeof(struct flow_counter_stats) *
7577                         MLX5_COUNTERS_PER_POOL +
7578                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7579                         sizeof(struct mlx5_counter_stats_mem_mng);
7580         size_t pgsize = rte_mem_page_size();
7581         uint8_t *mem;
7582         int i;
7583
7584         if (pgsize == (size_t)-1) {
7585                 DRV_LOG(ERR, "Failed to get mem page size");
7586                 rte_errno = ENOMEM;
7587                 return -ENOMEM;
7588         }
7589         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7590         if (!mem) {
7591                 rte_errno = ENOMEM;
7592                 return -ENOMEM;
7593         }
7594         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7595         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7596         mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,
7597                                                  IBV_ACCESS_LOCAL_WRITE);
7598         if (!mem_mng->umem) {
7599                 rte_errno = errno;
7600                 mlx5_free(mem);
7601                 return -rte_errno;
7602         }
7603         memset(&mkey_attr, 0, sizeof(mkey_attr));
7604         mkey_attr.addr = (uintptr_t)mem;
7605         mkey_attr.size = size;
7606         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7607         mkey_attr.pd = sh->pdn;
7608         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
7609         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
7610         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
7611         if (!mem_mng->dm) {
7612                 mlx5_os_umem_dereg(mem_mng->umem);
7613                 rte_errno = errno;
7614                 mlx5_free(mem);
7615                 return -rte_errno;
7616         }
7617         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7618         raw_data = (volatile struct flow_counter_stats *)mem;
7619         for (i = 0; i < raws_n; ++i) {
7620                 mem_mng->raws[i].mem_mng = mem_mng;
7621                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7622         }
7623         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7624                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7625                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7626                                  next);
7627         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7628         sh->cmng.mem_mng = mem_mng;
7629         return 0;
7630 }
7631
7632 /**
7633  * Set the statistic memory to the new counter pool.
7634  *
7635  * @param[in] sh
7636  *   Pointer to mlx5_dev_ctx_shared object.
7637  * @param[in] pool
7638  *   Pointer to the pool to set the statistic memory.
7639  *
7640  * @return
7641  *   0 on success, a negative errno value otherwise.
7642  */
7643 static int
7644 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7645                                struct mlx5_flow_counter_pool *pool)
7646 {
7647         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7648         /* Resize statistic memory once used out. */
7649         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7650             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7651                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7652                 return -1;
7653         }
7654         rte_spinlock_lock(&pool->sl);
7655         pool->raw = cmng->mem_mng->raws + pool->index %
7656                     MLX5_CNT_CONTAINER_RESIZE;
7657         rte_spinlock_unlock(&pool->sl);
7658         pool->raw_hw = NULL;
7659         return 0;
7660 }
7661
7662 #define MLX5_POOL_QUERY_FREQ_US 1000000
7663
7664 /**
7665  * Set the periodic procedure for triggering asynchronous batch queries for all
7666  * the counter pools.
7667  *
7668  * @param[in] sh
7669  *   Pointer to mlx5_dev_ctx_shared object.
7670  */
7671 void
7672 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7673 {
7674         uint32_t pools_n, us;
7675
7676         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7677         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7678         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7679         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7680                 sh->cmng.query_thread_on = 0;
7681                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7682         } else {
7683                 sh->cmng.query_thread_on = 1;
7684         }
7685 }
7686
7687 /**
7688  * The periodic procedure for triggering asynchronous batch queries for all the
7689  * counter pools. This function is probably called by the host thread.
7690  *
7691  * @param[in] arg
7692  *   The parameter for the alarm process.
7693  */
7694 void
7695 mlx5_flow_query_alarm(void *arg)
7696 {
7697         struct mlx5_dev_ctx_shared *sh = arg;
7698         int ret;
7699         uint16_t pool_index = sh->cmng.pool_index;
7700         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7701         struct mlx5_flow_counter_pool *pool;
7702         uint16_t n_valid;
7703
7704         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7705                 goto set_alarm;
7706         rte_spinlock_lock(&cmng->pool_update_sl);
7707         pool = cmng->pools[pool_index];
7708         n_valid = cmng->n_valid;
7709         rte_spinlock_unlock(&cmng->pool_update_sl);
7710         /* Set the statistic memory to the new created pool. */
7711         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7712                 goto set_alarm;
7713         if (pool->raw_hw)
7714                 /* There is a pool query in progress. */
7715                 goto set_alarm;
7716         pool->raw_hw =
7717                 LIST_FIRST(&sh->cmng.free_stat_raws);
7718         if (!pool->raw_hw)
7719                 /* No free counter statistics raw memory. */
7720                 goto set_alarm;
7721         /*
7722          * Identify the counters released between query trigger and query
7723          * handle more efficiently. The counter released in this gap period
7724          * should wait for a new round of query as the new arrived packets
7725          * will not be taken into account.
7726          */
7727         pool->query_gen++;
7728         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7729                                                MLX5_COUNTERS_PER_POOL,
7730                                                NULL, NULL,
7731                                                pool->raw_hw->mem_mng->dm->id,
7732                                                (void *)(uintptr_t)
7733                                                pool->raw_hw->data,
7734                                                sh->devx_comp,
7735                                                (uint64_t)(uintptr_t)pool);
7736         if (ret) {
7737                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7738                         " %d", pool->min_dcs->id);
7739                 pool->raw_hw = NULL;
7740                 goto set_alarm;
7741         }
7742         LIST_REMOVE(pool->raw_hw, next);
7743         sh->cmng.pending_queries++;
7744         pool_index++;
7745         if (pool_index >= n_valid)
7746                 pool_index = 0;
7747 set_alarm:
7748         sh->cmng.pool_index = pool_index;
7749         mlx5_set_query_alarm(sh);
7750 }
7751
7752 /**
7753  * Check and callback event for new aged flow in the counter pool
7754  *
7755  * @param[in] sh
7756  *   Pointer to mlx5_dev_ctx_shared object.
7757  * @param[in] pool
7758  *   Pointer to Current counter pool.
7759  */
7760 static void
7761 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7762                    struct mlx5_flow_counter_pool *pool)
7763 {
7764         struct mlx5_priv *priv;
7765         struct mlx5_flow_counter *cnt;
7766         struct mlx5_age_info *age_info;
7767         struct mlx5_age_param *age_param;
7768         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7769         struct mlx5_counter_stats_raw *prev = pool->raw;
7770         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7771         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7772         uint16_t expected = AGE_CANDIDATE;
7773         uint32_t i;
7774
7775         pool->time_of_last_age_check = curr_time;
7776         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7777                 cnt = MLX5_POOL_GET_CNT(pool, i);
7778                 age_param = MLX5_CNT_TO_AGE(cnt);
7779                 if (__atomic_load_n(&age_param->state,
7780                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7781                         continue;
7782                 if (cur->data[i].hits != prev->data[i].hits) {
7783                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7784                                          __ATOMIC_RELAXED);
7785                         continue;
7786                 }
7787                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7788                                        time_delta,
7789                                        __ATOMIC_RELAXED) <= age_param->timeout)
7790                         continue;
7791                 /**
7792                  * Hold the lock first, or if between the
7793                  * state AGE_TMOUT and tailq operation the
7794                  * release happened, the release procedure
7795                  * may delete a non-existent tailq node.
7796                  */
7797                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7798                 age_info = GET_PORT_AGE_INFO(priv);
7799                 rte_spinlock_lock(&age_info->aged_sl);
7800                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7801                                                 AGE_TMOUT, false,
7802                                                 __ATOMIC_RELAXED,
7803                                                 __ATOMIC_RELAXED)) {
7804                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
7805                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
7806                 }
7807                 rte_spinlock_unlock(&age_info->aged_sl);
7808         }
7809         mlx5_age_event_prepare(sh);
7810 }
7811
7812 /**
7813  * Handler for the HW respond about ready values from an asynchronous batch
7814  * query. This function is probably called by the host thread.
7815  *
7816  * @param[in] sh
7817  *   The pointer to the shared device context.
7818  * @param[in] async_id
7819  *   The Devx async ID.
7820  * @param[in] status
7821  *   The status of the completion.
7822  */
7823 void
7824 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
7825                                   uint64_t async_id, int status)
7826 {
7827         struct mlx5_flow_counter_pool *pool =
7828                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
7829         struct mlx5_counter_stats_raw *raw_to_free;
7830         uint8_t query_gen = pool->query_gen ^ 1;
7831         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7832         enum mlx5_counter_type cnt_type =
7833                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
7834                                 MLX5_COUNTER_TYPE_ORIGIN;
7835
7836         if (unlikely(status)) {
7837                 raw_to_free = pool->raw_hw;
7838         } else {
7839                 raw_to_free = pool->raw;
7840                 if (pool->is_aged)
7841                         mlx5_flow_aging_check(sh, pool);
7842                 rte_spinlock_lock(&pool->sl);
7843                 pool->raw = pool->raw_hw;
7844                 rte_spinlock_unlock(&pool->sl);
7845                 /* Be sure the new raw counters data is updated in memory. */
7846                 rte_io_wmb();
7847                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
7848                         rte_spinlock_lock(&cmng->csl[cnt_type]);
7849                         TAILQ_CONCAT(&cmng->counters[cnt_type],
7850                                      &pool->counters[query_gen], next);
7851                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
7852                 }
7853         }
7854         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
7855         pool->raw_hw = NULL;
7856         sh->cmng.pending_queries--;
7857 }
7858
7859 static int
7860 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7861                     const struct flow_grp_info *grp_info,
7862                     struct rte_flow_error *error)
7863 {
7864         if (grp_info->transfer && grp_info->external &&
7865             grp_info->fdb_def_rule) {
7866                 if (group == UINT32_MAX)
7867                         return rte_flow_error_set
7868                                                 (error, EINVAL,
7869                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7870                                                  NULL,
7871                                                  "group index not supported");
7872                 *table = group + 1;
7873         } else {
7874                 *table = group;
7875         }
7876         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7877         return 0;
7878 }
7879
7880 /**
7881  * Translate the rte_flow group index to HW table value.
7882  *
7883  * If tunnel offload is disabled, all group ids converted to flow table
7884  * id using the standard method.
7885  * If tunnel offload is enabled, group id can be converted using the
7886  * standard or tunnel conversion method. Group conversion method
7887  * selection depends on flags in `grp_info` parameter:
7888  * - Internal (grp_info.external == 0) groups conversion uses the
7889  *   standard method.
7890  * - Group ids in JUMP action converted with the tunnel conversion.
7891  * - Group id in rule attribute conversion depends on a rule type and
7892  *   group id value:
7893  *   ** non zero group attributes converted with the tunnel method
7894  *   ** zero group attribute in non-tunnel rule is converted using the
7895  *      standard method - there's only one root table
7896  *   ** zero group attribute in steer tunnel rule is converted with the
7897  *      standard method - single root table
7898  *   ** zero group attribute in match tunnel rule is a special OvS
7899  *      case: that value is used for portability reasons. That group
7900  *      id is converted with the tunnel conversion method.
7901  *
7902  * @param[in] dev
7903  *   Port device
7904  * @param[in] tunnel
7905  *   PMD tunnel offload object
7906  * @param[in] group
7907  *   rte_flow group index value.
7908  * @param[out] table
7909  *   HW table value.
7910  * @param[in] grp_info
7911  *   flags used for conversion
7912  * @param[out] error
7913  *   Pointer to error structure.
7914  *
7915  * @return
7916  *   0 on success, a negative errno value otherwise and rte_errno is set.
7917  */
7918 int
7919 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7920                          const struct mlx5_flow_tunnel *tunnel,
7921                          uint32_t group, uint32_t *table,
7922                          const struct flow_grp_info *grp_info,
7923                          struct rte_flow_error *error)
7924 {
7925         int ret;
7926         bool standard_translation;
7927
7928         if (!grp_info->skip_scale && grp_info->external &&
7929             group < MLX5_MAX_TABLES_EXTERNAL)
7930                 group *= MLX5_FLOW_TABLE_FACTOR;
7931         if (is_tunnel_offload_active(dev)) {
7932                 standard_translation = !grp_info->external ||
7933                                         grp_info->std_tbl_fix;
7934         } else {
7935                 standard_translation = true;
7936         }
7937         DRV_LOG(DEBUG,
7938                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
7939                 dev->data->port_id, group, grp_info->transfer,
7940                 grp_info->external, grp_info->fdb_def_rule,
7941                 standard_translation ? "STANDARD" : "TUNNEL");
7942         if (standard_translation)
7943                 ret = flow_group_to_table(dev->data->port_id, group, table,
7944                                           grp_info, error);
7945         else
7946                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7947                                                       table, error);
7948
7949         return ret;
7950 }
7951
7952 /**
7953  * Discover availability of metadata reg_c's.
7954  *
7955  * Iteratively use test flows to check availability.
7956  *
7957  * @param[in] dev
7958  *   Pointer to the Ethernet device structure.
7959  *
7960  * @return
7961  *   0 on success, a negative errno value otherwise and rte_errno is set.
7962  */
7963 int
7964 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7965 {
7966         struct mlx5_priv *priv = dev->data->dev_private;
7967         struct mlx5_dev_config *config = &priv->config;
7968         enum modify_reg idx;
7969         int n = 0;
7970
7971         /* reg_c[0] and reg_c[1] are reserved. */
7972         config->flow_mreg_c[n++] = REG_C_0;
7973         config->flow_mreg_c[n++] = REG_C_1;
7974         /* Discover availability of other reg_c's. */
7975         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7976                 struct rte_flow_attr attr = {
7977                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7978                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7979                         .ingress = 1,
7980                 };
7981                 struct rte_flow_item items[] = {
7982                         [0] = {
7983                                 .type = RTE_FLOW_ITEM_TYPE_END,
7984                         },
7985                 };
7986                 struct rte_flow_action actions[] = {
7987                         [0] = {
7988                                 .type = (enum rte_flow_action_type)
7989                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7990                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7991                                         .src = REG_C_1,
7992                                         .dst = idx,
7993                                 },
7994                         },
7995                         [1] = {
7996                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7997                                 .conf = &(struct rte_flow_action_jump){
7998                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7999                                 },
8000                         },
8001                         [2] = {
8002                                 .type = RTE_FLOW_ACTION_TYPE_END,
8003                         },
8004                 };
8005                 uint32_t flow_idx;
8006                 struct rte_flow *flow;
8007                 struct rte_flow_error error;
8008
8009                 if (!config->dv_flow_en)
8010                         break;
8011                 /* Create internal flow, validation skips copy action. */
8012                 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
8013                                         items, actions, false, &error);
8014                 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8015                                       flow_idx);
8016                 if (!flow)
8017                         continue;
8018                 config->flow_mreg_c[n++] = idx;
8019                 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
8020         }
8021         for (; n < MLX5_MREG_C_NUM; ++n)
8022                 config->flow_mreg_c[n] = REG_NON;
8023         return 0;
8024 }
8025
8026 int
8027 save_dump_file(const uint8_t *data, uint32_t size,
8028         uint32_t type, uint32_t id, void *arg, FILE *file)
8029 {
8030         char line[BUF_SIZE];
8031         uint32_t out = 0;
8032         uint32_t k;
8033         uint32_t actions_num;
8034         struct rte_flow_query_count *count;
8035
8036         memset(line, 0, BUF_SIZE);
8037         switch (type) {
8038         case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
8039                 actions_num = *(uint32_t *)(arg);
8040                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,%d,",
8041                                 type, id, actions_num);
8042                 break;
8043         case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
8044                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,",
8045                                 type, id);
8046                 break;
8047         case DR_DUMP_REC_TYPE_PMD_COUNTER:
8048                 count = (struct rte_flow_query_count *)arg;
8049                 fprintf(file, "%d,0x%x,%" PRIu64 ",%" PRIu64 "\n", type,
8050                                 id, count->hits, count->bytes);
8051                 return 0;
8052         default:
8053                 return -1;
8054         }
8055
8056         for (k = 0; k < size; k++) {
8057                 /* Make sure we do not overrun the line buffer length. */
8058                 if (out >= BUF_SIZE - 4) {
8059                         line[out] = '\0';
8060                         break;
8061                 }
8062                 out += snprintf(line + out, BUF_SIZE - out, "%02x",
8063                                 (data[k]) & 0xff);
8064         }
8065         fprintf(file, "%s\n", line);
8066         return 0;
8067 }
8068
8069 int
8070 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
8071         struct rte_flow_query_count *count, struct rte_flow_error *error)
8072 {
8073         struct rte_flow_action action[2];
8074         enum mlx5_flow_drv_type ftype;
8075         const struct mlx5_flow_driver_ops *fops;
8076
8077         if (!flow) {
8078                 return rte_flow_error_set(error, ENOENT,
8079                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8080                                 NULL,
8081                                 "invalid flow handle");
8082         }
8083         action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
8084         action[1].type = RTE_FLOW_ACTION_TYPE_END;
8085         if (flow->counter) {
8086                 memset(count, 0, sizeof(struct rte_flow_query_count));
8087                 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
8088                 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
8089                                                 ftype < MLX5_FLOW_TYPE_MAX);
8090                 fops = flow_get_drv_ops(ftype);
8091                 return fops->query(dev, flow, action, count, error);
8092         }
8093         return -1;
8094 }
8095
8096 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8097 /**
8098  * Dump flow ipool data to file
8099  *
8100  * @param[in] dev
8101  *   The pointer to Ethernet device.
8102  * @param[in] file
8103  *   A pointer to a file for output.
8104  * @param[out] error
8105  *   Perform verbose error reporting if not NULL. PMDs initialize this
8106  *   structure in case of error only.
8107  * @return
8108  *   0 on success, a negative value otherwise.
8109  */
8110 int
8111 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
8112         struct rte_flow *flow, FILE *file,
8113         struct rte_flow_error *error)
8114 {
8115         struct mlx5_priv *priv = dev->data->dev_private;
8116         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8117         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8118         uint32_t handle_idx;
8119         struct mlx5_flow_handle *dh;
8120         struct rte_flow_query_count count;
8121         uint32_t actions_num;
8122         const uint8_t *data;
8123         size_t size;
8124         uint32_t id;
8125         uint32_t type;
8126
8127         if (!flow) {
8128                 return rte_flow_error_set(error, ENOENT,
8129                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8130                         NULL,
8131                         "invalid flow handle");
8132         }
8133         handle_idx = flow->dev_handles;
8134         while (handle_idx) {
8135                 dh = mlx5_ipool_get(priv->sh->ipool
8136                         [MLX5_IPOOL_MLX5_FLOW], handle_idx);
8137                 if (!dh)
8138                         continue;
8139                 handle_idx = dh->next.next;
8140                 id = (uint32_t)(uintptr_t)dh->drv_flow;
8141
8142                 /* query counter */
8143                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8144                 if (!mlx5_flow_query_counter(dev, flow, &count, error))
8145                         save_dump_file(NULL, 0, type,
8146                                         id, (void *)&count, file);
8147
8148                 /* Get modify_hdr and encap_decap buf from ipools. */
8149                 encap_decap = NULL;
8150                 modify_hdr = dh->dvh.modify_hdr;
8151
8152                 if (dh->dvh.rix_encap_decap) {
8153                         encap_decap = mlx5_ipool_get(priv->sh->ipool
8154                                                 [MLX5_IPOOL_DECAP_ENCAP],
8155                                                 dh->dvh.rix_encap_decap);
8156                 }
8157                 if (modify_hdr) {
8158                         data = (const uint8_t *)modify_hdr->actions;
8159                         size = (size_t)(modify_hdr->actions_num) * 8;
8160                         actions_num = modify_hdr->actions_num;
8161                         type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8162                         save_dump_file(data, size, type, id,
8163                                         (void *)(&actions_num), file);
8164                 }
8165                 if (encap_decap) {
8166                         data = encap_decap->buf;
8167                         size = encap_decap->size;
8168                         type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8169                         save_dump_file(data, size, type,
8170                                                 id, NULL, file);
8171                 }
8172         }
8173         return 0;
8174 }
8175 #endif
8176
8177 /**
8178  * Dump flow raw hw data to file
8179  *
8180  * @param[in] dev
8181  *    The pointer to Ethernet device.
8182  * @param[in] file
8183  *   A pointer to a file for output.
8184  * @param[out] error
8185  *   Perform verbose error reporting if not NULL. PMDs initialize this
8186  *   structure in case of error only.
8187  * @return
8188  *   0 on success, a nagative value otherwise.
8189  */
8190 int
8191 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
8192                    FILE *file,
8193                    struct rte_flow_error *error __rte_unused)
8194 {
8195         struct mlx5_priv *priv = dev->data->dev_private;
8196         struct mlx5_dev_ctx_shared *sh = priv->sh;
8197         uint32_t handle_idx;
8198         int ret;
8199         struct mlx5_flow_handle *dh;
8200         struct rte_flow *flow;
8201 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8202         uint32_t idx;
8203 #endif
8204
8205         if (!priv->config.dv_flow_en) {
8206                 if (fputs("device dv flow disabled\n", file) <= 0)
8207                         return -errno;
8208                 return -ENOTSUP;
8209         }
8210
8211         /* dump all */
8212         if (!flow_idx) {
8213 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8214                 MLX5_IPOOL_FOREACH(priv->flows[MLX5_FLOW_TYPE_GEN], idx, flow)
8215                         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8216 #endif
8217                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
8218                                         sh->rx_domain,
8219                                         sh->tx_domain, file);
8220         }
8221         /* dump one */
8222         flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8223                         (uintptr_t)(void *)flow_idx);
8224         if (!flow)
8225                 return -ENOENT;
8226
8227 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8228         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8229 #endif
8230         handle_idx = flow->dev_handles;
8231         while (handle_idx) {
8232                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8233                                 handle_idx);
8234                 if (!dh)
8235                         return -ENOENT;
8236                 if (dh->drv_flow) {
8237                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
8238                                         file);
8239                         if (ret)
8240                                 return -ENOENT;
8241                 }
8242                 handle_idx = dh->next.next;
8243         }
8244         return 0;
8245 }
8246
8247 /**
8248  * Get aged-out flows.
8249  *
8250  * @param[in] dev
8251  *   Pointer to the Ethernet device structure.
8252  * @param[in] context
8253  *   The address of an array of pointers to the aged-out flows contexts.
8254  * @param[in] nb_countexts
8255  *   The length of context array pointers.
8256  * @param[out] error
8257  *   Perform verbose error reporting if not NULL. Initialized in case of
8258  *   error only.
8259  *
8260  * @return
8261  *   how many contexts get in success, otherwise negative errno value.
8262  *   if nb_contexts is 0, return the amount of all aged contexts.
8263  *   if nb_contexts is not 0 , return the amount of aged flows reported
8264  *   in the context array.
8265  */
8266 int
8267 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
8268                         uint32_t nb_contexts, struct rte_flow_error *error)
8269 {
8270         const struct mlx5_flow_driver_ops *fops;
8271         struct rte_flow_attr attr = { .transfer = 0 };
8272
8273         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8274                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8275                 return fops->get_aged_flows(dev, contexts, nb_contexts,
8276                                                     error);
8277         }
8278         DRV_LOG(ERR,
8279                 "port %u get aged flows is not supported.",
8280                  dev->data->port_id);
8281         return -ENOTSUP;
8282 }
8283
8284 /* Wrapper for driver action_validate op callback */
8285 static int
8286 flow_drv_action_validate(struct rte_eth_dev *dev,
8287                          const struct rte_flow_indir_action_conf *conf,
8288                          const struct rte_flow_action *action,
8289                          const struct mlx5_flow_driver_ops *fops,
8290                          struct rte_flow_error *error)
8291 {
8292         static const char err_msg[] = "indirect action validation unsupported";
8293
8294         if (!fops->action_validate) {
8295                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8296                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8297                                    NULL, err_msg);
8298                 return -rte_errno;
8299         }
8300         return fops->action_validate(dev, conf, action, error);
8301 }
8302
8303 /**
8304  * Destroys the shared action by handle.
8305  *
8306  * @param dev
8307  *   Pointer to Ethernet device structure.
8308  * @param[in] handle
8309  *   Handle for the indirect action object to be destroyed.
8310  * @param[out] error
8311  *   Perform verbose error reporting if not NULL. PMDs initialize this
8312  *   structure in case of error only.
8313  *
8314  * @return
8315  *   0 on success, a negative errno value otherwise and rte_errno is set.
8316  *
8317  * @note: wrapper for driver action_create op callback.
8318  */
8319 static int
8320 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
8321                            struct rte_flow_action_handle *handle,
8322                            struct rte_flow_error *error)
8323 {
8324         static const char err_msg[] = "indirect action destruction unsupported";
8325         struct rte_flow_attr attr = { .transfer = 0 };
8326         const struct mlx5_flow_driver_ops *fops =
8327                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8328
8329         if (!fops->action_destroy) {
8330                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8331                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8332                                    NULL, err_msg);
8333                 return -rte_errno;
8334         }
8335         return fops->action_destroy(dev, handle, error);
8336 }
8337
8338 /* Wrapper for driver action_destroy op callback */
8339 static int
8340 flow_drv_action_update(struct rte_eth_dev *dev,
8341                        struct rte_flow_action_handle *handle,
8342                        const void *update,
8343                        const struct mlx5_flow_driver_ops *fops,
8344                        struct rte_flow_error *error)
8345 {
8346         static const char err_msg[] = "indirect action update unsupported";
8347
8348         if (!fops->action_update) {
8349                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8350                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8351                                    NULL, err_msg);
8352                 return -rte_errno;
8353         }
8354         return fops->action_update(dev, handle, update, error);
8355 }
8356
8357 /* Wrapper for driver action_destroy op callback */
8358 static int
8359 flow_drv_action_query(struct rte_eth_dev *dev,
8360                       const struct rte_flow_action_handle *handle,
8361                       void *data,
8362                       const struct mlx5_flow_driver_ops *fops,
8363                       struct rte_flow_error *error)
8364 {
8365         static const char err_msg[] = "indirect action query unsupported";
8366
8367         if (!fops->action_query) {
8368                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8369                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8370                                    NULL, err_msg);
8371                 return -rte_errno;
8372         }
8373         return fops->action_query(dev, handle, data, error);
8374 }
8375
8376 /**
8377  * Create indirect action for reuse in multiple flow rules.
8378  *
8379  * @param dev
8380  *   Pointer to Ethernet device structure.
8381  * @param conf
8382  *   Pointer to indirect action object configuration.
8383  * @param[in] action
8384  *   Action configuration for indirect action object creation.
8385  * @param[out] error
8386  *   Perform verbose error reporting if not NULL. PMDs initialize this
8387  *   structure in case of error only.
8388  * @return
8389  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
8390  */
8391 static struct rte_flow_action_handle *
8392 mlx5_action_handle_create(struct rte_eth_dev *dev,
8393                           const struct rte_flow_indir_action_conf *conf,
8394                           const struct rte_flow_action *action,
8395                           struct rte_flow_error *error)
8396 {
8397         static const char err_msg[] = "indirect action creation unsupported";
8398         struct rte_flow_attr attr = { .transfer = 0 };
8399         const struct mlx5_flow_driver_ops *fops =
8400                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8401
8402         if (flow_drv_action_validate(dev, conf, action, fops, error))
8403                 return NULL;
8404         if (!fops->action_create) {
8405                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8406                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8407                                    NULL, err_msg);
8408                 return NULL;
8409         }
8410         return fops->action_create(dev, conf, action, error);
8411 }
8412
8413 /**
8414  * Updates inplace the indirect action configuration pointed by *handle*
8415  * with the configuration provided as *update* argument.
8416  * The update of the indirect action configuration effects all flow rules
8417  * reusing the action via handle.
8418  *
8419  * @param dev
8420  *   Pointer to Ethernet device structure.
8421  * @param[in] handle
8422  *   Handle for the indirect action to be updated.
8423  * @param[in] update
8424  *   Action specification used to modify the action pointed by handle.
8425  *   *update* could be of same type with the action pointed by the *handle*
8426  *   handle argument, or some other structures like a wrapper, depending on
8427  *   the indirect action type.
8428  * @param[out] error
8429  *   Perform verbose error reporting if not NULL. PMDs initialize this
8430  *   structure in case of error only.
8431  *
8432  * @return
8433  *   0 on success, a negative errno value otherwise and rte_errno is set.
8434  */
8435 static int
8436 mlx5_action_handle_update(struct rte_eth_dev *dev,
8437                 struct rte_flow_action_handle *handle,
8438                 const void *update,
8439                 struct rte_flow_error *error)
8440 {
8441         struct rte_flow_attr attr = { .transfer = 0 };
8442         const struct mlx5_flow_driver_ops *fops =
8443                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8444         int ret;
8445
8446         ret = flow_drv_action_validate(dev, NULL,
8447                         (const struct rte_flow_action *)update, fops, error);
8448         if (ret)
8449                 return ret;
8450         return flow_drv_action_update(dev, handle, update, fops,
8451                                       error);
8452 }
8453
8454 /**
8455  * Query the indirect action by handle.
8456  *
8457  * This function allows retrieving action-specific data such as counters.
8458  * Data is gathered by special action which may be present/referenced in
8459  * more than one flow rule definition.
8460  *
8461  * see @RTE_FLOW_ACTION_TYPE_COUNT
8462  *
8463  * @param dev
8464  *   Pointer to Ethernet device structure.
8465  * @param[in] handle
8466  *   Handle for the indirect action to query.
8467  * @param[in, out] data
8468  *   Pointer to storage for the associated query data type.
8469  * @param[out] error
8470  *   Perform verbose error reporting if not NULL. PMDs initialize this
8471  *   structure in case of error only.
8472  *
8473  * @return
8474  *   0 on success, a negative errno value otherwise and rte_errno is set.
8475  */
8476 static int
8477 mlx5_action_handle_query(struct rte_eth_dev *dev,
8478                          const struct rte_flow_action_handle *handle,
8479                          void *data,
8480                          struct rte_flow_error *error)
8481 {
8482         struct rte_flow_attr attr = { .transfer = 0 };
8483         const struct mlx5_flow_driver_ops *fops =
8484                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8485
8486         return flow_drv_action_query(dev, handle, data, fops, error);
8487 }
8488
8489 /**
8490  * Destroy all indirect actions (shared RSS).
8491  *
8492  * @param dev
8493  *   Pointer to Ethernet device.
8494  *
8495  * @return
8496  *   0 on success, a negative errno value otherwise and rte_errno is set.
8497  */
8498 int
8499 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8500 {
8501         struct rte_flow_error error;
8502         struct mlx5_priv *priv = dev->data->dev_private;
8503         struct mlx5_shared_action_rss *shared_rss;
8504         int ret = 0;
8505         uint32_t idx;
8506
8507         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8508                       priv->rss_shared_actions, idx, shared_rss, next) {
8509                 ret |= mlx5_action_handle_destroy(dev,
8510                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8511         }
8512         return ret;
8513 }
8514
8515 #ifndef HAVE_MLX5DV_DR
8516 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8517 #else
8518 #define MLX5_DOMAIN_SYNC_FLOW \
8519         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8520 #endif
8521
8522 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8523 {
8524         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8525         const struct mlx5_flow_driver_ops *fops;
8526         int ret;
8527         struct rte_flow_attr attr = { .transfer = 0 };
8528
8529         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8530         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8531         if (ret > 0)
8532                 ret = -ret;
8533         return ret;
8534 }
8535
8536 const struct mlx5_flow_tunnel *
8537 mlx5_get_tof(const struct rte_flow_item *item,
8538              const struct rte_flow_action *action,
8539              enum mlx5_tof_rule_type *rule_type)
8540 {
8541         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
8542                 if (item->type == (typeof(item->type))
8543                                   MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
8544                         *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
8545                         return flow_items_to_tunnel(item);
8546                 }
8547         }
8548         for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
8549                 if (action->type == (typeof(action->type))
8550                                     MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
8551                         *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
8552                         return flow_actions_to_tunnel(action);
8553                 }
8554         }
8555         return NULL;
8556 }
8557
8558 /**
8559  * tunnel offload functionalilty is defined for DV environment only
8560  */
8561 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8562 __extension__
8563 union tunnel_offload_mark {
8564         uint32_t val;
8565         struct {
8566                 uint32_t app_reserve:8;
8567                 uint32_t table_id:15;
8568                 uint32_t transfer:1;
8569                 uint32_t _unused_:8;
8570         };
8571 };
8572
8573 static bool
8574 mlx5_access_tunnel_offload_db
8575         (struct rte_eth_dev *dev,
8576          bool (*match)(struct rte_eth_dev *,
8577                        struct mlx5_flow_tunnel *, const void *),
8578          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8579          void (*miss)(struct rte_eth_dev *, void *),
8580          void *ctx, bool lock_op);
8581
8582 static int
8583 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
8584                              struct rte_flow *flow,
8585                              const struct rte_flow_attr *attr,
8586                              const struct rte_flow_action *app_actions,
8587                              uint32_t flow_idx,
8588                              const struct mlx5_flow_tunnel *tunnel,
8589                              struct tunnel_default_miss_ctx *ctx,
8590                              struct rte_flow_error *error)
8591 {
8592         struct mlx5_priv *priv = dev->data->dev_private;
8593         struct mlx5_flow *dev_flow;
8594         struct rte_flow_attr miss_attr = *attr;
8595         const struct rte_flow_item miss_items[2] = {
8596                 {
8597                         .type = RTE_FLOW_ITEM_TYPE_ETH,
8598                         .spec = NULL,
8599                         .last = NULL,
8600                         .mask = NULL
8601                 },
8602                 {
8603                         .type = RTE_FLOW_ITEM_TYPE_END,
8604                         .spec = NULL,
8605                         .last = NULL,
8606                         .mask = NULL
8607                 }
8608         };
8609         union tunnel_offload_mark mark_id;
8610         struct rte_flow_action_mark miss_mark;
8611         struct rte_flow_action miss_actions[3] = {
8612                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
8613                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
8614         };
8615         const struct rte_flow_action_jump *jump_data;
8616         uint32_t i, flow_table = 0; /* prevent compilation warning */
8617         struct flow_grp_info grp_info = {
8618                 .external = 1,
8619                 .transfer = attr->transfer,
8620                 .fdb_def_rule = !!priv->fdb_def_rule,
8621                 .std_tbl_fix = 0,
8622         };
8623         int ret;
8624
8625         if (!attr->transfer) {
8626                 uint32_t q_size;
8627
8628                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
8629                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
8630                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
8631                                          0, SOCKET_ID_ANY);
8632                 if (!ctx->queue)
8633                         return rte_flow_error_set
8634                                 (error, ENOMEM,
8635                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8636                                 NULL, "invalid default miss RSS");
8637                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
8638                 ctx->action_rss.level = 0,
8639                 ctx->action_rss.types = priv->rss_conf.rss_hf,
8640                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
8641                 ctx->action_rss.queue_num = priv->reta_idx_n,
8642                 ctx->action_rss.key = priv->rss_conf.rss_key,
8643                 ctx->action_rss.queue = ctx->queue;
8644                 if (!priv->reta_idx_n || !priv->rxqs_n)
8645                         return rte_flow_error_set
8646                                 (error, EINVAL,
8647                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8648                                 NULL, "invalid port configuration");
8649                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
8650                         ctx->action_rss.types = 0;
8651                 for (i = 0; i != priv->reta_idx_n; ++i)
8652                         ctx->queue[i] = (*priv->reta_idx)[i];
8653         } else {
8654                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
8655                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
8656         }
8657         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
8658         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
8659         jump_data = app_actions->conf;
8660         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
8661         miss_attr.group = jump_data->group;
8662         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
8663                                        &flow_table, &grp_info, error);
8664         if (ret)
8665                 return rte_flow_error_set(error, EINVAL,
8666                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8667                                           NULL, "invalid tunnel id");
8668         mark_id.app_reserve = 0;
8669         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
8670         mark_id.transfer = !!attr->transfer;
8671         mark_id._unused_ = 0;
8672         miss_mark.id = mark_id.val;
8673         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
8674                                     miss_items, miss_actions, flow_idx, error);
8675         if (!dev_flow)
8676                 return -rte_errno;
8677         dev_flow->flow = flow;
8678         dev_flow->external = true;
8679         dev_flow->tunnel = tunnel;
8680         dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
8681         /* Subflow object was created, we must include one in the list. */
8682         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
8683                       dev_flow->handle, next);
8684         DRV_LOG(DEBUG,
8685                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
8686                 dev->data->port_id, tunnel->app_tunnel.type,
8687                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
8688         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
8689                                   miss_actions, error);
8690         if (!ret)
8691                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
8692                                                   error);
8693
8694         return ret;
8695 }
8696
8697 static const struct mlx5_flow_tbl_data_entry  *
8698 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
8699 {
8700         struct mlx5_priv *priv = dev->data->dev_private;
8701         struct mlx5_dev_ctx_shared *sh = priv->sh;
8702         struct mlx5_list_entry *he;
8703         union tunnel_offload_mark mbits = { .val = mark };
8704         union mlx5_flow_tbl_key table_key = {
8705                 {
8706                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
8707                         .id = 0,
8708                         .reserved = 0,
8709                         .dummy = 0,
8710                         .is_fdb = !!mbits.transfer,
8711                         .is_egress = 0,
8712                 }
8713         };
8714         struct mlx5_flow_cb_ctx ctx = {
8715                 .data = &table_key.v64,
8716         };
8717
8718         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
8719         return he ?
8720                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
8721 }
8722
8723 static void
8724 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
8725                                    struct mlx5_list_entry *entry)
8726 {
8727         struct mlx5_dev_ctx_shared *sh = tool_ctx;
8728         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8729
8730         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8731                         tunnel_flow_tbl_to_id(tte->flow_table));
8732         mlx5_free(tte);
8733 }
8734
8735 static int
8736 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
8737                                   struct mlx5_list_entry *entry, void *cb_ctx)
8738 {
8739         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8740         union tunnel_tbl_key tbl = {
8741                 .val = *(uint64_t *)(ctx->data),
8742         };
8743         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8744
8745         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
8746 }
8747
8748 static struct mlx5_list_entry *
8749 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
8750 {
8751         struct mlx5_dev_ctx_shared *sh = tool_ctx;
8752         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8753         struct tunnel_tbl_entry *tte;
8754         union tunnel_tbl_key tbl = {
8755                 .val = *(uint64_t *)(ctx->data),
8756         };
8757
8758         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
8759                           sizeof(*tte), 0,
8760                           SOCKET_ID_ANY);
8761         if (!tte)
8762                 goto err;
8763         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8764                           &tte->flow_table);
8765         if (tte->flow_table >= MLX5_MAX_TABLES) {
8766                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
8767                         tte->flow_table);
8768                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8769                                 tte->flow_table);
8770                 goto err;
8771         } else if (!tte->flow_table) {
8772                 goto err;
8773         }
8774         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
8775         tte->tunnel_id = tbl.tunnel_id;
8776         tte->group = tbl.group;
8777         return &tte->hash;
8778 err:
8779         if (tte)
8780                 mlx5_free(tte);
8781         return NULL;
8782 }
8783
8784 static struct mlx5_list_entry *
8785 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
8786                                   struct mlx5_list_entry *oentry,
8787                                   void *cb_ctx __rte_unused)
8788 {
8789         struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
8790                                                    0, SOCKET_ID_ANY);
8791
8792         if (!tte)
8793                 return NULL;
8794         memcpy(tte, oentry, sizeof(*tte));
8795         return &tte->hash;
8796 }
8797
8798 static void
8799 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
8800                                        struct mlx5_list_entry *entry)
8801 {
8802         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8803
8804         mlx5_free(tte);
8805 }
8806
8807 static uint32_t
8808 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
8809                                 const struct mlx5_flow_tunnel *tunnel,
8810                                 uint32_t group, uint32_t *table,
8811                                 struct rte_flow_error *error)
8812 {
8813         struct mlx5_list_entry *he;
8814         struct tunnel_tbl_entry *tte;
8815         union tunnel_tbl_key key = {
8816                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
8817                 .group = group
8818         };
8819         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8820         struct mlx5_hlist *group_hash;
8821         struct mlx5_flow_cb_ctx ctx = {
8822                 .data = &key.val,
8823         };
8824
8825         group_hash = tunnel ? tunnel->groups : thub->groups;
8826         he = mlx5_hlist_register(group_hash, key.val, &ctx);
8827         if (!he)
8828                 return rte_flow_error_set(error, EINVAL,
8829                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8830                                           NULL,
8831                                           "tunnel group index not supported");
8832         tte = container_of(he, typeof(*tte), hash);
8833         *table = tte->flow_table;
8834         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
8835                 dev->data->port_id, key.tunnel_id, group, *table);
8836         return 0;
8837 }
8838
8839 static void
8840 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
8841                       struct mlx5_flow_tunnel *tunnel)
8842 {
8843         struct mlx5_priv *priv = dev->data->dev_private;
8844         struct mlx5_indexed_pool *ipool;
8845
8846         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
8847                 dev->data->port_id, tunnel->tunnel_id);
8848         LIST_REMOVE(tunnel, chain);
8849         mlx5_hlist_destroy(tunnel->groups);
8850         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8851         mlx5_ipool_free(ipool, tunnel->tunnel_id);
8852 }
8853
8854 static bool
8855 mlx5_access_tunnel_offload_db
8856         (struct rte_eth_dev *dev,
8857          bool (*match)(struct rte_eth_dev *,
8858                        struct mlx5_flow_tunnel *, const void *),
8859          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8860          void (*miss)(struct rte_eth_dev *, void *),
8861          void *ctx, bool lock_op)
8862 {
8863         bool verdict = false;
8864         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8865         struct mlx5_flow_tunnel *tunnel;
8866
8867         rte_spinlock_lock(&thub->sl);
8868         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
8869                 verdict = match(dev, tunnel, (const void *)ctx);
8870                 if (verdict)
8871                         break;
8872         }
8873         if (!lock_op)
8874                 rte_spinlock_unlock(&thub->sl);
8875         if (verdict && hit)
8876                 hit(dev, tunnel, ctx);
8877         if (!verdict && miss)
8878                 miss(dev, ctx);
8879         if (lock_op)
8880                 rte_spinlock_unlock(&thub->sl);
8881
8882         return verdict;
8883 }
8884
8885 struct tunnel_db_find_tunnel_id_ctx {
8886         uint32_t tunnel_id;
8887         struct mlx5_flow_tunnel *tunnel;
8888 };
8889
8890 static bool
8891 find_tunnel_id_match(struct rte_eth_dev *dev,
8892                      struct mlx5_flow_tunnel *tunnel, const void *x)
8893 {
8894         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8895
8896         RTE_SET_USED(dev);
8897         return tunnel->tunnel_id == ctx->tunnel_id;
8898 }
8899
8900 static void
8901 find_tunnel_id_hit(struct rte_eth_dev *dev,
8902                    struct mlx5_flow_tunnel *tunnel, void *x)
8903 {
8904         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8905         RTE_SET_USED(dev);
8906         ctx->tunnel = tunnel;
8907 }
8908
8909 static struct mlx5_flow_tunnel *
8910 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
8911 {
8912         struct tunnel_db_find_tunnel_id_ctx ctx = {
8913                 .tunnel_id = id,
8914         };
8915
8916         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
8917                                       find_tunnel_id_hit, NULL, &ctx, true);
8918
8919         return ctx.tunnel;
8920 }
8921
8922 static struct mlx5_flow_tunnel *
8923 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
8924                           const struct rte_flow_tunnel *app_tunnel)
8925 {
8926         struct mlx5_priv *priv = dev->data->dev_private;
8927         struct mlx5_indexed_pool *ipool;
8928         struct mlx5_flow_tunnel *tunnel;
8929         uint32_t id;
8930
8931         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8932         tunnel = mlx5_ipool_zmalloc(ipool, &id);
8933         if (!tunnel)
8934                 return NULL;
8935         if (id >= MLX5_MAX_TUNNELS) {
8936                 mlx5_ipool_free(ipool, id);
8937                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
8938                 return NULL;
8939         }
8940         tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
8941                                            priv->sh,
8942                                            mlx5_flow_tunnel_grp2tbl_create_cb,
8943                                            mlx5_flow_tunnel_grp2tbl_match_cb,
8944                                            mlx5_flow_tunnel_grp2tbl_remove_cb,
8945                                            mlx5_flow_tunnel_grp2tbl_clone_cb,
8946                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
8947         if (!tunnel->groups) {
8948                 mlx5_ipool_free(ipool, id);
8949                 return NULL;
8950         }
8951         /* initiate new PMD tunnel */
8952         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
8953         tunnel->tunnel_id = id;
8954         tunnel->action.type = (typeof(tunnel->action.type))
8955                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
8956         tunnel->action.conf = tunnel;
8957         tunnel->item.type = (typeof(tunnel->item.type))
8958                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
8959         tunnel->item.spec = tunnel;
8960         tunnel->item.last = NULL;
8961         tunnel->item.mask = NULL;
8962
8963         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
8964                 dev->data->port_id, tunnel->tunnel_id);
8965
8966         return tunnel;
8967 }
8968
8969 struct tunnel_db_get_tunnel_ctx {
8970         const struct rte_flow_tunnel *app_tunnel;
8971         struct mlx5_flow_tunnel *tunnel;
8972 };
8973
8974 static bool get_tunnel_match(struct rte_eth_dev *dev,
8975                              struct mlx5_flow_tunnel *tunnel, const void *x)
8976 {
8977         const struct tunnel_db_get_tunnel_ctx *ctx = x;
8978
8979         RTE_SET_USED(dev);
8980         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
8981                        sizeof(*ctx->app_tunnel));
8982 }
8983
8984 static void get_tunnel_hit(struct rte_eth_dev *dev,
8985                            struct mlx5_flow_tunnel *tunnel, void *x)
8986 {
8987         /* called under tunnel spinlock protection */
8988         struct tunnel_db_get_tunnel_ctx *ctx = x;
8989
8990         RTE_SET_USED(dev);
8991         tunnel->refctn++;
8992         ctx->tunnel = tunnel;
8993 }
8994
8995 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
8996 {
8997         /* called under tunnel spinlock protection */
8998         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8999         struct tunnel_db_get_tunnel_ctx *ctx = x;
9000
9001         rte_spinlock_unlock(&thub->sl);
9002         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
9003         rte_spinlock_lock(&thub->sl);
9004         if (ctx->tunnel) {
9005                 ctx->tunnel->refctn = 1;
9006                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
9007         }
9008 }
9009
9010
9011 static int
9012 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
9013                      const struct rte_flow_tunnel *app_tunnel,
9014                      struct mlx5_flow_tunnel **tunnel)
9015 {
9016         struct tunnel_db_get_tunnel_ctx ctx = {
9017                 .app_tunnel = app_tunnel,
9018         };
9019
9020         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
9021                                       get_tunnel_miss, &ctx, true);
9022         *tunnel = ctx.tunnel;
9023         return ctx.tunnel ? 0 : -ENOMEM;
9024 }
9025
9026 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
9027 {
9028         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
9029
9030         if (!thub)
9031                 return;
9032         if (!LIST_EMPTY(&thub->tunnels))
9033                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
9034         mlx5_hlist_destroy(thub->groups);
9035         mlx5_free(thub);
9036 }
9037
9038 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
9039 {
9040         int err;
9041         struct mlx5_flow_tunnel_hub *thub;
9042
9043         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
9044                            0, SOCKET_ID_ANY);
9045         if (!thub)
9046                 return -ENOMEM;
9047         LIST_INIT(&thub->tunnels);
9048         rte_spinlock_init(&thub->sl);
9049         thub->groups = mlx5_hlist_create("flow groups", 64,
9050                                          false, true, sh,
9051                                          mlx5_flow_tunnel_grp2tbl_create_cb,
9052                                          mlx5_flow_tunnel_grp2tbl_match_cb,
9053                                          mlx5_flow_tunnel_grp2tbl_remove_cb,
9054                                          mlx5_flow_tunnel_grp2tbl_clone_cb,
9055                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9056         if (!thub->groups) {
9057                 err = -rte_errno;
9058                 goto err;
9059         }
9060         sh->tunnel_hub = thub;
9061
9062         return 0;
9063
9064 err:
9065         if (thub->groups)
9066                 mlx5_hlist_destroy(thub->groups);
9067         if (thub)
9068                 mlx5_free(thub);
9069         return err;
9070 }
9071
9072 static inline bool
9073 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
9074                           struct rte_flow_tunnel *tunnel,
9075                           const char *err_msg)
9076 {
9077         err_msg = NULL;
9078         if (!is_tunnel_offload_active(dev)) {
9079                 err_msg = "tunnel offload was not activated";
9080                 goto out;
9081         } else if (!tunnel) {
9082                 err_msg = "no application tunnel";
9083                 goto out;
9084         }
9085
9086         switch (tunnel->type) {
9087         default:
9088                 err_msg = "unsupported tunnel type";
9089                 goto out;
9090         case RTE_FLOW_ITEM_TYPE_VXLAN:
9091                 break;
9092         }
9093
9094 out:
9095         return !err_msg;
9096 }
9097
9098 static int
9099 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
9100                     struct rte_flow_tunnel *app_tunnel,
9101                     struct rte_flow_action **actions,
9102                     uint32_t *num_of_actions,
9103                     struct rte_flow_error *error)
9104 {
9105         int ret;
9106         struct mlx5_flow_tunnel *tunnel;
9107         const char *err_msg = NULL;
9108         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9109
9110         if (!verdict)
9111                 return rte_flow_error_set(error, EINVAL,
9112                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9113                                           err_msg);
9114         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9115         if (ret < 0) {
9116                 return rte_flow_error_set(error, ret,
9117                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9118                                           "failed to initialize pmd tunnel");
9119         }
9120         *actions = &tunnel->action;
9121         *num_of_actions = 1;
9122         return 0;
9123 }
9124
9125 static int
9126 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
9127                        struct rte_flow_tunnel *app_tunnel,
9128                        struct rte_flow_item **items,
9129                        uint32_t *num_of_items,
9130                        struct rte_flow_error *error)
9131 {
9132         int ret;
9133         struct mlx5_flow_tunnel *tunnel;
9134         const char *err_msg = NULL;
9135         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9136
9137         if (!verdict)
9138                 return rte_flow_error_set(error, EINVAL,
9139                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9140                                           err_msg);
9141         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9142         if (ret < 0) {
9143                 return rte_flow_error_set(error, ret,
9144                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9145                                           "failed to initialize pmd tunnel");
9146         }
9147         *items = &tunnel->item;
9148         *num_of_items = 1;
9149         return 0;
9150 }
9151
9152 struct tunnel_db_element_release_ctx {
9153         struct rte_flow_item *items;
9154         struct rte_flow_action *actions;
9155         uint32_t num_elements;
9156         struct rte_flow_error *error;
9157         int ret;
9158 };
9159
9160 static bool
9161 tunnel_element_release_match(struct rte_eth_dev *dev,
9162                              struct mlx5_flow_tunnel *tunnel, const void *x)
9163 {
9164         const struct tunnel_db_element_release_ctx *ctx = x;
9165
9166         RTE_SET_USED(dev);
9167         if (ctx->num_elements != 1)
9168                 return false;
9169         else if (ctx->items)
9170                 return ctx->items == &tunnel->item;
9171         else if (ctx->actions)
9172                 return ctx->actions == &tunnel->action;
9173
9174         return false;
9175 }
9176
9177 static void
9178 tunnel_element_release_hit(struct rte_eth_dev *dev,
9179                            struct mlx5_flow_tunnel *tunnel, void *x)
9180 {
9181         struct tunnel_db_element_release_ctx *ctx = x;
9182         ctx->ret = 0;
9183         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
9184                 mlx5_flow_tunnel_free(dev, tunnel);
9185 }
9186
9187 static void
9188 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
9189 {
9190         struct tunnel_db_element_release_ctx *ctx = x;
9191         RTE_SET_USED(dev);
9192         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
9193                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9194                                       "invalid argument");
9195 }
9196
9197 static int
9198 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
9199                        struct rte_flow_item *pmd_items,
9200                        uint32_t num_items, struct rte_flow_error *err)
9201 {
9202         struct tunnel_db_element_release_ctx ctx = {
9203                 .items = pmd_items,
9204                 .actions = NULL,
9205                 .num_elements = num_items,
9206                 .error = err,
9207         };
9208
9209         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9210                                       tunnel_element_release_hit,
9211                                       tunnel_element_release_miss, &ctx, false);
9212
9213         return ctx.ret;
9214 }
9215
9216 static int
9217 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
9218                          struct rte_flow_action *pmd_actions,
9219                          uint32_t num_actions, struct rte_flow_error *err)
9220 {
9221         struct tunnel_db_element_release_ctx ctx = {
9222                 .items = NULL,
9223                 .actions = pmd_actions,
9224                 .num_elements = num_actions,
9225                 .error = err,
9226         };
9227
9228         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9229                                       tunnel_element_release_hit,
9230                                       tunnel_element_release_miss, &ctx, false);
9231
9232         return ctx.ret;
9233 }
9234
9235 static int
9236 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
9237                                   struct rte_mbuf *m,
9238                                   struct rte_flow_restore_info *info,
9239                                   struct rte_flow_error *err)
9240 {
9241         uint64_t ol_flags = m->ol_flags;
9242         const struct mlx5_flow_tbl_data_entry *tble;
9243         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
9244
9245         if (!is_tunnel_offload_active(dev)) {
9246                 info->flags = 0;
9247                 return 0;
9248         }
9249
9250         if ((ol_flags & mask) != mask)
9251                 goto err;
9252         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
9253         if (!tble) {
9254                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
9255                         dev->data->port_id, m->hash.fdir.hi);
9256                 goto err;
9257         }
9258         MLX5_ASSERT(tble->tunnel);
9259         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
9260         info->group_id = tble->group_id;
9261         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
9262                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
9263                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
9264
9265         return 0;
9266
9267 err:
9268         return rte_flow_error_set(err, EINVAL,
9269                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9270                                   "failed to get restore info");
9271 }
9272
9273 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
9274 static int
9275 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
9276                            __rte_unused struct rte_flow_tunnel *app_tunnel,
9277                            __rte_unused struct rte_flow_action **actions,
9278                            __rte_unused uint32_t *num_of_actions,
9279                            __rte_unused struct rte_flow_error *error)
9280 {
9281         return -ENOTSUP;
9282 }
9283
9284 static int
9285 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
9286                        __rte_unused struct rte_flow_tunnel *app_tunnel,
9287                        __rte_unused struct rte_flow_item **items,
9288                        __rte_unused uint32_t *num_of_items,
9289                        __rte_unused struct rte_flow_error *error)
9290 {
9291         return -ENOTSUP;
9292 }
9293
9294 static int
9295 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
9296                               __rte_unused struct rte_flow_item *pmd_items,
9297                               __rte_unused uint32_t num_items,
9298                               __rte_unused struct rte_flow_error *err)
9299 {
9300         return -ENOTSUP;
9301 }
9302
9303 static int
9304 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
9305                                 __rte_unused struct rte_flow_action *pmd_action,
9306                                 __rte_unused uint32_t num_actions,
9307                                 __rte_unused struct rte_flow_error *err)
9308 {
9309         return -ENOTSUP;
9310 }
9311
9312 static int
9313 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
9314                                   __rte_unused struct rte_mbuf *m,
9315                                   __rte_unused struct rte_flow_restore_info *i,
9316                                   __rte_unused struct rte_flow_error *err)
9317 {
9318         return -ENOTSUP;
9319 }
9320
9321 static int
9322 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
9323                              __rte_unused struct rte_flow *flow,
9324                              __rte_unused const struct rte_flow_attr *attr,
9325                              __rte_unused const struct rte_flow_action *actions,
9326                              __rte_unused uint32_t flow_idx,
9327                              __rte_unused const struct mlx5_flow_tunnel *tunnel,
9328                              __rte_unused struct tunnel_default_miss_ctx *ctx,
9329                              __rte_unused struct rte_flow_error *error)
9330 {
9331         return -ENOTSUP;
9332 }
9333
9334 static struct mlx5_flow_tunnel *
9335 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
9336                     __rte_unused uint32_t id)
9337 {
9338         return NULL;
9339 }
9340
9341 static void
9342 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
9343                       __rte_unused struct mlx5_flow_tunnel *tunnel)
9344 {
9345 }
9346
9347 static uint32_t
9348 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
9349                                 __rte_unused const struct mlx5_flow_tunnel *t,
9350                                 __rte_unused uint32_t group,
9351                                 __rte_unused uint32_t *table,
9352                                 struct rte_flow_error *error)
9353 {
9354         return rte_flow_error_set(error, ENOTSUP,
9355                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9356                                   "tunnel offload requires DV support");
9357 }
9358
9359 void
9360 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
9361                         __rte_unused  uint16_t port_id)
9362 {
9363 }
9364 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
9365
9366 static void
9367 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
9368 {
9369         int ret;
9370         struct rte_flow_error error;
9371
9372         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9373                 char *item_name;
9374                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
9375                                     sizeof(item_name),
9376                                     (void *)(uintptr_t)item->type, &error);
9377                 if (ret > 0)
9378                         printf("%s ", item_name);
9379                 else
9380                         printf("%d\n", (int)item->type);
9381         }
9382         printf("END\n");
9383 }