drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11 #include <stdbool.h>
  12
  13 /* Verbs header. */
  14 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  15 #ifdef PEDANTIC
  16 #pragma GCC diagnostic ignored "-Wpedantic"
  17 #endif
  18 #include <infiniband/verbs.h>
  19 #ifdef PEDANTIC
  20 #pragma GCC diagnostic error "-Wpedantic"
  21 #endif
  22
  23 #include <rte_common.h>
  24 #include <rte_ether.h>
  25 #include <rte_ethdev_driver.h>
  26 #include <rte_flow.h>
  27 #include <rte_flow_driver.h>
  28 #include <rte_malloc.h>
  29 #include <rte_ip.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_prm.h>
  34
  35 #include "mlx5_defs.h"
  36 #include "mlx5.h"
  37 #include "mlx5_flow.h"
  38 #include "mlx5_rxtx.h"
  39
  40 /* Dev ops structure defined in mlx5.c */
  41 extern const struct eth_dev_ops mlx5_dev_ops;
  42 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
  43
  44 /** Device flow drivers. */
  45 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  46 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
  47 #endif
  48 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  49
  50 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  51
  52 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  53         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  54 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  55         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  56 #endif
  57         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  58         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  59 };
  60
  61 enum mlx5_expansion {
  62         MLX5_EXPANSION_ROOT,
  63         MLX5_EXPANSION_ROOT_OUTER,
  64         MLX5_EXPANSION_ROOT_ETH_VLAN,
  65         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
  66         MLX5_EXPANSION_OUTER_ETH,
  67         MLX5_EXPANSION_OUTER_ETH_VLAN,
  68         MLX5_EXPANSION_OUTER_VLAN,
  69         MLX5_EXPANSION_OUTER_IPV4,
  70         MLX5_EXPANSION_OUTER_IPV4_UDP,
  71         MLX5_EXPANSION_OUTER_IPV4_TCP,
  72         MLX5_EXPANSION_OUTER_IPV6,
  73         MLX5_EXPANSION_OUTER_IPV6_UDP,
  74         MLX5_EXPANSION_OUTER_IPV6_TCP,
  75         MLX5_EXPANSION_VXLAN,
  76         MLX5_EXPANSION_VXLAN_GPE,
  77         MLX5_EXPANSION_GRE,
  78         MLX5_EXPANSION_MPLS,
  79         MLX5_EXPANSION_ETH,
  80         MLX5_EXPANSION_ETH_VLAN,
  81         MLX5_EXPANSION_VLAN,
  82         MLX5_EXPANSION_IPV4,
  83         MLX5_EXPANSION_IPV4_UDP,
  84         MLX5_EXPANSION_IPV4_TCP,
  85         MLX5_EXPANSION_IPV6,
  86         MLX5_EXPANSION_IPV6_UDP,
  87         MLX5_EXPANSION_IPV6_TCP,
  88 };
  89
  90 /** Supported expansion of items. */
  91 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
  92         [MLX5_EXPANSION_ROOT] = {
  93                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
  94                                                  MLX5_EXPANSION_IPV4,
  95                                                  MLX5_EXPANSION_IPV6),
  96                 .type = RTE_FLOW_ITEM_TYPE_END,
  97         },
  98         [MLX5_EXPANSION_ROOT_OUTER] = {
  99                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 100                                                  MLX5_EXPANSION_OUTER_IPV4,
 101                                                  MLX5_EXPANSION_OUTER_IPV6),
 102                 .type = RTE_FLOW_ITEM_TYPE_END,
 103         },
 104         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 105                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 106                 .type = RTE_FLOW_ITEM_TYPE_END,
 107         },
 108         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 109                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
 110                 .type = RTE_FLOW_ITEM_TYPE_END,
 111         },
 112         [MLX5_EXPANSION_OUTER_ETH] = {
 113                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 114                                                  MLX5_EXPANSION_OUTER_IPV6,
 115                                                  MLX5_EXPANSION_MPLS),
 116                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 117                 .rss_types = 0,
 118         },
 119         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 120                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 121                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 122                 .rss_types = 0,
 123         },
 124         [MLX5_EXPANSION_OUTER_VLAN] = {
 125                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 126                                                  MLX5_EXPANSION_OUTER_IPV6),
 127                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 128         },
 129         [MLX5_EXPANSION_OUTER_IPV4] = {
 130                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 131                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 132                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 133                          MLX5_EXPANSION_GRE,
 134                          MLX5_EXPANSION_IPV4,
 135                          MLX5_EXPANSION_IPV6),
 136                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 137                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 138                         ETH_RSS_NONFRAG_IPV4_OTHER,
 139         },
 140         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 141                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 142                                                  MLX5_EXPANSION_VXLAN_GPE),
 143                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 144                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 145         },
 146         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 147                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 148                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 149         },
 150         [MLX5_EXPANSION_OUTER_IPV6] = {
 151                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 152                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 153                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 154                          MLX5_EXPANSION_IPV4,
 155                          MLX5_EXPANSION_IPV6),
 156                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 157                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 158                         ETH_RSS_NONFRAG_IPV6_OTHER,
 159         },
 160         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 161                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 162                                                  MLX5_EXPANSION_VXLAN_GPE),
 163                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 164                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 165         },
 166         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 167                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 168                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 169         },
 170         [MLX5_EXPANSION_VXLAN] = {
 171                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 172                                                  MLX5_EXPANSION_IPV4,
 173                                                  MLX5_EXPANSION_IPV6),
 174                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 175         },
 176         [MLX5_EXPANSION_VXLAN_GPE] = {
 177                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 178                                                  MLX5_EXPANSION_IPV4,
 179                                                  MLX5_EXPANSION_IPV6),
 180                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 181         },
 182         [MLX5_EXPANSION_GRE] = {
 183                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 184                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 185         },
 186         [MLX5_EXPANSION_MPLS] = {
 187                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 188                                                  MLX5_EXPANSION_IPV6),
 189                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 190         },
 191         [MLX5_EXPANSION_ETH] = {
 192                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 193                                                  MLX5_EXPANSION_IPV6),
 194                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 195         },
 196         [MLX5_EXPANSION_ETH_VLAN] = {
 197                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 198                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 199         },
 200         [MLX5_EXPANSION_VLAN] = {
 201                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 202                                                  MLX5_EXPANSION_IPV6),
 203                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 204         },
 205         [MLX5_EXPANSION_IPV4] = {
 206                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 207                                                  MLX5_EXPANSION_IPV4_TCP),
 208                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 209                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 210                         ETH_RSS_NONFRAG_IPV4_OTHER,
 211         },
 212         [MLX5_EXPANSION_IPV4_UDP] = {
 213                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 214                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 215         },
 216         [MLX5_EXPANSION_IPV4_TCP] = {
 217                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 218                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 219         },
 220         [MLX5_EXPANSION_IPV6] = {
 221                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 222                                                  MLX5_EXPANSION_IPV6_TCP),
 223                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 224                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 225                         ETH_RSS_NONFRAG_IPV6_OTHER,
 226         },
 227         [MLX5_EXPANSION_IPV6_UDP] = {
 228                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 229                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 230         },
 231         [MLX5_EXPANSION_IPV6_TCP] = {
 232                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 233                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 234         },
 235 };
 236
 237 static const struct rte_flow_ops mlx5_flow_ops = {
 238         .validate = mlx5_flow_validate,
 239         .create = mlx5_flow_create,
 240         .destroy = mlx5_flow_destroy,
 241         .flush = mlx5_flow_flush,
 242         .isolate = mlx5_flow_isolate,
 243         .query = mlx5_flow_query,
 244         .dev_dump = mlx5_flow_dev_dump,
 245 };
 246
 247 /* Convert FDIR request to Generic flow. */
 248 struct mlx5_fdir {
 249         struct rte_flow_attr attr;
 250         struct rte_flow_item items[4];
 251         struct rte_flow_item_eth l2;
 252         struct rte_flow_item_eth l2_mask;
 253         union {
 254                 struct rte_flow_item_ipv4 ipv4;
 255                 struct rte_flow_item_ipv6 ipv6;
 256         } l3;
 257         union {
 258                 struct rte_flow_item_ipv4 ipv4;
 259                 struct rte_flow_item_ipv6 ipv6;
 260         } l3_mask;
 261         union {
 262                 struct rte_flow_item_udp udp;
 263                 struct rte_flow_item_tcp tcp;
 264         } l4;
 265         union {
 266                 struct rte_flow_item_udp udp;
 267                 struct rte_flow_item_tcp tcp;
 268         } l4_mask;
 269         struct rte_flow_action actions[2];
 270         struct rte_flow_action_queue queue;
 271 };
 272
 273 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
 274 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
 275         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
 276 };
 277
 278 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
 279 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
 280         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
 281         { 9, 10, 11 }, { 12, 13, 14 },
 282 };
 283
 284 /* Tunnel information. */
 285 struct mlx5_flow_tunnel_info {
 286         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 287         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 288 };
 289
 290 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 291         {
 292                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 293                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 294         },
 295         {
 296                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 297                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 298         },
 299         {
 300                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 301                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 302         },
 303         {
 304                 .tunnel = MLX5_FLOW_LAYER_GRE,
 305                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 306         },
 307         {
 308                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 309                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 310         },
 311         {
 312                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 313                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 314         },
 315         {
 316                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 317                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 318         },
 319         {
 320                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 321                 .ptype = RTE_PTYPE_TUNNEL_IP,
 322         },
 323         {
 324                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 325                 .ptype = RTE_PTYPE_TUNNEL_IP,
 326         },
 327         {
 328                 .tunnel = MLX5_FLOW_LAYER_GTP,
 329                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 330         },
 331 };
 332
 333 /**
 334  * Translate tag ID to register.
 335  *
 336  * @param[in] dev
 337  *   Pointer to the Ethernet device structure.
 338  * @param[in] feature
 339  *   The feature that request the register.
 340  * @param[in] id
 341  *   The request register ID.
 342  * @param[out] error
 343  *   Error description in case of any.
 344  *
 345  * @return
 346  *   The request register on success, a negative errno
 347  *   value otherwise and rte_errno is set.
 348  */
 349 int
 350 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 351                      enum mlx5_feature_name feature,
 352                      uint32_t id,
 353                      struct rte_flow_error *error)
 354 {
 355         struct mlx5_priv *priv = dev->data->dev_private;
 356         struct mlx5_dev_config *config = &priv->config;
 357         enum modify_reg start_reg;
 358         bool skip_mtr_reg = false;
 359
 360         switch (feature) {
 361         case MLX5_HAIRPIN_RX:
 362                 return REG_B;
 363         case MLX5_HAIRPIN_TX:
 364                 return REG_A;
 365         case MLX5_METADATA_RX:
 366                 switch (config->dv_xmeta_en) {
 367                 case MLX5_XMETA_MODE_LEGACY:
 368                         return REG_B;
 369                 case MLX5_XMETA_MODE_META16:
 370                         return REG_C_0;
 371                 case MLX5_XMETA_MODE_META32:
 372                         return REG_C_1;
 373                 }
 374                 break;
 375         case MLX5_METADATA_TX:
 376                 return REG_A;
 377         case MLX5_METADATA_FDB:
 378                 switch (config->dv_xmeta_en) {
 379                 case MLX5_XMETA_MODE_LEGACY:
 380                         return REG_NONE;
 381                 case MLX5_XMETA_MODE_META16:
 382                         return REG_C_0;
 383                 case MLX5_XMETA_MODE_META32:
 384                         return REG_C_1;
 385                 }
 386                 break;
 387         case MLX5_FLOW_MARK:
 388                 switch (config->dv_xmeta_en) {
 389                 case MLX5_XMETA_MODE_LEGACY:
 390                         return REG_NONE;
 391                 case MLX5_XMETA_MODE_META16:
 392                         return REG_C_1;
 393                 case MLX5_XMETA_MODE_META32:
 394                         return REG_C_0;
 395                 }
 396                 break;
 397         case MLX5_MTR_SFX:
 398                 /*
 399                  * If meter color and flow match share one register, flow match
 400                  * should use the meter color register for match.
 401                  */
 402                 if (priv->mtr_reg_share)
 403                         return priv->mtr_color_reg;
 404                 else
 405                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 406                                REG_C_3;
 407         case MLX5_MTR_COLOR:
 408                 MLX5_ASSERT(priv->mtr_color_reg != REG_NONE);
 409                 return priv->mtr_color_reg;
 410         case MLX5_COPY_MARK:
 411                 /*
 412                  * Metadata COPY_MARK register using is in meter suffix sub
 413                  * flow while with meter. It's safe to share the same register.
 414                  */
 415                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 416         case MLX5_APP_TAG:
 417                 /*
 418                  * If meter is enable, it will engage the register for color
 419                  * match and flow match. If meter color match is not using the
 420                  * REG_C_2, need to skip the REG_C_x be used by meter color
 421                  * match.
 422                  * If meter is disable, free to use all available registers.
 423                  */
 424                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 425                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 426                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 427                 if (id > (REG_C_7 - start_reg))
 428                         return rte_flow_error_set(error, EINVAL,
 429                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 430                                                   NULL, "invalid tag id");
 431                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NONE)
 432                         return rte_flow_error_set(error, ENOTSUP,
 433                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 434                                                   NULL, "unsupported tag id");
 435                 /*
 436                  * This case means meter is using the REG_C_x great than 2.
 437                  * Take care not to conflict with meter color REG_C_x.
 438                  * If the available index REG_C_y >= REG_C_x, skip the
 439                  * color register.
 440                  */
 441                 if (skip_mtr_reg && config->flow_mreg_c
 442                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 443                         if (config->flow_mreg_c
 444                             [id + 1 + start_reg - REG_C_0] != REG_NONE)
 445                                 return config->flow_mreg_c
 446                                                [id + 1 + start_reg - REG_C_0];
 447                         return rte_flow_error_set(error, ENOTSUP,
 448                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 449                                                   NULL, "unsupported tag id");
 450                 }
 451                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 452         }
 453         MLX5_ASSERT(false);
 454         return rte_flow_error_set(error, EINVAL,
 455                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 456                                   NULL, "invalid feature name");
 457 }
 458
 459 /**
 460  * Check extensive flow metadata register support.
 461  *
 462  * @param dev
 463  *   Pointer to rte_eth_dev structure.
 464  *
 465  * @return
 466  *   True if device supports extensive flow metadata register, otherwise false.
 467  */
 468 bool
 469 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 470 {
 471         struct mlx5_priv *priv = dev->data->dev_private;
 472         struct mlx5_dev_config *config = &priv->config;
 473
 474         /*
 475          * Having available reg_c can be regarded inclusively as supporting
 476          * extensive flow metadata register, which could mean,
 477          * - metadata register copy action by modify header.
 478          * - 16 modify header actions is supported.
 479          * - reg_c's are preserved across different domain (FDB and NIC) on
 480          *   packet loopback by flow lookup miss.
 481          */
 482         return config->flow_mreg_c[2] != REG_NONE;
 483 }
 484
 485 /**
 486  * Discover the maximum number of priority available.
 487  *
 488  * @param[in] dev
 489  *   Pointer to the Ethernet device structure.
 490  *
 491  * @return
 492  *   number of supported flow priority on success, a negative errno
 493  *   value otherwise and rte_errno is set.
 494  */
 495 int
 496 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 497 {
 498         struct mlx5_priv *priv = dev->data->dev_private;
 499         struct {
 500                 struct ibv_flow_attr attr;
 501                 struct ibv_flow_spec_eth eth;
 502                 struct ibv_flow_spec_action_drop drop;
 503         } flow_attr = {
 504                 .attr = {
 505                         .num_of_specs = 2,
 506                         .port = (uint8_t)priv->ibv_port,
 507                 },
 508                 .eth = {
 509                         .type = IBV_FLOW_SPEC_ETH,
 510                         .size = sizeof(struct ibv_flow_spec_eth),
 511                 },
 512                 .drop = {
 513                         .size = sizeof(struct ibv_flow_spec_action_drop),
 514                         .type = IBV_FLOW_SPEC_ACTION_DROP,
 515                 },
 516         };
 517         struct ibv_flow *flow;
 518         struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
 519         uint16_t vprio[] = { 8, 16 };
 520         int i;
 521         int priority = 0;
 522
 523         if (!drop) {
 524                 rte_errno = ENOTSUP;
 525                 return -rte_errno;
 526         }
 527         for (i = 0; i != RTE_DIM(vprio); i++) {
 528                 flow_attr.attr.priority = vprio[i] - 1;
 529                 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
 530                 if (!flow)
 531                         break;
 532                 claim_zero(mlx5_glue->destroy_flow(flow));
 533                 priority = vprio[i];
 534         }
 535         mlx5_hrxq_drop_release(dev);
 536         switch (priority) {
 537         case 8:
 538                 priority = RTE_DIM(priority_map_3);
 539                 break;
 540         case 16:
 541                 priority = RTE_DIM(priority_map_5);
 542                 break;
 543         default:
 544                 rte_errno = ENOTSUP;
 545                 DRV_LOG(ERR,
 546                         "port %u verbs maximum priority: %d expected 8/16",
 547                         dev->data->port_id, priority);
 548                 return -rte_errno;
 549         }
 550         DRV_LOG(INFO, "port %u flow maximum priority: %d",
 551                 dev->data->port_id, priority);
 552         return priority;
 553 }
 554
 555 /**
 556  * Adjust flow priority based on the highest layer and the request priority.
 557  *
 558  * @param[in] dev
 559  *   Pointer to the Ethernet device structure.
 560  * @param[in] priority
 561  *   The rule base priority.
 562  * @param[in] subpriority
 563  *   The priority based on the items.
 564  *
 565  * @return
 566  *   The new priority.
 567  */
 568 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 569                                    uint32_t subpriority)
 570 {
 571         uint32_t res = 0;
 572         struct mlx5_priv *priv = dev->data->dev_private;
 573
 574         switch (priv->config.flow_prio) {
 575         case RTE_DIM(priority_map_3):
 576                 res = priority_map_3[priority][subpriority];
 577                 break;
 578         case RTE_DIM(priority_map_5):
 579                 res = priority_map_5[priority][subpriority];
 580                 break;
 581         }
 582         return  res;
 583 }
 584
 585 /**
 586  * Verify the @p item specifications (spec, last, mask) are compatible with the
 587  * NIC capabilities.
 588  *
 589  * @param[in] item
 590  *   Item specification.
 591  * @param[in] mask
 592  *   @p item->mask or flow default bit-masks.
 593  * @param[in] nic_mask
 594  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 595  * @param[in] size
 596  *   Bit-masks size in bytes.
 597  * @param[out] error
 598  *   Pointer to error structure.
 599  *
 600  * @return
 601  *   0 on success, a negative errno value otherwise and rte_errno is set.
 602  */
 603 int
 604 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 605                           const uint8_t *mask,
 606                           const uint8_t *nic_mask,
 607                           unsigned int size,
 608                           struct rte_flow_error *error)
 609 {
 610         unsigned int i;
 611
 612         MLX5_ASSERT(nic_mask);
 613         for (i = 0; i < size; ++i)
 614                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 615                         return rte_flow_error_set(error, ENOTSUP,
 616                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 617                                                   item,
 618                                                   "mask enables non supported"
 619                                                   " bits");
 620         if (!item->spec && (item->mask || item->last))
 621                 return rte_flow_error_set(error, EINVAL,
 622                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 623                                           "mask/last without a spec is not"
 624                                           " supported");
 625         if (item->spec && item->last) {
 626                 uint8_t spec[size];
 627                 uint8_t last[size];
 628                 unsigned int i;
 629                 int ret;
 630
 631                 for (i = 0; i < size; ++i) {
 632                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 633                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 634                 }
 635                 ret = memcmp(spec, last, size);
 636                 if (ret != 0)
 637                         return rte_flow_error_set(error, EINVAL,
 638                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 639                                                   item,
 640                                                   "range is not valid");
 641         }
 642         return 0;
 643 }
 644
 645 /**
 646  * Adjust the hash fields according to the @p flow information.
 647  *
 648  * @param[in] dev_flow.
 649  *   Pointer to the mlx5_flow.
 650  * @param[in] tunnel
 651  *   1 when the hash field is for a tunnel item.
 652  * @param[in] layer_types
 653  *   ETH_RSS_* types.
 654  * @param[in] hash_fields
 655  *   Item hash fields.
 656  *
 657  * @return
 658  *   The hash fields that should be used.
 659  */
 660 uint64_t
 661 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
 662                             int tunnel __rte_unused, uint64_t layer_types,
 663                             uint64_t hash_fields)
 664 {
 665         struct rte_flow *flow = dev_flow->flow;
 666 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 667         int rss_request_inner = flow->rss.level >= 2;
 668
 669         /* Check RSS hash level for tunnel. */
 670         if (tunnel && rss_request_inner)
 671                 hash_fields |= IBV_RX_HASH_INNER;
 672         else if (tunnel || rss_request_inner)
 673                 return 0;
 674 #endif
 675         /* Check if requested layer matches RSS hash fields. */
 676         if (!(flow->rss.types & layer_types))
 677                 return 0;
 678         return hash_fields;
 679 }
 680
 681 /**
 682  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 683  * if several tunnel rules are used on this queue, the tunnel ptype will be
 684  * cleared.
 685  *
 686  * @param rxq_ctrl
 687  *   Rx queue to update.
 688  */
 689 static void
 690 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 691 {
 692         unsigned int i;
 693         uint32_t tunnel_ptype = 0;
 694
 695         /* Look up for the ptype to use. */
 696         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 697                 if (!rxq_ctrl->flow_tunnels_n[i])
 698                         continue;
 699                 if (!tunnel_ptype) {
 700                         tunnel_ptype = tunnels_info[i].ptype;
 701                 } else {
 702                         tunnel_ptype = 0;
 703                         break;
 704                 }
 705         }
 706         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 707 }
 708
 709 /**
 710  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 711  * flow.
 712  *
 713  * @param[in] dev
 714  *   Pointer to the Ethernet device structure.
 715  * @param[in] flow
 716  *   Pointer to flow structure.
 717  * @param[in] dev_handle
 718  *   Pointer to device flow handle structure.
 719  */
 720 static void
 721 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow,
 722                        struct mlx5_flow_handle *dev_handle)
 723 {
 724         struct mlx5_priv *priv = dev->data->dev_private;
 725         const int mark = dev_handle->mark;
 726         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
 727         unsigned int i;
 728
 729         for (i = 0; i != flow->rss.queue_num; ++i) {
 730                 int idx = (*flow->rss.queue)[i];
 731                 struct mlx5_rxq_ctrl *rxq_ctrl =
 732                         container_of((*priv->rxqs)[idx],
 733                                      struct mlx5_rxq_ctrl, rxq);
 734
 735                 /*
 736                  * To support metadata register copy on Tx loopback,
 737                  * this must be always enabled (metadata may arive
 738                  * from other port - not from local flows only.
 739                  */
 740                 if (priv->config.dv_flow_en &&
 741                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 742                     mlx5_flow_ext_mreg_supported(dev)) {
 743                         rxq_ctrl->rxq.mark = 1;
 744                         rxq_ctrl->flow_mark_n = 1;
 745                 } else if (mark) {
 746                         rxq_ctrl->rxq.mark = 1;
 747                         rxq_ctrl->flow_mark_n++;
 748                 }
 749                 if (tunnel) {
 750                         unsigned int j;
 751
 752                         /* Increase the counter matching the flow. */
 753                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 754                                 if ((tunnels_info[j].tunnel &
 755                                      dev_handle->layers) ==
 756                                     tunnels_info[j].tunnel) {
 757                                         rxq_ctrl->flow_tunnels_n[j]++;
 758                                         break;
 759                                 }
 760                         }
 761                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 762                 }
 763         }
 764 }
 765
 766 /**
 767  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
 768  *
 769  * @param[in] dev
 770  *   Pointer to the Ethernet device structure.
 771  * @param[in] flow
 772  *   Pointer to flow structure.
 773  */
 774 static void
 775 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
 776 {
 777         struct mlx5_priv *priv = dev->data->dev_private;
 778         uint32_t handle_idx;
 779         struct mlx5_flow_handle *dev_handle;
 780
 781         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
 782                        handle_idx, dev_handle, next)
 783                 flow_drv_rxq_flags_set(dev, flow, dev_handle);
 784 }
 785
 786 /**
 787  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 788  * device flow if no other flow uses it with the same kind of request.
 789  *
 790  * @param dev
 791  *   Pointer to Ethernet device.
 792  * @param[in] flow
 793  *   Pointer to flow structure.
 794  * @param[in] dev_handle
 795  *   Pointer to the device flow handle structure.
 796  */
 797 static void
 798 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow,
 799                         struct mlx5_flow_handle *dev_handle)
 800 {
 801         struct mlx5_priv *priv = dev->data->dev_private;
 802         const int mark = dev_handle->mark;
 803         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
 804         unsigned int i;
 805
 806         MLX5_ASSERT(dev->data->dev_started);
 807         for (i = 0; i != flow->rss.queue_num; ++i) {
 808                 int idx = (*flow->rss.queue)[i];
 809                 struct mlx5_rxq_ctrl *rxq_ctrl =
 810                         container_of((*priv->rxqs)[idx],
 811                                      struct mlx5_rxq_ctrl, rxq);
 812
 813                 if (priv->config.dv_flow_en &&
 814                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 815                     mlx5_flow_ext_mreg_supported(dev)) {
 816                         rxq_ctrl->rxq.mark = 1;
 817                         rxq_ctrl->flow_mark_n = 1;
 818                 } else if (mark) {
 819                         rxq_ctrl->flow_mark_n--;
 820                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
 821                 }
 822                 if (tunnel) {
 823                         unsigned int j;
 824
 825                         /* Decrease the counter matching the flow. */
 826                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 827                                 if ((tunnels_info[j].tunnel &
 828                                      dev_handle->layers) ==
 829                                     tunnels_info[j].tunnel) {
 830                                         rxq_ctrl->flow_tunnels_n[j]--;
 831                                         break;
 832                                 }
 833                         }
 834                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 835                 }
 836         }
 837 }
 838
 839 /**
 840  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 841  * @p flow if no other flow uses it with the same kind of request.
 842  *
 843  * @param dev
 844  *   Pointer to Ethernet device.
 845  * @param[in] flow
 846  *   Pointer to the flow.
 847  */
 848 static void
 849 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
 850 {
 851         struct mlx5_priv *priv = dev->data->dev_private;
 852         uint32_t handle_idx;
 853         struct mlx5_flow_handle *dev_handle;
 854
 855         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
 856                        handle_idx, dev_handle, next)
 857                 flow_drv_rxq_flags_trim(dev, flow, dev_handle);
 858 }
 859
 860 /**
 861  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
 862  *
 863  * @param dev
 864  *   Pointer to Ethernet device.
 865  */
 866 static void
 867 flow_rxq_flags_clear(struct rte_eth_dev *dev)
 868 {
 869         struct mlx5_priv *priv = dev->data->dev_private;
 870         unsigned int i;
 871
 872         for (i = 0; i != priv->rxqs_n; ++i) {
 873                 struct mlx5_rxq_ctrl *rxq_ctrl;
 874                 unsigned int j;
 875
 876                 if (!(*priv->rxqs)[i])
 877                         continue;
 878                 rxq_ctrl = container_of((*priv->rxqs)[i],
 879                                         struct mlx5_rxq_ctrl, rxq);
 880                 rxq_ctrl->flow_mark_n = 0;
 881                 rxq_ctrl->rxq.mark = 0;
 882                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
 883                         rxq_ctrl->flow_tunnels_n[j] = 0;
 884                 rxq_ctrl->rxq.tunnel = 0;
 885         }
 886 }
 887
 888 /*
 889  * return a pointer to the desired action in the list of actions.
 890  *
 891  * @param[in] actions
 892  *   The list of actions to search the action in.
 893  * @param[in] action
 894  *   The action to find.
 895  *
 896  * @return
 897  *   Pointer to the action in the list, if found. NULL otherwise.
 898  */
 899 const struct rte_flow_action *
 900 mlx5_flow_find_action(const struct rte_flow_action *actions,
 901                       enum rte_flow_action_type action)
 902 {
 903         if (actions == NULL)
 904                 return NULL;
 905         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
 906                 if (actions->type == action)
 907                         return actions;
 908         return NULL;
 909 }
 910
 911 /*
 912  * Validate the flag action.
 913  *
 914  * @param[in] action_flags
 915  *   Bit-fields that holds the actions detected until now.
 916  * @param[in] attr
 917  *   Attributes of flow that includes this action.
 918  * @param[out] error
 919  *   Pointer to error structure.
 920  *
 921  * @return
 922  *   0 on success, a negative errno value otherwise and rte_errno is set.
 923  */
 924 int
 925 mlx5_flow_validate_action_flag(uint64_t action_flags,
 926                                const struct rte_flow_attr *attr,
 927                                struct rte_flow_error *error)
 928 {
 929         if (action_flags & MLX5_FLOW_ACTION_MARK)
 930                 return rte_flow_error_set(error, EINVAL,
 931                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 932                                           "can't mark and flag in same flow");
 933         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 934                 return rte_flow_error_set(error, EINVAL,
 935                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 936                                           "can't have 2 flag"
 937                                           " actions in same flow");
 938         if (attr->egress)
 939                 return rte_flow_error_set(error, ENOTSUP,
 940                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 941                                           "flag action not supported for "
 942                                           "egress");
 943         return 0;
 944 }
 945
 946 /*
 947  * Validate the mark action.
 948  *
 949  * @param[in] action
 950  *   Pointer to the queue action.
 951  * @param[in] action_flags
 952  *   Bit-fields that holds the actions detected until now.
 953  * @param[in] attr
 954  *   Attributes of flow that includes this action.
 955  * @param[out] error
 956  *   Pointer to error structure.
 957  *
 958  * @return
 959  *   0 on success, a negative errno value otherwise and rte_errno is set.
 960  */
 961 int
 962 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
 963                                uint64_t action_flags,
 964                                const struct rte_flow_attr *attr,
 965                                struct rte_flow_error *error)
 966 {
 967         const struct rte_flow_action_mark *mark = action->conf;
 968
 969         if (!mark)
 970                 return rte_flow_error_set(error, EINVAL,
 971                                           RTE_FLOW_ERROR_TYPE_ACTION,
 972                                           action,
 973                                           "configuration cannot be null");
 974         if (mark->id >= MLX5_FLOW_MARK_MAX)
 975                 return rte_flow_error_set(error, EINVAL,
 976                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 977                                           &mark->id,
 978                                           "mark id must in 0 <= id < "
 979                                           RTE_STR(MLX5_FLOW_MARK_MAX));
 980         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 981                 return rte_flow_error_set(error, EINVAL,
 982                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 983                                           "can't flag and mark in same flow");
 984         if (action_flags & MLX5_FLOW_ACTION_MARK)
 985                 return rte_flow_error_set(error, EINVAL,
 986                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 987                                           "can't have 2 mark actions in same"
 988                                           " flow");
 989         if (attr->egress)
 990                 return rte_flow_error_set(error, ENOTSUP,
 991                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 992                                           "mark action not supported for "
 993                                           "egress");
 994         return 0;
 995 }
 996
 997 /*
 998  * Validate the drop action.
 999  *
1000  * @param[in] action_flags
1001  *   Bit-fields that holds the actions detected until now.
1002  * @param[in] attr
1003  *   Attributes of flow that includes this action.
1004  * @param[out] error
1005  *   Pointer to error structure.
1006  *
1007  * @return
1008  *   0 on success, a negative errno value otherwise and rte_errno is set.
1009  */
1010 int
1011 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1012                                const struct rte_flow_attr *attr,
1013                                struct rte_flow_error *error)
1014 {
1015         if (attr->egress)
1016                 return rte_flow_error_set(error, ENOTSUP,
1017                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1018                                           "drop action not supported for "
1019                                           "egress");
1020         return 0;
1021 }
1022
1023 /*
1024  * Validate the queue action.
1025  *
1026  * @param[in] action
1027  *   Pointer to the queue action.
1028  * @param[in] action_flags
1029  *   Bit-fields that holds the actions detected until now.
1030  * @param[in] dev
1031  *   Pointer to the Ethernet device structure.
1032  * @param[in] attr
1033  *   Attributes of flow that includes this action.
1034  * @param[out] error
1035  *   Pointer to error structure.
1036  *
1037  * @return
1038  *   0 on success, a negative errno value otherwise and rte_errno is set.
1039  */
1040 int
1041 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1042                                 uint64_t action_flags,
1043                                 struct rte_eth_dev *dev,
1044                                 const struct rte_flow_attr *attr,
1045                                 struct rte_flow_error *error)
1046 {
1047         struct mlx5_priv *priv = dev->data->dev_private;
1048         const struct rte_flow_action_queue *queue = action->conf;
1049
1050         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1051                 return rte_flow_error_set(error, EINVAL,
1052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1053                                           "can't have 2 fate actions in"
1054                                           " same flow");
1055         if (!priv->rxqs_n)
1056                 return rte_flow_error_set(error, EINVAL,
1057                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1058                                           NULL, "No Rx queues configured");
1059         if (queue->index >= priv->rxqs_n)
1060                 return rte_flow_error_set(error, EINVAL,
1061                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1062                                           &queue->index,
1063                                           "queue index out of range");
1064         if (!(*priv->rxqs)[queue->index])
1065                 return rte_flow_error_set(error, EINVAL,
1066                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1067                                           &queue->index,
1068                                           "queue is not configured");
1069         if (attr->egress)
1070                 return rte_flow_error_set(error, ENOTSUP,
1071                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1072                                           "queue action not supported for "
1073                                           "egress");
1074         return 0;
1075 }
1076
1077 /*
1078  * Validate the rss action.
1079  *
1080  * @param[in] action
1081  *   Pointer to the queue action.
1082  * @param[in] action_flags
1083  *   Bit-fields that holds the actions detected until now.
1084  * @param[in] dev
1085  *   Pointer to the Ethernet device structure.
1086  * @param[in] attr
1087  *   Attributes of flow that includes this action.
1088  * @param[in] item_flags
1089  *   Items that were detected.
1090  * @param[out] error
1091  *   Pointer to error structure.
1092  *
1093  * @return
1094  *   0 on success, a negative errno value otherwise and rte_errno is set.
1095  */
1096 int
1097 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1098                               uint64_t action_flags,
1099                               struct rte_eth_dev *dev,
1100                               const struct rte_flow_attr *attr,
1101                               uint64_t item_flags,
1102                               struct rte_flow_error *error)
1103 {
1104         struct mlx5_priv *priv = dev->data->dev_private;
1105         const struct rte_flow_action_rss *rss = action->conf;
1106         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1107         unsigned int i;
1108
1109         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1110                 return rte_flow_error_set(error, EINVAL,
1111                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1112                                           "can't have 2 fate actions"
1113                                           " in same flow");
1114         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1115             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1116                 return rte_flow_error_set(error, ENOTSUP,
1117                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1118                                           &rss->func,
1119                                           "RSS hash function not supported");
1120 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1121         if (rss->level > 2)
1122 #else
1123         if (rss->level > 1)
1124 #endif
1125                 return rte_flow_error_set(error, ENOTSUP,
1126                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1127                                           &rss->level,
1128                                           "tunnel RSS is not supported");
1129         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1130         if (rss->key_len == 0 && rss->key != NULL)
1131                 return rte_flow_error_set(error, ENOTSUP,
1132                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1133                                           &rss->key_len,
1134                                           "RSS hash key length 0");
1135         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1136                 return rte_flow_error_set(error, ENOTSUP,
1137                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1138                                           &rss->key_len,
1139                                           "RSS hash key too small");
1140         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1141                 return rte_flow_error_set(error, ENOTSUP,
1142                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1143                                           &rss->key_len,
1144                                           "RSS hash key too large");
1145         if (rss->queue_num > priv->config.ind_table_max_size)
1146                 return rte_flow_error_set(error, ENOTSUP,
1147                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1148                                           &rss->queue_num,
1149                                           "number of queues too large");
1150         if (rss->types & MLX5_RSS_HF_MASK)
1151                 return rte_flow_error_set(error, ENOTSUP,
1152                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1153                                           &rss->types,
1154                                           "some RSS protocols are not"
1155                                           " supported");
1156         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1157             !(rss->types & ETH_RSS_IP))
1158                 return rte_flow_error_set(error, EINVAL,
1159                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1160                                           "L3 partial RSS requested but L3 RSS"
1161                                           " type not specified");
1162         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1163             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1164                 return rte_flow_error_set(error, EINVAL,
1165                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1166                                           "L4 partial RSS requested but L4 RSS"
1167                                           " type not specified");
1168         if (!priv->rxqs_n)
1169                 return rte_flow_error_set(error, EINVAL,
1170                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1171                                           NULL, "No Rx queues configured");
1172         if (!rss->queue_num)
1173                 return rte_flow_error_set(error, EINVAL,
1174                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1175                                           NULL, "No queues configured");
1176         for (i = 0; i != rss->queue_num; ++i) {
1177                 if (rss->queue[i] >= priv->rxqs_n)
1178                         return rte_flow_error_set
1179                                 (error, EINVAL,
1180                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1181                                  &rss->queue[i], "queue index out of range");
1182                 if (!(*priv->rxqs)[rss->queue[i]])
1183                         return rte_flow_error_set
1184                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1185                                  &rss->queue[i], "queue is not configured");
1186         }
1187         if (attr->egress)
1188                 return rte_flow_error_set(error, ENOTSUP,
1189                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1190                                           "rss action not supported for "
1191                                           "egress");
1192         if (rss->level > 1 &&  !tunnel)
1193                 return rte_flow_error_set(error, EINVAL,
1194                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1195                                           "inner RSS is not supported for "
1196                                           "non-tunnel flows");
1197         return 0;
1198 }
1199
1200 /*
1201  * Validate the count action.
1202  *
1203  * @param[in] dev
1204  *   Pointer to the Ethernet device structure.
1205  * @param[in] attr
1206  *   Attributes of flow that includes this action.
1207  * @param[out] error
1208  *   Pointer to error structure.
1209  *
1210  * @return
1211  *   0 on success, a negative errno value otherwise and rte_errno is set.
1212  */
1213 int
1214 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1215                                 const struct rte_flow_attr *attr,
1216                                 struct rte_flow_error *error)
1217 {
1218         if (attr->egress)
1219                 return rte_flow_error_set(error, ENOTSUP,
1220                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1221                                           "count action not supported for "
1222                                           "egress");
1223         return 0;
1224 }
1225
1226 /**
1227  * Verify the @p attributes will be correctly understood by the NIC and store
1228  * them in the @p flow if everything is correct.
1229  *
1230  * @param[in] dev
1231  *   Pointer to the Ethernet device structure.
1232  * @param[in] attributes
1233  *   Pointer to flow attributes
1234  * @param[out] error
1235  *   Pointer to error structure.
1236  *
1237  * @return
1238  *   0 on success, a negative errno value otherwise and rte_errno is set.
1239  */
1240 int
1241 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1242                               const struct rte_flow_attr *attributes,
1243                               struct rte_flow_error *error)
1244 {
1245         struct mlx5_priv *priv = dev->data->dev_private;
1246         uint32_t priority_max = priv->config.flow_prio - 1;
1247
1248         if (attributes->group)
1249                 return rte_flow_error_set(error, ENOTSUP,
1250                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1251                                           NULL, "groups is not supported");
1252         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1253             attributes->priority >= priority_max)
1254                 return rte_flow_error_set(error, ENOTSUP,
1255                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1256                                           NULL, "priority out of range");
1257         if (attributes->egress)
1258                 return rte_flow_error_set(error, ENOTSUP,
1259                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1260                                           "egress is not supported");
1261         if (attributes->transfer && !priv->config.dv_esw_en)
1262                 return rte_flow_error_set(error, ENOTSUP,
1263                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1264                                           NULL, "transfer is not supported");
1265         if (!attributes->ingress)
1266                 return rte_flow_error_set(error, EINVAL,
1267                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1268                                           NULL,
1269                                           "ingress attribute is mandatory");
1270         return 0;
1271 }
1272
1273 /**
1274  * Validate ICMP6 item.
1275  *
1276  * @param[in] item
1277  *   Item specification.
1278  * @param[in] item_flags
1279  *   Bit-fields that holds the items detected until now.
1280  * @param[out] error
1281  *   Pointer to error structure.
1282  *
1283  * @return
1284  *   0 on success, a negative errno value otherwise and rte_errno is set.
1285  */
1286 int
1287 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1288                                uint64_t item_flags,
1289                                uint8_t target_protocol,
1290                                struct rte_flow_error *error)
1291 {
1292         const struct rte_flow_item_icmp6 *mask = item->mask;
1293         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1294         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1295                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1296         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1297                                       MLX5_FLOW_LAYER_OUTER_L4;
1298         int ret;
1299
1300         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1301                 return rte_flow_error_set(error, EINVAL,
1302                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1303                                           "protocol filtering not compatible"
1304                                           " with ICMP6 layer");
1305         if (!(item_flags & l3m))
1306                 return rte_flow_error_set(error, EINVAL,
1307                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1308                                           "IPv6 is mandatory to filter on"
1309                                           " ICMP6");
1310         if (item_flags & l4m)
1311                 return rte_flow_error_set(error, EINVAL,
1312                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1313                                           "multiple L4 layers not supported");
1314         if (!mask)
1315                 mask = &rte_flow_item_icmp6_mask;
1316         ret = mlx5_flow_item_acceptable
1317                 (item, (const uint8_t *)mask,
1318                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1319                  sizeof(struct rte_flow_item_icmp6), error);
1320         if (ret < 0)
1321                 return ret;
1322         return 0;
1323 }
1324
1325 /**
1326  * Validate ICMP item.
1327  *
1328  * @param[in] item
1329  *   Item specification.
1330  * @param[in] item_flags
1331  *   Bit-fields that holds the items detected until now.
1332  * @param[out] error
1333  *   Pointer to error structure.
1334  *
1335  * @return
1336  *   0 on success, a negative errno value otherwise and rte_errno is set.
1337  */
1338 int
1339 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1340                              uint64_t item_flags,
1341                              uint8_t target_protocol,
1342                              struct rte_flow_error *error)
1343 {
1344         const struct rte_flow_item_icmp *mask = item->mask;
1345         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1346         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1347                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1348         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1349                                       MLX5_FLOW_LAYER_OUTER_L4;
1350         int ret;
1351
1352         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1353                 return rte_flow_error_set(error, EINVAL,
1354                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1355                                           "protocol filtering not compatible"
1356                                           " with ICMP layer");
1357         if (!(item_flags & l3m))
1358                 return rte_flow_error_set(error, EINVAL,
1359                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1360                                           "IPv4 is mandatory to filter"
1361                                           " on ICMP");
1362         if (item_flags & l4m)
1363                 return rte_flow_error_set(error, EINVAL,
1364                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1365                                           "multiple L4 layers not supported");
1366         if (!mask)
1367                 mask = &rte_flow_item_icmp_mask;
1368         ret = mlx5_flow_item_acceptable
1369                 (item, (const uint8_t *)mask,
1370                  (const uint8_t *)&rte_flow_item_icmp_mask,
1371                  sizeof(struct rte_flow_item_icmp), error);
1372         if (ret < 0)
1373                 return ret;
1374         return 0;
1375 }
1376
1377 /**
1378  * Validate Ethernet item.
1379  *
1380  * @param[in] item
1381  *   Item specification.
1382  * @param[in] item_flags
1383  *   Bit-fields that holds the items detected until now.
1384  * @param[out] error
1385  *   Pointer to error structure.
1386  *
1387  * @return
1388  *   0 on success, a negative errno value otherwise and rte_errno is set.
1389  */
1390 int
1391 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1392                             uint64_t item_flags,
1393                             struct rte_flow_error *error)
1394 {
1395         const struct rte_flow_item_eth *mask = item->mask;
1396         const struct rte_flow_item_eth nic_mask = {
1397                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1398                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1399                 .type = RTE_BE16(0xffff),
1400         };
1401         int ret;
1402         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1403         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1404                                        MLX5_FLOW_LAYER_OUTER_L2;
1405
1406         if (item_flags & ethm)
1407                 return rte_flow_error_set(error, ENOTSUP,
1408                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1409                                           "multiple L2 layers not supported");
1410         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1411             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1412                 return rte_flow_error_set(error, EINVAL,
1413                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1414                                           "L2 layer should not follow "
1415                                           "L3 layers");
1416         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1417             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1418                 return rte_flow_error_set(error, EINVAL,
1419                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1420                                           "L2 layer should not follow VLAN");
1421         if (!mask)
1422                 mask = &rte_flow_item_eth_mask;
1423         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1424                                         (const uint8_t *)&nic_mask,
1425                                         sizeof(struct rte_flow_item_eth),
1426                                         error);
1427         return ret;
1428 }
1429
1430 /**
1431  * Validate VLAN item.
1432  *
1433  * @param[in] item
1434  *   Item specification.
1435  * @param[in] item_flags
1436  *   Bit-fields that holds the items detected until now.
1437  * @param[in] dev
1438  *   Ethernet device flow is being created on.
1439  * @param[out] error
1440  *   Pointer to error structure.
1441  *
1442  * @return
1443  *   0 on success, a negative errno value otherwise and rte_errno is set.
1444  */
1445 int
1446 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1447                              uint64_t item_flags,
1448                              struct rte_eth_dev *dev,
1449                              struct rte_flow_error *error)
1450 {
1451         const struct rte_flow_item_vlan *spec = item->spec;
1452         const struct rte_flow_item_vlan *mask = item->mask;
1453         const struct rte_flow_item_vlan nic_mask = {
1454                 .tci = RTE_BE16(UINT16_MAX),
1455                 .inner_type = RTE_BE16(UINT16_MAX),
1456         };
1457         uint16_t vlan_tag = 0;
1458         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1459         int ret;
1460         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1461                                         MLX5_FLOW_LAYER_INNER_L4) :
1462                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1463                                         MLX5_FLOW_LAYER_OUTER_L4);
1464         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1465                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1466
1467         if (item_flags & vlanm)
1468                 return rte_flow_error_set(error, EINVAL,
1469                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1470                                           "multiple VLAN layers not supported");
1471         else if ((item_flags & l34m) != 0)
1472                 return rte_flow_error_set(error, EINVAL,
1473                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1474                                           "VLAN cannot follow L3/L4 layer");
1475         if (!mask)
1476                 mask = &rte_flow_item_vlan_mask;
1477         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1478                                         (const uint8_t *)&nic_mask,
1479                                         sizeof(struct rte_flow_item_vlan),
1480                                         error);
1481         if (ret)
1482                 return ret;
1483         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1484                 struct mlx5_priv *priv = dev->data->dev_private;
1485
1486                 if (priv->vmwa_context) {
1487                         /*
1488                          * Non-NULL context means we have a virtual machine
1489                          * and SR-IOV enabled, we have to create VLAN interface
1490                          * to make hypervisor to setup E-Switch vport
1491                          * context correctly. We avoid creating the multiple
1492                          * VLAN interfaces, so we cannot support VLAN tag mask.
1493                          */
1494                         return rte_flow_error_set(error, EINVAL,
1495                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1496                                                   item,
1497                                                   "VLAN tag mask is not"
1498                                                   " supported in virtual"
1499                                                   " environment");
1500                 }
1501         }
1502         if (spec) {
1503                 vlan_tag = spec->tci;
1504                 vlan_tag &= mask->tci;
1505         }
1506         /*
1507          * From verbs perspective an empty VLAN is equivalent
1508          * to a packet without VLAN layer.
1509          */
1510         if (!vlan_tag)
1511                 return rte_flow_error_set(error, EINVAL,
1512                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1513                                           item->spec,
1514                                           "VLAN cannot be empty");
1515         return 0;
1516 }
1517
1518 /**
1519  * Validate IPV4 item.
1520  *
1521  * @param[in] item
1522  *   Item specification.
1523  * @param[in] item_flags
1524  *   Bit-fields that holds the items detected until now.
1525  * @param[in] acc_mask
1526  *   Acceptable mask, if NULL default internal default mask
1527  *   will be used to check whether item fields are supported.
1528  * @param[out] error
1529  *   Pointer to error structure.
1530  *
1531  * @return
1532  *   0 on success, a negative errno value otherwise and rte_errno is set.
1533  */
1534 int
1535 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1536                              uint64_t item_flags,
1537                              uint64_t last_item,
1538                              uint16_t ether_type,
1539                              const struct rte_flow_item_ipv4 *acc_mask,
1540                              struct rte_flow_error *error)
1541 {
1542         const struct rte_flow_item_ipv4 *mask = item->mask;
1543         const struct rte_flow_item_ipv4 *spec = item->spec;
1544         const struct rte_flow_item_ipv4 nic_mask = {
1545                 .hdr = {
1546                         .src_addr = RTE_BE32(0xffffffff),
1547                         .dst_addr = RTE_BE32(0xffffffff),
1548                         .type_of_service = 0xff,
1549                         .next_proto_id = 0xff,
1550                 },
1551         };
1552         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1553         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1554                                       MLX5_FLOW_LAYER_OUTER_L3;
1555         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1556                                       MLX5_FLOW_LAYER_OUTER_L4;
1557         int ret;
1558         uint8_t next_proto = 0xFF;
1559         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1560                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1561                                   MLX5_FLOW_LAYER_INNER_VLAN);
1562
1563         if ((last_item & l2_vlan) && ether_type &&
1564             ether_type != RTE_ETHER_TYPE_IPV4)
1565                 return rte_flow_error_set(error, EINVAL,
1566                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1567                                           "IPv4 cannot follow L2/VLAN layer "
1568                                           "which ether type is not IPv4");
1569         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1570                 if (mask && spec)
1571                         next_proto = mask->hdr.next_proto_id &
1572                                      spec->hdr.next_proto_id;
1573                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1574                         return rte_flow_error_set(error, EINVAL,
1575                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1576                                                   item,
1577                                                   "multiple tunnel "
1578                                                   "not supported");
1579         }
1580         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1581                 return rte_flow_error_set(error, EINVAL,
1582                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1583                                           "wrong tunnel type - IPv6 specified "
1584                                           "but IPv4 item provided");
1585         if (item_flags & l3m)
1586                 return rte_flow_error_set(error, ENOTSUP,
1587                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1588                                           "multiple L3 layers not supported");
1589         else if (item_flags & l4m)
1590                 return rte_flow_error_set(error, EINVAL,
1591                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1592                                           "L3 cannot follow an L4 layer.");
1593         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1594                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1595                 return rte_flow_error_set(error, EINVAL,
1596                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1597                                           "L3 cannot follow an NVGRE layer.");
1598         if (!mask)
1599                 mask = &rte_flow_item_ipv4_mask;
1600         else if (mask->hdr.next_proto_id != 0 &&
1601                  mask->hdr.next_proto_id != 0xff)
1602                 return rte_flow_error_set(error, EINVAL,
1603                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1604                                           "partial mask is not supported"
1605                                           " for protocol");
1606         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1607                                         acc_mask ? (const uint8_t *)acc_mask
1608                                                  : (const uint8_t *)&nic_mask,
1609                                         sizeof(struct rte_flow_item_ipv4),
1610                                         error);
1611         if (ret < 0)
1612                 return ret;
1613         return 0;
1614 }
1615
1616 /**
1617  * Validate IPV6 item.
1618  *
1619  * @param[in] item
1620  *   Item specification.
1621  * @param[in] item_flags
1622  *   Bit-fields that holds the items detected until now.
1623  * @param[in] acc_mask
1624  *   Acceptable mask, if NULL default internal default mask
1625  *   will be used to check whether item fields are supported.
1626  * @param[out] error
1627  *   Pointer to error structure.
1628  *
1629  * @return
1630  *   0 on success, a negative errno value otherwise and rte_errno is set.
1631  */
1632 int
1633 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1634                              uint64_t item_flags,
1635                              uint64_t last_item,
1636                              uint16_t ether_type,
1637                              const struct rte_flow_item_ipv6 *acc_mask,
1638                              struct rte_flow_error *error)
1639 {
1640         const struct rte_flow_item_ipv6 *mask = item->mask;
1641         const struct rte_flow_item_ipv6 *spec = item->spec;
1642         const struct rte_flow_item_ipv6 nic_mask = {
1643                 .hdr = {
1644                         .src_addr =
1645                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1646                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1647                         .dst_addr =
1648                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1649                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1650                         .vtc_flow = RTE_BE32(0xffffffff),
1651                         .proto = 0xff,
1652                 },
1653         };
1654         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1655         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1656                                       MLX5_FLOW_LAYER_OUTER_L3;
1657         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1658                                       MLX5_FLOW_LAYER_OUTER_L4;
1659         int ret;
1660         uint8_t next_proto = 0xFF;
1661         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1662                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1663                                   MLX5_FLOW_LAYER_INNER_VLAN);
1664
1665         if ((last_item & l2_vlan) && ether_type &&
1666             ether_type != RTE_ETHER_TYPE_IPV6)
1667                 return rte_flow_error_set(error, EINVAL,
1668                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1669                                           "IPv6 cannot follow L2/VLAN layer "
1670                                           "which ether type is not IPv6");
1671         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1672                 if (mask && spec)
1673                         next_proto = mask->hdr.proto & spec->hdr.proto;
1674                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1675                         return rte_flow_error_set(error, EINVAL,
1676                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1677                                                   item,
1678                                                   "multiple tunnel "
1679                                                   "not supported");
1680         }
1681         if (item_flags & MLX5_FLOW_LAYER_IPIP)
1682                 return rte_flow_error_set(error, EINVAL,
1683                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1684                                           "wrong tunnel type - IPv4 specified "
1685                                           "but IPv6 item provided");
1686         if (item_flags & l3m)
1687                 return rte_flow_error_set(error, ENOTSUP,
1688                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1689                                           "multiple L3 layers not supported");
1690         else if (item_flags & l4m)
1691                 return rte_flow_error_set(error, EINVAL,
1692                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1693                                           "L3 cannot follow an L4 layer.");
1694         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1695                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1696                 return rte_flow_error_set(error, EINVAL,
1697                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1698                                           "L3 cannot follow an NVGRE layer.");
1699         if (!mask)
1700                 mask = &rte_flow_item_ipv6_mask;
1701         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1702                                         acc_mask ? (const uint8_t *)acc_mask
1703                                                  : (const uint8_t *)&nic_mask,
1704                                         sizeof(struct rte_flow_item_ipv6),
1705                                         error);
1706         if (ret < 0)
1707                 return ret;
1708         return 0;
1709 }
1710
1711 /**
1712  * Validate UDP item.
1713  *
1714  * @param[in] item
1715  *   Item specification.
1716  * @param[in] item_flags
1717  *   Bit-fields that holds the items detected until now.
1718  * @param[in] target_protocol
1719  *   The next protocol in the previous item.
1720  * @param[in] flow_mask
1721  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1722  * @param[out] error
1723  *   Pointer to error structure.
1724  *
1725  * @return
1726  *   0 on success, a negative errno value otherwise and rte_errno is set.
1727  */
1728 int
1729 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1730                             uint64_t item_flags,
1731                             uint8_t target_protocol,
1732                             struct rte_flow_error *error)
1733 {
1734         const struct rte_flow_item_udp *mask = item->mask;
1735         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1736         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1737                                       MLX5_FLOW_LAYER_OUTER_L3;
1738         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1739                                       MLX5_FLOW_LAYER_OUTER_L4;
1740         int ret;
1741
1742         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1743                 return rte_flow_error_set(error, EINVAL,
1744                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1745                                           "protocol filtering not compatible"
1746                                           " with UDP layer");
1747         if (!(item_flags & l3m))
1748                 return rte_flow_error_set(error, EINVAL,
1749                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1750                                           "L3 is mandatory to filter on L4");
1751         if (item_flags & l4m)
1752                 return rte_flow_error_set(error, EINVAL,
1753                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1754                                           "multiple L4 layers not supported");
1755         if (!mask)
1756                 mask = &rte_flow_item_udp_mask;
1757         ret = mlx5_flow_item_acceptable
1758                 (item, (const uint8_t *)mask,
1759                  (const uint8_t *)&rte_flow_item_udp_mask,
1760                  sizeof(struct rte_flow_item_udp), error);
1761         if (ret < 0)
1762                 return ret;
1763         return 0;
1764 }
1765
1766 /**
1767  * Validate TCP item.
1768  *
1769  * @param[in] item
1770  *   Item specification.
1771  * @param[in] item_flags
1772  *   Bit-fields that holds the items detected until now.
1773  * @param[in] target_protocol
1774  *   The next protocol in the previous item.
1775  * @param[out] error
1776  *   Pointer to error structure.
1777  *
1778  * @return
1779  *   0 on success, a negative errno value otherwise and rte_errno is set.
1780  */
1781 int
1782 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1783                             uint64_t item_flags,
1784                             uint8_t target_protocol,
1785                             const struct rte_flow_item_tcp *flow_mask,
1786                             struct rte_flow_error *error)
1787 {
1788         const struct rte_flow_item_tcp *mask = item->mask;
1789         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1790         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1791                                       MLX5_FLOW_LAYER_OUTER_L3;
1792         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1793                                       MLX5_FLOW_LAYER_OUTER_L4;
1794         int ret;
1795
1796         MLX5_ASSERT(flow_mask);
1797         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1798                 return rte_flow_error_set(error, EINVAL,
1799                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1800                                           "protocol filtering not compatible"
1801                                           " with TCP layer");
1802         if (!(item_flags & l3m))
1803                 return rte_flow_error_set(error, EINVAL,
1804                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1805                                           "L3 is mandatory to filter on L4");
1806         if (item_flags & l4m)
1807                 return rte_flow_error_set(error, EINVAL,
1808                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1809                                           "multiple L4 layers not supported");
1810         if (!mask)
1811                 mask = &rte_flow_item_tcp_mask;
1812         ret = mlx5_flow_item_acceptable
1813                 (item, (const uint8_t *)mask,
1814                  (const uint8_t *)flow_mask,
1815                  sizeof(struct rte_flow_item_tcp), error);
1816         if (ret < 0)
1817                 return ret;
1818         return 0;
1819 }
1820
1821 /**
1822  * Validate VXLAN item.
1823  *
1824  * @param[in] item
1825  *   Item specification.
1826  * @param[in] item_flags
1827  *   Bit-fields that holds the items detected until now.
1828  * @param[in] target_protocol
1829  *   The next protocol in the previous item.
1830  * @param[out] error
1831  *   Pointer to error structure.
1832  *
1833  * @return
1834  *   0 on success, a negative errno value otherwise and rte_errno is set.
1835  */
1836 int
1837 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1838                               uint64_t item_flags,
1839                               struct rte_flow_error *error)
1840 {
1841         const struct rte_flow_item_vxlan *spec = item->spec;
1842         const struct rte_flow_item_vxlan *mask = item->mask;
1843         int ret;
1844         union vni {
1845                 uint32_t vlan_id;
1846                 uint8_t vni[4];
1847         } id = { .vlan_id = 0, };
1848
1849
1850         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1851                 return rte_flow_error_set(error, ENOTSUP,
1852                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1853                                           "multiple tunnel layers not"
1854                                           " supported");
1855         /*
1856          * Verify only UDPv4 is present as defined in
1857          * https://tools.ietf.org/html/rfc7348
1858          */
1859         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1860                 return rte_flow_error_set(error, EINVAL,
1861                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1862                                           "no outer UDP layer found");
1863         if (!mask)
1864                 mask = &rte_flow_item_vxlan_mask;
1865         ret = mlx5_flow_item_acceptable
1866                 (item, (const uint8_t *)mask,
1867                  (const uint8_t *)&rte_flow_item_vxlan_mask,
1868                  sizeof(struct rte_flow_item_vxlan),
1869                  error);
1870         if (ret < 0)
1871                 return ret;
1872         if (spec) {
1873                 memcpy(&id.vni[1], spec->vni, 3);
1874                 memcpy(&id.vni[1], mask->vni, 3);
1875         }
1876         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1877                 return rte_flow_error_set(error, ENOTSUP,
1878                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1879                                           "VXLAN tunnel must be fully defined");
1880         return 0;
1881 }
1882
1883 /**
1884  * Validate VXLAN_GPE item.
1885  *
1886  * @param[in] item
1887  *   Item specification.
1888  * @param[in] item_flags
1889  *   Bit-fields that holds the items detected until now.
1890  * @param[in] priv
1891  *   Pointer to the private data structure.
1892  * @param[in] target_protocol
1893  *   The next protocol in the previous item.
1894  * @param[out] error
1895  *   Pointer to error structure.
1896  *
1897  * @return
1898  *   0 on success, a negative errno value otherwise and rte_errno is set.
1899  */
1900 int
1901 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1902                                   uint64_t item_flags,
1903                                   struct rte_eth_dev *dev,
1904                                   struct rte_flow_error *error)
1905 {
1906         struct mlx5_priv *priv = dev->data->dev_private;
1907         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1908         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1909         int ret;
1910         union vni {
1911                 uint32_t vlan_id;
1912                 uint8_t vni[4];
1913         } id = { .vlan_id = 0, };
1914
1915         if (!priv->config.l3_vxlan_en)
1916                 return rte_flow_error_set(error, ENOTSUP,
1917                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1918                                           "L3 VXLAN is not enabled by device"
1919                                           " parameter and/or not configured in"
1920                                           " firmware");
1921         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1922                 return rte_flow_error_set(error, ENOTSUP,
1923                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1924                                           "multiple tunnel layers not"
1925                                           " supported");
1926         /*
1927          * Verify only UDPv4 is present as defined in
1928          * https://tools.ietf.org/html/rfc7348
1929          */
1930         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1931                 return rte_flow_error_set(error, EINVAL,
1932                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1933                                           "no outer UDP layer found");
1934         if (!mask)
1935                 mask = &rte_flow_item_vxlan_gpe_mask;
1936         ret = mlx5_flow_item_acceptable
1937                 (item, (const uint8_t *)mask,
1938                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1939                  sizeof(struct rte_flow_item_vxlan_gpe),
1940                  error);
1941         if (ret < 0)
1942                 return ret;
1943         if (spec) {
1944                 if (spec->protocol)
1945                         return rte_flow_error_set(error, ENOTSUP,
1946                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1947                                                   item,
1948                                                   "VxLAN-GPE protocol"
1949                                                   " not supported");
1950                 memcpy(&id.vni[1], spec->vni, 3);
1951                 memcpy(&id.vni[1], mask->vni, 3);
1952         }
1953         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1954                 return rte_flow_error_set(error, ENOTSUP,
1955                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1956                                           "VXLAN-GPE tunnel must be fully"
1957                                           " defined");
1958         return 0;
1959 }
1960 /**
1961  * Validate GRE Key item.
1962  *
1963  * @param[in] item
1964  *   Item specification.
1965  * @param[in] item_flags
1966  *   Bit flags to mark detected items.
1967  * @param[in] gre_item
1968  *   Pointer to gre_item
1969  * @param[out] error
1970  *   Pointer to error structure.
1971  *
1972  * @return
1973  *   0 on success, a negative errno value otherwise and rte_errno is set.
1974  */
1975 int
1976 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1977                                 uint64_t item_flags,
1978                                 const struct rte_flow_item *gre_item,
1979                                 struct rte_flow_error *error)
1980 {
1981         const rte_be32_t *mask = item->mask;
1982         int ret = 0;
1983         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1984         const struct rte_flow_item_gre *gre_spec;
1985         const struct rte_flow_item_gre *gre_mask;
1986
1987         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1988                 return rte_flow_error_set(error, ENOTSUP,
1989                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1990                                           "Multiple GRE key not support");
1991         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1992                 return rte_flow_error_set(error, ENOTSUP,
1993                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1994                                           "No preceding GRE header");
1995         if (item_flags & MLX5_FLOW_LAYER_INNER)
1996                 return rte_flow_error_set(error, ENOTSUP,
1997                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1998                                           "GRE key following a wrong item");
1999         gre_mask = gre_item->mask;
2000         if (!gre_mask)
2001                 gre_mask = &rte_flow_item_gre_mask;
2002         gre_spec = gre_item->spec;
2003         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2004                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2005                 return rte_flow_error_set(error, EINVAL,
2006                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2007                                           "Key bit must be on");
2008
2009         if (!mask)
2010                 mask = &gre_key_default_mask;
2011         ret = mlx5_flow_item_acceptable
2012                 (item, (const uint8_t *)mask,
2013                  (const uint8_t *)&gre_key_default_mask,
2014                  sizeof(rte_be32_t), error);
2015         return ret;
2016 }
2017
2018 /**
2019  * Validate GRE item.
2020  *
2021  * @param[in] item
2022  *   Item specification.
2023  * @param[in] item_flags
2024  *   Bit flags to mark detected items.
2025  * @param[in] target_protocol
2026  *   The next protocol in the previous item.
2027  * @param[out] error
2028  *   Pointer to error structure.
2029  *
2030  * @return
2031  *   0 on success, a negative errno value otherwise and rte_errno is set.
2032  */
2033 int
2034 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2035                             uint64_t item_flags,
2036                             uint8_t target_protocol,
2037                             struct rte_flow_error *error)
2038 {
2039         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2040         const struct rte_flow_item_gre *mask = item->mask;
2041         int ret;
2042         const struct rte_flow_item_gre nic_mask = {
2043                 .c_rsvd0_ver = RTE_BE16(0xB000),
2044                 .protocol = RTE_BE16(UINT16_MAX),
2045         };
2046
2047         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2048                 return rte_flow_error_set(error, EINVAL,
2049                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2050                                           "protocol filtering not compatible"
2051                                           " with this GRE layer");
2052         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2053                 return rte_flow_error_set(error, ENOTSUP,
2054                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2055                                           "multiple tunnel layers not"
2056                                           " supported");
2057         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2058                 return rte_flow_error_set(error, ENOTSUP,
2059                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2060                                           "L3 Layer is missing");
2061         if (!mask)
2062                 mask = &rte_flow_item_gre_mask;
2063         ret = mlx5_flow_item_acceptable
2064                 (item, (const uint8_t *)mask,
2065                  (const uint8_t *)&nic_mask,
2066                  sizeof(struct rte_flow_item_gre), error);
2067         if (ret < 0)
2068                 return ret;
2069 #ifndef HAVE_MLX5DV_DR
2070 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2071         if (spec && (spec->protocol & mask->protocol))
2072                 return rte_flow_error_set(error, ENOTSUP,
2073                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2074                                           "without MPLS support the"
2075                                           " specification cannot be used for"
2076                                           " filtering");
2077 #endif
2078 #endif
2079         return 0;
2080 }
2081
2082 /**
2083  * Validate Geneve item.
2084  *
2085  * @param[in] item
2086  *   Item specification.
2087  * @param[in] itemFlags
2088  *   Bit-fields that holds the items detected until now.
2089  * @param[in] enPriv
2090  *   Pointer to the private data structure.
2091  * @param[out] error
2092  *   Pointer to error structure.
2093  *
2094  * @return
2095  *   0 on success, a negative errno value otherwise and rte_errno is set.
2096  */
2097
2098 int
2099 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2100                                uint64_t item_flags,
2101                                struct rte_eth_dev *dev,
2102                                struct rte_flow_error *error)
2103 {
2104         struct mlx5_priv *priv = dev->data->dev_private;
2105         const struct rte_flow_item_geneve *spec = item->spec;
2106         const struct rte_flow_item_geneve *mask = item->mask;
2107         int ret;
2108         uint16_t gbhdr;
2109         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2110                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2111         const struct rte_flow_item_geneve nic_mask = {
2112                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2113                 .vni = "\xff\xff\xff",
2114                 .protocol = RTE_BE16(UINT16_MAX),
2115         };
2116
2117         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2118                 return rte_flow_error_set(error, ENOTSUP,
2119                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2120                                           "L3 Geneve is not enabled by device"
2121                                           " parameter and/or not configured in"
2122                                           " firmware");
2123         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2124                 return rte_flow_error_set(error, ENOTSUP,
2125                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2126                                           "multiple tunnel layers not"
2127                                           " supported");
2128         /*
2129          * Verify only UDPv4 is present as defined in
2130          * https://tools.ietf.org/html/rfc7348
2131          */
2132         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2133                 return rte_flow_error_set(error, EINVAL,
2134                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2135                                           "no outer UDP layer found");
2136         if (!mask)
2137                 mask = &rte_flow_item_geneve_mask;
2138         ret = mlx5_flow_item_acceptable
2139                                   (item, (const uint8_t *)mask,
2140                                    (const uint8_t *)&nic_mask,
2141                                    sizeof(struct rte_flow_item_geneve), error);
2142         if (ret)
2143                 return ret;
2144         if (spec) {
2145                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2146                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2147                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2148                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2149                         return rte_flow_error_set(error, ENOTSUP,
2150                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2151                                                   item,
2152                                                   "Geneve protocol unsupported"
2153                                                   " fields are being used");
2154                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2155                         return rte_flow_error_set
2156                                         (error, ENOTSUP,
2157                                          RTE_FLOW_ERROR_TYPE_ITEM,
2158                                          item,
2159                                          "Unsupported Geneve options length");
2160         }
2161         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2162                 return rte_flow_error_set
2163                                     (error, ENOTSUP,
2164                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2165                                      "Geneve tunnel must be fully defined");
2166         return 0;
2167 }
2168
2169 /**
2170  * Validate MPLS item.
2171  *
2172  * @param[in] dev
2173  *   Pointer to the rte_eth_dev structure.
2174  * @param[in] item
2175  *   Item specification.
2176  * @param[in] item_flags
2177  *   Bit-fields that holds the items detected until now.
2178  * @param[in] prev_layer
2179  *   The protocol layer indicated in previous item.
2180  * @param[out] error
2181  *   Pointer to error structure.
2182  *
2183  * @return
2184  *   0 on success, a negative errno value otherwise and rte_errno is set.
2185  */
2186 int
2187 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2188                              const struct rte_flow_item *item __rte_unused,
2189                              uint64_t item_flags __rte_unused,
2190                              uint64_t prev_layer __rte_unused,
2191                              struct rte_flow_error *error)
2192 {
2193 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2194         const struct rte_flow_item_mpls *mask = item->mask;
2195         struct mlx5_priv *priv = dev->data->dev_private;
2196         int ret;
2197
2198         if (!priv->config.mpls_en)
2199                 return rte_flow_error_set(error, ENOTSUP,
2200                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2201                                           "MPLS not supported or"
2202                                           " disabled in firmware"
2203                                           " configuration.");
2204         /* MPLS over IP, UDP, GRE is allowed */
2205         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2206                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2207                             MLX5_FLOW_LAYER_GRE)))
2208                 return rte_flow_error_set(error, EINVAL,
2209                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2210                                           "protocol filtering not compatible"
2211                                           " with MPLS layer");
2212         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2213         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2214             !(item_flags & MLX5_FLOW_LAYER_GRE))
2215                 return rte_flow_error_set(error, ENOTSUP,
2216                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2217                                           "multiple tunnel layers not"
2218                                           " supported");
2219         if (!mask)
2220                 mask = &rte_flow_item_mpls_mask;
2221         ret = mlx5_flow_item_acceptable
2222                 (item, (const uint8_t *)mask,
2223                  (const uint8_t *)&rte_flow_item_mpls_mask,
2224                  sizeof(struct rte_flow_item_mpls), error);
2225         if (ret < 0)
2226                 return ret;
2227         return 0;
2228 #endif
2229         return rte_flow_error_set(error, ENOTSUP,
2230                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2231                                   "MPLS is not supported by Verbs, please"
2232                                   " update.");
2233 }
2234
2235 /**
2236  * Validate NVGRE item.
2237  *
2238  * @param[in] item
2239  *   Item specification.
2240  * @param[in] item_flags
2241  *   Bit flags to mark detected items.
2242  * @param[in] target_protocol
2243  *   The next protocol in the previous item.
2244  * @param[out] error
2245  *   Pointer to error structure.
2246  *
2247  * @return
2248  *   0 on success, a negative errno value otherwise and rte_errno is set.
2249  */
2250 int
2251 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2252                               uint64_t item_flags,
2253                               uint8_t target_protocol,
2254                               struct rte_flow_error *error)
2255 {
2256         const struct rte_flow_item_nvgre *mask = item->mask;
2257         int ret;
2258
2259         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2260                 return rte_flow_error_set(error, EINVAL,
2261                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2262                                           "protocol filtering not compatible"
2263                                           " with this GRE layer");
2264         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2265                 return rte_flow_error_set(error, ENOTSUP,
2266                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2267                                           "multiple tunnel layers not"
2268                                           " supported");
2269         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2270                 return rte_flow_error_set(error, ENOTSUP,
2271                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2272                                           "L3 Layer is missing");
2273         if (!mask)
2274                 mask = &rte_flow_item_nvgre_mask;
2275         ret = mlx5_flow_item_acceptable
2276                 (item, (const uint8_t *)mask,
2277                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2278                  sizeof(struct rte_flow_item_nvgre), error);
2279         if (ret < 0)
2280                 return ret;
2281         return 0;
2282 }
2283
2284 /* Allocate unique ID for the split Q/RSS subflows. */
2285 static uint32_t
2286 flow_qrss_get_id(struct rte_eth_dev *dev)
2287 {
2288         struct mlx5_priv *priv = dev->data->dev_private;
2289         uint32_t qrss_id, ret;
2290
2291         ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2292         if (ret)
2293                 return 0;
2294         MLX5_ASSERT(qrss_id);
2295         return qrss_id;
2296 }
2297
2298 /* Free unique ID for the split Q/RSS subflows. */
2299 static void
2300 flow_qrss_free_id(struct rte_eth_dev *dev,  uint32_t qrss_id)
2301 {
2302         struct mlx5_priv *priv = dev->data->dev_private;
2303
2304         if (qrss_id)
2305                 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2306 }
2307
2308 /**
2309  * Release resource related QUEUE/RSS action split.
2310  *
2311  * @param dev
2312  *   Pointer to Ethernet device.
2313  * @param flow
2314  *   Flow to release id's from.
2315  */
2316 static void
2317 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2318                              struct rte_flow *flow)
2319 {
2320         struct mlx5_priv *priv = dev->data->dev_private;
2321         uint32_t handle_idx;
2322         struct mlx5_flow_handle *dev_handle;
2323
2324         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
2325                        handle_idx, dev_handle, next)
2326                 if (dev_handle->qrss_id)
2327                         flow_qrss_free_id(dev, dev_handle->qrss_id);
2328 }
2329
2330 static int
2331 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2332                    const struct rte_flow_attr *attr __rte_unused,
2333                    const struct rte_flow_item items[] __rte_unused,
2334                    const struct rte_flow_action actions[] __rte_unused,
2335                    bool external __rte_unused,
2336                    struct rte_flow_error *error)
2337 {
2338         return rte_flow_error_set(error, ENOTSUP,
2339                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2340 }
2341
2342 static struct mlx5_flow *
2343 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
2344                   const struct rte_flow_attr *attr __rte_unused,
2345                   const struct rte_flow_item items[] __rte_unused,
2346                   const struct rte_flow_action actions[] __rte_unused,
2347                   struct rte_flow_error *error)
2348 {
2349         rte_flow_error_set(error, ENOTSUP,
2350                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2351         return NULL;
2352 }
2353
2354 static int
2355 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2356                     struct mlx5_flow *dev_flow __rte_unused,
2357                     const struct rte_flow_attr *attr __rte_unused,
2358                     const struct rte_flow_item items[] __rte_unused,
2359                     const struct rte_flow_action actions[] __rte_unused,
2360                     struct rte_flow_error *error)
2361 {
2362         return rte_flow_error_set(error, ENOTSUP,
2363                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2364 }
2365
2366 static int
2367 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2368                 struct rte_flow *flow __rte_unused,
2369                 struct rte_flow_error *error)
2370 {
2371         return rte_flow_error_set(error, ENOTSUP,
2372                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2373 }
2374
2375 static void
2376 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2377                  struct rte_flow *flow __rte_unused)
2378 {
2379 }
2380
2381 static void
2382 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2383                   struct rte_flow *flow __rte_unused)
2384 {
2385 }
2386
2387 static int
2388 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2389                 struct rte_flow *flow __rte_unused,
2390                 const struct rte_flow_action *actions __rte_unused,
2391                 void *data __rte_unused,
2392                 struct rte_flow_error *error)
2393 {
2394         return rte_flow_error_set(error, ENOTSUP,
2395                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2396 }
2397
2398 /* Void driver to protect from null pointer reference. */
2399 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2400         .validate = flow_null_validate,
2401         .prepare = flow_null_prepare,
2402         .translate = flow_null_translate,
2403         .apply = flow_null_apply,
2404         .remove = flow_null_remove,
2405         .destroy = flow_null_destroy,
2406         .query = flow_null_query,
2407 };
2408
2409 /**
2410  * Select flow driver type according to flow attributes and device
2411  * configuration.
2412  *
2413  * @param[in] dev
2414  *   Pointer to the dev structure.
2415  * @param[in] attr
2416  *   Pointer to the flow attributes.
2417  *
2418  * @return
2419  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2420  */
2421 static enum mlx5_flow_drv_type
2422 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2423 {
2424         struct mlx5_priv *priv = dev->data->dev_private;
2425         enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2426
2427         if (attr->transfer && priv->config.dv_esw_en)
2428                 type = MLX5_FLOW_TYPE_DV;
2429         if (!attr->transfer)
2430                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2431                                                  MLX5_FLOW_TYPE_VERBS;
2432         return type;
2433 }
2434
2435 #define flow_get_drv_ops(type) flow_drv_ops[type]
2436
2437 /**
2438  * Flow driver validation API. This abstracts calling driver specific functions.
2439  * The type of flow driver is determined according to flow attributes.
2440  *
2441  * @param[in] dev
2442  *   Pointer to the dev structure.
2443  * @param[in] attr
2444  *   Pointer to the flow attributes.
2445  * @param[in] items
2446  *   Pointer to the list of items.
2447  * @param[in] actions
2448  *   Pointer to the list of actions.
2449  * @param[in] external
2450  *   This flow rule is created by request external to PMD.
2451  * @param[out] error
2452  *   Pointer to the error structure.
2453  *
2454  * @return
2455  *   0 on success, a negative errno value otherwise and rte_errno is set.
2456  */
2457 static inline int
2458 flow_drv_validate(struct rte_eth_dev *dev,
2459                   const struct rte_flow_attr *attr,
2460                   const struct rte_flow_item items[],
2461                   const struct rte_flow_action actions[],
2462                   bool external, struct rte_flow_error *error)
2463 {
2464         const struct mlx5_flow_driver_ops *fops;
2465         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2466
2467         fops = flow_get_drv_ops(type);
2468         return fops->validate(dev, attr, items, actions, external, error);
2469 }
2470
2471 /**
2472  * Flow driver preparation API. This abstracts calling driver specific
2473  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2474  * calculates the size of memory required for device flow, allocates the memory,
2475  * initializes the device flow and returns the pointer.
2476  *
2477  * @note
2478  *   This function initializes device flow structure such as dv or verbs in
2479  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
2480  *   rest. For example, adding returning device flow to flow->dev_flow list and
2481  *   setting backward reference to the flow should be done out of this function.
2482  *   layers field is not filled either.
2483  *
2484  * @param[in] dev
2485  *   Pointer to the dev structure.
2486  * @param[in] attr
2487  *   Pointer to the flow attributes.
2488  * @param[in] items
2489  *   Pointer to the list of items.
2490  * @param[in] actions
2491  *   Pointer to the list of actions.
2492  * @param[out] error
2493  *   Pointer to the error structure.
2494  *
2495  * @return
2496  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
2497  */
2498 static inline struct mlx5_flow *
2499 flow_drv_prepare(struct rte_eth_dev *dev,
2500                  const struct rte_flow *flow,
2501                  const struct rte_flow_attr *attr,
2502                  const struct rte_flow_item items[],
2503                  const struct rte_flow_action actions[],
2504                  struct rte_flow_error *error)
2505 {
2506         const struct mlx5_flow_driver_ops *fops;
2507         enum mlx5_flow_drv_type type = flow->drv_type;
2508
2509         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2510         fops = flow_get_drv_ops(type);
2511         return fops->prepare(dev, attr, items, actions, error);
2512 }
2513
2514 /**
2515  * Flow driver translation API. This abstracts calling driver specific
2516  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2517  * translates a generic flow into a driver flow. flow_drv_prepare() must
2518  * precede.
2519  *
2520  * @note
2521  *   dev_flow->layers could be filled as a result of parsing during translation
2522  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2523  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2524  *   flow->actions could be overwritten even though all the expanded dev_flows
2525  *   have the same actions.
2526  *
2527  * @param[in] dev
2528  *   Pointer to the rte dev structure.
2529  * @param[in, out] dev_flow
2530  *   Pointer to the mlx5 flow.
2531  * @param[in] attr
2532  *   Pointer to the flow attributes.
2533  * @param[in] items
2534  *   Pointer to the list of items.
2535  * @param[in] actions
2536  *   Pointer to the list of actions.
2537  * @param[out] error
2538  *   Pointer to the error structure.
2539  *
2540  * @return
2541  *   0 on success, a negative errno value otherwise and rte_errno is set.
2542  */
2543 static inline int
2544 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2545                    const struct rte_flow_attr *attr,
2546                    const struct rte_flow_item items[],
2547                    const struct rte_flow_action actions[],
2548                    struct rte_flow_error *error)
2549 {
2550         const struct mlx5_flow_driver_ops *fops;
2551         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2552
2553         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2554         fops = flow_get_drv_ops(type);
2555         return fops->translate(dev, dev_flow, attr, items, actions, error);
2556 }
2557
2558 /**
2559  * Flow driver apply API. This abstracts calling driver specific functions.
2560  * Parent flow (rte_flow) should have driver type (drv_type). It applies
2561  * translated driver flows on to device. flow_drv_translate() must precede.
2562  *
2563  * @param[in] dev
2564  *   Pointer to Ethernet device structure.
2565  * @param[in, out] flow
2566  *   Pointer to flow structure.
2567  * @param[out] error
2568  *   Pointer to error structure.
2569  *
2570  * @return
2571  *   0 on success, a negative errno value otherwise and rte_errno is set.
2572  */
2573 static inline int
2574 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2575                struct rte_flow_error *error)
2576 {
2577         const struct mlx5_flow_driver_ops *fops;
2578         enum mlx5_flow_drv_type type = flow->drv_type;
2579
2580         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2581         fops = flow_get_drv_ops(type);
2582         return fops->apply(dev, flow, error);
2583 }
2584
2585 /**
2586  * Flow driver remove API. This abstracts calling driver specific functions.
2587  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2588  * on device. All the resources of the flow should be freed by calling
2589  * flow_drv_destroy().
2590  *
2591  * @param[in] dev
2592  *   Pointer to Ethernet device.
2593  * @param[in, out] flow
2594  *   Pointer to flow structure.
2595  */
2596 static inline void
2597 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2598 {
2599         const struct mlx5_flow_driver_ops *fops;
2600         enum mlx5_flow_drv_type type = flow->drv_type;
2601
2602         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2603         fops = flow_get_drv_ops(type);
2604         fops->remove(dev, flow);
2605 }
2606
2607 /**
2608  * Flow driver destroy API. This abstracts calling driver specific functions.
2609  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2610  * on device and releases resources of the flow.
2611  *
2612  * @param[in] dev
2613  *   Pointer to Ethernet device.
2614  * @param[in, out] flow
2615  *   Pointer to flow structure.
2616  */
2617 static inline void
2618 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2619 {
2620         const struct mlx5_flow_driver_ops *fops;
2621         enum mlx5_flow_drv_type type = flow->drv_type;
2622
2623         flow_mreg_split_qrss_release(dev, flow);
2624         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2625         fops = flow_get_drv_ops(type);
2626         fops->destroy(dev, flow);
2627 }
2628
2629 /**
2630  * Validate a flow supported by the NIC.
2631  *
2632  * @see rte_flow_validate()
2633  * @see rte_flow_ops
2634  */
2635 int
2636 mlx5_flow_validate(struct rte_eth_dev *dev,
2637                    const struct rte_flow_attr *attr,
2638                    const struct rte_flow_item items[],
2639                    const struct rte_flow_action actions[],
2640                    struct rte_flow_error *error)
2641 {
2642         int ret;
2643
2644         ret = flow_drv_validate(dev, attr, items, actions, true, error);
2645         if (ret < 0)
2646                 return ret;
2647         return 0;
2648 }
2649
2650 /**
2651  * Get RSS action from the action list.
2652  *
2653  * @param[in] actions
2654  *   Pointer to the list of actions.
2655  *
2656  * @return
2657  *   Pointer to the RSS action if exist, else return NULL.
2658  */
2659 static const struct rte_flow_action_rss*
2660 flow_get_rss_action(const struct rte_flow_action actions[])
2661 {
2662         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2663                 switch (actions->type) {
2664                 case RTE_FLOW_ACTION_TYPE_RSS:
2665                         return (const struct rte_flow_action_rss *)
2666                                actions->conf;
2667                 default:
2668                         break;
2669                 }
2670         }
2671         return NULL;
2672 }
2673
2674 static unsigned int
2675 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2676 {
2677         const struct rte_flow_item *item;
2678         unsigned int has_vlan = 0;
2679
2680         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2681                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2682                         has_vlan = 1;
2683                         break;
2684                 }
2685         }
2686         if (has_vlan)
2687                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2688                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2689         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2690                                MLX5_EXPANSION_ROOT_OUTER;
2691 }
2692
2693 /**
2694  *  Get layer flags from the prefix flow.
2695  *
2696  *  Some flows may be split to several subflows, the prefix subflow gets the
2697  *  match items and the suffix sub flow gets the actions.
2698  *  Some actions need the user defined match item flags to get the detail for
2699  *  the action.
2700  *  This function helps the suffix flow to get the item layer flags from prefix
2701  *  subflow.
2702  *
2703  * @param[in] dev_flow
2704  *   Pointer the created preifx subflow.
2705  *
2706  * @return
2707  *   The layers get from prefix subflow.
2708  */
2709 static inline uint64_t
2710 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
2711 {
2712         uint64_t layers = 0;
2713
2714         /*
2715          * Layers bits could be localization, but usually the compiler will
2716          * help to do the optimization work for source code.
2717          * If no decap actions, use the layers directly.
2718          */
2719         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
2720                 return dev_flow->handle->layers;
2721         /* Convert L3 layers with decap action. */
2722         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
2723                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2724         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
2725                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2726         /* Convert L4 layers with decap action.  */
2727         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
2728                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
2729         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
2730                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
2731         return layers;
2732 }
2733
2734 /**
2735  * Get metadata split action information.
2736  *
2737  * @param[in] actions
2738  *   Pointer to the list of actions.
2739  * @param[out] qrss
2740  *   Pointer to the return pointer.
2741  * @param[out] qrss_type
2742  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
2743  *   if no QUEUE/RSS is found.
2744  * @param[out] encap_idx
2745  *   Pointer to the index of the encap action if exists, otherwise the last
2746  *   action index.
2747  *
2748  * @return
2749  *   Total number of actions.
2750  */
2751 static int
2752 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
2753                                        const struct rte_flow_action **qrss,
2754                                        int *encap_idx)
2755 {
2756         const struct rte_flow_action_raw_encap *raw_encap;
2757         int actions_n = 0;
2758         int raw_decap_idx = -1;
2759
2760         *encap_idx = -1;
2761         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2762                 switch (actions->type) {
2763                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2764                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2765                         *encap_idx = actions_n;
2766                         break;
2767                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
2768                         raw_decap_idx = actions_n;
2769                         break;
2770                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2771                         raw_encap = actions->conf;
2772                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2773                                 *encap_idx = raw_decap_idx != -1 ?
2774                                                       raw_decap_idx : actions_n;
2775                         break;
2776                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2777                 case RTE_FLOW_ACTION_TYPE_RSS:
2778                         *qrss = actions;
2779                         break;
2780                 default:
2781                         break;
2782                 }
2783                 actions_n++;
2784         }
2785         if (*encap_idx == -1)
2786                 *encap_idx = actions_n;
2787         /* Count RTE_FLOW_ACTION_TYPE_END. */
2788         return actions_n + 1;
2789 }
2790
2791 /**
2792  * Check meter action from the action list.
2793  *
2794  * @param[in] actions
2795  *   Pointer to the list of actions.
2796  * @param[out] mtr
2797  *   Pointer to the meter exist flag.
2798  *
2799  * @return
2800  *   Total number of actions.
2801  */
2802 static int
2803 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
2804 {
2805         int actions_n = 0;
2806
2807         MLX5_ASSERT(mtr);
2808         *mtr = 0;
2809         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2810                 switch (actions->type) {
2811                 case RTE_FLOW_ACTION_TYPE_METER:
2812                         *mtr = 1;
2813                         break;
2814                 default:
2815                         break;
2816                 }
2817                 actions_n++;
2818         }
2819         /* Count RTE_FLOW_ACTION_TYPE_END. */
2820         return actions_n + 1;
2821 }
2822
2823 /**
2824  * Check if the flow should be splited due to hairpin.
2825  * The reason for the split is that in current HW we can't
2826  * support encap on Rx, so if a flow have encap we move it
2827  * to Tx.
2828  *
2829  * @param dev
2830  *   Pointer to Ethernet device.
2831  * @param[in] attr
2832  *   Flow rule attributes.
2833  * @param[in] actions
2834  *   Associated actions (list terminated by the END action).
2835  *
2836  * @return
2837  *   > 0 the number of actions and the flow should be split,
2838  *   0 when no split required.
2839  */
2840 static int
2841 flow_check_hairpin_split(struct rte_eth_dev *dev,
2842                          const struct rte_flow_attr *attr,
2843                          const struct rte_flow_action actions[])
2844 {
2845         int queue_action = 0;
2846         int action_n = 0;
2847         int encap = 0;
2848         const struct rte_flow_action_queue *queue;
2849         const struct rte_flow_action_rss *rss;
2850         const struct rte_flow_action_raw_encap *raw_encap;
2851
2852         if (!attr->ingress)
2853                 return 0;
2854         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2855                 switch (actions->type) {
2856                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2857                         queue = actions->conf;
2858                         if (queue == NULL)
2859                                 return 0;
2860                         if (mlx5_rxq_get_type(dev, queue->index) !=
2861                             MLX5_RXQ_TYPE_HAIRPIN)
2862                                 return 0;
2863                         queue_action = 1;
2864                         action_n++;
2865                         break;
2866                 case RTE_FLOW_ACTION_TYPE_RSS:
2867                         rss = actions->conf;
2868                         if (rss == NULL || rss->queue_num == 0)
2869                                 return 0;
2870                         if (mlx5_rxq_get_type(dev, rss->queue[0]) !=
2871                             MLX5_RXQ_TYPE_HAIRPIN)
2872                                 return 0;
2873                         queue_action = 1;
2874                         action_n++;
2875                         break;
2876                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2877                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2878                         encap = 1;
2879                         action_n++;
2880                         break;
2881                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2882                         raw_encap = actions->conf;
2883                         if (raw_encap->size >
2884                             (sizeof(struct rte_flow_item_eth) +
2885                              sizeof(struct rte_flow_item_ipv4)))
2886                                 encap = 1;
2887                         action_n++;
2888                         break;
2889                 default:
2890                         action_n++;
2891                         break;
2892                 }
2893         }
2894         if (encap == 1 && queue_action)
2895                 return action_n;
2896         return 0;
2897 }
2898
2899 /* Declare flow create/destroy prototype in advance. */
2900 static struct rte_flow *
2901 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2902                  const struct rte_flow_attr *attr,
2903                  const struct rte_flow_item items[],
2904                  const struct rte_flow_action actions[],
2905                  bool external, struct rte_flow_error *error);
2906
2907 static void
2908 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2909                   struct rte_flow *flow);
2910
2911 /**
2912  * Add a flow of copying flow metadata registers in RX_CP_TBL.
2913  *
2914  * As mark_id is unique, if there's already a registered flow for the mark_id,
2915  * return by increasing the reference counter of the resource. Otherwise, create
2916  * the resource (mcp_res) and flow.
2917  *
2918  * Flow looks like,
2919  *   - If ingress port is ANY and reg_c[1] is mark_id,
2920  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
2921  *
2922  * For default flow (zero mark_id), flow is like,
2923  *   - If ingress port is ANY,
2924  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
2925  *
2926  * @param dev
2927  *   Pointer to Ethernet device.
2928  * @param mark_id
2929  *   ID of MARK action, zero means default flow for META.
2930  * @param[out] error
2931  *   Perform verbose error reporting if not NULL.
2932  *
2933  * @return
2934  *   Associated resource on success, NULL otherwise and rte_errno is set.
2935  */
2936 static struct mlx5_flow_mreg_copy_resource *
2937 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
2938                           struct rte_flow_error *error)
2939 {
2940         struct mlx5_priv *priv = dev->data->dev_private;
2941         struct rte_flow_attr attr = {
2942                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
2943                 .ingress = 1,
2944         };
2945         struct mlx5_rte_flow_item_tag tag_spec = {
2946                 .data = mark_id,
2947         };
2948         struct rte_flow_item items[] = {
2949                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
2950         };
2951         struct rte_flow_action_mark ftag = {
2952                 .id = mark_id,
2953         };
2954         struct mlx5_flow_action_copy_mreg cp_mreg = {
2955                 .dst = REG_B,
2956                 .src = 0,
2957         };
2958         struct rte_flow_action_jump jump = {
2959                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
2960         };
2961         struct rte_flow_action actions[] = {
2962                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
2963         };
2964         struct mlx5_flow_mreg_copy_resource *mcp_res;
2965         int ret;
2966
2967         /* Fill the register fileds in the flow. */
2968         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2969         if (ret < 0)
2970                 return NULL;
2971         tag_spec.id = ret;
2972         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
2973         if (ret < 0)
2974                 return NULL;
2975         cp_mreg.src = ret;
2976         /* Check if already registered. */
2977         MLX5_ASSERT(priv->mreg_cp_tbl);
2978         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id);
2979         if (mcp_res) {
2980                 /* For non-default rule. */
2981                 if (mark_id != MLX5_DEFAULT_COPY_ID)
2982                         mcp_res->refcnt++;
2983                 MLX5_ASSERT(mark_id != MLX5_DEFAULT_COPY_ID ||
2984                             mcp_res->refcnt == 1);
2985                 return mcp_res;
2986         }
2987         /* Provide the full width of FLAG specific value. */
2988         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
2989                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
2990         /* Build a new flow. */
2991         if (mark_id != MLX5_DEFAULT_COPY_ID) {
2992                 items[0] = (struct rte_flow_item){
2993                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
2994                         .spec = &tag_spec,
2995                 };
2996                 items[1] = (struct rte_flow_item){
2997                         .type = RTE_FLOW_ITEM_TYPE_END,
2998                 };
2999                 actions[0] = (struct rte_flow_action){
3000                         .type = MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3001                         .conf = &ftag,
3002                 };
3003                 actions[1] = (struct rte_flow_action){
3004                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3005                         .conf = &cp_mreg,
3006                 };
3007                 actions[2] = (struct rte_flow_action){
3008                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3009                         .conf = &jump,
3010                 };
3011                 actions[3] = (struct rte_flow_action){
3012                         .type = RTE_FLOW_ACTION_TYPE_END,
3013                 };
3014         } else {
3015                 /* Default rule, wildcard match. */
3016                 attr.priority = MLX5_FLOW_PRIO_RSVD;
3017                 items[0] = (struct rte_flow_item){
3018                         .type = RTE_FLOW_ITEM_TYPE_END,
3019                 };
3020                 actions[0] = (struct rte_flow_action){
3021                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3022                         .conf = &cp_mreg,
3023                 };
3024                 actions[1] = (struct rte_flow_action){
3025                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3026                         .conf = &jump,
3027                 };
3028                 actions[2] = (struct rte_flow_action){
3029                         .type = RTE_FLOW_ACTION_TYPE_END,
3030                 };
3031         }
3032         /* Build a new entry. */
3033         mcp_res = rte_zmalloc(__func__, sizeof(*mcp_res), 0);
3034         if (!mcp_res) {
3035                 rte_errno = ENOMEM;
3036                 return NULL;
3037         }
3038         /*
3039          * The copy Flows are not included in any list. There
3040          * ones are referenced from other Flows and can not
3041          * be applied, removed, deleted in ardbitrary order
3042          * by list traversing.
3043          */
3044         mcp_res->flow = flow_list_create(dev, NULL, &attr, items,
3045                                          actions, false, error);
3046         if (!mcp_res->flow)
3047                 goto error;
3048         mcp_res->refcnt++;
3049         mcp_res->hlist_ent.key = mark_id;
3050         ret = mlx5_hlist_insert(priv->mreg_cp_tbl,
3051                                 &mcp_res->hlist_ent);
3052         MLX5_ASSERT(!ret);
3053         if (ret)
3054                 goto error;
3055         return mcp_res;
3056 error:
3057         if (mcp_res->flow)
3058                 flow_list_destroy(dev, NULL, mcp_res->flow);
3059         rte_free(mcp_res);
3060         return NULL;
3061 }
3062
3063 /**
3064  * Release flow in RX_CP_TBL.
3065  *
3066  * @param dev
3067  *   Pointer to Ethernet device.
3068  * @flow
3069  *   Parent flow for wich copying is provided.
3070  */
3071 static void
3072 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3073                           struct rte_flow *flow)
3074 {
3075         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3076         struct mlx5_priv *priv = dev->data->dev_private;
3077
3078         if (!mcp_res || !priv->mreg_cp_tbl)
3079                 return;
3080         if (flow->copy_applied) {
3081                 MLX5_ASSERT(mcp_res->appcnt);
3082                 flow->copy_applied = 0;
3083                 --mcp_res->appcnt;
3084                 if (!mcp_res->appcnt)
3085                         flow_drv_remove(dev, mcp_res->flow);
3086         }
3087         /*
3088          * We do not check availability of metadata registers here,
3089          * because copy resources are not allocated in this case.
3090          */
3091         if (--mcp_res->refcnt)
3092                 return;
3093         MLX5_ASSERT(mcp_res->flow);
3094         flow_list_destroy(dev, NULL, mcp_res->flow);
3095         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3096         rte_free(mcp_res);
3097         flow->mreg_copy = NULL;
3098 }
3099
3100 /**
3101  * Start flow in RX_CP_TBL.
3102  *
3103  * @param dev
3104  *   Pointer to Ethernet device.
3105  * @flow
3106  *   Parent flow for wich copying is provided.
3107  *
3108  * @return
3109  *   0 on success, a negative errno value otherwise and rte_errno is set.
3110  */
3111 static int
3112 flow_mreg_start_copy_action(struct rte_eth_dev *dev,
3113                             struct rte_flow *flow)
3114 {
3115         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3116         int ret;
3117
3118         if (!mcp_res || flow->copy_applied)
3119                 return 0;
3120         if (!mcp_res->appcnt) {
3121                 ret = flow_drv_apply(dev, mcp_res->flow, NULL);
3122                 if (ret)
3123                         return ret;
3124         }
3125         ++mcp_res->appcnt;
3126         flow->copy_applied = 1;
3127         return 0;
3128 }
3129
3130 /**
3131  * Stop flow in RX_CP_TBL.
3132  *
3133  * @param dev
3134  *   Pointer to Ethernet device.
3135  * @flow
3136  *   Parent flow for wich copying is provided.
3137  */
3138 static void
3139 flow_mreg_stop_copy_action(struct rte_eth_dev *dev,
3140                            struct rte_flow *flow)
3141 {
3142         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3143
3144         if (!mcp_res || !flow->copy_applied)
3145                 return;
3146         MLX5_ASSERT(mcp_res->appcnt);
3147         --mcp_res->appcnt;
3148         flow->copy_applied = 0;
3149         if (!mcp_res->appcnt)
3150                 flow_drv_remove(dev, mcp_res->flow);
3151 }
3152
3153 /**
3154  * Remove the default copy action from RX_CP_TBL.
3155  *
3156  * @param dev
3157  *   Pointer to Ethernet device.
3158  */
3159 static void
3160 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3161 {
3162         struct mlx5_flow_mreg_copy_resource *mcp_res;
3163         struct mlx5_priv *priv = dev->data->dev_private;
3164
3165         /* Check if default flow is registered. */
3166         if (!priv->mreg_cp_tbl)
3167                 return;
3168         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl,
3169                                             MLX5_DEFAULT_COPY_ID);
3170         if (!mcp_res)
3171                 return;
3172         MLX5_ASSERT(mcp_res->flow);
3173         flow_list_destroy(dev, NULL, mcp_res->flow);
3174         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3175         rte_free(mcp_res);
3176 }
3177
3178 /**
3179  * Add the default copy action in in RX_CP_TBL.
3180  *
3181  * @param dev
3182  *   Pointer to Ethernet device.
3183  * @param[out] error
3184  *   Perform verbose error reporting if not NULL.
3185  *
3186  * @return
3187  *   0 for success, negative value otherwise and rte_errno is set.
3188  */
3189 static int
3190 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3191                                   struct rte_flow_error *error)
3192 {
3193         struct mlx5_priv *priv = dev->data->dev_private;
3194         struct mlx5_flow_mreg_copy_resource *mcp_res;
3195
3196         /* Check whether extensive metadata feature is engaged. */
3197         if (!priv->config.dv_flow_en ||
3198             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3199             !mlx5_flow_ext_mreg_supported(dev) ||
3200             !priv->sh->dv_regc0_mask)
3201                 return 0;
3202         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
3203         if (!mcp_res)
3204                 return -rte_errno;
3205         return 0;
3206 }
3207
3208 /**
3209  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3210  *
3211  * All the flow having Q/RSS action should be split by
3212  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3213  * performs the following,
3214  *   - CQE->flow_tag := reg_c[1] (MARK)
3215  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3216  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3217  * but there should be a flow per each MARK ID set by MARK action.
3218  *
3219  * For the aforementioned reason, if there's a MARK action in flow's action
3220  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3221  * the MARK ID to CQE's flow_tag like,
3222  *   - If reg_c[1] is mark_id,
3223  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3224  *
3225  * For SET_META action which stores value in reg_c[0], as the destination is
3226  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3227  * MARK ID means the default flow. The default flow looks like,
3228  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3229  *
3230  * @param dev
3231  *   Pointer to Ethernet device.
3232  * @param flow
3233  *   Pointer to flow structure.
3234  * @param[in] actions
3235  *   Pointer to the list of actions.
3236  * @param[out] error
3237  *   Perform verbose error reporting if not NULL.
3238  *
3239  * @return
3240  *   0 on success, negative value otherwise and rte_errno is set.
3241  */
3242 static int
3243 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3244                             struct rte_flow *flow,
3245                             const struct rte_flow_action *actions,
3246                             struct rte_flow_error *error)
3247 {
3248         struct mlx5_priv *priv = dev->data->dev_private;
3249         struct mlx5_dev_config *config = &priv->config;
3250         struct mlx5_flow_mreg_copy_resource *mcp_res;
3251         const struct rte_flow_action_mark *mark;
3252
3253         /* Check whether extensive metadata feature is engaged. */
3254         if (!config->dv_flow_en ||
3255             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3256             !mlx5_flow_ext_mreg_supported(dev) ||
3257             !priv->sh->dv_regc0_mask)
3258                 return 0;
3259         /* Find MARK action. */
3260         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3261                 switch (actions->type) {
3262                 case RTE_FLOW_ACTION_TYPE_FLAG:
3263                         mcp_res = flow_mreg_add_copy_action
3264                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
3265                         if (!mcp_res)
3266                                 return -rte_errno;
3267                         flow->mreg_copy = mcp_res;
3268                         if (dev->data->dev_started) {
3269                                 mcp_res->appcnt++;
3270                                 flow->copy_applied = 1;
3271                         }
3272                         return 0;
3273                 case RTE_FLOW_ACTION_TYPE_MARK:
3274                         mark = (const struct rte_flow_action_mark *)
3275                                 actions->conf;
3276                         mcp_res =
3277                                 flow_mreg_add_copy_action(dev, mark->id, error);
3278                         if (!mcp_res)
3279                                 return -rte_errno;
3280                         flow->mreg_copy = mcp_res;
3281                         if (dev->data->dev_started) {
3282                                 mcp_res->appcnt++;
3283                                 flow->copy_applied = 1;
3284                         }
3285                         return 0;
3286                 default:
3287                         break;
3288                 }
3289         }
3290         return 0;
3291 }
3292
3293 #define MLX5_MAX_SPLIT_ACTIONS 24
3294 #define MLX5_MAX_SPLIT_ITEMS 24
3295
3296 /**
3297  * Split the hairpin flow.
3298  * Since HW can't support encap on Rx we move the encap to Tx.
3299  * If the count action is after the encap then we also
3300  * move the count action. in this case the count will also measure
3301  * the outer bytes.
3302  *
3303  * @param dev
3304  *   Pointer to Ethernet device.
3305  * @param[in] actions
3306  *   Associated actions (list terminated by the END action).
3307  * @param[out] actions_rx
3308  *   Rx flow actions.
3309  * @param[out] actions_tx
3310  *   Tx flow actions..
3311  * @param[out] pattern_tx
3312  *   The pattern items for the Tx flow.
3313  * @param[out] flow_id
3314  *   The flow ID connected to this flow.
3315  *
3316  * @return
3317  *   0 on success.
3318  */
3319 static int
3320 flow_hairpin_split(struct rte_eth_dev *dev,
3321                    const struct rte_flow_action actions[],
3322                    struct rte_flow_action actions_rx[],
3323                    struct rte_flow_action actions_tx[],
3324                    struct rte_flow_item pattern_tx[],
3325                    uint32_t *flow_id)
3326 {
3327         struct mlx5_priv *priv = dev->data->dev_private;
3328         const struct rte_flow_action_raw_encap *raw_encap;
3329         const struct rte_flow_action_raw_decap *raw_decap;
3330         struct mlx5_rte_flow_action_set_tag *set_tag;
3331         struct rte_flow_action *tag_action;
3332         struct mlx5_rte_flow_item_tag *tag_item;
3333         struct rte_flow_item *item;
3334         char *addr;
3335         int encap = 0;
3336
3337         mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
3338         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3339                 switch (actions->type) {
3340                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3341                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3342                         rte_memcpy(actions_tx, actions,
3343                                sizeof(struct rte_flow_action));
3344                         actions_tx++;
3345                         break;
3346                 case RTE_FLOW_ACTION_TYPE_COUNT:
3347                         if (encap) {
3348                                 rte_memcpy(actions_tx, actions,
3349                                            sizeof(struct rte_flow_action));
3350                                 actions_tx++;
3351                         } else {
3352                                 rte_memcpy(actions_rx, actions,
3353                                            sizeof(struct rte_flow_action));
3354                                 actions_rx++;
3355                         }
3356                         break;
3357                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3358                         raw_encap = actions->conf;
3359                         if (raw_encap->size >
3360                             (sizeof(struct rte_flow_item_eth) +
3361                              sizeof(struct rte_flow_item_ipv4))) {
3362                                 memcpy(actions_tx, actions,
3363                                        sizeof(struct rte_flow_action));
3364                                 actions_tx++;
3365                                 encap = 1;
3366                         } else {
3367                                 rte_memcpy(actions_rx, actions,
3368                                            sizeof(struct rte_flow_action));
3369                                 actions_rx++;
3370                         }
3371                         break;
3372                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3373                         raw_decap = actions->conf;
3374                         if (raw_decap->size <
3375                             (sizeof(struct rte_flow_item_eth) +
3376                              sizeof(struct rte_flow_item_ipv4))) {
3377                                 memcpy(actions_tx, actions,
3378                                        sizeof(struct rte_flow_action));
3379                                 actions_tx++;
3380                         } else {
3381                                 rte_memcpy(actions_rx, actions,
3382                                            sizeof(struct rte_flow_action));
3383                                 actions_rx++;
3384                         }
3385                         break;
3386                 default:
3387                         rte_memcpy(actions_rx, actions,
3388                                    sizeof(struct rte_flow_action));
3389                         actions_rx++;
3390                         break;
3391                 }
3392         }
3393         /* Add set meta action and end action for the Rx flow. */
3394         tag_action = actions_rx;
3395         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3396         actions_rx++;
3397         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
3398         actions_rx++;
3399         set_tag = (void *)actions_rx;
3400         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
3401         MLX5_ASSERT(set_tag->id > REG_NONE);
3402         set_tag->data = *flow_id;
3403         tag_action->conf = set_tag;
3404         /* Create Tx item list. */
3405         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
3406         addr = (void *)&pattern_tx[2];
3407         item = pattern_tx;
3408         item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3409         tag_item = (void *)addr;
3410         tag_item->data = *flow_id;
3411         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
3412         MLX5_ASSERT(set_tag->id > REG_NONE);
3413         item->spec = tag_item;
3414         addr += sizeof(struct mlx5_rte_flow_item_tag);
3415         tag_item = (void *)addr;
3416         tag_item->data = UINT32_MAX;
3417         tag_item->id = UINT16_MAX;
3418         item->mask = tag_item;
3419         addr += sizeof(struct mlx5_rte_flow_item_tag);
3420         item->last = NULL;
3421         item++;
3422         item->type = RTE_FLOW_ITEM_TYPE_END;
3423         return 0;
3424 }
3425
3426 /**
3427  * The last stage of splitting chain, just creates the subflow
3428  * without any modification.
3429  *
3430  * @param[in] dev
3431  *   Pointer to Ethernet device.
3432  * @param[in] flow
3433  *   Parent flow structure pointer.
3434  * @param[in, out] sub_flow
3435  *   Pointer to return the created subflow, may be NULL.
3436  * @param[in] prefix_layers
3437  *   Prefix subflow layers, may be 0.
3438  * @param[in] attr
3439  *   Flow rule attributes.
3440  * @param[in] items
3441  *   Pattern specification (list terminated by the END pattern item).
3442  * @param[in] actions
3443  *   Associated actions (list terminated by the END action).
3444  * @param[in] external
3445  *   This flow rule is created by request external to PMD.
3446  * @param[out] error
3447  *   Perform verbose error reporting if not NULL.
3448  * @return
3449  *   0 on success, negative value otherwise
3450  */
3451 static int
3452 flow_create_split_inner(struct rte_eth_dev *dev,
3453                         struct rte_flow *flow,
3454                         struct mlx5_flow **sub_flow,
3455                         uint64_t prefix_layers,
3456                         const struct rte_flow_attr *attr,
3457                         const struct rte_flow_item items[],
3458                         const struct rte_flow_action actions[],
3459                         bool external, struct rte_flow_error *error)
3460 {
3461         struct mlx5_flow *dev_flow;
3462
3463         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions, error);
3464         if (!dev_flow)
3465                 return -rte_errno;
3466         dev_flow->flow = flow;
3467         dev_flow->external = external;
3468         /* Subflow object was created, we must include one in the list. */
3469         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
3470                       dev_flow->handle, next);
3471         /*
3472          * If dev_flow is as one of the suffix flow, some actions in suffix
3473          * flow may need some user defined item layer flags.
3474          */
3475         if (prefix_layers)
3476                 dev_flow->handle->layers = prefix_layers;
3477         if (sub_flow)
3478                 *sub_flow = dev_flow;
3479         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
3480 }
3481
3482 /**
3483  * Split the meter flow.
3484  *
3485  * As meter flow will split to three sub flow, other than meter
3486  * action, the other actions make sense to only meter accepts
3487  * the packet. If it need to be dropped, no other additional
3488  * actions should be take.
3489  *
3490  * One kind of special action which decapsulates the L3 tunnel
3491  * header will be in the prefix sub flow, as not to take the
3492  * L3 tunnel header into account.
3493  *
3494  * @param dev
3495  *   Pointer to Ethernet device.
3496  * @param[in] items
3497  *   Pattern specification (list terminated by the END pattern item).
3498  * @param[out] sfx_items
3499  *   Suffix flow match items (list terminated by the END pattern item).
3500  * @param[in] actions
3501  *   Associated actions (list terminated by the END action).
3502  * @param[out] actions_sfx
3503  *   Suffix flow actions.
3504  * @param[out] actions_pre
3505  *   Prefix flow actions.
3506  * @param[out] pattern_sfx
3507  *   The pattern items for the suffix flow.
3508  * @param[out] tag_sfx
3509  *   Pointer to suffix flow tag.
3510  *
3511  * @return
3512  *   0 on success.
3513  */
3514 static int
3515 flow_meter_split_prep(struct rte_eth_dev *dev,
3516                  const struct rte_flow_item items[],
3517                  struct rte_flow_item sfx_items[],
3518                  const struct rte_flow_action actions[],
3519                  struct rte_flow_action actions_sfx[],
3520                  struct rte_flow_action actions_pre[])
3521 {
3522         struct rte_flow_action *tag_action = NULL;
3523         struct rte_flow_item *tag_item;
3524         struct mlx5_rte_flow_action_set_tag *set_tag;
3525         struct rte_flow_error error;
3526         const struct rte_flow_action_raw_encap *raw_encap;
3527         const struct rte_flow_action_raw_decap *raw_decap;
3528         struct mlx5_rte_flow_item_tag *tag_spec;
3529         struct mlx5_rte_flow_item_tag *tag_mask;
3530         uint32_t tag_id;
3531         bool copy_vlan = false;
3532
3533         /* Prepare the actions for prefix and suffix flow. */
3534         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3535                 struct rte_flow_action **action_cur = NULL;
3536
3537                 switch (actions->type) {
3538                 case RTE_FLOW_ACTION_TYPE_METER:
3539                         /* Add the extra tag action first. */
3540                         tag_action = actions_pre;
3541                         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3542                         actions_pre++;
3543                         action_cur = &actions_pre;
3544                         break;
3545                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3546                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3547                         action_cur = &actions_pre;
3548                         break;
3549                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3550                         raw_encap = actions->conf;
3551                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
3552                                 action_cur = &actions_pre;
3553                         break;
3554                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3555                         raw_decap = actions->conf;
3556                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3557                                 action_cur = &actions_pre;
3558                         break;
3559                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3560                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3561                         copy_vlan = true;
3562                         break;
3563                 default:
3564                         break;
3565                 }
3566                 if (!action_cur)
3567                         action_cur = &actions_sfx;
3568                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
3569                 (*action_cur)++;
3570         }
3571         /* Add end action to the actions. */
3572         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
3573         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
3574         actions_pre++;
3575         /* Set the tag. */
3576         set_tag = (void *)actions_pre;
3577         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3578         /*
3579          * Get the id from the qrss_pool to make qrss share the id with meter.
3580          */
3581         tag_id = flow_qrss_get_id(dev);
3582         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
3583         assert(tag_action);
3584         tag_action->conf = set_tag;
3585         /* Prepare the suffix subflow items. */
3586         tag_item = sfx_items++;
3587         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3588                 int item_type = items->type;
3589
3590                 switch (item_type) {
3591                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
3592                         memcpy(sfx_items, items, sizeof(*sfx_items));
3593                         sfx_items++;
3594                         break;
3595                 case RTE_FLOW_ITEM_TYPE_VLAN:
3596                         if (copy_vlan) {
3597                                 memcpy(sfx_items, items, sizeof(*sfx_items));
3598                                 /*
3599                                  * Convert to internal match item, it is used
3600                                  * for vlan push and set vid.
3601                                  */
3602                                 sfx_items->type = MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
3603                                 sfx_items++;
3604                         }
3605                         break;
3606                 default:
3607                         break;
3608                 }
3609         }
3610         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
3611         sfx_items++;
3612         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
3613         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
3614         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3615         tag_mask = tag_spec + 1;
3616         tag_mask->data = 0xffffff00;
3617         tag_item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3618         tag_item->spec = tag_spec;
3619         tag_item->last = NULL;
3620         tag_item->mask = tag_mask;
3621         return tag_id;
3622 }
3623
3624 /**
3625  * Split action list having QUEUE/RSS for metadata register copy.
3626  *
3627  * Once Q/RSS action is detected in user's action list, the flow action
3628  * should be split in order to copy metadata registers, which will happen in
3629  * RX_CP_TBL like,
3630  *   - CQE->flow_tag := reg_c[1] (MARK)
3631  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3632  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
3633  * This is because the last action of each flow must be a terminal action
3634  * (QUEUE, RSS or DROP).
3635  *
3636  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
3637  * stored and kept in the mlx5_flow structure per each sub_flow.
3638  *
3639  * The Q/RSS action is replaced with,
3640  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
3641  * And the following JUMP action is added at the end,
3642  *   - JUMP, to RX_CP_TBL.
3643  *
3644  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
3645  * flow_create_split_metadata() routine. The flow will look like,
3646  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
3647  *
3648  * @param dev
3649  *   Pointer to Ethernet device.
3650  * @param[out] split_actions
3651  *   Pointer to store split actions to jump to CP_TBL.
3652  * @param[in] actions
3653  *   Pointer to the list of original flow actions.
3654  * @param[in] qrss
3655  *   Pointer to the Q/RSS action.
3656  * @param[in] actions_n
3657  *   Number of original actions.
3658  * @param[out] error
3659  *   Perform verbose error reporting if not NULL.
3660  *
3661  * @return
3662  *   non-zero unique flow_id on success, otherwise 0 and
3663  *   error/rte_error are set.
3664  */
3665 static uint32_t
3666 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
3667                           struct rte_flow_action *split_actions,
3668                           const struct rte_flow_action *actions,
3669                           const struct rte_flow_action *qrss,
3670                           int actions_n, struct rte_flow_error *error)
3671 {
3672         struct mlx5_rte_flow_action_set_tag *set_tag;
3673         struct rte_flow_action_jump *jump;
3674         const int qrss_idx = qrss - actions;
3675         uint32_t flow_id = 0;
3676         int ret = 0;
3677
3678         /*
3679          * Given actions will be split
3680          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
3681          * - Add jump to mreg CP_TBL.
3682          * As a result, there will be one more action.
3683          */
3684         ++actions_n;
3685         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
3686         set_tag = (void *)(split_actions + actions_n);
3687         /*
3688          * If tag action is not set to void(it means we are not the meter
3689          * suffix flow), add the tag action. Since meter suffix flow already
3690          * has the tag added.
3691          */
3692         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
3693                 /*
3694                  * Allocate the new subflow ID. This one is unique within
3695                  * device and not shared with representors. Otherwise,
3696                  * we would have to resolve multi-thread access synch
3697                  * issue. Each flow on the shared device is appended
3698                  * with source vport identifier, so the resulting
3699                  * flows will be unique in the shared (by master and
3700                  * representors) domain even if they have coinciding
3701                  * IDs.
3702                  */
3703                 flow_id = flow_qrss_get_id(dev);
3704                 if (!flow_id)
3705                         return rte_flow_error_set(error, ENOMEM,
3706                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3707                                                   NULL, "can't allocate id "
3708                                                   "for split Q/RSS subflow");
3709                 /* Internal SET_TAG action to set flow ID. */
3710                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
3711                         .data = flow_id,
3712                 };
3713                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3714                 if (ret < 0)
3715                         return ret;
3716                 set_tag->id = ret;
3717                 /* Construct new actions array. */
3718                 /* Replace QUEUE/RSS action. */
3719                 split_actions[qrss_idx] = (struct rte_flow_action){
3720                         .type = MLX5_RTE_FLOW_ACTION_TYPE_TAG,
3721                         .conf = set_tag,
3722                 };
3723         }
3724         /* JUMP action to jump to mreg copy table (CP_TBL). */
3725         jump = (void *)(set_tag + 1);
3726         *jump = (struct rte_flow_action_jump){
3727                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3728         };
3729         split_actions[actions_n - 2] = (struct rte_flow_action){
3730                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3731                 .conf = jump,
3732         };
3733         split_actions[actions_n - 1] = (struct rte_flow_action){
3734                 .type = RTE_FLOW_ACTION_TYPE_END,
3735         };
3736         return flow_id;
3737 }
3738
3739 /**
3740  * Extend the given action list for Tx metadata copy.
3741  *
3742  * Copy the given action list to the ext_actions and add flow metadata register
3743  * copy action in order to copy reg_a set by WQE to reg_c[0].
3744  *
3745  * @param[out] ext_actions
3746  *   Pointer to the extended action list.
3747  * @param[in] actions
3748  *   Pointer to the list of actions.
3749  * @param[in] actions_n
3750  *   Number of actions in the list.
3751  * @param[out] error
3752  *   Perform verbose error reporting if not NULL.
3753  * @param[in] encap_idx
3754  *   The encap action inndex.
3755  *
3756  * @return
3757  *   0 on success, negative value otherwise
3758  */
3759 static int
3760 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
3761                        struct rte_flow_action *ext_actions,
3762                        const struct rte_flow_action *actions,
3763                        int actions_n, struct rte_flow_error *error,
3764                        int encap_idx)
3765 {
3766         struct mlx5_flow_action_copy_mreg *cp_mreg =
3767                 (struct mlx5_flow_action_copy_mreg *)
3768                         (ext_actions + actions_n + 1);
3769         int ret;
3770
3771         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3772         if (ret < 0)
3773                 return ret;
3774         cp_mreg->dst = ret;
3775         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
3776         if (ret < 0)
3777                 return ret;
3778         cp_mreg->src = ret;
3779         if (encap_idx != 0)
3780                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
3781         if (encap_idx == actions_n - 1) {
3782                 ext_actions[actions_n - 1] = (struct rte_flow_action){
3783                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3784                         .conf = cp_mreg,
3785                 };
3786                 ext_actions[actions_n] = (struct rte_flow_action){
3787                         .type = RTE_FLOW_ACTION_TYPE_END,
3788                 };
3789         } else {
3790                 ext_actions[encap_idx] = (struct rte_flow_action){
3791                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3792                         .conf = cp_mreg,
3793                 };
3794                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
3795                                 sizeof(*ext_actions) * (actions_n - encap_idx));
3796         }
3797         return 0;
3798 }
3799
3800 /**
3801  * The splitting for metadata feature.
3802  *
3803  * - Q/RSS action on NIC Rx should be split in order to pass by
3804  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
3805  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
3806  *
3807  * - All the actions on NIC Tx should have a mreg copy action to
3808  *   copy reg_a from WQE to reg_c[0].
3809  *
3810  * @param dev
3811  *   Pointer to Ethernet device.
3812  * @param[in] flow
3813  *   Parent flow structure pointer.
3814  * @param[in] prefix_layers
3815  *   Prefix flow layer flags.
3816  * @param[in] attr
3817  *   Flow rule attributes.
3818  * @param[in] items
3819  *   Pattern specification (list terminated by the END pattern item).
3820  * @param[in] actions
3821  *   Associated actions (list terminated by the END action).
3822  * @param[in] external
3823  *   This flow rule is created by request external to PMD.
3824  * @param[out] error
3825  *   Perform verbose error reporting if not NULL.
3826  * @return
3827  *   0 on success, negative value otherwise
3828  */
3829 static int
3830 flow_create_split_metadata(struct rte_eth_dev *dev,
3831                            struct rte_flow *flow,
3832                            uint64_t prefix_layers,
3833                            const struct rte_flow_attr *attr,
3834                            const struct rte_flow_item items[],
3835                            const struct rte_flow_action actions[],
3836                            bool external, struct rte_flow_error *error)
3837 {
3838         struct mlx5_priv *priv = dev->data->dev_private;
3839         struct mlx5_dev_config *config = &priv->config;
3840         const struct rte_flow_action *qrss = NULL;
3841         struct rte_flow_action *ext_actions = NULL;
3842         struct mlx5_flow *dev_flow = NULL;
3843         uint32_t qrss_id = 0;
3844         int mtr_sfx = 0;
3845         size_t act_size;
3846         int actions_n;
3847         int encap_idx;
3848         int ret;
3849
3850         /* Check whether extensive metadata feature is engaged. */
3851         if (!config->dv_flow_en ||
3852             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3853             !mlx5_flow_ext_mreg_supported(dev))
3854                 return flow_create_split_inner(dev, flow, NULL, prefix_layers,
3855                                                attr, items, actions, external,
3856                                                error);
3857         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
3858                                                            &encap_idx);
3859         if (qrss) {
3860                 /* Exclude hairpin flows from splitting. */
3861                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
3862                         const struct rte_flow_action_queue *queue;
3863
3864                         queue = qrss->conf;
3865                         if (mlx5_rxq_get_type(dev, queue->index) ==
3866                             MLX5_RXQ_TYPE_HAIRPIN)
3867                                 qrss = NULL;
3868                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
3869                         const struct rte_flow_action_rss *rss;
3870
3871                         rss = qrss->conf;
3872                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
3873                             MLX5_RXQ_TYPE_HAIRPIN)
3874                                 qrss = NULL;
3875                 }
3876         }
3877         if (qrss) {
3878                 /* Check if it is in meter suffix table. */
3879                 mtr_sfx = attr->group == (attr->transfer ?
3880                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
3881                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
3882                 /*
3883                  * Q/RSS action on NIC Rx should be split in order to pass by
3884                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
3885                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
3886                  */
3887                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3888                            sizeof(struct rte_flow_action_set_tag) +
3889                            sizeof(struct rte_flow_action_jump);
3890                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3891                 if (!ext_actions)
3892                         return rte_flow_error_set(error, ENOMEM,
3893                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3894                                                   NULL, "no memory to split "
3895                                                   "metadata flow");
3896                 /*
3897                  * If we are the suffix flow of meter, tag already exist.
3898                  * Set the tag action to void.
3899                  */
3900                 if (mtr_sfx)
3901                         ext_actions[qrss - actions].type =
3902                                                 RTE_FLOW_ACTION_TYPE_VOID;
3903                 else
3904                         ext_actions[qrss - actions].type =
3905                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3906                 /*
3907                  * Create the new actions list with removed Q/RSS action
3908                  * and appended set tag and jump to register copy table
3909                  * (RX_CP_TBL). We should preallocate unique tag ID here
3910                  * in advance, because it is needed for set tag action.
3911                  */
3912                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
3913                                                     qrss, actions_n, error);
3914                 if (!mtr_sfx && !qrss_id) {
3915                         ret = -rte_errno;
3916                         goto exit;
3917                 }
3918         } else if (attr->egress && !attr->transfer) {
3919                 /*
3920                  * All the actions on NIC Tx should have a metadata register
3921                  * copy action to copy reg_a from WQE to reg_c[meta]
3922                  */
3923                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3924                            sizeof(struct mlx5_flow_action_copy_mreg);
3925                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3926                 if (!ext_actions)
3927                         return rte_flow_error_set(error, ENOMEM,
3928                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3929                                                   NULL, "no memory to split "
3930                                                   "metadata flow");
3931                 /* Create the action list appended with copy register. */
3932                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
3933                                              actions_n, error, encap_idx);
3934                 if (ret < 0)
3935                         goto exit;
3936         }
3937         /* Add the unmodified original or prefix subflow. */
3938         ret = flow_create_split_inner(dev, flow, &dev_flow, prefix_layers, attr,
3939                                       items, ext_actions ? ext_actions :
3940                                       actions, external, error);
3941         if (ret < 0)
3942                 goto exit;
3943         MLX5_ASSERT(dev_flow);
3944         if (qrss) {
3945                 const struct rte_flow_attr q_attr = {
3946                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3947                         .ingress = 1,
3948                 };
3949                 /* Internal PMD action to set register. */
3950                 struct mlx5_rte_flow_item_tag q_tag_spec = {
3951                         .data = qrss_id,
3952                         .id = 0,
3953                 };
3954                 struct rte_flow_item q_items[] = {
3955                         {
3956                                 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3957                                 .spec = &q_tag_spec,
3958                                 .last = NULL,
3959                                 .mask = NULL,
3960                         },
3961                         {
3962                                 .type = RTE_FLOW_ITEM_TYPE_END,
3963                         },
3964                 };
3965                 struct rte_flow_action q_actions[] = {
3966                         {
3967                                 .type = qrss->type,
3968                                 .conf = qrss->conf,
3969                         },
3970                         {
3971                                 .type = RTE_FLOW_ACTION_TYPE_END,
3972                         },
3973                 };
3974                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
3975
3976                 /*
3977                  * Configure the tag item only if there is no meter subflow.
3978                  * Since tag is already marked in the meter suffix subflow
3979                  * we can just use the meter suffix items as is.
3980                  */
3981                 if (qrss_id) {
3982                         /* Not meter subflow. */
3983                         MLX5_ASSERT(!mtr_sfx);
3984                         /*
3985                          * Put unique id in prefix flow due to it is destroyed
3986                          * after suffix flow and id will be freed after there
3987                          * is no actual flows with this id and identifier
3988                          * reallocation becomes possible (for example, for
3989                          * other flows in other threads).
3990                          */
3991                         dev_flow->handle->qrss_id = qrss_id;
3992                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
3993                                                    error);
3994                         if (ret < 0)
3995                                 goto exit;
3996                         q_tag_spec.id = ret;
3997                 }
3998                 dev_flow = NULL;
3999                 /* Add suffix subflow to execute Q/RSS. */
4000                 ret = flow_create_split_inner(dev, flow, &dev_flow, layers,
4001                                               &q_attr, mtr_sfx ? items :
4002                                               q_items, q_actions,
4003                                               external, error);
4004                 if (ret < 0)
4005                         goto exit;
4006                 /* qrss ID should be freed if failed. */
4007                 qrss_id = 0;
4008                 MLX5_ASSERT(dev_flow);
4009         }
4010
4011 exit:
4012         /*
4013          * We do not destroy the partially created sub_flows in case of error.
4014          * These ones are included into parent flow list and will be destroyed
4015          * by flow_drv_destroy.
4016          */
4017         flow_qrss_free_id(dev, qrss_id);
4018         rte_free(ext_actions);
4019         return ret;
4020 }
4021
4022 /**
4023  * The splitting for meter feature.
4024  *
4025  * - The meter flow will be split to two flows as prefix and
4026  *   suffix flow. The packets make sense only it pass the prefix
4027  *   meter action.
4028  *
4029  * - Reg_C_5 is used for the packet to match betweend prefix and
4030  *   suffix flow.
4031  *
4032  * @param dev
4033  *   Pointer to Ethernet device.
4034  * @param[in] flow
4035  *   Parent flow structure pointer.
4036  * @param[in] attr
4037  *   Flow rule attributes.
4038  * @param[in] items
4039  *   Pattern specification (list terminated by the END pattern item).
4040  * @param[in] actions
4041  *   Associated actions (list terminated by the END action).
4042  * @param[in] external
4043  *   This flow rule is created by request external to PMD.
4044  * @param[out] error
4045  *   Perform verbose error reporting if not NULL.
4046  * @return
4047  *   0 on success, negative value otherwise
4048  */
4049 static int
4050 flow_create_split_meter(struct rte_eth_dev *dev,
4051                            struct rte_flow *flow,
4052                            const struct rte_flow_attr *attr,
4053                            const struct rte_flow_item items[],
4054                            const struct rte_flow_action actions[],
4055                            bool external, struct rte_flow_error *error)
4056 {
4057         struct mlx5_priv *priv = dev->data->dev_private;
4058         struct rte_flow_action *sfx_actions = NULL;
4059         struct rte_flow_action *pre_actions = NULL;
4060         struct rte_flow_item *sfx_items = NULL;
4061         struct mlx5_flow *dev_flow = NULL;
4062         struct rte_flow_attr sfx_attr = *attr;
4063         uint32_t mtr = 0;
4064         uint32_t mtr_tag_id = 0;
4065         size_t act_size;
4066         size_t item_size;
4067         int actions_n = 0;
4068         int ret;
4069
4070         if (priv->mtr_en)
4071                 actions_n = flow_check_meter_action(actions, &mtr);
4072         if (mtr) {
4073                 /* The five prefix actions: meter, decap, encap, tag, end. */
4074                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
4075                            sizeof(struct mlx5_rte_flow_action_set_tag);
4076                 /* tag, vlan, port id, end. */
4077 #define METER_SUFFIX_ITEM 4
4078                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
4079                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
4080                 sfx_actions = rte_zmalloc(__func__, (act_size + item_size), 0);
4081                 if (!sfx_actions)
4082                         return rte_flow_error_set(error, ENOMEM,
4083                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4084                                                   NULL, "no memory to split "
4085                                                   "meter flow");
4086                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
4087                              act_size);
4088                 pre_actions = sfx_actions + actions_n;
4089                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
4090                                                    actions, sfx_actions,
4091                                                    pre_actions);
4092                 if (!mtr_tag_id) {
4093                         ret = -rte_errno;
4094                         goto exit;
4095                 }
4096                 /* Add the prefix subflow. */
4097                 ret = flow_create_split_inner(dev, flow, &dev_flow, 0, attr,
4098                                               items, pre_actions, external,
4099                                               error);
4100                 if (ret) {
4101                         ret = -rte_errno;
4102                         goto exit;
4103                 }
4104                 dev_flow->handle->mtr_flow_id = mtr_tag_id;
4105                 /* Setting the sfx group atrr. */
4106                 sfx_attr.group = sfx_attr.transfer ?
4107                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4108                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
4109         }
4110         /* Add the prefix subflow. */
4111         ret = flow_create_split_metadata(dev, flow, dev_flow ?
4112                                          flow_get_prefix_layer_flags(dev_flow) :
4113                                          0, &sfx_attr,
4114                                          sfx_items ? sfx_items : items,
4115                                          sfx_actions ? sfx_actions : actions,
4116                                          external, error);
4117 exit:
4118         if (sfx_actions)
4119                 rte_free(sfx_actions);
4120         return ret;
4121 }
4122
4123 /**
4124  * Split the flow to subflow set. The splitters might be linked
4125  * in the chain, like this:
4126  * flow_create_split_outer() calls:
4127  *   flow_create_split_meter() calls:
4128  *     flow_create_split_metadata(meter_subflow_0) calls:
4129  *       flow_create_split_inner(metadata_subflow_0)
4130  *       flow_create_split_inner(metadata_subflow_1)
4131  *       flow_create_split_inner(metadata_subflow_2)
4132  *     flow_create_split_metadata(meter_subflow_1) calls:
4133  *       flow_create_split_inner(metadata_subflow_0)
4134  *       flow_create_split_inner(metadata_subflow_1)
4135  *       flow_create_split_inner(metadata_subflow_2)
4136  *
4137  * This provide flexible way to add new levels of flow splitting.
4138  * The all of successfully created subflows are included to the
4139  * parent flow dev_flow list.
4140  *
4141  * @param dev
4142  *   Pointer to Ethernet device.
4143  * @param[in] flow
4144  *   Parent flow structure pointer.
4145  * @param[in] attr
4146  *   Flow rule attributes.
4147  * @param[in] items
4148  *   Pattern specification (list terminated by the END pattern item).
4149  * @param[in] actions
4150  *   Associated actions (list terminated by the END action).
4151  * @param[in] external
4152  *   This flow rule is created by request external to PMD.
4153  * @param[out] error
4154  *   Perform verbose error reporting if not NULL.
4155  * @return
4156  *   0 on success, negative value otherwise
4157  */
4158 static int
4159 flow_create_split_outer(struct rte_eth_dev *dev,
4160                         struct rte_flow *flow,
4161                         const struct rte_flow_attr *attr,
4162                         const struct rte_flow_item items[],
4163                         const struct rte_flow_action actions[],
4164                         bool external, struct rte_flow_error *error)
4165 {
4166         int ret;
4167
4168         ret = flow_create_split_meter(dev, flow, attr, items,
4169                                          actions, external, error);
4170         MLX5_ASSERT(ret <= 0);
4171         return ret;
4172 }
4173
4174 /**
4175  * Create a flow and add it to @p list.
4176  *
4177  * @param dev
4178  *   Pointer to Ethernet device.
4179  * @param list
4180  *   Pointer to a TAILQ flow list. If this parameter NULL,
4181  *   no list insertion occurred, flow is just created,
4182  *   this is caller's responsibility to track the
4183  *   created flow.
4184  * @param[in] attr
4185  *   Flow rule attributes.
4186  * @param[in] items
4187  *   Pattern specification (list terminated by the END pattern item).
4188  * @param[in] actions
4189  *   Associated actions (list terminated by the END action).
4190  * @param[in] external
4191  *   This flow rule is created by request external to PMD.
4192  * @param[out] error
4193  *   Perform verbose error reporting if not NULL.
4194  *
4195  * @return
4196  *   A flow on success, NULL otherwise and rte_errno is set.
4197  */
4198 static struct rte_flow *
4199 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
4200                  const struct rte_flow_attr *attr,
4201                  const struct rte_flow_item items[],
4202                  const struct rte_flow_action actions[],
4203                  bool external, struct rte_flow_error *error)
4204 {
4205         struct mlx5_priv *priv = dev->data->dev_private;
4206         struct rte_flow *flow = NULL;
4207         struct mlx5_flow *dev_flow;
4208         const struct rte_flow_action_rss *rss;
4209         union {
4210                 struct rte_flow_expand_rss buf;
4211                 uint8_t buffer[2048];
4212         } expand_buffer;
4213         union {
4214                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4215                 uint8_t buffer[2048];
4216         } actions_rx;
4217         union {
4218                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4219                 uint8_t buffer[2048];
4220         } actions_hairpin_tx;
4221         union {
4222                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
4223                 uint8_t buffer[2048];
4224         } items_tx;
4225         struct rte_flow_expand_rss *buf = &expand_buffer.buf;
4226         const struct rte_flow_action *p_actions_rx = actions;
4227         uint32_t i;
4228         uint32_t flow_size;
4229         int hairpin_flow = 0;
4230         uint32_t hairpin_id = 0;
4231         struct rte_flow_attr attr_tx = { .priority = 0 };
4232         int ret = flow_drv_validate(dev, attr, items, p_actions_rx, external,
4233                                     error);
4234
4235         if (ret < 0)
4236                 return NULL;
4237         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
4238         if (hairpin_flow > 0) {
4239                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
4240                         rte_errno = EINVAL;
4241                         return NULL;
4242                 }
4243                 flow_hairpin_split(dev, actions, actions_rx.actions,
4244                                    actions_hairpin_tx.actions, items_tx.items,
4245                                    &hairpin_id);
4246                 p_actions_rx = actions_rx.actions;
4247         }
4248         flow_size = sizeof(struct rte_flow);
4249         rss = flow_get_rss_action(p_actions_rx);
4250         if (rss)
4251                 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
4252                                             sizeof(void *));
4253         else
4254                 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
4255         flow = rte_calloc(__func__, 1, flow_size, 0);
4256         if (!flow) {
4257                 rte_errno = ENOMEM;
4258                 goto error_before_flow;
4259         }
4260         flow->drv_type = flow_get_drv_type(dev, attr);
4261         if (hairpin_id != 0)
4262                 flow->hairpin_flow_id = hairpin_id;
4263         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
4264                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
4265         flow->rss.queue = (void *)(flow + 1);
4266         if (rss) {
4267                 /*
4268                  * The following information is required by
4269                  * mlx5_flow_hashfields_adjust() in advance.
4270                  */
4271                 flow->rss.level = rss->level;
4272                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
4273                 flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
4274         }
4275         flow->dev_handles = 0;
4276         if (rss && rss->types) {
4277                 unsigned int graph_root;
4278
4279                 graph_root = find_graph_root(items, rss->level);
4280                 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
4281                                           items, rss->types,
4282                                           mlx5_support_expansion,
4283                                           graph_root);
4284                 MLX5_ASSERT(ret > 0 &&
4285                        (unsigned int)ret < sizeof(expand_buffer.buffer));
4286         } else {
4287                 buf->entries = 1;
4288                 buf->entry[0].pattern = (void *)(uintptr_t)items;
4289         }
4290         /*
4291          * Record the start index when there is a nested call. All sub-flows
4292          * need to be translated before another calling.
4293          * No need to use ping-pong buffer to save memory here.
4294          */
4295         if (priv->flow_idx) {
4296                 MLX5_ASSERT(!priv->flow_nested_idx);
4297                 priv->flow_nested_idx = priv->flow_idx;
4298         }
4299         for (i = 0; i < buf->entries; ++i) {
4300                 /*
4301                  * The splitter may create multiple dev_flows,
4302                  * depending on configuration. In the simplest
4303                  * case it just creates unmodified original flow.
4304                  */
4305                 ret = flow_create_split_outer(dev, flow, attr,
4306                                               buf->entry[i].pattern,
4307                                               p_actions_rx, external,
4308                                               error);
4309                 if (ret < 0)
4310                         goto error;
4311         }
4312         /* Create the tx flow. */
4313         if (hairpin_flow) {
4314                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
4315                 attr_tx.ingress = 0;
4316                 attr_tx.egress = 1;
4317                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
4318                                             actions_hairpin_tx.actions, error);
4319                 if (!dev_flow)
4320                         goto error;
4321                 dev_flow->flow = flow;
4322                 dev_flow->external = 0;
4323                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4324                               dev_flow->handle, next);
4325                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
4326                                          items_tx.items,
4327                                          actions_hairpin_tx.actions, error);
4328                 if (ret < 0)
4329                         goto error;
4330         }
4331         /*
4332          * Update the metadata register copy table. If extensive
4333          * metadata feature is enabled and registers are supported
4334          * we might create the extra rte_flow for each unique
4335          * MARK/FLAG action ID.
4336          *
4337          * The table is updated for ingress Flows only, because
4338          * the egress Flows belong to the different device and
4339          * copy table should be updated in peer NIC Rx domain.
4340          */
4341         if (attr->ingress &&
4342             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
4343                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
4344                 if (ret)
4345                         goto error;
4346         }
4347         /*
4348          * If the flow is external (from application) OR device is started, then
4349          * the flow will be applied immediately.
4350          */
4351         if (external || dev->data->dev_started) {
4352                 ret = flow_drv_apply(dev, flow, error);
4353                 if (ret < 0)
4354                         goto error;
4355         }
4356         if (list)
4357                 TAILQ_INSERT_TAIL(list, flow, next);
4358         flow_rxq_flags_set(dev, flow);
4359         /* Nested flow creation index recovery. */
4360         priv->flow_idx = priv->flow_nested_idx;
4361         if (priv->flow_nested_idx)
4362                 priv->flow_nested_idx = 0;
4363         return flow;
4364 error:
4365         MLX5_ASSERT(flow);
4366         ret = rte_errno; /* Save rte_errno before cleanup. */
4367         flow_mreg_del_copy_action(dev, flow);
4368         flow_drv_destroy(dev, flow);
4369         rte_free(flow);
4370         rte_errno = ret; /* Restore rte_errno. */
4371 error_before_flow:
4372         ret = rte_errno;
4373         if (hairpin_id)
4374                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4375                                      hairpin_id);
4376         rte_errno = ret;
4377         priv->flow_idx = priv->flow_nested_idx;
4378         if (priv->flow_nested_idx)
4379                 priv->flow_nested_idx = 0;
4380         return NULL;
4381 }
4382
4383 /**
4384  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
4385  * incoming packets to table 1.
4386  *
4387  * Other flow rules, requested for group n, will be created in
4388  * e-switch table n+1.
4389  * Jump action to e-switch group n will be created to group n+1.
4390  *
4391  * Used when working in switchdev mode, to utilise advantages of table 1
4392  * and above.
4393  *
4394  * @param dev
4395  *   Pointer to Ethernet device.
4396  *
4397  * @return
4398  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
4399  */
4400 struct rte_flow *
4401 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
4402 {
4403         const struct rte_flow_attr attr = {
4404                 .group = 0,
4405                 .priority = 0,
4406                 .ingress = 1,
4407                 .egress = 0,
4408                 .transfer = 1,
4409         };
4410         const struct rte_flow_item pattern = {
4411                 .type = RTE_FLOW_ITEM_TYPE_END,
4412         };
4413         struct rte_flow_action_jump jump = {
4414                 .group = 1,
4415         };
4416         const struct rte_flow_action actions[] = {
4417                 {
4418                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4419                         .conf = &jump,
4420                 },
4421                 {
4422                         .type = RTE_FLOW_ACTION_TYPE_END,
4423                 },
4424         };
4425         struct mlx5_priv *priv = dev->data->dev_private;
4426         struct rte_flow_error error;
4427
4428         return flow_list_create(dev, &priv->ctrl_flows, &attr, &pattern,
4429                                 actions, false, &error);
4430 }
4431
4432 /**
4433  * Create a flow.
4434  *
4435  * @see rte_flow_create()
4436  * @see rte_flow_ops
4437  */
4438 struct rte_flow *
4439 mlx5_flow_create(struct rte_eth_dev *dev,
4440                  const struct rte_flow_attr *attr,
4441                  const struct rte_flow_item items[],
4442                  const struct rte_flow_action actions[],
4443                  struct rte_flow_error *error)
4444 {
4445         struct mlx5_priv *priv = dev->data->dev_private;
4446
4447         /*
4448          * If the device is not started yet, it is not allowed to created a
4449          * flow from application. PMD default flows and traffic control flows
4450          * are not affected.
4451          */
4452         if (unlikely(!dev->data->dev_started)) {
4453                 rte_errno = ENODEV;
4454                 DRV_LOG(DEBUG, "port %u is not started when "
4455                         "inserting a flow", dev->data->port_id);
4456                 return NULL;
4457         }
4458         return flow_list_create(dev, &priv->flows,
4459                                 attr, items, actions, true, error);
4460 }
4461
4462 /**
4463  * Destroy a flow in a list.
4464  *
4465  * @param dev
4466  *   Pointer to Ethernet device.
4467  * @param list
4468  *   Pointer to a TAILQ flow list. If this parameter NULL,
4469  *   there is no flow removal from the list.
4470  * @param[in] flow
4471  *   Flow to destroy.
4472  */
4473 static void
4474 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
4475                   struct rte_flow *flow)
4476 {
4477         struct mlx5_priv *priv = dev->data->dev_private;
4478
4479         /*
4480          * Update RX queue flags only if port is started, otherwise it is
4481          * already clean.
4482          */
4483         if (dev->data->dev_started)
4484                 flow_rxq_flags_trim(dev, flow);
4485         if (flow->hairpin_flow_id)
4486                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4487                                      flow->hairpin_flow_id);
4488         flow_drv_destroy(dev, flow);
4489         if (list)
4490                 TAILQ_REMOVE(list, flow, next);
4491         flow_mreg_del_copy_action(dev, flow);
4492         rte_free(flow->fdir);
4493         rte_free(flow);
4494 }
4495
4496 /**
4497  * Destroy all flows.
4498  *
4499  * @param dev
4500  *   Pointer to Ethernet device.
4501  * @param list
4502  *   Pointer to a TAILQ flow list.
4503  * @param active
4504  *   If flushing is called avtively.
4505  */
4506 void
4507 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list,
4508                      bool active)
4509 {
4510         uint32_t num_flushed = 0;
4511
4512         while (!TAILQ_EMPTY(list)) {
4513                 struct rte_flow *flow;
4514
4515                 flow = TAILQ_FIRST(list);
4516                 flow_list_destroy(dev, list, flow);
4517                 num_flushed++;
4518         }
4519         if (active) {
4520                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
4521                         dev->data->port_id, num_flushed);
4522         }
4523 }
4524
4525 /**
4526  * Remove all flows.
4527  *
4528  * @param dev
4529  *   Pointer to Ethernet device.
4530  * @param list
4531  *   Pointer to a TAILQ flow list.
4532  */
4533 void
4534 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
4535 {
4536         struct rte_flow *flow;
4537
4538         TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) {
4539                 flow_drv_remove(dev, flow);
4540                 flow_mreg_stop_copy_action(dev, flow);
4541         }
4542         flow_mreg_del_default_copy_action(dev);
4543         flow_rxq_flags_clear(dev);
4544 }
4545
4546 /**
4547  * Add all flows.
4548  *
4549  * @param dev
4550  *   Pointer to Ethernet device.
4551  * @param list
4552  *   Pointer to a TAILQ flow list.
4553  *
4554  * @return
4555  *   0 on success, a negative errno value otherwise and rte_errno is set.
4556  */
4557 int
4558 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
4559 {
4560         struct rte_flow *flow;
4561         struct rte_flow_error error;
4562         int ret = 0;
4563
4564         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4565         ret = flow_mreg_add_default_copy_action(dev, &error);
4566         if (ret < 0)
4567                 return -rte_errno;
4568         /* Apply Flows created by application. */
4569         TAILQ_FOREACH(flow, list, next) {
4570                 ret = flow_mreg_start_copy_action(dev, flow);
4571                 if (ret < 0)
4572                         goto error;
4573                 ret = flow_drv_apply(dev, flow, &error);
4574                 if (ret < 0)
4575                         goto error;
4576                 flow_rxq_flags_set(dev, flow);
4577         }
4578         return 0;
4579 error:
4580         ret = rte_errno; /* Save rte_errno before cleanup. */
4581         mlx5_flow_stop(dev, list);
4582         rte_errno = ret; /* Restore rte_errno. */
4583         return -rte_errno;
4584 }
4585
4586 /**
4587  * Stop all default actions for flows.
4588  *
4589  * @param dev
4590  *   Pointer to Ethernet device.
4591  */
4592 void
4593 mlx5_flow_stop_default(struct rte_eth_dev *dev)
4594 {
4595         flow_mreg_del_default_copy_action(dev);
4596 }
4597
4598 /**
4599  * Start all default actions for flows.
4600  *
4601  * @param dev
4602  *   Pointer to Ethernet device.
4603  * @return
4604  *   0 on success, a negative errno value otherwise and rte_errno is set.
4605  */
4606 int
4607 mlx5_flow_start_default(struct rte_eth_dev *dev)
4608 {
4609         struct rte_flow_error error;
4610
4611         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4612         return flow_mreg_add_default_copy_action(dev, &error);
4613 }
4614
4615 /**
4616  * Allocate intermediate resources for flow creation.
4617  *
4618  * @param dev
4619  *   Pointer to Ethernet device.
4620  */
4621 void
4622 mlx5_flow_alloc_intermediate(struct rte_eth_dev *dev)
4623 {
4624         struct mlx5_priv *priv = dev->data->dev_private;
4625
4626         if (!priv->inter_flows)
4627                 priv->inter_flows = rte_calloc(__func__, MLX5_NUM_MAX_DEV_FLOWS,
4628                                                sizeof(struct mlx5_flow), 0);
4629         /* Reset the index. */
4630         priv->flow_idx = 0;
4631         priv->flow_nested_idx = 0;
4632 }
4633
4634 /**
4635  * Free intermediate resources for flows.
4636  *
4637  * @param dev
4638  *   Pointer to Ethernet device.
4639  */
4640 void
4641 mlx5_flow_free_intermediate(struct rte_eth_dev *dev)
4642 {
4643         struct mlx5_priv *priv = dev->data->dev_private;
4644
4645         rte_free(priv->inter_flows);
4646         priv->inter_flows = NULL;
4647 }
4648
4649 /**
4650  * Verify the flow list is empty
4651  *
4652  * @param dev
4653  *  Pointer to Ethernet device.
4654  *
4655  * @return the number of flows not released.
4656  */
4657 int
4658 mlx5_flow_verify(struct rte_eth_dev *dev)
4659 {
4660         struct mlx5_priv *priv = dev->data->dev_private;
4661         struct rte_flow *flow;
4662         int ret = 0;
4663
4664         TAILQ_FOREACH(flow, &priv->flows, next) {
4665                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
4666                         dev->data->port_id, (void *)flow);
4667                 ++ret;
4668         }
4669         return ret;
4670 }
4671
4672 /**
4673  * Enable default hairpin egress flow.
4674  *
4675  * @param dev
4676  *   Pointer to Ethernet device.
4677  * @param queue
4678  *   The queue index.
4679  *
4680  * @return
4681  *   0 on success, a negative errno value otherwise and rte_errno is set.
4682  */
4683 int
4684 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
4685                             uint32_t queue)
4686 {
4687         struct mlx5_priv *priv = dev->data->dev_private;
4688         const struct rte_flow_attr attr = {
4689                 .egress = 1,
4690                 .priority = 0,
4691         };
4692         struct mlx5_rte_flow_item_tx_queue queue_spec = {
4693                 .queue = queue,
4694         };
4695         struct mlx5_rte_flow_item_tx_queue queue_mask = {
4696                 .queue = UINT32_MAX,
4697         };
4698         struct rte_flow_item items[] = {
4699                 {
4700                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
4701                         .spec = &queue_spec,
4702                         .last = NULL,
4703                         .mask = &queue_mask,
4704                 },
4705                 {
4706                         .type = RTE_FLOW_ITEM_TYPE_END,
4707                 },
4708         };
4709         struct rte_flow_action_jump jump = {
4710                 .group = MLX5_HAIRPIN_TX_TABLE,
4711         };
4712         struct rte_flow_action actions[2];
4713         struct rte_flow *flow;
4714         struct rte_flow_error error;
4715
4716         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
4717         actions[0].conf = &jump;
4718         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
4719         flow = flow_list_create(dev, &priv->ctrl_flows,
4720                                 &attr, items, actions, false, &error);
4721         if (!flow) {
4722                 DRV_LOG(DEBUG,
4723                         "Failed to create ctrl flow: rte_errno(%d),"
4724                         " type(%d), message(%s)",
4725                         rte_errno, error.type,
4726                         error.message ? error.message : " (no stated reason)");
4727                 return -rte_errno;
4728         }
4729         return 0;
4730 }
4731
4732 /**
4733  * Enable a control flow configured from the control plane.
4734  *
4735  * @param dev
4736  *   Pointer to Ethernet device.
4737  * @param eth_spec
4738  *   An Ethernet flow spec to apply.
4739  * @param eth_mask
4740  *   An Ethernet flow mask to apply.
4741  * @param vlan_spec
4742  *   A VLAN flow spec to apply.
4743  * @param vlan_mask
4744  *   A VLAN flow mask to apply.
4745  *
4746  * @return
4747  *   0 on success, a negative errno value otherwise and rte_errno is set.
4748  */
4749 int
4750 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
4751                     struct rte_flow_item_eth *eth_spec,
4752                     struct rte_flow_item_eth *eth_mask,
4753                     struct rte_flow_item_vlan *vlan_spec,
4754                     struct rte_flow_item_vlan *vlan_mask)
4755 {
4756         struct mlx5_priv *priv = dev->data->dev_private;
4757         const struct rte_flow_attr attr = {
4758                 .ingress = 1,
4759                 .priority = MLX5_FLOW_PRIO_RSVD,
4760         };
4761         struct rte_flow_item items[] = {
4762                 {
4763                         .type = RTE_FLOW_ITEM_TYPE_ETH,
4764                         .spec = eth_spec,
4765                         .last = NULL,
4766                         .mask = eth_mask,
4767                 },
4768                 {
4769                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
4770                                               RTE_FLOW_ITEM_TYPE_END,
4771                         .spec = vlan_spec,
4772                         .last = NULL,
4773                         .mask = vlan_mask,
4774                 },
4775                 {
4776                         .type = RTE_FLOW_ITEM_TYPE_END,
4777                 },
4778         };
4779         uint16_t queue[priv->reta_idx_n];
4780         struct rte_flow_action_rss action_rss = {
4781                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4782                 .level = 0,
4783                 .types = priv->rss_conf.rss_hf,
4784                 .key_len = priv->rss_conf.rss_key_len,
4785                 .queue_num = priv->reta_idx_n,
4786                 .key = priv->rss_conf.rss_key,
4787                 .queue = queue,
4788         };
4789         struct rte_flow_action actions[] = {
4790                 {
4791                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4792                         .conf = &action_rss,
4793                 },
4794                 {
4795                         .type = RTE_FLOW_ACTION_TYPE_END,
4796                 },
4797         };
4798         struct rte_flow *flow;
4799         struct rte_flow_error error;
4800         unsigned int i;
4801
4802         if (!priv->reta_idx_n || !priv->rxqs_n) {
4803                 return 0;
4804         }
4805         for (i = 0; i != priv->reta_idx_n; ++i)
4806                 queue[i] = (*priv->reta_idx)[i];
4807         flow = flow_list_create(dev, &priv->ctrl_flows,
4808                                 &attr, items, actions, false, &error);
4809         if (!flow)
4810                 return -rte_errno;
4811         return 0;
4812 }
4813
4814 /**
4815  * Enable a flow control configured from the control plane.
4816  *
4817  * @param dev
4818  *   Pointer to Ethernet device.
4819  * @param eth_spec
4820  *   An Ethernet flow spec to apply.
4821  * @param eth_mask
4822  *   An Ethernet flow mask to apply.
4823  *
4824  * @return
4825  *   0 on success, a negative errno value otherwise and rte_errno is set.
4826  */
4827 int
4828 mlx5_ctrl_flow(struct rte_eth_dev *dev,
4829                struct rte_flow_item_eth *eth_spec,
4830                struct rte_flow_item_eth *eth_mask)
4831 {
4832         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
4833 }
4834
4835 /**
4836  * Destroy a flow.
4837  *
4838  * @see rte_flow_destroy()
4839  * @see rte_flow_ops
4840  */
4841 int
4842 mlx5_flow_destroy(struct rte_eth_dev *dev,
4843                   struct rte_flow *flow,
4844                   struct rte_flow_error *error __rte_unused)
4845 {
4846         struct mlx5_priv *priv = dev->data->dev_private;
4847
4848         flow_list_destroy(dev, &priv->flows, flow);
4849         return 0;
4850 }
4851
4852 /**
4853  * Destroy all flows.
4854  *
4855  * @see rte_flow_flush()
4856  * @see rte_flow_ops
4857  */
4858 int
4859 mlx5_flow_flush(struct rte_eth_dev *dev,
4860                 struct rte_flow_error *error __rte_unused)
4861 {
4862         struct mlx5_priv *priv = dev->data->dev_private;
4863
4864         mlx5_flow_list_flush(dev, &priv->flows, false);
4865         return 0;
4866 }
4867
4868 /**
4869  * Isolated mode.
4870  *
4871  * @see rte_flow_isolate()
4872  * @see rte_flow_ops
4873  */
4874 int
4875 mlx5_flow_isolate(struct rte_eth_dev *dev,
4876                   int enable,
4877                   struct rte_flow_error *error)
4878 {
4879         struct mlx5_priv *priv = dev->data->dev_private;
4880
4881         if (dev->data->dev_started) {
4882                 rte_flow_error_set(error, EBUSY,
4883                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4884                                    NULL,
4885                                    "port must be stopped first");
4886                 return -rte_errno;
4887         }
4888         priv->isolated = !!enable;
4889         if (enable)
4890                 dev->dev_ops = &mlx5_dev_ops_isolate;
4891         else
4892                 dev->dev_ops = &mlx5_dev_ops;
4893         return 0;
4894 }
4895
4896 /**
4897  * Query a flow.
4898  *
4899  * @see rte_flow_query()
4900  * @see rte_flow_ops
4901  */
4902 static int
4903 flow_drv_query(struct rte_eth_dev *dev,
4904                struct rte_flow *flow,
4905                const struct rte_flow_action *actions,
4906                void *data,
4907                struct rte_flow_error *error)
4908 {
4909         const struct mlx5_flow_driver_ops *fops;
4910         enum mlx5_flow_drv_type ftype = flow->drv_type;
4911
4912         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
4913         fops = flow_get_drv_ops(ftype);
4914
4915         return fops->query(dev, flow, actions, data, error);
4916 }
4917
4918 /**
4919  * Query a flow.
4920  *
4921  * @see rte_flow_query()
4922  * @see rte_flow_ops
4923  */
4924 int
4925 mlx5_flow_query(struct rte_eth_dev *dev,
4926                 struct rte_flow *flow,
4927                 const struct rte_flow_action *actions,
4928                 void *data,
4929                 struct rte_flow_error *error)
4930 {
4931         int ret;
4932
4933         ret = flow_drv_query(dev, flow, actions, data, error);
4934         if (ret < 0)
4935                 return ret;
4936         return 0;
4937 }
4938
4939 /**
4940  * Convert a flow director filter to a generic flow.
4941  *
4942  * @param dev
4943  *   Pointer to Ethernet device.
4944  * @param fdir_filter
4945  *   Flow director filter to add.
4946  * @param attributes
4947  *   Generic flow parameters structure.
4948  *
4949  * @return
4950  *   0 on success, a negative errno value otherwise and rte_errno is set.
4951  */
4952 static int
4953 flow_fdir_filter_convert(struct rte_eth_dev *dev,
4954                          const struct rte_eth_fdir_filter *fdir_filter,
4955                          struct mlx5_fdir *attributes)
4956 {
4957         struct mlx5_priv *priv = dev->data->dev_private;
4958         const struct rte_eth_fdir_input *input = &fdir_filter->input;
4959         const struct rte_eth_fdir_masks *mask =
4960                 &dev->data->dev_conf.fdir_conf.mask;
4961
4962         /* Validate queue number. */
4963         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
4964                 DRV_LOG(ERR, "port %u invalid queue number %d",
4965                         dev->data->port_id, fdir_filter->action.rx_queue);
4966                 rte_errno = EINVAL;
4967                 return -rte_errno;
4968         }
4969         attributes->attr.ingress = 1;
4970         attributes->items[0] = (struct rte_flow_item) {
4971                 .type = RTE_FLOW_ITEM_TYPE_ETH,
4972                 .spec = &attributes->l2,
4973                 .mask = &attributes->l2_mask,
4974         };
4975         switch (fdir_filter->action.behavior) {
4976         case RTE_ETH_FDIR_ACCEPT:
4977                 attributes->actions[0] = (struct rte_flow_action){
4978                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
4979                         .conf = &attributes->queue,
4980                 };
4981                 break;
4982         case RTE_ETH_FDIR_REJECT:
4983                 attributes->actions[0] = (struct rte_flow_action){
4984                         .type = RTE_FLOW_ACTION_TYPE_DROP,
4985                 };
4986                 break;
4987         default:
4988                 DRV_LOG(ERR, "port %u invalid behavior %d",
4989                         dev->data->port_id,
4990                         fdir_filter->action.behavior);
4991                 rte_errno = ENOTSUP;
4992                 return -rte_errno;
4993         }
4994         attributes->queue.index = fdir_filter->action.rx_queue;
4995         /* Handle L3. */
4996         switch (fdir_filter->input.flow_type) {
4997         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4998         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4999         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
5000                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
5001                         .src_addr = input->flow.ip4_flow.src_ip,
5002                         .dst_addr = input->flow.ip4_flow.dst_ip,
5003                         .time_to_live = input->flow.ip4_flow.ttl,
5004                         .type_of_service = input->flow.ip4_flow.tos,
5005                 };
5006                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
5007                         .src_addr = mask->ipv4_mask.src_ip,
5008                         .dst_addr = mask->ipv4_mask.dst_ip,
5009                         .time_to_live = mask->ipv4_mask.ttl,
5010                         .type_of_service = mask->ipv4_mask.tos,
5011                         .next_proto_id = mask->ipv4_mask.proto,
5012                 };
5013                 attributes->items[1] = (struct rte_flow_item){
5014                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
5015                         .spec = &attributes->l3,
5016                         .mask = &attributes->l3_mask,
5017                 };
5018                 break;
5019         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
5020         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
5021         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
5022                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
5023                         .hop_limits = input->flow.ipv6_flow.hop_limits,
5024                         .proto = input->flow.ipv6_flow.proto,
5025                 };
5026
5027                 memcpy(attributes->l3.ipv6.hdr.src_addr,
5028                        input->flow.ipv6_flow.src_ip,
5029                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
5030                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
5031                        input->flow.ipv6_flow.dst_ip,
5032                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
5033                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
5034                        mask->ipv6_mask.src_ip,
5035                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
5036                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
5037                        mask->ipv6_mask.dst_ip,
5038                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
5039                 attributes->items[1] = (struct rte_flow_item){
5040                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
5041                         .spec = &attributes->l3,
5042                         .mask = &attributes->l3_mask,
5043                 };
5044                 break;
5045         default:
5046                 DRV_LOG(ERR, "port %u invalid flow type%d",
5047                         dev->data->port_id, fdir_filter->input.flow_type);
5048                 rte_errno = ENOTSUP;
5049                 return -rte_errno;
5050         }
5051         /* Handle L4. */
5052         switch (fdir_filter->input.flow_type) {
5053         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
5054                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
5055                         .src_port = input->flow.udp4_flow.src_port,
5056                         .dst_port = input->flow.udp4_flow.dst_port,
5057                 };
5058                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
5059                         .src_port = mask->src_port_mask,
5060                         .dst_port = mask->dst_port_mask,
5061                 };
5062                 attributes->items[2] = (struct rte_flow_item){
5063                         .type = RTE_FLOW_ITEM_TYPE_UDP,
5064                         .spec = &attributes->l4,
5065                         .mask = &attributes->l4_mask,
5066                 };
5067                 break;
5068         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
5069                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
5070                         .src_port = input->flow.tcp4_flow.src_port,
5071                         .dst_port = input->flow.tcp4_flow.dst_port,
5072                 };
5073                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
5074                         .src_port = mask->src_port_mask,
5075                         .dst_port = mask->dst_port_mask,
5076                 };
5077                 attributes->items[2] = (struct rte_flow_item){
5078                         .type = RTE_FLOW_ITEM_TYPE_TCP,
5079                         .spec = &attributes->l4,
5080                         .mask = &attributes->l4_mask,
5081                 };
5082                 break;
5083         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
5084                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
5085                         .src_port = input->flow.udp6_flow.src_port,
5086                         .dst_port = input->flow.udp6_flow.dst_port,
5087                 };
5088                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
5089                         .src_port = mask->src_port_mask,
5090                         .dst_port = mask->dst_port_mask,
5091                 };
5092                 attributes->items[2] = (struct rte_flow_item){
5093                         .type = RTE_FLOW_ITEM_TYPE_UDP,
5094                         .spec = &attributes->l4,
5095                         .mask = &attributes->l4_mask,
5096                 };
5097                 break;
5098         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
5099                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
5100                         .src_port = input->flow.tcp6_flow.src_port,
5101                         .dst_port = input->flow.tcp6_flow.dst_port,
5102                 };
5103                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
5104                         .src_port = mask->src_port_mask,
5105                         .dst_port = mask->dst_port_mask,
5106                 };
5107                 attributes->items[2] = (struct rte_flow_item){
5108                         .type = RTE_FLOW_ITEM_TYPE_TCP,
5109                         .spec = &attributes->l4,
5110                         .mask = &attributes->l4_mask,
5111                 };
5112                 break;
5113         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
5114         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
5115                 break;
5116         default:
5117                 DRV_LOG(ERR, "port %u invalid flow type%d",
5118                         dev->data->port_id, fdir_filter->input.flow_type);
5119                 rte_errno = ENOTSUP;
5120                 return -rte_errno;
5121         }
5122         return 0;
5123 }
5124
5125 #define FLOW_FDIR_CMP(f1, f2, fld) \
5126         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
5127
5128 /**
5129  * Compare two FDIR flows. If items and actions are identical, the two flows are
5130  * regarded as same.
5131  *
5132  * @param dev
5133  *   Pointer to Ethernet device.
5134  * @param f1
5135  *   FDIR flow to compare.
5136  * @param f2
5137  *   FDIR flow to compare.
5138  *
5139  * @return
5140  *   Zero on match, 1 otherwise.
5141  */
5142 static int
5143 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
5144 {
5145         if (FLOW_FDIR_CMP(f1, f2, attr) ||
5146             FLOW_FDIR_CMP(f1, f2, l2) ||
5147             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
5148             FLOW_FDIR_CMP(f1, f2, l3) ||
5149             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
5150             FLOW_FDIR_CMP(f1, f2, l4) ||
5151             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
5152             FLOW_FDIR_CMP(f1, f2, actions[0].type))
5153                 return 1;
5154         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
5155             FLOW_FDIR_CMP(f1, f2, queue))
5156                 return 1;
5157         return 0;
5158 }
5159
5160 /**
5161  * Search device flow list to find out a matched FDIR flow.
5162  *
5163  * @param dev
5164  *   Pointer to Ethernet device.
5165  * @param fdir_flow
5166  *   FDIR flow to lookup.
5167  *
5168  * @return
5169  *   Pointer of flow if found, NULL otherwise.
5170  */
5171 static struct rte_flow *
5172 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
5173 {
5174         struct mlx5_priv *priv = dev->data->dev_private;
5175         struct rte_flow *flow = NULL;
5176
5177         MLX5_ASSERT(fdir_flow);
5178         TAILQ_FOREACH(flow, &priv->flows, next) {
5179                 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
5180                         DRV_LOG(DEBUG, "port %u found FDIR flow %p",
5181                                 dev->data->port_id, (void *)flow);
5182                         break;
5183                 }
5184         }
5185         return flow;
5186 }
5187
5188 /**
5189  * Add new flow director filter and store it in list.
5190  *
5191  * @param dev
5192  *   Pointer to Ethernet device.
5193  * @param fdir_filter
5194  *   Flow director filter to add.
5195  *
5196  * @return
5197  *   0 on success, a negative errno value otherwise and rte_errno is set.
5198  */
5199 static int
5200 flow_fdir_filter_add(struct rte_eth_dev *dev,
5201                      const struct rte_eth_fdir_filter *fdir_filter)
5202 {
5203         struct mlx5_priv *priv = dev->data->dev_private;
5204         struct mlx5_fdir *fdir_flow;
5205         struct rte_flow *flow;
5206         int ret;
5207
5208         fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
5209         if (!fdir_flow) {
5210                 rte_errno = ENOMEM;
5211                 return -rte_errno;
5212         }
5213         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
5214         if (ret)
5215                 goto error;
5216         flow = flow_fdir_filter_lookup(dev, fdir_flow);
5217         if (flow) {
5218                 rte_errno = EEXIST;
5219                 goto error;
5220         }
5221         flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
5222                                 fdir_flow->items, fdir_flow->actions, true,
5223                                 NULL);
5224         if (!flow)
5225                 goto error;
5226         MLX5_ASSERT(!flow->fdir);
5227         flow->fdir = fdir_flow;
5228         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
5229                 dev->data->port_id, (void *)flow);
5230         return 0;
5231 error:
5232         rte_free(fdir_flow);
5233         return -rte_errno;
5234 }
5235
5236 /**
5237  * Delete specific filter.
5238  *
5239  * @param dev
5240  *   Pointer to Ethernet device.
5241  * @param fdir_filter
5242  *   Filter to be deleted.
5243  *
5244  * @return
5245  *   0 on success, a negative errno value otherwise and rte_errno is set.
5246  */
5247 static int
5248 flow_fdir_filter_delete(struct rte_eth_dev *dev,
5249                         const struct rte_eth_fdir_filter *fdir_filter)
5250 {
5251         struct mlx5_priv *priv = dev->data->dev_private;
5252         struct rte_flow *flow;
5253         struct mlx5_fdir fdir_flow = {
5254                 .attr.group = 0,
5255         };
5256         int ret;
5257
5258         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
5259         if (ret)
5260                 return -rte_errno;
5261         flow = flow_fdir_filter_lookup(dev, &fdir_flow);
5262         if (!flow) {
5263                 rte_errno = ENOENT;
5264                 return -rte_errno;
5265         }
5266         flow_list_destroy(dev, &priv->flows, flow);
5267         DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
5268                 dev->data->port_id, (void *)flow);
5269         return 0;
5270 }
5271
5272 /**
5273  * Update queue for specific filter.
5274  *
5275  * @param dev
5276  *   Pointer to Ethernet device.
5277  * @param fdir_filter
5278  *   Filter to be updated.
5279  *
5280  * @return
5281  *   0 on success, a negative errno value otherwise and rte_errno is set.
5282  */
5283 static int
5284 flow_fdir_filter_update(struct rte_eth_dev *dev,
5285                         const struct rte_eth_fdir_filter *fdir_filter)
5286 {
5287         int ret;
5288
5289         ret = flow_fdir_filter_delete(dev, fdir_filter);
5290         if (ret)
5291                 return ret;
5292         return flow_fdir_filter_add(dev, fdir_filter);
5293 }
5294
5295 /**
5296  * Flush all filters.
5297  *
5298  * @param dev
5299  *   Pointer to Ethernet device.
5300  */
5301 static void
5302 flow_fdir_filter_flush(struct rte_eth_dev *dev)
5303 {
5304         struct mlx5_priv *priv = dev->data->dev_private;
5305
5306         mlx5_flow_list_flush(dev, &priv->flows, false);
5307 }
5308
5309 /**
5310  * Get flow director information.
5311  *
5312  * @param dev
5313  *   Pointer to Ethernet device.
5314  * @param[out] fdir_info
5315  *   Resulting flow director information.
5316  */
5317 static void
5318 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
5319 {
5320         struct rte_eth_fdir_masks *mask =
5321                 &dev->data->dev_conf.fdir_conf.mask;
5322
5323         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
5324         fdir_info->guarant_spc = 0;
5325         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
5326         fdir_info->max_flexpayload = 0;
5327         fdir_info->flow_types_mask[0] = 0;
5328         fdir_info->flex_payload_unit = 0;
5329         fdir_info->max_flex_payload_segment_num = 0;
5330         fdir_info->flex_payload_limit = 0;
5331         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
5332 }
5333
5334 /**
5335  * Deal with flow director operations.
5336  *
5337  * @param dev
5338  *   Pointer to Ethernet device.
5339  * @param filter_op
5340  *   Operation to perform.
5341  * @param arg
5342  *   Pointer to operation-specific structure.
5343  *
5344  * @return
5345  *   0 on success, a negative errno value otherwise and rte_errno is set.
5346  */
5347 static int
5348 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
5349                     void *arg)
5350 {
5351         enum rte_fdir_mode fdir_mode =
5352                 dev->data->dev_conf.fdir_conf.mode;
5353
5354         if (filter_op == RTE_ETH_FILTER_NOP)
5355                 return 0;
5356         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
5357             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
5358                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
5359                         dev->data->port_id, fdir_mode);
5360                 rte_errno = EINVAL;
5361                 return -rte_errno;
5362         }
5363         switch (filter_op) {
5364         case RTE_ETH_FILTER_ADD:
5365                 return flow_fdir_filter_add(dev, arg);
5366         case RTE_ETH_FILTER_UPDATE:
5367                 return flow_fdir_filter_update(dev, arg);
5368         case RTE_ETH_FILTER_DELETE:
5369                 return flow_fdir_filter_delete(dev, arg);
5370         case RTE_ETH_FILTER_FLUSH:
5371                 flow_fdir_filter_flush(dev);
5372                 break;
5373         case RTE_ETH_FILTER_INFO:
5374                 flow_fdir_info_get(dev, arg);
5375                 break;
5376         default:
5377                 DRV_LOG(DEBUG, "port %u unknown operation %u",
5378                         dev->data->port_id, filter_op);
5379                 rte_errno = EINVAL;
5380                 return -rte_errno;
5381         }
5382         return 0;
5383 }
5384
5385 /**
5386  * Manage filter operations.
5387  *
5388  * @param dev
5389  *   Pointer to Ethernet device structure.
5390  * @param filter_type
5391  *   Filter type.
5392  * @param filter_op
5393  *   Operation to perform.
5394  * @param arg
5395  *   Pointer to operation-specific structure.
5396  *
5397  * @return
5398  *   0 on success, a negative errno value otherwise and rte_errno is set.
5399  */
5400 int
5401 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
5402                      enum rte_filter_type filter_type,
5403                      enum rte_filter_op filter_op,
5404                      void *arg)
5405 {
5406         switch (filter_type) {
5407         case RTE_ETH_FILTER_GENERIC:
5408                 if (filter_op != RTE_ETH_FILTER_GET) {
5409                         rte_errno = EINVAL;
5410                         return -rte_errno;
5411                 }
5412                 *(const void **)arg = &mlx5_flow_ops;
5413                 return 0;
5414         case RTE_ETH_FILTER_FDIR:
5415                 return flow_fdir_ctrl_func(dev, filter_op, arg);
5416         default:
5417                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
5418                         dev->data->port_id, filter_type);
5419                 rte_errno = ENOTSUP;
5420                 return -rte_errno;
5421         }
5422         return 0;
5423 }
5424
5425 /**
5426  * Create the needed meter and suffix tables.
5427  *
5428  * @param[in] dev
5429  *   Pointer to Ethernet device.
5430  * @param[in] fm
5431  *   Pointer to the flow meter.
5432  *
5433  * @return
5434  *   Pointer to table set on success, NULL otherwise.
5435  */
5436 struct mlx5_meter_domains_infos *
5437 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
5438                           const struct mlx5_flow_meter *fm)
5439 {
5440         const struct mlx5_flow_driver_ops *fops;
5441
5442         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5443         return fops->create_mtr_tbls(dev, fm);
5444 }
5445
5446 /**
5447  * Destroy the meter table set.
5448  *
5449  * @param[in] dev
5450  *   Pointer to Ethernet device.
5451  * @param[in] tbl
5452  *   Pointer to the meter table set.
5453  *
5454  * @return
5455  *   0 on success.
5456  */
5457 int
5458 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
5459                            struct mlx5_meter_domains_infos *tbls)
5460 {
5461         const struct mlx5_flow_driver_ops *fops;
5462
5463         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5464         return fops->destroy_mtr_tbls(dev, tbls);
5465 }
5466
5467 /**
5468  * Create policer rules.
5469  *
5470  * @param[in] dev
5471  *   Pointer to Ethernet device.
5472  * @param[in] fm
5473  *   Pointer to flow meter structure.
5474  * @param[in] attr
5475  *   Pointer to flow attributes.
5476  *
5477  * @return
5478  *   0 on success, -1 otherwise.
5479  */
5480 int
5481 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
5482                                struct mlx5_flow_meter *fm,
5483                                const struct rte_flow_attr *attr)
5484 {
5485         const struct mlx5_flow_driver_ops *fops;
5486
5487         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5488         return fops->create_policer_rules(dev, fm, attr);
5489 }
5490
5491 /**
5492  * Destroy policer rules.
5493  *
5494  * @param[in] fm
5495  *   Pointer to flow meter structure.
5496  * @param[in] attr
5497  *   Pointer to flow attributes.
5498  *
5499  * @return
5500  *   0 on success, -1 otherwise.
5501  */
5502 int
5503 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
5504                                 struct mlx5_flow_meter *fm,
5505                                 const struct rte_flow_attr *attr)
5506 {
5507         const struct mlx5_flow_driver_ops *fops;
5508
5509         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5510         return fops->destroy_policer_rules(dev, fm, attr);
5511 }
5512
5513 /**
5514  * Allocate a counter.
5515  *
5516  * @param[in] dev
5517  *   Pointer to Ethernet device structure.
5518  *
5519  * @return
5520  *   Index to allocated counter  on success, 0 otherwise.
5521  */
5522 uint32_t
5523 mlx5_counter_alloc(struct rte_eth_dev *dev)
5524 {
5525         const struct mlx5_flow_driver_ops *fops;
5526         struct rte_flow_attr attr = { .transfer = 0 };
5527
5528         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5529                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5530                 return fops->counter_alloc(dev);
5531         }
5532         DRV_LOG(ERR,
5533                 "port %u counter allocate is not supported.",
5534                  dev->data->port_id);
5535         return 0;
5536 }
5537
5538 /**
5539  * Free a counter.
5540  *
5541  * @param[in] dev
5542  *   Pointer to Ethernet device structure.
5543  * @param[in] cnt
5544  *   Index to counter to be free.
5545  */
5546 void
5547 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
5548 {
5549         const struct mlx5_flow_driver_ops *fops;
5550         struct rte_flow_attr attr = { .transfer = 0 };
5551
5552         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5553                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5554                 fops->counter_free(dev, cnt);
5555                 return;
5556         }
5557         DRV_LOG(ERR,
5558                 "port %u counter free is not supported.",
5559                  dev->data->port_id);
5560 }
5561
5562 /**
5563  * Query counter statistics.
5564  *
5565  * @param[in] dev
5566  *   Pointer to Ethernet device structure.
5567  * @param[in] cnt
5568  *   Index to counter to query.
5569  * @param[in] clear
5570  *   Set to clear counter statistics.
5571  * @param[out] pkts
5572  *   The counter hits packets number to save.
5573  * @param[out] bytes
5574  *   The counter hits bytes number to save.
5575  *
5576  * @return
5577  *   0 on success, a negative errno value otherwise.
5578  */
5579 int
5580 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
5581                    bool clear, uint64_t *pkts, uint64_t *bytes)
5582 {
5583         const struct mlx5_flow_driver_ops *fops;
5584         struct rte_flow_attr attr = { .transfer = 0 };
5585
5586         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5587                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5588                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
5589         }
5590         DRV_LOG(ERR,
5591                 "port %u counter query is not supported.",
5592                  dev->data->port_id);
5593         return -ENOTSUP;
5594 }
5595
5596 #define MLX5_POOL_QUERY_FREQ_US 1000000
5597
5598 /**
5599  * Set the periodic procedure for triggering asynchronous batch queries for all
5600  * the counter pools.
5601  *
5602  * @param[in] sh
5603  *   Pointer to mlx5_ibv_shared object.
5604  */
5605 void
5606 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
5607 {
5608         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
5609         uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
5610         uint32_t us;
5611
5612         cont = MLX5_CNT_CONTAINER(sh, 1, 0);
5613         pools_n += rte_atomic16_read(&cont->n_valid);
5614         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
5615         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
5616         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
5617                 sh->cmng.query_thread_on = 0;
5618                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
5619         } else {
5620                 sh->cmng.query_thread_on = 1;
5621         }
5622 }
5623
5624 /**
5625  * The periodic procedure for triggering asynchronous batch queries for all the
5626  * counter pools. This function is probably called by the host thread.
5627  *
5628  * @param[in] arg
5629  *   The parameter for the alarm process.
5630  */
5631 void
5632 mlx5_flow_query_alarm(void *arg)
5633 {
5634         struct mlx5_ibv_shared *sh = arg;
5635         struct mlx5_devx_obj *dcs;
5636         uint16_t offset;
5637         int ret;
5638         uint8_t batch = sh->cmng.batch;
5639         uint16_t pool_index = sh->cmng.pool_index;
5640         struct mlx5_pools_container *cont;
5641         struct mlx5_pools_container *mcont;
5642         struct mlx5_flow_counter_pool *pool;
5643
5644         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
5645                 goto set_alarm;
5646 next_container:
5647         cont = MLX5_CNT_CONTAINER(sh, batch, 1);
5648         mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
5649         /* Check if resize was done and need to flip a container. */
5650         if (cont != mcont) {
5651                 if (cont->pools) {
5652                         /* Clean the old container. */
5653                         rte_free(cont->pools);
5654                         memset(cont, 0, sizeof(*cont));
5655                 }
5656                 rte_cio_wmb();
5657                  /* Flip the host container. */
5658                 sh->cmng.mhi[batch] ^= (uint8_t)2;
5659                 cont = mcont;
5660         }
5661         if (!cont->pools) {
5662                 /* 2 empty containers case is unexpected. */
5663                 if (unlikely(batch != sh->cmng.batch))
5664                         goto set_alarm;
5665                 batch ^= 0x1;
5666                 pool_index = 0;
5667                 goto next_container;
5668         }
5669         pool = cont->pools[pool_index];
5670         if (pool->raw_hw)
5671                 /* There is a pool query in progress. */
5672                 goto set_alarm;
5673         pool->raw_hw =
5674                 LIST_FIRST(&sh->cmng.free_stat_raws);
5675         if (!pool->raw_hw)
5676                 /* No free counter statistics raw memory. */
5677                 goto set_alarm;
5678         dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
5679                                                               (&pool->a64_dcs);
5680         offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
5681         /*
5682          * Identify the counters released between query trigger and query
5683          * handle more effiecntly. The counter released in this gap period
5684          * should wait for a new round of query as the new arrived packets
5685          * will not be taken into account.
5686          */
5687         rte_atomic64_add(&pool->start_query_gen, 1);
5688         ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
5689                                                offset, NULL, NULL,
5690                                                pool->raw_hw->mem_mng->dm->id,
5691                                                (void *)(uintptr_t)
5692                                                (pool->raw_hw->data + offset),
5693                                                sh->devx_comp,
5694                                                (uint64_t)(uintptr_t)pool);
5695         if (ret) {
5696                 rte_atomic64_sub(&pool->start_query_gen, 1);
5697                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
5698                         " %d", pool->min_dcs->id);
5699                 pool->raw_hw = NULL;
5700                 goto set_alarm;
5701         }
5702         pool->raw_hw->min_dcs_id = dcs->id;
5703         LIST_REMOVE(pool->raw_hw, next);
5704         sh->cmng.pending_queries++;
5705         pool_index++;
5706         if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
5707                 batch ^= 0x1;
5708                 pool_index = 0;
5709         }
5710 set_alarm:
5711         sh->cmng.batch = batch;
5712         sh->cmng.pool_index = pool_index;
5713         mlx5_set_query_alarm(sh);
5714 }
5715
5716 /**
5717  * Handler for the HW respond about ready values from an asynchronous batch
5718  * query. This function is probably called by the host thread.
5719  *
5720  * @param[in] sh
5721  *   The pointer to the shared IB device context.
5722  * @param[in] async_id
5723  *   The Devx async ID.
5724  * @param[in] status
5725  *   The status of the completion.
5726  */
5727 void
5728 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
5729                                   uint64_t async_id, int status)
5730 {
5731         struct mlx5_flow_counter_pool *pool =
5732                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
5733         struct mlx5_counter_stats_raw *raw_to_free;
5734
5735         if (unlikely(status)) {
5736                 rte_atomic64_sub(&pool->start_query_gen, 1);
5737                 raw_to_free = pool->raw_hw;
5738         } else {
5739                 raw_to_free = pool->raw;
5740                 rte_spinlock_lock(&pool->sl);
5741                 pool->raw = pool->raw_hw;
5742                 rte_spinlock_unlock(&pool->sl);
5743                 MLX5_ASSERT(rte_atomic64_read(&pool->end_query_gen) + 1 ==
5744                             rte_atomic64_read(&pool->start_query_gen));
5745                 rte_atomic64_set(&pool->end_query_gen,
5746                                  rte_atomic64_read(&pool->start_query_gen));
5747                 /* Be sure the new raw counters data is updated in memory. */
5748                 rte_cio_wmb();
5749         }
5750         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
5751         pool->raw_hw = NULL;
5752         sh->cmng.pending_queries--;
5753 }
5754
5755 /**
5756  * Translate the rte_flow group index to HW table value.
5757  *
5758  * @param[in] attributes
5759  *   Pointer to flow attributes
5760  * @param[in] external
5761  *   Value is part of flow rule created by request external to PMD.
5762  * @param[in] group
5763  *   rte_flow group index value.
5764  * @param[out] fdb_def_rule
5765  *   Whether fdb jump to table 1 is configured.
5766  * @param[out] table
5767  *   HW table value.
5768  * @param[out] error
5769  *   Pointer to error structure.
5770  *
5771  * @return
5772  *   0 on success, a negative errno value otherwise and rte_errno is set.
5773  */
5774 int
5775 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
5776                          uint32_t group, bool fdb_def_rule, uint32_t *table,
5777                          struct rte_flow_error *error)
5778 {
5779         if (attributes->transfer && external && fdb_def_rule) {
5780                 if (group == UINT32_MAX)
5781                         return rte_flow_error_set
5782                                                 (error, EINVAL,
5783                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
5784                                                  NULL,
5785                                                  "group index not supported");
5786                 *table = group + 1;
5787         } else {
5788                 *table = group;
5789         }
5790         return 0;
5791 }
5792
5793 /**
5794  * Discover availability of metadata reg_c's.
5795  *
5796  * Iteratively use test flows to check availability.
5797  *
5798  * @param[in] dev
5799  *   Pointer to the Ethernet device structure.
5800  *
5801  * @return
5802  *   0 on success, a negative errno value otherwise and rte_errno is set.
5803  */
5804 int
5805 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
5806 {
5807         struct mlx5_priv *priv = dev->data->dev_private;
5808         struct mlx5_dev_config *config = &priv->config;
5809         enum modify_reg idx;
5810         int n = 0;
5811
5812         /* reg_c[0] and reg_c[1] are reserved. */
5813         config->flow_mreg_c[n++] = REG_C_0;
5814         config->flow_mreg_c[n++] = REG_C_1;
5815         /* Discover availability of other reg_c's. */
5816         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
5817                 struct rte_flow_attr attr = {
5818                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5819                         .priority = MLX5_FLOW_PRIO_RSVD,
5820                         .ingress = 1,
5821                 };
5822                 struct rte_flow_item items[] = {
5823                         [0] = {
5824                                 .type = RTE_FLOW_ITEM_TYPE_END,
5825                         },
5826                 };
5827                 struct rte_flow_action actions[] = {
5828                         [0] = {
5829                                 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5830                                 .conf = &(struct mlx5_flow_action_copy_mreg){
5831                                         .src = REG_C_1,
5832                                         .dst = idx,
5833                                 },
5834                         },
5835                         [1] = {
5836                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5837                                 .conf = &(struct rte_flow_action_jump){
5838                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5839                                 },
5840                         },
5841                         [2] = {
5842                                 .type = RTE_FLOW_ACTION_TYPE_END,
5843                         },
5844                 };
5845                 struct rte_flow *flow;
5846                 struct rte_flow_error error;
5847
5848                 if (!config->dv_flow_en)
5849                         break;
5850                 /* Create internal flow, validation skips copy action. */
5851                 flow = flow_list_create(dev, NULL, &attr, items,
5852                                         actions, false, &error);
5853                 if (!flow)
5854                         continue;
5855                 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
5856                         config->flow_mreg_c[n++] = idx;
5857                 flow_list_destroy(dev, NULL, flow);
5858         }
5859         for (; n < MLX5_MREG_C_NUM; ++n)
5860                 config->flow_mreg_c[n] = REG_NONE;
5861         return 0;
5862 }
5863
5864 /**
5865  * Dump flow raw hw data to file
5866  *
5867  * @param[in] dev
5868  *    The pointer to Ethernet device.
5869  * @param[in] file
5870  *   A pointer to a file for output.
5871  * @param[out] error
5872  *   Perform verbose error reporting if not NULL. PMDs initialize this
5873  *   structure in case of error only.
5874  * @return
5875  *   0 on success, a nagative value otherwise.
5876  */
5877 int
5878 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
5879                    FILE *file,
5880                    struct rte_flow_error *error __rte_unused)
5881 {
5882         struct mlx5_priv *priv = dev->data->dev_private;
5883         struct mlx5_ibv_shared *sh = priv->sh;
5884
5885         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
5886                                        sh->tx_domain, file);
5887 }