drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30
  31 #include "mlx5.h"
  32 #include "mlx5_defs.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_flow.h"
  35 #include "mlx5_prm.h"
  36 #include "mlx5_rxtx.h"
  37
  38 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  39
  40 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  41 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  42 #endif
  43
  44 #ifndef HAVE_MLX5DV_DR_ESWITCH
  45 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  46 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  47 #endif
  48 #endif
  49
  50 #ifndef HAVE_MLX5DV_DR
  51 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  52 #endif
  53
  54 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  55                                           sizeof(struct rte_flow_item_ipv4))
  56 /* VLAN header definitions */
  57 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  58 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  59 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  60 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  61 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  62
  63 union flow_dv_attr {
  64         struct {
  65                 uint32_t valid:1;
  66                 uint32_t ipv4:1;
  67                 uint32_t ipv6:1;
  68                 uint32_t tcp:1;
  69                 uint32_t udp:1;
  70                 uint32_t reserved:27;
  71         };
  72         uint32_t attr;
  73 };
  74
  75 /**
  76  * Initialize flow attributes structure according to flow items' types.
  77  *
  78  * @param[in] item
  79  *   Pointer to item specification.
  80  * @param[out] attr
  81  *   Pointer to flow attributes structure.
  82  */
  83 static void
  84 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  85 {
  86         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  87                 switch (item->type) {
  88                 case RTE_FLOW_ITEM_TYPE_IPV4:
  89                         attr->ipv4 = 1;
  90                         break;
  91                 case RTE_FLOW_ITEM_TYPE_IPV6:
  92                         attr->ipv6 = 1;
  93                         break;
  94                 case RTE_FLOW_ITEM_TYPE_UDP:
  95                         attr->udp = 1;
  96                         break;
  97                 case RTE_FLOW_ITEM_TYPE_TCP:
  98                         attr->tcp = 1;
  99                         break;
 100                 default:
 101                         break;
 102                 }
 103         }
 104         attr->valid = 1;
 105 }
 106
 107 /**
 108  * Convert rte_mtr_color to mlx5 color.
 109  *
 110  * @param[in] rcol
 111  *   rte_mtr_color.
 112  *
 113  * @return
 114  *   mlx5 color.
 115  */
 116 static int
 117 rte_col_2_mlx5_col(enum rte_color rcol)
 118 {
 119         switch (rcol) {
 120         case RTE_COLOR_GREEN:
 121                 return MLX5_FLOW_COLOR_GREEN;
 122         case RTE_COLOR_YELLOW:
 123                 return MLX5_FLOW_COLOR_YELLOW;
 124         case RTE_COLOR_RED:
 125                 return MLX5_FLOW_COLOR_RED;
 126         default:
 127                 break;
 128         }
 129         return MLX5_FLOW_COLOR_UNDEFINED;
 130 }
 131
 132 struct field_modify_info {
 133         uint32_t size; /* Size of field in protocol header, in bytes. */
 134         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 135         enum mlx5_modification_field id;
 136 };
 137
 138 struct field_modify_info modify_eth[] = {
 139         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 140         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 141         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 142         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 143         {0, 0, 0},
 144 };
 145
 146 struct field_modify_info modify_vlan_out_first_vid[] = {
 147         /* Size in bits !!! */
 148         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 149         {0, 0, 0},
 150 };
 151
 152 struct field_modify_info modify_ipv4[] = {
 153         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 154         {4, 12, MLX5_MODI_OUT_SIPV4},
 155         {4, 16, MLX5_MODI_OUT_DIPV4},
 156         {0, 0, 0},
 157 };
 158
 159 struct field_modify_info modify_ipv6[] = {
 160         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 161         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 162         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 163         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 164         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 165         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 166         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 167         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 168         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 169         {0, 0, 0},
 170 };
 171
 172 struct field_modify_info modify_udp[] = {
 173         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 174         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 175         {0, 0, 0},
 176 };
 177
 178 struct field_modify_info modify_tcp[] = {
 179         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 180         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 181         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 182         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 183         {0, 0, 0},
 184 };
 185
 186 static void
 187 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 188                           uint8_t next_protocol, uint64_t *item_flags,
 189                           int *tunnel)
 190 {
 191         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 192                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 193         if (next_protocol == IPPROTO_IPIP) {
 194                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 195                 *tunnel = 1;
 196         }
 197         if (next_protocol == IPPROTO_IPV6) {
 198                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 199                 *tunnel = 1;
 200         }
 201 }
 202
 203 /**
 204  * Acquire the synchronizing object to protect multithreaded access
 205  * to shared dv context. Lock occurs only if context is actually
 206  * shared, i.e. we have multiport IB device and representors are
 207  * created.
 208  *
 209  * @param[in] dev
 210  *   Pointer to the rte_eth_dev structure.
 211  */
 212 static void
 213 flow_dv_shared_lock(struct rte_eth_dev *dev)
 214 {
 215         struct mlx5_priv *priv = dev->data->dev_private;
 216         struct mlx5_ibv_shared *sh = priv->sh;
 217
 218         if (sh->dv_refcnt > 1) {
 219                 int ret;
 220
 221                 ret = pthread_mutex_lock(&sh->dv_mutex);
 222                 assert(!ret);
 223                 (void)ret;
 224         }
 225 }
 226
 227 static void
 228 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 229 {
 230         struct mlx5_priv *priv = dev->data->dev_private;
 231         struct mlx5_ibv_shared *sh = priv->sh;
 232
 233         if (sh->dv_refcnt > 1) {
 234                 int ret;
 235
 236                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 237                 assert(!ret);
 238                 (void)ret;
 239         }
 240 }
 241
 242 /* Update VLAN's VID/PCP based on input rte_flow_action.
 243  *
 244  * @param[in] action
 245  *   Pointer to struct rte_flow_action.
 246  * @param[out] vlan
 247  *   Pointer to struct rte_vlan_hdr.
 248  */
 249 static void
 250 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 251                          struct rte_vlan_hdr *vlan)
 252 {
 253         uint16_t vlan_tci;
 254         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 255                 vlan_tci =
 256                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 257                                                action->conf)->vlan_pcp;
 258                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 259                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 260                 vlan->vlan_tci |= vlan_tci;
 261         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 262                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 263                 vlan->vlan_tci |= rte_be_to_cpu_16
 264                     (((const struct rte_flow_action_of_set_vlan_vid *)
 265                                              action->conf)->vlan_vid);
 266         }
 267 }
 268
 269 /**
 270  * Fetch 1, 2, 3 or 4 byte field from the byte array
 271  * and return as unsigned integer in host-endian format.
 272  *
 273  * @param[in] data
 274  *   Pointer to data array.
 275  * @param[in] size
 276  *   Size of field to extract.
 277  *
 278  * @return
 279  *   converted field in host endian format.
 280  */
 281 static inline uint32_t
 282 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 283 {
 284         uint32_t ret;
 285
 286         switch (size) {
 287         case 1:
 288                 ret = *data;
 289                 break;
 290         case 2:
 291                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 292                 break;
 293         case 3:
 294                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 295                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 296                 break;
 297         case 4:
 298                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 299                 break;
 300         default:
 301                 assert(false);
 302                 ret = 0;
 303                 break;
 304         }
 305         return ret;
 306 }
 307
 308 /**
 309  * Convert modify-header action to DV specification.
 310  *
 311  * Data length of each action is determined by provided field description
 312  * and the item mask. Data bit offset and width of each action is determined
 313  * by provided item mask.
 314  *
 315  * @param[in] item
 316  *   Pointer to item specification.
 317  * @param[in] field
 318  *   Pointer to field modification information.
 319  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 320  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 321  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 322  * @param[in] dcopy
 323  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 324  *   Negative offset value sets the same offset as source offset.
 325  *   size field is ignored, value is taken from source field.
 326  * @param[in,out] resource
 327  *   Pointer to the modify-header resource.
 328  * @param[in] type
 329  *   Type of modification.
 330  * @param[out] error
 331  *   Pointer to the error structure.
 332  *
 333  * @return
 334  *   0 on success, a negative errno value otherwise and rte_errno is set.
 335  */
 336 static int
 337 flow_dv_convert_modify_action(struct rte_flow_item *item,
 338                               struct field_modify_info *field,
 339                               struct field_modify_info *dcopy,
 340                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 341                               uint32_t type, struct rte_flow_error *error)
 342 {
 343         uint32_t i = resource->actions_num;
 344         struct mlx5_modification_cmd *actions = resource->actions;
 345
 346         /*
 347          * The item and mask are provided in big-endian format.
 348          * The fields should be presented as in big-endian format either.
 349          * Mask must be always present, it defines the actual field width.
 350          */
 351         assert(item->mask);
 352         assert(field->size);
 353         do {
 354                 unsigned int size_b;
 355                 unsigned int off_b;
 356                 uint32_t mask;
 357                 uint32_t data;
 358
 359                 if (i >= MLX5_MODIFY_NUM)
 360                         return rte_flow_error_set(error, EINVAL,
 361                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 362                                  "too many items to modify");
 363                 /* Fetch variable byte size mask from the array. */
 364                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 365                                            field->offset, field->size);
 366                 if (!mask) {
 367                         ++field;
 368                         continue;
 369                 }
 370                 /* Deduce actual data width in bits from mask value. */
 371                 off_b = rte_bsf32(mask);
 372                 size_b = sizeof(uint32_t) * CHAR_BIT -
 373                          off_b - __builtin_clz(mask);
 374                 assert(size_b);
 375                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 376                 actions[i].action_type = type;
 377                 actions[i].field = field->id;
 378                 actions[i].offset = off_b;
 379                 actions[i].length = size_b;
 380                 /* Convert entire record to expected big-endian format. */
 381                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 382                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 383                         assert(dcopy);
 384                         actions[i].dst_field = dcopy->id;
 385                         actions[i].dst_offset =
 386                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 387                         /* Convert entire record to big-endian format. */
 388                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 389                 } else {
 390                         assert(item->spec);
 391                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 392                                                    field->offset, field->size);
 393                         /* Shift out the trailing masked bits from data. */
 394                         data = (data & mask) >> off_b;
 395                         actions[i].data1 = rte_cpu_to_be_32(data);
 396                 }
 397                 ++i;
 398                 ++field;
 399         } while (field->size);
 400         resource->actions_num = i;
 401         if (!resource->actions_num)
 402                 return rte_flow_error_set(error, EINVAL,
 403                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 404                                           "invalid modification flow item");
 405         return 0;
 406 }
 407
 408 /**
 409  * Convert modify-header set IPv4 address action to DV specification.
 410  *
 411  * @param[in,out] resource
 412  *   Pointer to the modify-header resource.
 413  * @param[in] action
 414  *   Pointer to action specification.
 415  * @param[out] error
 416  *   Pointer to the error structure.
 417  *
 418  * @return
 419  *   0 on success, a negative errno value otherwise and rte_errno is set.
 420  */
 421 static int
 422 flow_dv_convert_action_modify_ipv4
 423                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 424                          const struct rte_flow_action *action,
 425                          struct rte_flow_error *error)
 426 {
 427         const struct rte_flow_action_set_ipv4 *conf =
 428                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 429         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 430         struct rte_flow_item_ipv4 ipv4;
 431         struct rte_flow_item_ipv4 ipv4_mask;
 432
 433         memset(&ipv4, 0, sizeof(ipv4));
 434         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 435         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 436                 ipv4.hdr.src_addr = conf->ipv4_addr;
 437                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 438         } else {
 439                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 440                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 441         }
 442         item.spec = &ipv4;
 443         item.mask = &ipv4_mask;
 444         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 445                                              MLX5_MODIFICATION_TYPE_SET, error);
 446 }
 447
 448 /**
 449  * Convert modify-header set IPv6 address action to DV specification.
 450  *
 451  * @param[in,out] resource
 452  *   Pointer to the modify-header resource.
 453  * @param[in] action
 454  *   Pointer to action specification.
 455  * @param[out] error
 456  *   Pointer to the error structure.
 457  *
 458  * @return
 459  *   0 on success, a negative errno value otherwise and rte_errno is set.
 460  */
 461 static int
 462 flow_dv_convert_action_modify_ipv6
 463                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 464                          const struct rte_flow_action *action,
 465                          struct rte_flow_error *error)
 466 {
 467         const struct rte_flow_action_set_ipv6 *conf =
 468                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 469         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 470         struct rte_flow_item_ipv6 ipv6;
 471         struct rte_flow_item_ipv6 ipv6_mask;
 472
 473         memset(&ipv6, 0, sizeof(ipv6));
 474         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 475         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 476                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 477                        sizeof(ipv6.hdr.src_addr));
 478                 memcpy(&ipv6_mask.hdr.src_addr,
 479                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 480                        sizeof(ipv6.hdr.src_addr));
 481         } else {
 482                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 483                        sizeof(ipv6.hdr.dst_addr));
 484                 memcpy(&ipv6_mask.hdr.dst_addr,
 485                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 486                        sizeof(ipv6.hdr.dst_addr));
 487         }
 488         item.spec = &ipv6;
 489         item.mask = &ipv6_mask;
 490         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 491                                              MLX5_MODIFICATION_TYPE_SET, error);
 492 }
 493
 494 /**
 495  * Convert modify-header set MAC address action to DV specification.
 496  *
 497  * @param[in,out] resource
 498  *   Pointer to the modify-header resource.
 499  * @param[in] action
 500  *   Pointer to action specification.
 501  * @param[out] error
 502  *   Pointer to the error structure.
 503  *
 504  * @return
 505  *   0 on success, a negative errno value otherwise and rte_errno is set.
 506  */
 507 static int
 508 flow_dv_convert_action_modify_mac
 509                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 510                          const struct rte_flow_action *action,
 511                          struct rte_flow_error *error)
 512 {
 513         const struct rte_flow_action_set_mac *conf =
 514                 (const struct rte_flow_action_set_mac *)(action->conf);
 515         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 516         struct rte_flow_item_eth eth;
 517         struct rte_flow_item_eth eth_mask;
 518
 519         memset(&eth, 0, sizeof(eth));
 520         memset(&eth_mask, 0, sizeof(eth_mask));
 521         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 522                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 523                        sizeof(eth.src.addr_bytes));
 524                 memcpy(&eth_mask.src.addr_bytes,
 525                        &rte_flow_item_eth_mask.src.addr_bytes,
 526                        sizeof(eth_mask.src.addr_bytes));
 527         } else {
 528                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 529                        sizeof(eth.dst.addr_bytes));
 530                 memcpy(&eth_mask.dst.addr_bytes,
 531                        &rte_flow_item_eth_mask.dst.addr_bytes,
 532                        sizeof(eth_mask.dst.addr_bytes));
 533         }
 534         item.spec = &eth;
 535         item.mask = &eth_mask;
 536         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 537                                              MLX5_MODIFICATION_TYPE_SET, error);
 538 }
 539
 540 /**
 541  * Convert modify-header set VLAN VID action to DV specification.
 542  *
 543  * @param[in,out] resource
 544  *   Pointer to the modify-header resource.
 545  * @param[in] action
 546  *   Pointer to action specification.
 547  * @param[out] error
 548  *   Pointer to the error structure.
 549  *
 550  * @return
 551  *   0 on success, a negative errno value otherwise and rte_errno is set.
 552  */
 553 static int
 554 flow_dv_convert_action_modify_vlan_vid
 555                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 556                          const struct rte_flow_action *action,
 557                          struct rte_flow_error *error)
 558 {
 559         const struct rte_flow_action_of_set_vlan_vid *conf =
 560                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 561         int i = resource->actions_num;
 562         struct mlx5_modification_cmd *actions = &resource->actions[i];
 563         struct field_modify_info *field = modify_vlan_out_first_vid;
 564
 565         if (i >= MLX5_MODIFY_NUM)
 566                 return rte_flow_error_set(error, EINVAL,
 567                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 568                          "too many items to modify");
 569         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 570         actions[i].field = field->id;
 571         actions[i].length = field->size;
 572         actions[i].offset = field->offset;
 573         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 574         actions[i].data1 = conf->vlan_vid;
 575         actions[i].data1 = actions[i].data1 << 16;
 576         resource->actions_num = ++i;
 577         return 0;
 578 }
 579
 580 /**
 581  * Convert modify-header set TP action to DV specification.
 582  *
 583  * @param[in,out] resource
 584  *   Pointer to the modify-header resource.
 585  * @param[in] action
 586  *   Pointer to action specification.
 587  * @param[in] items
 588  *   Pointer to rte_flow_item objects list.
 589  * @param[in] attr
 590  *   Pointer to flow attributes structure.
 591  * @param[out] error
 592  *   Pointer to the error structure.
 593  *
 594  * @return
 595  *   0 on success, a negative errno value otherwise and rte_errno is set.
 596  */
 597 static int
 598 flow_dv_convert_action_modify_tp
 599                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 600                          const struct rte_flow_action *action,
 601                          const struct rte_flow_item *items,
 602                          union flow_dv_attr *attr,
 603                          struct rte_flow_error *error)
 604 {
 605         const struct rte_flow_action_set_tp *conf =
 606                 (const struct rte_flow_action_set_tp *)(action->conf);
 607         struct rte_flow_item item;
 608         struct rte_flow_item_udp udp;
 609         struct rte_flow_item_udp udp_mask;
 610         struct rte_flow_item_tcp tcp;
 611         struct rte_flow_item_tcp tcp_mask;
 612         struct field_modify_info *field;
 613
 614         if (!attr->valid)
 615                 flow_dv_attr_init(items, attr);
 616         if (attr->udp) {
 617                 memset(&udp, 0, sizeof(udp));
 618                 memset(&udp_mask, 0, sizeof(udp_mask));
 619                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 620                         udp.hdr.src_port = conf->port;
 621                         udp_mask.hdr.src_port =
 622                                         rte_flow_item_udp_mask.hdr.src_port;
 623                 } else {
 624                         udp.hdr.dst_port = conf->port;
 625                         udp_mask.hdr.dst_port =
 626                                         rte_flow_item_udp_mask.hdr.dst_port;
 627                 }
 628                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 629                 item.spec = &udp;
 630                 item.mask = &udp_mask;
 631                 field = modify_udp;
 632         }
 633         if (attr->tcp) {
 634                 memset(&tcp, 0, sizeof(tcp));
 635                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 636                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 637                         tcp.hdr.src_port = conf->port;
 638                         tcp_mask.hdr.src_port =
 639                                         rte_flow_item_tcp_mask.hdr.src_port;
 640                 } else {
 641                         tcp.hdr.dst_port = conf->port;
 642                         tcp_mask.hdr.dst_port =
 643                                         rte_flow_item_tcp_mask.hdr.dst_port;
 644                 }
 645                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 646                 item.spec = &tcp;
 647                 item.mask = &tcp_mask;
 648                 field = modify_tcp;
 649         }
 650         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 651                                              MLX5_MODIFICATION_TYPE_SET, error);
 652 }
 653
 654 /**
 655  * Convert modify-header set TTL action to DV specification.
 656  *
 657  * @param[in,out] resource
 658  *   Pointer to the modify-header resource.
 659  * @param[in] action
 660  *   Pointer to action specification.
 661  * @param[in] items
 662  *   Pointer to rte_flow_item objects list.
 663  * @param[in] attr
 664  *   Pointer to flow attributes structure.
 665  * @param[out] error
 666  *   Pointer to the error structure.
 667  *
 668  * @return
 669  *   0 on success, a negative errno value otherwise and rte_errno is set.
 670  */
 671 static int
 672 flow_dv_convert_action_modify_ttl
 673                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 674                          const struct rte_flow_action *action,
 675                          const struct rte_flow_item *items,
 676                          union flow_dv_attr *attr,
 677                          struct rte_flow_error *error)
 678 {
 679         const struct rte_flow_action_set_ttl *conf =
 680                 (const struct rte_flow_action_set_ttl *)(action->conf);
 681         struct rte_flow_item item;
 682         struct rte_flow_item_ipv4 ipv4;
 683         struct rte_flow_item_ipv4 ipv4_mask;
 684         struct rte_flow_item_ipv6 ipv6;
 685         struct rte_flow_item_ipv6 ipv6_mask;
 686         struct field_modify_info *field;
 687
 688         if (!attr->valid)
 689                 flow_dv_attr_init(items, attr);
 690         if (attr->ipv4) {
 691                 memset(&ipv4, 0, sizeof(ipv4));
 692                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 693                 ipv4.hdr.time_to_live = conf->ttl_value;
 694                 ipv4_mask.hdr.time_to_live = 0xFF;
 695                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 696                 item.spec = &ipv4;
 697                 item.mask = &ipv4_mask;
 698                 field = modify_ipv4;
 699         }
 700         if (attr->ipv6) {
 701                 memset(&ipv6, 0, sizeof(ipv6));
 702                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 703                 ipv6.hdr.hop_limits = conf->ttl_value;
 704                 ipv6_mask.hdr.hop_limits = 0xFF;
 705                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 706                 item.spec = &ipv6;
 707                 item.mask = &ipv6_mask;
 708                 field = modify_ipv6;
 709         }
 710         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 711                                              MLX5_MODIFICATION_TYPE_SET, error);
 712 }
 713
 714 /**
 715  * Convert modify-header decrement TTL action to DV specification.
 716  *
 717  * @param[in,out] resource
 718  *   Pointer to the modify-header resource.
 719  * @param[in] action
 720  *   Pointer to action specification.
 721  * @param[in] items
 722  *   Pointer to rte_flow_item objects list.
 723  * @param[in] attr
 724  *   Pointer to flow attributes structure.
 725  * @param[out] error
 726  *   Pointer to the error structure.
 727  *
 728  * @return
 729  *   0 on success, a negative errno value otherwise and rte_errno is set.
 730  */
 731 static int
 732 flow_dv_convert_action_modify_dec_ttl
 733                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 734                          const struct rte_flow_item *items,
 735                          union flow_dv_attr *attr,
 736                          struct rte_flow_error *error)
 737 {
 738         struct rte_flow_item item;
 739         struct rte_flow_item_ipv4 ipv4;
 740         struct rte_flow_item_ipv4 ipv4_mask;
 741         struct rte_flow_item_ipv6 ipv6;
 742         struct rte_flow_item_ipv6 ipv6_mask;
 743         struct field_modify_info *field;
 744
 745         if (!attr->valid)
 746                 flow_dv_attr_init(items, attr);
 747         if (attr->ipv4) {
 748                 memset(&ipv4, 0, sizeof(ipv4));
 749                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 750                 ipv4.hdr.time_to_live = 0xFF;
 751                 ipv4_mask.hdr.time_to_live = 0xFF;
 752                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 753                 item.spec = &ipv4;
 754                 item.mask = &ipv4_mask;
 755                 field = modify_ipv4;
 756         }
 757         if (attr->ipv6) {
 758                 memset(&ipv6, 0, sizeof(ipv6));
 759                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 760                 ipv6.hdr.hop_limits = 0xFF;
 761                 ipv6_mask.hdr.hop_limits = 0xFF;
 762                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 763                 item.spec = &ipv6;
 764                 item.mask = &ipv6_mask;
 765                 field = modify_ipv6;
 766         }
 767         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 768                                              MLX5_MODIFICATION_TYPE_ADD, error);
 769 }
 770
 771 /**
 772  * Convert modify-header increment/decrement TCP Sequence number
 773  * to DV specification.
 774  *
 775  * @param[in,out] resource
 776  *   Pointer to the modify-header resource.
 777  * @param[in] action
 778  *   Pointer to action specification.
 779  * @param[out] error
 780  *   Pointer to the error structure.
 781  *
 782  * @return
 783  *   0 on success, a negative errno value otherwise and rte_errno is set.
 784  */
 785 static int
 786 flow_dv_convert_action_modify_tcp_seq
 787                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 788                          const struct rte_flow_action *action,
 789                          struct rte_flow_error *error)
 790 {
 791         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 792         uint64_t value = rte_be_to_cpu_32(*conf);
 793         struct rte_flow_item item;
 794         struct rte_flow_item_tcp tcp;
 795         struct rte_flow_item_tcp tcp_mask;
 796
 797         memset(&tcp, 0, sizeof(tcp));
 798         memset(&tcp_mask, 0, sizeof(tcp_mask));
 799         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 800                 /*
 801                  * The HW has no decrement operation, only increment operation.
 802                  * To simulate decrement X from Y using increment operation
 803                  * we need to add UINT32_MAX X times to Y.
 804                  * Each adding of UINT32_MAX decrements Y by 1.
 805                  */
 806                 value *= UINT32_MAX;
 807         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 808         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 809         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 810         item.spec = &tcp;
 811         item.mask = &tcp_mask;
 812         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 813                                              MLX5_MODIFICATION_TYPE_ADD, error);
 814 }
 815
 816 /**
 817  * Convert modify-header increment/decrement TCP Acknowledgment number
 818  * to DV specification.
 819  *
 820  * @param[in,out] resource
 821  *   Pointer to the modify-header resource.
 822  * @param[in] action
 823  *   Pointer to action specification.
 824  * @param[out] error
 825  *   Pointer to the error structure.
 826  *
 827  * @return
 828  *   0 on success, a negative errno value otherwise and rte_errno is set.
 829  */
 830 static int
 831 flow_dv_convert_action_modify_tcp_ack
 832                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 833                          const struct rte_flow_action *action,
 834                          struct rte_flow_error *error)
 835 {
 836         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 837         uint64_t value = rte_be_to_cpu_32(*conf);
 838         struct rte_flow_item item;
 839         struct rte_flow_item_tcp tcp;
 840         struct rte_flow_item_tcp tcp_mask;
 841
 842         memset(&tcp, 0, sizeof(tcp));
 843         memset(&tcp_mask, 0, sizeof(tcp_mask));
 844         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 845                 /*
 846                  * The HW has no decrement operation, only increment operation.
 847                  * To simulate decrement X from Y using increment operation
 848                  * we need to add UINT32_MAX X times to Y.
 849                  * Each adding of UINT32_MAX decrements Y by 1.
 850                  */
 851                 value *= UINT32_MAX;
 852         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 853         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 854         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 855         item.spec = &tcp;
 856         item.mask = &tcp_mask;
 857         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 858                                              MLX5_MODIFICATION_TYPE_ADD, error);
 859 }
 860
 861 static enum mlx5_modification_field reg_to_field[] = {
 862         [REG_NONE] = MLX5_MODI_OUT_NONE,
 863         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 864         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 865         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 866         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 867         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 868         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 869         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 870         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 871         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 872         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 873 };
 874
 875 /**
 876  * Convert register set to DV specification.
 877  *
 878  * @param[in,out] resource
 879  *   Pointer to the modify-header resource.
 880  * @param[in] action
 881  *   Pointer to action specification.
 882  * @param[out] error
 883  *   Pointer to the error structure.
 884  *
 885  * @return
 886  *   0 on success, a negative errno value otherwise and rte_errno is set.
 887  */
 888 static int
 889 flow_dv_convert_action_set_reg
 890                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 891                          const struct rte_flow_action *action,
 892                          struct rte_flow_error *error)
 893 {
 894         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 895         struct mlx5_modification_cmd *actions = resource->actions;
 896         uint32_t i = resource->actions_num;
 897
 898         if (i >= MLX5_MODIFY_NUM)
 899                 return rte_flow_error_set(error, EINVAL,
 900                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 901                                           "too many items to modify");
 902         assert(conf->id != REG_NONE);
 903         assert(conf->id < RTE_DIM(reg_to_field));
 904         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 905         actions[i].field = reg_to_field[conf->id];
 906         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 907         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 908         ++i;
 909         resource->actions_num = i;
 910         if (!resource->actions_num)
 911                 return rte_flow_error_set(error, EINVAL,
 912                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 913                                           "invalid modification flow item");
 914         return 0;
 915 }
 916
 917 /**
 918  * Convert SET_TAG action to DV specification.
 919  *
 920  * @param[in] dev
 921  *   Pointer to the rte_eth_dev structure.
 922  * @param[in,out] resource
 923  *   Pointer to the modify-header resource.
 924  * @param[in] conf
 925  *   Pointer to action specification.
 926  * @param[out] error
 927  *   Pointer to the error structure.
 928  *
 929  * @return
 930  *   0 on success, a negative errno value otherwise and rte_errno is set.
 931  */
 932 static int
 933 flow_dv_convert_action_set_tag
 934                         (struct rte_eth_dev *dev,
 935                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 936                          const struct rte_flow_action_set_tag *conf,
 937                          struct rte_flow_error *error)
 938 {
 939         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 940         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 941         struct rte_flow_item item = {
 942                 .spec = &data,
 943                 .mask = &mask,
 944         };
 945         struct field_modify_info reg_c_x[] = {
 946                 [1] = {0, 0, 0},
 947         };
 948         enum mlx5_modification_field reg_type;
 949         int ret;
 950
 951         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 952         if (ret < 0)
 953                 return ret;
 954         assert(ret != REG_NONE);
 955         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 956         reg_type = reg_to_field[ret];
 957         assert(reg_type > 0);
 958         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 959         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 960                                              MLX5_MODIFICATION_TYPE_SET, error);
 961 }
 962
 963 /**
 964  * Convert internal COPY_REG action to DV specification.
 965  *
 966  * @param[in] dev
 967  *   Pointer to the rte_eth_dev structure.
 968  * @param[in,out] res
 969  *   Pointer to the modify-header resource.
 970  * @param[in] action
 971  *   Pointer to action specification.
 972  * @param[out] error
 973  *   Pointer to the error structure.
 974  *
 975  * @return
 976  *   0 on success, a negative errno value otherwise and rte_errno is set.
 977  */
 978 static int
 979 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 980                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 981                                  const struct rte_flow_action *action,
 982                                  struct rte_flow_error *error)
 983 {
 984         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 985         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 986         struct rte_flow_item item = {
 987                 .spec = NULL,
 988                 .mask = &mask,
 989         };
 990         struct field_modify_info reg_src[] = {
 991                 {4, 0, reg_to_field[conf->src]},
 992                 {0, 0, 0},
 993         };
 994         struct field_modify_info reg_dst = {
 995                 .offset = 0,
 996                 .id = reg_to_field[conf->dst],
 997         };
 998         /* Adjust reg_c[0] usage according to reported mask. */
 999         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1000                 struct mlx5_priv *priv = dev->data->dev_private;
1001                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1002
1003                 assert(reg_c0);
1004                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1005                 if (conf->dst == REG_C_0) {
1006                         /* Copy to reg_c[0], within mask only. */
1007                         reg_dst.offset = rte_bsf32(reg_c0);
1008                         /*
1009                          * Mask is ignoring the enianness, because
1010                          * there is no conversion in datapath.
1011                          */
1012 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1013                         /* Copy from destination lower bits to reg_c[0]. */
1014                         mask = reg_c0 >> reg_dst.offset;
1015 #else
1016                         /* Copy from destination upper bits to reg_c[0]. */
1017                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1018                                           rte_fls_u32(reg_c0));
1019 #endif
1020                 } else {
1021                         mask = rte_cpu_to_be_32(reg_c0);
1022 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1023                         /* Copy from reg_c[0] to destination lower bits. */
1024                         reg_dst.offset = 0;
1025 #else
1026                         /* Copy from reg_c[0] to destination upper bits. */
1027                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1028                                          (rte_fls_u32(reg_c0) -
1029                                           rte_bsf32(reg_c0));
1030 #endif
1031                 }
1032         }
1033         return flow_dv_convert_modify_action(&item,
1034                                              reg_src, &reg_dst, res,
1035                                              MLX5_MODIFICATION_TYPE_COPY,
1036                                              error);
1037 }
1038
1039 /**
1040  * Convert MARK action to DV specification. This routine is used
1041  * in extensive metadata only and requires metadata register to be
1042  * handled. In legacy mode hardware tag resource is engaged.
1043  *
1044  * @param[in] dev
1045  *   Pointer to the rte_eth_dev structure.
1046  * @param[in] conf
1047  *   Pointer to MARK action specification.
1048  * @param[in,out] resource
1049  *   Pointer to the modify-header resource.
1050  * @param[out] error
1051  *   Pointer to the error structure.
1052  *
1053  * @return
1054  *   0 on success, a negative errno value otherwise and rte_errno is set.
1055  */
1056 static int
1057 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1058                             const struct rte_flow_action_mark *conf,
1059                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1060                             struct rte_flow_error *error)
1061 {
1062         struct mlx5_priv *priv = dev->data->dev_private;
1063         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1064                                            priv->sh->dv_mark_mask);
1065         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1066         struct rte_flow_item item = {
1067                 .spec = &data,
1068                 .mask = &mask,
1069         };
1070         struct field_modify_info reg_c_x[] = {
1071                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1072                 {0, 0, 0},
1073         };
1074         enum modify_reg reg;
1075
1076         if (!mask)
1077                 return rte_flow_error_set(error, EINVAL,
1078                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1079                                           NULL, "zero mark action mask");
1080         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1081         if (reg < 0)
1082                 return reg;
1083         assert(reg > 0);
1084         reg_c_x[0].id = reg_to_field[reg];
1085         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1086                                              MLX5_MODIFICATION_TYPE_SET, error);
1087 }
1088
1089 /**
1090  * Get metadata register index for specified steering domain.
1091  *
1092  * @param[in] dev
1093  *   Pointer to the rte_eth_dev structure.
1094  * @param[in] attr
1095  *   Attributes of flow to determine steering domain.
1096  * @param[out] error
1097  *   Pointer to the error structure.
1098  *
1099  * @return
1100  *   positive index on success, a negative errno value otherwise
1101  *   and rte_errno is set.
1102  */
1103 static enum modify_reg
1104 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1105                          const struct rte_flow_attr *attr,
1106                          struct rte_flow_error *error)
1107 {
1108         enum modify_reg reg =
1109                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1110                                           MLX5_METADATA_FDB :
1111                                             attr->egress ?
1112                                             MLX5_METADATA_TX :
1113                                             MLX5_METADATA_RX, 0, error);
1114         if (reg < 0)
1115                 return rte_flow_error_set(error,
1116                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1117                                           NULL, "unavailable "
1118                                           "metadata register");
1119         return reg;
1120 }
1121
1122 /**
1123  * Convert SET_META action to DV specification.
1124  *
1125  * @param[in] dev
1126  *   Pointer to the rte_eth_dev structure.
1127  * @param[in,out] resource
1128  *   Pointer to the modify-header resource.
1129  * @param[in] attr
1130  *   Attributes of flow that includes this item.
1131  * @param[in] conf
1132  *   Pointer to action specification.
1133  * @param[out] error
1134  *   Pointer to the error structure.
1135  *
1136  * @return
1137  *   0 on success, a negative errno value otherwise and rte_errno is set.
1138  */
1139 static int
1140 flow_dv_convert_action_set_meta
1141                         (struct rte_eth_dev *dev,
1142                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1143                          const struct rte_flow_attr *attr,
1144                          const struct rte_flow_action_set_meta *conf,
1145                          struct rte_flow_error *error)
1146 {
1147         uint32_t data = conf->data;
1148         uint32_t mask = conf->mask;
1149         struct rte_flow_item item = {
1150                 .spec = &data,
1151                 .mask = &mask,
1152         };
1153         struct field_modify_info reg_c_x[] = {
1154                 [1] = {0, 0, 0},
1155         };
1156         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1157
1158         if (reg < 0)
1159                 return reg;
1160         /*
1161          * In datapath code there is no endianness
1162          * coversions for perfromance reasons, all
1163          * pattern conversions are done in rte_flow.
1164          */
1165         if (reg == REG_C_0) {
1166                 struct mlx5_priv *priv = dev->data->dev_private;
1167                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1168                 uint32_t shl_c0;
1169
1170                 assert(msk_c0);
1171 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1172                 shl_c0 = rte_bsf32(msk_c0);
1173 #else
1174                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1175 #endif
1176                 mask <<= shl_c0;
1177                 data <<= shl_c0;
1178                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1179         }
1180         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1181         /* The routine expects parameters in memory as big-endian ones. */
1182         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1183                                              MLX5_MODIFICATION_TYPE_SET, error);
1184 }
1185
1186 /**
1187  * Validate MARK item.
1188  *
1189  * @param[in] dev
1190  *   Pointer to the rte_eth_dev structure.
1191  * @param[in] item
1192  *   Item specification.
1193  * @param[in] attr
1194  *   Attributes of flow that includes this item.
1195  * @param[out] error
1196  *   Pointer to error structure.
1197  *
1198  * @return
1199  *   0 on success, a negative errno value otherwise and rte_errno is set.
1200  */
1201 static int
1202 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1203                            const struct rte_flow_item *item,
1204                            const struct rte_flow_attr *attr __rte_unused,
1205                            struct rte_flow_error *error)
1206 {
1207         struct mlx5_priv *priv = dev->data->dev_private;
1208         struct mlx5_dev_config *config = &priv->config;
1209         const struct rte_flow_item_mark *spec = item->spec;
1210         const struct rte_flow_item_mark *mask = item->mask;
1211         const struct rte_flow_item_mark nic_mask = {
1212                 .id = priv->sh->dv_mark_mask,
1213         };
1214         int ret;
1215
1216         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1217                 return rte_flow_error_set(error, ENOTSUP,
1218                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1219                                           "extended metadata feature"
1220                                           " isn't enabled");
1221         if (!mlx5_flow_ext_mreg_supported(dev))
1222                 return rte_flow_error_set(error, ENOTSUP,
1223                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1224                                           "extended metadata register"
1225                                           " isn't supported");
1226         if (!nic_mask.id)
1227                 return rte_flow_error_set(error, ENOTSUP,
1228                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1229                                           "extended metadata register"
1230                                           " isn't available");
1231         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1232         if (ret < 0)
1233                 return ret;
1234         if (!spec)
1235                 return rte_flow_error_set(error, EINVAL,
1236                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1237                                           item->spec,
1238                                           "data cannot be empty");
1239         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1240                 return rte_flow_error_set(error, EINVAL,
1241                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1242                                           &spec->id,
1243                                           "mark id exceeds the limit");
1244         if (!mask)
1245                 mask = &nic_mask;
1246         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1247                                         (const uint8_t *)&nic_mask,
1248                                         sizeof(struct rte_flow_item_mark),
1249                                         error);
1250         if (ret < 0)
1251                 return ret;
1252         return 0;
1253 }
1254
1255 /**
1256  * Validate META item.
1257  *
1258  * @param[in] dev
1259  *   Pointer to the rte_eth_dev structure.
1260  * @param[in] item
1261  *   Item specification.
1262  * @param[in] attr
1263  *   Attributes of flow that includes this item.
1264  * @param[out] error
1265  *   Pointer to error structure.
1266  *
1267  * @return
1268  *   0 on success, a negative errno value otherwise and rte_errno is set.
1269  */
1270 static int
1271 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1272                            const struct rte_flow_item *item,
1273                            const struct rte_flow_attr *attr,
1274                            struct rte_flow_error *error)
1275 {
1276         struct mlx5_priv *priv = dev->data->dev_private;
1277         struct mlx5_dev_config *config = &priv->config;
1278         const struct rte_flow_item_meta *spec = item->spec;
1279         const struct rte_flow_item_meta *mask = item->mask;
1280         struct rte_flow_item_meta nic_mask = {
1281                 .data = UINT32_MAX
1282         };
1283         enum modify_reg reg;
1284         int ret;
1285
1286         if (!spec)
1287                 return rte_flow_error_set(error, EINVAL,
1288                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1289                                           item->spec,
1290                                           "data cannot be empty");
1291         if (!spec->data)
1292                 return rte_flow_error_set(error, EINVAL,
1293                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1294                                           "data cannot be zero");
1295         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1296                 if (!mlx5_flow_ext_mreg_supported(dev))
1297                         return rte_flow_error_set(error, ENOTSUP,
1298                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1299                                           "extended metadata register"
1300                                           " isn't supported");
1301                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1302                 if (reg < 0)
1303                         return reg;
1304                 if (reg == REG_B)
1305                         return rte_flow_error_set(error, ENOTSUP,
1306                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1307                                           "match on reg_b "
1308                                           "isn't supported");
1309                 if (reg != REG_A)
1310                         nic_mask.data = priv->sh->dv_meta_mask;
1311         }
1312         if (!mask)
1313                 mask = &rte_flow_item_meta_mask;
1314         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1315                                         (const uint8_t *)&nic_mask,
1316                                         sizeof(struct rte_flow_item_meta),
1317                                         error);
1318         return ret;
1319 }
1320
1321 /**
1322  * Validate TAG item.
1323  *
1324  * @param[in] dev
1325  *   Pointer to the rte_eth_dev structure.
1326  * @param[in] item
1327  *   Item specification.
1328  * @param[in] attr
1329  *   Attributes of flow that includes this item.
1330  * @param[out] error
1331  *   Pointer to error structure.
1332  *
1333  * @return
1334  *   0 on success, a negative errno value otherwise and rte_errno is set.
1335  */
1336 static int
1337 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1338                           const struct rte_flow_item *item,
1339                           const struct rte_flow_attr *attr __rte_unused,
1340                           struct rte_flow_error *error)
1341 {
1342         const struct rte_flow_item_tag *spec = item->spec;
1343         const struct rte_flow_item_tag *mask = item->mask;
1344         const struct rte_flow_item_tag nic_mask = {
1345                 .data = RTE_BE32(UINT32_MAX),
1346                 .index = 0xff,
1347         };
1348         int ret;
1349
1350         if (!mlx5_flow_ext_mreg_supported(dev))
1351                 return rte_flow_error_set(error, ENOTSUP,
1352                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1353                                           "extensive metadata register"
1354                                           " isn't supported");
1355         if (!spec)
1356                 return rte_flow_error_set(error, EINVAL,
1357                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1358                                           item->spec,
1359                                           "data cannot be empty");
1360         if (!mask)
1361                 mask = &rte_flow_item_tag_mask;
1362         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1363                                         (const uint8_t *)&nic_mask,
1364                                         sizeof(struct rte_flow_item_tag),
1365                                         error);
1366         if (ret < 0)
1367                 return ret;
1368         if (mask->index != 0xff)
1369                 return rte_flow_error_set(error, EINVAL,
1370                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1371                                           "partial mask for tag index"
1372                                           " is not supported");
1373         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1374         if (ret < 0)
1375                 return ret;
1376         assert(ret != REG_NONE);
1377         return 0;
1378 }
1379
1380 /**
1381  * Validate vport item.
1382  *
1383  * @param[in] dev
1384  *   Pointer to the rte_eth_dev structure.
1385  * @param[in] item
1386  *   Item specification.
1387  * @param[in] attr
1388  *   Attributes of flow that includes this item.
1389  * @param[in] item_flags
1390  *   Bit-fields that holds the items detected until now.
1391  * @param[out] error
1392  *   Pointer to error structure.
1393  *
1394  * @return
1395  *   0 on success, a negative errno value otherwise and rte_errno is set.
1396  */
1397 static int
1398 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1399                               const struct rte_flow_item *item,
1400                               const struct rte_flow_attr *attr,
1401                               uint64_t item_flags,
1402                               struct rte_flow_error *error)
1403 {
1404         const struct rte_flow_item_port_id *spec = item->spec;
1405         const struct rte_flow_item_port_id *mask = item->mask;
1406         const struct rte_flow_item_port_id switch_mask = {
1407                         .id = 0xffffffff,
1408         };
1409         struct mlx5_priv *esw_priv;
1410         struct mlx5_priv *dev_priv;
1411         int ret;
1412
1413         if (!attr->transfer)
1414                 return rte_flow_error_set(error, EINVAL,
1415                                           RTE_FLOW_ERROR_TYPE_ITEM,
1416                                           NULL,
1417                                           "match on port id is valid only"
1418                                           " when transfer flag is enabled");
1419         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1420                 return rte_flow_error_set(error, ENOTSUP,
1421                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1422                                           "multiple source ports are not"
1423                                           " supported");
1424         if (!mask)
1425                 mask = &switch_mask;
1426         if (mask->id != 0xffffffff)
1427                 return rte_flow_error_set(error, ENOTSUP,
1428                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1429                                            mask,
1430                                            "no support for partial mask on"
1431                                            " \"id\" field");
1432         ret = mlx5_flow_item_acceptable
1433                                 (item, (const uint8_t *)mask,
1434                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1435                                  sizeof(struct rte_flow_item_port_id),
1436                                  error);
1437         if (ret)
1438                 return ret;
1439         if (!spec)
1440                 return 0;
1441         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1442         if (!esw_priv)
1443                 return rte_flow_error_set(error, rte_errno,
1444                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1445                                           "failed to obtain E-Switch info for"
1446                                           " port");
1447         dev_priv = mlx5_dev_to_eswitch_info(dev);
1448         if (!dev_priv)
1449                 return rte_flow_error_set(error, rte_errno,
1450                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1451                                           NULL,
1452                                           "failed to obtain E-Switch info");
1453         if (esw_priv->domain_id != dev_priv->domain_id)
1454                 return rte_flow_error_set(error, EINVAL,
1455                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1456                                           "cannot match on a port from a"
1457                                           " different E-Switch");
1458         return 0;
1459 }
1460
1461 /**
1462  * Validate the pop VLAN action.
1463  *
1464  * @param[in] dev
1465  *   Pointer to the rte_eth_dev structure.
1466  * @param[in] action_flags
1467  *   Holds the actions detected until now.
1468  * @param[in] action
1469  *   Pointer to the pop vlan action.
1470  * @param[in] item_flags
1471  *   The items found in this flow rule.
1472  * @param[in] attr
1473  *   Pointer to flow attributes.
1474  * @param[out] error
1475  *   Pointer to error structure.
1476  *
1477  * @return
1478  *   0 on success, a negative errno value otherwise and rte_errno is set.
1479  */
1480 static int
1481 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1482                                  uint64_t action_flags,
1483                                  const struct rte_flow_action *action,
1484                                  uint64_t item_flags,
1485                                  const struct rte_flow_attr *attr,
1486                                  struct rte_flow_error *error)
1487 {
1488         struct mlx5_priv *priv = dev->data->dev_private;
1489
1490         (void)action;
1491         (void)attr;
1492         if (!priv->sh->pop_vlan_action)
1493                 return rte_flow_error_set(error, ENOTSUP,
1494                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1495                                           NULL,
1496                                           "pop vlan action is not supported");
1497         /*
1498          * Check for inconsistencies:
1499          *  fail strip_vlan in a flow that matches packets without VLAN tags.
1500          *  fail strip_vlan in a flow that matches packets without explicitly a
1501          *  matching on VLAN tag ?
1502          */
1503         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
1504                 return rte_flow_error_set(error, ENOTSUP,
1505                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1506                                           NULL,
1507                                           "no support for multiple vlan pop "
1508                                           "actions");
1509         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1510                 return rte_flow_error_set(error, ENOTSUP,
1511                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1512                                           NULL,
1513                                           "cannot pop vlan without a "
1514                                           "match on (outer) vlan in the flow");
1515         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1516                 return rte_flow_error_set(error, EINVAL,
1517                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1518                                           "wrong action order, port_id should "
1519                                           "be after pop VLAN action");
1520         return 0;
1521 }
1522
1523 /**
1524  * Get VLAN default info from vlan match info.
1525  *
1526  * @param[in] dev
1527  *   Pointer to the rte_eth_dev structure.
1528  * @param[in] item
1529  *   the list of item specifications.
1530  * @param[out] vlan
1531  *   pointer VLAN info to fill to.
1532  * @param[out] error
1533  *   Pointer to error structure.
1534  *
1535  * @return
1536  *   0 on success, a negative errno value otherwise and rte_errno is set.
1537  */
1538 static void
1539 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1540                                   struct rte_vlan_hdr *vlan)
1541 {
1542         const struct rte_flow_item_vlan nic_mask = {
1543                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1544                                 MLX5DV_FLOW_VLAN_VID_MASK),
1545                 .inner_type = RTE_BE16(0xffff),
1546         };
1547
1548         if (items == NULL)
1549                 return;
1550         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1551                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1552                 ;
1553         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1554                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1555                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1556
1557                 if (!vlan_m)
1558                         vlan_m = &nic_mask;
1559                 /* Only full match values are accepted */
1560                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1561                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1562                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1563                         vlan->vlan_tci |=
1564                                 rte_be_to_cpu_16(vlan_v->tci &
1565                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1566                 }
1567                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1568                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1569                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1570                         vlan->vlan_tci |=
1571                                 rte_be_to_cpu_16(vlan_v->tci &
1572                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1573                 }
1574                 if (vlan_m->inner_type == nic_mask.inner_type)
1575                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1576                                                            vlan_m->inner_type);
1577         }
1578 }
1579
1580 /**
1581  * Validate the push VLAN action.
1582  *
1583  * @param[in] action_flags
1584  *   Holds the actions detected until now.
1585  * @param[in] action
1586  *   Pointer to the encap action.
1587  * @param[in] attr
1588  *   Pointer to flow attributes
1589  * @param[out] error
1590  *   Pointer to error structure.
1591  *
1592  * @return
1593  *   0 on success, a negative errno value otherwise and rte_errno is set.
1594  */
1595 static int
1596 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1597                                   uint64_t item_flags,
1598                                   const struct rte_flow_action *action,
1599                                   const struct rte_flow_attr *attr,
1600                                   struct rte_flow_error *error)
1601 {
1602         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1603
1604         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1605             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1606                 return rte_flow_error_set(error, EINVAL,
1607                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1608                                           "invalid vlan ethertype");
1609         if (action_flags &
1610                 (MLX5_FLOW_ACTION_OF_POP_VLAN | MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1611                 return rte_flow_error_set(error, ENOTSUP,
1612                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1613                                           "no support for multiple VLAN "
1614                                           "actions");
1615         if (!mlx5_flow_find_action
1616                         (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) &&
1617             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1618                 return rte_flow_error_set(error, ENOTSUP,
1619                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
1620                                 "push VLAN needs to match on VLAN in order to "
1621                                 "get VLAN VID information because there is "
1622                                 "no followed set VLAN VID action");
1623         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1624                 return rte_flow_error_set(error, EINVAL,
1625                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1626                                           "wrong action order, port_id should "
1627                                           "be after push VLAN");
1628         (void)attr;
1629         return 0;
1630 }
1631
1632 /**
1633  * Validate the set VLAN PCP.
1634  *
1635  * @param[in] action_flags
1636  *   Holds the actions detected until now.
1637  * @param[in] actions
1638  *   Pointer to the list of actions remaining in the flow rule.
1639  * @param[in] attr
1640  *   Pointer to flow attributes
1641  * @param[out] error
1642  *   Pointer to error structure.
1643  *
1644  * @return
1645  *   0 on success, a negative errno value otherwise and rte_errno is set.
1646  */
1647 static int
1648 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1649                                      const struct rte_flow_action actions[],
1650                                      struct rte_flow_error *error)
1651 {
1652         const struct rte_flow_action *action = actions;
1653         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1654
1655         if (conf->vlan_pcp > 7)
1656                 return rte_flow_error_set(error, EINVAL,
1657                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1658                                           "VLAN PCP value is too big");
1659         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1660                 return rte_flow_error_set(error, ENOTSUP,
1661                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1662                                           "set VLAN PCP action must follow "
1663                                           "the push VLAN action");
1664         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1665                 return rte_flow_error_set(error, ENOTSUP,
1666                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1667                                           "Multiple VLAN PCP modification are "
1668                                           "not supported");
1669         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1670                 return rte_flow_error_set(error, EINVAL,
1671                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1672                                           "wrong action order, port_id should "
1673                                           "be after set VLAN PCP");
1674         return 0;
1675 }
1676
1677 /**
1678  * Validate the set VLAN VID.
1679  *
1680  * @param[in] item_flags
1681  *   Holds the items detected in this rule.
1682  * @param[in] actions
1683  *   Pointer to the list of actions remaining in the flow rule.
1684  * @param[in] attr
1685  *   Pointer to flow attributes
1686  * @param[out] error
1687  *   Pointer to error structure.
1688  *
1689  * @return
1690  *   0 on success, a negative errno value otherwise and rte_errno is set.
1691  */
1692 static int
1693 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1694                                      uint64_t action_flags,
1695                                      const struct rte_flow_action actions[],
1696                                      struct rte_flow_error *error)
1697 {
1698         const struct rte_flow_action *action = actions;
1699         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1700
1701         if (conf->vlan_vid > RTE_BE16(0xFFE))
1702                 return rte_flow_error_set(error, EINVAL,
1703                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1704                                           "VLAN VID value is too big");
1705         /* there is an of_push_vlan action before us */
1706         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1707                 if (mlx5_flow_find_action(actions + 1,
1708                                           RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1709                         return rte_flow_error_set(error, ENOTSUP,
1710                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
1711                                         "Multiple VLAN VID modifications are "
1712                                         "not supported");
1713                 else
1714                         return 0;
1715         }
1716
1717         /*
1718          * Action is on an existing VLAN header:
1719          *    Need to verify this is a single modify CID action.
1720          *   Rule mast include a match on outer VLAN.
1721          */
1722         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1723                 return rte_flow_error_set(error, ENOTSUP,
1724                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1725                                           "Multiple VLAN VID modifications are "
1726                                           "not supported");
1727         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1728                 return rte_flow_error_set(error, EINVAL,
1729                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1730                                           "match on VLAN is required in order "
1731                                           "to set VLAN VID");
1732         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1733                 return rte_flow_error_set(error, EINVAL,
1734                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1735                                           "wrong action order, port_id should "
1736                                           "be after set VLAN VID");
1737         return 0;
1738 }
1739
1740 /*
1741  * Validate the FLAG action.
1742  *
1743  * @param[in] dev
1744  *   Pointer to the rte_eth_dev structure.
1745  * @param[in] action_flags
1746  *   Holds the actions detected until now.
1747  * @param[in] attr
1748  *   Pointer to flow attributes
1749  * @param[out] error
1750  *   Pointer to error structure.
1751  *
1752  * @return
1753  *   0 on success, a negative errno value otherwise and rte_errno is set.
1754  */
1755 static int
1756 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1757                              uint64_t action_flags,
1758                              const struct rte_flow_attr *attr,
1759                              struct rte_flow_error *error)
1760 {
1761         struct mlx5_priv *priv = dev->data->dev_private;
1762         struct mlx5_dev_config *config = &priv->config;
1763         int ret;
1764
1765         /* Fall back if no extended metadata register support. */
1766         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1767                 return mlx5_flow_validate_action_flag(action_flags, attr,
1768                                                       error);
1769         /* Extensive metadata mode requires registers. */
1770         if (!mlx5_flow_ext_mreg_supported(dev))
1771                 return rte_flow_error_set(error, ENOTSUP,
1772                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1773                                           "no metadata registers "
1774                                           "to support flag action");
1775         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1776                 return rte_flow_error_set(error, ENOTSUP,
1777                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1778                                           "extended metadata register"
1779                                           " isn't available");
1780         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1781         if (ret < 0)
1782                 return ret;
1783         assert(ret > 0);
1784         if (action_flags & MLX5_FLOW_ACTION_DROP)
1785                 return rte_flow_error_set(error, EINVAL,
1786                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1787                                           "can't drop and flag in same flow");
1788         if (action_flags & MLX5_FLOW_ACTION_MARK)
1789                 return rte_flow_error_set(error, EINVAL,
1790                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1791                                           "can't mark and flag in same flow");
1792         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1793                 return rte_flow_error_set(error, EINVAL,
1794                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1795                                           "can't have 2 flag"
1796                                           " actions in same flow");
1797         return 0;
1798 }
1799
1800 /**
1801  * Validate MARK action.
1802  *
1803  * @param[in] dev
1804  *   Pointer to the rte_eth_dev structure.
1805  * @param[in] action
1806  *   Pointer to action.
1807  * @param[in] action_flags
1808  *   Holds the actions detected until now.
1809  * @param[in] attr
1810  *   Pointer to flow attributes
1811  * @param[out] error
1812  *   Pointer to error structure.
1813  *
1814  * @return
1815  *   0 on success, a negative errno value otherwise and rte_errno is set.
1816  */
1817 static int
1818 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1819                              const struct rte_flow_action *action,
1820                              uint64_t action_flags,
1821                              const struct rte_flow_attr *attr,
1822                              struct rte_flow_error *error)
1823 {
1824         struct mlx5_priv *priv = dev->data->dev_private;
1825         struct mlx5_dev_config *config = &priv->config;
1826         const struct rte_flow_action_mark *mark = action->conf;
1827         int ret;
1828
1829         /* Fall back if no extended metadata register support. */
1830         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1831                 return mlx5_flow_validate_action_mark(action, action_flags,
1832                                                       attr, error);
1833         /* Extensive metadata mode requires registers. */
1834         if (!mlx5_flow_ext_mreg_supported(dev))
1835                 return rte_flow_error_set(error, ENOTSUP,
1836                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1837                                           "no metadata registers "
1838                                           "to support mark action");
1839         if (!priv->sh->dv_mark_mask)
1840                 return rte_flow_error_set(error, ENOTSUP,
1841                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1842                                           "extended metadata register"
1843                                           " isn't available");
1844         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1845         if (ret < 0)
1846                 return ret;
1847         assert(ret > 0);
1848         if (!mark)
1849                 return rte_flow_error_set(error, EINVAL,
1850                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1851                                           "configuration cannot be null");
1852         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1853                 return rte_flow_error_set(error, EINVAL,
1854                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1855                                           &mark->id,
1856                                           "mark id exceeds the limit");
1857         if (action_flags & MLX5_FLOW_ACTION_DROP)
1858                 return rte_flow_error_set(error, EINVAL,
1859                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1860                                           "can't drop and mark in same flow");
1861         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1862                 return rte_flow_error_set(error, EINVAL,
1863                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1864                                           "can't flag and mark in same flow");
1865         if (action_flags & MLX5_FLOW_ACTION_MARK)
1866                 return rte_flow_error_set(error, EINVAL,
1867                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1868                                           "can't have 2 mark actions in same"
1869                                           " flow");
1870         return 0;
1871 }
1872
1873 /**
1874  * Validate SET_META action.
1875  *
1876  * @param[in] dev
1877  *   Pointer to the rte_eth_dev structure.
1878  * @param[in] action
1879  *   Pointer to the encap action.
1880  * @param[in] action_flags
1881  *   Holds the actions detected until now.
1882  * @param[in] attr
1883  *   Pointer to flow attributes
1884  * @param[out] error
1885  *   Pointer to error structure.
1886  *
1887  * @return
1888  *   0 on success, a negative errno value otherwise and rte_errno is set.
1889  */
1890 static int
1891 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
1892                                  const struct rte_flow_action *action,
1893                                  uint64_t action_flags __rte_unused,
1894                                  const struct rte_flow_attr *attr,
1895                                  struct rte_flow_error *error)
1896 {
1897         const struct rte_flow_action_set_meta *conf;
1898         uint32_t nic_mask = UINT32_MAX;
1899         enum modify_reg reg;
1900
1901         if (!mlx5_flow_ext_mreg_supported(dev))
1902                 return rte_flow_error_set(error, ENOTSUP,
1903                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1904                                           "extended metadata register"
1905                                           " isn't supported");
1906         reg = flow_dv_get_metadata_reg(dev, attr, error);
1907         if (reg < 0)
1908                 return reg;
1909         if (reg != REG_A && reg != REG_B) {
1910                 struct mlx5_priv *priv = dev->data->dev_private;
1911
1912                 nic_mask = priv->sh->dv_meta_mask;
1913         }
1914         if (!(action->conf))
1915                 return rte_flow_error_set(error, EINVAL,
1916                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1917                                           "configuration cannot be null");
1918         conf = (const struct rte_flow_action_set_meta *)action->conf;
1919         if (!conf->mask)
1920                 return rte_flow_error_set(error, EINVAL,
1921                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1922                                           "zero mask doesn't have any effect");
1923         if (conf->mask & ~nic_mask)
1924                 return rte_flow_error_set(error, EINVAL,
1925                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1926                                           "meta data must be within reg C0");
1927         if (!(conf->data & conf->mask))
1928                 return rte_flow_error_set(error, EINVAL,
1929                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1930                                           "zero value has no effect");
1931         return 0;
1932 }
1933
1934 /**
1935  * Validate SET_TAG action.
1936  *
1937  * @param[in] dev
1938  *   Pointer to the rte_eth_dev structure.
1939  * @param[in] action
1940  *   Pointer to the encap action.
1941  * @param[in] action_flags
1942  *   Holds the actions detected until now.
1943  * @param[in] attr
1944  *   Pointer to flow attributes
1945  * @param[out] error
1946  *   Pointer to error structure.
1947  *
1948  * @return
1949  *   0 on success, a negative errno value otherwise and rte_errno is set.
1950  */
1951 static int
1952 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
1953                                 const struct rte_flow_action *action,
1954                                 uint64_t action_flags,
1955                                 const struct rte_flow_attr *attr,
1956                                 struct rte_flow_error *error)
1957 {
1958         const struct rte_flow_action_set_tag *conf;
1959         const uint64_t terminal_action_flags =
1960                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
1961                 MLX5_FLOW_ACTION_RSS;
1962         int ret;
1963
1964         if (!mlx5_flow_ext_mreg_supported(dev))
1965                 return rte_flow_error_set(error, ENOTSUP,
1966                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1967                                           "extensive metadata register"
1968                                           " isn't supported");
1969         if (!(action->conf))
1970                 return rte_flow_error_set(error, EINVAL,
1971                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1972                                           "configuration cannot be null");
1973         conf = (const struct rte_flow_action_set_tag *)action->conf;
1974         if (!conf->mask)
1975                 return rte_flow_error_set(error, EINVAL,
1976                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1977                                           "zero mask doesn't have any effect");
1978         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1979         if (ret < 0)
1980                 return ret;
1981         if (!attr->transfer && attr->ingress &&
1982             (action_flags & terminal_action_flags))
1983                 return rte_flow_error_set(error, EINVAL,
1984                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1985                                           "set_tag has no effect"
1986                                           " with terminal actions");
1987         return 0;
1988 }
1989
1990 /**
1991  * Validate count action.
1992  *
1993  * @param[in] dev
1994  *   device otr.
1995  * @param[out] error
1996  *   Pointer to error structure.
1997  *
1998  * @return
1999  *   0 on success, a negative errno value otherwise and rte_errno is set.
2000  */
2001 static int
2002 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2003                               struct rte_flow_error *error)
2004 {
2005         struct mlx5_priv *priv = dev->data->dev_private;
2006
2007         if (!priv->config.devx)
2008                 goto notsup_err;
2009 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2010         return 0;
2011 #endif
2012 notsup_err:
2013         return rte_flow_error_set
2014                       (error, ENOTSUP,
2015                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2016                        NULL,
2017                        "count action not supported");
2018 }
2019
2020 /**
2021  * Validate the L2 encap action.
2022  *
2023  * @param[in] action_flags
2024  *   Holds the actions detected until now.
2025  * @param[in] action
2026  *   Pointer to the encap action.
2027  * @param[in] attr
2028  *   Pointer to flow attributes
2029  * @param[out] error
2030  *   Pointer to error structure.
2031  *
2032  * @return
2033  *   0 on success, a negative errno value otherwise and rte_errno is set.
2034  */
2035 static int
2036 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2037                                  const struct rte_flow_action *action,
2038                                  const struct rte_flow_attr *attr,
2039                                  struct rte_flow_error *error)
2040 {
2041         if (!(action->conf))
2042                 return rte_flow_error_set(error, EINVAL,
2043                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2044                                           "configuration cannot be null");
2045         if (action_flags & MLX5_FLOW_ACTION_DROP)
2046                 return rte_flow_error_set(error, EINVAL,
2047                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2048                                           "can't drop and encap in same flow");
2049         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2050                 return rte_flow_error_set(error, EINVAL,
2051                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2052                                           "can only have a single encap or"
2053                                           " decap action in a flow");
2054         if (!attr->transfer && attr->ingress)
2055                 return rte_flow_error_set(error, ENOTSUP,
2056                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2057                                           NULL,
2058                                           "encap action not supported for "
2059                                           "ingress");
2060         return 0;
2061 }
2062
2063 /**
2064  * Validate the L2 decap action.
2065  *
2066  * @param[in] action_flags
2067  *   Holds the actions detected until now.
2068  * @param[in] attr
2069  *   Pointer to flow attributes
2070  * @param[out] error
2071  *   Pointer to error structure.
2072  *
2073  * @return
2074  *   0 on success, a negative errno value otherwise and rte_errno is set.
2075  */
2076 static int
2077 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2078                                  const struct rte_flow_attr *attr,
2079                                  struct rte_flow_error *error)
2080 {
2081         if (action_flags & MLX5_FLOW_ACTION_DROP)
2082                 return rte_flow_error_set(error, EINVAL,
2083                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2084                                           "can't drop and decap in same flow");
2085         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2086                 return rte_flow_error_set(error, EINVAL,
2087                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2088                                           "can only have a single encap or"
2089                                           " decap action in a flow");
2090         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2091                 return rte_flow_error_set(error, EINVAL,
2092                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2093                                           "can't have decap action after"
2094                                           " modify action");
2095         if (attr->egress)
2096                 return rte_flow_error_set(error, ENOTSUP,
2097                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2098                                           NULL,
2099                                           "decap action not supported for "
2100                                           "egress");
2101         return 0;
2102 }
2103
2104 /**
2105  * Validate the raw encap action.
2106  *
2107  * @param[in] action_flags
2108  *   Holds the actions detected until now.
2109  * @param[in] action
2110  *   Pointer to the encap action.
2111  * @param[in] attr
2112  *   Pointer to flow attributes
2113  * @param[out] error
2114  *   Pointer to error structure.
2115  *
2116  * @return
2117  *   0 on success, a negative errno value otherwise and rte_errno is set.
2118  */
2119 static int
2120 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2121                                   const struct rte_flow_action *action,
2122                                   const struct rte_flow_attr *attr,
2123                                   struct rte_flow_error *error)
2124 {
2125         const struct rte_flow_action_raw_encap *raw_encap =
2126                 (const struct rte_flow_action_raw_encap *)action->conf;
2127         if (!(action->conf))
2128                 return rte_flow_error_set(error, EINVAL,
2129                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2130                                           "configuration cannot be null");
2131         if (action_flags & MLX5_FLOW_ACTION_DROP)
2132                 return rte_flow_error_set(error, EINVAL,
2133                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2134                                           "can't drop and encap in same flow");
2135         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2136                 return rte_flow_error_set(error, EINVAL,
2137                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2138                                           "can only have a single encap"
2139                                           " action in a flow");
2140         /* encap without preceding decap is not supported for ingress */
2141         if (!attr->transfer &&  attr->ingress &&
2142             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2143                 return rte_flow_error_set(error, ENOTSUP,
2144                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2145                                           NULL,
2146                                           "encap action not supported for "
2147                                           "ingress");
2148         if (!raw_encap->size || !raw_encap->data)
2149                 return rte_flow_error_set(error, EINVAL,
2150                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2151                                           "raw encap data cannot be empty");
2152         return 0;
2153 }
2154
2155 /**
2156  * Validate the raw decap action.
2157  *
2158  * @param[in] action_flags
2159  *   Holds the actions detected until now.
2160  * @param[in] action
2161  *   Pointer to the encap action.
2162  * @param[in] attr
2163  *   Pointer to flow attributes
2164  * @param[out] error
2165  *   Pointer to error structure.
2166  *
2167  * @return
2168  *   0 on success, a negative errno value otherwise and rte_errno is set.
2169  */
2170 static int
2171 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2172                                   const struct rte_flow_action *action,
2173                                   const struct rte_flow_attr *attr,
2174                                   struct rte_flow_error *error)
2175 {
2176         const struct rte_flow_action_raw_decap *decap   = action->conf;
2177
2178         if (action_flags & MLX5_FLOW_ACTION_DROP)
2179                 return rte_flow_error_set(error, EINVAL,
2180                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2181                                           "can't drop and decap in same flow");
2182         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2183                 return rte_flow_error_set(error, EINVAL,
2184                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2185                                           "can't have encap action before"
2186                                           " decap action");
2187         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2188                 return rte_flow_error_set(error, EINVAL,
2189                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2190                                           "can only have a single decap"
2191                                           " action in a flow");
2192         /* decap action is valid on egress only if it is followed by encap */
2193         if (attr->egress && decap &&
2194             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2195                 return rte_flow_error_set(error, ENOTSUP,
2196                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2197                                           NULL, "decap action not supported"
2198                                           " for egress");
2199         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2200                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2201                 return rte_flow_error_set(error, EINVAL,
2202                                           RTE_FLOW_ERROR_TYPE_ACTION,
2203                                           NULL,
2204                                           "can't have decap action "
2205                                           "after modify action");
2206         }
2207         return 0;
2208 }
2209
2210 /**
2211  * Find existing encap/decap resource or create and register a new one.
2212  *
2213  * @param[in, out] dev
2214  *   Pointer to rte_eth_dev structure.
2215  * @param[in, out] resource
2216  *   Pointer to encap/decap resource.
2217  * @parm[in, out] dev_flow
2218  *   Pointer to the dev_flow.
2219  * @param[out] error
2220  *   pointer to error structure.
2221  *
2222  * @return
2223  *   0 on success otherwise -errno and errno is set.
2224  */
2225 static int
2226 flow_dv_encap_decap_resource_register
2227                         (struct rte_eth_dev *dev,
2228                          struct mlx5_flow_dv_encap_decap_resource *resource,
2229                          struct mlx5_flow *dev_flow,
2230                          struct rte_flow_error *error)
2231 {
2232         struct mlx5_priv *priv = dev->data->dev_private;
2233         struct mlx5_ibv_shared *sh = priv->sh;
2234         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2235         struct mlx5dv_dr_domain *domain;
2236
2237         resource->flags = dev_flow->group ? 0 : 1;
2238         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2239                 domain = sh->fdb_domain;
2240         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2241                 domain = sh->rx_domain;
2242         else
2243                 domain = sh->tx_domain;
2244
2245         /* Lookup a matching resource from cache. */
2246         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2247                 if (resource->reformat_type == cache_resource->reformat_type &&
2248                     resource->ft_type == cache_resource->ft_type &&
2249                     resource->flags == cache_resource->flags &&
2250                     resource->size == cache_resource->size &&
2251                     !memcmp((const void *)resource->buf,
2252                             (const void *)cache_resource->buf,
2253                             resource->size)) {
2254                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2255                                 (void *)cache_resource,
2256                                 rte_atomic32_read(&cache_resource->refcnt));
2257                         rte_atomic32_inc(&cache_resource->refcnt);
2258                         dev_flow->dv.encap_decap = cache_resource;
2259                         return 0;
2260                 }
2261         }
2262         /* Register new encap/decap resource. */
2263         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2264         if (!cache_resource)
2265                 return rte_flow_error_set(error, ENOMEM,
2266                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2267                                           "cannot allocate resource memory");
2268         *cache_resource = *resource;
2269         cache_resource->verbs_action =
2270                 mlx5_glue->dv_create_flow_action_packet_reformat
2271                         (sh->ctx, cache_resource->reformat_type,
2272                          cache_resource->ft_type, domain, cache_resource->flags,
2273                          cache_resource->size,
2274                          (cache_resource->size ? cache_resource->buf : NULL));
2275         if (!cache_resource->verbs_action) {
2276                 rte_free(cache_resource);
2277                 return rte_flow_error_set(error, ENOMEM,
2278                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2279                                           NULL, "cannot create action");
2280         }
2281         rte_atomic32_init(&cache_resource->refcnt);
2282         rte_atomic32_inc(&cache_resource->refcnt);
2283         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2284         dev_flow->dv.encap_decap = cache_resource;
2285         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2286                 (void *)cache_resource,
2287                 rte_atomic32_read(&cache_resource->refcnt));
2288         return 0;
2289 }
2290
2291 /**
2292  * Find existing table jump resource or create and register a new one.
2293  *
2294  * @param[in, out] dev
2295  *   Pointer to rte_eth_dev structure.
2296  * @param[in, out] tbl
2297  *   Pointer to flow table resource.
2298  * @parm[in, out] dev_flow
2299  *   Pointer to the dev_flow.
2300  * @param[out] error
2301  *   pointer to error structure.
2302  *
2303  * @return
2304  *   0 on success otherwise -errno and errno is set.
2305  */
2306 static int
2307 flow_dv_jump_tbl_resource_register
2308                         (struct rte_eth_dev *dev __rte_unused,
2309                          struct mlx5_flow_tbl_resource *tbl,
2310                          struct mlx5_flow *dev_flow,
2311                          struct rte_flow_error *error)
2312 {
2313         struct mlx5_flow_tbl_data_entry *tbl_data =
2314                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2315         int cnt;
2316
2317         assert(tbl);
2318         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2319         if (!cnt) {
2320                 tbl_data->jump.action =
2321                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2322                         (tbl->obj);
2323                 if (!tbl_data->jump.action)
2324                         return rte_flow_error_set(error, ENOMEM,
2325                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2326                                         NULL, "cannot create jump action");
2327                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2328                         (void *)&tbl_data->jump, cnt);
2329         } else {
2330                 assert(tbl_data->jump.action);
2331                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2332                         (void *)&tbl_data->jump, cnt);
2333         }
2334         rte_atomic32_inc(&tbl_data->jump.refcnt);
2335         dev_flow->dv.jump = &tbl_data->jump;
2336         return 0;
2337 }
2338
2339 /**
2340  * Find existing table port ID resource or create and register a new one.
2341  *
2342  * @param[in, out] dev
2343  *   Pointer to rte_eth_dev structure.
2344  * @param[in, out] resource
2345  *   Pointer to port ID action resource.
2346  * @parm[in, out] dev_flow
2347  *   Pointer to the dev_flow.
2348  * @param[out] error
2349  *   pointer to error structure.
2350  *
2351  * @return
2352  *   0 on success otherwise -errno and errno is set.
2353  */
2354 static int
2355 flow_dv_port_id_action_resource_register
2356                         (struct rte_eth_dev *dev,
2357                          struct mlx5_flow_dv_port_id_action_resource *resource,
2358                          struct mlx5_flow *dev_flow,
2359                          struct rte_flow_error *error)
2360 {
2361         struct mlx5_priv *priv = dev->data->dev_private;
2362         struct mlx5_ibv_shared *sh = priv->sh;
2363         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2364
2365         /* Lookup a matching resource from cache. */
2366         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2367                 if (resource->port_id == cache_resource->port_id) {
2368                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2369                                 "refcnt %d++",
2370                                 (void *)cache_resource,
2371                                 rte_atomic32_read(&cache_resource->refcnt));
2372                         rte_atomic32_inc(&cache_resource->refcnt);
2373                         dev_flow->dv.port_id_action = cache_resource;
2374                         return 0;
2375                 }
2376         }
2377         /* Register new port id action resource. */
2378         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2379         if (!cache_resource)
2380                 return rte_flow_error_set(error, ENOMEM,
2381                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2382                                           "cannot allocate resource memory");
2383         *cache_resource = *resource;
2384         /*
2385          * Depending on rdma_core version the glue routine calls
2386          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2387          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2388          */
2389         cache_resource->action =
2390                 mlx5_glue->dr_create_flow_action_dest_port
2391                         (priv->sh->fdb_domain, resource->port_id);
2392         if (!cache_resource->action) {
2393                 rte_free(cache_resource);
2394                 return rte_flow_error_set(error, ENOMEM,
2395                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2396                                           NULL, "cannot create action");
2397         }
2398         rte_atomic32_init(&cache_resource->refcnt);
2399         rte_atomic32_inc(&cache_resource->refcnt);
2400         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2401         dev_flow->dv.port_id_action = cache_resource;
2402         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2403                 (void *)cache_resource,
2404                 rte_atomic32_read(&cache_resource->refcnt));
2405         return 0;
2406 }
2407
2408 /**
2409  * Find existing push vlan resource or create and register a new one.
2410  *
2411  * @param [in, out] dev
2412  *   Pointer to rte_eth_dev structure.
2413  * @param[in, out] resource
2414  *   Pointer to port ID action resource.
2415  * @parm[in, out] dev_flow
2416  *   Pointer to the dev_flow.
2417  * @param[out] error
2418  *   pointer to error structure.
2419  *
2420  * @return
2421  *   0 on success otherwise -errno and errno is set.
2422  */
2423 static int
2424 flow_dv_push_vlan_action_resource_register
2425                        (struct rte_eth_dev *dev,
2426                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2427                         struct mlx5_flow *dev_flow,
2428                         struct rte_flow_error *error)
2429 {
2430         struct mlx5_priv *priv = dev->data->dev_private;
2431         struct mlx5_ibv_shared *sh = priv->sh;
2432         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2433         struct mlx5dv_dr_domain *domain;
2434
2435         /* Lookup a matching resource from cache. */
2436         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2437                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2438                     resource->ft_type == cache_resource->ft_type) {
2439                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2440                                 "refcnt %d++",
2441                                 (void *)cache_resource,
2442                                 rte_atomic32_read(&cache_resource->refcnt));
2443                         rte_atomic32_inc(&cache_resource->refcnt);
2444                         dev_flow->dv.push_vlan_res = cache_resource;
2445                         return 0;
2446                 }
2447         }
2448         /* Register new push_vlan action resource. */
2449         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2450         if (!cache_resource)
2451                 return rte_flow_error_set(error, ENOMEM,
2452                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2453                                           "cannot allocate resource memory");
2454         *cache_resource = *resource;
2455         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2456                 domain = sh->fdb_domain;
2457         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2458                 domain = sh->rx_domain;
2459         else
2460                 domain = sh->tx_domain;
2461         cache_resource->action =
2462                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2463                                                            resource->vlan_tag);
2464         if (!cache_resource->action) {
2465                 rte_free(cache_resource);
2466                 return rte_flow_error_set(error, ENOMEM,
2467                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2468                                           NULL, "cannot create action");
2469         }
2470         rte_atomic32_init(&cache_resource->refcnt);
2471         rte_atomic32_inc(&cache_resource->refcnt);
2472         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2473         dev_flow->dv.push_vlan_res = cache_resource;
2474         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2475                 (void *)cache_resource,
2476                 rte_atomic32_read(&cache_resource->refcnt));
2477         return 0;
2478 }
2479 /**
2480  * Get the size of specific rte_flow_item_type
2481  *
2482  * @param[in] item_type
2483  *   Tested rte_flow_item_type.
2484  *
2485  * @return
2486  *   sizeof struct item_type, 0 if void or irrelevant.
2487  */
2488 static size_t
2489 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2490 {
2491         size_t retval;
2492
2493         switch (item_type) {
2494         case RTE_FLOW_ITEM_TYPE_ETH:
2495                 retval = sizeof(struct rte_flow_item_eth);
2496                 break;
2497         case RTE_FLOW_ITEM_TYPE_VLAN:
2498                 retval = sizeof(struct rte_flow_item_vlan);
2499                 break;
2500         case RTE_FLOW_ITEM_TYPE_IPV4:
2501                 retval = sizeof(struct rte_flow_item_ipv4);
2502                 break;
2503         case RTE_FLOW_ITEM_TYPE_IPV6:
2504                 retval = sizeof(struct rte_flow_item_ipv6);
2505                 break;
2506         case RTE_FLOW_ITEM_TYPE_UDP:
2507                 retval = sizeof(struct rte_flow_item_udp);
2508                 break;
2509         case RTE_FLOW_ITEM_TYPE_TCP:
2510                 retval = sizeof(struct rte_flow_item_tcp);
2511                 break;
2512         case RTE_FLOW_ITEM_TYPE_VXLAN:
2513                 retval = sizeof(struct rte_flow_item_vxlan);
2514                 break;
2515         case RTE_FLOW_ITEM_TYPE_GRE:
2516                 retval = sizeof(struct rte_flow_item_gre);
2517                 break;
2518         case RTE_FLOW_ITEM_TYPE_NVGRE:
2519                 retval = sizeof(struct rte_flow_item_nvgre);
2520                 break;
2521         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2522                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2523                 break;
2524         case RTE_FLOW_ITEM_TYPE_MPLS:
2525                 retval = sizeof(struct rte_flow_item_mpls);
2526                 break;
2527         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2528         default:
2529                 retval = 0;
2530                 break;
2531         }
2532         return retval;
2533 }
2534
2535 #define MLX5_ENCAP_IPV4_VERSION         0x40
2536 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2537 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2538 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2539 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2540 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2541 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2542
2543 /**
2544  * Convert the encap action data from list of rte_flow_item to raw buffer
2545  *
2546  * @param[in] items
2547  *   Pointer to rte_flow_item objects list.
2548  * @param[out] buf
2549  *   Pointer to the output buffer.
2550  * @param[out] size
2551  *   Pointer to the output buffer size.
2552  * @param[out] error
2553  *   Pointer to the error structure.
2554  *
2555  * @return
2556  *   0 on success, a negative errno value otherwise and rte_errno is set.
2557  */
2558 static int
2559 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2560                            size_t *size, struct rte_flow_error *error)
2561 {
2562         struct rte_ether_hdr *eth = NULL;
2563         struct rte_vlan_hdr *vlan = NULL;
2564         struct rte_ipv4_hdr *ipv4 = NULL;
2565         struct rte_ipv6_hdr *ipv6 = NULL;
2566         struct rte_udp_hdr *udp = NULL;
2567         struct rte_vxlan_hdr *vxlan = NULL;
2568         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2569         struct rte_gre_hdr *gre = NULL;
2570         size_t len;
2571         size_t temp_size = 0;
2572
2573         if (!items)
2574                 return rte_flow_error_set(error, EINVAL,
2575                                           RTE_FLOW_ERROR_TYPE_ACTION,
2576                                           NULL, "invalid empty data");
2577         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2578                 len = flow_dv_get_item_len(items->type);
2579                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2580                         return rte_flow_error_set(error, EINVAL,
2581                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2582                                                   (void *)items->type,
2583                                                   "items total size is too big"
2584                                                   " for encap action");
2585                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2586                 switch (items->type) {
2587                 case RTE_FLOW_ITEM_TYPE_ETH:
2588                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2589                         break;
2590                 case RTE_FLOW_ITEM_TYPE_VLAN:
2591                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2592                         if (!eth)
2593                                 return rte_flow_error_set(error, EINVAL,
2594                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2595                                                 (void *)items->type,
2596                                                 "eth header not found");
2597                         if (!eth->ether_type)
2598                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2599                         break;
2600                 case RTE_FLOW_ITEM_TYPE_IPV4:
2601                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2602                         if (!vlan && !eth)
2603                                 return rte_flow_error_set(error, EINVAL,
2604                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2605                                                 (void *)items->type,
2606                                                 "neither eth nor vlan"
2607                                                 " header found");
2608                         if (vlan && !vlan->eth_proto)
2609                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2610                         else if (eth && !eth->ether_type)
2611                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2612                         if (!ipv4->version_ihl)
2613                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2614                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2615                         if (!ipv4->time_to_live)
2616                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2617                         break;
2618                 case RTE_FLOW_ITEM_TYPE_IPV6:
2619                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2620                         if (!vlan && !eth)
2621                                 return rte_flow_error_set(error, EINVAL,
2622                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2623                                                 (void *)items->type,
2624                                                 "neither eth nor vlan"
2625                                                 " header found");
2626                         if (vlan && !vlan->eth_proto)
2627                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2628                         else if (eth && !eth->ether_type)
2629                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2630                         if (!ipv6->vtc_flow)
2631                                 ipv6->vtc_flow =
2632                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2633                         if (!ipv6->hop_limits)
2634                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2635                         break;
2636                 case RTE_FLOW_ITEM_TYPE_UDP:
2637                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2638                         if (!ipv4 && !ipv6)
2639                                 return rte_flow_error_set(error, EINVAL,
2640                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2641                                                 (void *)items->type,
2642                                                 "ip header not found");
2643                         if (ipv4 && !ipv4->next_proto_id)
2644                                 ipv4->next_proto_id = IPPROTO_UDP;
2645                         else if (ipv6 && !ipv6->proto)
2646                                 ipv6->proto = IPPROTO_UDP;
2647                         break;
2648                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2649                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2650                         if (!udp)
2651                                 return rte_flow_error_set(error, EINVAL,
2652                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2653                                                 (void *)items->type,
2654                                                 "udp header not found");
2655                         if (!udp->dst_port)
2656                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2657                         if (!vxlan->vx_flags)
2658                                 vxlan->vx_flags =
2659                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2660                         break;
2661                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2662                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2663                         if (!udp)
2664                                 return rte_flow_error_set(error, EINVAL,
2665                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2666                                                 (void *)items->type,
2667                                                 "udp header not found");
2668                         if (!vxlan_gpe->proto)
2669                                 return rte_flow_error_set(error, EINVAL,
2670                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2671                                                 (void *)items->type,
2672                                                 "next protocol not found");
2673                         if (!udp->dst_port)
2674                                 udp->dst_port =
2675                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2676                         if (!vxlan_gpe->vx_flags)
2677                                 vxlan_gpe->vx_flags =
2678                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2679                         break;
2680                 case RTE_FLOW_ITEM_TYPE_GRE:
2681                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2682                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2683                         if (!gre->proto)
2684                                 return rte_flow_error_set(error, EINVAL,
2685                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2686                                                 (void *)items->type,
2687                                                 "next protocol not found");
2688                         if (!ipv4 && !ipv6)
2689                                 return rte_flow_error_set(error, EINVAL,
2690                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2691                                                 (void *)items->type,
2692                                                 "ip header not found");
2693                         if (ipv4 && !ipv4->next_proto_id)
2694                                 ipv4->next_proto_id = IPPROTO_GRE;
2695                         else if (ipv6 && !ipv6->proto)
2696                                 ipv6->proto = IPPROTO_GRE;
2697                         break;
2698                 case RTE_FLOW_ITEM_TYPE_VOID:
2699                         break;
2700                 default:
2701                         return rte_flow_error_set(error, EINVAL,
2702                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2703                                                   (void *)items->type,
2704                                                   "unsupported item type");
2705                         break;
2706                 }
2707                 temp_size += len;
2708         }
2709         *size = temp_size;
2710         return 0;
2711 }
2712
2713 static int
2714 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2715 {
2716         struct rte_ether_hdr *eth = NULL;
2717         struct rte_vlan_hdr *vlan = NULL;
2718         struct rte_ipv6_hdr *ipv6 = NULL;
2719         struct rte_udp_hdr *udp = NULL;
2720         char *next_hdr;
2721         uint16_t proto;
2722
2723         eth = (struct rte_ether_hdr *)data;
2724         next_hdr = (char *)(eth + 1);
2725         proto = RTE_BE16(eth->ether_type);
2726
2727         /* VLAN skipping */
2728         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2729                 vlan = (struct rte_vlan_hdr *)next_hdr;
2730                 proto = RTE_BE16(vlan->eth_proto);
2731                 next_hdr += sizeof(struct rte_vlan_hdr);
2732         }
2733
2734         /* HW calculates IPv4 csum. no need to proceed */
2735         if (proto == RTE_ETHER_TYPE_IPV4)
2736                 return 0;
2737
2738         /* non IPv4/IPv6 header. not supported */
2739         if (proto != RTE_ETHER_TYPE_IPV6) {
2740                 return rte_flow_error_set(error, ENOTSUP,
2741                                           RTE_FLOW_ERROR_TYPE_ACTION,
2742                                           NULL, "Cannot offload non IPv4/IPv6");
2743         }
2744
2745         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2746
2747         /* ignore non UDP */
2748         if (ipv6->proto != IPPROTO_UDP)
2749                 return 0;
2750
2751         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2752         udp->dgram_cksum = 0;
2753
2754         return 0;
2755 }
2756
2757 /**
2758  * Convert L2 encap action to DV specification.
2759  *
2760  * @param[in] dev
2761  *   Pointer to rte_eth_dev structure.
2762  * @param[in] action
2763  *   Pointer to action structure.
2764  * @param[in, out] dev_flow
2765  *   Pointer to the mlx5_flow.
2766  * @param[in] transfer
2767  *   Mark if the flow is E-Switch flow.
2768  * @param[out] error
2769  *   Pointer to the error structure.
2770  *
2771  * @return
2772  *   0 on success, a negative errno value otherwise and rte_errno is set.
2773  */
2774 static int
2775 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2776                                const struct rte_flow_action *action,
2777                                struct mlx5_flow *dev_flow,
2778                                uint8_t transfer,
2779                                struct rte_flow_error *error)
2780 {
2781         const struct rte_flow_item *encap_data;
2782         const struct rte_flow_action_raw_encap *raw_encap_data;
2783         struct mlx5_flow_dv_encap_decap_resource res = {
2784                 .reformat_type =
2785                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2786                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2787                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2788         };
2789
2790         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2791                 raw_encap_data =
2792                         (const struct rte_flow_action_raw_encap *)action->conf;
2793                 res.size = raw_encap_data->size;
2794                 memcpy(res.buf, raw_encap_data->data, res.size);
2795                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2796                         return -rte_errno;
2797         } else {
2798                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2799                         encap_data =
2800                                 ((const struct rte_flow_action_vxlan_encap *)
2801                                                 action->conf)->definition;
2802                 else
2803                         encap_data =
2804                                 ((const struct rte_flow_action_nvgre_encap *)
2805                                                 action->conf)->definition;
2806                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2807                                                &res.size, error))
2808                         return -rte_errno;
2809         }
2810         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2811                 return rte_flow_error_set(error, EINVAL,
2812                                           RTE_FLOW_ERROR_TYPE_ACTION,
2813                                           NULL, "can't create L2 encap action");
2814         return 0;
2815 }
2816
2817 /**
2818  * Convert L2 decap action to DV specification.
2819  *
2820  * @param[in] dev
2821  *   Pointer to rte_eth_dev structure.
2822  * @param[in, out] dev_flow
2823  *   Pointer to the mlx5_flow.
2824  * @param[in] transfer
2825  *   Mark if the flow is E-Switch flow.
2826  * @param[out] error
2827  *   Pointer to the error structure.
2828  *
2829  * @return
2830  *   0 on success, a negative errno value otherwise and rte_errno is set.
2831  */
2832 static int
2833 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2834                                struct mlx5_flow *dev_flow,
2835                                uint8_t transfer,
2836                                struct rte_flow_error *error)
2837 {
2838         struct mlx5_flow_dv_encap_decap_resource res = {
2839                 .size = 0,
2840                 .reformat_type =
2841                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2842                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2843                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2844         };
2845
2846         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2847                 return rte_flow_error_set(error, EINVAL,
2848                                           RTE_FLOW_ERROR_TYPE_ACTION,
2849                                           NULL, "can't create L2 decap action");
2850         return 0;
2851 }
2852
2853 /**
2854  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2855  *
2856  * @param[in] dev
2857  *   Pointer to rte_eth_dev structure.
2858  * @param[in] action
2859  *   Pointer to action structure.
2860  * @param[in, out] dev_flow
2861  *   Pointer to the mlx5_flow.
2862  * @param[in] attr
2863  *   Pointer to the flow attributes.
2864  * @param[out] error
2865  *   Pointer to the error structure.
2866  *
2867  * @return
2868  *   0 on success, a negative errno value otherwise and rte_errno is set.
2869  */
2870 static int
2871 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2872                                 const struct rte_flow_action *action,
2873                                 struct mlx5_flow *dev_flow,
2874                                 const struct rte_flow_attr *attr,
2875                                 struct rte_flow_error *error)
2876 {
2877         const struct rte_flow_action_raw_encap *encap_data;
2878         struct mlx5_flow_dv_encap_decap_resource res;
2879
2880         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2881         res.size = encap_data->size;
2882         memcpy(res.buf, encap_data->data, res.size);
2883         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
2884                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
2885                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
2886         if (attr->transfer)
2887                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2888         else
2889                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2890                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2891         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2892                 return rte_flow_error_set(error, EINVAL,
2893                                           RTE_FLOW_ERROR_TYPE_ACTION,
2894                                           NULL, "can't create encap action");
2895         return 0;
2896 }
2897
2898 /**
2899  * Create action push VLAN.
2900  *
2901  * @param[in] dev
2902  *   Pointer to rte_eth_dev structure.
2903  * @param[in] vlan_tag
2904  *   the vlan tag to push to the Ethernet header.
2905  * @param[in, out] dev_flow
2906  *   Pointer to the mlx5_flow.
2907  * @param[in] attr
2908  *   Pointer to the flow attributes.
2909  * @param[out] error
2910  *   Pointer to the error structure.
2911  *
2912  * @return
2913  *   0 on success, a negative errno value otherwise and rte_errno is set.
2914  */
2915 static int
2916 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
2917                                 const struct rte_flow_attr *attr,
2918                                 const struct rte_vlan_hdr *vlan,
2919                                 struct mlx5_flow *dev_flow,
2920                                 struct rte_flow_error *error)
2921 {
2922         struct mlx5_flow_dv_push_vlan_action_resource res;
2923
2924         res.vlan_tag =
2925                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
2926                                  vlan->vlan_tci);
2927         if (attr->transfer)
2928                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2929         else
2930                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2931                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2932         return flow_dv_push_vlan_action_resource_register
2933                                             (dev, &res, dev_flow, error);
2934 }
2935
2936 /**
2937  * Validate the modify-header actions.
2938  *
2939  * @param[in] action_flags
2940  *   Holds the actions detected until now.
2941  * @param[in] action
2942  *   Pointer to the modify action.
2943  * @param[out] error
2944  *   Pointer to error structure.
2945  *
2946  * @return
2947  *   0 on success, a negative errno value otherwise and rte_errno is set.
2948  */
2949 static int
2950 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
2951                                    const struct rte_flow_action *action,
2952                                    struct rte_flow_error *error)
2953 {
2954         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
2955                 return rte_flow_error_set(error, EINVAL,
2956                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2957                                           NULL, "action configuration not set");
2958         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2959                 return rte_flow_error_set(error, EINVAL,
2960                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2961                                           "can't have encap action before"
2962                                           " modify action");
2963         return 0;
2964 }
2965
2966 /**
2967  * Validate the modify-header MAC address actions.
2968  *
2969  * @param[in] action_flags
2970  *   Holds the actions detected until now.
2971  * @param[in] action
2972  *   Pointer to the modify action.
2973  * @param[in] item_flags
2974  *   Holds the items detected.
2975  * @param[out] error
2976  *   Pointer to error structure.
2977  *
2978  * @return
2979  *   0 on success, a negative errno value otherwise and rte_errno is set.
2980  */
2981 static int
2982 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
2983                                    const struct rte_flow_action *action,
2984                                    const uint64_t item_flags,
2985                                    struct rte_flow_error *error)
2986 {
2987         int ret = 0;
2988
2989         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2990         if (!ret) {
2991                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
2992                         return rte_flow_error_set(error, EINVAL,
2993                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2994                                                   NULL,
2995                                                   "no L2 item in pattern");
2996         }
2997         return ret;
2998 }
2999
3000 /**
3001  * Validate the modify-header IPv4 address actions.
3002  *
3003  * @param[in] action_flags
3004  *   Holds the actions detected until now.
3005  * @param[in] action
3006  *   Pointer to the modify action.
3007  * @param[in] item_flags
3008  *   Holds the items detected.
3009  * @param[out] error
3010  *   Pointer to error structure.
3011  *
3012  * @return
3013  *   0 on success, a negative errno value otherwise and rte_errno is set.
3014  */
3015 static int
3016 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3017                                     const struct rte_flow_action *action,
3018                                     const uint64_t item_flags,
3019                                     struct rte_flow_error *error)
3020 {
3021         int ret = 0;
3022
3023         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3024         if (!ret) {
3025                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3026                         return rte_flow_error_set(error, EINVAL,
3027                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3028                                                   NULL,
3029                                                   "no ipv4 item in pattern");
3030         }
3031         return ret;
3032 }
3033
3034 /**
3035  * Validate the modify-header IPv6 address actions.
3036  *
3037  * @param[in] action_flags
3038  *   Holds the actions detected until now.
3039  * @param[in] action
3040  *   Pointer to the modify action.
3041  * @param[in] item_flags
3042  *   Holds the items detected.
3043  * @param[out] error
3044  *   Pointer to error structure.
3045  *
3046  * @return
3047  *   0 on success, a negative errno value otherwise and rte_errno is set.
3048  */
3049 static int
3050 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3051                                     const struct rte_flow_action *action,
3052                                     const uint64_t item_flags,
3053                                     struct rte_flow_error *error)
3054 {
3055         int ret = 0;
3056
3057         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3058         if (!ret) {
3059                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3060                         return rte_flow_error_set(error, EINVAL,
3061                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3062                                                   NULL,
3063                                                   "no ipv6 item in pattern");
3064         }
3065         return ret;
3066 }
3067
3068 /**
3069  * Validate the modify-header TP actions.
3070  *
3071  * @param[in] action_flags
3072  *   Holds the actions detected until now.
3073  * @param[in] action
3074  *   Pointer to the modify action.
3075  * @param[in] item_flags
3076  *   Holds the items detected.
3077  * @param[out] error
3078  *   Pointer to error structure.
3079  *
3080  * @return
3081  *   0 on success, a negative errno value otherwise and rte_errno is set.
3082  */
3083 static int
3084 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3085                                   const struct rte_flow_action *action,
3086                                   const uint64_t item_flags,
3087                                   struct rte_flow_error *error)
3088 {
3089         int ret = 0;
3090
3091         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3092         if (!ret) {
3093                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3094                         return rte_flow_error_set(error, EINVAL,
3095                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3096                                                   NULL, "no transport layer "
3097                                                   "in pattern");
3098         }
3099         return ret;
3100 }
3101
3102 /**
3103  * Validate the modify-header actions of increment/decrement
3104  * TCP Sequence-number.
3105  *
3106  * @param[in] action_flags
3107  *   Holds the actions detected until now.
3108  * @param[in] action
3109  *   Pointer to the modify action.
3110  * @param[in] item_flags
3111  *   Holds the items detected.
3112  * @param[out] error
3113  *   Pointer to error structure.
3114  *
3115  * @return
3116  *   0 on success, a negative errno value otherwise and rte_errno is set.
3117  */
3118 static int
3119 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3120                                        const struct rte_flow_action *action,
3121                                        const uint64_t item_flags,
3122                                        struct rte_flow_error *error)
3123 {
3124         int ret = 0;
3125
3126         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3127         if (!ret) {
3128                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3129                         return rte_flow_error_set(error, EINVAL,
3130                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3131                                                   NULL, "no TCP item in"
3132                                                   " pattern");
3133                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3134                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3135                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3136                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3137                         return rte_flow_error_set(error, EINVAL,
3138                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3139                                                   NULL,
3140                                                   "cannot decrease and increase"
3141                                                   " TCP sequence number"
3142                                                   " at the same time");
3143         }
3144         return ret;
3145 }
3146
3147 /**
3148  * Validate the modify-header actions of increment/decrement
3149  * TCP Acknowledgment number.
3150  *
3151  * @param[in] action_flags
3152  *   Holds the actions detected until now.
3153  * @param[in] action
3154  *   Pointer to the modify action.
3155  * @param[in] item_flags
3156  *   Holds the items detected.
3157  * @param[out] error
3158  *   Pointer to error structure.
3159  *
3160  * @return
3161  *   0 on success, a negative errno value otherwise and rte_errno is set.
3162  */
3163 static int
3164 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3165                                        const struct rte_flow_action *action,
3166                                        const uint64_t item_flags,
3167                                        struct rte_flow_error *error)
3168 {
3169         int ret = 0;
3170
3171         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3172         if (!ret) {
3173                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3174                         return rte_flow_error_set(error, EINVAL,
3175                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3176                                                   NULL, "no TCP item in"
3177                                                   " pattern");
3178                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3179                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3180                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3181                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3182                         return rte_flow_error_set(error, EINVAL,
3183                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3184                                                   NULL,
3185                                                   "cannot decrease and increase"
3186                                                   " TCP acknowledgment number"
3187                                                   " at the same time");
3188         }
3189         return ret;
3190 }
3191
3192 /**
3193  * Validate the modify-header TTL actions.
3194  *
3195  * @param[in] action_flags
3196  *   Holds the actions detected until now.
3197  * @param[in] action
3198  *   Pointer to the modify action.
3199  * @param[in] item_flags
3200  *   Holds the items detected.
3201  * @param[out] error
3202  *   Pointer to error structure.
3203  *
3204  * @return
3205  *   0 on success, a negative errno value otherwise and rte_errno is set.
3206  */
3207 static int
3208 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3209                                    const struct rte_flow_action *action,
3210                                    const uint64_t item_flags,
3211                                    struct rte_flow_error *error)
3212 {
3213         int ret = 0;
3214
3215         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3216         if (!ret) {
3217                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3218                         return rte_flow_error_set(error, EINVAL,
3219                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3220                                                   NULL,
3221                                                   "no IP protocol in pattern");
3222         }
3223         return ret;
3224 }
3225
3226 /**
3227  * Validate jump action.
3228  *
3229  * @param[in] action
3230  *   Pointer to the jump action.
3231  * @param[in] action_flags
3232  *   Holds the actions detected until now.
3233  * @param[in] attributes
3234  *   Pointer to flow attributes
3235  * @param[in] external
3236  *   Action belongs to flow rule created by request external to PMD.
3237  * @param[out] error
3238  *   Pointer to error structure.
3239  *
3240  * @return
3241  *   0 on success, a negative errno value otherwise and rte_errno is set.
3242  */
3243 static int
3244 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3245                              uint64_t action_flags,
3246                              const struct rte_flow_attr *attributes,
3247                              bool external, struct rte_flow_error *error)
3248 {
3249         uint32_t target_group, table;
3250         int ret = 0;
3251
3252         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3253                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3254                 return rte_flow_error_set(error, EINVAL,
3255                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3256                                           "can't have 2 fate actions in"
3257                                           " same flow");
3258         if (action_flags & MLX5_FLOW_ACTION_METER)
3259                 return rte_flow_error_set(error, ENOTSUP,
3260                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3261                                           "jump with meter not support");
3262         if (!action->conf)
3263                 return rte_flow_error_set(error, EINVAL,
3264                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3265                                           NULL, "action configuration not set");
3266         target_group =
3267                 ((const struct rte_flow_action_jump *)action->conf)->group;
3268         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3269                                        &table, error);
3270         if (ret)
3271                 return ret;
3272         if (attributes->group == target_group)
3273                 return rte_flow_error_set(error, EINVAL,
3274                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3275                                           "target group must be other than"
3276                                           " the current flow group");
3277         return 0;
3278 }
3279
3280 /*
3281  * Validate the port_id action.
3282  *
3283  * @param[in] dev
3284  *   Pointer to rte_eth_dev structure.
3285  * @param[in] action_flags
3286  *   Bit-fields that holds the actions detected until now.
3287  * @param[in] action
3288  *   Port_id RTE action structure.
3289  * @param[in] attr
3290  *   Attributes of flow that includes this action.
3291  * @param[out] error
3292  *   Pointer to error structure.
3293  *
3294  * @return
3295  *   0 on success, a negative errno value otherwise and rte_errno is set.
3296  */
3297 static int
3298 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3299                                 uint64_t action_flags,
3300                                 const struct rte_flow_action *action,
3301                                 const struct rte_flow_attr *attr,
3302                                 struct rte_flow_error *error)
3303 {
3304         const struct rte_flow_action_port_id *port_id;
3305         struct mlx5_priv *act_priv;
3306         struct mlx5_priv *dev_priv;
3307         uint16_t port;
3308
3309         if (!attr->transfer)
3310                 return rte_flow_error_set(error, ENOTSUP,
3311                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3312                                           NULL,
3313                                           "port id action is valid in transfer"
3314                                           " mode only");
3315         if (!action || !action->conf)
3316                 return rte_flow_error_set(error, ENOTSUP,
3317                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3318                                           NULL,
3319                                           "port id action parameters must be"
3320                                           " specified");
3321         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3322                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3323                 return rte_flow_error_set(error, EINVAL,
3324                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3325                                           "can have only one fate actions in"
3326                                           " a flow");
3327         dev_priv = mlx5_dev_to_eswitch_info(dev);
3328         if (!dev_priv)
3329                 return rte_flow_error_set(error, rte_errno,
3330                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3331                                           NULL,
3332                                           "failed to obtain E-Switch info");
3333         port_id = action->conf;
3334         port = port_id->original ? dev->data->port_id : port_id->id;
3335         act_priv = mlx5_port_to_eswitch_info(port, false);
3336         if (!act_priv)
3337                 return rte_flow_error_set
3338                                 (error, rte_errno,
3339                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3340                                  "failed to obtain E-Switch port id for port");
3341         if (act_priv->domain_id != dev_priv->domain_id)
3342                 return rte_flow_error_set
3343                                 (error, EINVAL,
3344                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3345                                  "port does not belong to"
3346                                  " E-Switch being configured");
3347         return 0;
3348 }
3349
3350 /**
3351  * Get the maximum number of modify header actions.
3352  *
3353  * @param dev
3354  *   Pointer to rte_eth_dev structure.
3355  *
3356  * @return
3357  *   Max number of modify header actions device can support.
3358  */
3359 static unsigned int
3360 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev)
3361 {
3362         /*
3363          * There's no way to directly query the max cap. Although it has to be
3364          * acquried by iterative trial, it is a safe assumption that more
3365          * actions are supported by FW if extensive metadata register is
3366          * supported.
3367          */
3368         return mlx5_flow_ext_mreg_supported(dev) ? MLX5_MODIFY_NUM :
3369                                                    MLX5_MODIFY_NUM_NO_MREG;
3370 }
3371
3372 /**
3373  * Validate the meter action.
3374  *
3375  * @param[in] dev
3376  *   Pointer to rte_eth_dev structure.
3377  * @param[in] action_flags
3378  *   Bit-fields that holds the actions detected until now.
3379  * @param[in] action
3380  *   Pointer to the meter action.
3381  * @param[in] attr
3382  *   Attributes of flow that includes this action.
3383  * @param[out] error
3384  *   Pointer to error structure.
3385  *
3386  * @return
3387  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3388  */
3389 static int
3390 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3391                                 uint64_t action_flags,
3392                                 const struct rte_flow_action *action,
3393                                 const struct rte_flow_attr *attr,
3394                                 struct rte_flow_error *error)
3395 {
3396         struct mlx5_priv *priv = dev->data->dev_private;
3397         const struct rte_flow_action_meter *am = action->conf;
3398         struct mlx5_flow_meter *fm = mlx5_flow_meter_find(priv, am->mtr_id);
3399
3400         if (action_flags & MLX5_FLOW_ACTION_METER)
3401                 return rte_flow_error_set(error, ENOTSUP,
3402                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3403                                           "meter chaining not support");
3404         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3405                 return rte_flow_error_set(error, ENOTSUP,
3406                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3407                                           "meter with jump not support");
3408         if (!priv->mtr_en)
3409                 return rte_flow_error_set(error, ENOTSUP,
3410                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3411                                           NULL,
3412                                           "meter action not supported");
3413         if (!fm)
3414                 return rte_flow_error_set(error, EINVAL,
3415                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3416                                           "Meter not found");
3417         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3418               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3419               (!fm->attr.egress && !attr->egress && attr->ingress))))
3420                 return rte_flow_error_set(error, EINVAL,
3421                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3422                                           "Flow attributes are either invalid "
3423                                           "or have a conflict with current "
3424                                           "meter attributes");
3425         return 0;
3426 }
3427
3428 /**
3429  * Find existing modify-header resource or create and register a new one.
3430  *
3431  * @param dev[in, out]
3432  *   Pointer to rte_eth_dev structure.
3433  * @param[in, out] resource
3434  *   Pointer to modify-header resource.
3435  * @parm[in, out] dev_flow
3436  *   Pointer to the dev_flow.
3437  * @param[out] error
3438  *   pointer to error structure.
3439  *
3440  * @return
3441  *   0 on success otherwise -errno and errno is set.
3442  */
3443 static int
3444 flow_dv_modify_hdr_resource_register
3445                         (struct rte_eth_dev *dev,
3446                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3447                          struct mlx5_flow *dev_flow,
3448                          struct rte_flow_error *error)
3449 {
3450         struct mlx5_priv *priv = dev->data->dev_private;
3451         struct mlx5_ibv_shared *sh = priv->sh;
3452         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3453         struct mlx5dv_dr_domain *ns;
3454
3455         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev))
3456                 return rte_flow_error_set(error, EOVERFLOW,
3457                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3458                                           "too many modify header items");
3459         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3460                 ns = sh->fdb_domain;
3461         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3462                 ns = sh->tx_domain;
3463         else
3464                 ns = sh->rx_domain;
3465         resource->flags =
3466                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3467         /* Lookup a matching resource from cache. */
3468         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3469                 if (resource->ft_type == cache_resource->ft_type &&
3470                     resource->actions_num == cache_resource->actions_num &&
3471                     resource->flags == cache_resource->flags &&
3472                     !memcmp((const void *)resource->actions,
3473                             (const void *)cache_resource->actions,
3474                             (resource->actions_num *
3475                                             sizeof(resource->actions[0])))) {
3476                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3477                                 (void *)cache_resource,
3478                                 rte_atomic32_read(&cache_resource->refcnt));
3479                         rte_atomic32_inc(&cache_resource->refcnt);
3480                         dev_flow->dv.modify_hdr = cache_resource;
3481                         return 0;
3482                 }
3483         }
3484         /* Register new modify-header resource. */
3485         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
3486         if (!cache_resource)
3487                 return rte_flow_error_set(error, ENOMEM,
3488                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3489                                           "cannot allocate resource memory");
3490         *cache_resource = *resource;
3491         cache_resource->verbs_action =
3492                 mlx5_glue->dv_create_flow_action_modify_header
3493                                         (sh->ctx, cache_resource->ft_type,
3494                                          ns, cache_resource->flags,
3495                                          cache_resource->actions_num *
3496                                          sizeof(cache_resource->actions[0]),
3497                                          (uint64_t *)cache_resource->actions);
3498         if (!cache_resource->verbs_action) {
3499                 rte_free(cache_resource);
3500                 return rte_flow_error_set(error, ENOMEM,
3501                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3502                                           NULL, "cannot create action");
3503         }
3504         rte_atomic32_init(&cache_resource->refcnt);
3505         rte_atomic32_inc(&cache_resource->refcnt);
3506         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3507         dev_flow->dv.modify_hdr = cache_resource;
3508         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3509                 (void *)cache_resource,
3510                 rte_atomic32_read(&cache_resource->refcnt));
3511         return 0;
3512 }
3513
3514 #define MLX5_CNT_CONTAINER_RESIZE 64
3515
3516 /**
3517  * Get or create a flow counter.
3518  *
3519  * @param[in] dev
3520  *   Pointer to the Ethernet device structure.
3521  * @param[in] shared
3522  *   Indicate if this counter is shared with other flows.
3523  * @param[in] id
3524  *   Counter identifier.
3525  *
3526  * @return
3527  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3528  */
3529 static struct mlx5_flow_counter *
3530 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3531                                uint32_t id)
3532 {
3533         struct mlx5_priv *priv = dev->data->dev_private;
3534         struct mlx5_flow_counter *cnt = NULL;
3535         struct mlx5_devx_obj *dcs = NULL;
3536
3537         if (!priv->config.devx) {
3538                 rte_errno = ENOTSUP;
3539                 return NULL;
3540         }
3541         if (shared) {
3542                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3543                         if (cnt->shared && cnt->id == id) {
3544                                 cnt->ref_cnt++;
3545                                 return cnt;
3546                         }
3547                 }
3548         }
3549         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3550         if (!dcs)
3551                 return NULL;
3552         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3553         if (!cnt) {
3554                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3555                 rte_errno = ENOMEM;
3556                 return NULL;
3557         }
3558         struct mlx5_flow_counter tmpl = {
3559                 .shared = shared,
3560                 .ref_cnt = 1,
3561                 .id = id,
3562                 .dcs = dcs,
3563         };
3564         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3565         if (!tmpl.action) {
3566                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3567                 rte_errno = errno;
3568                 rte_free(cnt);
3569                 return NULL;
3570         }
3571         *cnt = tmpl;
3572         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3573         return cnt;
3574 }
3575
3576 /**
3577  * Release a flow counter.
3578  *
3579  * @param[in] dev
3580  *   Pointer to the Ethernet device structure.
3581  * @param[in] counter
3582  *   Pointer to the counter handler.
3583  */
3584 static void
3585 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3586                                  struct mlx5_flow_counter *counter)
3587 {
3588         struct mlx5_priv *priv = dev->data->dev_private;
3589
3590         if (!counter)
3591                 return;
3592         if (--counter->ref_cnt == 0) {
3593                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3594                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3595                 rte_free(counter);
3596         }
3597 }
3598
3599 /**
3600  * Query a devx flow counter.
3601  *
3602  * @param[in] dev
3603  *   Pointer to the Ethernet device structure.
3604  * @param[in] cnt
3605  *   Pointer to the flow counter.
3606  * @param[out] pkts
3607  *   The statistics value of packets.
3608  * @param[out] bytes
3609  *   The statistics value of bytes.
3610  *
3611  * @return
3612  *   0 on success, otherwise a negative errno value and rte_errno is set.
3613  */
3614 static inline int
3615 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3616                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3617                      uint64_t *bytes)
3618 {
3619         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3620                                                 0, NULL, NULL, 0);
3621 }
3622
3623 /**
3624  * Get a pool by a counter.
3625  *
3626  * @param[in] cnt
3627  *   Pointer to the counter.
3628  *
3629  * @return
3630  *   The counter pool.
3631  */
3632 static struct mlx5_flow_counter_pool *
3633 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3634 {
3635         if (!cnt->batch) {
3636                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3637                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3638         }
3639         return cnt->pool;
3640 }
3641
3642 /**
3643  * Get a pool by devx counter ID.
3644  *
3645  * @param[in] cont
3646  *   Pointer to the counter container.
3647  * @param[in] id
3648  *   The counter devx ID.
3649  *
3650  * @return
3651  *   The counter pool pointer if exists, NULL otherwise,
3652  */
3653 static struct mlx5_flow_counter_pool *
3654 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3655 {
3656         struct mlx5_flow_counter_pool *pool;
3657
3658         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3659                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3660                                 MLX5_COUNTERS_PER_POOL;
3661
3662                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3663                         return pool;
3664         };
3665         return NULL;
3666 }
3667
3668 /**
3669  * Allocate a new memory for the counter values wrapped by all the needed
3670  * management.
3671  *
3672  * @param[in] dev
3673  *   Pointer to the Ethernet device structure.
3674  * @param[in] raws_n
3675  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3676  *
3677  * @return
3678  *   The new memory management pointer on success, otherwise NULL and rte_errno
3679  *   is set.
3680  */
3681 static struct mlx5_counter_stats_mem_mng *
3682 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3683 {
3684         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3685                                         (dev->data->dev_private))->sh;
3686         struct mlx5_devx_mkey_attr mkey_attr;
3687         struct mlx5_counter_stats_mem_mng *mem_mng;
3688         volatile struct flow_counter_stats *raw_data;
3689         int size = (sizeof(struct flow_counter_stats) *
3690                         MLX5_COUNTERS_PER_POOL +
3691                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3692                         sizeof(struct mlx5_counter_stats_mem_mng);
3693         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3694         int i;
3695
3696         if (!mem) {
3697                 rte_errno = ENOMEM;
3698                 return NULL;
3699         }
3700         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3701         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3702         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3703                                                  IBV_ACCESS_LOCAL_WRITE);
3704         if (!mem_mng->umem) {
3705                 rte_errno = errno;
3706                 rte_free(mem);
3707                 return NULL;
3708         }
3709         mkey_attr.addr = (uintptr_t)mem;
3710         mkey_attr.size = size;
3711         mkey_attr.umem_id = mem_mng->umem->umem_id;
3712         mkey_attr.pd = sh->pdn;
3713         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3714         if (!mem_mng->dm) {
3715                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3716                 rte_errno = errno;
3717                 rte_free(mem);
3718                 return NULL;
3719         }
3720         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3721         raw_data = (volatile struct flow_counter_stats *)mem;
3722         for (i = 0; i < raws_n; ++i) {
3723                 mem_mng->raws[i].mem_mng = mem_mng;
3724                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3725         }
3726         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3727         return mem_mng;
3728 }
3729
3730 /**
3731  * Resize a counter container.
3732  *
3733  * @param[in] dev
3734  *   Pointer to the Ethernet device structure.
3735  * @param[in] batch
3736  *   Whether the pool is for counter that was allocated by batch command.
3737  *
3738  * @return
3739  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3740  */
3741 static struct mlx5_pools_container *
3742 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3743 {
3744         struct mlx5_priv *priv = dev->data->dev_private;
3745         struct mlx5_pools_container *cont =
3746                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3747         struct mlx5_pools_container *new_cont =
3748                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3749         struct mlx5_counter_stats_mem_mng *mem_mng;
3750         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3751         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3752         int i;
3753
3754         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3755                 /* The last resize still hasn't detected by the host thread. */
3756                 rte_errno = EAGAIN;
3757                 return NULL;
3758         }
3759         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3760         if (!new_cont->pools) {
3761                 rte_errno = ENOMEM;
3762                 return NULL;
3763         }
3764         if (cont->n)
3765                 memcpy(new_cont->pools, cont->pools, cont->n *
3766                        sizeof(struct mlx5_flow_counter_pool *));
3767         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3768                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3769         if (!mem_mng) {
3770                 rte_free(new_cont->pools);
3771                 return NULL;
3772         }
3773         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3774                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3775                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3776                                  i, next);
3777         new_cont->n = resize;
3778         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3779         TAILQ_INIT(&new_cont->pool_list);
3780         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3781         new_cont->init_mem_mng = mem_mng;
3782         rte_cio_wmb();
3783          /* Flip the master container. */
3784         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3785         return new_cont;
3786 }
3787
3788 /**
3789  * Query a devx flow counter.
3790  *
3791  * @param[in] dev
3792  *   Pointer to the Ethernet device structure.
3793  * @param[in] cnt
3794  *   Pointer to the flow counter.
3795  * @param[out] pkts
3796  *   The statistics value of packets.
3797  * @param[out] bytes
3798  *   The statistics value of bytes.
3799  *
3800  * @return
3801  *   0 on success, otherwise a negative errno value and rte_errno is set.
3802  */
3803 static inline int
3804 _flow_dv_query_count(struct rte_eth_dev *dev,
3805                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3806                      uint64_t *bytes)
3807 {
3808         struct mlx5_priv *priv = dev->data->dev_private;
3809         struct mlx5_flow_counter_pool *pool =
3810                         flow_dv_counter_pool_get(cnt);
3811         int offset = cnt - &pool->counters_raw[0];
3812
3813         if (priv->counter_fallback)
3814                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3815
3816         rte_spinlock_lock(&pool->sl);
3817         /*
3818          * The single counters allocation may allocate smaller ID than the
3819          * current allocated in parallel to the host reading.
3820          * In this case the new counter values must be reported as 0.
3821          */
3822         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
3823                 *pkts = 0;
3824                 *bytes = 0;
3825         } else {
3826                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
3827                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
3828         }
3829         rte_spinlock_unlock(&pool->sl);
3830         return 0;
3831 }
3832
3833 /**
3834  * Create and initialize a new counter pool.
3835  *
3836  * @param[in] dev
3837  *   Pointer to the Ethernet device structure.
3838  * @param[out] dcs
3839  *   The devX counter handle.
3840  * @param[in] batch
3841  *   Whether the pool is for counter that was allocated by batch command.
3842  *
3843  * @return
3844  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
3845  */
3846 static struct mlx5_flow_counter_pool *
3847 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
3848                     uint32_t batch)
3849 {
3850         struct mlx5_priv *priv = dev->data->dev_private;
3851         struct mlx5_flow_counter_pool *pool;
3852         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
3853                                                                0);
3854         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
3855         uint32_t size;
3856
3857         if (cont->n == n_valid) {
3858                 cont = flow_dv_container_resize(dev, batch);
3859                 if (!cont)
3860                         return NULL;
3861         }
3862         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
3863                         sizeof(struct mlx5_flow_counter);
3864         pool = rte_calloc(__func__, 1, size, 0);
3865         if (!pool) {
3866                 rte_errno = ENOMEM;
3867                 return NULL;
3868         }
3869         pool->min_dcs = dcs;
3870         pool->raw = cont->init_mem_mng->raws + n_valid %
3871                                                      MLX5_CNT_CONTAINER_RESIZE;
3872         pool->raw_hw = NULL;
3873         rte_spinlock_init(&pool->sl);
3874         /*
3875          * The generation of the new allocated counters in this pool is 0, 2 in
3876          * the pool generation makes all the counters valid for allocation.
3877          */
3878         rte_atomic64_set(&pool->query_gen, 0x2);
3879         TAILQ_INIT(&pool->counters);
3880         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
3881         cont->pools[n_valid] = pool;
3882         /* Pool initialization must be updated before host thread access. */
3883         rte_cio_wmb();
3884         rte_atomic16_add(&cont->n_valid, 1);
3885         return pool;
3886 }
3887
3888 /**
3889  * Prepare a new counter and/or a new counter pool.
3890  *
3891  * @param[in] dev
3892  *   Pointer to the Ethernet device structure.
3893  * @param[out] cnt_free
3894  *   Where to put the pointer of a new counter.
3895  * @param[in] batch
3896  *   Whether the pool is for counter that was allocated by batch command.
3897  *
3898  * @return
3899  *   The free counter pool pointer and @p cnt_free is set on success,
3900  *   NULL otherwise and rte_errno is set.
3901  */
3902 static struct mlx5_flow_counter_pool *
3903 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
3904                              struct mlx5_flow_counter **cnt_free,
3905                              uint32_t batch)
3906 {
3907         struct mlx5_priv *priv = dev->data->dev_private;
3908         struct mlx5_flow_counter_pool *pool;
3909         struct mlx5_devx_obj *dcs = NULL;
3910         struct mlx5_flow_counter *cnt;
3911         uint32_t i;
3912
3913         if (!batch) {
3914                 /* bulk_bitmap must be 0 for single counter allocation. */
3915                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3916                 if (!dcs)
3917                         return NULL;
3918                 pool = flow_dv_find_pool_by_id
3919                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
3920                 if (!pool) {
3921                         pool = flow_dv_pool_create(dev, dcs, batch);
3922                         if (!pool) {
3923                                 mlx5_devx_cmd_destroy(dcs);
3924                                 return NULL;
3925                         }
3926                 } else if (dcs->id < pool->min_dcs->id) {
3927                         rte_atomic64_set(&pool->a64_dcs,
3928                                          (int64_t)(uintptr_t)dcs);
3929                 }
3930                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
3931                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3932                 cnt->dcs = dcs;
3933                 *cnt_free = cnt;
3934                 return pool;
3935         }
3936         /* bulk_bitmap is in 128 counters units. */
3937         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
3938                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
3939         if (!dcs) {
3940                 rte_errno = ENODATA;
3941                 return NULL;
3942         }
3943         pool = flow_dv_pool_create(dev, dcs, batch);
3944         if (!pool) {
3945                 mlx5_devx_cmd_destroy(dcs);
3946                 return NULL;
3947         }
3948         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3949                 cnt = &pool->counters_raw[i];
3950                 cnt->pool = pool;
3951                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3952         }
3953         *cnt_free = &pool->counters_raw[0];
3954         return pool;
3955 }
3956
3957 /**
3958  * Search for existed shared counter.
3959  *
3960  * @param[in] cont
3961  *   Pointer to the relevant counter pool container.
3962  * @param[in] id
3963  *   The shared counter ID to search.
3964  *
3965  * @return
3966  *   NULL if not existed, otherwise pointer to the shared counter.
3967  */
3968 static struct mlx5_flow_counter *
3969 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
3970                               uint32_t id)
3971 {
3972         static struct mlx5_flow_counter *cnt;
3973         struct mlx5_flow_counter_pool *pool;
3974         int i;
3975
3976         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3977                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3978                         cnt = &pool->counters_raw[i];
3979                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
3980                                 return cnt;
3981                 }
3982         }
3983         return NULL;
3984 }
3985
3986 /**
3987  * Allocate a flow counter.
3988  *
3989  * @param[in] dev
3990  *   Pointer to the Ethernet device structure.
3991  * @param[in] shared
3992  *   Indicate if this counter is shared with other flows.
3993  * @param[in] id
3994  *   Counter identifier.
3995  * @param[in] group
3996  *   Counter flow group.
3997  *
3998  * @return
3999  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4000  */
4001 static struct mlx5_flow_counter *
4002 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4003                       uint16_t group)
4004 {
4005         struct mlx5_priv *priv = dev->data->dev_private;
4006         struct mlx5_flow_counter_pool *pool = NULL;
4007         struct mlx5_flow_counter *cnt_free = NULL;
4008         /*
4009          * Currently group 0 flow counter cannot be assigned to a flow if it is
4010          * not the first one in the batch counter allocation, so it is better
4011          * to allocate counters one by one for these flows in a separate
4012          * container.
4013          * A counter can be shared between different groups so need to take
4014          * shared counters from the single container.
4015          */
4016         uint32_t batch = (group && !shared) ? 1 : 0;
4017         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4018                                                                0);
4019
4020         if (priv->counter_fallback)
4021                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4022         if (!priv->config.devx) {
4023                 rte_errno = ENOTSUP;
4024                 return NULL;
4025         }
4026         if (shared) {
4027                 cnt_free = flow_dv_counter_shared_search(cont, id);
4028                 if (cnt_free) {
4029                         if (cnt_free->ref_cnt + 1 == 0) {
4030                                 rte_errno = E2BIG;
4031                                 return NULL;
4032                         }
4033                         cnt_free->ref_cnt++;
4034                         return cnt_free;
4035                 }
4036         }
4037         /* Pools which has a free counters are in the start. */
4038         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4039                 /*
4040                  * The free counter reset values must be updated between the
4041                  * counter release to the counter allocation, so, at least one
4042                  * query must be done in this time. ensure it by saving the
4043                  * query generation in the release time.
4044                  * The free list is sorted according to the generation - so if
4045                  * the first one is not updated, all the others are not
4046                  * updated too.
4047                  */
4048                 cnt_free = TAILQ_FIRST(&pool->counters);
4049                 if (cnt_free && cnt_free->query_gen + 1 <
4050                     rte_atomic64_read(&pool->query_gen))
4051                         break;
4052                 cnt_free = NULL;
4053         }
4054         if (!cnt_free) {
4055                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4056                 if (!pool)
4057                         return NULL;
4058         }
4059         cnt_free->batch = batch;
4060         /* Create a DV counter action only in the first time usage. */
4061         if (!cnt_free->action) {
4062                 uint16_t offset;
4063                 struct mlx5_devx_obj *dcs;
4064
4065                 if (batch) {
4066                         offset = cnt_free - &pool->counters_raw[0];
4067                         dcs = pool->min_dcs;
4068                 } else {
4069                         offset = 0;
4070                         dcs = cnt_free->dcs;
4071                 }
4072                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4073                                         (dcs->obj, offset);
4074                 if (!cnt_free->action) {
4075                         rte_errno = errno;
4076                         return NULL;
4077                 }
4078         }
4079         /* Update the counter reset values. */
4080         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4081                                  &cnt_free->bytes))
4082                 return NULL;
4083         cnt_free->shared = shared;
4084         cnt_free->ref_cnt = 1;
4085         cnt_free->id = id;
4086         if (!priv->sh->cmng.query_thread_on)
4087                 /* Start the asynchronous batch query by the host thread. */
4088                 mlx5_set_query_alarm(priv->sh);
4089         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4090         if (TAILQ_EMPTY(&pool->counters)) {
4091                 /* Move the pool to the end of the container pool list. */
4092                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4093                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4094         }
4095         return cnt_free;
4096 }
4097
4098 /**
4099  * Release a flow counter.
4100  *
4101  * @param[in] dev
4102  *   Pointer to the Ethernet device structure.
4103  * @param[in] counter
4104  *   Pointer to the counter handler.
4105  */
4106 static void
4107 flow_dv_counter_release(struct rte_eth_dev *dev,
4108                         struct mlx5_flow_counter *counter)
4109 {
4110         struct mlx5_priv *priv = dev->data->dev_private;
4111
4112         if (!counter)
4113                 return;
4114         if (priv->counter_fallback) {
4115                 flow_dv_counter_release_fallback(dev, counter);
4116                 return;
4117         }
4118         if (--counter->ref_cnt == 0) {
4119                 struct mlx5_flow_counter_pool *pool =
4120                                 flow_dv_counter_pool_get(counter);
4121
4122                 /* Put the counter in the end - the last updated one. */
4123                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4124                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4125         }
4126 }
4127
4128 /**
4129  * Verify the @p attributes will be correctly understood by the NIC and store
4130  * them in the @p flow if everything is correct.
4131  *
4132  * @param[in] dev
4133  *   Pointer to dev struct.
4134  * @param[in] attributes
4135  *   Pointer to flow attributes
4136  * @param[in] external
4137  *   This flow rule is created by request external to PMD.
4138  * @param[out] error
4139  *   Pointer to error structure.
4140  *
4141  * @return
4142  *   0 on success, a negative errno value otherwise and rte_errno is set.
4143  */
4144 static int
4145 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4146                             const struct rte_flow_attr *attributes,
4147                             bool external __rte_unused,
4148                             struct rte_flow_error *error)
4149 {
4150         struct mlx5_priv *priv = dev->data->dev_private;
4151         uint32_t priority_max = priv->config.flow_prio - 1;
4152
4153 #ifndef HAVE_MLX5DV_DR
4154         if (attributes->group)
4155                 return rte_flow_error_set(error, ENOTSUP,
4156                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4157                                           NULL,
4158                                           "groups are not supported");
4159 #else
4160         uint32_t table;
4161         int ret;
4162
4163         ret = mlx5_flow_group_to_table(attributes, external,
4164                                        attributes->group,
4165                                        &table, error);
4166         if (ret)
4167                 return ret;
4168 #endif
4169         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4170             attributes->priority >= priority_max)
4171                 return rte_flow_error_set(error, ENOTSUP,
4172                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4173                                           NULL,
4174                                           "priority out of range");
4175         if (attributes->transfer) {
4176                 if (!priv->config.dv_esw_en)
4177                         return rte_flow_error_set
4178                                 (error, ENOTSUP,
4179                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4180                                  "E-Switch dr is not supported");
4181                 if (!(priv->representor || priv->master))
4182                         return rte_flow_error_set
4183                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4184                                  NULL, "E-Switch configuration can only be"
4185                                  " done by a master or a representor device");
4186                 if (attributes->egress)
4187                         return rte_flow_error_set
4188                                 (error, ENOTSUP,
4189                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4190                                  "egress is not supported");
4191         }
4192         if (!(attributes->egress ^ attributes->ingress))
4193                 return rte_flow_error_set(error, ENOTSUP,
4194                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4195                                           "must specify exactly one of "
4196                                           "ingress or egress");
4197         return 0;
4198 }
4199
4200 /**
4201  * Internal validation function. For validating both actions and items.
4202  *
4203  * @param[in] dev
4204  *   Pointer to the rte_eth_dev structure.
4205  * @param[in] attr
4206  *   Pointer to the flow attributes.
4207  * @param[in] items
4208  *   Pointer to the list of items.
4209  * @param[in] actions
4210  *   Pointer to the list of actions.
4211  * @param[in] external
4212  *   This flow rule is created by request external to PMD.
4213  * @param[out] error
4214  *   Pointer to the error structure.
4215  *
4216  * @return
4217  *   0 on success, a negative errno value otherwise and rte_errno is set.
4218  */
4219 static int
4220 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4221                  const struct rte_flow_item items[],
4222                  const struct rte_flow_action actions[],
4223                  bool external, struct rte_flow_error *error)
4224 {
4225         int ret;
4226         uint64_t action_flags = 0;
4227         uint64_t item_flags = 0;
4228         uint64_t last_item = 0;
4229         uint8_t next_protocol = 0xff;
4230         uint16_t ether_type = 0;
4231         int actions_n = 0;
4232         const struct rte_flow_item *gre_item = NULL;
4233         struct rte_flow_item_tcp nic_tcp_mask = {
4234                 .hdr = {
4235                         .tcp_flags = 0xFF,
4236                         .src_port = RTE_BE16(UINT16_MAX),
4237                         .dst_port = RTE_BE16(UINT16_MAX),
4238                 }
4239         };
4240         struct mlx5_priv *priv = dev->data->dev_private;
4241         struct mlx5_dev_config *dev_conf = &priv->config;
4242
4243         if (items == NULL)
4244                 return -1;
4245         ret = flow_dv_validate_attributes(dev, attr, external, error);
4246         if (ret < 0)
4247                 return ret;
4248         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4249                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4250                 int type = items->type;
4251
4252                 switch (type) {
4253                 case RTE_FLOW_ITEM_TYPE_VOID:
4254                         break;
4255                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4256                         ret = flow_dv_validate_item_port_id
4257                                         (dev, items, attr, item_flags, error);
4258                         if (ret < 0)
4259                                 return ret;
4260                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4261                         break;
4262                 case RTE_FLOW_ITEM_TYPE_ETH:
4263                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4264                                                           error);
4265                         if (ret < 0)
4266                                 return ret;
4267                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4268                                              MLX5_FLOW_LAYER_OUTER_L2;
4269                         if (items->mask != NULL && items->spec != NULL) {
4270                                 ether_type =
4271                                         ((const struct rte_flow_item_eth *)
4272                                          items->spec)->type;
4273                                 ether_type &=
4274                                         ((const struct rte_flow_item_eth *)
4275                                          items->mask)->type;
4276                                 ether_type = rte_be_to_cpu_16(ether_type);
4277                         } else {
4278                                 ether_type = 0;
4279                         }
4280                         break;
4281                 case RTE_FLOW_ITEM_TYPE_VLAN:
4282                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4283                                                            dev, error);
4284                         if (ret < 0)
4285                                 return ret;
4286                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4287                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4288                         if (items->mask != NULL && items->spec != NULL) {
4289                                 ether_type =
4290                                         ((const struct rte_flow_item_vlan *)
4291                                          items->spec)->inner_type;
4292                                 ether_type &=
4293                                         ((const struct rte_flow_item_vlan *)
4294                                          items->mask)->inner_type;
4295                                 ether_type = rte_be_to_cpu_16(ether_type);
4296                         } else {
4297                                 ether_type = 0;
4298                         }
4299                         break;
4300                 case RTE_FLOW_ITEM_TYPE_IPV4:
4301                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4302                                                   &item_flags, &tunnel);
4303                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4304                                                            last_item,
4305                                                            ether_type, NULL,
4306                                                            error);
4307                         if (ret < 0)
4308                                 return ret;
4309                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4310                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4311                         if (items->mask != NULL &&
4312                             ((const struct rte_flow_item_ipv4 *)
4313                              items->mask)->hdr.next_proto_id) {
4314                                 next_protocol =
4315                                         ((const struct rte_flow_item_ipv4 *)
4316                                          (items->spec))->hdr.next_proto_id;
4317                                 next_protocol &=
4318                                         ((const struct rte_flow_item_ipv4 *)
4319                                          (items->mask))->hdr.next_proto_id;
4320                         } else {
4321                                 /* Reset for inner layer. */
4322                                 next_protocol = 0xff;
4323                         }
4324                         break;
4325                 case RTE_FLOW_ITEM_TYPE_IPV6:
4326                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4327                                                   &item_flags, &tunnel);
4328                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4329                                                            last_item,
4330                                                            ether_type, NULL,
4331                                                            error);
4332                         if (ret < 0)
4333                                 return ret;
4334                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4335                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4336                         if (items->mask != NULL &&
4337                             ((const struct rte_flow_item_ipv6 *)
4338                              items->mask)->hdr.proto) {
4339                                 next_protocol =
4340                                         ((const struct rte_flow_item_ipv6 *)
4341                                          items->spec)->hdr.proto;
4342                                 next_protocol &=
4343                                         ((const struct rte_flow_item_ipv6 *)
4344                                          items->mask)->hdr.proto;
4345                         } else {
4346                                 /* Reset for inner layer. */
4347                                 next_protocol = 0xff;
4348                         }
4349                         break;
4350                 case RTE_FLOW_ITEM_TYPE_TCP:
4351                         ret = mlx5_flow_validate_item_tcp
4352                                                 (items, item_flags,
4353                                                  next_protocol,
4354                                                  &nic_tcp_mask,
4355                                                  error);
4356                         if (ret < 0)
4357                                 return ret;
4358                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4359                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4360                         break;
4361                 case RTE_FLOW_ITEM_TYPE_UDP:
4362                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4363                                                           next_protocol,
4364                                                           error);
4365                         if (ret < 0)
4366                                 return ret;
4367                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4368                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4369                         break;
4370                 case RTE_FLOW_ITEM_TYPE_GRE:
4371                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4372                                                           next_protocol, error);
4373                         if (ret < 0)
4374                                 return ret;
4375                         gre_item = items;
4376                         last_item = MLX5_FLOW_LAYER_GRE;
4377                         break;
4378                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4379                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4380                                                             next_protocol,
4381                                                             error);
4382                         if (ret < 0)
4383                                 return ret;
4384                         last_item = MLX5_FLOW_LAYER_NVGRE;
4385                         break;
4386                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4387                         ret = mlx5_flow_validate_item_gre_key
4388                                 (items, item_flags, gre_item, error);
4389                         if (ret < 0)
4390                                 return ret;
4391                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4392                         break;
4393                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4394                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4395                                                             error);
4396                         if (ret < 0)
4397                                 return ret;
4398                         last_item = MLX5_FLOW_LAYER_VXLAN;
4399                         break;
4400                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4401                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4402                                                                 item_flags, dev,
4403                                                                 error);
4404                         if (ret < 0)
4405                                 return ret;
4406                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4407                         break;
4408                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4409                         ret = mlx5_flow_validate_item_geneve(items,
4410                                                              item_flags, dev,
4411                                                              error);
4412                         if (ret < 0)
4413                                 return ret;
4414                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4415                         break;
4416                 case RTE_FLOW_ITEM_TYPE_MPLS:
4417                         ret = mlx5_flow_validate_item_mpls(dev, items,
4418                                                            item_flags,
4419                                                            last_item, error);
4420                         if (ret < 0)
4421                                 return ret;
4422                         last_item = MLX5_FLOW_LAYER_MPLS;
4423                         break;
4424
4425                 case RTE_FLOW_ITEM_TYPE_MARK:
4426                         ret = flow_dv_validate_item_mark(dev, items, attr,
4427                                                          error);
4428                         if (ret < 0)
4429                                 return ret;
4430                         last_item = MLX5_FLOW_ITEM_MARK;
4431                         break;
4432                 case RTE_FLOW_ITEM_TYPE_META:
4433                         ret = flow_dv_validate_item_meta(dev, items, attr,
4434                                                          error);
4435                         if (ret < 0)
4436                                 return ret;
4437                         last_item = MLX5_FLOW_ITEM_METADATA;
4438                         break;
4439                 case RTE_FLOW_ITEM_TYPE_ICMP:
4440                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4441                                                            next_protocol,
4442                                                            error);
4443                         if (ret < 0)
4444                                 return ret;
4445                         last_item = MLX5_FLOW_LAYER_ICMP;
4446                         break;
4447                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4448                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4449                                                             next_protocol,
4450                                                             error);
4451                         if (ret < 0)
4452                                 return ret;
4453                         last_item = MLX5_FLOW_LAYER_ICMP6;
4454                         break;
4455                 case RTE_FLOW_ITEM_TYPE_TAG:
4456                         ret = flow_dv_validate_item_tag(dev, items,
4457                                                         attr, error);
4458                         if (ret < 0)
4459                                 return ret;
4460                         last_item = MLX5_FLOW_ITEM_TAG;
4461                         break;
4462                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4463                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4464                         break;
4465                 default:
4466                         return rte_flow_error_set(error, ENOTSUP,
4467                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4468                                                   NULL, "item not supported");
4469                 }
4470                 item_flags |= last_item;
4471         }
4472         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4473                 int type = actions->type;
4474                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4475                         return rte_flow_error_set(error, ENOTSUP,
4476                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4477                                                   actions, "too many actions");
4478                 switch (type) {
4479                 case RTE_FLOW_ACTION_TYPE_VOID:
4480                         break;
4481                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4482                         ret = flow_dv_validate_action_port_id(dev,
4483                                                               action_flags,
4484                                                               actions,
4485                                                               attr,
4486                                                               error);
4487                         if (ret)
4488                                 return ret;
4489                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4490                         ++actions_n;
4491                         break;
4492                 case RTE_FLOW_ACTION_TYPE_FLAG:
4493                         ret = flow_dv_validate_action_flag(dev, action_flags,
4494                                                            attr, error);
4495                         if (ret < 0)
4496                                 return ret;
4497                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4498                                 /* Count all modify-header actions as one. */
4499                                 if (!(action_flags &
4500                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4501                                         ++actions_n;
4502                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4503                                                 MLX5_FLOW_ACTION_MARK_EXT;
4504                         } else {
4505                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4506                                 ++actions_n;
4507                         }
4508                         break;
4509                 case RTE_FLOW_ACTION_TYPE_MARK:
4510                         ret = flow_dv_validate_action_mark(dev, actions,
4511                                                            action_flags,
4512                                                            attr, error);
4513                         if (ret < 0)
4514                                 return ret;
4515                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4516                                 /* Count all modify-header actions as one. */
4517                                 if (!(action_flags &
4518                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4519                                         ++actions_n;
4520                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4521                                                 MLX5_FLOW_ACTION_MARK_EXT;
4522                         } else {
4523                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4524                                 ++actions_n;
4525                         }
4526                         break;
4527                 case RTE_FLOW_ACTION_TYPE_SET_META:
4528                         ret = flow_dv_validate_action_set_meta(dev, actions,
4529                                                                action_flags,
4530                                                                attr, error);
4531                         if (ret < 0)
4532                                 return ret;
4533                         /* Count all modify-header actions as one action. */
4534                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4535                                 ++actions_n;
4536                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4537                         break;
4538                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4539                         ret = flow_dv_validate_action_set_tag(dev, actions,
4540                                                               action_flags,
4541                                                               attr, error);
4542                         if (ret < 0)
4543                                 return ret;
4544                         /* Count all modify-header actions as one action. */
4545                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4546                                 ++actions_n;
4547                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4548                         break;
4549                 case RTE_FLOW_ACTION_TYPE_DROP:
4550                         ret = mlx5_flow_validate_action_drop(action_flags,
4551                                                              attr, error);
4552                         if (ret < 0)
4553                                 return ret;
4554                         action_flags |= MLX5_FLOW_ACTION_DROP;
4555                         ++actions_n;
4556                         break;
4557                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4558                         ret = mlx5_flow_validate_action_queue(actions,
4559                                                               action_flags, dev,
4560                                                               attr, error);
4561                         if (ret < 0)
4562                                 return ret;
4563                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4564                         ++actions_n;
4565                         break;
4566                 case RTE_FLOW_ACTION_TYPE_RSS:
4567                         ret = mlx5_flow_validate_action_rss(actions,
4568                                                             action_flags, dev,
4569                                                             attr, item_flags,
4570                                                             error);
4571                         if (ret < 0)
4572                                 return ret;
4573                         action_flags |= MLX5_FLOW_ACTION_RSS;
4574                         ++actions_n;
4575                         break;
4576                 case RTE_FLOW_ACTION_TYPE_COUNT:
4577                         ret = flow_dv_validate_action_count(dev, error);
4578                         if (ret < 0)
4579                                 return ret;
4580                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4581                         ++actions_n;
4582                         break;
4583                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4584                         if (flow_dv_validate_action_pop_vlan(dev,
4585                                                              action_flags,
4586                                                              actions,
4587                                                              item_flags, attr,
4588                                                              error))
4589                                 return -rte_errno;
4590                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4591                         ++actions_n;
4592                         break;
4593                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4594                         ret = flow_dv_validate_action_push_vlan(action_flags,
4595                                                                 item_flags,
4596                                                                 actions, attr,
4597                                                                 error);
4598                         if (ret < 0)
4599                                 return ret;
4600                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4601                         ++actions_n;
4602                         break;
4603                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4604                         ret = flow_dv_validate_action_set_vlan_pcp
4605                                                 (action_flags, actions, error);
4606                         if (ret < 0)
4607                                 return ret;
4608                         /* Count PCP with push_vlan command. */
4609                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4610                         break;
4611                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4612                         ret = flow_dv_validate_action_set_vlan_vid
4613                                                 (item_flags, action_flags,
4614                                                  actions, error);
4615                         if (ret < 0)
4616                                 return ret;
4617                         /* Count VID with push_vlan command. */
4618                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4619                         break;
4620                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4621                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4622                         ret = flow_dv_validate_action_l2_encap(action_flags,
4623                                                                actions, attr,
4624                                                                error);
4625                         if (ret < 0)
4626                                 return ret;
4627                         action_flags |= actions->type ==
4628                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4629                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4630                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4631                         ++actions_n;
4632                         break;
4633                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4634                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4635                         ret = flow_dv_validate_action_l2_decap(action_flags,
4636                                                                attr, error);
4637                         if (ret < 0)
4638                                 return ret;
4639                         action_flags |= actions->type ==
4640                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4641                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4642                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4643                         ++actions_n;
4644                         break;
4645                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4646                         ret = flow_dv_validate_action_raw_encap(action_flags,
4647                                                                 actions, attr,
4648                                                                 error);
4649                         if (ret < 0)
4650                                 return ret;
4651                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4652                         ++actions_n;
4653                         break;
4654                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4655                         ret = flow_dv_validate_action_raw_decap(action_flags,
4656                                                                 actions, attr,
4657                                                                 error);
4658                         if (ret < 0)
4659                                 return ret;
4660                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4661                         ++actions_n;
4662                         break;
4663                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4664                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4665                         ret = flow_dv_validate_action_modify_mac(action_flags,
4666                                                                  actions,
4667                                                                  item_flags,
4668                                                                  error);
4669                         if (ret < 0)
4670                                 return ret;
4671                         /* Count all modify-header actions as one action. */
4672                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4673                                 ++actions_n;
4674                         action_flags |= actions->type ==
4675                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4676                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4677                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4678                         break;
4679
4680                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4681                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4682                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4683                                                                   actions,
4684                                                                   item_flags,
4685                                                                   error);
4686                         if (ret < 0)
4687                                 return ret;
4688                         /* Count all modify-header actions as one action. */
4689                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4690                                 ++actions_n;
4691                         action_flags |= actions->type ==
4692                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4693                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4694                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4695                         break;
4696                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4697                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4698                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4699                                                                   actions,
4700                                                                   item_flags,
4701                                                                   error);
4702                         if (ret < 0)
4703                                 return ret;
4704                         /* Count all modify-header actions as one action. */
4705                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4706                                 ++actions_n;
4707                         action_flags |= actions->type ==
4708                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4709                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4710                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4711                         break;
4712                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4713                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4714                         ret = flow_dv_validate_action_modify_tp(action_flags,
4715                                                                 actions,
4716                                                                 item_flags,
4717                                                                 error);
4718                         if (ret < 0)
4719                                 return ret;
4720                         /* Count all modify-header actions as one action. */
4721                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4722                                 ++actions_n;
4723                         action_flags |= actions->type ==
4724                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4725                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4726                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4727                         break;
4728                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4729                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4730                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4731                                                                  actions,
4732                                                                  item_flags,
4733                                                                  error);
4734                         if (ret < 0)
4735                                 return ret;
4736                         /* Count all modify-header actions as one action. */
4737                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4738                                 ++actions_n;
4739                         action_flags |= actions->type ==
4740                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4741                                                 MLX5_FLOW_ACTION_SET_TTL :
4742                                                 MLX5_FLOW_ACTION_DEC_TTL;
4743                         break;
4744                 case RTE_FLOW_ACTION_TYPE_JUMP:
4745                         ret = flow_dv_validate_action_jump(actions,
4746                                                            action_flags,
4747                                                            attr, external,
4748                                                            error);
4749                         if (ret)
4750                                 return ret;
4751                         ++actions_n;
4752                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4753                         break;
4754                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4755                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4756                         ret = flow_dv_validate_action_modify_tcp_seq
4757                                                                 (action_flags,
4758                                                                  actions,
4759                                                                  item_flags,
4760                                                                  error);
4761                         if (ret < 0)
4762                                 return ret;
4763                         /* Count all modify-header actions as one action. */
4764                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4765                                 ++actions_n;
4766                         action_flags |= actions->type ==
4767                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4768                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4769                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4770                         break;
4771                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4772                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4773                         ret = flow_dv_validate_action_modify_tcp_ack
4774                                                                 (action_flags,
4775                                                                  actions,
4776                                                                  item_flags,
4777                                                                  error);
4778                         if (ret < 0)
4779                                 return ret;
4780                         /* Count all modify-header actions as one action. */
4781                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4782                                 ++actions_n;
4783                         action_flags |= actions->type ==
4784                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4785                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4786                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4787                         break;
4788                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4789                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4790                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4791                         break;
4792                 case RTE_FLOW_ACTION_TYPE_METER:
4793                         ret = mlx5_flow_validate_action_meter(dev,
4794                                                               action_flags,
4795                                                               actions, attr,
4796                                                               error);
4797                         if (ret < 0)
4798                                 return ret;
4799                         action_flags |= MLX5_FLOW_ACTION_METER;
4800                         ++actions_n;
4801                         break;
4802                 default:
4803                         return rte_flow_error_set(error, ENOTSUP,
4804                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4805                                                   actions,
4806                                                   "action not supported");
4807                 }
4808         }
4809         if ((action_flags & MLX5_FLOW_LAYER_TUNNEL) &&
4810             (action_flags & MLX5_FLOW_VLAN_ACTIONS))
4811                 return rte_flow_error_set(error, ENOTSUP,
4812                                           RTE_FLOW_ERROR_TYPE_ACTION,
4813                                           actions,
4814                                           "can't have vxlan and vlan"
4815                                           " actions in the same rule");
4816         /* Eswitch has few restrictions on using items and actions */
4817         if (attr->transfer) {
4818                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4819                     action_flags & MLX5_FLOW_ACTION_FLAG)
4820                         return rte_flow_error_set(error, ENOTSUP,
4821                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4822                                                   NULL,
4823                                                   "unsupported action FLAG");
4824                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4825                     action_flags & MLX5_FLOW_ACTION_MARK)
4826                         return rte_flow_error_set(error, ENOTSUP,
4827                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4828                                                   NULL,
4829                                                   "unsupported action MARK");
4830                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
4831                         return rte_flow_error_set(error, ENOTSUP,
4832                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4833                                                   NULL,
4834                                                   "unsupported action QUEUE");
4835                 if (action_flags & MLX5_FLOW_ACTION_RSS)
4836                         return rte_flow_error_set(error, ENOTSUP,
4837                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4838                                                   NULL,
4839                                                   "unsupported action RSS");
4840                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4841                         return rte_flow_error_set(error, EINVAL,
4842                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4843                                                   actions,
4844                                                   "no fate action is found");
4845         } else {
4846                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
4847                         return rte_flow_error_set(error, EINVAL,
4848                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4849                                                   actions,
4850                                                   "no fate action is found");
4851         }
4852         return 0;
4853 }
4854
4855 /**
4856  * Internal preparation function. Allocates the DV flow size,
4857  * this size is constant.
4858  *
4859  * @param[in] attr
4860  *   Pointer to the flow attributes.
4861  * @param[in] items
4862  *   Pointer to the list of items.
4863  * @param[in] actions
4864  *   Pointer to the list of actions.
4865  * @param[out] error
4866  *   Pointer to the error structure.
4867  *
4868  * @return
4869  *   Pointer to mlx5_flow object on success,
4870  *   otherwise NULL and rte_errno is set.
4871  */
4872 static struct mlx5_flow *
4873 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
4874                 const struct rte_flow_item items[] __rte_unused,
4875                 const struct rte_flow_action actions[] __rte_unused,
4876                 struct rte_flow_error *error)
4877 {
4878         size_t size = sizeof(struct mlx5_flow);
4879         struct mlx5_flow *dev_flow;
4880
4881         dev_flow = rte_calloc(__func__, 1, size, 0);
4882         if (!dev_flow) {
4883                 rte_flow_error_set(error, ENOMEM,
4884                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4885                                    "not enough memory to create flow");
4886                 return NULL;
4887         }
4888         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
4889         dev_flow->ingress = attr->ingress;
4890         dev_flow->transfer = attr->transfer;
4891         return dev_flow;
4892 }
4893
4894 #ifndef NDEBUG
4895 /**
4896  * Sanity check for match mask and value. Similar to check_valid_spec() in
4897  * kernel driver. If unmasked bit is present in value, it returns failure.
4898  *
4899  * @param match_mask
4900  *   pointer to match mask buffer.
4901  * @param match_value
4902  *   pointer to match value buffer.
4903  *
4904  * @return
4905  *   0 if valid, -EINVAL otherwise.
4906  */
4907 static int
4908 flow_dv_check_valid_spec(void *match_mask, void *match_value)
4909 {
4910         uint8_t *m = match_mask;
4911         uint8_t *v = match_value;
4912         unsigned int i;
4913
4914         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
4915                 if (v[i] & ~m[i]) {
4916                         DRV_LOG(ERR,
4917                                 "match_value differs from match_criteria"
4918                                 " %p[%u] != %p[%u]",
4919                                 match_value, i, match_mask, i);
4920                         return -EINVAL;
4921                 }
4922         }
4923         return 0;
4924 }
4925 #endif
4926
4927 /**
4928  * Add Ethernet item to matcher and to the value.
4929  *
4930  * @param[in, out] matcher
4931  *   Flow matcher.
4932  * @param[in, out] key
4933  *   Flow matcher value.
4934  * @param[in] item
4935  *   Flow pattern to translate.
4936  * @param[in] inner
4937  *   Item is inner pattern.
4938  */
4939 static void
4940 flow_dv_translate_item_eth(void *matcher, void *key,
4941                            const struct rte_flow_item *item, int inner)
4942 {
4943         const struct rte_flow_item_eth *eth_m = item->mask;
4944         const struct rte_flow_item_eth *eth_v = item->spec;
4945         const struct rte_flow_item_eth nic_mask = {
4946                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4947                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4948                 .type = RTE_BE16(0xffff),
4949         };
4950         void *headers_m;
4951         void *headers_v;
4952         char *l24_v;
4953         unsigned int i;
4954
4955         if (!eth_v)
4956                 return;
4957         if (!eth_m)
4958                 eth_m = &nic_mask;
4959         if (inner) {
4960                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4961                                          inner_headers);
4962                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4963         } else {
4964                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4965                                          outer_headers);
4966                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4967         }
4968         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
4969                &eth_m->dst, sizeof(eth_m->dst));
4970         /* The value must be in the range of the mask. */
4971         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
4972         for (i = 0; i < sizeof(eth_m->dst); ++i)
4973                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
4974         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
4975                &eth_m->src, sizeof(eth_m->src));
4976         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
4977         /* The value must be in the range of the mask. */
4978         for (i = 0; i < sizeof(eth_m->dst); ++i)
4979                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
4980         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
4981                  rte_be_to_cpu_16(eth_m->type));
4982         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
4983         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
4984 }
4985
4986 /**
4987  * Add VLAN item to matcher and to the value.
4988  *
4989  * @param[in, out] dev_flow
4990  *   Flow descriptor.
4991  * @param[in, out] matcher
4992  *   Flow matcher.
4993  * @param[in, out] key
4994  *   Flow matcher value.
4995  * @param[in] item
4996  *   Flow pattern to translate.
4997  * @param[in] inner
4998  *   Item is inner pattern.
4999  */
5000 static void
5001 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5002                             void *matcher, void *key,
5003                             const struct rte_flow_item *item,
5004                             int inner)
5005 {
5006         const struct rte_flow_item_vlan *vlan_m = item->mask;
5007         const struct rte_flow_item_vlan *vlan_v = item->spec;
5008         void *headers_m;
5009         void *headers_v;
5010         uint16_t tci_m;
5011         uint16_t tci_v;
5012
5013         if (!vlan_v)
5014                 return;
5015         if (!vlan_m)
5016                 vlan_m = &rte_flow_item_vlan_mask;
5017         if (inner) {
5018                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5019                                          inner_headers);
5020                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5021         } else {
5022                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5023                                          outer_headers);
5024                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5025                 /*
5026                  * This is workaround, masks are not supported,
5027                  * and pre-validated.
5028                  */
5029                 dev_flow->dv.vf_vlan.tag =
5030                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5031         }
5032         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5033         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5034         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5035         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5036         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5037         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5038         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5039         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5040         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5041         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5042         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5043                  rte_be_to_cpu_16(vlan_m->inner_type));
5044         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5045                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5046 }
5047
5048 /**
5049  * Add IPV4 item to matcher and to the value.
5050  *
5051  * @param[in, out] matcher
5052  *   Flow matcher.
5053  * @param[in, out] key
5054  *   Flow matcher value.
5055  * @param[in] item
5056  *   Flow pattern to translate.
5057  * @param[in] inner
5058  *   Item is inner pattern.
5059  * @param[in] group
5060  *   The group to insert the rule.
5061  */
5062 static void
5063 flow_dv_translate_item_ipv4(void *matcher, void *key,
5064                             const struct rte_flow_item *item,
5065                             int inner, uint32_t group)
5066 {
5067         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5068         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5069         const struct rte_flow_item_ipv4 nic_mask = {
5070                 .hdr = {
5071                         .src_addr = RTE_BE32(0xffffffff),
5072                         .dst_addr = RTE_BE32(0xffffffff),
5073                         .type_of_service = 0xff,
5074                         .next_proto_id = 0xff,
5075                 },
5076         };
5077         void *headers_m;
5078         void *headers_v;
5079         char *l24_m;
5080         char *l24_v;
5081         uint8_t tos;
5082
5083         if (inner) {
5084                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5085                                          inner_headers);
5086                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5087         } else {
5088                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5089                                          outer_headers);
5090                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5091         }
5092         if (group == 0)
5093                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5094         else
5095                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5096         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5097         if (!ipv4_v)
5098                 return;
5099         if (!ipv4_m)
5100                 ipv4_m = &nic_mask;
5101         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5102                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5103         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5104                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5105         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5106         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5107         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5108                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5109         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5110                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5111         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5112         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5113         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5114         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5115                  ipv4_m->hdr.type_of_service);
5116         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5117         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5118                  ipv4_m->hdr.type_of_service >> 2);
5119         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5120         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5121                  ipv4_m->hdr.next_proto_id);
5122         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5123                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5124 }
5125
5126 /**
5127  * Add IPV6 item to matcher and to the value.
5128  *
5129  * @param[in, out] matcher
5130  *   Flow matcher.
5131  * @param[in, out] key
5132  *   Flow matcher value.
5133  * @param[in] item
5134  *   Flow pattern to translate.
5135  * @param[in] inner
5136  *   Item is inner pattern.
5137  * @param[in] group
5138  *   The group to insert the rule.
5139  */
5140 static void
5141 flow_dv_translate_item_ipv6(void *matcher, void *key,
5142                             const struct rte_flow_item *item,
5143                             int inner, uint32_t group)
5144 {
5145         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5146         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5147         const struct rte_flow_item_ipv6 nic_mask = {
5148                 .hdr = {
5149                         .src_addr =
5150                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5151                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5152                         .dst_addr =
5153                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5154                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5155                         .vtc_flow = RTE_BE32(0xffffffff),
5156                         .proto = 0xff,
5157                         .hop_limits = 0xff,
5158                 },
5159         };
5160         void *headers_m;
5161         void *headers_v;
5162         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5163         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5164         char *l24_m;
5165         char *l24_v;
5166         uint32_t vtc_m;
5167         uint32_t vtc_v;
5168         int i;
5169         int size;
5170
5171         if (inner) {
5172                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5173                                          inner_headers);
5174                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5175         } else {
5176                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5177                                          outer_headers);
5178                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5179         }
5180         if (group == 0)
5181                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5182         else
5183                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5184         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5185         if (!ipv6_v)
5186                 return;
5187         if (!ipv6_m)
5188                 ipv6_m = &nic_mask;
5189         size = sizeof(ipv6_m->hdr.dst_addr);
5190         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5191                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5192         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5193                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5194         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5195         for (i = 0; i < size; ++i)
5196                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5197         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5198                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5199         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5200                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5201         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5202         for (i = 0; i < size; ++i)
5203                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5204         /* TOS. */
5205         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5206         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5207         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5208         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5209         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5210         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5211         /* Label. */
5212         if (inner) {
5213                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5214                          vtc_m);
5215                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5216                          vtc_v);
5217         } else {
5218                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5219                          vtc_m);
5220                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5221                          vtc_v);
5222         }
5223         /* Protocol. */
5224         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5225                  ipv6_m->hdr.proto);
5226         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5227                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5228 }
5229
5230 /**
5231  * Add TCP item to matcher and to the value.
5232  *
5233  * @param[in, out] matcher
5234  *   Flow matcher.
5235  * @param[in, out] key
5236  *   Flow matcher value.
5237  * @param[in] item
5238  *   Flow pattern to translate.
5239  * @param[in] inner
5240  *   Item is inner pattern.
5241  */
5242 static void
5243 flow_dv_translate_item_tcp(void *matcher, void *key,
5244                            const struct rte_flow_item *item,
5245                            int inner)
5246 {
5247         const struct rte_flow_item_tcp *tcp_m = item->mask;
5248         const struct rte_flow_item_tcp *tcp_v = item->spec;
5249         void *headers_m;
5250         void *headers_v;
5251
5252         if (inner) {
5253                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5254                                          inner_headers);
5255                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5256         } else {
5257                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5258                                          outer_headers);
5259                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5260         }
5261         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5262         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5263         if (!tcp_v)
5264                 return;
5265         if (!tcp_m)
5266                 tcp_m = &rte_flow_item_tcp_mask;
5267         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5268                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5269         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5270                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5271         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5272                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5273         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5274                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5275         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5276                  tcp_m->hdr.tcp_flags);
5277         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5278                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5279 }
5280
5281 /**
5282  * Add UDP item to matcher and to the value.
5283  *
5284  * @param[in, out] matcher
5285  *   Flow matcher.
5286  * @param[in, out] key
5287  *   Flow matcher value.
5288  * @param[in] item
5289  *   Flow pattern to translate.
5290  * @param[in] inner
5291  *   Item is inner pattern.
5292  */
5293 static void
5294 flow_dv_translate_item_udp(void *matcher, void *key,
5295                            const struct rte_flow_item *item,
5296                            int inner)
5297 {
5298         const struct rte_flow_item_udp *udp_m = item->mask;
5299         const struct rte_flow_item_udp *udp_v = item->spec;
5300         void *headers_m;
5301         void *headers_v;
5302
5303         if (inner) {
5304                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5305                                          inner_headers);
5306                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5307         } else {
5308                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5309                                          outer_headers);
5310                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5311         }
5312         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5313         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5314         if (!udp_v)
5315                 return;
5316         if (!udp_m)
5317                 udp_m = &rte_flow_item_udp_mask;
5318         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5319                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5320         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5321                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5322         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5323                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5324         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5325                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5326 }
5327
5328 /**
5329  * Add GRE optional Key item to matcher and to the value.
5330  *
5331  * @param[in, out] matcher
5332  *   Flow matcher.
5333  * @param[in, out] key
5334  *   Flow matcher value.
5335  * @param[in] item
5336  *   Flow pattern to translate.
5337  * @param[in] inner
5338  *   Item is inner pattern.
5339  */
5340 static void
5341 flow_dv_translate_item_gre_key(void *matcher, void *key,
5342                                    const struct rte_flow_item *item)
5343 {
5344         const rte_be32_t *key_m = item->mask;
5345         const rte_be32_t *key_v = item->spec;
5346         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5347         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5348         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5349
5350         if (!key_v)
5351                 return;
5352         if (!key_m)
5353                 key_m = &gre_key_default_mask;
5354         /* GRE K bit must be on and should already be validated */
5355         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5356         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5357         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5358                  rte_be_to_cpu_32(*key_m) >> 8);
5359         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5360                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5361         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5362                  rte_be_to_cpu_32(*key_m) & 0xFF);
5363         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5364                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5365 }
5366
5367 /**
5368  * Add GRE item to matcher and to the value.
5369  *
5370  * @param[in, out] matcher
5371  *   Flow matcher.
5372  * @param[in, out] key
5373  *   Flow matcher value.
5374  * @param[in] item
5375  *   Flow pattern to translate.
5376  * @param[in] inner
5377  *   Item is inner pattern.
5378  */
5379 static void
5380 flow_dv_translate_item_gre(void *matcher, void *key,
5381                            const struct rte_flow_item *item,
5382                            int inner)
5383 {
5384         const struct rte_flow_item_gre *gre_m = item->mask;
5385         const struct rte_flow_item_gre *gre_v = item->spec;
5386         void *headers_m;
5387         void *headers_v;
5388         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5389         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5390         struct {
5391                 union {
5392                         __extension__
5393                         struct {
5394                                 uint16_t version:3;
5395                                 uint16_t rsvd0:9;
5396                                 uint16_t s_present:1;
5397                                 uint16_t k_present:1;
5398                                 uint16_t rsvd_bit1:1;
5399                                 uint16_t c_present:1;
5400                         };
5401                         uint16_t value;
5402                 };
5403         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5404
5405         if (inner) {
5406                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5407                                          inner_headers);
5408                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5409         } else {
5410                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5411                                          outer_headers);
5412                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5413         }
5414         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5415         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5416         if (!gre_v)
5417                 return;
5418         if (!gre_m)
5419                 gre_m = &rte_flow_item_gre_mask;
5420         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5421                  rte_be_to_cpu_16(gre_m->protocol));
5422         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5423                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5424         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5425         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5426         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5427                  gre_crks_rsvd0_ver_m.c_present);
5428         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5429                  gre_crks_rsvd0_ver_v.c_present &
5430                  gre_crks_rsvd0_ver_m.c_present);
5431         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5432                  gre_crks_rsvd0_ver_m.k_present);
5433         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5434                  gre_crks_rsvd0_ver_v.k_present &
5435                  gre_crks_rsvd0_ver_m.k_present);
5436         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5437                  gre_crks_rsvd0_ver_m.s_present);
5438         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5439                  gre_crks_rsvd0_ver_v.s_present &
5440                  gre_crks_rsvd0_ver_m.s_present);
5441 }
5442
5443 /**
5444  * Add NVGRE item to matcher and to the value.
5445  *
5446  * @param[in, out] matcher
5447  *   Flow matcher.
5448  * @param[in, out] key
5449  *   Flow matcher value.
5450  * @param[in] item
5451  *   Flow pattern to translate.
5452  * @param[in] inner
5453  *   Item is inner pattern.
5454  */
5455 static void
5456 flow_dv_translate_item_nvgre(void *matcher, void *key,
5457                              const struct rte_flow_item *item,
5458                              int inner)
5459 {
5460         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5461         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5462         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5463         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5464         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5465         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5466         char *gre_key_m;
5467         char *gre_key_v;
5468         int size;
5469         int i;
5470
5471         /* For NVGRE, GRE header fields must be set with defined values. */
5472         const struct rte_flow_item_gre gre_spec = {
5473                 .c_rsvd0_ver = RTE_BE16(0x2000),
5474                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5475         };
5476         const struct rte_flow_item_gre gre_mask = {
5477                 .c_rsvd0_ver = RTE_BE16(0xB000),
5478                 .protocol = RTE_BE16(UINT16_MAX),
5479         };
5480         const struct rte_flow_item gre_item = {
5481                 .spec = &gre_spec,
5482                 .mask = &gre_mask,
5483                 .last = NULL,
5484         };
5485         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5486         if (!nvgre_v)
5487                 return;
5488         if (!nvgre_m)
5489                 nvgre_m = &rte_flow_item_nvgre_mask;
5490         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5491         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5492         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5493         memcpy(gre_key_m, tni_flow_id_m, size);
5494         for (i = 0; i < size; ++i)
5495                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5496 }
5497
5498 /**
5499  * Add VXLAN item to matcher and to the value.
5500  *
5501  * @param[in, out] matcher
5502  *   Flow matcher.
5503  * @param[in, out] key
5504  *   Flow matcher value.
5505  * @param[in] item
5506  *   Flow pattern to translate.
5507  * @param[in] inner
5508  *   Item is inner pattern.
5509  */
5510 static void
5511 flow_dv_translate_item_vxlan(void *matcher, void *key,
5512                              const struct rte_flow_item *item,
5513                              int inner)
5514 {
5515         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5516         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5517         void *headers_m;
5518         void *headers_v;
5519         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5520         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5521         char *vni_m;
5522         char *vni_v;
5523         uint16_t dport;
5524         int size;
5525         int i;
5526
5527         if (inner) {
5528                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5529                                          inner_headers);
5530                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5531         } else {
5532                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5533                                          outer_headers);
5534                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5535         }
5536         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5537                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5538         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5539                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5540                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5541         }
5542         if (!vxlan_v)
5543                 return;
5544         if (!vxlan_m)
5545                 vxlan_m = &rte_flow_item_vxlan_mask;
5546         size = sizeof(vxlan_m->vni);
5547         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5548         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5549         memcpy(vni_m, vxlan_m->vni, size);
5550         for (i = 0; i < size; ++i)
5551                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5552 }
5553
5554 /**
5555  * Add Geneve item to matcher and to the value.
5556  *
5557  * @param[in, out] matcher
5558  *   Flow matcher.
5559  * @param[in, out] key
5560  *   Flow matcher value.
5561  * @param[in] item
5562  *   Flow pattern to translate.
5563  * @param[in] inner
5564  *   Item is inner pattern.
5565  */
5566
5567 static void
5568 flow_dv_translate_item_geneve(void *matcher, void *key,
5569                               const struct rte_flow_item *item, int inner)
5570 {
5571         const struct rte_flow_item_geneve *geneve_m = item->mask;
5572         const struct rte_flow_item_geneve *geneve_v = item->spec;
5573         void *headers_m;
5574         void *headers_v;
5575         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5576         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5577         uint16_t dport;
5578         uint16_t gbhdr_m;
5579         uint16_t gbhdr_v;
5580         char *vni_m;
5581         char *vni_v;
5582         size_t size, i;
5583
5584         if (inner) {
5585                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5586                                          inner_headers);
5587                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5588         } else {
5589                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5590                                          outer_headers);
5591                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5592         }
5593         dport = MLX5_UDP_PORT_GENEVE;
5594         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5595                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5596                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5597         }
5598         if (!geneve_v)
5599                 return;
5600         if (!geneve_m)
5601                 geneve_m = &rte_flow_item_geneve_mask;
5602         size = sizeof(geneve_m->vni);
5603         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5604         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5605         memcpy(vni_m, geneve_m->vni, size);
5606         for (i = 0; i < size; ++i)
5607                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5608         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5609                  rte_be_to_cpu_16(geneve_m->protocol));
5610         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5611                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5612         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5613         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5614         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5615                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5616         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5617                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5618         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5619                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5620         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5621                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5622                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5623 }
5624
5625 /**
5626  * Add MPLS item to matcher and to the value.
5627  *
5628  * @param[in, out] matcher
5629  *   Flow matcher.
5630  * @param[in, out] key
5631  *   Flow matcher value.
5632  * @param[in] item
5633  *   Flow pattern to translate.
5634  * @param[in] prev_layer
5635  *   The protocol layer indicated in previous item.
5636  * @param[in] inner
5637  *   Item is inner pattern.
5638  */
5639 static void
5640 flow_dv_translate_item_mpls(void *matcher, void *key,
5641                             const struct rte_flow_item *item,
5642                             uint64_t prev_layer,
5643                             int inner)
5644 {
5645         const uint32_t *in_mpls_m = item->mask;
5646         const uint32_t *in_mpls_v = item->spec;
5647         uint32_t *out_mpls_m = 0;
5648         uint32_t *out_mpls_v = 0;
5649         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5650         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5651         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5652                                      misc_parameters_2);
5653         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5654         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5655         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5656
5657         switch (prev_layer) {
5658         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5659                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5660                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5661                          MLX5_UDP_PORT_MPLS);
5662                 break;
5663         case MLX5_FLOW_LAYER_GRE:
5664                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5665                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5666                          RTE_ETHER_TYPE_MPLS);
5667                 break;
5668         default:
5669                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5670                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5671                          IPPROTO_MPLS);
5672                 break;
5673         }
5674         if (!in_mpls_v)
5675                 return;
5676         if (!in_mpls_m)
5677                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5678         switch (prev_layer) {
5679         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5680                 out_mpls_m =
5681                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5682                                                  outer_first_mpls_over_udp);
5683                 out_mpls_v =
5684                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5685                                                  outer_first_mpls_over_udp);
5686                 break;
5687         case MLX5_FLOW_LAYER_GRE:
5688                 out_mpls_m =
5689                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5690                                                  outer_first_mpls_over_gre);
5691                 out_mpls_v =
5692                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5693                                                  outer_first_mpls_over_gre);
5694                 break;
5695         default:
5696                 /* Inner MPLS not over GRE is not supported. */
5697                 if (!inner) {
5698                         out_mpls_m =
5699                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5700                                                          misc2_m,
5701                                                          outer_first_mpls);
5702                         out_mpls_v =
5703                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5704                                                          misc2_v,
5705                                                          outer_first_mpls);
5706                 }
5707                 break;
5708         }
5709         if (out_mpls_m && out_mpls_v) {
5710                 *out_mpls_m = *in_mpls_m;
5711                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5712         }
5713 }
5714
5715 /**
5716  * Add metadata register item to matcher
5717  *
5718  * @param[in, out] matcher
5719  *   Flow matcher.
5720  * @param[in, out] key
5721  *   Flow matcher value.
5722  * @param[in] reg_type
5723  *   Type of device metadata register
5724  * @param[in] value
5725  *   Register value
5726  * @param[in] mask
5727  *   Register mask
5728  */
5729 static void
5730 flow_dv_match_meta_reg(void *matcher, void *key,
5731                        enum modify_reg reg_type,
5732                        uint32_t data, uint32_t mask)
5733 {
5734         void *misc2_m =
5735                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5736         void *misc2_v =
5737                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5738
5739         data &= mask;
5740         switch (reg_type) {
5741         case REG_A:
5742                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5743                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5744                 break;
5745         case REG_B:
5746                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5747                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5748                 break;
5749         case REG_C_0:
5750                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, mask);
5751                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, data);
5752                 break;
5753         case REG_C_1:
5754                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5755                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5756                 break;
5757         case REG_C_2:
5758                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5759                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5760                 break;
5761         case REG_C_3:
5762                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
5763                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
5764                 break;
5765         case REG_C_4:
5766                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
5767                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
5768                 break;
5769         case REG_C_5:
5770                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
5771                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
5772                 break;
5773         case REG_C_6:
5774                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
5775                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
5776                 break;
5777         case REG_C_7:
5778                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
5779                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
5780                 break;
5781         default:
5782                 assert(false);
5783                 break;
5784         }
5785 }
5786
5787 /**
5788  * Add MARK item to matcher
5789  *
5790  * @param[in] dev
5791  *   The device to configure through.
5792  * @param[in, out] matcher
5793  *   Flow matcher.
5794  * @param[in, out] key
5795  *   Flow matcher value.
5796  * @param[in] item
5797  *   Flow pattern to translate.
5798  */
5799 static void
5800 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
5801                             void *matcher, void *key,
5802                             const struct rte_flow_item *item)
5803 {
5804         struct mlx5_priv *priv = dev->data->dev_private;
5805         const struct rte_flow_item_mark *mark;
5806         uint32_t value;
5807         uint32_t mask;
5808
5809         mark = item->mask ? (const void *)item->mask :
5810                             &rte_flow_item_mark_mask;
5811         mask = mark->id & priv->sh->dv_mark_mask;
5812         mark = (const void *)item->spec;
5813         assert(mark);
5814         value = mark->id & priv->sh->dv_mark_mask & mask;
5815         if (mask) {
5816                 enum modify_reg reg;
5817
5818                 /* Get the metadata register index for the mark. */
5819                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
5820                 assert(reg > 0);
5821                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5822         }
5823 }
5824
5825 /**
5826  * Add META item to matcher
5827  *
5828  * @param[in] dev
5829  *   The devich to configure through.
5830  * @param[in, out] matcher
5831  *   Flow matcher.
5832  * @param[in, out] key
5833  *   Flow matcher value.
5834  * @param[in] attr
5835  *   Attributes of flow that includes this item.
5836  * @param[in] item
5837  *   Flow pattern to translate.
5838  */
5839 static void
5840 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
5841                             void *matcher, void *key,
5842                             const struct rte_flow_attr *attr,
5843                             const struct rte_flow_item *item)
5844 {
5845         const struct rte_flow_item_meta *meta_m;
5846         const struct rte_flow_item_meta *meta_v;
5847
5848         meta_m = (const void *)item->mask;
5849         if (!meta_m)
5850                 meta_m = &rte_flow_item_meta_mask;
5851         meta_v = (const void *)item->spec;
5852         if (meta_v) {
5853                 enum modify_reg reg;
5854                 uint32_t value = meta_v->data;
5855                 uint32_t mask = meta_m->data;
5856
5857                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
5858                 if (reg < 0)
5859                         return;
5860                 /*
5861                  * In datapath code there is no endianness
5862                  * coversions for perfromance reasons, all
5863                  * pattern conversions are done in rte_flow.
5864                  */
5865                 value = rte_cpu_to_be_32(value);
5866                 mask = rte_cpu_to_be_32(mask);
5867                 if (reg == REG_C_0) {
5868                         struct mlx5_priv *priv = dev->data->dev_private;
5869                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
5870                         uint32_t shl_c0 = rte_bsf32(msk_c0);
5871
5872                         msk_c0 = rte_cpu_to_be_32(msk_c0);
5873                         value <<= shl_c0;
5874                         mask <<= shl_c0;
5875                         assert(msk_c0);
5876                         assert(!(~msk_c0 & mask));
5877                 }
5878                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5879         }
5880 }
5881
5882 /**
5883  * Add vport metadata Reg C0 item to matcher
5884  *
5885  * @param[in, out] matcher
5886  *   Flow matcher.
5887  * @param[in, out] key
5888  *   Flow matcher value.
5889  * @param[in] reg
5890  *   Flow pattern to translate.
5891  */
5892 static void
5893 flow_dv_translate_item_meta_vport(void *matcher, void *key,
5894                                   uint32_t value, uint32_t mask)
5895 {
5896         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
5897 }
5898
5899 /**
5900  * Add tag item to matcher
5901  *
5902  * @param[in, out] matcher
5903  *   Flow matcher.
5904  * @param[in, out] key
5905  *   Flow matcher value.
5906  * @param[in] item
5907  *   Flow pattern to translate.
5908  */
5909 static void
5910 flow_dv_translate_mlx5_item_tag(void *matcher, void *key,
5911                                 const struct rte_flow_item *item)
5912 {
5913         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
5914         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
5915
5916         assert(tag_v);
5917         flow_dv_match_meta_reg(matcher, key, tag_v->id, tag_v->data,
5918                                tag_m ? tag_m->data : UINT32_MAX);
5919 }
5920
5921 /**
5922  * Add TAG item to matcher
5923  *
5924  * @param[in] dev
5925  *   The devich to configure through.
5926  * @param[in, out] matcher
5927  *   Flow matcher.
5928  * @param[in, out] key
5929  *   Flow matcher value.
5930  * @param[in] item
5931  *   Flow pattern to translate.
5932  */
5933 static void
5934 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
5935                            void *matcher, void *key,
5936                            const struct rte_flow_item *item)
5937 {
5938         const struct rte_flow_item_tag *tag_v = item->spec;
5939         const struct rte_flow_item_tag *tag_m = item->mask;
5940         enum modify_reg reg;
5941
5942         assert(tag_v);
5943         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
5944         /* Get the metadata register index for the tag. */
5945         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
5946         assert(reg > 0);
5947         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
5948 }
5949
5950 /**
5951  * Add source vport match to the specified matcher.
5952  *
5953  * @param[in, out] matcher
5954  *   Flow matcher.
5955  * @param[in, out] key
5956  *   Flow matcher value.
5957  * @param[in] port
5958  *   Source vport value to match
5959  * @param[in] mask
5960  *   Mask
5961  */
5962 static void
5963 flow_dv_translate_item_source_vport(void *matcher, void *key,
5964                                     int16_t port, uint16_t mask)
5965 {
5966         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5967         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5968
5969         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
5970         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
5971 }
5972
5973 /**
5974  * Translate port-id item to eswitch match on  port-id.
5975  *
5976  * @param[in] dev
5977  *   The devich to configure through.
5978  * @param[in, out] matcher
5979  *   Flow matcher.
5980  * @param[in, out] key
5981  *   Flow matcher value.
5982  * @param[in] item
5983  *   Flow pattern to translate.
5984  *
5985  * @return
5986  *   0 on success, a negative errno value otherwise.
5987  */
5988 static int
5989 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
5990                                void *key, const struct rte_flow_item *item)
5991 {
5992         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
5993         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
5994         struct mlx5_priv *priv;
5995         uint16_t mask, id;
5996
5997         mask = pid_m ? pid_m->id : 0xffff;
5998         id = pid_v ? pid_v->id : dev->data->port_id;
5999         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6000         if (!priv)
6001                 return -rte_errno;
6002         /* Translate to vport field or to metadata, depending on mode. */
6003         if (priv->vport_meta_mask)
6004                 flow_dv_translate_item_meta_vport(matcher, key,
6005                                                   priv->vport_meta_tag,
6006                                                   priv->vport_meta_mask);
6007         else
6008                 flow_dv_translate_item_source_vport(matcher, key,
6009                                                     priv->vport_id, mask);
6010         return 0;
6011 }
6012
6013 /**
6014  * Add ICMP6 item to matcher and to the value.
6015  *
6016  * @param[in, out] matcher
6017  *   Flow matcher.
6018  * @param[in, out] key
6019  *   Flow matcher value.
6020  * @param[in] item
6021  *   Flow pattern to translate.
6022  * @param[in] inner
6023  *   Item is inner pattern.
6024  */
6025 static void
6026 flow_dv_translate_item_icmp6(void *matcher, void *key,
6027                               const struct rte_flow_item *item,
6028                               int inner)
6029 {
6030         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6031         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6032         void *headers_m;
6033         void *headers_v;
6034         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6035                                      misc_parameters_3);
6036         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6037         if (inner) {
6038                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6039                                          inner_headers);
6040                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6041         } else {
6042                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6043                                          outer_headers);
6044                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6045         }
6046         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6047         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6048         if (!icmp6_v)
6049                 return;
6050         if (!icmp6_m)
6051                 icmp6_m = &rte_flow_item_icmp6_mask;
6052         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6053         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6054                  icmp6_v->type & icmp6_m->type);
6055         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6056         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6057                  icmp6_v->code & icmp6_m->code);
6058 }
6059
6060 /**
6061  * Add ICMP item to matcher and to the value.
6062  *
6063  * @param[in, out] matcher
6064  *   Flow matcher.
6065  * @param[in, out] key
6066  *   Flow matcher value.
6067  * @param[in] item
6068  *   Flow pattern to translate.
6069  * @param[in] inner
6070  *   Item is inner pattern.
6071  */
6072 static void
6073 flow_dv_translate_item_icmp(void *matcher, void *key,
6074                             const struct rte_flow_item *item,
6075                             int inner)
6076 {
6077         const struct rte_flow_item_icmp *icmp_m = item->mask;
6078         const struct rte_flow_item_icmp *icmp_v = item->spec;
6079         void *headers_m;
6080         void *headers_v;
6081         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6082                                      misc_parameters_3);
6083         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6084         if (inner) {
6085                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6086                                          inner_headers);
6087                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6088         } else {
6089                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6090                                          outer_headers);
6091                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6092         }
6093         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6094         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6095         if (!icmp_v)
6096                 return;
6097         if (!icmp_m)
6098                 icmp_m = &rte_flow_item_icmp_mask;
6099         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6100                  icmp_m->hdr.icmp_type);
6101         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6102                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6103         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6104                  icmp_m->hdr.icmp_code);
6105         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6106                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6107 }
6108
6109 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6110
6111 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6112         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6113                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6114
6115 /**
6116  * Calculate flow matcher enable bitmap.
6117  *
6118  * @param match_criteria
6119  *   Pointer to flow matcher criteria.
6120  *
6121  * @return
6122  *   Bitmap of enabled fields.
6123  */
6124 static uint8_t
6125 flow_dv_matcher_enable(uint32_t *match_criteria)
6126 {
6127         uint8_t match_criteria_enable;
6128
6129         match_criteria_enable =
6130                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6131                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6132         match_criteria_enable |=
6133                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6134                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6135         match_criteria_enable |=
6136                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6137                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6138         match_criteria_enable |=
6139                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6140                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6141         match_criteria_enable |=
6142                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6143                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6144         return match_criteria_enable;
6145 }
6146
6147
6148 /**
6149  * Get a flow table.
6150  *
6151  * @param[in, out] dev
6152  *   Pointer to rte_eth_dev structure.
6153  * @param[in] table_id
6154  *   Table id to use.
6155  * @param[in] egress
6156  *   Direction of the table.
6157  * @param[in] transfer
6158  *   E-Switch or NIC flow.
6159  * @param[out] error
6160  *   pointer to error structure.
6161  *
6162  * @return
6163  *   Returns tables resource based on the index, NULL in case of failed.
6164  */
6165 static struct mlx5_flow_tbl_resource *
6166 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6167                          uint32_t table_id, uint8_t egress,
6168                          uint8_t transfer,
6169                          struct rte_flow_error *error)
6170 {
6171         struct mlx5_priv *priv = dev->data->dev_private;
6172         struct mlx5_ibv_shared *sh = priv->sh;
6173         struct mlx5_flow_tbl_resource *tbl;
6174         union mlx5_flow_tbl_key table_key = {
6175                 {
6176                         .table_id = table_id,
6177                         .reserved = 0,
6178                         .domain = !!transfer,
6179                         .direction = !!egress,
6180                 }
6181         };
6182         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6183                                                          table_key.v64);
6184         struct mlx5_flow_tbl_data_entry *tbl_data;
6185         int ret;
6186         void *domain;
6187
6188         if (pos) {
6189                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6190                                         entry);
6191                 tbl = &tbl_data->tbl;
6192                 rte_atomic32_inc(&tbl->refcnt);
6193                 return tbl;
6194         }
6195         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6196         if (!tbl_data) {
6197                 rte_flow_error_set(error, ENOMEM,
6198                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6199                                    NULL,
6200                                    "cannot allocate flow table data entry");
6201                 return NULL;
6202         }
6203         tbl = &tbl_data->tbl;
6204         pos = &tbl_data->entry;
6205         if (transfer)
6206                 domain = sh->fdb_domain;
6207         else if (egress)
6208                 domain = sh->tx_domain;
6209         else
6210                 domain = sh->rx_domain;
6211         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6212         if (!tbl->obj) {
6213                 rte_flow_error_set(error, ENOMEM,
6214                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6215                                    NULL, "cannot create flow table object");
6216                 rte_free(tbl_data);
6217                 return NULL;
6218         }
6219         /*
6220          * No multi-threads now, but still better to initialize the reference
6221          * count before insert it into the hash list.
6222          */
6223         rte_atomic32_init(&tbl->refcnt);
6224         /* Jump action reference count is initialized here. */
6225         rte_atomic32_init(&tbl_data->jump.refcnt);
6226         pos->key = table_key.v64;
6227         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6228         if (ret < 0) {
6229                 rte_flow_error_set(error, -ret,
6230                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6231                                    "cannot insert flow table data entry");
6232                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6233                 rte_free(tbl_data);
6234         }
6235         rte_atomic32_inc(&tbl->refcnt);
6236         return tbl;
6237 }
6238
6239 /**
6240  * Release a flow table.
6241  *
6242  * @param[in] dev
6243  *   Pointer to rte_eth_dev structure.
6244  * @param[in] tbl
6245  *   Table resource to be released.
6246  *
6247  * @return
6248  *   Returns 0 if table was released, else return 1;
6249  */
6250 static int
6251 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6252                              struct mlx5_flow_tbl_resource *tbl)
6253 {
6254         struct mlx5_priv *priv = dev->data->dev_private;
6255         struct mlx5_ibv_shared *sh = priv->sh;
6256         struct mlx5_flow_tbl_data_entry *tbl_data =
6257                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6258
6259         if (!tbl)
6260                 return 0;
6261         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6262                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6263
6264                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6265                 tbl->obj = NULL;
6266                 /* remove the entry from the hash list and free memory. */
6267                 mlx5_hlist_remove(sh->flow_tbls, pos);
6268                 rte_free(tbl_data);
6269                 return 0;
6270         }
6271         return 1;
6272 }
6273
6274 /**
6275  * Register the flow matcher.
6276  *
6277  * @param[in, out] dev
6278  *   Pointer to rte_eth_dev structure.
6279  * @param[in, out] matcher
6280  *   Pointer to flow matcher.
6281  * @param[in, out] key
6282  *   Pointer to flow table key.
6283  * @parm[in, out] dev_flow
6284  *   Pointer to the dev_flow.
6285  * @param[out] error
6286  *   pointer to error structure.
6287  *
6288  * @return
6289  *   0 on success otherwise -errno and errno is set.
6290  */
6291 static int
6292 flow_dv_matcher_register(struct rte_eth_dev *dev,
6293                          struct mlx5_flow_dv_matcher *matcher,
6294                          union mlx5_flow_tbl_key *key,
6295                          struct mlx5_flow *dev_flow,
6296                          struct rte_flow_error *error)
6297 {
6298         struct mlx5_priv *priv = dev->data->dev_private;
6299         struct mlx5_ibv_shared *sh = priv->sh;
6300         struct mlx5_flow_dv_matcher *cache_matcher;
6301         struct mlx5dv_flow_matcher_attr dv_attr = {
6302                 .type = IBV_FLOW_ATTR_NORMAL,
6303                 .match_mask = (void *)&matcher->mask,
6304         };
6305         struct mlx5_flow_tbl_resource *tbl;
6306         struct mlx5_flow_tbl_data_entry *tbl_data;
6307
6308         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6309                                        key->domain, error);
6310         if (!tbl)
6311                 return -rte_errno;      /* No need to refill the error info */
6312         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6313         /* Lookup from cache. */
6314         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6315                 if (matcher->crc == cache_matcher->crc &&
6316                     matcher->priority == cache_matcher->priority &&
6317                     !memcmp((const void *)matcher->mask.buf,
6318                             (const void *)cache_matcher->mask.buf,
6319                             cache_matcher->mask.size)) {
6320                         DRV_LOG(DEBUG,
6321                                 "%s group %u priority %hd use %s "
6322                                 "matcher %p: refcnt %d++",
6323                                 key->domain ? "FDB" : "NIC", key->table_id,
6324                                 cache_matcher->priority,
6325                                 key->direction ? "tx" : "rx",
6326                                 (void *)cache_matcher,
6327                                 rte_atomic32_read(&cache_matcher->refcnt));
6328                         rte_atomic32_inc(&cache_matcher->refcnt);
6329                         dev_flow->dv.matcher = cache_matcher;
6330                         /* old matcher should not make the table ref++. */
6331                         flow_dv_tbl_resource_release(dev, tbl);
6332                         return 0;
6333                 }
6334         }
6335         /* Register new matcher. */
6336         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6337         if (!cache_matcher) {
6338                 flow_dv_tbl_resource_release(dev, tbl);
6339                 return rte_flow_error_set(error, ENOMEM,
6340                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6341                                           "cannot allocate matcher memory");
6342         }
6343         *cache_matcher = *matcher;
6344         dv_attr.match_criteria_enable =
6345                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6346         dv_attr.priority = matcher->priority;
6347         if (key->direction)
6348                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6349         cache_matcher->matcher_object =
6350                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6351         if (!cache_matcher->matcher_object) {
6352                 rte_free(cache_matcher);
6353 #ifdef HAVE_MLX5DV_DR
6354                 flow_dv_tbl_resource_release(dev, tbl);
6355 #endif
6356                 return rte_flow_error_set(error, ENOMEM,
6357                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6358                                           NULL, "cannot create matcher");
6359         }
6360         /* Save the table information */
6361         cache_matcher->tbl = tbl;
6362         rte_atomic32_init(&cache_matcher->refcnt);
6363         /* only matcher ref++, table ref++ already done above in get API. */
6364         rte_atomic32_inc(&cache_matcher->refcnt);
6365         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6366         dev_flow->dv.matcher = cache_matcher;
6367         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6368                 key->domain ? "FDB" : "NIC", key->table_id,
6369                 cache_matcher->priority,
6370                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6371                 rte_atomic32_read(&cache_matcher->refcnt));
6372         return 0;
6373 }
6374
6375 /**
6376  * Find existing tag resource or create and register a new one.
6377  *
6378  * @param dev[in, out]
6379  *   Pointer to rte_eth_dev structure.
6380  * @param[in, out] tag_be24
6381  *   Tag value in big endian then R-shift 8.
6382  * @parm[in, out] dev_flow
6383  *   Pointer to the dev_flow.
6384  * @param[out] error
6385  *   pointer to error structure.
6386  *
6387  * @return
6388  *   0 on success otherwise -errno and errno is set.
6389  */
6390 static int
6391 flow_dv_tag_resource_register
6392                         (struct rte_eth_dev *dev,
6393                          uint32_t tag_be24,
6394                          struct mlx5_flow *dev_flow,
6395                          struct rte_flow_error *error)
6396 {
6397         struct mlx5_priv *priv = dev->data->dev_private;
6398         struct mlx5_ibv_shared *sh = priv->sh;
6399         struct mlx5_flow_dv_tag_resource *cache_resource;
6400         struct mlx5_hlist_entry *entry;
6401
6402         /* Lookup a matching resource from cache. */
6403         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6404         if (entry) {
6405                 cache_resource = container_of
6406                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6407                 rte_atomic32_inc(&cache_resource->refcnt);
6408                 dev_flow->dv.tag_resource = cache_resource;
6409                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6410                         (void *)cache_resource,
6411                         rte_atomic32_read(&cache_resource->refcnt));
6412                 return 0;
6413         }
6414         /* Register new resource. */
6415         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6416         if (!cache_resource)
6417                 return rte_flow_error_set(error, ENOMEM,
6418                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6419                                           "cannot allocate resource memory");
6420         cache_resource->entry.key = (uint64_t)tag_be24;
6421         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6422         if (!cache_resource->action) {
6423                 rte_free(cache_resource);
6424                 return rte_flow_error_set(error, ENOMEM,
6425                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6426                                           NULL, "cannot create action");
6427         }
6428         rte_atomic32_init(&cache_resource->refcnt);
6429         rte_atomic32_inc(&cache_resource->refcnt);
6430         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6431                 mlx5_glue->destroy_flow_action(cache_resource->action);
6432                 rte_free(cache_resource);
6433                 return rte_flow_error_set(error, EEXIST,
6434                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6435                                           NULL, "cannot insert tag");
6436         }
6437         dev_flow->dv.tag_resource = cache_resource;
6438         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6439                 (void *)cache_resource,
6440                 rte_atomic32_read(&cache_resource->refcnt));
6441         return 0;
6442 }
6443
6444 /**
6445  * Release the tag.
6446  *
6447  * @param dev
6448  *   Pointer to Ethernet device.
6449  * @param flow
6450  *   Pointer to mlx5_flow.
6451  *
6452  * @return
6453  *   1 while a reference on it exists, 0 when freed.
6454  */
6455 static int
6456 flow_dv_tag_release(struct rte_eth_dev *dev,
6457                     struct mlx5_flow_dv_tag_resource *tag)
6458 {
6459         struct mlx5_priv *priv = dev->data->dev_private;
6460         struct mlx5_ibv_shared *sh = priv->sh;
6461
6462         assert(tag);
6463         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6464                 dev->data->port_id, (void *)tag,
6465                 rte_atomic32_read(&tag->refcnt));
6466         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6467                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6468                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6469                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6470                         dev->data->port_id, (void *)tag);
6471                 rte_free(tag);
6472                 return 0;
6473         }
6474         return 1;
6475 }
6476
6477 /**
6478  * Translate port ID action to vport.
6479  *
6480  * @param[in] dev
6481  *   Pointer to rte_eth_dev structure.
6482  * @param[in] action
6483  *   Pointer to the port ID action.
6484  * @param[out] dst_port_id
6485  *   The target port ID.
6486  * @param[out] error
6487  *   Pointer to the error structure.
6488  *
6489  * @return
6490  *   0 on success, a negative errno value otherwise and rte_errno is set.
6491  */
6492 static int
6493 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6494                                  const struct rte_flow_action *action,
6495                                  uint32_t *dst_port_id,
6496                                  struct rte_flow_error *error)
6497 {
6498         uint32_t port;
6499         struct mlx5_priv *priv;
6500         const struct rte_flow_action_port_id *conf =
6501                         (const struct rte_flow_action_port_id *)action->conf;
6502
6503         port = conf->original ? dev->data->port_id : conf->id;
6504         priv = mlx5_port_to_eswitch_info(port, false);
6505         if (!priv)
6506                 return rte_flow_error_set(error, -rte_errno,
6507                                           RTE_FLOW_ERROR_TYPE_ACTION,
6508                                           NULL,
6509                                           "No eswitch info was found for port");
6510 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6511         /*
6512          * This parameter is transferred to
6513          * mlx5dv_dr_action_create_dest_ib_port().
6514          */
6515         *dst_port_id = priv->ibv_port;
6516 #else
6517         /*
6518          * Legacy mode, no LAG configurations is supported.
6519          * This parameter is transferred to
6520          * mlx5dv_dr_action_create_dest_vport().
6521          */
6522         *dst_port_id = priv->vport_id;
6523 #endif
6524         return 0;
6525 }
6526
6527 /**
6528  * Add Tx queue matcher
6529  *
6530  * @param[in] dev
6531  *   Pointer to the dev struct.
6532  * @param[in, out] matcher
6533  *   Flow matcher.
6534  * @param[in, out] key
6535  *   Flow matcher value.
6536  * @param[in] item
6537  *   Flow pattern to translate.
6538  * @param[in] inner
6539  *   Item is inner pattern.
6540  */
6541 static void
6542 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6543                                 void *matcher, void *key,
6544                                 const struct rte_flow_item *item)
6545 {
6546         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6547         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6548         void *misc_m =
6549                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6550         void *misc_v =
6551                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6552         struct mlx5_txq_ctrl *txq;
6553         uint32_t queue;
6554
6555
6556         queue_m = (const void *)item->mask;
6557         if (!queue_m)
6558                 return;
6559         queue_v = (const void *)item->spec;
6560         if (!queue_v)
6561                 return;
6562         txq = mlx5_txq_get(dev, queue_v->queue);
6563         if (!txq)
6564                 return;
6565         queue = txq->obj->sq->id;
6566         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6567         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6568                  queue & queue_m->queue);
6569         mlx5_txq_release(dev, queue_v->queue);
6570 }
6571
6572 /**
6573  * Fill the flow with DV spec, lock free
6574  * (mutex should be acquired by caller).
6575  *
6576  * @param[in] dev
6577  *   Pointer to rte_eth_dev structure.
6578  * @param[in, out] dev_flow
6579  *   Pointer to the sub flow.
6580  * @param[in] attr
6581  *   Pointer to the flow attributes.
6582  * @param[in] items
6583  *   Pointer to the list of items.
6584  * @param[in] actions
6585  *   Pointer to the list of actions.
6586  * @param[out] error
6587  *   Pointer to the error structure.
6588  *
6589  * @return
6590  *   0 on success, a negative errno value otherwise and rte_errno is set.
6591  */
6592 static int
6593 __flow_dv_translate(struct rte_eth_dev *dev,
6594                     struct mlx5_flow *dev_flow,
6595                     const struct rte_flow_attr *attr,
6596                     const struct rte_flow_item items[],
6597                     const struct rte_flow_action actions[],
6598                     struct rte_flow_error *error)
6599 {
6600         struct mlx5_priv *priv = dev->data->dev_private;
6601         struct mlx5_dev_config *dev_conf = &priv->config;
6602         struct rte_flow *flow = dev_flow->flow;
6603         uint64_t item_flags = 0;
6604         uint64_t last_item = 0;
6605         uint64_t action_flags = 0;
6606         uint64_t priority = attr->priority;
6607         struct mlx5_flow_dv_matcher matcher = {
6608                 .mask = {
6609                         .size = sizeof(matcher.mask.buf),
6610                 },
6611         };
6612         int actions_n = 0;
6613         bool actions_end = false;
6614         struct mlx5_flow_dv_modify_hdr_resource mhdr_res = {
6615                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
6616                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
6617         };
6618         union flow_dv_attr flow_attr = { .attr = 0 };
6619         uint32_t tag_be;
6620         union mlx5_flow_tbl_key tbl_key;
6621         uint32_t modify_action_position = UINT32_MAX;
6622         void *match_mask = matcher.mask.buf;
6623         void *match_value = dev_flow->dv.value.buf;
6624         uint8_t next_protocol = 0xff;
6625         struct rte_vlan_hdr vlan = { 0 };
6626         uint32_t table;
6627         int ret = 0;
6628
6629         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
6630                                        &table, error);
6631         if (ret)
6632                 return ret;
6633         dev_flow->group = table;
6634         if (attr->transfer)
6635                 mhdr_res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
6636         if (priority == MLX5_FLOW_PRIO_RSVD)
6637                 priority = dev_conf->flow_prio - 1;
6638         for (; !actions_end ; actions++) {
6639                 const struct rte_flow_action_queue *queue;
6640                 const struct rte_flow_action_rss *rss;
6641                 const struct rte_flow_action *action = actions;
6642                 const struct rte_flow_action_count *count = action->conf;
6643                 const uint8_t *rss_key;
6644                 const struct rte_flow_action_jump *jump_data;
6645                 const struct rte_flow_action_meter *mtr;
6646                 struct mlx5_flow_tbl_resource *tbl;
6647                 uint32_t port_id = 0;
6648                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
6649                 int action_type = actions->type;
6650                 const struct rte_flow_action *found_action = NULL;
6651
6652                 switch (action_type) {
6653                 case RTE_FLOW_ACTION_TYPE_VOID:
6654                         break;
6655                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
6656                         if (flow_dv_translate_action_port_id(dev, action,
6657                                                              &port_id, error))
6658                                 return -rte_errno;
6659                         port_id_resource.port_id = port_id;
6660                         if (flow_dv_port_id_action_resource_register
6661                             (dev, &port_id_resource, dev_flow, error))
6662                                 return -rte_errno;
6663                         dev_flow->dv.actions[actions_n++] =
6664                                 dev_flow->dv.port_id_action->action;
6665                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
6666                         break;
6667                 case RTE_FLOW_ACTION_TYPE_FLAG:
6668                         action_flags |= MLX5_FLOW_ACTION_FLAG;
6669                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6670                                 struct rte_flow_action_mark mark = {
6671                                         .id = MLX5_FLOW_MARK_DEFAULT,
6672                                 };
6673
6674                                 if (flow_dv_convert_action_mark(dev, &mark,
6675                                                                 &mhdr_res,
6676                                                                 error))
6677                                         return -rte_errno;
6678                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6679                                 break;
6680                         }
6681                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
6682                         if (!dev_flow->dv.tag_resource)
6683                                 if (flow_dv_tag_resource_register
6684                                     (dev, tag_be, dev_flow, error))
6685                                         return -rte_errno;
6686                         dev_flow->dv.actions[actions_n++] =
6687                                 dev_flow->dv.tag_resource->action;
6688                         break;
6689                 case RTE_FLOW_ACTION_TYPE_MARK:
6690                         action_flags |= MLX5_FLOW_ACTION_MARK;
6691                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6692                                 const struct rte_flow_action_mark *mark =
6693                                         (const struct rte_flow_action_mark *)
6694                                                 actions->conf;
6695
6696                                 if (flow_dv_convert_action_mark(dev, mark,
6697                                                                 &mhdr_res,
6698                                                                 error))
6699                                         return -rte_errno;
6700                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6701                                 break;
6702                         }
6703                         /* Fall-through */
6704                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
6705                         /* Legacy (non-extensive) MARK action. */
6706                         tag_be = mlx5_flow_mark_set
6707                               (((const struct rte_flow_action_mark *)
6708                                (actions->conf))->id);
6709                         if (!dev_flow->dv.tag_resource)
6710                                 if (flow_dv_tag_resource_register
6711                                     (dev, tag_be, dev_flow, error))
6712                                         return -rte_errno;
6713                         dev_flow->dv.actions[actions_n++] =
6714                                 dev_flow->dv.tag_resource->action;
6715                         break;
6716                 case RTE_FLOW_ACTION_TYPE_SET_META:
6717                         if (flow_dv_convert_action_set_meta
6718                                 (dev, &mhdr_res, attr,
6719                                  (const struct rte_flow_action_set_meta *)
6720                                   actions->conf, error))
6721                                 return -rte_errno;
6722                         action_flags |= MLX5_FLOW_ACTION_SET_META;
6723                         break;
6724                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
6725                         if (flow_dv_convert_action_set_tag
6726                                 (dev, &mhdr_res,
6727                                  (const struct rte_flow_action_set_tag *)
6728                                   actions->conf, error))
6729                                 return -rte_errno;
6730                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6731                         break;
6732                 case RTE_FLOW_ACTION_TYPE_DROP:
6733                         action_flags |= MLX5_FLOW_ACTION_DROP;
6734                         break;
6735                 case RTE_FLOW_ACTION_TYPE_QUEUE:
6736                         assert(flow->rss.queue);
6737                         queue = actions->conf;
6738                         flow->rss.queue_num = 1;
6739                         (*flow->rss.queue)[0] = queue->index;
6740                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
6741                         break;
6742                 case RTE_FLOW_ACTION_TYPE_RSS:
6743                         assert(flow->rss.queue);
6744                         rss = actions->conf;
6745                         if (flow->rss.queue)
6746                                 memcpy((*flow->rss.queue), rss->queue,
6747                                        rss->queue_num * sizeof(uint16_t));
6748                         flow->rss.queue_num = rss->queue_num;
6749                         /* NULL RSS key indicates default RSS key. */
6750                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
6751                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
6752                         /*
6753                          * rss->level and rss.types should be set in advance
6754                          * when expanding items for RSS.
6755                          */
6756                         action_flags |= MLX5_FLOW_ACTION_RSS;
6757                         break;
6758                 case RTE_FLOW_ACTION_TYPE_COUNT:
6759                         if (!dev_conf->devx) {
6760                                 rte_errno = ENOTSUP;
6761                                 goto cnt_err;
6762                         }
6763                         flow->counter = flow_dv_counter_alloc(dev,
6764                                                               count->shared,
6765                                                               count->id,
6766                                                               dev_flow->group);
6767                         if (flow->counter == NULL)
6768                                 goto cnt_err;
6769                         dev_flow->dv.actions[actions_n++] =
6770                                 flow->counter->action;
6771                         action_flags |= MLX5_FLOW_ACTION_COUNT;
6772                         break;
6773 cnt_err:
6774                         if (rte_errno == ENOTSUP)
6775                                 return rte_flow_error_set
6776                                               (error, ENOTSUP,
6777                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6778                                                NULL,
6779                                                "count action not supported");
6780                         else
6781                                 return rte_flow_error_set
6782                                                 (error, rte_errno,
6783                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6784                                                  action,
6785                                                  "cannot create counter"
6786                                                   " object.");
6787                         break;
6788                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
6789                         dev_flow->dv.actions[actions_n++] =
6790                                                 priv->sh->pop_vlan_action;
6791                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
6792                         break;
6793                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
6794                         flow_dev_get_vlan_info_from_items(items, &vlan);
6795                         vlan.eth_proto = rte_be_to_cpu_16
6796                              ((((const struct rte_flow_action_of_push_vlan *)
6797                                                    actions->conf)->ethertype));
6798                         found_action = mlx5_flow_find_action
6799                                         (actions + 1,
6800                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
6801                         if (found_action)
6802                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6803                         found_action = mlx5_flow_find_action
6804                                         (actions + 1,
6805                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
6806                         if (found_action)
6807                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6808                         if (flow_dv_create_action_push_vlan
6809                                             (dev, attr, &vlan, dev_flow, error))
6810                                 return -rte_errno;
6811                         dev_flow->dv.actions[actions_n++] =
6812                                            dev_flow->dv.push_vlan_res->action;
6813                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
6814                         break;
6815                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
6816                         /* of_vlan_push action handled this action */
6817                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
6818                         break;
6819                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
6820                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
6821                                 break;
6822                         flow_dev_get_vlan_info_from_items(items, &vlan);
6823                         mlx5_update_vlan_vid_pcp(actions, &vlan);
6824                         /* If no VLAN push - this is a modify header action */
6825                         if (flow_dv_convert_action_modify_vlan_vid
6826                                                 (&mhdr_res, actions, error))
6827                                 return -rte_errno;
6828                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
6829                         break;
6830                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
6831                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
6832                         if (flow_dv_create_action_l2_encap(dev, actions,
6833                                                            dev_flow,
6834                                                            attr->transfer,
6835                                                            error))
6836                                 return -rte_errno;
6837                         dev_flow->dv.actions[actions_n++] =
6838                                 dev_flow->dv.encap_decap->verbs_action;
6839                         action_flags |= actions->type ==
6840                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
6841                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
6842                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
6843                         break;
6844                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
6845                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
6846                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
6847                                                            attr->transfer,
6848                                                            error))
6849                                 return -rte_errno;
6850                         dev_flow->dv.actions[actions_n++] =
6851                                 dev_flow->dv.encap_decap->verbs_action;
6852                         action_flags |= actions->type ==
6853                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
6854                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
6855                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
6856                         break;
6857                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
6858                         /* Handle encap with preceding decap. */
6859                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
6860                                 if (flow_dv_create_action_raw_encap
6861                                         (dev, actions, dev_flow, attr, error))
6862                                         return -rte_errno;
6863                                 dev_flow->dv.actions[actions_n++] =
6864                                         dev_flow->dv.encap_decap->verbs_action;
6865                         } else {
6866                                 /* Handle encap without preceding decap. */
6867                                 if (flow_dv_create_action_l2_encap
6868                                     (dev, actions, dev_flow, attr->transfer,
6869                                      error))
6870                                         return -rte_errno;
6871                                 dev_flow->dv.actions[actions_n++] =
6872                                         dev_flow->dv.encap_decap->verbs_action;
6873                         }
6874                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
6875                         break;
6876                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
6877                         /* Check if this decap is followed by encap. */
6878                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
6879                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
6880                                action++) {
6881                         }
6882                         /* Handle decap only if it isn't followed by encap. */
6883                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
6884                                 if (flow_dv_create_action_l2_decap
6885                                     (dev, dev_flow, attr->transfer, error))
6886                                         return -rte_errno;
6887                                 dev_flow->dv.actions[actions_n++] =
6888                                         dev_flow->dv.encap_decap->verbs_action;
6889                         }
6890                         /* If decap is followed by encap, handle it at encap. */
6891                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
6892                         break;
6893                 case RTE_FLOW_ACTION_TYPE_JUMP:
6894                         jump_data = action->conf;
6895                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
6896                                                        jump_data->group, &table,
6897                                                        error);
6898                         if (ret)
6899                                 return ret;
6900                         tbl = flow_dv_tbl_resource_get(dev, table,
6901                                                        attr->egress,
6902                                                        attr->transfer, error);
6903                         if (!tbl)
6904                                 return rte_flow_error_set
6905                                                 (error, errno,
6906                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6907                                                  NULL,
6908                                                  "cannot create jump action.");
6909                         if (flow_dv_jump_tbl_resource_register
6910                             (dev, tbl, dev_flow, error)) {
6911                                 flow_dv_tbl_resource_release(dev, tbl);
6912                                 return rte_flow_error_set
6913                                                 (error, errno,
6914                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6915                                                  NULL,
6916                                                  "cannot create jump action.");
6917                         }
6918                         dev_flow->dv.actions[actions_n++] =
6919                                 dev_flow->dv.jump->action;
6920                         action_flags |= MLX5_FLOW_ACTION_JUMP;
6921                         break;
6922                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
6923                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
6924                         if (flow_dv_convert_action_modify_mac
6925                                         (&mhdr_res, actions, error))
6926                                 return -rte_errno;
6927                         action_flags |= actions->type ==
6928                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
6929                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
6930                                         MLX5_FLOW_ACTION_SET_MAC_DST;
6931                         break;
6932                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
6933                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
6934                         if (flow_dv_convert_action_modify_ipv4
6935                                         (&mhdr_res, actions, error))
6936                                 return -rte_errno;
6937                         action_flags |= actions->type ==
6938                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
6939                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
6940                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
6941                         break;
6942                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
6943                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
6944                         if (flow_dv_convert_action_modify_ipv6
6945                                         (&mhdr_res, actions, error))
6946                                 return -rte_errno;
6947                         action_flags |= actions->type ==
6948                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
6949                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
6950                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
6951                         break;
6952                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
6953                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
6954                         if (flow_dv_convert_action_modify_tp
6955                                         (&mhdr_res, actions, items,
6956                                          &flow_attr, error))
6957                                 return -rte_errno;
6958                         action_flags |= actions->type ==
6959                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
6960                                         MLX5_FLOW_ACTION_SET_TP_SRC :
6961                                         MLX5_FLOW_ACTION_SET_TP_DST;
6962                         break;
6963                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
6964                         if (flow_dv_convert_action_modify_dec_ttl
6965                                         (&mhdr_res, items, &flow_attr, error))
6966                                 return -rte_errno;
6967                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
6968                         break;
6969                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
6970                         if (flow_dv_convert_action_modify_ttl
6971                                         (&mhdr_res, actions, items,
6972                                          &flow_attr, error))
6973                                 return -rte_errno;
6974                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
6975                         break;
6976                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
6977                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
6978                         if (flow_dv_convert_action_modify_tcp_seq
6979                                         (&mhdr_res, actions, error))
6980                                 return -rte_errno;
6981                         action_flags |= actions->type ==
6982                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
6983                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
6984                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
6985                         break;
6986
6987                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
6988                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
6989                         if (flow_dv_convert_action_modify_tcp_ack
6990                                         (&mhdr_res, actions, error))
6991                                 return -rte_errno;
6992                         action_flags |= actions->type ==
6993                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
6994                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
6995                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
6996                         break;
6997                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
6998                         if (flow_dv_convert_action_set_reg
6999                                         (&mhdr_res, actions, error))
7000                                 return -rte_errno;
7001                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7002                         break;
7003                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7004                         if (flow_dv_convert_action_copy_mreg
7005                                         (dev, &mhdr_res, actions, error))
7006                                 return -rte_errno;
7007                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7008                         break;
7009                 case RTE_FLOW_ACTION_TYPE_METER:
7010                         mtr = actions->conf;
7011                         if (!flow->meter) {
7012                                 flow->meter = mlx5_flow_meter_attach(priv,
7013                                                         mtr->mtr_id, attr,
7014                                                         error);
7015                                 if (!flow->meter)
7016                                         return rte_flow_error_set(error,
7017                                                 rte_errno,
7018                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7019                                                 NULL,
7020                                                 "meter not found "
7021                                                 "or invalid parameters");
7022                         }
7023                         /* Set the meter action. */
7024                         dev_flow->dv.actions[actions_n++] =
7025                                 flow->meter->mfts->meter_action;
7026                         action_flags |= MLX5_FLOW_ACTION_METER;
7027                         break;
7028                 case RTE_FLOW_ACTION_TYPE_END:
7029                         actions_end = true;
7030                         if (mhdr_res.actions_num) {
7031                                 /* create modify action if needed. */
7032                                 if (flow_dv_modify_hdr_resource_register
7033                                         (dev, &mhdr_res, dev_flow, error))
7034                                         return -rte_errno;
7035                                 dev_flow->dv.actions[modify_action_position] =
7036                                         dev_flow->dv.modify_hdr->verbs_action;
7037                         }
7038                         break;
7039                 default:
7040                         break;
7041                 }
7042                 if (mhdr_res.actions_num &&
7043                     modify_action_position == UINT32_MAX)
7044                         modify_action_position = actions_n++;
7045         }
7046         dev_flow->dv.actions_n = actions_n;
7047         dev_flow->actions = action_flags;
7048         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7049                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7050                 int item_type = items->type;
7051
7052                 switch (item_type) {
7053                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7054                         flow_dv_translate_item_port_id(dev, match_mask,
7055                                                        match_value, items);
7056                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7057                         break;
7058                 case RTE_FLOW_ITEM_TYPE_ETH:
7059                         flow_dv_translate_item_eth(match_mask, match_value,
7060                                                    items, tunnel);
7061                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7062                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7063                                              MLX5_FLOW_LAYER_OUTER_L2;
7064                         break;
7065                 case RTE_FLOW_ITEM_TYPE_VLAN:
7066                         flow_dv_translate_item_vlan(dev_flow,
7067                                                     match_mask, match_value,
7068                                                     items, tunnel);
7069                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7070                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7071                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7072                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7073                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7074                         break;
7075                 case RTE_FLOW_ITEM_TYPE_IPV4:
7076                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7077                                                   &item_flags, &tunnel);
7078                         flow_dv_translate_item_ipv4(match_mask, match_value,
7079                                                     items, tunnel,
7080                                                     dev_flow->group);
7081                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7082                         dev_flow->hash_fields |=
7083                                 mlx5_flow_hashfields_adjust
7084                                         (dev_flow, tunnel,
7085                                          MLX5_IPV4_LAYER_TYPES,
7086                                          MLX5_IPV4_IBV_RX_HASH);
7087                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7088                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7089                         if (items->mask != NULL &&
7090                             ((const struct rte_flow_item_ipv4 *)
7091                              items->mask)->hdr.next_proto_id) {
7092                                 next_protocol =
7093                                         ((const struct rte_flow_item_ipv4 *)
7094                                          (items->spec))->hdr.next_proto_id;
7095                                 next_protocol &=
7096                                         ((const struct rte_flow_item_ipv4 *)
7097                                          (items->mask))->hdr.next_proto_id;
7098                         } else {
7099                                 /* Reset for inner layer. */
7100                                 next_protocol = 0xff;
7101                         }
7102                         break;
7103                 case RTE_FLOW_ITEM_TYPE_IPV6:
7104                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7105                                                   &item_flags, &tunnel);
7106                         flow_dv_translate_item_ipv6(match_mask, match_value,
7107                                                     items, tunnel,
7108                                                     dev_flow->group);
7109                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7110                         dev_flow->hash_fields |=
7111                                 mlx5_flow_hashfields_adjust
7112                                         (dev_flow, tunnel,
7113                                          MLX5_IPV6_LAYER_TYPES,
7114                                          MLX5_IPV6_IBV_RX_HASH);
7115                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7116                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7117                         if (items->mask != NULL &&
7118                             ((const struct rte_flow_item_ipv6 *)
7119                              items->mask)->hdr.proto) {
7120                                 next_protocol =
7121                                         ((const struct rte_flow_item_ipv6 *)
7122                                          items->spec)->hdr.proto;
7123                                 next_protocol &=
7124                                         ((const struct rte_flow_item_ipv6 *)
7125                                          items->mask)->hdr.proto;
7126                         } else {
7127                                 /* Reset for inner layer. */
7128                                 next_protocol = 0xff;
7129                         }
7130                         break;
7131                 case RTE_FLOW_ITEM_TYPE_TCP:
7132                         flow_dv_translate_item_tcp(match_mask, match_value,
7133                                                    items, tunnel);
7134                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7135                         dev_flow->hash_fields |=
7136                                 mlx5_flow_hashfields_adjust
7137                                         (dev_flow, tunnel, ETH_RSS_TCP,
7138                                          IBV_RX_HASH_SRC_PORT_TCP |
7139                                          IBV_RX_HASH_DST_PORT_TCP);
7140                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7141                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7142                         break;
7143                 case RTE_FLOW_ITEM_TYPE_UDP:
7144                         flow_dv_translate_item_udp(match_mask, match_value,
7145                                                    items, tunnel);
7146                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7147                         dev_flow->hash_fields |=
7148                                 mlx5_flow_hashfields_adjust
7149                                         (dev_flow, tunnel, ETH_RSS_UDP,
7150                                          IBV_RX_HASH_SRC_PORT_UDP |
7151                                          IBV_RX_HASH_DST_PORT_UDP);
7152                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7153                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7154                         break;
7155                 case RTE_FLOW_ITEM_TYPE_GRE:
7156                         flow_dv_translate_item_gre(match_mask, match_value,
7157                                                    items, tunnel);
7158                         last_item = MLX5_FLOW_LAYER_GRE;
7159                         break;
7160                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7161                         flow_dv_translate_item_gre_key(match_mask,
7162                                                        match_value, items);
7163                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7164                         break;
7165                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7166                         flow_dv_translate_item_nvgre(match_mask, match_value,
7167                                                      items, tunnel);
7168                         last_item = MLX5_FLOW_LAYER_GRE;
7169                         break;
7170                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7171                         flow_dv_translate_item_vxlan(match_mask, match_value,
7172                                                      items, tunnel);
7173                         last_item = MLX5_FLOW_LAYER_VXLAN;
7174                         break;
7175                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7176                         flow_dv_translate_item_vxlan(match_mask, match_value,
7177                                                      items, tunnel);
7178                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7179                         break;
7180                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7181                         flow_dv_translate_item_geneve(match_mask, match_value,
7182                                                       items, tunnel);
7183                         last_item = MLX5_FLOW_LAYER_GENEVE;
7184                         break;
7185                 case RTE_FLOW_ITEM_TYPE_MPLS:
7186                         flow_dv_translate_item_mpls(match_mask, match_value,
7187                                                     items, last_item, tunnel);
7188                         last_item = MLX5_FLOW_LAYER_MPLS;
7189                         break;
7190                 case RTE_FLOW_ITEM_TYPE_MARK:
7191                         flow_dv_translate_item_mark(dev, match_mask,
7192                                                     match_value, items);
7193                         last_item = MLX5_FLOW_ITEM_MARK;
7194                         break;
7195                 case RTE_FLOW_ITEM_TYPE_META:
7196                         flow_dv_translate_item_meta(dev, match_mask,
7197                                                     match_value, attr, items);
7198                         last_item = MLX5_FLOW_ITEM_METADATA;
7199                         break;
7200                 case RTE_FLOW_ITEM_TYPE_ICMP:
7201                         flow_dv_translate_item_icmp(match_mask, match_value,
7202                                                     items, tunnel);
7203                         last_item = MLX5_FLOW_LAYER_ICMP;
7204                         break;
7205                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7206                         flow_dv_translate_item_icmp6(match_mask, match_value,
7207                                                       items, tunnel);
7208                         last_item = MLX5_FLOW_LAYER_ICMP6;
7209                         break;
7210                 case RTE_FLOW_ITEM_TYPE_TAG:
7211                         flow_dv_translate_item_tag(dev, match_mask,
7212                                                    match_value, items);
7213                         last_item = MLX5_FLOW_ITEM_TAG;
7214                         break;
7215                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7216                         flow_dv_translate_mlx5_item_tag(match_mask,
7217                                                         match_value, items);
7218                         last_item = MLX5_FLOW_ITEM_TAG;
7219                         break;
7220                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7221                         flow_dv_translate_item_tx_queue(dev, match_mask,
7222                                                         match_value,
7223                                                         items);
7224                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7225                         break;
7226                 default:
7227                         break;
7228                 }
7229                 item_flags |= last_item;
7230         }
7231         /*
7232          * In case of ingress traffic when E-Switch mode is enabled,
7233          * we have two cases where we need to set the source port manually.
7234          * The first one, is in case of Nic steering rule, and the second is
7235          * E-Switch rule where no port_id item was found. In both cases
7236          * the source port is set according the current port in use.
7237          */
7238         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7239             (priv->representor || priv->master)) {
7240                 if (flow_dv_translate_item_port_id(dev, match_mask,
7241                                                    match_value, NULL))
7242                         return -rte_errno;
7243         }
7244         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7245                                          dev_flow->dv.value.buf));
7246         dev_flow->layers = item_flags;
7247         /* Register matcher. */
7248         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7249                                     matcher.mask.size);
7250         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7251                                                      matcher.priority);
7252         /* reserved field no needs to be set to 0 here. */
7253         tbl_key.domain = attr->transfer;
7254         tbl_key.direction = attr->egress;
7255         tbl_key.table_id = dev_flow->group;
7256         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7257                 return -rte_errno;
7258         return 0;
7259 }
7260
7261 /**
7262  * Apply the flow to the NIC, lock free,
7263  * (mutex should be acquired by caller).
7264  *
7265  * @param[in] dev
7266  *   Pointer to the Ethernet device structure.
7267  * @param[in, out] flow
7268  *   Pointer to flow structure.
7269  * @param[out] error
7270  *   Pointer to error structure.
7271  *
7272  * @return
7273  *   0 on success, a negative errno value otherwise and rte_errno is set.
7274  */
7275 static int
7276 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7277                 struct rte_flow_error *error)
7278 {
7279         struct mlx5_flow_dv *dv;
7280         struct mlx5_flow *dev_flow;
7281         struct mlx5_priv *priv = dev->data->dev_private;
7282         int n;
7283         int err;
7284
7285         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7286                 dv = &dev_flow->dv;
7287                 n = dv->actions_n;
7288                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7289                         if (dev_flow->transfer) {
7290                                 dv->actions[n++] = priv->sh->esw_drop_action;
7291                         } else {
7292                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7293                                 if (!dv->hrxq) {
7294                                         rte_flow_error_set
7295                                                 (error, errno,
7296                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7297                                                  NULL,
7298                                                  "cannot get drop hash queue");
7299                                         goto error;
7300                                 }
7301                                 dv->actions[n++] = dv->hrxq->action;
7302                         }
7303                 } else if (dev_flow->actions &
7304                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7305                         struct mlx5_hrxq *hrxq;
7306
7307                         assert(flow->rss.queue);
7308                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7309                                              MLX5_RSS_HASH_KEY_LEN,
7310                                              dev_flow->hash_fields,
7311                                              (*flow->rss.queue),
7312                                              flow->rss.queue_num);
7313                         if (!hrxq) {
7314                                 hrxq = mlx5_hrxq_new
7315                                         (dev, flow->rss.key,
7316                                          MLX5_RSS_HASH_KEY_LEN,
7317                                          dev_flow->hash_fields,
7318                                          (*flow->rss.queue),
7319                                          flow->rss.queue_num,
7320                                          !!(dev_flow->layers &
7321                                             MLX5_FLOW_LAYER_TUNNEL));
7322                         }
7323                         if (!hrxq) {
7324                                 rte_flow_error_set
7325                                         (error, rte_errno,
7326                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7327                                          "cannot get hash queue");
7328                                 goto error;
7329                         }
7330                         dv->hrxq = hrxq;
7331                         dv->actions[n++] = dv->hrxq->action;
7332                 }
7333                 dv->flow =
7334                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7335                                                   (void *)&dv->value, n,
7336                                                   dv->actions);
7337                 if (!dv->flow) {
7338                         rte_flow_error_set(error, errno,
7339                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7340                                            NULL,
7341                                            "hardware refuses to create flow");
7342                         goto error;
7343                 }
7344                 if (priv->vmwa_context &&
7345                     dev_flow->dv.vf_vlan.tag &&
7346                     !dev_flow->dv.vf_vlan.created) {
7347                         /*
7348                          * The rule contains the VLAN pattern.
7349                          * For VF we are going to create VLAN
7350                          * interface to make hypervisor set correct
7351                          * e-Switch vport context.
7352                          */
7353                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7354                 }
7355         }
7356         return 0;
7357 error:
7358         err = rte_errno; /* Save rte_errno before cleanup. */
7359         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7360                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7361                 if (dv->hrxq) {
7362                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7363                                 mlx5_hrxq_drop_release(dev);
7364                         else
7365                                 mlx5_hrxq_release(dev, dv->hrxq);
7366                         dv->hrxq = NULL;
7367                 }
7368                 if (dev_flow->dv.vf_vlan.tag &&
7369                     dev_flow->dv.vf_vlan.created)
7370                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7371         }
7372         rte_errno = err; /* Restore rte_errno. */
7373         return -rte_errno;
7374 }
7375
7376 /**
7377  * Release the flow matcher.
7378  *
7379  * @param dev
7380  *   Pointer to Ethernet device.
7381  * @param flow
7382  *   Pointer to mlx5_flow.
7383  *
7384  * @return
7385  *   1 while a reference on it exists, 0 when freed.
7386  */
7387 static int
7388 flow_dv_matcher_release(struct rte_eth_dev *dev,
7389                         struct mlx5_flow *flow)
7390 {
7391         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7392
7393         assert(matcher->matcher_object);
7394         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7395                 dev->data->port_id, (void *)matcher,
7396                 rte_atomic32_read(&matcher->refcnt));
7397         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7398                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7399                            (matcher->matcher_object));
7400                 LIST_REMOVE(matcher, next);
7401                 /* table ref-- in release interface. */
7402                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7403                 rte_free(matcher);
7404                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7405                         dev->data->port_id, (void *)matcher);
7406                 return 0;
7407         }
7408         return 1;
7409 }
7410
7411 /**
7412  * Release an encap/decap resource.
7413  *
7414  * @param flow
7415  *   Pointer to mlx5_flow.
7416  *
7417  * @return
7418  *   1 while a reference on it exists, 0 when freed.
7419  */
7420 static int
7421 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7422 {
7423         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7424                                                 flow->dv.encap_decap;
7425
7426         assert(cache_resource->verbs_action);
7427         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7428                 (void *)cache_resource,
7429                 rte_atomic32_read(&cache_resource->refcnt));
7430         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7431                 claim_zero(mlx5_glue->destroy_flow_action
7432                                 (cache_resource->verbs_action));
7433                 LIST_REMOVE(cache_resource, next);
7434                 rte_free(cache_resource);
7435                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7436                         (void *)cache_resource);
7437                 return 0;
7438         }
7439         return 1;
7440 }
7441
7442 /**
7443  * Release an jump to table action resource.
7444  *
7445  * @param dev
7446  *   Pointer to Ethernet device.
7447  * @param flow
7448  *   Pointer to mlx5_flow.
7449  *
7450  * @return
7451  *   1 while a reference on it exists, 0 when freed.
7452  */
7453 static int
7454 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7455                                   struct mlx5_flow *flow)
7456 {
7457         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7458         struct mlx5_flow_tbl_data_entry *tbl_data =
7459                         container_of(cache_resource,
7460                                      struct mlx5_flow_tbl_data_entry, jump);
7461
7462         assert(cache_resource->action);
7463         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7464                 (void *)cache_resource,
7465                 rte_atomic32_read(&cache_resource->refcnt));
7466         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7467                 claim_zero(mlx5_glue->destroy_flow_action
7468                                 (cache_resource->action));
7469                 /* jump action memory free is inside the table release. */
7470                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7471                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7472                         (void *)cache_resource);
7473                 return 0;
7474         }
7475         return 1;
7476 }
7477
7478 /**
7479  * Release a modify-header resource.
7480  *
7481  * @param flow
7482  *   Pointer to mlx5_flow.
7483  *
7484  * @return
7485  *   1 while a reference on it exists, 0 when freed.
7486  */
7487 static int
7488 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7489 {
7490         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7491                                                 flow->dv.modify_hdr;
7492
7493         assert(cache_resource->verbs_action);
7494         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7495                 (void *)cache_resource,
7496                 rte_atomic32_read(&cache_resource->refcnt));
7497         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7498                 claim_zero(mlx5_glue->destroy_flow_action
7499                                 (cache_resource->verbs_action));
7500                 LIST_REMOVE(cache_resource, next);
7501                 rte_free(cache_resource);
7502                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7503                         (void *)cache_resource);
7504                 return 0;
7505         }
7506         return 1;
7507 }
7508
7509 /**
7510  * Release port ID action resource.
7511  *
7512  * @param flow
7513  *   Pointer to mlx5_flow.
7514  *
7515  * @return
7516  *   1 while a reference on it exists, 0 when freed.
7517  */
7518 static int
7519 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7520 {
7521         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7522                 flow->dv.port_id_action;
7523
7524         assert(cache_resource->action);
7525         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7526                 (void *)cache_resource,
7527                 rte_atomic32_read(&cache_resource->refcnt));
7528         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7529                 claim_zero(mlx5_glue->destroy_flow_action
7530                                 (cache_resource->action));
7531                 LIST_REMOVE(cache_resource, next);
7532                 rte_free(cache_resource);
7533                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7534                         (void *)cache_resource);
7535                 return 0;
7536         }
7537         return 1;
7538 }
7539
7540 /**
7541  * Release push vlan action resource.
7542  *
7543  * @param flow
7544  *   Pointer to mlx5_flow.
7545  *
7546  * @return
7547  *   1 while a reference on it exists, 0 when freed.
7548  */
7549 static int
7550 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7551 {
7552         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7553                 flow->dv.push_vlan_res;
7554
7555         assert(cache_resource->action);
7556         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7557                 (void *)cache_resource,
7558                 rte_atomic32_read(&cache_resource->refcnt));
7559         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7560                 claim_zero(mlx5_glue->destroy_flow_action
7561                                 (cache_resource->action));
7562                 LIST_REMOVE(cache_resource, next);
7563                 rte_free(cache_resource);
7564                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7565                         (void *)cache_resource);
7566                 return 0;
7567         }
7568         return 1;
7569 }
7570
7571 /**
7572  * Remove the flow from the NIC but keeps it in memory.
7573  * Lock free, (mutex should be acquired by caller).
7574  *
7575  * @param[in] dev
7576  *   Pointer to Ethernet device.
7577  * @param[in, out] flow
7578  *   Pointer to flow structure.
7579  */
7580 static void
7581 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7582 {
7583         struct mlx5_flow_dv *dv;
7584         struct mlx5_flow *dev_flow;
7585
7586         if (!flow)
7587                 return;
7588         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7589                 dv = &dev_flow->dv;
7590                 if (dv->flow) {
7591                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7592                         dv->flow = NULL;
7593                 }
7594                 if (dv->hrxq) {
7595                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7596                                 mlx5_hrxq_drop_release(dev);
7597                         else
7598                                 mlx5_hrxq_release(dev, dv->hrxq);
7599                         dv->hrxq = NULL;
7600                 }
7601                 if (dev_flow->dv.vf_vlan.tag &&
7602                     dev_flow->dv.vf_vlan.created)
7603                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7604         }
7605 }
7606
7607 /**
7608  * Remove the flow from the NIC and the memory.
7609  * Lock free, (mutex should be acquired by caller).
7610  *
7611  * @param[in] dev
7612  *   Pointer to the Ethernet device structure.
7613  * @param[in, out] flow
7614  *   Pointer to flow structure.
7615  */
7616 static void
7617 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
7618 {
7619         struct mlx5_flow *dev_flow;
7620
7621         if (!flow)
7622                 return;
7623         __flow_dv_remove(dev, flow);
7624         if (flow->counter) {
7625                 flow_dv_counter_release(dev, flow->counter);
7626                 flow->counter = NULL;
7627         }
7628         if (flow->meter) {
7629                 mlx5_flow_meter_detach(flow->meter);
7630                 flow->meter = NULL;
7631         }
7632         while (!LIST_EMPTY(&flow->dev_flows)) {
7633                 dev_flow = LIST_FIRST(&flow->dev_flows);
7634                 LIST_REMOVE(dev_flow, next);
7635                 if (dev_flow->dv.matcher)
7636                         flow_dv_matcher_release(dev, dev_flow);
7637                 if (dev_flow->dv.encap_decap)
7638                         flow_dv_encap_decap_resource_release(dev_flow);
7639                 if (dev_flow->dv.modify_hdr)
7640                         flow_dv_modify_hdr_resource_release(dev_flow);
7641                 if (dev_flow->dv.jump)
7642                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
7643                 if (dev_flow->dv.port_id_action)
7644                         flow_dv_port_id_action_resource_release(dev_flow);
7645                 if (dev_flow->dv.push_vlan_res)
7646                         flow_dv_push_vlan_action_resource_release(dev_flow);
7647                 if (dev_flow->dv.tag_resource)
7648                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
7649                 rte_free(dev_flow);
7650         }
7651 }
7652
7653 /**
7654  * Query a dv flow  rule for its statistics via devx.
7655  *
7656  * @param[in] dev
7657  *   Pointer to Ethernet device.
7658  * @param[in] flow
7659  *   Pointer to the sub flow.
7660  * @param[out] data
7661  *   data retrieved by the query.
7662  * @param[out] error
7663  *   Perform verbose error reporting if not NULL.
7664  *
7665  * @return
7666  *   0 on success, a negative errno value otherwise and rte_errno is set.
7667  */
7668 static int
7669 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
7670                     void *data, struct rte_flow_error *error)
7671 {
7672         struct mlx5_priv *priv = dev->data->dev_private;
7673         struct rte_flow_query_count *qc = data;
7674
7675         if (!priv->config.devx)
7676                 return rte_flow_error_set(error, ENOTSUP,
7677                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7678                                           NULL,
7679                                           "counters are not supported");
7680         if (flow->counter) {
7681                 uint64_t pkts, bytes;
7682                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
7683                                                &bytes);
7684
7685                 if (err)
7686                         return rte_flow_error_set(error, -err,
7687                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7688                                         NULL, "cannot read counters");
7689                 qc->hits_set = 1;
7690                 qc->bytes_set = 1;
7691                 qc->hits = pkts - flow->counter->hits;
7692                 qc->bytes = bytes - flow->counter->bytes;
7693                 if (qc->reset) {
7694                         flow->counter->hits = pkts;
7695                         flow->counter->bytes = bytes;
7696                 }
7697                 return 0;
7698         }
7699         return rte_flow_error_set(error, EINVAL,
7700                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7701                                   NULL,
7702                                   "counters are not available");
7703 }
7704
7705 /**
7706  * Query a flow.
7707  *
7708  * @see rte_flow_query()
7709  * @see rte_flow_ops
7710  */
7711 static int
7712 flow_dv_query(struct rte_eth_dev *dev,
7713               struct rte_flow *flow __rte_unused,
7714               const struct rte_flow_action *actions __rte_unused,
7715               void *data __rte_unused,
7716               struct rte_flow_error *error __rte_unused)
7717 {
7718         int ret = -EINVAL;
7719
7720         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7721                 switch (actions->type) {
7722                 case RTE_FLOW_ACTION_TYPE_VOID:
7723                         break;
7724                 case RTE_FLOW_ACTION_TYPE_COUNT:
7725                         ret = flow_dv_query_count(dev, flow, data, error);
7726                         break;
7727                 default:
7728                         return rte_flow_error_set(error, ENOTSUP,
7729                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7730                                                   actions,
7731                                                   "action not supported");
7732                 }
7733         }
7734         return ret;
7735 }
7736
7737 /**
7738  * Destroy the meter table set.
7739  * Lock free, (mutex should be acquired by caller).
7740  *
7741  * @param[in] dev
7742  *   Pointer to Ethernet device.
7743  * @param[in] tbl
7744  *   Pointer to the meter table set.
7745  *
7746  * @return
7747  *   Always 0.
7748  */
7749 static int
7750 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
7751                         struct mlx5_meter_domains_infos *tbl)
7752 {
7753         struct mlx5_priv *priv = dev->data->dev_private;
7754         struct mlx5_meter_domains_infos *mtd =
7755                                 (struct mlx5_meter_domains_infos *)tbl;
7756
7757         if (!mtd || !priv->config.dv_flow_en)
7758                 return 0;
7759         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
7760                 claim_zero(mlx5_glue->dv_destroy_flow
7761                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
7762         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
7763                 claim_zero(mlx5_glue->dv_destroy_flow
7764                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
7765         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
7766                 claim_zero(mlx5_glue->dv_destroy_flow
7767                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
7768         if (mtd->egress.color_matcher)
7769                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7770                           (mtd->egress.color_matcher));
7771         if (mtd->egress.any_matcher)
7772                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7773                           (mtd->egress.any_matcher));
7774         if (mtd->egress.tbl)
7775                 claim_zero(flow_dv_tbl_resource_release(dev,
7776                                                         mtd->egress.tbl));
7777         if (mtd->ingress.color_matcher)
7778                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7779                           (mtd->ingress.color_matcher));
7780         if (mtd->ingress.any_matcher)
7781                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7782                           (mtd->ingress.any_matcher));
7783         if (mtd->ingress.tbl)
7784                 claim_zero(flow_dv_tbl_resource_release(dev,
7785                                                         mtd->ingress.tbl));
7786         if (mtd->transfer.color_matcher)
7787                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7788                           (mtd->transfer.color_matcher));
7789         if (mtd->transfer.any_matcher)
7790                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7791                           (mtd->transfer.any_matcher));
7792         if (mtd->transfer.tbl)
7793                 claim_zero(flow_dv_tbl_resource_release(dev,
7794                                                         mtd->transfer.tbl));
7795         if (mtd->drop_actn)
7796                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
7797         rte_free(mtd);
7798         return 0;
7799 }
7800
7801 /* Number of meter flow actions, count and jump or count and drop. */
7802 #define METER_ACTIONS 2
7803
7804 /**
7805  * Create specify domain meter table and suffix table.
7806  *
7807  * @param[in] dev
7808  *   Pointer to Ethernet device.
7809  * @param[in,out] mtb
7810  *   Pointer to DV meter table set.
7811  * @param[in] egress
7812  *   Table attribute.
7813  * @param[in] transfer
7814  *   Table attribute.
7815  * @param[in] color_reg_c_idx
7816  *   Reg C index for color match.
7817  *
7818  * @return
7819  *   0 on success, -1 otherwise and rte_errno is set.
7820  */
7821 static int
7822 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
7823                            struct mlx5_meter_domains_infos *mtb,
7824                            uint8_t egress, uint8_t transfer,
7825                            uint32_t color_reg_c_idx)
7826 {
7827         struct mlx5_priv *priv = dev->data->dev_private;
7828         struct mlx5_ibv_shared *sh = priv->sh;
7829         struct mlx5_flow_dv_match_params mask = {
7830                 .size = sizeof(mask.buf),
7831         };
7832         struct mlx5_flow_dv_match_params value = {
7833                 .size = sizeof(value.buf),
7834         };
7835         struct mlx5dv_flow_matcher_attr dv_attr = {
7836                 .type = IBV_FLOW_ATTR_NORMAL,
7837                 .priority = 0,
7838                 .match_criteria_enable = 0,
7839                 .match_mask = (void *)&mask,
7840         };
7841         void *actions[METER_ACTIONS];
7842         struct mlx5_flow_tbl_resource **sfx_tbl;
7843         struct mlx5_meter_domain_info *dtb;
7844         struct rte_flow_error error;
7845         int i = 0;
7846
7847         if (transfer) {
7848                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
7849                 dtb = &mtb->transfer;
7850         } else if (egress) {
7851                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
7852                 dtb = &mtb->egress;
7853         } else {
7854                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
7855                 dtb = &mtb->ingress;
7856         }
7857         /* If the suffix table in missing, create it. */
7858         if (!(*sfx_tbl)) {
7859                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
7860                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
7861                                                 egress, transfer, &error);
7862                 if (!(*sfx_tbl)) {
7863                         DRV_LOG(ERR, "Failed to create meter suffix table.");
7864                         return -1;
7865                 }
7866         }
7867         /* Create the meter table with METER level. */
7868         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
7869                                             egress, transfer, &error);
7870         if (!dtb->tbl) {
7871                 DRV_LOG(ERR, "Failed to create meter policer table.");
7872                 return -1;
7873         }
7874         /* Create matchers, Any and Color. */
7875         dv_attr.priority = 3;
7876         dv_attr.match_criteria_enable = 0;
7877         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7878                                                              &dv_attr,
7879                                                              dtb->tbl->obj);
7880         if (!dtb->any_matcher) {
7881                 DRV_LOG(ERR, "Failed to create meter"
7882                              " policer default matcher.");
7883                 goto error_exit;
7884         }
7885         dv_attr.priority = 0;
7886         dv_attr.match_criteria_enable =
7887                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
7888         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
7889                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
7890         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7891                                                                &dv_attr,
7892                                                                dtb->tbl->obj);
7893         if (!dtb->color_matcher) {
7894                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
7895                 goto error_exit;
7896         }
7897         if (mtb->count_actns[RTE_MTR_DROPPED])
7898                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
7899         actions[i++] = mtb->drop_actn;
7900         /* Default rule: lowest priority, match any, actions: drop. */
7901         dtb->policer_rules[RTE_MTR_DROPPED] =
7902                         mlx5_glue->dv_create_flow(dtb->any_matcher,
7903                                                  (void *)&value, i, actions);
7904         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
7905                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
7906                 goto error_exit;
7907         }
7908         return 0;
7909 error_exit:
7910         return -1;
7911 }
7912
7913 /**
7914  * Create the needed meter and suffix tables.
7915  * Lock free, (mutex should be acquired by caller).
7916  *
7917  * @param[in] dev
7918  *   Pointer to Ethernet device.
7919  * @param[in] fm
7920  *   Pointer to the flow meter.
7921  *
7922  * @return
7923  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
7924  */
7925 static struct mlx5_meter_domains_infos *
7926 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
7927                        const struct mlx5_flow_meter *fm)
7928 {
7929         struct mlx5_priv *priv = dev->data->dev_private;
7930         struct mlx5_meter_domains_infos *mtb;
7931         int ret;
7932         int i;
7933
7934         if (!priv->mtr_en) {
7935                 rte_errno = ENOTSUP;
7936                 return NULL;
7937         }
7938         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
7939         if (!mtb) {
7940                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
7941                 return NULL;
7942         }
7943         /* Create meter count actions */
7944         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
7945                 if (!fm->policer_stats.cnt[i])
7946                         continue;
7947                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
7948         }
7949         /* Create drop action. */
7950         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
7951         if (!mtb->drop_actn) {
7952                 DRV_LOG(ERR, "Failed to create drop action.");
7953                 goto error_exit;
7954         }
7955         /* Egress meter table. */
7956         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
7957         if (ret) {
7958                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
7959                 goto error_exit;
7960         }
7961         /* Ingress meter table. */
7962         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
7963         if (ret) {
7964                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
7965                 goto error_exit;
7966         }
7967         /* FDB meter table. */
7968         if (priv->config.dv_esw_en) {
7969                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
7970                                                  priv->mtr_color_reg);
7971                 if (ret) {
7972                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
7973                         goto error_exit;
7974                 }
7975         }
7976         return mtb;
7977 error_exit:
7978         flow_dv_destroy_mtr_tbl(dev, mtb);
7979         return NULL;
7980 }
7981
7982 /**
7983  * Destroy domain policer rule.
7984  *
7985  * @param[in] dt
7986  *   Pointer to domain table.
7987  */
7988 static void
7989 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
7990 {
7991         int i;
7992
7993         for (i = 0; i < RTE_MTR_DROPPED; i++) {
7994                 if (dt->policer_rules[i]) {
7995                         claim_zero(mlx5_glue->dv_destroy_flow
7996                                   (dt->policer_rules[i]));
7997                         dt->policer_rules[i] = NULL;
7998                 }
7999         }
8000         if (dt->jump_actn) {
8001                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8002                 dt->jump_actn = NULL;
8003         }
8004 }
8005
8006 /**
8007  * Destroy policer rules.
8008  *
8009  * @param[in] dev
8010  *   Pointer to Ethernet device.
8011  * @param[in] fm
8012  *   Pointer to flow meter structure.
8013  * @param[in] attr
8014  *   Pointer to flow attributes.
8015  *
8016  * @return
8017  *   Always 0.
8018  */
8019 static int
8020 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8021                               const struct mlx5_flow_meter *fm,
8022                               const struct rte_flow_attr *attr)
8023 {
8024         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8025
8026         if (!mtb)
8027                 return 0;
8028         if (attr->egress)
8029                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8030         if (attr->ingress)
8031                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8032         if (attr->transfer)
8033                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8034         return 0;
8035 }
8036
8037 /**
8038  * Create specify domain meter policer rule.
8039  *
8040  * @param[in] fm
8041  *   Pointer to flow meter structure.
8042  * @param[in] mtb
8043  *   Pointer to DV meter table set.
8044  * @param[in] sfx_tb
8045  *   Pointer to suffix table.
8046  * @param[in] mtr_reg_c
8047  *   Color match REG_C.
8048  *
8049  * @return
8050  *   0 on success, -1 otherwise.
8051  */
8052 static int
8053 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8054                                     struct mlx5_meter_domain_info *dtb,
8055                                     struct mlx5_flow_tbl_resource *sfx_tb,
8056                                     uint8_t mtr_reg_c)
8057 {
8058         struct mlx5_flow_dv_match_params matcher = {
8059                 .size = sizeof(matcher.buf),
8060         };
8061         struct mlx5_flow_dv_match_params value = {
8062                 .size = sizeof(value.buf),
8063         };
8064         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8065         void *actions[METER_ACTIONS];
8066         int i;
8067
8068         /* Create jump action. */
8069         if (!sfx_tb)
8070                 return -1;
8071         if (!dtb->jump_actn)
8072                 dtb->jump_actn =
8073                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8074                                                         (sfx_tb->obj);
8075         if (!dtb->jump_actn) {
8076                 DRV_LOG(ERR, "Failed to create policer jump action.");
8077                 goto error;
8078         }
8079         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8080                 int j = 0;
8081
8082                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8083                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8084                 if (mtb->count_actns[i])
8085                         actions[j++] = mtb->count_actns[i];
8086                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8087                         actions[j++] = mtb->drop_actn;
8088                 else
8089                         actions[j++] = dtb->jump_actn;
8090                 dtb->policer_rules[i] =
8091                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8092                                                  (void *)&value,
8093                                                   j, actions);
8094                 if (!dtb->policer_rules[i]) {
8095                         DRV_LOG(ERR, "Failed to create policer rule.");
8096                         goto error;
8097                 }
8098         }
8099         return 0;
8100 error:
8101         rte_errno = errno;
8102         return -1;
8103 }
8104
8105 /**
8106  * Create policer rules.
8107  *
8108  * @param[in] dev
8109  *   Pointer to Ethernet device.
8110  * @param[in] fm
8111  *   Pointer to flow meter structure.
8112  * @param[in] attr
8113  *   Pointer to flow attributes.
8114  *
8115  * @return
8116  *   0 on success, -1 otherwise.
8117  */
8118 static int
8119 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8120                              struct mlx5_flow_meter *fm,
8121                              const struct rte_flow_attr *attr)
8122 {
8123         struct mlx5_priv *priv = dev->data->dev_private;
8124         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8125         int ret;
8126
8127         if (attr->egress) {
8128                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8129                                                 priv->sh->tx_mtr_sfx_tbl,
8130                                                 priv->mtr_color_reg);
8131                 if (ret) {
8132                         DRV_LOG(ERR, "Failed to create egress policer.");
8133                         goto error;
8134                 }
8135         }
8136         if (attr->ingress) {
8137                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8138                                                 priv->sh->rx_mtr_sfx_tbl,
8139                                                 priv->mtr_color_reg);
8140                 if (ret) {
8141                         DRV_LOG(ERR, "Failed to create ingress policer.");
8142                         goto error;
8143                 }
8144         }
8145         if (attr->transfer) {
8146                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8147                                                 priv->sh->fdb_mtr_sfx_tbl,
8148                                                 priv->mtr_color_reg);
8149                 if (ret) {
8150                         DRV_LOG(ERR, "Failed to create transfer policer.");
8151                         goto error;
8152                 }
8153         }
8154         return 0;
8155 error:
8156         flow_dv_destroy_policer_rules(dev, fm, attr);
8157         return -1;
8158 }
8159
8160 /**
8161  * Query a devx counter.
8162  *
8163  * @param[in] dev
8164  *   Pointer to the Ethernet device structure.
8165  * @param[in] cnt
8166  *   Pointer to the flow counter.
8167  * @param[in] clear
8168  *   Set to clear the counter statistics.
8169  * @param[out] pkts
8170  *   The statistics value of packets.
8171  * @param[out] bytes
8172  *   The statistics value of bytes.
8173  *
8174  * @return
8175  *   0 on success, otherwise return -1.
8176  */
8177 static int
8178 flow_dv_counter_query(struct rte_eth_dev *dev,
8179                       struct mlx5_flow_counter *cnt, bool clear,
8180                       uint64_t *pkts, uint64_t *bytes)
8181 {
8182         struct mlx5_priv *priv = dev->data->dev_private;
8183         uint64_t inn_pkts, inn_bytes;
8184         int ret;
8185
8186         if (!priv->config.devx)
8187                 return -1;
8188         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8189         if (ret)
8190                 return -1;
8191         *pkts = inn_pkts - cnt->hits;
8192         *bytes = inn_bytes - cnt->bytes;
8193         if (clear) {
8194                 cnt->hits = inn_pkts;
8195                 cnt->bytes = inn_bytes;
8196         }
8197         return 0;
8198 }
8199
8200 /*
8201  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8202  */
8203 static int
8204 flow_dv_translate(struct rte_eth_dev *dev,
8205                   struct mlx5_flow *dev_flow,
8206                   const struct rte_flow_attr *attr,
8207                   const struct rte_flow_item items[],
8208                   const struct rte_flow_action actions[],
8209                   struct rte_flow_error *error)
8210 {
8211         int ret;
8212
8213         flow_dv_shared_lock(dev);
8214         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8215         flow_dv_shared_unlock(dev);
8216         return ret;
8217 }
8218
8219 /*
8220  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8221  */
8222 static int
8223 flow_dv_apply(struct rte_eth_dev *dev,
8224               struct rte_flow *flow,
8225               struct rte_flow_error *error)
8226 {
8227         int ret;
8228
8229         flow_dv_shared_lock(dev);
8230         ret = __flow_dv_apply(dev, flow, error);
8231         flow_dv_shared_unlock(dev);
8232         return ret;
8233 }
8234
8235 /*
8236  * Mutex-protected thunk to lock-free __flow_dv_remove().
8237  */
8238 static void
8239 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8240 {
8241         flow_dv_shared_lock(dev);
8242         __flow_dv_remove(dev, flow);
8243         flow_dv_shared_unlock(dev);
8244 }
8245
8246 /*
8247  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8248  */
8249 static void
8250 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8251 {
8252         flow_dv_shared_lock(dev);
8253         __flow_dv_destroy(dev, flow);
8254         flow_dv_shared_unlock(dev);
8255 }
8256
8257 /*
8258  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8259  */
8260 static struct mlx5_flow_counter *
8261 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8262 {
8263         struct mlx5_flow_counter *cnt;
8264
8265         flow_dv_shared_lock(dev);
8266         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8267         flow_dv_shared_unlock(dev);
8268         return cnt;
8269 }
8270
8271 /*
8272  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8273  */
8274 static void
8275 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8276 {
8277         flow_dv_shared_lock(dev);
8278         flow_dv_counter_release(dev, cnt);
8279         flow_dv_shared_unlock(dev);
8280 }
8281
8282 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8283         .validate = flow_dv_validate,
8284         .prepare = flow_dv_prepare,
8285         .translate = flow_dv_translate,
8286         .apply = flow_dv_apply,
8287         .remove = flow_dv_remove,
8288         .destroy = flow_dv_destroy,
8289         .query = flow_dv_query,
8290         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8291         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8292         .create_policer_rules = flow_dv_create_policer_rules,
8293         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8294         .counter_alloc = flow_dv_counter_allocate,
8295         .counter_free = flow_dv_counter_free,
8296         .counter_query = flow_dv_counter_query,
8297 };
8298
8299 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */