drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_ip.h>
  19 #include <rte_gre.h>
  20 #include <rte_vxlan.h>
  21 #include <rte_gtp.h>
  22 #include <rte_eal_paging.h>
  23 #include <rte_mpls.h>
  24 #include <rte_mtr.h>
  25 #include <rte_mtr_driver.h>
  26 #include <rte_tailq.h>
  27
  28 #include <mlx5_glue.h>
  29 #include <mlx5_devx_cmds.h>
  30 #include <mlx5_prm.h>
  31 #include <mlx5_malloc.h>
  32
  33 #include "mlx5_defs.h"
  34 #include "mlx5.h"
  35 #include "mlx5_common_os.h"
  36 #include "mlx5_flow.h"
  37 #include "mlx5_flow_os.h"
  38 #include "mlx5_rx.h"
  39 #include "mlx5_tx.h"
  40 #include "rte_pmd_mlx5.h"
  41
  42 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  43
  44 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  45 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  46 #endif
  47
  48 #ifndef HAVE_MLX5DV_DR_ESWITCH
  49 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  50 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  51 #endif
  52 #endif
  53
  54 #ifndef HAVE_MLX5DV_DR
  55 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  56 #endif
  57
  58 /* VLAN header definitions */
  59 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  60 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  61 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  62 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  63 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  64
  65 union flow_dv_attr {
  66         struct {
  67                 uint32_t valid:1;
  68                 uint32_t ipv4:1;
  69                 uint32_t ipv6:1;
  70                 uint32_t tcp:1;
  71                 uint32_t udp:1;
  72                 uint32_t reserved:27;
  73         };
  74         uint32_t attr;
  75 };
  76
  77 static int
  78 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  79                              struct mlx5_flow_tbl_resource *tbl);
  80
  81 static int
  82 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  83                                      uint32_t encap_decap_idx);
  84
  85 static int
  86 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  87                                         uint32_t port_id);
  88 static void
  89 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  90
  91 static int
  92 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  93                                   uint32_t rix_jump);
  94
  95 /**
  96  * Initialize flow attributes structure according to flow items' types.
  97  *
  98  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  99  * mode. For tunnel mode, the items to be modified are the outermost ones.
 100  *
 101  * @param[in] item
 102  *   Pointer to item specification.
 103  * @param[out] attr
 104  *   Pointer to flow attributes structure.
 105  * @param[in] dev_flow
 106  *   Pointer to the sub flow.
 107  * @param[in] tunnel_decap
 108  *   Whether action is after tunnel decapsulation.
 109  */
 110 static void
 111 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 112                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 113 {
 114         uint64_t layers = dev_flow->handle->layers;
 115
 116         /*
 117          * If layers is already initialized, it means this dev_flow is the
 118          * suffix flow, the layers flags is set by the prefix flow. Need to
 119          * use the layer flags from prefix flow as the suffix flow may not
 120          * have the user defined items as the flow is split.
 121          */
 122         if (layers) {
 123                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 124                         attr->ipv4 = 1;
 125                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 126                         attr->ipv6 = 1;
 127                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 128                         attr->tcp = 1;
 129                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 130                         attr->udp = 1;
 131                 attr->valid = 1;
 132                 return;
 133         }
 134         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 135                 uint8_t next_protocol = 0xff;
 136                 switch (item->type) {
 137                 case RTE_FLOW_ITEM_TYPE_GRE:
 138                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 139                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 140                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 141                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 142                 case RTE_FLOW_ITEM_TYPE_MPLS:
 143                         if (tunnel_decap)
 144                                 attr->attr = 0;
 145                         break;
 146                 case RTE_FLOW_ITEM_TYPE_IPV4:
 147                         if (!attr->ipv6)
 148                                 attr->ipv4 = 1;
 149                         if (item->mask != NULL &&
 150                             ((const struct rte_flow_item_ipv4 *)
 151                             item->mask)->hdr.next_proto_id)
 152                                 next_protocol =
 153                                     ((const struct rte_flow_item_ipv4 *)
 154                                       (item->spec))->hdr.next_proto_id &
 155                                     ((const struct rte_flow_item_ipv4 *)
 156                                       (item->mask))->hdr.next_proto_id;
 157                         if ((next_protocol == IPPROTO_IPIP ||
 158                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 159                                 attr->attr = 0;
 160                         break;
 161                 case RTE_FLOW_ITEM_TYPE_IPV6:
 162                         if (!attr->ipv4)
 163                                 attr->ipv6 = 1;
 164                         if (item->mask != NULL &&
 165                             ((const struct rte_flow_item_ipv6 *)
 166                             item->mask)->hdr.proto)
 167                                 next_protocol =
 168                                     ((const struct rte_flow_item_ipv6 *)
 169                                       (item->spec))->hdr.proto &
 170                                     ((const struct rte_flow_item_ipv6 *)
 171                                       (item->mask))->hdr.proto;
 172                         if ((next_protocol == IPPROTO_IPIP ||
 173                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 174                                 attr->attr = 0;
 175                         break;
 176                 case RTE_FLOW_ITEM_TYPE_UDP:
 177                         if (!attr->tcp)
 178                                 attr->udp = 1;
 179                         break;
 180                 case RTE_FLOW_ITEM_TYPE_TCP:
 181                         if (!attr->udp)
 182                                 attr->tcp = 1;
 183                         break;
 184                 default:
 185                         break;
 186                 }
 187         }
 188         attr->valid = 1;
 189 }
 190
 191 /*
 192  * Convert rte_mtr_color to mlx5 color.
 193  *
 194  * @param[in] rcol
 195  *   rte_mtr_color.
 196  *
 197  * @return
 198  *   mlx5 color.
 199  */
 200 static inline int
 201 rte_col_2_mlx5_col(enum rte_color rcol)
 202 {
 203         switch (rcol) {
 204         case RTE_COLOR_GREEN:
 205                 return MLX5_FLOW_COLOR_GREEN;
 206         case RTE_COLOR_YELLOW:
 207                 return MLX5_FLOW_COLOR_YELLOW;
 208         case RTE_COLOR_RED:
 209                 return MLX5_FLOW_COLOR_RED;
 210         default:
 211                 break;
 212         }
 213         return MLX5_FLOW_COLOR_UNDEFINED;
 214 }
 215
 216 struct field_modify_info {
 217         uint32_t size; /* Size of field in protocol header, in bytes. */
 218         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 219         enum mlx5_modification_field id;
 220 };
 221
 222 struct field_modify_info modify_eth[] = {
 223         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 224         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 225         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 226         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 227         {0, 0, 0},
 228 };
 229
 230 struct field_modify_info modify_vlan_out_first_vid[] = {
 231         /* Size in bits !!! */
 232         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 233         {0, 0, 0},
 234 };
 235
 236 struct field_modify_info modify_ipv4[] = {
 237         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 238         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 239         {4, 12, MLX5_MODI_OUT_SIPV4},
 240         {4, 16, MLX5_MODI_OUT_DIPV4},
 241         {0, 0, 0},
 242 };
 243
 244 struct field_modify_info modify_ipv6[] = {
 245         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 246         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 247         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 248         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 249         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 250         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 251         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 252         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 253         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 254         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 255         {0, 0, 0},
 256 };
 257
 258 struct field_modify_info modify_udp[] = {
 259         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 260         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 261         {0, 0, 0},
 262 };
 263
 264 struct field_modify_info modify_tcp[] = {
 265         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 266         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 267         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 268         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 269         {0, 0, 0},
 270 };
 271
 272 static const struct rte_flow_item *
 273 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
 274 {
 275         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 276                 switch (item->type) {
 277                 default:
 278                         break;
 279                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 280                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 281                 case RTE_FLOW_ITEM_TYPE_GRE:
 282                 case RTE_FLOW_ITEM_TYPE_MPLS:
 283                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 284                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 285                         return item;
 286                 case RTE_FLOW_ITEM_TYPE_IPV4:
 287                 case RTE_FLOW_ITEM_TYPE_IPV6:
 288                         if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 289                             item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
 290                                 return item;
 291                         break;
 292                 }
 293         }
 294         return NULL;
 295 }
 296
 297 static void
 298 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 299                           uint8_t next_protocol, uint64_t *item_flags,
 300                           int *tunnel)
 301 {
 302         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 303                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 304         if (next_protocol == IPPROTO_IPIP) {
 305                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 306                 *tunnel = 1;
 307         }
 308         if (next_protocol == IPPROTO_IPV6) {
 309                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 310                 *tunnel = 1;
 311         }
 312 }
 313
 314 static inline struct mlx5_hlist *
 315 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
 316                      const char *name, uint32_t size, bool direct_key,
 317                      bool lcores_share, void *ctx,
 318                      mlx5_list_create_cb cb_create,
 319                      mlx5_list_match_cb cb_match,
 320                      mlx5_list_remove_cb cb_remove,
 321                      mlx5_list_clone_cb cb_clone,
 322                      mlx5_list_clone_free_cb cb_clone_free)
 323 {
 324         struct mlx5_hlist *hl;
 325         struct mlx5_hlist *expected = NULL;
 326         char s[MLX5_NAME_SIZE];
 327
 328         hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 329         if (likely(hl))
 330                 return hl;
 331         snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
 332         hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
 333                         ctx, cb_create, cb_match, cb_remove, cb_clone,
 334                         cb_clone_free);
 335         if (!hl) {
 336                 DRV_LOG(ERR, "%s hash creation failed", name);
 337                 rte_errno = ENOMEM;
 338                 return NULL;
 339         }
 340         if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
 341                                          __ATOMIC_SEQ_CST,
 342                                          __ATOMIC_SEQ_CST)) {
 343                 mlx5_hlist_destroy(hl);
 344                 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 345         }
 346         return hl;
 347 }
 348
 349 /* Update VLAN's VID/PCP based on input rte_flow_action.
 350  *
 351  * @param[in] action
 352  *   Pointer to struct rte_flow_action.
 353  * @param[out] vlan
 354  *   Pointer to struct rte_vlan_hdr.
 355  */
 356 static void
 357 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 358                          struct rte_vlan_hdr *vlan)
 359 {
 360         uint16_t vlan_tci;
 361         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 362                 vlan_tci =
 363                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 364                                                action->conf)->vlan_pcp;
 365                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 366                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 367                 vlan->vlan_tci |= vlan_tci;
 368         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 369                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 370                 vlan->vlan_tci |= rte_be_to_cpu_16
 371                     (((const struct rte_flow_action_of_set_vlan_vid *)
 372                                              action->conf)->vlan_vid);
 373         }
 374 }
 375
 376 /**
 377  * Fetch 1, 2, 3 or 4 byte field from the byte array
 378  * and return as unsigned integer in host-endian format.
 379  *
 380  * @param[in] data
 381  *   Pointer to data array.
 382  * @param[in] size
 383  *   Size of field to extract.
 384  *
 385  * @return
 386  *   converted field in host endian format.
 387  */
 388 static inline uint32_t
 389 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 390 {
 391         uint32_t ret;
 392
 393         switch (size) {
 394         case 1:
 395                 ret = *data;
 396                 break;
 397         case 2:
 398                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 399                 break;
 400         case 3:
 401                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 402                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 403                 break;
 404         case 4:
 405                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 406                 break;
 407         default:
 408                 MLX5_ASSERT(false);
 409                 ret = 0;
 410                 break;
 411         }
 412         return ret;
 413 }
 414
 415 /**
 416  * Convert modify-header action to DV specification.
 417  *
 418  * Data length of each action is determined by provided field description
 419  * and the item mask. Data bit offset and width of each action is determined
 420  * by provided item mask.
 421  *
 422  * @param[in] item
 423  *   Pointer to item specification.
 424  * @param[in] field
 425  *   Pointer to field modification information.
 426  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 427  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 428  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 429  * @param[in] dcopy
 430  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 431  *   Negative offset value sets the same offset as source offset.
 432  *   size field is ignored, value is taken from source field.
 433  * @param[in,out] resource
 434  *   Pointer to the modify-header resource.
 435  * @param[in] type
 436  *   Type of modification.
 437  * @param[out] error
 438  *   Pointer to the error structure.
 439  *
 440  * @return
 441  *   0 on success, a negative errno value otherwise and rte_errno is set.
 442  */
 443 static int
 444 flow_dv_convert_modify_action(struct rte_flow_item *item,
 445                               struct field_modify_info *field,
 446                               struct field_modify_info *dcopy,
 447                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 448                               uint32_t type, struct rte_flow_error *error)
 449 {
 450         uint32_t i = resource->actions_num;
 451         struct mlx5_modification_cmd *actions = resource->actions;
 452         uint32_t carry_b = 0;
 453
 454         /*
 455          * The item and mask are provided in big-endian format.
 456          * The fields should be presented as in big-endian format either.
 457          * Mask must be always present, it defines the actual field width.
 458          */
 459         MLX5_ASSERT(item->mask);
 460         MLX5_ASSERT(field->size);
 461         do {
 462                 uint32_t size_b;
 463                 uint32_t off_b;
 464                 uint32_t mask;
 465                 uint32_t data;
 466                 bool next_field = true;
 467                 bool next_dcopy = true;
 468
 469                 if (i >= MLX5_MAX_MODIFY_NUM)
 470                         return rte_flow_error_set(error, EINVAL,
 471                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 472                                  "too many items to modify");
 473                 /* Fetch variable byte size mask from the array. */
 474                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 475                                            field->offset, field->size);
 476                 if (!mask) {
 477                         ++field;
 478                         continue;
 479                 }
 480                 /* Deduce actual data width in bits from mask value. */
 481                 off_b = rte_bsf32(mask) + carry_b;
 482                 size_b = sizeof(uint32_t) * CHAR_BIT -
 483                          off_b - __builtin_clz(mask);
 484                 MLX5_ASSERT(size_b);
 485                 actions[i] = (struct mlx5_modification_cmd) {
 486                         .action_type = type,
 487                         .field = field->id,
 488                         .offset = off_b,
 489                         .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
 490                                 0 : size_b,
 491                 };
 492                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 493                         MLX5_ASSERT(dcopy);
 494                         actions[i].dst_field = dcopy->id;
 495                         actions[i].dst_offset =
 496                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 497                         /* Convert entire record to big-endian format. */
 498                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 499                         /*
 500                          * Destination field overflow. Copy leftovers of
 501                          * a source field to the next destination field.
 502                          */
 503                         carry_b = 0;
 504                         if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
 505                             dcopy->size != 0) {
 506                                 actions[i].length =
 507                                         dcopy->size * CHAR_BIT - dcopy->offset;
 508                                 carry_b = actions[i].length;
 509                                 next_field = false;
 510                         }
 511                         /*
 512                          * Not enough bits in a source filed to fill a
 513                          * destination field. Switch to the next source.
 514                          */
 515                         if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
 516                             (size_b == field->size * CHAR_BIT - off_b)) {
 517                                 actions[i].length =
 518                                         field->size * CHAR_BIT - off_b;
 519                                 dcopy->offset += actions[i].length;
 520                                 next_dcopy = false;
 521                         }
 522                         if (next_dcopy)
 523                                 ++dcopy;
 524                 } else {
 525                         MLX5_ASSERT(item->spec);
 526                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 527                                                    field->offset, field->size);
 528                         /* Shift out the trailing masked bits from data. */
 529                         data = (data & mask) >> off_b;
 530                         actions[i].data1 = rte_cpu_to_be_32(data);
 531                 }
 532                 /* Convert entire record to expected big-endian format. */
 533                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 534                 if (next_field)
 535                         ++field;
 536                 ++i;
 537         } while (field->size);
 538         if (resource->actions_num == i)
 539                 return rte_flow_error_set(error, EINVAL,
 540                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 541                                           "invalid modification flow item");
 542         resource->actions_num = i;
 543         return 0;
 544 }
 545
 546 /**
 547  * Convert modify-header set IPv4 address action to DV specification.
 548  *
 549  * @param[in,out] resource
 550  *   Pointer to the modify-header resource.
 551  * @param[in] action
 552  *   Pointer to action specification.
 553  * @param[out] error
 554  *   Pointer to the error structure.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 flow_dv_convert_action_modify_ipv4
 561                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 562                          const struct rte_flow_action *action,
 563                          struct rte_flow_error *error)
 564 {
 565         const struct rte_flow_action_set_ipv4 *conf =
 566                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 567         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 568         struct rte_flow_item_ipv4 ipv4;
 569         struct rte_flow_item_ipv4 ipv4_mask;
 570
 571         memset(&ipv4, 0, sizeof(ipv4));
 572         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 573         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 574                 ipv4.hdr.src_addr = conf->ipv4_addr;
 575                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 576         } else {
 577                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 578                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 579         }
 580         item.spec = &ipv4;
 581         item.mask = &ipv4_mask;
 582         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 583                                              MLX5_MODIFICATION_TYPE_SET, error);
 584 }
 585
 586 /**
 587  * Convert modify-header set IPv6 address action to DV specification.
 588  *
 589  * @param[in,out] resource
 590  *   Pointer to the modify-header resource.
 591  * @param[in] action
 592  *   Pointer to action specification.
 593  * @param[out] error
 594  *   Pointer to the error structure.
 595  *
 596  * @return
 597  *   0 on success, a negative errno value otherwise and rte_errno is set.
 598  */
 599 static int
 600 flow_dv_convert_action_modify_ipv6
 601                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 602                          const struct rte_flow_action *action,
 603                          struct rte_flow_error *error)
 604 {
 605         const struct rte_flow_action_set_ipv6 *conf =
 606                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 607         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 608         struct rte_flow_item_ipv6 ipv6;
 609         struct rte_flow_item_ipv6 ipv6_mask;
 610
 611         memset(&ipv6, 0, sizeof(ipv6));
 612         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 613         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 614                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 615                        sizeof(ipv6.hdr.src_addr));
 616                 memcpy(&ipv6_mask.hdr.src_addr,
 617                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 618                        sizeof(ipv6.hdr.src_addr));
 619         } else {
 620                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 621                        sizeof(ipv6.hdr.dst_addr));
 622                 memcpy(&ipv6_mask.hdr.dst_addr,
 623                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 624                        sizeof(ipv6.hdr.dst_addr));
 625         }
 626         item.spec = &ipv6;
 627         item.mask = &ipv6_mask;
 628         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 629                                              MLX5_MODIFICATION_TYPE_SET, error);
 630 }
 631
 632 /**
 633  * Convert modify-header set MAC address action to DV specification.
 634  *
 635  * @param[in,out] resource
 636  *   Pointer to the modify-header resource.
 637  * @param[in] action
 638  *   Pointer to action specification.
 639  * @param[out] error
 640  *   Pointer to the error structure.
 641  *
 642  * @return
 643  *   0 on success, a negative errno value otherwise and rte_errno is set.
 644  */
 645 static int
 646 flow_dv_convert_action_modify_mac
 647                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 648                          const struct rte_flow_action *action,
 649                          struct rte_flow_error *error)
 650 {
 651         const struct rte_flow_action_set_mac *conf =
 652                 (const struct rte_flow_action_set_mac *)(action->conf);
 653         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 654         struct rte_flow_item_eth eth;
 655         struct rte_flow_item_eth eth_mask;
 656
 657         memset(&eth, 0, sizeof(eth));
 658         memset(&eth_mask, 0, sizeof(eth_mask));
 659         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 660                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 661                        sizeof(eth.src.addr_bytes));
 662                 memcpy(&eth_mask.src.addr_bytes,
 663                        &rte_flow_item_eth_mask.src.addr_bytes,
 664                        sizeof(eth_mask.src.addr_bytes));
 665         } else {
 666                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 667                        sizeof(eth.dst.addr_bytes));
 668                 memcpy(&eth_mask.dst.addr_bytes,
 669                        &rte_flow_item_eth_mask.dst.addr_bytes,
 670                        sizeof(eth_mask.dst.addr_bytes));
 671         }
 672         item.spec = &eth;
 673         item.mask = &eth_mask;
 674         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 675                                              MLX5_MODIFICATION_TYPE_SET, error);
 676 }
 677
 678 /**
 679  * Convert modify-header set VLAN VID action to DV specification.
 680  *
 681  * @param[in,out] resource
 682  *   Pointer to the modify-header resource.
 683  * @param[in] action
 684  *   Pointer to action specification.
 685  * @param[out] error
 686  *   Pointer to the error structure.
 687  *
 688  * @return
 689  *   0 on success, a negative errno value otherwise and rte_errno is set.
 690  */
 691 static int
 692 flow_dv_convert_action_modify_vlan_vid
 693                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 694                          const struct rte_flow_action *action,
 695                          struct rte_flow_error *error)
 696 {
 697         const struct rte_flow_action_of_set_vlan_vid *conf =
 698                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 699         int i = resource->actions_num;
 700         struct mlx5_modification_cmd *actions = resource->actions;
 701         struct field_modify_info *field = modify_vlan_out_first_vid;
 702
 703         if (i >= MLX5_MAX_MODIFY_NUM)
 704                 return rte_flow_error_set(error, EINVAL,
 705                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 706                          "too many items to modify");
 707         actions[i] = (struct mlx5_modification_cmd) {
 708                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 709                 .field = field->id,
 710                 .length = field->size,
 711                 .offset = field->offset,
 712         };
 713         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 714         actions[i].data1 = conf->vlan_vid;
 715         actions[i].data1 = actions[i].data1 << 16;
 716         resource->actions_num = ++i;
 717         return 0;
 718 }
 719
 720 /**
 721  * Convert modify-header set TP action to DV specification.
 722  *
 723  * @param[in,out] resource
 724  *   Pointer to the modify-header resource.
 725  * @param[in] action
 726  *   Pointer to action specification.
 727  * @param[in] items
 728  *   Pointer to rte_flow_item objects list.
 729  * @param[in] attr
 730  *   Pointer to flow attributes structure.
 731  * @param[in] dev_flow
 732  *   Pointer to the sub flow.
 733  * @param[in] tunnel_decap
 734  *   Whether action is after tunnel decapsulation.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_tp
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_action *action,
 745                          const struct rte_flow_item *items,
 746                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 747                          bool tunnel_decap, struct rte_flow_error *error)
 748 {
 749         const struct rte_flow_action_set_tp *conf =
 750                 (const struct rte_flow_action_set_tp *)(action->conf);
 751         struct rte_flow_item item;
 752         struct rte_flow_item_udp udp;
 753         struct rte_flow_item_udp udp_mask;
 754         struct rte_flow_item_tcp tcp;
 755         struct rte_flow_item_tcp tcp_mask;
 756         struct field_modify_info *field;
 757
 758         if (!attr->valid)
 759                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 760         if (attr->udp) {
 761                 memset(&udp, 0, sizeof(udp));
 762                 memset(&udp_mask, 0, sizeof(udp_mask));
 763                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 764                         udp.hdr.src_port = conf->port;
 765                         udp_mask.hdr.src_port =
 766                                         rte_flow_item_udp_mask.hdr.src_port;
 767                 } else {
 768                         udp.hdr.dst_port = conf->port;
 769                         udp_mask.hdr.dst_port =
 770                                         rte_flow_item_udp_mask.hdr.dst_port;
 771                 }
 772                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 773                 item.spec = &udp;
 774                 item.mask = &udp_mask;
 775                 field = modify_udp;
 776         } else {
 777                 MLX5_ASSERT(attr->tcp);
 778                 memset(&tcp, 0, sizeof(tcp));
 779                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 780                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 781                         tcp.hdr.src_port = conf->port;
 782                         tcp_mask.hdr.src_port =
 783                                         rte_flow_item_tcp_mask.hdr.src_port;
 784                 } else {
 785                         tcp.hdr.dst_port = conf->port;
 786                         tcp_mask.hdr.dst_port =
 787                                         rte_flow_item_tcp_mask.hdr.dst_port;
 788                 }
 789                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 790                 item.spec = &tcp;
 791                 item.mask = &tcp_mask;
 792                 field = modify_tcp;
 793         }
 794         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 795                                              MLX5_MODIFICATION_TYPE_SET, error);
 796 }
 797
 798 /**
 799  * Convert modify-header set TTL action to DV specification.
 800  *
 801  * @param[in,out] resource
 802  *   Pointer to the modify-header resource.
 803  * @param[in] action
 804  *   Pointer to action specification.
 805  * @param[in] items
 806  *   Pointer to rte_flow_item objects list.
 807  * @param[in] attr
 808  *   Pointer to flow attributes structure.
 809  * @param[in] dev_flow
 810  *   Pointer to the sub flow.
 811  * @param[in] tunnel_decap
 812  *   Whether action is after tunnel decapsulation.
 813  * @param[out] error
 814  *   Pointer to the error structure.
 815  *
 816  * @return
 817  *   0 on success, a negative errno value otherwise and rte_errno is set.
 818  */
 819 static int
 820 flow_dv_convert_action_modify_ttl
 821                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 822                          const struct rte_flow_action *action,
 823                          const struct rte_flow_item *items,
 824                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 825                          bool tunnel_decap, struct rte_flow_error *error)
 826 {
 827         const struct rte_flow_action_set_ttl *conf =
 828                 (const struct rte_flow_action_set_ttl *)(action->conf);
 829         struct rte_flow_item item;
 830         struct rte_flow_item_ipv4 ipv4;
 831         struct rte_flow_item_ipv4 ipv4_mask;
 832         struct rte_flow_item_ipv6 ipv6;
 833         struct rte_flow_item_ipv6 ipv6_mask;
 834         struct field_modify_info *field;
 835
 836         if (!attr->valid)
 837                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 838         if (attr->ipv4) {
 839                 memset(&ipv4, 0, sizeof(ipv4));
 840                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 841                 ipv4.hdr.time_to_live = conf->ttl_value;
 842                 ipv4_mask.hdr.time_to_live = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 844                 item.spec = &ipv4;
 845                 item.mask = &ipv4_mask;
 846                 field = modify_ipv4;
 847         } else {
 848                 MLX5_ASSERT(attr->ipv6);
 849                 memset(&ipv6, 0, sizeof(ipv6));
 850                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 851                 ipv6.hdr.hop_limits = conf->ttl_value;
 852                 ipv6_mask.hdr.hop_limits = 0xFF;
 853                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 854                 item.spec = &ipv6;
 855                 item.mask = &ipv6_mask;
 856                 field = modify_ipv6;
 857         }
 858         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 859                                              MLX5_MODIFICATION_TYPE_SET, error);
 860 }
 861
 862 /**
 863  * Convert modify-header decrement TTL action to DV specification.
 864  *
 865  * @param[in,out] resource
 866  *   Pointer to the modify-header resource.
 867  * @param[in] action
 868  *   Pointer to action specification.
 869  * @param[in] items
 870  *   Pointer to rte_flow_item objects list.
 871  * @param[in] attr
 872  *   Pointer to flow attributes structure.
 873  * @param[in] dev_flow
 874  *   Pointer to the sub flow.
 875  * @param[in] tunnel_decap
 876  *   Whether action is after tunnel decapsulation.
 877  * @param[out] error
 878  *   Pointer to the error structure.
 879  *
 880  * @return
 881  *   0 on success, a negative errno value otherwise and rte_errno is set.
 882  */
 883 static int
 884 flow_dv_convert_action_modify_dec_ttl
 885                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 886                          const struct rte_flow_item *items,
 887                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 888                          bool tunnel_decap, struct rte_flow_error *error)
 889 {
 890         struct rte_flow_item item;
 891         struct rte_flow_item_ipv4 ipv4;
 892         struct rte_flow_item_ipv4 ipv4_mask;
 893         struct rte_flow_item_ipv6 ipv6;
 894         struct rte_flow_item_ipv6 ipv6_mask;
 895         struct field_modify_info *field;
 896
 897         if (!attr->valid)
 898                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 899         if (attr->ipv4) {
 900                 memset(&ipv4, 0, sizeof(ipv4));
 901                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 902                 ipv4.hdr.time_to_live = 0xFF;
 903                 ipv4_mask.hdr.time_to_live = 0xFF;
 904                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 905                 item.spec = &ipv4;
 906                 item.mask = &ipv4_mask;
 907                 field = modify_ipv4;
 908         } else {
 909                 MLX5_ASSERT(attr->ipv6);
 910                 memset(&ipv6, 0, sizeof(ipv6));
 911                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 912                 ipv6.hdr.hop_limits = 0xFF;
 913                 ipv6_mask.hdr.hop_limits = 0xFF;
 914                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 915                 item.spec = &ipv6;
 916                 item.mask = &ipv6_mask;
 917                 field = modify_ipv6;
 918         }
 919         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 920                                              MLX5_MODIFICATION_TYPE_ADD, error);
 921 }
 922
 923 /**
 924  * Convert modify-header increment/decrement TCP Sequence number
 925  * to DV specification.
 926  *
 927  * @param[in,out] resource
 928  *   Pointer to the modify-header resource.
 929  * @param[in] action
 930  *   Pointer to action specification.
 931  * @param[out] error
 932  *   Pointer to the error structure.
 933  *
 934  * @return
 935  *   0 on success, a negative errno value otherwise and rte_errno is set.
 936  */
 937 static int
 938 flow_dv_convert_action_modify_tcp_seq
 939                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 940                          const struct rte_flow_action *action,
 941                          struct rte_flow_error *error)
 942 {
 943         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 944         uint64_t value = rte_be_to_cpu_32(*conf);
 945         struct rte_flow_item item;
 946         struct rte_flow_item_tcp tcp;
 947         struct rte_flow_item_tcp tcp_mask;
 948
 949         memset(&tcp, 0, sizeof(tcp));
 950         memset(&tcp_mask, 0, sizeof(tcp_mask));
 951         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 952                 /*
 953                  * The HW has no decrement operation, only increment operation.
 954                  * To simulate decrement X from Y using increment operation
 955                  * we need to add UINT32_MAX X times to Y.
 956                  * Each adding of UINT32_MAX decrements Y by 1.
 957                  */
 958                 value *= UINT32_MAX;
 959         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 960         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 961         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 962         item.spec = &tcp;
 963         item.mask = &tcp_mask;
 964         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 965                                              MLX5_MODIFICATION_TYPE_ADD, error);
 966 }
 967
 968 /**
 969  * Convert modify-header increment/decrement TCP Acknowledgment number
 970  * to DV specification.
 971  *
 972  * @param[in,out] resource
 973  *   Pointer to the modify-header resource.
 974  * @param[in] action
 975  *   Pointer to action specification.
 976  * @param[out] error
 977  *   Pointer to the error structure.
 978  *
 979  * @return
 980  *   0 on success, a negative errno value otherwise and rte_errno is set.
 981  */
 982 static int
 983 flow_dv_convert_action_modify_tcp_ack
 984                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 985                          const struct rte_flow_action *action,
 986                          struct rte_flow_error *error)
 987 {
 988         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 989         uint64_t value = rte_be_to_cpu_32(*conf);
 990         struct rte_flow_item item;
 991         struct rte_flow_item_tcp tcp;
 992         struct rte_flow_item_tcp tcp_mask;
 993
 994         memset(&tcp, 0, sizeof(tcp));
 995         memset(&tcp_mask, 0, sizeof(tcp_mask));
 996         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 997                 /*
 998                  * The HW has no decrement operation, only increment operation.
 999                  * To simulate decrement X from Y using increment operation
1000                  * we need to add UINT32_MAX X times to Y.
1001                  * Each adding of UINT32_MAX decrements Y by 1.
1002                  */
1003                 value *= UINT32_MAX;
1004         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1005         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1006         item.type = RTE_FLOW_ITEM_TYPE_TCP;
1007         item.spec = &tcp;
1008         item.mask = &tcp_mask;
1009         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1010                                              MLX5_MODIFICATION_TYPE_ADD, error);
1011 }
1012
1013 static enum mlx5_modification_field reg_to_field[] = {
1014         [REG_NON] = MLX5_MODI_OUT_NONE,
1015         [REG_A] = MLX5_MODI_META_DATA_REG_A,
1016         [REG_B] = MLX5_MODI_META_DATA_REG_B,
1017         [REG_C_0] = MLX5_MODI_META_REG_C_0,
1018         [REG_C_1] = MLX5_MODI_META_REG_C_1,
1019         [REG_C_2] = MLX5_MODI_META_REG_C_2,
1020         [REG_C_3] = MLX5_MODI_META_REG_C_3,
1021         [REG_C_4] = MLX5_MODI_META_REG_C_4,
1022         [REG_C_5] = MLX5_MODI_META_REG_C_5,
1023         [REG_C_6] = MLX5_MODI_META_REG_C_6,
1024         [REG_C_7] = MLX5_MODI_META_REG_C_7,
1025 };
1026
1027 /**
1028  * Convert register set to DV specification.
1029  *
1030  * @param[in,out] resource
1031  *   Pointer to the modify-header resource.
1032  * @param[in] action
1033  *   Pointer to action specification.
1034  * @param[out] error
1035  *   Pointer to the error structure.
1036  *
1037  * @return
1038  *   0 on success, a negative errno value otherwise and rte_errno is set.
1039  */
1040 static int
1041 flow_dv_convert_action_set_reg
1042                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1043                          const struct rte_flow_action *action,
1044                          struct rte_flow_error *error)
1045 {
1046         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1047         struct mlx5_modification_cmd *actions = resource->actions;
1048         uint32_t i = resource->actions_num;
1049
1050         if (i >= MLX5_MAX_MODIFY_NUM)
1051                 return rte_flow_error_set(error, EINVAL,
1052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1053                                           "too many items to modify");
1054         MLX5_ASSERT(conf->id != REG_NON);
1055         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1056         actions[i] = (struct mlx5_modification_cmd) {
1057                 .action_type = MLX5_MODIFICATION_TYPE_SET,
1058                 .field = reg_to_field[conf->id],
1059                 .offset = conf->offset,
1060                 .length = conf->length,
1061         };
1062         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1063         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1064         ++i;
1065         resource->actions_num = i;
1066         return 0;
1067 }
1068
1069 /**
1070  * Convert SET_TAG action to DV specification.
1071  *
1072  * @param[in] dev
1073  *   Pointer to the rte_eth_dev structure.
1074  * @param[in,out] resource
1075  *   Pointer to the modify-header resource.
1076  * @param[in] conf
1077  *   Pointer to action specification.
1078  * @param[out] error
1079  *   Pointer to the error structure.
1080  *
1081  * @return
1082  *   0 on success, a negative errno value otherwise and rte_errno is set.
1083  */
1084 static int
1085 flow_dv_convert_action_set_tag
1086                         (struct rte_eth_dev *dev,
1087                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1088                          const struct rte_flow_action_set_tag *conf,
1089                          struct rte_flow_error *error)
1090 {
1091         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1092         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1093         struct rte_flow_item item = {
1094                 .spec = &data,
1095                 .mask = &mask,
1096         };
1097         struct field_modify_info reg_c_x[] = {
1098                 [1] = {0, 0, 0},
1099         };
1100         enum mlx5_modification_field reg_type;
1101         int ret;
1102
1103         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1104         if (ret < 0)
1105                 return ret;
1106         MLX5_ASSERT(ret != REG_NON);
1107         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1108         reg_type = reg_to_field[ret];
1109         MLX5_ASSERT(reg_type > 0);
1110         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1111         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1112                                              MLX5_MODIFICATION_TYPE_SET, error);
1113 }
1114
1115 /**
1116  * Convert internal COPY_REG action to DV specification.
1117  *
1118  * @param[in] dev
1119  *   Pointer to the rte_eth_dev structure.
1120  * @param[in,out] res
1121  *   Pointer to the modify-header resource.
1122  * @param[in] action
1123  *   Pointer to action specification.
1124  * @param[out] error
1125  *   Pointer to the error structure.
1126  *
1127  * @return
1128  *   0 on success, a negative errno value otherwise and rte_errno is set.
1129  */
1130 static int
1131 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1132                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1133                                  const struct rte_flow_action *action,
1134                                  struct rte_flow_error *error)
1135 {
1136         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1137         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1138         struct rte_flow_item item = {
1139                 .spec = NULL,
1140                 .mask = &mask,
1141         };
1142         struct field_modify_info reg_src[] = {
1143                 {4, 0, reg_to_field[conf->src]},
1144                 {0, 0, 0},
1145         };
1146         struct field_modify_info reg_dst = {
1147                 .offset = 0,
1148                 .id = reg_to_field[conf->dst],
1149         };
1150         /* Adjust reg_c[0] usage according to reported mask. */
1151         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1152                 struct mlx5_priv *priv = dev->data->dev_private;
1153                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1154
1155                 MLX5_ASSERT(reg_c0);
1156                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1157                 if (conf->dst == REG_C_0) {
1158                         /* Copy to reg_c[0], within mask only. */
1159                         reg_dst.offset = rte_bsf32(reg_c0);
1160                         mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1161                 } else {
1162                         reg_dst.offset = 0;
1163                         mask = rte_cpu_to_be_32(reg_c0);
1164                 }
1165         }
1166         return flow_dv_convert_modify_action(&item,
1167                                              reg_src, &reg_dst, res,
1168                                              MLX5_MODIFICATION_TYPE_COPY,
1169                                              error);
1170 }
1171
1172 /**
1173  * Convert MARK action to DV specification. This routine is used
1174  * in extensive metadata only and requires metadata register to be
1175  * handled. In legacy mode hardware tag resource is engaged.
1176  *
1177  * @param[in] dev
1178  *   Pointer to the rte_eth_dev structure.
1179  * @param[in] conf
1180  *   Pointer to MARK action specification.
1181  * @param[in,out] resource
1182  *   Pointer to the modify-header resource.
1183  * @param[out] error
1184  *   Pointer to the error structure.
1185  *
1186  * @return
1187  *   0 on success, a negative errno value otherwise and rte_errno is set.
1188  */
1189 static int
1190 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1191                             const struct rte_flow_action_mark *conf,
1192                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1193                             struct rte_flow_error *error)
1194 {
1195         struct mlx5_priv *priv = dev->data->dev_private;
1196         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1197                                            priv->sh->dv_mark_mask);
1198         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1199         struct rte_flow_item item = {
1200                 .spec = &data,
1201                 .mask = &mask,
1202         };
1203         struct field_modify_info reg_c_x[] = {
1204                 [1] = {0, 0, 0},
1205         };
1206         int reg;
1207
1208         if (!mask)
1209                 return rte_flow_error_set(error, EINVAL,
1210                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1211                                           NULL, "zero mark action mask");
1212         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1213         if (reg < 0)
1214                 return reg;
1215         MLX5_ASSERT(reg > 0);
1216         if (reg == REG_C_0) {
1217                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1218                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1219
1220                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1221                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1222                 mask = rte_cpu_to_be_32(mask << shl_c0);
1223         }
1224         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1225         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1226                                              MLX5_MODIFICATION_TYPE_SET, error);
1227 }
1228
1229 /**
1230  * Get metadata register index for specified steering domain.
1231  *
1232  * @param[in] dev
1233  *   Pointer to the rte_eth_dev structure.
1234  * @param[in] attr
1235  *   Attributes of flow to determine steering domain.
1236  * @param[out] error
1237  *   Pointer to the error structure.
1238  *
1239  * @return
1240  *   positive index on success, a negative errno value otherwise
1241  *   and rte_errno is set.
1242  */
1243 static enum modify_reg
1244 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1245                          const struct rte_flow_attr *attr,
1246                          struct rte_flow_error *error)
1247 {
1248         int reg =
1249                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1250                                           MLX5_METADATA_FDB :
1251                                             attr->egress ?
1252                                             MLX5_METADATA_TX :
1253                                             MLX5_METADATA_RX, 0, error);
1254         if (reg < 0)
1255                 return rte_flow_error_set(error,
1256                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1257                                           NULL, "unavailable "
1258                                           "metadata register");
1259         return reg;
1260 }
1261
1262 /**
1263  * Convert SET_META action to DV specification.
1264  *
1265  * @param[in] dev
1266  *   Pointer to the rte_eth_dev structure.
1267  * @param[in,out] resource
1268  *   Pointer to the modify-header resource.
1269  * @param[in] attr
1270  *   Attributes of flow that includes this item.
1271  * @param[in] conf
1272  *   Pointer to action specification.
1273  * @param[out] error
1274  *   Pointer to the error structure.
1275  *
1276  * @return
1277  *   0 on success, a negative errno value otherwise and rte_errno is set.
1278  */
1279 static int
1280 flow_dv_convert_action_set_meta
1281                         (struct rte_eth_dev *dev,
1282                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1283                          const struct rte_flow_attr *attr,
1284                          const struct rte_flow_action_set_meta *conf,
1285                          struct rte_flow_error *error)
1286 {
1287         uint32_t mask = rte_cpu_to_be_32(conf->mask);
1288         uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1289         struct rte_flow_item item = {
1290                 .spec = &data,
1291                 .mask = &mask,
1292         };
1293         struct field_modify_info reg_c_x[] = {
1294                 [1] = {0, 0, 0},
1295         };
1296         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1297
1298         if (reg < 0)
1299                 return reg;
1300         MLX5_ASSERT(reg != REG_NON);
1301         if (reg == REG_C_0) {
1302                 struct mlx5_priv *priv = dev->data->dev_private;
1303                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1304                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1305
1306                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1307                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1308                 mask = rte_cpu_to_be_32(mask << shl_c0);
1309         }
1310         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1311         /* The routine expects parameters in memory as big-endian ones. */
1312         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1313                                              MLX5_MODIFICATION_TYPE_SET, error);
1314 }
1315
1316 /**
1317  * Convert modify-header set IPv4 DSCP action to DV specification.
1318  *
1319  * @param[in,out] resource
1320  *   Pointer to the modify-header resource.
1321  * @param[in] action
1322  *   Pointer to action specification.
1323  * @param[out] error
1324  *   Pointer to the error structure.
1325  *
1326  * @return
1327  *   0 on success, a negative errno value otherwise and rte_errno is set.
1328  */
1329 static int
1330 flow_dv_convert_action_modify_ipv4_dscp
1331                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1332                          const struct rte_flow_action *action,
1333                          struct rte_flow_error *error)
1334 {
1335         const struct rte_flow_action_set_dscp *conf =
1336                 (const struct rte_flow_action_set_dscp *)(action->conf);
1337         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1338         struct rte_flow_item_ipv4 ipv4;
1339         struct rte_flow_item_ipv4 ipv4_mask;
1340
1341         memset(&ipv4, 0, sizeof(ipv4));
1342         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1343         ipv4.hdr.type_of_service = conf->dscp;
1344         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1345         item.spec = &ipv4;
1346         item.mask = &ipv4_mask;
1347         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1348                                              MLX5_MODIFICATION_TYPE_SET, error);
1349 }
1350
1351 /**
1352  * Convert modify-header set IPv6 DSCP action to DV specification.
1353  *
1354  * @param[in,out] resource
1355  *   Pointer to the modify-header resource.
1356  * @param[in] action
1357  *   Pointer to action specification.
1358  * @param[out] error
1359  *   Pointer to the error structure.
1360  *
1361  * @return
1362  *   0 on success, a negative errno value otherwise and rte_errno is set.
1363  */
1364 static int
1365 flow_dv_convert_action_modify_ipv6_dscp
1366                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1367                          const struct rte_flow_action *action,
1368                          struct rte_flow_error *error)
1369 {
1370         const struct rte_flow_action_set_dscp *conf =
1371                 (const struct rte_flow_action_set_dscp *)(action->conf);
1372         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1373         struct rte_flow_item_ipv6 ipv6;
1374         struct rte_flow_item_ipv6 ipv6_mask;
1375
1376         memset(&ipv6, 0, sizeof(ipv6));
1377         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1378         /*
1379          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1380          * rdma-core only accept the DSCP bits byte aligned start from
1381          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1382          * bits in IPv6 case as rdma-core requires byte aligned value.
1383          */
1384         ipv6.hdr.vtc_flow = conf->dscp;
1385         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1386         item.spec = &ipv6;
1387         item.mask = &ipv6_mask;
1388         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1389                                              MLX5_MODIFICATION_TYPE_SET, error);
1390 }
1391
1392 static int
1393 mlx5_flow_item_field_width(struct mlx5_priv *priv,
1394                            enum rte_flow_field_id field)
1395 {
1396         switch (field) {
1397         case RTE_FLOW_FIELD_START:
1398                 return 32;
1399         case RTE_FLOW_FIELD_MAC_DST:
1400         case RTE_FLOW_FIELD_MAC_SRC:
1401                 return 48;
1402         case RTE_FLOW_FIELD_VLAN_TYPE:
1403                 return 16;
1404         case RTE_FLOW_FIELD_VLAN_ID:
1405                 return 12;
1406         case RTE_FLOW_FIELD_MAC_TYPE:
1407                 return 16;
1408         case RTE_FLOW_FIELD_IPV4_DSCP:
1409                 return 6;
1410         case RTE_FLOW_FIELD_IPV4_TTL:
1411                 return 8;
1412         case RTE_FLOW_FIELD_IPV4_SRC:
1413         case RTE_FLOW_FIELD_IPV4_DST:
1414                 return 32;
1415         case RTE_FLOW_FIELD_IPV6_DSCP:
1416                 return 6;
1417         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1418                 return 8;
1419         case RTE_FLOW_FIELD_IPV6_SRC:
1420         case RTE_FLOW_FIELD_IPV6_DST:
1421                 return 128;
1422         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1423         case RTE_FLOW_FIELD_TCP_PORT_DST:
1424                 return 16;
1425         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1426         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1427                 return 32;
1428         case RTE_FLOW_FIELD_TCP_FLAGS:
1429                 return 9;
1430         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1431         case RTE_FLOW_FIELD_UDP_PORT_DST:
1432                 return 16;
1433         case RTE_FLOW_FIELD_VXLAN_VNI:
1434         case RTE_FLOW_FIELD_GENEVE_VNI:
1435                 return 24;
1436         case RTE_FLOW_FIELD_GTP_TEID:
1437         case RTE_FLOW_FIELD_TAG:
1438                 return 32;
1439         case RTE_FLOW_FIELD_MARK:
1440                 return __builtin_popcount(priv->sh->dv_mark_mask);
1441         case RTE_FLOW_FIELD_META:
1442                 return __builtin_popcount(priv->sh->dv_meta_mask);
1443         case RTE_FLOW_FIELD_POINTER:
1444         case RTE_FLOW_FIELD_VALUE:
1445                 return 64;
1446         default:
1447                 MLX5_ASSERT(false);
1448         }
1449         return 0;
1450 }
1451
1452 static void
1453 mlx5_flow_field_id_to_modify_info
1454                 (const struct rte_flow_action_modify_data *data,
1455                  struct field_modify_info *info,
1456                  uint32_t *mask, uint32_t *value,
1457                  uint32_t width, uint32_t dst_width,
1458                  uint32_t *shift, struct rte_eth_dev *dev,
1459                  const struct rte_flow_attr *attr,
1460                  struct rte_flow_error *error)
1461 {
1462         struct mlx5_priv *priv = dev->data->dev_private;
1463         uint32_t idx = 0;
1464         uint32_t off = 0;
1465         uint64_t val = 0;
1466         switch (data->field) {
1467         case RTE_FLOW_FIELD_START:
1468                 /* not supported yet */
1469                 MLX5_ASSERT(false);
1470                 break;
1471         case RTE_FLOW_FIELD_MAC_DST:
1472                 off = data->offset > 16 ? data->offset - 16 : 0;
1473                 if (mask) {
1474                         if (data->offset < 16) {
1475                                 info[idx] = (struct field_modify_info){2, 0,
1476                                                 MLX5_MODI_OUT_DMAC_15_0};
1477                                 if (width < 16) {
1478                                         mask[idx] = rte_cpu_to_be_16(0xffff >>
1479                                                                  (16 - width));
1480                                         width = 0;
1481                                 } else {
1482                                         mask[idx] = RTE_BE16(0xffff);
1483                                         width -= 16;
1484                                 }
1485                                 if (!width)
1486                                         break;
1487                                 ++idx;
1488                         }
1489                         info[idx] = (struct field_modify_info){4, 4 * idx,
1490                                                 MLX5_MODI_OUT_DMAC_47_16};
1491                         mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1492                                                       (32 - width)) << off);
1493                 } else {
1494                         if (data->offset < 16)
1495                                 info[idx++] = (struct field_modify_info){2, 0,
1496                                                 MLX5_MODI_OUT_DMAC_15_0};
1497                         info[idx] = (struct field_modify_info){4, off,
1498                                                 MLX5_MODI_OUT_DMAC_47_16};
1499                 }
1500                 break;
1501         case RTE_FLOW_FIELD_MAC_SRC:
1502                 off = data->offset > 16 ? data->offset - 16 : 0;
1503                 if (mask) {
1504                         if (data->offset < 16) {
1505                                 info[idx] = (struct field_modify_info){2, 0,
1506                                                 MLX5_MODI_OUT_SMAC_15_0};
1507                                 if (width < 16) {
1508                                         mask[idx] = rte_cpu_to_be_16(0xffff >>
1509                                                                  (16 - width));
1510                                         width = 0;
1511                                 } else {
1512                                         mask[idx] = RTE_BE16(0xffff);
1513                                         width -= 16;
1514                                 }
1515                                 if (!width)
1516                                         break;
1517                                 ++idx;
1518                         }
1519                         info[idx] = (struct field_modify_info){4, 4 * idx,
1520                                                 MLX5_MODI_OUT_SMAC_47_16};
1521                         mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1522                                                       (32 - width)) << off);
1523                 } else {
1524                         if (data->offset < 16)
1525                                 info[idx++] = (struct field_modify_info){2, 0,
1526                                                 MLX5_MODI_OUT_SMAC_15_0};
1527                         info[idx] = (struct field_modify_info){4, off,
1528                                                 MLX5_MODI_OUT_SMAC_47_16};
1529                 }
1530                 break;
1531         case RTE_FLOW_FIELD_VLAN_TYPE:
1532                 /* not supported yet */
1533                 break;
1534         case RTE_FLOW_FIELD_VLAN_ID:
1535                 info[idx] = (struct field_modify_info){2, 0,
1536                                         MLX5_MODI_OUT_FIRST_VID};
1537                 if (mask)
1538                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1539                 break;
1540         case RTE_FLOW_FIELD_MAC_TYPE:
1541                 info[idx] = (struct field_modify_info){2, 0,
1542                                         MLX5_MODI_OUT_ETHERTYPE};
1543                 if (mask)
1544                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1545                 break;
1546         case RTE_FLOW_FIELD_IPV4_DSCP:
1547                 info[idx] = (struct field_modify_info){1, 0,
1548                                         MLX5_MODI_OUT_IP_DSCP};
1549                 if (mask)
1550                         mask[idx] = 0x3f >> (6 - width);
1551                 break;
1552         case RTE_FLOW_FIELD_IPV4_TTL:
1553                 info[idx] = (struct field_modify_info){1, 0,
1554                                         MLX5_MODI_OUT_IPV4_TTL};
1555                 if (mask)
1556                         mask[idx] = 0xff >> (8 - width);
1557                 break;
1558         case RTE_FLOW_FIELD_IPV4_SRC:
1559                 info[idx] = (struct field_modify_info){4, 0,
1560                                         MLX5_MODI_OUT_SIPV4};
1561                 if (mask)
1562                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1563                                                      (32 - width));
1564                 break;
1565         case RTE_FLOW_FIELD_IPV4_DST:
1566                 info[idx] = (struct field_modify_info){4, 0,
1567                                         MLX5_MODI_OUT_DIPV4};
1568                 if (mask)
1569                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1570                                                      (32 - width));
1571                 break;
1572         case RTE_FLOW_FIELD_IPV6_DSCP:
1573                 info[idx] = (struct field_modify_info){1, 0,
1574                                         MLX5_MODI_OUT_IP_DSCP};
1575                 if (mask)
1576                         mask[idx] = 0x3f >> (6 - width);
1577                 break;
1578         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1579                 info[idx] = (struct field_modify_info){1, 0,
1580                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1581                 if (mask)
1582                         mask[idx] = 0xff >> (8 - width);
1583                 break;
1584         case RTE_FLOW_FIELD_IPV6_SRC:
1585                 if (mask) {
1586                         if (data->offset < 32) {
1587                                 info[idx] = (struct field_modify_info){4,
1588                                                 4 * idx,
1589                                                 MLX5_MODI_OUT_SIPV6_31_0};
1590                                 if (width < 32) {
1591                                         mask[idx] =
1592                                                 rte_cpu_to_be_32(0xffffffff >>
1593                                                                  (32 - width));
1594                                         width = 0;
1595                                 } else {
1596                                         mask[idx] = RTE_BE32(0xffffffff);
1597                                         width -= 32;
1598                                 }
1599                                 if (!width)
1600                                         break;
1601                                 ++idx;
1602                         }
1603                         if (data->offset < 64) {
1604                                 info[idx] = (struct field_modify_info){4,
1605                                                 4 * idx,
1606                                                 MLX5_MODI_OUT_SIPV6_63_32};
1607                                 if (width < 32) {
1608                                         mask[idx] =
1609                                                 rte_cpu_to_be_32(0xffffffff >>
1610                                                                  (32 - width));
1611                                         width = 0;
1612                                 } else {
1613                                         mask[idx] = RTE_BE32(0xffffffff);
1614                                         width -= 32;
1615                                 }
1616                                 if (!width)
1617                                         break;
1618                                 ++idx;
1619                         }
1620                         if (data->offset < 96) {
1621                                 info[idx] = (struct field_modify_info){4,
1622                                                 4 * idx,
1623                                                 MLX5_MODI_OUT_SIPV6_95_64};
1624                                 if (width < 32) {
1625                                         mask[idx] =
1626                                                 rte_cpu_to_be_32(0xffffffff >>
1627                                                                  (32 - width));
1628                                         width = 0;
1629                                 } else {
1630                                         mask[idx] = RTE_BE32(0xffffffff);
1631                                         width -= 32;
1632                                 }
1633                                 if (!width)
1634                                         break;
1635                                 ++idx;
1636                         }
1637                         info[idx] = (struct field_modify_info){4, 4 * idx,
1638                                                 MLX5_MODI_OUT_SIPV6_127_96};
1639                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1640                                                      (32 - width));
1641                 } else {
1642                         if (data->offset < 32)
1643                                 info[idx++] = (struct field_modify_info){4, 0,
1644                                                 MLX5_MODI_OUT_SIPV6_31_0};
1645                         if (data->offset < 64)
1646                                 info[idx++] = (struct field_modify_info){4, 0,
1647                                                 MLX5_MODI_OUT_SIPV6_63_32};
1648                         if (data->offset < 96)
1649                                 info[idx++] = (struct field_modify_info){4, 0,
1650                                                 MLX5_MODI_OUT_SIPV6_95_64};
1651                         if (data->offset < 128)
1652                                 info[idx++] = (struct field_modify_info){4, 0,
1653                                                 MLX5_MODI_OUT_SIPV6_127_96};
1654                 }
1655                 break;
1656         case RTE_FLOW_FIELD_IPV6_DST:
1657                 if (mask) {
1658                         if (data->offset < 32) {
1659                                 info[idx] = (struct field_modify_info){4,
1660                                                 4 * idx,
1661                                                 MLX5_MODI_OUT_DIPV6_31_0};
1662                                 if (width < 32) {
1663                                         mask[idx] =
1664                                                 rte_cpu_to_be_32(0xffffffff >>
1665                                                                  (32 - width));
1666                                         width = 0;
1667                                 } else {
1668                                         mask[idx] = RTE_BE32(0xffffffff);
1669                                         width -= 32;
1670                                 }
1671                                 if (!width)
1672                                         break;
1673                                 ++idx;
1674                         }
1675                         if (data->offset < 64) {
1676                                 info[idx] = (struct field_modify_info){4,
1677                                                 4 * idx,
1678                                                 MLX5_MODI_OUT_DIPV6_63_32};
1679                                 if (width < 32) {
1680                                         mask[idx] =
1681                                                 rte_cpu_to_be_32(0xffffffff >>
1682                                                                  (32 - width));
1683                                         width = 0;
1684                                 } else {
1685                                         mask[idx] = RTE_BE32(0xffffffff);
1686                                         width -= 32;
1687                                 }
1688                                 if (!width)
1689                                         break;
1690                                 ++idx;
1691                         }
1692                         if (data->offset < 96) {
1693                                 info[idx] = (struct field_modify_info){4,
1694                                                 4 * idx,
1695                                                 MLX5_MODI_OUT_DIPV6_95_64};
1696                                 if (width < 32) {
1697                                         mask[idx] =
1698                                                 rte_cpu_to_be_32(0xffffffff >>
1699                                                                  (32 - width));
1700                                         width = 0;
1701                                 } else {
1702                                         mask[idx] = RTE_BE32(0xffffffff);
1703                                         width -= 32;
1704                                 }
1705                                 if (!width)
1706                                         break;
1707                                 ++idx;
1708                         }
1709                         info[idx] = (struct field_modify_info){4, 4 * idx,
1710                                                 MLX5_MODI_OUT_DIPV6_127_96};
1711                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1712                                                      (32 - width));
1713                 } else {
1714                         if (data->offset < 32)
1715                                 info[idx++] = (struct field_modify_info){4, 0,
1716                                                 MLX5_MODI_OUT_DIPV6_31_0};
1717                         if (data->offset < 64)
1718                                 info[idx++] = (struct field_modify_info){4, 0,
1719                                                 MLX5_MODI_OUT_DIPV6_63_32};
1720                         if (data->offset < 96)
1721                                 info[idx++] = (struct field_modify_info){4, 0,
1722                                                 MLX5_MODI_OUT_DIPV6_95_64};
1723                         if (data->offset < 128)
1724                                 info[idx++] = (struct field_modify_info){4, 0,
1725                                                 MLX5_MODI_OUT_DIPV6_127_96};
1726                 }
1727                 break;
1728         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1729                 info[idx] = (struct field_modify_info){2, 0,
1730                                         MLX5_MODI_OUT_TCP_SPORT};
1731                 if (mask)
1732                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1733                 break;
1734         case RTE_FLOW_FIELD_TCP_PORT_DST:
1735                 info[idx] = (struct field_modify_info){2, 0,
1736                                         MLX5_MODI_OUT_TCP_DPORT};
1737                 if (mask)
1738                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1739                 break;
1740         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1741                 info[idx] = (struct field_modify_info){4, 0,
1742                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1743                 if (mask)
1744                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1745                                                      (32 - width));
1746                 break;
1747         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1748                 info[idx] = (struct field_modify_info){4, 0,
1749                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1750                 if (mask)
1751                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1752                                                      (32 - width));
1753                 break;
1754         case RTE_FLOW_FIELD_TCP_FLAGS:
1755                 info[idx] = (struct field_modify_info){2, 0,
1756                                         MLX5_MODI_OUT_TCP_FLAGS};
1757                 if (mask)
1758                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1759                 break;
1760         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1761                 info[idx] = (struct field_modify_info){2, 0,
1762                                         MLX5_MODI_OUT_UDP_SPORT};
1763                 if (mask)
1764                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1765                 break;
1766         case RTE_FLOW_FIELD_UDP_PORT_DST:
1767                 info[idx] = (struct field_modify_info){2, 0,
1768                                         MLX5_MODI_OUT_UDP_DPORT};
1769                 if (mask)
1770                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1771                 break;
1772         case RTE_FLOW_FIELD_VXLAN_VNI:
1773                 /* not supported yet */
1774                 break;
1775         case RTE_FLOW_FIELD_GENEVE_VNI:
1776                 /* not supported yet*/
1777                 break;
1778         case RTE_FLOW_FIELD_GTP_TEID:
1779                 info[idx] = (struct field_modify_info){4, 0,
1780                                         MLX5_MODI_GTP_TEID};
1781                 if (mask)
1782                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1783                                                      (32 - width));
1784                 break;
1785         case RTE_FLOW_FIELD_TAG:
1786                 {
1787                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1788                                                    data->level, error);
1789                         if (reg < 0)
1790                                 return;
1791                         MLX5_ASSERT(reg != REG_NON);
1792                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1793                         info[idx] = (struct field_modify_info){4, 0,
1794                                                 reg_to_field[reg]};
1795                         if (mask)
1796                                 mask[idx] =
1797                                         rte_cpu_to_be_32(0xffffffff >>
1798                                                          (32 - width));
1799                 }
1800                 break;
1801         case RTE_FLOW_FIELD_MARK:
1802                 {
1803                         uint32_t mark_mask = priv->sh->dv_mark_mask;
1804                         uint32_t mark_count = __builtin_popcount(mark_mask);
1805                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1806                                                        0, error);
1807                         if (reg < 0)
1808                                 return;
1809                         MLX5_ASSERT(reg != REG_NON);
1810                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1811                         info[idx] = (struct field_modify_info){4, 0,
1812                                                 reg_to_field[reg]};
1813                         if (mask)
1814                                 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1815                                          (mark_count - width)) & mark_mask);
1816                 }
1817                 break;
1818         case RTE_FLOW_FIELD_META:
1819                 {
1820                         uint32_t meta_mask = priv->sh->dv_meta_mask;
1821                         uint32_t meta_count = __builtin_popcount(meta_mask);
1822                         uint32_t msk_c0 =
1823                                 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1824                         uint32_t shl_c0 = rte_bsf32(msk_c0);
1825                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1826                         if (reg < 0)
1827                                 return;
1828                         MLX5_ASSERT(reg != REG_NON);
1829                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1830                         if (reg == REG_C_0)
1831                                 *shift = shl_c0;
1832                         info[idx] = (struct field_modify_info){4, 0,
1833                                                 reg_to_field[reg]};
1834                         if (mask)
1835                                 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1836                                         (meta_count - width)) & meta_mask);
1837                 }
1838                 break;
1839         case RTE_FLOW_FIELD_POINTER:
1840         case RTE_FLOW_FIELD_VALUE:
1841                 if (data->field == RTE_FLOW_FIELD_POINTER)
1842                         memcpy(&val, (void *)(uintptr_t)data->value,
1843                                sizeof(uint64_t));
1844                 else
1845                         val = data->value;
1846                 for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
1847                         if (mask[idx]) {
1848                                 if (dst_width == 48) {
1849                                         /*special case for MAC addresses */
1850                                         value[idx] = rte_cpu_to_be_16(val);
1851                                         val >>= 16;
1852                                         dst_width -= 16;
1853                                 } else if (dst_width > 16) {
1854                                         value[idx] = rte_cpu_to_be_32(val);
1855                                         val >>= 32;
1856                                 } else if (dst_width > 8) {
1857                                         value[idx] = rte_cpu_to_be_16(val);
1858                                         val >>= 16;
1859                                 } else {
1860                                         value[idx] = (uint8_t)val;
1861                                         val >>= 8;
1862                                 }
1863                                 if (*shift)
1864                                         value[idx] <<= *shift;
1865                                 if (!val)
1866                                         break;
1867                         }
1868                 }
1869                 break;
1870         default:
1871                 MLX5_ASSERT(false);
1872                 break;
1873         }
1874 }
1875
1876 /**
1877  * Convert modify_field action to DV specification.
1878  *
1879  * @param[in] dev
1880  *   Pointer to the rte_eth_dev structure.
1881  * @param[in,out] resource
1882  *   Pointer to the modify-header resource.
1883  * @param[in] action
1884  *   Pointer to action specification.
1885  * @param[in] attr
1886  *   Attributes of flow that includes this item.
1887  * @param[out] error
1888  *   Pointer to the error structure.
1889  *
1890  * @return
1891  *   0 on success, a negative errno value otherwise and rte_errno is set.
1892  */
1893 static int
1894 flow_dv_convert_action_modify_field
1895                         (struct rte_eth_dev *dev,
1896                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1897                          const struct rte_flow_action *action,
1898                          const struct rte_flow_attr *attr,
1899                          struct rte_flow_error *error)
1900 {
1901         struct mlx5_priv *priv = dev->data->dev_private;
1902         const struct rte_flow_action_modify_field *conf =
1903                 (const struct rte_flow_action_modify_field *)(action->conf);
1904         struct rte_flow_item item;
1905         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1906                                                                 {0, 0, 0} };
1907         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1908                                                                 {0, 0, 0} };
1909         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1910         uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1911         uint32_t type;
1912         uint32_t shift = 0;
1913         uint32_t dst_width = mlx5_flow_item_field_width(priv, conf->dst.field);
1914
1915         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1916                 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1917                 type = MLX5_MODIFICATION_TYPE_SET;
1918                 /** For SET fill the destination field (field) first. */
1919                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1920                                                   value, conf->width, dst_width,
1921                                                   &shift, dev, attr, error);
1922                 /** Then copy immediate value from source as per mask. */
1923                 mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
1924                                                   value, conf->width, dst_width,
1925                                                   &shift, dev, attr, error);
1926                 item.spec = &value;
1927         } else {
1928                 type = MLX5_MODIFICATION_TYPE_COPY;
1929                 /** For COPY fill the destination field (dcopy) without mask. */
1930                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1931                                                   value, conf->width, dst_width,
1932                                                   &shift, dev, attr, error);
1933                 /** Then construct the source field (field) with mask. */
1934                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1935                                                   value, conf->width, dst_width,
1936                                                   &shift, dev, attr, error);
1937         }
1938         item.mask = &mask;
1939         return flow_dv_convert_modify_action(&item,
1940                         field, dcopy, resource, type, error);
1941 }
1942
1943 /**
1944  * Validate MARK item.
1945  *
1946  * @param[in] dev
1947  *   Pointer to the rte_eth_dev structure.
1948  * @param[in] item
1949  *   Item specification.
1950  * @param[in] attr
1951  *   Attributes of flow that includes this item.
1952  * @param[out] error
1953  *   Pointer to error structure.
1954  *
1955  * @return
1956  *   0 on success, a negative errno value otherwise and rte_errno is set.
1957  */
1958 static int
1959 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1960                            const struct rte_flow_item *item,
1961                            const struct rte_flow_attr *attr __rte_unused,
1962                            struct rte_flow_error *error)
1963 {
1964         struct mlx5_priv *priv = dev->data->dev_private;
1965         struct mlx5_dev_config *config = &priv->config;
1966         const struct rte_flow_item_mark *spec = item->spec;
1967         const struct rte_flow_item_mark *mask = item->mask;
1968         const struct rte_flow_item_mark nic_mask = {
1969                 .id = priv->sh->dv_mark_mask,
1970         };
1971         int ret;
1972
1973         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1974                 return rte_flow_error_set(error, ENOTSUP,
1975                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1976                                           "extended metadata feature"
1977                                           " isn't enabled");
1978         if (!mlx5_flow_ext_mreg_supported(dev))
1979                 return rte_flow_error_set(error, ENOTSUP,
1980                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1981                                           "extended metadata register"
1982                                           " isn't supported");
1983         if (!nic_mask.id)
1984                 return rte_flow_error_set(error, ENOTSUP,
1985                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1986                                           "extended metadata register"
1987                                           " isn't available");
1988         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1989         if (ret < 0)
1990                 return ret;
1991         if (!spec)
1992                 return rte_flow_error_set(error, EINVAL,
1993                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1994                                           item->spec,
1995                                           "data cannot be empty");
1996         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1997                 return rte_flow_error_set(error, EINVAL,
1998                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1999                                           &spec->id,
2000                                           "mark id exceeds the limit");
2001         if (!mask)
2002                 mask = &nic_mask;
2003         if (!mask->id)
2004                 return rte_flow_error_set(error, EINVAL,
2005                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2006                                         "mask cannot be zero");
2007
2008         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2009                                         (const uint8_t *)&nic_mask,
2010                                         sizeof(struct rte_flow_item_mark),
2011                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2012         if (ret < 0)
2013                 return ret;
2014         return 0;
2015 }
2016
2017 /**
2018  * Validate META item.
2019  *
2020  * @param[in] dev
2021  *   Pointer to the rte_eth_dev structure.
2022  * @param[in] item
2023  *   Item specification.
2024  * @param[in] attr
2025  *   Attributes of flow that includes this item.
2026  * @param[out] error
2027  *   Pointer to error structure.
2028  *
2029  * @return
2030  *   0 on success, a negative errno value otherwise and rte_errno is set.
2031  */
2032 static int
2033 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
2034                            const struct rte_flow_item *item,
2035                            const struct rte_flow_attr *attr,
2036                            struct rte_flow_error *error)
2037 {
2038         struct mlx5_priv *priv = dev->data->dev_private;
2039         struct mlx5_dev_config *config = &priv->config;
2040         const struct rte_flow_item_meta *spec = item->spec;
2041         const struct rte_flow_item_meta *mask = item->mask;
2042         struct rte_flow_item_meta nic_mask = {
2043                 .data = UINT32_MAX
2044         };
2045         int reg;
2046         int ret;
2047
2048         if (!spec)
2049                 return rte_flow_error_set(error, EINVAL,
2050                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2051                                           item->spec,
2052                                           "data cannot be empty");
2053         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2054                 if (!mlx5_flow_ext_mreg_supported(dev))
2055                         return rte_flow_error_set(error, ENOTSUP,
2056                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2057                                           "extended metadata register"
2058                                           " isn't supported");
2059                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2060                 if (reg < 0)
2061                         return reg;
2062                 if (reg == REG_NON)
2063                         return rte_flow_error_set(error, ENOTSUP,
2064                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2065                                         "unavalable extended metadata register");
2066                 if (reg == REG_B)
2067                         return rte_flow_error_set(error, ENOTSUP,
2068                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2069                                           "match on reg_b "
2070                                           "isn't supported");
2071                 if (reg != REG_A)
2072                         nic_mask.data = priv->sh->dv_meta_mask;
2073         } else {
2074                 if (attr->transfer)
2075                         return rte_flow_error_set(error, ENOTSUP,
2076                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2077                                         "extended metadata feature "
2078                                         "should be enabled when "
2079                                         "meta item is requested "
2080                                         "with e-switch mode ");
2081                 if (attr->ingress)
2082                         return rte_flow_error_set(error, ENOTSUP,
2083                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2084                                         "match on metadata for ingress "
2085                                         "is not supported in legacy "
2086                                         "metadata mode");
2087         }
2088         if (!mask)
2089                 mask = &rte_flow_item_meta_mask;
2090         if (!mask->data)
2091                 return rte_flow_error_set(error, EINVAL,
2092                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2093                                         "mask cannot be zero");
2094
2095         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2096                                         (const uint8_t *)&nic_mask,
2097                                         sizeof(struct rte_flow_item_meta),
2098                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2099         return ret;
2100 }
2101
2102 /**
2103  * Validate TAG item.
2104  *
2105  * @param[in] dev
2106  *   Pointer to the rte_eth_dev structure.
2107  * @param[in] item
2108  *   Item specification.
2109  * @param[in] attr
2110  *   Attributes of flow that includes this item.
2111  * @param[out] error
2112  *   Pointer to error structure.
2113  *
2114  * @return
2115  *   0 on success, a negative errno value otherwise and rte_errno is set.
2116  */
2117 static int
2118 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2119                           const struct rte_flow_item *item,
2120                           const struct rte_flow_attr *attr __rte_unused,
2121                           struct rte_flow_error *error)
2122 {
2123         const struct rte_flow_item_tag *spec = item->spec;
2124         const struct rte_flow_item_tag *mask = item->mask;
2125         const struct rte_flow_item_tag nic_mask = {
2126                 .data = RTE_BE32(UINT32_MAX),
2127                 .index = 0xff,
2128         };
2129         int ret;
2130
2131         if (!mlx5_flow_ext_mreg_supported(dev))
2132                 return rte_flow_error_set(error, ENOTSUP,
2133                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2134                                           "extensive metadata register"
2135                                           " isn't supported");
2136         if (!spec)
2137                 return rte_flow_error_set(error, EINVAL,
2138                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2139                                           item->spec,
2140                                           "data cannot be empty");
2141         if (!mask)
2142                 mask = &rte_flow_item_tag_mask;
2143         if (!mask->data)
2144                 return rte_flow_error_set(error, EINVAL,
2145                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2146                                         "mask cannot be zero");
2147
2148         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2149                                         (const uint8_t *)&nic_mask,
2150                                         sizeof(struct rte_flow_item_tag),
2151                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2152         if (ret < 0)
2153                 return ret;
2154         if (mask->index != 0xff)
2155                 return rte_flow_error_set(error, EINVAL,
2156                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2157                                           "partial mask for tag index"
2158                                           " is not supported");
2159         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2160         if (ret < 0)
2161                 return ret;
2162         MLX5_ASSERT(ret != REG_NON);
2163         return 0;
2164 }
2165
2166 /**
2167  * Validate vport item.
2168  *
2169  * @param[in] dev
2170  *   Pointer to the rte_eth_dev structure.
2171  * @param[in] item
2172  *   Item specification.
2173  * @param[in] attr
2174  *   Attributes of flow that includes this item.
2175  * @param[in] item_flags
2176  *   Bit-fields that holds the items detected until now.
2177  * @param[out] error
2178  *   Pointer to error structure.
2179  *
2180  * @return
2181  *   0 on success, a negative errno value otherwise and rte_errno is set.
2182  */
2183 static int
2184 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2185                               const struct rte_flow_item *item,
2186                               const struct rte_flow_attr *attr,
2187                               uint64_t item_flags,
2188                               struct rte_flow_error *error)
2189 {
2190         const struct rte_flow_item_port_id *spec = item->spec;
2191         const struct rte_flow_item_port_id *mask = item->mask;
2192         const struct rte_flow_item_port_id switch_mask = {
2193                         .id = 0xffffffff,
2194         };
2195         struct mlx5_priv *esw_priv;
2196         struct mlx5_priv *dev_priv;
2197         int ret;
2198
2199         if (!attr->transfer)
2200                 return rte_flow_error_set(error, EINVAL,
2201                                           RTE_FLOW_ERROR_TYPE_ITEM,
2202                                           NULL,
2203                                           "match on port id is valid only"
2204                                           " when transfer flag is enabled");
2205         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2206                 return rte_flow_error_set(error, ENOTSUP,
2207                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2208                                           "multiple source ports are not"
2209                                           " supported");
2210         if (!mask)
2211                 mask = &switch_mask;
2212         if (mask->id != 0xffffffff)
2213                 return rte_flow_error_set(error, ENOTSUP,
2214                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2215                                            mask,
2216                                            "no support for partial mask on"
2217                                            " \"id\" field");
2218         ret = mlx5_flow_item_acceptable
2219                                 (item, (const uint8_t *)mask,
2220                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2221                                  sizeof(struct rte_flow_item_port_id),
2222                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2223         if (ret)
2224                 return ret;
2225         if (!spec)
2226                 return 0;
2227         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2228         if (!esw_priv)
2229                 return rte_flow_error_set(error, rte_errno,
2230                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2231                                           "failed to obtain E-Switch info for"
2232                                           " port");
2233         dev_priv = mlx5_dev_to_eswitch_info(dev);
2234         if (!dev_priv)
2235                 return rte_flow_error_set(error, rte_errno,
2236                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2237                                           NULL,
2238                                           "failed to obtain E-Switch info");
2239         if (esw_priv->domain_id != dev_priv->domain_id)
2240                 return rte_flow_error_set(error, EINVAL,
2241                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2242                                           "cannot match on a port from a"
2243                                           " different E-Switch");
2244         return 0;
2245 }
2246
2247 /**
2248  * Validate VLAN item.
2249  *
2250  * @param[in] item
2251  *   Item specification.
2252  * @param[in] item_flags
2253  *   Bit-fields that holds the items detected until now.
2254  * @param[in] dev
2255  *   Ethernet device flow is being created on.
2256  * @param[out] error
2257  *   Pointer to error structure.
2258  *
2259  * @return
2260  *   0 on success, a negative errno value otherwise and rte_errno is set.
2261  */
2262 static int
2263 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2264                            uint64_t item_flags,
2265                            struct rte_eth_dev *dev,
2266                            struct rte_flow_error *error)
2267 {
2268         const struct rte_flow_item_vlan *mask = item->mask;
2269         const struct rte_flow_item_vlan nic_mask = {
2270                 .tci = RTE_BE16(UINT16_MAX),
2271                 .inner_type = RTE_BE16(UINT16_MAX),
2272                 .has_more_vlan = 1,
2273         };
2274         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2275         int ret;
2276         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2277                                         MLX5_FLOW_LAYER_INNER_L4) :
2278                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2279                                         MLX5_FLOW_LAYER_OUTER_L4);
2280         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2281                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2282
2283         if (item_flags & vlanm)
2284                 return rte_flow_error_set(error, EINVAL,
2285                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2286                                           "multiple VLAN layers not supported");
2287         else if ((item_flags & l34m) != 0)
2288                 return rte_flow_error_set(error, EINVAL,
2289                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2290                                           "VLAN cannot follow L3/L4 layer");
2291         if (!mask)
2292                 mask = &rte_flow_item_vlan_mask;
2293         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2294                                         (const uint8_t *)&nic_mask,
2295                                         sizeof(struct rte_flow_item_vlan),
2296                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2297         if (ret)
2298                 return ret;
2299         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2300                 struct mlx5_priv *priv = dev->data->dev_private;
2301
2302                 if (priv->vmwa_context) {
2303                         /*
2304                          * Non-NULL context means we have a virtual machine
2305                          * and SR-IOV enabled, we have to create VLAN interface
2306                          * to make hypervisor to setup E-Switch vport
2307                          * context correctly. We avoid creating the multiple
2308                          * VLAN interfaces, so we cannot support VLAN tag mask.
2309                          */
2310                         return rte_flow_error_set(error, EINVAL,
2311                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2312                                                   item,
2313                                                   "VLAN tag mask is not"
2314                                                   " supported in virtual"
2315                                                   " environment");
2316                 }
2317         }
2318         return 0;
2319 }
2320
2321 /*
2322  * GTP flags are contained in 1 byte of the format:
2323  * -------------------------------------------
2324  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2325  * |-----------------------------------------|
2326  * | value | Version | PT | Res | E | S | PN |
2327  * -------------------------------------------
2328  *
2329  * Matching is supported only for GTP flags E, S, PN.
2330  */
2331 #define MLX5_GTP_FLAGS_MASK     0x07
2332
2333 /**
2334  * Validate GTP item.
2335  *
2336  * @param[in] dev
2337  *   Pointer to the rte_eth_dev structure.
2338  * @param[in] item
2339  *   Item specification.
2340  * @param[in] item_flags
2341  *   Bit-fields that holds the items detected until now.
2342  * @param[out] error
2343  *   Pointer to error structure.
2344  *
2345  * @return
2346  *   0 on success, a negative errno value otherwise and rte_errno is set.
2347  */
2348 static int
2349 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2350                           const struct rte_flow_item *item,
2351                           uint64_t item_flags,
2352                           struct rte_flow_error *error)
2353 {
2354         struct mlx5_priv *priv = dev->data->dev_private;
2355         const struct rte_flow_item_gtp *spec = item->spec;
2356         const struct rte_flow_item_gtp *mask = item->mask;
2357         const struct rte_flow_item_gtp nic_mask = {
2358                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2359                 .msg_type = 0xff,
2360                 .teid = RTE_BE32(0xffffffff),
2361         };
2362
2363         if (!priv->config.hca_attr.tunnel_stateless_gtp)
2364                 return rte_flow_error_set(error, ENOTSUP,
2365                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2366                                           "GTP support is not enabled");
2367         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2368                 return rte_flow_error_set(error, ENOTSUP,
2369                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2370                                           "multiple tunnel layers not"
2371                                           " supported");
2372         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2373                 return rte_flow_error_set(error, EINVAL,
2374                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2375                                           "no outer UDP layer found");
2376         if (!mask)
2377                 mask = &rte_flow_item_gtp_mask;
2378         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2379                 return rte_flow_error_set(error, ENOTSUP,
2380                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2381                                           "Match is supported for GTP"
2382                                           " flags only");
2383         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2384                                          (const uint8_t *)&nic_mask,
2385                                          sizeof(struct rte_flow_item_gtp),
2386                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2387 }
2388
2389 /**
2390  * Validate GTP PSC item.
2391  *
2392  * @param[in] item
2393  *   Item specification.
2394  * @param[in] last_item
2395  *   Previous validated item in the pattern items.
2396  * @param[in] gtp_item
2397  *   Previous GTP item specification.
2398  * @param[in] attr
2399  *   Pointer to flow attributes.
2400  * @param[out] error
2401  *   Pointer to error structure.
2402  *
2403  * @return
2404  *   0 on success, a negative errno value otherwise and rte_errno is set.
2405  */
2406 static int
2407 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2408                               uint64_t last_item,
2409                               const struct rte_flow_item *gtp_item,
2410                               const struct rte_flow_attr *attr,
2411                               struct rte_flow_error *error)
2412 {
2413         const struct rte_flow_item_gtp *gtp_spec;
2414         const struct rte_flow_item_gtp *gtp_mask;
2415         const struct rte_flow_item_gtp_psc *spec;
2416         const struct rte_flow_item_gtp_psc *mask;
2417         const struct rte_flow_item_gtp_psc nic_mask = {
2418                 .pdu_type = 0xFF,
2419                 .qfi = 0xFF,
2420         };
2421
2422         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2423                 return rte_flow_error_set
2424                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2425                          "GTP PSC item must be preceded with GTP item");
2426         gtp_spec = gtp_item->spec;
2427         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2428         /* GTP spec and E flag is requested to match zero. */
2429         if (gtp_spec &&
2430                 (gtp_mask->v_pt_rsv_flags &
2431                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2432                 return rte_flow_error_set
2433                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2434                          "GTP E flag must be 1 to match GTP PSC");
2435         /* Check the flow is not created in group zero. */
2436         if (!attr->transfer && !attr->group)
2437                 return rte_flow_error_set
2438                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2439                          "GTP PSC is not supported for group 0");
2440         /* GTP spec is here and E flag is requested to match zero. */
2441         if (!item->spec)
2442                 return 0;
2443         spec = item->spec;
2444         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2445         if (spec->pdu_type > MLX5_GTP_EXT_MAX_PDU_TYPE)
2446                 return rte_flow_error_set
2447                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2448                          "PDU type should be smaller than 16");
2449         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2450                                          (const uint8_t *)&nic_mask,
2451                                          sizeof(struct rte_flow_item_gtp_psc),
2452                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2453 }
2454
2455 /**
2456  * Validate IPV4 item.
2457  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2458  * add specific validation of fragment_offset field,
2459  *
2460  * @param[in] item
2461  *   Item specification.
2462  * @param[in] item_flags
2463  *   Bit-fields that holds the items detected until now.
2464  * @param[out] error
2465  *   Pointer to error structure.
2466  *
2467  * @return
2468  *   0 on success, a negative errno value otherwise and rte_errno is set.
2469  */
2470 static int
2471 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2472                            const struct rte_flow_item *item,
2473                            uint64_t item_flags, uint64_t last_item,
2474                            uint16_t ether_type, struct rte_flow_error *error)
2475 {
2476         int ret;
2477         struct mlx5_priv *priv = dev->data->dev_private;
2478         const struct rte_flow_item_ipv4 *spec = item->spec;
2479         const struct rte_flow_item_ipv4 *last = item->last;
2480         const struct rte_flow_item_ipv4 *mask = item->mask;
2481         rte_be16_t fragment_offset_spec = 0;
2482         rte_be16_t fragment_offset_last = 0;
2483         struct rte_flow_item_ipv4 nic_ipv4_mask = {
2484                 .hdr = {
2485                         .src_addr = RTE_BE32(0xffffffff),
2486                         .dst_addr = RTE_BE32(0xffffffff),
2487                         .type_of_service = 0xff,
2488                         .fragment_offset = RTE_BE16(0xffff),
2489                         .next_proto_id = 0xff,
2490                         .time_to_live = 0xff,
2491                 },
2492         };
2493
2494         if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2495                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2496                 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2497                                priv->config.hca_attr.inner_ipv4_ihl;
2498                 if (!ihl_cap)
2499                         return rte_flow_error_set(error, ENOTSUP,
2500                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2501                                                   item,
2502                                                   "IPV4 ihl offload not supported");
2503                 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2504         }
2505         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2506                                            ether_type, &nic_ipv4_mask,
2507                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2508         if (ret < 0)
2509                 return ret;
2510         if (spec && mask)
2511                 fragment_offset_spec = spec->hdr.fragment_offset &
2512                                        mask->hdr.fragment_offset;
2513         if (!fragment_offset_spec)
2514                 return 0;
2515         /*
2516          * spec and mask are valid, enforce using full mask to make sure the
2517          * complete value is used correctly.
2518          */
2519         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2520                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2521                 return rte_flow_error_set(error, EINVAL,
2522                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2523                                           item, "must use full mask for"
2524                                           " fragment_offset");
2525         /*
2526          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2527          * indicating this is 1st fragment of fragmented packet.
2528          * This is not yet supported in MLX5, return appropriate error message.
2529          */
2530         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2531                 return rte_flow_error_set(error, ENOTSUP,
2532                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2533                                           "match on first fragment not "
2534                                           "supported");
2535         if (fragment_offset_spec && !last)
2536                 return rte_flow_error_set(error, ENOTSUP,
2537                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2538                                           "specified value not supported");
2539         /* spec and last are valid, validate the specified range. */
2540         fragment_offset_last = last->hdr.fragment_offset &
2541                                mask->hdr.fragment_offset;
2542         /*
2543          * Match on fragment_offset spec 0x2001 and last 0x3fff
2544          * means MF is 1 and frag-offset is > 0.
2545          * This packet is fragment 2nd and onward, excluding last.
2546          * This is not yet supported in MLX5, return appropriate
2547          * error message.
2548          */
2549         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2550             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2551                 return rte_flow_error_set(error, ENOTSUP,
2552                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2553                                           last, "match on following "
2554                                           "fragments not supported");
2555         /*
2556          * Match on fragment_offset spec 0x0001 and last 0x1fff
2557          * means MF is 0 and frag-offset is > 0.
2558          * This packet is last fragment of fragmented packet.
2559          * This is not yet supported in MLX5, return appropriate
2560          * error message.
2561          */
2562         if (fragment_offset_spec == RTE_BE16(1) &&
2563             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2564                 return rte_flow_error_set(error, ENOTSUP,
2565                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2566                                           last, "match on last "
2567                                           "fragment not supported");
2568         /*
2569          * Match on fragment_offset spec 0x0001 and last 0x3fff
2570          * means MF and/or frag-offset is not 0.
2571          * This is a fragmented packet.
2572          * Other range values are invalid and rejected.
2573          */
2574         if (!(fragment_offset_spec == RTE_BE16(1) &&
2575               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2576                 return rte_flow_error_set(error, ENOTSUP,
2577                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2578                                           "specified range not supported");
2579         return 0;
2580 }
2581
2582 /**
2583  * Validate IPV6 fragment extension item.
2584  *
2585  * @param[in] item
2586  *   Item specification.
2587  * @param[in] item_flags
2588  *   Bit-fields that holds the items detected until now.
2589  * @param[out] error
2590  *   Pointer to error structure.
2591  *
2592  * @return
2593  *   0 on success, a negative errno value otherwise and rte_errno is set.
2594  */
2595 static int
2596 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2597                                     uint64_t item_flags,
2598                                     struct rte_flow_error *error)
2599 {
2600         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2601         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2602         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2603         rte_be16_t frag_data_spec = 0;
2604         rte_be16_t frag_data_last = 0;
2605         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2606         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2607                                       MLX5_FLOW_LAYER_OUTER_L4;
2608         int ret = 0;
2609         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2610                 .hdr = {
2611                         .next_header = 0xff,
2612                         .frag_data = RTE_BE16(0xffff),
2613                 },
2614         };
2615
2616         if (item_flags & l4m)
2617                 return rte_flow_error_set(error, EINVAL,
2618                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2619                                           "ipv6 fragment extension item cannot "
2620                                           "follow L4 item.");
2621         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2622             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2623                 return rte_flow_error_set(error, EINVAL,
2624                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2625                                           "ipv6 fragment extension item must "
2626                                           "follow ipv6 item");
2627         if (spec && mask)
2628                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2629         if (!frag_data_spec)
2630                 return 0;
2631         /*
2632          * spec and mask are valid, enforce using full mask to make sure the
2633          * complete value is used correctly.
2634          */
2635         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2636                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2637                 return rte_flow_error_set(error, EINVAL,
2638                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2639                                           item, "must use full mask for"
2640                                           " frag_data");
2641         /*
2642          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2643          * This is 1st fragment of fragmented packet.
2644          */
2645         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2646                 return rte_flow_error_set(error, ENOTSUP,
2647                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2648                                           "match on first fragment not "
2649                                           "supported");
2650         if (frag_data_spec && !last)
2651                 return rte_flow_error_set(error, EINVAL,
2652                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2653                                           "specified value not supported");
2654         ret = mlx5_flow_item_acceptable
2655                                 (item, (const uint8_t *)mask,
2656                                  (const uint8_t *)&nic_mask,
2657                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2658                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2659         if (ret)
2660                 return ret;
2661         /* spec and last are valid, validate the specified range. */
2662         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2663         /*
2664          * Match on frag_data spec 0x0009 and last 0xfff9
2665          * means M is 1 and frag-offset is > 0.
2666          * This packet is fragment 2nd and onward, excluding last.
2667          * This is not yet supported in MLX5, return appropriate
2668          * error message.
2669          */
2670         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2671                                        RTE_IPV6_EHDR_MF_MASK) &&
2672             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2673                 return rte_flow_error_set(error, ENOTSUP,
2674                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2675                                           last, "match on following "
2676                                           "fragments not supported");
2677         /*
2678          * Match on frag_data spec 0x0008 and last 0xfff8
2679          * means M is 0 and frag-offset is > 0.
2680          * This packet is last fragment of fragmented packet.
2681          * This is not yet supported in MLX5, return appropriate
2682          * error message.
2683          */
2684         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2685             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2686                 return rte_flow_error_set(error, ENOTSUP,
2687                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2688                                           last, "match on last "
2689                                           "fragment not supported");
2690         /* Other range values are invalid and rejected. */
2691         return rte_flow_error_set(error, EINVAL,
2692                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2693                                   "specified range not supported");
2694 }
2695
2696 /*
2697  * Validate ASO CT item.
2698  *
2699  * @param[in] dev
2700  *   Pointer to the rte_eth_dev structure.
2701  * @param[in] item
2702  *   Item specification.
2703  * @param[in] item_flags
2704  *   Pointer to bit-fields that holds the items detected until now.
2705  * @param[out] error
2706  *   Pointer to error structure.
2707  *
2708  * @return
2709  *   0 on success, a negative errno value otherwise and rte_errno is set.
2710  */
2711 static int
2712 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2713                              const struct rte_flow_item *item,
2714                              uint64_t *item_flags,
2715                              struct rte_flow_error *error)
2716 {
2717         const struct rte_flow_item_conntrack *spec = item->spec;
2718         const struct rte_flow_item_conntrack *mask = item->mask;
2719         RTE_SET_USED(dev);
2720         uint32_t flags;
2721
2722         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2723                 return rte_flow_error_set(error, EINVAL,
2724                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2725                                           "Only one CT is supported");
2726         if (!mask)
2727                 mask = &rte_flow_item_conntrack_mask;
2728         flags = spec->flags & mask->flags;
2729         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2730             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2731              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2732              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2733                 return rte_flow_error_set(error, EINVAL,
2734                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2735                                           "Conflict status bits");
2736         /* State change also needs to be considered. */
2737         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2738         return 0;
2739 }
2740
2741 /**
2742  * Validate the pop VLAN action.
2743  *
2744  * @param[in] dev
2745  *   Pointer to the rte_eth_dev structure.
2746  * @param[in] action_flags
2747  *   Holds the actions detected until now.
2748  * @param[in] action
2749  *   Pointer to the pop vlan action.
2750  * @param[in] item_flags
2751  *   The items found in this flow rule.
2752  * @param[in] attr
2753  *   Pointer to flow attributes.
2754  * @param[out] error
2755  *   Pointer to error structure.
2756  *
2757  * @return
2758  *   0 on success, a negative errno value otherwise and rte_errno is set.
2759  */
2760 static int
2761 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2762                                  uint64_t action_flags,
2763                                  const struct rte_flow_action *action,
2764                                  uint64_t item_flags,
2765                                  const struct rte_flow_attr *attr,
2766                                  struct rte_flow_error *error)
2767 {
2768         const struct mlx5_priv *priv = dev->data->dev_private;
2769         struct mlx5_dev_ctx_shared *sh = priv->sh;
2770         bool direction_error = false;
2771
2772         if (!priv->sh->pop_vlan_action)
2773                 return rte_flow_error_set(error, ENOTSUP,
2774                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2775                                           NULL,
2776                                           "pop vlan action is not supported");
2777         /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2778         if (attr->transfer) {
2779                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2780                 bool is_cx5 = sh->steering_format_version ==
2781                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2782
2783                 if (fdb_tx && is_cx5)
2784                         direction_error = true;
2785         } else if (attr->egress) {
2786                 direction_error = true;
2787         }
2788         if (direction_error)
2789                 return rte_flow_error_set(error, ENOTSUP,
2790                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2791                                           NULL,
2792                                           "pop vlan action not supported for egress");
2793         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2794                 return rte_flow_error_set(error, ENOTSUP,
2795                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2796                                           "no support for multiple VLAN "
2797                                           "actions");
2798         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2799         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2800             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2801                 return rte_flow_error_set(error, ENOTSUP,
2802                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2803                                           NULL,
2804                                           "cannot pop vlan after decap without "
2805                                           "match on inner vlan in the flow");
2806         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2807         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2808             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2809                 return rte_flow_error_set(error, ENOTSUP,
2810                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2811                                           NULL,
2812                                           "cannot pop vlan without a "
2813                                           "match on (outer) vlan in the flow");
2814         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2815                 return rte_flow_error_set(error, EINVAL,
2816                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2817                                           "wrong action order, port_id should "
2818                                           "be after pop VLAN action");
2819         if (!attr->transfer && priv->representor)
2820                 return rte_flow_error_set(error, ENOTSUP,
2821                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2822                                           "pop vlan action for VF representor "
2823                                           "not supported on NIC table");
2824         return 0;
2825 }
2826
2827 /**
2828  * Get VLAN default info from vlan match info.
2829  *
2830  * @param[in] items
2831  *   the list of item specifications.
2832  * @param[out] vlan
2833  *   pointer VLAN info to fill to.
2834  *
2835  * @return
2836  *   0 on success, a negative errno value otherwise and rte_errno is set.
2837  */
2838 static void
2839 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2840                                   struct rte_vlan_hdr *vlan)
2841 {
2842         const struct rte_flow_item_vlan nic_mask = {
2843                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2844                                 MLX5DV_FLOW_VLAN_VID_MASK),
2845                 .inner_type = RTE_BE16(0xffff),
2846         };
2847
2848         if (items == NULL)
2849                 return;
2850         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2851                 int type = items->type;
2852
2853                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2854                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2855                         break;
2856         }
2857         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2858                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2859                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2860
2861                 /* If VLAN item in pattern doesn't contain data, return here. */
2862                 if (!vlan_v)
2863                         return;
2864                 if (!vlan_m)
2865                         vlan_m = &nic_mask;
2866                 /* Only full match values are accepted */
2867                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2868                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2869                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2870                         vlan->vlan_tci |=
2871                                 rte_be_to_cpu_16(vlan_v->tci &
2872                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2873                 }
2874                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2875                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2876                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2877                         vlan->vlan_tci |=
2878                                 rte_be_to_cpu_16(vlan_v->tci &
2879                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2880                 }
2881                 if (vlan_m->inner_type == nic_mask.inner_type)
2882                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2883                                                            vlan_m->inner_type);
2884         }
2885 }
2886
2887 /**
2888  * Validate the push VLAN action.
2889  *
2890  * @param[in] dev
2891  *   Pointer to the rte_eth_dev structure.
2892  * @param[in] action_flags
2893  *   Holds the actions detected until now.
2894  * @param[in] item_flags
2895  *   The items found in this flow rule.
2896  * @param[in] action
2897  *   Pointer to the action structure.
2898  * @param[in] attr
2899  *   Pointer to flow attributes
2900  * @param[out] error
2901  *   Pointer to error structure.
2902  *
2903  * @return
2904  *   0 on success, a negative errno value otherwise and rte_errno is set.
2905  */
2906 static int
2907 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2908                                   uint64_t action_flags,
2909                                   const struct rte_flow_item_vlan *vlan_m,
2910                                   const struct rte_flow_action *action,
2911                                   const struct rte_flow_attr *attr,
2912                                   struct rte_flow_error *error)
2913 {
2914         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2915         const struct mlx5_priv *priv = dev->data->dev_private;
2916         struct mlx5_dev_ctx_shared *sh = priv->sh;
2917         bool direction_error = false;
2918
2919         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2920             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2921                 return rte_flow_error_set(error, EINVAL,
2922                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2923                                           "invalid vlan ethertype");
2924         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2925                 return rte_flow_error_set(error, EINVAL,
2926                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2927                                           "wrong action order, port_id should "
2928                                           "be after push VLAN");
2929         /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2930         if (attr->transfer) {
2931                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2932                 bool is_cx5 = sh->steering_format_version ==
2933                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2934
2935                 if (!fdb_tx && is_cx5)
2936                         direction_error = true;
2937         } else if (attr->ingress) {
2938                 direction_error = true;
2939         }
2940         if (direction_error)
2941                 return rte_flow_error_set(error, ENOTSUP,
2942                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2943                                           NULL,
2944                                           "push vlan action not supported for ingress");
2945         if (!attr->transfer && priv->representor)
2946                 return rte_flow_error_set(error, ENOTSUP,
2947                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2948                                           "push vlan action for VF representor "
2949                                           "not supported on NIC table");
2950         if (vlan_m &&
2951             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2952             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2953                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2954             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2955             !(mlx5_flow_find_action
2956                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2957                 return rte_flow_error_set(error, EINVAL,
2958                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2959                                           "not full match mask on VLAN PCP and "
2960                                           "there is no of_set_vlan_pcp action, "
2961                                           "push VLAN action cannot figure out "
2962                                           "PCP value");
2963         if (vlan_m &&
2964             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2965             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2966                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2967             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2968             !(mlx5_flow_find_action
2969                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2970                 return rte_flow_error_set(error, EINVAL,
2971                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2972                                           "not full match mask on VLAN VID and "
2973                                           "there is no of_set_vlan_vid action, "
2974                                           "push VLAN action cannot figure out "
2975                                           "VID value");
2976         (void)attr;
2977         return 0;
2978 }
2979
2980 /**
2981  * Validate the set VLAN PCP.
2982  *
2983  * @param[in] action_flags
2984  *   Holds the actions detected until now.
2985  * @param[in] actions
2986  *   Pointer to the list of actions remaining in the flow rule.
2987  * @param[out] error
2988  *   Pointer to error structure.
2989  *
2990  * @return
2991  *   0 on success, a negative errno value otherwise and rte_errno is set.
2992  */
2993 static int
2994 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2995                                      const struct rte_flow_action actions[],
2996                                      struct rte_flow_error *error)
2997 {
2998         const struct rte_flow_action *action = actions;
2999         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
3000
3001         if (conf->vlan_pcp > 7)
3002                 return rte_flow_error_set(error, EINVAL,
3003                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3004                                           "VLAN PCP value is too big");
3005         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
3006                 return rte_flow_error_set(error, ENOTSUP,
3007                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3008                                           "set VLAN PCP action must follow "
3009                                           "the push VLAN action");
3010         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
3011                 return rte_flow_error_set(error, ENOTSUP,
3012                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3013                                           "Multiple VLAN PCP modification are "
3014                                           "not supported");
3015         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3016                 return rte_flow_error_set(error, EINVAL,
3017                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3018                                           "wrong action order, port_id should "
3019                                           "be after set VLAN PCP");
3020         return 0;
3021 }
3022
3023 /**
3024  * Validate the set VLAN VID.
3025  *
3026  * @param[in] item_flags
3027  *   Holds the items detected in this rule.
3028  * @param[in] action_flags
3029  *   Holds the actions detected until now.
3030  * @param[in] actions
3031  *   Pointer to the list of actions remaining in the flow rule.
3032  * @param[out] error
3033  *   Pointer to error structure.
3034  *
3035  * @return
3036  *   0 on success, a negative errno value otherwise and rte_errno is set.
3037  */
3038 static int
3039 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3040                                      uint64_t action_flags,
3041                                      const struct rte_flow_action actions[],
3042                                      struct rte_flow_error *error)
3043 {
3044         const struct rte_flow_action *action = actions;
3045         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3046
3047         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3048                 return rte_flow_error_set(error, EINVAL,
3049                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3050                                           "VLAN VID value is too big");
3051         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3052             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3053                 return rte_flow_error_set(error, ENOTSUP,
3054                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3055                                           "set VLAN VID action must follow push"
3056                                           " VLAN action or match on VLAN item");
3057         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3058                 return rte_flow_error_set(error, ENOTSUP,
3059                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3060                                           "Multiple VLAN VID modifications are "
3061                                           "not supported");
3062         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3063                 return rte_flow_error_set(error, EINVAL,
3064                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3065                                           "wrong action order, port_id should "
3066                                           "be after set VLAN VID");
3067         return 0;
3068 }
3069
3070 /*
3071  * Validate the FLAG action.
3072  *
3073  * @param[in] dev
3074  *   Pointer to the rte_eth_dev structure.
3075  * @param[in] action_flags
3076  *   Holds the actions detected until now.
3077  * @param[in] attr
3078  *   Pointer to flow attributes
3079  * @param[out] error
3080  *   Pointer to error structure.
3081  *
3082  * @return
3083  *   0 on success, a negative errno value otherwise and rte_errno is set.
3084  */
3085 static int
3086 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3087                              uint64_t action_flags,
3088                              const struct rte_flow_attr *attr,
3089                              struct rte_flow_error *error)
3090 {
3091         struct mlx5_priv *priv = dev->data->dev_private;
3092         struct mlx5_dev_config *config = &priv->config;
3093         int ret;
3094
3095         /* Fall back if no extended metadata register support. */
3096         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3097                 return mlx5_flow_validate_action_flag(action_flags, attr,
3098                                                       error);
3099         /* Extensive metadata mode requires registers. */
3100         if (!mlx5_flow_ext_mreg_supported(dev))
3101                 return rte_flow_error_set(error, ENOTSUP,
3102                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3103                                           "no metadata registers "
3104                                           "to support flag action");
3105         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3106                 return rte_flow_error_set(error, ENOTSUP,
3107                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3108                                           "extended metadata register"
3109                                           " isn't available");
3110         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3111         if (ret < 0)
3112                 return ret;
3113         MLX5_ASSERT(ret > 0);
3114         if (action_flags & MLX5_FLOW_ACTION_MARK)
3115                 return rte_flow_error_set(error, EINVAL,
3116                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3117                                           "can't mark and flag in same flow");
3118         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3119                 return rte_flow_error_set(error, EINVAL,
3120                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3121                                           "can't have 2 flag"
3122                                           " actions in same flow");
3123         return 0;
3124 }
3125
3126 /**
3127  * Validate MARK action.
3128  *
3129  * @param[in] dev
3130  *   Pointer to the rte_eth_dev structure.
3131  * @param[in] action
3132  *   Pointer to action.
3133  * @param[in] action_flags
3134  *   Holds the actions detected until now.
3135  * @param[in] attr
3136  *   Pointer to flow attributes
3137  * @param[out] error
3138  *   Pointer to error structure.
3139  *
3140  * @return
3141  *   0 on success, a negative errno value otherwise and rte_errno is set.
3142  */
3143 static int
3144 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3145                              const struct rte_flow_action *action,
3146                              uint64_t action_flags,
3147                              const struct rte_flow_attr *attr,
3148                              struct rte_flow_error *error)
3149 {
3150         struct mlx5_priv *priv = dev->data->dev_private;
3151         struct mlx5_dev_config *config = &priv->config;
3152         const struct rte_flow_action_mark *mark = action->conf;
3153         int ret;
3154
3155         if (is_tunnel_offload_active(dev))
3156                 return rte_flow_error_set(error, ENOTSUP,
3157                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3158                                           "no mark action "
3159                                           "if tunnel offload active");
3160         /* Fall back if no extended metadata register support. */
3161         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3162                 return mlx5_flow_validate_action_mark(action, action_flags,
3163                                                       attr, error);
3164         /* Extensive metadata mode requires registers. */
3165         if (!mlx5_flow_ext_mreg_supported(dev))
3166                 return rte_flow_error_set(error, ENOTSUP,
3167                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3168                                           "no metadata registers "
3169                                           "to support mark action");
3170         if (!priv->sh->dv_mark_mask)
3171                 return rte_flow_error_set(error, ENOTSUP,
3172                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3173                                           "extended metadata register"
3174                                           " isn't available");
3175         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3176         if (ret < 0)
3177                 return ret;
3178         MLX5_ASSERT(ret > 0);
3179         if (!mark)
3180                 return rte_flow_error_set(error, EINVAL,
3181                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3182                                           "configuration cannot be null");
3183         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3184                 return rte_flow_error_set(error, EINVAL,
3185                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3186                                           &mark->id,
3187                                           "mark id exceeds the limit");
3188         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3189                 return rte_flow_error_set(error, EINVAL,
3190                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3191                                           "can't flag and mark in same flow");
3192         if (action_flags & MLX5_FLOW_ACTION_MARK)
3193                 return rte_flow_error_set(error, EINVAL,
3194                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3195                                           "can't have 2 mark actions in same"
3196                                           " flow");
3197         return 0;
3198 }
3199
3200 /**
3201  * Validate SET_META action.
3202  *
3203  * @param[in] dev
3204  *   Pointer to the rte_eth_dev structure.
3205  * @param[in] action
3206  *   Pointer to the action structure.
3207  * @param[in] action_flags
3208  *   Holds the actions detected until now.
3209  * @param[in] attr
3210  *   Pointer to flow attributes
3211  * @param[out] error
3212  *   Pointer to error structure.
3213  *
3214  * @return
3215  *   0 on success, a negative errno value otherwise and rte_errno is set.
3216  */
3217 static int
3218 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3219                                  const struct rte_flow_action *action,
3220                                  uint64_t action_flags __rte_unused,
3221                                  const struct rte_flow_attr *attr,
3222                                  struct rte_flow_error *error)
3223 {
3224         const struct rte_flow_action_set_meta *conf;
3225         uint32_t nic_mask = UINT32_MAX;
3226         int reg;
3227
3228         if (!mlx5_flow_ext_mreg_supported(dev))
3229                 return rte_flow_error_set(error, ENOTSUP,
3230                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3231                                           "extended metadata register"
3232                                           " isn't supported");
3233         reg = flow_dv_get_metadata_reg(dev, attr, error);
3234         if (reg < 0)
3235                 return reg;
3236         if (reg == REG_NON)
3237                 return rte_flow_error_set(error, ENOTSUP,
3238                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3239                                           "unavalable extended metadata register");
3240         if (reg != REG_A && reg != REG_B) {
3241                 struct mlx5_priv *priv = dev->data->dev_private;
3242
3243                 nic_mask = priv->sh->dv_meta_mask;
3244         }
3245         if (!(action->conf))
3246                 return rte_flow_error_set(error, EINVAL,
3247                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3248                                           "configuration cannot be null");
3249         conf = (const struct rte_flow_action_set_meta *)action->conf;
3250         if (!conf->mask)
3251                 return rte_flow_error_set(error, EINVAL,
3252                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3253                                           "zero mask doesn't have any effect");
3254         if (conf->mask & ~nic_mask)
3255                 return rte_flow_error_set(error, EINVAL,
3256                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3257                                           "meta data must be within reg C0");
3258         return 0;
3259 }
3260
3261 /**
3262  * Validate SET_TAG action.
3263  *
3264  * @param[in] dev
3265  *   Pointer to the rte_eth_dev structure.
3266  * @param[in] action
3267  *   Pointer to the action structure.
3268  * @param[in] action_flags
3269  *   Holds the actions detected until now.
3270  * @param[in] attr
3271  *   Pointer to flow attributes
3272  * @param[out] error
3273  *   Pointer to error structure.
3274  *
3275  * @return
3276  *   0 on success, a negative errno value otherwise and rte_errno is set.
3277  */
3278 static int
3279 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3280                                 const struct rte_flow_action *action,
3281                                 uint64_t action_flags,
3282                                 const struct rte_flow_attr *attr,
3283                                 struct rte_flow_error *error)
3284 {
3285         const struct rte_flow_action_set_tag *conf;
3286         const uint64_t terminal_action_flags =
3287                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3288                 MLX5_FLOW_ACTION_RSS;
3289         int ret;
3290
3291         if (!mlx5_flow_ext_mreg_supported(dev))
3292                 return rte_flow_error_set(error, ENOTSUP,
3293                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3294                                           "extensive metadata register"
3295                                           " isn't supported");
3296         if (!(action->conf))
3297                 return rte_flow_error_set(error, EINVAL,
3298                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3299                                           "configuration cannot be null");
3300         conf = (const struct rte_flow_action_set_tag *)action->conf;
3301         if (!conf->mask)
3302                 return rte_flow_error_set(error, EINVAL,
3303                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3304                                           "zero mask doesn't have any effect");
3305         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3306         if (ret < 0)
3307                 return ret;
3308         if (!attr->transfer && attr->ingress &&
3309             (action_flags & terminal_action_flags))
3310                 return rte_flow_error_set(error, EINVAL,
3311                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3312                                           "set_tag has no effect"
3313                                           " with terminal actions");
3314         return 0;
3315 }
3316
3317 /**
3318  * Check if action counter is shared by either old or new mechanism.
3319  *
3320  * @param[in] action
3321  *   Pointer to the action structure.
3322  *
3323  * @return
3324  *   True when counter is shared, false otherwise.
3325  */
3326 static inline bool
3327 is_shared_action_count(const struct rte_flow_action *action)
3328 {
3329         const struct rte_flow_action_count *count =
3330                         (const struct rte_flow_action_count *)action->conf;
3331
3332         if ((int)action->type == MLX5_RTE_FLOW_ACTION_TYPE_COUNT)
3333                 return true;
3334         return !!(count && count->shared);
3335 }
3336
3337 /**
3338  * Validate count action.
3339  *
3340  * @param[in] dev
3341  *   Pointer to rte_eth_dev structure.
3342  * @param[in] shared
3343  *   Indicator if action is shared.
3344  * @param[in] action_flags
3345  *   Holds the actions detected until now.
3346  * @param[out] error
3347  *   Pointer to error structure.
3348  *
3349  * @return
3350  *   0 on success, a negative errno value otherwise and rte_errno is set.
3351  */
3352 static int
3353 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3354                               uint64_t action_flags,
3355                               struct rte_flow_error *error)
3356 {
3357         struct mlx5_priv *priv = dev->data->dev_private;
3358
3359         if (!priv->config.devx)
3360                 goto notsup_err;
3361         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3362                 return rte_flow_error_set(error, EINVAL,
3363                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3364                                           "duplicate count actions set");
3365         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3366             !priv->sh->flow_hit_aso_en)
3367                 return rte_flow_error_set(error, EINVAL,
3368                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3369                                           "old age and shared count combination is not supported");
3370 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3371         return 0;
3372 #endif
3373 notsup_err:
3374         return rte_flow_error_set
3375                       (error, ENOTSUP,
3376                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3377                        NULL,
3378                        "count action not supported");
3379 }
3380
3381 /**
3382  * Validate the L2 encap action.
3383  *
3384  * @param[in] dev
3385  *   Pointer to the rte_eth_dev structure.
3386  * @param[in] action_flags
3387  *   Holds the actions detected until now.
3388  * @param[in] action
3389  *   Pointer to the action structure.
3390  * @param[in] attr
3391  *   Pointer to flow attributes.
3392  * @param[out] error
3393  *   Pointer to error structure.
3394  *
3395  * @return
3396  *   0 on success, a negative errno value otherwise and rte_errno is set.
3397  */
3398 static int
3399 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3400                                  uint64_t action_flags,
3401                                  const struct rte_flow_action *action,
3402                                  const struct rte_flow_attr *attr,
3403                                  struct rte_flow_error *error)
3404 {
3405         const struct mlx5_priv *priv = dev->data->dev_private;
3406
3407         if (!(action->conf))
3408                 return rte_flow_error_set(error, EINVAL,
3409                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3410                                           "configuration cannot be null");
3411         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3412                 return rte_flow_error_set(error, EINVAL,
3413                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3414                                           "can only have a single encap action "
3415                                           "in a flow");
3416         if (!attr->transfer && priv->representor)
3417                 return rte_flow_error_set(error, ENOTSUP,
3418                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3419                                           "encap action for VF representor "
3420                                           "not supported on NIC table");
3421         return 0;
3422 }
3423
3424 /**
3425  * Validate a decap action.
3426  *
3427  * @param[in] dev
3428  *   Pointer to the rte_eth_dev structure.
3429  * @param[in] action_flags
3430  *   Holds the actions detected until now.
3431  * @param[in] action
3432  *   Pointer to the action structure.
3433  * @param[in] item_flags
3434  *   Holds the items detected.
3435  * @param[in] attr
3436  *   Pointer to flow attributes
3437  * @param[out] error
3438  *   Pointer to error structure.
3439  *
3440  * @return
3441  *   0 on success, a negative errno value otherwise and rte_errno is set.
3442  */
3443 static int
3444 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3445                               uint64_t action_flags,
3446                               const struct rte_flow_action *action,
3447                               const uint64_t item_flags,
3448                               const struct rte_flow_attr *attr,
3449                               struct rte_flow_error *error)
3450 {
3451         const struct mlx5_priv *priv = dev->data->dev_private;
3452
3453         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3454             !priv->config.decap_en)
3455                 return rte_flow_error_set(error, ENOTSUP,
3456                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3457                                           "decap is not enabled");
3458         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3459                 return rte_flow_error_set(error, ENOTSUP,
3460                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3461                                           action_flags &
3462                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3463                                           "have a single decap action" : "decap "
3464                                           "after encap is not supported");
3465         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3466                 return rte_flow_error_set(error, EINVAL,
3467                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3468                                           "can't have decap action after"
3469                                           " modify action");
3470         if (attr->egress)
3471                 return rte_flow_error_set(error, ENOTSUP,
3472                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3473                                           NULL,
3474                                           "decap action not supported for "
3475                                           "egress");
3476         if (!attr->transfer && priv->representor)
3477                 return rte_flow_error_set(error, ENOTSUP,
3478                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3479                                           "decap action for VF representor "
3480                                           "not supported on NIC table");
3481         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3482             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3483                 return rte_flow_error_set(error, ENOTSUP,
3484                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3485                                 "VXLAN item should be present for VXLAN decap");
3486         return 0;
3487 }
3488
3489 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3490
3491 /**
3492  * Validate the raw encap and decap actions.
3493  *
3494  * @param[in] dev
3495  *   Pointer to the rte_eth_dev structure.
3496  * @param[in] decap
3497  *   Pointer to the decap action.
3498  * @param[in] encap
3499  *   Pointer to the encap action.
3500  * @param[in] attr
3501  *   Pointer to flow attributes
3502  * @param[in/out] action_flags
3503  *   Holds the actions detected until now.
3504  * @param[out] actions_n
3505  *   pointer to the number of actions counter.
3506  * @param[in] action
3507  *   Pointer to the action structure.
3508  * @param[in] item_flags
3509  *   Holds the items detected.
3510  * @param[out] error
3511  *   Pointer to error structure.
3512  *
3513  * @return
3514  *   0 on success, a negative errno value otherwise and rte_errno is set.
3515  */
3516 static int
3517 flow_dv_validate_action_raw_encap_decap
3518         (struct rte_eth_dev *dev,
3519          const struct rte_flow_action_raw_decap *decap,
3520          const struct rte_flow_action_raw_encap *encap,
3521          const struct rte_flow_attr *attr, uint64_t *action_flags,
3522          int *actions_n, const struct rte_flow_action *action,
3523          uint64_t item_flags, struct rte_flow_error *error)
3524 {
3525         const struct mlx5_priv *priv = dev->data->dev_private;
3526         int ret;
3527
3528         if (encap && (!encap->size || !encap->data))
3529                 return rte_flow_error_set(error, EINVAL,
3530                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3531                                           "raw encap data cannot be empty");
3532         if (decap && encap) {
3533                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3534                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3535                         /* L3 encap. */
3536                         decap = NULL;
3537                 else if (encap->size <=
3538                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3539                            decap->size >
3540                            MLX5_ENCAPSULATION_DECISION_SIZE)
3541                         /* L3 decap. */
3542                         encap = NULL;
3543                 else if (encap->size >
3544                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3545                            decap->size >
3546                            MLX5_ENCAPSULATION_DECISION_SIZE)
3547                         /* 2 L2 actions: encap and decap. */
3548                         ;
3549                 else
3550                         return rte_flow_error_set(error,
3551                                 ENOTSUP,
3552                                 RTE_FLOW_ERROR_TYPE_ACTION,
3553                                 NULL, "unsupported too small "
3554                                 "raw decap and too small raw "
3555                                 "encap combination");
3556         }
3557         if (decap) {
3558                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3559                                                     item_flags, attr, error);
3560                 if (ret < 0)
3561                         return ret;
3562                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3563                 ++(*actions_n);
3564         }
3565         if (encap) {
3566                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3567                         return rte_flow_error_set(error, ENOTSUP,
3568                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3569                                                   NULL,
3570                                                   "small raw encap size");
3571                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3572                         return rte_flow_error_set(error, EINVAL,
3573                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3574                                                   NULL,
3575                                                   "more than one encap action");
3576                 if (!attr->transfer && priv->representor)
3577                         return rte_flow_error_set
3578                                         (error, ENOTSUP,
3579                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3580                                          "encap action for VF representor "
3581                                          "not supported on NIC table");
3582                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3583                 ++(*actions_n);
3584         }
3585         return 0;
3586 }
3587
3588 /*
3589  * Validate the ASO CT action.
3590  *
3591  * @param[in] dev
3592  *   Pointer to the rte_eth_dev structure.
3593  * @param[in] action_flags
3594  *   Holds the actions detected until now.
3595  * @param[in] item_flags
3596  *   The items found in this flow rule.
3597  * @param[in] attr
3598  *   Pointer to flow attributes.
3599  * @param[out] error
3600  *   Pointer to error structure.
3601  *
3602  * @return
3603  *   0 on success, a negative errno value otherwise and rte_errno is set.
3604  */
3605 static int
3606 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3607                                uint64_t action_flags,
3608                                uint64_t item_flags,
3609                                const struct rte_flow_attr *attr,
3610                                struct rte_flow_error *error)
3611 {
3612         RTE_SET_USED(dev);
3613
3614         if (attr->group == 0 && !attr->transfer)
3615                 return rte_flow_error_set(error, ENOTSUP,
3616                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3617                                           NULL,
3618                                           "Only support non-root table");
3619         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3620                 return rte_flow_error_set(error, ENOTSUP,
3621                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3622                                           "CT cannot follow a fate action");
3623         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3624             (action_flags & MLX5_FLOW_ACTION_AGE))
3625                 return rte_flow_error_set(error, EINVAL,
3626                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3627                                           "Only one ASO action is supported");
3628         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3629                 return rte_flow_error_set(error, EINVAL,
3630                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3631                                           "Encap cannot exist before CT");
3632         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3633                 return rte_flow_error_set(error, EINVAL,
3634                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3635                                           "Not a outer TCP packet");
3636         return 0;
3637 }
3638
3639 int
3640 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3641                              struct mlx5_list_entry *entry, void *cb_ctx)
3642 {
3643         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3644         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3645         struct mlx5_flow_dv_encap_decap_resource *resource;
3646
3647         resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3648                                 entry);
3649         if (resource->reformat_type == ctx_resource->reformat_type &&
3650             resource->ft_type == ctx_resource->ft_type &&
3651             resource->flags == ctx_resource->flags &&
3652             resource->size == ctx_resource->size &&
3653             !memcmp((const void *)resource->buf,
3654                     (const void *)ctx_resource->buf,
3655                     resource->size))
3656                 return 0;
3657         return -1;
3658 }
3659
3660 struct mlx5_list_entry *
3661 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3662 {
3663         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3664         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3665         struct mlx5dv_dr_domain *domain;
3666         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3667         struct mlx5_flow_dv_encap_decap_resource *resource;
3668         uint32_t idx;
3669         int ret;
3670
3671         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3672                 domain = sh->fdb_domain;
3673         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3674                 domain = sh->rx_domain;
3675         else
3676                 domain = sh->tx_domain;
3677         /* Register new encap/decap resource. */
3678         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3679         if (!resource) {
3680                 rte_flow_error_set(ctx->error, ENOMEM,
3681                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3682                                    "cannot allocate resource memory");
3683                 return NULL;
3684         }
3685         *resource = *ctx_resource;
3686         resource->idx = idx;
3687         ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->ctx, domain,
3688                                                               resource,
3689                                                              &resource->action);
3690         if (ret) {
3691                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3692                 rte_flow_error_set(ctx->error, ENOMEM,
3693                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3694                                    NULL, "cannot create action");
3695                 return NULL;
3696         }
3697
3698         return &resource->entry;
3699 }
3700
3701 struct mlx5_list_entry *
3702 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3703                              void *cb_ctx)
3704 {
3705         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3706         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3707         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3708         uint32_t idx;
3709
3710         cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3711                                            &idx);
3712         if (!cache_resource) {
3713                 rte_flow_error_set(ctx->error, ENOMEM,
3714                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3715                                    "cannot allocate resource memory");
3716                 return NULL;
3717         }
3718         memcpy(cache_resource, oentry, sizeof(*cache_resource));
3719         cache_resource->idx = idx;
3720         return &cache_resource->entry;
3721 }
3722
3723 void
3724 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3725 {
3726         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3727         struct mlx5_flow_dv_encap_decap_resource *res =
3728                                        container_of(entry, typeof(*res), entry);
3729
3730         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3731 }
3732
3733 /**
3734  * Find existing encap/decap resource or create and register a new one.
3735  *
3736  * @param[in, out] dev
3737  *   Pointer to rte_eth_dev structure.
3738  * @param[in, out] resource
3739  *   Pointer to encap/decap resource.
3740  * @parm[in, out] dev_flow
3741  *   Pointer to the dev_flow.
3742  * @param[out] error
3743  *   pointer to error structure.
3744  *
3745  * @return
3746  *   0 on success otherwise -errno and errno is set.
3747  */
3748 static int
3749 flow_dv_encap_decap_resource_register
3750                         (struct rte_eth_dev *dev,
3751                          struct mlx5_flow_dv_encap_decap_resource *resource,
3752                          struct mlx5_flow *dev_flow,
3753                          struct rte_flow_error *error)
3754 {
3755         struct mlx5_priv *priv = dev->data->dev_private;
3756         struct mlx5_dev_ctx_shared *sh = priv->sh;
3757         struct mlx5_list_entry *entry;
3758         union {
3759                 struct {
3760                         uint32_t ft_type:8;
3761                         uint32_t refmt_type:8;
3762                         /*
3763                          * Header reformat actions can be shared between
3764                          * non-root tables. One bit to indicate non-root
3765                          * table or not.
3766                          */
3767                         uint32_t is_root:1;
3768                         uint32_t reserve:15;
3769                 };
3770                 uint32_t v32;
3771         } encap_decap_key = {
3772                 {
3773                         .ft_type = resource->ft_type,
3774                         .refmt_type = resource->reformat_type,
3775                         .is_root = !!dev_flow->dv.group,
3776                         .reserve = 0,
3777                 }
3778         };
3779         struct mlx5_flow_cb_ctx ctx = {
3780                 .error = error,
3781                 .data = resource,
3782         };
3783         struct mlx5_hlist *encaps_decaps;
3784         uint64_t key64;
3785
3786         encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3787                                 "encaps_decaps",
3788                                 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3789                                 true, true, sh,
3790                                 flow_dv_encap_decap_create_cb,
3791                                 flow_dv_encap_decap_match_cb,
3792                                 flow_dv_encap_decap_remove_cb,
3793                                 flow_dv_encap_decap_clone_cb,
3794                                 flow_dv_encap_decap_clone_free_cb);
3795         if (unlikely(!encaps_decaps))
3796                 return -rte_errno;
3797         resource->flags = dev_flow->dv.group ? 0 : 1;
3798         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3799                                  sizeof(encap_decap_key.v32), 0);
3800         if (resource->reformat_type !=
3801             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3802             resource->size)
3803                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3804         entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3805         if (!entry)
3806                 return -rte_errno;
3807         resource = container_of(entry, typeof(*resource), entry);
3808         dev_flow->dv.encap_decap = resource;
3809         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3810         return 0;
3811 }
3812
3813 /**
3814  * Find existing table jump resource or create and register a new one.
3815  *
3816  * @param[in, out] dev
3817  *   Pointer to rte_eth_dev structure.
3818  * @param[in, out] tbl
3819  *   Pointer to flow table resource.
3820  * @parm[in, out] dev_flow
3821  *   Pointer to the dev_flow.
3822  * @param[out] error
3823  *   pointer to error structure.
3824  *
3825  * @return
3826  *   0 on success otherwise -errno and errno is set.
3827  */
3828 static int
3829 flow_dv_jump_tbl_resource_register
3830                         (struct rte_eth_dev *dev __rte_unused,
3831                          struct mlx5_flow_tbl_resource *tbl,
3832                          struct mlx5_flow *dev_flow,
3833                          struct rte_flow_error *error __rte_unused)
3834 {
3835         struct mlx5_flow_tbl_data_entry *tbl_data =
3836                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3837
3838         MLX5_ASSERT(tbl);
3839         MLX5_ASSERT(tbl_data->jump.action);
3840         dev_flow->handle->rix_jump = tbl_data->idx;
3841         dev_flow->dv.jump = &tbl_data->jump;
3842         return 0;
3843 }
3844
3845 int
3846 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3847                          struct mlx5_list_entry *entry, void *cb_ctx)
3848 {
3849         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3850         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3851         struct mlx5_flow_dv_port_id_action_resource *res =
3852                                        container_of(entry, typeof(*res), entry);
3853
3854         return ref->port_id != res->port_id;
3855 }
3856
3857 struct mlx5_list_entry *
3858 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3859 {
3860         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3861         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3862         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3863         struct mlx5_flow_dv_port_id_action_resource *resource;
3864         uint32_t idx;
3865         int ret;
3866
3867         /* Register new port id action resource. */
3868         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3869         if (!resource) {
3870                 rte_flow_error_set(ctx->error, ENOMEM,
3871                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3872                                    "cannot allocate port_id action memory");
3873                 return NULL;
3874         }
3875         *resource = *ref;
3876         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3877                                                         ref->port_id,
3878                                                         &resource->action);
3879         if (ret) {
3880                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3881                 rte_flow_error_set(ctx->error, ENOMEM,
3882                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3883                                    "cannot create action");
3884                 return NULL;
3885         }
3886         resource->idx = idx;
3887         return &resource->entry;
3888 }
3889
3890 struct mlx5_list_entry *
3891 flow_dv_port_id_clone_cb(void *tool_ctx,
3892                          struct mlx5_list_entry *entry __rte_unused,
3893                          void *cb_ctx)
3894 {
3895         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3896         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3897         struct mlx5_flow_dv_port_id_action_resource *resource;
3898         uint32_t idx;
3899
3900         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3901         if (!resource) {
3902                 rte_flow_error_set(ctx->error, ENOMEM,
3903                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3904                                    "cannot allocate port_id action memory");
3905                 return NULL;
3906         }
3907         memcpy(resource, entry, sizeof(*resource));
3908         resource->idx = idx;
3909         return &resource->entry;
3910 }
3911
3912 void
3913 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3914 {
3915         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3916         struct mlx5_flow_dv_port_id_action_resource *resource =
3917                                   container_of(entry, typeof(*resource), entry);
3918
3919         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3920 }
3921
3922 /**
3923  * Find existing table port ID resource or create and register a new one.
3924  *
3925  * @param[in, out] dev
3926  *   Pointer to rte_eth_dev structure.
3927  * @param[in, out] ref
3928  *   Pointer to port ID action resource reference.
3929  * @parm[in, out] dev_flow
3930  *   Pointer to the dev_flow.
3931  * @param[out] error
3932  *   pointer to error structure.
3933  *
3934  * @return
3935  *   0 on success otherwise -errno and errno is set.
3936  */
3937 static int
3938 flow_dv_port_id_action_resource_register
3939                         (struct rte_eth_dev *dev,
3940                          struct mlx5_flow_dv_port_id_action_resource *ref,
3941                          struct mlx5_flow *dev_flow,
3942                          struct rte_flow_error *error)
3943 {
3944         struct mlx5_priv *priv = dev->data->dev_private;
3945         struct mlx5_list_entry *entry;
3946         struct mlx5_flow_dv_port_id_action_resource *resource;
3947         struct mlx5_flow_cb_ctx ctx = {
3948                 .error = error,
3949                 .data = ref,
3950         };
3951
3952         entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3953         if (!entry)
3954                 return -rte_errno;
3955         resource = container_of(entry, typeof(*resource), entry);
3956         dev_flow->dv.port_id_action = resource;
3957         dev_flow->handle->rix_port_id_action = resource->idx;
3958         return 0;
3959 }
3960
3961 int
3962 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3963                            struct mlx5_list_entry *entry, void *cb_ctx)
3964 {
3965         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3966         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3967         struct mlx5_flow_dv_push_vlan_action_resource *res =
3968                                        container_of(entry, typeof(*res), entry);
3969
3970         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3971 }
3972
3973 struct mlx5_list_entry *
3974 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3975 {
3976         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3977         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3978         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3979         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3980         struct mlx5dv_dr_domain *domain;
3981         uint32_t idx;
3982         int ret;
3983
3984         /* Register new port id action resource. */
3985         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3986         if (!resource) {
3987                 rte_flow_error_set(ctx->error, ENOMEM,
3988                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3989                                    "cannot allocate push_vlan action memory");
3990                 return NULL;
3991         }
3992         *resource = *ref;
3993         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3994                 domain = sh->fdb_domain;
3995         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3996                 domain = sh->rx_domain;
3997         else
3998                 domain = sh->tx_domain;
3999         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
4000                                                         &resource->action);
4001         if (ret) {
4002                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
4003                 rte_flow_error_set(ctx->error, ENOMEM,
4004                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4005                                    "cannot create push vlan action");
4006                 return NULL;
4007         }
4008         resource->idx = idx;
4009         return &resource->entry;
4010 }
4011
4012 struct mlx5_list_entry *
4013 flow_dv_push_vlan_clone_cb(void *tool_ctx,
4014                            struct mlx5_list_entry *entry __rte_unused,
4015                            void *cb_ctx)
4016 {
4017         struct mlx5_dev_ctx_shared *sh = tool_ctx;
4018         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4019         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4020         uint32_t idx;
4021
4022         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
4023         if (!resource) {
4024                 rte_flow_error_set(ctx->error, ENOMEM,
4025                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4026                                    "cannot allocate push_vlan action memory");
4027                 return NULL;
4028         }
4029         memcpy(resource, entry, sizeof(*resource));
4030         resource->idx = idx;
4031         return &resource->entry;
4032 }
4033
4034 void
4035 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4036 {
4037         struct mlx5_dev_ctx_shared *sh = tool_ctx;
4038         struct mlx5_flow_dv_push_vlan_action_resource *resource =
4039                                   container_of(entry, typeof(*resource), entry);
4040
4041         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
4042 }
4043
4044 /**
4045  * Find existing push vlan resource or create and register a new one.
4046  *
4047  * @param [in, out] dev
4048  *   Pointer to rte_eth_dev structure.
4049  * @param[in, out] ref
4050  *   Pointer to port ID action resource reference.
4051  * @parm[in, out] dev_flow
4052  *   Pointer to the dev_flow.
4053  * @param[out] error
4054  *   pointer to error structure.
4055  *
4056  * @return
4057  *   0 on success otherwise -errno and errno is set.
4058  */
4059 static int
4060 flow_dv_push_vlan_action_resource_register
4061                        (struct rte_eth_dev *dev,
4062                         struct mlx5_flow_dv_push_vlan_action_resource *ref,
4063                         struct mlx5_flow *dev_flow,
4064                         struct rte_flow_error *error)
4065 {
4066         struct mlx5_priv *priv = dev->data->dev_private;
4067         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4068         struct mlx5_list_entry *entry;
4069         struct mlx5_flow_cb_ctx ctx = {
4070                 .error = error,
4071                 .data = ref,
4072         };
4073
4074         entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4075         if (!entry)
4076                 return -rte_errno;
4077         resource = container_of(entry, typeof(*resource), entry);
4078
4079         dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4080         dev_flow->dv.push_vlan_res = resource;
4081         return 0;
4082 }
4083
4084 /**
4085  * Get the size of specific rte_flow_item_type hdr size
4086  *
4087  * @param[in] item_type
4088  *   Tested rte_flow_item_type.
4089  *
4090  * @return
4091  *   sizeof struct item_type, 0 if void or irrelevant.
4092  */
4093 static size_t
4094 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4095 {
4096         size_t retval;
4097
4098         switch (item_type) {
4099         case RTE_FLOW_ITEM_TYPE_ETH:
4100                 retval = sizeof(struct rte_ether_hdr);
4101                 break;
4102         case RTE_FLOW_ITEM_TYPE_VLAN:
4103                 retval = sizeof(struct rte_vlan_hdr);
4104                 break;
4105         case RTE_FLOW_ITEM_TYPE_IPV4:
4106                 retval = sizeof(struct rte_ipv4_hdr);
4107                 break;
4108         case RTE_FLOW_ITEM_TYPE_IPV6:
4109                 retval = sizeof(struct rte_ipv6_hdr);
4110                 break;
4111         case RTE_FLOW_ITEM_TYPE_UDP:
4112                 retval = sizeof(struct rte_udp_hdr);
4113                 break;
4114         case RTE_FLOW_ITEM_TYPE_TCP:
4115                 retval = sizeof(struct rte_tcp_hdr);
4116                 break;
4117         case RTE_FLOW_ITEM_TYPE_VXLAN:
4118         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4119                 retval = sizeof(struct rte_vxlan_hdr);
4120                 break;
4121         case RTE_FLOW_ITEM_TYPE_GRE:
4122         case RTE_FLOW_ITEM_TYPE_NVGRE:
4123                 retval = sizeof(struct rte_gre_hdr);
4124                 break;
4125         case RTE_FLOW_ITEM_TYPE_MPLS:
4126                 retval = sizeof(struct rte_mpls_hdr);
4127                 break;
4128         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4129         default:
4130                 retval = 0;
4131                 break;
4132         }
4133         return retval;
4134 }
4135
4136 #define MLX5_ENCAP_IPV4_VERSION         0x40
4137 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
4138 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
4139 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
4140 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
4141 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
4142 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
4143
4144 /**
4145  * Convert the encap action data from list of rte_flow_item to raw buffer
4146  *
4147  * @param[in] items
4148  *   Pointer to rte_flow_item objects list.
4149  * @param[out] buf
4150  *   Pointer to the output buffer.
4151  * @param[out] size
4152  *   Pointer to the output buffer size.
4153  * @param[out] error
4154  *   Pointer to the error structure.
4155  *
4156  * @return
4157  *   0 on success, a negative errno value otherwise and rte_errno is set.
4158  */
4159 static int
4160 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4161                            size_t *size, struct rte_flow_error *error)
4162 {
4163         struct rte_ether_hdr *eth = NULL;
4164         struct rte_vlan_hdr *vlan = NULL;
4165         struct rte_ipv4_hdr *ipv4 = NULL;
4166         struct rte_ipv6_hdr *ipv6 = NULL;
4167         struct rte_udp_hdr *udp = NULL;
4168         struct rte_vxlan_hdr *vxlan = NULL;
4169         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4170         struct rte_gre_hdr *gre = NULL;
4171         size_t len;
4172         size_t temp_size = 0;
4173
4174         if (!items)
4175                 return rte_flow_error_set(error, EINVAL,
4176                                           RTE_FLOW_ERROR_TYPE_ACTION,
4177                                           NULL, "invalid empty data");
4178         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4179                 len = flow_dv_get_item_hdr_len(items->type);
4180                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4181                         return rte_flow_error_set(error, EINVAL,
4182                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4183                                                   (void *)items->type,
4184                                                   "items total size is too big"
4185                                                   " for encap action");
4186                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4187                 switch (items->type) {
4188                 case RTE_FLOW_ITEM_TYPE_ETH:
4189                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4190                         break;
4191                 case RTE_FLOW_ITEM_TYPE_VLAN:
4192                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4193                         if (!eth)
4194                                 return rte_flow_error_set(error, EINVAL,
4195                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4196                                                 (void *)items->type,
4197                                                 "eth header not found");
4198                         if (!eth->ether_type)
4199                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4200                         break;
4201                 case RTE_FLOW_ITEM_TYPE_IPV4:
4202                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4203                         if (!vlan && !eth)
4204                                 return rte_flow_error_set(error, EINVAL,
4205                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4206                                                 (void *)items->type,
4207                                                 "neither eth nor vlan"
4208                                                 " header found");
4209                         if (vlan && !vlan->eth_proto)
4210                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4211                         else if (eth && !eth->ether_type)
4212                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4213                         if (!ipv4->version_ihl)
4214                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4215                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4216                         if (!ipv4->time_to_live)
4217                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4218                         break;
4219                 case RTE_FLOW_ITEM_TYPE_IPV6:
4220                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4221                         if (!vlan && !eth)
4222                                 return rte_flow_error_set(error, EINVAL,
4223                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4224                                                 (void *)items->type,
4225                                                 "neither eth nor vlan"
4226                                                 " header found");
4227                         if (vlan && !vlan->eth_proto)
4228                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4229                         else if (eth && !eth->ether_type)
4230                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4231                         if (!ipv6->vtc_flow)
4232                                 ipv6->vtc_flow =
4233                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4234                         if (!ipv6->hop_limits)
4235                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4236                         break;
4237                 case RTE_FLOW_ITEM_TYPE_UDP:
4238                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4239                         if (!ipv4 && !ipv6)
4240                                 return rte_flow_error_set(error, EINVAL,
4241                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4242                                                 (void *)items->type,
4243                                                 "ip header not found");
4244                         if (ipv4 && !ipv4->next_proto_id)
4245                                 ipv4->next_proto_id = IPPROTO_UDP;
4246                         else if (ipv6 && !ipv6->proto)
4247                                 ipv6->proto = IPPROTO_UDP;
4248                         break;
4249                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4250                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4251                         if (!udp)
4252                                 return rte_flow_error_set(error, EINVAL,
4253                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4254                                                 (void *)items->type,
4255                                                 "udp header not found");
4256                         if (!udp->dst_port)
4257                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4258                         if (!vxlan->vx_flags)
4259                                 vxlan->vx_flags =
4260                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4261                         break;
4262                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4263                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4264                         if (!udp)
4265                                 return rte_flow_error_set(error, EINVAL,
4266                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4267                                                 (void *)items->type,
4268                                                 "udp header not found");
4269                         if (!vxlan_gpe->proto)
4270                                 return rte_flow_error_set(error, EINVAL,
4271                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4272                                                 (void *)items->type,
4273                                                 "next protocol not found");
4274                         if (!udp->dst_port)
4275                                 udp->dst_port =
4276                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4277                         if (!vxlan_gpe->vx_flags)
4278                                 vxlan_gpe->vx_flags =
4279                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4280                         break;
4281                 case RTE_FLOW_ITEM_TYPE_GRE:
4282                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4283                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4284                         if (!gre->proto)
4285                                 return rte_flow_error_set(error, EINVAL,
4286                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4287                                                 (void *)items->type,
4288                                                 "next protocol not found");
4289                         if (!ipv4 && !ipv6)
4290                                 return rte_flow_error_set(error, EINVAL,
4291                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4292                                                 (void *)items->type,
4293                                                 "ip header not found");
4294                         if (ipv4 && !ipv4->next_proto_id)
4295                                 ipv4->next_proto_id = IPPROTO_GRE;
4296                         else if (ipv6 && !ipv6->proto)
4297                                 ipv6->proto = IPPROTO_GRE;
4298                         break;
4299                 case RTE_FLOW_ITEM_TYPE_VOID:
4300                         break;
4301                 default:
4302                         return rte_flow_error_set(error, EINVAL,
4303                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4304                                                   (void *)items->type,
4305                                                   "unsupported item type");
4306                         break;
4307                 }
4308                 temp_size += len;
4309         }
4310         *size = temp_size;
4311         return 0;
4312 }
4313
4314 static int
4315 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4316 {
4317         struct rte_ether_hdr *eth = NULL;
4318         struct rte_vlan_hdr *vlan = NULL;
4319         struct rte_ipv6_hdr *ipv6 = NULL;
4320         struct rte_udp_hdr *udp = NULL;
4321         char *next_hdr;
4322         uint16_t proto;
4323
4324         eth = (struct rte_ether_hdr *)data;
4325         next_hdr = (char *)(eth + 1);
4326         proto = RTE_BE16(eth->ether_type);
4327
4328         /* VLAN skipping */
4329         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4330                 vlan = (struct rte_vlan_hdr *)next_hdr;
4331                 proto = RTE_BE16(vlan->eth_proto);
4332                 next_hdr += sizeof(struct rte_vlan_hdr);
4333         }
4334
4335         /* HW calculates IPv4 csum. no need to proceed */
4336         if (proto == RTE_ETHER_TYPE_IPV4)
4337                 return 0;
4338
4339         /* non IPv4/IPv6 header. not supported */
4340         if (proto != RTE_ETHER_TYPE_IPV6) {
4341                 return rte_flow_error_set(error, ENOTSUP,
4342                                           RTE_FLOW_ERROR_TYPE_ACTION,
4343                                           NULL, "Cannot offload non IPv4/IPv6");
4344         }
4345
4346         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4347
4348         /* ignore non UDP */
4349         if (ipv6->proto != IPPROTO_UDP)
4350                 return 0;
4351
4352         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4353         udp->dgram_cksum = 0;
4354
4355         return 0;
4356 }
4357
4358 /**
4359  * Convert L2 encap action to DV specification.
4360  *
4361  * @param[in] dev
4362  *   Pointer to rte_eth_dev structure.
4363  * @param[in] action
4364  *   Pointer to action structure.
4365  * @param[in, out] dev_flow
4366  *   Pointer to the mlx5_flow.
4367  * @param[in] transfer
4368  *   Mark if the flow is E-Switch flow.
4369  * @param[out] error
4370  *   Pointer to the error structure.
4371  *
4372  * @return
4373  *   0 on success, a negative errno value otherwise and rte_errno is set.
4374  */
4375 static int
4376 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4377                                const struct rte_flow_action *action,
4378                                struct mlx5_flow *dev_flow,
4379                                uint8_t transfer,
4380                                struct rte_flow_error *error)
4381 {
4382         const struct rte_flow_item *encap_data;
4383         const struct rte_flow_action_raw_encap *raw_encap_data;
4384         struct mlx5_flow_dv_encap_decap_resource res = {
4385                 .reformat_type =
4386                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4387                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4388                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4389         };
4390
4391         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4392                 raw_encap_data =
4393                         (const struct rte_flow_action_raw_encap *)action->conf;
4394                 res.size = raw_encap_data->size;
4395                 memcpy(res.buf, raw_encap_data->data, res.size);
4396         } else {
4397                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4398                         encap_data =
4399                                 ((const struct rte_flow_action_vxlan_encap *)
4400                                                 action->conf)->definition;
4401                 else
4402                         encap_data =
4403                                 ((const struct rte_flow_action_nvgre_encap *)
4404                                                 action->conf)->definition;
4405                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4406                                                &res.size, error))
4407                         return -rte_errno;
4408         }
4409         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4410                 return -rte_errno;
4411         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4412                 return rte_flow_error_set(error, EINVAL,
4413                                           RTE_FLOW_ERROR_TYPE_ACTION,
4414                                           NULL, "can't create L2 encap action");
4415         return 0;
4416 }
4417
4418 /**
4419  * Convert L2 decap action to DV specification.
4420  *
4421  * @param[in] dev
4422  *   Pointer to rte_eth_dev structure.
4423  * @param[in, out] dev_flow
4424  *   Pointer to the mlx5_flow.
4425  * @param[in] transfer
4426  *   Mark if the flow is E-Switch flow.
4427  * @param[out] error
4428  *   Pointer to the error structure.
4429  *
4430  * @return
4431  *   0 on success, a negative errno value otherwise and rte_errno is set.
4432  */
4433 static int
4434 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4435                                struct mlx5_flow *dev_flow,
4436                                uint8_t transfer,
4437                                struct rte_flow_error *error)
4438 {
4439         struct mlx5_flow_dv_encap_decap_resource res = {
4440                 .size = 0,
4441                 .reformat_type =
4442                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4443                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4444                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4445         };
4446
4447         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4448                 return rte_flow_error_set(error, EINVAL,
4449                                           RTE_FLOW_ERROR_TYPE_ACTION,
4450                                           NULL, "can't create L2 decap action");
4451         return 0;
4452 }
4453
4454 /**
4455  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4456  *
4457  * @param[in] dev
4458  *   Pointer to rte_eth_dev structure.
4459  * @param[in] action
4460  *   Pointer to action structure.
4461  * @param[in, out] dev_flow
4462  *   Pointer to the mlx5_flow.
4463  * @param[in] attr
4464  *   Pointer to the flow attributes.
4465  * @param[out] error
4466  *   Pointer to the error structure.
4467  *
4468  * @return
4469  *   0 on success, a negative errno value otherwise and rte_errno is set.
4470  */
4471 static int
4472 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4473                                 const struct rte_flow_action *action,
4474                                 struct mlx5_flow *dev_flow,
4475                                 const struct rte_flow_attr *attr,
4476                                 struct rte_flow_error *error)
4477 {
4478         const struct rte_flow_action_raw_encap *encap_data;
4479         struct mlx5_flow_dv_encap_decap_resource res;
4480
4481         memset(&res, 0, sizeof(res));
4482         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4483         res.size = encap_data->size;
4484         memcpy(res.buf, encap_data->data, res.size);
4485         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4486                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4487                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4488         if (attr->transfer)
4489                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4490         else
4491                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4492                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4493         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4494                 return rte_flow_error_set(error, EINVAL,
4495                                           RTE_FLOW_ERROR_TYPE_ACTION,
4496                                           NULL, "can't create encap action");
4497         return 0;
4498 }
4499
4500 /**
4501  * Create action push VLAN.
4502  *
4503  * @param[in] dev
4504  *   Pointer to rte_eth_dev structure.
4505  * @param[in] attr
4506  *   Pointer to the flow attributes.
4507  * @param[in] vlan
4508  *   Pointer to the vlan to push to the Ethernet header.
4509  * @param[in, out] dev_flow
4510  *   Pointer to the mlx5_flow.
4511  * @param[out] error
4512  *   Pointer to the error structure.
4513  *
4514  * @return
4515  *   0 on success, a negative errno value otherwise and rte_errno is set.
4516  */
4517 static int
4518 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4519                                 const struct rte_flow_attr *attr,
4520                                 const struct rte_vlan_hdr *vlan,
4521                                 struct mlx5_flow *dev_flow,
4522                                 struct rte_flow_error *error)
4523 {
4524         struct mlx5_flow_dv_push_vlan_action_resource res;
4525
4526         memset(&res, 0, sizeof(res));
4527         res.vlan_tag =
4528                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4529                                  vlan->vlan_tci);
4530         if (attr->transfer)
4531                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4532         else
4533                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4534                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4535         return flow_dv_push_vlan_action_resource_register
4536                                             (dev, &res, dev_flow, error);
4537 }
4538
4539 /**
4540  * Validate the modify-header actions.
4541  *
4542  * @param[in] action_flags
4543  *   Holds the actions detected until now.
4544  * @param[in] action
4545  *   Pointer to the modify action.
4546  * @param[out] error
4547  *   Pointer to error structure.
4548  *
4549  * @return
4550  *   0 on success, a negative errno value otherwise and rte_errno is set.
4551  */
4552 static int
4553 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4554                                    const struct rte_flow_action *action,
4555                                    struct rte_flow_error *error)
4556 {
4557         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4558                 return rte_flow_error_set(error, EINVAL,
4559                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4560                                           NULL, "action configuration not set");
4561         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4562                 return rte_flow_error_set(error, EINVAL,
4563                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4564                                           "can't have encap action before"
4565                                           " modify action");
4566         return 0;
4567 }
4568
4569 /**
4570  * Validate the modify-header MAC address actions.
4571  *
4572  * @param[in] action_flags
4573  *   Holds the actions detected until now.
4574  * @param[in] action
4575  *   Pointer to the modify action.
4576  * @param[in] item_flags
4577  *   Holds the items detected.
4578  * @param[out] error
4579  *   Pointer to error structure.
4580  *
4581  * @return
4582  *   0 on success, a negative errno value otherwise and rte_errno is set.
4583  */
4584 static int
4585 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4586                                    const struct rte_flow_action *action,
4587                                    const uint64_t item_flags,
4588                                    struct rte_flow_error *error)
4589 {
4590         int ret = 0;
4591
4592         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4593         if (!ret) {
4594                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4595                         return rte_flow_error_set(error, EINVAL,
4596                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4597                                                   NULL,
4598                                                   "no L2 item in pattern");
4599         }
4600         return ret;
4601 }
4602
4603 /**
4604  * Validate the modify-header IPv4 address actions.
4605  *
4606  * @param[in] action_flags
4607  *   Holds the actions detected until now.
4608  * @param[in] action
4609  *   Pointer to the modify action.
4610  * @param[in] item_flags
4611  *   Holds the items detected.
4612  * @param[out] error
4613  *   Pointer to error structure.
4614  *
4615  * @return
4616  *   0 on success, a negative errno value otherwise and rte_errno is set.
4617  */
4618 static int
4619 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4620                                     const struct rte_flow_action *action,
4621                                     const uint64_t item_flags,
4622                                     struct rte_flow_error *error)
4623 {
4624         int ret = 0;
4625         uint64_t layer;
4626
4627         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4628         if (!ret) {
4629                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4630                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4631                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4632                 if (!(item_flags & layer))
4633                         return rte_flow_error_set(error, EINVAL,
4634                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4635                                                   NULL,
4636                                                   "no ipv4 item in pattern");
4637         }
4638         return ret;
4639 }
4640
4641 /**
4642  * Validate the modify-header IPv6 address actions.
4643  *
4644  * @param[in] action_flags
4645  *   Holds the actions detected until now.
4646  * @param[in] action
4647  *   Pointer to the modify action.
4648  * @param[in] item_flags
4649  *   Holds the items detected.
4650  * @param[out] error
4651  *   Pointer to error structure.
4652  *
4653  * @return
4654  *   0 on success, a negative errno value otherwise and rte_errno is set.
4655  */
4656 static int
4657 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4658                                     const struct rte_flow_action *action,
4659                                     const uint64_t item_flags,
4660                                     struct rte_flow_error *error)
4661 {
4662         int ret = 0;
4663         uint64_t layer;
4664
4665         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4666         if (!ret) {
4667                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4668                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4669                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4670                 if (!(item_flags & layer))
4671                         return rte_flow_error_set(error, EINVAL,
4672                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4673                                                   NULL,
4674                                                   "no ipv6 item in pattern");
4675         }
4676         return ret;
4677 }
4678
4679 /**
4680  * Validate the modify-header TP actions.
4681  *
4682  * @param[in] action_flags
4683  *   Holds the actions detected until now.
4684  * @param[in] action
4685  *   Pointer to the modify action.
4686  * @param[in] item_flags
4687  *   Holds the items detected.
4688  * @param[out] error
4689  *   Pointer to error structure.
4690  *
4691  * @return
4692  *   0 on success, a negative errno value otherwise and rte_errno is set.
4693  */
4694 static int
4695 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4696                                   const struct rte_flow_action *action,
4697                                   const uint64_t item_flags,
4698                                   struct rte_flow_error *error)
4699 {
4700         int ret = 0;
4701         uint64_t layer;
4702
4703         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4704         if (!ret) {
4705                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4706                                  MLX5_FLOW_LAYER_INNER_L4 :
4707                                  MLX5_FLOW_LAYER_OUTER_L4;
4708                 if (!(item_flags & layer))
4709                         return rte_flow_error_set(error, EINVAL,
4710                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4711                                                   NULL, "no transport layer "
4712                                                   "in pattern");
4713         }
4714         return ret;
4715 }
4716
4717 /**
4718  * Validate the modify-header actions of increment/decrement
4719  * TCP Sequence-number.
4720  *
4721  * @param[in] action_flags
4722  *   Holds the actions detected until now.
4723  * @param[in] action
4724  *   Pointer to the modify action.
4725  * @param[in] item_flags
4726  *   Holds the items detected.
4727  * @param[out] error
4728  *   Pointer to error structure.
4729  *
4730  * @return
4731  *   0 on success, a negative errno value otherwise and rte_errno is set.
4732  */
4733 static int
4734 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4735                                        const struct rte_flow_action *action,
4736                                        const uint64_t item_flags,
4737                                        struct rte_flow_error *error)
4738 {
4739         int ret = 0;
4740         uint64_t layer;
4741
4742         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4743         if (!ret) {
4744                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4745                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4746                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4747                 if (!(item_flags & layer))
4748                         return rte_flow_error_set(error, EINVAL,
4749                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4750                                                   NULL, "no TCP item in"
4751                                                   " pattern");
4752                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4753                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4754                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4755                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4756                         return rte_flow_error_set(error, EINVAL,
4757                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4758                                                   NULL,
4759                                                   "cannot decrease and increase"
4760                                                   " TCP sequence number"
4761                                                   " at the same time");
4762         }
4763         return ret;
4764 }
4765
4766 /**
4767  * Validate the modify-header actions of increment/decrement
4768  * TCP Acknowledgment number.
4769  *
4770  * @param[in] action_flags
4771  *   Holds the actions detected until now.
4772  * @param[in] action
4773  *   Pointer to the modify action.
4774  * @param[in] item_flags
4775  *   Holds the items detected.
4776  * @param[out] error
4777  *   Pointer to error structure.
4778  *
4779  * @return
4780  *   0 on success, a negative errno value otherwise and rte_errno is set.
4781  */
4782 static int
4783 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4784                                        const struct rte_flow_action *action,
4785                                        const uint64_t item_flags,
4786                                        struct rte_flow_error *error)
4787 {
4788         int ret = 0;
4789         uint64_t layer;
4790
4791         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4792         if (!ret) {
4793                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4794                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4795                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4796                 if (!(item_flags & layer))
4797                         return rte_flow_error_set(error, EINVAL,
4798                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4799                                                   NULL, "no TCP item in"
4800                                                   " pattern");
4801                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4802                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4803                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4804                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4805                         return rte_flow_error_set(error, EINVAL,
4806                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4807                                                   NULL,
4808                                                   "cannot decrease and increase"
4809                                                   " TCP acknowledgment number"
4810                                                   " at the same time");
4811         }
4812         return ret;
4813 }
4814
4815 /**
4816  * Validate the modify-header TTL actions.
4817  *
4818  * @param[in] action_flags
4819  *   Holds the actions detected until now.
4820  * @param[in] action
4821  *   Pointer to the modify action.
4822  * @param[in] item_flags
4823  *   Holds the items detected.
4824  * @param[out] error
4825  *   Pointer to error structure.
4826  *
4827  * @return
4828  *   0 on success, a negative errno value otherwise and rte_errno is set.
4829  */
4830 static int
4831 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4832                                    const struct rte_flow_action *action,
4833                                    const uint64_t item_flags,
4834                                    struct rte_flow_error *error)
4835 {
4836         int ret = 0;
4837         uint64_t layer;
4838
4839         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4840         if (!ret) {
4841                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4842                                  MLX5_FLOW_LAYER_INNER_L3 :
4843                                  MLX5_FLOW_LAYER_OUTER_L3;
4844                 if (!(item_flags & layer))
4845                         return rte_flow_error_set(error, EINVAL,
4846                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4847                                                   NULL,
4848                                                   "no IP protocol in pattern");
4849         }
4850         return ret;
4851 }
4852
4853 /**
4854  * Validate the generic modify field actions.
4855  * @param[in] dev
4856  *   Pointer to the rte_eth_dev structure.
4857  * @param[in] action_flags
4858  *   Holds the actions detected until now.
4859  * @param[in] action
4860  *   Pointer to the modify action.
4861  * @param[in] attr
4862  *   Pointer to the flow attributes.
4863  * @param[out] error
4864  *   Pointer to error structure.
4865  *
4866  * @return
4867  *   Number of header fields to modify (0 or more) on success,
4868  *   a negative errno value otherwise and rte_errno is set.
4869  */
4870 static int
4871 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4872                                    const uint64_t action_flags,
4873                                    const struct rte_flow_action *action,
4874                                    const struct rte_flow_attr *attr,
4875                                    struct rte_flow_error *error)
4876 {
4877         int ret = 0;
4878         struct mlx5_priv *priv = dev->data->dev_private;
4879         struct mlx5_dev_config *config = &priv->config;
4880         const struct rte_flow_action_modify_field *action_modify_field =
4881                 action->conf;
4882         uint32_t dst_width = mlx5_flow_item_field_width(priv,
4883                                 action_modify_field->dst.field);
4884         uint32_t src_width = mlx5_flow_item_field_width(priv,
4885                                 action_modify_field->src.field);
4886
4887         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4888         if (ret)
4889                 return ret;
4890
4891         if (action_modify_field->width == 0)
4892                 return rte_flow_error_set(error, EINVAL,
4893                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4894                                 "no bits are requested to be modified");
4895         else if (action_modify_field->width > dst_width ||
4896                  action_modify_field->width > src_width)
4897                 return rte_flow_error_set(error, EINVAL,
4898                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4899                                 "cannot modify more bits than"
4900                                 " the width of a field");
4901         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4902             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4903                 if ((action_modify_field->dst.offset +
4904                      action_modify_field->width > dst_width) ||
4905                     (action_modify_field->dst.offset % 32))
4906                         return rte_flow_error_set(error, EINVAL,
4907                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4908                                         "destination offset is too big"
4909                                         " or not aligned to 4 bytes");
4910                 if (action_modify_field->dst.level &&
4911                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4912                         return rte_flow_error_set(error, ENOTSUP,
4913                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4914                                         "inner header fields modification"
4915                                         " is not supported");
4916         }
4917         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4918             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4919                 if (!attr->transfer && !attr->group)
4920                         return rte_flow_error_set(error, ENOTSUP,
4921                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4922                                         "modify field action is not"
4923                                         " supported for group 0");
4924                 if ((action_modify_field->src.offset +
4925                      action_modify_field->width > src_width) ||
4926                     (action_modify_field->src.offset % 32))
4927                         return rte_flow_error_set(error, EINVAL,
4928                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4929                                         "source offset is too big"
4930                                         " or not aligned to 4 bytes");
4931                 if (action_modify_field->src.level &&
4932                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4933                         return rte_flow_error_set(error, ENOTSUP,
4934                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4935                                         "inner header fields modification"
4936                                         " is not supported");
4937         }
4938         if ((action_modify_field->dst.field ==
4939              action_modify_field->src.field) &&
4940             (action_modify_field->dst.level ==
4941              action_modify_field->src.level))
4942                 return rte_flow_error_set(error, EINVAL,
4943                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4944                                 "source and destination fields"
4945                                 " cannot be the same");
4946         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4947             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4948             action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4949                 return rte_flow_error_set(error, EINVAL,
4950                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4951                                 "mark, immediate value or a pointer to it"
4952                                 " cannot be used as a destination");
4953         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4954             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4955                 return rte_flow_error_set(error, ENOTSUP,
4956                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4957                                 "modifications of an arbitrary"
4958                                 " place in a packet is not supported");
4959         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4960             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4961                 return rte_flow_error_set(error, ENOTSUP,
4962                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4963                                 "modifications of the 802.1Q Tag"
4964                                 " Identifier is not supported");
4965         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4966             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4967                 return rte_flow_error_set(error, ENOTSUP,
4968                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4969                                 "modifications of the VXLAN Network"
4970                                 " Identifier is not supported");
4971         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4972             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4973                 return rte_flow_error_set(error, ENOTSUP,
4974                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4975                                 "modifications of the GENEVE Network"
4976                                 " Identifier is not supported");
4977         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4978             action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4979             action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4980             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4981                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4982                     !mlx5_flow_ext_mreg_supported(dev))
4983                         return rte_flow_error_set(error, ENOTSUP,
4984                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4985                                         "cannot modify mark or metadata without"
4986                                         " extended metadata register support");
4987         }
4988         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4989                 return rte_flow_error_set(error, ENOTSUP,
4990                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4991                                 "add and sub operations"
4992                                 " are not supported");
4993         return (action_modify_field->width / 32) +
4994                !!(action_modify_field->width % 32);
4995 }
4996
4997 /**
4998  * Validate jump action.
4999  *
5000  * @param[in] action
5001  *   Pointer to the jump action.
5002  * @param[in] action_flags
5003  *   Holds the actions detected until now.
5004  * @param[in] attributes
5005  *   Pointer to flow attributes
5006  * @param[in] external
5007  *   Action belongs to flow rule created by request external to PMD.
5008  * @param[out] error
5009  *   Pointer to error structure.
5010  *
5011  * @return
5012  *   0 on success, a negative errno value otherwise and rte_errno is set.
5013  */
5014 static int
5015 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
5016                              const struct mlx5_flow_tunnel *tunnel,
5017                              const struct rte_flow_action *action,
5018                              uint64_t action_flags,
5019                              const struct rte_flow_attr *attributes,
5020                              bool external, struct rte_flow_error *error)
5021 {
5022         uint32_t target_group, table;
5023         int ret = 0;
5024         struct flow_grp_info grp_info = {
5025                 .external = !!external,
5026                 .transfer = !!attributes->transfer,
5027                 .fdb_def_rule = 1,
5028                 .std_tbl_fix = 0
5029         };
5030         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5031                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5032                 return rte_flow_error_set(error, EINVAL,
5033                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5034                                           "can't have 2 fate actions in"
5035                                           " same flow");
5036         if (!action->conf)
5037                 return rte_flow_error_set(error, EINVAL,
5038                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5039                                           NULL, "action configuration not set");
5040         target_group =
5041                 ((const struct rte_flow_action_jump *)action->conf)->group;
5042         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5043                                        &grp_info, error);
5044         if (ret)
5045                 return ret;
5046         if (attributes->group == target_group &&
5047             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5048                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5049                 return rte_flow_error_set(error, EINVAL,
5050                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5051                                           "target group must be other than"
5052                                           " the current flow group");
5053         return 0;
5054 }
5055
5056 /*
5057  * Validate the port_id action.
5058  *
5059  * @param[in] dev
5060  *   Pointer to rte_eth_dev structure.
5061  * @param[in] action_flags
5062  *   Bit-fields that holds the actions detected until now.
5063  * @param[in] action
5064  *   Port_id RTE action structure.
5065  * @param[in] attr
5066  *   Attributes of flow that includes this action.
5067  * @param[out] error
5068  *   Pointer to error structure.
5069  *
5070  * @return
5071  *   0 on success, a negative errno value otherwise and rte_errno is set.
5072  */
5073 static int
5074 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5075                                 uint64_t action_flags,
5076                                 const struct rte_flow_action *action,
5077                                 const struct rte_flow_attr *attr,
5078                                 struct rte_flow_error *error)
5079 {
5080         const struct rte_flow_action_port_id *port_id;
5081         struct mlx5_priv *act_priv;
5082         struct mlx5_priv *dev_priv;
5083         uint16_t port;
5084
5085         if (!attr->transfer)
5086                 return rte_flow_error_set(error, ENOTSUP,
5087                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5088                                           NULL,
5089                                           "port id action is valid in transfer"
5090                                           " mode only");
5091         if (!action || !action->conf)
5092                 return rte_flow_error_set(error, ENOTSUP,
5093                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5094                                           NULL,
5095                                           "port id action parameters must be"
5096                                           " specified");
5097         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5098                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5099                 return rte_flow_error_set(error, EINVAL,
5100                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5101                                           "can have only one fate actions in"
5102                                           " a flow");
5103         dev_priv = mlx5_dev_to_eswitch_info(dev);
5104         if (!dev_priv)
5105                 return rte_flow_error_set(error, rte_errno,
5106                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5107                                           NULL,
5108                                           "failed to obtain E-Switch info");
5109         port_id = action->conf;
5110         port = port_id->original ? dev->data->port_id : port_id->id;
5111         act_priv = mlx5_port_to_eswitch_info(port, false);
5112         if (!act_priv)
5113                 return rte_flow_error_set
5114                                 (error, rte_errno,
5115                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
5116                                  "failed to obtain E-Switch port id for port");
5117         if (act_priv->domain_id != dev_priv->domain_id)
5118                 return rte_flow_error_set
5119                                 (error, EINVAL,
5120                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5121                                  "port does not belong to"
5122                                  " E-Switch being configured");
5123         return 0;
5124 }
5125
5126 /**
5127  * Get the maximum number of modify header actions.
5128  *
5129  * @param dev
5130  *   Pointer to rte_eth_dev structure.
5131  * @param root
5132  *   Whether action is on root table.
5133  *
5134  * @return
5135  *   Max number of modify header actions device can support.
5136  */
5137 static inline unsigned int
5138 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5139                               bool root)
5140 {
5141         /*
5142          * There's no way to directly query the max capacity from FW.
5143          * The maximal value on root table should be assumed to be supported.
5144          */
5145         if (!root)
5146                 return MLX5_MAX_MODIFY_NUM;
5147         else
5148                 return MLX5_ROOT_TBL_MODIFY_NUM;
5149 }
5150
5151 /**
5152  * Validate the meter action.
5153  *
5154  * @param[in] dev
5155  *   Pointer to rte_eth_dev structure.
5156  * @param[in] action_flags
5157  *   Bit-fields that holds the actions detected until now.
5158  * @param[in] action
5159  *   Pointer to the meter action.
5160  * @param[in] attr
5161  *   Attributes of flow that includes this action.
5162  * @param[in] port_id_item
5163  *   Pointer to item indicating port id.
5164  * @param[out] error
5165  *   Pointer to error structure.
5166  *
5167  * @return
5168  *   0 on success, a negative errno value otherwise and rte_ernno is set.
5169  */
5170 static int
5171 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5172                                 uint64_t action_flags,
5173                                 const struct rte_flow_action *action,
5174                                 const struct rte_flow_attr *attr,
5175                                 const struct rte_flow_item *port_id_item,
5176                                 bool *def_policy,
5177                                 struct rte_flow_error *error)
5178 {
5179         struct mlx5_priv *priv = dev->data->dev_private;
5180         const struct rte_flow_action_meter *am = action->conf;
5181         struct mlx5_flow_meter_info *fm;
5182         struct mlx5_flow_meter_policy *mtr_policy;
5183         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5184
5185         if (!am)
5186                 return rte_flow_error_set(error, EINVAL,
5187                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5188                                           "meter action conf is NULL");
5189
5190         if (action_flags & MLX5_FLOW_ACTION_METER)
5191                 return rte_flow_error_set(error, ENOTSUP,
5192                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5193                                           "meter chaining not support");
5194         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5195                 return rte_flow_error_set(error, ENOTSUP,
5196                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5197                                           "meter with jump not support");
5198         if (!priv->mtr_en)
5199                 return rte_flow_error_set(error, ENOTSUP,
5200                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5201                                           NULL,
5202                                           "meter action not supported");
5203         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5204         if (!fm)
5205                 return rte_flow_error_set(error, EINVAL,
5206                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5207                                           "Meter not found");
5208         /* aso meter can always be shared by different domains */
5209         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5210             !(fm->transfer == attr->transfer ||
5211               (!fm->ingress && !attr->ingress && attr->egress) ||
5212               (!fm->egress && !attr->egress && attr->ingress)))
5213                 return rte_flow_error_set(error, EINVAL,
5214                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5215                         "Flow attributes domain are either invalid "
5216                         "or have a domain conflict with current "
5217                         "meter attributes");
5218         if (fm->def_policy) {
5219                 if (!((attr->transfer &&
5220                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5221                         (attr->egress &&
5222                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5223                         (attr->ingress &&
5224                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5225                         return rte_flow_error_set(error, EINVAL,
5226                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5227                                           "Flow attributes domain "
5228                                           "have a conflict with current "
5229                                           "meter domain attributes");
5230                 *def_policy = true;
5231         } else {
5232                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5233                                                 fm->policy_id, NULL);
5234                 if (!mtr_policy)
5235                         return rte_flow_error_set(error, EINVAL,
5236                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5237                                           "Invalid policy id for meter ");
5238                 if (!((attr->transfer && mtr_policy->transfer) ||
5239                         (attr->egress && mtr_policy->egress) ||
5240                         (attr->ingress && mtr_policy->ingress)))
5241                         return rte_flow_error_set(error, EINVAL,
5242                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5243                                           "Flow attributes domain "
5244                                           "have a conflict with current "
5245                                           "meter domain attributes");
5246                 if (attr->transfer && mtr_policy->dev) {
5247                         /**
5248                          * When policy has fate action of port_id,
5249                          * the flow should have the same src port as policy.
5250                          */
5251                         struct mlx5_priv *policy_port_priv =
5252                                         mtr_policy->dev->data->dev_private;
5253                         int32_t flow_src_port = priv->representor_id;
5254
5255                         if (port_id_item) {
5256                                 const struct rte_flow_item_port_id *spec =
5257                                                         port_id_item->spec;
5258                                 struct mlx5_priv *port_priv =
5259                                         mlx5_port_to_eswitch_info(spec->id,
5260                                                                   false);
5261                                 if (!port_priv)
5262                                         return rte_flow_error_set(error,
5263                                                 rte_errno,
5264                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5265                                                 spec,
5266                                                 "Failed to get port info.");
5267                                 flow_src_port = port_priv->representor_id;
5268                         }
5269                         if (flow_src_port != policy_port_priv->representor_id)
5270                                 return rte_flow_error_set(error,
5271                                                 rte_errno,
5272                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5273                                                 NULL,
5274                                                 "Flow and meter policy "
5275                                                 "have different src port.");
5276                 }
5277                 *def_policy = false;
5278         }
5279         return 0;
5280 }
5281
5282 /**
5283  * Validate the age action.
5284  *
5285  * @param[in] action_flags
5286  *   Holds the actions detected until now.
5287  * @param[in] action
5288  *   Pointer to the age action.
5289  * @param[in] dev
5290  *   Pointer to the Ethernet device structure.
5291  * @param[out] error
5292  *   Pointer to error structure.
5293  *
5294  * @return
5295  *   0 on success, a negative errno value otherwise and rte_errno is set.
5296  */
5297 static int
5298 flow_dv_validate_action_age(uint64_t action_flags,
5299                             const struct rte_flow_action *action,
5300                             struct rte_eth_dev *dev,
5301                             struct rte_flow_error *error)
5302 {
5303         struct mlx5_priv *priv = dev->data->dev_private;
5304         const struct rte_flow_action_age *age = action->conf;
5305
5306         if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
5307             !priv->sh->aso_age_mng))
5308                 return rte_flow_error_set(error, ENOTSUP,
5309                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5310                                           NULL,
5311                                           "age action not supported");
5312         if (!(action->conf))
5313                 return rte_flow_error_set(error, EINVAL,
5314                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5315                                           "configuration cannot be null");
5316         if (!(age->timeout))
5317                 return rte_flow_error_set(error, EINVAL,
5318                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5319                                           "invalid timeout value 0");
5320         if (action_flags & MLX5_FLOW_ACTION_AGE)
5321                 return rte_flow_error_set(error, EINVAL,
5322                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5323                                           "duplicate age actions set");
5324         return 0;
5325 }
5326
5327 /**
5328  * Validate the modify-header IPv4 DSCP actions.
5329  *
5330  * @param[in] action_flags
5331  *   Holds the actions detected until now.
5332  * @param[in] action
5333  *   Pointer to the modify action.
5334  * @param[in] item_flags
5335  *   Holds the items detected.
5336  * @param[out] error
5337  *   Pointer to error structure.
5338  *
5339  * @return
5340  *   0 on success, a negative errno value otherwise and rte_errno is set.
5341  */
5342 static int
5343 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5344                                          const struct rte_flow_action *action,
5345                                          const uint64_t item_flags,
5346                                          struct rte_flow_error *error)
5347 {
5348         int ret = 0;
5349
5350         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5351         if (!ret) {
5352                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5353                         return rte_flow_error_set(error, EINVAL,
5354                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5355                                                   NULL,
5356                                                   "no ipv4 item in pattern");
5357         }
5358         return ret;
5359 }
5360
5361 /**
5362  * Validate the modify-header IPv6 DSCP actions.
5363  *
5364  * @param[in] action_flags
5365  *   Holds the actions detected until now.
5366  * @param[in] action
5367  *   Pointer to the modify action.
5368  * @param[in] item_flags
5369  *   Holds the items detected.
5370  * @param[out] error
5371  *   Pointer to error structure.
5372  *
5373  * @return
5374  *   0 on success, a negative errno value otherwise and rte_errno is set.
5375  */
5376 static int
5377 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5378                                          const struct rte_flow_action *action,
5379                                          const uint64_t item_flags,
5380                                          struct rte_flow_error *error)
5381 {
5382         int ret = 0;
5383
5384         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5385         if (!ret) {
5386                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5387                         return rte_flow_error_set(error, EINVAL,
5388                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5389                                                   NULL,
5390                                                   "no ipv6 item in pattern");
5391         }
5392         return ret;
5393 }
5394
5395 int
5396 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5397                         struct mlx5_list_entry *entry, void *cb_ctx)
5398 {
5399         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5400         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5401         struct mlx5_flow_dv_modify_hdr_resource *resource =
5402                                   container_of(entry, typeof(*resource), entry);
5403         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5404
5405         key_len += ref->actions_num * sizeof(ref->actions[0]);
5406         return ref->actions_num != resource->actions_num ||
5407                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5408 }
5409
5410 static struct mlx5_indexed_pool *
5411 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5412 {
5413         struct mlx5_indexed_pool *ipool = __atomic_load_n
5414                                      (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5415
5416         if (!ipool) {
5417                 struct mlx5_indexed_pool *expected = NULL;
5418                 struct mlx5_indexed_pool_config cfg =
5419                     (struct mlx5_indexed_pool_config) {
5420                        .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5421                                                                    (index + 1) *
5422                                            sizeof(struct mlx5_modification_cmd),
5423                        .trunk_size = 64,
5424                        .grow_trunk = 3,
5425                        .grow_shift = 2,
5426                        .need_lock = 1,
5427                        .release_mem_en = !!sh->reclaim_mode,
5428                        .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5429                        .malloc = mlx5_malloc,
5430                        .free = mlx5_free,
5431                        .type = "mlx5_modify_action_resource",
5432                 };
5433
5434                 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5435                 ipool = mlx5_ipool_create(&cfg);
5436                 if (!ipool)
5437                         return NULL;
5438                 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5439                                                  &expected, ipool, false,
5440                                                  __ATOMIC_SEQ_CST,
5441                                                  __ATOMIC_SEQ_CST)) {
5442                         mlx5_ipool_destroy(ipool);
5443                         ipool = __atomic_load_n(&sh->mdh_ipools[index],
5444                                                 __ATOMIC_SEQ_CST);
5445                 }
5446         }
5447         return ipool;
5448 }
5449
5450 struct mlx5_list_entry *
5451 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5452 {
5453         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5454         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5455         struct mlx5dv_dr_domain *ns;
5456         struct mlx5_flow_dv_modify_hdr_resource *entry;
5457         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5458         struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5459                                                           ref->actions_num - 1);
5460         int ret;
5461         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5462         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5463         uint32_t idx;
5464
5465         if (unlikely(!ipool)) {
5466                 rte_flow_error_set(ctx->error, ENOMEM,
5467                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5468                                    NULL, "cannot allocate modify ipool");
5469                 return NULL;
5470         }
5471         entry = mlx5_ipool_zmalloc(ipool, &idx);
5472         if (!entry) {
5473                 rte_flow_error_set(ctx->error, ENOMEM,
5474                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5475                                    "cannot allocate resource memory");
5476                 return NULL;
5477         }
5478         rte_memcpy(&entry->ft_type,
5479                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5480                    key_len + data_len);
5481         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5482                 ns = sh->fdb_domain;
5483         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5484                 ns = sh->tx_domain;
5485         else
5486                 ns = sh->rx_domain;
5487         ret = mlx5_flow_os_create_flow_action_modify_header
5488                                         (sh->ctx, ns, entry,
5489                                          data_len, &entry->action);
5490         if (ret) {
5491                 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5492                 rte_flow_error_set(ctx->error, ENOMEM,
5493                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5494                                    NULL, "cannot create modification action");
5495                 return NULL;
5496         }
5497         entry->idx = idx;
5498         return &entry->entry;
5499 }
5500
5501 struct mlx5_list_entry *
5502 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5503                         void *cb_ctx)
5504 {
5505         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5506         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5507         struct mlx5_flow_dv_modify_hdr_resource *entry;
5508         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5509         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5510         uint32_t idx;
5511
5512         entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5513                                   &idx);
5514         if (!entry) {
5515                 rte_flow_error_set(ctx->error, ENOMEM,
5516                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5517                                    "cannot allocate resource memory");
5518                 return NULL;
5519         }
5520         memcpy(entry, oentry, sizeof(*entry) + data_len);
5521         entry->idx = idx;
5522         return &entry->entry;
5523 }
5524
5525 void
5526 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5527 {
5528         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5529         struct mlx5_flow_dv_modify_hdr_resource *res =
5530                 container_of(entry, typeof(*res), entry);
5531
5532         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5533 }
5534
5535 /**
5536  * Validate the sample action.
5537  *
5538  * @param[in, out] action_flags
5539  *   Holds the actions detected until now.
5540  * @param[in] action
5541  *   Pointer to the sample action.
5542  * @param[in] dev
5543  *   Pointer to the Ethernet device structure.
5544  * @param[in] attr
5545  *   Attributes of flow that includes this action.
5546  * @param[in] item_flags
5547  *   Holds the items detected.
5548  * @param[in] rss
5549  *   Pointer to the RSS action.
5550  * @param[out] sample_rss
5551  *   Pointer to the RSS action in sample action list.
5552  * @param[out] count
5553  *   Pointer to the COUNT action in sample action list.
5554  * @param[out] fdb_mirror_limit
5555  *   Pointer to the FDB mirror limitation flag.
5556  * @param[out] error
5557  *   Pointer to error structure.
5558  *
5559  * @return
5560  *   0 on success, a negative errno value otherwise and rte_errno is set.
5561  */
5562 static int
5563 flow_dv_validate_action_sample(uint64_t *action_flags,
5564                                const struct rte_flow_action *action,
5565                                struct rte_eth_dev *dev,
5566                                const struct rte_flow_attr *attr,
5567                                uint64_t item_flags,
5568                                const struct rte_flow_action_rss *rss,
5569                                const struct rte_flow_action_rss **sample_rss,
5570                                const struct rte_flow_action_count **count,
5571                                int *fdb_mirror_limit,
5572                                struct rte_flow_error *error)
5573 {
5574         struct mlx5_priv *priv = dev->data->dev_private;
5575         struct mlx5_dev_config *dev_conf = &priv->config;
5576         const struct rte_flow_action_sample *sample = action->conf;
5577         const struct rte_flow_action *act;
5578         uint64_t sub_action_flags = 0;
5579         uint16_t queue_index = 0xFFFF;
5580         int actions_n = 0;
5581         int ret;
5582
5583         if (!sample)
5584                 return rte_flow_error_set(error, EINVAL,
5585                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5586                                           "configuration cannot be NULL");
5587         if (sample->ratio == 0)
5588                 return rte_flow_error_set(error, EINVAL,
5589                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5590                                           "ratio value starts from 1");
5591         if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
5592                 return rte_flow_error_set(error, ENOTSUP,
5593                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5594                                           NULL,
5595                                           "sample action not supported");
5596         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5597                 return rte_flow_error_set(error, EINVAL,
5598                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5599                                           "Multiple sample actions not "
5600                                           "supported");
5601         if (*action_flags & MLX5_FLOW_ACTION_METER)
5602                 return rte_flow_error_set(error, EINVAL,
5603                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5604                                           "wrong action order, meter should "
5605                                           "be after sample action");
5606         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5607                 return rte_flow_error_set(error, EINVAL,
5608                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5609                                           "wrong action order, jump should "
5610                                           "be after sample action");
5611         act = sample->actions;
5612         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5613                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5614                         return rte_flow_error_set(error, ENOTSUP,
5615                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5616                                                   act, "too many actions");
5617                 switch (act->type) {
5618                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5619                         ret = mlx5_flow_validate_action_queue(act,
5620                                                               sub_action_flags,
5621                                                               dev,
5622                                                               attr, error);
5623                         if (ret < 0)
5624                                 return ret;
5625                         queue_index = ((const struct rte_flow_action_queue *)
5626                                                         (act->conf))->index;
5627                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5628                         ++actions_n;
5629                         break;
5630                 case RTE_FLOW_ACTION_TYPE_RSS:
5631                         *sample_rss = act->conf;
5632                         ret = mlx5_flow_validate_action_rss(act,
5633                                                             sub_action_flags,
5634                                                             dev, attr,
5635                                                             item_flags,
5636                                                             error);
5637                         if (ret < 0)
5638                                 return ret;
5639                         if (rss && *sample_rss &&
5640                             ((*sample_rss)->level != rss->level ||
5641                             (*sample_rss)->types != rss->types))
5642                                 return rte_flow_error_set(error, ENOTSUP,
5643                                         RTE_FLOW_ERROR_TYPE_ACTION,
5644                                         NULL,
5645                                         "Can't use the different RSS types "
5646                                         "or level in the same flow");
5647                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5648                                 queue_index = (*sample_rss)->queue[0];
5649                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5650                         ++actions_n;
5651                         break;
5652                 case RTE_FLOW_ACTION_TYPE_MARK:
5653                         ret = flow_dv_validate_action_mark(dev, act,
5654                                                            sub_action_flags,
5655                                                            attr, error);
5656                         if (ret < 0)
5657                                 return ret;
5658                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5659                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5660                                                 MLX5_FLOW_ACTION_MARK_EXT;
5661                         else
5662                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5663                         ++actions_n;
5664                         break;
5665                 case RTE_FLOW_ACTION_TYPE_COUNT:
5666                         ret = flow_dv_validate_action_count
5667                                 (dev, is_shared_action_count(act),
5668                                  *action_flags | sub_action_flags,
5669                                  error);
5670                         if (ret < 0)
5671                                 return ret;
5672                         *count = act->conf;
5673                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5674                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5675                         ++actions_n;
5676                         break;
5677                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5678                         ret = flow_dv_validate_action_port_id(dev,
5679                                                               sub_action_flags,
5680                                                               act,
5681                                                               attr,
5682                                                               error);
5683                         if (ret)
5684                                 return ret;
5685                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5686                         ++actions_n;
5687                         break;
5688                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5689                         ret = flow_dv_validate_action_raw_encap_decap
5690                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5691                                  &actions_n, action, item_flags, error);
5692                         if (ret < 0)
5693                                 return ret;
5694                         ++actions_n;
5695                         break;
5696                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5697                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5698                         ret = flow_dv_validate_action_l2_encap(dev,
5699                                                                sub_action_flags,
5700                                                                act, attr,
5701                                                                error);
5702                         if (ret < 0)
5703                                 return ret;
5704                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5705                         ++actions_n;
5706                         break;
5707                 default:
5708                         return rte_flow_error_set(error, ENOTSUP,
5709                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5710                                                   NULL,
5711                                                   "Doesn't support optional "
5712                                                   "action");
5713                 }
5714         }
5715         if (attr->ingress && !attr->transfer) {
5716                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5717                                           MLX5_FLOW_ACTION_RSS)))
5718                         return rte_flow_error_set(error, EINVAL,
5719                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5720                                                   NULL,
5721                                                   "Ingress must has a dest "
5722                                                   "QUEUE for Sample");
5723         } else if (attr->egress && !attr->transfer) {
5724                 return rte_flow_error_set(error, ENOTSUP,
5725                                           RTE_FLOW_ERROR_TYPE_ACTION,
5726                                           NULL,
5727                                           "Sample Only support Ingress "
5728                                           "or E-Switch");
5729         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5730                 MLX5_ASSERT(attr->transfer);
5731                 if (sample->ratio > 1)
5732                         return rte_flow_error_set(error, ENOTSUP,
5733                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5734                                                   NULL,
5735                                                   "E-Switch doesn't support "
5736                                                   "any optional action "
5737                                                   "for sampling");
5738                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5739                         return rte_flow_error_set(error, ENOTSUP,
5740                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5741                                                   NULL,
5742                                                   "unsupported action QUEUE");
5743                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5744                         return rte_flow_error_set(error, ENOTSUP,
5745                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5746                                                   NULL,
5747                                                   "unsupported action QUEUE");
5748                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5749                         return rte_flow_error_set(error, EINVAL,
5750                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5751                                                   NULL,
5752                                                   "E-Switch must has a dest "
5753                                                   "port for mirroring");
5754                 if (!priv->config.hca_attr.reg_c_preserve &&
5755                      priv->representor_id != UINT16_MAX)
5756                         *fdb_mirror_limit = 1;
5757         }
5758         /* Continue validation for Xcap actions.*/
5759         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5760             (queue_index == 0xFFFF ||
5761              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5762                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5763                      MLX5_FLOW_XCAP_ACTIONS)
5764                         return rte_flow_error_set(error, ENOTSUP,
5765                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5766                                                   NULL, "encap and decap "
5767                                                   "combination aren't "
5768                                                   "supported");
5769                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5770                                                         MLX5_FLOW_ACTION_ENCAP))
5771                         return rte_flow_error_set(error, ENOTSUP,
5772                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5773                                                   NULL, "encap is not supported"
5774                                                   " for ingress traffic");
5775         }
5776         return 0;
5777 }
5778
5779 /**
5780  * Find existing modify-header resource or create and register a new one.
5781  *
5782  * @param dev[in, out]
5783  *   Pointer to rte_eth_dev structure.
5784  * @param[in, out] resource
5785  *   Pointer to modify-header resource.
5786  * @parm[in, out] dev_flow
5787  *   Pointer to the dev_flow.
5788  * @param[out] error
5789  *   pointer to error structure.
5790  *
5791  * @return
5792  *   0 on success otherwise -errno and errno is set.
5793  */
5794 static int
5795 flow_dv_modify_hdr_resource_register
5796                         (struct rte_eth_dev *dev,
5797                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5798                          struct mlx5_flow *dev_flow,
5799                          struct rte_flow_error *error)
5800 {
5801         struct mlx5_priv *priv = dev->data->dev_private;
5802         struct mlx5_dev_ctx_shared *sh = priv->sh;
5803         uint32_t key_len = sizeof(*resource) -
5804                            offsetof(typeof(*resource), ft_type) +
5805                            resource->actions_num * sizeof(resource->actions[0]);
5806         struct mlx5_list_entry *entry;
5807         struct mlx5_flow_cb_ctx ctx = {
5808                 .error = error,
5809                 .data = resource,
5810         };
5811         struct mlx5_hlist *modify_cmds;
5812         uint64_t key64;
5813
5814         modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5815                                 "hdr_modify",
5816                                 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5817                                 true, false, sh,
5818                                 flow_dv_modify_create_cb,
5819                                 flow_dv_modify_match_cb,
5820                                 flow_dv_modify_remove_cb,
5821                                 flow_dv_modify_clone_cb,
5822                                 flow_dv_modify_clone_free_cb);
5823         if (unlikely(!modify_cmds))
5824                 return -rte_errno;
5825         resource->root = !dev_flow->dv.group;
5826         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5827                                                                 resource->root))
5828                 return rte_flow_error_set(error, EOVERFLOW,
5829                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5830                                           "too many modify header items");
5831         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5832         entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5833         if (!entry)
5834                 return -rte_errno;
5835         resource = container_of(entry, typeof(*resource), entry);
5836         dev_flow->handle->dvh.modify_hdr = resource;
5837         return 0;
5838 }
5839
5840 /**
5841  * Get DV flow counter by index.
5842  *
5843  * @param[in] dev
5844  *   Pointer to the Ethernet device structure.
5845  * @param[in] idx
5846  *   mlx5 flow counter index in the container.
5847  * @param[out] ppool
5848  *   mlx5 flow counter pool in the container.
5849  *
5850  * @return
5851  *   Pointer to the counter, NULL otherwise.
5852  */
5853 static struct mlx5_flow_counter *
5854 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5855                            uint32_t idx,
5856                            struct mlx5_flow_counter_pool **ppool)
5857 {
5858         struct mlx5_priv *priv = dev->data->dev_private;
5859         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5860         struct mlx5_flow_counter_pool *pool;
5861
5862         /* Decrease to original index and clear shared bit. */
5863         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5864         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5865         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5866         MLX5_ASSERT(pool);
5867         if (ppool)
5868                 *ppool = pool;
5869         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5870 }
5871
5872 /**
5873  * Check the devx counter belongs to the pool.
5874  *
5875  * @param[in] pool
5876  *   Pointer to the counter pool.
5877  * @param[in] id
5878  *   The counter devx ID.
5879  *
5880  * @return
5881  *   True if counter belongs to the pool, false otherwise.
5882  */
5883 static bool
5884 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5885 {
5886         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5887                    MLX5_COUNTERS_PER_POOL;
5888
5889         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5890                 return true;
5891         return false;
5892 }
5893
5894 /**
5895  * Get a pool by devx counter ID.
5896  *
5897  * @param[in] cmng
5898  *   Pointer to the counter management.
5899  * @param[in] id
5900  *   The counter devx ID.
5901  *
5902  * @return
5903  *   The counter pool pointer if exists, NULL otherwise,
5904  */
5905 static struct mlx5_flow_counter_pool *
5906 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5907 {
5908         uint32_t i;
5909         struct mlx5_flow_counter_pool *pool = NULL;
5910
5911         rte_spinlock_lock(&cmng->pool_update_sl);
5912         /* Check last used pool. */
5913         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5914             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5915                 pool = cmng->pools[cmng->last_pool_idx];
5916                 goto out;
5917         }
5918         /* ID out of range means no suitable pool in the container. */
5919         if (id > cmng->max_id || id < cmng->min_id)
5920                 goto out;
5921         /*
5922          * Find the pool from the end of the container, since mostly counter
5923          * ID is sequence increasing, and the last pool should be the needed
5924          * one.
5925          */
5926         i = cmng->n_valid;
5927         while (i--) {
5928                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5929
5930                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5931                         pool = pool_tmp;
5932                         break;
5933                 }
5934         }
5935 out:
5936         rte_spinlock_unlock(&cmng->pool_update_sl);
5937         return pool;
5938 }
5939
5940 /**
5941  * Resize a counter container.
5942  *
5943  * @param[in] dev
5944  *   Pointer to the Ethernet device structure.
5945  *
5946  * @return
5947  *   0 on success, otherwise negative errno value and rte_errno is set.
5948  */
5949 static int
5950 flow_dv_container_resize(struct rte_eth_dev *dev)
5951 {
5952         struct mlx5_priv *priv = dev->data->dev_private;
5953         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5954         void *old_pools = cmng->pools;
5955         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5956         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5957         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5958
5959         if (!pools) {
5960                 rte_errno = ENOMEM;
5961                 return -ENOMEM;
5962         }
5963         if (old_pools)
5964                 memcpy(pools, old_pools, cmng->n *
5965                                        sizeof(struct mlx5_flow_counter_pool *));
5966         cmng->n = resize;
5967         cmng->pools = pools;
5968         if (old_pools)
5969                 mlx5_free(old_pools);
5970         return 0;
5971 }
5972
5973 /**
5974  * Query a devx flow counter.
5975  *
5976  * @param[in] dev
5977  *   Pointer to the Ethernet device structure.
5978  * @param[in] counter
5979  *   Index to the flow counter.
5980  * @param[out] pkts
5981  *   The statistics value of packets.
5982  * @param[out] bytes
5983  *   The statistics value of bytes.
5984  *
5985  * @return
5986  *   0 on success, otherwise a negative errno value and rte_errno is set.
5987  */
5988 static inline int
5989 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5990                      uint64_t *bytes)
5991 {
5992         struct mlx5_priv *priv = dev->data->dev_private;
5993         struct mlx5_flow_counter_pool *pool = NULL;
5994         struct mlx5_flow_counter *cnt;
5995         int offset;
5996
5997         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5998         MLX5_ASSERT(pool);
5999         if (priv->sh->cmng.counter_fallback)
6000                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
6001                                         0, pkts, bytes, 0, NULL, NULL, 0);
6002         rte_spinlock_lock(&pool->sl);
6003         if (!pool->raw) {
6004                 *pkts = 0;
6005                 *bytes = 0;
6006         } else {
6007                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
6008                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
6009                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
6010         }
6011         rte_spinlock_unlock(&pool->sl);
6012         return 0;
6013 }
6014
6015 /**
6016  * Create and initialize a new counter pool.
6017  *
6018  * @param[in] dev
6019  *   Pointer to the Ethernet device structure.
6020  * @param[out] dcs
6021  *   The devX counter handle.
6022  * @param[in] age
6023  *   Whether the pool is for counter that was allocated for aging.
6024  * @param[in/out] cont_cur
6025  *   Pointer to the container pointer, it will be update in pool resize.
6026  *
6027  * @return
6028  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
6029  */
6030 static struct mlx5_flow_counter_pool *
6031 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6032                     uint32_t age)
6033 {
6034         struct mlx5_priv *priv = dev->data->dev_private;
6035         struct mlx5_flow_counter_pool *pool;
6036         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6037         bool fallback = priv->sh->cmng.counter_fallback;
6038         uint32_t size = sizeof(*pool);
6039
6040         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6041         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6042         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6043         if (!pool) {
6044                 rte_errno = ENOMEM;
6045                 return NULL;
6046         }
6047         pool->raw = NULL;
6048         pool->is_aged = !!age;
6049         pool->query_gen = 0;
6050         pool->min_dcs = dcs;
6051         rte_spinlock_init(&pool->sl);
6052         rte_spinlock_init(&pool->csl);
6053         TAILQ_INIT(&pool->counters[0]);
6054         TAILQ_INIT(&pool->counters[1]);
6055         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6056         rte_spinlock_lock(&cmng->pool_update_sl);
6057         pool->index = cmng->n_valid;
6058         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6059                 mlx5_free(pool);
6060                 rte_spinlock_unlock(&cmng->pool_update_sl);
6061                 return NULL;
6062         }
6063         cmng->pools[pool->index] = pool;
6064         cmng->n_valid++;
6065         if (unlikely(fallback)) {
6066                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6067
6068                 if (base < cmng->min_id)
6069                         cmng->min_id = base;
6070                 if (base > cmng->max_id)
6071                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6072                 cmng->last_pool_idx = pool->index;
6073         }
6074         rte_spinlock_unlock(&cmng->pool_update_sl);
6075         return pool;
6076 }
6077
6078 /**
6079  * Prepare a new counter and/or a new counter pool.
6080  *
6081  * @param[in] dev
6082  *   Pointer to the Ethernet device structure.
6083  * @param[out] cnt_free
6084  *   Where to put the pointer of a new counter.
6085  * @param[in] age
6086  *   Whether the pool is for counter that was allocated for aging.
6087  *
6088  * @return
6089  *   The counter pool pointer and @p cnt_free is set on success,
6090  *   NULL otherwise and rte_errno is set.
6091  */
6092 static struct mlx5_flow_counter_pool *
6093 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6094                              struct mlx5_flow_counter **cnt_free,
6095                              uint32_t age)
6096 {
6097         struct mlx5_priv *priv = dev->data->dev_private;
6098         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6099         struct mlx5_flow_counter_pool *pool;
6100         struct mlx5_counters tmp_tq;
6101         struct mlx5_devx_obj *dcs = NULL;
6102         struct mlx5_flow_counter *cnt;
6103         enum mlx5_counter_type cnt_type =
6104                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6105         bool fallback = priv->sh->cmng.counter_fallback;
6106         uint32_t i;
6107
6108         if (fallback) {
6109                 /* bulk_bitmap must be 0 for single counter allocation. */
6110                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
6111                 if (!dcs)
6112                         return NULL;
6113                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6114                 if (!pool) {
6115                         pool = flow_dv_pool_create(dev, dcs, age);
6116                         if (!pool) {
6117                                 mlx5_devx_cmd_destroy(dcs);
6118                                 return NULL;
6119                         }
6120                 }
6121                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6122                 cnt = MLX5_POOL_GET_CNT(pool, i);
6123                 cnt->pool = pool;
6124                 cnt->dcs_when_free = dcs;
6125                 *cnt_free = cnt;
6126                 return pool;
6127         }
6128         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
6129         if (!dcs) {
6130                 rte_errno = ENODATA;
6131                 return NULL;
6132         }
6133         pool = flow_dv_pool_create(dev, dcs, age);
6134         if (!pool) {
6135                 mlx5_devx_cmd_destroy(dcs);
6136                 return NULL;
6137         }
6138         TAILQ_INIT(&tmp_tq);
6139         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6140                 cnt = MLX5_POOL_GET_CNT(pool, i);
6141                 cnt->pool = pool;
6142                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6143         }
6144         rte_spinlock_lock(&cmng->csl[cnt_type]);
6145         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6146         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6147         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6148         (*cnt_free)->pool = pool;
6149         return pool;
6150 }
6151
6152 /**
6153  * Allocate a flow counter.
6154  *
6155  * @param[in] dev
6156  *   Pointer to the Ethernet device structure.
6157  * @param[in] age
6158  *   Whether the counter was allocated for aging.
6159  *
6160  * @return
6161  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6162  */
6163 static uint32_t
6164 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6165 {
6166         struct mlx5_priv *priv = dev->data->dev_private;
6167         struct mlx5_flow_counter_pool *pool = NULL;
6168         struct mlx5_flow_counter *cnt_free = NULL;
6169         bool fallback = priv->sh->cmng.counter_fallback;
6170         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6171         enum mlx5_counter_type cnt_type =
6172                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6173         uint32_t cnt_idx;
6174
6175         if (!priv->config.devx) {
6176                 rte_errno = ENOTSUP;
6177                 return 0;
6178         }
6179         /* Get free counters from container. */
6180         rte_spinlock_lock(&cmng->csl[cnt_type]);
6181         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6182         if (cnt_free)
6183                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6184         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6185         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6186                 goto err;
6187         pool = cnt_free->pool;
6188         if (fallback)
6189                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6190         /* Create a DV counter action only in the first time usage. */
6191         if (!cnt_free->action) {
6192                 uint16_t offset;
6193                 struct mlx5_devx_obj *dcs;
6194                 int ret;
6195
6196                 if (!fallback) {
6197                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6198                         dcs = pool->min_dcs;
6199                 } else {
6200                         offset = 0;
6201                         dcs = cnt_free->dcs_when_free;
6202                 }
6203                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6204                                                             &cnt_free->action);
6205                 if (ret) {
6206                         rte_errno = errno;
6207                         goto err;
6208                 }
6209         }
6210         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6211                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6212         /* Update the counter reset values. */
6213         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6214                                  &cnt_free->bytes))
6215                 goto err;
6216         if (!fallback && !priv->sh->cmng.query_thread_on)
6217                 /* Start the asynchronous batch query by the host thread. */
6218                 mlx5_set_query_alarm(priv->sh);
6219         /*
6220          * When the count action isn't shared (by ID), shared_info field is
6221          * used for indirect action API's refcnt.
6222          * When the counter action is not shared neither by ID nor by indirect
6223          * action API, shared info must be 1.
6224          */
6225         cnt_free->shared_info.refcnt = 1;
6226         return cnt_idx;
6227 err:
6228         if (cnt_free) {
6229                 cnt_free->pool = pool;
6230                 if (fallback)
6231                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6232                 rte_spinlock_lock(&cmng->csl[cnt_type]);
6233                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6234                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6235         }
6236         return 0;
6237 }
6238
6239 /**
6240  * Allocate a shared flow counter.
6241  *
6242  * @param[in] ctx
6243  *   Pointer to the shared counter configuration.
6244  * @param[in] data
6245  *   Pointer to save the allocated counter index.
6246  *
6247  * @return
6248  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6249  */
6250
6251 static int32_t
6252 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
6253 {
6254         struct mlx5_shared_counter_conf *conf = ctx;
6255         struct rte_eth_dev *dev = conf->dev;
6256         struct mlx5_flow_counter *cnt;
6257
6258         data->dword = flow_dv_counter_alloc(dev, 0);
6259         data->dword |= MLX5_CNT_SHARED_OFFSET;
6260         cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
6261         cnt->shared_info.id = conf->id;
6262         return 0;
6263 }
6264
6265 /**
6266  * Get a shared flow counter.
6267  *
6268  * @param[in] dev
6269  *   Pointer to the Ethernet device structure.
6270  * @param[in] id
6271  *   Counter identifier.
6272  *
6273  * @return
6274  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6275  */
6276 static uint32_t
6277 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
6278 {
6279         struct mlx5_priv *priv = dev->data->dev_private;
6280         struct mlx5_shared_counter_conf conf = {
6281                 .dev = dev,
6282                 .id = id,
6283         };
6284         union mlx5_l3t_data data = {
6285                 .dword = 0,
6286         };
6287
6288         mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
6289                                flow_dv_counter_alloc_shared_cb, &conf);
6290         return data.dword;
6291 }
6292
6293 /**
6294  * Get age param from counter index.
6295  *
6296  * @param[in] dev
6297  *   Pointer to the Ethernet device structure.
6298  * @param[in] counter
6299  *   Index to the counter handler.
6300  *
6301  * @return
6302  *   The aging parameter specified for the counter index.
6303  */
6304 static struct mlx5_age_param*
6305 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6306                                 uint32_t counter)
6307 {
6308         struct mlx5_flow_counter *cnt;
6309         struct mlx5_flow_counter_pool *pool = NULL;
6310
6311         flow_dv_counter_get_by_idx(dev, counter, &pool);
6312         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6313         cnt = MLX5_POOL_GET_CNT(pool, counter);
6314         return MLX5_CNT_TO_AGE(cnt);
6315 }
6316
6317 /**
6318  * Remove a flow counter from aged counter list.
6319  *
6320  * @param[in] dev
6321  *   Pointer to the Ethernet device structure.
6322  * @param[in] counter
6323  *   Index to the counter handler.
6324  * @param[in] cnt
6325  *   Pointer to the counter handler.
6326  */
6327 static void
6328 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6329                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6330 {
6331         struct mlx5_age_info *age_info;
6332         struct mlx5_age_param *age_param;
6333         struct mlx5_priv *priv = dev->data->dev_private;
6334         uint16_t expected = AGE_CANDIDATE;
6335
6336         age_info = GET_PORT_AGE_INFO(priv);
6337         age_param = flow_dv_counter_idx_get_age(dev, counter);
6338         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6339                                          AGE_FREE, false, __ATOMIC_RELAXED,
6340                                          __ATOMIC_RELAXED)) {
6341                 /**
6342                  * We need the lock even it is age timeout,
6343                  * since counter may still in process.
6344                  */
6345                 rte_spinlock_lock(&age_info->aged_sl);
6346                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6347                 rte_spinlock_unlock(&age_info->aged_sl);
6348                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6349         }
6350 }
6351
6352 /**
6353  * Release a flow counter.
6354  *
6355  * @param[in] dev
6356  *   Pointer to the Ethernet device structure.
6357  * @param[in] counter
6358  *   Index to the counter handler.
6359  */
6360 static void
6361 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6362 {
6363         struct mlx5_priv *priv = dev->data->dev_private;
6364         struct mlx5_flow_counter_pool *pool = NULL;
6365         struct mlx5_flow_counter *cnt;
6366         enum mlx5_counter_type cnt_type;
6367
6368         if (!counter)
6369                 return;
6370         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6371         MLX5_ASSERT(pool);
6372         if (pool->is_aged) {
6373                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6374         } else {
6375                 /*
6376                  * If the counter action is shared by ID, the l3t_clear_entry
6377                  * function reduces its references counter. If after the
6378                  * reduction the action is still referenced, the function
6379                  * returns here and does not release it.
6380                  */
6381                 if (IS_LEGACY_SHARED_CNT(counter) &&
6382                     mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl,
6383                                          cnt->shared_info.id))
6384                         return;
6385                 /*
6386                  * If the counter action is shared by indirect action API,
6387                  * the atomic function reduces its references counter.
6388                  * If after the reduction the action is still referenced, the
6389                  * function returns here and does not release it.
6390                  * When the counter action is not shared neither by ID nor by
6391                  * indirect action API, shared info is 1 before the reduction,
6392                  * so this condition is failed and function doesn't return here.
6393                  */
6394                 if (!IS_LEGACY_SHARED_CNT(counter) &&
6395                     __atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6396                                        __ATOMIC_RELAXED))
6397                         return;
6398         }
6399         cnt->pool = pool;
6400         /*
6401          * Put the counter back to list to be updated in none fallback mode.
6402          * Currently, we are using two list alternately, while one is in query,
6403          * add the freed counter to the other list based on the pool query_gen
6404          * value. After query finishes, add counter the list to the global
6405          * container counter list. The list changes while query starts. In
6406          * this case, lock will not be needed as query callback and release
6407          * function both operate with the different list.
6408          */
6409         if (!priv->sh->cmng.counter_fallback) {
6410                 rte_spinlock_lock(&pool->csl);
6411                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6412                 rte_spinlock_unlock(&pool->csl);
6413         } else {
6414                 cnt->dcs_when_free = cnt->dcs_when_active;
6415                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6416                                            MLX5_COUNTER_TYPE_ORIGIN;
6417                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6418                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6419                                   cnt, next);
6420                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6421         }
6422 }
6423
6424 /**
6425  * Resize a meter id container.
6426  *
6427  * @param[in] dev
6428  *   Pointer to the Ethernet device structure.
6429  *
6430  * @return
6431  *   0 on success, otherwise negative errno value and rte_errno is set.
6432  */
6433 static int
6434 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6435 {
6436         struct mlx5_priv *priv = dev->data->dev_private;
6437         struct mlx5_aso_mtr_pools_mng *pools_mng =
6438                                 &priv->sh->mtrmng->pools_mng;
6439         void *old_pools = pools_mng->pools;
6440         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6441         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6442         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6443
6444         if (!pools) {
6445                 rte_errno = ENOMEM;
6446                 return -ENOMEM;
6447         }
6448         if (!pools_mng->n)
6449                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6450                         mlx5_free(pools);
6451                         return -ENOMEM;
6452                 }
6453         if (old_pools)
6454                 memcpy(pools, old_pools, pools_mng->n *
6455                                        sizeof(struct mlx5_aso_mtr_pool *));
6456         pools_mng->n = resize;
6457         pools_mng->pools = pools;
6458         if (old_pools)
6459                 mlx5_free(old_pools);
6460         return 0;
6461 }
6462
6463 /**
6464  * Prepare a new meter and/or a new meter pool.
6465  *
6466  * @param[in] dev
6467  *   Pointer to the Ethernet device structure.
6468  * @param[out] mtr_free
6469  *   Where to put the pointer of a new meter.g.
6470  *
6471  * @return
6472  *   The meter pool pointer and @mtr_free is set on success,
6473  *   NULL otherwise and rte_errno is set.
6474  */
6475 static struct mlx5_aso_mtr_pool *
6476 flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
6477                              struct mlx5_aso_mtr **mtr_free)
6478 {
6479         struct mlx5_priv *priv = dev->data->dev_private;
6480         struct mlx5_aso_mtr_pools_mng *pools_mng =
6481                                 &priv->sh->mtrmng->pools_mng;
6482         struct mlx5_aso_mtr_pool *pool = NULL;
6483         struct mlx5_devx_obj *dcs = NULL;
6484         uint32_t i;
6485         uint32_t log_obj_size;
6486
6487         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6488         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->ctx,
6489                         priv->sh->pdn, log_obj_size);
6490         if (!dcs) {
6491                 rte_errno = ENODATA;
6492                 return NULL;
6493         }
6494         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6495         if (!pool) {
6496                 rte_errno = ENOMEM;
6497                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6498                 return NULL;
6499         }
6500         pool->devx_obj = dcs;
6501         pool->index = pools_mng->n_valid;
6502         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6503                 mlx5_free(pool);
6504                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6505                 return NULL;
6506         }
6507         pools_mng->pools[pool->index] = pool;
6508         pools_mng->n_valid++;
6509         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6510                 pool->mtrs[i].offset = i;
6511                 LIST_INSERT_HEAD(&pools_mng->meters,
6512                                                 &pool->mtrs[i], next);
6513         }
6514         pool->mtrs[0].offset = 0;
6515         *mtr_free = &pool->mtrs[0];
6516         return pool;
6517 }
6518
6519 /**
6520  * Release a flow meter into pool.
6521  *
6522  * @param[in] dev
6523  *   Pointer to the Ethernet device structure.
6524  * @param[in] mtr_idx
6525  *   Index to aso flow meter.
6526  */
6527 static void
6528 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6529 {
6530         struct mlx5_priv *priv = dev->data->dev_private;
6531         struct mlx5_aso_mtr_pools_mng *pools_mng =
6532                                 &priv->sh->mtrmng->pools_mng;
6533         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6534
6535         MLX5_ASSERT(aso_mtr);
6536         rte_spinlock_lock(&pools_mng->mtrsl);
6537         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6538         aso_mtr->state = ASO_METER_FREE;
6539         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6540         rte_spinlock_unlock(&pools_mng->mtrsl);
6541 }
6542
6543 /**
6544  * Allocate a aso flow meter.
6545  *
6546  * @param[in] dev
6547  *   Pointer to the Ethernet device structure.
6548  *
6549  * @return
6550  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6551  */
6552 static uint32_t
6553 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6554 {
6555         struct mlx5_priv *priv = dev->data->dev_private;
6556         struct mlx5_aso_mtr *mtr_free = NULL;
6557         struct mlx5_aso_mtr_pools_mng *pools_mng =
6558                                 &priv->sh->mtrmng->pools_mng;
6559         struct mlx5_aso_mtr_pool *pool;
6560         uint32_t mtr_idx = 0;
6561
6562         if (!priv->config.devx) {
6563                 rte_errno = ENOTSUP;
6564                 return 0;
6565         }
6566         /* Allocate the flow meter memory. */
6567         /* Get free meters from management. */
6568         rte_spinlock_lock(&pools_mng->mtrsl);
6569         mtr_free = LIST_FIRST(&pools_mng->meters);
6570         if (mtr_free)
6571                 LIST_REMOVE(mtr_free, next);
6572         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6573                 rte_spinlock_unlock(&pools_mng->mtrsl);
6574                 return 0;
6575         }
6576         mtr_free->state = ASO_METER_WAIT;
6577         rte_spinlock_unlock(&pools_mng->mtrsl);
6578         pool = container_of(mtr_free,
6579                         struct mlx5_aso_mtr_pool,
6580                         mtrs[mtr_free->offset]);
6581         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6582         if (!mtr_free->fm.meter_action) {
6583 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6584                 struct rte_flow_error error;
6585                 uint8_t reg_id;
6586
6587                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6588                 mtr_free->fm.meter_action =
6589                         mlx5_glue->dv_create_flow_action_aso
6590                                                 (priv->sh->rx_domain,
6591                                                  pool->devx_obj->obj,
6592                                                  mtr_free->offset,
6593                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6594                                                  reg_id - REG_C_0);
6595 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6596                 if (!mtr_free->fm.meter_action) {
6597                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6598                         return 0;
6599                 }
6600         }
6601         return mtr_idx;
6602 }
6603
6604 /**
6605  * Verify the @p attributes will be correctly understood by the NIC and store
6606  * them in the @p flow if everything is correct.
6607  *
6608  * @param[in] dev
6609  *   Pointer to dev struct.
6610  * @param[in] attributes
6611  *   Pointer to flow attributes
6612  * @param[in] external
6613  *   This flow rule is created by request external to PMD.
6614  * @param[out] error
6615  *   Pointer to error structure.
6616  *
6617  * @return
6618  *   - 0 on success and non root table.
6619  *   - 1 on success and root table.
6620  *   - a negative errno value otherwise and rte_errno is set.
6621  */
6622 static int
6623 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6624                             const struct mlx5_flow_tunnel *tunnel,
6625                             const struct rte_flow_attr *attributes,
6626                             const struct flow_grp_info *grp_info,
6627                             struct rte_flow_error *error)
6628 {
6629         struct mlx5_priv *priv = dev->data->dev_private;
6630         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6631         int ret = 0;
6632
6633 #ifndef HAVE_MLX5DV_DR
6634         RTE_SET_USED(tunnel);
6635         RTE_SET_USED(grp_info);
6636         if (attributes->group)
6637                 return rte_flow_error_set(error, ENOTSUP,
6638                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6639                                           NULL,
6640                                           "groups are not supported");
6641 #else
6642         uint32_t table = 0;
6643
6644         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6645                                        grp_info, error);
6646         if (ret)
6647                 return ret;
6648         if (!table)
6649                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6650 #endif
6651         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6652             attributes->priority > lowest_priority)
6653                 return rte_flow_error_set(error, ENOTSUP,
6654                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6655                                           NULL,
6656                                           "priority out of range");
6657         if (attributes->transfer) {
6658                 if (!priv->config.dv_esw_en)
6659                         return rte_flow_error_set
6660                                 (error, ENOTSUP,
6661                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6662                                  "E-Switch dr is not supported");
6663                 if (!(priv->representor || priv->master))
6664                         return rte_flow_error_set
6665                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6666                                  NULL, "E-Switch configuration can only be"
6667                                  " done by a master or a representor device");
6668                 if (attributes->egress)
6669                         return rte_flow_error_set
6670                                 (error, ENOTSUP,
6671                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6672                                  "egress is not supported");
6673         }
6674         if (!(attributes->egress ^ attributes->ingress))
6675                 return rte_flow_error_set(error, ENOTSUP,
6676                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6677                                           "must specify exactly one of "
6678                                           "ingress or egress");
6679         return ret;
6680 }
6681
6682 static uint16_t
6683 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6684                           const struct rte_flow_item *end)
6685 {
6686         const struct rte_flow_item *item = *head;
6687         uint16_t l3_protocol;
6688
6689         for (; item != end; item++) {
6690                 switch (item->type) {
6691                 default:
6692                         break;
6693                 case RTE_FLOW_ITEM_TYPE_IPV4:
6694                         l3_protocol = RTE_ETHER_TYPE_IPV4;
6695                         goto l3_ok;
6696                 case RTE_FLOW_ITEM_TYPE_IPV6:
6697                         l3_protocol = RTE_ETHER_TYPE_IPV6;
6698                         goto l3_ok;
6699                 case RTE_FLOW_ITEM_TYPE_ETH:
6700                         if (item->mask && item->spec) {
6701                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6702                                                             type, item,
6703                                                             l3_protocol);
6704                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6705                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6706                                         goto l3_ok;
6707                         }
6708                         break;
6709                 case RTE_FLOW_ITEM_TYPE_VLAN:
6710                         if (item->mask && item->spec) {
6711                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6712                                                             inner_type, item,
6713                                                             l3_protocol);
6714                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6715                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6716                                         goto l3_ok;
6717                         }
6718                         break;
6719                 }
6720         }
6721         return 0;
6722 l3_ok:
6723         *head = item;
6724         return l3_protocol;
6725 }
6726
6727 static uint8_t
6728 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6729                           const struct rte_flow_item *end)
6730 {
6731         const struct rte_flow_item *item = *head;
6732         uint8_t l4_protocol;
6733
6734         for (; item != end; item++) {
6735                 switch (item->type) {
6736                 default:
6737                         break;
6738                 case RTE_FLOW_ITEM_TYPE_TCP:
6739                         l4_protocol = IPPROTO_TCP;
6740                         goto l4_ok;
6741                 case RTE_FLOW_ITEM_TYPE_UDP:
6742                         l4_protocol = IPPROTO_UDP;
6743                         goto l4_ok;
6744                 case RTE_FLOW_ITEM_TYPE_IPV4:
6745                         if (item->mask && item->spec) {
6746                                 const struct rte_flow_item_ipv4 *mask, *spec;
6747
6748                                 mask = (typeof(mask))item->mask;
6749                                 spec = (typeof(spec))item->spec;
6750                                 l4_protocol = mask->hdr.next_proto_id &
6751                                               spec->hdr.next_proto_id;
6752                                 if (l4_protocol == IPPROTO_TCP ||
6753                                     l4_protocol == IPPROTO_UDP)
6754                                         goto l4_ok;
6755                         }
6756                         break;
6757                 case RTE_FLOW_ITEM_TYPE_IPV6:
6758                         if (item->mask && item->spec) {
6759                                 const struct rte_flow_item_ipv6 *mask, *spec;
6760                                 mask = (typeof(mask))item->mask;
6761                                 spec = (typeof(spec))item->spec;
6762                                 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6763                                 if (l4_protocol == IPPROTO_TCP ||
6764                                     l4_protocol == IPPROTO_UDP)
6765                                         goto l4_ok;
6766                         }
6767                         break;
6768                 }
6769         }
6770         return 0;
6771 l4_ok:
6772         *head = item;
6773         return l4_protocol;
6774 }
6775
6776 static int
6777 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6778                                 const struct rte_flow_item *rule_items,
6779                                 const struct rte_flow_item *integrity_item,
6780                                 struct rte_flow_error *error)
6781 {
6782         struct mlx5_priv *priv = dev->data->dev_private;
6783         const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6784         const struct rte_flow_item_integrity *mask = (typeof(mask))
6785                                                      integrity_item->mask;
6786         const struct rte_flow_item_integrity *spec = (typeof(spec))
6787                                                      integrity_item->spec;
6788         uint32_t protocol;
6789
6790         if (!priv->config.hca_attr.pkt_integrity_match)
6791                 return rte_flow_error_set(error, ENOTSUP,
6792                                           RTE_FLOW_ERROR_TYPE_ITEM,
6793                                           integrity_item,
6794                                           "packet integrity integrity_item not supported");
6795         if (!mask)
6796                 mask = &rte_flow_item_integrity_mask;
6797         if (!mlx5_validate_integrity_item(mask))
6798                 return rte_flow_error_set(error, ENOTSUP,
6799                                           RTE_FLOW_ERROR_TYPE_ITEM,
6800                                           integrity_item,
6801                                           "unsupported integrity filter");
6802         tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6803         if (spec->level > 1) {
6804                 if (!tunnel_item)
6805                         return rte_flow_error_set(error, ENOTSUP,
6806                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6807                                                   integrity_item,
6808                                                   "missing tunnel item");
6809                 item = tunnel_item;
6810                 end_item = mlx5_find_end_item(tunnel_item);
6811         } else {
6812                 end_item = tunnel_item ? tunnel_item :
6813                            mlx5_find_end_item(integrity_item);
6814         }
6815         if (mask->l3_ok || mask->ipv4_csum_ok) {
6816                 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6817                 if (!protocol)
6818                         return rte_flow_error_set(error, EINVAL,
6819                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6820                                                   integrity_item,
6821                                                   "missing L3 protocol");
6822         }
6823         if (mask->l4_ok || mask->l4_csum_ok) {
6824                 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6825                 if (!protocol)
6826                         return rte_flow_error_set(error, EINVAL,
6827                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6828                                                   integrity_item,
6829                                                   "missing L4 protocol");
6830         }
6831         return 0;
6832 }
6833
6834 /**
6835  * Internal validation function. For validating both actions and items.
6836  *
6837  * @param[in] dev
6838  *   Pointer to the rte_eth_dev structure.
6839  * @param[in] attr
6840  *   Pointer to the flow attributes.
6841  * @param[in] items
6842  *   Pointer to the list of items.
6843  * @param[in] actions
6844  *   Pointer to the list of actions.
6845  * @param[in] external
6846  *   This flow rule is created by request external to PMD.
6847  * @param[in] hairpin
6848  *   Number of hairpin TX actions, 0 means classic flow.
6849  * @param[out] error
6850  *   Pointer to the error structure.
6851  *
6852  * @return
6853  *   0 on success, a negative errno value otherwise and rte_errno is set.
6854  */
6855 static int
6856 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6857                  const struct rte_flow_item items[],
6858                  const struct rte_flow_action actions[],
6859                  bool external, int hairpin, struct rte_flow_error *error)
6860 {
6861         int ret;
6862         uint64_t action_flags = 0;
6863         uint64_t item_flags = 0;
6864         uint64_t last_item = 0;
6865         uint8_t next_protocol = 0xff;
6866         uint16_t ether_type = 0;
6867         int actions_n = 0;
6868         uint8_t item_ipv6_proto = 0;
6869         int fdb_mirror_limit = 0;
6870         int modify_after_mirror = 0;
6871         const struct rte_flow_item *geneve_item = NULL;
6872         const struct rte_flow_item *gre_item = NULL;
6873         const struct rte_flow_item *gtp_item = NULL;
6874         const struct rte_flow_action_raw_decap *decap;
6875         const struct rte_flow_action_raw_encap *encap;
6876         const struct rte_flow_action_rss *rss = NULL;
6877         const struct rte_flow_action_rss *sample_rss = NULL;
6878         const struct rte_flow_action_count *sample_count = NULL;
6879         const struct rte_flow_item_tcp nic_tcp_mask = {
6880                 .hdr = {
6881                         .tcp_flags = 0xFF,
6882                         .src_port = RTE_BE16(UINT16_MAX),
6883                         .dst_port = RTE_BE16(UINT16_MAX),
6884                 }
6885         };
6886         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6887                 .hdr = {
6888                         .src_addr =
6889                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6890                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6891                         .dst_addr =
6892                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6893                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6894                         .vtc_flow = RTE_BE32(0xffffffff),
6895                         .proto = 0xff,
6896                         .hop_limits = 0xff,
6897                 },
6898                 .has_frag_ext = 1,
6899         };
6900         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6901                 .hdr = {
6902                         .common = {
6903                                 .u32 =
6904                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6905                                         .type = 0xFF,
6906                                         }).u32),
6907                         },
6908                         .dummy[0] = 0xffffffff,
6909                 },
6910         };
6911         struct mlx5_priv *priv = dev->data->dev_private;
6912         struct mlx5_dev_config *dev_conf = &priv->config;
6913         uint16_t queue_index = 0xFFFF;
6914         const struct rte_flow_item_vlan *vlan_m = NULL;
6915         uint32_t rw_act_num = 0;
6916         uint64_t is_root;
6917         const struct mlx5_flow_tunnel *tunnel;
6918         enum mlx5_tof_rule_type tof_rule_type;
6919         struct flow_grp_info grp_info = {
6920                 .external = !!external,
6921                 .transfer = !!attr->transfer,
6922                 .fdb_def_rule = !!priv->fdb_def_rule,
6923                 .std_tbl_fix = true,
6924         };
6925         const struct rte_eth_hairpin_conf *conf;
6926         const struct rte_flow_item *rule_items = items;
6927         const struct rte_flow_item *port_id_item = NULL;
6928         bool def_policy = false;
6929
6930         if (items == NULL)
6931                 return -1;
6932         tunnel = is_tunnel_offload_active(dev) ?
6933                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6934         if (tunnel) {
6935                 if (priv->representor)
6936                         return rte_flow_error_set
6937                                 (error, ENOTSUP,
6938                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6939                                  NULL, "decap not supported for VF representor");
6940                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6941                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6942                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6943                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6944                                         MLX5_FLOW_ACTION_DECAP;
6945                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6946                                         (dev, attr, tunnel, tof_rule_type);
6947         }
6948         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6949         if (ret < 0)
6950                 return ret;
6951         is_root = (uint64_t)ret;
6952         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6953                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6954                 int type = items->type;
6955
6956                 if (!mlx5_flow_os_item_supported(type))
6957                         return rte_flow_error_set(error, ENOTSUP,
6958                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6959                                                   NULL, "item not supported");
6960                 switch (type) {
6961                 case RTE_FLOW_ITEM_TYPE_VOID:
6962                         break;
6963                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6964                         ret = flow_dv_validate_item_port_id
6965                                         (dev, items, attr, item_flags, error);
6966                         if (ret < 0)
6967                                 return ret;
6968                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6969                         port_id_item = items;
6970                         break;
6971                 case RTE_FLOW_ITEM_TYPE_ETH:
6972                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6973                                                           true, error);
6974                         if (ret < 0)
6975                                 return ret;
6976                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6977                                              MLX5_FLOW_LAYER_OUTER_L2;
6978                         if (items->mask != NULL && items->spec != NULL) {
6979                                 ether_type =
6980                                         ((const struct rte_flow_item_eth *)
6981                                          items->spec)->type;
6982                                 ether_type &=
6983                                         ((const struct rte_flow_item_eth *)
6984                                          items->mask)->type;
6985                                 ether_type = rte_be_to_cpu_16(ether_type);
6986                         } else {
6987                                 ether_type = 0;
6988                         }
6989                         break;
6990                 case RTE_FLOW_ITEM_TYPE_VLAN:
6991                         ret = flow_dv_validate_item_vlan(items, item_flags,
6992                                                          dev, error);
6993                         if (ret < 0)
6994                                 return ret;
6995                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6996                                              MLX5_FLOW_LAYER_OUTER_VLAN;
6997                         if (items->mask != NULL && items->spec != NULL) {
6998                                 ether_type =
6999                                         ((const struct rte_flow_item_vlan *)
7000                                          items->spec)->inner_type;
7001                                 ether_type &=
7002                                         ((const struct rte_flow_item_vlan *)
7003                                          items->mask)->inner_type;
7004                                 ether_type = rte_be_to_cpu_16(ether_type);
7005                         } else {
7006                                 ether_type = 0;
7007                         }
7008                         /* Store outer VLAN mask for of_push_vlan action. */
7009                         if (!tunnel)
7010                                 vlan_m = items->mask;
7011                         break;
7012                 case RTE_FLOW_ITEM_TYPE_IPV4:
7013                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7014                                                   &item_flags, &tunnel);
7015                         ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
7016                                                          last_item, ether_type,
7017                                                          error);
7018                         if (ret < 0)
7019                                 return ret;
7020                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7021                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7022                         if (items->mask != NULL &&
7023                             ((const struct rte_flow_item_ipv4 *)
7024                              items->mask)->hdr.next_proto_id) {
7025                                 next_protocol =
7026                                         ((const struct rte_flow_item_ipv4 *)
7027                                          (items->spec))->hdr.next_proto_id;
7028                                 next_protocol &=
7029                                         ((const struct rte_flow_item_ipv4 *)
7030                                          (items->mask))->hdr.next_proto_id;
7031                         } else {
7032                                 /* Reset for inner layer. */
7033                                 next_protocol = 0xff;
7034                         }
7035                         break;
7036                 case RTE_FLOW_ITEM_TYPE_IPV6:
7037                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7038                                                   &item_flags, &tunnel);
7039                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7040                                                            last_item,
7041                                                            ether_type,
7042                                                            &nic_ipv6_mask,
7043                                                            error);
7044                         if (ret < 0)
7045                                 return ret;
7046                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7047                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7048                         if (items->mask != NULL &&
7049                             ((const struct rte_flow_item_ipv6 *)
7050                              items->mask)->hdr.proto) {
7051                                 item_ipv6_proto =
7052                                         ((const struct rte_flow_item_ipv6 *)
7053                                          items->spec)->hdr.proto;
7054                                 next_protocol =
7055                                         ((const struct rte_flow_item_ipv6 *)
7056                                          items->spec)->hdr.proto;
7057                                 next_protocol &=
7058                                         ((const struct rte_flow_item_ipv6 *)
7059                                          items->mask)->hdr.proto;
7060                         } else {
7061                                 /* Reset for inner layer. */
7062                                 next_protocol = 0xff;
7063                         }
7064                         break;
7065                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7066                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
7067                                                                   item_flags,
7068                                                                   error);
7069                         if (ret < 0)
7070                                 return ret;
7071                         last_item = tunnel ?
7072                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7073                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7074                         if (items->mask != NULL &&
7075                             ((const struct rte_flow_item_ipv6_frag_ext *)
7076                              items->mask)->hdr.next_header) {
7077                                 next_protocol =
7078                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7079                                  items->spec)->hdr.next_header;
7080                                 next_protocol &=
7081                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7082                                  items->mask)->hdr.next_header;
7083                         } else {
7084                                 /* Reset for inner layer. */
7085                                 next_protocol = 0xff;
7086                         }
7087                         break;
7088                 case RTE_FLOW_ITEM_TYPE_TCP:
7089                         ret = mlx5_flow_validate_item_tcp
7090                                                 (items, item_flags,
7091                                                  next_protocol,
7092                                                  &nic_tcp_mask,
7093                                                  error);
7094                         if (ret < 0)
7095                                 return ret;
7096                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7097                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7098                         break;
7099                 case RTE_FLOW_ITEM_TYPE_UDP:
7100                         ret = mlx5_flow_validate_item_udp(items, item_flags,
7101                                                           next_protocol,
7102                                                           error);
7103                         if (ret < 0)
7104                                 return ret;
7105                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7106                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7107                         break;
7108                 case RTE_FLOW_ITEM_TYPE_GRE:
7109                         ret = mlx5_flow_validate_item_gre(items, item_flags,
7110                                                           next_protocol, error);
7111                         if (ret < 0)
7112                                 return ret;
7113                         gre_item = items;
7114                         last_item = MLX5_FLOW_LAYER_GRE;
7115                         break;
7116                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7117                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7118                                                             next_protocol,
7119                                                             error);
7120                         if (ret < 0)
7121                                 return ret;
7122                         last_item = MLX5_FLOW_LAYER_NVGRE;
7123                         break;
7124                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7125                         ret = mlx5_flow_validate_item_gre_key
7126                                 (items, item_flags, gre_item, error);
7127                         if (ret < 0)
7128                                 return ret;
7129                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7130                         break;
7131                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7132                         ret = mlx5_flow_validate_item_vxlan(dev, items,
7133                                                             item_flags, attr,
7134                                                             error);
7135                         if (ret < 0)
7136                                 return ret;
7137                         last_item = MLX5_FLOW_LAYER_VXLAN;
7138                         break;
7139                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7140                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
7141                                                                 item_flags, dev,
7142                                                                 error);
7143                         if (ret < 0)
7144                                 return ret;
7145                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7146                         break;
7147                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7148                         ret = mlx5_flow_validate_item_geneve(items,
7149                                                              item_flags, dev,
7150                                                              error);
7151                         if (ret < 0)
7152                                 return ret;
7153                         geneve_item = items;
7154                         last_item = MLX5_FLOW_LAYER_GENEVE;
7155                         break;
7156                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7157                         ret = mlx5_flow_validate_item_geneve_opt(items,
7158                                                                  last_item,
7159                                                                  geneve_item,
7160                                                                  dev,
7161                                                                  error);
7162                         if (ret < 0)
7163                                 return ret;
7164                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7165                         break;
7166                 case RTE_FLOW_ITEM_TYPE_MPLS:
7167                         ret = mlx5_flow_validate_item_mpls(dev, items,
7168                                                            item_flags,
7169                                                            last_item, error);
7170                         if (ret < 0)
7171                                 return ret;
7172                         last_item = MLX5_FLOW_LAYER_MPLS;
7173                         break;
7174
7175                 case RTE_FLOW_ITEM_TYPE_MARK:
7176                         ret = flow_dv_validate_item_mark(dev, items, attr,
7177                                                          error);
7178                         if (ret < 0)
7179                                 return ret;
7180                         last_item = MLX5_FLOW_ITEM_MARK;
7181                         break;
7182                 case RTE_FLOW_ITEM_TYPE_META:
7183                         ret = flow_dv_validate_item_meta(dev, items, attr,
7184                                                          error);
7185                         if (ret < 0)
7186                                 return ret;
7187                         last_item = MLX5_FLOW_ITEM_METADATA;
7188                         break;
7189                 case RTE_FLOW_ITEM_TYPE_ICMP:
7190                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
7191                                                            next_protocol,
7192                                                            error);
7193                         if (ret < 0)
7194                                 return ret;
7195                         last_item = MLX5_FLOW_LAYER_ICMP;
7196                         break;
7197                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7198                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7199                                                             next_protocol,
7200                                                             error);
7201                         if (ret < 0)
7202                                 return ret;
7203                         item_ipv6_proto = IPPROTO_ICMPV6;
7204                         last_item = MLX5_FLOW_LAYER_ICMP6;
7205                         break;
7206                 case RTE_FLOW_ITEM_TYPE_TAG:
7207                         ret = flow_dv_validate_item_tag(dev, items,
7208                                                         attr, error);
7209                         if (ret < 0)
7210                                 return ret;
7211                         last_item = MLX5_FLOW_ITEM_TAG;
7212                         break;
7213                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7214                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7215                         break;
7216                 case RTE_FLOW_ITEM_TYPE_GTP:
7217                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7218                                                         error);
7219                         if (ret < 0)
7220                                 return ret;
7221                         gtp_item = items;
7222                         last_item = MLX5_FLOW_LAYER_GTP;
7223                         break;
7224                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7225                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
7226                                                             gtp_item, attr,
7227                                                             error);
7228                         if (ret < 0)
7229                                 return ret;
7230                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
7231                         break;
7232                 case RTE_FLOW_ITEM_TYPE_ECPRI:
7233                         /* Capacity will be checked in the translate stage. */
7234                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7235                                                             last_item,
7236                                                             ether_type,
7237                                                             &nic_ecpri_mask,
7238                                                             error);
7239                         if (ret < 0)
7240                                 return ret;
7241                         last_item = MLX5_FLOW_LAYER_ECPRI;
7242                         break;
7243                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7244                         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
7245                                 return rte_flow_error_set
7246                                         (error, ENOTSUP,
7247                                          RTE_FLOW_ERROR_TYPE_ITEM,
7248                                          NULL, "multiple integrity items not supported");
7249                         ret = flow_dv_validate_item_integrity(dev, rule_items,
7250                                                               items, error);
7251                         if (ret < 0)
7252                                 return ret;
7253                         last_item = MLX5_FLOW_ITEM_INTEGRITY;
7254                         break;
7255                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7256                         ret = flow_dv_validate_item_aso_ct(dev, items,
7257                                                            &item_flags, error);
7258                         if (ret < 0)
7259                                 return ret;
7260                         break;
7261                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7262                         /* tunnel offload item was processed before
7263                          * list it here as a supported type
7264                          */
7265                         break;
7266                 default:
7267                         return rte_flow_error_set(error, ENOTSUP,
7268                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7269                                                   NULL, "item not supported");
7270                 }
7271                 item_flags |= last_item;
7272         }
7273         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7274                 int type = actions->type;
7275                 bool shared_count = false;
7276
7277                 if (!mlx5_flow_os_action_supported(type))
7278                         return rte_flow_error_set(error, ENOTSUP,
7279                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7280                                                   actions,
7281                                                   "action not supported");
7282                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7283                         return rte_flow_error_set(error, ENOTSUP,
7284                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7285                                                   actions, "too many actions");
7286                 if (action_flags &
7287                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7288                         return rte_flow_error_set(error, ENOTSUP,
7289                                 RTE_FLOW_ERROR_TYPE_ACTION,
7290                                 NULL, "meter action with policy "
7291                                 "must be the last action");
7292                 switch (type) {
7293                 case RTE_FLOW_ACTION_TYPE_VOID:
7294                         break;
7295                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7296                         ret = flow_dv_validate_action_port_id(dev,
7297                                                               action_flags,
7298                                                               actions,
7299                                                               attr,
7300                                                               error);
7301                         if (ret)
7302                                 return ret;
7303                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7304                         ++actions_n;
7305                         break;
7306                 case RTE_FLOW_ACTION_TYPE_FLAG:
7307                         ret = flow_dv_validate_action_flag(dev, action_flags,
7308                                                            attr, error);
7309                         if (ret < 0)
7310                                 return ret;
7311                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7312                                 /* Count all modify-header actions as one. */
7313                                 if (!(action_flags &
7314                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7315                                         ++actions_n;
7316                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7317                                                 MLX5_FLOW_ACTION_MARK_EXT;
7318                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7319                                         modify_after_mirror = 1;
7320
7321                         } else {
7322                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7323                                 ++actions_n;
7324                         }
7325                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7326                         break;
7327                 case RTE_FLOW_ACTION_TYPE_MARK:
7328                         ret = flow_dv_validate_action_mark(dev, actions,
7329                                                            action_flags,
7330                                                            attr, error);
7331                         if (ret < 0)
7332                                 return ret;
7333                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7334                                 /* Count all modify-header actions as one. */
7335                                 if (!(action_flags &
7336                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7337                                         ++actions_n;
7338                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7339                                                 MLX5_FLOW_ACTION_MARK_EXT;
7340                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7341                                         modify_after_mirror = 1;
7342                         } else {
7343                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7344                                 ++actions_n;
7345                         }
7346                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7347                         break;
7348                 case RTE_FLOW_ACTION_TYPE_SET_META:
7349                         ret = flow_dv_validate_action_set_meta(dev, actions,
7350                                                                action_flags,
7351                                                                attr, error);
7352                         if (ret < 0)
7353                                 return ret;
7354                         /* Count all modify-header actions as one action. */
7355                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7356                                 ++actions_n;
7357                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7358                                 modify_after_mirror = 1;
7359                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7360                         rw_act_num += MLX5_ACT_NUM_SET_META;
7361                         break;
7362                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7363                         ret = flow_dv_validate_action_set_tag(dev, actions,
7364                                                               action_flags,
7365                                                               attr, error);
7366                         if (ret < 0)
7367                                 return ret;
7368                         /* Count all modify-header actions as one action. */
7369                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7370                                 ++actions_n;
7371                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7372                                 modify_after_mirror = 1;
7373                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7374                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7375                         break;
7376                 case RTE_FLOW_ACTION_TYPE_DROP:
7377                         ret = mlx5_flow_validate_action_drop(action_flags,
7378                                                              attr, error);
7379                         if (ret < 0)
7380                                 return ret;
7381                         action_flags |= MLX5_FLOW_ACTION_DROP;
7382                         ++actions_n;
7383                         break;
7384                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7385                         ret = mlx5_flow_validate_action_queue(actions,
7386                                                               action_flags, dev,
7387                                                               attr, error);
7388                         if (ret < 0)
7389                                 return ret;
7390                         queue_index = ((const struct rte_flow_action_queue *)
7391                                                         (actions->conf))->index;
7392                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7393                         ++actions_n;
7394                         break;
7395                 case RTE_FLOW_ACTION_TYPE_RSS:
7396                         rss = actions->conf;
7397                         ret = mlx5_flow_validate_action_rss(actions,
7398                                                             action_flags, dev,
7399                                                             attr, item_flags,
7400                                                             error);
7401                         if (ret < 0)
7402                                 return ret;
7403                         if (rss && sample_rss &&
7404                             (sample_rss->level != rss->level ||
7405                             sample_rss->types != rss->types))
7406                                 return rte_flow_error_set(error, ENOTSUP,
7407                                         RTE_FLOW_ERROR_TYPE_ACTION,
7408                                         NULL,
7409                                         "Can't use the different RSS types "
7410                                         "or level in the same flow");
7411                         if (rss != NULL && rss->queue_num)
7412                                 queue_index = rss->queue[0];
7413                         action_flags |= MLX5_FLOW_ACTION_RSS;
7414                         ++actions_n;
7415                         break;
7416                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7417                         ret =
7418                         mlx5_flow_validate_action_default_miss(action_flags,
7419                                         attr, error);
7420                         if (ret < 0)
7421                                 return ret;
7422                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7423                         ++actions_n;
7424                         break;
7425                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7426                 case RTE_FLOW_ACTION_TYPE_COUNT:
7427                         shared_count = is_shared_action_count(actions);
7428                         ret = flow_dv_validate_action_count(dev, shared_count,
7429                                                             action_flags,
7430                                                             error);
7431                         if (ret < 0)
7432                                 return ret;
7433                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7434                         ++actions_n;
7435                         break;
7436                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7437                         if (flow_dv_validate_action_pop_vlan(dev,
7438                                                              action_flags,
7439                                                              actions,
7440                                                              item_flags, attr,
7441                                                              error))
7442                                 return -rte_errno;
7443                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7444                                 modify_after_mirror = 1;
7445                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7446                         ++actions_n;
7447                         break;
7448                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7449                         ret = flow_dv_validate_action_push_vlan(dev,
7450                                                                 action_flags,
7451                                                                 vlan_m,
7452                                                                 actions, attr,
7453                                                                 error);
7454                         if (ret < 0)
7455                                 return ret;
7456                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7457                                 modify_after_mirror = 1;
7458                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7459                         ++actions_n;
7460                         break;
7461                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7462                         ret = flow_dv_validate_action_set_vlan_pcp
7463                                                 (action_flags, actions, error);
7464                         if (ret < 0)
7465                                 return ret;
7466                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7467                                 modify_after_mirror = 1;
7468                         /* Count PCP with push_vlan command. */
7469                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7470                         break;
7471                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7472                         ret = flow_dv_validate_action_set_vlan_vid
7473                                                 (item_flags, action_flags,
7474                                                  actions, error);
7475                         if (ret < 0)
7476                                 return ret;
7477                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7478                                 modify_after_mirror = 1;
7479                         /* Count VID with push_vlan command. */
7480                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7481                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7482                         break;
7483                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7484                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7485                         ret = flow_dv_validate_action_l2_encap(dev,
7486                                                                action_flags,
7487                                                                actions, attr,
7488                                                                error);
7489                         if (ret < 0)
7490                                 return ret;
7491                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7492                         ++actions_n;
7493                         break;
7494                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7495                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7496                         ret = flow_dv_validate_action_decap(dev, action_flags,
7497                                                             actions, item_flags,
7498                                                             attr, error);
7499                         if (ret < 0)
7500                                 return ret;
7501                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7502                                 modify_after_mirror = 1;
7503                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7504                         ++actions_n;
7505                         break;
7506                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7507                         ret = flow_dv_validate_action_raw_encap_decap
7508                                 (dev, NULL, actions->conf, attr, &action_flags,
7509                                  &actions_n, actions, item_flags, error);
7510                         if (ret < 0)
7511                                 return ret;
7512                         break;
7513                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7514                         decap = actions->conf;
7515                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7516                                 ;
7517                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7518                                 encap = NULL;
7519                                 actions--;
7520                         } else {
7521                                 encap = actions->conf;
7522                         }
7523                         ret = flow_dv_validate_action_raw_encap_decap
7524                                            (dev,
7525                                             decap ? decap : &empty_decap, encap,
7526                                             attr, &action_flags, &actions_n,
7527                                             actions, item_flags, error);
7528                         if (ret < 0)
7529                                 return ret;
7530                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7531                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7532                                 modify_after_mirror = 1;
7533                         break;
7534                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7535                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7536                         ret = flow_dv_validate_action_modify_mac(action_flags,
7537                                                                  actions,
7538                                                                  item_flags,
7539                                                                  error);
7540                         if (ret < 0)
7541                                 return ret;
7542                         /* Count all modify-header actions as one action. */
7543                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7544                                 ++actions_n;
7545                         action_flags |= actions->type ==
7546                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7547                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7548                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7549                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7550                                 modify_after_mirror = 1;
7551                         /*
7552                          * Even if the source and destination MAC addresses have
7553                          * overlap in the header with 4B alignment, the convert
7554                          * function will handle them separately and 4 SW actions
7555                          * will be created. And 2 actions will be added each
7556                          * time no matter how many bytes of address will be set.
7557                          */
7558                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7559                         break;
7560                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7561                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7562                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7563                                                                   actions,
7564                                                                   item_flags,
7565                                                                   error);
7566                         if (ret < 0)
7567                                 return ret;
7568                         /* Count all modify-header actions as one action. */
7569                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7570                                 ++actions_n;
7571                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7572                                 modify_after_mirror = 1;
7573                         action_flags |= actions->type ==
7574                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7575                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7576                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7577                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7578                         break;
7579                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7580                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7581                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7582                                                                   actions,
7583                                                                   item_flags,
7584                                                                   error);
7585                         if (ret < 0)
7586                                 return ret;
7587                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7588                                 return rte_flow_error_set(error, ENOTSUP,
7589                                         RTE_FLOW_ERROR_TYPE_ACTION,
7590                                         actions,
7591                                         "Can't change header "
7592                                         "with ICMPv6 proto");
7593                         /* Count all modify-header actions as one action. */
7594                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7595                                 ++actions_n;
7596                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7597                                 modify_after_mirror = 1;
7598                         action_flags |= actions->type ==
7599                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7600                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7601                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7602                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7603                         break;
7604                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7605                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7606                         ret = flow_dv_validate_action_modify_tp(action_flags,
7607                                                                 actions,
7608                                                                 item_flags,
7609                                                                 error);
7610                         if (ret < 0)
7611                                 return ret;
7612                         /* Count all modify-header actions as one action. */
7613                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7614                                 ++actions_n;
7615                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7616                                 modify_after_mirror = 1;
7617                         action_flags |= actions->type ==
7618                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7619                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7620                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7621                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7622                         break;
7623                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7624                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7625                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7626                                                                  actions,
7627                                                                  item_flags,
7628                                                                  error);
7629                         if (ret < 0)
7630                                 return ret;
7631                         /* Count all modify-header actions as one action. */
7632                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7633                                 ++actions_n;
7634                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7635                                 modify_after_mirror = 1;
7636                         action_flags |= actions->type ==
7637                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7638                                                 MLX5_FLOW_ACTION_SET_TTL :
7639                                                 MLX5_FLOW_ACTION_DEC_TTL;
7640                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7641                         break;
7642                 case RTE_FLOW_ACTION_TYPE_JUMP:
7643                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7644                                                            action_flags,
7645                                                            attr, external,
7646                                                            error);
7647                         if (ret)
7648                                 return ret;
7649                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7650                             fdb_mirror_limit)
7651                                 return rte_flow_error_set(error, EINVAL,
7652                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7653                                                   NULL,
7654                                                   "sample and jump action combination is not supported");
7655                         ++actions_n;
7656                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7657                         break;
7658                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7659                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7660                         ret = flow_dv_validate_action_modify_tcp_seq
7661                                                                 (action_flags,
7662                                                                  actions,
7663                                                                  item_flags,
7664                                                                  error);
7665                         if (ret < 0)
7666                                 return ret;
7667                         /* Count all modify-header actions as one action. */
7668                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7669                                 ++actions_n;
7670                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7671                                 modify_after_mirror = 1;
7672                         action_flags |= actions->type ==
7673                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7674                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7675                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7676                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7677                         break;
7678                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7679                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7680                         ret = flow_dv_validate_action_modify_tcp_ack
7681                                                                 (action_flags,
7682                                                                  actions,
7683                                                                  item_flags,
7684                                                                  error);
7685                         if (ret < 0)
7686                                 return ret;
7687                         /* Count all modify-header actions as one action. */
7688                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7689                                 ++actions_n;
7690                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7691                                 modify_after_mirror = 1;
7692                         action_flags |= actions->type ==
7693                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7694                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7695                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7696                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7697                         break;
7698                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7699                         break;
7700                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7701                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7702                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7703                         break;
7704                 case RTE_FLOW_ACTION_TYPE_METER:
7705                         ret = mlx5_flow_validate_action_meter(dev,
7706                                                               action_flags,
7707                                                               actions, attr,
7708                                                               port_id_item,
7709                                                               &def_policy,
7710                                                               error);
7711                         if (ret < 0)
7712                                 return ret;
7713                         action_flags |= MLX5_FLOW_ACTION_METER;
7714                         if (!def_policy)
7715                                 action_flags |=
7716                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7717                         ++actions_n;
7718                         /* Meter action will add one more TAG action. */
7719                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7720                         break;
7721                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7722                         if (!attr->transfer && !attr->group)
7723                                 return rte_flow_error_set(error, ENOTSUP,
7724                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7725                                                                            NULL,
7726                           "Shared ASO age action is not supported for group 0");
7727                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7728                                 return rte_flow_error_set
7729                                                   (error, EINVAL,
7730                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7731                                                    NULL,
7732                                                    "duplicate age actions set");
7733                         action_flags |= MLX5_FLOW_ACTION_AGE;
7734                         ++actions_n;
7735                         break;
7736                 case RTE_FLOW_ACTION_TYPE_AGE:
7737                         ret = flow_dv_validate_action_age(action_flags,
7738                                                           actions, dev,
7739                                                           error);
7740                         if (ret < 0)
7741                                 return ret;
7742                         /*
7743                          * Validate the regular AGE action (using counter)
7744                          * mutual exclusion with share counter actions.
7745                          */
7746                         if (!priv->sh->flow_hit_aso_en) {
7747                                 if (shared_count)
7748                                         return rte_flow_error_set
7749                                                 (error, EINVAL,
7750                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7751                                                 NULL,
7752                                                 "old age and shared count combination is not supported");
7753                                 if (sample_count)
7754                                         return rte_flow_error_set
7755                                                 (error, EINVAL,
7756                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7757                                                 NULL,
7758                                                 "old age action and count must be in the same sub flow");
7759                         }
7760                         action_flags |= MLX5_FLOW_ACTION_AGE;
7761                         ++actions_n;
7762                         break;
7763                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7764                         ret = flow_dv_validate_action_modify_ipv4_dscp
7765                                                          (action_flags,
7766                                                           actions,
7767                                                           item_flags,
7768                                                           error);
7769                         if (ret < 0)
7770                                 return ret;
7771                         /* Count all modify-header actions as one action. */
7772                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7773                                 ++actions_n;
7774                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7775                                 modify_after_mirror = 1;
7776                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7777                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7778                         break;
7779                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7780                         ret = flow_dv_validate_action_modify_ipv6_dscp
7781                                                                 (action_flags,
7782                                                                  actions,
7783                                                                  item_flags,
7784                                                                  error);
7785                         if (ret < 0)
7786                                 return ret;
7787                         /* Count all modify-header actions as one action. */
7788                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7789                                 ++actions_n;
7790                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7791                                 modify_after_mirror = 1;
7792                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7793                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7794                         break;
7795                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7796                         ret = flow_dv_validate_action_sample(&action_flags,
7797                                                              actions, dev,
7798                                                              attr, item_flags,
7799                                                              rss, &sample_rss,
7800                                                              &sample_count,
7801                                                              &fdb_mirror_limit,
7802                                                              error);
7803                         if (ret < 0)
7804                                 return ret;
7805                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7806                         ++actions_n;
7807                         break;
7808                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7809                         ret = flow_dv_validate_action_modify_field(dev,
7810                                                                    action_flags,
7811                                                                    actions,
7812                                                                    attr,
7813                                                                    error);
7814                         if (ret < 0)
7815                                 return ret;
7816                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7817                                 modify_after_mirror = 1;
7818                         /* Count all modify-header actions as one action. */
7819                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7820                                 ++actions_n;
7821                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7822                         rw_act_num += ret;
7823                         break;
7824                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7825                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7826                                                              item_flags, attr,
7827                                                              error);
7828                         if (ret < 0)
7829                                 return ret;
7830                         action_flags |= MLX5_FLOW_ACTION_CT;
7831                         break;
7832                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7833                         /* tunnel offload action was processed before
7834                          * list it here as a supported type
7835                          */
7836                         break;
7837                 default:
7838                         return rte_flow_error_set(error, ENOTSUP,
7839                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7840                                                   actions,
7841                                                   "action not supported");
7842                 }
7843         }
7844         /*
7845          * Validate actions in flow rules
7846          * - Explicit decap action is prohibited by the tunnel offload API.
7847          * - Drop action in tunnel steer rule is prohibited by the API.
7848          * - Application cannot use MARK action because it's value can mask
7849          *   tunnel default miss nitification.
7850          * - JUMP in tunnel match rule has no support in current PMD
7851          *   implementation.
7852          * - TAG & META are reserved for future uses.
7853          */
7854         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7855                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7856                                             MLX5_FLOW_ACTION_MARK     |
7857                                             MLX5_FLOW_ACTION_SET_TAG  |
7858                                             MLX5_FLOW_ACTION_SET_META |
7859                                             MLX5_FLOW_ACTION_DROP;
7860
7861                 if (action_flags & bad_actions_mask)
7862                         return rte_flow_error_set
7863                                         (error, EINVAL,
7864                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7865                                         "Invalid RTE action in tunnel "
7866                                         "set decap rule");
7867                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7868                         return rte_flow_error_set
7869                                         (error, EINVAL,
7870                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7871                                         "tunnel set decap rule must terminate "
7872                                         "with JUMP");
7873                 if (!attr->ingress)
7874                         return rte_flow_error_set
7875                                         (error, EINVAL,
7876                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7877                                         "tunnel flows for ingress traffic only");
7878         }
7879         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7880                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7881                                             MLX5_FLOW_ACTION_MARK    |
7882                                             MLX5_FLOW_ACTION_SET_TAG |
7883                                             MLX5_FLOW_ACTION_SET_META;
7884
7885                 if (action_flags & bad_actions_mask)
7886                         return rte_flow_error_set
7887                                         (error, EINVAL,
7888                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7889                                         "Invalid RTE action in tunnel "
7890                                         "set match rule");
7891         }
7892         /*
7893          * Validate the drop action mutual exclusion with other actions.
7894          * Drop action is mutually-exclusive with any other action, except for
7895          * Count action.
7896          * Drop action compatibility with tunnel offload was already validated.
7897          */
7898         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7899                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7900         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7901             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7902                 return rte_flow_error_set(error, EINVAL,
7903                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7904                                           "Drop action is mutually-exclusive "
7905                                           "with any other action, except for "
7906                                           "Count action");
7907         /* Eswitch has few restrictions on using items and actions */
7908         if (attr->transfer) {
7909                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7910                     action_flags & MLX5_FLOW_ACTION_FLAG)
7911                         return rte_flow_error_set(error, ENOTSUP,
7912                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7913                                                   NULL,
7914                                                   "unsupported action FLAG");
7915                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7916                     action_flags & MLX5_FLOW_ACTION_MARK)
7917                         return rte_flow_error_set(error, ENOTSUP,
7918                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7919                                                   NULL,
7920                                                   "unsupported action MARK");
7921                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7922                         return rte_flow_error_set(error, ENOTSUP,
7923                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7924                                                   NULL,
7925                                                   "unsupported action QUEUE");
7926                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7927                         return rte_flow_error_set(error, ENOTSUP,
7928                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7929                                                   NULL,
7930                                                   "unsupported action RSS");
7931                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7932                         return rte_flow_error_set(error, EINVAL,
7933                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7934                                                   actions,
7935                                                   "no fate action is found");
7936         } else {
7937                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7938                         return rte_flow_error_set(error, EINVAL,
7939                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7940                                                   actions,
7941                                                   "no fate action is found");
7942         }
7943         /*
7944          * Continue validation for Xcap and VLAN actions.
7945          * If hairpin is working in explicit TX rule mode, there is no actions
7946          * splitting and the validation of hairpin ingress flow should be the
7947          * same as other standard flows.
7948          */
7949         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7950                              MLX5_FLOW_VLAN_ACTIONS)) &&
7951             (queue_index == 0xFFFF ||
7952              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7953              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7954              conf->tx_explicit != 0))) {
7955                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7956                     MLX5_FLOW_XCAP_ACTIONS)
7957                         return rte_flow_error_set(error, ENOTSUP,
7958                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7959                                                   NULL, "encap and decap "
7960                                                   "combination aren't supported");
7961                 if (!attr->transfer && attr->ingress) {
7962                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7963                                 return rte_flow_error_set
7964                                                 (error, ENOTSUP,
7965                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7966                                                  NULL, "encap is not supported"
7967                                                  " for ingress traffic");
7968                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7969                                 return rte_flow_error_set
7970                                                 (error, ENOTSUP,
7971                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7972                                                  NULL, "push VLAN action not "
7973                                                  "supported for ingress");
7974                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7975                                         MLX5_FLOW_VLAN_ACTIONS)
7976                                 return rte_flow_error_set
7977                                                 (error, ENOTSUP,
7978                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7979                                                  NULL, "no support for "
7980                                                  "multiple VLAN actions");
7981                 }
7982         }
7983         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7984                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7985                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7986                         attr->ingress)
7987                         return rte_flow_error_set
7988                                 (error, ENOTSUP,
7989                                 RTE_FLOW_ERROR_TYPE_ACTION,
7990                                 NULL, "fate action not supported for "
7991                                 "meter with policy");
7992                 if (attr->egress) {
7993                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7994                                 return rte_flow_error_set
7995                                         (error, ENOTSUP,
7996                                         RTE_FLOW_ERROR_TYPE_ACTION,
7997                                         NULL, "modify header action in egress "
7998                                         "cannot be done before meter action");
7999                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
8000                                 return rte_flow_error_set
8001                                         (error, ENOTSUP,
8002                                         RTE_FLOW_ERROR_TYPE_ACTION,
8003                                         NULL, "encap action in egress "
8004                                         "cannot be done before meter action");
8005                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8006                                 return rte_flow_error_set
8007                                         (error, ENOTSUP,
8008                                         RTE_FLOW_ERROR_TYPE_ACTION,
8009                                         NULL, "push vlan action in egress "
8010                                         "cannot be done before meter action");
8011                 }
8012         }
8013         /*
8014          * Hairpin flow will add one more TAG action in TX implicit mode.
8015          * In TX explicit mode, there will be no hairpin flow ID.
8016          */
8017         if (hairpin > 0)
8018                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8019         /* extra metadata enabled: one more TAG action will be add. */
8020         if (dev_conf->dv_flow_en &&
8021             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8022             mlx5_flow_ext_mreg_supported(dev))
8023                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8024         if (rw_act_num >
8025                         flow_dv_modify_hdr_action_max(dev, is_root)) {
8026                 return rte_flow_error_set(error, ENOTSUP,
8027                                           RTE_FLOW_ERROR_TYPE_ACTION,
8028                                           NULL, "too many header modify"
8029                                           " actions to support");
8030         }
8031         /* Eswitch egress mirror and modify flow has limitation on CX5 */
8032         if (fdb_mirror_limit && modify_after_mirror)
8033                 return rte_flow_error_set(error, EINVAL,
8034                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8035                                 "sample before modify action is not supported");
8036         return 0;
8037 }
8038
8039 /**
8040  * Internal preparation function. Allocates the DV flow size,
8041  * this size is constant.
8042  *
8043  * @param[in] dev
8044  *   Pointer to the rte_eth_dev structure.
8045  * @param[in] attr
8046  *   Pointer to the flow attributes.
8047  * @param[in] items
8048  *   Pointer to the list of items.
8049  * @param[in] actions
8050  *   Pointer to the list of actions.
8051  * @param[out] error
8052  *   Pointer to the error structure.
8053  *
8054  * @return
8055  *   Pointer to mlx5_flow object on success,
8056  *   otherwise NULL and rte_errno is set.
8057  */
8058 static struct mlx5_flow *
8059 flow_dv_prepare(struct rte_eth_dev *dev,
8060                 const struct rte_flow_attr *attr __rte_unused,
8061                 const struct rte_flow_item items[] __rte_unused,
8062                 const struct rte_flow_action actions[] __rte_unused,
8063                 struct rte_flow_error *error)
8064 {
8065         uint32_t handle_idx = 0;
8066         struct mlx5_flow *dev_flow;
8067         struct mlx5_flow_handle *dev_handle;
8068         struct mlx5_priv *priv = dev->data->dev_private;
8069         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8070
8071         MLX5_ASSERT(wks);
8072         wks->skip_matcher_reg = 0;
8073         wks->policy = NULL;
8074         wks->final_policy = NULL;
8075         /* In case of corrupting the memory. */
8076         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8077                 rte_flow_error_set(error, ENOSPC,
8078                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8079                                    "not free temporary device flow");
8080                 return NULL;
8081         }
8082         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8083                                    &handle_idx);
8084         if (!dev_handle) {
8085                 rte_flow_error_set(error, ENOMEM,
8086                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8087                                    "not enough memory to create flow handle");
8088                 return NULL;
8089         }
8090         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8091         dev_flow = &wks->flows[wks->flow_idx++];
8092         memset(dev_flow, 0, sizeof(*dev_flow));
8093         dev_flow->handle = dev_handle;
8094         dev_flow->handle_idx = handle_idx;
8095         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8096         dev_flow->ingress = attr->ingress;
8097         dev_flow->dv.transfer = attr->transfer;
8098         return dev_flow;
8099 }
8100
8101 #ifdef RTE_LIBRTE_MLX5_DEBUG
8102 /**
8103  * Sanity check for match mask and value. Similar to check_valid_spec() in
8104  * kernel driver. If unmasked bit is present in value, it returns failure.
8105  *
8106  * @param match_mask
8107  *   pointer to match mask buffer.
8108  * @param match_value
8109  *   pointer to match value buffer.
8110  *
8111  * @return
8112  *   0 if valid, -EINVAL otherwise.
8113  */
8114 static int
8115 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8116 {
8117         uint8_t *m = match_mask;
8118         uint8_t *v = match_value;
8119         unsigned int i;
8120
8121         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8122                 if (v[i] & ~m[i]) {
8123                         DRV_LOG(ERR,
8124                                 "match_value differs from match_criteria"
8125                                 " %p[%u] != %p[%u]",
8126                                 match_value, i, match_mask, i);
8127                         return -EINVAL;
8128                 }
8129         }
8130         return 0;
8131 }
8132 #endif
8133
8134 /**
8135  * Add match of ip_version.
8136  *
8137  * @param[in] group
8138  *   Flow group.
8139  * @param[in] headers_v
8140  *   Values header pointer.
8141  * @param[in] headers_m
8142  *   Masks header pointer.
8143  * @param[in] ip_version
8144  *   The IP version to set.
8145  */
8146 static inline void
8147 flow_dv_set_match_ip_version(uint32_t group,
8148                              void *headers_v,
8149                              void *headers_m,
8150                              uint8_t ip_version)
8151 {
8152         if (group == 0)
8153                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8154         else
8155                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8156                          ip_version);
8157         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8158         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8159         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8160 }
8161
8162 /**
8163  * Add Ethernet item to matcher and to the value.
8164  *
8165  * @param[in, out] matcher
8166  *   Flow matcher.
8167  * @param[in, out] key
8168  *   Flow matcher value.
8169  * @param[in] item
8170  *   Flow pattern to translate.
8171  * @param[in] inner
8172  *   Item is inner pattern.
8173  */
8174 static void
8175 flow_dv_translate_item_eth(void *matcher, void *key,
8176                            const struct rte_flow_item *item, int inner,
8177                            uint32_t group)
8178 {
8179         const struct rte_flow_item_eth *eth_m = item->mask;
8180         const struct rte_flow_item_eth *eth_v = item->spec;
8181         const struct rte_flow_item_eth nic_mask = {
8182                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8183                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8184                 .type = RTE_BE16(0xffff),
8185                 .has_vlan = 0,
8186         };
8187         void *hdrs_m;
8188         void *hdrs_v;
8189         char *l24_v;
8190         unsigned int i;
8191
8192         if (!eth_v)
8193                 return;
8194         if (!eth_m)
8195                 eth_m = &nic_mask;
8196         if (inner) {
8197                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8198                                          inner_headers);
8199                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8200         } else {
8201                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8202                                          outer_headers);
8203                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8204         }
8205         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8206                &eth_m->dst, sizeof(eth_m->dst));
8207         /* The value must be in the range of the mask. */
8208         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8209         for (i = 0; i < sizeof(eth_m->dst); ++i)
8210                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8211         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8212                &eth_m->src, sizeof(eth_m->src));
8213         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8214         /* The value must be in the range of the mask. */
8215         for (i = 0; i < sizeof(eth_m->dst); ++i)
8216                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8217         /*
8218          * HW supports match on one Ethertype, the Ethertype following the last
8219          * VLAN tag of the packet (see PRM).
8220          * Set match on ethertype only if ETH header is not followed by VLAN.
8221          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8222          * ethertype, and use ip_version field instead.
8223          * eCPRI over Ether layer will use type value 0xAEFE.
8224          */
8225         if (eth_m->type == 0xFFFF) {
8226                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8227                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8228                 switch (eth_v->type) {
8229                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8230                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8231                         return;
8232                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8233                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8234                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8235                         return;
8236                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8237                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8238                         return;
8239                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8240                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8241                         return;
8242                 default:
8243                         break;
8244                 }
8245         }
8246         if (eth_m->has_vlan) {
8247                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8248                 if (eth_v->has_vlan) {
8249                         /*
8250                          * Here, when also has_more_vlan field in VLAN item is
8251                          * not set, only single-tagged packets will be matched.
8252                          */
8253                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8254                         return;
8255                 }
8256         }
8257         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8258                  rte_be_to_cpu_16(eth_m->type));
8259         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8260         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8261 }
8262
8263 /**
8264  * Add VLAN item to matcher and to the value.
8265  *
8266  * @param[in, out] dev_flow
8267  *   Flow descriptor.
8268  * @param[in, out] matcher
8269  *   Flow matcher.
8270  * @param[in, out] key
8271  *   Flow matcher value.
8272  * @param[in] item
8273  *   Flow pattern to translate.
8274  * @param[in] inner
8275  *   Item is inner pattern.
8276  */
8277 static void
8278 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8279                             void *matcher, void *key,
8280                             const struct rte_flow_item *item,
8281                             int inner, uint32_t group)
8282 {
8283         const struct rte_flow_item_vlan *vlan_m = item->mask;
8284         const struct rte_flow_item_vlan *vlan_v = item->spec;
8285         void *hdrs_m;
8286         void *hdrs_v;
8287         uint16_t tci_m;
8288         uint16_t tci_v;
8289
8290         if (inner) {
8291                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8292                                          inner_headers);
8293                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8294         } else {
8295                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8296                                          outer_headers);
8297                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8298                 /*
8299                  * This is workaround, masks are not supported,
8300                  * and pre-validated.
8301                  */
8302                 if (vlan_v)
8303                         dev_flow->handle->vf_vlan.tag =
8304                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8305         }
8306         /*
8307          * When VLAN item exists in flow, mark packet as tagged,
8308          * even if TCI is not specified.
8309          */
8310         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8311                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8312                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8313         }
8314         if (!vlan_v)
8315                 return;
8316         if (!vlan_m)
8317                 vlan_m = &rte_flow_item_vlan_mask;
8318         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8319         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8320         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8321         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8322         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8323         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8324         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8325         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8326         /*
8327          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8328          * ethertype, and use ip_version field instead.
8329          */
8330         if (vlan_m->inner_type == 0xFFFF) {
8331                 switch (vlan_v->inner_type) {
8332                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8333                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8334                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8335                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8336                         return;
8337                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8338                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8339                         return;
8340                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8341                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8342                         return;
8343                 default:
8344                         break;
8345                 }
8346         }
8347         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8348                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8349                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8350                 /* Only one vlan_tag bit can be set. */
8351                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8352                 return;
8353         }
8354         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8355                  rte_be_to_cpu_16(vlan_m->inner_type));
8356         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8357                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8358 }
8359
8360 /**
8361  * Add IPV4 item to matcher and to the value.
8362  *
8363  * @param[in, out] matcher
8364  *   Flow matcher.
8365  * @param[in, out] key
8366  *   Flow matcher value.
8367  * @param[in] item
8368  *   Flow pattern to translate.
8369  * @param[in] inner
8370  *   Item is inner pattern.
8371  * @param[in] group
8372  *   The group to insert the rule.
8373  */
8374 static void
8375 flow_dv_translate_item_ipv4(void *matcher, void *key,
8376                             const struct rte_flow_item *item,
8377                             int inner, uint32_t group)
8378 {
8379         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8380         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8381         const struct rte_flow_item_ipv4 nic_mask = {
8382                 .hdr = {
8383                         .src_addr = RTE_BE32(0xffffffff),
8384                         .dst_addr = RTE_BE32(0xffffffff),
8385                         .type_of_service = 0xff,
8386                         .next_proto_id = 0xff,
8387                         .time_to_live = 0xff,
8388                 },
8389         };
8390         void *headers_m;
8391         void *headers_v;
8392         char *l24_m;
8393         char *l24_v;
8394         uint8_t tos, ihl_m, ihl_v;
8395
8396         if (inner) {
8397                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8398                                          inner_headers);
8399                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8400         } else {
8401                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8402                                          outer_headers);
8403                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8404         }
8405         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8406         if (!ipv4_v)
8407                 return;
8408         if (!ipv4_m)
8409                 ipv4_m = &nic_mask;
8410         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8411                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8412         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8413                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8414         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8415         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8416         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8417                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8418         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8419                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8420         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8421         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8422         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8423         ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8424         ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8425         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8426         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8427         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8428                  ipv4_m->hdr.type_of_service);
8429         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8430         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8431                  ipv4_m->hdr.type_of_service >> 2);
8432         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8433         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8434                  ipv4_m->hdr.next_proto_id);
8435         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8436                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8437         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8438                  ipv4_m->hdr.time_to_live);
8439         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8440                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8441         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8442                  !!(ipv4_m->hdr.fragment_offset));
8443         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8444                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8445 }
8446
8447 /**
8448  * Add IPV6 item to matcher and to the value.
8449  *
8450  * @param[in, out] matcher
8451  *   Flow matcher.
8452  * @param[in, out] key
8453  *   Flow matcher value.
8454  * @param[in] item
8455  *   Flow pattern to translate.
8456  * @param[in] inner
8457  *   Item is inner pattern.
8458  * @param[in] group
8459  *   The group to insert the rule.
8460  */
8461 static void
8462 flow_dv_translate_item_ipv6(void *matcher, void *key,
8463                             const struct rte_flow_item *item,
8464                             int inner, uint32_t group)
8465 {
8466         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8467         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8468         const struct rte_flow_item_ipv6 nic_mask = {
8469                 .hdr = {
8470                         .src_addr =
8471                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8472                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8473                         .dst_addr =
8474                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8475                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8476                         .vtc_flow = RTE_BE32(0xffffffff),
8477                         .proto = 0xff,
8478                         .hop_limits = 0xff,
8479                 },
8480         };
8481         void *headers_m;
8482         void *headers_v;
8483         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8484         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8485         char *l24_m;
8486         char *l24_v;
8487         uint32_t vtc_m;
8488         uint32_t vtc_v;
8489         int i;
8490         int size;
8491
8492         if (inner) {
8493                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8494                                          inner_headers);
8495                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8496         } else {
8497                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8498                                          outer_headers);
8499                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8500         }
8501         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8502         if (!ipv6_v)
8503                 return;
8504         if (!ipv6_m)
8505                 ipv6_m = &nic_mask;
8506         size = sizeof(ipv6_m->hdr.dst_addr);
8507         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8508                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8509         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8510                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8511         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8512         for (i = 0; i < size; ++i)
8513                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8514         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8515                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8516         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8517                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8518         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8519         for (i = 0; i < size; ++i)
8520                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8521         /* TOS. */
8522         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8523         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8524         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8525         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8526         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8527         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8528         /* Label. */
8529         if (inner) {
8530                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8531                          vtc_m);
8532                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8533                          vtc_v);
8534         } else {
8535                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8536                          vtc_m);
8537                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8538                          vtc_v);
8539         }
8540         /* Protocol. */
8541         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8542                  ipv6_m->hdr.proto);
8543         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8544                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8545         /* Hop limit. */
8546         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8547                  ipv6_m->hdr.hop_limits);
8548         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8549                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8550         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8551                  !!(ipv6_m->has_frag_ext));
8552         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8553                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8554 }
8555
8556 /**
8557  * Add IPV6 fragment extension item to matcher and to the value.
8558  *
8559  * @param[in, out] matcher
8560  *   Flow matcher.
8561  * @param[in, out] key
8562  *   Flow matcher value.
8563  * @param[in] item
8564  *   Flow pattern to translate.
8565  * @param[in] inner
8566  *   Item is inner pattern.
8567  */
8568 static void
8569 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8570                                      const struct rte_flow_item *item,
8571                                      int inner)
8572 {
8573         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8574         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8575         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8576                 .hdr = {
8577                         .next_header = 0xff,
8578                         .frag_data = RTE_BE16(0xffff),
8579                 },
8580         };
8581         void *headers_m;
8582         void *headers_v;
8583
8584         if (inner) {
8585                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8586                                          inner_headers);
8587                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8588         } else {
8589                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8590                                          outer_headers);
8591                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8592         }
8593         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8594         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8595         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8596         if (!ipv6_frag_ext_v)
8597                 return;
8598         if (!ipv6_frag_ext_m)
8599                 ipv6_frag_ext_m = &nic_mask;
8600         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8601                  ipv6_frag_ext_m->hdr.next_header);
8602         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8603                  ipv6_frag_ext_v->hdr.next_header &
8604                  ipv6_frag_ext_m->hdr.next_header);
8605 }
8606
8607 /**
8608  * Add TCP item to matcher and to the value.
8609  *
8610  * @param[in, out] matcher
8611  *   Flow matcher.
8612  * @param[in, out] key
8613  *   Flow matcher value.
8614  * @param[in] item
8615  *   Flow pattern to translate.
8616  * @param[in] inner
8617  *   Item is inner pattern.
8618  */
8619 static void
8620 flow_dv_translate_item_tcp(void *matcher, void *key,
8621                            const struct rte_flow_item *item,
8622                            int inner)
8623 {
8624         const struct rte_flow_item_tcp *tcp_m = item->mask;
8625         const struct rte_flow_item_tcp *tcp_v = item->spec;
8626         void *headers_m;
8627         void *headers_v;
8628
8629         if (inner) {
8630                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8631                                          inner_headers);
8632                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8633         } else {
8634                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8635                                          outer_headers);
8636                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8637         }
8638         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8639         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8640         if (!tcp_v)
8641                 return;
8642         if (!tcp_m)
8643                 tcp_m = &rte_flow_item_tcp_mask;
8644         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8645                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8646         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8647                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8648         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8649                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8650         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8651                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8652         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8653                  tcp_m->hdr.tcp_flags);
8654         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8655                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8656 }
8657
8658 /**
8659  * Add UDP item to matcher and to the value.
8660  *
8661  * @param[in, out] matcher
8662  *   Flow matcher.
8663  * @param[in, out] key
8664  *   Flow matcher value.
8665  * @param[in] item
8666  *   Flow pattern to translate.
8667  * @param[in] inner
8668  *   Item is inner pattern.
8669  */
8670 static void
8671 flow_dv_translate_item_udp(void *matcher, void *key,
8672                            const struct rte_flow_item *item,
8673                            int inner)
8674 {
8675         const struct rte_flow_item_udp *udp_m = item->mask;
8676         const struct rte_flow_item_udp *udp_v = item->spec;
8677         void *headers_m;
8678         void *headers_v;
8679
8680         if (inner) {
8681                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8682                                          inner_headers);
8683                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8684         } else {
8685                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8686                                          outer_headers);
8687                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8688         }
8689         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8690         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8691         if (!udp_v)
8692                 return;
8693         if (!udp_m)
8694                 udp_m = &rte_flow_item_udp_mask;
8695         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8696                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8697         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8698                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8699         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8700                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8701         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8702                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8703 }
8704
8705 /**
8706  * Add GRE optional Key item to matcher and to the value.
8707  *
8708  * @param[in, out] matcher
8709  *   Flow matcher.
8710  * @param[in, out] key
8711  *   Flow matcher value.
8712  * @param[in] item
8713  *   Flow pattern to translate.
8714  * @param[in] inner
8715  *   Item is inner pattern.
8716  */
8717 static void
8718 flow_dv_translate_item_gre_key(void *matcher, void *key,
8719                                    const struct rte_flow_item *item)
8720 {
8721         const rte_be32_t *key_m = item->mask;
8722         const rte_be32_t *key_v = item->spec;
8723         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8724         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8725         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8726
8727         /* GRE K bit must be on and should already be validated */
8728         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8729         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8730         if (!key_v)
8731                 return;
8732         if (!key_m)
8733                 key_m = &gre_key_default_mask;
8734         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8735                  rte_be_to_cpu_32(*key_m) >> 8);
8736         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8737                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8738         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8739                  rte_be_to_cpu_32(*key_m) & 0xFF);
8740         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8741                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8742 }
8743
8744 /**
8745  * Add GRE item to matcher and to the value.
8746  *
8747  * @param[in, out] matcher
8748  *   Flow matcher.
8749  * @param[in, out] key
8750  *   Flow matcher value.
8751  * @param[in] item
8752  *   Flow pattern to translate.
8753  * @param[in] inner
8754  *   Item is inner pattern.
8755  */
8756 static void
8757 flow_dv_translate_item_gre(void *matcher, void *key,
8758                            const struct rte_flow_item *item,
8759                            int inner)
8760 {
8761         const struct rte_flow_item_gre *gre_m = item->mask;
8762         const struct rte_flow_item_gre *gre_v = item->spec;
8763         void *headers_m;
8764         void *headers_v;
8765         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8766         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8767         struct {
8768                 union {
8769                         __extension__
8770                         struct {
8771                                 uint16_t version:3;
8772                                 uint16_t rsvd0:9;
8773                                 uint16_t s_present:1;
8774                                 uint16_t k_present:1;
8775                                 uint16_t rsvd_bit1:1;
8776                                 uint16_t c_present:1;
8777                         };
8778                         uint16_t value;
8779                 };
8780         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8781
8782         if (inner) {
8783                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8784                                          inner_headers);
8785                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8786         } else {
8787                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8788                                          outer_headers);
8789                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8790         }
8791         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8792         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8793         if (!gre_v)
8794                 return;
8795         if (!gre_m)
8796                 gre_m = &rte_flow_item_gre_mask;
8797         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8798                  rte_be_to_cpu_16(gre_m->protocol));
8799         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8800                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8801         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8802         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8803         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8804                  gre_crks_rsvd0_ver_m.c_present);
8805         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8806                  gre_crks_rsvd0_ver_v.c_present &
8807                  gre_crks_rsvd0_ver_m.c_present);
8808         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8809                  gre_crks_rsvd0_ver_m.k_present);
8810         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8811                  gre_crks_rsvd0_ver_v.k_present &
8812                  gre_crks_rsvd0_ver_m.k_present);
8813         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8814                  gre_crks_rsvd0_ver_m.s_present);
8815         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8816                  gre_crks_rsvd0_ver_v.s_present &
8817                  gre_crks_rsvd0_ver_m.s_present);
8818 }
8819
8820 /**
8821  * Add NVGRE item to matcher and to the value.
8822  *
8823  * @param[in, out] matcher
8824  *   Flow matcher.
8825  * @param[in, out] key
8826  *   Flow matcher value.
8827  * @param[in] item
8828  *   Flow pattern to translate.
8829  * @param[in] inner
8830  *   Item is inner pattern.
8831  */
8832 static void
8833 flow_dv_translate_item_nvgre(void *matcher, void *key,
8834                              const struct rte_flow_item *item,
8835                              int inner)
8836 {
8837         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8838         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8839         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8840         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8841         const char *tni_flow_id_m;
8842         const char *tni_flow_id_v;
8843         char *gre_key_m;
8844         char *gre_key_v;
8845         int size;
8846         int i;
8847
8848         /* For NVGRE, GRE header fields must be set with defined values. */
8849         const struct rte_flow_item_gre gre_spec = {
8850                 .c_rsvd0_ver = RTE_BE16(0x2000),
8851                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8852         };
8853         const struct rte_flow_item_gre gre_mask = {
8854                 .c_rsvd0_ver = RTE_BE16(0xB000),
8855                 .protocol = RTE_BE16(UINT16_MAX),
8856         };
8857         const struct rte_flow_item gre_item = {
8858                 .spec = &gre_spec,
8859                 .mask = &gre_mask,
8860                 .last = NULL,
8861         };
8862         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8863         if (!nvgre_v)
8864                 return;
8865         if (!nvgre_m)
8866                 nvgre_m = &rte_flow_item_nvgre_mask;
8867         tni_flow_id_m = (const char *)nvgre_m->tni;
8868         tni_flow_id_v = (const char *)nvgre_v->tni;
8869         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8870         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8871         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8872         memcpy(gre_key_m, tni_flow_id_m, size);
8873         for (i = 0; i < size; ++i)
8874                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8875 }
8876
8877 /**
8878  * Add VXLAN item to matcher and to the value.
8879  *
8880  * @param[in] dev
8881  *   Pointer to the Ethernet device structure.
8882  * @param[in] attr
8883  *   Flow rule attributes.
8884  * @param[in, out] matcher
8885  *   Flow matcher.
8886  * @param[in, out] key
8887  *   Flow matcher value.
8888  * @param[in] item
8889  *   Flow pattern to translate.
8890  * @param[in] inner
8891  *   Item is inner pattern.
8892  */
8893 static void
8894 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8895                              const struct rte_flow_attr *attr,
8896                              void *matcher, void *key,
8897                              const struct rte_flow_item *item,
8898                              int inner)
8899 {
8900         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8901         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8902         void *headers_m;
8903         void *headers_v;
8904         void *misc5_m;
8905         void *misc5_v;
8906         uint32_t *tunnel_header_v;
8907         uint32_t *tunnel_header_m;
8908         uint16_t dport;
8909         struct mlx5_priv *priv = dev->data->dev_private;
8910         const struct rte_flow_item_vxlan nic_mask = {
8911                 .vni = "\xff\xff\xff",
8912                 .rsvd1 = 0xff,
8913         };
8914
8915         if (inner) {
8916                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8917                                          inner_headers);
8918                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8919         } else {
8920                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8921                                          outer_headers);
8922                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8923         }
8924         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8925                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8926         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8927                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8928                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8929         }
8930         if (!vxlan_v)
8931                 return;
8932         if (!vxlan_m) {
8933                 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8934                     (attr->group && !priv->sh->misc5_cap))
8935                         vxlan_m = &rte_flow_item_vxlan_mask;
8936                 else
8937                         vxlan_m = &nic_mask;
8938         }
8939         if ((!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8940             ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8941                 void *misc_m;
8942                 void *misc_v;
8943                 char *vni_m;
8944                 char *vni_v;
8945                 int size;
8946                 int i;
8947                 misc_m = MLX5_ADDR_OF(fte_match_param,
8948                                       matcher, misc_parameters);
8949                 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8950                 size = sizeof(vxlan_m->vni);
8951                 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8952                 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8953                 memcpy(vni_m, vxlan_m->vni, size);
8954                 for (i = 0; i < size; ++i)
8955                         vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8956                 return;
8957         }
8958         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8959         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8960         tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8961                                                    misc5_v,
8962                                                    tunnel_header_1);
8963         tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8964                                                    misc5_m,
8965                                                    tunnel_header_1);
8966         *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8967                            (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8968                            (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8969         if (*tunnel_header_v)
8970                 *tunnel_header_m = vxlan_m->vni[0] |
8971                         vxlan_m->vni[1] << 8 |
8972                         vxlan_m->vni[2] << 16;
8973         else
8974                 *tunnel_header_m = 0x0;
8975         *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8976         if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8977                 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8978 }
8979
8980 /**
8981  * Add VXLAN-GPE item to matcher and to the value.
8982  *
8983  * @param[in, out] matcher
8984  *   Flow matcher.
8985  * @param[in, out] key
8986  *   Flow matcher value.
8987  * @param[in] item
8988  *   Flow pattern to translate.
8989  * @param[in] inner
8990  *   Item is inner pattern.
8991  */
8992
8993 static void
8994 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8995                                  const struct rte_flow_item *item, int inner)
8996 {
8997         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8998         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8999         void *headers_m;
9000         void *headers_v;
9001         void *misc_m =
9002                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
9003         void *misc_v =
9004                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9005         char *vni_m;
9006         char *vni_v;
9007         uint16_t dport;
9008         int size;
9009         int i;
9010         uint8_t flags_m = 0xff;
9011         uint8_t flags_v = 0xc;
9012
9013         if (inner) {
9014                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9015                                          inner_headers);
9016                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9017         } else {
9018                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9019                                          outer_headers);
9020                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9021         }
9022         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
9023                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
9024         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9025                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9026                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9027         }
9028         if (!vxlan_v)
9029                 return;
9030         if (!vxlan_m)
9031                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9032         size = sizeof(vxlan_m->vni);
9033         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
9034         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
9035         memcpy(vni_m, vxlan_m->vni, size);
9036         for (i = 0; i < size; ++i)
9037                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9038         if (vxlan_m->flags) {
9039                 flags_m = vxlan_m->flags;
9040                 flags_v = vxlan_v->flags;
9041         }
9042         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9043         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9044         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
9045                  vxlan_m->protocol);
9046         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
9047                  vxlan_v->protocol);
9048 }
9049
9050 /**
9051  * Add Geneve item to matcher and to the value.
9052  *
9053  * @param[in, out] matcher
9054  *   Flow matcher.
9055  * @param[in, out] key
9056  *   Flow matcher value.
9057  * @param[in] item
9058  *   Flow pattern to translate.
9059  * @param[in] inner
9060  *   Item is inner pattern.
9061  */
9062
9063 static void
9064 flow_dv_translate_item_geneve(void *matcher, void *key,
9065                               const struct rte_flow_item *item, int inner)
9066 {
9067         const struct rte_flow_item_geneve *geneve_m = item->mask;
9068         const struct rte_flow_item_geneve *geneve_v = item->spec;
9069         void *headers_m;
9070         void *headers_v;
9071         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9072         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9073         uint16_t dport;
9074         uint16_t gbhdr_m;
9075         uint16_t gbhdr_v;
9076         char *vni_m;
9077         char *vni_v;
9078         size_t size, i;
9079
9080         if (inner) {
9081                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9082                                          inner_headers);
9083                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9084         } else {
9085                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9086                                          outer_headers);
9087                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9088         }
9089         dport = MLX5_UDP_PORT_GENEVE;
9090         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9091                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9092                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9093         }
9094         if (!geneve_v)
9095                 return;
9096         if (!geneve_m)
9097                 geneve_m = &rte_flow_item_geneve_mask;
9098         size = sizeof(geneve_m->vni);
9099         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9100         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9101         memcpy(vni_m, geneve_m->vni, size);
9102         for (i = 0; i < size; ++i)
9103                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9104         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
9105                  rte_be_to_cpu_16(geneve_m->protocol));
9106         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9107                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
9108         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9109         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9110         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9111                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9112         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9113                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9114         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9115                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9116         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9117                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9118                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9119 }
9120
9121 /**
9122  * Create Geneve TLV option resource.
9123  *
9124  * @param dev[in, out]
9125  *   Pointer to rte_eth_dev structure.
9126  * @param[in, out] tag_be24
9127  *   Tag value in big endian then R-shift 8.
9128  * @parm[in, out] dev_flow
9129  *   Pointer to the dev_flow.
9130  * @param[out] error
9131  *   pointer to error structure.
9132  *
9133  * @return
9134  *   0 on success otherwise -errno and errno is set.
9135  */
9136
9137 int
9138 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9139                                              const struct rte_flow_item *item,
9140                                              struct rte_flow_error *error)
9141 {
9142         struct mlx5_priv *priv = dev->data->dev_private;
9143         struct mlx5_dev_ctx_shared *sh = priv->sh;
9144         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9145                         sh->geneve_tlv_option_resource;
9146         struct mlx5_devx_obj *obj;
9147         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9148         int ret = 0;
9149
9150         if (!geneve_opt_v)
9151                 return -1;
9152         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9153         if (geneve_opt_resource != NULL) {
9154                 if (geneve_opt_resource->option_class ==
9155                         geneve_opt_v->option_class &&
9156                         geneve_opt_resource->option_type ==
9157                         geneve_opt_v->option_type &&
9158                         geneve_opt_resource->length ==
9159                         geneve_opt_v->option_len) {
9160                         /* We already have GENVE TLV option obj allocated. */
9161                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9162                                            __ATOMIC_RELAXED);
9163                 } else {
9164                         ret = rte_flow_error_set(error, ENOMEM,
9165                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9166                                 "Only one GENEVE TLV option supported");
9167                         goto exit;
9168                 }
9169         } else {
9170                 /* Create a GENEVE TLV object and resource. */
9171                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->ctx,
9172                                 geneve_opt_v->option_class,
9173                                 geneve_opt_v->option_type,
9174                                 geneve_opt_v->option_len);
9175                 if (!obj) {
9176                         ret = rte_flow_error_set(error, ENODATA,
9177                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9178                                 "Failed to create GENEVE TLV Devx object");
9179                         goto exit;
9180                 }
9181                 sh->geneve_tlv_option_resource =
9182                                 mlx5_malloc(MLX5_MEM_ZERO,
9183                                                 sizeof(*geneve_opt_resource),
9184                                                 0, SOCKET_ID_ANY);
9185                 if (!sh->geneve_tlv_option_resource) {
9186                         claim_zero(mlx5_devx_cmd_destroy(obj));
9187                         ret = rte_flow_error_set(error, ENOMEM,
9188                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9189                                 "GENEVE TLV object memory allocation failed");
9190                         goto exit;
9191                 }
9192                 geneve_opt_resource = sh->geneve_tlv_option_resource;
9193                 geneve_opt_resource->obj = obj;
9194                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9195                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9196                 geneve_opt_resource->length = geneve_opt_v->option_len;
9197                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9198                                 __ATOMIC_RELAXED);
9199         }
9200 exit:
9201         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9202         return ret;
9203 }
9204
9205 /**
9206  * Add Geneve TLV option item to matcher.
9207  *
9208  * @param[in, out] dev
9209  *   Pointer to rte_eth_dev structure.
9210  * @param[in, out] matcher
9211  *   Flow matcher.
9212  * @param[in, out] key
9213  *   Flow matcher value.
9214  * @param[in] item
9215  *   Flow pattern to translate.
9216  * @param[out] error
9217  *   Pointer to error structure.
9218  */
9219 static int
9220 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9221                                   void *key, const struct rte_flow_item *item,
9222                                   struct rte_flow_error *error)
9223 {
9224         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9225         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9226         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9227         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9228         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9229                         misc_parameters_3);
9230         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9231         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9232         int ret = 0;
9233
9234         if (!geneve_opt_v)
9235                 return -1;
9236         if (!geneve_opt_m)
9237                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9238         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9239                                                            error);
9240         if (ret) {
9241                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9242                 return ret;
9243         }
9244         /*
9245          * Set the option length in GENEVE header if not requested.
9246          * The GENEVE TLV option length is expressed by the option length field
9247          * in the GENEVE header.
9248          * If the option length was not requested but the GENEVE TLV option item
9249          * is present we set the option length field implicitly.
9250          */
9251         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9252                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9253                          MLX5_GENEVE_OPTLEN_MASK);
9254                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9255                          geneve_opt_v->option_len + 1);
9256         }
9257         /* Set the data. */
9258         if (geneve_opt_v->data) {
9259                 memcpy(&opt_data_key, geneve_opt_v->data,
9260                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9261                                 sizeof(opt_data_key)));
9262                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9263                                 sizeof(opt_data_key));
9264                 memcpy(&opt_data_mask, geneve_opt_m->data,
9265                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9266                                 sizeof(opt_data_mask)));
9267                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9268                                 sizeof(opt_data_mask));
9269                 MLX5_SET(fte_match_set_misc3, misc3_m,
9270                                 geneve_tlv_option_0_data,
9271                                 rte_be_to_cpu_32(opt_data_mask));
9272                 MLX5_SET(fte_match_set_misc3, misc3_v,
9273                                 geneve_tlv_option_0_data,
9274                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9275         }
9276         return ret;
9277 }
9278
9279 /**
9280  * Add MPLS item to matcher and to the value.
9281  *
9282  * @param[in, out] matcher
9283  *   Flow matcher.
9284  * @param[in, out] key
9285  *   Flow matcher value.
9286  * @param[in] item
9287  *   Flow pattern to translate.
9288  * @param[in] prev_layer
9289  *   The protocol layer indicated in previous item.
9290  * @param[in] inner
9291  *   Item is inner pattern.
9292  */
9293 static void
9294 flow_dv_translate_item_mpls(void *matcher, void *key,
9295                             const struct rte_flow_item *item,
9296                             uint64_t prev_layer,
9297                             int inner)
9298 {
9299         const uint32_t *in_mpls_m = item->mask;
9300         const uint32_t *in_mpls_v = item->spec;
9301         uint32_t *out_mpls_m = 0;
9302         uint32_t *out_mpls_v = 0;
9303         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9304         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9305         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9306                                      misc_parameters_2);
9307         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9308         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9309         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9310
9311         switch (prev_layer) {
9312         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9313                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9314                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9315                          MLX5_UDP_PORT_MPLS);
9316                 break;
9317         case MLX5_FLOW_LAYER_GRE:
9318                 /* Fall-through. */
9319         case MLX5_FLOW_LAYER_GRE_KEY:
9320                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9321                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9322                          RTE_ETHER_TYPE_MPLS);
9323                 break;
9324         default:
9325                 break;
9326         }
9327         if (!in_mpls_v)
9328                 return;
9329         if (!in_mpls_m)
9330                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9331         switch (prev_layer) {
9332         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9333                 out_mpls_m =
9334                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9335                                                  outer_first_mpls_over_udp);
9336                 out_mpls_v =
9337                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9338                                                  outer_first_mpls_over_udp);
9339                 break;
9340         case MLX5_FLOW_LAYER_GRE:
9341                 out_mpls_m =
9342                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9343                                                  outer_first_mpls_over_gre);
9344                 out_mpls_v =
9345                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9346                                                  outer_first_mpls_over_gre);
9347                 break;
9348         default:
9349                 /* Inner MPLS not over GRE is not supported. */
9350                 if (!inner) {
9351                         out_mpls_m =
9352                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9353                                                          misc2_m,
9354                                                          outer_first_mpls);
9355                         out_mpls_v =
9356                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9357                                                          misc2_v,
9358                                                          outer_first_mpls);
9359                 }
9360                 break;
9361         }
9362         if (out_mpls_m && out_mpls_v) {
9363                 *out_mpls_m = *in_mpls_m;
9364                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9365         }
9366 }
9367
9368 /**
9369  * Add metadata register item to matcher
9370  *
9371  * @param[in, out] matcher
9372  *   Flow matcher.
9373  * @param[in, out] key
9374  *   Flow matcher value.
9375  * @param[in] reg_type
9376  *   Type of device metadata register
9377  * @param[in] value
9378  *   Register value
9379  * @param[in] mask
9380  *   Register mask
9381  */
9382 static void
9383 flow_dv_match_meta_reg(void *matcher, void *key,
9384                        enum modify_reg reg_type,
9385                        uint32_t data, uint32_t mask)
9386 {
9387         void *misc2_m =
9388                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9389         void *misc2_v =
9390                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9391         uint32_t temp;
9392
9393         data &= mask;
9394         switch (reg_type) {
9395         case REG_A:
9396                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9397                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9398                 break;
9399         case REG_B:
9400                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9401                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9402                 break;
9403         case REG_C_0:
9404                 /*
9405                  * The metadata register C0 field might be divided into
9406                  * source vport index and META item value, we should set
9407                  * this field according to specified mask, not as whole one.
9408                  */
9409                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9410                 temp |= mask;
9411                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9412                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9413                 temp &= ~mask;
9414                 temp |= data;
9415                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9416                 break;
9417         case REG_C_1:
9418                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9419                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9420                 break;
9421         case REG_C_2:
9422                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9423                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9424                 break;
9425         case REG_C_3:
9426                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9427                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9428                 break;
9429         case REG_C_4:
9430                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9431                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9432                 break;
9433         case REG_C_5:
9434                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9435                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9436                 break;
9437         case REG_C_6:
9438                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9439                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9440                 break;
9441         case REG_C_7:
9442                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9443                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9444                 break;
9445         default:
9446                 MLX5_ASSERT(false);
9447                 break;
9448         }
9449 }
9450
9451 /**
9452  * Add MARK item to matcher
9453  *
9454  * @param[in] dev
9455  *   The device to configure through.
9456  * @param[in, out] matcher
9457  *   Flow matcher.
9458  * @param[in, out] key
9459  *   Flow matcher value.
9460  * @param[in] item
9461  *   Flow pattern to translate.
9462  */
9463 static void
9464 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9465                             void *matcher, void *key,
9466                             const struct rte_flow_item *item)
9467 {
9468         struct mlx5_priv *priv = dev->data->dev_private;
9469         const struct rte_flow_item_mark *mark;
9470         uint32_t value;
9471         uint32_t mask;
9472
9473         mark = item->mask ? (const void *)item->mask :
9474                             &rte_flow_item_mark_mask;
9475         mask = mark->id & priv->sh->dv_mark_mask;
9476         mark = (const void *)item->spec;
9477         MLX5_ASSERT(mark);
9478         value = mark->id & priv->sh->dv_mark_mask & mask;
9479         if (mask) {
9480                 enum modify_reg reg;
9481
9482                 /* Get the metadata register index for the mark. */
9483                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9484                 MLX5_ASSERT(reg > 0);
9485                 if (reg == REG_C_0) {
9486                         struct mlx5_priv *priv = dev->data->dev_private;
9487                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9488                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9489
9490                         mask &= msk_c0;
9491                         mask <<= shl_c0;
9492                         value <<= shl_c0;
9493                 }
9494                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9495         }
9496 }
9497
9498 /**
9499  * Add META item to matcher
9500  *
9501  * @param[in] dev
9502  *   The devich to configure through.
9503  * @param[in, out] matcher
9504  *   Flow matcher.
9505  * @param[in, out] key
9506  *   Flow matcher value.
9507  * @param[in] attr
9508  *   Attributes of flow that includes this item.
9509  * @param[in] item
9510  *   Flow pattern to translate.
9511  */
9512 static void
9513 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9514                             void *matcher, void *key,
9515                             const struct rte_flow_attr *attr,
9516                             const struct rte_flow_item *item)
9517 {
9518         const struct rte_flow_item_meta *meta_m;
9519         const struct rte_flow_item_meta *meta_v;
9520
9521         meta_m = (const void *)item->mask;
9522         if (!meta_m)
9523                 meta_m = &rte_flow_item_meta_mask;
9524         meta_v = (const void *)item->spec;
9525         if (meta_v) {
9526                 int reg;
9527                 uint32_t value = meta_v->data;
9528                 uint32_t mask = meta_m->data;
9529
9530                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9531                 if (reg < 0)
9532                         return;
9533                 MLX5_ASSERT(reg != REG_NON);
9534                 if (reg == REG_C_0) {
9535                         struct mlx5_priv *priv = dev->data->dev_private;
9536                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9537                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9538
9539                         mask &= msk_c0;
9540                         mask <<= shl_c0;
9541                         value <<= shl_c0;
9542                 }
9543                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9544         }
9545 }
9546
9547 /**
9548  * Add vport metadata Reg C0 item to matcher
9549  *
9550  * @param[in, out] matcher
9551  *   Flow matcher.
9552  * @param[in, out] key
9553  *   Flow matcher value.
9554  * @param[in] reg
9555  *   Flow pattern to translate.
9556  */
9557 static void
9558 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9559                                   uint32_t value, uint32_t mask)
9560 {
9561         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9562 }
9563
9564 /**
9565  * Add tag item to matcher
9566  *
9567  * @param[in] dev
9568  *   The devich to configure through.
9569  * @param[in, out] matcher
9570  *   Flow matcher.
9571  * @param[in, out] key
9572  *   Flow matcher value.
9573  * @param[in] item
9574  *   Flow pattern to translate.
9575  */
9576 static void
9577 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9578                                 void *matcher, void *key,
9579                                 const struct rte_flow_item *item)
9580 {
9581         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9582         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9583         uint32_t mask, value;
9584
9585         MLX5_ASSERT(tag_v);
9586         value = tag_v->data;
9587         mask = tag_m ? tag_m->data : UINT32_MAX;
9588         if (tag_v->id == REG_C_0) {
9589                 struct mlx5_priv *priv = dev->data->dev_private;
9590                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9591                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9592
9593                 mask &= msk_c0;
9594                 mask <<= shl_c0;
9595                 value <<= shl_c0;
9596         }
9597         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9598 }
9599
9600 /**
9601  * Add TAG item to matcher
9602  *
9603  * @param[in] dev
9604  *   The devich to configure through.
9605  * @param[in, out] matcher
9606  *   Flow matcher.
9607  * @param[in, out] key
9608  *   Flow matcher value.
9609  * @param[in] item
9610  *   Flow pattern to translate.
9611  */
9612 static void
9613 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9614                            void *matcher, void *key,
9615                            const struct rte_flow_item *item)
9616 {
9617         const struct rte_flow_item_tag *tag_v = item->spec;
9618         const struct rte_flow_item_tag *tag_m = item->mask;
9619         enum modify_reg reg;
9620
9621         MLX5_ASSERT(tag_v);
9622         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9623         /* Get the metadata register index for the tag. */
9624         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9625         MLX5_ASSERT(reg > 0);
9626         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9627 }
9628
9629 /**
9630  * Add source vport match to the specified matcher.
9631  *
9632  * @param[in, out] matcher
9633  *   Flow matcher.
9634  * @param[in, out] key
9635  *   Flow matcher value.
9636  * @param[in] port
9637  *   Source vport value to match
9638  * @param[in] mask
9639  *   Mask
9640  */
9641 static void
9642 flow_dv_translate_item_source_vport(void *matcher, void *key,
9643                                     int16_t port, uint16_t mask)
9644 {
9645         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9646         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9647
9648         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9649         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9650 }
9651
9652 /**
9653  * Translate port-id item to eswitch match on  port-id.
9654  *
9655  * @param[in] dev
9656  *   The devich to configure through.
9657  * @param[in, out] matcher
9658  *   Flow matcher.
9659  * @param[in, out] key
9660  *   Flow matcher value.
9661  * @param[in] item
9662  *   Flow pattern to translate.
9663  * @param[in]
9664  *   Flow attributes.
9665  *
9666  * @return
9667  *   0 on success, a negative errno value otherwise.
9668  */
9669 static int
9670 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9671                                void *key, const struct rte_flow_item *item,
9672                                const struct rte_flow_attr *attr)
9673 {
9674         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9675         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9676         struct mlx5_priv *priv;
9677         uint16_t mask, id;
9678
9679         mask = pid_m ? pid_m->id : 0xffff;
9680         id = pid_v ? pid_v->id : dev->data->port_id;
9681         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9682         if (!priv)
9683                 return -rte_errno;
9684         /*
9685          * Translate to vport field or to metadata, depending on mode.
9686          * Kernel can use either misc.source_port or half of C0 metadata
9687          * register.
9688          */
9689         if (priv->vport_meta_mask) {
9690                 /*
9691                  * Provide the hint for SW steering library
9692                  * to insert the flow into ingress domain and
9693                  * save the extra vport match.
9694                  */
9695                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9696                     priv->pf_bond < 0 && attr->transfer)
9697                         flow_dv_translate_item_source_vport
9698                                 (matcher, key, priv->vport_id, mask);
9699                 /*
9700                  * We should always set the vport metadata register,
9701                  * otherwise the SW steering library can drop
9702                  * the rule if wire vport metadata value is not zero,
9703                  * it depends on kernel configuration.
9704                  */
9705                 flow_dv_translate_item_meta_vport(matcher, key,
9706                                                   priv->vport_meta_tag,
9707                                                   priv->vport_meta_mask);
9708         } else {
9709                 flow_dv_translate_item_source_vport(matcher, key,
9710                                                     priv->vport_id, mask);
9711         }
9712         return 0;
9713 }
9714
9715 /**
9716  * Add ICMP6 item to matcher and to the value.
9717  *
9718  * @param[in, out] matcher
9719  *   Flow matcher.
9720  * @param[in, out] key
9721  *   Flow matcher value.
9722  * @param[in] item
9723  *   Flow pattern to translate.
9724  * @param[in] inner
9725  *   Item is inner pattern.
9726  */
9727 static void
9728 flow_dv_translate_item_icmp6(void *matcher, void *key,
9729                               const struct rte_flow_item *item,
9730                               int inner)
9731 {
9732         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9733         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9734         void *headers_m;
9735         void *headers_v;
9736         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9737                                      misc_parameters_3);
9738         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9739         if (inner) {
9740                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9741                                          inner_headers);
9742                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9743         } else {
9744                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9745                                          outer_headers);
9746                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9747         }
9748         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9749         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9750         if (!icmp6_v)
9751                 return;
9752         if (!icmp6_m)
9753                 icmp6_m = &rte_flow_item_icmp6_mask;
9754         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9755         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9756                  icmp6_v->type & icmp6_m->type);
9757         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9758         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9759                  icmp6_v->code & icmp6_m->code);
9760 }
9761
9762 /**
9763  * Add ICMP item to matcher and to the value.
9764  *
9765  * @param[in, out] matcher
9766  *   Flow matcher.
9767  * @param[in, out] key
9768  *   Flow matcher value.
9769  * @param[in] item
9770  *   Flow pattern to translate.
9771  * @param[in] inner
9772  *   Item is inner pattern.
9773  */
9774 static void
9775 flow_dv_translate_item_icmp(void *matcher, void *key,
9776                             const struct rte_flow_item *item,
9777                             int inner)
9778 {
9779         const struct rte_flow_item_icmp *icmp_m = item->mask;
9780         const struct rte_flow_item_icmp *icmp_v = item->spec;
9781         uint32_t icmp_header_data_m = 0;
9782         uint32_t icmp_header_data_v = 0;
9783         void *headers_m;
9784         void *headers_v;
9785         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9786                                      misc_parameters_3);
9787         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9788         if (inner) {
9789                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9790                                          inner_headers);
9791                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9792         } else {
9793                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9794                                          outer_headers);
9795                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9796         }
9797         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9798         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9799         if (!icmp_v)
9800                 return;
9801         if (!icmp_m)
9802                 icmp_m = &rte_flow_item_icmp_mask;
9803         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9804                  icmp_m->hdr.icmp_type);
9805         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9806                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9807         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9808                  icmp_m->hdr.icmp_code);
9809         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9810                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9811         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9812         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9813         if (icmp_header_data_m) {
9814                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9815                 icmp_header_data_v |=
9816                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9817                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9818                          icmp_header_data_m);
9819                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9820                          icmp_header_data_v & icmp_header_data_m);
9821         }
9822 }
9823
9824 /**
9825  * Add GTP item to matcher and to the value.
9826  *
9827  * @param[in, out] matcher
9828  *   Flow matcher.
9829  * @param[in, out] key
9830  *   Flow matcher value.
9831  * @param[in] item
9832  *   Flow pattern to translate.
9833  * @param[in] inner
9834  *   Item is inner pattern.
9835  */
9836 static void
9837 flow_dv_translate_item_gtp(void *matcher, void *key,
9838                            const struct rte_flow_item *item, int inner)
9839 {
9840         const struct rte_flow_item_gtp *gtp_m = item->mask;
9841         const struct rte_flow_item_gtp *gtp_v = item->spec;
9842         void *headers_m;
9843         void *headers_v;
9844         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9845                                      misc_parameters_3);
9846         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9847         uint16_t dport = RTE_GTPU_UDP_PORT;
9848
9849         if (inner) {
9850                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9851                                          inner_headers);
9852                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9853         } else {
9854                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9855                                          outer_headers);
9856                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9857         }
9858         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9859                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9860                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9861         }
9862         if (!gtp_v)
9863                 return;
9864         if (!gtp_m)
9865                 gtp_m = &rte_flow_item_gtp_mask;
9866         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9867                  gtp_m->v_pt_rsv_flags);
9868         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9869                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9870         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9871         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9872                  gtp_v->msg_type & gtp_m->msg_type);
9873         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9874                  rte_be_to_cpu_32(gtp_m->teid));
9875         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9876                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9877 }
9878
9879 /**
9880  * Add GTP PSC item to matcher.
9881  *
9882  * @param[in, out] matcher
9883  *   Flow matcher.
9884  * @param[in, out] key
9885  *   Flow matcher value.
9886  * @param[in] item
9887  *   Flow pattern to translate.
9888  */
9889 static int
9890 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9891                                const struct rte_flow_item *item)
9892 {
9893         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9894         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9895         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9896                         misc_parameters_3);
9897         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9898         union {
9899                 uint32_t w32;
9900                 struct {
9901                         uint16_t seq_num;
9902                         uint8_t npdu_num;
9903                         uint8_t next_ext_header_type;
9904                 };
9905         } dw_2;
9906         uint8_t gtp_flags;
9907
9908         /* Always set E-flag match on one, regardless of GTP item settings. */
9909         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9910         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9911         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9912         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9913         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9914         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9915         /*Set next extension header type. */
9916         dw_2.seq_num = 0;
9917         dw_2.npdu_num = 0;
9918         dw_2.next_ext_header_type = 0xff;
9919         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9920                  rte_cpu_to_be_32(dw_2.w32));
9921         dw_2.seq_num = 0;
9922         dw_2.npdu_num = 0;
9923         dw_2.next_ext_header_type = 0x85;
9924         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9925                  rte_cpu_to_be_32(dw_2.w32));
9926         if (gtp_psc_v) {
9927                 union {
9928                         uint32_t w32;
9929                         struct {
9930                                 uint8_t len;
9931                                 uint8_t type_flags;
9932                                 uint8_t qfi;
9933                                 uint8_t reserved;
9934                         };
9935                 } dw_0;
9936
9937                 /*Set extension header PDU type and Qos. */
9938                 if (!gtp_psc_m)
9939                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9940                 dw_0.w32 = 0;
9941                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->pdu_type);
9942                 dw_0.qfi = gtp_psc_m->qfi;
9943                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9944                          rte_cpu_to_be_32(dw_0.w32));
9945                 dw_0.w32 = 0;
9946                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->pdu_type &
9947                                                         gtp_psc_m->pdu_type);
9948                 dw_0.qfi = gtp_psc_v->qfi & gtp_psc_m->qfi;
9949                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9950                          rte_cpu_to_be_32(dw_0.w32));
9951         }
9952         return 0;
9953 }
9954
9955 /**
9956  * Add eCPRI item to matcher and to the value.
9957  *
9958  * @param[in] dev
9959  *   The devich to configure through.
9960  * @param[in, out] matcher
9961  *   Flow matcher.
9962  * @param[in, out] key
9963  *   Flow matcher value.
9964  * @param[in] item
9965  *   Flow pattern to translate.
9966  * @param[in] samples
9967  *   Sample IDs to be used in the matching.
9968  */
9969 static void
9970 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9971                              void *key, const struct rte_flow_item *item)
9972 {
9973         struct mlx5_priv *priv = dev->data->dev_private;
9974         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9975         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9976         struct rte_ecpri_common_hdr common;
9977         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9978                                      misc_parameters_4);
9979         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9980         uint32_t *samples;
9981         void *dw_m;
9982         void *dw_v;
9983
9984         if (!ecpri_v)
9985                 return;
9986         if (!ecpri_m)
9987                 ecpri_m = &rte_flow_item_ecpri_mask;
9988         /*
9989          * Maximal four DW samples are supported in a single matching now.
9990          * Two are used now for a eCPRI matching:
9991          * 1. Type: one byte, mask should be 0x00ff0000 in network order
9992          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9993          *    if any.
9994          */
9995         if (!ecpri_m->hdr.common.u32)
9996                 return;
9997         samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9998         /* Need to take the whole DW as the mask to fill the entry. */
9999         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10000                             prog_sample_field_value_0);
10001         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10002                             prog_sample_field_value_0);
10003         /* Already big endian (network order) in the header. */
10004         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10005         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10006         /* Sample#0, used for matching type, offset 0. */
10007         MLX5_SET(fte_match_set_misc4, misc4_m,
10008                  prog_sample_field_id_0, samples[0]);
10009         /* It makes no sense to set the sample ID in the mask field. */
10010         MLX5_SET(fte_match_set_misc4, misc4_v,
10011                  prog_sample_field_id_0, samples[0]);
10012         /*
10013          * Checking if message body part needs to be matched.
10014          * Some wildcard rules only matching type field should be supported.
10015          */
10016         if (ecpri_m->hdr.dummy[0]) {
10017                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10018                 switch (common.type) {
10019                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10020                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10021                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10022                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10023                                             prog_sample_field_value_1);
10024                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10025                                             prog_sample_field_value_1);
10026                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10027                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10028                                             ecpri_m->hdr.dummy[0];
10029                         /* Sample#1, to match message body, offset 4. */
10030                         MLX5_SET(fte_match_set_misc4, misc4_m,
10031                                  prog_sample_field_id_1, samples[1]);
10032                         MLX5_SET(fte_match_set_misc4, misc4_v,
10033                                  prog_sample_field_id_1, samples[1]);
10034                         break;
10035                 default:
10036                         /* Others, do not match any sample ID. */
10037                         break;
10038                 }
10039         }
10040 }
10041
10042 /*
10043  * Add connection tracking status item to matcher
10044  *
10045  * @param[in] dev
10046  *   The devich to configure through.
10047  * @param[in, out] matcher
10048  *   Flow matcher.
10049  * @param[in, out] key
10050  *   Flow matcher value.
10051  * @param[in] item
10052  *   Flow pattern to translate.
10053  */
10054 static void
10055 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10056                               void *matcher, void *key,
10057                               const struct rte_flow_item *item)
10058 {
10059         uint32_t reg_value = 0;
10060         int reg_id;
10061         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10062         uint32_t reg_mask = 0;
10063         const struct rte_flow_item_conntrack *spec = item->spec;
10064         const struct rte_flow_item_conntrack *mask = item->mask;
10065         uint32_t flags;
10066         struct rte_flow_error error;
10067
10068         if (!mask)
10069                 mask = &rte_flow_item_conntrack_mask;
10070         if (!spec || !mask->flags)
10071                 return;
10072         flags = spec->flags & mask->flags;
10073         /* The conflict should be checked in the validation. */
10074         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10075                 reg_value |= MLX5_CT_SYNDROME_VALID;
10076         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10077                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10078         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10079                 reg_value |= MLX5_CT_SYNDROME_INVALID;
10080         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10081                 reg_value |= MLX5_CT_SYNDROME_TRAP;
10082         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10083                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10084         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10085                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10086                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10087                 reg_mask |= 0xc0;
10088         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10089                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10090         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10091                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10092         /* The REG_C_x value could be saved during startup. */
10093         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10094         if (reg_id == REG_NON)
10095                 return;
10096         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10097                                reg_value, reg_mask);
10098 }
10099
10100 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10101
10102 #define HEADER_IS_ZERO(match_criteria, headers)                              \
10103         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
10104                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10105
10106 /**
10107  * Calculate flow matcher enable bitmap.
10108  *
10109  * @param match_criteria
10110  *   Pointer to flow matcher criteria.
10111  *
10112  * @return
10113  *   Bitmap of enabled fields.
10114  */
10115 static uint8_t
10116 flow_dv_matcher_enable(uint32_t *match_criteria)
10117 {
10118         uint8_t match_criteria_enable;
10119
10120         match_criteria_enable =
10121                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10122                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10123         match_criteria_enable |=
10124                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10125                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10126         match_criteria_enable |=
10127                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10128                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10129         match_criteria_enable |=
10130                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10131                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10132         match_criteria_enable |=
10133                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10134                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10135         match_criteria_enable |=
10136                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10137                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10138         match_criteria_enable |=
10139                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10140                 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10141         return match_criteria_enable;
10142 }
10143
10144 static void
10145 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10146 {
10147         /*
10148          * Check flow matching criteria first, subtract misc5/4 length if flow
10149          * doesn't own misc5/4 parameters. In some old rdma-core releases,
10150          * misc5/4 are not supported, and matcher creation failure is expected
10151          * w/o subtration. If misc5 is provided, misc4 must be counted in since
10152          * misc5 is right after misc4.
10153          */
10154         if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10155                 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10156                         MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10157                 if (!(match_criteria & (1 <<
10158                         MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10159                         *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10160                 }
10161         }
10162 }
10163
10164 static struct mlx5_list_entry *
10165 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10166                          struct mlx5_list_entry *entry, void *cb_ctx)
10167 {
10168         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10169         struct mlx5_flow_dv_matcher *ref = ctx->data;
10170         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10171                                                             typeof(*tbl), tbl);
10172         struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10173                                                             sizeof(*resource),
10174                                                             0, SOCKET_ID_ANY);
10175
10176         if (!resource) {
10177                 rte_flow_error_set(ctx->error, ENOMEM,
10178                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10179                                    "cannot create matcher");
10180                 return NULL;
10181         }
10182         memcpy(resource, entry, sizeof(*resource));
10183         resource->tbl = &tbl->tbl;
10184         return &resource->entry;
10185 }
10186
10187 static void
10188 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10189                              struct mlx5_list_entry *entry)
10190 {
10191         mlx5_free(entry);
10192 }
10193
10194 struct mlx5_list_entry *
10195 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10196 {
10197         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10198         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10199         struct rte_eth_dev *dev = ctx->dev;
10200         struct mlx5_flow_tbl_data_entry *tbl_data;
10201         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10202         struct rte_flow_error *error = ctx->error;
10203         union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10204         struct mlx5_flow_tbl_resource *tbl;
10205         void *domain;
10206         uint32_t idx = 0;
10207         int ret;
10208
10209         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10210         if (!tbl_data) {
10211                 rte_flow_error_set(error, ENOMEM,
10212                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10213                                    NULL,
10214                                    "cannot allocate flow table data entry");
10215                 return NULL;
10216         }
10217         tbl_data->idx = idx;
10218         tbl_data->tunnel = tt_prm->tunnel;
10219         tbl_data->group_id = tt_prm->group_id;
10220         tbl_data->external = !!tt_prm->external;
10221         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10222         tbl_data->is_egress = !!key.is_egress;
10223         tbl_data->is_transfer = !!key.is_fdb;
10224         tbl_data->dummy = !!key.dummy;
10225         tbl_data->level = key.level;
10226         tbl_data->id = key.id;
10227         tbl = &tbl_data->tbl;
10228         if (key.dummy)
10229                 return &tbl_data->entry;
10230         if (key.is_fdb)
10231                 domain = sh->fdb_domain;
10232         else if (key.is_egress)
10233                 domain = sh->tx_domain;
10234         else
10235                 domain = sh->rx_domain;
10236         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10237         if (ret) {
10238                 rte_flow_error_set(error, ENOMEM,
10239                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10240                                    NULL, "cannot create flow table object");
10241                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10242                 return NULL;
10243         }
10244         if (key.level != 0) {
10245                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10246                                         (tbl->obj, &tbl_data->jump.action);
10247                 if (ret) {
10248                         rte_flow_error_set(error, ENOMEM,
10249                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10250                                            NULL,
10251                                            "cannot create flow jump action");
10252                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10253                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10254                         return NULL;
10255                 }
10256         }
10257         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10258               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10259               key.level, key.id);
10260         tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10261                                               flow_dv_matcher_create_cb,
10262                                               flow_dv_matcher_match_cb,
10263                                               flow_dv_matcher_remove_cb,
10264                                               flow_dv_matcher_clone_cb,
10265                                               flow_dv_matcher_clone_free_cb);
10266         if (!tbl_data->matchers) {
10267                 rte_flow_error_set(error, ENOMEM,
10268                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10269                                    NULL,
10270                                    "cannot create tbl matcher list");
10271                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10272                 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10273                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10274                 return NULL;
10275         }
10276         return &tbl_data->entry;
10277 }
10278
10279 int
10280 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10281                      void *cb_ctx)
10282 {
10283         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10284         struct mlx5_flow_tbl_data_entry *tbl_data =
10285                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10286         union mlx5_flow_tbl_key key = { .v64 =  *(uint64_t *)(ctx->data) };
10287
10288         return tbl_data->level != key.level ||
10289                tbl_data->id != key.id ||
10290                tbl_data->dummy != key.dummy ||
10291                tbl_data->is_transfer != !!key.is_fdb ||
10292                tbl_data->is_egress != !!key.is_egress;
10293 }
10294
10295 struct mlx5_list_entry *
10296 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10297                       void *cb_ctx)
10298 {
10299         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10300         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10301         struct mlx5_flow_tbl_data_entry *tbl_data;
10302         struct rte_flow_error *error = ctx->error;
10303         uint32_t idx = 0;
10304
10305         tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10306         if (!tbl_data) {
10307                 rte_flow_error_set(error, ENOMEM,
10308                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10309                                    NULL,
10310                                    "cannot allocate flow table data entry");
10311                 return NULL;
10312         }
10313         memcpy(tbl_data, oentry, sizeof(*tbl_data));
10314         tbl_data->idx = idx;
10315         return &tbl_data->entry;
10316 }
10317
10318 void
10319 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10320 {
10321         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10322         struct mlx5_flow_tbl_data_entry *tbl_data =
10323                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10324
10325         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10326 }
10327
10328 /**
10329  * Get a flow table.
10330  *
10331  * @param[in, out] dev
10332  *   Pointer to rte_eth_dev structure.
10333  * @param[in] table_level
10334  *   Table level to use.
10335  * @param[in] egress
10336  *   Direction of the table.
10337  * @param[in] transfer
10338  *   E-Switch or NIC flow.
10339  * @param[in] dummy
10340  *   Dummy entry for dv API.
10341  * @param[in] table_id
10342  *   Table id to use.
10343  * @param[out] error
10344  *   pointer to error structure.
10345  *
10346  * @return
10347  *   Returns tables resource based on the index, NULL in case of failed.
10348  */
10349 struct mlx5_flow_tbl_resource *
10350 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10351                          uint32_t table_level, uint8_t egress,
10352                          uint8_t transfer,
10353                          bool external,
10354                          const struct mlx5_flow_tunnel *tunnel,
10355                          uint32_t group_id, uint8_t dummy,
10356                          uint32_t table_id,
10357                          struct rte_flow_error *error)
10358 {
10359         struct mlx5_priv *priv = dev->data->dev_private;
10360         union mlx5_flow_tbl_key table_key = {
10361                 {
10362                         .level = table_level,
10363                         .id = table_id,
10364                         .reserved = 0,
10365                         .dummy = !!dummy,
10366                         .is_fdb = !!transfer,
10367                         .is_egress = !!egress,
10368                 }
10369         };
10370         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10371                 .tunnel = tunnel,
10372                 .group_id = group_id,
10373                 .external = external,
10374         };
10375         struct mlx5_flow_cb_ctx ctx = {
10376                 .dev = dev,
10377                 .error = error,
10378                 .data = &table_key.v64,
10379                 .data2 = &tt_prm,
10380         };
10381         struct mlx5_list_entry *entry;
10382         struct mlx5_flow_tbl_data_entry *tbl_data;
10383
10384         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10385         if (!entry) {
10386                 rte_flow_error_set(error, ENOMEM,
10387                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10388                                    "cannot get table");
10389                 return NULL;
10390         }
10391         DRV_LOG(DEBUG, "table_level %u table_id %u "
10392                 "tunnel %u group %u registered.",
10393                 table_level, table_id,
10394                 tunnel ? tunnel->tunnel_id : 0, group_id);
10395         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10396         return &tbl_data->tbl;
10397 }
10398
10399 void
10400 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10401 {
10402         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10403         struct mlx5_flow_tbl_data_entry *tbl_data =
10404                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10405
10406         MLX5_ASSERT(entry && sh);
10407         if (tbl_data->jump.action)
10408                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10409         if (tbl_data->tbl.obj)
10410                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10411         if (tbl_data->tunnel_offload && tbl_data->external) {
10412                 struct mlx5_list_entry *he;
10413                 struct mlx5_hlist *tunnel_grp_hash;
10414                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10415                 union tunnel_tbl_key tunnel_key = {
10416                         .tunnel_id = tbl_data->tunnel ?
10417                                         tbl_data->tunnel->tunnel_id : 0,
10418                         .group = tbl_data->group_id
10419                 };
10420                 uint32_t table_level = tbl_data->level;
10421                 struct mlx5_flow_cb_ctx ctx = {
10422                         .data = (void *)&tunnel_key.val,
10423                 };
10424
10425                 tunnel_grp_hash = tbl_data->tunnel ?
10426                                         tbl_data->tunnel->groups :
10427                                         thub->groups;
10428                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10429                 if (he)
10430                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10431                 DRV_LOG(DEBUG,
10432                         "table_level %u id %u tunnel %u group %u released.",
10433                         table_level,
10434                         tbl_data->id,
10435                         tbl_data->tunnel ?
10436                         tbl_data->tunnel->tunnel_id : 0,
10437                         tbl_data->group_id);
10438         }
10439         mlx5_list_destroy(tbl_data->matchers);
10440         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10441 }
10442
10443 /**
10444  * Release a flow table.
10445  *
10446  * @param[in] sh
10447  *   Pointer to device shared structure.
10448  * @param[in] tbl
10449  *   Table resource to be released.
10450  *
10451  * @return
10452  *   Returns 0 if table was released, else return 1;
10453  */
10454 static int
10455 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10456                              struct mlx5_flow_tbl_resource *tbl)
10457 {
10458         struct mlx5_flow_tbl_data_entry *tbl_data =
10459                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10460
10461         if (!tbl)
10462                 return 0;
10463         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10464 }
10465
10466 int
10467 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10468                          struct mlx5_list_entry *entry, void *cb_ctx)
10469 {
10470         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10471         struct mlx5_flow_dv_matcher *ref = ctx->data;
10472         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10473                                                         entry);
10474
10475         return cur->crc != ref->crc ||
10476                cur->priority != ref->priority ||
10477                memcmp((const void *)cur->mask.buf,
10478                       (const void *)ref->mask.buf, ref->mask.size);
10479 }
10480
10481 struct mlx5_list_entry *
10482 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10483 {
10484         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10485         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10486         struct mlx5_flow_dv_matcher *ref = ctx->data;
10487         struct mlx5_flow_dv_matcher *resource;
10488         struct mlx5dv_flow_matcher_attr dv_attr = {
10489                 .type = IBV_FLOW_ATTR_NORMAL,
10490                 .match_mask = (void *)&ref->mask,
10491         };
10492         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10493                                                             typeof(*tbl), tbl);
10494         int ret;
10495
10496         resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10497                                SOCKET_ID_ANY);
10498         if (!resource) {
10499                 rte_flow_error_set(ctx->error, ENOMEM,
10500                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10501                                    "cannot create matcher");
10502                 return NULL;
10503         }
10504         *resource = *ref;
10505         dv_attr.match_criteria_enable =
10506                 flow_dv_matcher_enable(resource->mask.buf);
10507         __flow_dv_adjust_buf_size(&ref->mask.size,
10508                                   dv_attr.match_criteria_enable);
10509         dv_attr.priority = ref->priority;
10510         if (tbl->is_egress)
10511                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10512         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
10513                                                &resource->matcher_object);
10514         if (ret) {
10515                 mlx5_free(resource);
10516                 rte_flow_error_set(ctx->error, ENOMEM,
10517                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10518                                    "cannot create matcher");
10519                 return NULL;
10520         }
10521         return &resource->entry;
10522 }
10523
10524 /**
10525  * Register the flow matcher.
10526  *
10527  * @param[in, out] dev
10528  *   Pointer to rte_eth_dev structure.
10529  * @param[in, out] matcher
10530  *   Pointer to flow matcher.
10531  * @param[in, out] key
10532  *   Pointer to flow table key.
10533  * @parm[in, out] dev_flow
10534  *   Pointer to the dev_flow.
10535  * @param[out] error
10536  *   pointer to error structure.
10537  *
10538  * @return
10539  *   0 on success otherwise -errno and errno is set.
10540  */
10541 static int
10542 flow_dv_matcher_register(struct rte_eth_dev *dev,
10543                          struct mlx5_flow_dv_matcher *ref,
10544                          union mlx5_flow_tbl_key *key,
10545                          struct mlx5_flow *dev_flow,
10546                          const struct mlx5_flow_tunnel *tunnel,
10547                          uint32_t group_id,
10548                          struct rte_flow_error *error)
10549 {
10550         struct mlx5_list_entry *entry;
10551         struct mlx5_flow_dv_matcher *resource;
10552         struct mlx5_flow_tbl_resource *tbl;
10553         struct mlx5_flow_tbl_data_entry *tbl_data;
10554         struct mlx5_flow_cb_ctx ctx = {
10555                 .error = error,
10556                 .data = ref,
10557         };
10558         /**
10559          * tunnel offload API requires this registration for cases when
10560          * tunnel match rule was inserted before tunnel set rule.
10561          */
10562         tbl = flow_dv_tbl_resource_get(dev, key->level,
10563                                        key->is_egress, key->is_fdb,
10564                                        dev_flow->external, tunnel,
10565                                        group_id, 0, key->id, error);
10566         if (!tbl)
10567                 return -rte_errno;      /* No need to refill the error info */
10568         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10569         ref->tbl = tbl;
10570         entry = mlx5_list_register(tbl_data->matchers, &ctx);
10571         if (!entry) {
10572                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10573                 return rte_flow_error_set(error, ENOMEM,
10574                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10575                                           "cannot allocate ref memory");
10576         }
10577         resource = container_of(entry, typeof(*resource), entry);
10578         dev_flow->handle->dvh.matcher = resource;
10579         return 0;
10580 }
10581
10582 struct mlx5_list_entry *
10583 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10584 {
10585         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10586         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10587         struct mlx5_flow_dv_tag_resource *entry;
10588         uint32_t idx = 0;
10589         int ret;
10590
10591         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10592         if (!entry) {
10593                 rte_flow_error_set(ctx->error, ENOMEM,
10594                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10595                                    "cannot allocate resource memory");
10596                 return NULL;
10597         }
10598         entry->idx = idx;
10599         entry->tag_id = *(uint32_t *)(ctx->data);
10600         ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10601                                                   &entry->action);
10602         if (ret) {
10603                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10604                 rte_flow_error_set(ctx->error, ENOMEM,
10605                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10606                                    NULL, "cannot create action");
10607                 return NULL;
10608         }
10609         return &entry->entry;
10610 }
10611
10612 int
10613 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10614                      void *cb_ctx)
10615 {
10616         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10617         struct mlx5_flow_dv_tag_resource *tag =
10618                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10619
10620         return *(uint32_t *)(ctx->data) != tag->tag_id;
10621 }
10622
10623 struct mlx5_list_entry *
10624 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10625                      void *cb_ctx)
10626 {
10627         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10628         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10629         struct mlx5_flow_dv_tag_resource *entry;
10630         uint32_t idx = 0;
10631
10632         entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10633         if (!entry) {
10634                 rte_flow_error_set(ctx->error, ENOMEM,
10635                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10636                                    "cannot allocate tag resource memory");
10637                 return NULL;
10638         }
10639         memcpy(entry, oentry, sizeof(*entry));
10640         entry->idx = idx;
10641         return &entry->entry;
10642 }
10643
10644 void
10645 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10646 {
10647         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10648         struct mlx5_flow_dv_tag_resource *tag =
10649                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10650
10651         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10652 }
10653
10654 /**
10655  * Find existing tag resource or create and register a new one.
10656  *
10657  * @param dev[in, out]
10658  *   Pointer to rte_eth_dev structure.
10659  * @param[in, out] tag_be24
10660  *   Tag value in big endian then R-shift 8.
10661  * @parm[in, out] dev_flow
10662  *   Pointer to the dev_flow.
10663  * @param[out] error
10664  *   pointer to error structure.
10665  *
10666  * @return
10667  *   0 on success otherwise -errno and errno is set.
10668  */
10669 static int
10670 flow_dv_tag_resource_register
10671                         (struct rte_eth_dev *dev,
10672                          uint32_t tag_be24,
10673                          struct mlx5_flow *dev_flow,
10674                          struct rte_flow_error *error)
10675 {
10676         struct mlx5_priv *priv = dev->data->dev_private;
10677         struct mlx5_flow_dv_tag_resource *resource;
10678         struct mlx5_list_entry *entry;
10679         struct mlx5_flow_cb_ctx ctx = {
10680                                         .error = error,
10681                                         .data = &tag_be24,
10682                                         };
10683         struct mlx5_hlist *tag_table;
10684
10685         tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10686                                       "tags",
10687                                       MLX5_TAGS_HLIST_ARRAY_SIZE,
10688                                       false, false, priv->sh,
10689                                       flow_dv_tag_create_cb,
10690                                       flow_dv_tag_match_cb,
10691                                       flow_dv_tag_remove_cb,
10692                                       flow_dv_tag_clone_cb,
10693                                       flow_dv_tag_clone_free_cb);
10694         if (unlikely(!tag_table))
10695                 return -rte_errno;
10696         entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10697         if (entry) {
10698                 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10699                                         entry);
10700                 dev_flow->handle->dvh.rix_tag = resource->idx;
10701                 dev_flow->dv.tag_resource = resource;
10702                 return 0;
10703         }
10704         return -rte_errno;
10705 }
10706
10707 void
10708 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10709 {
10710         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10711         struct mlx5_flow_dv_tag_resource *tag =
10712                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10713
10714         MLX5_ASSERT(tag && sh && tag->action);
10715         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10716         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10717         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10718 }
10719
10720 /**
10721  * Release the tag.
10722  *
10723  * @param dev
10724  *   Pointer to Ethernet device.
10725  * @param tag_idx
10726  *   Tag index.
10727  *
10728  * @return
10729  *   1 while a reference on it exists, 0 when freed.
10730  */
10731 static int
10732 flow_dv_tag_release(struct rte_eth_dev *dev,
10733                     uint32_t tag_idx)
10734 {
10735         struct mlx5_priv *priv = dev->data->dev_private;
10736         struct mlx5_flow_dv_tag_resource *tag;
10737
10738         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10739         if (!tag)
10740                 return 0;
10741         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10742                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10743         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10744 }
10745
10746 /**
10747  * Translate port ID action to vport.
10748  *
10749  * @param[in] dev
10750  *   Pointer to rte_eth_dev structure.
10751  * @param[in] action
10752  *   Pointer to the port ID action.
10753  * @param[out] dst_port_id
10754  *   The target port ID.
10755  * @param[out] error
10756  *   Pointer to the error structure.
10757  *
10758  * @return
10759  *   0 on success, a negative errno value otherwise and rte_errno is set.
10760  */
10761 static int
10762 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10763                                  const struct rte_flow_action *action,
10764                                  uint32_t *dst_port_id,
10765                                  struct rte_flow_error *error)
10766 {
10767         uint32_t port;
10768         struct mlx5_priv *priv;
10769         const struct rte_flow_action_port_id *conf =
10770                         (const struct rte_flow_action_port_id *)action->conf;
10771
10772         port = conf->original ? dev->data->port_id : conf->id;
10773         priv = mlx5_port_to_eswitch_info(port, false);
10774         if (!priv)
10775                 return rte_flow_error_set(error, -rte_errno,
10776                                           RTE_FLOW_ERROR_TYPE_ACTION,
10777                                           NULL,
10778                                           "No eswitch info was found for port");
10779 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10780         /*
10781          * This parameter is transferred to
10782          * mlx5dv_dr_action_create_dest_ib_port().
10783          */
10784         *dst_port_id = priv->dev_port;
10785 #else
10786         /*
10787          * Legacy mode, no LAG configurations is supported.
10788          * This parameter is transferred to
10789          * mlx5dv_dr_action_create_dest_vport().
10790          */
10791         *dst_port_id = priv->vport_id;
10792 #endif
10793         return 0;
10794 }
10795
10796 /**
10797  * Create a counter with aging configuration.
10798  *
10799  * @param[in] dev
10800  *   Pointer to rte_eth_dev structure.
10801  * @param[in] dev_flow
10802  *   Pointer to the mlx5_flow.
10803  * @param[out] count
10804  *   Pointer to the counter action configuration.
10805  * @param[in] age
10806  *   Pointer to the aging action configuration.
10807  *
10808  * @return
10809  *   Index to flow counter on success, 0 otherwise.
10810  */
10811 static uint32_t
10812 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10813                                 struct mlx5_flow *dev_flow,
10814                                 const struct rte_flow_action_count *count,
10815                                 const struct rte_flow_action_age *age)
10816 {
10817         uint32_t counter;
10818         struct mlx5_age_param *age_param;
10819
10820         if (count && count->shared)
10821                 counter = flow_dv_counter_get_shared(dev, count->id);
10822         else
10823                 counter = flow_dv_counter_alloc(dev, !!age);
10824         if (!counter || age == NULL)
10825                 return counter;
10826         age_param = flow_dv_counter_idx_get_age(dev, counter);
10827         age_param->context = age->context ? age->context :
10828                 (void *)(uintptr_t)(dev_flow->flow_idx);
10829         age_param->timeout = age->timeout;
10830         age_param->port_id = dev->data->port_id;
10831         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10832         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10833         return counter;
10834 }
10835
10836 /**
10837  * Add Tx queue matcher
10838  *
10839  * @param[in] dev
10840  *   Pointer to the dev struct.
10841  * @param[in, out] matcher
10842  *   Flow matcher.
10843  * @param[in, out] key
10844  *   Flow matcher value.
10845  * @param[in] item
10846  *   Flow pattern to translate.
10847  * @param[in] inner
10848  *   Item is inner pattern.
10849  */
10850 static void
10851 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10852                                 void *matcher, void *key,
10853                                 const struct rte_flow_item *item)
10854 {
10855         const struct mlx5_rte_flow_item_tx_queue *queue_m;
10856         const struct mlx5_rte_flow_item_tx_queue *queue_v;
10857         void *misc_m =
10858                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10859         void *misc_v =
10860                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10861         struct mlx5_txq_ctrl *txq;
10862         uint32_t queue;
10863
10864
10865         queue_m = (const void *)item->mask;
10866         if (!queue_m)
10867                 return;
10868         queue_v = (const void *)item->spec;
10869         if (!queue_v)
10870                 return;
10871         txq = mlx5_txq_get(dev, queue_v->queue);
10872         if (!txq)
10873                 return;
10874         queue = txq->obj->sq->id;
10875         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
10876         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
10877                  queue & queue_m->queue);
10878         mlx5_txq_release(dev, queue_v->queue);
10879 }
10880
10881 /**
10882  * Set the hash fields according to the @p flow information.
10883  *
10884  * @param[in] dev_flow
10885  *   Pointer to the mlx5_flow.
10886  * @param[in] rss_desc
10887  *   Pointer to the mlx5_flow_rss_desc.
10888  */
10889 static void
10890 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10891                        struct mlx5_flow_rss_desc *rss_desc)
10892 {
10893         uint64_t items = dev_flow->handle->layers;
10894         int rss_inner = 0;
10895         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10896
10897         dev_flow->hash_fields = 0;
10898 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10899         if (rss_desc->level >= 2)
10900                 rss_inner = 1;
10901 #endif
10902         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10903             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10904                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10905                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10906                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10907                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10908                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10909                         else
10910                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10911                 }
10912         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10913                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10914                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10915                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10916                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10917                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10918                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10919                         else
10920                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10921                 }
10922         }
10923         if (dev_flow->hash_fields == 0)
10924                 /*
10925                  * There is no match between the RSS types and the
10926                  * L3 protocol (IPv4/IPv6) defined in the flow rule.
10927                  */
10928                 return;
10929         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10930             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10931                 if (rss_types & ETH_RSS_UDP) {
10932                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10933                                 dev_flow->hash_fields |=
10934                                                 IBV_RX_HASH_SRC_PORT_UDP;
10935                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10936                                 dev_flow->hash_fields |=
10937                                                 IBV_RX_HASH_DST_PORT_UDP;
10938                         else
10939                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10940                 }
10941         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10942                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10943                 if (rss_types & ETH_RSS_TCP) {
10944                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10945                                 dev_flow->hash_fields |=
10946                                                 IBV_RX_HASH_SRC_PORT_TCP;
10947                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10948                                 dev_flow->hash_fields |=
10949                                                 IBV_RX_HASH_DST_PORT_TCP;
10950                         else
10951                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10952                 }
10953         }
10954         if (rss_inner)
10955                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10956 }
10957
10958 /**
10959  * Prepare an Rx Hash queue.
10960  *
10961  * @param dev
10962  *   Pointer to Ethernet device.
10963  * @param[in] dev_flow
10964  *   Pointer to the mlx5_flow.
10965  * @param[in] rss_desc
10966  *   Pointer to the mlx5_flow_rss_desc.
10967  * @param[out] hrxq_idx
10968  *   Hash Rx queue index.
10969  *
10970  * @return
10971  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10972  */
10973 static struct mlx5_hrxq *
10974 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10975                      struct mlx5_flow *dev_flow,
10976                      struct mlx5_flow_rss_desc *rss_desc,
10977                      uint32_t *hrxq_idx)
10978 {
10979         struct mlx5_priv *priv = dev->data->dev_private;
10980         struct mlx5_flow_handle *dh = dev_flow->handle;
10981         struct mlx5_hrxq *hrxq;
10982
10983         MLX5_ASSERT(rss_desc->queue_num);
10984         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10985         rss_desc->hash_fields = dev_flow->hash_fields;
10986         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10987         rss_desc->shared_rss = 0;
10988         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10989         if (!*hrxq_idx)
10990                 return NULL;
10991         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10992                               *hrxq_idx);
10993         return hrxq;
10994 }
10995
10996 /**
10997  * Release sample sub action resource.
10998  *
10999  * @param[in, out] dev
11000  *   Pointer to rte_eth_dev structure.
11001  * @param[in] act_res
11002  *   Pointer to sample sub action resource.
11003  */
11004 static void
11005 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11006                                    struct mlx5_flow_sub_actions_idx *act_res)
11007 {
11008         if (act_res->rix_hrxq) {
11009                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11010                 act_res->rix_hrxq = 0;
11011         }
11012         if (act_res->rix_encap_decap) {
11013                 flow_dv_encap_decap_resource_release(dev,
11014                                                      act_res->rix_encap_decap);
11015                 act_res->rix_encap_decap = 0;
11016         }
11017         if (act_res->rix_port_id_action) {
11018                 flow_dv_port_id_action_resource_release(dev,
11019                                                 act_res->rix_port_id_action);
11020                 act_res->rix_port_id_action = 0;
11021         }
11022         if (act_res->rix_tag) {
11023                 flow_dv_tag_release(dev, act_res->rix_tag);
11024                 act_res->rix_tag = 0;
11025         }
11026         if (act_res->rix_jump) {
11027                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11028                 act_res->rix_jump = 0;
11029         }
11030 }
11031
11032 int
11033 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11034                         struct mlx5_list_entry *entry, void *cb_ctx)
11035 {
11036         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11037         struct rte_eth_dev *dev = ctx->dev;
11038         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11039         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11040                                                               typeof(*resource),
11041                                                               entry);
11042
11043         if (ctx_resource->ratio == resource->ratio &&
11044             ctx_resource->ft_type == resource->ft_type &&
11045             ctx_resource->ft_id == resource->ft_id &&
11046             ctx_resource->set_action == resource->set_action &&
11047             !memcmp((void *)&ctx_resource->sample_act,
11048                     (void *)&resource->sample_act,
11049                     sizeof(struct mlx5_flow_sub_actions_list))) {
11050                 /*
11051                  * Existing sample action should release the prepared
11052                  * sub-actions reference counter.
11053                  */
11054                 flow_dv_sample_sub_actions_release(dev,
11055                                                    &ctx_resource->sample_idx);
11056                 return 0;
11057         }
11058         return 1;
11059 }
11060
11061 struct mlx5_list_entry *
11062 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11063 {
11064         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11065         struct rte_eth_dev *dev = ctx->dev;
11066         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11067         void **sample_dv_actions = ctx_resource->sub_actions;
11068         struct mlx5_flow_dv_sample_resource *resource;
11069         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11070         struct mlx5_priv *priv = dev->data->dev_private;
11071         struct mlx5_dev_ctx_shared *sh = priv->sh;
11072         struct mlx5_flow_tbl_resource *tbl;
11073         uint32_t idx = 0;
11074         const uint32_t next_ft_step = 1;
11075         uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11076         uint8_t is_egress = 0;
11077         uint8_t is_transfer = 0;
11078         struct rte_flow_error *error = ctx->error;
11079
11080         /* Register new sample resource. */
11081         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11082         if (!resource) {
11083                 rte_flow_error_set(error, ENOMEM,
11084                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11085                                           NULL,
11086                                           "cannot allocate resource memory");
11087                 return NULL;
11088         }
11089         *resource = *ctx_resource;
11090         /* Create normal path table level */
11091         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11092                 is_transfer = 1;
11093         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11094                 is_egress = 1;
11095         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11096                                         is_egress, is_transfer,
11097                                         true, NULL, 0, 0, 0, error);
11098         if (!tbl) {
11099                 rte_flow_error_set(error, ENOMEM,
11100                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11101                                           NULL,
11102                                           "fail to create normal path table "
11103                                           "for sample");
11104                 goto error;
11105         }
11106         resource->normal_path_tbl = tbl;
11107         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11108                 if (!sh->default_miss_action) {
11109                         rte_flow_error_set(error, ENOMEM,
11110                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11111                                                 NULL,
11112                                                 "default miss action was not "
11113                                                 "created");
11114                         goto error;
11115                 }
11116                 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11117                                                 sh->default_miss_action;
11118         }
11119         /* Create a DR sample action */
11120         sampler_attr.sample_ratio = resource->ratio;
11121         sampler_attr.default_next_table = tbl->obj;
11122         sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11123         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11124                                                         &sample_dv_actions[0];
11125         sampler_attr.action = resource->set_action;
11126         if (mlx5_os_flow_dr_create_flow_action_sampler
11127                         (&sampler_attr, &resource->verbs_action)) {
11128                 rte_flow_error_set(error, ENOMEM,
11129                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11130                                         NULL, "cannot create sample action");
11131                 goto error;
11132         }
11133         resource->idx = idx;
11134         resource->dev = dev;
11135         return &resource->entry;
11136 error:
11137         if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11138                 flow_dv_sample_sub_actions_release(dev,
11139                                                    &resource->sample_idx);
11140         if (resource->normal_path_tbl)
11141                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11142                                 resource->normal_path_tbl);
11143         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11144         return NULL;
11145
11146 }
11147
11148 struct mlx5_list_entry *
11149 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11150                          struct mlx5_list_entry *entry __rte_unused,
11151                          void *cb_ctx)
11152 {
11153         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11154         struct rte_eth_dev *dev = ctx->dev;
11155         struct mlx5_flow_dv_sample_resource *resource;
11156         struct mlx5_priv *priv = dev->data->dev_private;
11157         struct mlx5_dev_ctx_shared *sh = priv->sh;
11158         uint32_t idx = 0;
11159
11160         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11161         if (!resource) {
11162                 rte_flow_error_set(ctx->error, ENOMEM,
11163                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11164                                           NULL,
11165                                           "cannot allocate resource memory");
11166                 return NULL;
11167         }
11168         memcpy(resource, entry, sizeof(*resource));
11169         resource->idx = idx;
11170         resource->dev = dev;
11171         return &resource->entry;
11172 }
11173
11174 void
11175 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11176                              struct mlx5_list_entry *entry)
11177 {
11178         struct mlx5_flow_dv_sample_resource *resource =
11179                                   container_of(entry, typeof(*resource), entry);
11180         struct rte_eth_dev *dev = resource->dev;
11181         struct mlx5_priv *priv = dev->data->dev_private;
11182
11183         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11184 }
11185
11186 /**
11187  * Find existing sample resource or create and register a new one.
11188  *
11189  * @param[in, out] dev
11190  *   Pointer to rte_eth_dev structure.
11191  * @param[in] ref
11192  *   Pointer to sample resource reference.
11193  * @parm[in, out] dev_flow
11194  *   Pointer to the dev_flow.
11195  * @param[out] error
11196  *   pointer to error structure.
11197  *
11198  * @return
11199  *   0 on success otherwise -errno and errno is set.
11200  */
11201 static int
11202 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11203                          struct mlx5_flow_dv_sample_resource *ref,
11204                          struct mlx5_flow *dev_flow,
11205                          struct rte_flow_error *error)
11206 {
11207         struct mlx5_flow_dv_sample_resource *resource;
11208         struct mlx5_list_entry *entry;
11209         struct mlx5_priv *priv = dev->data->dev_private;
11210         struct mlx5_flow_cb_ctx ctx = {
11211                 .dev = dev,
11212                 .error = error,
11213                 .data = ref,
11214         };
11215
11216         entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11217         if (!entry)
11218                 return -rte_errno;
11219         resource = container_of(entry, typeof(*resource), entry);
11220         dev_flow->handle->dvh.rix_sample = resource->idx;
11221         dev_flow->dv.sample_res = resource;
11222         return 0;
11223 }
11224
11225 int
11226 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11227                             struct mlx5_list_entry *entry, void *cb_ctx)
11228 {
11229         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11230         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11231         struct rte_eth_dev *dev = ctx->dev;
11232         struct mlx5_flow_dv_dest_array_resource *resource =
11233                                   container_of(entry, typeof(*resource), entry);
11234         uint32_t idx = 0;
11235
11236         if (ctx_resource->num_of_dest == resource->num_of_dest &&
11237             ctx_resource->ft_type == resource->ft_type &&
11238             !memcmp((void *)resource->sample_act,
11239                     (void *)ctx_resource->sample_act,
11240                    (ctx_resource->num_of_dest *
11241                    sizeof(struct mlx5_flow_sub_actions_list)))) {
11242                 /*
11243                  * Existing sample action should release the prepared
11244                  * sub-actions reference counter.
11245                  */
11246                 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11247                         flow_dv_sample_sub_actions_release(dev,
11248                                         &ctx_resource->sample_idx[idx]);
11249                 return 0;
11250         }
11251         return 1;
11252 }
11253
11254 struct mlx5_list_entry *
11255 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11256 {
11257         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11258         struct rte_eth_dev *dev = ctx->dev;
11259         struct mlx5_flow_dv_dest_array_resource *resource;
11260         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11261         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11262         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11263         struct mlx5_priv *priv = dev->data->dev_private;
11264         struct mlx5_dev_ctx_shared *sh = priv->sh;
11265         struct mlx5_flow_sub_actions_list *sample_act;
11266         struct mlx5dv_dr_domain *domain;
11267         uint32_t idx = 0, res_idx = 0;
11268         struct rte_flow_error *error = ctx->error;
11269         uint64_t action_flags;
11270         int ret;
11271
11272         /* Register new destination array resource. */
11273         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11274                                             &res_idx);
11275         if (!resource) {
11276                 rte_flow_error_set(error, ENOMEM,
11277                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11278                                           NULL,
11279                                           "cannot allocate resource memory");
11280                 return NULL;
11281         }
11282         *resource = *ctx_resource;
11283         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11284                 domain = sh->fdb_domain;
11285         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11286                 domain = sh->rx_domain;
11287         else
11288                 domain = sh->tx_domain;
11289         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11290                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11291                                  mlx5_malloc(MLX5_MEM_ZERO,
11292                                  sizeof(struct mlx5dv_dr_action_dest_attr),
11293                                  0, SOCKET_ID_ANY);
11294                 if (!dest_attr[idx]) {
11295                         rte_flow_error_set(error, ENOMEM,
11296                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11297                                            NULL,
11298                                            "cannot allocate resource memory");
11299                         goto error;
11300                 }
11301                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11302                 sample_act = &ctx_resource->sample_act[idx];
11303                 action_flags = sample_act->action_flags;
11304                 switch (action_flags) {
11305                 case MLX5_FLOW_ACTION_QUEUE:
11306                         dest_attr[idx]->dest = sample_act->dr_queue_action;
11307                         break;
11308                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11309                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11310                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11311                         dest_attr[idx]->dest_reformat->reformat =
11312                                         sample_act->dr_encap_action;
11313                         dest_attr[idx]->dest_reformat->dest =
11314                                         sample_act->dr_port_id_action;
11315                         break;
11316                 case MLX5_FLOW_ACTION_PORT_ID:
11317                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
11318                         break;
11319                 case MLX5_FLOW_ACTION_JUMP:
11320                         dest_attr[idx]->dest = sample_act->dr_jump_action;
11321                         break;
11322                 default:
11323                         rte_flow_error_set(error, EINVAL,
11324                                            RTE_FLOW_ERROR_TYPE_ACTION,
11325                                            NULL,
11326                                            "unsupported actions type");
11327                         goto error;
11328                 }
11329         }
11330         /* create a dest array actioin */
11331         ret = mlx5_os_flow_dr_create_flow_action_dest_array
11332                                                 (domain,
11333                                                  resource->num_of_dest,
11334                                                  dest_attr,
11335                                                  &resource->action);
11336         if (ret) {
11337                 rte_flow_error_set(error, ENOMEM,
11338                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11339                                    NULL,
11340                                    "cannot create destination array action");
11341                 goto error;
11342         }
11343         resource->idx = res_idx;
11344         resource->dev = dev;
11345         for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11346                 mlx5_free(dest_attr[idx]);
11347         return &resource->entry;
11348 error:
11349         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11350                 flow_dv_sample_sub_actions_release(dev,
11351                                                    &resource->sample_idx[idx]);
11352                 if (dest_attr[idx])
11353                         mlx5_free(dest_attr[idx]);
11354         }
11355         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11356         return NULL;
11357 }
11358
11359 struct mlx5_list_entry *
11360 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11361                             struct mlx5_list_entry *entry __rte_unused,
11362                             void *cb_ctx)
11363 {
11364         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11365         struct rte_eth_dev *dev = ctx->dev;
11366         struct mlx5_flow_dv_dest_array_resource *resource;
11367         struct mlx5_priv *priv = dev->data->dev_private;
11368         struct mlx5_dev_ctx_shared *sh = priv->sh;
11369         uint32_t res_idx = 0;
11370         struct rte_flow_error *error = ctx->error;
11371
11372         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11373                                       &res_idx);
11374         if (!resource) {
11375                 rte_flow_error_set(error, ENOMEM,
11376                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11377                                           NULL,
11378                                           "cannot allocate dest-array memory");
11379                 return NULL;
11380         }
11381         memcpy(resource, entry, sizeof(*resource));
11382         resource->idx = res_idx;
11383         resource->dev = dev;
11384         return &resource->entry;
11385 }
11386
11387 void
11388 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11389                                  struct mlx5_list_entry *entry)
11390 {
11391         struct mlx5_flow_dv_dest_array_resource *resource =
11392                         container_of(entry, typeof(*resource), entry);
11393         struct rte_eth_dev *dev = resource->dev;
11394         struct mlx5_priv *priv = dev->data->dev_private;
11395
11396         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11397 }
11398
11399 /**
11400  * Find existing destination array resource or create and register a new one.
11401  *
11402  * @param[in, out] dev
11403  *   Pointer to rte_eth_dev structure.
11404  * @param[in] ref
11405  *   Pointer to destination array resource reference.
11406  * @parm[in, out] dev_flow
11407  *   Pointer to the dev_flow.
11408  * @param[out] error
11409  *   pointer to error structure.
11410  *
11411  * @return
11412  *   0 on success otherwise -errno and errno is set.
11413  */
11414 static int
11415 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11416                          struct mlx5_flow_dv_dest_array_resource *ref,
11417                          struct mlx5_flow *dev_flow,
11418                          struct rte_flow_error *error)
11419 {
11420         struct mlx5_flow_dv_dest_array_resource *resource;
11421         struct mlx5_priv *priv = dev->data->dev_private;
11422         struct mlx5_list_entry *entry;
11423         struct mlx5_flow_cb_ctx ctx = {
11424                 .dev = dev,
11425                 .error = error,
11426                 .data = ref,
11427         };
11428
11429         entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11430         if (!entry)
11431                 return -rte_errno;
11432         resource = container_of(entry, typeof(*resource), entry);
11433         dev_flow->handle->dvh.rix_dest_array = resource->idx;
11434         dev_flow->dv.dest_array_res = resource;
11435         return 0;
11436 }
11437
11438 /**
11439  * Convert Sample action to DV specification.
11440  *
11441  * @param[in] dev
11442  *   Pointer to rte_eth_dev structure.
11443  * @param[in] action
11444  *   Pointer to sample action structure.
11445  * @param[in, out] dev_flow
11446  *   Pointer to the mlx5_flow.
11447  * @param[in] attr
11448  *   Pointer to the flow attributes.
11449  * @param[in, out] num_of_dest
11450  *   Pointer to the num of destination.
11451  * @param[in, out] sample_actions
11452  *   Pointer to sample actions list.
11453  * @param[in, out] res
11454  *   Pointer to sample resource.
11455  * @param[out] error
11456  *   Pointer to the error structure.
11457  *
11458  * @return
11459  *   0 on success, a negative errno value otherwise and rte_errno is set.
11460  */
11461 static int
11462 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11463                                 const struct rte_flow_action_sample *action,
11464                                 struct mlx5_flow *dev_flow,
11465                                 const struct rte_flow_attr *attr,
11466                                 uint32_t *num_of_dest,
11467                                 void **sample_actions,
11468                                 struct mlx5_flow_dv_sample_resource *res,
11469                                 struct rte_flow_error *error)
11470 {
11471         struct mlx5_priv *priv = dev->data->dev_private;
11472         const struct rte_flow_action *sub_actions;
11473         struct mlx5_flow_sub_actions_list *sample_act;
11474         struct mlx5_flow_sub_actions_idx *sample_idx;
11475         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11476         struct rte_flow *flow = dev_flow->flow;
11477         struct mlx5_flow_rss_desc *rss_desc;
11478         uint64_t action_flags = 0;
11479
11480         MLX5_ASSERT(wks);
11481         rss_desc = &wks->rss_desc;
11482         sample_act = &res->sample_act;
11483         sample_idx = &res->sample_idx;
11484         res->ratio = action->ratio;
11485         sub_actions = action->actions;
11486         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11487                 int type = sub_actions->type;
11488                 uint32_t pre_rix = 0;
11489                 void *pre_r;
11490                 switch (type) {
11491                 case RTE_FLOW_ACTION_TYPE_QUEUE:
11492                 {
11493                         const struct rte_flow_action_queue *queue;
11494                         struct mlx5_hrxq *hrxq;
11495                         uint32_t hrxq_idx;
11496
11497                         queue = sub_actions->conf;
11498                         rss_desc->queue_num = 1;
11499                         rss_desc->queue[0] = queue->index;
11500                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11501                                                     rss_desc, &hrxq_idx);
11502                         if (!hrxq)
11503                                 return rte_flow_error_set
11504                                         (error, rte_errno,
11505                                          RTE_FLOW_ERROR_TYPE_ACTION,
11506                                          NULL,
11507                                          "cannot create fate queue");
11508                         sample_act->dr_queue_action = hrxq->action;
11509                         sample_idx->rix_hrxq = hrxq_idx;
11510                         sample_actions[sample_act->actions_num++] =
11511                                                 hrxq->action;
11512                         (*num_of_dest)++;
11513                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
11514                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11515                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11516                         dev_flow->handle->fate_action =
11517                                         MLX5_FLOW_FATE_QUEUE;
11518                         break;
11519                 }
11520                 case RTE_FLOW_ACTION_TYPE_RSS:
11521                 {
11522                         struct mlx5_hrxq *hrxq;
11523                         uint32_t hrxq_idx;
11524                         const struct rte_flow_action_rss *rss;
11525                         const uint8_t *rss_key;
11526
11527                         rss = sub_actions->conf;
11528                         memcpy(rss_desc->queue, rss->queue,
11529                                rss->queue_num * sizeof(uint16_t));
11530                         rss_desc->queue_num = rss->queue_num;
11531                         /* NULL RSS key indicates default RSS key. */
11532                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11533                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11534                         /*
11535                          * rss->level and rss.types should be set in advance
11536                          * when expanding items for RSS.
11537                          */
11538                         flow_dv_hashfields_set(dev_flow, rss_desc);
11539                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11540                                                     rss_desc, &hrxq_idx);
11541                         if (!hrxq)
11542                                 return rte_flow_error_set
11543                                         (error, rte_errno,
11544                                          RTE_FLOW_ERROR_TYPE_ACTION,
11545                                          NULL,
11546                                          "cannot create fate queue");
11547                         sample_act->dr_queue_action = hrxq->action;
11548                         sample_idx->rix_hrxq = hrxq_idx;
11549                         sample_actions[sample_act->actions_num++] =
11550                                                 hrxq->action;
11551                         (*num_of_dest)++;
11552                         action_flags |= MLX5_FLOW_ACTION_RSS;
11553                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11554                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11555                         dev_flow->handle->fate_action =
11556                                         MLX5_FLOW_FATE_QUEUE;
11557                         break;
11558                 }
11559                 case RTE_FLOW_ACTION_TYPE_MARK:
11560                 {
11561                         uint32_t tag_be = mlx5_flow_mark_set
11562                                 (((const struct rte_flow_action_mark *)
11563                                 (sub_actions->conf))->id);
11564
11565                         dev_flow->handle->mark = 1;
11566                         pre_rix = dev_flow->handle->dvh.rix_tag;
11567                         /* Save the mark resource before sample */
11568                         pre_r = dev_flow->dv.tag_resource;
11569                         if (flow_dv_tag_resource_register(dev, tag_be,
11570                                                   dev_flow, error))
11571                                 return -rte_errno;
11572                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11573                         sample_act->dr_tag_action =
11574                                 dev_flow->dv.tag_resource->action;
11575                         sample_idx->rix_tag =
11576                                 dev_flow->handle->dvh.rix_tag;
11577                         sample_actions[sample_act->actions_num++] =
11578                                                 sample_act->dr_tag_action;
11579                         /* Recover the mark resource after sample */
11580                         dev_flow->dv.tag_resource = pre_r;
11581                         dev_flow->handle->dvh.rix_tag = pre_rix;
11582                         action_flags |= MLX5_FLOW_ACTION_MARK;
11583                         break;
11584                 }
11585                 case RTE_FLOW_ACTION_TYPE_COUNT:
11586                 {
11587                         if (!flow->counter) {
11588                                 flow->counter =
11589                                         flow_dv_translate_create_counter(dev,
11590                                                 dev_flow, sub_actions->conf,
11591                                                 0);
11592                                 if (!flow->counter)
11593                                         return rte_flow_error_set
11594                                                 (error, rte_errno,
11595                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11596                                                 NULL,
11597                                                 "cannot create counter"
11598                                                 " object.");
11599                         }
11600                         sample_act->dr_cnt_action =
11601                                   (flow_dv_counter_get_by_idx(dev,
11602                                   flow->counter, NULL))->action;
11603                         sample_actions[sample_act->actions_num++] =
11604                                                 sample_act->dr_cnt_action;
11605                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11606                         break;
11607                 }
11608                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11609                 {
11610                         struct mlx5_flow_dv_port_id_action_resource
11611                                         port_id_resource;
11612                         uint32_t port_id = 0;
11613
11614                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11615                         /* Save the port id resource before sample */
11616                         pre_rix = dev_flow->handle->rix_port_id_action;
11617                         pre_r = dev_flow->dv.port_id_action;
11618                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11619                                                              &port_id, error))
11620                                 return -rte_errno;
11621                         port_id_resource.port_id = port_id;
11622                         if (flow_dv_port_id_action_resource_register
11623                             (dev, &port_id_resource, dev_flow, error))
11624                                 return -rte_errno;
11625                         sample_act->dr_port_id_action =
11626                                 dev_flow->dv.port_id_action->action;
11627                         sample_idx->rix_port_id_action =
11628                                 dev_flow->handle->rix_port_id_action;
11629                         sample_actions[sample_act->actions_num++] =
11630                                                 sample_act->dr_port_id_action;
11631                         /* Recover the port id resource after sample */
11632                         dev_flow->dv.port_id_action = pre_r;
11633                         dev_flow->handle->rix_port_id_action = pre_rix;
11634                         (*num_of_dest)++;
11635                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11636                         break;
11637                 }
11638                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11639                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11640                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11641                         /* Save the encap resource before sample */
11642                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11643                         pre_r = dev_flow->dv.encap_decap;
11644                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11645                                                            dev_flow,
11646                                                            attr->transfer,
11647                                                            error))
11648                                 return -rte_errno;
11649                         sample_act->dr_encap_action =
11650                                 dev_flow->dv.encap_decap->action;
11651                         sample_idx->rix_encap_decap =
11652                                 dev_flow->handle->dvh.rix_encap_decap;
11653                         sample_actions[sample_act->actions_num++] =
11654                                                 sample_act->dr_encap_action;
11655                         /* Recover the encap resource after sample */
11656                         dev_flow->dv.encap_decap = pre_r;
11657                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11658                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11659                         break;
11660                 default:
11661                         return rte_flow_error_set(error, EINVAL,
11662                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11663                                 NULL,
11664                                 "Not support for sampler action");
11665                 }
11666         }
11667         sample_act->action_flags = action_flags;
11668         res->ft_id = dev_flow->dv.group;
11669         if (attr->transfer) {
11670                 union {
11671                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11672                         uint64_t set_action;
11673                 } action_ctx = { .set_action = 0 };
11674
11675                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11676                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11677                          MLX5_MODIFICATION_TYPE_SET);
11678                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11679                          MLX5_MODI_META_REG_C_0);
11680                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11681                          priv->vport_meta_tag);
11682                 res->set_action = action_ctx.set_action;
11683         } else if (attr->ingress) {
11684                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11685         } else {
11686                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11687         }
11688         return 0;
11689 }
11690
11691 /**
11692  * Convert Sample action to DV specification.
11693  *
11694  * @param[in] dev
11695  *   Pointer to rte_eth_dev structure.
11696  * @param[in, out] dev_flow
11697  *   Pointer to the mlx5_flow.
11698  * @param[in] num_of_dest
11699  *   The num of destination.
11700  * @param[in, out] res
11701  *   Pointer to sample resource.
11702  * @param[in, out] mdest_res
11703  *   Pointer to destination array resource.
11704  * @param[in] sample_actions
11705  *   Pointer to sample path actions list.
11706  * @param[in] action_flags
11707  *   Holds the actions detected until now.
11708  * @param[out] error
11709  *   Pointer to the error structure.
11710  *
11711  * @return
11712  *   0 on success, a negative errno value otherwise and rte_errno is set.
11713  */
11714 static int
11715 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11716                              struct mlx5_flow *dev_flow,
11717                              uint32_t num_of_dest,
11718                              struct mlx5_flow_dv_sample_resource *res,
11719                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11720                              void **sample_actions,
11721                              uint64_t action_flags,
11722                              struct rte_flow_error *error)
11723 {
11724         /* update normal path action resource into last index of array */
11725         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11726         struct mlx5_flow_sub_actions_list *sample_act =
11727                                         &mdest_res->sample_act[dest_index];
11728         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11729         struct mlx5_flow_rss_desc *rss_desc;
11730         uint32_t normal_idx = 0;
11731         struct mlx5_hrxq *hrxq;
11732         uint32_t hrxq_idx;
11733
11734         MLX5_ASSERT(wks);
11735         rss_desc = &wks->rss_desc;
11736         if (num_of_dest > 1) {
11737                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11738                         /* Handle QP action for mirroring */
11739                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11740                                                     rss_desc, &hrxq_idx);
11741                         if (!hrxq)
11742                                 return rte_flow_error_set
11743                                      (error, rte_errno,
11744                                       RTE_FLOW_ERROR_TYPE_ACTION,
11745                                       NULL,
11746                                       "cannot create rx queue");
11747                         normal_idx++;
11748                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11749                         sample_act->dr_queue_action = hrxq->action;
11750                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11751                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11752                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11753                 }
11754                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11755                         normal_idx++;
11756                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11757                                 dev_flow->handle->dvh.rix_encap_decap;
11758                         sample_act->dr_encap_action =
11759                                 dev_flow->dv.encap_decap->action;
11760                         dev_flow->handle->dvh.rix_encap_decap = 0;
11761                 }
11762                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11763                         normal_idx++;
11764                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11765                                 dev_flow->handle->rix_port_id_action;
11766                         sample_act->dr_port_id_action =
11767                                 dev_flow->dv.port_id_action->action;
11768                         dev_flow->handle->rix_port_id_action = 0;
11769                 }
11770                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11771                         normal_idx++;
11772                         mdest_res->sample_idx[dest_index].rix_jump =
11773                                 dev_flow->handle->rix_jump;
11774                         sample_act->dr_jump_action =
11775                                 dev_flow->dv.jump->action;
11776                         dev_flow->handle->rix_jump = 0;
11777                 }
11778                 sample_act->actions_num = normal_idx;
11779                 /* update sample action resource into first index of array */
11780                 mdest_res->ft_type = res->ft_type;
11781                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11782                                 sizeof(struct mlx5_flow_sub_actions_idx));
11783                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11784                                 sizeof(struct mlx5_flow_sub_actions_list));
11785                 mdest_res->num_of_dest = num_of_dest;
11786                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11787                                                          dev_flow, error))
11788                         return rte_flow_error_set(error, EINVAL,
11789                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11790                                                   NULL, "can't create sample "
11791                                                   "action");
11792         } else {
11793                 res->sub_actions = sample_actions;
11794                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11795                         return rte_flow_error_set(error, EINVAL,
11796                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11797                                                   NULL,
11798                                                   "can't create sample action");
11799         }
11800         return 0;
11801 }
11802
11803 /**
11804  * Remove an ASO age action from age actions list.
11805  *
11806  * @param[in] dev
11807  *   Pointer to the Ethernet device structure.
11808  * @param[in] age
11809  *   Pointer to the aso age action handler.
11810  */
11811 static void
11812 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11813                                 struct mlx5_aso_age_action *age)
11814 {
11815         struct mlx5_age_info *age_info;
11816         struct mlx5_age_param *age_param = &age->age_params;
11817         struct mlx5_priv *priv = dev->data->dev_private;
11818         uint16_t expected = AGE_CANDIDATE;
11819
11820         age_info = GET_PORT_AGE_INFO(priv);
11821         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11822                                          AGE_FREE, false, __ATOMIC_RELAXED,
11823                                          __ATOMIC_RELAXED)) {
11824                 /**
11825                  * We need the lock even it is age timeout,
11826                  * since age action may still in process.
11827                  */
11828                 rte_spinlock_lock(&age_info->aged_sl);
11829                 LIST_REMOVE(age, next);
11830                 rte_spinlock_unlock(&age_info->aged_sl);
11831                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11832         }
11833 }
11834
11835 /**
11836  * Release an ASO age action.
11837  *
11838  * @param[in] dev
11839  *   Pointer to the Ethernet device structure.
11840  * @param[in] age_idx
11841  *   Index of ASO age action to release.
11842  * @param[in] flow
11843  *   True if the release operation is during flow destroy operation.
11844  *   False if the release operation is during action destroy operation.
11845  *
11846  * @return
11847  *   0 when age action was removed, otherwise the number of references.
11848  */
11849 static int
11850 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11851 {
11852         struct mlx5_priv *priv = dev->data->dev_private;
11853         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11854         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11855         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11856
11857         if (!ret) {
11858                 flow_dv_aso_age_remove_from_age(dev, age);
11859                 rte_spinlock_lock(&mng->free_sl);
11860                 LIST_INSERT_HEAD(&mng->free, age, next);
11861                 rte_spinlock_unlock(&mng->free_sl);
11862         }
11863         return ret;
11864 }
11865
11866 /**
11867  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11868  *
11869  * @param[in] dev
11870  *   Pointer to the Ethernet device structure.
11871  *
11872  * @return
11873  *   0 on success, otherwise negative errno value and rte_errno is set.
11874  */
11875 static int
11876 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11877 {
11878         struct mlx5_priv *priv = dev->data->dev_private;
11879         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11880         void *old_pools = mng->pools;
11881         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11882         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11883         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11884
11885         if (!pools) {
11886                 rte_errno = ENOMEM;
11887                 return -ENOMEM;
11888         }
11889         if (old_pools) {
11890                 memcpy(pools, old_pools,
11891                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
11892                 mlx5_free(old_pools);
11893         } else {
11894                 /* First ASO flow hit allocation - starting ASO data-path. */
11895                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11896
11897                 if (ret) {
11898                         mlx5_free(pools);
11899                         return ret;
11900                 }
11901         }
11902         mng->n = resize;
11903         mng->pools = pools;
11904         return 0;
11905 }
11906
11907 /**
11908  * Create and initialize a new ASO aging pool.
11909  *
11910  * @param[in] dev
11911  *   Pointer to the Ethernet device structure.
11912  * @param[out] age_free
11913  *   Where to put the pointer of a new age action.
11914  *
11915  * @return
11916  *   The age actions pool pointer and @p age_free is set on success,
11917  *   NULL otherwise and rte_errno is set.
11918  */
11919 static struct mlx5_aso_age_pool *
11920 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11921                         struct mlx5_aso_age_action **age_free)
11922 {
11923         struct mlx5_priv *priv = dev->data->dev_private;
11924         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11925         struct mlx5_aso_age_pool *pool = NULL;
11926         struct mlx5_devx_obj *obj = NULL;
11927         uint32_t i;
11928
11929         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
11930                                                     priv->sh->pdn);
11931         if (!obj) {
11932                 rte_errno = ENODATA;
11933                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11934                 return NULL;
11935         }
11936         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11937         if (!pool) {
11938                 claim_zero(mlx5_devx_cmd_destroy(obj));
11939                 rte_errno = ENOMEM;
11940                 return NULL;
11941         }
11942         pool->flow_hit_aso_obj = obj;
11943         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11944         rte_spinlock_lock(&mng->resize_sl);
11945         pool->index = mng->next;
11946         /* Resize pools array if there is no room for the new pool in it. */
11947         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11948                 claim_zero(mlx5_devx_cmd_destroy(obj));
11949                 mlx5_free(pool);
11950                 rte_spinlock_unlock(&mng->resize_sl);
11951                 return NULL;
11952         }
11953         mng->pools[pool->index] = pool;
11954         mng->next++;
11955         rte_spinlock_unlock(&mng->resize_sl);
11956         /* Assign the first action in the new pool, the rest go to free list. */
11957         *age_free = &pool->actions[0];
11958         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11959                 pool->actions[i].offset = i;
11960                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11961         }
11962         return pool;
11963 }
11964
11965 /**
11966  * Allocate a ASO aging bit.
11967  *
11968  * @param[in] dev
11969  *   Pointer to the Ethernet device structure.
11970  * @param[out] error
11971  *   Pointer to the error structure.
11972  *
11973  * @return
11974  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
11975  */
11976 static uint32_t
11977 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11978 {
11979         struct mlx5_priv *priv = dev->data->dev_private;
11980         const struct mlx5_aso_age_pool *pool;
11981         struct mlx5_aso_age_action *age_free = NULL;
11982         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11983
11984         MLX5_ASSERT(mng);
11985         /* Try to get the next free age action bit. */
11986         rte_spinlock_lock(&mng->free_sl);
11987         age_free = LIST_FIRST(&mng->free);
11988         if (age_free) {
11989                 LIST_REMOVE(age_free, next);
11990         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11991                 rte_spinlock_unlock(&mng->free_sl);
11992                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11993                                    NULL, "failed to create ASO age pool");
11994                 return 0; /* 0 is an error. */
11995         }
11996         rte_spinlock_unlock(&mng->free_sl);
11997         pool = container_of
11998           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
11999                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12000                                                                        actions);
12001         if (!age_free->dr_action) {
12002                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12003                                                  error);
12004
12005                 if (reg_c < 0) {
12006                         rte_flow_error_set(error, rte_errno,
12007                                            RTE_FLOW_ERROR_TYPE_ACTION,
12008                                            NULL, "failed to get reg_c "
12009                                            "for ASO flow hit");
12010                         return 0; /* 0 is an error. */
12011                 }
12012 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12013                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12014                                 (priv->sh->rx_domain,
12015                                  pool->flow_hit_aso_obj->obj, age_free->offset,
12016                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12017                                  (reg_c - REG_C_0));
12018 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12019                 if (!age_free->dr_action) {
12020                         rte_errno = errno;
12021                         rte_spinlock_lock(&mng->free_sl);
12022                         LIST_INSERT_HEAD(&mng->free, age_free, next);
12023                         rte_spinlock_unlock(&mng->free_sl);
12024                         rte_flow_error_set(error, rte_errno,
12025                                            RTE_FLOW_ERROR_TYPE_ACTION,
12026                                            NULL, "failed to create ASO "
12027                                            "flow hit action");
12028                         return 0; /* 0 is an error. */
12029                 }
12030         }
12031         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12032         return pool->index | ((age_free->offset + 1) << 16);
12033 }
12034
12035 /**
12036  * Initialize flow ASO age parameters.
12037  *
12038  * @param[in] dev
12039  *   Pointer to rte_eth_dev structure.
12040  * @param[in] age_idx
12041  *   Index of ASO age action.
12042  * @param[in] context
12043  *   Pointer to flow counter age context.
12044  * @param[in] timeout
12045  *   Aging timeout in seconds.
12046  *
12047  */
12048 static void
12049 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12050                             uint32_t age_idx,
12051                             void *context,
12052                             uint32_t timeout)
12053 {
12054         struct mlx5_aso_age_action *aso_age;
12055
12056         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12057         MLX5_ASSERT(aso_age);
12058         aso_age->age_params.context = context;
12059         aso_age->age_params.timeout = timeout;
12060         aso_age->age_params.port_id = dev->data->port_id;
12061         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12062                          __ATOMIC_RELAXED);
12063         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12064                          __ATOMIC_RELAXED);
12065 }
12066
12067 static void
12068 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12069                                const struct rte_flow_item_integrity *value,
12070                                void *headers_m, void *headers_v)
12071 {
12072         if (mask->l4_ok) {
12073                 /* application l4_ok filter aggregates all hardware l4 filters
12074                  * therefore hw l4_checksum_ok must be implicitly added here.
12075                  */
12076                 struct rte_flow_item_integrity local_item;
12077
12078                 local_item.l4_csum_ok = 1;
12079                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12080                          local_item.l4_csum_ok);
12081                 if (value->l4_ok) {
12082                         /* application l4_ok = 1 matches sets both hw flags
12083                          * l4_ok and l4_checksum_ok flags to 1.
12084                          */
12085                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12086                                  l4_checksum_ok, local_item.l4_csum_ok);
12087                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
12088                                  mask->l4_ok);
12089                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
12090                                  value->l4_ok);
12091                 } else {
12092                         /* application l4_ok = 0 matches on hw flag
12093                          * l4_checksum_ok = 0 only.
12094                          */
12095                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12096                                  l4_checksum_ok, 0);
12097                 }
12098         } else if (mask->l4_csum_ok) {
12099                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12100                          mask->l4_csum_ok);
12101                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12102                          value->l4_csum_ok);
12103         }
12104 }
12105
12106 static void
12107 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12108                                const struct rte_flow_item_integrity *value,
12109                                void *headers_m, void *headers_v,
12110                                bool is_ipv4)
12111 {
12112         if (mask->l3_ok) {
12113                 /* application l3_ok filter aggregates all hardware l3 filters
12114                  * therefore hw ipv4_checksum_ok must be implicitly added here.
12115                  */
12116                 struct rte_flow_item_integrity local_item;
12117
12118                 local_item.ipv4_csum_ok = !!is_ipv4;
12119                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12120                          local_item.ipv4_csum_ok);
12121                 if (value->l3_ok) {
12122                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12123                                  ipv4_checksum_ok, local_item.ipv4_csum_ok);
12124                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
12125                                  mask->l3_ok);
12126                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12127                                  value->l3_ok);
12128                 } else {
12129                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12130                                  ipv4_checksum_ok, 0);
12131                 }
12132         } else if (mask->ipv4_csum_ok) {
12133                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12134                          mask->ipv4_csum_ok);
12135                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12136                          value->ipv4_csum_ok);
12137         }
12138 }
12139
12140 static void
12141 flow_dv_translate_item_integrity(void *matcher, void *key,
12142                                  const struct rte_flow_item *head_item,
12143                                  const struct rte_flow_item *integrity_item)
12144 {
12145         const struct rte_flow_item_integrity *mask = integrity_item->mask;
12146         const struct rte_flow_item_integrity *value = integrity_item->spec;
12147         const struct rte_flow_item *tunnel_item, *end_item, *item;
12148         void *headers_m;
12149         void *headers_v;
12150         uint32_t l3_protocol;
12151
12152         if (!value)
12153                 return;
12154         if (!mask)
12155                 mask = &rte_flow_item_integrity_mask;
12156         if (value->level > 1) {
12157                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12158                                          inner_headers);
12159                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12160         } else {
12161                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12162                                          outer_headers);
12163                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12164         }
12165         tunnel_item = mlx5_flow_find_tunnel_item(head_item);
12166         if (value->level > 1) {
12167                 /* tunnel item was verified during the item validation */
12168                 item = tunnel_item;
12169                 end_item = mlx5_find_end_item(tunnel_item);
12170         } else {
12171                 item = head_item;
12172                 end_item = tunnel_item ? tunnel_item :
12173                            mlx5_find_end_item(integrity_item);
12174         }
12175         l3_protocol = mask->l3_ok ?
12176                       mlx5_flow_locate_proto_l3(&item, end_item) : 0;
12177         flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
12178                                        l3_protocol == RTE_ETHER_TYPE_IPV4);
12179         flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
12180 }
12181
12182 /**
12183  * Prepares DV flow counter with aging configuration.
12184  * Gets it by index when exists, creates a new one when doesn't.
12185  *
12186  * @param[in] dev
12187  *   Pointer to rte_eth_dev structure.
12188  * @param[in] dev_flow
12189  *   Pointer to the mlx5_flow.
12190  * @param[in, out] flow
12191  *   Pointer to the sub flow.
12192  * @param[in] count
12193  *   Pointer to the counter action configuration.
12194  * @param[in] age
12195  *   Pointer to the aging action configuration.
12196  * @param[out] error
12197  *   Pointer to the error structure.
12198  *
12199  * @return
12200  *   Pointer to the counter, NULL otherwise.
12201  */
12202 static struct mlx5_flow_counter *
12203 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12204                         struct mlx5_flow *dev_flow,
12205                         struct rte_flow *flow,
12206                         const struct rte_flow_action_count *count,
12207                         const struct rte_flow_action_age *age,
12208                         struct rte_flow_error *error)
12209 {
12210         if (!flow->counter) {
12211                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12212                                                                  count, age);
12213                 if (!flow->counter) {
12214                         rte_flow_error_set(error, rte_errno,
12215                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12216                                            "cannot create counter object.");
12217                         return NULL;
12218                 }
12219         }
12220         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12221 }
12222
12223 /*
12224  * Release an ASO CT action by its own device.
12225  *
12226  * @param[in] dev
12227  *   Pointer to the Ethernet device structure.
12228  * @param[in] idx
12229  *   Index of ASO CT action to release.
12230  *
12231  * @return
12232  *   0 when CT action was removed, otherwise the number of references.
12233  */
12234 static inline int
12235 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12236 {
12237         struct mlx5_priv *priv = dev->data->dev_private;
12238         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12239         uint32_t ret;
12240         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12241         enum mlx5_aso_ct_state state =
12242                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12243
12244         /* Cannot release when CT is in the ASO SQ. */
12245         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12246                 return -1;
12247         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12248         if (!ret) {
12249                 if (ct->dr_action_orig) {
12250 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12251                         claim_zero(mlx5_glue->destroy_flow_action
12252                                         (ct->dr_action_orig));
12253 #endif
12254                         ct->dr_action_orig = NULL;
12255                 }
12256                 if (ct->dr_action_rply) {
12257 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12258                         claim_zero(mlx5_glue->destroy_flow_action
12259                                         (ct->dr_action_rply));
12260 #endif
12261                         ct->dr_action_rply = NULL;
12262                 }
12263                 /* Clear the state to free, no need in 1st allocation. */
12264                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12265                 rte_spinlock_lock(&mng->ct_sl);
12266                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12267                 rte_spinlock_unlock(&mng->ct_sl);
12268         }
12269         return (int)ret;
12270 }
12271
12272 static inline int
12273 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx)
12274 {
12275         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12276         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12277         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12278         RTE_SET_USED(dev);
12279
12280         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12281         if (dev->data->dev_started != 1)
12282                 return -1;
12283         return flow_dv_aso_ct_dev_release(owndev, idx);
12284 }
12285
12286 /*
12287  * Resize the ASO CT pools array by 64 pools.
12288  *
12289  * @param[in] dev
12290  *   Pointer to the Ethernet device structure.
12291  *
12292  * @return
12293  *   0 on success, otherwise negative errno value and rte_errno is set.
12294  */
12295 static int
12296 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12297 {
12298         struct mlx5_priv *priv = dev->data->dev_private;
12299         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12300         void *old_pools = mng->pools;
12301         /* Magic number now, need a macro. */
12302         uint32_t resize = mng->n + 64;
12303         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12304         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12305
12306         if (!pools) {
12307                 rte_errno = ENOMEM;
12308                 return -rte_errno;
12309         }
12310         rte_rwlock_write_lock(&mng->resize_rwl);
12311         /* ASO SQ/QP was already initialized in the startup. */
12312         if (old_pools) {
12313                 /* Realloc could be an alternative choice. */
12314                 rte_memcpy(pools, old_pools,
12315                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
12316                 mlx5_free(old_pools);
12317         }
12318         mng->n = resize;
12319         mng->pools = pools;
12320         rte_rwlock_write_unlock(&mng->resize_rwl);
12321         return 0;
12322 }
12323
12324 /*
12325  * Create and initialize a new ASO CT pool.
12326  *
12327  * @param[in] dev
12328  *   Pointer to the Ethernet device structure.
12329  * @param[out] ct_free
12330  *   Where to put the pointer of a new CT action.
12331  *
12332  * @return
12333  *   The CT actions pool pointer and @p ct_free is set on success,
12334  *   NULL otherwise and rte_errno is set.
12335  */
12336 static struct mlx5_aso_ct_pool *
12337 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12338                        struct mlx5_aso_ct_action **ct_free)
12339 {
12340         struct mlx5_priv *priv = dev->data->dev_private;
12341         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12342         struct mlx5_aso_ct_pool *pool = NULL;
12343         struct mlx5_devx_obj *obj = NULL;
12344         uint32_t i;
12345         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12346
12347         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->ctx,
12348                                                 priv->sh->pdn, log_obj_size);
12349         if (!obj) {
12350                 rte_errno = ENODATA;
12351                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12352                 return NULL;
12353         }
12354         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12355         if (!pool) {
12356                 rte_errno = ENOMEM;
12357                 claim_zero(mlx5_devx_cmd_destroy(obj));
12358                 return NULL;
12359         }
12360         pool->devx_obj = obj;
12361         pool->index = mng->next;
12362         /* Resize pools array if there is no room for the new pool in it. */
12363         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12364                 claim_zero(mlx5_devx_cmd_destroy(obj));
12365                 mlx5_free(pool);
12366                 return NULL;
12367         }
12368         mng->pools[pool->index] = pool;
12369         mng->next++;
12370         /* Assign the first action in the new pool, the rest go to free list. */
12371         *ct_free = &pool->actions[0];
12372         /* Lock outside, the list operation is safe here. */
12373         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12374                 /* refcnt is 0 when allocating the memory. */
12375                 pool->actions[i].offset = i;
12376                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12377         }
12378         return pool;
12379 }
12380
12381 /*
12382  * Allocate a ASO CT action from free list.
12383  *
12384  * @param[in] dev
12385  *   Pointer to the Ethernet device structure.
12386  * @param[out] error
12387  *   Pointer to the error structure.
12388  *
12389  * @return
12390  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12391  */
12392 static uint32_t
12393 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12394 {
12395         struct mlx5_priv *priv = dev->data->dev_private;
12396         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12397         struct mlx5_aso_ct_action *ct = NULL;
12398         struct mlx5_aso_ct_pool *pool;
12399         uint8_t reg_c;
12400         uint32_t ct_idx;
12401
12402         MLX5_ASSERT(mng);
12403         if (!priv->config.devx) {
12404                 rte_errno = ENOTSUP;
12405                 return 0;
12406         }
12407         /* Get a free CT action, if no, a new pool will be created. */
12408         rte_spinlock_lock(&mng->ct_sl);
12409         ct = LIST_FIRST(&mng->free_cts);
12410         if (ct) {
12411                 LIST_REMOVE(ct, next);
12412         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12413                 rte_spinlock_unlock(&mng->ct_sl);
12414                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12415                                    NULL, "failed to create ASO CT pool");
12416                 return 0;
12417         }
12418         rte_spinlock_unlock(&mng->ct_sl);
12419         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12420         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12421         /* 0: inactive, 1: created, 2+: used by flows. */
12422         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12423         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12424         if (!ct->dr_action_orig) {
12425 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12426                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12427                         (priv->sh->rx_domain, pool->devx_obj->obj,
12428                          ct->offset,
12429                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12430                          reg_c - REG_C_0);
12431 #else
12432                 RTE_SET_USED(reg_c);
12433 #endif
12434                 if (!ct->dr_action_orig) {
12435                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12436                         rte_flow_error_set(error, rte_errno,
12437                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12438                                            "failed to create ASO CT action");
12439                         return 0;
12440                 }
12441         }
12442         if (!ct->dr_action_rply) {
12443 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12444                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12445                         (priv->sh->rx_domain, pool->devx_obj->obj,
12446                          ct->offset,
12447                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12448                          reg_c - REG_C_0);
12449 #endif
12450                 if (!ct->dr_action_rply) {
12451                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12452                         rte_flow_error_set(error, rte_errno,
12453                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12454                                            "failed to create ASO CT action");
12455                         return 0;
12456                 }
12457         }
12458         return ct_idx;
12459 }
12460
12461 /*
12462  * Create a conntrack object with context and actions by using ASO mechanism.
12463  *
12464  * @param[in] dev
12465  *   Pointer to rte_eth_dev structure.
12466  * @param[in] pro
12467  *   Pointer to conntrack information profile.
12468  * @param[out] error
12469  *   Pointer to the error structure.
12470  *
12471  * @return
12472  *   Index to conntrack object on success, 0 otherwise.
12473  */
12474 static uint32_t
12475 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12476                                    const struct rte_flow_action_conntrack *pro,
12477                                    struct rte_flow_error *error)
12478 {
12479         struct mlx5_priv *priv = dev->data->dev_private;
12480         struct mlx5_dev_ctx_shared *sh = priv->sh;
12481         struct mlx5_aso_ct_action *ct;
12482         uint32_t idx;
12483
12484         if (!sh->ct_aso_en)
12485                 return rte_flow_error_set(error, ENOTSUP,
12486                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12487                                           "Connection is not supported");
12488         idx = flow_dv_aso_ct_alloc(dev, error);
12489         if (!idx)
12490                 return rte_flow_error_set(error, rte_errno,
12491                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12492                                           "Failed to allocate CT object");
12493         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12494         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12495                 return rte_flow_error_set(error, EBUSY,
12496                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12497                                           "Failed to update CT");
12498         ct->is_original = !!pro->is_original_dir;
12499         ct->peer = pro->peer_port;
12500         return idx;
12501 }
12502
12503 /**
12504  * Fill the flow with DV spec, lock free
12505  * (mutex should be acquired by caller).
12506  *
12507  * @param[in] dev
12508  *   Pointer to rte_eth_dev structure.
12509  * @param[in, out] dev_flow
12510  *   Pointer to the sub flow.
12511  * @param[in] attr
12512  *   Pointer to the flow attributes.
12513  * @param[in] items
12514  *   Pointer to the list of items.
12515  * @param[in] actions
12516  *   Pointer to the list of actions.
12517  * @param[out] error
12518  *   Pointer to the error structure.
12519  *
12520  * @return
12521  *   0 on success, a negative errno value otherwise and rte_errno is set.
12522  */
12523 static int
12524 flow_dv_translate(struct rte_eth_dev *dev,
12525                   struct mlx5_flow *dev_flow,
12526                   const struct rte_flow_attr *attr,
12527                   const struct rte_flow_item items[],
12528                   const struct rte_flow_action actions[],
12529                   struct rte_flow_error *error)
12530 {
12531         struct mlx5_priv *priv = dev->data->dev_private;
12532         struct mlx5_dev_config *dev_conf = &priv->config;
12533         struct rte_flow *flow = dev_flow->flow;
12534         struct mlx5_flow_handle *handle = dev_flow->handle;
12535         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12536         struct mlx5_flow_rss_desc *rss_desc;
12537         uint64_t item_flags = 0;
12538         uint64_t last_item = 0;
12539         uint64_t action_flags = 0;
12540         struct mlx5_flow_dv_matcher matcher = {
12541                 .mask = {
12542                         .size = sizeof(matcher.mask.buf),
12543                 },
12544         };
12545         int actions_n = 0;
12546         bool actions_end = false;
12547         union {
12548                 struct mlx5_flow_dv_modify_hdr_resource res;
12549                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12550                             sizeof(struct mlx5_modification_cmd) *
12551                             (MLX5_MAX_MODIFY_NUM + 1)];
12552         } mhdr_dummy;
12553         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12554         const struct rte_flow_action_count *count = NULL;
12555         const struct rte_flow_action_age *non_shared_age = NULL;
12556         union flow_dv_attr flow_attr = { .attr = 0 };
12557         uint32_t tag_be;
12558         union mlx5_flow_tbl_key tbl_key;
12559         uint32_t modify_action_position = UINT32_MAX;
12560         void *match_mask = matcher.mask.buf;
12561         void *match_value = dev_flow->dv.value.buf;
12562         uint8_t next_protocol = 0xff;
12563         struct rte_vlan_hdr vlan = { 0 };
12564         struct mlx5_flow_dv_dest_array_resource mdest_res;
12565         struct mlx5_flow_dv_sample_resource sample_res;
12566         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12567         const struct rte_flow_action_sample *sample = NULL;
12568         struct mlx5_flow_sub_actions_list *sample_act;
12569         uint32_t sample_act_pos = UINT32_MAX;
12570         uint32_t age_act_pos = UINT32_MAX;
12571         uint32_t num_of_dest = 0;
12572         int tmp_actions_n = 0;
12573         uint32_t table;
12574         int ret = 0;
12575         const struct mlx5_flow_tunnel *tunnel = NULL;
12576         struct flow_grp_info grp_info = {
12577                 .external = !!dev_flow->external,
12578                 .transfer = !!attr->transfer,
12579                 .fdb_def_rule = !!priv->fdb_def_rule,
12580                 .skip_scale = dev_flow->skip_scale &
12581                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12582                 .std_tbl_fix = true,
12583         };
12584         const struct rte_flow_item *head_item = items;
12585
12586         if (!wks)
12587                 return rte_flow_error_set(error, ENOMEM,
12588                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12589                                           NULL,
12590                                           "failed to push flow workspace");
12591         rss_desc = &wks->rss_desc;
12592         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12593         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12594         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12595                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12596         /* update normal path action resource into last index of array */
12597         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12598         if (is_tunnel_offload_active(dev)) {
12599                 if (dev_flow->tunnel) {
12600                         RTE_VERIFY(dev_flow->tof_type ==
12601                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12602                         tunnel = dev_flow->tunnel;
12603                 } else {
12604                         tunnel = mlx5_get_tof(items, actions,
12605                                               &dev_flow->tof_type);
12606                         dev_flow->tunnel = tunnel;
12607                 }
12608                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12609                                         (dev, attr, tunnel, dev_flow->tof_type);
12610         }
12611         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12612                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12613         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12614                                        &grp_info, error);
12615         if (ret)
12616                 return ret;
12617         dev_flow->dv.group = table;
12618         if (attr->transfer)
12619                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12620         /* number of actions must be set to 0 in case of dirty stack. */
12621         mhdr_res->actions_num = 0;
12622         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12623                 /*
12624                  * do not add decap action if match rule drops packet
12625                  * HW rejects rules with decap & drop
12626                  *
12627                  * if tunnel match rule was inserted before matching tunnel set
12628                  * rule flow table used in the match rule must be registered.
12629                  * current implementation handles that in the
12630                  * flow_dv_match_register() at the function end.
12631                  */
12632                 bool add_decap = true;
12633                 const struct rte_flow_action *ptr = actions;
12634
12635                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12636                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12637                                 add_decap = false;
12638                                 break;
12639                         }
12640                 }
12641                 if (add_decap) {
12642                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12643                                                            attr->transfer,
12644                                                            error))
12645                                 return -rte_errno;
12646                         dev_flow->dv.actions[actions_n++] =
12647                                         dev_flow->dv.encap_decap->action;
12648                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12649                 }
12650         }
12651         for (; !actions_end ; actions++) {
12652                 const struct rte_flow_action_queue *queue;
12653                 const struct rte_flow_action_rss *rss;
12654                 const struct rte_flow_action *action = actions;
12655                 const uint8_t *rss_key;
12656                 struct mlx5_flow_tbl_resource *tbl;
12657                 struct mlx5_aso_age_action *age_act;
12658                 struct mlx5_flow_counter *cnt_act;
12659                 uint32_t port_id = 0;
12660                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12661                 int action_type = actions->type;
12662                 const struct rte_flow_action *found_action = NULL;
12663                 uint32_t jump_group = 0;
12664                 uint32_t owner_idx;
12665                 struct mlx5_aso_ct_action *ct;
12666
12667                 if (!mlx5_flow_os_action_supported(action_type))
12668                         return rte_flow_error_set(error, ENOTSUP,
12669                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12670                                                   actions,
12671                                                   "action not supported");
12672                 switch (action_type) {
12673                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12674                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12675                         break;
12676                 case RTE_FLOW_ACTION_TYPE_VOID:
12677                         break;
12678                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12679                         if (flow_dv_translate_action_port_id(dev, action,
12680                                                              &port_id, error))
12681                                 return -rte_errno;
12682                         port_id_resource.port_id = port_id;
12683                         MLX5_ASSERT(!handle->rix_port_id_action);
12684                         if (flow_dv_port_id_action_resource_register
12685                             (dev, &port_id_resource, dev_flow, error))
12686                                 return -rte_errno;
12687                         dev_flow->dv.actions[actions_n++] =
12688                                         dev_flow->dv.port_id_action->action;
12689                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12690                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12691                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12692                         num_of_dest++;
12693                         break;
12694                 case RTE_FLOW_ACTION_TYPE_FLAG:
12695                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12696                         dev_flow->handle->mark = 1;
12697                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12698                                 struct rte_flow_action_mark mark = {
12699                                         .id = MLX5_FLOW_MARK_DEFAULT,
12700                                 };
12701
12702                                 if (flow_dv_convert_action_mark(dev, &mark,
12703                                                                 mhdr_res,
12704                                                                 error))
12705                                         return -rte_errno;
12706                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12707                                 break;
12708                         }
12709                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12710                         /*
12711                          * Only one FLAG or MARK is supported per device flow
12712                          * right now. So the pointer to the tag resource must be
12713                          * zero before the register process.
12714                          */
12715                         MLX5_ASSERT(!handle->dvh.rix_tag);
12716                         if (flow_dv_tag_resource_register(dev, tag_be,
12717                                                           dev_flow, error))
12718                                 return -rte_errno;
12719                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12720                         dev_flow->dv.actions[actions_n++] =
12721                                         dev_flow->dv.tag_resource->action;
12722                         break;
12723                 case RTE_FLOW_ACTION_TYPE_MARK:
12724                         action_flags |= MLX5_FLOW_ACTION_MARK;
12725                         dev_flow->handle->mark = 1;
12726                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12727                                 const struct rte_flow_action_mark *mark =
12728                                         (const struct rte_flow_action_mark *)
12729                                                 actions->conf;
12730
12731                                 if (flow_dv_convert_action_mark(dev, mark,
12732                                                                 mhdr_res,
12733                                                                 error))
12734                                         return -rte_errno;
12735                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12736                                 break;
12737                         }
12738                         /* Fall-through */
12739                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12740                         /* Legacy (non-extensive) MARK action. */
12741                         tag_be = mlx5_flow_mark_set
12742                               (((const struct rte_flow_action_mark *)
12743                                (actions->conf))->id);
12744                         MLX5_ASSERT(!handle->dvh.rix_tag);
12745                         if (flow_dv_tag_resource_register(dev, tag_be,
12746                                                           dev_flow, error))
12747                                 return -rte_errno;
12748                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12749                         dev_flow->dv.actions[actions_n++] =
12750                                         dev_flow->dv.tag_resource->action;
12751                         break;
12752                 case RTE_FLOW_ACTION_TYPE_SET_META:
12753                         if (flow_dv_convert_action_set_meta
12754                                 (dev, mhdr_res, attr,
12755                                  (const struct rte_flow_action_set_meta *)
12756                                   actions->conf, error))
12757                                 return -rte_errno;
12758                         action_flags |= MLX5_FLOW_ACTION_SET_META;
12759                         break;
12760                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12761                         if (flow_dv_convert_action_set_tag
12762                                 (dev, mhdr_res,
12763                                  (const struct rte_flow_action_set_tag *)
12764                                   actions->conf, error))
12765                                 return -rte_errno;
12766                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12767                         break;
12768                 case RTE_FLOW_ACTION_TYPE_DROP:
12769                         action_flags |= MLX5_FLOW_ACTION_DROP;
12770                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12771                         break;
12772                 case RTE_FLOW_ACTION_TYPE_QUEUE:
12773                         queue = actions->conf;
12774                         rss_desc->queue_num = 1;
12775                         rss_desc->queue[0] = queue->index;
12776                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
12777                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12778                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12779                         num_of_dest++;
12780                         break;
12781                 case RTE_FLOW_ACTION_TYPE_RSS:
12782                         rss = actions->conf;
12783                         memcpy(rss_desc->queue, rss->queue,
12784                                rss->queue_num * sizeof(uint16_t));
12785                         rss_desc->queue_num = rss->queue_num;
12786                         /* NULL RSS key indicates default RSS key. */
12787                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
12788                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12789                         /*
12790                          * rss->level and rss.types should be set in advance
12791                          * when expanding items for RSS.
12792                          */
12793                         action_flags |= MLX5_FLOW_ACTION_RSS;
12794                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
12795                                 MLX5_FLOW_FATE_SHARED_RSS :
12796                                 MLX5_FLOW_FATE_QUEUE;
12797                         break;
12798                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12799                         flow->age = (uint32_t)(uintptr_t)(action->conf);
12800                         age_act = flow_aso_age_get_by_idx(dev, flow->age);
12801                         __atomic_fetch_add(&age_act->refcnt, 1,
12802                                            __ATOMIC_RELAXED);
12803                         age_act_pos = actions_n++;
12804                         action_flags |= MLX5_FLOW_ACTION_AGE;
12805                         break;
12806                 case RTE_FLOW_ACTION_TYPE_AGE:
12807                         non_shared_age = action->conf;
12808                         age_act_pos = actions_n++;
12809                         action_flags |= MLX5_FLOW_ACTION_AGE;
12810                         break;
12811                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12812                         flow->counter = (uint32_t)(uintptr_t)(action->conf);
12813                         cnt_act = flow_dv_counter_get_by_idx(dev, flow->counter,
12814                                                              NULL);
12815                         __atomic_fetch_add(&cnt_act->shared_info.refcnt, 1,
12816                                            __ATOMIC_RELAXED);
12817                         /* Save information first, will apply later. */
12818                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12819                         break;
12820                 case RTE_FLOW_ACTION_TYPE_COUNT:
12821                         if (!dev_conf->devx) {
12822                                 return rte_flow_error_set
12823                                               (error, ENOTSUP,
12824                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12825                                                NULL,
12826                                                "count action not supported");
12827                         }
12828                         /* Save information first, will apply later. */
12829                         count = action->conf;
12830                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12831                         break;
12832                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12833                         dev_flow->dv.actions[actions_n++] =
12834                                                 priv->sh->pop_vlan_action;
12835                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12836                         break;
12837                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12838                         if (!(action_flags &
12839                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12840                                 flow_dev_get_vlan_info_from_items(items, &vlan);
12841                         vlan.eth_proto = rte_be_to_cpu_16
12842                              ((((const struct rte_flow_action_of_push_vlan *)
12843                                                    actions->conf)->ethertype));
12844                         found_action = mlx5_flow_find_action
12845                                         (actions + 1,
12846                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12847                         if (found_action)
12848                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12849                         found_action = mlx5_flow_find_action
12850                                         (actions + 1,
12851                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12852                         if (found_action)
12853                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12854                         if (flow_dv_create_action_push_vlan
12855                                             (dev, attr, &vlan, dev_flow, error))
12856                                 return -rte_errno;
12857                         dev_flow->dv.actions[actions_n++] =
12858                                         dev_flow->dv.push_vlan_res->action;
12859                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12860                         break;
12861                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12862                         /* of_vlan_push action handled this action */
12863                         MLX5_ASSERT(action_flags &
12864                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12865                         break;
12866                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12867                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12868                                 break;
12869                         flow_dev_get_vlan_info_from_items(items, &vlan);
12870                         mlx5_update_vlan_vid_pcp(actions, &vlan);
12871                         /* If no VLAN push - this is a modify header action */
12872                         if (flow_dv_convert_action_modify_vlan_vid
12873                                                 (mhdr_res, actions, error))
12874                                 return -rte_errno;
12875                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12876                         break;
12877                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12878                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12879                         if (flow_dv_create_action_l2_encap(dev, actions,
12880                                                            dev_flow,
12881                                                            attr->transfer,
12882                                                            error))
12883                                 return -rte_errno;
12884                         dev_flow->dv.actions[actions_n++] =
12885                                         dev_flow->dv.encap_decap->action;
12886                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12887                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12888                                 sample_act->action_flags |=
12889                                                         MLX5_FLOW_ACTION_ENCAP;
12890                         break;
12891                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12892                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12893                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12894                                                            attr->transfer,
12895                                                            error))
12896                                 return -rte_errno;
12897                         dev_flow->dv.actions[actions_n++] =
12898                                         dev_flow->dv.encap_decap->action;
12899                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12900                         break;
12901                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12902                         /* Handle encap with preceding decap. */
12903                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12904                                 if (flow_dv_create_action_raw_encap
12905                                         (dev, actions, dev_flow, attr, error))
12906                                         return -rte_errno;
12907                                 dev_flow->dv.actions[actions_n++] =
12908                                         dev_flow->dv.encap_decap->action;
12909                         } else {
12910                                 /* Handle encap without preceding decap. */
12911                                 if (flow_dv_create_action_l2_encap
12912                                     (dev, actions, dev_flow, attr->transfer,
12913                                      error))
12914                                         return -rte_errno;
12915                                 dev_flow->dv.actions[actions_n++] =
12916                                         dev_flow->dv.encap_decap->action;
12917                         }
12918                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12919                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12920                                 sample_act->action_flags |=
12921                                                         MLX5_FLOW_ACTION_ENCAP;
12922                         break;
12923                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12924                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12925                                 ;
12926                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12927                                 if (flow_dv_create_action_l2_decap
12928                                     (dev, dev_flow, attr->transfer, error))
12929                                         return -rte_errno;
12930                                 dev_flow->dv.actions[actions_n++] =
12931                                         dev_flow->dv.encap_decap->action;
12932                         }
12933                         /* If decap is followed by encap, handle it at encap. */
12934                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12935                         break;
12936                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12937                         dev_flow->dv.actions[actions_n++] =
12938                                 (void *)(uintptr_t)action->conf;
12939                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12940                         break;
12941                 case RTE_FLOW_ACTION_TYPE_JUMP:
12942                         jump_group = ((const struct rte_flow_action_jump *)
12943                                                         action->conf)->group;
12944                         grp_info.std_tbl_fix = 0;
12945                         if (dev_flow->skip_scale &
12946                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12947                                 grp_info.skip_scale = 1;
12948                         else
12949                                 grp_info.skip_scale = 0;
12950                         ret = mlx5_flow_group_to_table(dev, tunnel,
12951                                                        jump_group,
12952                                                        &table,
12953                                                        &grp_info, error);
12954                         if (ret)
12955                                 return ret;
12956                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12957                                                        attr->transfer,
12958                                                        !!dev_flow->external,
12959                                                        tunnel, jump_group, 0,
12960                                                        0, error);
12961                         if (!tbl)
12962                                 return rte_flow_error_set
12963                                                 (error, errno,
12964                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12965                                                  NULL,
12966                                                  "cannot create jump action.");
12967                         if (flow_dv_jump_tbl_resource_register
12968                             (dev, tbl, dev_flow, error)) {
12969                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12970                                 return rte_flow_error_set
12971                                                 (error, errno,
12972                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12973                                                  NULL,
12974                                                  "cannot create jump action.");
12975                         }
12976                         dev_flow->dv.actions[actions_n++] =
12977                                         dev_flow->dv.jump->action;
12978                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12979                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12980                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12981                         num_of_dest++;
12982                         break;
12983                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12984                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12985                         if (flow_dv_convert_action_modify_mac
12986                                         (mhdr_res, actions, error))
12987                                 return -rte_errno;
12988                         action_flags |= actions->type ==
12989                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12990                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
12991                                         MLX5_FLOW_ACTION_SET_MAC_DST;
12992                         break;
12993                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
12994                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
12995                         if (flow_dv_convert_action_modify_ipv4
12996                                         (mhdr_res, actions, error))
12997                                 return -rte_errno;
12998                         action_flags |= actions->type ==
12999                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13000                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
13001                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
13002                         break;
13003                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13004                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13005                         if (flow_dv_convert_action_modify_ipv6
13006                                         (mhdr_res, actions, error))
13007                                 return -rte_errno;
13008                         action_flags |= actions->type ==
13009                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13010                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
13011                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
13012                         break;
13013                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13014                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13015                         if (flow_dv_convert_action_modify_tp
13016                                         (mhdr_res, actions, items,
13017                                          &flow_attr, dev_flow, !!(action_flags &
13018                                          MLX5_FLOW_ACTION_DECAP), error))
13019                                 return -rte_errno;
13020                         action_flags |= actions->type ==
13021                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13022                                         MLX5_FLOW_ACTION_SET_TP_SRC :
13023                                         MLX5_FLOW_ACTION_SET_TP_DST;
13024                         break;
13025                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13026                         if (flow_dv_convert_action_modify_dec_ttl
13027                                         (mhdr_res, items, &flow_attr, dev_flow,
13028                                          !!(action_flags &
13029                                          MLX5_FLOW_ACTION_DECAP), error))
13030                                 return -rte_errno;
13031                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13032                         break;
13033                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13034                         if (flow_dv_convert_action_modify_ttl
13035                                         (mhdr_res, actions, items, &flow_attr,
13036                                          dev_flow, !!(action_flags &
13037                                          MLX5_FLOW_ACTION_DECAP), error))
13038                                 return -rte_errno;
13039                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13040                         break;
13041                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13042                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13043                         if (flow_dv_convert_action_modify_tcp_seq
13044                                         (mhdr_res, actions, error))
13045                                 return -rte_errno;
13046                         action_flags |= actions->type ==
13047                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13048                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
13049                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13050                         break;
13051
13052                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13053                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13054                         if (flow_dv_convert_action_modify_tcp_ack
13055                                         (mhdr_res, actions, error))
13056                                 return -rte_errno;
13057                         action_flags |= actions->type ==
13058                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13059                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
13060                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
13061                         break;
13062                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13063                         if (flow_dv_convert_action_set_reg
13064                                         (mhdr_res, actions, error))
13065                                 return -rte_errno;
13066                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13067                         break;
13068                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13069                         if (flow_dv_convert_action_copy_mreg
13070                                         (dev, mhdr_res, actions, error))
13071                                 return -rte_errno;
13072                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13073                         break;
13074                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13075                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13076                         dev_flow->handle->fate_action =
13077                                         MLX5_FLOW_FATE_DEFAULT_MISS;
13078                         break;
13079                 case RTE_FLOW_ACTION_TYPE_METER:
13080                         if (!wks->fm)
13081                                 return rte_flow_error_set(error, rte_errno,
13082                                         RTE_FLOW_ERROR_TYPE_ACTION,
13083                                         NULL, "Failed to get meter in flow.");
13084                         /* Set the meter action. */
13085                         dev_flow->dv.actions[actions_n++] =
13086                                 wks->fm->meter_action;
13087                         action_flags |= MLX5_FLOW_ACTION_METER;
13088                         break;
13089                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13090                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13091                                                               actions, error))
13092                                 return -rte_errno;
13093                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13094                         break;
13095                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13096                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13097                                                               actions, error))
13098                                 return -rte_errno;
13099                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13100                         break;
13101                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13102                         sample_act_pos = actions_n;
13103                         sample = (const struct rte_flow_action_sample *)
13104                                  action->conf;
13105                         actions_n++;
13106                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13107                         /* put encap action into group if work with port id */
13108                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13109                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13110                                 sample_act->action_flags |=
13111                                                         MLX5_FLOW_ACTION_ENCAP;
13112                         break;
13113                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13114                         if (flow_dv_convert_action_modify_field
13115                                         (dev, mhdr_res, actions, attr, error))
13116                                 return -rte_errno;
13117                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13118                         break;
13119                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13120                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13121                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13122                         if (!ct)
13123                                 return rte_flow_error_set(error, EINVAL,
13124                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13125                                                 NULL,
13126                                                 "Failed to get CT object.");
13127                         if (mlx5_aso_ct_available(priv->sh, ct))
13128                                 return rte_flow_error_set(error, rte_errno,
13129                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13130                                                 NULL,
13131                                                 "CT is unavailable.");
13132                         if (ct->is_original)
13133                                 dev_flow->dv.actions[actions_n] =
13134                                                         ct->dr_action_orig;
13135                         else
13136                                 dev_flow->dv.actions[actions_n] =
13137                                                         ct->dr_action_rply;
13138                         flow->indirect_type = MLX5_INDIRECT_ACTION_TYPE_CT;
13139                         flow->ct = owner_idx;
13140                         __atomic_fetch_add(&ct->refcnt, 1, __ATOMIC_RELAXED);
13141                         actions_n++;
13142                         action_flags |= MLX5_FLOW_ACTION_CT;
13143                         break;
13144                 case RTE_FLOW_ACTION_TYPE_END:
13145                         actions_end = true;
13146                         if (mhdr_res->actions_num) {
13147                                 /* create modify action if needed. */
13148                                 if (flow_dv_modify_hdr_resource_register
13149                                         (dev, mhdr_res, dev_flow, error))
13150                                         return -rte_errno;
13151                                 dev_flow->dv.actions[modify_action_position] =
13152                                         handle->dvh.modify_hdr->action;
13153                         }
13154                         /*
13155                          * Handle AGE and COUNT action by single HW counter
13156                          * when they are not shared.
13157                          */
13158                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
13159                                 if ((non_shared_age &&
13160                                      count && !count->shared) ||
13161                                     !(priv->sh->flow_hit_aso_en &&
13162                                       (attr->group || attr->transfer))) {
13163                                         /* Creates age by counters. */
13164                                         cnt_act = flow_dv_prepare_counter
13165                                                                 (dev, dev_flow,
13166                                                                  flow, count,
13167                                                                  non_shared_age,
13168                                                                  error);
13169                                         if (!cnt_act)
13170                                                 return -rte_errno;
13171                                         dev_flow->dv.actions[age_act_pos] =
13172                                                                 cnt_act->action;
13173                                         break;
13174                                 }
13175                                 if (!flow->age && non_shared_age) {
13176                                         flow->age = flow_dv_aso_age_alloc
13177                                                                 (dev, error);
13178                                         if (!flow->age)
13179                                                 return -rte_errno;
13180                                         flow_dv_aso_age_params_init
13181                                                     (dev, flow->age,
13182                                                      non_shared_age->context ?
13183                                                      non_shared_age->context :
13184                                                      (void *)(uintptr_t)
13185                                                      (dev_flow->flow_idx),
13186                                                      non_shared_age->timeout);
13187                                 }
13188                                 age_act = flow_aso_age_get_by_idx(dev,
13189                                                                   flow->age);
13190                                 dev_flow->dv.actions[age_act_pos] =
13191                                                              age_act->dr_action;
13192                         }
13193                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13194                                 /*
13195                                  * Create one count action, to be used
13196                                  * by all sub-flows.
13197                                  */
13198                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13199                                                                   flow, count,
13200                                                                   NULL, error);
13201                                 if (!cnt_act)
13202                                         return -rte_errno;
13203                                 dev_flow->dv.actions[actions_n++] =
13204                                                                 cnt_act->action;
13205                         }
13206                 default:
13207                         break;
13208                 }
13209                 if (mhdr_res->actions_num &&
13210                     modify_action_position == UINT32_MAX)
13211                         modify_action_position = actions_n++;
13212         }
13213         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13214                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13215                 int item_type = items->type;
13216
13217                 if (!mlx5_flow_os_item_supported(item_type))
13218                         return rte_flow_error_set(error, ENOTSUP,
13219                                                   RTE_FLOW_ERROR_TYPE_ITEM,
13220                                                   NULL, "item not supported");
13221                 switch (item_type) {
13222                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13223                         flow_dv_translate_item_port_id
13224                                 (dev, match_mask, match_value, items, attr);
13225                         last_item = MLX5_FLOW_ITEM_PORT_ID;
13226                         break;
13227                 case RTE_FLOW_ITEM_TYPE_ETH:
13228                         flow_dv_translate_item_eth(match_mask, match_value,
13229                                                    items, tunnel,
13230                                                    dev_flow->dv.group);
13231                         matcher.priority = action_flags &
13232                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
13233                                         !dev_flow->external ?
13234                                         MLX5_PRIORITY_MAP_L3 :
13235                                         MLX5_PRIORITY_MAP_L2;
13236                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13237                                              MLX5_FLOW_LAYER_OUTER_L2;
13238                         break;
13239                 case RTE_FLOW_ITEM_TYPE_VLAN:
13240                         flow_dv_translate_item_vlan(dev_flow,
13241                                                     match_mask, match_value,
13242                                                     items, tunnel,
13243                                                     dev_flow->dv.group);
13244                         matcher.priority = MLX5_PRIORITY_MAP_L2;
13245                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13246                                               MLX5_FLOW_LAYER_INNER_VLAN) :
13247                                              (MLX5_FLOW_LAYER_OUTER_L2 |
13248                                               MLX5_FLOW_LAYER_OUTER_VLAN);
13249                         break;
13250                 case RTE_FLOW_ITEM_TYPE_IPV4:
13251                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13252                                                   &item_flags, &tunnel);
13253                         flow_dv_translate_item_ipv4(match_mask, match_value,
13254                                                     items, tunnel,
13255                                                     dev_flow->dv.group);
13256                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13257                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13258                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13259                         if (items->mask != NULL &&
13260                             ((const struct rte_flow_item_ipv4 *)
13261                              items->mask)->hdr.next_proto_id) {
13262                                 next_protocol =
13263                                         ((const struct rte_flow_item_ipv4 *)
13264                                          (items->spec))->hdr.next_proto_id;
13265                                 next_protocol &=
13266                                         ((const struct rte_flow_item_ipv4 *)
13267                                          (items->mask))->hdr.next_proto_id;
13268                         } else {
13269                                 /* Reset for inner layer. */
13270                                 next_protocol = 0xff;
13271                         }
13272                         break;
13273                 case RTE_FLOW_ITEM_TYPE_IPV6:
13274                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13275                                                   &item_flags, &tunnel);
13276                         flow_dv_translate_item_ipv6(match_mask, match_value,
13277                                                     items, tunnel,
13278                                                     dev_flow->dv.group);
13279                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13280                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13281                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13282                         if (items->mask != NULL &&
13283                             ((const struct rte_flow_item_ipv6 *)
13284                              items->mask)->hdr.proto) {
13285                                 next_protocol =
13286                                         ((const struct rte_flow_item_ipv6 *)
13287                                          items->spec)->hdr.proto;
13288                                 next_protocol &=
13289                                         ((const struct rte_flow_item_ipv6 *)
13290                                          items->mask)->hdr.proto;
13291                         } else {
13292                                 /* Reset for inner layer. */
13293                                 next_protocol = 0xff;
13294                         }
13295                         break;
13296                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13297                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
13298                                                              match_value,
13299                                                              items, tunnel);
13300                         last_item = tunnel ?
13301                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13302                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13303                         if (items->mask != NULL &&
13304                             ((const struct rte_flow_item_ipv6_frag_ext *)
13305                              items->mask)->hdr.next_header) {
13306                                 next_protocol =
13307                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13308                                  items->spec)->hdr.next_header;
13309                                 next_protocol &=
13310                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13311                                  items->mask)->hdr.next_header;
13312                         } else {
13313                                 /* Reset for inner layer. */
13314                                 next_protocol = 0xff;
13315                         }
13316                         break;
13317                 case RTE_FLOW_ITEM_TYPE_TCP:
13318                         flow_dv_translate_item_tcp(match_mask, match_value,
13319                                                    items, tunnel);
13320                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13321                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13322                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
13323                         break;
13324                 case RTE_FLOW_ITEM_TYPE_UDP:
13325                         flow_dv_translate_item_udp(match_mask, match_value,
13326                                                    items, tunnel);
13327                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13328                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13329                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
13330                         break;
13331                 case RTE_FLOW_ITEM_TYPE_GRE:
13332                         flow_dv_translate_item_gre(match_mask, match_value,
13333                                                    items, tunnel);
13334                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13335                         last_item = MLX5_FLOW_LAYER_GRE;
13336                         break;
13337                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13338                         flow_dv_translate_item_gre_key(match_mask,
13339                                                        match_value, items);
13340                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
13341                         break;
13342                 case RTE_FLOW_ITEM_TYPE_NVGRE:
13343                         flow_dv_translate_item_nvgre(match_mask, match_value,
13344                                                      items, tunnel);
13345                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13346                         last_item = MLX5_FLOW_LAYER_GRE;
13347                         break;
13348                 case RTE_FLOW_ITEM_TYPE_VXLAN:
13349                         flow_dv_translate_item_vxlan(dev, attr,
13350                                                      match_mask, match_value,
13351                                                      items, tunnel);
13352                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13353                         last_item = MLX5_FLOW_LAYER_VXLAN;
13354                         break;
13355                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13356                         flow_dv_translate_item_vxlan_gpe(match_mask,
13357                                                          match_value, items,
13358                                                          tunnel);
13359                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13360                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13361                         break;
13362                 case RTE_FLOW_ITEM_TYPE_GENEVE:
13363                         flow_dv_translate_item_geneve(match_mask, match_value,
13364                                                       items, tunnel);
13365                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13366                         last_item = MLX5_FLOW_LAYER_GENEVE;
13367                         break;
13368                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13369                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13370                                                           match_value,
13371                                                           items, error);
13372                         if (ret)
13373                                 return rte_flow_error_set(error, -ret,
13374                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13375                                         "cannot create GENEVE TLV option");
13376                         flow->geneve_tlv_option = 1;
13377                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13378                         break;
13379                 case RTE_FLOW_ITEM_TYPE_MPLS:
13380                         flow_dv_translate_item_mpls(match_mask, match_value,
13381                                                     items, last_item, tunnel);
13382                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13383                         last_item = MLX5_FLOW_LAYER_MPLS;
13384                         break;
13385                 case RTE_FLOW_ITEM_TYPE_MARK:
13386                         flow_dv_translate_item_mark(dev, match_mask,
13387                                                     match_value, items);
13388                         last_item = MLX5_FLOW_ITEM_MARK;
13389                         break;
13390                 case RTE_FLOW_ITEM_TYPE_META:
13391                         flow_dv_translate_item_meta(dev, match_mask,
13392                                                     match_value, attr, items);
13393                         last_item = MLX5_FLOW_ITEM_METADATA;
13394                         break;
13395                 case RTE_FLOW_ITEM_TYPE_ICMP:
13396                         flow_dv_translate_item_icmp(match_mask, match_value,
13397                                                     items, tunnel);
13398                         last_item = MLX5_FLOW_LAYER_ICMP;
13399                         break;
13400                 case RTE_FLOW_ITEM_TYPE_ICMP6:
13401                         flow_dv_translate_item_icmp6(match_mask, match_value,
13402                                                       items, tunnel);
13403                         last_item = MLX5_FLOW_LAYER_ICMP6;
13404                         break;
13405                 case RTE_FLOW_ITEM_TYPE_TAG:
13406                         flow_dv_translate_item_tag(dev, match_mask,
13407                                                    match_value, items);
13408                         last_item = MLX5_FLOW_ITEM_TAG;
13409                         break;
13410                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13411                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
13412                                                         match_value, items);
13413                         last_item = MLX5_FLOW_ITEM_TAG;
13414                         break;
13415                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13416                         flow_dv_translate_item_tx_queue(dev, match_mask,
13417                                                         match_value,
13418                                                         items);
13419                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13420                         break;
13421                 case RTE_FLOW_ITEM_TYPE_GTP:
13422                         flow_dv_translate_item_gtp(match_mask, match_value,
13423                                                    items, tunnel);
13424                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13425                         last_item = MLX5_FLOW_LAYER_GTP;
13426                         break;
13427                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13428                         ret = flow_dv_translate_item_gtp_psc(match_mask,
13429                                                           match_value,
13430                                                           items);
13431                         if (ret)
13432                                 return rte_flow_error_set(error, -ret,
13433                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13434                                         "cannot create GTP PSC item");
13435                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
13436                         break;
13437                 case RTE_FLOW_ITEM_TYPE_ECPRI:
13438                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
13439                                 /* Create it only the first time to be used. */
13440                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
13441                                 if (ret)
13442                                         return rte_flow_error_set
13443                                                 (error, -ret,
13444                                                 RTE_FLOW_ERROR_TYPE_ITEM,
13445                                                 NULL,
13446                                                 "cannot create eCPRI parser");
13447                         }
13448                         flow_dv_translate_item_ecpri(dev, match_mask,
13449                                                      match_value, items);
13450                         /* No other protocol should follow eCPRI layer. */
13451                         last_item = MLX5_FLOW_LAYER_ECPRI;
13452                         break;
13453                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13454                         flow_dv_translate_item_integrity(match_mask,
13455                                                          match_value,
13456                                                          head_item, items);
13457                         break;
13458                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13459                         flow_dv_translate_item_aso_ct(dev, match_mask,
13460                                                       match_value, items);
13461                         break;
13462                 default:
13463                         break;
13464                 }
13465                 item_flags |= last_item;
13466         }
13467         /*
13468          * When E-Switch mode is enabled, we have two cases where we need to
13469          * set the source port manually.
13470          * The first one, is in case of Nic steering rule, and the second is
13471          * E-Switch rule where no port_id item was found. In both cases
13472          * the source port is set according the current port in use.
13473          */
13474         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13475             (priv->representor || priv->master)) {
13476                 if (flow_dv_translate_item_port_id(dev, match_mask,
13477                                                    match_value, NULL, attr))
13478                         return -rte_errno;
13479         }
13480 #ifdef RTE_LIBRTE_MLX5_DEBUG
13481         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13482                                               dev_flow->dv.value.buf));
13483 #endif
13484         /*
13485          * Layers may be already initialized from prefix flow if this dev_flow
13486          * is the suffix flow.
13487          */
13488         handle->layers |= item_flags;
13489         if (action_flags & MLX5_FLOW_ACTION_RSS)
13490                 flow_dv_hashfields_set(dev_flow, rss_desc);
13491         /* If has RSS action in the sample action, the Sample/Mirror resource
13492          * should be registered after the hash filed be update.
13493          */
13494         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13495                 ret = flow_dv_translate_action_sample(dev,
13496                                                       sample,
13497                                                       dev_flow, attr,
13498                                                       &num_of_dest,
13499                                                       sample_actions,
13500                                                       &sample_res,
13501                                                       error);
13502                 if (ret < 0)
13503                         return ret;
13504                 ret = flow_dv_create_action_sample(dev,
13505                                                    dev_flow,
13506                                                    num_of_dest,
13507                                                    &sample_res,
13508                                                    &mdest_res,
13509                                                    sample_actions,
13510                                                    action_flags,
13511                                                    error);
13512                 if (ret < 0)
13513                         return rte_flow_error_set
13514                                                 (error, rte_errno,
13515                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13516                                                 NULL,
13517                                                 "cannot create sample action");
13518                 if (num_of_dest > 1) {
13519                         dev_flow->dv.actions[sample_act_pos] =
13520                         dev_flow->dv.dest_array_res->action;
13521                 } else {
13522                         dev_flow->dv.actions[sample_act_pos] =
13523                         dev_flow->dv.sample_res->verbs_action;
13524                 }
13525         }
13526         /*
13527          * For multiple destination (sample action with ratio=1), the encap
13528          * action and port id action will be combined into group action.
13529          * So need remove the original these actions in the flow and only
13530          * use the sample action instead of.
13531          */
13532         if (num_of_dest > 1 &&
13533             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13534                 int i;
13535                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13536
13537                 for (i = 0; i < actions_n; i++) {
13538                         if ((sample_act->dr_encap_action &&
13539                                 sample_act->dr_encap_action ==
13540                                 dev_flow->dv.actions[i]) ||
13541                                 (sample_act->dr_port_id_action &&
13542                                 sample_act->dr_port_id_action ==
13543                                 dev_flow->dv.actions[i]) ||
13544                                 (sample_act->dr_jump_action &&
13545                                 sample_act->dr_jump_action ==
13546                                 dev_flow->dv.actions[i]))
13547                                 continue;
13548                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13549                 }
13550                 memcpy((void *)dev_flow->dv.actions,
13551                                 (void *)temp_actions,
13552                                 tmp_actions_n * sizeof(void *));
13553                 actions_n = tmp_actions_n;
13554         }
13555         dev_flow->dv.actions_n = actions_n;
13556         dev_flow->act_flags = action_flags;
13557         if (wks->skip_matcher_reg)
13558                 return 0;
13559         /* Register matcher. */
13560         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13561                                     matcher.mask.size);
13562         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13563                                         matcher.priority);
13564         /**
13565          * When creating meter drop flow in drop table, using original
13566          * 5-tuple match, the matcher priority should be lower than
13567          * mtr_id matcher.
13568          */
13569         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13570             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13571             matcher.priority <= MLX5_REG_BITS)
13572                 matcher.priority += MLX5_REG_BITS;
13573         /* reserved field no needs to be set to 0 here. */
13574         tbl_key.is_fdb = attr->transfer;
13575         tbl_key.is_egress = attr->egress;
13576         tbl_key.level = dev_flow->dv.group;
13577         tbl_key.id = dev_flow->dv.table_id;
13578         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13579                                      tunnel, attr->group, error))
13580                 return -rte_errno;
13581         return 0;
13582 }
13583
13584 /**
13585  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13586  * and tunnel.
13587  *
13588  * @param[in, out] action
13589  *   Shred RSS action holding hash RX queue objects.
13590  * @param[in] hash_fields
13591  *   Defines combination of packet fields to participate in RX hash.
13592  * @param[in] tunnel
13593  *   Tunnel type
13594  * @param[in] hrxq_idx
13595  *   Hash RX queue index to set.
13596  *
13597  * @return
13598  *   0 on success, otherwise negative errno value.
13599  */
13600 static int
13601 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13602                               const uint64_t hash_fields,
13603                               uint32_t hrxq_idx)
13604 {
13605         uint32_t *hrxqs = action->hrxq;
13606
13607         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13608         case MLX5_RSS_HASH_IPV4:
13609                 /* fall-through. */
13610         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13611                 /* fall-through. */
13612         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13613                 hrxqs[0] = hrxq_idx;
13614                 return 0;
13615         case MLX5_RSS_HASH_IPV4_TCP:
13616                 /* fall-through. */
13617         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13618                 /* fall-through. */
13619         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13620                 hrxqs[1] = hrxq_idx;
13621                 return 0;
13622         case MLX5_RSS_HASH_IPV4_UDP:
13623                 /* fall-through. */
13624         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13625                 /* fall-through. */
13626         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13627                 hrxqs[2] = hrxq_idx;
13628                 return 0;
13629         case MLX5_RSS_HASH_IPV6:
13630                 /* fall-through. */
13631         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13632                 /* fall-through. */
13633         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13634                 hrxqs[3] = hrxq_idx;
13635                 return 0;
13636         case MLX5_RSS_HASH_IPV6_TCP:
13637                 /* fall-through. */
13638         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13639                 /* fall-through. */
13640         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13641                 hrxqs[4] = hrxq_idx;
13642                 return 0;
13643         case MLX5_RSS_HASH_IPV6_UDP:
13644                 /* fall-through. */
13645         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13646                 /* fall-through. */
13647         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13648                 hrxqs[5] = hrxq_idx;
13649                 return 0;
13650         case MLX5_RSS_HASH_NONE:
13651                 hrxqs[6] = hrxq_idx;
13652                 return 0;
13653         default:
13654                 return -1;
13655         }
13656 }
13657
13658 /**
13659  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13660  * and tunnel.
13661  *
13662  * @param[in] dev
13663  *   Pointer to the Ethernet device structure.
13664  * @param[in] idx
13665  *   Shared RSS action ID holding hash RX queue objects.
13666  * @param[in] hash_fields
13667  *   Defines combination of packet fields to participate in RX hash.
13668  * @param[in] tunnel
13669  *   Tunnel type
13670  *
13671  * @return
13672  *   Valid hash RX queue index, otherwise 0.
13673  */
13674 static uint32_t
13675 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13676                                  const uint64_t hash_fields)
13677 {
13678         struct mlx5_priv *priv = dev->data->dev_private;
13679         struct mlx5_shared_action_rss *shared_rss =
13680             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13681         const uint32_t *hrxqs = shared_rss->hrxq;
13682
13683         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13684         case MLX5_RSS_HASH_IPV4:
13685                 /* fall-through. */
13686         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13687                 /* fall-through. */
13688         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13689                 return hrxqs[0];
13690         case MLX5_RSS_HASH_IPV4_TCP:
13691                 /* fall-through. */
13692         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13693                 /* fall-through. */
13694         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13695                 return hrxqs[1];
13696         case MLX5_RSS_HASH_IPV4_UDP:
13697                 /* fall-through. */
13698         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13699                 /* fall-through. */
13700         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13701                 return hrxqs[2];
13702         case MLX5_RSS_HASH_IPV6:
13703                 /* fall-through. */
13704         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13705                 /* fall-through. */
13706         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13707                 return hrxqs[3];
13708         case MLX5_RSS_HASH_IPV6_TCP:
13709                 /* fall-through. */
13710         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13711                 /* fall-through. */
13712         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13713                 return hrxqs[4];
13714         case MLX5_RSS_HASH_IPV6_UDP:
13715                 /* fall-through. */
13716         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13717                 /* fall-through. */
13718         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13719                 return hrxqs[5];
13720         case MLX5_RSS_HASH_NONE:
13721                 return hrxqs[6];
13722         default:
13723                 return 0;
13724         }
13725
13726 }
13727
13728 /**
13729  * Apply the flow to the NIC, lock free,
13730  * (mutex should be acquired by caller).
13731  *
13732  * @param[in] dev
13733  *   Pointer to the Ethernet device structure.
13734  * @param[in, out] flow
13735  *   Pointer to flow structure.
13736  * @param[out] error
13737  *   Pointer to error structure.
13738  *
13739  * @return
13740  *   0 on success, a negative errno value otherwise and rte_errno is set.
13741  */
13742 static int
13743 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13744               struct rte_flow_error *error)
13745 {
13746         struct mlx5_flow_dv_workspace *dv;
13747         struct mlx5_flow_handle *dh;
13748         struct mlx5_flow_handle_dv *dv_h;
13749         struct mlx5_flow *dev_flow;
13750         struct mlx5_priv *priv = dev->data->dev_private;
13751         uint32_t handle_idx;
13752         int n;
13753         int err;
13754         int idx;
13755         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13756         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13757         uint8_t misc_mask;
13758
13759         MLX5_ASSERT(wks);
13760         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13761                 dev_flow = &wks->flows[idx];
13762                 dv = &dev_flow->dv;
13763                 dh = dev_flow->handle;
13764                 dv_h = &dh->dvh;
13765                 n = dv->actions_n;
13766                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13767                         if (dv->transfer) {
13768                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13769                                 dv->actions[n++] = priv->sh->dr_drop_action;
13770                         } else {
13771 #ifdef HAVE_MLX5DV_DR
13772                                 /* DR supports drop action placeholder. */
13773                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13774                                 dv->actions[n++] = priv->sh->dr_drop_action;
13775 #else
13776                                 /* For DV we use the explicit drop queue. */
13777                                 MLX5_ASSERT(priv->drop_queue.hrxq);
13778                                 dv->actions[n++] =
13779                                                 priv->drop_queue.hrxq->action;
13780 #endif
13781                         }
13782                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13783                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13784                         struct mlx5_hrxq *hrxq;
13785                         uint32_t hrxq_idx;
13786
13787                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13788                                                     &hrxq_idx);
13789                         if (!hrxq) {
13790                                 rte_flow_error_set
13791                                         (error, rte_errno,
13792                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13793                                          "cannot get hash queue");
13794                                 goto error;
13795                         }
13796                         dh->rix_hrxq = hrxq_idx;
13797                         dv->actions[n++] = hrxq->action;
13798                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13799                         struct mlx5_hrxq *hrxq = NULL;
13800                         uint32_t hrxq_idx;
13801
13802                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13803                                                 rss_desc->shared_rss,
13804                                                 dev_flow->hash_fields);
13805                         if (hrxq_idx)
13806                                 hrxq = mlx5_ipool_get
13807                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13808                                          hrxq_idx);
13809                         if (!hrxq) {
13810                                 rte_flow_error_set
13811                                         (error, rte_errno,
13812                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13813                                          "cannot get hash queue");
13814                                 goto error;
13815                         }
13816                         dh->rix_srss = rss_desc->shared_rss;
13817                         dv->actions[n++] = hrxq->action;
13818                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13819                         if (!priv->sh->default_miss_action) {
13820                                 rte_flow_error_set
13821                                         (error, rte_errno,
13822                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13823                                          "default miss action not be created.");
13824                                 goto error;
13825                         }
13826                         dv->actions[n++] = priv->sh->default_miss_action;
13827                 }
13828                 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13829                 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13830                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13831                                                (void *)&dv->value, n,
13832                                                dv->actions, &dh->drv_flow);
13833                 if (err) {
13834                         rte_flow_error_set
13835                                 (error, errno,
13836                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13837                                 NULL,
13838                                 (!priv->config.allow_duplicate_pattern &&
13839                                 errno == EEXIST) ?
13840                                 "duplicating pattern is not allowed" :
13841                                 "hardware refuses to create flow");
13842                         goto error;
13843                 }
13844                 if (priv->vmwa_context &&
13845                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
13846                         /*
13847                          * The rule contains the VLAN pattern.
13848                          * For VF we are going to create VLAN
13849                          * interface to make hypervisor set correct
13850                          * e-Switch vport context.
13851                          */
13852                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13853                 }
13854         }
13855         return 0;
13856 error:
13857         err = rte_errno; /* Save rte_errno before cleanup. */
13858         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13859                        handle_idx, dh, next) {
13860                 /* hrxq is union, don't clear it if the flag is not set. */
13861                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13862                         mlx5_hrxq_release(dev, dh->rix_hrxq);
13863                         dh->rix_hrxq = 0;
13864                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13865                         dh->rix_srss = 0;
13866                 }
13867                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13868                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13869         }
13870         rte_errno = err; /* Restore rte_errno. */
13871         return -rte_errno;
13872 }
13873
13874 void
13875 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13876                           struct mlx5_list_entry *entry)
13877 {
13878         struct mlx5_flow_dv_matcher *resource = container_of(entry,
13879                                                              typeof(*resource),
13880                                                              entry);
13881
13882         claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13883         mlx5_free(resource);
13884 }
13885
13886 /**
13887  * Release the flow matcher.
13888  *
13889  * @param dev
13890  *   Pointer to Ethernet device.
13891  * @param port_id
13892  *   Index to port ID action resource.
13893  *
13894  * @return
13895  *   1 while a reference on it exists, 0 when freed.
13896  */
13897 static int
13898 flow_dv_matcher_release(struct rte_eth_dev *dev,
13899                         struct mlx5_flow_handle *handle)
13900 {
13901         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13902         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13903                                                             typeof(*tbl), tbl);
13904         int ret;
13905
13906         MLX5_ASSERT(matcher->matcher_object);
13907         ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
13908         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13909         return ret;
13910 }
13911
13912 void
13913 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13914 {
13915         struct mlx5_dev_ctx_shared *sh = tool_ctx;
13916         struct mlx5_flow_dv_encap_decap_resource *res =
13917                                        container_of(entry, typeof(*res), entry);
13918
13919         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13920         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13921 }
13922
13923 /**
13924  * Release an encap/decap resource.
13925  *
13926  * @param dev
13927  *   Pointer to Ethernet device.
13928  * @param encap_decap_idx
13929  *   Index of encap decap resource.
13930  *
13931  * @return
13932  *   1 while a reference on it exists, 0 when freed.
13933  */
13934 static int
13935 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13936                                      uint32_t encap_decap_idx)
13937 {
13938         struct mlx5_priv *priv = dev->data->dev_private;
13939         struct mlx5_flow_dv_encap_decap_resource *resource;
13940
13941         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13942                                   encap_decap_idx);
13943         if (!resource)
13944                 return 0;
13945         MLX5_ASSERT(resource->action);
13946         return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
13947 }
13948
13949 /**
13950  * Release an jump to table action resource.
13951  *
13952  * @param dev
13953  *   Pointer to Ethernet device.
13954  * @param rix_jump
13955  *   Index to the jump action resource.
13956  *
13957  * @return
13958  *   1 while a reference on it exists, 0 when freed.
13959  */
13960 static int
13961 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13962                                   uint32_t rix_jump)
13963 {
13964         struct mlx5_priv *priv = dev->data->dev_private;
13965         struct mlx5_flow_tbl_data_entry *tbl_data;
13966
13967         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13968                                   rix_jump);
13969         if (!tbl_data)
13970                 return 0;
13971         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13972 }
13973
13974 void
13975 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13976 {
13977         struct mlx5_flow_dv_modify_hdr_resource *res =
13978                 container_of(entry, typeof(*res), entry);
13979         struct mlx5_dev_ctx_shared *sh = tool_ctx;
13980
13981         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13982         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
13983 }
13984
13985 /**
13986  * Release a modify-header resource.
13987  *
13988  * @param dev
13989  *   Pointer to Ethernet device.
13990  * @param handle
13991  *   Pointer to mlx5_flow_handle.
13992  *
13993  * @return
13994  *   1 while a reference on it exists, 0 when freed.
13995  */
13996 static int
13997 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
13998                                     struct mlx5_flow_handle *handle)
13999 {
14000         struct mlx5_priv *priv = dev->data->dev_private;
14001         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14002
14003         MLX5_ASSERT(entry->action);
14004         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14005 }
14006
14007 void
14008 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14009 {
14010         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14011         struct mlx5_flow_dv_port_id_action_resource *resource =
14012                                   container_of(entry, typeof(*resource), entry);
14013
14014         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14015         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14016 }
14017
14018 /**
14019  * Release port ID action resource.
14020  *
14021  * @param dev
14022  *   Pointer to Ethernet device.
14023  * @param handle
14024  *   Pointer to mlx5_flow_handle.
14025  *
14026  * @return
14027  *   1 while a reference on it exists, 0 when freed.
14028  */
14029 static int
14030 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14031                                         uint32_t port_id)
14032 {
14033         struct mlx5_priv *priv = dev->data->dev_private;
14034         struct mlx5_flow_dv_port_id_action_resource *resource;
14035
14036         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14037         if (!resource)
14038                 return 0;
14039         MLX5_ASSERT(resource->action);
14040         return mlx5_list_unregister(priv->sh->port_id_action_list,
14041                                     &resource->entry);
14042 }
14043
14044 /**
14045  * Release shared RSS action resource.
14046  *
14047  * @param dev
14048  *   Pointer to Ethernet device.
14049  * @param srss
14050  *   Shared RSS action index.
14051  */
14052 static void
14053 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14054 {
14055         struct mlx5_priv *priv = dev->data->dev_private;
14056         struct mlx5_shared_action_rss *shared_rss;
14057
14058         shared_rss = mlx5_ipool_get
14059                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14060         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14061 }
14062
14063 void
14064 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14065 {
14066         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14067         struct mlx5_flow_dv_push_vlan_action_resource *resource =
14068                         container_of(entry, typeof(*resource), entry);
14069
14070         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14071         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14072 }
14073
14074 /**
14075  * Release push vlan action resource.
14076  *
14077  * @param dev
14078  *   Pointer to Ethernet device.
14079  * @param handle
14080  *   Pointer to mlx5_flow_handle.
14081  *
14082  * @return
14083  *   1 while a reference on it exists, 0 when freed.
14084  */
14085 static int
14086 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14087                                           struct mlx5_flow_handle *handle)
14088 {
14089         struct mlx5_priv *priv = dev->data->dev_private;
14090         struct mlx5_flow_dv_push_vlan_action_resource *resource;
14091         uint32_t idx = handle->dvh.rix_push_vlan;
14092
14093         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14094         if (!resource)
14095                 return 0;
14096         MLX5_ASSERT(resource->action);
14097         return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14098                                     &resource->entry);
14099 }
14100
14101 /**
14102  * Release the fate resource.
14103  *
14104  * @param dev
14105  *   Pointer to Ethernet device.
14106  * @param handle
14107  *   Pointer to mlx5_flow_handle.
14108  */
14109 static void
14110 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14111                                struct mlx5_flow_handle *handle)
14112 {
14113         if (!handle->rix_fate)
14114                 return;
14115         switch (handle->fate_action) {
14116         case MLX5_FLOW_FATE_QUEUE:
14117                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14118                         mlx5_hrxq_release(dev, handle->rix_hrxq);
14119                 break;
14120         case MLX5_FLOW_FATE_JUMP:
14121                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14122                 break;
14123         case MLX5_FLOW_FATE_PORT_ID:
14124                 flow_dv_port_id_action_resource_release(dev,
14125                                 handle->rix_port_id_action);
14126                 break;
14127         default:
14128                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14129                 break;
14130         }
14131         handle->rix_fate = 0;
14132 }
14133
14134 void
14135 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14136                          struct mlx5_list_entry *entry)
14137 {
14138         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14139                                                               typeof(*resource),
14140                                                               entry);
14141         struct rte_eth_dev *dev = resource->dev;
14142         struct mlx5_priv *priv = dev->data->dev_private;
14143
14144         if (resource->verbs_action)
14145                 claim_zero(mlx5_flow_os_destroy_flow_action
14146                                                       (resource->verbs_action));
14147         if (resource->normal_path_tbl)
14148                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14149                                              resource->normal_path_tbl);
14150         flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14151         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14152         DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14153 }
14154
14155 /**
14156  * Release an sample resource.
14157  *
14158  * @param dev
14159  *   Pointer to Ethernet device.
14160  * @param handle
14161  *   Pointer to mlx5_flow_handle.
14162  *
14163  * @return
14164  *   1 while a reference on it exists, 0 when freed.
14165  */
14166 static int
14167 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14168                                      struct mlx5_flow_handle *handle)
14169 {
14170         struct mlx5_priv *priv = dev->data->dev_private;
14171         struct mlx5_flow_dv_sample_resource *resource;
14172
14173         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14174                                   handle->dvh.rix_sample);
14175         if (!resource)
14176                 return 0;
14177         MLX5_ASSERT(resource->verbs_action);
14178         return mlx5_list_unregister(priv->sh->sample_action_list,
14179                                     &resource->entry);
14180 }
14181
14182 void
14183 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14184                              struct mlx5_list_entry *entry)
14185 {
14186         struct mlx5_flow_dv_dest_array_resource *resource =
14187                         container_of(entry, typeof(*resource), entry);
14188         struct rte_eth_dev *dev = resource->dev;
14189         struct mlx5_priv *priv = dev->data->dev_private;
14190         uint32_t i = 0;
14191
14192         MLX5_ASSERT(resource->action);
14193         if (resource->action)
14194                 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14195         for (; i < resource->num_of_dest; i++)
14196                 flow_dv_sample_sub_actions_release(dev,
14197                                                    &resource->sample_idx[i]);
14198         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14199         DRV_LOG(DEBUG, "destination array resource %p: removed",
14200                 (void *)resource);
14201 }
14202
14203 /**
14204  * Release an destination array resource.
14205  *
14206  * @param dev
14207  *   Pointer to Ethernet device.
14208  * @param handle
14209  *   Pointer to mlx5_flow_handle.
14210  *
14211  * @return
14212  *   1 while a reference on it exists, 0 when freed.
14213  */
14214 static int
14215 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14216                                     struct mlx5_flow_handle *handle)
14217 {
14218         struct mlx5_priv *priv = dev->data->dev_private;
14219         struct mlx5_flow_dv_dest_array_resource *resource;
14220
14221         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14222                                   handle->dvh.rix_dest_array);
14223         if (!resource)
14224                 return 0;
14225         MLX5_ASSERT(resource->action);
14226         return mlx5_list_unregister(priv->sh->dest_array_list,
14227                                     &resource->entry);
14228 }
14229
14230 static void
14231 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14232 {
14233         struct mlx5_priv *priv = dev->data->dev_private;
14234         struct mlx5_dev_ctx_shared *sh = priv->sh;
14235         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14236                                 sh->geneve_tlv_option_resource;
14237         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14238         if (geneve_opt_resource) {
14239                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14240                                          __ATOMIC_RELAXED))) {
14241                         claim_zero(mlx5_devx_cmd_destroy
14242                                         (geneve_opt_resource->obj));
14243                         mlx5_free(sh->geneve_tlv_option_resource);
14244                         sh->geneve_tlv_option_resource = NULL;
14245                 }
14246         }
14247         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14248 }
14249
14250 /**
14251  * Remove the flow from the NIC but keeps it in memory.
14252  * Lock free, (mutex should be acquired by caller).
14253  *
14254  * @param[in] dev
14255  *   Pointer to Ethernet device.
14256  * @param[in, out] flow
14257  *   Pointer to flow structure.
14258  */
14259 static void
14260 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14261 {
14262         struct mlx5_flow_handle *dh;
14263         uint32_t handle_idx;
14264         struct mlx5_priv *priv = dev->data->dev_private;
14265
14266         if (!flow)
14267                 return;
14268         handle_idx = flow->dev_handles;
14269         while (handle_idx) {
14270                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14271                                     handle_idx);
14272                 if (!dh)
14273                         return;
14274                 if (dh->drv_flow) {
14275                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14276                         dh->drv_flow = NULL;
14277                 }
14278                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14279                         flow_dv_fate_resource_release(dev, dh);
14280                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14281                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14282                 handle_idx = dh->next.next;
14283         }
14284 }
14285
14286 /**
14287  * Remove the flow from the NIC and the memory.
14288  * Lock free, (mutex should be acquired by caller).
14289  *
14290  * @param[in] dev
14291  *   Pointer to the Ethernet device structure.
14292  * @param[in, out] flow
14293  *   Pointer to flow structure.
14294  */
14295 static void
14296 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14297 {
14298         struct mlx5_flow_handle *dev_handle;
14299         struct mlx5_priv *priv = dev->data->dev_private;
14300         struct mlx5_flow_meter_info *fm = NULL;
14301         uint32_t srss = 0;
14302
14303         if (!flow)
14304                 return;
14305         flow_dv_remove(dev, flow);
14306         if (flow->counter) {
14307                 flow_dv_counter_free(dev, flow->counter);
14308                 flow->counter = 0;
14309         }
14310         if (flow->meter) {
14311                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14312                 if (fm)
14313                         mlx5_flow_meter_detach(priv, fm);
14314                 flow->meter = 0;
14315         }
14316         /* Keep the current age handling by default. */
14317         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14318                 flow_dv_aso_ct_release(dev, flow->ct);
14319         else if (flow->age)
14320                 flow_dv_aso_age_release(dev, flow->age);
14321         if (flow->geneve_tlv_option) {
14322                 flow_dv_geneve_tlv_option_resource_release(dev);
14323                 flow->geneve_tlv_option = 0;
14324         }
14325         while (flow->dev_handles) {
14326                 uint32_t tmp_idx = flow->dev_handles;
14327
14328                 dev_handle = mlx5_ipool_get(priv->sh->ipool
14329                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14330                 if (!dev_handle)
14331                         return;
14332                 flow->dev_handles = dev_handle->next.next;
14333                 if (dev_handle->dvh.matcher)
14334                         flow_dv_matcher_release(dev, dev_handle);
14335                 if (dev_handle->dvh.rix_sample)
14336                         flow_dv_sample_resource_release(dev, dev_handle);
14337                 if (dev_handle->dvh.rix_dest_array)
14338                         flow_dv_dest_array_resource_release(dev, dev_handle);
14339                 if (dev_handle->dvh.rix_encap_decap)
14340                         flow_dv_encap_decap_resource_release(dev,
14341                                 dev_handle->dvh.rix_encap_decap);
14342                 if (dev_handle->dvh.modify_hdr)
14343                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
14344                 if (dev_handle->dvh.rix_push_vlan)
14345                         flow_dv_push_vlan_action_resource_release(dev,
14346                                                                   dev_handle);
14347                 if (dev_handle->dvh.rix_tag)
14348                         flow_dv_tag_release(dev,
14349                                             dev_handle->dvh.rix_tag);
14350                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14351                         flow_dv_fate_resource_release(dev, dev_handle);
14352                 else if (!srss)
14353                         srss = dev_handle->rix_srss;
14354                 if (fm && dev_handle->is_meter_flow_id &&
14355                     dev_handle->split_flow_id)
14356                         mlx5_ipool_free(fm->flow_ipool,
14357                                         dev_handle->split_flow_id);
14358                 else if (dev_handle->split_flow_id &&
14359                     !dev_handle->is_meter_flow_id)
14360                         mlx5_ipool_free(priv->sh->ipool
14361                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14362                                         dev_handle->split_flow_id);
14363                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14364                            tmp_idx);
14365         }
14366         if (srss)
14367                 flow_dv_shared_rss_action_release(dev, srss);
14368 }
14369
14370 /**
14371  * Release array of hash RX queue objects.
14372  * Helper function.
14373  *
14374  * @param[in] dev
14375  *   Pointer to the Ethernet device structure.
14376  * @param[in, out] hrxqs
14377  *   Array of hash RX queue objects.
14378  *
14379  * @return
14380  *   Total number of references to hash RX queue objects in *hrxqs* array
14381  *   after this operation.
14382  */
14383 static int
14384 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14385                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14386 {
14387         size_t i;
14388         int remaining = 0;
14389
14390         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14391                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14392
14393                 if (!ret)
14394                         (*hrxqs)[i] = 0;
14395                 remaining += ret;
14396         }
14397         return remaining;
14398 }
14399
14400 /**
14401  * Release all hash RX queue objects representing shared RSS action.
14402  *
14403  * @param[in] dev
14404  *   Pointer to the Ethernet device structure.
14405  * @param[in, out] action
14406  *   Shared RSS action to remove hash RX queue objects from.
14407  *
14408  * @return
14409  *   Total number of references to hash RX queue objects stored in *action*
14410  *   after this operation.
14411  *   Expected to be 0 if no external references held.
14412  */
14413 static int
14414 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14415                                  struct mlx5_shared_action_rss *shared_rss)
14416 {
14417         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14418 }
14419
14420 /**
14421  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14422  * user input.
14423  *
14424  * Only one hash value is available for one L3+L4 combination:
14425  * for example:
14426  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14427  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14428  * same slot in mlx5_rss_hash_fields.
14429  *
14430  * @param[in] rss
14431  *   Pointer to the shared action RSS conf.
14432  * @param[in, out] hash_field
14433  *   hash_field variable needed to be adjusted.
14434  *
14435  * @return
14436  *   void
14437  */
14438 static void
14439 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14440                                      uint64_t *hash_field)
14441 {
14442         uint64_t rss_types = rss->origin.types;
14443
14444         switch (*hash_field & ~IBV_RX_HASH_INNER) {
14445         case MLX5_RSS_HASH_IPV4:
14446                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14447                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
14448                         if (rss_types & ETH_RSS_L3_DST_ONLY)
14449                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
14450                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14451                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14452                         else
14453                                 *hash_field |= MLX5_RSS_HASH_IPV4;
14454                 }
14455                 return;
14456         case MLX5_RSS_HASH_IPV6:
14457                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14458                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
14459                         if (rss_types & ETH_RSS_L3_DST_ONLY)
14460                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
14461                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14462                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14463                         else
14464                                 *hash_field |= MLX5_RSS_HASH_IPV6;
14465                 }
14466                 return;
14467         case MLX5_RSS_HASH_IPV4_UDP:
14468                 /* fall-through. */
14469         case MLX5_RSS_HASH_IPV6_UDP:
14470                 if (rss_types & ETH_RSS_UDP) {
14471                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14472                         if (rss_types & ETH_RSS_L4_DST_ONLY)
14473                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14474                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14475                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14476                         else
14477                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14478                 }
14479                 return;
14480         case MLX5_RSS_HASH_IPV4_TCP:
14481                 /* fall-through. */
14482         case MLX5_RSS_HASH_IPV6_TCP:
14483                 if (rss_types & ETH_RSS_TCP) {
14484                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14485                         if (rss_types & ETH_RSS_L4_DST_ONLY)
14486                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14487                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14488                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14489                         else
14490                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14491                 }
14492                 return;
14493         default:
14494                 return;
14495         }
14496 }
14497
14498 /**
14499  * Setup shared RSS action.
14500  * Prepare set of hash RX queue objects sufficient to handle all valid
14501  * hash_fields combinations (see enum ibv_rx_hash_fields).
14502  *
14503  * @param[in] dev
14504  *   Pointer to the Ethernet device structure.
14505  * @param[in] action_idx
14506  *   Shared RSS action ipool index.
14507  * @param[in, out] action
14508  *   Partially initialized shared RSS action.
14509  * @param[out] error
14510  *   Perform verbose error reporting if not NULL. Initialized in case of
14511  *   error only.
14512  *
14513  * @return
14514  *   0 on success, otherwise negative errno value.
14515  */
14516 static int
14517 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14518                            uint32_t action_idx,
14519                            struct mlx5_shared_action_rss *shared_rss,
14520                            struct rte_flow_error *error)
14521 {
14522         struct mlx5_flow_rss_desc rss_desc = { 0 };
14523         size_t i;
14524         int err;
14525
14526         if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14527                 return rte_flow_error_set(error, rte_errno,
14528                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14529                                           "cannot setup indirection table");
14530         }
14531         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14532         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14533         rss_desc.const_q = shared_rss->origin.queue;
14534         rss_desc.queue_num = shared_rss->origin.queue_num;
14535         /* Set non-zero value to indicate a shared RSS. */
14536         rss_desc.shared_rss = action_idx;
14537         rss_desc.ind_tbl = shared_rss->ind_tbl;
14538         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14539                 uint32_t hrxq_idx;
14540                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14541                 int tunnel = 0;
14542
14543                 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14544                 if (shared_rss->origin.level > 1) {
14545                         hash_fields |= IBV_RX_HASH_INNER;
14546                         tunnel = 1;
14547                 }
14548                 rss_desc.tunnel = tunnel;
14549                 rss_desc.hash_fields = hash_fields;
14550                 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14551                 if (!hrxq_idx) {
14552                         rte_flow_error_set
14553                                 (error, rte_errno,
14554                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14555                                  "cannot get hash queue");
14556                         goto error_hrxq_new;
14557                 }
14558                 err = __flow_dv_action_rss_hrxq_set
14559                         (shared_rss, hash_fields, hrxq_idx);
14560                 MLX5_ASSERT(!err);
14561         }
14562         return 0;
14563 error_hrxq_new:
14564         err = rte_errno;
14565         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14566         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14567                 shared_rss->ind_tbl = NULL;
14568         rte_errno = err;
14569         return -rte_errno;
14570 }
14571
14572 /**
14573  * Create shared RSS action.
14574  *
14575  * @param[in] dev
14576  *   Pointer to the Ethernet device structure.
14577  * @param[in] conf
14578  *   Shared action configuration.
14579  * @param[in] rss
14580  *   RSS action specification used to create shared action.
14581  * @param[out] error
14582  *   Perform verbose error reporting if not NULL. Initialized in case of
14583  *   error only.
14584  *
14585  * @return
14586  *   A valid shared action ID in case of success, 0 otherwise and
14587  *   rte_errno is set.
14588  */
14589 static uint32_t
14590 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14591                             const struct rte_flow_indir_action_conf *conf,
14592                             const struct rte_flow_action_rss *rss,
14593                             struct rte_flow_error *error)
14594 {
14595         struct mlx5_priv *priv = dev->data->dev_private;
14596         struct mlx5_shared_action_rss *shared_rss = NULL;
14597         void *queue = NULL;
14598         struct rte_flow_action_rss *origin;
14599         const uint8_t *rss_key;
14600         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14601         uint32_t idx;
14602
14603         RTE_SET_USED(conf);
14604         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14605                             0, SOCKET_ID_ANY);
14606         shared_rss = mlx5_ipool_zmalloc
14607                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14608         if (!shared_rss || !queue) {
14609                 rte_flow_error_set(error, ENOMEM,
14610                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14611                                    "cannot allocate resource memory");
14612                 goto error_rss_init;
14613         }
14614         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14615                 rte_flow_error_set(error, E2BIG,
14616                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14617                                    "rss action number out of range");
14618                 goto error_rss_init;
14619         }
14620         shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14621                                           sizeof(*shared_rss->ind_tbl),
14622                                           0, SOCKET_ID_ANY);
14623         if (!shared_rss->ind_tbl) {
14624                 rte_flow_error_set(error, ENOMEM,
14625                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14626                                    "cannot allocate resource memory");
14627                 goto error_rss_init;
14628         }
14629         memcpy(queue, rss->queue, queue_size);
14630         shared_rss->ind_tbl->queues = queue;
14631         shared_rss->ind_tbl->queues_n = rss->queue_num;
14632         origin = &shared_rss->origin;
14633         origin->func = rss->func;
14634         origin->level = rss->level;
14635         /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
14636         origin->types = !rss->types ? ETH_RSS_IP : rss->types;
14637         /* NULL RSS key indicates default RSS key. */
14638         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14639         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14640         origin->key = &shared_rss->key[0];
14641         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14642         origin->queue = queue;
14643         origin->queue_num = rss->queue_num;
14644         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14645                 goto error_rss_init;
14646         rte_spinlock_init(&shared_rss->action_rss_sl);
14647         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14648         rte_spinlock_lock(&priv->shared_act_sl);
14649         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14650                      &priv->rss_shared_actions, idx, shared_rss, next);
14651         rte_spinlock_unlock(&priv->shared_act_sl);
14652         return idx;
14653 error_rss_init:
14654         if (shared_rss) {
14655                 if (shared_rss->ind_tbl)
14656                         mlx5_free(shared_rss->ind_tbl);
14657                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14658                                 idx);
14659         }
14660         if (queue)
14661                 mlx5_free(queue);
14662         return 0;
14663 }
14664
14665 /**
14666  * Destroy the shared RSS action.
14667  * Release related hash RX queue objects.
14668  *
14669  * @param[in] dev
14670  *   Pointer to the Ethernet device structure.
14671  * @param[in] idx
14672  *   The shared RSS action object ID to be removed.
14673  * @param[out] error
14674  *   Perform verbose error reporting if not NULL. Initialized in case of
14675  *   error only.
14676  *
14677  * @return
14678  *   0 on success, otherwise negative errno value.
14679  */
14680 static int
14681 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14682                              struct rte_flow_error *error)
14683 {
14684         struct mlx5_priv *priv = dev->data->dev_private;
14685         struct mlx5_shared_action_rss *shared_rss =
14686             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14687         uint32_t old_refcnt = 1;
14688         int remaining;
14689         uint16_t *queue = NULL;
14690
14691         if (!shared_rss)
14692                 return rte_flow_error_set(error, EINVAL,
14693                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14694                                           "invalid shared action");
14695         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14696         if (remaining)
14697                 return rte_flow_error_set(error, EBUSY,
14698                                           RTE_FLOW_ERROR_TYPE_ACTION,
14699                                           NULL,
14700                                           "shared rss hrxq has references");
14701         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14702                                          0, 0, __ATOMIC_ACQUIRE,
14703                                          __ATOMIC_RELAXED))
14704                 return rte_flow_error_set(error, EBUSY,
14705                                           RTE_FLOW_ERROR_TYPE_ACTION,
14706                                           NULL,
14707                                           "shared rss has references");
14708         queue = shared_rss->ind_tbl->queues;
14709         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14710         if (remaining)
14711                 return rte_flow_error_set(error, EBUSY,
14712                                           RTE_FLOW_ERROR_TYPE_ACTION,
14713                                           NULL,
14714                                           "shared rss indirection table has"
14715                                           " references");
14716         mlx5_free(queue);
14717         rte_spinlock_lock(&priv->shared_act_sl);
14718         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14719                      &priv->rss_shared_actions, idx, shared_rss, next);
14720         rte_spinlock_unlock(&priv->shared_act_sl);
14721         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14722                         idx);
14723         return 0;
14724 }
14725
14726 /**
14727  * Create indirect action, lock free,
14728  * (mutex should be acquired by caller).
14729  * Dispatcher for action type specific call.
14730  *
14731  * @param[in] dev
14732  *   Pointer to the Ethernet device structure.
14733  * @param[in] conf
14734  *   Shared action configuration.
14735  * @param[in] action
14736  *   Action specification used to create indirect action.
14737  * @param[out] error
14738  *   Perform verbose error reporting if not NULL. Initialized in case of
14739  *   error only.
14740  *
14741  * @return
14742  *   A valid shared action handle in case of success, NULL otherwise and
14743  *   rte_errno is set.
14744  */
14745 static struct rte_flow_action_handle *
14746 flow_dv_action_create(struct rte_eth_dev *dev,
14747                       const struct rte_flow_indir_action_conf *conf,
14748                       const struct rte_flow_action *action,
14749                       struct rte_flow_error *err)
14750 {
14751         struct mlx5_priv *priv = dev->data->dev_private;
14752         uint32_t age_idx = 0;
14753         uint32_t idx = 0;
14754         uint32_t ret = 0;
14755
14756         switch (action->type) {
14757         case RTE_FLOW_ACTION_TYPE_RSS:
14758                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14759                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14760                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14761                 break;
14762         case RTE_FLOW_ACTION_TYPE_AGE:
14763                 age_idx = flow_dv_aso_age_alloc(dev, err);
14764                 if (!age_idx) {
14765                         ret = -rte_errno;
14766                         break;
14767                 }
14768                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14769                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14770                 flow_dv_aso_age_params_init(dev, age_idx,
14771                                         ((const struct rte_flow_action_age *)
14772                                                 action->conf)->context ?
14773                                         ((const struct rte_flow_action_age *)
14774                                                 action->conf)->context :
14775                                         (void *)(uintptr_t)idx,
14776                                         ((const struct rte_flow_action_age *)
14777                                                 action->conf)->timeout);
14778                 ret = age_idx;
14779                 break;
14780         case RTE_FLOW_ACTION_TYPE_COUNT:
14781                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14782                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14783                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14784                 break;
14785         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14786                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14787                                                          err);
14788                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14789                 break;
14790         default:
14791                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14792                                    NULL, "action type not supported");
14793                 break;
14794         }
14795         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14796 }
14797
14798 /**
14799  * Destroy the indirect action.
14800  * Release action related resources on the NIC and the memory.
14801  * Lock free, (mutex should be acquired by caller).
14802  * Dispatcher for action type specific call.
14803  *
14804  * @param[in] dev
14805  *   Pointer to the Ethernet device structure.
14806  * @param[in] handle
14807  *   The indirect action object handle to be removed.
14808  * @param[out] error
14809  *   Perform verbose error reporting if not NULL. Initialized in case of
14810  *   error only.
14811  *
14812  * @return
14813  *   0 on success, otherwise negative errno value.
14814  */
14815 static int
14816 flow_dv_action_destroy(struct rte_eth_dev *dev,
14817                        struct rte_flow_action_handle *handle,
14818                        struct rte_flow_error *error)
14819 {
14820         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14821         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14822         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14823         struct mlx5_flow_counter *cnt;
14824         uint32_t no_flow_refcnt = 1;
14825         int ret;
14826
14827         switch (type) {
14828         case MLX5_INDIRECT_ACTION_TYPE_RSS:
14829                 return __flow_dv_action_rss_release(dev, idx, error);
14830         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14831                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14832                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14833                                                  &no_flow_refcnt, 1, false,
14834                                                  __ATOMIC_ACQUIRE,
14835                                                  __ATOMIC_RELAXED))
14836                         return rte_flow_error_set(error, EBUSY,
14837                                                   RTE_FLOW_ERROR_TYPE_ACTION,
14838                                                   NULL,
14839                                                   "Indirect count action has references");
14840                 flow_dv_counter_free(dev, idx);
14841                 return 0;
14842         case MLX5_INDIRECT_ACTION_TYPE_AGE:
14843                 ret = flow_dv_aso_age_release(dev, idx);
14844                 if (ret)
14845                         /*
14846                          * In this case, the last flow has a reference will
14847                          * actually release the age action.
14848                          */
14849                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14850                                 " released with references %d.", idx, ret);
14851                 return 0;
14852         case MLX5_INDIRECT_ACTION_TYPE_CT:
14853                 ret = flow_dv_aso_ct_release(dev, idx);
14854                 if (ret < 0)
14855                         return ret;
14856                 if (ret > 0)
14857                         DRV_LOG(DEBUG, "Connection tracking object %u still "
14858                                 "has references %d.", idx, ret);
14859                 return 0;
14860         default:
14861                 return rte_flow_error_set(error, ENOTSUP,
14862                                           RTE_FLOW_ERROR_TYPE_ACTION,
14863                                           NULL,
14864                                           "action type not supported");
14865         }
14866 }
14867
14868 /**
14869  * Updates in place shared RSS action configuration.
14870  *
14871  * @param[in] dev
14872  *   Pointer to the Ethernet device structure.
14873  * @param[in] idx
14874  *   The shared RSS action object ID to be updated.
14875  * @param[in] action_conf
14876  *   RSS action specification used to modify *shared_rss*.
14877  * @param[out] error
14878  *   Perform verbose error reporting if not NULL. Initialized in case of
14879  *   error only.
14880  *
14881  * @return
14882  *   0 on success, otherwise negative errno value.
14883  * @note: currently only support update of RSS queues.
14884  */
14885 static int
14886 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14887                             const struct rte_flow_action_rss *action_conf,
14888                             struct rte_flow_error *error)
14889 {
14890         struct mlx5_priv *priv = dev->data->dev_private;
14891         struct mlx5_shared_action_rss *shared_rss =
14892             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14893         int ret = 0;
14894         void *queue = NULL;
14895         uint16_t *queue_old = NULL;
14896         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14897
14898         if (!shared_rss)
14899                 return rte_flow_error_set(error, EINVAL,
14900                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14901                                           "invalid shared action to update");
14902         if (priv->obj_ops.ind_table_modify == NULL)
14903                 return rte_flow_error_set(error, ENOTSUP,
14904                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14905                                           "cannot modify indirection table");
14906         queue = mlx5_malloc(MLX5_MEM_ZERO,
14907                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14908                             0, SOCKET_ID_ANY);
14909         if (!queue)
14910                 return rte_flow_error_set(error, ENOMEM,
14911                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14912                                           NULL,
14913                                           "cannot allocate resource memory");
14914         memcpy(queue, action_conf->queue, queue_size);
14915         MLX5_ASSERT(shared_rss->ind_tbl);
14916         rte_spinlock_lock(&shared_rss->action_rss_sl);
14917         queue_old = shared_rss->ind_tbl->queues;
14918         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14919                                         queue, action_conf->queue_num, true);
14920         if (ret) {
14921                 mlx5_free(queue);
14922                 ret = rte_flow_error_set(error, rte_errno,
14923                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14924                                           "cannot update indirection table");
14925         } else {
14926                 mlx5_free(queue_old);
14927                 shared_rss->origin.queue = queue;
14928                 shared_rss->origin.queue_num = action_conf->queue_num;
14929         }
14930         rte_spinlock_unlock(&shared_rss->action_rss_sl);
14931         return ret;
14932 }
14933
14934 /*
14935  * Updates in place conntrack context or direction.
14936  * Context update should be synchronized.
14937  *
14938  * @param[in] dev
14939  *   Pointer to the Ethernet device structure.
14940  * @param[in] idx
14941  *   The conntrack object ID to be updated.
14942  * @param[in] update
14943  *   Pointer to the structure of information to update.
14944  * @param[out] error
14945  *   Perform verbose error reporting if not NULL. Initialized in case of
14946  *   error only.
14947  *
14948  * @return
14949  *   0 on success, otherwise negative errno value.
14950  */
14951 static int
14952 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14953                            const struct rte_flow_modify_conntrack *update,
14954                            struct rte_flow_error *error)
14955 {
14956         struct mlx5_priv *priv = dev->data->dev_private;
14957         struct mlx5_aso_ct_action *ct;
14958         const struct rte_flow_action_conntrack *new_prf;
14959         int ret = 0;
14960         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14961         uint32_t dev_idx;
14962
14963         if (PORT_ID(priv) != owner)
14964                 return rte_flow_error_set(error, EACCES,
14965                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14966                                           NULL,
14967                                           "CT object owned by another port");
14968         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14969         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
14970         if (!ct->refcnt)
14971                 return rte_flow_error_set(error, ENOMEM,
14972                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14973                                           NULL,
14974                                           "CT object is inactive");
14975         new_prf = &update->new_ct;
14976         if (update->direction)
14977                 ct->is_original = !!new_prf->is_original_dir;
14978         if (update->state) {
14979                 /* Only validate the profile when it needs to be updated. */
14980                 ret = mlx5_validate_action_ct(dev, new_prf, error);
14981                 if (ret)
14982                         return ret;
14983                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
14984                 if (ret)
14985                         return rte_flow_error_set(error, EIO,
14986                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14987                                         NULL,
14988                                         "Failed to send CT context update WQE");
14989                 /* Block until ready or a failure. */
14990                 ret = mlx5_aso_ct_available(priv->sh, ct);
14991                 if (ret)
14992                         rte_flow_error_set(error, rte_errno,
14993                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14994                                            NULL,
14995                                            "Timeout to get the CT update");
14996         }
14997         return ret;
14998 }
14999
15000 /**
15001  * Updates in place shared action configuration, lock free,
15002  * (mutex should be acquired by caller).
15003  *
15004  * @param[in] dev
15005  *   Pointer to the Ethernet device structure.
15006  * @param[in] handle
15007  *   The indirect action object handle to be updated.
15008  * @param[in] update
15009  *   Action specification used to modify the action pointed by *handle*.
15010  *   *update* could be of same type with the action pointed by the *handle*
15011  *   handle argument, or some other structures like a wrapper, depending on
15012  *   the indirect action type.
15013  * @param[out] error
15014  *   Perform verbose error reporting if not NULL. Initialized in case of
15015  *   error only.
15016  *
15017  * @return
15018  *   0 on success, otherwise negative errno value.
15019  */
15020 static int
15021 flow_dv_action_update(struct rte_eth_dev *dev,
15022                         struct rte_flow_action_handle *handle,
15023                         const void *update,
15024                         struct rte_flow_error *err)
15025 {
15026         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15027         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15028         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15029         const void *action_conf;
15030
15031         switch (type) {
15032         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15033                 action_conf = ((const struct rte_flow_action *)update)->conf;
15034                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15035         case MLX5_INDIRECT_ACTION_TYPE_CT:
15036                 return __flow_dv_action_ct_update(dev, idx, update, err);
15037         default:
15038                 return rte_flow_error_set(err, ENOTSUP,
15039                                           RTE_FLOW_ERROR_TYPE_ACTION,
15040                                           NULL,
15041                                           "action type update not supported");
15042         }
15043 }
15044
15045 /**
15046  * Destroy the meter sub policy table rules.
15047  * Lock free, (mutex should be acquired by caller).
15048  *
15049  * @param[in] dev
15050  *   Pointer to Ethernet device.
15051  * @param[in] sub_policy
15052  *   Pointer to meter sub policy table.
15053  */
15054 static void
15055 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15056                              struct mlx5_flow_meter_sub_policy *sub_policy)
15057 {
15058         struct mlx5_priv *priv = dev->data->dev_private;
15059         struct mlx5_flow_tbl_data_entry *tbl;
15060         struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15061         struct mlx5_flow_meter_info *next_fm;
15062         struct mlx5_sub_policy_color_rule *color_rule;
15063         void *tmp;
15064         uint32_t i;
15065
15066         for (i = 0; i < RTE_COLORS; i++) {
15067                 next_fm = NULL;
15068                 if (i == RTE_COLOR_GREEN && policy &&
15069                     policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15070                         next_fm = mlx5_flow_meter_find(priv,
15071                                         policy->act_cnt[i].next_mtr_id, NULL);
15072                 TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15073                                    next_port, tmp) {
15074                         claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15075                         tbl = container_of(color_rule->matcher->tbl,
15076                                            typeof(*tbl), tbl);
15077                         mlx5_list_unregister(tbl->matchers,
15078                                              &color_rule->matcher->entry);
15079                         TAILQ_REMOVE(&sub_policy->color_rules[i],
15080                                      color_rule, next_port);
15081                         mlx5_free(color_rule);
15082                         if (next_fm)
15083                                 mlx5_flow_meter_detach(priv, next_fm);
15084                 }
15085         }
15086         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15087                 if (sub_policy->rix_hrxq[i]) {
15088                         if (policy && !policy->is_hierarchy)
15089                                 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15090                         sub_policy->rix_hrxq[i] = 0;
15091                 }
15092                 if (sub_policy->jump_tbl[i]) {
15093                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15094                                                      sub_policy->jump_tbl[i]);
15095                         sub_policy->jump_tbl[i] = NULL;
15096                 }
15097         }
15098         if (sub_policy->tbl_rsc) {
15099                 flow_dv_tbl_resource_release(MLX5_SH(dev),
15100                                              sub_policy->tbl_rsc);
15101                 sub_policy->tbl_rsc = NULL;
15102         }
15103 }
15104
15105 /**
15106  * Destroy policy rules, lock free,
15107  * (mutex should be acquired by caller).
15108  * Dispatcher for action type specific call.
15109  *
15110  * @param[in] dev
15111  *   Pointer to the Ethernet device structure.
15112  * @param[in] mtr_policy
15113  *   Meter policy struct.
15114  */
15115 static void
15116 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15117                              struct mlx5_flow_meter_policy *mtr_policy)
15118 {
15119         uint32_t i, j;
15120         struct mlx5_flow_meter_sub_policy *sub_policy;
15121         uint16_t sub_policy_num;
15122
15123         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15124                 sub_policy_num = (mtr_policy->sub_policy_num >>
15125                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15126                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15127                 for (j = 0; j < sub_policy_num; j++) {
15128                         sub_policy = mtr_policy->sub_policys[i][j];
15129                         if (sub_policy)
15130                                 __flow_dv_destroy_sub_policy_rules(dev,
15131                                                                    sub_policy);
15132                 }
15133         }
15134 }
15135
15136 /**
15137  * Destroy policy action, lock free,
15138  * (mutex should be acquired by caller).
15139  * Dispatcher for action type specific call.
15140  *
15141  * @param[in] dev
15142  *   Pointer to the Ethernet device structure.
15143  * @param[in] mtr_policy
15144  *   Meter policy struct.
15145  */
15146 static void
15147 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15148                       struct mlx5_flow_meter_policy *mtr_policy)
15149 {
15150         struct rte_flow_action *rss_action;
15151         struct mlx5_flow_handle dev_handle;
15152         uint32_t i, j;
15153
15154         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15155                 if (mtr_policy->act_cnt[i].rix_mark) {
15156                         flow_dv_tag_release(dev,
15157                                 mtr_policy->act_cnt[i].rix_mark);
15158                         mtr_policy->act_cnt[i].rix_mark = 0;
15159                 }
15160                 if (mtr_policy->act_cnt[i].modify_hdr) {
15161                         dev_handle.dvh.modify_hdr =
15162                                 mtr_policy->act_cnt[i].modify_hdr;
15163                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15164                 }
15165                 switch (mtr_policy->act_cnt[i].fate_action) {
15166                 case MLX5_FLOW_FATE_SHARED_RSS:
15167                         rss_action = mtr_policy->act_cnt[i].rss;
15168                         mlx5_free(rss_action);
15169                         break;
15170                 case MLX5_FLOW_FATE_PORT_ID:
15171                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
15172                                 flow_dv_port_id_action_resource_release(dev,
15173                                 mtr_policy->act_cnt[i].rix_port_id_action);
15174                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15175                         }
15176                         break;
15177                 case MLX5_FLOW_FATE_DROP:
15178                 case MLX5_FLOW_FATE_JUMP:
15179                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15180                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
15181                                                 NULL;
15182                         break;
15183                 default:
15184                         /*Queue action do nothing*/
15185                         break;
15186                 }
15187         }
15188         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15189                 mtr_policy->dr_drop_action[j] = NULL;
15190 }
15191
15192 /**
15193  * Create policy action per domain, lock free,
15194  * (mutex should be acquired by caller).
15195  * Dispatcher for action type specific call.
15196  *
15197  * @param[in] dev
15198  *   Pointer to the Ethernet device structure.
15199  * @param[in] mtr_policy
15200  *   Meter policy struct.
15201  * @param[in] action
15202  *   Action specification used to create meter actions.
15203  * @param[out] error
15204  *   Perform verbose error reporting if not NULL. Initialized in case of
15205  *   error only.
15206  *
15207  * @return
15208  *   0 on success, otherwise negative errno value.
15209  */
15210 static int
15211 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15212                         struct mlx5_flow_meter_policy *mtr_policy,
15213                         const struct rte_flow_action *actions[RTE_COLORS],
15214                         enum mlx5_meter_domain domain,
15215                         struct rte_mtr_error *error)
15216 {
15217         struct mlx5_priv *priv = dev->data->dev_private;
15218         struct rte_flow_error flow_err;
15219         const struct rte_flow_action *act;
15220         uint64_t action_flags;
15221         struct mlx5_flow_handle dh;
15222         struct mlx5_flow dev_flow;
15223         struct mlx5_flow_dv_port_id_action_resource port_id_action;
15224         int i, ret;
15225         uint8_t egress, transfer;
15226         struct mlx5_meter_policy_action_container *act_cnt = NULL;
15227         union {
15228                 struct mlx5_flow_dv_modify_hdr_resource res;
15229                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15230                             sizeof(struct mlx5_modification_cmd) *
15231                             (MLX5_MAX_MODIFY_NUM + 1)];
15232         } mhdr_dummy;
15233         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15234
15235         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15236         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15237         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15238         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15239         memset(&port_id_action, 0,
15240                sizeof(struct mlx5_flow_dv_port_id_action_resource));
15241         memset(mhdr_res, 0, sizeof(*mhdr_res));
15242         mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15243                                        (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15244                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15245         dev_flow.handle = &dh;
15246         dev_flow.dv.port_id_action = &port_id_action;
15247         dev_flow.external = true;
15248         for (i = 0; i < RTE_COLORS; i++) {
15249                 if (i < MLX5_MTR_RTE_COLORS)
15250                         act_cnt = &mtr_policy->act_cnt[i];
15251                 /* Skip the color policy actions creation. */
15252                 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15253                     (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15254                         continue;
15255                 action_flags = 0;
15256                 for (act = actions[i];
15257                      act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15258                         switch (act->type) {
15259                         case RTE_FLOW_ACTION_TYPE_MARK:
15260                         {
15261                                 uint32_t tag_be = mlx5_flow_mark_set
15262                                         (((const struct rte_flow_action_mark *)
15263                                         (act->conf))->id);
15264
15265                                 if (i >= MLX5_MTR_RTE_COLORS)
15266                                         return -rte_mtr_error_set(error,
15267                                           ENOTSUP,
15268                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15269                                           NULL,
15270                                           "cannot create policy "
15271                                           "mark action for this color");
15272                                 dev_flow.handle->mark = 1;
15273                                 if (flow_dv_tag_resource_register(dev, tag_be,
15274                                                   &dev_flow, &flow_err))
15275                                         return -rte_mtr_error_set(error,
15276                                         ENOTSUP,
15277                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15278                                         NULL,
15279                                         "cannot setup policy mark action");
15280                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
15281                                 act_cnt->rix_mark =
15282                                         dev_flow.handle->dvh.rix_tag;
15283                                 action_flags |= MLX5_FLOW_ACTION_MARK;
15284                                 break;
15285                         }
15286                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
15287                                 if (i >= MLX5_MTR_RTE_COLORS)
15288                                         return -rte_mtr_error_set(error,
15289                                           ENOTSUP,
15290                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15291                                           NULL,
15292                                           "cannot create policy "
15293                                           "set tag action for this color");
15294                                 if (flow_dv_convert_action_set_tag
15295                                 (dev, mhdr_res,
15296                                 (const struct rte_flow_action_set_tag *)
15297                                 act->conf,  &flow_err))
15298                                         return -rte_mtr_error_set(error,
15299                                         ENOTSUP,
15300                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15301                                         NULL, "cannot convert policy "
15302                                         "set tag action");
15303                                 if (!mhdr_res->actions_num)
15304                                         return -rte_mtr_error_set(error,
15305                                         ENOTSUP,
15306                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15307                                         NULL, "cannot find policy "
15308                                         "set tag action");
15309                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15310                                 break;
15311                         case RTE_FLOW_ACTION_TYPE_DROP:
15312                         {
15313                                 struct mlx5_flow_mtr_mng *mtrmng =
15314                                                 priv->sh->mtrmng;
15315                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15316
15317                                 /*
15318                                  * Create the drop table with
15319                                  * METER DROP level.
15320                                  */
15321                                 if (!mtrmng->drop_tbl[domain]) {
15322                                         mtrmng->drop_tbl[domain] =
15323                                         flow_dv_tbl_resource_get(dev,
15324                                         MLX5_FLOW_TABLE_LEVEL_METER,
15325                                         egress, transfer, false, NULL, 0,
15326                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15327                                         if (!mtrmng->drop_tbl[domain])
15328                                                 return -rte_mtr_error_set
15329                                         (error, ENOTSUP,
15330                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15331                                         NULL,
15332                                         "Failed to create meter drop table");
15333                                 }
15334                                 tbl_data = container_of
15335                                 (mtrmng->drop_tbl[domain],
15336                                 struct mlx5_flow_tbl_data_entry, tbl);
15337                                 if (i < MLX5_MTR_RTE_COLORS) {
15338                                         act_cnt->dr_jump_action[domain] =
15339                                                 tbl_data->jump.action;
15340                                         act_cnt->fate_action =
15341                                                 MLX5_FLOW_FATE_DROP;
15342                                 }
15343                                 if (i == RTE_COLOR_RED)
15344                                         mtr_policy->dr_drop_action[domain] =
15345                                                 tbl_data->jump.action;
15346                                 action_flags |= MLX5_FLOW_ACTION_DROP;
15347                                 break;
15348                         }
15349                         case RTE_FLOW_ACTION_TYPE_QUEUE:
15350                         {
15351                                 if (i >= MLX5_MTR_RTE_COLORS)
15352                                         return -rte_mtr_error_set(error,
15353                                         ENOTSUP,
15354                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15355                                         NULL, "cannot create policy "
15356                                         "fate queue for this color");
15357                                 act_cnt->queue =
15358                                 ((const struct rte_flow_action_queue *)
15359                                         (act->conf))->index;
15360                                 act_cnt->fate_action =
15361                                         MLX5_FLOW_FATE_QUEUE;
15362                                 dev_flow.handle->fate_action =
15363                                         MLX5_FLOW_FATE_QUEUE;
15364                                 mtr_policy->is_queue = 1;
15365                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15366                                 break;
15367                         }
15368                         case RTE_FLOW_ACTION_TYPE_RSS:
15369                         {
15370                                 int rss_size;
15371
15372                                 if (i >= MLX5_MTR_RTE_COLORS)
15373                                         return -rte_mtr_error_set(error,
15374                                           ENOTSUP,
15375                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15376                                           NULL,
15377                                           "cannot create policy "
15378                                           "rss action for this color");
15379                                 /*
15380                                  * Save RSS conf into policy struct
15381                                  * for translate stage.
15382                                  */
15383                                 rss_size = (int)rte_flow_conv
15384                                         (RTE_FLOW_CONV_OP_ACTION,
15385                                         NULL, 0, act, &flow_err);
15386                                 if (rss_size <= 0)
15387                                         return -rte_mtr_error_set(error,
15388                                           ENOTSUP,
15389                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15390                                           NULL, "Get the wrong "
15391                                           "rss action struct size");
15392                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15393                                                 rss_size, 0, SOCKET_ID_ANY);
15394                                 if (!act_cnt->rss)
15395                                         return -rte_mtr_error_set(error,
15396                                           ENOTSUP,
15397                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15398                                           NULL,
15399                                           "Fail to malloc rss action memory");
15400                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15401                                         act_cnt->rss, rss_size,
15402                                         act, &flow_err);
15403                                 if (ret < 0)
15404                                         return -rte_mtr_error_set(error,
15405                                           ENOTSUP,
15406                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15407                                           NULL, "Fail to save "
15408                                           "rss action into policy struct");
15409                                 act_cnt->fate_action =
15410                                         MLX5_FLOW_FATE_SHARED_RSS;
15411                                 action_flags |= MLX5_FLOW_ACTION_RSS;
15412                                 break;
15413                         }
15414                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
15415                         {
15416                                 struct mlx5_flow_dv_port_id_action_resource
15417                                         port_id_resource;
15418                                 uint32_t port_id = 0;
15419
15420                                 if (i >= MLX5_MTR_RTE_COLORS)
15421                                         return -rte_mtr_error_set(error,
15422                                         ENOTSUP,
15423                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15424                                         NULL, "cannot create policy "
15425                                         "port action for this color");
15426                                 memset(&port_id_resource, 0,
15427                                         sizeof(port_id_resource));
15428                                 if (flow_dv_translate_action_port_id(dev, act,
15429                                                 &port_id, &flow_err))
15430                                         return -rte_mtr_error_set(error,
15431                                         ENOTSUP,
15432                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15433                                         NULL, "cannot translate "
15434                                         "policy port action");
15435                                 port_id_resource.port_id = port_id;
15436                                 if (flow_dv_port_id_action_resource_register
15437                                         (dev, &port_id_resource,
15438                                         &dev_flow, &flow_err))
15439                                         return -rte_mtr_error_set(error,
15440                                         ENOTSUP,
15441                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15442                                         NULL, "cannot setup "
15443                                         "policy port action");
15444                                 act_cnt->rix_port_id_action =
15445                                         dev_flow.handle->rix_port_id_action;
15446                                 act_cnt->fate_action =
15447                                         MLX5_FLOW_FATE_PORT_ID;
15448                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15449                                 break;
15450                         }
15451                         case RTE_FLOW_ACTION_TYPE_JUMP:
15452                         {
15453                                 uint32_t jump_group = 0;
15454                                 uint32_t table = 0;
15455                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15456                                 struct flow_grp_info grp_info = {
15457                                         .external = !!dev_flow.external,
15458                                         .transfer = !!transfer,
15459                                         .fdb_def_rule = !!priv->fdb_def_rule,
15460                                         .std_tbl_fix = 0,
15461                                         .skip_scale = dev_flow.skip_scale &
15462                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15463                                 };
15464                                 struct mlx5_flow_meter_sub_policy *sub_policy =
15465                                         mtr_policy->sub_policys[domain][0];
15466
15467                                 if (i >= MLX5_MTR_RTE_COLORS)
15468                                         return -rte_mtr_error_set(error,
15469                                           ENOTSUP,
15470                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15471                                           NULL,
15472                                           "cannot create policy "
15473                                           "jump action for this color");
15474                                 jump_group =
15475                                 ((const struct rte_flow_action_jump *)
15476                                                         act->conf)->group;
15477                                 if (mlx5_flow_group_to_table(dev, NULL,
15478                                                        jump_group,
15479                                                        &table,
15480                                                        &grp_info, &flow_err))
15481                                         return -rte_mtr_error_set(error,
15482                                         ENOTSUP,
15483                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15484                                         NULL, "cannot setup "
15485                                         "policy jump action");
15486                                 sub_policy->jump_tbl[i] =
15487                                 flow_dv_tbl_resource_get(dev,
15488                                         table, egress,
15489                                         transfer,
15490                                         !!dev_flow.external,
15491                                         NULL, jump_group, 0,
15492                                         0, &flow_err);
15493                                 if
15494                                 (!sub_policy->jump_tbl[i])
15495                                         return  -rte_mtr_error_set(error,
15496                                         ENOTSUP,
15497                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15498                                         NULL, "cannot create jump action.");
15499                                 tbl_data = container_of
15500                                 (sub_policy->jump_tbl[i],
15501                                 struct mlx5_flow_tbl_data_entry, tbl);
15502                                 act_cnt->dr_jump_action[domain] =
15503                                         tbl_data->jump.action;
15504                                 act_cnt->fate_action =
15505                                         MLX5_FLOW_FATE_JUMP;
15506                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
15507                                 break;
15508                         }
15509                         /*
15510                          * No need to check meter hierarchy for Y or R colors
15511                          * here since it is done in the validation stage.
15512                          */
15513                         case RTE_FLOW_ACTION_TYPE_METER:
15514                         {
15515                                 const struct rte_flow_action_meter *mtr;
15516                                 struct mlx5_flow_meter_info *next_fm;
15517                                 struct mlx5_flow_meter_policy *next_policy;
15518                                 struct rte_flow_action tag_action;
15519                                 struct mlx5_rte_flow_action_set_tag set_tag;
15520                                 uint32_t next_mtr_idx = 0;
15521
15522                                 mtr = act->conf;
15523                                 next_fm = mlx5_flow_meter_find(priv,
15524                                                         mtr->mtr_id,
15525                                                         &next_mtr_idx);
15526                                 if (!next_fm)
15527                                         return -rte_mtr_error_set(error, EINVAL,
15528                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15529                                                 "Fail to find next meter.");
15530                                 if (next_fm->def_policy)
15531                                         return -rte_mtr_error_set(error, EINVAL,
15532                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15533                                 "Hierarchy only supports termination meter.");
15534                                 next_policy = mlx5_flow_meter_policy_find(dev,
15535                                                 next_fm->policy_id, NULL);
15536                                 MLX5_ASSERT(next_policy);
15537                                 if (next_fm->drop_cnt) {
15538                                         set_tag.id =
15539                                                 (enum modify_reg)
15540                                                 mlx5_flow_get_reg_id(dev,
15541                                                 MLX5_MTR_ID,
15542                                                 0,
15543                                                 (struct rte_flow_error *)error);
15544                                         set_tag.offset = (priv->mtr_reg_share ?
15545                                                 MLX5_MTR_COLOR_BITS : 0);
15546                                         set_tag.length = (priv->mtr_reg_share ?
15547                                                MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15548                                                MLX5_REG_BITS);
15549                                         set_tag.data = next_mtr_idx;
15550                                         tag_action.type =
15551                                                 (enum rte_flow_action_type)
15552                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15553                                         tag_action.conf = &set_tag;
15554                                         if (flow_dv_convert_action_set_reg
15555                                                 (mhdr_res, &tag_action,
15556                                                 (struct rte_flow_error *)error))
15557                                                 return -rte_errno;
15558                                         action_flags |=
15559                                                 MLX5_FLOW_ACTION_SET_TAG;
15560                                 }
15561                                 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15562                                 act_cnt->next_mtr_id = next_fm->meter_id;
15563                                 act_cnt->next_sub_policy = NULL;
15564                                 mtr_policy->is_hierarchy = 1;
15565                                 mtr_policy->dev = next_policy->dev;
15566                                 action_flags |=
15567                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15568                                 break;
15569                         }
15570                         default:
15571                                 return -rte_mtr_error_set(error, ENOTSUP,
15572                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15573                                           NULL, "action type not supported");
15574                         }
15575                         if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15576                                 /* create modify action if needed. */
15577                                 dev_flow.dv.group = 1;
15578                                 if (flow_dv_modify_hdr_resource_register
15579                                         (dev, mhdr_res, &dev_flow, &flow_err))
15580                                         return -rte_mtr_error_set(error,
15581                                                 ENOTSUP,
15582                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
15583                                                 NULL, "cannot register policy "
15584                                                 "set tag action");
15585                                 act_cnt->modify_hdr =
15586                                         dev_flow.handle->dvh.modify_hdr;
15587                         }
15588                 }
15589         }
15590         return 0;
15591 }
15592
15593 /**
15594  * Create policy action per domain, lock free,
15595  * (mutex should be acquired by caller).
15596  * Dispatcher for action type specific call.
15597  *
15598  * @param[in] dev
15599  *   Pointer to the Ethernet device structure.
15600  * @param[in] mtr_policy
15601  *   Meter policy struct.
15602  * @param[in] action
15603  *   Action specification used to create meter actions.
15604  * @param[out] error
15605  *   Perform verbose error reporting if not NULL. Initialized in case of
15606  *   error only.
15607  *
15608  * @return
15609  *   0 on success, otherwise negative errno value.
15610  */
15611 static int
15612 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15613                       struct mlx5_flow_meter_policy *mtr_policy,
15614                       const struct rte_flow_action *actions[RTE_COLORS],
15615                       struct rte_mtr_error *error)
15616 {
15617         int ret, i;
15618         uint16_t sub_policy_num;
15619
15620         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15621                 sub_policy_num = (mtr_policy->sub_policy_num >>
15622                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15623                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15624                 if (sub_policy_num) {
15625                         ret = __flow_dv_create_domain_policy_acts(dev,
15626                                 mtr_policy, actions,
15627                                 (enum mlx5_meter_domain)i, error);
15628                         /* Cleaning resource is done in the caller level. */
15629                         if (ret)
15630                                 return ret;
15631                 }
15632         }
15633         return 0;
15634 }
15635
15636 /**
15637  * Query a DV flow rule for its statistics via DevX.
15638  *
15639  * @param[in] dev
15640  *   Pointer to Ethernet device.
15641  * @param[in] cnt_idx
15642  *   Index to the flow counter.
15643  * @param[out] data
15644  *   Data retrieved by the query.
15645  * @param[out] error
15646  *   Perform verbose error reporting if not NULL.
15647  *
15648  * @return
15649  *   0 on success, a negative errno value otherwise and rte_errno is set.
15650  */
15651 static int
15652 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15653                     struct rte_flow_error *error)
15654 {
15655         struct mlx5_priv *priv = dev->data->dev_private;
15656         struct rte_flow_query_count *qc = data;
15657
15658         if (!priv->config.devx)
15659                 return rte_flow_error_set(error, ENOTSUP,
15660                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15661                                           NULL,
15662                                           "counters are not supported");
15663         if (cnt_idx) {
15664                 uint64_t pkts, bytes;
15665                 struct mlx5_flow_counter *cnt;
15666                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15667
15668                 if (err)
15669                         return rte_flow_error_set(error, -err,
15670                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15671                                         NULL, "cannot read counters");
15672                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15673                 qc->hits_set = 1;
15674                 qc->bytes_set = 1;
15675                 qc->hits = pkts - cnt->hits;
15676                 qc->bytes = bytes - cnt->bytes;
15677                 if (qc->reset) {
15678                         cnt->hits = pkts;
15679                         cnt->bytes = bytes;
15680                 }
15681                 return 0;
15682         }
15683         return rte_flow_error_set(error, EINVAL,
15684                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15685                                   NULL,
15686                                   "counters are not available");
15687 }
15688
15689 static int
15690 flow_dv_action_query(struct rte_eth_dev *dev,
15691                      const struct rte_flow_action_handle *handle, void *data,
15692                      struct rte_flow_error *error)
15693 {
15694         struct mlx5_age_param *age_param;
15695         struct rte_flow_query_age *resp;
15696         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15697         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15698         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15699         struct mlx5_priv *priv = dev->data->dev_private;
15700         struct mlx5_aso_ct_action *ct;
15701         uint16_t owner;
15702         uint32_t dev_idx;
15703
15704         switch (type) {
15705         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15706                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15707                 resp = data;
15708                 resp->aged = __atomic_load_n(&age_param->state,
15709                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
15710                                                                           1 : 0;
15711                 resp->sec_since_last_hit_valid = !resp->aged;
15712                 if (resp->sec_since_last_hit_valid)
15713                         resp->sec_since_last_hit = __atomic_load_n
15714                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15715                 return 0;
15716         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15717                 return flow_dv_query_count(dev, idx, data, error);
15718         case MLX5_INDIRECT_ACTION_TYPE_CT:
15719                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15720                 if (owner != PORT_ID(priv))
15721                         return rte_flow_error_set(error, EACCES,
15722                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15723                                         NULL,
15724                                         "CT object owned by another port");
15725                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15726                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15727                 MLX5_ASSERT(ct);
15728                 if (!ct->refcnt)
15729                         return rte_flow_error_set(error, EFAULT,
15730                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15731                                         NULL,
15732                                         "CT object is inactive");
15733                 ((struct rte_flow_action_conntrack *)data)->peer_port =
15734                                                         ct->peer;
15735                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15736                                                         ct->is_original;
15737                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15738                         return rte_flow_error_set(error, EIO,
15739                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15740                                         NULL,
15741                                         "Failed to query CT context");
15742                 return 0;
15743         default:
15744                 return rte_flow_error_set(error, ENOTSUP,
15745                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15746                                           "action type query not supported");
15747         }
15748 }
15749
15750 /**
15751  * Query a flow rule AGE action for aging information.
15752  *
15753  * @param[in] dev
15754  *   Pointer to Ethernet device.
15755  * @param[in] flow
15756  *   Pointer to the sub flow.
15757  * @param[out] data
15758  *   data retrieved by the query.
15759  * @param[out] error
15760  *   Perform verbose error reporting if not NULL.
15761  *
15762  * @return
15763  *   0 on success, a negative errno value otherwise and rte_errno is set.
15764  */
15765 static int
15766 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15767                   void *data, struct rte_flow_error *error)
15768 {
15769         struct rte_flow_query_age *resp = data;
15770         struct mlx5_age_param *age_param;
15771
15772         if (flow->age) {
15773                 struct mlx5_aso_age_action *act =
15774                                      flow_aso_age_get_by_idx(dev, flow->age);
15775
15776                 age_param = &act->age_params;
15777         } else if (flow->counter) {
15778                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15779
15780                 if (!age_param || !age_param->timeout)
15781                         return rte_flow_error_set
15782                                         (error, EINVAL,
15783                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15784                                          NULL, "cannot read age data");
15785         } else {
15786                 return rte_flow_error_set(error, EINVAL,
15787                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15788                                           NULL, "age data not available");
15789         }
15790         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15791                                      AGE_TMOUT ? 1 : 0;
15792         resp->sec_since_last_hit_valid = !resp->aged;
15793         if (resp->sec_since_last_hit_valid)
15794                 resp->sec_since_last_hit = __atomic_load_n
15795                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15796         return 0;
15797 }
15798
15799 /**
15800  * Query a flow.
15801  *
15802  * @see rte_flow_query()
15803  * @see rte_flow_ops
15804  */
15805 static int
15806 flow_dv_query(struct rte_eth_dev *dev,
15807               struct rte_flow *flow __rte_unused,
15808               const struct rte_flow_action *actions __rte_unused,
15809               void *data __rte_unused,
15810               struct rte_flow_error *error __rte_unused)
15811 {
15812         int ret = -EINVAL;
15813
15814         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15815                 switch (actions->type) {
15816                 case RTE_FLOW_ACTION_TYPE_VOID:
15817                         break;
15818                 case RTE_FLOW_ACTION_TYPE_COUNT:
15819                         ret = flow_dv_query_count(dev, flow->counter, data,
15820                                                   error);
15821                         break;
15822                 case RTE_FLOW_ACTION_TYPE_AGE:
15823                         ret = flow_dv_query_age(dev, flow, data, error);
15824                         break;
15825                 default:
15826                         return rte_flow_error_set(error, ENOTSUP,
15827                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15828                                                   actions,
15829                                                   "action not supported");
15830                 }
15831         }
15832         return ret;
15833 }
15834
15835 /**
15836  * Destroy the meter table set.
15837  * Lock free, (mutex should be acquired by caller).
15838  *
15839  * @param[in] dev
15840  *   Pointer to Ethernet device.
15841  * @param[in] fm
15842  *   Meter information table.
15843  */
15844 static void
15845 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15846                         struct mlx5_flow_meter_info *fm)
15847 {
15848         struct mlx5_priv *priv = dev->data->dev_private;
15849         int i;
15850
15851         if (!fm || !priv->config.dv_flow_en)
15852                 return;
15853         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15854                 if (fm->drop_rule[i]) {
15855                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15856                         fm->drop_rule[i] = NULL;
15857                 }
15858         }
15859 }
15860
15861 static void
15862 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15863 {
15864         struct mlx5_priv *priv = dev->data->dev_private;
15865         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15866         struct mlx5_flow_tbl_data_entry *tbl;
15867         int i, j;
15868
15869         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15870                 if (mtrmng->def_rule[i]) {
15871                         claim_zero(mlx5_flow_os_destroy_flow
15872                                         (mtrmng->def_rule[i]));
15873                         mtrmng->def_rule[i] = NULL;
15874                 }
15875                 if (mtrmng->def_matcher[i]) {
15876                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
15877                                 struct mlx5_flow_tbl_data_entry, tbl);
15878                         mlx5_list_unregister(tbl->matchers,
15879                                              &mtrmng->def_matcher[i]->entry);
15880                         mtrmng->def_matcher[i] = NULL;
15881                 }
15882                 for (j = 0; j < MLX5_REG_BITS; j++) {
15883                         if (mtrmng->drop_matcher[i][j]) {
15884                                 tbl =
15885                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
15886                                              struct mlx5_flow_tbl_data_entry,
15887                                              tbl);
15888                                 mlx5_list_unregister(tbl->matchers,
15889                                             &mtrmng->drop_matcher[i][j]->entry);
15890                                 mtrmng->drop_matcher[i][j] = NULL;
15891                         }
15892                 }
15893                 if (mtrmng->drop_tbl[i]) {
15894                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15895                                 mtrmng->drop_tbl[i]);
15896                         mtrmng->drop_tbl[i] = NULL;
15897                 }
15898         }
15899 }
15900
15901 /* Number of meter flow actions, count and jump or count and drop. */
15902 #define METER_ACTIONS 2
15903
15904 static void
15905 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15906                                     enum mlx5_meter_domain domain)
15907 {
15908         struct mlx5_priv *priv = dev->data->dev_private;
15909         struct mlx5_flow_meter_def_policy *def_policy =
15910                         priv->sh->mtrmng->def_policy[domain];
15911
15912         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15913         mlx5_free(def_policy);
15914         priv->sh->mtrmng->def_policy[domain] = NULL;
15915 }
15916
15917 /**
15918  * Destroy the default policy table set.
15919  *
15920  * @param[in] dev
15921  *   Pointer to Ethernet device.
15922  */
15923 static void
15924 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15925 {
15926         struct mlx5_priv *priv = dev->data->dev_private;
15927         int i;
15928
15929         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15930                 if (priv->sh->mtrmng->def_policy[i])
15931                         __flow_dv_destroy_domain_def_policy(dev,
15932                                         (enum mlx5_meter_domain)i);
15933         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15934 }
15935
15936 static int
15937 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15938                         uint32_t color_reg_c_idx,
15939                         enum rte_color color, void *matcher_object,
15940                         int actions_n, void *actions,
15941                         bool match_src_port, const struct rte_flow_item *item,
15942                         void **rule, const struct rte_flow_attr *attr)
15943 {
15944         int ret;
15945         struct mlx5_flow_dv_match_params value = {
15946                 .size = sizeof(value.buf),
15947         };
15948         struct mlx5_flow_dv_match_params matcher = {
15949                 .size = sizeof(matcher.buf),
15950         };
15951         struct mlx5_priv *priv = dev->data->dev_private;
15952         uint8_t misc_mask;
15953
15954         if (match_src_port && (priv->representor || priv->master)) {
15955                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15956                                                    value.buf, item, attr)) {
15957                         DRV_LOG(ERR, "Failed to create meter policy%d flow's"
15958                                 " value with port.", color);
15959                         return -1;
15960                 }
15961         }
15962         flow_dv_match_meta_reg(matcher.buf, value.buf,
15963                                (enum modify_reg)color_reg_c_idx,
15964                                rte_col_2_mlx5_col(color), UINT32_MAX);
15965         misc_mask = flow_dv_matcher_enable(value.buf);
15966         __flow_dv_adjust_buf_size(&value.size, misc_mask);
15967         ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
15968                                        actions_n, actions, rule);
15969         if (ret) {
15970                 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
15971                 return -1;
15972         }
15973         return 0;
15974 }
15975
15976 static int
15977 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15978                         uint32_t color_reg_c_idx,
15979                         uint16_t priority,
15980                         struct mlx5_flow_meter_sub_policy *sub_policy,
15981                         const struct rte_flow_attr *attr,
15982                         bool match_src_port,
15983                         const struct rte_flow_item *item,
15984                         struct mlx5_flow_dv_matcher **policy_matcher,
15985                         struct rte_flow_error *error)
15986 {
15987         struct mlx5_list_entry *entry;
15988         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
15989         struct mlx5_flow_dv_matcher matcher = {
15990                 .mask = {
15991                         .size = sizeof(matcher.mask.buf),
15992                 },
15993                 .tbl = tbl_rsc,
15994         };
15995         struct mlx5_flow_dv_match_params value = {
15996                 .size = sizeof(value.buf),
15997         };
15998         struct mlx5_flow_cb_ctx ctx = {
15999                 .error = error,
16000                 .data = &matcher,
16001         };
16002         struct mlx5_flow_tbl_data_entry *tbl_data;
16003         struct mlx5_priv *priv = dev->data->dev_private;
16004         const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16005
16006         if (match_src_port && (priv->representor || priv->master)) {
16007                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16008                                                    value.buf, item, attr)) {
16009                         DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16010                                 " with port.", priority);
16011                         return -1;
16012                 }
16013         }
16014         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16015         if (priority < RTE_COLOR_RED)
16016                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16017                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
16018         matcher.priority = priority;
16019         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16020                                     matcher.mask.size);
16021         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16022         if (!entry) {
16023                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16024                 return -1;
16025         }
16026         *policy_matcher =
16027                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16028         return 0;
16029 }
16030
16031 /**
16032  * Create the policy rules per domain.
16033  *
16034  * @param[in] dev
16035  *   Pointer to Ethernet device.
16036  * @param[in] sub_policy
16037  *    Pointer to sub policy table..
16038  * @param[in] egress
16039  *   Direction of the table.
16040  * @param[in] transfer
16041  *   E-Switch or NIC flow.
16042  * @param[in] acts
16043  *   Pointer to policy action list per color.
16044  *
16045  * @return
16046  *   0 on success, -1 otherwise.
16047  */
16048 static int
16049 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16050                 struct mlx5_flow_meter_sub_policy *sub_policy,
16051                 uint8_t egress, uint8_t transfer, bool match_src_port,
16052                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16053 {
16054         struct mlx5_priv *priv = dev->data->dev_private;
16055         struct rte_flow_error flow_err;
16056         uint32_t color_reg_c_idx;
16057         struct rte_flow_attr attr = {
16058                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16059                 .priority = 0,
16060                 .ingress = 0,
16061                 .egress = !!egress,
16062                 .transfer = !!transfer,
16063                 .reserved = 0,
16064         };
16065         int i;
16066         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16067         struct mlx5_sub_policy_color_rule *color_rule;
16068         bool svport_match;
16069         struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16070
16071         if (ret < 0)
16072                 return -1;
16073         /* Create policy table with POLICY level. */
16074         if (!sub_policy->tbl_rsc)
16075                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16076                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
16077                                 egress, transfer, false, NULL, 0, 0,
16078                                 sub_policy->idx, &flow_err);
16079         if (!sub_policy->tbl_rsc) {
16080                 DRV_LOG(ERR,
16081                         "Failed to create meter sub policy table.");
16082                 return -1;
16083         }
16084         /* Prepare matchers. */
16085         color_reg_c_idx = ret;
16086         for (i = 0; i < RTE_COLORS; i++) {
16087                 TAILQ_INIT(&sub_policy->color_rules[i]);
16088                 if (!acts[i].actions_n)
16089                         continue;
16090                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16091                                 sizeof(struct mlx5_sub_policy_color_rule),
16092                                 0, SOCKET_ID_ANY);
16093                 if (!color_rule) {
16094                         DRV_LOG(ERR, "No memory to create color rule.");
16095                         goto err_exit;
16096                 }
16097                 tmp_rules[i] = color_rule;
16098                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16099                                   color_rule, next_port);
16100                 color_rule->src_port = priv->representor_id;
16101                 /* No use. */
16102                 attr.priority = i;
16103                 /* Create matchers for colors. */
16104                 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16105                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16106                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16107                                 &attr, svport_match, NULL,
16108                                 &color_rule->matcher, &flow_err)) {
16109                         DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16110                         goto err_exit;
16111                 }
16112                 /* Create flow, matching color. */
16113                 if (__flow_dv_create_policy_flow(dev,
16114                                 color_reg_c_idx, (enum rte_color)i,
16115                                 color_rule->matcher->matcher_object,
16116                                 acts[i].actions_n, acts[i].dv_actions,
16117                                 svport_match, NULL, &color_rule->rule,
16118                                 &attr)) {
16119                         DRV_LOG(ERR, "Failed to create color%u rule.", i);
16120                         goto err_exit;
16121                 }
16122         }
16123         return 0;
16124 err_exit:
16125         /* All the policy rules will be cleared. */
16126         do {
16127                 color_rule = tmp_rules[i];
16128                 if (color_rule) {
16129                         if (color_rule->rule)
16130                                 mlx5_flow_os_destroy_flow(color_rule->rule);
16131                         if (color_rule->matcher) {
16132                                 struct mlx5_flow_tbl_data_entry *tbl =
16133                                         container_of(color_rule->matcher->tbl,
16134                                                      typeof(*tbl), tbl);
16135                                 mlx5_list_unregister(tbl->matchers,
16136                                                 &color_rule->matcher->entry);
16137                         }
16138                         TAILQ_REMOVE(&sub_policy->color_rules[i],
16139                                      color_rule, next_port);
16140                         mlx5_free(color_rule);
16141                 }
16142         } while (i--);
16143         return -1;
16144 }
16145
16146 static int
16147 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16148                         struct mlx5_flow_meter_policy *mtr_policy,
16149                         struct mlx5_flow_meter_sub_policy *sub_policy,
16150                         uint32_t domain)
16151 {
16152         struct mlx5_priv *priv = dev->data->dev_private;
16153         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16154         struct mlx5_flow_dv_tag_resource *tag;
16155         struct mlx5_flow_dv_port_id_action_resource *port_action;
16156         struct mlx5_hrxq *hrxq;
16157         struct mlx5_flow_meter_info *next_fm = NULL;
16158         struct mlx5_flow_meter_policy *next_policy;
16159         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16160         struct mlx5_flow_tbl_data_entry *tbl_data;
16161         struct rte_flow_error error;
16162         uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16163         uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16164         bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16165         bool match_src_port = false;
16166         int i;
16167
16168         /* If RSS or Queue, no previous actions / rules is created. */
16169         for (i = 0; i < RTE_COLORS; i++) {
16170                 acts[i].actions_n = 0;
16171                 if (i == RTE_COLOR_RED) {
16172                         /* Only support drop on red. */
16173                         acts[i].dv_actions[0] =
16174                                 mtr_policy->dr_drop_action[domain];
16175                         acts[i].actions_n = 1;
16176                         continue;
16177                 }
16178                 if (i == RTE_COLOR_GREEN &&
16179                     mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16180                         struct rte_flow_attr attr = {
16181                                 .transfer = transfer
16182                         };
16183
16184                         next_fm = mlx5_flow_meter_find(priv,
16185                                         mtr_policy->act_cnt[i].next_mtr_id,
16186                                         NULL);
16187                         if (!next_fm) {
16188                                 DRV_LOG(ERR,
16189                                         "Failed to get next hierarchy meter.");
16190                                 goto err_exit;
16191                         }
16192                         if (mlx5_flow_meter_attach(priv, next_fm,
16193                                                    &attr, &error)) {
16194                                 DRV_LOG(ERR, "%s", error.message);
16195                                 next_fm = NULL;
16196                                 goto err_exit;
16197                         }
16198                         /* Meter action must be the first for TX. */
16199                         if (mtr_first) {
16200                                 acts[i].dv_actions[acts[i].actions_n] =
16201                                         next_fm->meter_action;
16202                                 acts[i].actions_n++;
16203                         }
16204                 }
16205                 if (mtr_policy->act_cnt[i].rix_mark) {
16206                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16207                                         mtr_policy->act_cnt[i].rix_mark);
16208                         if (!tag) {
16209                                 DRV_LOG(ERR, "Failed to find "
16210                                 "mark action for policy.");
16211                                 goto err_exit;
16212                         }
16213                         acts[i].dv_actions[acts[i].actions_n] = tag->action;
16214                         acts[i].actions_n++;
16215                 }
16216                 if (mtr_policy->act_cnt[i].modify_hdr) {
16217                         acts[i].dv_actions[acts[i].actions_n] =
16218                                 mtr_policy->act_cnt[i].modify_hdr->action;
16219                         acts[i].actions_n++;
16220                 }
16221                 if (mtr_policy->act_cnt[i].fate_action) {
16222                         switch (mtr_policy->act_cnt[i].fate_action) {
16223                         case MLX5_FLOW_FATE_PORT_ID:
16224                                 port_action = mlx5_ipool_get
16225                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16226                                 mtr_policy->act_cnt[i].rix_port_id_action);
16227                                 if (!port_action) {
16228                                         DRV_LOG(ERR, "Failed to find "
16229                                                 "port action for policy.");
16230                                         goto err_exit;
16231                                 }
16232                                 acts[i].dv_actions[acts[i].actions_n] =
16233                                         port_action->action;
16234                                 acts[i].actions_n++;
16235                                 mtr_policy->dev = dev;
16236                                 match_src_port = true;
16237                                 break;
16238                         case MLX5_FLOW_FATE_DROP:
16239                         case MLX5_FLOW_FATE_JUMP:
16240                                 acts[i].dv_actions[acts[i].actions_n] =
16241                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
16242                                 acts[i].actions_n++;
16243                                 break;
16244                         case MLX5_FLOW_FATE_SHARED_RSS:
16245                         case MLX5_FLOW_FATE_QUEUE:
16246                                 hrxq = mlx5_ipool_get
16247                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16248                                          sub_policy->rix_hrxq[i]);
16249                                 if (!hrxq) {
16250                                         DRV_LOG(ERR, "Failed to find "
16251                                                 "queue action for policy.");
16252                                         goto err_exit;
16253                                 }
16254                                 acts[i].dv_actions[acts[i].actions_n] =
16255                                         hrxq->action;
16256                                 acts[i].actions_n++;
16257                                 break;
16258                         case MLX5_FLOW_FATE_MTR:
16259                                 if (!next_fm) {
16260                                         DRV_LOG(ERR,
16261                                                 "No next hierarchy meter.");
16262                                         goto err_exit;
16263                                 }
16264                                 if (!mtr_first) {
16265                                         acts[i].dv_actions[acts[i].actions_n] =
16266                                                         next_fm->meter_action;
16267                                         acts[i].actions_n++;
16268                                 }
16269                                 if (mtr_policy->act_cnt[i].next_sub_policy) {
16270                                         next_sub_policy =
16271                                         mtr_policy->act_cnt[i].next_sub_policy;
16272                                 } else {
16273                                         next_policy =
16274                                                 mlx5_flow_meter_policy_find(dev,
16275                                                 next_fm->policy_id, NULL);
16276                                         MLX5_ASSERT(next_policy);
16277                                         next_sub_policy =
16278                                         next_policy->sub_policys[domain][0];
16279                                 }
16280                                 tbl_data =
16281                                         container_of(next_sub_policy->tbl_rsc,
16282                                         struct mlx5_flow_tbl_data_entry, tbl);
16283                                 acts[i].dv_actions[acts[i].actions_n++] =
16284                                                         tbl_data->jump.action;
16285                                 if (mtr_policy->act_cnt[i].modify_hdr)
16286                                         match_src_port = !!transfer;
16287                                 break;
16288                         default:
16289                                 /*Queue action do nothing*/
16290                                 break;
16291                         }
16292                 }
16293         }
16294         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16295                                 egress, transfer, match_src_port, acts)) {
16296                 DRV_LOG(ERR,
16297                         "Failed to create policy rules per domain.");
16298                 goto err_exit;
16299         }
16300         return 0;
16301 err_exit:
16302         if (next_fm)
16303                 mlx5_flow_meter_detach(priv, next_fm);
16304         return -1;
16305 }
16306
16307 /**
16308  * Create the policy rules.
16309  *
16310  * @param[in] dev
16311  *   Pointer to Ethernet device.
16312  * @param[in,out] mtr_policy
16313  *   Pointer to meter policy table.
16314  *
16315  * @return
16316  *   0 on success, -1 otherwise.
16317  */
16318 static int
16319 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16320                              struct mlx5_flow_meter_policy *mtr_policy)
16321 {
16322         int i;
16323         uint16_t sub_policy_num;
16324
16325         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16326                 sub_policy_num = (mtr_policy->sub_policy_num >>
16327                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16328                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16329                 if (!sub_policy_num)
16330                         continue;
16331                 /* Prepare actions list and create policy rules. */
16332                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16333                         mtr_policy->sub_policys[i][0], i)) {
16334                         DRV_LOG(ERR, "Failed to create policy action "
16335                                 "list per domain.");
16336                         return -1;
16337                 }
16338         }
16339         return 0;
16340 }
16341
16342 static int
16343 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16344 {
16345         struct mlx5_priv *priv = dev->data->dev_private;
16346         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16347         struct mlx5_flow_meter_def_policy *def_policy;
16348         struct mlx5_flow_tbl_resource *jump_tbl;
16349         struct mlx5_flow_tbl_data_entry *tbl_data;
16350         uint8_t egress, transfer;
16351         struct rte_flow_error error;
16352         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16353         int ret;
16354
16355         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16356         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16357         def_policy = mtrmng->def_policy[domain];
16358         if (!def_policy) {
16359                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16360                         sizeof(struct mlx5_flow_meter_def_policy),
16361                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16362                 if (!def_policy) {
16363                         DRV_LOG(ERR, "Failed to alloc default policy table.");
16364                         goto def_policy_error;
16365                 }
16366                 mtrmng->def_policy[domain] = def_policy;
16367                 /* Create the meter suffix table with SUFFIX level. */
16368                 jump_tbl = flow_dv_tbl_resource_get(dev,
16369                                 MLX5_FLOW_TABLE_LEVEL_METER,
16370                                 egress, transfer, false, NULL, 0,
16371                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16372                 if (!jump_tbl) {
16373                         DRV_LOG(ERR,
16374                                 "Failed to create meter suffix table.");
16375                         goto def_policy_error;
16376                 }
16377                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16378                 tbl_data = container_of(jump_tbl,
16379                                         struct mlx5_flow_tbl_data_entry, tbl);
16380                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16381                                                 tbl_data->jump.action;
16382                 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16383                 acts[RTE_COLOR_GREEN].actions_n = 1;
16384                 /*
16385                  * YELLOW has the same default policy as GREEN does.
16386                  * G & Y share the same table and action. The 2nd time of table
16387                  * resource getting is just to update the reference count for
16388                  * the releasing stage.
16389                  */
16390                 jump_tbl = flow_dv_tbl_resource_get(dev,
16391                                 MLX5_FLOW_TABLE_LEVEL_METER,
16392                                 egress, transfer, false, NULL, 0,
16393                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16394                 if (!jump_tbl) {
16395                         DRV_LOG(ERR,
16396                                 "Failed to get meter suffix table.");
16397                         goto def_policy_error;
16398                 }
16399                 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16400                 tbl_data = container_of(jump_tbl,
16401                                         struct mlx5_flow_tbl_data_entry, tbl);
16402                 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16403                                                 tbl_data->jump.action;
16404                 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16405                 acts[RTE_COLOR_YELLOW].actions_n = 1;
16406                 /* Create jump action to the drop table. */
16407                 if (!mtrmng->drop_tbl[domain]) {
16408                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16409                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16410                                  egress, transfer, false, NULL, 0,
16411                                  0, MLX5_MTR_TABLE_ID_DROP, &error);
16412                         if (!mtrmng->drop_tbl[domain]) {
16413                                 DRV_LOG(ERR, "Failed to create meter "
16414                                         "drop table for default policy.");
16415                                 goto def_policy_error;
16416                         }
16417                 }
16418                 /* all RED: unique Drop table for jump action. */
16419                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16420                                         struct mlx5_flow_tbl_data_entry, tbl);
16421                 def_policy->dr_jump_action[RTE_COLOR_RED] =
16422                                                 tbl_data->jump.action;
16423                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16424                 acts[RTE_COLOR_RED].actions_n = 1;
16425                 /* Create default policy rules. */
16426                 ret = __flow_dv_create_domain_policy_rules(dev,
16427                                         &def_policy->sub_policy,
16428                                         egress, transfer, false, acts);
16429                 if (ret) {
16430                         DRV_LOG(ERR, "Failed to create default policy rules.");
16431                         goto def_policy_error;
16432                 }
16433         }
16434         return 0;
16435 def_policy_error:
16436         __flow_dv_destroy_domain_def_policy(dev,
16437                                             (enum mlx5_meter_domain)domain);
16438         return -1;
16439 }
16440
16441 /**
16442  * Create the default policy table set.
16443  *
16444  * @param[in] dev
16445  *   Pointer to Ethernet device.
16446  * @return
16447  *   0 on success, -1 otherwise.
16448  */
16449 static int
16450 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16451 {
16452         struct mlx5_priv *priv = dev->data->dev_private;
16453         int i;
16454
16455         /* Non-termination policy table. */
16456         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16457                 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16458                         continue;
16459                 if (__flow_dv_create_domain_def_policy(dev, i)) {
16460                         DRV_LOG(ERR, "Failed to create default policy");
16461                         /* Rollback the created default policies for others. */
16462                         flow_dv_destroy_def_policy(dev);
16463                         return -1;
16464                 }
16465         }
16466         return 0;
16467 }
16468
16469 /**
16470  * Create the needed meter tables.
16471  * Lock free, (mutex should be acquired by caller).
16472  *
16473  * @param[in] dev
16474  *   Pointer to Ethernet device.
16475  * @param[in] fm
16476  *   Meter information table.
16477  * @param[in] mtr_idx
16478  *   Meter index.
16479  * @param[in] domain_bitmap
16480  *   Domain bitmap.
16481  * @return
16482  *   0 on success, -1 otherwise.
16483  */
16484 static int
16485 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16486                         struct mlx5_flow_meter_info *fm,
16487                         uint32_t mtr_idx,
16488                         uint8_t domain_bitmap)
16489 {
16490         struct mlx5_priv *priv = dev->data->dev_private;
16491         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16492         struct rte_flow_error error;
16493         struct mlx5_flow_tbl_data_entry *tbl_data;
16494         uint8_t egress, transfer;
16495         void *actions[METER_ACTIONS];
16496         int domain, ret, i;
16497         struct mlx5_flow_counter *cnt;
16498         struct mlx5_flow_dv_match_params value = {
16499                 .size = sizeof(value.buf),
16500         };
16501         struct mlx5_flow_dv_match_params matcher_para = {
16502                 .size = sizeof(matcher_para.buf),
16503         };
16504         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16505                                                      0, &error);
16506         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16507         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16508         struct mlx5_list_entry *entry;
16509         struct mlx5_flow_dv_matcher matcher = {
16510                 .mask = {
16511                         .size = sizeof(matcher.mask.buf),
16512                 },
16513         };
16514         struct mlx5_flow_dv_matcher *drop_matcher;
16515         struct mlx5_flow_cb_ctx ctx = {
16516                 .error = &error,
16517                 .data = &matcher,
16518         };
16519         uint8_t misc_mask;
16520
16521         if (!priv->mtr_en || mtr_id_reg_c < 0) {
16522                 rte_errno = ENOTSUP;
16523                 return -1;
16524         }
16525         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16526                 if (!(domain_bitmap & (1 << domain)) ||
16527                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
16528                         continue;
16529                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16530                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16531                 /* Create the drop table with METER DROP level. */
16532                 if (!mtrmng->drop_tbl[domain]) {
16533                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16534                                         MLX5_FLOW_TABLE_LEVEL_METER,
16535                                         egress, transfer, false, NULL, 0,
16536                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
16537                         if (!mtrmng->drop_tbl[domain]) {
16538                                 DRV_LOG(ERR, "Failed to create meter drop table.");
16539                                 goto policy_error;
16540                         }
16541                 }
16542                 /* Create default matcher in drop table. */
16543                 matcher.tbl = mtrmng->drop_tbl[domain],
16544                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16545                                 struct mlx5_flow_tbl_data_entry, tbl);
16546                 if (!mtrmng->def_matcher[domain]) {
16547                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16548                                        (enum modify_reg)mtr_id_reg_c,
16549                                        0, 0);
16550                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16551                         matcher.crc = rte_raw_cksum
16552                                         ((const void *)matcher.mask.buf,
16553                                         matcher.mask.size);
16554                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16555                         if (!entry) {
16556                                 DRV_LOG(ERR, "Failed to register meter "
16557                                 "drop default matcher.");
16558                                 goto policy_error;
16559                         }
16560                         mtrmng->def_matcher[domain] = container_of(entry,
16561                         struct mlx5_flow_dv_matcher, entry);
16562                 }
16563                 /* Create default rule in drop table. */
16564                 if (!mtrmng->def_rule[domain]) {
16565                         i = 0;
16566                         actions[i++] = priv->sh->dr_drop_action;
16567                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16568                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
16569                         misc_mask = flow_dv_matcher_enable(value.buf);
16570                         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16571                         ret = mlx5_flow_os_create_flow
16572                                 (mtrmng->def_matcher[domain]->matcher_object,
16573                                 (void *)&value, i, actions,
16574                                 &mtrmng->def_rule[domain]);
16575                         if (ret) {
16576                                 DRV_LOG(ERR, "Failed to create meter "
16577                                 "default drop rule for drop table.");
16578                                 goto policy_error;
16579                         }
16580                 }
16581                 if (!fm->drop_cnt)
16582                         continue;
16583                 MLX5_ASSERT(mtrmng->max_mtr_bits);
16584                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16585                         /* Create matchers for Drop. */
16586                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16587                                         (enum modify_reg)mtr_id_reg_c, 0,
16588                                         (mtr_id_mask << mtr_id_offset));
16589                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16590                         matcher.crc = rte_raw_cksum
16591                                         ((const void *)matcher.mask.buf,
16592                                         matcher.mask.size);
16593                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16594                         if (!entry) {
16595                                 DRV_LOG(ERR,
16596                                 "Failed to register meter drop matcher.");
16597                                 goto policy_error;
16598                         }
16599                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16600                                 container_of(entry, struct mlx5_flow_dv_matcher,
16601                                              entry);
16602                 }
16603                 drop_matcher =
16604                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16605                 /* Create drop rule, matching meter_id only. */
16606                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16607                                 (enum modify_reg)mtr_id_reg_c,
16608                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
16609                 i = 0;
16610                 cnt = flow_dv_counter_get_by_idx(dev,
16611                                         fm->drop_cnt, NULL);
16612                 actions[i++] = cnt->action;
16613                 actions[i++] = priv->sh->dr_drop_action;
16614                 misc_mask = flow_dv_matcher_enable(value.buf);
16615                 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16616                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16617                                                (void *)&value, i, actions,
16618                                                &fm->drop_rule[domain]);
16619                 if (ret) {
16620                         DRV_LOG(ERR, "Failed to create meter "
16621                                 "drop rule for drop table.");
16622                                 goto policy_error;
16623                 }
16624         }
16625         return 0;
16626 policy_error:
16627         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16628                 if (fm->drop_rule[i]) {
16629                         claim_zero(mlx5_flow_os_destroy_flow
16630                                 (fm->drop_rule[i]));
16631                         fm->drop_rule[i] = NULL;
16632                 }
16633         }
16634         return -1;
16635 }
16636
16637 static struct mlx5_flow_meter_sub_policy *
16638 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16639                 struct mlx5_flow_meter_policy *mtr_policy,
16640                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16641                 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16642                 bool *is_reuse)
16643 {
16644         struct mlx5_priv *priv = dev->data->dev_private;
16645         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16646         uint32_t sub_policy_idx = 0;
16647         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16648         uint32_t i, j;
16649         struct mlx5_hrxq *hrxq;
16650         struct mlx5_flow_handle dh;
16651         struct mlx5_meter_policy_action_container *act_cnt;
16652         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16653         uint16_t sub_policy_num;
16654
16655         rte_spinlock_lock(&mtr_policy->sl);
16656         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16657                 if (!rss_desc[i])
16658                         continue;
16659                 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16660                 if (!hrxq_idx[i]) {
16661                         rte_spinlock_unlock(&mtr_policy->sl);
16662                         return NULL;
16663                 }
16664         }
16665         sub_policy_num = (mtr_policy->sub_policy_num >>
16666                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16667                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16668         for (j = 0; j < sub_policy_num; j++) {
16669                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16670                         if (rss_desc[i] &&
16671                             hrxq_idx[i] !=
16672                             mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16673                                 break;
16674                 }
16675                 if (i >= MLX5_MTR_RTE_COLORS) {
16676                         /*
16677                          * Found the sub policy table with
16678                          * the same queue per color.
16679                          */
16680                         rte_spinlock_unlock(&mtr_policy->sl);
16681                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16682                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16683                         *is_reuse = true;
16684                         return mtr_policy->sub_policys[domain][j];
16685                 }
16686         }
16687         /* Create sub policy. */
16688         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16689                 /* Reuse the first pre-allocated sub_policy. */
16690                 sub_policy = mtr_policy->sub_policys[domain][0];
16691                 sub_policy_idx = sub_policy->idx;
16692         } else {
16693                 sub_policy = mlx5_ipool_zmalloc
16694                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16695                                  &sub_policy_idx);
16696                 if (!sub_policy ||
16697                     sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16698                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16699                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16700                         goto rss_sub_policy_error;
16701                 }
16702                 sub_policy->idx = sub_policy_idx;
16703                 sub_policy->main_policy = mtr_policy;
16704         }
16705         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16706                 if (!rss_desc[i])
16707                         continue;
16708                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16709                 if (mtr_policy->is_hierarchy) {
16710                         act_cnt = &mtr_policy->act_cnt[i];
16711                         act_cnt->next_sub_policy = next_sub_policy;
16712                         mlx5_hrxq_release(dev, hrxq_idx[i]);
16713                 } else {
16714                         /*
16715                          * Overwrite the last action from
16716                          * RSS action to Queue action.
16717                          */
16718                         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16719                                               hrxq_idx[i]);
16720                         if (!hrxq) {
16721                                 DRV_LOG(ERR, "Failed to get policy hrxq");
16722                                 goto rss_sub_policy_error;
16723                         }
16724                         act_cnt = &mtr_policy->act_cnt[i];
16725                         if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16726                                 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16727                                 if (act_cnt->rix_mark)
16728                                         dh.mark = 1;
16729                                 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16730                                 dh.rix_hrxq = hrxq_idx[i];
16731                                 flow_drv_rxq_flags_set(dev, &dh);
16732                         }
16733                 }
16734         }
16735         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16736                                                sub_policy, domain)) {
16737                 DRV_LOG(ERR, "Failed to create policy "
16738                         "rules for ingress domain.");
16739                 goto rss_sub_policy_error;
16740         }
16741         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16742                 i = (mtr_policy->sub_policy_num >>
16743                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16744                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16745                 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16746                         DRV_LOG(ERR, "No free sub-policy slot.");
16747                         goto rss_sub_policy_error;
16748                 }
16749                 mtr_policy->sub_policys[domain][i] = sub_policy;
16750                 i++;
16751                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16752                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16753                 mtr_policy->sub_policy_num |=
16754                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16755                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16756         }
16757         rte_spinlock_unlock(&mtr_policy->sl);
16758         *is_reuse = false;
16759         return sub_policy;
16760 rss_sub_policy_error:
16761         if (sub_policy) {
16762                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16763                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16764                         i = (mtr_policy->sub_policy_num >>
16765                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16766                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16767                         mtr_policy->sub_policys[domain][i] = NULL;
16768                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16769                                         sub_policy->idx);
16770                 }
16771         }
16772         rte_spinlock_unlock(&mtr_policy->sl);
16773         return NULL;
16774 }
16775
16776 /**
16777  * Find the policy table for prefix table with RSS.
16778  *
16779  * @param[in] dev
16780  *   Pointer to Ethernet device.
16781  * @param[in] mtr_policy
16782  *   Pointer to meter policy table.
16783  * @param[in] rss_desc
16784  *   Pointer to rss_desc
16785  * @return
16786  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
16787  */
16788 static struct mlx5_flow_meter_sub_policy *
16789 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16790                 struct mlx5_flow_meter_policy *mtr_policy,
16791                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16792 {
16793         struct mlx5_priv *priv = dev->data->dev_private;
16794         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16795         struct mlx5_flow_meter_info *next_fm;
16796         struct mlx5_flow_meter_policy *next_policy;
16797         struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16798         struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16799         struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16800         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16801         bool reuse_sub_policy;
16802         uint32_t i = 0;
16803         uint32_t j = 0;
16804
16805         while (true) {
16806                 /* Iterate hierarchy to get all policies in this hierarchy. */
16807                 policies[i++] = mtr_policy;
16808                 if (!mtr_policy->is_hierarchy)
16809                         break;
16810                 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16811                         DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16812                         return NULL;
16813                 }
16814                 next_fm = mlx5_flow_meter_find(priv,
16815                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16816                 if (!next_fm) {
16817                         DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16818                         return NULL;
16819                 }
16820                 next_policy =
16821                         mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16822                                                     NULL);
16823                 MLX5_ASSERT(next_policy);
16824                 mtr_policy = next_policy;
16825         }
16826         while (i) {
16827                 /**
16828                  * From last policy to the first one in hierarchy,
16829                  * create / get the sub policy for each of them.
16830                  */
16831                 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16832                                                         policies[--i],
16833                                                         rss_desc,
16834                                                         next_sub_policy,
16835                                                         &reuse_sub_policy);
16836                 if (!sub_policy) {
16837                         DRV_LOG(ERR, "Failed to get the sub policy.");
16838                         goto err_exit;
16839                 }
16840                 if (!reuse_sub_policy)
16841                         sub_policies[j++] = sub_policy;
16842                 next_sub_policy = sub_policy;
16843         }
16844         return sub_policy;
16845 err_exit:
16846         while (j) {
16847                 uint16_t sub_policy_num;
16848
16849                 sub_policy = sub_policies[--j];
16850                 mtr_policy = sub_policy->main_policy;
16851                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16852                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16853                         sub_policy_num = (mtr_policy->sub_policy_num >>
16854                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16855                                 MLX5_MTR_SUB_POLICY_NUM_MASK;
16856                         mtr_policy->sub_policys[domain][sub_policy_num - 1] =
16857                                                                         NULL;
16858                         sub_policy_num--;
16859                         mtr_policy->sub_policy_num &=
16860                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16861                                   (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
16862                         mtr_policy->sub_policy_num |=
16863                         (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16864                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
16865                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16866                                         sub_policy->idx);
16867                 }
16868         }
16869         return NULL;
16870 }
16871
16872 /**
16873  * Create the sub policy tag rule for all meters in hierarchy.
16874  *
16875  * @param[in] dev
16876  *   Pointer to Ethernet device.
16877  * @param[in] fm
16878  *   Meter information table.
16879  * @param[in] src_port
16880  *   The src port this extra rule should use.
16881  * @param[in] item
16882  *   The src port match item.
16883  * @param[out] error
16884  *   Perform verbose error reporting if not NULL.
16885  * @return
16886  *   0 on success, a negative errno value otherwise and rte_errno is set.
16887  */
16888 static int
16889 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
16890                                 struct mlx5_flow_meter_info *fm,
16891                                 int32_t src_port,
16892                                 const struct rte_flow_item *item,
16893                                 struct rte_flow_error *error)
16894 {
16895         struct mlx5_priv *priv = dev->data->dev_private;
16896         struct mlx5_flow_meter_policy *mtr_policy;
16897         struct mlx5_flow_meter_sub_policy *sub_policy;
16898         struct mlx5_flow_meter_info *next_fm = NULL;
16899         struct mlx5_flow_meter_policy *next_policy;
16900         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16901         struct mlx5_flow_tbl_data_entry *tbl_data;
16902         struct mlx5_sub_policy_color_rule *color_rule;
16903         struct mlx5_meter_policy_acts acts;
16904         uint32_t color_reg_c_idx;
16905         bool mtr_first = (src_port != UINT16_MAX) ? true : false;
16906         struct rte_flow_attr attr = {
16907                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16908                 .priority = 0,
16909                 .ingress = 0,
16910                 .egress = 0,
16911                 .transfer = 1,
16912                 .reserved = 0,
16913         };
16914         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
16915         int i;
16916
16917         mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
16918         MLX5_ASSERT(mtr_policy);
16919         if (!mtr_policy->is_hierarchy)
16920                 return 0;
16921         next_fm = mlx5_flow_meter_find(priv,
16922                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16923         if (!next_fm) {
16924                 return rte_flow_error_set(error, EINVAL,
16925                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16926                                 "Failed to find next meter in hierarchy.");
16927         }
16928         if (!next_fm->drop_cnt)
16929                 goto exit;
16930         color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
16931         sub_policy = mtr_policy->sub_policys[domain][0];
16932         for (i = 0; i < RTE_COLORS; i++) {
16933                 bool rule_exist = false;
16934                 struct mlx5_meter_policy_action_container *act_cnt;
16935
16936                 if (i >= RTE_COLOR_YELLOW)
16937                         break;
16938                 TAILQ_FOREACH(color_rule,
16939                               &sub_policy->color_rules[i], next_port)
16940                         if (color_rule->src_port == src_port) {
16941                                 rule_exist = true;
16942                                 break;
16943                         }
16944                 if (rule_exist)
16945                         continue;
16946                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16947                                 sizeof(struct mlx5_sub_policy_color_rule),
16948                                 0, SOCKET_ID_ANY);
16949                 if (!color_rule)
16950                         return rte_flow_error_set(error, ENOMEM,
16951                                 RTE_FLOW_ERROR_TYPE_ACTION,
16952                                 NULL, "No memory to create tag color rule.");
16953                 color_rule->src_port = src_port;
16954                 attr.priority = i;
16955                 next_policy = mlx5_flow_meter_policy_find(dev,
16956                                                 next_fm->policy_id, NULL);
16957                 MLX5_ASSERT(next_policy);
16958                 next_sub_policy = next_policy->sub_policys[domain][0];
16959                 tbl_data = container_of(next_sub_policy->tbl_rsc,
16960                                         struct mlx5_flow_tbl_data_entry, tbl);
16961                 act_cnt = &mtr_policy->act_cnt[i];
16962                 if (mtr_first) {
16963                         acts.dv_actions[0] = next_fm->meter_action;
16964                         acts.dv_actions[1] = act_cnt->modify_hdr->action;
16965                 } else {
16966                         acts.dv_actions[0] = act_cnt->modify_hdr->action;
16967                         acts.dv_actions[1] = next_fm->meter_action;
16968                 }
16969                 acts.dv_actions[2] = tbl_data->jump.action;
16970                 acts.actions_n = 3;
16971                 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
16972                         next_fm = NULL;
16973                         goto err_exit;
16974                 }
16975                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16976                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16977                                 &attr, true, item,
16978                                 &color_rule->matcher, error)) {
16979                         rte_flow_error_set(error, errno,
16980                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16981                                 "Failed to create hierarchy meter matcher.");
16982                         goto err_exit;
16983                 }
16984                 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
16985                                         (enum rte_color)i,
16986                                         color_rule->matcher->matcher_object,
16987                                         acts.actions_n, acts.dv_actions,
16988                                         true, item,
16989                                         &color_rule->rule, &attr)) {
16990                         rte_flow_error_set(error, errno,
16991                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16992                                 "Failed to create hierarchy meter rule.");
16993                         goto err_exit;
16994                 }
16995                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16996                                   color_rule, next_port);
16997         }
16998 exit:
16999         /**
17000          * Recursive call to iterate all meters in hierarchy and
17001          * create needed rules.
17002          */
17003         return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17004                                                 src_port, item, error);
17005 err_exit:
17006         if (color_rule) {
17007                 if (color_rule->rule)
17008                         mlx5_flow_os_destroy_flow(color_rule->rule);
17009                 if (color_rule->matcher) {
17010                         struct mlx5_flow_tbl_data_entry *tbl =
17011                                 container_of(color_rule->matcher->tbl,
17012                                                 typeof(*tbl), tbl);
17013                         mlx5_list_unregister(tbl->matchers,
17014                                                 &color_rule->matcher->entry);
17015                 }
17016                 mlx5_free(color_rule);
17017         }
17018         if (next_fm)
17019                 mlx5_flow_meter_detach(priv, next_fm);
17020         return -rte_errno;
17021 }
17022
17023 /**
17024  * Destroy the sub policy table with RX queue.
17025  *
17026  * @param[in] dev
17027  *   Pointer to Ethernet device.
17028  * @param[in] mtr_policy
17029  *   Pointer to meter policy table.
17030  */
17031 static void
17032 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17033                                     struct mlx5_flow_meter_policy *mtr_policy)
17034 {
17035         struct mlx5_priv *priv = dev->data->dev_private;
17036         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17037         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17038         uint32_t i, j;
17039         uint16_t sub_policy_num, new_policy_num;
17040
17041         rte_spinlock_lock(&mtr_policy->sl);
17042         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17043                 switch (mtr_policy->act_cnt[i].fate_action) {
17044                 case MLX5_FLOW_FATE_SHARED_RSS:
17045                         sub_policy_num = (mtr_policy->sub_policy_num >>
17046                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17047                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17048                         new_policy_num = sub_policy_num;
17049                         for (j = 0; j < sub_policy_num; j++) {
17050                                 sub_policy =
17051                                         mtr_policy->sub_policys[domain][j];
17052                                 if (sub_policy) {
17053                                         __flow_dv_destroy_sub_policy_rules(dev,
17054                                                 sub_policy);
17055                                 if (sub_policy !=
17056                                         mtr_policy->sub_policys[domain][0]) {
17057                                         mtr_policy->sub_policys[domain][j] =
17058                                                                 NULL;
17059                                         mlx5_ipool_free
17060                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17061                                                 sub_policy->idx);
17062                                                 new_policy_num--;
17063                                         }
17064                                 }
17065                         }
17066                         if (new_policy_num != sub_policy_num) {
17067                                 mtr_policy->sub_policy_num &=
17068                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17069                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17070                                 mtr_policy->sub_policy_num |=
17071                                 (new_policy_num &
17072                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17073                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17074                         }
17075                         break;
17076                 case MLX5_FLOW_FATE_QUEUE:
17077                         sub_policy = mtr_policy->sub_policys[domain][0];
17078                         __flow_dv_destroy_sub_policy_rules(dev,
17079                                                            sub_policy);
17080                         break;
17081                 default:
17082                         /*Other actions without queue and do nothing*/
17083                         break;
17084                 }
17085         }
17086         rte_spinlock_unlock(&mtr_policy->sl);
17087 }
17088
17089 /**
17090  * Validate the batch counter support in root table.
17091  *
17092  * Create a simple flow with invalid counter and drop action on root table to
17093  * validate if batch counter with offset on root table is supported or not.
17094  *
17095  * @param[in] dev
17096  *   Pointer to rte_eth_dev structure.
17097  *
17098  * @return
17099  *   0 on success, a negative errno value otherwise and rte_errno is set.
17100  */
17101 int
17102 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17103 {
17104         struct mlx5_priv *priv = dev->data->dev_private;
17105         struct mlx5_dev_ctx_shared *sh = priv->sh;
17106         struct mlx5_flow_dv_match_params mask = {
17107                 .size = sizeof(mask.buf),
17108         };
17109         struct mlx5_flow_dv_match_params value = {
17110                 .size = sizeof(value.buf),
17111         };
17112         struct mlx5dv_flow_matcher_attr dv_attr = {
17113                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17114                 .priority = 0,
17115                 .match_criteria_enable = 0,
17116                 .match_mask = (void *)&mask,
17117         };
17118         void *actions[2] = { 0 };
17119         struct mlx5_flow_tbl_resource *tbl = NULL;
17120         struct mlx5_devx_obj *dcs = NULL;
17121         void *matcher = NULL;
17122         void *flow = NULL;
17123         int ret = -1;
17124
17125         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17126                                         0, 0, 0, NULL);
17127         if (!tbl)
17128                 goto err;
17129         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
17130         if (!dcs)
17131                 goto err;
17132         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17133                                                     &actions[0]);
17134         if (ret)
17135                 goto err;
17136         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17137         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17138         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
17139                                                &matcher);
17140         if (ret)
17141                 goto err;
17142         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17143         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17144                                        actions, &flow);
17145 err:
17146         /*
17147          * If batch counter with offset is not supported, the driver will not
17148          * validate the invalid offset value, flow create should success.
17149          * In this case, it means batch counter is not supported in root table.
17150          *
17151          * Otherwise, if flow create is failed, counter offset is supported.
17152          */
17153         if (flow) {
17154                 DRV_LOG(INFO, "Batch counter is not supported in root "
17155                               "table. Switch to fallback mode.");
17156                 rte_errno = ENOTSUP;
17157                 ret = -rte_errno;
17158                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17159         } else {
17160                 /* Check matcher to make sure validate fail at flow create. */
17161                 if (!matcher || (matcher && errno != EINVAL))
17162                         DRV_LOG(ERR, "Unexpected error in counter offset "
17163                                      "support detection");
17164                 ret = 0;
17165         }
17166         if (actions[0])
17167                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17168         if (matcher)
17169                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17170         if (tbl)
17171                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17172         if (dcs)
17173                 claim_zero(mlx5_devx_cmd_destroy(dcs));
17174         return ret;
17175 }
17176
17177 /**
17178  * Query a devx counter.
17179  *
17180  * @param[in] dev
17181  *   Pointer to the Ethernet device structure.
17182  * @param[in] cnt
17183  *   Index to the flow counter.
17184  * @param[in] clear
17185  *   Set to clear the counter statistics.
17186  * @param[out] pkts
17187  *   The statistics value of packets.
17188  * @param[out] bytes
17189  *   The statistics value of bytes.
17190  *
17191  * @return
17192  *   0 on success, otherwise return -1.
17193  */
17194 static int
17195 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17196                       uint64_t *pkts, uint64_t *bytes)
17197 {
17198         struct mlx5_priv *priv = dev->data->dev_private;
17199         struct mlx5_flow_counter *cnt;
17200         uint64_t inn_pkts, inn_bytes;
17201         int ret;
17202
17203         if (!priv->config.devx)
17204                 return -1;
17205
17206         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17207         if (ret)
17208                 return -1;
17209         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17210         *pkts = inn_pkts - cnt->hits;
17211         *bytes = inn_bytes - cnt->bytes;
17212         if (clear) {
17213                 cnt->hits = inn_pkts;
17214                 cnt->bytes = inn_bytes;
17215         }
17216         return 0;
17217 }
17218
17219 /**
17220  * Get aged-out flows.
17221  *
17222  * @param[in] dev
17223  *   Pointer to the Ethernet device structure.
17224  * @param[in] context
17225  *   The address of an array of pointers to the aged-out flows contexts.
17226  * @param[in] nb_contexts
17227  *   The length of context array pointers.
17228  * @param[out] error
17229  *   Perform verbose error reporting if not NULL. Initialized in case of
17230  *   error only.
17231  *
17232  * @return
17233  *   how many contexts get in success, otherwise negative errno value.
17234  *   if nb_contexts is 0, return the amount of all aged contexts.
17235  *   if nb_contexts is not 0 , return the amount of aged flows reported
17236  *   in the context array.
17237  * @note: only stub for now
17238  */
17239 static int
17240 flow_get_aged_flows(struct rte_eth_dev *dev,
17241                     void **context,
17242                     uint32_t nb_contexts,
17243                     struct rte_flow_error *error)
17244 {
17245         struct mlx5_priv *priv = dev->data->dev_private;
17246         struct mlx5_age_info *age_info;
17247         struct mlx5_age_param *age_param;
17248         struct mlx5_flow_counter *counter;
17249         struct mlx5_aso_age_action *act;
17250         int nb_flows = 0;
17251
17252         if (nb_contexts && !context)
17253                 return rte_flow_error_set(error, EINVAL,
17254                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17255                                           NULL, "empty context");
17256         age_info = GET_PORT_AGE_INFO(priv);
17257         rte_spinlock_lock(&age_info->aged_sl);
17258         LIST_FOREACH(act, &age_info->aged_aso, next) {
17259                 nb_flows++;
17260                 if (nb_contexts) {
17261                         context[nb_flows - 1] =
17262                                                 act->age_params.context;
17263                         if (!(--nb_contexts))
17264                                 break;
17265                 }
17266         }
17267         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17268                 nb_flows++;
17269                 if (nb_contexts) {
17270                         age_param = MLX5_CNT_TO_AGE(counter);
17271                         context[nb_flows - 1] = age_param->context;
17272                         if (!(--nb_contexts))
17273                                 break;
17274                 }
17275         }
17276         rte_spinlock_unlock(&age_info->aged_sl);
17277         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17278         return nb_flows;
17279 }
17280
17281 /*
17282  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17283  */
17284 static uint32_t
17285 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17286 {
17287         return flow_dv_counter_alloc(dev, 0);
17288 }
17289
17290 /**
17291  * Validate indirect action.
17292  * Dispatcher for action type specific validation.
17293  *
17294  * @param[in] dev
17295  *   Pointer to the Ethernet device structure.
17296  * @param[in] conf
17297  *   Indirect action configuration.
17298  * @param[in] action
17299  *   The indirect action object to validate.
17300  * @param[out] error
17301  *   Perform verbose error reporting if not NULL. Initialized in case of
17302  *   error only.
17303  *
17304  * @return
17305  *   0 on success, otherwise negative errno value.
17306  */
17307 static int
17308 flow_dv_action_validate(struct rte_eth_dev *dev,
17309                         const struct rte_flow_indir_action_conf *conf,
17310                         const struct rte_flow_action *action,
17311                         struct rte_flow_error *err)
17312 {
17313         struct mlx5_priv *priv = dev->data->dev_private;
17314
17315         RTE_SET_USED(conf);
17316         switch (action->type) {
17317         case RTE_FLOW_ACTION_TYPE_RSS:
17318                 /*
17319                  * priv->obj_ops is set according to driver capabilities.
17320                  * When DevX capabilities are
17321                  * sufficient, it is set to devx_obj_ops.
17322                  * Otherwise, it is set to ibv_obj_ops.
17323                  * ibv_obj_ops doesn't support ind_table_modify operation.
17324                  * In this case the indirect RSS action can't be used.
17325                  */
17326                 if (priv->obj_ops.ind_table_modify == NULL)
17327                         return rte_flow_error_set
17328                                         (err, ENOTSUP,
17329                                          RTE_FLOW_ERROR_TYPE_ACTION,
17330                                          NULL,
17331                                          "Indirect RSS action not supported");
17332                 return mlx5_validate_action_rss(dev, action, err);
17333         case RTE_FLOW_ACTION_TYPE_AGE:
17334                 if (!priv->sh->aso_age_mng)
17335                         return rte_flow_error_set(err, ENOTSUP,
17336                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17337                                                 NULL,
17338                                                 "Indirect age action not supported");
17339                 return flow_dv_validate_action_age(0, action, dev, err);
17340         case RTE_FLOW_ACTION_TYPE_COUNT:
17341                 /*
17342                  * There are two mechanisms to share the action count.
17343                  * The old mechanism uses the shared field to share, while the
17344                  * new mechanism uses the indirect action API.
17345                  * This validation comes to make sure that the two mechanisms
17346                  * are not combined.
17347                  */
17348                 if (is_shared_action_count(action))
17349                         return rte_flow_error_set(err, ENOTSUP,
17350                                                   RTE_FLOW_ERROR_TYPE_ACTION,
17351                                                   NULL,
17352                                                   "Mix shared and indirect counter is not supported");
17353                 return flow_dv_validate_action_count(dev, true, 0, err);
17354         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17355                 if (!priv->sh->ct_aso_en)
17356                         return rte_flow_error_set(err, ENOTSUP,
17357                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17358                                         "ASO CT is not supported");
17359                 return mlx5_validate_action_ct(dev, action->conf, err);
17360         default:
17361                 return rte_flow_error_set(err, ENOTSUP,
17362                                           RTE_FLOW_ERROR_TYPE_ACTION,
17363                                           NULL,
17364                                           "action type not supported");
17365         }
17366 }
17367
17368 /*
17369  * Check if the RSS configurations for colors of a meter policy match
17370  * each other, except the queues.
17371  *
17372  * @param[in] r1
17373  *   Pointer to the first RSS flow action.
17374  * @param[in] r2
17375  *   Pointer to the second RSS flow action.
17376  *
17377  * @return
17378  *   0 on match, 1 on conflict.
17379  */
17380 static inline int
17381 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17382                                const struct rte_flow_action_rss *r2)
17383 {
17384         if (!r1 || !r2)
17385                 return 0;
17386         if (r1->func != r2->func || r1->level != r2->level ||
17387             r1->types != r2->types || r1->key_len != r2->key_len ||
17388             memcmp(r1->key, r2->key, r1->key_len))
17389                 return 1;
17390         return 0;
17391 }
17392
17393 /**
17394  * Validate the meter hierarchy chain for meter policy.
17395  *
17396  * @param[in] dev
17397  *   Pointer to the Ethernet device structure.
17398  * @param[in] meter_id
17399  *   Meter id.
17400  * @param[in] action_flags
17401  *   Holds the actions detected until now.
17402  * @param[out] is_rss
17403  *   Is RSS or not.
17404  * @param[out] hierarchy_domain
17405  *   The domain bitmap for hierarchy policy.
17406  * @param[out] error
17407  *   Perform verbose error reporting if not NULL. Initialized in case of
17408  *   error only.
17409  *
17410  * @return
17411  *   0 on success, otherwise negative errno value with error set.
17412  */
17413 static int
17414 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17415                                   uint32_t meter_id,
17416                                   uint64_t action_flags,
17417                                   bool *is_rss,
17418                                   uint8_t *hierarchy_domain,
17419                                   struct rte_mtr_error *error)
17420 {
17421         struct mlx5_priv *priv = dev->data->dev_private;
17422         struct mlx5_flow_meter_info *fm;
17423         struct mlx5_flow_meter_policy *policy;
17424         uint8_t cnt = 1;
17425
17426         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17427                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17428                 return -rte_mtr_error_set(error, EINVAL,
17429                                         RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17430                                         NULL,
17431                                         "Multiple fate actions not supported.");
17432         while (true) {
17433                 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17434                 if (!fm)
17435                         return -rte_mtr_error_set(error, EINVAL,
17436                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17437                                         "Meter not found in meter hierarchy.");
17438                 if (fm->def_policy)
17439                         return -rte_mtr_error_set(error, EINVAL,
17440                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17441                         "Non termination meter not supported in hierarchy.");
17442                 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17443                 MLX5_ASSERT(policy);
17444                 if (!policy->is_hierarchy) {
17445                         if (policy->transfer)
17446                                 *hierarchy_domain |=
17447                                                 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17448                         if (policy->ingress)
17449                                 *hierarchy_domain |=
17450                                                 MLX5_MTR_DOMAIN_INGRESS_BIT;
17451                         if (policy->egress)
17452                                 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17453                         *is_rss = policy->is_rss;
17454                         break;
17455                 }
17456                 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17457                 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17458                         return -rte_mtr_error_set(error, EINVAL,
17459                                         RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17460                                         "Exceed max hierarchy meter number.");
17461         }
17462         return 0;
17463 }
17464
17465 /**
17466  * Validate meter policy actions.
17467  * Dispatcher for action type specific validation.
17468  *
17469  * @param[in] dev
17470  *   Pointer to the Ethernet device structure.
17471  * @param[in] action
17472  *   The meter policy action object to validate.
17473  * @param[in] attr
17474  *   Attributes of flow to determine steering domain.
17475  * @param[out] error
17476  *   Perform verbose error reporting if not NULL. Initialized in case of
17477  *   error only.
17478  *
17479  * @return
17480  *   0 on success, otherwise negative errno value.
17481  */
17482 static int
17483 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17484                         const struct rte_flow_action *actions[RTE_COLORS],
17485                         struct rte_flow_attr *attr,
17486                         bool *is_rss,
17487                         uint8_t *domain_bitmap,
17488                         uint8_t *policy_mode,
17489                         struct rte_mtr_error *error)
17490 {
17491         struct mlx5_priv *priv = dev->data->dev_private;
17492         struct mlx5_dev_config *dev_conf = &priv->config;
17493         const struct rte_flow_action *act;
17494         uint64_t action_flags[RTE_COLORS] = {0};
17495         int actions_n;
17496         int i, ret;
17497         struct rte_flow_error flow_err;
17498         uint8_t domain_color[RTE_COLORS] = {0};
17499         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17500         uint8_t hierarchy_domain = 0;
17501         const struct rte_flow_action_meter *mtr;
17502         bool def_green = false;
17503         bool def_yellow = false;
17504         const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17505
17506         if (!priv->config.dv_esw_en)
17507                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17508         *domain_bitmap = def_domain;
17509         /* Red color could only support DROP action. */
17510         if (!actions[RTE_COLOR_RED] ||
17511             actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17512                 return -rte_mtr_error_set(error, ENOTSUP,
17513                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17514                                 NULL, "Red color only supports drop action.");
17515         /*
17516          * Check default policy actions:
17517          * Green / Yellow: no action, Red: drop action
17518          * Either G or Y will trigger default policy actions to be created.
17519          */
17520         if (!actions[RTE_COLOR_GREEN] ||
17521             actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17522                 def_green = true;
17523         if (!actions[RTE_COLOR_YELLOW] ||
17524             actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17525                 def_yellow = true;
17526         if (def_green && def_yellow) {
17527                 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17528                 return 0;
17529         } else if (!def_green && def_yellow) {
17530                 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17531         } else if (def_green && !def_yellow) {
17532                 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17533         }
17534         /* Set to empty string in case of NULL pointer access by user. */
17535         flow_err.message = "";
17536         for (i = 0; i < RTE_COLORS; i++) {
17537                 act = actions[i];
17538                 for (action_flags[i] = 0, actions_n = 0;
17539                      act && act->type != RTE_FLOW_ACTION_TYPE_END;
17540                      act++) {
17541                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17542                                 return -rte_mtr_error_set(error, ENOTSUP,
17543                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17544                                           NULL, "too many actions");
17545                         switch (act->type) {
17546                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
17547                                 if (!priv->config.dv_esw_en)
17548                                         return -rte_mtr_error_set(error,
17549                                         ENOTSUP,
17550                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17551                                         NULL, "PORT action validate check"
17552                                         " fail for ESW disable");
17553                                 ret = flow_dv_validate_action_port_id(dev,
17554                                                 action_flags[i],
17555                                                 act, attr, &flow_err);
17556                                 if (ret)
17557                                         return -rte_mtr_error_set(error,
17558                                         ENOTSUP,
17559                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17560                                         NULL, flow_err.message ?
17561                                         flow_err.message :
17562                                         "PORT action validate check fail");
17563                                 ++actions_n;
17564                                 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17565                                 break;
17566                         case RTE_FLOW_ACTION_TYPE_MARK:
17567                                 ret = flow_dv_validate_action_mark(dev, act,
17568                                                            action_flags[i],
17569                                                            attr, &flow_err);
17570                                 if (ret < 0)
17571                                         return -rte_mtr_error_set(error,
17572                                         ENOTSUP,
17573                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17574                                         NULL, flow_err.message ?
17575                                         flow_err.message :
17576                                         "Mark action validate check fail");
17577                                 if (dev_conf->dv_xmeta_en !=
17578                                         MLX5_XMETA_MODE_LEGACY)
17579                                         return -rte_mtr_error_set(error,
17580                                         ENOTSUP,
17581                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17582                                         NULL, "Extend MARK action is "
17583                                         "not supported. Please try use "
17584                                         "default policy for meter.");
17585                                 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17586                                 ++actions_n;
17587                                 break;
17588                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
17589                                 ret = flow_dv_validate_action_set_tag(dev,
17590                                                         act, action_flags[i],
17591                                                         attr, &flow_err);
17592                                 if (ret)
17593                                         return -rte_mtr_error_set(error,
17594                                         ENOTSUP,
17595                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17596                                         NULL, flow_err.message ?
17597                                         flow_err.message :
17598                                         "Set tag action validate check fail");
17599                                 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17600                                 ++actions_n;
17601                                 break;
17602                         case RTE_FLOW_ACTION_TYPE_DROP:
17603                                 ret = mlx5_flow_validate_action_drop
17604                                         (action_flags[i], attr, &flow_err);
17605                                 if (ret < 0)
17606                                         return -rte_mtr_error_set(error,
17607                                         ENOTSUP,
17608                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17609                                         NULL, flow_err.message ?
17610                                         flow_err.message :
17611                                         "Drop action validate check fail");
17612                                 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17613                                 ++actions_n;
17614                                 break;
17615                         case RTE_FLOW_ACTION_TYPE_QUEUE:
17616                                 /*
17617                                  * Check whether extensive
17618                                  * metadata feature is engaged.
17619                                  */
17620                                 if (dev_conf->dv_flow_en &&
17621                                     (dev_conf->dv_xmeta_en !=
17622                                      MLX5_XMETA_MODE_LEGACY) &&
17623                                     mlx5_flow_ext_mreg_supported(dev))
17624                                         return -rte_mtr_error_set(error,
17625                                           ENOTSUP,
17626                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17627                                           NULL, "Queue action with meta "
17628                                           "is not supported. Please try use "
17629                                           "default policy for meter.");
17630                                 ret = mlx5_flow_validate_action_queue(act,
17631                                                         action_flags[i], dev,
17632                                                         attr, &flow_err);
17633                                 if (ret < 0)
17634                                         return -rte_mtr_error_set(error,
17635                                           ENOTSUP,
17636                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17637                                           NULL, flow_err.message ?
17638                                           flow_err.message :
17639                                           "Queue action validate check fail");
17640                                 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17641                                 ++actions_n;
17642                                 break;
17643                         case RTE_FLOW_ACTION_TYPE_RSS:
17644                                 if (dev_conf->dv_flow_en &&
17645                                     (dev_conf->dv_xmeta_en !=
17646                                      MLX5_XMETA_MODE_LEGACY) &&
17647                                     mlx5_flow_ext_mreg_supported(dev))
17648                                         return -rte_mtr_error_set(error,
17649                                           ENOTSUP,
17650                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17651                                           NULL, "RSS action with meta "
17652                                           "is not supported. Please try use "
17653                                           "default policy for meter.");
17654                                 ret = mlx5_validate_action_rss(dev, act,
17655                                                                &flow_err);
17656                                 if (ret < 0)
17657                                         return -rte_mtr_error_set(error,
17658                                           ENOTSUP,
17659                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17660                                           NULL, flow_err.message ?
17661                                           flow_err.message :
17662                                           "RSS action validate check fail");
17663                                 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17664                                 ++actions_n;
17665                                 /* Either G or Y will set the RSS. */
17666                                 rss_color[i] = act->conf;
17667                                 break;
17668                         case RTE_FLOW_ACTION_TYPE_JUMP:
17669                                 ret = flow_dv_validate_action_jump(dev,
17670                                         NULL, act, action_flags[i],
17671                                         attr, true, &flow_err);
17672                                 if (ret)
17673                                         return -rte_mtr_error_set(error,
17674                                           ENOTSUP,
17675                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17676                                           NULL, flow_err.message ?
17677                                           flow_err.message :
17678                                           "Jump action validate check fail");
17679                                 ++actions_n;
17680                                 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17681                                 break;
17682                         /*
17683                          * Only the last meter in the hierarchy will support
17684                          * the YELLOW color steering. Then in the meter policy
17685                          * actions list, there should be no other meter inside.
17686                          */
17687                         case RTE_FLOW_ACTION_TYPE_METER:
17688                                 if (i != RTE_COLOR_GREEN)
17689                                         return -rte_mtr_error_set(error,
17690                                                 ENOTSUP,
17691                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17692                                                 NULL, flow_err.message ?
17693                                                 flow_err.message :
17694                                   "Meter hierarchy only supports GREEN color.");
17695                                 mtr = act->conf;
17696                                 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17697                                                         mtr->mtr_id,
17698                                                         action_flags[i],
17699                                                         is_rss,
17700                                                         &hierarchy_domain,
17701                                                         error);
17702                                 if (ret)
17703                                         return ret;
17704                                 ++actions_n;
17705                                 action_flags[i] |=
17706                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17707                                 break;
17708                         default:
17709                                 return -rte_mtr_error_set(error, ENOTSUP,
17710                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17711                                         NULL,
17712                                         "Doesn't support optional action");
17713                         }
17714                 }
17715                 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID)
17716                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17717                 else if ((action_flags[i] &
17718                           (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17719                          (action_flags[i] & MLX5_FLOW_ACTION_MARK))
17720                         /*
17721                          * Only support MLX5_XMETA_MODE_LEGACY
17722                          * so MARK action is only in ingress domain.
17723                          */
17724                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17725                 else if (action_flags[i] &
17726                          MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17727                         domain_color[i] = hierarchy_domain;
17728                 else
17729                         domain_color[i] = def_domain;
17730                 /*
17731                  * Non-termination actions only support NIC Tx domain.
17732                  * The adjustion should be skipped when there is no
17733                  * action or only END is provided. The default domains
17734                  * bit-mask is set to find the MIN intersection.
17735                  * The action flags checking should also be skipped.
17736                  */
17737                 if ((def_green && i == RTE_COLOR_GREEN) ||
17738                     (def_yellow && i == RTE_COLOR_YELLOW))
17739                         continue;
17740                 /*
17741                  * Validate the drop action mutual exclusion
17742                  * with other actions. Drop action is mutually-exclusive
17743                  * with any other action, except for Count action.
17744                  */
17745                 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
17746                     (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
17747                         return -rte_mtr_error_set(error, ENOTSUP,
17748                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17749                                 NULL, "Drop action is mutually-exclusive "
17750                                 "with any other action");
17751                 }
17752                 /* Eswitch has few restrictions on using items and actions */
17753                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17754                         if (!mlx5_flow_ext_mreg_supported(dev) &&
17755                             action_flags[i] & MLX5_FLOW_ACTION_MARK)
17756                                 return -rte_mtr_error_set(error, ENOTSUP,
17757                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17758                                         NULL, "unsupported action MARK");
17759                         if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
17760                                 return -rte_mtr_error_set(error, ENOTSUP,
17761                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17762                                         NULL, "unsupported action QUEUE");
17763                         if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
17764                                 return -rte_mtr_error_set(error, ENOTSUP,
17765                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17766                                         NULL, "unsupported action RSS");
17767                         if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17768                                 return -rte_mtr_error_set(error, ENOTSUP,
17769                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17770                                         NULL, "no fate action is found");
17771                 } else {
17772                         if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
17773                             (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17774                                 if ((domain_color[i] &
17775                                      MLX5_MTR_DOMAIN_EGRESS_BIT))
17776                                         domain_color[i] =
17777                                                 MLX5_MTR_DOMAIN_EGRESS_BIT;
17778                                 else
17779                                         return -rte_mtr_error_set(error,
17780                                                 ENOTSUP,
17781                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17782                                                 NULL,
17783                                                 "no fate action is found");
17784                         }
17785                 }
17786         }
17787         /* If both colors have RSS, the attributes should be the same. */
17788         if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
17789                                            rss_color[RTE_COLOR_YELLOW]))
17790                 return -rte_mtr_error_set(error, EINVAL,
17791                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17792                                           NULL, "policy RSS attr conflict");
17793         if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
17794                 *is_rss = true;
17795         /* "domain_color[C]" is non-zero for each color, default is ALL. */
17796         if (!def_green && !def_yellow &&
17797             domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
17798             !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
17799             !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
17800                 return -rte_mtr_error_set(error, EINVAL,
17801                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17802                                           NULL, "policy domains conflict");
17803         /*
17804          * At least one color policy is listed in the actions, the domains
17805          * to be supported should be the intersection.
17806          */
17807         *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
17808                          domain_color[RTE_COLOR_YELLOW];
17809         return 0;
17810 }
17811
17812 static int
17813 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
17814 {
17815         struct mlx5_priv *priv = dev->data->dev_private;
17816         int ret = 0;
17817
17818         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
17819                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
17820                                                 flags);
17821                 if (ret != 0)
17822                         return ret;
17823         }
17824         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
17825                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
17826                 if (ret != 0)
17827                         return ret;
17828         }
17829         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
17830                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
17831                 if (ret != 0)
17832                         return ret;
17833         }
17834         return 0;
17835 }
17836
17837 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
17838         .validate = flow_dv_validate,
17839         .prepare = flow_dv_prepare,
17840         .translate = flow_dv_translate,
17841         .apply = flow_dv_apply,
17842         .remove = flow_dv_remove,
17843         .destroy = flow_dv_destroy,
17844         .query = flow_dv_query,
17845         .create_mtr_tbls = flow_dv_create_mtr_tbls,
17846         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
17847         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
17848         .create_meter = flow_dv_mtr_alloc,
17849         .free_meter = flow_dv_aso_mtr_release_to_pool,
17850         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
17851         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
17852         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
17853         .create_policy_rules = flow_dv_create_policy_rules,
17854         .destroy_policy_rules = flow_dv_destroy_policy_rules,
17855         .create_def_policy = flow_dv_create_def_policy,
17856         .destroy_def_policy = flow_dv_destroy_def_policy,
17857         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
17858         .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
17859         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
17860         .counter_alloc = flow_dv_counter_allocate,
17861         .counter_free = flow_dv_counter_free,
17862         .counter_query = flow_dv_counter_query,
17863         .get_aged_flows = flow_get_aged_flows,
17864         .action_validate = flow_dv_action_validate,
17865         .action_create = flow_dv_action_create,
17866         .action_destroy = flow_dv_action_destroy,
17867         .action_update = flow_dv_action_update,
17868         .action_query = flow_dv_action_query,
17869         .sync_domain = flow_dv_sync_domain,
17870 };
17871
17872 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
17873