drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30
  31 #include "mlx5.h"
  32 #include "mlx5_defs.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_flow.h"
  35 #include "mlx5_prm.h"
  36 #include "mlx5_rxtx.h"
  37
  38 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  39
  40 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  41 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  42 #endif
  43
  44 #ifndef HAVE_MLX5DV_DR_ESWITCH
  45 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  46 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  47 #endif
  48 #endif
  49
  50 #ifndef HAVE_MLX5DV_DR
  51 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  52 #endif
  53
  54 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  55                                           sizeof(struct rte_flow_item_ipv4))
  56 /* VLAN header definitions */
  57 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  58 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  59 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  60 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  61 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  62
  63 union flow_dv_attr {
  64         struct {
  65                 uint32_t valid:1;
  66                 uint32_t ipv4:1;
  67                 uint32_t ipv6:1;
  68                 uint32_t tcp:1;
  69                 uint32_t udp:1;
  70                 uint32_t reserved:27;
  71         };
  72         uint32_t attr;
  73 };
  74
  75 /**
  76  * Initialize flow attributes structure according to flow items' types.
  77  *
  78  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  79  * mode. For tunnel mode, the items to be modified are the outermost ones.
  80  *
  81  * @param[in] item
  82  *   Pointer to item specification.
  83  * @param[out] attr
  84  *   Pointer to flow attributes structure.
  85  */
  86 static void
  87 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  88 {
  89         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  90                 switch (item->type) {
  91                 case RTE_FLOW_ITEM_TYPE_IPV4:
  92                         if (!attr->ipv6)
  93                                 attr->ipv4 = 1;
  94                         break;
  95                 case RTE_FLOW_ITEM_TYPE_IPV6:
  96                         if (!attr->ipv4)
  97                                 attr->ipv6 = 1;
  98                         break;
  99                 case RTE_FLOW_ITEM_TYPE_UDP:
 100                         if (!attr->tcp)
 101                                 attr->udp = 1;
 102                         break;
 103                 case RTE_FLOW_ITEM_TYPE_TCP:
 104                         if (!attr->udp)
 105                                 attr->tcp = 1;
 106                         break;
 107                 default:
 108                         break;
 109                 }
 110         }
 111         attr->valid = 1;
 112 }
 113
 114 /**
 115  * Convert rte_mtr_color to mlx5 color.
 116  *
 117  * @param[in] rcol
 118  *   rte_mtr_color.
 119  *
 120  * @return
 121  *   mlx5 color.
 122  */
 123 static int
 124 rte_col_2_mlx5_col(enum rte_color rcol)
 125 {
 126         switch (rcol) {
 127         case RTE_COLOR_GREEN:
 128                 return MLX5_FLOW_COLOR_GREEN;
 129         case RTE_COLOR_YELLOW:
 130                 return MLX5_FLOW_COLOR_YELLOW;
 131         case RTE_COLOR_RED:
 132                 return MLX5_FLOW_COLOR_RED;
 133         default:
 134                 break;
 135         }
 136         return MLX5_FLOW_COLOR_UNDEFINED;
 137 }
 138
 139 struct field_modify_info {
 140         uint32_t size; /* Size of field in protocol header, in bytes. */
 141         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 142         enum mlx5_modification_field id;
 143 };
 144
 145 struct field_modify_info modify_eth[] = {
 146         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 147         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 148         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 149         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 150         {0, 0, 0},
 151 };
 152
 153 struct field_modify_info modify_vlan_out_first_vid[] = {
 154         /* Size in bits !!! */
 155         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 156         {0, 0, 0},
 157 };
 158
 159 struct field_modify_info modify_ipv4[] = {
 160         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 161         {4, 12, MLX5_MODI_OUT_SIPV4},
 162         {4, 16, MLX5_MODI_OUT_DIPV4},
 163         {0, 0, 0},
 164 };
 165
 166 struct field_modify_info modify_ipv6[] = {
 167         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 168         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 169         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 170         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 171         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 172         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 173         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 174         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 175         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 176         {0, 0, 0},
 177 };
 178
 179 struct field_modify_info modify_udp[] = {
 180         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 181         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 182         {0, 0, 0},
 183 };
 184
 185 struct field_modify_info modify_tcp[] = {
 186         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 187         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 188         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 189         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 190         {0, 0, 0},
 191 };
 192
 193 static void
 194 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 195                           uint8_t next_protocol, uint64_t *item_flags,
 196                           int *tunnel)
 197 {
 198         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 199                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 200         if (next_protocol == IPPROTO_IPIP) {
 201                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 202                 *tunnel = 1;
 203         }
 204         if (next_protocol == IPPROTO_IPV6) {
 205                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 206                 *tunnel = 1;
 207         }
 208 }
 209
 210 /**
 211  * Acquire the synchronizing object to protect multithreaded access
 212  * to shared dv context. Lock occurs only if context is actually
 213  * shared, i.e. we have multiport IB device and representors are
 214  * created.
 215  *
 216  * @param[in] dev
 217  *   Pointer to the rte_eth_dev structure.
 218  */
 219 static void
 220 flow_dv_shared_lock(struct rte_eth_dev *dev)
 221 {
 222         struct mlx5_priv *priv = dev->data->dev_private;
 223         struct mlx5_ibv_shared *sh = priv->sh;
 224
 225         if (sh->dv_refcnt > 1) {
 226                 int ret;
 227
 228                 ret = pthread_mutex_lock(&sh->dv_mutex);
 229                 assert(!ret);
 230                 (void)ret;
 231         }
 232 }
 233
 234 static void
 235 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 236 {
 237         struct mlx5_priv *priv = dev->data->dev_private;
 238         struct mlx5_ibv_shared *sh = priv->sh;
 239
 240         if (sh->dv_refcnt > 1) {
 241                 int ret;
 242
 243                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 244                 assert(!ret);
 245                 (void)ret;
 246         }
 247 }
 248
 249 /* Update VLAN's VID/PCP based on input rte_flow_action.
 250  *
 251  * @param[in] action
 252  *   Pointer to struct rte_flow_action.
 253  * @param[out] vlan
 254  *   Pointer to struct rte_vlan_hdr.
 255  */
 256 static void
 257 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 258                          struct rte_vlan_hdr *vlan)
 259 {
 260         uint16_t vlan_tci;
 261         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 262                 vlan_tci =
 263                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 264                                                action->conf)->vlan_pcp;
 265                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 266                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 267                 vlan->vlan_tci |= vlan_tci;
 268         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 269                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 270                 vlan->vlan_tci |= rte_be_to_cpu_16
 271                     (((const struct rte_flow_action_of_set_vlan_vid *)
 272                                              action->conf)->vlan_vid);
 273         }
 274 }
 275
 276 /**
 277  * Fetch 1, 2, 3 or 4 byte field from the byte array
 278  * and return as unsigned integer in host-endian format.
 279  *
 280  * @param[in] data
 281  *   Pointer to data array.
 282  * @param[in] size
 283  *   Size of field to extract.
 284  *
 285  * @return
 286  *   converted field in host endian format.
 287  */
 288 static inline uint32_t
 289 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 290 {
 291         uint32_t ret;
 292
 293         switch (size) {
 294         case 1:
 295                 ret = *data;
 296                 break;
 297         case 2:
 298                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 299                 break;
 300         case 3:
 301                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 302                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 303                 break;
 304         case 4:
 305                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 306                 break;
 307         default:
 308                 assert(false);
 309                 ret = 0;
 310                 break;
 311         }
 312         return ret;
 313 }
 314
 315 /**
 316  * Convert modify-header action to DV specification.
 317  *
 318  * Data length of each action is determined by provided field description
 319  * and the item mask. Data bit offset and width of each action is determined
 320  * by provided item mask.
 321  *
 322  * @param[in] item
 323  *   Pointer to item specification.
 324  * @param[in] field
 325  *   Pointer to field modification information.
 326  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 327  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 328  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 329  * @param[in] dcopy
 330  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 331  *   Negative offset value sets the same offset as source offset.
 332  *   size field is ignored, value is taken from source field.
 333  * @param[in,out] resource
 334  *   Pointer to the modify-header resource.
 335  * @param[in] type
 336  *   Type of modification.
 337  * @param[out] error
 338  *   Pointer to the error structure.
 339  *
 340  * @return
 341  *   0 on success, a negative errno value otherwise and rte_errno is set.
 342  */
 343 static int
 344 flow_dv_convert_modify_action(struct rte_flow_item *item,
 345                               struct field_modify_info *field,
 346                               struct field_modify_info *dcopy,
 347                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 348                               uint32_t type, struct rte_flow_error *error)
 349 {
 350         uint32_t i = resource->actions_num;
 351         struct mlx5_modification_cmd *actions = resource->actions;
 352
 353         /*
 354          * The item and mask are provided in big-endian format.
 355          * The fields should be presented as in big-endian format either.
 356          * Mask must be always present, it defines the actual field width.
 357          */
 358         assert(item->mask);
 359         assert(field->size);
 360         do {
 361                 unsigned int size_b;
 362                 unsigned int off_b;
 363                 uint32_t mask;
 364                 uint32_t data;
 365
 366                 if (i >= MLX5_MODIFY_NUM)
 367                         return rte_flow_error_set(error, EINVAL,
 368                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 369                                  "too many items to modify");
 370                 /* Fetch variable byte size mask from the array. */
 371                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 372                                            field->offset, field->size);
 373                 if (!mask) {
 374                         ++field;
 375                         continue;
 376                 }
 377                 /* Deduce actual data width in bits from mask value. */
 378                 off_b = rte_bsf32(mask);
 379                 size_b = sizeof(uint32_t) * CHAR_BIT -
 380                          off_b - __builtin_clz(mask);
 381                 assert(size_b);
 382                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 383                 actions[i].action_type = type;
 384                 actions[i].field = field->id;
 385                 actions[i].offset = off_b;
 386                 actions[i].length = size_b;
 387                 /* Convert entire record to expected big-endian format. */
 388                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 389                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 390                         assert(dcopy);
 391                         actions[i].dst_field = dcopy->id;
 392                         actions[i].dst_offset =
 393                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 394                         /* Convert entire record to big-endian format. */
 395                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 396                 } else {
 397                         assert(item->spec);
 398                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 399                                                    field->offset, field->size);
 400                         /* Shift out the trailing masked bits from data. */
 401                         data = (data & mask) >> off_b;
 402                         actions[i].data1 = rte_cpu_to_be_32(data);
 403                 }
 404                 ++i;
 405                 ++field;
 406         } while (field->size);
 407         resource->actions_num = i;
 408         if (!resource->actions_num)
 409                 return rte_flow_error_set(error, EINVAL,
 410                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 411                                           "invalid modification flow item");
 412         return 0;
 413 }
 414
 415 /**
 416  * Convert modify-header set IPv4 address action to DV specification.
 417  *
 418  * @param[in,out] resource
 419  *   Pointer to the modify-header resource.
 420  * @param[in] action
 421  *   Pointer to action specification.
 422  * @param[out] error
 423  *   Pointer to the error structure.
 424  *
 425  * @return
 426  *   0 on success, a negative errno value otherwise and rte_errno is set.
 427  */
 428 static int
 429 flow_dv_convert_action_modify_ipv4
 430                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 431                          const struct rte_flow_action *action,
 432                          struct rte_flow_error *error)
 433 {
 434         const struct rte_flow_action_set_ipv4 *conf =
 435                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 436         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 437         struct rte_flow_item_ipv4 ipv4;
 438         struct rte_flow_item_ipv4 ipv4_mask;
 439
 440         memset(&ipv4, 0, sizeof(ipv4));
 441         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 442         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 443                 ipv4.hdr.src_addr = conf->ipv4_addr;
 444                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 445         } else {
 446                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 447                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 448         }
 449         item.spec = &ipv4;
 450         item.mask = &ipv4_mask;
 451         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 452                                              MLX5_MODIFICATION_TYPE_SET, error);
 453 }
 454
 455 /**
 456  * Convert modify-header set IPv6 address action to DV specification.
 457  *
 458  * @param[in,out] resource
 459  *   Pointer to the modify-header resource.
 460  * @param[in] action
 461  *   Pointer to action specification.
 462  * @param[out] error
 463  *   Pointer to the error structure.
 464  *
 465  * @return
 466  *   0 on success, a negative errno value otherwise and rte_errno is set.
 467  */
 468 static int
 469 flow_dv_convert_action_modify_ipv6
 470                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 471                          const struct rte_flow_action *action,
 472                          struct rte_flow_error *error)
 473 {
 474         const struct rte_flow_action_set_ipv6 *conf =
 475                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 476         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 477         struct rte_flow_item_ipv6 ipv6;
 478         struct rte_flow_item_ipv6 ipv6_mask;
 479
 480         memset(&ipv6, 0, sizeof(ipv6));
 481         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 482         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 483                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 484                        sizeof(ipv6.hdr.src_addr));
 485                 memcpy(&ipv6_mask.hdr.src_addr,
 486                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 487                        sizeof(ipv6.hdr.src_addr));
 488         } else {
 489                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 490                        sizeof(ipv6.hdr.dst_addr));
 491                 memcpy(&ipv6_mask.hdr.dst_addr,
 492                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 493                        sizeof(ipv6.hdr.dst_addr));
 494         }
 495         item.spec = &ipv6;
 496         item.mask = &ipv6_mask;
 497         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 498                                              MLX5_MODIFICATION_TYPE_SET, error);
 499 }
 500
 501 /**
 502  * Convert modify-header set MAC address action to DV specification.
 503  *
 504  * @param[in,out] resource
 505  *   Pointer to the modify-header resource.
 506  * @param[in] action
 507  *   Pointer to action specification.
 508  * @param[out] error
 509  *   Pointer to the error structure.
 510  *
 511  * @return
 512  *   0 on success, a negative errno value otherwise and rte_errno is set.
 513  */
 514 static int
 515 flow_dv_convert_action_modify_mac
 516                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 517                          const struct rte_flow_action *action,
 518                          struct rte_flow_error *error)
 519 {
 520         const struct rte_flow_action_set_mac *conf =
 521                 (const struct rte_flow_action_set_mac *)(action->conf);
 522         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 523         struct rte_flow_item_eth eth;
 524         struct rte_flow_item_eth eth_mask;
 525
 526         memset(&eth, 0, sizeof(eth));
 527         memset(&eth_mask, 0, sizeof(eth_mask));
 528         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 529                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 530                        sizeof(eth.src.addr_bytes));
 531                 memcpy(&eth_mask.src.addr_bytes,
 532                        &rte_flow_item_eth_mask.src.addr_bytes,
 533                        sizeof(eth_mask.src.addr_bytes));
 534         } else {
 535                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 536                        sizeof(eth.dst.addr_bytes));
 537                 memcpy(&eth_mask.dst.addr_bytes,
 538                        &rte_flow_item_eth_mask.dst.addr_bytes,
 539                        sizeof(eth_mask.dst.addr_bytes));
 540         }
 541         item.spec = &eth;
 542         item.mask = &eth_mask;
 543         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 544                                              MLX5_MODIFICATION_TYPE_SET, error);
 545 }
 546
 547 /**
 548  * Convert modify-header set VLAN VID action to DV specification.
 549  *
 550  * @param[in,out] resource
 551  *   Pointer to the modify-header resource.
 552  * @param[in] action
 553  *   Pointer to action specification.
 554  * @param[out] error
 555  *   Pointer to the error structure.
 556  *
 557  * @return
 558  *   0 on success, a negative errno value otherwise and rte_errno is set.
 559  */
 560 static int
 561 flow_dv_convert_action_modify_vlan_vid
 562                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 563                          const struct rte_flow_action *action,
 564                          struct rte_flow_error *error)
 565 {
 566         const struct rte_flow_action_of_set_vlan_vid *conf =
 567                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 568         int i = resource->actions_num;
 569         struct mlx5_modification_cmd *actions = &resource->actions[i];
 570         struct field_modify_info *field = modify_vlan_out_first_vid;
 571
 572         if (i >= MLX5_MODIFY_NUM)
 573                 return rte_flow_error_set(error, EINVAL,
 574                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 575                          "too many items to modify");
 576         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 577         actions[i].field = field->id;
 578         actions[i].length = field->size;
 579         actions[i].offset = field->offset;
 580         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 581         actions[i].data1 = conf->vlan_vid;
 582         actions[i].data1 = actions[i].data1 << 16;
 583         resource->actions_num = ++i;
 584         return 0;
 585 }
 586
 587 /**
 588  * Convert modify-header set TP action to DV specification.
 589  *
 590  * @param[in,out] resource
 591  *   Pointer to the modify-header resource.
 592  * @param[in] action
 593  *   Pointer to action specification.
 594  * @param[in] items
 595  *   Pointer to rte_flow_item objects list.
 596  * @param[in] attr
 597  *   Pointer to flow attributes structure.
 598  * @param[out] error
 599  *   Pointer to the error structure.
 600  *
 601  * @return
 602  *   0 on success, a negative errno value otherwise and rte_errno is set.
 603  */
 604 static int
 605 flow_dv_convert_action_modify_tp
 606                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 607                          const struct rte_flow_action *action,
 608                          const struct rte_flow_item *items,
 609                          union flow_dv_attr *attr,
 610                          struct rte_flow_error *error)
 611 {
 612         const struct rte_flow_action_set_tp *conf =
 613                 (const struct rte_flow_action_set_tp *)(action->conf);
 614         struct rte_flow_item item;
 615         struct rte_flow_item_udp udp;
 616         struct rte_flow_item_udp udp_mask;
 617         struct rte_flow_item_tcp tcp;
 618         struct rte_flow_item_tcp tcp_mask;
 619         struct field_modify_info *field;
 620
 621         if (!attr->valid)
 622                 flow_dv_attr_init(items, attr);
 623         if (attr->udp) {
 624                 memset(&udp, 0, sizeof(udp));
 625                 memset(&udp_mask, 0, sizeof(udp_mask));
 626                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 627                         udp.hdr.src_port = conf->port;
 628                         udp_mask.hdr.src_port =
 629                                         rte_flow_item_udp_mask.hdr.src_port;
 630                 } else {
 631                         udp.hdr.dst_port = conf->port;
 632                         udp_mask.hdr.dst_port =
 633                                         rte_flow_item_udp_mask.hdr.dst_port;
 634                 }
 635                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 636                 item.spec = &udp;
 637                 item.mask = &udp_mask;
 638                 field = modify_udp;
 639         }
 640         if (attr->tcp) {
 641                 memset(&tcp, 0, sizeof(tcp));
 642                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 643                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 644                         tcp.hdr.src_port = conf->port;
 645                         tcp_mask.hdr.src_port =
 646                                         rte_flow_item_tcp_mask.hdr.src_port;
 647                 } else {
 648                         tcp.hdr.dst_port = conf->port;
 649                         tcp_mask.hdr.dst_port =
 650                                         rte_flow_item_tcp_mask.hdr.dst_port;
 651                 }
 652                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 653                 item.spec = &tcp;
 654                 item.mask = &tcp_mask;
 655                 field = modify_tcp;
 656         }
 657         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 658                                              MLX5_MODIFICATION_TYPE_SET, error);
 659 }
 660
 661 /**
 662  * Convert modify-header set TTL action to DV specification.
 663  *
 664  * @param[in,out] resource
 665  *   Pointer to the modify-header resource.
 666  * @param[in] action
 667  *   Pointer to action specification.
 668  * @param[in] items
 669  *   Pointer to rte_flow_item objects list.
 670  * @param[in] attr
 671  *   Pointer to flow attributes structure.
 672  * @param[out] error
 673  *   Pointer to the error structure.
 674  *
 675  * @return
 676  *   0 on success, a negative errno value otherwise and rte_errno is set.
 677  */
 678 static int
 679 flow_dv_convert_action_modify_ttl
 680                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 681                          const struct rte_flow_action *action,
 682                          const struct rte_flow_item *items,
 683                          union flow_dv_attr *attr,
 684                          struct rte_flow_error *error)
 685 {
 686         const struct rte_flow_action_set_ttl *conf =
 687                 (const struct rte_flow_action_set_ttl *)(action->conf);
 688         struct rte_flow_item item;
 689         struct rte_flow_item_ipv4 ipv4;
 690         struct rte_flow_item_ipv4 ipv4_mask;
 691         struct rte_flow_item_ipv6 ipv6;
 692         struct rte_flow_item_ipv6 ipv6_mask;
 693         struct field_modify_info *field;
 694
 695         if (!attr->valid)
 696                 flow_dv_attr_init(items, attr);
 697         if (attr->ipv4) {
 698                 memset(&ipv4, 0, sizeof(ipv4));
 699                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 700                 ipv4.hdr.time_to_live = conf->ttl_value;
 701                 ipv4_mask.hdr.time_to_live = 0xFF;
 702                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 703                 item.spec = &ipv4;
 704                 item.mask = &ipv4_mask;
 705                 field = modify_ipv4;
 706         }
 707         if (attr->ipv6) {
 708                 memset(&ipv6, 0, sizeof(ipv6));
 709                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 710                 ipv6.hdr.hop_limits = conf->ttl_value;
 711                 ipv6_mask.hdr.hop_limits = 0xFF;
 712                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 713                 item.spec = &ipv6;
 714                 item.mask = &ipv6_mask;
 715                 field = modify_ipv6;
 716         }
 717         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 718                                              MLX5_MODIFICATION_TYPE_SET, error);
 719 }
 720
 721 /**
 722  * Convert modify-header decrement TTL action to DV specification.
 723  *
 724  * @param[in,out] resource
 725  *   Pointer to the modify-header resource.
 726  * @param[in] action
 727  *   Pointer to action specification.
 728  * @param[in] items
 729  *   Pointer to rte_flow_item objects list.
 730  * @param[in] attr
 731  *   Pointer to flow attributes structure.
 732  * @param[out] error
 733  *   Pointer to the error structure.
 734  *
 735  * @return
 736  *   0 on success, a negative errno value otherwise and rte_errno is set.
 737  */
 738 static int
 739 flow_dv_convert_action_modify_dec_ttl
 740                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 741                          const struct rte_flow_item *items,
 742                          union flow_dv_attr *attr,
 743                          struct rte_flow_error *error)
 744 {
 745         struct rte_flow_item item;
 746         struct rte_flow_item_ipv4 ipv4;
 747         struct rte_flow_item_ipv4 ipv4_mask;
 748         struct rte_flow_item_ipv6 ipv6;
 749         struct rte_flow_item_ipv6 ipv6_mask;
 750         struct field_modify_info *field;
 751
 752         if (!attr->valid)
 753                 flow_dv_attr_init(items, attr);
 754         if (attr->ipv4) {
 755                 memset(&ipv4, 0, sizeof(ipv4));
 756                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 757                 ipv4.hdr.time_to_live = 0xFF;
 758                 ipv4_mask.hdr.time_to_live = 0xFF;
 759                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 760                 item.spec = &ipv4;
 761                 item.mask = &ipv4_mask;
 762                 field = modify_ipv4;
 763         }
 764         if (attr->ipv6) {
 765                 memset(&ipv6, 0, sizeof(ipv6));
 766                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 767                 ipv6.hdr.hop_limits = 0xFF;
 768                 ipv6_mask.hdr.hop_limits = 0xFF;
 769                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 770                 item.spec = &ipv6;
 771                 item.mask = &ipv6_mask;
 772                 field = modify_ipv6;
 773         }
 774         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 775                                              MLX5_MODIFICATION_TYPE_ADD, error);
 776 }
 777
 778 /**
 779  * Convert modify-header increment/decrement TCP Sequence number
 780  * to DV specification.
 781  *
 782  * @param[in,out] resource
 783  *   Pointer to the modify-header resource.
 784  * @param[in] action
 785  *   Pointer to action specification.
 786  * @param[out] error
 787  *   Pointer to the error structure.
 788  *
 789  * @return
 790  *   0 on success, a negative errno value otherwise and rte_errno is set.
 791  */
 792 static int
 793 flow_dv_convert_action_modify_tcp_seq
 794                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 795                          const struct rte_flow_action *action,
 796                          struct rte_flow_error *error)
 797 {
 798         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 799         uint64_t value = rte_be_to_cpu_32(*conf);
 800         struct rte_flow_item item;
 801         struct rte_flow_item_tcp tcp;
 802         struct rte_flow_item_tcp tcp_mask;
 803
 804         memset(&tcp, 0, sizeof(tcp));
 805         memset(&tcp_mask, 0, sizeof(tcp_mask));
 806         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 807                 /*
 808                  * The HW has no decrement operation, only increment operation.
 809                  * To simulate decrement X from Y using increment operation
 810                  * we need to add UINT32_MAX X times to Y.
 811                  * Each adding of UINT32_MAX decrements Y by 1.
 812                  */
 813                 value *= UINT32_MAX;
 814         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 815         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 816         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 817         item.spec = &tcp;
 818         item.mask = &tcp_mask;
 819         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 820                                              MLX5_MODIFICATION_TYPE_ADD, error);
 821 }
 822
 823 /**
 824  * Convert modify-header increment/decrement TCP Acknowledgment number
 825  * to DV specification.
 826  *
 827  * @param[in,out] resource
 828  *   Pointer to the modify-header resource.
 829  * @param[in] action
 830  *   Pointer to action specification.
 831  * @param[out] error
 832  *   Pointer to the error structure.
 833  *
 834  * @return
 835  *   0 on success, a negative errno value otherwise and rte_errno is set.
 836  */
 837 static int
 838 flow_dv_convert_action_modify_tcp_ack
 839                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 840                          const struct rte_flow_action *action,
 841                          struct rte_flow_error *error)
 842 {
 843         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 844         uint64_t value = rte_be_to_cpu_32(*conf);
 845         struct rte_flow_item item;
 846         struct rte_flow_item_tcp tcp;
 847         struct rte_flow_item_tcp tcp_mask;
 848
 849         memset(&tcp, 0, sizeof(tcp));
 850         memset(&tcp_mask, 0, sizeof(tcp_mask));
 851         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 852                 /*
 853                  * The HW has no decrement operation, only increment operation.
 854                  * To simulate decrement X from Y using increment operation
 855                  * we need to add UINT32_MAX X times to Y.
 856                  * Each adding of UINT32_MAX decrements Y by 1.
 857                  */
 858                 value *= UINT32_MAX;
 859         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 860         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 861         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 862         item.spec = &tcp;
 863         item.mask = &tcp_mask;
 864         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 865                                              MLX5_MODIFICATION_TYPE_ADD, error);
 866 }
 867
 868 static enum mlx5_modification_field reg_to_field[] = {
 869         [REG_NONE] = MLX5_MODI_OUT_NONE,
 870         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 871         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 872         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 873         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 874         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 875         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 876         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 877         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 878         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 879         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 880 };
 881
 882 /**
 883  * Convert register set to DV specification.
 884  *
 885  * @param[in,out] resource
 886  *   Pointer to the modify-header resource.
 887  * @param[in] action
 888  *   Pointer to action specification.
 889  * @param[out] error
 890  *   Pointer to the error structure.
 891  *
 892  * @return
 893  *   0 on success, a negative errno value otherwise and rte_errno is set.
 894  */
 895 static int
 896 flow_dv_convert_action_set_reg
 897                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 898                          const struct rte_flow_action *action,
 899                          struct rte_flow_error *error)
 900 {
 901         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 902         struct mlx5_modification_cmd *actions = resource->actions;
 903         uint32_t i = resource->actions_num;
 904
 905         if (i >= MLX5_MODIFY_NUM)
 906                 return rte_flow_error_set(error, EINVAL,
 907                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 908                                           "too many items to modify");
 909         assert(conf->id != REG_NONE);
 910         assert(conf->id < RTE_DIM(reg_to_field));
 911         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 912         actions[i].field = reg_to_field[conf->id];
 913         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 914         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 915         ++i;
 916         resource->actions_num = i;
 917         if (!resource->actions_num)
 918                 return rte_flow_error_set(error, EINVAL,
 919                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 920                                           "invalid modification flow item");
 921         return 0;
 922 }
 923
 924 /**
 925  * Convert SET_TAG action to DV specification.
 926  *
 927  * @param[in] dev
 928  *   Pointer to the rte_eth_dev structure.
 929  * @param[in,out] resource
 930  *   Pointer to the modify-header resource.
 931  * @param[in] conf
 932  *   Pointer to action specification.
 933  * @param[out] error
 934  *   Pointer to the error structure.
 935  *
 936  * @return
 937  *   0 on success, a negative errno value otherwise and rte_errno is set.
 938  */
 939 static int
 940 flow_dv_convert_action_set_tag
 941                         (struct rte_eth_dev *dev,
 942                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 943                          const struct rte_flow_action_set_tag *conf,
 944                          struct rte_flow_error *error)
 945 {
 946         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 947         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 948         struct rte_flow_item item = {
 949                 .spec = &data,
 950                 .mask = &mask,
 951         };
 952         struct field_modify_info reg_c_x[] = {
 953                 [1] = {0, 0, 0},
 954         };
 955         enum mlx5_modification_field reg_type;
 956         int ret;
 957
 958         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 959         if (ret < 0)
 960                 return ret;
 961         assert(ret != REG_NONE);
 962         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 963         reg_type = reg_to_field[ret];
 964         assert(reg_type > 0);
 965         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 966         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 967                                              MLX5_MODIFICATION_TYPE_SET, error);
 968 }
 969
 970 /**
 971  * Convert internal COPY_REG action to DV specification.
 972  *
 973  * @param[in] dev
 974  *   Pointer to the rte_eth_dev structure.
 975  * @param[in,out] res
 976  *   Pointer to the modify-header resource.
 977  * @param[in] action
 978  *   Pointer to action specification.
 979  * @param[out] error
 980  *   Pointer to the error structure.
 981  *
 982  * @return
 983  *   0 on success, a negative errno value otherwise and rte_errno is set.
 984  */
 985 static int
 986 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 987                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 988                                  const struct rte_flow_action *action,
 989                                  struct rte_flow_error *error)
 990 {
 991         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 992         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 993         struct rte_flow_item item = {
 994                 .spec = NULL,
 995                 .mask = &mask,
 996         };
 997         struct field_modify_info reg_src[] = {
 998                 {4, 0, reg_to_field[conf->src]},
 999                 {0, 0, 0},
1000         };
1001         struct field_modify_info reg_dst = {
1002                 .offset = 0,
1003                 .id = reg_to_field[conf->dst],
1004         };
1005         /* Adjust reg_c[0] usage according to reported mask. */
1006         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1007                 struct mlx5_priv *priv = dev->data->dev_private;
1008                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1009
1010                 assert(reg_c0);
1011                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1012                 if (conf->dst == REG_C_0) {
1013                         /* Copy to reg_c[0], within mask only. */
1014                         reg_dst.offset = rte_bsf32(reg_c0);
1015                         /*
1016                          * Mask is ignoring the enianness, because
1017                          * there is no conversion in datapath.
1018                          */
1019 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1020                         /* Copy from destination lower bits to reg_c[0]. */
1021                         mask = reg_c0 >> reg_dst.offset;
1022 #else
1023                         /* Copy from destination upper bits to reg_c[0]. */
1024                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1025                                           rte_fls_u32(reg_c0));
1026 #endif
1027                 } else {
1028                         mask = rte_cpu_to_be_32(reg_c0);
1029 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1030                         /* Copy from reg_c[0] to destination lower bits. */
1031                         reg_dst.offset = 0;
1032 #else
1033                         /* Copy from reg_c[0] to destination upper bits. */
1034                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1035                                          (rte_fls_u32(reg_c0) -
1036                                           rte_bsf32(reg_c0));
1037 #endif
1038                 }
1039         }
1040         return flow_dv_convert_modify_action(&item,
1041                                              reg_src, &reg_dst, res,
1042                                              MLX5_MODIFICATION_TYPE_COPY,
1043                                              error);
1044 }
1045
1046 /**
1047  * Convert MARK action to DV specification. This routine is used
1048  * in extensive metadata only and requires metadata register to be
1049  * handled. In legacy mode hardware tag resource is engaged.
1050  *
1051  * @param[in] dev
1052  *   Pointer to the rte_eth_dev structure.
1053  * @param[in] conf
1054  *   Pointer to MARK action specification.
1055  * @param[in,out] resource
1056  *   Pointer to the modify-header resource.
1057  * @param[out] error
1058  *   Pointer to the error structure.
1059  *
1060  * @return
1061  *   0 on success, a negative errno value otherwise and rte_errno is set.
1062  */
1063 static int
1064 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1065                             const struct rte_flow_action_mark *conf,
1066                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1067                             struct rte_flow_error *error)
1068 {
1069         struct mlx5_priv *priv = dev->data->dev_private;
1070         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1071                                            priv->sh->dv_mark_mask);
1072         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1073         struct rte_flow_item item = {
1074                 .spec = &data,
1075                 .mask = &mask,
1076         };
1077         struct field_modify_info reg_c_x[] = {
1078                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1079                 {0, 0, 0},
1080         };
1081         enum modify_reg reg;
1082
1083         if (!mask)
1084                 return rte_flow_error_set(error, EINVAL,
1085                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1086                                           NULL, "zero mark action mask");
1087         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1088         if (reg < 0)
1089                 return reg;
1090         assert(reg > 0);
1091         reg_c_x[0].id = reg_to_field[reg];
1092         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1093                                              MLX5_MODIFICATION_TYPE_SET, error);
1094 }
1095
1096 /**
1097  * Get metadata register index for specified steering domain.
1098  *
1099  * @param[in] dev
1100  *   Pointer to the rte_eth_dev structure.
1101  * @param[in] attr
1102  *   Attributes of flow to determine steering domain.
1103  * @param[out] error
1104  *   Pointer to the error structure.
1105  *
1106  * @return
1107  *   positive index on success, a negative errno value otherwise
1108  *   and rte_errno is set.
1109  */
1110 static enum modify_reg
1111 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1112                          const struct rte_flow_attr *attr,
1113                          struct rte_flow_error *error)
1114 {
1115         enum modify_reg reg =
1116                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1117                                           MLX5_METADATA_FDB :
1118                                             attr->egress ?
1119                                             MLX5_METADATA_TX :
1120                                             MLX5_METADATA_RX, 0, error);
1121         if (reg < 0)
1122                 return rte_flow_error_set(error,
1123                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1124                                           NULL, "unavailable "
1125                                           "metadata register");
1126         return reg;
1127 }
1128
1129 /**
1130  * Convert SET_META action to DV specification.
1131  *
1132  * @param[in] dev
1133  *   Pointer to the rte_eth_dev structure.
1134  * @param[in,out] resource
1135  *   Pointer to the modify-header resource.
1136  * @param[in] attr
1137  *   Attributes of flow that includes this item.
1138  * @param[in] conf
1139  *   Pointer to action specification.
1140  * @param[out] error
1141  *   Pointer to the error structure.
1142  *
1143  * @return
1144  *   0 on success, a negative errno value otherwise and rte_errno is set.
1145  */
1146 static int
1147 flow_dv_convert_action_set_meta
1148                         (struct rte_eth_dev *dev,
1149                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1150                          const struct rte_flow_attr *attr,
1151                          const struct rte_flow_action_set_meta *conf,
1152                          struct rte_flow_error *error)
1153 {
1154         uint32_t data = conf->data;
1155         uint32_t mask = conf->mask;
1156         struct rte_flow_item item = {
1157                 .spec = &data,
1158                 .mask = &mask,
1159         };
1160         struct field_modify_info reg_c_x[] = {
1161                 [1] = {0, 0, 0},
1162         };
1163         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1164
1165         if (reg < 0)
1166                 return reg;
1167         /*
1168          * In datapath code there is no endianness
1169          * coversions for perfromance reasons, all
1170          * pattern conversions are done in rte_flow.
1171          */
1172         if (reg == REG_C_0) {
1173                 struct mlx5_priv *priv = dev->data->dev_private;
1174                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1175                 uint32_t shl_c0;
1176
1177                 assert(msk_c0);
1178 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1179                 shl_c0 = rte_bsf32(msk_c0);
1180 #else
1181                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1182 #endif
1183                 mask <<= shl_c0;
1184                 data <<= shl_c0;
1185                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1186         }
1187         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1188         /* The routine expects parameters in memory as big-endian ones. */
1189         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1190                                              MLX5_MODIFICATION_TYPE_SET, error);
1191 }
1192
1193 /**
1194  * Validate MARK item.
1195  *
1196  * @param[in] dev
1197  *   Pointer to the rte_eth_dev structure.
1198  * @param[in] item
1199  *   Item specification.
1200  * @param[in] attr
1201  *   Attributes of flow that includes this item.
1202  * @param[out] error
1203  *   Pointer to error structure.
1204  *
1205  * @return
1206  *   0 on success, a negative errno value otherwise and rte_errno is set.
1207  */
1208 static int
1209 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1210                            const struct rte_flow_item *item,
1211                            const struct rte_flow_attr *attr __rte_unused,
1212                            struct rte_flow_error *error)
1213 {
1214         struct mlx5_priv *priv = dev->data->dev_private;
1215         struct mlx5_dev_config *config = &priv->config;
1216         const struct rte_flow_item_mark *spec = item->spec;
1217         const struct rte_flow_item_mark *mask = item->mask;
1218         const struct rte_flow_item_mark nic_mask = {
1219                 .id = priv->sh->dv_mark_mask,
1220         };
1221         int ret;
1222
1223         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1224                 return rte_flow_error_set(error, ENOTSUP,
1225                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1226                                           "extended metadata feature"
1227                                           " isn't enabled");
1228         if (!mlx5_flow_ext_mreg_supported(dev))
1229                 return rte_flow_error_set(error, ENOTSUP,
1230                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1231                                           "extended metadata register"
1232                                           " isn't supported");
1233         if (!nic_mask.id)
1234                 return rte_flow_error_set(error, ENOTSUP,
1235                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1236                                           "extended metadata register"
1237                                           " isn't available");
1238         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1239         if (ret < 0)
1240                 return ret;
1241         if (!spec)
1242                 return rte_flow_error_set(error, EINVAL,
1243                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1244                                           item->spec,
1245                                           "data cannot be empty");
1246         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1247                 return rte_flow_error_set(error, EINVAL,
1248                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1249                                           &spec->id,
1250                                           "mark id exceeds the limit");
1251         if (!mask)
1252                 mask = &nic_mask;
1253         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1254                                         (const uint8_t *)&nic_mask,
1255                                         sizeof(struct rte_flow_item_mark),
1256                                         error);
1257         if (ret < 0)
1258                 return ret;
1259         return 0;
1260 }
1261
1262 /**
1263  * Validate META item.
1264  *
1265  * @param[in] dev
1266  *   Pointer to the rte_eth_dev structure.
1267  * @param[in] item
1268  *   Item specification.
1269  * @param[in] attr
1270  *   Attributes of flow that includes this item.
1271  * @param[out] error
1272  *   Pointer to error structure.
1273  *
1274  * @return
1275  *   0 on success, a negative errno value otherwise and rte_errno is set.
1276  */
1277 static int
1278 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1279                            const struct rte_flow_item *item,
1280                            const struct rte_flow_attr *attr,
1281                            struct rte_flow_error *error)
1282 {
1283         struct mlx5_priv *priv = dev->data->dev_private;
1284         struct mlx5_dev_config *config = &priv->config;
1285         const struct rte_flow_item_meta *spec = item->spec;
1286         const struct rte_flow_item_meta *mask = item->mask;
1287         struct rte_flow_item_meta nic_mask = {
1288                 .data = UINT32_MAX
1289         };
1290         enum modify_reg reg;
1291         int ret;
1292
1293         if (!spec)
1294                 return rte_flow_error_set(error, EINVAL,
1295                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1296                                           item->spec,
1297                                           "data cannot be empty");
1298         if (!spec->data)
1299                 return rte_flow_error_set(error, EINVAL,
1300                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1301                                           "data cannot be zero");
1302         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1303                 if (!mlx5_flow_ext_mreg_supported(dev))
1304                         return rte_flow_error_set(error, ENOTSUP,
1305                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1306                                           "extended metadata register"
1307                                           " isn't supported");
1308                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1309                 if (reg < 0)
1310                         return reg;
1311                 if (reg == REG_B)
1312                         return rte_flow_error_set(error, ENOTSUP,
1313                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1314                                           "match on reg_b "
1315                                           "isn't supported");
1316                 if (reg != REG_A)
1317                         nic_mask.data = priv->sh->dv_meta_mask;
1318         }
1319         if (!mask)
1320                 mask = &rte_flow_item_meta_mask;
1321         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1322                                         (const uint8_t *)&nic_mask,
1323                                         sizeof(struct rte_flow_item_meta),
1324                                         error);
1325         return ret;
1326 }
1327
1328 /**
1329  * Validate TAG item.
1330  *
1331  * @param[in] dev
1332  *   Pointer to the rte_eth_dev structure.
1333  * @param[in] item
1334  *   Item specification.
1335  * @param[in] attr
1336  *   Attributes of flow that includes this item.
1337  * @param[out] error
1338  *   Pointer to error structure.
1339  *
1340  * @return
1341  *   0 on success, a negative errno value otherwise and rte_errno is set.
1342  */
1343 static int
1344 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1345                           const struct rte_flow_item *item,
1346                           const struct rte_flow_attr *attr __rte_unused,
1347                           struct rte_flow_error *error)
1348 {
1349         const struct rte_flow_item_tag *spec = item->spec;
1350         const struct rte_flow_item_tag *mask = item->mask;
1351         const struct rte_flow_item_tag nic_mask = {
1352                 .data = RTE_BE32(UINT32_MAX),
1353                 .index = 0xff,
1354         };
1355         int ret;
1356
1357         if (!mlx5_flow_ext_mreg_supported(dev))
1358                 return rte_flow_error_set(error, ENOTSUP,
1359                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1360                                           "extensive metadata register"
1361                                           " isn't supported");
1362         if (!spec)
1363                 return rte_flow_error_set(error, EINVAL,
1364                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1365                                           item->spec,
1366                                           "data cannot be empty");
1367         if (!mask)
1368                 mask = &rte_flow_item_tag_mask;
1369         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1370                                         (const uint8_t *)&nic_mask,
1371                                         sizeof(struct rte_flow_item_tag),
1372                                         error);
1373         if (ret < 0)
1374                 return ret;
1375         if (mask->index != 0xff)
1376                 return rte_flow_error_set(error, EINVAL,
1377                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1378                                           "partial mask for tag index"
1379                                           " is not supported");
1380         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1381         if (ret < 0)
1382                 return ret;
1383         assert(ret != REG_NONE);
1384         return 0;
1385 }
1386
1387 /**
1388  * Validate vport item.
1389  *
1390  * @param[in] dev
1391  *   Pointer to the rte_eth_dev structure.
1392  * @param[in] item
1393  *   Item specification.
1394  * @param[in] attr
1395  *   Attributes of flow that includes this item.
1396  * @param[in] item_flags
1397  *   Bit-fields that holds the items detected until now.
1398  * @param[out] error
1399  *   Pointer to error structure.
1400  *
1401  * @return
1402  *   0 on success, a negative errno value otherwise and rte_errno is set.
1403  */
1404 static int
1405 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1406                               const struct rte_flow_item *item,
1407                               const struct rte_flow_attr *attr,
1408                               uint64_t item_flags,
1409                               struct rte_flow_error *error)
1410 {
1411         const struct rte_flow_item_port_id *spec = item->spec;
1412         const struct rte_flow_item_port_id *mask = item->mask;
1413         const struct rte_flow_item_port_id switch_mask = {
1414                         .id = 0xffffffff,
1415         };
1416         struct mlx5_priv *esw_priv;
1417         struct mlx5_priv *dev_priv;
1418         int ret;
1419
1420         if (!attr->transfer)
1421                 return rte_flow_error_set(error, EINVAL,
1422                                           RTE_FLOW_ERROR_TYPE_ITEM,
1423                                           NULL,
1424                                           "match on port id is valid only"
1425                                           " when transfer flag is enabled");
1426         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1427                 return rte_flow_error_set(error, ENOTSUP,
1428                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1429                                           "multiple source ports are not"
1430                                           " supported");
1431         if (!mask)
1432                 mask = &switch_mask;
1433         if (mask->id != 0xffffffff)
1434                 return rte_flow_error_set(error, ENOTSUP,
1435                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1436                                            mask,
1437                                            "no support for partial mask on"
1438                                            " \"id\" field");
1439         ret = mlx5_flow_item_acceptable
1440                                 (item, (const uint8_t *)mask,
1441                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1442                                  sizeof(struct rte_flow_item_port_id),
1443                                  error);
1444         if (ret)
1445                 return ret;
1446         if (!spec)
1447                 return 0;
1448         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1449         if (!esw_priv)
1450                 return rte_flow_error_set(error, rte_errno,
1451                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1452                                           "failed to obtain E-Switch info for"
1453                                           " port");
1454         dev_priv = mlx5_dev_to_eswitch_info(dev);
1455         if (!dev_priv)
1456                 return rte_flow_error_set(error, rte_errno,
1457                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1458                                           NULL,
1459                                           "failed to obtain E-Switch info");
1460         if (esw_priv->domain_id != dev_priv->domain_id)
1461                 return rte_flow_error_set(error, EINVAL,
1462                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1463                                           "cannot match on a port from a"
1464                                           " different E-Switch");
1465         return 0;
1466 }
1467
1468 /**
1469  * Validate the pop VLAN action.
1470  *
1471  * @param[in] dev
1472  *   Pointer to the rte_eth_dev structure.
1473  * @param[in] action_flags
1474  *   Holds the actions detected until now.
1475  * @param[in] action
1476  *   Pointer to the pop vlan action.
1477  * @param[in] item_flags
1478  *   The items found in this flow rule.
1479  * @param[in] attr
1480  *   Pointer to flow attributes.
1481  * @param[out] error
1482  *   Pointer to error structure.
1483  *
1484  * @return
1485  *   0 on success, a negative errno value otherwise and rte_errno is set.
1486  */
1487 static int
1488 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1489                                  uint64_t action_flags,
1490                                  const struct rte_flow_action *action,
1491                                  uint64_t item_flags,
1492                                  const struct rte_flow_attr *attr,
1493                                  struct rte_flow_error *error)
1494 {
1495         struct mlx5_priv *priv = dev->data->dev_private;
1496
1497         (void)action;
1498         (void)attr;
1499         if (!priv->sh->pop_vlan_action)
1500                 return rte_flow_error_set(error, ENOTSUP,
1501                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1502                                           NULL,
1503                                           "pop vlan action is not supported");
1504         /*
1505          * Check for inconsistencies:
1506          *  fail strip_vlan in a flow that matches packets without VLAN tags.
1507          *  fail strip_vlan in a flow that matches packets without explicitly a
1508          *  matching on VLAN tag ?
1509          */
1510         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
1511                 return rte_flow_error_set(error, ENOTSUP,
1512                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1513                                           NULL,
1514                                           "no support for multiple vlan pop "
1515                                           "actions");
1516         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1517                 return rte_flow_error_set(error, ENOTSUP,
1518                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1519                                           NULL,
1520                                           "cannot pop vlan without a "
1521                                           "match on (outer) vlan in the flow");
1522         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1523                 return rte_flow_error_set(error, EINVAL,
1524                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1525                                           "wrong action order, port_id should "
1526                                           "be after pop VLAN action");
1527         return 0;
1528 }
1529
1530 /**
1531  * Get VLAN default info from vlan match info.
1532  *
1533  * @param[in] dev
1534  *   Pointer to the rte_eth_dev structure.
1535  * @param[in] item
1536  *   the list of item specifications.
1537  * @param[out] vlan
1538  *   pointer VLAN info to fill to.
1539  * @param[out] error
1540  *   Pointer to error structure.
1541  *
1542  * @return
1543  *   0 on success, a negative errno value otherwise and rte_errno is set.
1544  */
1545 static void
1546 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1547                                   struct rte_vlan_hdr *vlan)
1548 {
1549         const struct rte_flow_item_vlan nic_mask = {
1550                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1551                                 MLX5DV_FLOW_VLAN_VID_MASK),
1552                 .inner_type = RTE_BE16(0xffff),
1553         };
1554
1555         if (items == NULL)
1556                 return;
1557         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1558                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1559                 ;
1560         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1561                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1562                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1563
1564                 if (!vlan_m)
1565                         vlan_m = &nic_mask;
1566                 /* Only full match values are accepted */
1567                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1568                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1569                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1570                         vlan->vlan_tci |=
1571                                 rte_be_to_cpu_16(vlan_v->tci &
1572                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1573                 }
1574                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1575                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1576                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1577                         vlan->vlan_tci |=
1578                                 rte_be_to_cpu_16(vlan_v->tci &
1579                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1580                 }
1581                 if (vlan_m->inner_type == nic_mask.inner_type)
1582                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1583                                                            vlan_m->inner_type);
1584         }
1585 }
1586
1587 /**
1588  * Validate the push VLAN action.
1589  *
1590  * @param[in] action_flags
1591  *   Holds the actions detected until now.
1592  * @param[in] action
1593  *   Pointer to the encap action.
1594  * @param[in] attr
1595  *   Pointer to flow attributes
1596  * @param[out] error
1597  *   Pointer to error structure.
1598  *
1599  * @return
1600  *   0 on success, a negative errno value otherwise and rte_errno is set.
1601  */
1602 static int
1603 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1604                                   uint64_t item_flags,
1605                                   const struct rte_flow_action *action,
1606                                   const struct rte_flow_attr *attr,
1607                                   struct rte_flow_error *error)
1608 {
1609         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1610
1611         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1612             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1613                 return rte_flow_error_set(error, EINVAL,
1614                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1615                                           "invalid vlan ethertype");
1616         if (action_flags &
1617                 (MLX5_FLOW_ACTION_OF_POP_VLAN | MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1618                 return rte_flow_error_set(error, ENOTSUP,
1619                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1620                                           "no support for multiple VLAN "
1621                                           "actions");
1622         if (!mlx5_flow_find_action
1623                         (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) &&
1624             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1625                 return rte_flow_error_set(error, ENOTSUP,
1626                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
1627                                 "push VLAN needs to match on VLAN in order to "
1628                                 "get VLAN VID information because there is "
1629                                 "no followed set VLAN VID action");
1630         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1631                 return rte_flow_error_set(error, EINVAL,
1632                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1633                                           "wrong action order, port_id should "
1634                                           "be after push VLAN");
1635         (void)attr;
1636         return 0;
1637 }
1638
1639 /**
1640  * Validate the set VLAN PCP.
1641  *
1642  * @param[in] action_flags
1643  *   Holds the actions detected until now.
1644  * @param[in] actions
1645  *   Pointer to the list of actions remaining in the flow rule.
1646  * @param[in] attr
1647  *   Pointer to flow attributes
1648  * @param[out] error
1649  *   Pointer to error structure.
1650  *
1651  * @return
1652  *   0 on success, a negative errno value otherwise and rte_errno is set.
1653  */
1654 static int
1655 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1656                                      const struct rte_flow_action actions[],
1657                                      struct rte_flow_error *error)
1658 {
1659         const struct rte_flow_action *action = actions;
1660         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1661
1662         if (conf->vlan_pcp > 7)
1663                 return rte_flow_error_set(error, EINVAL,
1664                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1665                                           "VLAN PCP value is too big");
1666         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1667                 return rte_flow_error_set(error, ENOTSUP,
1668                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1669                                           "set VLAN PCP action must follow "
1670                                           "the push VLAN action");
1671         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1672                 return rte_flow_error_set(error, ENOTSUP,
1673                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1674                                           "Multiple VLAN PCP modification are "
1675                                           "not supported");
1676         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1677                 return rte_flow_error_set(error, EINVAL,
1678                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1679                                           "wrong action order, port_id should "
1680                                           "be after set VLAN PCP");
1681         return 0;
1682 }
1683
1684 /**
1685  * Validate the set VLAN VID.
1686  *
1687  * @param[in] item_flags
1688  *   Holds the items detected in this rule.
1689  * @param[in] actions
1690  *   Pointer to the list of actions remaining in the flow rule.
1691  * @param[in] attr
1692  *   Pointer to flow attributes
1693  * @param[out] error
1694  *   Pointer to error structure.
1695  *
1696  * @return
1697  *   0 on success, a negative errno value otherwise and rte_errno is set.
1698  */
1699 static int
1700 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1701                                      uint64_t action_flags,
1702                                      const struct rte_flow_action actions[],
1703                                      struct rte_flow_error *error)
1704 {
1705         const struct rte_flow_action *action = actions;
1706         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1707
1708         if (conf->vlan_vid > RTE_BE16(0xFFE))
1709                 return rte_flow_error_set(error, EINVAL,
1710                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1711                                           "VLAN VID value is too big");
1712         /* there is an of_push_vlan action before us */
1713         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1714                 if (mlx5_flow_find_action(actions + 1,
1715                                           RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1716                         return rte_flow_error_set(error, ENOTSUP,
1717                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
1718                                         "Multiple VLAN VID modifications are "
1719                                         "not supported");
1720                 else
1721                         return 0;
1722         }
1723
1724         /*
1725          * Action is on an existing VLAN header:
1726          *    Need to verify this is a single modify CID action.
1727          *   Rule mast include a match on outer VLAN.
1728          */
1729         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1730                 return rte_flow_error_set(error, ENOTSUP,
1731                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1732                                           "Multiple VLAN VID modifications are "
1733                                           "not supported");
1734         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1735                 return rte_flow_error_set(error, EINVAL,
1736                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1737                                           "match on VLAN is required in order "
1738                                           "to set VLAN VID");
1739         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1740                 return rte_flow_error_set(error, EINVAL,
1741                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1742                                           "wrong action order, port_id should "
1743                                           "be after set VLAN VID");
1744         return 0;
1745 }
1746
1747 /*
1748  * Validate the FLAG action.
1749  *
1750  * @param[in] dev
1751  *   Pointer to the rte_eth_dev structure.
1752  * @param[in] action_flags
1753  *   Holds the actions detected until now.
1754  * @param[in] attr
1755  *   Pointer to flow attributes
1756  * @param[out] error
1757  *   Pointer to error structure.
1758  *
1759  * @return
1760  *   0 on success, a negative errno value otherwise and rte_errno is set.
1761  */
1762 static int
1763 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1764                              uint64_t action_flags,
1765                              const struct rte_flow_attr *attr,
1766                              struct rte_flow_error *error)
1767 {
1768         struct mlx5_priv *priv = dev->data->dev_private;
1769         struct mlx5_dev_config *config = &priv->config;
1770         int ret;
1771
1772         /* Fall back if no extended metadata register support. */
1773         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1774                 return mlx5_flow_validate_action_flag(action_flags, attr,
1775                                                       error);
1776         /* Extensive metadata mode requires registers. */
1777         if (!mlx5_flow_ext_mreg_supported(dev))
1778                 return rte_flow_error_set(error, ENOTSUP,
1779                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1780                                           "no metadata registers "
1781                                           "to support flag action");
1782         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1783                 return rte_flow_error_set(error, ENOTSUP,
1784                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1785                                           "extended metadata register"
1786                                           " isn't available");
1787         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1788         if (ret < 0)
1789                 return ret;
1790         assert(ret > 0);
1791         if (action_flags & MLX5_FLOW_ACTION_DROP)
1792                 return rte_flow_error_set(error, EINVAL,
1793                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1794                                           "can't drop and flag in same flow");
1795         if (action_flags & MLX5_FLOW_ACTION_MARK)
1796                 return rte_flow_error_set(error, EINVAL,
1797                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1798                                           "can't mark and flag in same flow");
1799         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1800                 return rte_flow_error_set(error, EINVAL,
1801                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1802                                           "can't have 2 flag"
1803                                           " actions in same flow");
1804         return 0;
1805 }
1806
1807 /**
1808  * Validate MARK action.
1809  *
1810  * @param[in] dev
1811  *   Pointer to the rte_eth_dev structure.
1812  * @param[in] action
1813  *   Pointer to action.
1814  * @param[in] action_flags
1815  *   Holds the actions detected until now.
1816  * @param[in] attr
1817  *   Pointer to flow attributes
1818  * @param[out] error
1819  *   Pointer to error structure.
1820  *
1821  * @return
1822  *   0 on success, a negative errno value otherwise and rte_errno is set.
1823  */
1824 static int
1825 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1826                              const struct rte_flow_action *action,
1827                              uint64_t action_flags,
1828                              const struct rte_flow_attr *attr,
1829                              struct rte_flow_error *error)
1830 {
1831         struct mlx5_priv *priv = dev->data->dev_private;
1832         struct mlx5_dev_config *config = &priv->config;
1833         const struct rte_flow_action_mark *mark = action->conf;
1834         int ret;
1835
1836         /* Fall back if no extended metadata register support. */
1837         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1838                 return mlx5_flow_validate_action_mark(action, action_flags,
1839                                                       attr, error);
1840         /* Extensive metadata mode requires registers. */
1841         if (!mlx5_flow_ext_mreg_supported(dev))
1842                 return rte_flow_error_set(error, ENOTSUP,
1843                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1844                                           "no metadata registers "
1845                                           "to support mark action");
1846         if (!priv->sh->dv_mark_mask)
1847                 return rte_flow_error_set(error, ENOTSUP,
1848                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1849                                           "extended metadata register"
1850                                           " isn't available");
1851         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1852         if (ret < 0)
1853                 return ret;
1854         assert(ret > 0);
1855         if (!mark)
1856                 return rte_flow_error_set(error, EINVAL,
1857                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1858                                           "configuration cannot be null");
1859         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1860                 return rte_flow_error_set(error, EINVAL,
1861                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1862                                           &mark->id,
1863                                           "mark id exceeds the limit");
1864         if (action_flags & MLX5_FLOW_ACTION_DROP)
1865                 return rte_flow_error_set(error, EINVAL,
1866                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1867                                           "can't drop and mark in same flow");
1868         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1869                 return rte_flow_error_set(error, EINVAL,
1870                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1871                                           "can't flag and mark in same flow");
1872         if (action_flags & MLX5_FLOW_ACTION_MARK)
1873                 return rte_flow_error_set(error, EINVAL,
1874                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1875                                           "can't have 2 mark actions in same"
1876                                           " flow");
1877         return 0;
1878 }
1879
1880 /**
1881  * Validate SET_META action.
1882  *
1883  * @param[in] dev
1884  *   Pointer to the rte_eth_dev structure.
1885  * @param[in] action
1886  *   Pointer to the encap action.
1887  * @param[in] action_flags
1888  *   Holds the actions detected until now.
1889  * @param[in] attr
1890  *   Pointer to flow attributes
1891  * @param[out] error
1892  *   Pointer to error structure.
1893  *
1894  * @return
1895  *   0 on success, a negative errno value otherwise and rte_errno is set.
1896  */
1897 static int
1898 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
1899                                  const struct rte_flow_action *action,
1900                                  uint64_t action_flags __rte_unused,
1901                                  const struct rte_flow_attr *attr,
1902                                  struct rte_flow_error *error)
1903 {
1904         const struct rte_flow_action_set_meta *conf;
1905         uint32_t nic_mask = UINT32_MAX;
1906         enum modify_reg reg;
1907
1908         if (!mlx5_flow_ext_mreg_supported(dev))
1909                 return rte_flow_error_set(error, ENOTSUP,
1910                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1911                                           "extended metadata register"
1912                                           " isn't supported");
1913         reg = flow_dv_get_metadata_reg(dev, attr, error);
1914         if (reg < 0)
1915                 return reg;
1916         if (reg != REG_A && reg != REG_B) {
1917                 struct mlx5_priv *priv = dev->data->dev_private;
1918
1919                 nic_mask = priv->sh->dv_meta_mask;
1920         }
1921         if (!(action->conf))
1922                 return rte_flow_error_set(error, EINVAL,
1923                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1924                                           "configuration cannot be null");
1925         conf = (const struct rte_flow_action_set_meta *)action->conf;
1926         if (!conf->mask)
1927                 return rte_flow_error_set(error, EINVAL,
1928                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1929                                           "zero mask doesn't have any effect");
1930         if (conf->mask & ~nic_mask)
1931                 return rte_flow_error_set(error, EINVAL,
1932                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1933                                           "meta data must be within reg C0");
1934         if (!(conf->data & conf->mask))
1935                 return rte_flow_error_set(error, EINVAL,
1936                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1937                                           "zero value has no effect");
1938         return 0;
1939 }
1940
1941 /**
1942  * Validate SET_TAG action.
1943  *
1944  * @param[in] dev
1945  *   Pointer to the rte_eth_dev structure.
1946  * @param[in] action
1947  *   Pointer to the encap action.
1948  * @param[in] action_flags
1949  *   Holds the actions detected until now.
1950  * @param[in] attr
1951  *   Pointer to flow attributes
1952  * @param[out] error
1953  *   Pointer to error structure.
1954  *
1955  * @return
1956  *   0 on success, a negative errno value otherwise and rte_errno is set.
1957  */
1958 static int
1959 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
1960                                 const struct rte_flow_action *action,
1961                                 uint64_t action_flags,
1962                                 const struct rte_flow_attr *attr,
1963                                 struct rte_flow_error *error)
1964 {
1965         const struct rte_flow_action_set_tag *conf;
1966         const uint64_t terminal_action_flags =
1967                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
1968                 MLX5_FLOW_ACTION_RSS;
1969         int ret;
1970
1971         if (!mlx5_flow_ext_mreg_supported(dev))
1972                 return rte_flow_error_set(error, ENOTSUP,
1973                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1974                                           "extensive metadata register"
1975                                           " isn't supported");
1976         if (!(action->conf))
1977                 return rte_flow_error_set(error, EINVAL,
1978                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1979                                           "configuration cannot be null");
1980         conf = (const struct rte_flow_action_set_tag *)action->conf;
1981         if (!conf->mask)
1982                 return rte_flow_error_set(error, EINVAL,
1983                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1984                                           "zero mask doesn't have any effect");
1985         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1986         if (ret < 0)
1987                 return ret;
1988         if (!attr->transfer && attr->ingress &&
1989             (action_flags & terminal_action_flags))
1990                 return rte_flow_error_set(error, EINVAL,
1991                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1992                                           "set_tag has no effect"
1993                                           " with terminal actions");
1994         return 0;
1995 }
1996
1997 /**
1998  * Validate count action.
1999  *
2000  * @param[in] dev
2001  *   device otr.
2002  * @param[out] error
2003  *   Pointer to error structure.
2004  *
2005  * @return
2006  *   0 on success, a negative errno value otherwise and rte_errno is set.
2007  */
2008 static int
2009 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2010                               struct rte_flow_error *error)
2011 {
2012         struct mlx5_priv *priv = dev->data->dev_private;
2013
2014         if (!priv->config.devx)
2015                 goto notsup_err;
2016 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2017         return 0;
2018 #endif
2019 notsup_err:
2020         return rte_flow_error_set
2021                       (error, ENOTSUP,
2022                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2023                        NULL,
2024                        "count action not supported");
2025 }
2026
2027 /**
2028  * Validate the L2 encap action.
2029  *
2030  * @param[in] action_flags
2031  *   Holds the actions detected until now.
2032  * @param[in] action
2033  *   Pointer to the encap action.
2034  * @param[in] attr
2035  *   Pointer to flow attributes
2036  * @param[out] error
2037  *   Pointer to error structure.
2038  *
2039  * @return
2040  *   0 on success, a negative errno value otherwise and rte_errno is set.
2041  */
2042 static int
2043 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2044                                  const struct rte_flow_action *action,
2045                                  const struct rte_flow_attr *attr,
2046                                  struct rte_flow_error *error)
2047 {
2048         if (!(action->conf))
2049                 return rte_flow_error_set(error, EINVAL,
2050                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2051                                           "configuration cannot be null");
2052         if (action_flags & MLX5_FLOW_ACTION_DROP)
2053                 return rte_flow_error_set(error, EINVAL,
2054                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2055                                           "can't drop and encap in same flow");
2056         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2057                 return rte_flow_error_set(error, EINVAL,
2058                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2059                                           "can only have a single encap or"
2060                                           " decap action in a flow");
2061         if (!attr->transfer && attr->ingress)
2062                 return rte_flow_error_set(error, ENOTSUP,
2063                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2064                                           NULL,
2065                                           "encap action not supported for "
2066                                           "ingress");
2067         return 0;
2068 }
2069
2070 /**
2071  * Validate the L2 decap action.
2072  *
2073  * @param[in] action_flags
2074  *   Holds the actions detected until now.
2075  * @param[in] attr
2076  *   Pointer to flow attributes
2077  * @param[out] error
2078  *   Pointer to error structure.
2079  *
2080  * @return
2081  *   0 on success, a negative errno value otherwise and rte_errno is set.
2082  */
2083 static int
2084 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2085                                  const struct rte_flow_attr *attr,
2086                                  struct rte_flow_error *error)
2087 {
2088         if (action_flags & MLX5_FLOW_ACTION_DROP)
2089                 return rte_flow_error_set(error, EINVAL,
2090                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2091                                           "can't drop and decap in same flow");
2092         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2093                 return rte_flow_error_set(error, EINVAL,
2094                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2095                                           "can only have a single encap or"
2096                                           " decap action in a flow");
2097         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2098                 return rte_flow_error_set(error, EINVAL,
2099                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2100                                           "can't have decap action after"
2101                                           " modify action");
2102         if (attr->egress)
2103                 return rte_flow_error_set(error, ENOTSUP,
2104                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2105                                           NULL,
2106                                           "decap action not supported for "
2107                                           "egress");
2108         return 0;
2109 }
2110
2111 /**
2112  * Validate the raw encap action.
2113  *
2114  * @param[in] action_flags
2115  *   Holds the actions detected until now.
2116  * @param[in] action
2117  *   Pointer to the encap action.
2118  * @param[in] attr
2119  *   Pointer to flow attributes
2120  * @param[out] error
2121  *   Pointer to error structure.
2122  *
2123  * @return
2124  *   0 on success, a negative errno value otherwise and rte_errno is set.
2125  */
2126 static int
2127 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2128                                   const struct rte_flow_action *action,
2129                                   const struct rte_flow_attr *attr,
2130                                   struct rte_flow_error *error)
2131 {
2132         const struct rte_flow_action_raw_encap *raw_encap =
2133                 (const struct rte_flow_action_raw_encap *)action->conf;
2134         if (!(action->conf))
2135                 return rte_flow_error_set(error, EINVAL,
2136                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2137                                           "configuration cannot be null");
2138         if (action_flags & MLX5_FLOW_ACTION_DROP)
2139                 return rte_flow_error_set(error, EINVAL,
2140                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2141                                           "can't drop and encap in same flow");
2142         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2143                 return rte_flow_error_set(error, EINVAL,
2144                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2145                                           "can only have a single encap"
2146                                           " action in a flow");
2147         /* encap without preceding decap is not supported for ingress */
2148         if (!attr->transfer &&  attr->ingress &&
2149             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2150                 return rte_flow_error_set(error, ENOTSUP,
2151                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2152                                           NULL,
2153                                           "encap action not supported for "
2154                                           "ingress");
2155         if (!raw_encap->size || !raw_encap->data)
2156                 return rte_flow_error_set(error, EINVAL,
2157                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2158                                           "raw encap data cannot be empty");
2159         return 0;
2160 }
2161
2162 /**
2163  * Validate the raw decap action.
2164  *
2165  * @param[in] action_flags
2166  *   Holds the actions detected until now.
2167  * @param[in] action
2168  *   Pointer to the encap action.
2169  * @param[in] attr
2170  *   Pointer to flow attributes
2171  * @param[out] error
2172  *   Pointer to error structure.
2173  *
2174  * @return
2175  *   0 on success, a negative errno value otherwise and rte_errno is set.
2176  */
2177 static int
2178 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2179                                   const struct rte_flow_action *action,
2180                                   const struct rte_flow_attr *attr,
2181                                   struct rte_flow_error *error)
2182 {
2183         const struct rte_flow_action_raw_decap *decap   = action->conf;
2184
2185         if (action_flags & MLX5_FLOW_ACTION_DROP)
2186                 return rte_flow_error_set(error, EINVAL,
2187                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2188                                           "can't drop and decap in same flow");
2189         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2190                 return rte_flow_error_set(error, EINVAL,
2191                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2192                                           "can't have encap action before"
2193                                           " decap action");
2194         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2195                 return rte_flow_error_set(error, EINVAL,
2196                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2197                                           "can only have a single decap"
2198                                           " action in a flow");
2199         /* decap action is valid on egress only if it is followed by encap */
2200         if (attr->egress && decap &&
2201             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2202                 return rte_flow_error_set(error, ENOTSUP,
2203                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2204                                           NULL, "decap action not supported"
2205                                           " for egress");
2206         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2207                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2208                 return rte_flow_error_set(error, EINVAL,
2209                                           RTE_FLOW_ERROR_TYPE_ACTION,
2210                                           NULL,
2211                                           "can't have decap action "
2212                                           "after modify action");
2213         }
2214         return 0;
2215 }
2216
2217 /**
2218  * Find existing encap/decap resource or create and register a new one.
2219  *
2220  * @param[in, out] dev
2221  *   Pointer to rte_eth_dev structure.
2222  * @param[in, out] resource
2223  *   Pointer to encap/decap resource.
2224  * @parm[in, out] dev_flow
2225  *   Pointer to the dev_flow.
2226  * @param[out] error
2227  *   pointer to error structure.
2228  *
2229  * @return
2230  *   0 on success otherwise -errno and errno is set.
2231  */
2232 static int
2233 flow_dv_encap_decap_resource_register
2234                         (struct rte_eth_dev *dev,
2235                          struct mlx5_flow_dv_encap_decap_resource *resource,
2236                          struct mlx5_flow *dev_flow,
2237                          struct rte_flow_error *error)
2238 {
2239         struct mlx5_priv *priv = dev->data->dev_private;
2240         struct mlx5_ibv_shared *sh = priv->sh;
2241         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2242         struct mlx5dv_dr_domain *domain;
2243
2244         resource->flags = dev_flow->group ? 0 : 1;
2245         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2246                 domain = sh->fdb_domain;
2247         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2248                 domain = sh->rx_domain;
2249         else
2250                 domain = sh->tx_domain;
2251
2252         /* Lookup a matching resource from cache. */
2253         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2254                 if (resource->reformat_type == cache_resource->reformat_type &&
2255                     resource->ft_type == cache_resource->ft_type &&
2256                     resource->flags == cache_resource->flags &&
2257                     resource->size == cache_resource->size &&
2258                     !memcmp((const void *)resource->buf,
2259                             (const void *)cache_resource->buf,
2260                             resource->size)) {
2261                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2262                                 (void *)cache_resource,
2263                                 rte_atomic32_read(&cache_resource->refcnt));
2264                         rte_atomic32_inc(&cache_resource->refcnt);
2265                         dev_flow->dv.encap_decap = cache_resource;
2266                         return 0;
2267                 }
2268         }
2269         /* Register new encap/decap resource. */
2270         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2271         if (!cache_resource)
2272                 return rte_flow_error_set(error, ENOMEM,
2273                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2274                                           "cannot allocate resource memory");
2275         *cache_resource = *resource;
2276         cache_resource->verbs_action =
2277                 mlx5_glue->dv_create_flow_action_packet_reformat
2278                         (sh->ctx, cache_resource->reformat_type,
2279                          cache_resource->ft_type, domain, cache_resource->flags,
2280                          cache_resource->size,
2281                          (cache_resource->size ? cache_resource->buf : NULL));
2282         if (!cache_resource->verbs_action) {
2283                 rte_free(cache_resource);
2284                 return rte_flow_error_set(error, ENOMEM,
2285                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2286                                           NULL, "cannot create action");
2287         }
2288         rte_atomic32_init(&cache_resource->refcnt);
2289         rte_atomic32_inc(&cache_resource->refcnt);
2290         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2291         dev_flow->dv.encap_decap = cache_resource;
2292         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2293                 (void *)cache_resource,
2294                 rte_atomic32_read(&cache_resource->refcnt));
2295         return 0;
2296 }
2297
2298 /**
2299  * Find existing table jump resource or create and register a new one.
2300  *
2301  * @param[in, out] dev
2302  *   Pointer to rte_eth_dev structure.
2303  * @param[in, out] tbl
2304  *   Pointer to flow table resource.
2305  * @parm[in, out] dev_flow
2306  *   Pointer to the dev_flow.
2307  * @param[out] error
2308  *   pointer to error structure.
2309  *
2310  * @return
2311  *   0 on success otherwise -errno and errno is set.
2312  */
2313 static int
2314 flow_dv_jump_tbl_resource_register
2315                         (struct rte_eth_dev *dev __rte_unused,
2316                          struct mlx5_flow_tbl_resource *tbl,
2317                          struct mlx5_flow *dev_flow,
2318                          struct rte_flow_error *error)
2319 {
2320         struct mlx5_flow_tbl_data_entry *tbl_data =
2321                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2322         int cnt;
2323
2324         assert(tbl);
2325         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2326         if (!cnt) {
2327                 tbl_data->jump.action =
2328                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2329                         (tbl->obj);
2330                 if (!tbl_data->jump.action)
2331                         return rte_flow_error_set(error, ENOMEM,
2332                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2333                                         NULL, "cannot create jump action");
2334                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2335                         (void *)&tbl_data->jump, cnt);
2336         } else {
2337                 assert(tbl_data->jump.action);
2338                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2339                         (void *)&tbl_data->jump, cnt);
2340         }
2341         rte_atomic32_inc(&tbl_data->jump.refcnt);
2342         dev_flow->dv.jump = &tbl_data->jump;
2343         return 0;
2344 }
2345
2346 /**
2347  * Find existing table port ID resource or create and register a new one.
2348  *
2349  * @param[in, out] dev
2350  *   Pointer to rte_eth_dev structure.
2351  * @param[in, out] resource
2352  *   Pointer to port ID action resource.
2353  * @parm[in, out] dev_flow
2354  *   Pointer to the dev_flow.
2355  * @param[out] error
2356  *   pointer to error structure.
2357  *
2358  * @return
2359  *   0 on success otherwise -errno and errno is set.
2360  */
2361 static int
2362 flow_dv_port_id_action_resource_register
2363                         (struct rte_eth_dev *dev,
2364                          struct mlx5_flow_dv_port_id_action_resource *resource,
2365                          struct mlx5_flow *dev_flow,
2366                          struct rte_flow_error *error)
2367 {
2368         struct mlx5_priv *priv = dev->data->dev_private;
2369         struct mlx5_ibv_shared *sh = priv->sh;
2370         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2371
2372         /* Lookup a matching resource from cache. */
2373         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2374                 if (resource->port_id == cache_resource->port_id) {
2375                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2376                                 "refcnt %d++",
2377                                 (void *)cache_resource,
2378                                 rte_atomic32_read(&cache_resource->refcnt));
2379                         rte_atomic32_inc(&cache_resource->refcnt);
2380                         dev_flow->dv.port_id_action = cache_resource;
2381                         return 0;
2382                 }
2383         }
2384         /* Register new port id action resource. */
2385         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2386         if (!cache_resource)
2387                 return rte_flow_error_set(error, ENOMEM,
2388                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2389                                           "cannot allocate resource memory");
2390         *cache_resource = *resource;
2391         /*
2392          * Depending on rdma_core version the glue routine calls
2393          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2394          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2395          */
2396         cache_resource->action =
2397                 mlx5_glue->dr_create_flow_action_dest_port
2398                         (priv->sh->fdb_domain, resource->port_id);
2399         if (!cache_resource->action) {
2400                 rte_free(cache_resource);
2401                 return rte_flow_error_set(error, ENOMEM,
2402                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2403                                           NULL, "cannot create action");
2404         }
2405         rte_atomic32_init(&cache_resource->refcnt);
2406         rte_atomic32_inc(&cache_resource->refcnt);
2407         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2408         dev_flow->dv.port_id_action = cache_resource;
2409         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2410                 (void *)cache_resource,
2411                 rte_atomic32_read(&cache_resource->refcnt));
2412         return 0;
2413 }
2414
2415 /**
2416  * Find existing push vlan resource or create and register a new one.
2417  *
2418  * @param [in, out] dev
2419  *   Pointer to rte_eth_dev structure.
2420  * @param[in, out] resource
2421  *   Pointer to port ID action resource.
2422  * @parm[in, out] dev_flow
2423  *   Pointer to the dev_flow.
2424  * @param[out] error
2425  *   pointer to error structure.
2426  *
2427  * @return
2428  *   0 on success otherwise -errno and errno is set.
2429  */
2430 static int
2431 flow_dv_push_vlan_action_resource_register
2432                        (struct rte_eth_dev *dev,
2433                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2434                         struct mlx5_flow *dev_flow,
2435                         struct rte_flow_error *error)
2436 {
2437         struct mlx5_priv *priv = dev->data->dev_private;
2438         struct mlx5_ibv_shared *sh = priv->sh;
2439         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2440         struct mlx5dv_dr_domain *domain;
2441
2442         /* Lookup a matching resource from cache. */
2443         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2444                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2445                     resource->ft_type == cache_resource->ft_type) {
2446                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2447                                 "refcnt %d++",
2448                                 (void *)cache_resource,
2449                                 rte_atomic32_read(&cache_resource->refcnt));
2450                         rte_atomic32_inc(&cache_resource->refcnt);
2451                         dev_flow->dv.push_vlan_res = cache_resource;
2452                         return 0;
2453                 }
2454         }
2455         /* Register new push_vlan action resource. */
2456         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2457         if (!cache_resource)
2458                 return rte_flow_error_set(error, ENOMEM,
2459                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2460                                           "cannot allocate resource memory");
2461         *cache_resource = *resource;
2462         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2463                 domain = sh->fdb_domain;
2464         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2465                 domain = sh->rx_domain;
2466         else
2467                 domain = sh->tx_domain;
2468         cache_resource->action =
2469                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2470                                                            resource->vlan_tag);
2471         if (!cache_resource->action) {
2472                 rte_free(cache_resource);
2473                 return rte_flow_error_set(error, ENOMEM,
2474                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2475                                           NULL, "cannot create action");
2476         }
2477         rte_atomic32_init(&cache_resource->refcnt);
2478         rte_atomic32_inc(&cache_resource->refcnt);
2479         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2480         dev_flow->dv.push_vlan_res = cache_resource;
2481         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2482                 (void *)cache_resource,
2483                 rte_atomic32_read(&cache_resource->refcnt));
2484         return 0;
2485 }
2486 /**
2487  * Get the size of specific rte_flow_item_type
2488  *
2489  * @param[in] item_type
2490  *   Tested rte_flow_item_type.
2491  *
2492  * @return
2493  *   sizeof struct item_type, 0 if void or irrelevant.
2494  */
2495 static size_t
2496 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2497 {
2498         size_t retval;
2499
2500         switch (item_type) {
2501         case RTE_FLOW_ITEM_TYPE_ETH:
2502                 retval = sizeof(struct rte_flow_item_eth);
2503                 break;
2504         case RTE_FLOW_ITEM_TYPE_VLAN:
2505                 retval = sizeof(struct rte_flow_item_vlan);
2506                 break;
2507         case RTE_FLOW_ITEM_TYPE_IPV4:
2508                 retval = sizeof(struct rte_flow_item_ipv4);
2509                 break;
2510         case RTE_FLOW_ITEM_TYPE_IPV6:
2511                 retval = sizeof(struct rte_flow_item_ipv6);
2512                 break;
2513         case RTE_FLOW_ITEM_TYPE_UDP:
2514                 retval = sizeof(struct rte_flow_item_udp);
2515                 break;
2516         case RTE_FLOW_ITEM_TYPE_TCP:
2517                 retval = sizeof(struct rte_flow_item_tcp);
2518                 break;
2519         case RTE_FLOW_ITEM_TYPE_VXLAN:
2520                 retval = sizeof(struct rte_flow_item_vxlan);
2521                 break;
2522         case RTE_FLOW_ITEM_TYPE_GRE:
2523                 retval = sizeof(struct rte_flow_item_gre);
2524                 break;
2525         case RTE_FLOW_ITEM_TYPE_NVGRE:
2526                 retval = sizeof(struct rte_flow_item_nvgre);
2527                 break;
2528         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2529                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2530                 break;
2531         case RTE_FLOW_ITEM_TYPE_MPLS:
2532                 retval = sizeof(struct rte_flow_item_mpls);
2533                 break;
2534         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2535         default:
2536                 retval = 0;
2537                 break;
2538         }
2539         return retval;
2540 }
2541
2542 #define MLX5_ENCAP_IPV4_VERSION         0x40
2543 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2544 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2545 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2546 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2547 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2548 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2549
2550 /**
2551  * Convert the encap action data from list of rte_flow_item to raw buffer
2552  *
2553  * @param[in] items
2554  *   Pointer to rte_flow_item objects list.
2555  * @param[out] buf
2556  *   Pointer to the output buffer.
2557  * @param[out] size
2558  *   Pointer to the output buffer size.
2559  * @param[out] error
2560  *   Pointer to the error structure.
2561  *
2562  * @return
2563  *   0 on success, a negative errno value otherwise and rte_errno is set.
2564  */
2565 static int
2566 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2567                            size_t *size, struct rte_flow_error *error)
2568 {
2569         struct rte_ether_hdr *eth = NULL;
2570         struct rte_vlan_hdr *vlan = NULL;
2571         struct rte_ipv4_hdr *ipv4 = NULL;
2572         struct rte_ipv6_hdr *ipv6 = NULL;
2573         struct rte_udp_hdr *udp = NULL;
2574         struct rte_vxlan_hdr *vxlan = NULL;
2575         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2576         struct rte_gre_hdr *gre = NULL;
2577         size_t len;
2578         size_t temp_size = 0;
2579
2580         if (!items)
2581                 return rte_flow_error_set(error, EINVAL,
2582                                           RTE_FLOW_ERROR_TYPE_ACTION,
2583                                           NULL, "invalid empty data");
2584         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2585                 len = flow_dv_get_item_len(items->type);
2586                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2587                         return rte_flow_error_set(error, EINVAL,
2588                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2589                                                   (void *)items->type,
2590                                                   "items total size is too big"
2591                                                   " for encap action");
2592                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2593                 switch (items->type) {
2594                 case RTE_FLOW_ITEM_TYPE_ETH:
2595                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2596                         break;
2597                 case RTE_FLOW_ITEM_TYPE_VLAN:
2598                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2599                         if (!eth)
2600                                 return rte_flow_error_set(error, EINVAL,
2601                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2602                                                 (void *)items->type,
2603                                                 "eth header not found");
2604                         if (!eth->ether_type)
2605                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2606                         break;
2607                 case RTE_FLOW_ITEM_TYPE_IPV4:
2608                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2609                         if (!vlan && !eth)
2610                                 return rte_flow_error_set(error, EINVAL,
2611                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2612                                                 (void *)items->type,
2613                                                 "neither eth nor vlan"
2614                                                 " header found");
2615                         if (vlan && !vlan->eth_proto)
2616                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2617                         else if (eth && !eth->ether_type)
2618                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2619                         if (!ipv4->version_ihl)
2620                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2621                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2622                         if (!ipv4->time_to_live)
2623                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2624                         break;
2625                 case RTE_FLOW_ITEM_TYPE_IPV6:
2626                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2627                         if (!vlan && !eth)
2628                                 return rte_flow_error_set(error, EINVAL,
2629                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2630                                                 (void *)items->type,
2631                                                 "neither eth nor vlan"
2632                                                 " header found");
2633                         if (vlan && !vlan->eth_proto)
2634                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2635                         else if (eth && !eth->ether_type)
2636                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2637                         if (!ipv6->vtc_flow)
2638                                 ipv6->vtc_flow =
2639                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2640                         if (!ipv6->hop_limits)
2641                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2642                         break;
2643                 case RTE_FLOW_ITEM_TYPE_UDP:
2644                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2645                         if (!ipv4 && !ipv6)
2646                                 return rte_flow_error_set(error, EINVAL,
2647                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2648                                                 (void *)items->type,
2649                                                 "ip header not found");
2650                         if (ipv4 && !ipv4->next_proto_id)
2651                                 ipv4->next_proto_id = IPPROTO_UDP;
2652                         else if (ipv6 && !ipv6->proto)
2653                                 ipv6->proto = IPPROTO_UDP;
2654                         break;
2655                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2656                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2657                         if (!udp)
2658                                 return rte_flow_error_set(error, EINVAL,
2659                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2660                                                 (void *)items->type,
2661                                                 "udp header not found");
2662                         if (!udp->dst_port)
2663                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2664                         if (!vxlan->vx_flags)
2665                                 vxlan->vx_flags =
2666                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2667                         break;
2668                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2669                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2670                         if (!udp)
2671                                 return rte_flow_error_set(error, EINVAL,
2672                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2673                                                 (void *)items->type,
2674                                                 "udp header not found");
2675                         if (!vxlan_gpe->proto)
2676                                 return rte_flow_error_set(error, EINVAL,
2677                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2678                                                 (void *)items->type,
2679                                                 "next protocol not found");
2680                         if (!udp->dst_port)
2681                                 udp->dst_port =
2682                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2683                         if (!vxlan_gpe->vx_flags)
2684                                 vxlan_gpe->vx_flags =
2685                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2686                         break;
2687                 case RTE_FLOW_ITEM_TYPE_GRE:
2688                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2689                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2690                         if (!gre->proto)
2691                                 return rte_flow_error_set(error, EINVAL,
2692                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2693                                                 (void *)items->type,
2694                                                 "next protocol not found");
2695                         if (!ipv4 && !ipv6)
2696                                 return rte_flow_error_set(error, EINVAL,
2697                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2698                                                 (void *)items->type,
2699                                                 "ip header not found");
2700                         if (ipv4 && !ipv4->next_proto_id)
2701                                 ipv4->next_proto_id = IPPROTO_GRE;
2702                         else if (ipv6 && !ipv6->proto)
2703                                 ipv6->proto = IPPROTO_GRE;
2704                         break;
2705                 case RTE_FLOW_ITEM_TYPE_VOID:
2706                         break;
2707                 default:
2708                         return rte_flow_error_set(error, EINVAL,
2709                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2710                                                   (void *)items->type,
2711                                                   "unsupported item type");
2712                         break;
2713                 }
2714                 temp_size += len;
2715         }
2716         *size = temp_size;
2717         return 0;
2718 }
2719
2720 static int
2721 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2722 {
2723         struct rte_ether_hdr *eth = NULL;
2724         struct rte_vlan_hdr *vlan = NULL;
2725         struct rte_ipv6_hdr *ipv6 = NULL;
2726         struct rte_udp_hdr *udp = NULL;
2727         char *next_hdr;
2728         uint16_t proto;
2729
2730         eth = (struct rte_ether_hdr *)data;
2731         next_hdr = (char *)(eth + 1);
2732         proto = RTE_BE16(eth->ether_type);
2733
2734         /* VLAN skipping */
2735         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2736                 vlan = (struct rte_vlan_hdr *)next_hdr;
2737                 proto = RTE_BE16(vlan->eth_proto);
2738                 next_hdr += sizeof(struct rte_vlan_hdr);
2739         }
2740
2741         /* HW calculates IPv4 csum. no need to proceed */
2742         if (proto == RTE_ETHER_TYPE_IPV4)
2743                 return 0;
2744
2745         /* non IPv4/IPv6 header. not supported */
2746         if (proto != RTE_ETHER_TYPE_IPV6) {
2747                 return rte_flow_error_set(error, ENOTSUP,
2748                                           RTE_FLOW_ERROR_TYPE_ACTION,
2749                                           NULL, "Cannot offload non IPv4/IPv6");
2750         }
2751
2752         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2753
2754         /* ignore non UDP */
2755         if (ipv6->proto != IPPROTO_UDP)
2756                 return 0;
2757
2758         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2759         udp->dgram_cksum = 0;
2760
2761         return 0;
2762 }
2763
2764 /**
2765  * Convert L2 encap action to DV specification.
2766  *
2767  * @param[in] dev
2768  *   Pointer to rte_eth_dev structure.
2769  * @param[in] action
2770  *   Pointer to action structure.
2771  * @param[in, out] dev_flow
2772  *   Pointer to the mlx5_flow.
2773  * @param[in] transfer
2774  *   Mark if the flow is E-Switch flow.
2775  * @param[out] error
2776  *   Pointer to the error structure.
2777  *
2778  * @return
2779  *   0 on success, a negative errno value otherwise and rte_errno is set.
2780  */
2781 static int
2782 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2783                                const struct rte_flow_action *action,
2784                                struct mlx5_flow *dev_flow,
2785                                uint8_t transfer,
2786                                struct rte_flow_error *error)
2787 {
2788         const struct rte_flow_item *encap_data;
2789         const struct rte_flow_action_raw_encap *raw_encap_data;
2790         struct mlx5_flow_dv_encap_decap_resource res = {
2791                 .reformat_type =
2792                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2793                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2794                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2795         };
2796
2797         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2798                 raw_encap_data =
2799                         (const struct rte_flow_action_raw_encap *)action->conf;
2800                 res.size = raw_encap_data->size;
2801                 memcpy(res.buf, raw_encap_data->data, res.size);
2802                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2803                         return -rte_errno;
2804         } else {
2805                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2806                         encap_data =
2807                                 ((const struct rte_flow_action_vxlan_encap *)
2808                                                 action->conf)->definition;
2809                 else
2810                         encap_data =
2811                                 ((const struct rte_flow_action_nvgre_encap *)
2812                                                 action->conf)->definition;
2813                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2814                                                &res.size, error))
2815                         return -rte_errno;
2816         }
2817         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2818                 return rte_flow_error_set(error, EINVAL,
2819                                           RTE_FLOW_ERROR_TYPE_ACTION,
2820                                           NULL, "can't create L2 encap action");
2821         return 0;
2822 }
2823
2824 /**
2825  * Convert L2 decap action to DV specification.
2826  *
2827  * @param[in] dev
2828  *   Pointer to rte_eth_dev structure.
2829  * @param[in, out] dev_flow
2830  *   Pointer to the mlx5_flow.
2831  * @param[in] transfer
2832  *   Mark if the flow is E-Switch flow.
2833  * @param[out] error
2834  *   Pointer to the error structure.
2835  *
2836  * @return
2837  *   0 on success, a negative errno value otherwise and rte_errno is set.
2838  */
2839 static int
2840 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2841                                struct mlx5_flow *dev_flow,
2842                                uint8_t transfer,
2843                                struct rte_flow_error *error)
2844 {
2845         struct mlx5_flow_dv_encap_decap_resource res = {
2846                 .size = 0,
2847                 .reformat_type =
2848                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2849                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2850                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2851         };
2852
2853         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2854                 return rte_flow_error_set(error, EINVAL,
2855                                           RTE_FLOW_ERROR_TYPE_ACTION,
2856                                           NULL, "can't create L2 decap action");
2857         return 0;
2858 }
2859
2860 /**
2861  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2862  *
2863  * @param[in] dev
2864  *   Pointer to rte_eth_dev structure.
2865  * @param[in] action
2866  *   Pointer to action structure.
2867  * @param[in, out] dev_flow
2868  *   Pointer to the mlx5_flow.
2869  * @param[in] attr
2870  *   Pointer to the flow attributes.
2871  * @param[out] error
2872  *   Pointer to the error structure.
2873  *
2874  * @return
2875  *   0 on success, a negative errno value otherwise and rte_errno is set.
2876  */
2877 static int
2878 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2879                                 const struct rte_flow_action *action,
2880                                 struct mlx5_flow *dev_flow,
2881                                 const struct rte_flow_attr *attr,
2882                                 struct rte_flow_error *error)
2883 {
2884         const struct rte_flow_action_raw_encap *encap_data;
2885         struct mlx5_flow_dv_encap_decap_resource res;
2886
2887         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2888         res.size = encap_data->size;
2889         memcpy(res.buf, encap_data->data, res.size);
2890         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
2891                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
2892                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
2893         if (attr->transfer)
2894                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2895         else
2896                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2897                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2898         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2899                 return rte_flow_error_set(error, EINVAL,
2900                                           RTE_FLOW_ERROR_TYPE_ACTION,
2901                                           NULL, "can't create encap action");
2902         return 0;
2903 }
2904
2905 /**
2906  * Create action push VLAN.
2907  *
2908  * @param[in] dev
2909  *   Pointer to rte_eth_dev structure.
2910  * @param[in] vlan_tag
2911  *   the vlan tag to push to the Ethernet header.
2912  * @param[in, out] dev_flow
2913  *   Pointer to the mlx5_flow.
2914  * @param[in] attr
2915  *   Pointer to the flow attributes.
2916  * @param[out] error
2917  *   Pointer to the error structure.
2918  *
2919  * @return
2920  *   0 on success, a negative errno value otherwise and rte_errno is set.
2921  */
2922 static int
2923 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
2924                                 const struct rte_flow_attr *attr,
2925                                 const struct rte_vlan_hdr *vlan,
2926                                 struct mlx5_flow *dev_flow,
2927                                 struct rte_flow_error *error)
2928 {
2929         struct mlx5_flow_dv_push_vlan_action_resource res;
2930
2931         res.vlan_tag =
2932                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
2933                                  vlan->vlan_tci);
2934         if (attr->transfer)
2935                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2936         else
2937                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2938                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2939         return flow_dv_push_vlan_action_resource_register
2940                                             (dev, &res, dev_flow, error);
2941 }
2942
2943 /**
2944  * Validate the modify-header actions.
2945  *
2946  * @param[in] action_flags
2947  *   Holds the actions detected until now.
2948  * @param[in] action
2949  *   Pointer to the modify action.
2950  * @param[out] error
2951  *   Pointer to error structure.
2952  *
2953  * @return
2954  *   0 on success, a negative errno value otherwise and rte_errno is set.
2955  */
2956 static int
2957 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
2958                                    const struct rte_flow_action *action,
2959                                    struct rte_flow_error *error)
2960 {
2961         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
2962                 return rte_flow_error_set(error, EINVAL,
2963                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2964                                           NULL, "action configuration not set");
2965         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2966                 return rte_flow_error_set(error, EINVAL,
2967                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2968                                           "can't have encap action before"
2969                                           " modify action");
2970         return 0;
2971 }
2972
2973 /**
2974  * Validate the modify-header MAC address actions.
2975  *
2976  * @param[in] action_flags
2977  *   Holds the actions detected until now.
2978  * @param[in] action
2979  *   Pointer to the modify action.
2980  * @param[in] item_flags
2981  *   Holds the items detected.
2982  * @param[out] error
2983  *   Pointer to error structure.
2984  *
2985  * @return
2986  *   0 on success, a negative errno value otherwise and rte_errno is set.
2987  */
2988 static int
2989 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
2990                                    const struct rte_flow_action *action,
2991                                    const uint64_t item_flags,
2992                                    struct rte_flow_error *error)
2993 {
2994         int ret = 0;
2995
2996         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2997         if (!ret) {
2998                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
2999                         return rte_flow_error_set(error, EINVAL,
3000                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3001                                                   NULL,
3002                                                   "no L2 item in pattern");
3003         }
3004         return ret;
3005 }
3006
3007 /**
3008  * Validate the modify-header IPv4 address actions.
3009  *
3010  * @param[in] action_flags
3011  *   Holds the actions detected until now.
3012  * @param[in] action
3013  *   Pointer to the modify action.
3014  * @param[in] item_flags
3015  *   Holds the items detected.
3016  * @param[out] error
3017  *   Pointer to error structure.
3018  *
3019  * @return
3020  *   0 on success, a negative errno value otherwise and rte_errno is set.
3021  */
3022 static int
3023 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3024                                     const struct rte_flow_action *action,
3025                                     const uint64_t item_flags,
3026                                     struct rte_flow_error *error)
3027 {
3028         int ret = 0;
3029
3030         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3031         if (!ret) {
3032                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3033                         return rte_flow_error_set(error, EINVAL,
3034                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3035                                                   NULL,
3036                                                   "no ipv4 item in pattern");
3037         }
3038         return ret;
3039 }
3040
3041 /**
3042  * Validate the modify-header IPv6 address actions.
3043  *
3044  * @param[in] action_flags
3045  *   Holds the actions detected until now.
3046  * @param[in] action
3047  *   Pointer to the modify action.
3048  * @param[in] item_flags
3049  *   Holds the items detected.
3050  * @param[out] error
3051  *   Pointer to error structure.
3052  *
3053  * @return
3054  *   0 on success, a negative errno value otherwise and rte_errno is set.
3055  */
3056 static int
3057 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3058                                     const struct rte_flow_action *action,
3059                                     const uint64_t item_flags,
3060                                     struct rte_flow_error *error)
3061 {
3062         int ret = 0;
3063
3064         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3065         if (!ret) {
3066                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3067                         return rte_flow_error_set(error, EINVAL,
3068                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3069                                                   NULL,
3070                                                   "no ipv6 item in pattern");
3071         }
3072         return ret;
3073 }
3074
3075 /**
3076  * Validate the modify-header TP actions.
3077  *
3078  * @param[in] action_flags
3079  *   Holds the actions detected until now.
3080  * @param[in] action
3081  *   Pointer to the modify action.
3082  * @param[in] item_flags
3083  *   Holds the items detected.
3084  * @param[out] error
3085  *   Pointer to error structure.
3086  *
3087  * @return
3088  *   0 on success, a negative errno value otherwise and rte_errno is set.
3089  */
3090 static int
3091 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3092                                   const struct rte_flow_action *action,
3093                                   const uint64_t item_flags,
3094                                   struct rte_flow_error *error)
3095 {
3096         int ret = 0;
3097
3098         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3099         if (!ret) {
3100                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3101                         return rte_flow_error_set(error, EINVAL,
3102                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3103                                                   NULL, "no transport layer "
3104                                                   "in pattern");
3105         }
3106         return ret;
3107 }
3108
3109 /**
3110  * Validate the modify-header actions of increment/decrement
3111  * TCP Sequence-number.
3112  *
3113  * @param[in] action_flags
3114  *   Holds the actions detected until now.
3115  * @param[in] action
3116  *   Pointer to the modify action.
3117  * @param[in] item_flags
3118  *   Holds the items detected.
3119  * @param[out] error
3120  *   Pointer to error structure.
3121  *
3122  * @return
3123  *   0 on success, a negative errno value otherwise and rte_errno is set.
3124  */
3125 static int
3126 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3127                                        const struct rte_flow_action *action,
3128                                        const uint64_t item_flags,
3129                                        struct rte_flow_error *error)
3130 {
3131         int ret = 0;
3132
3133         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3134         if (!ret) {
3135                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3136                         return rte_flow_error_set(error, EINVAL,
3137                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3138                                                   NULL, "no TCP item in"
3139                                                   " pattern");
3140                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3141                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3142                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3143                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3144                         return rte_flow_error_set(error, EINVAL,
3145                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3146                                                   NULL,
3147                                                   "cannot decrease and increase"
3148                                                   " TCP sequence number"
3149                                                   " at the same time");
3150         }
3151         return ret;
3152 }
3153
3154 /**
3155  * Validate the modify-header actions of increment/decrement
3156  * TCP Acknowledgment number.
3157  *
3158  * @param[in] action_flags
3159  *   Holds the actions detected until now.
3160  * @param[in] action
3161  *   Pointer to the modify action.
3162  * @param[in] item_flags
3163  *   Holds the items detected.
3164  * @param[out] error
3165  *   Pointer to error structure.
3166  *
3167  * @return
3168  *   0 on success, a negative errno value otherwise and rte_errno is set.
3169  */
3170 static int
3171 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3172                                        const struct rte_flow_action *action,
3173                                        const uint64_t item_flags,
3174                                        struct rte_flow_error *error)
3175 {
3176         int ret = 0;
3177
3178         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3179         if (!ret) {
3180                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3181                         return rte_flow_error_set(error, EINVAL,
3182                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3183                                                   NULL, "no TCP item in"
3184                                                   " pattern");
3185                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3186                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3187                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3188                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3189                         return rte_flow_error_set(error, EINVAL,
3190                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3191                                                   NULL,
3192                                                   "cannot decrease and increase"
3193                                                   " TCP acknowledgment number"
3194                                                   " at the same time");
3195         }
3196         return ret;
3197 }
3198
3199 /**
3200  * Validate the modify-header TTL actions.
3201  *
3202  * @param[in] action_flags
3203  *   Holds the actions detected until now.
3204  * @param[in] action
3205  *   Pointer to the modify action.
3206  * @param[in] item_flags
3207  *   Holds the items detected.
3208  * @param[out] error
3209  *   Pointer to error structure.
3210  *
3211  * @return
3212  *   0 on success, a negative errno value otherwise and rte_errno is set.
3213  */
3214 static int
3215 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3216                                    const struct rte_flow_action *action,
3217                                    const uint64_t item_flags,
3218                                    struct rte_flow_error *error)
3219 {
3220         int ret = 0;
3221
3222         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3223         if (!ret) {
3224                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3225                         return rte_flow_error_set(error, EINVAL,
3226                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3227                                                   NULL,
3228                                                   "no IP protocol in pattern");
3229         }
3230         return ret;
3231 }
3232
3233 /**
3234  * Validate jump action.
3235  *
3236  * @param[in] action
3237  *   Pointer to the jump action.
3238  * @param[in] action_flags
3239  *   Holds the actions detected until now.
3240  * @param[in] attributes
3241  *   Pointer to flow attributes
3242  * @param[in] external
3243  *   Action belongs to flow rule created by request external to PMD.
3244  * @param[out] error
3245  *   Pointer to error structure.
3246  *
3247  * @return
3248  *   0 on success, a negative errno value otherwise and rte_errno is set.
3249  */
3250 static int
3251 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3252                              uint64_t action_flags,
3253                              const struct rte_flow_attr *attributes,
3254                              bool external, struct rte_flow_error *error)
3255 {
3256         uint32_t target_group, table;
3257         int ret = 0;
3258
3259         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3260                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3261                 return rte_flow_error_set(error, EINVAL,
3262                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3263                                           "can't have 2 fate actions in"
3264                                           " same flow");
3265         if (action_flags & MLX5_FLOW_ACTION_METER)
3266                 return rte_flow_error_set(error, ENOTSUP,
3267                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3268                                           "jump with meter not support");
3269         if (!action->conf)
3270                 return rte_flow_error_set(error, EINVAL,
3271                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3272                                           NULL, "action configuration not set");
3273         target_group =
3274                 ((const struct rte_flow_action_jump *)action->conf)->group;
3275         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3276                                        &table, error);
3277         if (ret)
3278                 return ret;
3279         if (attributes->group == target_group)
3280                 return rte_flow_error_set(error, EINVAL,
3281                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3282                                           "target group must be other than"
3283                                           " the current flow group");
3284         return 0;
3285 }
3286
3287 /*
3288  * Validate the port_id action.
3289  *
3290  * @param[in] dev
3291  *   Pointer to rte_eth_dev structure.
3292  * @param[in] action_flags
3293  *   Bit-fields that holds the actions detected until now.
3294  * @param[in] action
3295  *   Port_id RTE action structure.
3296  * @param[in] attr
3297  *   Attributes of flow that includes this action.
3298  * @param[out] error
3299  *   Pointer to error structure.
3300  *
3301  * @return
3302  *   0 on success, a negative errno value otherwise and rte_errno is set.
3303  */
3304 static int
3305 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3306                                 uint64_t action_flags,
3307                                 const struct rte_flow_action *action,
3308                                 const struct rte_flow_attr *attr,
3309                                 struct rte_flow_error *error)
3310 {
3311         const struct rte_flow_action_port_id *port_id;
3312         struct mlx5_priv *act_priv;
3313         struct mlx5_priv *dev_priv;
3314         uint16_t port;
3315
3316         if (!attr->transfer)
3317                 return rte_flow_error_set(error, ENOTSUP,
3318                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3319                                           NULL,
3320                                           "port id action is valid in transfer"
3321                                           " mode only");
3322         if (!action || !action->conf)
3323                 return rte_flow_error_set(error, ENOTSUP,
3324                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3325                                           NULL,
3326                                           "port id action parameters must be"
3327                                           " specified");
3328         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3329                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3330                 return rte_flow_error_set(error, EINVAL,
3331                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3332                                           "can have only one fate actions in"
3333                                           " a flow");
3334         dev_priv = mlx5_dev_to_eswitch_info(dev);
3335         if (!dev_priv)
3336                 return rte_flow_error_set(error, rte_errno,
3337                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3338                                           NULL,
3339                                           "failed to obtain E-Switch info");
3340         port_id = action->conf;
3341         port = port_id->original ? dev->data->port_id : port_id->id;
3342         act_priv = mlx5_port_to_eswitch_info(port, false);
3343         if (!act_priv)
3344                 return rte_flow_error_set
3345                                 (error, rte_errno,
3346                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3347                                  "failed to obtain E-Switch port id for port");
3348         if (act_priv->domain_id != dev_priv->domain_id)
3349                 return rte_flow_error_set
3350                                 (error, EINVAL,
3351                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3352                                  "port does not belong to"
3353                                  " E-Switch being configured");
3354         return 0;
3355 }
3356
3357 /**
3358  * Get the maximum number of modify header actions.
3359  *
3360  * @param dev
3361  *   Pointer to rte_eth_dev structure.
3362  *
3363  * @return
3364  *   Max number of modify header actions device can support.
3365  */
3366 static unsigned int
3367 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev)
3368 {
3369         /*
3370          * There's no way to directly query the max cap. Although it has to be
3371          * acquried by iterative trial, it is a safe assumption that more
3372          * actions are supported by FW if extensive metadata register is
3373          * supported.
3374          */
3375         return mlx5_flow_ext_mreg_supported(dev) ? MLX5_MODIFY_NUM :
3376                                                    MLX5_MODIFY_NUM_NO_MREG;
3377 }
3378
3379 /**
3380  * Validate the meter action.
3381  *
3382  * @param[in] dev
3383  *   Pointer to rte_eth_dev structure.
3384  * @param[in] action_flags
3385  *   Bit-fields that holds the actions detected until now.
3386  * @param[in] action
3387  *   Pointer to the meter action.
3388  * @param[in] attr
3389  *   Attributes of flow that includes this action.
3390  * @param[out] error
3391  *   Pointer to error structure.
3392  *
3393  * @return
3394  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3395  */
3396 static int
3397 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3398                                 uint64_t action_flags,
3399                                 const struct rte_flow_action *action,
3400                                 const struct rte_flow_attr *attr,
3401                                 struct rte_flow_error *error)
3402 {
3403         struct mlx5_priv *priv = dev->data->dev_private;
3404         const struct rte_flow_action_meter *am = action->conf;
3405         struct mlx5_flow_meter *fm = mlx5_flow_meter_find(priv, am->mtr_id);
3406
3407         if (action_flags & MLX5_FLOW_ACTION_METER)
3408                 return rte_flow_error_set(error, ENOTSUP,
3409                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3410                                           "meter chaining not support");
3411         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3412                 return rte_flow_error_set(error, ENOTSUP,
3413                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3414                                           "meter with jump not support");
3415         if (!priv->mtr_en)
3416                 return rte_flow_error_set(error, ENOTSUP,
3417                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3418                                           NULL,
3419                                           "meter action not supported");
3420         if (!fm)
3421                 return rte_flow_error_set(error, EINVAL,
3422                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3423                                           "Meter not found");
3424         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3425               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3426               (!fm->attr.egress && !attr->egress && attr->ingress))))
3427                 return rte_flow_error_set(error, EINVAL,
3428                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3429                                           "Flow attributes are either invalid "
3430                                           "or have a conflict with current "
3431                                           "meter attributes");
3432         return 0;
3433 }
3434
3435 /**
3436  * Find existing modify-header resource or create and register a new one.
3437  *
3438  * @param dev[in, out]
3439  *   Pointer to rte_eth_dev structure.
3440  * @param[in, out] resource
3441  *   Pointer to modify-header resource.
3442  * @parm[in, out] dev_flow
3443  *   Pointer to the dev_flow.
3444  * @param[out] error
3445  *   pointer to error structure.
3446  *
3447  * @return
3448  *   0 on success otherwise -errno and errno is set.
3449  */
3450 static int
3451 flow_dv_modify_hdr_resource_register
3452                         (struct rte_eth_dev *dev,
3453                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3454                          struct mlx5_flow *dev_flow,
3455                          struct rte_flow_error *error)
3456 {
3457         struct mlx5_priv *priv = dev->data->dev_private;
3458         struct mlx5_ibv_shared *sh = priv->sh;
3459         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3460         struct mlx5dv_dr_domain *ns;
3461
3462         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev))
3463                 return rte_flow_error_set(error, EOVERFLOW,
3464                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3465                                           "too many modify header items");
3466         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3467                 ns = sh->fdb_domain;
3468         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3469                 ns = sh->tx_domain;
3470         else
3471                 ns = sh->rx_domain;
3472         resource->flags =
3473                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3474         /* Lookup a matching resource from cache. */
3475         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3476                 if (resource->ft_type == cache_resource->ft_type &&
3477                     resource->actions_num == cache_resource->actions_num &&
3478                     resource->flags == cache_resource->flags &&
3479                     !memcmp((const void *)resource->actions,
3480                             (const void *)cache_resource->actions,
3481                             (resource->actions_num *
3482                                             sizeof(resource->actions[0])))) {
3483                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3484                                 (void *)cache_resource,
3485                                 rte_atomic32_read(&cache_resource->refcnt));
3486                         rte_atomic32_inc(&cache_resource->refcnt);
3487                         dev_flow->dv.modify_hdr = cache_resource;
3488                         return 0;
3489                 }
3490         }
3491         /* Register new modify-header resource. */
3492         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
3493         if (!cache_resource)
3494                 return rte_flow_error_set(error, ENOMEM,
3495                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3496                                           "cannot allocate resource memory");
3497         *cache_resource = *resource;
3498         cache_resource->verbs_action =
3499                 mlx5_glue->dv_create_flow_action_modify_header
3500                                         (sh->ctx, cache_resource->ft_type,
3501                                          ns, cache_resource->flags,
3502                                          cache_resource->actions_num *
3503                                          sizeof(cache_resource->actions[0]),
3504                                          (uint64_t *)cache_resource->actions);
3505         if (!cache_resource->verbs_action) {
3506                 rte_free(cache_resource);
3507                 return rte_flow_error_set(error, ENOMEM,
3508                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3509                                           NULL, "cannot create action");
3510         }
3511         rte_atomic32_init(&cache_resource->refcnt);
3512         rte_atomic32_inc(&cache_resource->refcnt);
3513         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3514         dev_flow->dv.modify_hdr = cache_resource;
3515         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3516                 (void *)cache_resource,
3517                 rte_atomic32_read(&cache_resource->refcnt));
3518         return 0;
3519 }
3520
3521 #define MLX5_CNT_CONTAINER_RESIZE 64
3522
3523 /**
3524  * Get or create a flow counter.
3525  *
3526  * @param[in] dev
3527  *   Pointer to the Ethernet device structure.
3528  * @param[in] shared
3529  *   Indicate if this counter is shared with other flows.
3530  * @param[in] id
3531  *   Counter identifier.
3532  *
3533  * @return
3534  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3535  */
3536 static struct mlx5_flow_counter *
3537 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3538                                uint32_t id)
3539 {
3540         struct mlx5_priv *priv = dev->data->dev_private;
3541         struct mlx5_flow_counter *cnt = NULL;
3542         struct mlx5_devx_obj *dcs = NULL;
3543
3544         if (!priv->config.devx) {
3545                 rte_errno = ENOTSUP;
3546                 return NULL;
3547         }
3548         if (shared) {
3549                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3550                         if (cnt->shared && cnt->id == id) {
3551                                 cnt->ref_cnt++;
3552                                 return cnt;
3553                         }
3554                 }
3555         }
3556         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3557         if (!dcs)
3558                 return NULL;
3559         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3560         if (!cnt) {
3561                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3562                 rte_errno = ENOMEM;
3563                 return NULL;
3564         }
3565         struct mlx5_flow_counter tmpl = {
3566                 .shared = shared,
3567                 .ref_cnt = 1,
3568                 .id = id,
3569                 .dcs = dcs,
3570         };
3571         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3572         if (!tmpl.action) {
3573                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3574                 rte_errno = errno;
3575                 rte_free(cnt);
3576                 return NULL;
3577         }
3578         *cnt = tmpl;
3579         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3580         return cnt;
3581 }
3582
3583 /**
3584  * Release a flow counter.
3585  *
3586  * @param[in] dev
3587  *   Pointer to the Ethernet device structure.
3588  * @param[in] counter
3589  *   Pointer to the counter handler.
3590  */
3591 static void
3592 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3593                                  struct mlx5_flow_counter *counter)
3594 {
3595         struct mlx5_priv *priv = dev->data->dev_private;
3596
3597         if (!counter)
3598                 return;
3599         if (--counter->ref_cnt == 0) {
3600                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3601                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3602                 rte_free(counter);
3603         }
3604 }
3605
3606 /**
3607  * Query a devx flow counter.
3608  *
3609  * @param[in] dev
3610  *   Pointer to the Ethernet device structure.
3611  * @param[in] cnt
3612  *   Pointer to the flow counter.
3613  * @param[out] pkts
3614  *   The statistics value of packets.
3615  * @param[out] bytes
3616  *   The statistics value of bytes.
3617  *
3618  * @return
3619  *   0 on success, otherwise a negative errno value and rte_errno is set.
3620  */
3621 static inline int
3622 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3623                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3624                      uint64_t *bytes)
3625 {
3626         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3627                                                 0, NULL, NULL, 0);
3628 }
3629
3630 /**
3631  * Get a pool by a counter.
3632  *
3633  * @param[in] cnt
3634  *   Pointer to the counter.
3635  *
3636  * @return
3637  *   The counter pool.
3638  */
3639 static struct mlx5_flow_counter_pool *
3640 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3641 {
3642         if (!cnt->batch) {
3643                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3644                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3645         }
3646         return cnt->pool;
3647 }
3648
3649 /**
3650  * Get a pool by devx counter ID.
3651  *
3652  * @param[in] cont
3653  *   Pointer to the counter container.
3654  * @param[in] id
3655  *   The counter devx ID.
3656  *
3657  * @return
3658  *   The counter pool pointer if exists, NULL otherwise,
3659  */
3660 static struct mlx5_flow_counter_pool *
3661 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3662 {
3663         struct mlx5_flow_counter_pool *pool;
3664
3665         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3666                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3667                                 MLX5_COUNTERS_PER_POOL;
3668
3669                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3670                         return pool;
3671         };
3672         return NULL;
3673 }
3674
3675 /**
3676  * Allocate a new memory for the counter values wrapped by all the needed
3677  * management.
3678  *
3679  * @param[in] dev
3680  *   Pointer to the Ethernet device structure.
3681  * @param[in] raws_n
3682  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3683  *
3684  * @return
3685  *   The new memory management pointer on success, otherwise NULL and rte_errno
3686  *   is set.
3687  */
3688 static struct mlx5_counter_stats_mem_mng *
3689 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3690 {
3691         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3692                                         (dev->data->dev_private))->sh;
3693         struct mlx5_devx_mkey_attr mkey_attr;
3694         struct mlx5_counter_stats_mem_mng *mem_mng;
3695         volatile struct flow_counter_stats *raw_data;
3696         int size = (sizeof(struct flow_counter_stats) *
3697                         MLX5_COUNTERS_PER_POOL +
3698                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3699                         sizeof(struct mlx5_counter_stats_mem_mng);
3700         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3701         int i;
3702
3703         if (!mem) {
3704                 rte_errno = ENOMEM;
3705                 return NULL;
3706         }
3707         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3708         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3709         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3710                                                  IBV_ACCESS_LOCAL_WRITE);
3711         if (!mem_mng->umem) {
3712                 rte_errno = errno;
3713                 rte_free(mem);
3714                 return NULL;
3715         }
3716         mkey_attr.addr = (uintptr_t)mem;
3717         mkey_attr.size = size;
3718         mkey_attr.umem_id = mem_mng->umem->umem_id;
3719         mkey_attr.pd = sh->pdn;
3720         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3721         if (!mem_mng->dm) {
3722                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3723                 rte_errno = errno;
3724                 rte_free(mem);
3725                 return NULL;
3726         }
3727         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3728         raw_data = (volatile struct flow_counter_stats *)mem;
3729         for (i = 0; i < raws_n; ++i) {
3730                 mem_mng->raws[i].mem_mng = mem_mng;
3731                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3732         }
3733         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3734         return mem_mng;
3735 }
3736
3737 /**
3738  * Resize a counter container.
3739  *
3740  * @param[in] dev
3741  *   Pointer to the Ethernet device structure.
3742  * @param[in] batch
3743  *   Whether the pool is for counter that was allocated by batch command.
3744  *
3745  * @return
3746  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3747  */
3748 static struct mlx5_pools_container *
3749 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3750 {
3751         struct mlx5_priv *priv = dev->data->dev_private;
3752         struct mlx5_pools_container *cont =
3753                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3754         struct mlx5_pools_container *new_cont =
3755                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3756         struct mlx5_counter_stats_mem_mng *mem_mng;
3757         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3758         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3759         int i;
3760
3761         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3762                 /* The last resize still hasn't detected by the host thread. */
3763                 rte_errno = EAGAIN;
3764                 return NULL;
3765         }
3766         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3767         if (!new_cont->pools) {
3768                 rte_errno = ENOMEM;
3769                 return NULL;
3770         }
3771         if (cont->n)
3772                 memcpy(new_cont->pools, cont->pools, cont->n *
3773                        sizeof(struct mlx5_flow_counter_pool *));
3774         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3775                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3776         if (!mem_mng) {
3777                 rte_free(new_cont->pools);
3778                 return NULL;
3779         }
3780         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3781                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3782                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3783                                  i, next);
3784         new_cont->n = resize;
3785         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3786         TAILQ_INIT(&new_cont->pool_list);
3787         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3788         new_cont->init_mem_mng = mem_mng;
3789         rte_cio_wmb();
3790          /* Flip the master container. */
3791         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3792         return new_cont;
3793 }
3794
3795 /**
3796  * Query a devx flow counter.
3797  *
3798  * @param[in] dev
3799  *   Pointer to the Ethernet device structure.
3800  * @param[in] cnt
3801  *   Pointer to the flow counter.
3802  * @param[out] pkts
3803  *   The statistics value of packets.
3804  * @param[out] bytes
3805  *   The statistics value of bytes.
3806  *
3807  * @return
3808  *   0 on success, otherwise a negative errno value and rte_errno is set.
3809  */
3810 static inline int
3811 _flow_dv_query_count(struct rte_eth_dev *dev,
3812                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3813                      uint64_t *bytes)
3814 {
3815         struct mlx5_priv *priv = dev->data->dev_private;
3816         struct mlx5_flow_counter_pool *pool =
3817                         flow_dv_counter_pool_get(cnt);
3818         int offset = cnt - &pool->counters_raw[0];
3819
3820         if (priv->counter_fallback)
3821                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3822
3823         rte_spinlock_lock(&pool->sl);
3824         /*
3825          * The single counters allocation may allocate smaller ID than the
3826          * current allocated in parallel to the host reading.
3827          * In this case the new counter values must be reported as 0.
3828          */
3829         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
3830                 *pkts = 0;
3831                 *bytes = 0;
3832         } else {
3833                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
3834                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
3835         }
3836         rte_spinlock_unlock(&pool->sl);
3837         return 0;
3838 }
3839
3840 /**
3841  * Create and initialize a new counter pool.
3842  *
3843  * @param[in] dev
3844  *   Pointer to the Ethernet device structure.
3845  * @param[out] dcs
3846  *   The devX counter handle.
3847  * @param[in] batch
3848  *   Whether the pool is for counter that was allocated by batch command.
3849  *
3850  * @return
3851  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
3852  */
3853 static struct mlx5_flow_counter_pool *
3854 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
3855                     uint32_t batch)
3856 {
3857         struct mlx5_priv *priv = dev->data->dev_private;
3858         struct mlx5_flow_counter_pool *pool;
3859         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
3860                                                                0);
3861         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
3862         uint32_t size;
3863
3864         if (cont->n == n_valid) {
3865                 cont = flow_dv_container_resize(dev, batch);
3866                 if (!cont)
3867                         return NULL;
3868         }
3869         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
3870                         sizeof(struct mlx5_flow_counter);
3871         pool = rte_calloc(__func__, 1, size, 0);
3872         if (!pool) {
3873                 rte_errno = ENOMEM;
3874                 return NULL;
3875         }
3876         pool->min_dcs = dcs;
3877         pool->raw = cont->init_mem_mng->raws + n_valid %
3878                                                      MLX5_CNT_CONTAINER_RESIZE;
3879         pool->raw_hw = NULL;
3880         rte_spinlock_init(&pool->sl);
3881         /*
3882          * The generation of the new allocated counters in this pool is 0, 2 in
3883          * the pool generation makes all the counters valid for allocation.
3884          */
3885         rte_atomic64_set(&pool->query_gen, 0x2);
3886         TAILQ_INIT(&pool->counters);
3887         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
3888         cont->pools[n_valid] = pool;
3889         /* Pool initialization must be updated before host thread access. */
3890         rte_cio_wmb();
3891         rte_atomic16_add(&cont->n_valid, 1);
3892         return pool;
3893 }
3894
3895 /**
3896  * Prepare a new counter and/or a new counter pool.
3897  *
3898  * @param[in] dev
3899  *   Pointer to the Ethernet device structure.
3900  * @param[out] cnt_free
3901  *   Where to put the pointer of a new counter.
3902  * @param[in] batch
3903  *   Whether the pool is for counter that was allocated by batch command.
3904  *
3905  * @return
3906  *   The free counter pool pointer and @p cnt_free is set on success,
3907  *   NULL otherwise and rte_errno is set.
3908  */
3909 static struct mlx5_flow_counter_pool *
3910 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
3911                              struct mlx5_flow_counter **cnt_free,
3912                              uint32_t batch)
3913 {
3914         struct mlx5_priv *priv = dev->data->dev_private;
3915         struct mlx5_flow_counter_pool *pool;
3916         struct mlx5_devx_obj *dcs = NULL;
3917         struct mlx5_flow_counter *cnt;
3918         uint32_t i;
3919
3920         if (!batch) {
3921                 /* bulk_bitmap must be 0 for single counter allocation. */
3922                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3923                 if (!dcs)
3924                         return NULL;
3925                 pool = flow_dv_find_pool_by_id
3926                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
3927                 if (!pool) {
3928                         pool = flow_dv_pool_create(dev, dcs, batch);
3929                         if (!pool) {
3930                                 mlx5_devx_cmd_destroy(dcs);
3931                                 return NULL;
3932                         }
3933                 } else if (dcs->id < pool->min_dcs->id) {
3934                         rte_atomic64_set(&pool->a64_dcs,
3935                                          (int64_t)(uintptr_t)dcs);
3936                 }
3937                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
3938                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3939                 cnt->dcs = dcs;
3940                 *cnt_free = cnt;
3941                 return pool;
3942         }
3943         /* bulk_bitmap is in 128 counters units. */
3944         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
3945                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
3946         if (!dcs) {
3947                 rte_errno = ENODATA;
3948                 return NULL;
3949         }
3950         pool = flow_dv_pool_create(dev, dcs, batch);
3951         if (!pool) {
3952                 mlx5_devx_cmd_destroy(dcs);
3953                 return NULL;
3954         }
3955         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3956                 cnt = &pool->counters_raw[i];
3957                 cnt->pool = pool;
3958                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3959         }
3960         *cnt_free = &pool->counters_raw[0];
3961         return pool;
3962 }
3963
3964 /**
3965  * Search for existed shared counter.
3966  *
3967  * @param[in] cont
3968  *   Pointer to the relevant counter pool container.
3969  * @param[in] id
3970  *   The shared counter ID to search.
3971  *
3972  * @return
3973  *   NULL if not existed, otherwise pointer to the shared counter.
3974  */
3975 static struct mlx5_flow_counter *
3976 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
3977                               uint32_t id)
3978 {
3979         static struct mlx5_flow_counter *cnt;
3980         struct mlx5_flow_counter_pool *pool;
3981         int i;
3982
3983         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3984                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3985                         cnt = &pool->counters_raw[i];
3986                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
3987                                 return cnt;
3988                 }
3989         }
3990         return NULL;
3991 }
3992
3993 /**
3994  * Allocate a flow counter.
3995  *
3996  * @param[in] dev
3997  *   Pointer to the Ethernet device structure.
3998  * @param[in] shared
3999  *   Indicate if this counter is shared with other flows.
4000  * @param[in] id
4001  *   Counter identifier.
4002  * @param[in] group
4003  *   Counter flow group.
4004  *
4005  * @return
4006  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4007  */
4008 static struct mlx5_flow_counter *
4009 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4010                       uint16_t group)
4011 {
4012         struct mlx5_priv *priv = dev->data->dev_private;
4013         struct mlx5_flow_counter_pool *pool = NULL;
4014         struct mlx5_flow_counter *cnt_free = NULL;
4015         /*
4016          * Currently group 0 flow counter cannot be assigned to a flow if it is
4017          * not the first one in the batch counter allocation, so it is better
4018          * to allocate counters one by one for these flows in a separate
4019          * container.
4020          * A counter can be shared between different groups so need to take
4021          * shared counters from the single container.
4022          */
4023         uint32_t batch = (group && !shared) ? 1 : 0;
4024         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4025                                                                0);
4026
4027         if (priv->counter_fallback)
4028                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4029         if (!priv->config.devx) {
4030                 rte_errno = ENOTSUP;
4031                 return NULL;
4032         }
4033         if (shared) {
4034                 cnt_free = flow_dv_counter_shared_search(cont, id);
4035                 if (cnt_free) {
4036                         if (cnt_free->ref_cnt + 1 == 0) {
4037                                 rte_errno = E2BIG;
4038                                 return NULL;
4039                         }
4040                         cnt_free->ref_cnt++;
4041                         return cnt_free;
4042                 }
4043         }
4044         /* Pools which has a free counters are in the start. */
4045         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4046                 /*
4047                  * The free counter reset values must be updated between the
4048                  * counter release to the counter allocation, so, at least one
4049                  * query must be done in this time. ensure it by saving the
4050                  * query generation in the release time.
4051                  * The free list is sorted according to the generation - so if
4052                  * the first one is not updated, all the others are not
4053                  * updated too.
4054                  */
4055                 cnt_free = TAILQ_FIRST(&pool->counters);
4056                 if (cnt_free && cnt_free->query_gen + 1 <
4057                     rte_atomic64_read(&pool->query_gen))
4058                         break;
4059                 cnt_free = NULL;
4060         }
4061         if (!cnt_free) {
4062                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4063                 if (!pool)
4064                         return NULL;
4065         }
4066         cnt_free->batch = batch;
4067         /* Create a DV counter action only in the first time usage. */
4068         if (!cnt_free->action) {
4069                 uint16_t offset;
4070                 struct mlx5_devx_obj *dcs;
4071
4072                 if (batch) {
4073                         offset = cnt_free - &pool->counters_raw[0];
4074                         dcs = pool->min_dcs;
4075                 } else {
4076                         offset = 0;
4077                         dcs = cnt_free->dcs;
4078                 }
4079                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4080                                         (dcs->obj, offset);
4081                 if (!cnt_free->action) {
4082                         rte_errno = errno;
4083                         return NULL;
4084                 }
4085         }
4086         /* Update the counter reset values. */
4087         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4088                                  &cnt_free->bytes))
4089                 return NULL;
4090         cnt_free->shared = shared;
4091         cnt_free->ref_cnt = 1;
4092         cnt_free->id = id;
4093         if (!priv->sh->cmng.query_thread_on)
4094                 /* Start the asynchronous batch query by the host thread. */
4095                 mlx5_set_query_alarm(priv->sh);
4096         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4097         if (TAILQ_EMPTY(&pool->counters)) {
4098                 /* Move the pool to the end of the container pool list. */
4099                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4100                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4101         }
4102         return cnt_free;
4103 }
4104
4105 /**
4106  * Release a flow counter.
4107  *
4108  * @param[in] dev
4109  *   Pointer to the Ethernet device structure.
4110  * @param[in] counter
4111  *   Pointer to the counter handler.
4112  */
4113 static void
4114 flow_dv_counter_release(struct rte_eth_dev *dev,
4115                         struct mlx5_flow_counter *counter)
4116 {
4117         struct mlx5_priv *priv = dev->data->dev_private;
4118
4119         if (!counter)
4120                 return;
4121         if (priv->counter_fallback) {
4122                 flow_dv_counter_release_fallback(dev, counter);
4123                 return;
4124         }
4125         if (--counter->ref_cnt == 0) {
4126                 struct mlx5_flow_counter_pool *pool =
4127                                 flow_dv_counter_pool_get(counter);
4128
4129                 /* Put the counter in the end - the last updated one. */
4130                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4131                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4132         }
4133 }
4134
4135 /**
4136  * Verify the @p attributes will be correctly understood by the NIC and store
4137  * them in the @p flow if everything is correct.
4138  *
4139  * @param[in] dev
4140  *   Pointer to dev struct.
4141  * @param[in] attributes
4142  *   Pointer to flow attributes
4143  * @param[in] external
4144  *   This flow rule is created by request external to PMD.
4145  * @param[out] error
4146  *   Pointer to error structure.
4147  *
4148  * @return
4149  *   0 on success, a negative errno value otherwise and rte_errno is set.
4150  */
4151 static int
4152 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4153                             const struct rte_flow_attr *attributes,
4154                             bool external __rte_unused,
4155                             struct rte_flow_error *error)
4156 {
4157         struct mlx5_priv *priv = dev->data->dev_private;
4158         uint32_t priority_max = priv->config.flow_prio - 1;
4159
4160 #ifndef HAVE_MLX5DV_DR
4161         if (attributes->group)
4162                 return rte_flow_error_set(error, ENOTSUP,
4163                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4164                                           NULL,
4165                                           "groups are not supported");
4166 #else
4167         uint32_t table;
4168         int ret;
4169
4170         ret = mlx5_flow_group_to_table(attributes, external,
4171                                        attributes->group,
4172                                        &table, error);
4173         if (ret)
4174                 return ret;
4175 #endif
4176         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4177             attributes->priority >= priority_max)
4178                 return rte_flow_error_set(error, ENOTSUP,
4179                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4180                                           NULL,
4181                                           "priority out of range");
4182         if (attributes->transfer) {
4183                 if (!priv->config.dv_esw_en)
4184                         return rte_flow_error_set
4185                                 (error, ENOTSUP,
4186                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4187                                  "E-Switch dr is not supported");
4188                 if (!(priv->representor || priv->master))
4189                         return rte_flow_error_set
4190                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4191                                  NULL, "E-Switch configuration can only be"
4192                                  " done by a master or a representor device");
4193                 if (attributes->egress)
4194                         return rte_flow_error_set
4195                                 (error, ENOTSUP,
4196                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4197                                  "egress is not supported");
4198         }
4199         if (!(attributes->egress ^ attributes->ingress))
4200                 return rte_flow_error_set(error, ENOTSUP,
4201                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4202                                           "must specify exactly one of "
4203                                           "ingress or egress");
4204         return 0;
4205 }
4206
4207 /**
4208  * Internal validation function. For validating both actions and items.
4209  *
4210  * @param[in] dev
4211  *   Pointer to the rte_eth_dev structure.
4212  * @param[in] attr
4213  *   Pointer to the flow attributes.
4214  * @param[in] items
4215  *   Pointer to the list of items.
4216  * @param[in] actions
4217  *   Pointer to the list of actions.
4218  * @param[in] external
4219  *   This flow rule is created by request external to PMD.
4220  * @param[out] error
4221  *   Pointer to the error structure.
4222  *
4223  * @return
4224  *   0 on success, a negative errno value otherwise and rte_errno is set.
4225  */
4226 static int
4227 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4228                  const struct rte_flow_item items[],
4229                  const struct rte_flow_action actions[],
4230                  bool external, struct rte_flow_error *error)
4231 {
4232         int ret;
4233         uint64_t action_flags = 0;
4234         uint64_t item_flags = 0;
4235         uint64_t last_item = 0;
4236         uint8_t next_protocol = 0xff;
4237         uint16_t ether_type = 0;
4238         int actions_n = 0;
4239         const struct rte_flow_item *gre_item = NULL;
4240         struct rte_flow_item_tcp nic_tcp_mask = {
4241                 .hdr = {
4242                         .tcp_flags = 0xFF,
4243                         .src_port = RTE_BE16(UINT16_MAX),
4244                         .dst_port = RTE_BE16(UINT16_MAX),
4245                 }
4246         };
4247         struct mlx5_priv *priv = dev->data->dev_private;
4248         struct mlx5_dev_config *dev_conf = &priv->config;
4249
4250         if (items == NULL)
4251                 return -1;
4252         ret = flow_dv_validate_attributes(dev, attr, external, error);
4253         if (ret < 0)
4254                 return ret;
4255         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4256                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4257                 int type = items->type;
4258
4259                 switch (type) {
4260                 case RTE_FLOW_ITEM_TYPE_VOID:
4261                         break;
4262                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4263                         ret = flow_dv_validate_item_port_id
4264                                         (dev, items, attr, item_flags, error);
4265                         if (ret < 0)
4266                                 return ret;
4267                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4268                         break;
4269                 case RTE_FLOW_ITEM_TYPE_ETH:
4270                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4271                                                           error);
4272                         if (ret < 0)
4273                                 return ret;
4274                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4275                                              MLX5_FLOW_LAYER_OUTER_L2;
4276                         if (items->mask != NULL && items->spec != NULL) {
4277                                 ether_type =
4278                                         ((const struct rte_flow_item_eth *)
4279                                          items->spec)->type;
4280                                 ether_type &=
4281                                         ((const struct rte_flow_item_eth *)
4282                                          items->mask)->type;
4283                                 ether_type = rte_be_to_cpu_16(ether_type);
4284                         } else {
4285                                 ether_type = 0;
4286                         }
4287                         break;
4288                 case RTE_FLOW_ITEM_TYPE_VLAN:
4289                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4290                                                            dev, error);
4291                         if (ret < 0)
4292                                 return ret;
4293                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4294                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4295                         if (items->mask != NULL && items->spec != NULL) {
4296                                 ether_type =
4297                                         ((const struct rte_flow_item_vlan *)
4298                                          items->spec)->inner_type;
4299                                 ether_type &=
4300                                         ((const struct rte_flow_item_vlan *)
4301                                          items->mask)->inner_type;
4302                                 ether_type = rte_be_to_cpu_16(ether_type);
4303                         } else {
4304                                 ether_type = 0;
4305                         }
4306                         break;
4307                 case RTE_FLOW_ITEM_TYPE_IPV4:
4308                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4309                                                   &item_flags, &tunnel);
4310                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4311                                                            last_item,
4312                                                            ether_type, NULL,
4313                                                            error);
4314                         if (ret < 0)
4315                                 return ret;
4316                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4317                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4318                         if (items->mask != NULL &&
4319                             ((const struct rte_flow_item_ipv4 *)
4320                              items->mask)->hdr.next_proto_id) {
4321                                 next_protocol =
4322                                         ((const struct rte_flow_item_ipv4 *)
4323                                          (items->spec))->hdr.next_proto_id;
4324                                 next_protocol &=
4325                                         ((const struct rte_flow_item_ipv4 *)
4326                                          (items->mask))->hdr.next_proto_id;
4327                         } else {
4328                                 /* Reset for inner layer. */
4329                                 next_protocol = 0xff;
4330                         }
4331                         break;
4332                 case RTE_FLOW_ITEM_TYPE_IPV6:
4333                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4334                                                   &item_flags, &tunnel);
4335                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4336                                                            last_item,
4337                                                            ether_type, NULL,
4338                                                            error);
4339                         if (ret < 0)
4340                                 return ret;
4341                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4342                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4343                         if (items->mask != NULL &&
4344                             ((const struct rte_flow_item_ipv6 *)
4345                              items->mask)->hdr.proto) {
4346                                 next_protocol =
4347                                         ((const struct rte_flow_item_ipv6 *)
4348                                          items->spec)->hdr.proto;
4349                                 next_protocol &=
4350                                         ((const struct rte_flow_item_ipv6 *)
4351                                          items->mask)->hdr.proto;
4352                         } else {
4353                                 /* Reset for inner layer. */
4354                                 next_protocol = 0xff;
4355                         }
4356                         break;
4357                 case RTE_FLOW_ITEM_TYPE_TCP:
4358                         ret = mlx5_flow_validate_item_tcp
4359                                                 (items, item_flags,
4360                                                  next_protocol,
4361                                                  &nic_tcp_mask,
4362                                                  error);
4363                         if (ret < 0)
4364                                 return ret;
4365                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4366                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4367                         break;
4368                 case RTE_FLOW_ITEM_TYPE_UDP:
4369                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4370                                                           next_protocol,
4371                                                           error);
4372                         if (ret < 0)
4373                                 return ret;
4374                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4375                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4376                         break;
4377                 case RTE_FLOW_ITEM_TYPE_GRE:
4378                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4379                                                           next_protocol, error);
4380                         if (ret < 0)
4381                                 return ret;
4382                         gre_item = items;
4383                         last_item = MLX5_FLOW_LAYER_GRE;
4384                         break;
4385                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4386                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4387                                                             next_protocol,
4388                                                             error);
4389                         if (ret < 0)
4390                                 return ret;
4391                         last_item = MLX5_FLOW_LAYER_NVGRE;
4392                         break;
4393                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4394                         ret = mlx5_flow_validate_item_gre_key
4395                                 (items, item_flags, gre_item, error);
4396                         if (ret < 0)
4397                                 return ret;
4398                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4399                         break;
4400                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4401                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4402                                                             error);
4403                         if (ret < 0)
4404                                 return ret;
4405                         last_item = MLX5_FLOW_LAYER_VXLAN;
4406                         break;
4407                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4408                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4409                                                                 item_flags, dev,
4410                                                                 error);
4411                         if (ret < 0)
4412                                 return ret;
4413                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4414                         break;
4415                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4416                         ret = mlx5_flow_validate_item_geneve(items,
4417                                                              item_flags, dev,
4418                                                              error);
4419                         if (ret < 0)
4420                                 return ret;
4421                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4422                         break;
4423                 case RTE_FLOW_ITEM_TYPE_MPLS:
4424                         ret = mlx5_flow_validate_item_mpls(dev, items,
4425                                                            item_flags,
4426                                                            last_item, error);
4427                         if (ret < 0)
4428                                 return ret;
4429                         last_item = MLX5_FLOW_LAYER_MPLS;
4430                         break;
4431
4432                 case RTE_FLOW_ITEM_TYPE_MARK:
4433                         ret = flow_dv_validate_item_mark(dev, items, attr,
4434                                                          error);
4435                         if (ret < 0)
4436                                 return ret;
4437                         last_item = MLX5_FLOW_ITEM_MARK;
4438                         break;
4439                 case RTE_FLOW_ITEM_TYPE_META:
4440                         ret = flow_dv_validate_item_meta(dev, items, attr,
4441                                                          error);
4442                         if (ret < 0)
4443                                 return ret;
4444                         last_item = MLX5_FLOW_ITEM_METADATA;
4445                         break;
4446                 case RTE_FLOW_ITEM_TYPE_ICMP:
4447                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4448                                                            next_protocol,
4449                                                            error);
4450                         if (ret < 0)
4451                                 return ret;
4452                         last_item = MLX5_FLOW_LAYER_ICMP;
4453                         break;
4454                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4455                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4456                                                             next_protocol,
4457                                                             error);
4458                         if (ret < 0)
4459                                 return ret;
4460                         last_item = MLX5_FLOW_LAYER_ICMP6;
4461                         break;
4462                 case RTE_FLOW_ITEM_TYPE_TAG:
4463                         ret = flow_dv_validate_item_tag(dev, items,
4464                                                         attr, error);
4465                         if (ret < 0)
4466                                 return ret;
4467                         last_item = MLX5_FLOW_ITEM_TAG;
4468                         break;
4469                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4470                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4471                         break;
4472                 default:
4473                         return rte_flow_error_set(error, ENOTSUP,
4474                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4475                                                   NULL, "item not supported");
4476                 }
4477                 item_flags |= last_item;
4478         }
4479         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4480                 int type = actions->type;
4481                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4482                         return rte_flow_error_set(error, ENOTSUP,
4483                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4484                                                   actions, "too many actions");
4485                 switch (type) {
4486                 case RTE_FLOW_ACTION_TYPE_VOID:
4487                         break;
4488                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4489                         ret = flow_dv_validate_action_port_id(dev,
4490                                                               action_flags,
4491                                                               actions,
4492                                                               attr,
4493                                                               error);
4494                         if (ret)
4495                                 return ret;
4496                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4497                         ++actions_n;
4498                         break;
4499                 case RTE_FLOW_ACTION_TYPE_FLAG:
4500                         ret = flow_dv_validate_action_flag(dev, action_flags,
4501                                                            attr, error);
4502                         if (ret < 0)
4503                                 return ret;
4504                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4505                                 /* Count all modify-header actions as one. */
4506                                 if (!(action_flags &
4507                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4508                                         ++actions_n;
4509                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4510                                                 MLX5_FLOW_ACTION_MARK_EXT;
4511                         } else {
4512                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4513                                 ++actions_n;
4514                         }
4515                         break;
4516                 case RTE_FLOW_ACTION_TYPE_MARK:
4517                         ret = flow_dv_validate_action_mark(dev, actions,
4518                                                            action_flags,
4519                                                            attr, error);
4520                         if (ret < 0)
4521                                 return ret;
4522                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4523                                 /* Count all modify-header actions as one. */
4524                                 if (!(action_flags &
4525                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4526                                         ++actions_n;
4527                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4528                                                 MLX5_FLOW_ACTION_MARK_EXT;
4529                         } else {
4530                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4531                                 ++actions_n;
4532                         }
4533                         break;
4534                 case RTE_FLOW_ACTION_TYPE_SET_META:
4535                         ret = flow_dv_validate_action_set_meta(dev, actions,
4536                                                                action_flags,
4537                                                                attr, error);
4538                         if (ret < 0)
4539                                 return ret;
4540                         /* Count all modify-header actions as one action. */
4541                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4542                                 ++actions_n;
4543                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4544                         break;
4545                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4546                         ret = flow_dv_validate_action_set_tag(dev, actions,
4547                                                               action_flags,
4548                                                               attr, error);
4549                         if (ret < 0)
4550                                 return ret;
4551                         /* Count all modify-header actions as one action. */
4552                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4553                                 ++actions_n;
4554                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4555                         break;
4556                 case RTE_FLOW_ACTION_TYPE_DROP:
4557                         ret = mlx5_flow_validate_action_drop(action_flags,
4558                                                              attr, error);
4559                         if (ret < 0)
4560                                 return ret;
4561                         action_flags |= MLX5_FLOW_ACTION_DROP;
4562                         ++actions_n;
4563                         break;
4564                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4565                         ret = mlx5_flow_validate_action_queue(actions,
4566                                                               action_flags, dev,
4567                                                               attr, error);
4568                         if (ret < 0)
4569                                 return ret;
4570                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4571                         ++actions_n;
4572                         break;
4573                 case RTE_FLOW_ACTION_TYPE_RSS:
4574                         ret = mlx5_flow_validate_action_rss(actions,
4575                                                             action_flags, dev,
4576                                                             attr, item_flags,
4577                                                             error);
4578                         if (ret < 0)
4579                                 return ret;
4580                         action_flags |= MLX5_FLOW_ACTION_RSS;
4581                         ++actions_n;
4582                         break;
4583                 case RTE_FLOW_ACTION_TYPE_COUNT:
4584                         ret = flow_dv_validate_action_count(dev, error);
4585                         if (ret < 0)
4586                                 return ret;
4587                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4588                         ++actions_n;
4589                         break;
4590                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4591                         if (flow_dv_validate_action_pop_vlan(dev,
4592                                                              action_flags,
4593                                                              actions,
4594                                                              item_flags, attr,
4595                                                              error))
4596                                 return -rte_errno;
4597                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4598                         ++actions_n;
4599                         break;
4600                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4601                         ret = flow_dv_validate_action_push_vlan(action_flags,
4602                                                                 item_flags,
4603                                                                 actions, attr,
4604                                                                 error);
4605                         if (ret < 0)
4606                                 return ret;
4607                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4608                         ++actions_n;
4609                         break;
4610                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4611                         ret = flow_dv_validate_action_set_vlan_pcp
4612                                                 (action_flags, actions, error);
4613                         if (ret < 0)
4614                                 return ret;
4615                         /* Count PCP with push_vlan command. */
4616                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4617                         break;
4618                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4619                         ret = flow_dv_validate_action_set_vlan_vid
4620                                                 (item_flags, action_flags,
4621                                                  actions, error);
4622                         if (ret < 0)
4623                                 return ret;
4624                         /* Count VID with push_vlan command. */
4625                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4626                         break;
4627                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4628                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4629                         ret = flow_dv_validate_action_l2_encap(action_flags,
4630                                                                actions, attr,
4631                                                                error);
4632                         if (ret < 0)
4633                                 return ret;
4634                         action_flags |= actions->type ==
4635                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4636                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4637                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4638                         ++actions_n;
4639                         break;
4640                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4641                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4642                         ret = flow_dv_validate_action_l2_decap(action_flags,
4643                                                                attr, error);
4644                         if (ret < 0)
4645                                 return ret;
4646                         action_flags |= actions->type ==
4647                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4648                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4649                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4650                         ++actions_n;
4651                         break;
4652                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4653                         ret = flow_dv_validate_action_raw_encap(action_flags,
4654                                                                 actions, attr,
4655                                                                 error);
4656                         if (ret < 0)
4657                                 return ret;
4658                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4659                         ++actions_n;
4660                         break;
4661                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4662                         ret = flow_dv_validate_action_raw_decap(action_flags,
4663                                                                 actions, attr,
4664                                                                 error);
4665                         if (ret < 0)
4666                                 return ret;
4667                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4668                         ++actions_n;
4669                         break;
4670                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4671                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4672                         ret = flow_dv_validate_action_modify_mac(action_flags,
4673                                                                  actions,
4674                                                                  item_flags,
4675                                                                  error);
4676                         if (ret < 0)
4677                                 return ret;
4678                         /* Count all modify-header actions as one action. */
4679                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4680                                 ++actions_n;
4681                         action_flags |= actions->type ==
4682                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4683                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4684                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4685                         break;
4686
4687                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4688                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4689                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4690                                                                   actions,
4691                                                                   item_flags,
4692                                                                   error);
4693                         if (ret < 0)
4694                                 return ret;
4695                         /* Count all modify-header actions as one action. */
4696                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4697                                 ++actions_n;
4698                         action_flags |= actions->type ==
4699                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4700                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4701                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4702                         break;
4703                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4704                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4705                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4706                                                                   actions,
4707                                                                   item_flags,
4708                                                                   error);
4709                         if (ret < 0)
4710                                 return ret;
4711                         /* Count all modify-header actions as one action. */
4712                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4713                                 ++actions_n;
4714                         action_flags |= actions->type ==
4715                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4716                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4717                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4718                         break;
4719                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4720                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4721                         ret = flow_dv_validate_action_modify_tp(action_flags,
4722                                                                 actions,
4723                                                                 item_flags,
4724                                                                 error);
4725                         if (ret < 0)
4726                                 return ret;
4727                         /* Count all modify-header actions as one action. */
4728                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4729                                 ++actions_n;
4730                         action_flags |= actions->type ==
4731                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4732                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4733                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4734                         break;
4735                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4736                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4737                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4738                                                                  actions,
4739                                                                  item_flags,
4740                                                                  error);
4741                         if (ret < 0)
4742                                 return ret;
4743                         /* Count all modify-header actions as one action. */
4744                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4745                                 ++actions_n;
4746                         action_flags |= actions->type ==
4747                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4748                                                 MLX5_FLOW_ACTION_SET_TTL :
4749                                                 MLX5_FLOW_ACTION_DEC_TTL;
4750                         break;
4751                 case RTE_FLOW_ACTION_TYPE_JUMP:
4752                         ret = flow_dv_validate_action_jump(actions,
4753                                                            action_flags,
4754                                                            attr, external,
4755                                                            error);
4756                         if (ret)
4757                                 return ret;
4758                         ++actions_n;
4759                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4760                         break;
4761                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4762                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4763                         ret = flow_dv_validate_action_modify_tcp_seq
4764                                                                 (action_flags,
4765                                                                  actions,
4766                                                                  item_flags,
4767                                                                  error);
4768                         if (ret < 0)
4769                                 return ret;
4770                         /* Count all modify-header actions as one action. */
4771                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4772                                 ++actions_n;
4773                         action_flags |= actions->type ==
4774                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4775                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4776                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4777                         break;
4778                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4779                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4780                         ret = flow_dv_validate_action_modify_tcp_ack
4781                                                                 (action_flags,
4782                                                                  actions,
4783                                                                  item_flags,
4784                                                                  error);
4785                         if (ret < 0)
4786                                 return ret;
4787                         /* Count all modify-header actions as one action. */
4788                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4789                                 ++actions_n;
4790                         action_flags |= actions->type ==
4791                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4792                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4793                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4794                         break;
4795                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4796                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4797                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4798                         break;
4799                 case RTE_FLOW_ACTION_TYPE_METER:
4800                         ret = mlx5_flow_validate_action_meter(dev,
4801                                                               action_flags,
4802                                                               actions, attr,
4803                                                               error);
4804                         if (ret < 0)
4805                                 return ret;
4806                         action_flags |= MLX5_FLOW_ACTION_METER;
4807                         ++actions_n;
4808                         break;
4809                 default:
4810                         return rte_flow_error_set(error, ENOTSUP,
4811                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4812                                                   actions,
4813                                                   "action not supported");
4814                 }
4815         }
4816         if ((action_flags & MLX5_FLOW_LAYER_TUNNEL) &&
4817             (action_flags & MLX5_FLOW_VLAN_ACTIONS))
4818                 return rte_flow_error_set(error, ENOTSUP,
4819                                           RTE_FLOW_ERROR_TYPE_ACTION,
4820                                           actions,
4821                                           "can't have vxlan and vlan"
4822                                           " actions in the same rule");
4823         /* Eswitch has few restrictions on using items and actions */
4824         if (attr->transfer) {
4825                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4826                     action_flags & MLX5_FLOW_ACTION_FLAG)
4827                         return rte_flow_error_set(error, ENOTSUP,
4828                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4829                                                   NULL,
4830                                                   "unsupported action FLAG");
4831                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4832                     action_flags & MLX5_FLOW_ACTION_MARK)
4833                         return rte_flow_error_set(error, ENOTSUP,
4834                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4835                                                   NULL,
4836                                                   "unsupported action MARK");
4837                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
4838                         return rte_flow_error_set(error, ENOTSUP,
4839                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4840                                                   NULL,
4841                                                   "unsupported action QUEUE");
4842                 if (action_flags & MLX5_FLOW_ACTION_RSS)
4843                         return rte_flow_error_set(error, ENOTSUP,
4844                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4845                                                   NULL,
4846                                                   "unsupported action RSS");
4847                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4848                         return rte_flow_error_set(error, EINVAL,
4849                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4850                                                   actions,
4851                                                   "no fate action is found");
4852         } else {
4853                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
4854                         return rte_flow_error_set(error, EINVAL,
4855                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4856                                                   actions,
4857                                                   "no fate action is found");
4858         }
4859         return 0;
4860 }
4861
4862 /**
4863  * Internal preparation function. Allocates the DV flow size,
4864  * this size is constant.
4865  *
4866  * @param[in] attr
4867  *   Pointer to the flow attributes.
4868  * @param[in] items
4869  *   Pointer to the list of items.
4870  * @param[in] actions
4871  *   Pointer to the list of actions.
4872  * @param[out] error
4873  *   Pointer to the error structure.
4874  *
4875  * @return
4876  *   Pointer to mlx5_flow object on success,
4877  *   otherwise NULL and rte_errno is set.
4878  */
4879 static struct mlx5_flow *
4880 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
4881                 const struct rte_flow_item items[] __rte_unused,
4882                 const struct rte_flow_action actions[] __rte_unused,
4883                 struct rte_flow_error *error)
4884 {
4885         size_t size = sizeof(struct mlx5_flow);
4886         struct mlx5_flow *dev_flow;
4887
4888         dev_flow = rte_calloc(__func__, 1, size, 0);
4889         if (!dev_flow) {
4890                 rte_flow_error_set(error, ENOMEM,
4891                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4892                                    "not enough memory to create flow");
4893                 return NULL;
4894         }
4895         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
4896         dev_flow->ingress = attr->ingress;
4897         dev_flow->transfer = attr->transfer;
4898         return dev_flow;
4899 }
4900
4901 #ifndef NDEBUG
4902 /**
4903  * Sanity check for match mask and value. Similar to check_valid_spec() in
4904  * kernel driver. If unmasked bit is present in value, it returns failure.
4905  *
4906  * @param match_mask
4907  *   pointer to match mask buffer.
4908  * @param match_value
4909  *   pointer to match value buffer.
4910  *
4911  * @return
4912  *   0 if valid, -EINVAL otherwise.
4913  */
4914 static int
4915 flow_dv_check_valid_spec(void *match_mask, void *match_value)
4916 {
4917         uint8_t *m = match_mask;
4918         uint8_t *v = match_value;
4919         unsigned int i;
4920
4921         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
4922                 if (v[i] & ~m[i]) {
4923                         DRV_LOG(ERR,
4924                                 "match_value differs from match_criteria"
4925                                 " %p[%u] != %p[%u]",
4926                                 match_value, i, match_mask, i);
4927                         return -EINVAL;
4928                 }
4929         }
4930         return 0;
4931 }
4932 #endif
4933
4934 /**
4935  * Add Ethernet item to matcher and to the value.
4936  *
4937  * @param[in, out] matcher
4938  *   Flow matcher.
4939  * @param[in, out] key
4940  *   Flow matcher value.
4941  * @param[in] item
4942  *   Flow pattern to translate.
4943  * @param[in] inner
4944  *   Item is inner pattern.
4945  */
4946 static void
4947 flow_dv_translate_item_eth(void *matcher, void *key,
4948                            const struct rte_flow_item *item, int inner)
4949 {
4950         const struct rte_flow_item_eth *eth_m = item->mask;
4951         const struct rte_flow_item_eth *eth_v = item->spec;
4952         const struct rte_flow_item_eth nic_mask = {
4953                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4954                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4955                 .type = RTE_BE16(0xffff),
4956         };
4957         void *headers_m;
4958         void *headers_v;
4959         char *l24_v;
4960         unsigned int i;
4961
4962         if (!eth_v)
4963                 return;
4964         if (!eth_m)
4965                 eth_m = &nic_mask;
4966         if (inner) {
4967                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4968                                          inner_headers);
4969                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4970         } else {
4971                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4972                                          outer_headers);
4973                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4974         }
4975         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
4976                &eth_m->dst, sizeof(eth_m->dst));
4977         /* The value must be in the range of the mask. */
4978         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
4979         for (i = 0; i < sizeof(eth_m->dst); ++i)
4980                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
4981         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
4982                &eth_m->src, sizeof(eth_m->src));
4983         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
4984         /* The value must be in the range of the mask. */
4985         for (i = 0; i < sizeof(eth_m->dst); ++i)
4986                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
4987         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
4988                  rte_be_to_cpu_16(eth_m->type));
4989         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
4990         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
4991 }
4992
4993 /**
4994  * Add VLAN item to matcher and to the value.
4995  *
4996  * @param[in, out] dev_flow
4997  *   Flow descriptor.
4998  * @param[in, out] matcher
4999  *   Flow matcher.
5000  * @param[in, out] key
5001  *   Flow matcher value.
5002  * @param[in] item
5003  *   Flow pattern to translate.
5004  * @param[in] inner
5005  *   Item is inner pattern.
5006  */
5007 static void
5008 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5009                             void *matcher, void *key,
5010                             const struct rte_flow_item *item,
5011                             int inner)
5012 {
5013         const struct rte_flow_item_vlan *vlan_m = item->mask;
5014         const struct rte_flow_item_vlan *vlan_v = item->spec;
5015         void *headers_m;
5016         void *headers_v;
5017         uint16_t tci_m;
5018         uint16_t tci_v;
5019
5020         if (!vlan_v)
5021                 return;
5022         if (!vlan_m)
5023                 vlan_m = &rte_flow_item_vlan_mask;
5024         if (inner) {
5025                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5026                                          inner_headers);
5027                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5028         } else {
5029                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5030                                          outer_headers);
5031                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5032                 /*
5033                  * This is workaround, masks are not supported,
5034                  * and pre-validated.
5035                  */
5036                 dev_flow->dv.vf_vlan.tag =
5037                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5038         }
5039         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5040         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5041         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5042         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5043         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5044         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5045         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5046         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5047         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5048         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5049         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5050                  rte_be_to_cpu_16(vlan_m->inner_type));
5051         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5052                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5053 }
5054
5055 /**
5056  * Add IPV4 item to matcher and to the value.
5057  *
5058  * @param[in, out] matcher
5059  *   Flow matcher.
5060  * @param[in, out] key
5061  *   Flow matcher value.
5062  * @param[in] item
5063  *   Flow pattern to translate.
5064  * @param[in] inner
5065  *   Item is inner pattern.
5066  * @param[in] group
5067  *   The group to insert the rule.
5068  */
5069 static void
5070 flow_dv_translate_item_ipv4(void *matcher, void *key,
5071                             const struct rte_flow_item *item,
5072                             int inner, uint32_t group)
5073 {
5074         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5075         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5076         const struct rte_flow_item_ipv4 nic_mask = {
5077                 .hdr = {
5078                         .src_addr = RTE_BE32(0xffffffff),
5079                         .dst_addr = RTE_BE32(0xffffffff),
5080                         .type_of_service = 0xff,
5081                         .next_proto_id = 0xff,
5082                 },
5083         };
5084         void *headers_m;
5085         void *headers_v;
5086         char *l24_m;
5087         char *l24_v;
5088         uint8_t tos;
5089
5090         if (inner) {
5091                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5092                                          inner_headers);
5093                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5094         } else {
5095                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5096                                          outer_headers);
5097                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5098         }
5099         if (group == 0)
5100                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5101         else
5102                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5103         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5104         if (!ipv4_v)
5105                 return;
5106         if (!ipv4_m)
5107                 ipv4_m = &nic_mask;
5108         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5109                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5110         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5111                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5112         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5113         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5114         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5115                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5116         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5117                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5118         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5119         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5120         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5121         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5122                  ipv4_m->hdr.type_of_service);
5123         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5124         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5125                  ipv4_m->hdr.type_of_service >> 2);
5126         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5127         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5128                  ipv4_m->hdr.next_proto_id);
5129         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5130                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5131 }
5132
5133 /**
5134  * Add IPV6 item to matcher and to the value.
5135  *
5136  * @param[in, out] matcher
5137  *   Flow matcher.
5138  * @param[in, out] key
5139  *   Flow matcher value.
5140  * @param[in] item
5141  *   Flow pattern to translate.
5142  * @param[in] inner
5143  *   Item is inner pattern.
5144  * @param[in] group
5145  *   The group to insert the rule.
5146  */
5147 static void
5148 flow_dv_translate_item_ipv6(void *matcher, void *key,
5149                             const struct rte_flow_item *item,
5150                             int inner, uint32_t group)
5151 {
5152         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5153         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5154         const struct rte_flow_item_ipv6 nic_mask = {
5155                 .hdr = {
5156                         .src_addr =
5157                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5158                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5159                         .dst_addr =
5160                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5161                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5162                         .vtc_flow = RTE_BE32(0xffffffff),
5163                         .proto = 0xff,
5164                         .hop_limits = 0xff,
5165                 },
5166         };
5167         void *headers_m;
5168         void *headers_v;
5169         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5170         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5171         char *l24_m;
5172         char *l24_v;
5173         uint32_t vtc_m;
5174         uint32_t vtc_v;
5175         int i;
5176         int size;
5177
5178         if (inner) {
5179                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5180                                          inner_headers);
5181                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5182         } else {
5183                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5184                                          outer_headers);
5185                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5186         }
5187         if (group == 0)
5188                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5189         else
5190                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5191         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5192         if (!ipv6_v)
5193                 return;
5194         if (!ipv6_m)
5195                 ipv6_m = &nic_mask;
5196         size = sizeof(ipv6_m->hdr.dst_addr);
5197         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5198                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5199         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5200                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5201         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5202         for (i = 0; i < size; ++i)
5203                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5204         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5205                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5206         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5207                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5208         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5209         for (i = 0; i < size; ++i)
5210                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5211         /* TOS. */
5212         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5213         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5214         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5215         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5216         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5217         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5218         /* Label. */
5219         if (inner) {
5220                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5221                          vtc_m);
5222                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5223                          vtc_v);
5224         } else {
5225                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5226                          vtc_m);
5227                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5228                          vtc_v);
5229         }
5230         /* Protocol. */
5231         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5232                  ipv6_m->hdr.proto);
5233         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5234                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5235 }
5236
5237 /**
5238  * Add TCP item to matcher and to the value.
5239  *
5240  * @param[in, out] matcher
5241  *   Flow matcher.
5242  * @param[in, out] key
5243  *   Flow matcher value.
5244  * @param[in] item
5245  *   Flow pattern to translate.
5246  * @param[in] inner
5247  *   Item is inner pattern.
5248  */
5249 static void
5250 flow_dv_translate_item_tcp(void *matcher, void *key,
5251                            const struct rte_flow_item *item,
5252                            int inner)
5253 {
5254         const struct rte_flow_item_tcp *tcp_m = item->mask;
5255         const struct rte_flow_item_tcp *tcp_v = item->spec;
5256         void *headers_m;
5257         void *headers_v;
5258
5259         if (inner) {
5260                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5261                                          inner_headers);
5262                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5263         } else {
5264                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5265                                          outer_headers);
5266                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5267         }
5268         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5269         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5270         if (!tcp_v)
5271                 return;
5272         if (!tcp_m)
5273                 tcp_m = &rte_flow_item_tcp_mask;
5274         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5275                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5276         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5277                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5278         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5279                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5280         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5281                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5282         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5283                  tcp_m->hdr.tcp_flags);
5284         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5285                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5286 }
5287
5288 /**
5289  * Add UDP item to matcher and to the value.
5290  *
5291  * @param[in, out] matcher
5292  *   Flow matcher.
5293  * @param[in, out] key
5294  *   Flow matcher value.
5295  * @param[in] item
5296  *   Flow pattern to translate.
5297  * @param[in] inner
5298  *   Item is inner pattern.
5299  */
5300 static void
5301 flow_dv_translate_item_udp(void *matcher, void *key,
5302                            const struct rte_flow_item *item,
5303                            int inner)
5304 {
5305         const struct rte_flow_item_udp *udp_m = item->mask;
5306         const struct rte_flow_item_udp *udp_v = item->spec;
5307         void *headers_m;
5308         void *headers_v;
5309
5310         if (inner) {
5311                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5312                                          inner_headers);
5313                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5314         } else {
5315                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5316                                          outer_headers);
5317                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5318         }
5319         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5320         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5321         if (!udp_v)
5322                 return;
5323         if (!udp_m)
5324                 udp_m = &rte_flow_item_udp_mask;
5325         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5326                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5327         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5328                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5329         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5330                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5331         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5332                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5333 }
5334
5335 /**
5336  * Add GRE optional Key item to matcher and to the value.
5337  *
5338  * @param[in, out] matcher
5339  *   Flow matcher.
5340  * @param[in, out] key
5341  *   Flow matcher value.
5342  * @param[in] item
5343  *   Flow pattern to translate.
5344  * @param[in] inner
5345  *   Item is inner pattern.
5346  */
5347 static void
5348 flow_dv_translate_item_gre_key(void *matcher, void *key,
5349                                    const struct rte_flow_item *item)
5350 {
5351         const rte_be32_t *key_m = item->mask;
5352         const rte_be32_t *key_v = item->spec;
5353         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5354         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5355         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5356
5357         if (!key_v)
5358                 return;
5359         if (!key_m)
5360                 key_m = &gre_key_default_mask;
5361         /* GRE K bit must be on and should already be validated */
5362         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5363         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5364         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5365                  rte_be_to_cpu_32(*key_m) >> 8);
5366         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5367                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5368         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5369                  rte_be_to_cpu_32(*key_m) & 0xFF);
5370         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5371                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5372 }
5373
5374 /**
5375  * Add GRE item to matcher and to the value.
5376  *
5377  * @param[in, out] matcher
5378  *   Flow matcher.
5379  * @param[in, out] key
5380  *   Flow matcher value.
5381  * @param[in] item
5382  *   Flow pattern to translate.
5383  * @param[in] inner
5384  *   Item is inner pattern.
5385  */
5386 static void
5387 flow_dv_translate_item_gre(void *matcher, void *key,
5388                            const struct rte_flow_item *item,
5389                            int inner)
5390 {
5391         const struct rte_flow_item_gre *gre_m = item->mask;
5392         const struct rte_flow_item_gre *gre_v = item->spec;
5393         void *headers_m;
5394         void *headers_v;
5395         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5396         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5397         struct {
5398                 union {
5399                         __extension__
5400                         struct {
5401                                 uint16_t version:3;
5402                                 uint16_t rsvd0:9;
5403                                 uint16_t s_present:1;
5404                                 uint16_t k_present:1;
5405                                 uint16_t rsvd_bit1:1;
5406                                 uint16_t c_present:1;
5407                         };
5408                         uint16_t value;
5409                 };
5410         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5411
5412         if (inner) {
5413                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5414                                          inner_headers);
5415                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5416         } else {
5417                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5418                                          outer_headers);
5419                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5420         }
5421         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5422         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5423         if (!gre_v)
5424                 return;
5425         if (!gre_m)
5426                 gre_m = &rte_flow_item_gre_mask;
5427         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5428                  rte_be_to_cpu_16(gre_m->protocol));
5429         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5430                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5431         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5432         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5433         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5434                  gre_crks_rsvd0_ver_m.c_present);
5435         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5436                  gre_crks_rsvd0_ver_v.c_present &
5437                  gre_crks_rsvd0_ver_m.c_present);
5438         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5439                  gre_crks_rsvd0_ver_m.k_present);
5440         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5441                  gre_crks_rsvd0_ver_v.k_present &
5442                  gre_crks_rsvd0_ver_m.k_present);
5443         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5444                  gre_crks_rsvd0_ver_m.s_present);
5445         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5446                  gre_crks_rsvd0_ver_v.s_present &
5447                  gre_crks_rsvd0_ver_m.s_present);
5448 }
5449
5450 /**
5451  * Add NVGRE item to matcher and to the value.
5452  *
5453  * @param[in, out] matcher
5454  *   Flow matcher.
5455  * @param[in, out] key
5456  *   Flow matcher value.
5457  * @param[in] item
5458  *   Flow pattern to translate.
5459  * @param[in] inner
5460  *   Item is inner pattern.
5461  */
5462 static void
5463 flow_dv_translate_item_nvgre(void *matcher, void *key,
5464                              const struct rte_flow_item *item,
5465                              int inner)
5466 {
5467         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5468         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5469         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5470         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5471         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5472         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5473         char *gre_key_m;
5474         char *gre_key_v;
5475         int size;
5476         int i;
5477
5478         /* For NVGRE, GRE header fields must be set with defined values. */
5479         const struct rte_flow_item_gre gre_spec = {
5480                 .c_rsvd0_ver = RTE_BE16(0x2000),
5481                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5482         };
5483         const struct rte_flow_item_gre gre_mask = {
5484                 .c_rsvd0_ver = RTE_BE16(0xB000),
5485                 .protocol = RTE_BE16(UINT16_MAX),
5486         };
5487         const struct rte_flow_item gre_item = {
5488                 .spec = &gre_spec,
5489                 .mask = &gre_mask,
5490                 .last = NULL,
5491         };
5492         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5493         if (!nvgre_v)
5494                 return;
5495         if (!nvgre_m)
5496                 nvgre_m = &rte_flow_item_nvgre_mask;
5497         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5498         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5499         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5500         memcpy(gre_key_m, tni_flow_id_m, size);
5501         for (i = 0; i < size; ++i)
5502                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5503 }
5504
5505 /**
5506  * Add VXLAN item to matcher and to the value.
5507  *
5508  * @param[in, out] matcher
5509  *   Flow matcher.
5510  * @param[in, out] key
5511  *   Flow matcher value.
5512  * @param[in] item
5513  *   Flow pattern to translate.
5514  * @param[in] inner
5515  *   Item is inner pattern.
5516  */
5517 static void
5518 flow_dv_translate_item_vxlan(void *matcher, void *key,
5519                              const struct rte_flow_item *item,
5520                              int inner)
5521 {
5522         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5523         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5524         void *headers_m;
5525         void *headers_v;
5526         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5527         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5528         char *vni_m;
5529         char *vni_v;
5530         uint16_t dport;
5531         int size;
5532         int i;
5533
5534         if (inner) {
5535                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5536                                          inner_headers);
5537                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5538         } else {
5539                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5540                                          outer_headers);
5541                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5542         }
5543         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5544                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5545         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5546                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5547                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5548         }
5549         if (!vxlan_v)
5550                 return;
5551         if (!vxlan_m)
5552                 vxlan_m = &rte_flow_item_vxlan_mask;
5553         size = sizeof(vxlan_m->vni);
5554         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5555         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5556         memcpy(vni_m, vxlan_m->vni, size);
5557         for (i = 0; i < size; ++i)
5558                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5559 }
5560
5561 /**
5562  * Add Geneve item to matcher and to the value.
5563  *
5564  * @param[in, out] matcher
5565  *   Flow matcher.
5566  * @param[in, out] key
5567  *   Flow matcher value.
5568  * @param[in] item
5569  *   Flow pattern to translate.
5570  * @param[in] inner
5571  *   Item is inner pattern.
5572  */
5573
5574 static void
5575 flow_dv_translate_item_geneve(void *matcher, void *key,
5576                               const struct rte_flow_item *item, int inner)
5577 {
5578         const struct rte_flow_item_geneve *geneve_m = item->mask;
5579         const struct rte_flow_item_geneve *geneve_v = item->spec;
5580         void *headers_m;
5581         void *headers_v;
5582         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5583         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5584         uint16_t dport;
5585         uint16_t gbhdr_m;
5586         uint16_t gbhdr_v;
5587         char *vni_m;
5588         char *vni_v;
5589         size_t size, i;
5590
5591         if (inner) {
5592                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5593                                          inner_headers);
5594                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5595         } else {
5596                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5597                                          outer_headers);
5598                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5599         }
5600         dport = MLX5_UDP_PORT_GENEVE;
5601         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5602                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5603                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5604         }
5605         if (!geneve_v)
5606                 return;
5607         if (!geneve_m)
5608                 geneve_m = &rte_flow_item_geneve_mask;
5609         size = sizeof(geneve_m->vni);
5610         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5611         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5612         memcpy(vni_m, geneve_m->vni, size);
5613         for (i = 0; i < size; ++i)
5614                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5615         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5616                  rte_be_to_cpu_16(geneve_m->protocol));
5617         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5618                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5619         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5620         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5621         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5622                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5623         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5624                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5625         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5626                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5627         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5628                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5629                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5630 }
5631
5632 /**
5633  * Add MPLS item to matcher and to the value.
5634  *
5635  * @param[in, out] matcher
5636  *   Flow matcher.
5637  * @param[in, out] key
5638  *   Flow matcher value.
5639  * @param[in] item
5640  *   Flow pattern to translate.
5641  * @param[in] prev_layer
5642  *   The protocol layer indicated in previous item.
5643  * @param[in] inner
5644  *   Item is inner pattern.
5645  */
5646 static void
5647 flow_dv_translate_item_mpls(void *matcher, void *key,
5648                             const struct rte_flow_item *item,
5649                             uint64_t prev_layer,
5650                             int inner)
5651 {
5652         const uint32_t *in_mpls_m = item->mask;
5653         const uint32_t *in_mpls_v = item->spec;
5654         uint32_t *out_mpls_m = 0;
5655         uint32_t *out_mpls_v = 0;
5656         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5657         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5658         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5659                                      misc_parameters_2);
5660         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5661         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5662         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5663
5664         switch (prev_layer) {
5665         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5666                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5667                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5668                          MLX5_UDP_PORT_MPLS);
5669                 break;
5670         case MLX5_FLOW_LAYER_GRE:
5671                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5672                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5673                          RTE_ETHER_TYPE_MPLS);
5674                 break;
5675         default:
5676                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5677                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5678                          IPPROTO_MPLS);
5679                 break;
5680         }
5681         if (!in_mpls_v)
5682                 return;
5683         if (!in_mpls_m)
5684                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5685         switch (prev_layer) {
5686         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5687                 out_mpls_m =
5688                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5689                                                  outer_first_mpls_over_udp);
5690                 out_mpls_v =
5691                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5692                                                  outer_first_mpls_over_udp);
5693                 break;
5694         case MLX5_FLOW_LAYER_GRE:
5695                 out_mpls_m =
5696                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5697                                                  outer_first_mpls_over_gre);
5698                 out_mpls_v =
5699                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5700                                                  outer_first_mpls_over_gre);
5701                 break;
5702         default:
5703                 /* Inner MPLS not over GRE is not supported. */
5704                 if (!inner) {
5705                         out_mpls_m =
5706                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5707                                                          misc2_m,
5708                                                          outer_first_mpls);
5709                         out_mpls_v =
5710                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5711                                                          misc2_v,
5712                                                          outer_first_mpls);
5713                 }
5714                 break;
5715         }
5716         if (out_mpls_m && out_mpls_v) {
5717                 *out_mpls_m = *in_mpls_m;
5718                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5719         }
5720 }
5721
5722 /**
5723  * Add metadata register item to matcher
5724  *
5725  * @param[in, out] matcher
5726  *   Flow matcher.
5727  * @param[in, out] key
5728  *   Flow matcher value.
5729  * @param[in] reg_type
5730  *   Type of device metadata register
5731  * @param[in] value
5732  *   Register value
5733  * @param[in] mask
5734  *   Register mask
5735  */
5736 static void
5737 flow_dv_match_meta_reg(void *matcher, void *key,
5738                        enum modify_reg reg_type,
5739                        uint32_t data, uint32_t mask)
5740 {
5741         void *misc2_m =
5742                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5743         void *misc2_v =
5744                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5745
5746         data &= mask;
5747         switch (reg_type) {
5748         case REG_A:
5749                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5750                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5751                 break;
5752         case REG_B:
5753                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5754                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5755                 break;
5756         case REG_C_0:
5757                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, mask);
5758                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, data);
5759                 break;
5760         case REG_C_1:
5761                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5762                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5763                 break;
5764         case REG_C_2:
5765                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5766                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5767                 break;
5768         case REG_C_3:
5769                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
5770                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
5771                 break;
5772         case REG_C_4:
5773                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
5774                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
5775                 break;
5776         case REG_C_5:
5777                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
5778                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
5779                 break;
5780         case REG_C_6:
5781                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
5782                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
5783                 break;
5784         case REG_C_7:
5785                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
5786                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
5787                 break;
5788         default:
5789                 assert(false);
5790                 break;
5791         }
5792 }
5793
5794 /**
5795  * Add MARK item to matcher
5796  *
5797  * @param[in] dev
5798  *   The device to configure through.
5799  * @param[in, out] matcher
5800  *   Flow matcher.
5801  * @param[in, out] key
5802  *   Flow matcher value.
5803  * @param[in] item
5804  *   Flow pattern to translate.
5805  */
5806 static void
5807 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
5808                             void *matcher, void *key,
5809                             const struct rte_flow_item *item)
5810 {
5811         struct mlx5_priv *priv = dev->data->dev_private;
5812         const struct rte_flow_item_mark *mark;
5813         uint32_t value;
5814         uint32_t mask;
5815
5816         mark = item->mask ? (const void *)item->mask :
5817                             &rte_flow_item_mark_mask;
5818         mask = mark->id & priv->sh->dv_mark_mask;
5819         mark = (const void *)item->spec;
5820         assert(mark);
5821         value = mark->id & priv->sh->dv_mark_mask & mask;
5822         if (mask) {
5823                 enum modify_reg reg;
5824
5825                 /* Get the metadata register index for the mark. */
5826                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
5827                 assert(reg > 0);
5828                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5829         }
5830 }
5831
5832 /**
5833  * Add META item to matcher
5834  *
5835  * @param[in] dev
5836  *   The devich to configure through.
5837  * @param[in, out] matcher
5838  *   Flow matcher.
5839  * @param[in, out] key
5840  *   Flow matcher value.
5841  * @param[in] attr
5842  *   Attributes of flow that includes this item.
5843  * @param[in] item
5844  *   Flow pattern to translate.
5845  */
5846 static void
5847 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
5848                             void *matcher, void *key,
5849                             const struct rte_flow_attr *attr,
5850                             const struct rte_flow_item *item)
5851 {
5852         const struct rte_flow_item_meta *meta_m;
5853         const struct rte_flow_item_meta *meta_v;
5854
5855         meta_m = (const void *)item->mask;
5856         if (!meta_m)
5857                 meta_m = &rte_flow_item_meta_mask;
5858         meta_v = (const void *)item->spec;
5859         if (meta_v) {
5860                 enum modify_reg reg;
5861                 uint32_t value = meta_v->data;
5862                 uint32_t mask = meta_m->data;
5863
5864                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
5865                 if (reg < 0)
5866                         return;
5867                 /*
5868                  * In datapath code there is no endianness
5869                  * coversions for perfromance reasons, all
5870                  * pattern conversions are done in rte_flow.
5871                  */
5872                 value = rte_cpu_to_be_32(value);
5873                 mask = rte_cpu_to_be_32(mask);
5874                 if (reg == REG_C_0) {
5875                         struct mlx5_priv *priv = dev->data->dev_private;
5876                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
5877                         uint32_t shl_c0 = rte_bsf32(msk_c0);
5878
5879                         msk_c0 = rte_cpu_to_be_32(msk_c0);
5880                         value <<= shl_c0;
5881                         mask <<= shl_c0;
5882                         assert(msk_c0);
5883                         assert(!(~msk_c0 & mask));
5884                 }
5885                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5886         }
5887 }
5888
5889 /**
5890  * Add vport metadata Reg C0 item to matcher
5891  *
5892  * @param[in, out] matcher
5893  *   Flow matcher.
5894  * @param[in, out] key
5895  *   Flow matcher value.
5896  * @param[in] reg
5897  *   Flow pattern to translate.
5898  */
5899 static void
5900 flow_dv_translate_item_meta_vport(void *matcher, void *key,
5901                                   uint32_t value, uint32_t mask)
5902 {
5903         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
5904 }
5905
5906 /**
5907  * Add tag item to matcher
5908  *
5909  * @param[in, out] matcher
5910  *   Flow matcher.
5911  * @param[in, out] key
5912  *   Flow matcher value.
5913  * @param[in] item
5914  *   Flow pattern to translate.
5915  */
5916 static void
5917 flow_dv_translate_mlx5_item_tag(void *matcher, void *key,
5918                                 const struct rte_flow_item *item)
5919 {
5920         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
5921         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
5922
5923         assert(tag_v);
5924         flow_dv_match_meta_reg(matcher, key, tag_v->id, tag_v->data,
5925                                tag_m ? tag_m->data : UINT32_MAX);
5926 }
5927
5928 /**
5929  * Add TAG item to matcher
5930  *
5931  * @param[in] dev
5932  *   The devich to configure through.
5933  * @param[in, out] matcher
5934  *   Flow matcher.
5935  * @param[in, out] key
5936  *   Flow matcher value.
5937  * @param[in] item
5938  *   Flow pattern to translate.
5939  */
5940 static void
5941 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
5942                            void *matcher, void *key,
5943                            const struct rte_flow_item *item)
5944 {
5945         const struct rte_flow_item_tag *tag_v = item->spec;
5946         const struct rte_flow_item_tag *tag_m = item->mask;
5947         enum modify_reg reg;
5948
5949         assert(tag_v);
5950         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
5951         /* Get the metadata register index for the tag. */
5952         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
5953         assert(reg > 0);
5954         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
5955 }
5956
5957 /**
5958  * Add source vport match to the specified matcher.
5959  *
5960  * @param[in, out] matcher
5961  *   Flow matcher.
5962  * @param[in, out] key
5963  *   Flow matcher value.
5964  * @param[in] port
5965  *   Source vport value to match
5966  * @param[in] mask
5967  *   Mask
5968  */
5969 static void
5970 flow_dv_translate_item_source_vport(void *matcher, void *key,
5971                                     int16_t port, uint16_t mask)
5972 {
5973         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5974         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5975
5976         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
5977         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
5978 }
5979
5980 /**
5981  * Translate port-id item to eswitch match on  port-id.
5982  *
5983  * @param[in] dev
5984  *   The devich to configure through.
5985  * @param[in, out] matcher
5986  *   Flow matcher.
5987  * @param[in, out] key
5988  *   Flow matcher value.
5989  * @param[in] item
5990  *   Flow pattern to translate.
5991  *
5992  * @return
5993  *   0 on success, a negative errno value otherwise.
5994  */
5995 static int
5996 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
5997                                void *key, const struct rte_flow_item *item)
5998 {
5999         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6000         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6001         struct mlx5_priv *priv;
6002         uint16_t mask, id;
6003
6004         mask = pid_m ? pid_m->id : 0xffff;
6005         id = pid_v ? pid_v->id : dev->data->port_id;
6006         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6007         if (!priv)
6008                 return -rte_errno;
6009         /* Translate to vport field or to metadata, depending on mode. */
6010         if (priv->vport_meta_mask)
6011                 flow_dv_translate_item_meta_vport(matcher, key,
6012                                                   priv->vport_meta_tag,
6013                                                   priv->vport_meta_mask);
6014         else
6015                 flow_dv_translate_item_source_vport(matcher, key,
6016                                                     priv->vport_id, mask);
6017         return 0;
6018 }
6019
6020 /**
6021  * Add ICMP6 item to matcher and to the value.
6022  *
6023  * @param[in, out] matcher
6024  *   Flow matcher.
6025  * @param[in, out] key
6026  *   Flow matcher value.
6027  * @param[in] item
6028  *   Flow pattern to translate.
6029  * @param[in] inner
6030  *   Item is inner pattern.
6031  */
6032 static void
6033 flow_dv_translate_item_icmp6(void *matcher, void *key,
6034                               const struct rte_flow_item *item,
6035                               int inner)
6036 {
6037         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6038         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6039         void *headers_m;
6040         void *headers_v;
6041         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6042                                      misc_parameters_3);
6043         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6044         if (inner) {
6045                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6046                                          inner_headers);
6047                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6048         } else {
6049                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6050                                          outer_headers);
6051                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6052         }
6053         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6054         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6055         if (!icmp6_v)
6056                 return;
6057         if (!icmp6_m)
6058                 icmp6_m = &rte_flow_item_icmp6_mask;
6059         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6060         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6061                  icmp6_v->type & icmp6_m->type);
6062         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6063         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6064                  icmp6_v->code & icmp6_m->code);
6065 }
6066
6067 /**
6068  * Add ICMP item to matcher and to the value.
6069  *
6070  * @param[in, out] matcher
6071  *   Flow matcher.
6072  * @param[in, out] key
6073  *   Flow matcher value.
6074  * @param[in] item
6075  *   Flow pattern to translate.
6076  * @param[in] inner
6077  *   Item is inner pattern.
6078  */
6079 static void
6080 flow_dv_translate_item_icmp(void *matcher, void *key,
6081                             const struct rte_flow_item *item,
6082                             int inner)
6083 {
6084         const struct rte_flow_item_icmp *icmp_m = item->mask;
6085         const struct rte_flow_item_icmp *icmp_v = item->spec;
6086         void *headers_m;
6087         void *headers_v;
6088         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6089                                      misc_parameters_3);
6090         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6091         if (inner) {
6092                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6093                                          inner_headers);
6094                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6095         } else {
6096                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6097                                          outer_headers);
6098                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6099         }
6100         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6101         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6102         if (!icmp_v)
6103                 return;
6104         if (!icmp_m)
6105                 icmp_m = &rte_flow_item_icmp_mask;
6106         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6107                  icmp_m->hdr.icmp_type);
6108         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6109                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6110         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6111                  icmp_m->hdr.icmp_code);
6112         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6113                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6114 }
6115
6116 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6117
6118 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6119         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6120                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6121
6122 /**
6123  * Calculate flow matcher enable bitmap.
6124  *
6125  * @param match_criteria
6126  *   Pointer to flow matcher criteria.
6127  *
6128  * @return
6129  *   Bitmap of enabled fields.
6130  */
6131 static uint8_t
6132 flow_dv_matcher_enable(uint32_t *match_criteria)
6133 {
6134         uint8_t match_criteria_enable;
6135
6136         match_criteria_enable =
6137                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6138                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6139         match_criteria_enable |=
6140                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6141                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6142         match_criteria_enable |=
6143                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6144                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6145         match_criteria_enable |=
6146                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6147                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6148         match_criteria_enable |=
6149                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6150                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6151         return match_criteria_enable;
6152 }
6153
6154
6155 /**
6156  * Get a flow table.
6157  *
6158  * @param[in, out] dev
6159  *   Pointer to rte_eth_dev structure.
6160  * @param[in] table_id
6161  *   Table id to use.
6162  * @param[in] egress
6163  *   Direction of the table.
6164  * @param[in] transfer
6165  *   E-Switch or NIC flow.
6166  * @param[out] error
6167  *   pointer to error structure.
6168  *
6169  * @return
6170  *   Returns tables resource based on the index, NULL in case of failed.
6171  */
6172 static struct mlx5_flow_tbl_resource *
6173 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6174                          uint32_t table_id, uint8_t egress,
6175                          uint8_t transfer,
6176                          struct rte_flow_error *error)
6177 {
6178         struct mlx5_priv *priv = dev->data->dev_private;
6179         struct mlx5_ibv_shared *sh = priv->sh;
6180         struct mlx5_flow_tbl_resource *tbl;
6181         union mlx5_flow_tbl_key table_key = {
6182                 {
6183                         .table_id = table_id,
6184                         .reserved = 0,
6185                         .domain = !!transfer,
6186                         .direction = !!egress,
6187                 }
6188         };
6189         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6190                                                          table_key.v64);
6191         struct mlx5_flow_tbl_data_entry *tbl_data;
6192         int ret;
6193         void *domain;
6194
6195         if (pos) {
6196                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6197                                         entry);
6198                 tbl = &tbl_data->tbl;
6199                 rte_atomic32_inc(&tbl->refcnt);
6200                 return tbl;
6201         }
6202         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6203         if (!tbl_data) {
6204                 rte_flow_error_set(error, ENOMEM,
6205                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6206                                    NULL,
6207                                    "cannot allocate flow table data entry");
6208                 return NULL;
6209         }
6210         tbl = &tbl_data->tbl;
6211         pos = &tbl_data->entry;
6212         if (transfer)
6213                 domain = sh->fdb_domain;
6214         else if (egress)
6215                 domain = sh->tx_domain;
6216         else
6217                 domain = sh->rx_domain;
6218         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6219         if (!tbl->obj) {
6220                 rte_flow_error_set(error, ENOMEM,
6221                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6222                                    NULL, "cannot create flow table object");
6223                 rte_free(tbl_data);
6224                 return NULL;
6225         }
6226         /*
6227          * No multi-threads now, but still better to initialize the reference
6228          * count before insert it into the hash list.
6229          */
6230         rte_atomic32_init(&tbl->refcnt);
6231         /* Jump action reference count is initialized here. */
6232         rte_atomic32_init(&tbl_data->jump.refcnt);
6233         pos->key = table_key.v64;
6234         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6235         if (ret < 0) {
6236                 rte_flow_error_set(error, -ret,
6237                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6238                                    "cannot insert flow table data entry");
6239                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6240                 rte_free(tbl_data);
6241         }
6242         rte_atomic32_inc(&tbl->refcnt);
6243         return tbl;
6244 }
6245
6246 /**
6247  * Release a flow table.
6248  *
6249  * @param[in] dev
6250  *   Pointer to rte_eth_dev structure.
6251  * @param[in] tbl
6252  *   Table resource to be released.
6253  *
6254  * @return
6255  *   Returns 0 if table was released, else return 1;
6256  */
6257 static int
6258 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6259                              struct mlx5_flow_tbl_resource *tbl)
6260 {
6261         struct mlx5_priv *priv = dev->data->dev_private;
6262         struct mlx5_ibv_shared *sh = priv->sh;
6263         struct mlx5_flow_tbl_data_entry *tbl_data =
6264                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6265
6266         if (!tbl)
6267                 return 0;
6268         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6269                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6270
6271                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6272                 tbl->obj = NULL;
6273                 /* remove the entry from the hash list and free memory. */
6274                 mlx5_hlist_remove(sh->flow_tbls, pos);
6275                 rte_free(tbl_data);
6276                 return 0;
6277         }
6278         return 1;
6279 }
6280
6281 /**
6282  * Register the flow matcher.
6283  *
6284  * @param[in, out] dev
6285  *   Pointer to rte_eth_dev structure.
6286  * @param[in, out] matcher
6287  *   Pointer to flow matcher.
6288  * @param[in, out] key
6289  *   Pointer to flow table key.
6290  * @parm[in, out] dev_flow
6291  *   Pointer to the dev_flow.
6292  * @param[out] error
6293  *   pointer to error structure.
6294  *
6295  * @return
6296  *   0 on success otherwise -errno and errno is set.
6297  */
6298 static int
6299 flow_dv_matcher_register(struct rte_eth_dev *dev,
6300                          struct mlx5_flow_dv_matcher *matcher,
6301                          union mlx5_flow_tbl_key *key,
6302                          struct mlx5_flow *dev_flow,
6303                          struct rte_flow_error *error)
6304 {
6305         struct mlx5_priv *priv = dev->data->dev_private;
6306         struct mlx5_ibv_shared *sh = priv->sh;
6307         struct mlx5_flow_dv_matcher *cache_matcher;
6308         struct mlx5dv_flow_matcher_attr dv_attr = {
6309                 .type = IBV_FLOW_ATTR_NORMAL,
6310                 .match_mask = (void *)&matcher->mask,
6311         };
6312         struct mlx5_flow_tbl_resource *tbl;
6313         struct mlx5_flow_tbl_data_entry *tbl_data;
6314
6315         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6316                                        key->domain, error);
6317         if (!tbl)
6318                 return -rte_errno;      /* No need to refill the error info */
6319         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6320         /* Lookup from cache. */
6321         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6322                 if (matcher->crc == cache_matcher->crc &&
6323                     matcher->priority == cache_matcher->priority &&
6324                     !memcmp((const void *)matcher->mask.buf,
6325                             (const void *)cache_matcher->mask.buf,
6326                             cache_matcher->mask.size)) {
6327                         DRV_LOG(DEBUG,
6328                                 "%s group %u priority %hd use %s "
6329                                 "matcher %p: refcnt %d++",
6330                                 key->domain ? "FDB" : "NIC", key->table_id,
6331                                 cache_matcher->priority,
6332                                 key->direction ? "tx" : "rx",
6333                                 (void *)cache_matcher,
6334                                 rte_atomic32_read(&cache_matcher->refcnt));
6335                         rte_atomic32_inc(&cache_matcher->refcnt);
6336                         dev_flow->dv.matcher = cache_matcher;
6337                         /* old matcher should not make the table ref++. */
6338                         flow_dv_tbl_resource_release(dev, tbl);
6339                         return 0;
6340                 }
6341         }
6342         /* Register new matcher. */
6343         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6344         if (!cache_matcher) {
6345                 flow_dv_tbl_resource_release(dev, tbl);
6346                 return rte_flow_error_set(error, ENOMEM,
6347                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6348                                           "cannot allocate matcher memory");
6349         }
6350         *cache_matcher = *matcher;
6351         dv_attr.match_criteria_enable =
6352                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6353         dv_attr.priority = matcher->priority;
6354         if (key->direction)
6355                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6356         cache_matcher->matcher_object =
6357                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6358         if (!cache_matcher->matcher_object) {
6359                 rte_free(cache_matcher);
6360 #ifdef HAVE_MLX5DV_DR
6361                 flow_dv_tbl_resource_release(dev, tbl);
6362 #endif
6363                 return rte_flow_error_set(error, ENOMEM,
6364                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6365                                           NULL, "cannot create matcher");
6366         }
6367         /* Save the table information */
6368         cache_matcher->tbl = tbl;
6369         rte_atomic32_init(&cache_matcher->refcnt);
6370         /* only matcher ref++, table ref++ already done above in get API. */
6371         rte_atomic32_inc(&cache_matcher->refcnt);
6372         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6373         dev_flow->dv.matcher = cache_matcher;
6374         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6375                 key->domain ? "FDB" : "NIC", key->table_id,
6376                 cache_matcher->priority,
6377                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6378                 rte_atomic32_read(&cache_matcher->refcnt));
6379         return 0;
6380 }
6381
6382 /**
6383  * Find existing tag resource or create and register a new one.
6384  *
6385  * @param dev[in, out]
6386  *   Pointer to rte_eth_dev structure.
6387  * @param[in, out] tag_be24
6388  *   Tag value in big endian then R-shift 8.
6389  * @parm[in, out] dev_flow
6390  *   Pointer to the dev_flow.
6391  * @param[out] error
6392  *   pointer to error structure.
6393  *
6394  * @return
6395  *   0 on success otherwise -errno and errno is set.
6396  */
6397 static int
6398 flow_dv_tag_resource_register
6399                         (struct rte_eth_dev *dev,
6400                          uint32_t tag_be24,
6401                          struct mlx5_flow *dev_flow,
6402                          struct rte_flow_error *error)
6403 {
6404         struct mlx5_priv *priv = dev->data->dev_private;
6405         struct mlx5_ibv_shared *sh = priv->sh;
6406         struct mlx5_flow_dv_tag_resource *cache_resource;
6407         struct mlx5_hlist_entry *entry;
6408
6409         /* Lookup a matching resource from cache. */
6410         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6411         if (entry) {
6412                 cache_resource = container_of
6413                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6414                 rte_atomic32_inc(&cache_resource->refcnt);
6415                 dev_flow->dv.tag_resource = cache_resource;
6416                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6417                         (void *)cache_resource,
6418                         rte_atomic32_read(&cache_resource->refcnt));
6419                 return 0;
6420         }
6421         /* Register new resource. */
6422         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6423         if (!cache_resource)
6424                 return rte_flow_error_set(error, ENOMEM,
6425                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6426                                           "cannot allocate resource memory");
6427         cache_resource->entry.key = (uint64_t)tag_be24;
6428         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6429         if (!cache_resource->action) {
6430                 rte_free(cache_resource);
6431                 return rte_flow_error_set(error, ENOMEM,
6432                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6433                                           NULL, "cannot create action");
6434         }
6435         rte_atomic32_init(&cache_resource->refcnt);
6436         rte_atomic32_inc(&cache_resource->refcnt);
6437         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6438                 mlx5_glue->destroy_flow_action(cache_resource->action);
6439                 rte_free(cache_resource);
6440                 return rte_flow_error_set(error, EEXIST,
6441                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6442                                           NULL, "cannot insert tag");
6443         }
6444         dev_flow->dv.tag_resource = cache_resource;
6445         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6446                 (void *)cache_resource,
6447                 rte_atomic32_read(&cache_resource->refcnt));
6448         return 0;
6449 }
6450
6451 /**
6452  * Release the tag.
6453  *
6454  * @param dev
6455  *   Pointer to Ethernet device.
6456  * @param flow
6457  *   Pointer to mlx5_flow.
6458  *
6459  * @return
6460  *   1 while a reference on it exists, 0 when freed.
6461  */
6462 static int
6463 flow_dv_tag_release(struct rte_eth_dev *dev,
6464                     struct mlx5_flow_dv_tag_resource *tag)
6465 {
6466         struct mlx5_priv *priv = dev->data->dev_private;
6467         struct mlx5_ibv_shared *sh = priv->sh;
6468
6469         assert(tag);
6470         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6471                 dev->data->port_id, (void *)tag,
6472                 rte_atomic32_read(&tag->refcnt));
6473         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6474                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6475                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6476                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6477                         dev->data->port_id, (void *)tag);
6478                 rte_free(tag);
6479                 return 0;
6480         }
6481         return 1;
6482 }
6483
6484 /**
6485  * Translate port ID action to vport.
6486  *
6487  * @param[in] dev
6488  *   Pointer to rte_eth_dev structure.
6489  * @param[in] action
6490  *   Pointer to the port ID action.
6491  * @param[out] dst_port_id
6492  *   The target port ID.
6493  * @param[out] error
6494  *   Pointer to the error structure.
6495  *
6496  * @return
6497  *   0 on success, a negative errno value otherwise and rte_errno is set.
6498  */
6499 static int
6500 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6501                                  const struct rte_flow_action *action,
6502                                  uint32_t *dst_port_id,
6503                                  struct rte_flow_error *error)
6504 {
6505         uint32_t port;
6506         struct mlx5_priv *priv;
6507         const struct rte_flow_action_port_id *conf =
6508                         (const struct rte_flow_action_port_id *)action->conf;
6509
6510         port = conf->original ? dev->data->port_id : conf->id;
6511         priv = mlx5_port_to_eswitch_info(port, false);
6512         if (!priv)
6513                 return rte_flow_error_set(error, -rte_errno,
6514                                           RTE_FLOW_ERROR_TYPE_ACTION,
6515                                           NULL,
6516                                           "No eswitch info was found for port");
6517 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6518         /*
6519          * This parameter is transferred to
6520          * mlx5dv_dr_action_create_dest_ib_port().
6521          */
6522         *dst_port_id = priv->ibv_port;
6523 #else
6524         /*
6525          * Legacy mode, no LAG configurations is supported.
6526          * This parameter is transferred to
6527          * mlx5dv_dr_action_create_dest_vport().
6528          */
6529         *dst_port_id = priv->vport_id;
6530 #endif
6531         return 0;
6532 }
6533
6534 /**
6535  * Add Tx queue matcher
6536  *
6537  * @param[in] dev
6538  *   Pointer to the dev struct.
6539  * @param[in, out] matcher
6540  *   Flow matcher.
6541  * @param[in, out] key
6542  *   Flow matcher value.
6543  * @param[in] item
6544  *   Flow pattern to translate.
6545  * @param[in] inner
6546  *   Item is inner pattern.
6547  */
6548 static void
6549 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6550                                 void *matcher, void *key,
6551                                 const struct rte_flow_item *item)
6552 {
6553         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6554         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6555         void *misc_m =
6556                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6557         void *misc_v =
6558                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6559         struct mlx5_txq_ctrl *txq;
6560         uint32_t queue;
6561
6562
6563         queue_m = (const void *)item->mask;
6564         if (!queue_m)
6565                 return;
6566         queue_v = (const void *)item->spec;
6567         if (!queue_v)
6568                 return;
6569         txq = mlx5_txq_get(dev, queue_v->queue);
6570         if (!txq)
6571                 return;
6572         queue = txq->obj->sq->id;
6573         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6574         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6575                  queue & queue_m->queue);
6576         mlx5_txq_release(dev, queue_v->queue);
6577 }
6578
6579 /**
6580  * Set the hash fields according to the @p flow information.
6581  *
6582  * @param[in] dev_flow
6583  *   Pointer to the mlx5_flow.
6584  */
6585 static void
6586 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6587 {
6588         struct rte_flow *flow = dev_flow->flow;
6589         uint64_t items = dev_flow->layers;
6590         int rss_inner = 0;
6591         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6592
6593         dev_flow->hash_fields = 0;
6594 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6595         if (flow->rss.level >= 2) {
6596                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6597                 rss_inner = 1;
6598         }
6599 #endif
6600         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6601             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6602                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6603                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6604                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6605                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6606                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6607                         else
6608                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6609                 }
6610         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6611                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6612                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6613                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6614                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
6615                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6616                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
6617                         else
6618                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
6619                 }
6620         }
6621         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
6622             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
6623                 if (rss_types & ETH_RSS_UDP) {
6624                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6625                                 dev_flow->hash_fields |=
6626                                                 IBV_RX_HASH_SRC_PORT_UDP;
6627                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6628                                 dev_flow->hash_fields |=
6629                                                 IBV_RX_HASH_DST_PORT_UDP;
6630                         else
6631                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
6632                 }
6633         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
6634                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
6635                 if (rss_types & ETH_RSS_TCP) {
6636                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6637                                 dev_flow->hash_fields |=
6638                                                 IBV_RX_HASH_SRC_PORT_TCP;
6639                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6640                                 dev_flow->hash_fields |=
6641                                                 IBV_RX_HASH_DST_PORT_TCP;
6642                         else
6643                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
6644                 }
6645         }
6646 }
6647
6648 /**
6649  * Fill the flow with DV spec, lock free
6650  * (mutex should be acquired by caller).
6651  *
6652  * @param[in] dev
6653  *   Pointer to rte_eth_dev structure.
6654  * @param[in, out] dev_flow
6655  *   Pointer to the sub flow.
6656  * @param[in] attr
6657  *   Pointer to the flow attributes.
6658  * @param[in] items
6659  *   Pointer to the list of items.
6660  * @param[in] actions
6661  *   Pointer to the list of actions.
6662  * @param[out] error
6663  *   Pointer to the error structure.
6664  *
6665  * @return
6666  *   0 on success, a negative errno value otherwise and rte_errno is set.
6667  */
6668 static int
6669 __flow_dv_translate(struct rte_eth_dev *dev,
6670                     struct mlx5_flow *dev_flow,
6671                     const struct rte_flow_attr *attr,
6672                     const struct rte_flow_item items[],
6673                     const struct rte_flow_action actions[],
6674                     struct rte_flow_error *error)
6675 {
6676         struct mlx5_priv *priv = dev->data->dev_private;
6677         struct mlx5_dev_config *dev_conf = &priv->config;
6678         struct rte_flow *flow = dev_flow->flow;
6679         uint64_t item_flags = 0;
6680         uint64_t last_item = 0;
6681         uint64_t action_flags = 0;
6682         uint64_t priority = attr->priority;
6683         struct mlx5_flow_dv_matcher matcher = {
6684                 .mask = {
6685                         .size = sizeof(matcher.mask.buf),
6686                 },
6687         };
6688         int actions_n = 0;
6689         bool actions_end = false;
6690         struct mlx5_flow_dv_modify_hdr_resource mhdr_res = {
6691                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
6692                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
6693         };
6694         union flow_dv_attr flow_attr = { .attr = 0 };
6695         uint32_t tag_be;
6696         union mlx5_flow_tbl_key tbl_key;
6697         uint32_t modify_action_position = UINT32_MAX;
6698         void *match_mask = matcher.mask.buf;
6699         void *match_value = dev_flow->dv.value.buf;
6700         uint8_t next_protocol = 0xff;
6701         struct rte_vlan_hdr vlan = { 0 };
6702         uint32_t table;
6703         int ret = 0;
6704
6705         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
6706                                        &table, error);
6707         if (ret)
6708                 return ret;
6709         dev_flow->group = table;
6710         if (attr->transfer)
6711                 mhdr_res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
6712         if (priority == MLX5_FLOW_PRIO_RSVD)
6713                 priority = dev_conf->flow_prio - 1;
6714         for (; !actions_end ; actions++) {
6715                 const struct rte_flow_action_queue *queue;
6716                 const struct rte_flow_action_rss *rss;
6717                 const struct rte_flow_action *action = actions;
6718                 const struct rte_flow_action_count *count = action->conf;
6719                 const uint8_t *rss_key;
6720                 const struct rte_flow_action_jump *jump_data;
6721                 const struct rte_flow_action_meter *mtr;
6722                 struct mlx5_flow_tbl_resource *tbl;
6723                 uint32_t port_id = 0;
6724                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
6725                 int action_type = actions->type;
6726                 const struct rte_flow_action *found_action = NULL;
6727
6728                 switch (action_type) {
6729                 case RTE_FLOW_ACTION_TYPE_VOID:
6730                         break;
6731                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
6732                         if (flow_dv_translate_action_port_id(dev, action,
6733                                                              &port_id, error))
6734                                 return -rte_errno;
6735                         port_id_resource.port_id = port_id;
6736                         if (flow_dv_port_id_action_resource_register
6737                             (dev, &port_id_resource, dev_flow, error))
6738                                 return -rte_errno;
6739                         dev_flow->dv.actions[actions_n++] =
6740                                 dev_flow->dv.port_id_action->action;
6741                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
6742                         break;
6743                 case RTE_FLOW_ACTION_TYPE_FLAG:
6744                         action_flags |= MLX5_FLOW_ACTION_FLAG;
6745                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6746                                 struct rte_flow_action_mark mark = {
6747                                         .id = MLX5_FLOW_MARK_DEFAULT,
6748                                 };
6749
6750                                 if (flow_dv_convert_action_mark(dev, &mark,
6751                                                                 &mhdr_res,
6752                                                                 error))
6753                                         return -rte_errno;
6754                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6755                                 break;
6756                         }
6757                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
6758                         if (!dev_flow->dv.tag_resource)
6759                                 if (flow_dv_tag_resource_register
6760                                     (dev, tag_be, dev_flow, error))
6761                                         return -rte_errno;
6762                         dev_flow->dv.actions[actions_n++] =
6763                                 dev_flow->dv.tag_resource->action;
6764                         break;
6765                 case RTE_FLOW_ACTION_TYPE_MARK:
6766                         action_flags |= MLX5_FLOW_ACTION_MARK;
6767                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6768                                 const struct rte_flow_action_mark *mark =
6769                                         (const struct rte_flow_action_mark *)
6770                                                 actions->conf;
6771
6772                                 if (flow_dv_convert_action_mark(dev, mark,
6773                                                                 &mhdr_res,
6774                                                                 error))
6775                                         return -rte_errno;
6776                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6777                                 break;
6778                         }
6779                         /* Fall-through */
6780                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
6781                         /* Legacy (non-extensive) MARK action. */
6782                         tag_be = mlx5_flow_mark_set
6783                               (((const struct rte_flow_action_mark *)
6784                                (actions->conf))->id);
6785                         if (!dev_flow->dv.tag_resource)
6786                                 if (flow_dv_tag_resource_register
6787                                     (dev, tag_be, dev_flow, error))
6788                                         return -rte_errno;
6789                         dev_flow->dv.actions[actions_n++] =
6790                                 dev_flow->dv.tag_resource->action;
6791                         break;
6792                 case RTE_FLOW_ACTION_TYPE_SET_META:
6793                         if (flow_dv_convert_action_set_meta
6794                                 (dev, &mhdr_res, attr,
6795                                  (const struct rte_flow_action_set_meta *)
6796                                   actions->conf, error))
6797                                 return -rte_errno;
6798                         action_flags |= MLX5_FLOW_ACTION_SET_META;
6799                         break;
6800                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
6801                         if (flow_dv_convert_action_set_tag
6802                                 (dev, &mhdr_res,
6803                                  (const struct rte_flow_action_set_tag *)
6804                                   actions->conf, error))
6805                                 return -rte_errno;
6806                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6807                         break;
6808                 case RTE_FLOW_ACTION_TYPE_DROP:
6809                         action_flags |= MLX5_FLOW_ACTION_DROP;
6810                         break;
6811                 case RTE_FLOW_ACTION_TYPE_QUEUE:
6812                         assert(flow->rss.queue);
6813                         queue = actions->conf;
6814                         flow->rss.queue_num = 1;
6815                         (*flow->rss.queue)[0] = queue->index;
6816                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
6817                         break;
6818                 case RTE_FLOW_ACTION_TYPE_RSS:
6819                         assert(flow->rss.queue);
6820                         rss = actions->conf;
6821                         if (flow->rss.queue)
6822                                 memcpy((*flow->rss.queue), rss->queue,
6823                                        rss->queue_num * sizeof(uint16_t));
6824                         flow->rss.queue_num = rss->queue_num;
6825                         /* NULL RSS key indicates default RSS key. */
6826                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
6827                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
6828                         /*
6829                          * rss->level and rss.types should be set in advance
6830                          * when expanding items for RSS.
6831                          */
6832                         action_flags |= MLX5_FLOW_ACTION_RSS;
6833                         break;
6834                 case RTE_FLOW_ACTION_TYPE_COUNT:
6835                         if (!dev_conf->devx) {
6836                                 rte_errno = ENOTSUP;
6837                                 goto cnt_err;
6838                         }
6839                         flow->counter = flow_dv_counter_alloc(dev,
6840                                                               count->shared,
6841                                                               count->id,
6842                                                               dev_flow->group);
6843                         if (flow->counter == NULL)
6844                                 goto cnt_err;
6845                         dev_flow->dv.actions[actions_n++] =
6846                                 flow->counter->action;
6847                         action_flags |= MLX5_FLOW_ACTION_COUNT;
6848                         break;
6849 cnt_err:
6850                         if (rte_errno == ENOTSUP)
6851                                 return rte_flow_error_set
6852                                               (error, ENOTSUP,
6853                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6854                                                NULL,
6855                                                "count action not supported");
6856                         else
6857                                 return rte_flow_error_set
6858                                                 (error, rte_errno,
6859                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6860                                                  action,
6861                                                  "cannot create counter"
6862                                                   " object.");
6863                         break;
6864                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
6865                         dev_flow->dv.actions[actions_n++] =
6866                                                 priv->sh->pop_vlan_action;
6867                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
6868                         break;
6869                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
6870                         flow_dev_get_vlan_info_from_items(items, &vlan);
6871                         vlan.eth_proto = rte_be_to_cpu_16
6872                              ((((const struct rte_flow_action_of_push_vlan *)
6873                                                    actions->conf)->ethertype));
6874                         found_action = mlx5_flow_find_action
6875                                         (actions + 1,
6876                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
6877                         if (found_action)
6878                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6879                         found_action = mlx5_flow_find_action
6880                                         (actions + 1,
6881                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
6882                         if (found_action)
6883                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6884                         if (flow_dv_create_action_push_vlan
6885                                             (dev, attr, &vlan, dev_flow, error))
6886                                 return -rte_errno;
6887                         dev_flow->dv.actions[actions_n++] =
6888                                            dev_flow->dv.push_vlan_res->action;
6889                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
6890                         break;
6891                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
6892                         /* of_vlan_push action handled this action */
6893                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
6894                         break;
6895                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
6896                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
6897                                 break;
6898                         flow_dev_get_vlan_info_from_items(items, &vlan);
6899                         mlx5_update_vlan_vid_pcp(actions, &vlan);
6900                         /* If no VLAN push - this is a modify header action */
6901                         if (flow_dv_convert_action_modify_vlan_vid
6902                                                 (&mhdr_res, actions, error))
6903                                 return -rte_errno;
6904                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
6905                         break;
6906                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
6907                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
6908                         if (flow_dv_create_action_l2_encap(dev, actions,
6909                                                            dev_flow,
6910                                                            attr->transfer,
6911                                                            error))
6912                                 return -rte_errno;
6913                         dev_flow->dv.actions[actions_n++] =
6914                                 dev_flow->dv.encap_decap->verbs_action;
6915                         action_flags |= actions->type ==
6916                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
6917                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
6918                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
6919                         break;
6920                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
6921                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
6922                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
6923                                                            attr->transfer,
6924                                                            error))
6925                                 return -rte_errno;
6926                         dev_flow->dv.actions[actions_n++] =
6927                                 dev_flow->dv.encap_decap->verbs_action;
6928                         action_flags |= actions->type ==
6929                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
6930                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
6931                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
6932                         break;
6933                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
6934                         /* Handle encap with preceding decap. */
6935                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
6936                                 if (flow_dv_create_action_raw_encap
6937                                         (dev, actions, dev_flow, attr, error))
6938                                         return -rte_errno;
6939                                 dev_flow->dv.actions[actions_n++] =
6940                                         dev_flow->dv.encap_decap->verbs_action;
6941                         } else {
6942                                 /* Handle encap without preceding decap. */
6943                                 if (flow_dv_create_action_l2_encap
6944                                     (dev, actions, dev_flow, attr->transfer,
6945                                      error))
6946                                         return -rte_errno;
6947                                 dev_flow->dv.actions[actions_n++] =
6948                                         dev_flow->dv.encap_decap->verbs_action;
6949                         }
6950                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
6951                         break;
6952                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
6953                         /* Check if this decap is followed by encap. */
6954                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
6955                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
6956                                action++) {
6957                         }
6958                         /* Handle decap only if it isn't followed by encap. */
6959                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
6960                                 if (flow_dv_create_action_l2_decap
6961                                     (dev, dev_flow, attr->transfer, error))
6962                                         return -rte_errno;
6963                                 dev_flow->dv.actions[actions_n++] =
6964                                         dev_flow->dv.encap_decap->verbs_action;
6965                         }
6966                         /* If decap is followed by encap, handle it at encap. */
6967                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
6968                         break;
6969                 case RTE_FLOW_ACTION_TYPE_JUMP:
6970                         jump_data = action->conf;
6971                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
6972                                                        jump_data->group, &table,
6973                                                        error);
6974                         if (ret)
6975                                 return ret;
6976                         tbl = flow_dv_tbl_resource_get(dev, table,
6977                                                        attr->egress,
6978                                                        attr->transfer, error);
6979                         if (!tbl)
6980                                 return rte_flow_error_set
6981                                                 (error, errno,
6982                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6983                                                  NULL,
6984                                                  "cannot create jump action.");
6985                         if (flow_dv_jump_tbl_resource_register
6986                             (dev, tbl, dev_flow, error)) {
6987                                 flow_dv_tbl_resource_release(dev, tbl);
6988                                 return rte_flow_error_set
6989                                                 (error, errno,
6990                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6991                                                  NULL,
6992                                                  "cannot create jump action.");
6993                         }
6994                         dev_flow->dv.actions[actions_n++] =
6995                                 dev_flow->dv.jump->action;
6996                         action_flags |= MLX5_FLOW_ACTION_JUMP;
6997                         break;
6998                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
6999                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7000                         if (flow_dv_convert_action_modify_mac
7001                                         (&mhdr_res, actions, error))
7002                                 return -rte_errno;
7003                         action_flags |= actions->type ==
7004                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7005                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7006                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7007                         break;
7008                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7009                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7010                         if (flow_dv_convert_action_modify_ipv4
7011                                         (&mhdr_res, actions, error))
7012                                 return -rte_errno;
7013                         action_flags |= actions->type ==
7014                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7015                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7016                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7017                         break;
7018                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7019                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7020                         if (flow_dv_convert_action_modify_ipv6
7021                                         (&mhdr_res, actions, error))
7022                                 return -rte_errno;
7023                         action_flags |= actions->type ==
7024                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7025                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7026                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7027                         break;
7028                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7029                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7030                         if (flow_dv_convert_action_modify_tp
7031                                         (&mhdr_res, actions, items,
7032                                          &flow_attr, error))
7033                                 return -rte_errno;
7034                         action_flags |= actions->type ==
7035                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7036                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7037                                         MLX5_FLOW_ACTION_SET_TP_DST;
7038                         break;
7039                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7040                         if (flow_dv_convert_action_modify_dec_ttl
7041                                         (&mhdr_res, items, &flow_attr, error))
7042                                 return -rte_errno;
7043                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7044                         break;
7045                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7046                         if (flow_dv_convert_action_modify_ttl
7047                                         (&mhdr_res, actions, items,
7048                                          &flow_attr, error))
7049                                 return -rte_errno;
7050                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7051                         break;
7052                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7053                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7054                         if (flow_dv_convert_action_modify_tcp_seq
7055                                         (&mhdr_res, actions, error))
7056                                 return -rte_errno;
7057                         action_flags |= actions->type ==
7058                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7059                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7060                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7061                         break;
7062
7063                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7064                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7065                         if (flow_dv_convert_action_modify_tcp_ack
7066                                         (&mhdr_res, actions, error))
7067                                 return -rte_errno;
7068                         action_flags |= actions->type ==
7069                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7070                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7071                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7072                         break;
7073                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7074                         if (flow_dv_convert_action_set_reg
7075                                         (&mhdr_res, actions, error))
7076                                 return -rte_errno;
7077                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7078                         break;
7079                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7080                         if (flow_dv_convert_action_copy_mreg
7081                                         (dev, &mhdr_res, actions, error))
7082                                 return -rte_errno;
7083                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7084                         break;
7085                 case RTE_FLOW_ACTION_TYPE_METER:
7086                         mtr = actions->conf;
7087                         if (!flow->meter) {
7088                                 flow->meter = mlx5_flow_meter_attach(priv,
7089                                                         mtr->mtr_id, attr,
7090                                                         error);
7091                                 if (!flow->meter)
7092                                         return rte_flow_error_set(error,
7093                                                 rte_errno,
7094                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7095                                                 NULL,
7096                                                 "meter not found "
7097                                                 "or invalid parameters");
7098                         }
7099                         /* Set the meter action. */
7100                         dev_flow->dv.actions[actions_n++] =
7101                                 flow->meter->mfts->meter_action;
7102                         action_flags |= MLX5_FLOW_ACTION_METER;
7103                         break;
7104                 case RTE_FLOW_ACTION_TYPE_END:
7105                         actions_end = true;
7106                         if (mhdr_res.actions_num) {
7107                                 /* create modify action if needed. */
7108                                 if (flow_dv_modify_hdr_resource_register
7109                                         (dev, &mhdr_res, dev_flow, error))
7110                                         return -rte_errno;
7111                                 dev_flow->dv.actions[modify_action_position] =
7112                                         dev_flow->dv.modify_hdr->verbs_action;
7113                         }
7114                         break;
7115                 default:
7116                         break;
7117                 }
7118                 if (mhdr_res.actions_num &&
7119                     modify_action_position == UINT32_MAX)
7120                         modify_action_position = actions_n++;
7121         }
7122         dev_flow->dv.actions_n = actions_n;
7123         dev_flow->actions = action_flags;
7124         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7125                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7126                 int item_type = items->type;
7127
7128                 switch (item_type) {
7129                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7130                         flow_dv_translate_item_port_id(dev, match_mask,
7131                                                        match_value, items);
7132                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7133                         break;
7134                 case RTE_FLOW_ITEM_TYPE_ETH:
7135                         flow_dv_translate_item_eth(match_mask, match_value,
7136                                                    items, tunnel);
7137                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7138                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7139                                              MLX5_FLOW_LAYER_OUTER_L2;
7140                         break;
7141                 case RTE_FLOW_ITEM_TYPE_VLAN:
7142                         flow_dv_translate_item_vlan(dev_flow,
7143                                                     match_mask, match_value,
7144                                                     items, tunnel);
7145                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7146                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7147                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7148                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7149                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7150                         break;
7151                 case RTE_FLOW_ITEM_TYPE_IPV4:
7152                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7153                                                   &item_flags, &tunnel);
7154                         flow_dv_translate_item_ipv4(match_mask, match_value,
7155                                                     items, tunnel,
7156                                                     dev_flow->group);
7157                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7158                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7159                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7160                         if (items->mask != NULL &&
7161                             ((const struct rte_flow_item_ipv4 *)
7162                              items->mask)->hdr.next_proto_id) {
7163                                 next_protocol =
7164                                         ((const struct rte_flow_item_ipv4 *)
7165                                          (items->spec))->hdr.next_proto_id;
7166                                 next_protocol &=
7167                                         ((const struct rte_flow_item_ipv4 *)
7168                                          (items->mask))->hdr.next_proto_id;
7169                         } else {
7170                                 /* Reset for inner layer. */
7171                                 next_protocol = 0xff;
7172                         }
7173                         break;
7174                 case RTE_FLOW_ITEM_TYPE_IPV6:
7175                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7176                                                   &item_flags, &tunnel);
7177                         flow_dv_translate_item_ipv6(match_mask, match_value,
7178                                                     items, tunnel,
7179                                                     dev_flow->group);
7180                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7181                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7182                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7183                         if (items->mask != NULL &&
7184                             ((const struct rte_flow_item_ipv6 *)
7185                              items->mask)->hdr.proto) {
7186                                 next_protocol =
7187                                         ((const struct rte_flow_item_ipv6 *)
7188                                          items->spec)->hdr.proto;
7189                                 next_protocol &=
7190                                         ((const struct rte_flow_item_ipv6 *)
7191                                          items->mask)->hdr.proto;
7192                         } else {
7193                                 /* Reset for inner layer. */
7194                                 next_protocol = 0xff;
7195                         }
7196                         break;
7197                 case RTE_FLOW_ITEM_TYPE_TCP:
7198                         flow_dv_translate_item_tcp(match_mask, match_value,
7199                                                    items, tunnel);
7200                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7201                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7202                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7203                         break;
7204                 case RTE_FLOW_ITEM_TYPE_UDP:
7205                         flow_dv_translate_item_udp(match_mask, match_value,
7206                                                    items, tunnel);
7207                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7208                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7209                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7210                         break;
7211                 case RTE_FLOW_ITEM_TYPE_GRE:
7212                         flow_dv_translate_item_gre(match_mask, match_value,
7213                                                    items, tunnel);
7214                         last_item = MLX5_FLOW_LAYER_GRE;
7215                         break;
7216                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7217                         flow_dv_translate_item_gre_key(match_mask,
7218                                                        match_value, items);
7219                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7220                         break;
7221                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7222                         flow_dv_translate_item_nvgre(match_mask, match_value,
7223                                                      items, tunnel);
7224                         last_item = MLX5_FLOW_LAYER_GRE;
7225                         break;
7226                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7227                         flow_dv_translate_item_vxlan(match_mask, match_value,
7228                                                      items, tunnel);
7229                         last_item = MLX5_FLOW_LAYER_VXLAN;
7230                         break;
7231                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7232                         flow_dv_translate_item_vxlan(match_mask, match_value,
7233                                                      items, tunnel);
7234                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7235                         break;
7236                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7237                         flow_dv_translate_item_geneve(match_mask, match_value,
7238                                                       items, tunnel);
7239                         last_item = MLX5_FLOW_LAYER_GENEVE;
7240                         break;
7241                 case RTE_FLOW_ITEM_TYPE_MPLS:
7242                         flow_dv_translate_item_mpls(match_mask, match_value,
7243                                                     items, last_item, tunnel);
7244                         last_item = MLX5_FLOW_LAYER_MPLS;
7245                         break;
7246                 case RTE_FLOW_ITEM_TYPE_MARK:
7247                         flow_dv_translate_item_mark(dev, match_mask,
7248                                                     match_value, items);
7249                         last_item = MLX5_FLOW_ITEM_MARK;
7250                         break;
7251                 case RTE_FLOW_ITEM_TYPE_META:
7252                         flow_dv_translate_item_meta(dev, match_mask,
7253                                                     match_value, attr, items);
7254                         last_item = MLX5_FLOW_ITEM_METADATA;
7255                         break;
7256                 case RTE_FLOW_ITEM_TYPE_ICMP:
7257                         flow_dv_translate_item_icmp(match_mask, match_value,
7258                                                     items, tunnel);
7259                         last_item = MLX5_FLOW_LAYER_ICMP;
7260                         break;
7261                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7262                         flow_dv_translate_item_icmp6(match_mask, match_value,
7263                                                       items, tunnel);
7264                         last_item = MLX5_FLOW_LAYER_ICMP6;
7265                         break;
7266                 case RTE_FLOW_ITEM_TYPE_TAG:
7267                         flow_dv_translate_item_tag(dev, match_mask,
7268                                                    match_value, items);
7269                         last_item = MLX5_FLOW_ITEM_TAG;
7270                         break;
7271                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7272                         flow_dv_translate_mlx5_item_tag(match_mask,
7273                                                         match_value, items);
7274                         last_item = MLX5_FLOW_ITEM_TAG;
7275                         break;
7276                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7277                         flow_dv_translate_item_tx_queue(dev, match_mask,
7278                                                         match_value,
7279                                                         items);
7280                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7281                         break;
7282                 default:
7283                         break;
7284                 }
7285                 item_flags |= last_item;
7286         }
7287         /*
7288          * In case of ingress traffic when E-Switch mode is enabled,
7289          * we have two cases where we need to set the source port manually.
7290          * The first one, is in case of Nic steering rule, and the second is
7291          * E-Switch rule where no port_id item was found. In both cases
7292          * the source port is set according the current port in use.
7293          */
7294         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7295             (priv->representor || priv->master)) {
7296                 if (flow_dv_translate_item_port_id(dev, match_mask,
7297                                                    match_value, NULL))
7298                         return -rte_errno;
7299         }
7300         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7301                                          dev_flow->dv.value.buf));
7302         dev_flow->layers = item_flags;
7303         if (action_flags & MLX5_FLOW_ACTION_RSS)
7304                 flow_dv_hashfields_set(dev_flow);
7305         /* Register matcher. */
7306         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7307                                     matcher.mask.size);
7308         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7309                                                      matcher.priority);
7310         /* reserved field no needs to be set to 0 here. */
7311         tbl_key.domain = attr->transfer;
7312         tbl_key.direction = attr->egress;
7313         tbl_key.table_id = dev_flow->group;
7314         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7315                 return -rte_errno;
7316         return 0;
7317 }
7318
7319 /**
7320  * Apply the flow to the NIC, lock free,
7321  * (mutex should be acquired by caller).
7322  *
7323  * @param[in] dev
7324  *   Pointer to the Ethernet device structure.
7325  * @param[in, out] flow
7326  *   Pointer to flow structure.
7327  * @param[out] error
7328  *   Pointer to error structure.
7329  *
7330  * @return
7331  *   0 on success, a negative errno value otherwise and rte_errno is set.
7332  */
7333 static int
7334 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7335                 struct rte_flow_error *error)
7336 {
7337         struct mlx5_flow_dv *dv;
7338         struct mlx5_flow *dev_flow;
7339         struct mlx5_priv *priv = dev->data->dev_private;
7340         int n;
7341         int err;
7342
7343         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7344                 dv = &dev_flow->dv;
7345                 n = dv->actions_n;
7346                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7347                         if (dev_flow->transfer) {
7348                                 dv->actions[n++] = priv->sh->esw_drop_action;
7349                         } else {
7350                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7351                                 if (!dv->hrxq) {
7352                                         rte_flow_error_set
7353                                                 (error, errno,
7354                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7355                                                  NULL,
7356                                                  "cannot get drop hash queue");
7357                                         goto error;
7358                                 }
7359                                 dv->actions[n++] = dv->hrxq->action;
7360                         }
7361                 } else if (dev_flow->actions &
7362                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7363                         struct mlx5_hrxq *hrxq;
7364
7365                         assert(flow->rss.queue);
7366                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7367                                              MLX5_RSS_HASH_KEY_LEN,
7368                                              dev_flow->hash_fields,
7369                                              (*flow->rss.queue),
7370                                              flow->rss.queue_num);
7371                         if (!hrxq) {
7372                                 hrxq = mlx5_hrxq_new
7373                                         (dev, flow->rss.key,
7374                                          MLX5_RSS_HASH_KEY_LEN,
7375                                          dev_flow->hash_fields,
7376                                          (*flow->rss.queue),
7377                                          flow->rss.queue_num,
7378                                          !!(dev_flow->layers &
7379                                             MLX5_FLOW_LAYER_TUNNEL));
7380                         }
7381                         if (!hrxq) {
7382                                 rte_flow_error_set
7383                                         (error, rte_errno,
7384                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7385                                          "cannot get hash queue");
7386                                 goto error;
7387                         }
7388                         dv->hrxq = hrxq;
7389                         dv->actions[n++] = dv->hrxq->action;
7390                 }
7391                 dv->flow =
7392                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7393                                                   (void *)&dv->value, n,
7394                                                   dv->actions);
7395                 if (!dv->flow) {
7396                         rte_flow_error_set(error, errno,
7397                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7398                                            NULL,
7399                                            "hardware refuses to create flow");
7400                         goto error;
7401                 }
7402                 if (priv->vmwa_context &&
7403                     dev_flow->dv.vf_vlan.tag &&
7404                     !dev_flow->dv.vf_vlan.created) {
7405                         /*
7406                          * The rule contains the VLAN pattern.
7407                          * For VF we are going to create VLAN
7408                          * interface to make hypervisor set correct
7409                          * e-Switch vport context.
7410                          */
7411                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7412                 }
7413         }
7414         return 0;
7415 error:
7416         err = rte_errno; /* Save rte_errno before cleanup. */
7417         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7418                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7419                 if (dv->hrxq) {
7420                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7421                                 mlx5_hrxq_drop_release(dev);
7422                         else
7423                                 mlx5_hrxq_release(dev, dv->hrxq);
7424                         dv->hrxq = NULL;
7425                 }
7426                 if (dev_flow->dv.vf_vlan.tag &&
7427                     dev_flow->dv.vf_vlan.created)
7428                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7429         }
7430         rte_errno = err; /* Restore rte_errno. */
7431         return -rte_errno;
7432 }
7433
7434 /**
7435  * Release the flow matcher.
7436  *
7437  * @param dev
7438  *   Pointer to Ethernet device.
7439  * @param flow
7440  *   Pointer to mlx5_flow.
7441  *
7442  * @return
7443  *   1 while a reference on it exists, 0 when freed.
7444  */
7445 static int
7446 flow_dv_matcher_release(struct rte_eth_dev *dev,
7447                         struct mlx5_flow *flow)
7448 {
7449         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7450
7451         assert(matcher->matcher_object);
7452         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7453                 dev->data->port_id, (void *)matcher,
7454                 rte_atomic32_read(&matcher->refcnt));
7455         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7456                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7457                            (matcher->matcher_object));
7458                 LIST_REMOVE(matcher, next);
7459                 /* table ref-- in release interface. */
7460                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7461                 rte_free(matcher);
7462                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7463                         dev->data->port_id, (void *)matcher);
7464                 return 0;
7465         }
7466         return 1;
7467 }
7468
7469 /**
7470  * Release an encap/decap resource.
7471  *
7472  * @param flow
7473  *   Pointer to mlx5_flow.
7474  *
7475  * @return
7476  *   1 while a reference on it exists, 0 when freed.
7477  */
7478 static int
7479 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7480 {
7481         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7482                                                 flow->dv.encap_decap;
7483
7484         assert(cache_resource->verbs_action);
7485         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7486                 (void *)cache_resource,
7487                 rte_atomic32_read(&cache_resource->refcnt));
7488         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7489                 claim_zero(mlx5_glue->destroy_flow_action
7490                                 (cache_resource->verbs_action));
7491                 LIST_REMOVE(cache_resource, next);
7492                 rte_free(cache_resource);
7493                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7494                         (void *)cache_resource);
7495                 return 0;
7496         }
7497         return 1;
7498 }
7499
7500 /**
7501  * Release an jump to table action resource.
7502  *
7503  * @param dev
7504  *   Pointer to Ethernet device.
7505  * @param flow
7506  *   Pointer to mlx5_flow.
7507  *
7508  * @return
7509  *   1 while a reference on it exists, 0 when freed.
7510  */
7511 static int
7512 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7513                                   struct mlx5_flow *flow)
7514 {
7515         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7516         struct mlx5_flow_tbl_data_entry *tbl_data =
7517                         container_of(cache_resource,
7518                                      struct mlx5_flow_tbl_data_entry, jump);
7519
7520         assert(cache_resource->action);
7521         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7522                 (void *)cache_resource,
7523                 rte_atomic32_read(&cache_resource->refcnt));
7524         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7525                 claim_zero(mlx5_glue->destroy_flow_action
7526                                 (cache_resource->action));
7527                 /* jump action memory free is inside the table release. */
7528                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7529                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7530                         (void *)cache_resource);
7531                 return 0;
7532         }
7533         return 1;
7534 }
7535
7536 /**
7537  * Release a modify-header resource.
7538  *
7539  * @param flow
7540  *   Pointer to mlx5_flow.
7541  *
7542  * @return
7543  *   1 while a reference on it exists, 0 when freed.
7544  */
7545 static int
7546 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7547 {
7548         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7549                                                 flow->dv.modify_hdr;
7550
7551         assert(cache_resource->verbs_action);
7552         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7553                 (void *)cache_resource,
7554                 rte_atomic32_read(&cache_resource->refcnt));
7555         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7556                 claim_zero(mlx5_glue->destroy_flow_action
7557                                 (cache_resource->verbs_action));
7558                 LIST_REMOVE(cache_resource, next);
7559                 rte_free(cache_resource);
7560                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7561                         (void *)cache_resource);
7562                 return 0;
7563         }
7564         return 1;
7565 }
7566
7567 /**
7568  * Release port ID action resource.
7569  *
7570  * @param flow
7571  *   Pointer to mlx5_flow.
7572  *
7573  * @return
7574  *   1 while a reference on it exists, 0 when freed.
7575  */
7576 static int
7577 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7578 {
7579         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7580                 flow->dv.port_id_action;
7581
7582         assert(cache_resource->action);
7583         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7584                 (void *)cache_resource,
7585                 rte_atomic32_read(&cache_resource->refcnt));
7586         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7587                 claim_zero(mlx5_glue->destroy_flow_action
7588                                 (cache_resource->action));
7589                 LIST_REMOVE(cache_resource, next);
7590                 rte_free(cache_resource);
7591                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7592                         (void *)cache_resource);
7593                 return 0;
7594         }
7595         return 1;
7596 }
7597
7598 /**
7599  * Release push vlan action resource.
7600  *
7601  * @param flow
7602  *   Pointer to mlx5_flow.
7603  *
7604  * @return
7605  *   1 while a reference on it exists, 0 when freed.
7606  */
7607 static int
7608 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7609 {
7610         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7611                 flow->dv.push_vlan_res;
7612
7613         assert(cache_resource->action);
7614         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7615                 (void *)cache_resource,
7616                 rte_atomic32_read(&cache_resource->refcnt));
7617         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7618                 claim_zero(mlx5_glue->destroy_flow_action
7619                                 (cache_resource->action));
7620                 LIST_REMOVE(cache_resource, next);
7621                 rte_free(cache_resource);
7622                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7623                         (void *)cache_resource);
7624                 return 0;
7625         }
7626         return 1;
7627 }
7628
7629 /**
7630  * Remove the flow from the NIC but keeps it in memory.
7631  * Lock free, (mutex should be acquired by caller).
7632  *
7633  * @param[in] dev
7634  *   Pointer to Ethernet device.
7635  * @param[in, out] flow
7636  *   Pointer to flow structure.
7637  */
7638 static void
7639 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7640 {
7641         struct mlx5_flow_dv *dv;
7642         struct mlx5_flow *dev_flow;
7643
7644         if (!flow)
7645                 return;
7646         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7647                 dv = &dev_flow->dv;
7648                 if (dv->flow) {
7649                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7650                         dv->flow = NULL;
7651                 }
7652                 if (dv->hrxq) {
7653                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7654                                 mlx5_hrxq_drop_release(dev);
7655                         else
7656                                 mlx5_hrxq_release(dev, dv->hrxq);
7657                         dv->hrxq = NULL;
7658                 }
7659                 if (dev_flow->dv.vf_vlan.tag &&
7660                     dev_flow->dv.vf_vlan.created)
7661                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7662         }
7663 }
7664
7665 /**
7666  * Remove the flow from the NIC and the memory.
7667  * Lock free, (mutex should be acquired by caller).
7668  *
7669  * @param[in] dev
7670  *   Pointer to the Ethernet device structure.
7671  * @param[in, out] flow
7672  *   Pointer to flow structure.
7673  */
7674 static void
7675 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
7676 {
7677         struct mlx5_flow *dev_flow;
7678
7679         if (!flow)
7680                 return;
7681         __flow_dv_remove(dev, flow);
7682         if (flow->counter) {
7683                 flow_dv_counter_release(dev, flow->counter);
7684                 flow->counter = NULL;
7685         }
7686         if (flow->meter) {
7687                 mlx5_flow_meter_detach(flow->meter);
7688                 flow->meter = NULL;
7689         }
7690         while (!LIST_EMPTY(&flow->dev_flows)) {
7691                 dev_flow = LIST_FIRST(&flow->dev_flows);
7692                 LIST_REMOVE(dev_flow, next);
7693                 if (dev_flow->dv.matcher)
7694                         flow_dv_matcher_release(dev, dev_flow);
7695                 if (dev_flow->dv.encap_decap)
7696                         flow_dv_encap_decap_resource_release(dev_flow);
7697                 if (dev_flow->dv.modify_hdr)
7698                         flow_dv_modify_hdr_resource_release(dev_flow);
7699                 if (dev_flow->dv.jump)
7700                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
7701                 if (dev_flow->dv.port_id_action)
7702                         flow_dv_port_id_action_resource_release(dev_flow);
7703                 if (dev_flow->dv.push_vlan_res)
7704                         flow_dv_push_vlan_action_resource_release(dev_flow);
7705                 if (dev_flow->dv.tag_resource)
7706                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
7707                 rte_free(dev_flow);
7708         }
7709 }
7710
7711 /**
7712  * Query a dv flow  rule for its statistics via devx.
7713  *
7714  * @param[in] dev
7715  *   Pointer to Ethernet device.
7716  * @param[in] flow
7717  *   Pointer to the sub flow.
7718  * @param[out] data
7719  *   data retrieved by the query.
7720  * @param[out] error
7721  *   Perform verbose error reporting if not NULL.
7722  *
7723  * @return
7724  *   0 on success, a negative errno value otherwise and rte_errno is set.
7725  */
7726 static int
7727 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
7728                     void *data, struct rte_flow_error *error)
7729 {
7730         struct mlx5_priv *priv = dev->data->dev_private;
7731         struct rte_flow_query_count *qc = data;
7732
7733         if (!priv->config.devx)
7734                 return rte_flow_error_set(error, ENOTSUP,
7735                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7736                                           NULL,
7737                                           "counters are not supported");
7738         if (flow->counter) {
7739                 uint64_t pkts, bytes;
7740                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
7741                                                &bytes);
7742
7743                 if (err)
7744                         return rte_flow_error_set(error, -err,
7745                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7746                                         NULL, "cannot read counters");
7747                 qc->hits_set = 1;
7748                 qc->bytes_set = 1;
7749                 qc->hits = pkts - flow->counter->hits;
7750                 qc->bytes = bytes - flow->counter->bytes;
7751                 if (qc->reset) {
7752                         flow->counter->hits = pkts;
7753                         flow->counter->bytes = bytes;
7754                 }
7755                 return 0;
7756         }
7757         return rte_flow_error_set(error, EINVAL,
7758                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7759                                   NULL,
7760                                   "counters are not available");
7761 }
7762
7763 /**
7764  * Query a flow.
7765  *
7766  * @see rte_flow_query()
7767  * @see rte_flow_ops
7768  */
7769 static int
7770 flow_dv_query(struct rte_eth_dev *dev,
7771               struct rte_flow *flow __rte_unused,
7772               const struct rte_flow_action *actions __rte_unused,
7773               void *data __rte_unused,
7774               struct rte_flow_error *error __rte_unused)
7775 {
7776         int ret = -EINVAL;
7777
7778         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7779                 switch (actions->type) {
7780                 case RTE_FLOW_ACTION_TYPE_VOID:
7781                         break;
7782                 case RTE_FLOW_ACTION_TYPE_COUNT:
7783                         ret = flow_dv_query_count(dev, flow, data, error);
7784                         break;
7785                 default:
7786                         return rte_flow_error_set(error, ENOTSUP,
7787                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7788                                                   actions,
7789                                                   "action not supported");
7790                 }
7791         }
7792         return ret;
7793 }
7794
7795 /**
7796  * Destroy the meter table set.
7797  * Lock free, (mutex should be acquired by caller).
7798  *
7799  * @param[in] dev
7800  *   Pointer to Ethernet device.
7801  * @param[in] tbl
7802  *   Pointer to the meter table set.
7803  *
7804  * @return
7805  *   Always 0.
7806  */
7807 static int
7808 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
7809                         struct mlx5_meter_domains_infos *tbl)
7810 {
7811         struct mlx5_priv *priv = dev->data->dev_private;
7812         struct mlx5_meter_domains_infos *mtd =
7813                                 (struct mlx5_meter_domains_infos *)tbl;
7814
7815         if (!mtd || !priv->config.dv_flow_en)
7816                 return 0;
7817         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
7818                 claim_zero(mlx5_glue->dv_destroy_flow
7819                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
7820         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
7821                 claim_zero(mlx5_glue->dv_destroy_flow
7822                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
7823         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
7824                 claim_zero(mlx5_glue->dv_destroy_flow
7825                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
7826         if (mtd->egress.color_matcher)
7827                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7828                           (mtd->egress.color_matcher));
7829         if (mtd->egress.any_matcher)
7830                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7831                           (mtd->egress.any_matcher));
7832         if (mtd->egress.tbl)
7833                 claim_zero(flow_dv_tbl_resource_release(dev,
7834                                                         mtd->egress.tbl));
7835         if (mtd->ingress.color_matcher)
7836                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7837                           (mtd->ingress.color_matcher));
7838         if (mtd->ingress.any_matcher)
7839                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7840                           (mtd->ingress.any_matcher));
7841         if (mtd->ingress.tbl)
7842                 claim_zero(flow_dv_tbl_resource_release(dev,
7843                                                         mtd->ingress.tbl));
7844         if (mtd->transfer.color_matcher)
7845                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7846                           (mtd->transfer.color_matcher));
7847         if (mtd->transfer.any_matcher)
7848                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7849                           (mtd->transfer.any_matcher));
7850         if (mtd->transfer.tbl)
7851                 claim_zero(flow_dv_tbl_resource_release(dev,
7852                                                         mtd->transfer.tbl));
7853         if (mtd->drop_actn)
7854                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
7855         rte_free(mtd);
7856         return 0;
7857 }
7858
7859 /* Number of meter flow actions, count and jump or count and drop. */
7860 #define METER_ACTIONS 2
7861
7862 /**
7863  * Create specify domain meter table and suffix table.
7864  *
7865  * @param[in] dev
7866  *   Pointer to Ethernet device.
7867  * @param[in,out] mtb
7868  *   Pointer to DV meter table set.
7869  * @param[in] egress
7870  *   Table attribute.
7871  * @param[in] transfer
7872  *   Table attribute.
7873  * @param[in] color_reg_c_idx
7874  *   Reg C index for color match.
7875  *
7876  * @return
7877  *   0 on success, -1 otherwise and rte_errno is set.
7878  */
7879 static int
7880 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
7881                            struct mlx5_meter_domains_infos *mtb,
7882                            uint8_t egress, uint8_t transfer,
7883                            uint32_t color_reg_c_idx)
7884 {
7885         struct mlx5_priv *priv = dev->data->dev_private;
7886         struct mlx5_ibv_shared *sh = priv->sh;
7887         struct mlx5_flow_dv_match_params mask = {
7888                 .size = sizeof(mask.buf),
7889         };
7890         struct mlx5_flow_dv_match_params value = {
7891                 .size = sizeof(value.buf),
7892         };
7893         struct mlx5dv_flow_matcher_attr dv_attr = {
7894                 .type = IBV_FLOW_ATTR_NORMAL,
7895                 .priority = 0,
7896                 .match_criteria_enable = 0,
7897                 .match_mask = (void *)&mask,
7898         };
7899         void *actions[METER_ACTIONS];
7900         struct mlx5_flow_tbl_resource **sfx_tbl;
7901         struct mlx5_meter_domain_info *dtb;
7902         struct rte_flow_error error;
7903         int i = 0;
7904
7905         if (transfer) {
7906                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
7907                 dtb = &mtb->transfer;
7908         } else if (egress) {
7909                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
7910                 dtb = &mtb->egress;
7911         } else {
7912                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
7913                 dtb = &mtb->ingress;
7914         }
7915         /* If the suffix table in missing, create it. */
7916         if (!(*sfx_tbl)) {
7917                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
7918                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
7919                                                 egress, transfer, &error);
7920                 if (!(*sfx_tbl)) {
7921                         DRV_LOG(ERR, "Failed to create meter suffix table.");
7922                         return -1;
7923                 }
7924         }
7925         /* Create the meter table with METER level. */
7926         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
7927                                             egress, transfer, &error);
7928         if (!dtb->tbl) {
7929                 DRV_LOG(ERR, "Failed to create meter policer table.");
7930                 return -1;
7931         }
7932         /* Create matchers, Any and Color. */
7933         dv_attr.priority = 3;
7934         dv_attr.match_criteria_enable = 0;
7935         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7936                                                              &dv_attr,
7937                                                              dtb->tbl->obj);
7938         if (!dtb->any_matcher) {
7939                 DRV_LOG(ERR, "Failed to create meter"
7940                              " policer default matcher.");
7941                 goto error_exit;
7942         }
7943         dv_attr.priority = 0;
7944         dv_attr.match_criteria_enable =
7945                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
7946         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
7947                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
7948         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7949                                                                &dv_attr,
7950                                                                dtb->tbl->obj);
7951         if (!dtb->color_matcher) {
7952                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
7953                 goto error_exit;
7954         }
7955         if (mtb->count_actns[RTE_MTR_DROPPED])
7956                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
7957         actions[i++] = mtb->drop_actn;
7958         /* Default rule: lowest priority, match any, actions: drop. */
7959         dtb->policer_rules[RTE_MTR_DROPPED] =
7960                         mlx5_glue->dv_create_flow(dtb->any_matcher,
7961                                                  (void *)&value, i, actions);
7962         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
7963                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
7964                 goto error_exit;
7965         }
7966         return 0;
7967 error_exit:
7968         return -1;
7969 }
7970
7971 /**
7972  * Create the needed meter and suffix tables.
7973  * Lock free, (mutex should be acquired by caller).
7974  *
7975  * @param[in] dev
7976  *   Pointer to Ethernet device.
7977  * @param[in] fm
7978  *   Pointer to the flow meter.
7979  *
7980  * @return
7981  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
7982  */
7983 static struct mlx5_meter_domains_infos *
7984 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
7985                        const struct mlx5_flow_meter *fm)
7986 {
7987         struct mlx5_priv *priv = dev->data->dev_private;
7988         struct mlx5_meter_domains_infos *mtb;
7989         int ret;
7990         int i;
7991
7992         if (!priv->mtr_en) {
7993                 rte_errno = ENOTSUP;
7994                 return NULL;
7995         }
7996         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
7997         if (!mtb) {
7998                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
7999                 return NULL;
8000         }
8001         /* Create meter count actions */
8002         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8003                 if (!fm->policer_stats.cnt[i])
8004                         continue;
8005                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8006         }
8007         /* Create drop action. */
8008         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8009         if (!mtb->drop_actn) {
8010                 DRV_LOG(ERR, "Failed to create drop action.");
8011                 goto error_exit;
8012         }
8013         /* Egress meter table. */
8014         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8015         if (ret) {
8016                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8017                 goto error_exit;
8018         }
8019         /* Ingress meter table. */
8020         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8021         if (ret) {
8022                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8023                 goto error_exit;
8024         }
8025         /* FDB meter table. */
8026         if (priv->config.dv_esw_en) {
8027                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8028                                                  priv->mtr_color_reg);
8029                 if (ret) {
8030                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8031                         goto error_exit;
8032                 }
8033         }
8034         return mtb;
8035 error_exit:
8036         flow_dv_destroy_mtr_tbl(dev, mtb);
8037         return NULL;
8038 }
8039
8040 /**
8041  * Destroy domain policer rule.
8042  *
8043  * @param[in] dt
8044  *   Pointer to domain table.
8045  */
8046 static void
8047 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8048 {
8049         int i;
8050
8051         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8052                 if (dt->policer_rules[i]) {
8053                         claim_zero(mlx5_glue->dv_destroy_flow
8054                                   (dt->policer_rules[i]));
8055                         dt->policer_rules[i] = NULL;
8056                 }
8057         }
8058         if (dt->jump_actn) {
8059                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8060                 dt->jump_actn = NULL;
8061         }
8062 }
8063
8064 /**
8065  * Destroy policer rules.
8066  *
8067  * @param[in] dev
8068  *   Pointer to Ethernet device.
8069  * @param[in] fm
8070  *   Pointer to flow meter structure.
8071  * @param[in] attr
8072  *   Pointer to flow attributes.
8073  *
8074  * @return
8075  *   Always 0.
8076  */
8077 static int
8078 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8079                               const struct mlx5_flow_meter *fm,
8080                               const struct rte_flow_attr *attr)
8081 {
8082         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8083
8084         if (!mtb)
8085                 return 0;
8086         if (attr->egress)
8087                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8088         if (attr->ingress)
8089                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8090         if (attr->transfer)
8091                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8092         return 0;
8093 }
8094
8095 /**
8096  * Create specify domain meter policer rule.
8097  *
8098  * @param[in] fm
8099  *   Pointer to flow meter structure.
8100  * @param[in] mtb
8101  *   Pointer to DV meter table set.
8102  * @param[in] sfx_tb
8103  *   Pointer to suffix table.
8104  * @param[in] mtr_reg_c
8105  *   Color match REG_C.
8106  *
8107  * @return
8108  *   0 on success, -1 otherwise.
8109  */
8110 static int
8111 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8112                                     struct mlx5_meter_domain_info *dtb,
8113                                     struct mlx5_flow_tbl_resource *sfx_tb,
8114                                     uint8_t mtr_reg_c)
8115 {
8116         struct mlx5_flow_dv_match_params matcher = {
8117                 .size = sizeof(matcher.buf),
8118         };
8119         struct mlx5_flow_dv_match_params value = {
8120                 .size = sizeof(value.buf),
8121         };
8122         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8123         void *actions[METER_ACTIONS];
8124         int i;
8125
8126         /* Create jump action. */
8127         if (!sfx_tb)
8128                 return -1;
8129         if (!dtb->jump_actn)
8130                 dtb->jump_actn =
8131                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8132                                                         (sfx_tb->obj);
8133         if (!dtb->jump_actn) {
8134                 DRV_LOG(ERR, "Failed to create policer jump action.");
8135                 goto error;
8136         }
8137         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8138                 int j = 0;
8139
8140                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8141                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8142                 if (mtb->count_actns[i])
8143                         actions[j++] = mtb->count_actns[i];
8144                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8145                         actions[j++] = mtb->drop_actn;
8146                 else
8147                         actions[j++] = dtb->jump_actn;
8148                 dtb->policer_rules[i] =
8149                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8150                                                  (void *)&value,
8151                                                   j, actions);
8152                 if (!dtb->policer_rules[i]) {
8153                         DRV_LOG(ERR, "Failed to create policer rule.");
8154                         goto error;
8155                 }
8156         }
8157         return 0;
8158 error:
8159         rte_errno = errno;
8160         return -1;
8161 }
8162
8163 /**
8164  * Create policer rules.
8165  *
8166  * @param[in] dev
8167  *   Pointer to Ethernet device.
8168  * @param[in] fm
8169  *   Pointer to flow meter structure.
8170  * @param[in] attr
8171  *   Pointer to flow attributes.
8172  *
8173  * @return
8174  *   0 on success, -1 otherwise.
8175  */
8176 static int
8177 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8178                              struct mlx5_flow_meter *fm,
8179                              const struct rte_flow_attr *attr)
8180 {
8181         struct mlx5_priv *priv = dev->data->dev_private;
8182         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8183         int ret;
8184
8185         if (attr->egress) {
8186                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8187                                                 priv->sh->tx_mtr_sfx_tbl,
8188                                                 priv->mtr_color_reg);
8189                 if (ret) {
8190                         DRV_LOG(ERR, "Failed to create egress policer.");
8191                         goto error;
8192                 }
8193         }
8194         if (attr->ingress) {
8195                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8196                                                 priv->sh->rx_mtr_sfx_tbl,
8197                                                 priv->mtr_color_reg);
8198                 if (ret) {
8199                         DRV_LOG(ERR, "Failed to create ingress policer.");
8200                         goto error;
8201                 }
8202         }
8203         if (attr->transfer) {
8204                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8205                                                 priv->sh->fdb_mtr_sfx_tbl,
8206                                                 priv->mtr_color_reg);
8207                 if (ret) {
8208                         DRV_LOG(ERR, "Failed to create transfer policer.");
8209                         goto error;
8210                 }
8211         }
8212         return 0;
8213 error:
8214         flow_dv_destroy_policer_rules(dev, fm, attr);
8215         return -1;
8216 }
8217
8218 /**
8219  * Query a devx counter.
8220  *
8221  * @param[in] dev
8222  *   Pointer to the Ethernet device structure.
8223  * @param[in] cnt
8224  *   Pointer to the flow counter.
8225  * @param[in] clear
8226  *   Set to clear the counter statistics.
8227  * @param[out] pkts
8228  *   The statistics value of packets.
8229  * @param[out] bytes
8230  *   The statistics value of bytes.
8231  *
8232  * @return
8233  *   0 on success, otherwise return -1.
8234  */
8235 static int
8236 flow_dv_counter_query(struct rte_eth_dev *dev,
8237                       struct mlx5_flow_counter *cnt, bool clear,
8238                       uint64_t *pkts, uint64_t *bytes)
8239 {
8240         struct mlx5_priv *priv = dev->data->dev_private;
8241         uint64_t inn_pkts, inn_bytes;
8242         int ret;
8243
8244         if (!priv->config.devx)
8245                 return -1;
8246         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8247         if (ret)
8248                 return -1;
8249         *pkts = inn_pkts - cnt->hits;
8250         *bytes = inn_bytes - cnt->bytes;
8251         if (clear) {
8252                 cnt->hits = inn_pkts;
8253                 cnt->bytes = inn_bytes;
8254         }
8255         return 0;
8256 }
8257
8258 /*
8259  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8260  */
8261 static int
8262 flow_dv_translate(struct rte_eth_dev *dev,
8263                   struct mlx5_flow *dev_flow,
8264                   const struct rte_flow_attr *attr,
8265                   const struct rte_flow_item items[],
8266                   const struct rte_flow_action actions[],
8267                   struct rte_flow_error *error)
8268 {
8269         int ret;
8270
8271         flow_dv_shared_lock(dev);
8272         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8273         flow_dv_shared_unlock(dev);
8274         return ret;
8275 }
8276
8277 /*
8278  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8279  */
8280 static int
8281 flow_dv_apply(struct rte_eth_dev *dev,
8282               struct rte_flow *flow,
8283               struct rte_flow_error *error)
8284 {
8285         int ret;
8286
8287         flow_dv_shared_lock(dev);
8288         ret = __flow_dv_apply(dev, flow, error);
8289         flow_dv_shared_unlock(dev);
8290         return ret;
8291 }
8292
8293 /*
8294  * Mutex-protected thunk to lock-free __flow_dv_remove().
8295  */
8296 static void
8297 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8298 {
8299         flow_dv_shared_lock(dev);
8300         __flow_dv_remove(dev, flow);
8301         flow_dv_shared_unlock(dev);
8302 }
8303
8304 /*
8305  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8306  */
8307 static void
8308 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8309 {
8310         flow_dv_shared_lock(dev);
8311         __flow_dv_destroy(dev, flow);
8312         flow_dv_shared_unlock(dev);
8313 }
8314
8315 /*
8316  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8317  */
8318 static struct mlx5_flow_counter *
8319 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8320 {
8321         struct mlx5_flow_counter *cnt;
8322
8323         flow_dv_shared_lock(dev);
8324         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8325         flow_dv_shared_unlock(dev);
8326         return cnt;
8327 }
8328
8329 /*
8330  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8331  */
8332 static void
8333 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8334 {
8335         flow_dv_shared_lock(dev);
8336         flow_dv_counter_release(dev, cnt);
8337         flow_dv_shared_unlock(dev);
8338 }
8339
8340 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8341         .validate = flow_dv_validate,
8342         .prepare = flow_dv_prepare,
8343         .translate = flow_dv_translate,
8344         .apply = flow_dv_apply,
8345         .remove = flow_dv_remove,
8346         .destroy = flow_dv_destroy,
8347         .query = flow_dv_query,
8348         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8349         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8350         .create_policer_rules = flow_dv_create_policer_rules,
8351         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8352         .counter_alloc = flow_dv_counter_allocate,
8353         .counter_free = flow_dv_counter_free,
8354         .counter_query = flow_dv_counter_query,
8355 };
8356
8357 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */