drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_prm.h>
  35
  36 #include "mlx5_defs.h"
  37 #include "mlx5.h"
  38 #include "mlx5_flow.h"
  39 #include "mlx5_rxtx.h"
  40
  41 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  58                                           sizeof(struct rte_flow_item_ipv4))
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 /**
  79  * Initialize flow attributes structure according to flow items' types.
  80  *
  81  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  82  * mode. For tunnel mode, the items to be modified are the outermost ones.
  83  *
  84  * @param[in] item
  85  *   Pointer to item specification.
  86  * @param[out] attr
  87  *   Pointer to flow attributes structure.
  88  */
  89 static void
  90 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  91 {
  92         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  93                 switch (item->type) {
  94                 case RTE_FLOW_ITEM_TYPE_IPV4:
  95                         if (!attr->ipv6)
  96                                 attr->ipv4 = 1;
  97                         break;
  98                 case RTE_FLOW_ITEM_TYPE_IPV6:
  99                         if (!attr->ipv4)
 100                                 attr->ipv6 = 1;
 101                         break;
 102                 case RTE_FLOW_ITEM_TYPE_UDP:
 103                         if (!attr->tcp)
 104                                 attr->udp = 1;
 105                         break;
 106                 case RTE_FLOW_ITEM_TYPE_TCP:
 107                         if (!attr->udp)
 108                                 attr->tcp = 1;
 109                         break;
 110                 default:
 111                         break;
 112                 }
 113         }
 114         attr->valid = 1;
 115 }
 116
 117 /**
 118  * Convert rte_mtr_color to mlx5 color.
 119  *
 120  * @param[in] rcol
 121  *   rte_mtr_color.
 122  *
 123  * @return
 124  *   mlx5 color.
 125  */
 126 static int
 127 rte_col_2_mlx5_col(enum rte_color rcol)
 128 {
 129         switch (rcol) {
 130         case RTE_COLOR_GREEN:
 131                 return MLX5_FLOW_COLOR_GREEN;
 132         case RTE_COLOR_YELLOW:
 133                 return MLX5_FLOW_COLOR_YELLOW;
 134         case RTE_COLOR_RED:
 135                 return MLX5_FLOW_COLOR_RED;
 136         default:
 137                 break;
 138         }
 139         return MLX5_FLOW_COLOR_UNDEFINED;
 140 }
 141
 142 struct field_modify_info {
 143         uint32_t size; /* Size of field in protocol header, in bytes. */
 144         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 145         enum mlx5_modification_field id;
 146 };
 147
 148 struct field_modify_info modify_eth[] = {
 149         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 150         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 151         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 152         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 153         {0, 0, 0},
 154 };
 155
 156 struct field_modify_info modify_vlan_out_first_vid[] = {
 157         /* Size in bits !!! */
 158         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 159         {0, 0, 0},
 160 };
 161
 162 struct field_modify_info modify_ipv4[] = {
 163         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 164         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 165         {4, 12, MLX5_MODI_OUT_SIPV4},
 166         {4, 16, MLX5_MODI_OUT_DIPV4},
 167         {0, 0, 0},
 168 };
 169
 170 struct field_modify_info modify_ipv6[] = {
 171         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 172         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 173         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 174         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 175         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 176         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 177         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 178         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 179         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 180         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 181         {0, 0, 0},
 182 };
 183
 184 struct field_modify_info modify_udp[] = {
 185         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 186         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 187         {0, 0, 0},
 188 };
 189
 190 struct field_modify_info modify_tcp[] = {
 191         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 192         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 193         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 194         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 195         {0, 0, 0},
 196 };
 197
 198 static void
 199 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 200                           uint8_t next_protocol, uint64_t *item_flags,
 201                           int *tunnel)
 202 {
 203         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 204                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 205         if (next_protocol == IPPROTO_IPIP) {
 206                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 207                 *tunnel = 1;
 208         }
 209         if (next_protocol == IPPROTO_IPV6) {
 210                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 211                 *tunnel = 1;
 212         }
 213 }
 214
 215 /**
 216  * Acquire the synchronizing object to protect multithreaded access
 217  * to shared dv context. Lock occurs only if context is actually
 218  * shared, i.e. we have multiport IB device and representors are
 219  * created.
 220  *
 221  * @param[in] dev
 222  *   Pointer to the rte_eth_dev structure.
 223  */
 224 static void
 225 flow_dv_shared_lock(struct rte_eth_dev *dev)
 226 {
 227         struct mlx5_priv *priv = dev->data->dev_private;
 228         struct mlx5_ibv_shared *sh = priv->sh;
 229
 230         if (sh->dv_refcnt > 1) {
 231                 int ret;
 232
 233                 ret = pthread_mutex_lock(&sh->dv_mutex);
 234                 assert(!ret);
 235                 (void)ret;
 236         }
 237 }
 238
 239 static void
 240 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 241 {
 242         struct mlx5_priv *priv = dev->data->dev_private;
 243         struct mlx5_ibv_shared *sh = priv->sh;
 244
 245         if (sh->dv_refcnt > 1) {
 246                 int ret;
 247
 248                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 249                 assert(!ret);
 250                 (void)ret;
 251         }
 252 }
 253
 254 /* Update VLAN's VID/PCP based on input rte_flow_action.
 255  *
 256  * @param[in] action
 257  *   Pointer to struct rte_flow_action.
 258  * @param[out] vlan
 259  *   Pointer to struct rte_vlan_hdr.
 260  */
 261 static void
 262 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 263                          struct rte_vlan_hdr *vlan)
 264 {
 265         uint16_t vlan_tci;
 266         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 267                 vlan_tci =
 268                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 269                                                action->conf)->vlan_pcp;
 270                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 271                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 272                 vlan->vlan_tci |= vlan_tci;
 273         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 274                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 275                 vlan->vlan_tci |= rte_be_to_cpu_16
 276                     (((const struct rte_flow_action_of_set_vlan_vid *)
 277                                              action->conf)->vlan_vid);
 278         }
 279 }
 280
 281 /**
 282  * Fetch 1, 2, 3 or 4 byte field from the byte array
 283  * and return as unsigned integer in host-endian format.
 284  *
 285  * @param[in] data
 286  *   Pointer to data array.
 287  * @param[in] size
 288  *   Size of field to extract.
 289  *
 290  * @return
 291  *   converted field in host endian format.
 292  */
 293 static inline uint32_t
 294 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 295 {
 296         uint32_t ret;
 297
 298         switch (size) {
 299         case 1:
 300                 ret = *data;
 301                 break;
 302         case 2:
 303                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 304                 break;
 305         case 3:
 306                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 307                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 308                 break;
 309         case 4:
 310                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 311                 break;
 312         default:
 313                 assert(false);
 314                 ret = 0;
 315                 break;
 316         }
 317         return ret;
 318 }
 319
 320 /**
 321  * Convert modify-header action to DV specification.
 322  *
 323  * Data length of each action is determined by provided field description
 324  * and the item mask. Data bit offset and width of each action is determined
 325  * by provided item mask.
 326  *
 327  * @param[in] item
 328  *   Pointer to item specification.
 329  * @param[in] field
 330  *   Pointer to field modification information.
 331  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 332  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 333  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 334  * @param[in] dcopy
 335  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 336  *   Negative offset value sets the same offset as source offset.
 337  *   size field is ignored, value is taken from source field.
 338  * @param[in,out] resource
 339  *   Pointer to the modify-header resource.
 340  * @param[in] type
 341  *   Type of modification.
 342  * @param[out] error
 343  *   Pointer to the error structure.
 344  *
 345  * @return
 346  *   0 on success, a negative errno value otherwise and rte_errno is set.
 347  */
 348 static int
 349 flow_dv_convert_modify_action(struct rte_flow_item *item,
 350                               struct field_modify_info *field,
 351                               struct field_modify_info *dcopy,
 352                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 353                               uint32_t type, struct rte_flow_error *error)
 354 {
 355         uint32_t i = resource->actions_num;
 356         struct mlx5_modification_cmd *actions = resource->actions;
 357
 358         /*
 359          * The item and mask are provided in big-endian format.
 360          * The fields should be presented as in big-endian format either.
 361          * Mask must be always present, it defines the actual field width.
 362          */
 363         assert(item->mask);
 364         assert(field->size);
 365         do {
 366                 unsigned int size_b;
 367                 unsigned int off_b;
 368                 uint32_t mask;
 369                 uint32_t data;
 370
 371                 if (i >= MLX5_MAX_MODIFY_NUM)
 372                         return rte_flow_error_set(error, EINVAL,
 373                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 374                                  "too many items to modify");
 375                 /* Fetch variable byte size mask from the array. */
 376                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 377                                            field->offset, field->size);
 378                 if (!mask) {
 379                         ++field;
 380                         continue;
 381                 }
 382                 /* Deduce actual data width in bits from mask value. */
 383                 off_b = rte_bsf32(mask);
 384                 size_b = sizeof(uint32_t) * CHAR_BIT -
 385                          off_b - __builtin_clz(mask);
 386                 assert(size_b);
 387                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 388                 actions[i].action_type = type;
 389                 actions[i].field = field->id;
 390                 actions[i].offset = off_b;
 391                 actions[i].length = size_b;
 392                 /* Convert entire record to expected big-endian format. */
 393                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 394                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 395                         assert(dcopy);
 396                         actions[i].dst_field = dcopy->id;
 397                         actions[i].dst_offset =
 398                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 399                         /* Convert entire record to big-endian format. */
 400                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 401                 } else {
 402                         assert(item->spec);
 403                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 404                                                    field->offset, field->size);
 405                         /* Shift out the trailing masked bits from data. */
 406                         data = (data & mask) >> off_b;
 407                         actions[i].data1 = rte_cpu_to_be_32(data);
 408                 }
 409                 ++i;
 410                 ++field;
 411         } while (field->size);
 412         if (resource->actions_num == i)
 413                 return rte_flow_error_set(error, EINVAL,
 414                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 415                                           "invalid modification flow item");
 416         resource->actions_num = i;
 417         return 0;
 418 }
 419
 420 /**
 421  * Convert modify-header set IPv4 address action to DV specification.
 422  *
 423  * @param[in,out] resource
 424  *   Pointer to the modify-header resource.
 425  * @param[in] action
 426  *   Pointer to action specification.
 427  * @param[out] error
 428  *   Pointer to the error structure.
 429  *
 430  * @return
 431  *   0 on success, a negative errno value otherwise and rte_errno is set.
 432  */
 433 static int
 434 flow_dv_convert_action_modify_ipv4
 435                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 436                          const struct rte_flow_action *action,
 437                          struct rte_flow_error *error)
 438 {
 439         const struct rte_flow_action_set_ipv4 *conf =
 440                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 441         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 442         struct rte_flow_item_ipv4 ipv4;
 443         struct rte_flow_item_ipv4 ipv4_mask;
 444
 445         memset(&ipv4, 0, sizeof(ipv4));
 446         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 447         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 448                 ipv4.hdr.src_addr = conf->ipv4_addr;
 449                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 450         } else {
 451                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 452                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 453         }
 454         item.spec = &ipv4;
 455         item.mask = &ipv4_mask;
 456         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 457                                              MLX5_MODIFICATION_TYPE_SET, error);
 458 }
 459
 460 /**
 461  * Convert modify-header set IPv6 address action to DV specification.
 462  *
 463  * @param[in,out] resource
 464  *   Pointer to the modify-header resource.
 465  * @param[in] action
 466  *   Pointer to action specification.
 467  * @param[out] error
 468  *   Pointer to the error structure.
 469  *
 470  * @return
 471  *   0 on success, a negative errno value otherwise and rte_errno is set.
 472  */
 473 static int
 474 flow_dv_convert_action_modify_ipv6
 475                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 476                          const struct rte_flow_action *action,
 477                          struct rte_flow_error *error)
 478 {
 479         const struct rte_flow_action_set_ipv6 *conf =
 480                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 481         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 482         struct rte_flow_item_ipv6 ipv6;
 483         struct rte_flow_item_ipv6 ipv6_mask;
 484
 485         memset(&ipv6, 0, sizeof(ipv6));
 486         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 487         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 488                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 489                        sizeof(ipv6.hdr.src_addr));
 490                 memcpy(&ipv6_mask.hdr.src_addr,
 491                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 492                        sizeof(ipv6.hdr.src_addr));
 493         } else {
 494                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 495                        sizeof(ipv6.hdr.dst_addr));
 496                 memcpy(&ipv6_mask.hdr.dst_addr,
 497                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 498                        sizeof(ipv6.hdr.dst_addr));
 499         }
 500         item.spec = &ipv6;
 501         item.mask = &ipv6_mask;
 502         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 503                                              MLX5_MODIFICATION_TYPE_SET, error);
 504 }
 505
 506 /**
 507  * Convert modify-header set MAC address action to DV specification.
 508  *
 509  * @param[in,out] resource
 510  *   Pointer to the modify-header resource.
 511  * @param[in] action
 512  *   Pointer to action specification.
 513  * @param[out] error
 514  *   Pointer to the error structure.
 515  *
 516  * @return
 517  *   0 on success, a negative errno value otherwise and rte_errno is set.
 518  */
 519 static int
 520 flow_dv_convert_action_modify_mac
 521                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 522                          const struct rte_flow_action *action,
 523                          struct rte_flow_error *error)
 524 {
 525         const struct rte_flow_action_set_mac *conf =
 526                 (const struct rte_flow_action_set_mac *)(action->conf);
 527         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 528         struct rte_flow_item_eth eth;
 529         struct rte_flow_item_eth eth_mask;
 530
 531         memset(&eth, 0, sizeof(eth));
 532         memset(&eth_mask, 0, sizeof(eth_mask));
 533         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 534                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 535                        sizeof(eth.src.addr_bytes));
 536                 memcpy(&eth_mask.src.addr_bytes,
 537                        &rte_flow_item_eth_mask.src.addr_bytes,
 538                        sizeof(eth_mask.src.addr_bytes));
 539         } else {
 540                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 541                        sizeof(eth.dst.addr_bytes));
 542                 memcpy(&eth_mask.dst.addr_bytes,
 543                        &rte_flow_item_eth_mask.dst.addr_bytes,
 544                        sizeof(eth_mask.dst.addr_bytes));
 545         }
 546         item.spec = &eth;
 547         item.mask = &eth_mask;
 548         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 549                                              MLX5_MODIFICATION_TYPE_SET, error);
 550 }
 551
 552 /**
 553  * Convert modify-header set VLAN VID action to DV specification.
 554  *
 555  * @param[in,out] resource
 556  *   Pointer to the modify-header resource.
 557  * @param[in] action
 558  *   Pointer to action specification.
 559  * @param[out] error
 560  *   Pointer to the error structure.
 561  *
 562  * @return
 563  *   0 on success, a negative errno value otherwise and rte_errno is set.
 564  */
 565 static int
 566 flow_dv_convert_action_modify_vlan_vid
 567                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 568                          const struct rte_flow_action *action,
 569                          struct rte_flow_error *error)
 570 {
 571         const struct rte_flow_action_of_set_vlan_vid *conf =
 572                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 573         int i = resource->actions_num;
 574         struct mlx5_modification_cmd *actions = &resource->actions[i];
 575         struct field_modify_info *field = modify_vlan_out_first_vid;
 576
 577         if (i >= MLX5_MAX_MODIFY_NUM)
 578                 return rte_flow_error_set(error, EINVAL,
 579                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 580                          "too many items to modify");
 581         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 582         actions[i].field = field->id;
 583         actions[i].length = field->size;
 584         actions[i].offset = field->offset;
 585         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 586         actions[i].data1 = conf->vlan_vid;
 587         actions[i].data1 = actions[i].data1 << 16;
 588         resource->actions_num = ++i;
 589         return 0;
 590 }
 591
 592 /**
 593  * Convert modify-header set TP action to DV specification.
 594  *
 595  * @param[in,out] resource
 596  *   Pointer to the modify-header resource.
 597  * @param[in] action
 598  *   Pointer to action specification.
 599  * @param[in] items
 600  *   Pointer to rte_flow_item objects list.
 601  * @param[in] attr
 602  *   Pointer to flow attributes structure.
 603  * @param[out] error
 604  *   Pointer to the error structure.
 605  *
 606  * @return
 607  *   0 on success, a negative errno value otherwise and rte_errno is set.
 608  */
 609 static int
 610 flow_dv_convert_action_modify_tp
 611                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 612                          const struct rte_flow_action *action,
 613                          const struct rte_flow_item *items,
 614                          union flow_dv_attr *attr,
 615                          struct rte_flow_error *error)
 616 {
 617         const struct rte_flow_action_set_tp *conf =
 618                 (const struct rte_flow_action_set_tp *)(action->conf);
 619         struct rte_flow_item item;
 620         struct rte_flow_item_udp udp;
 621         struct rte_flow_item_udp udp_mask;
 622         struct rte_flow_item_tcp tcp;
 623         struct rte_flow_item_tcp tcp_mask;
 624         struct field_modify_info *field;
 625
 626         if (!attr->valid)
 627                 flow_dv_attr_init(items, attr);
 628         if (attr->udp) {
 629                 memset(&udp, 0, sizeof(udp));
 630                 memset(&udp_mask, 0, sizeof(udp_mask));
 631                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 632                         udp.hdr.src_port = conf->port;
 633                         udp_mask.hdr.src_port =
 634                                         rte_flow_item_udp_mask.hdr.src_port;
 635                 } else {
 636                         udp.hdr.dst_port = conf->port;
 637                         udp_mask.hdr.dst_port =
 638                                         rte_flow_item_udp_mask.hdr.dst_port;
 639                 }
 640                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 641                 item.spec = &udp;
 642                 item.mask = &udp_mask;
 643                 field = modify_udp;
 644         }
 645         if (attr->tcp) {
 646                 memset(&tcp, 0, sizeof(tcp));
 647                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 648                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 649                         tcp.hdr.src_port = conf->port;
 650                         tcp_mask.hdr.src_port =
 651                                         rte_flow_item_tcp_mask.hdr.src_port;
 652                 } else {
 653                         tcp.hdr.dst_port = conf->port;
 654                         tcp_mask.hdr.dst_port =
 655                                         rte_flow_item_tcp_mask.hdr.dst_port;
 656                 }
 657                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 658                 item.spec = &tcp;
 659                 item.mask = &tcp_mask;
 660                 field = modify_tcp;
 661         }
 662         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 663                                              MLX5_MODIFICATION_TYPE_SET, error);
 664 }
 665
 666 /**
 667  * Convert modify-header set TTL action to DV specification.
 668  *
 669  * @param[in,out] resource
 670  *   Pointer to the modify-header resource.
 671  * @param[in] action
 672  *   Pointer to action specification.
 673  * @param[in] items
 674  *   Pointer to rte_flow_item objects list.
 675  * @param[in] attr
 676  *   Pointer to flow attributes structure.
 677  * @param[out] error
 678  *   Pointer to the error structure.
 679  *
 680  * @return
 681  *   0 on success, a negative errno value otherwise and rte_errno is set.
 682  */
 683 static int
 684 flow_dv_convert_action_modify_ttl
 685                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 686                          const struct rte_flow_action *action,
 687                          const struct rte_flow_item *items,
 688                          union flow_dv_attr *attr,
 689                          struct rte_flow_error *error)
 690 {
 691         const struct rte_flow_action_set_ttl *conf =
 692                 (const struct rte_flow_action_set_ttl *)(action->conf);
 693         struct rte_flow_item item;
 694         struct rte_flow_item_ipv4 ipv4;
 695         struct rte_flow_item_ipv4 ipv4_mask;
 696         struct rte_flow_item_ipv6 ipv6;
 697         struct rte_flow_item_ipv6 ipv6_mask;
 698         struct field_modify_info *field;
 699
 700         if (!attr->valid)
 701                 flow_dv_attr_init(items, attr);
 702         if (attr->ipv4) {
 703                 memset(&ipv4, 0, sizeof(ipv4));
 704                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 705                 ipv4.hdr.time_to_live = conf->ttl_value;
 706                 ipv4_mask.hdr.time_to_live = 0xFF;
 707                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 708                 item.spec = &ipv4;
 709                 item.mask = &ipv4_mask;
 710                 field = modify_ipv4;
 711         }
 712         if (attr->ipv6) {
 713                 memset(&ipv6, 0, sizeof(ipv6));
 714                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 715                 ipv6.hdr.hop_limits = conf->ttl_value;
 716                 ipv6_mask.hdr.hop_limits = 0xFF;
 717                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 718                 item.spec = &ipv6;
 719                 item.mask = &ipv6_mask;
 720                 field = modify_ipv6;
 721         }
 722         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 723                                              MLX5_MODIFICATION_TYPE_SET, error);
 724 }
 725
 726 /**
 727  * Convert modify-header decrement TTL action to DV specification.
 728  *
 729  * @param[in,out] resource
 730  *   Pointer to the modify-header resource.
 731  * @param[in] action
 732  *   Pointer to action specification.
 733  * @param[in] items
 734  *   Pointer to rte_flow_item objects list.
 735  * @param[in] attr
 736  *   Pointer to flow attributes structure.
 737  * @param[out] error
 738  *   Pointer to the error structure.
 739  *
 740  * @return
 741  *   0 on success, a negative errno value otherwise and rte_errno is set.
 742  */
 743 static int
 744 flow_dv_convert_action_modify_dec_ttl
 745                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 746                          const struct rte_flow_item *items,
 747                          union flow_dv_attr *attr,
 748                          struct rte_flow_error *error)
 749 {
 750         struct rte_flow_item item;
 751         struct rte_flow_item_ipv4 ipv4;
 752         struct rte_flow_item_ipv4 ipv4_mask;
 753         struct rte_flow_item_ipv6 ipv6;
 754         struct rte_flow_item_ipv6 ipv6_mask;
 755         struct field_modify_info *field;
 756
 757         if (!attr->valid)
 758                 flow_dv_attr_init(items, attr);
 759         if (attr->ipv4) {
 760                 memset(&ipv4, 0, sizeof(ipv4));
 761                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 762                 ipv4.hdr.time_to_live = 0xFF;
 763                 ipv4_mask.hdr.time_to_live = 0xFF;
 764                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 765                 item.spec = &ipv4;
 766                 item.mask = &ipv4_mask;
 767                 field = modify_ipv4;
 768         }
 769         if (attr->ipv6) {
 770                 memset(&ipv6, 0, sizeof(ipv6));
 771                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 772                 ipv6.hdr.hop_limits = 0xFF;
 773                 ipv6_mask.hdr.hop_limits = 0xFF;
 774                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 775                 item.spec = &ipv6;
 776                 item.mask = &ipv6_mask;
 777                 field = modify_ipv6;
 778         }
 779         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 780                                              MLX5_MODIFICATION_TYPE_ADD, error);
 781 }
 782
 783 /**
 784  * Convert modify-header increment/decrement TCP Sequence number
 785  * to DV specification.
 786  *
 787  * @param[in,out] resource
 788  *   Pointer to the modify-header resource.
 789  * @param[in] action
 790  *   Pointer to action specification.
 791  * @param[out] error
 792  *   Pointer to the error structure.
 793  *
 794  * @return
 795  *   0 on success, a negative errno value otherwise and rte_errno is set.
 796  */
 797 static int
 798 flow_dv_convert_action_modify_tcp_seq
 799                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 800                          const struct rte_flow_action *action,
 801                          struct rte_flow_error *error)
 802 {
 803         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 804         uint64_t value = rte_be_to_cpu_32(*conf);
 805         struct rte_flow_item item;
 806         struct rte_flow_item_tcp tcp;
 807         struct rte_flow_item_tcp tcp_mask;
 808
 809         memset(&tcp, 0, sizeof(tcp));
 810         memset(&tcp_mask, 0, sizeof(tcp_mask));
 811         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 812                 /*
 813                  * The HW has no decrement operation, only increment operation.
 814                  * To simulate decrement X from Y using increment operation
 815                  * we need to add UINT32_MAX X times to Y.
 816                  * Each adding of UINT32_MAX decrements Y by 1.
 817                  */
 818                 value *= UINT32_MAX;
 819         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 820         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 821         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 822         item.spec = &tcp;
 823         item.mask = &tcp_mask;
 824         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 825                                              MLX5_MODIFICATION_TYPE_ADD, error);
 826 }
 827
 828 /**
 829  * Convert modify-header increment/decrement TCP Acknowledgment number
 830  * to DV specification.
 831  *
 832  * @param[in,out] resource
 833  *   Pointer to the modify-header resource.
 834  * @param[in] action
 835  *   Pointer to action specification.
 836  * @param[out] error
 837  *   Pointer to the error structure.
 838  *
 839  * @return
 840  *   0 on success, a negative errno value otherwise and rte_errno is set.
 841  */
 842 static int
 843 flow_dv_convert_action_modify_tcp_ack
 844                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 845                          const struct rte_flow_action *action,
 846                          struct rte_flow_error *error)
 847 {
 848         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 849         uint64_t value = rte_be_to_cpu_32(*conf);
 850         struct rte_flow_item item;
 851         struct rte_flow_item_tcp tcp;
 852         struct rte_flow_item_tcp tcp_mask;
 853
 854         memset(&tcp, 0, sizeof(tcp));
 855         memset(&tcp_mask, 0, sizeof(tcp_mask));
 856         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 857                 /*
 858                  * The HW has no decrement operation, only increment operation.
 859                  * To simulate decrement X from Y using increment operation
 860                  * we need to add UINT32_MAX X times to Y.
 861                  * Each adding of UINT32_MAX decrements Y by 1.
 862                  */
 863                 value *= UINT32_MAX;
 864         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 865         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 866         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 867         item.spec = &tcp;
 868         item.mask = &tcp_mask;
 869         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 870                                              MLX5_MODIFICATION_TYPE_ADD, error);
 871 }
 872
 873 static enum mlx5_modification_field reg_to_field[] = {
 874         [REG_NONE] = MLX5_MODI_OUT_NONE,
 875         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 876         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 877         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 878         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 879         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 880         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 881         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 882         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 883         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 884         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 885 };
 886
 887 /**
 888  * Convert register set to DV specification.
 889  *
 890  * @param[in,out] resource
 891  *   Pointer to the modify-header resource.
 892  * @param[in] action
 893  *   Pointer to action specification.
 894  * @param[out] error
 895  *   Pointer to the error structure.
 896  *
 897  * @return
 898  *   0 on success, a negative errno value otherwise and rte_errno is set.
 899  */
 900 static int
 901 flow_dv_convert_action_set_reg
 902                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 903                          const struct rte_flow_action *action,
 904                          struct rte_flow_error *error)
 905 {
 906         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 907         struct mlx5_modification_cmd *actions = resource->actions;
 908         uint32_t i = resource->actions_num;
 909
 910         if (i >= MLX5_MAX_MODIFY_NUM)
 911                 return rte_flow_error_set(error, EINVAL,
 912                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 913                                           "too many items to modify");
 914         assert(conf->id != REG_NONE);
 915         assert(conf->id < RTE_DIM(reg_to_field));
 916         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 917         actions[i].field = reg_to_field[conf->id];
 918         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 919         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 920         ++i;
 921         resource->actions_num = i;
 922         return 0;
 923 }
 924
 925 /**
 926  * Convert SET_TAG action to DV specification.
 927  *
 928  * @param[in] dev
 929  *   Pointer to the rte_eth_dev structure.
 930  * @param[in,out] resource
 931  *   Pointer to the modify-header resource.
 932  * @param[in] conf
 933  *   Pointer to action specification.
 934  * @param[out] error
 935  *   Pointer to the error structure.
 936  *
 937  * @return
 938  *   0 on success, a negative errno value otherwise and rte_errno is set.
 939  */
 940 static int
 941 flow_dv_convert_action_set_tag
 942                         (struct rte_eth_dev *dev,
 943                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 944                          const struct rte_flow_action_set_tag *conf,
 945                          struct rte_flow_error *error)
 946 {
 947         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 948         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 949         struct rte_flow_item item = {
 950                 .spec = &data,
 951                 .mask = &mask,
 952         };
 953         struct field_modify_info reg_c_x[] = {
 954                 [1] = {0, 0, 0},
 955         };
 956         enum mlx5_modification_field reg_type;
 957         int ret;
 958
 959         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 960         if (ret < 0)
 961                 return ret;
 962         assert(ret != REG_NONE);
 963         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 964         reg_type = reg_to_field[ret];
 965         assert(reg_type > 0);
 966         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 967         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 968                                              MLX5_MODIFICATION_TYPE_SET, error);
 969 }
 970
 971 /**
 972  * Convert internal COPY_REG action to DV specification.
 973  *
 974  * @param[in] dev
 975  *   Pointer to the rte_eth_dev structure.
 976  * @param[in,out] res
 977  *   Pointer to the modify-header resource.
 978  * @param[in] action
 979  *   Pointer to action specification.
 980  * @param[out] error
 981  *   Pointer to the error structure.
 982  *
 983  * @return
 984  *   0 on success, a negative errno value otherwise and rte_errno is set.
 985  */
 986 static int
 987 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 988                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 989                                  const struct rte_flow_action *action,
 990                                  struct rte_flow_error *error)
 991 {
 992         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 993         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 994         struct rte_flow_item item = {
 995                 .spec = NULL,
 996                 .mask = &mask,
 997         };
 998         struct field_modify_info reg_src[] = {
 999                 {4, 0, reg_to_field[conf->src]},
1000                 {0, 0, 0},
1001         };
1002         struct field_modify_info reg_dst = {
1003                 .offset = 0,
1004                 .id = reg_to_field[conf->dst],
1005         };
1006         /* Adjust reg_c[0] usage according to reported mask. */
1007         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1008                 struct mlx5_priv *priv = dev->data->dev_private;
1009                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1010
1011                 assert(reg_c0);
1012                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1013                 if (conf->dst == REG_C_0) {
1014                         /* Copy to reg_c[0], within mask only. */
1015                         reg_dst.offset = rte_bsf32(reg_c0);
1016                         /*
1017                          * Mask is ignoring the enianness, because
1018                          * there is no conversion in datapath.
1019                          */
1020 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1021                         /* Copy from destination lower bits to reg_c[0]. */
1022                         mask = reg_c0 >> reg_dst.offset;
1023 #else
1024                         /* Copy from destination upper bits to reg_c[0]. */
1025                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1026                                           rte_fls_u32(reg_c0));
1027 #endif
1028                 } else {
1029                         mask = rte_cpu_to_be_32(reg_c0);
1030 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1031                         /* Copy from reg_c[0] to destination lower bits. */
1032                         reg_dst.offset = 0;
1033 #else
1034                         /* Copy from reg_c[0] to destination upper bits. */
1035                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1036                                          (rte_fls_u32(reg_c0) -
1037                                           rte_bsf32(reg_c0));
1038 #endif
1039                 }
1040         }
1041         return flow_dv_convert_modify_action(&item,
1042                                              reg_src, &reg_dst, res,
1043                                              MLX5_MODIFICATION_TYPE_COPY,
1044                                              error);
1045 }
1046
1047 /**
1048  * Convert MARK action to DV specification. This routine is used
1049  * in extensive metadata only and requires metadata register to be
1050  * handled. In legacy mode hardware tag resource is engaged.
1051  *
1052  * @param[in] dev
1053  *   Pointer to the rte_eth_dev structure.
1054  * @param[in] conf
1055  *   Pointer to MARK action specification.
1056  * @param[in,out] resource
1057  *   Pointer to the modify-header resource.
1058  * @param[out] error
1059  *   Pointer to the error structure.
1060  *
1061  * @return
1062  *   0 on success, a negative errno value otherwise and rte_errno is set.
1063  */
1064 static int
1065 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1066                             const struct rte_flow_action_mark *conf,
1067                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1068                             struct rte_flow_error *error)
1069 {
1070         struct mlx5_priv *priv = dev->data->dev_private;
1071         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1072                                            priv->sh->dv_mark_mask);
1073         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1074         struct rte_flow_item item = {
1075                 .spec = &data,
1076                 .mask = &mask,
1077         };
1078         struct field_modify_info reg_c_x[] = {
1079                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1080                 {0, 0, 0},
1081         };
1082         int reg;
1083
1084         if (!mask)
1085                 return rte_flow_error_set(error, EINVAL,
1086                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1087                                           NULL, "zero mark action mask");
1088         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1089         if (reg < 0)
1090                 return reg;
1091         assert(reg > 0);
1092         if (reg == REG_C_0) {
1093                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1094                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1095
1096                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1097                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1098                 mask = rte_cpu_to_be_32(mask << shl_c0);
1099         }
1100         reg_c_x[0].id = reg_to_field[reg];
1101         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1102                                              MLX5_MODIFICATION_TYPE_SET, error);
1103 }
1104
1105 /**
1106  * Get metadata register index for specified steering domain.
1107  *
1108  * @param[in] dev
1109  *   Pointer to the rte_eth_dev structure.
1110  * @param[in] attr
1111  *   Attributes of flow to determine steering domain.
1112  * @param[out] error
1113  *   Pointer to the error structure.
1114  *
1115  * @return
1116  *   positive index on success, a negative errno value otherwise
1117  *   and rte_errno is set.
1118  */
1119 static enum modify_reg
1120 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1121                          const struct rte_flow_attr *attr,
1122                          struct rte_flow_error *error)
1123 {
1124         int reg =
1125                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1126                                           MLX5_METADATA_FDB :
1127                                             attr->egress ?
1128                                             MLX5_METADATA_TX :
1129                                             MLX5_METADATA_RX, 0, error);
1130         if (reg < 0)
1131                 return rte_flow_error_set(error,
1132                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1133                                           NULL, "unavailable "
1134                                           "metadata register");
1135         return reg;
1136 }
1137
1138 /**
1139  * Convert SET_META action to DV specification.
1140  *
1141  * @param[in] dev
1142  *   Pointer to the rte_eth_dev structure.
1143  * @param[in,out] resource
1144  *   Pointer to the modify-header resource.
1145  * @param[in] attr
1146  *   Attributes of flow that includes this item.
1147  * @param[in] conf
1148  *   Pointer to action specification.
1149  * @param[out] error
1150  *   Pointer to the error structure.
1151  *
1152  * @return
1153  *   0 on success, a negative errno value otherwise and rte_errno is set.
1154  */
1155 static int
1156 flow_dv_convert_action_set_meta
1157                         (struct rte_eth_dev *dev,
1158                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1159                          const struct rte_flow_attr *attr,
1160                          const struct rte_flow_action_set_meta *conf,
1161                          struct rte_flow_error *error)
1162 {
1163         uint32_t data = conf->data;
1164         uint32_t mask = conf->mask;
1165         struct rte_flow_item item = {
1166                 .spec = &data,
1167                 .mask = &mask,
1168         };
1169         struct field_modify_info reg_c_x[] = {
1170                 [1] = {0, 0, 0},
1171         };
1172         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1173
1174         if (reg < 0)
1175                 return reg;
1176         /*
1177          * In datapath code there is no endianness
1178          * coversions for perfromance reasons, all
1179          * pattern conversions are done in rte_flow.
1180          */
1181         if (reg == REG_C_0) {
1182                 struct mlx5_priv *priv = dev->data->dev_private;
1183                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1184                 uint32_t shl_c0;
1185
1186                 assert(msk_c0);
1187 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1188                 shl_c0 = rte_bsf32(msk_c0);
1189 #else
1190                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1191 #endif
1192                 mask <<= shl_c0;
1193                 data <<= shl_c0;
1194                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1195         }
1196         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1197         /* The routine expects parameters in memory as big-endian ones. */
1198         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1199                                              MLX5_MODIFICATION_TYPE_SET, error);
1200 }
1201
1202 /**
1203  * Convert modify-header set IPv4 DSCP action to DV specification.
1204  *
1205  * @param[in,out] resource
1206  *   Pointer to the modify-header resource.
1207  * @param[in] action
1208  *   Pointer to action specification.
1209  * @param[out] error
1210  *   Pointer to the error structure.
1211  *
1212  * @return
1213  *   0 on success, a negative errno value otherwise and rte_errno is set.
1214  */
1215 static int
1216 flow_dv_convert_action_modify_ipv4_dscp
1217                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1218                          const struct rte_flow_action *action,
1219                          struct rte_flow_error *error)
1220 {
1221         const struct rte_flow_action_set_dscp *conf =
1222                 (const struct rte_flow_action_set_dscp *)(action->conf);
1223         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1224         struct rte_flow_item_ipv4 ipv4;
1225         struct rte_flow_item_ipv4 ipv4_mask;
1226
1227         memset(&ipv4, 0, sizeof(ipv4));
1228         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1229         ipv4.hdr.type_of_service = conf->dscp;
1230         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1231         item.spec = &ipv4;
1232         item.mask = &ipv4_mask;
1233         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1234                                              MLX5_MODIFICATION_TYPE_SET, error);
1235 }
1236
1237 /**
1238  * Convert modify-header set IPv6 DSCP action to DV specification.
1239  *
1240  * @param[in,out] resource
1241  *   Pointer to the modify-header resource.
1242  * @param[in] action
1243  *   Pointer to action specification.
1244  * @param[out] error
1245  *   Pointer to the error structure.
1246  *
1247  * @return
1248  *   0 on success, a negative errno value otherwise and rte_errno is set.
1249  */
1250 static int
1251 flow_dv_convert_action_modify_ipv6_dscp
1252                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1253                          const struct rte_flow_action *action,
1254                          struct rte_flow_error *error)
1255 {
1256         const struct rte_flow_action_set_dscp *conf =
1257                 (const struct rte_flow_action_set_dscp *)(action->conf);
1258         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1259         struct rte_flow_item_ipv6 ipv6;
1260         struct rte_flow_item_ipv6 ipv6_mask;
1261
1262         memset(&ipv6, 0, sizeof(ipv6));
1263         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1264         /*
1265          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1266          * rdma-core only accept the DSCP bits byte aligned start from
1267          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1268          * bits in IPv6 case as rdma-core requires byte aligned value.
1269          */
1270         ipv6.hdr.vtc_flow = conf->dscp;
1271         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1272         item.spec = &ipv6;
1273         item.mask = &ipv6_mask;
1274         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1275                                              MLX5_MODIFICATION_TYPE_SET, error);
1276 }
1277
1278 /**
1279  * Validate MARK item.
1280  *
1281  * @param[in] dev
1282  *   Pointer to the rte_eth_dev structure.
1283  * @param[in] item
1284  *   Item specification.
1285  * @param[in] attr
1286  *   Attributes of flow that includes this item.
1287  * @param[out] error
1288  *   Pointer to error structure.
1289  *
1290  * @return
1291  *   0 on success, a negative errno value otherwise and rte_errno is set.
1292  */
1293 static int
1294 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1295                            const struct rte_flow_item *item,
1296                            const struct rte_flow_attr *attr __rte_unused,
1297                            struct rte_flow_error *error)
1298 {
1299         struct mlx5_priv *priv = dev->data->dev_private;
1300         struct mlx5_dev_config *config = &priv->config;
1301         const struct rte_flow_item_mark *spec = item->spec;
1302         const struct rte_flow_item_mark *mask = item->mask;
1303         const struct rte_flow_item_mark nic_mask = {
1304                 .id = priv->sh->dv_mark_mask,
1305         };
1306         int ret;
1307
1308         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1309                 return rte_flow_error_set(error, ENOTSUP,
1310                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1311                                           "extended metadata feature"
1312                                           " isn't enabled");
1313         if (!mlx5_flow_ext_mreg_supported(dev))
1314                 return rte_flow_error_set(error, ENOTSUP,
1315                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1316                                           "extended metadata register"
1317                                           " isn't supported");
1318         if (!nic_mask.id)
1319                 return rte_flow_error_set(error, ENOTSUP,
1320                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1321                                           "extended metadata register"
1322                                           " isn't available");
1323         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1324         if (ret < 0)
1325                 return ret;
1326         if (!spec)
1327                 return rte_flow_error_set(error, EINVAL,
1328                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1329                                           item->spec,
1330                                           "data cannot be empty");
1331         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1332                 return rte_flow_error_set(error, EINVAL,
1333                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1334                                           &spec->id,
1335                                           "mark id exceeds the limit");
1336         if (!mask)
1337                 mask = &nic_mask;
1338         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1339                                         (const uint8_t *)&nic_mask,
1340                                         sizeof(struct rte_flow_item_mark),
1341                                         error);
1342         if (ret < 0)
1343                 return ret;
1344         return 0;
1345 }
1346
1347 /**
1348  * Validate META item.
1349  *
1350  * @param[in] dev
1351  *   Pointer to the rte_eth_dev structure.
1352  * @param[in] item
1353  *   Item specification.
1354  * @param[in] attr
1355  *   Attributes of flow that includes this item.
1356  * @param[out] error
1357  *   Pointer to error structure.
1358  *
1359  * @return
1360  *   0 on success, a negative errno value otherwise and rte_errno is set.
1361  */
1362 static int
1363 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1364                            const struct rte_flow_item *item,
1365                            const struct rte_flow_attr *attr,
1366                            struct rte_flow_error *error)
1367 {
1368         struct mlx5_priv *priv = dev->data->dev_private;
1369         struct mlx5_dev_config *config = &priv->config;
1370         const struct rte_flow_item_meta *spec = item->spec;
1371         const struct rte_flow_item_meta *mask = item->mask;
1372         struct rte_flow_item_meta nic_mask = {
1373                 .data = UINT32_MAX
1374         };
1375         int reg;
1376         int ret;
1377
1378         if (!spec)
1379                 return rte_flow_error_set(error, EINVAL,
1380                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1381                                           item->spec,
1382                                           "data cannot be empty");
1383         if (!spec->data)
1384                 return rte_flow_error_set(error, EINVAL,
1385                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1386                                           "data cannot be zero");
1387         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1388                 if (!mlx5_flow_ext_mreg_supported(dev))
1389                         return rte_flow_error_set(error, ENOTSUP,
1390                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1391                                           "extended metadata register"
1392                                           " isn't supported");
1393                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1394                 if (reg < 0)
1395                         return reg;
1396                 if (reg == REG_B)
1397                         return rte_flow_error_set(error, ENOTSUP,
1398                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1399                                           "match on reg_b "
1400                                           "isn't supported");
1401                 if (reg != REG_A)
1402                         nic_mask.data = priv->sh->dv_meta_mask;
1403         }
1404         if (!mask)
1405                 mask = &rte_flow_item_meta_mask;
1406         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1407                                         (const uint8_t *)&nic_mask,
1408                                         sizeof(struct rte_flow_item_meta),
1409                                         error);
1410         return ret;
1411 }
1412
1413 /**
1414  * Validate TAG item.
1415  *
1416  * @param[in] dev
1417  *   Pointer to the rte_eth_dev structure.
1418  * @param[in] item
1419  *   Item specification.
1420  * @param[in] attr
1421  *   Attributes of flow that includes this item.
1422  * @param[out] error
1423  *   Pointer to error structure.
1424  *
1425  * @return
1426  *   0 on success, a negative errno value otherwise and rte_errno is set.
1427  */
1428 static int
1429 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1430                           const struct rte_flow_item *item,
1431                           const struct rte_flow_attr *attr __rte_unused,
1432                           struct rte_flow_error *error)
1433 {
1434         const struct rte_flow_item_tag *spec = item->spec;
1435         const struct rte_flow_item_tag *mask = item->mask;
1436         const struct rte_flow_item_tag nic_mask = {
1437                 .data = RTE_BE32(UINT32_MAX),
1438                 .index = 0xff,
1439         };
1440         int ret;
1441
1442         if (!mlx5_flow_ext_mreg_supported(dev))
1443                 return rte_flow_error_set(error, ENOTSUP,
1444                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1445                                           "extensive metadata register"
1446                                           " isn't supported");
1447         if (!spec)
1448                 return rte_flow_error_set(error, EINVAL,
1449                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1450                                           item->spec,
1451                                           "data cannot be empty");
1452         if (!mask)
1453                 mask = &rte_flow_item_tag_mask;
1454         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1455                                         (const uint8_t *)&nic_mask,
1456                                         sizeof(struct rte_flow_item_tag),
1457                                         error);
1458         if (ret < 0)
1459                 return ret;
1460         if (mask->index != 0xff)
1461                 return rte_flow_error_set(error, EINVAL,
1462                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1463                                           "partial mask for tag index"
1464                                           " is not supported");
1465         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1466         if (ret < 0)
1467                 return ret;
1468         assert(ret != REG_NONE);
1469         return 0;
1470 }
1471
1472 /**
1473  * Validate vport item.
1474  *
1475  * @param[in] dev
1476  *   Pointer to the rte_eth_dev structure.
1477  * @param[in] item
1478  *   Item specification.
1479  * @param[in] attr
1480  *   Attributes of flow that includes this item.
1481  * @param[in] item_flags
1482  *   Bit-fields that holds the items detected until now.
1483  * @param[out] error
1484  *   Pointer to error structure.
1485  *
1486  * @return
1487  *   0 on success, a negative errno value otherwise and rte_errno is set.
1488  */
1489 static int
1490 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1491                               const struct rte_flow_item *item,
1492                               const struct rte_flow_attr *attr,
1493                               uint64_t item_flags,
1494                               struct rte_flow_error *error)
1495 {
1496         const struct rte_flow_item_port_id *spec = item->spec;
1497         const struct rte_flow_item_port_id *mask = item->mask;
1498         const struct rte_flow_item_port_id switch_mask = {
1499                         .id = 0xffffffff,
1500         };
1501         struct mlx5_priv *esw_priv;
1502         struct mlx5_priv *dev_priv;
1503         int ret;
1504
1505         if (!attr->transfer)
1506                 return rte_flow_error_set(error, EINVAL,
1507                                           RTE_FLOW_ERROR_TYPE_ITEM,
1508                                           NULL,
1509                                           "match on port id is valid only"
1510                                           " when transfer flag is enabled");
1511         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1512                 return rte_flow_error_set(error, ENOTSUP,
1513                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1514                                           "multiple source ports are not"
1515                                           " supported");
1516         if (!mask)
1517                 mask = &switch_mask;
1518         if (mask->id != 0xffffffff)
1519                 return rte_flow_error_set(error, ENOTSUP,
1520                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1521                                            mask,
1522                                            "no support for partial mask on"
1523                                            " \"id\" field");
1524         ret = mlx5_flow_item_acceptable
1525                                 (item, (const uint8_t *)mask,
1526                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1527                                  sizeof(struct rte_flow_item_port_id),
1528                                  error);
1529         if (ret)
1530                 return ret;
1531         if (!spec)
1532                 return 0;
1533         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1534         if (!esw_priv)
1535                 return rte_flow_error_set(error, rte_errno,
1536                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1537                                           "failed to obtain E-Switch info for"
1538                                           " port");
1539         dev_priv = mlx5_dev_to_eswitch_info(dev);
1540         if (!dev_priv)
1541                 return rte_flow_error_set(error, rte_errno,
1542                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1543                                           NULL,
1544                                           "failed to obtain E-Switch info");
1545         if (esw_priv->domain_id != dev_priv->domain_id)
1546                 return rte_flow_error_set(error, EINVAL,
1547                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1548                                           "cannot match on a port from a"
1549                                           " different E-Switch");
1550         return 0;
1551 }
1552
1553 /**
1554  * Validate GTP item.
1555  *
1556  * @param[in] dev
1557  *   Pointer to the rte_eth_dev structure.
1558  * @param[in] item
1559  *   Item specification.
1560  * @param[in] item_flags
1561  *   Bit-fields that holds the items detected until now.
1562  * @param[out] error
1563  *   Pointer to error structure.
1564  *
1565  * @return
1566  *   0 on success, a negative errno value otherwise and rte_errno is set.
1567  */
1568 static int
1569 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1570                           const struct rte_flow_item *item,
1571                           uint64_t item_flags,
1572                           struct rte_flow_error *error)
1573 {
1574         struct mlx5_priv *priv = dev->data->dev_private;
1575         const struct rte_flow_item_gtp *mask = item->mask;
1576         const struct rte_flow_item_gtp nic_mask = {
1577                 .msg_type = 0xff,
1578                 .teid = RTE_BE32(0xffffffff),
1579         };
1580
1581         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1582                 return rte_flow_error_set(error, ENOTSUP,
1583                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1584                                           "GTP support is not enabled");
1585         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1586                 return rte_flow_error_set(error, ENOTSUP,
1587                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1588                                           "multiple tunnel layers not"
1589                                           " supported");
1590         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1591                 return rte_flow_error_set(error, EINVAL,
1592                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1593                                           "no outer UDP layer found");
1594         if (!mask)
1595                 mask = &rte_flow_item_gtp_mask;
1596         return mlx5_flow_item_acceptable
1597                 (item, (const uint8_t *)mask,
1598                  (const uint8_t *)&nic_mask,
1599                  sizeof(struct rte_flow_item_gtp),
1600                  error);
1601 }
1602
1603 /**
1604  * Validate the pop VLAN action.
1605  *
1606  * @param[in] dev
1607  *   Pointer to the rte_eth_dev structure.
1608  * @param[in] action_flags
1609  *   Holds the actions detected until now.
1610  * @param[in] action
1611  *   Pointer to the pop vlan action.
1612  * @param[in] item_flags
1613  *   The items found in this flow rule.
1614  * @param[in] attr
1615  *   Pointer to flow attributes.
1616  * @param[out] error
1617  *   Pointer to error structure.
1618  *
1619  * @return
1620  *   0 on success, a negative errno value otherwise and rte_errno is set.
1621  */
1622 static int
1623 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1624                                  uint64_t action_flags,
1625                                  const struct rte_flow_action *action,
1626                                  uint64_t item_flags,
1627                                  const struct rte_flow_attr *attr,
1628                                  struct rte_flow_error *error)
1629 {
1630         struct mlx5_priv *priv = dev->data->dev_private;
1631
1632         (void)action;
1633         (void)attr;
1634         if (!priv->sh->pop_vlan_action)
1635                 return rte_flow_error_set(error, ENOTSUP,
1636                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1637                                           NULL,
1638                                           "pop vlan action is not supported");
1639         if (attr->egress)
1640                 return rte_flow_error_set(error, ENOTSUP,
1641                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1642                                           NULL,
1643                                           "pop vlan action not supported for "
1644                                           "egress");
1645         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1646                 return rte_flow_error_set(error, ENOTSUP,
1647                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1648                                           "no support for multiple VLAN "
1649                                           "actions");
1650         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1651                 return rte_flow_error_set(error, ENOTSUP,
1652                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1653                                           NULL,
1654                                           "cannot pop vlan without a "
1655                                           "match on (outer) vlan in the flow");
1656         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1657                 return rte_flow_error_set(error, EINVAL,
1658                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1659                                           "wrong action order, port_id should "
1660                                           "be after pop VLAN action");
1661         return 0;
1662 }
1663
1664 /**
1665  * Get VLAN default info from vlan match info.
1666  *
1667  * @param[in] items
1668  *   the list of item specifications.
1669  * @param[out] vlan
1670  *   pointer VLAN info to fill to.
1671  *
1672  * @return
1673  *   0 on success, a negative errno value otherwise and rte_errno is set.
1674  */
1675 static void
1676 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1677                                   struct rte_vlan_hdr *vlan)
1678 {
1679         const struct rte_flow_item_vlan nic_mask = {
1680                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1681                                 MLX5DV_FLOW_VLAN_VID_MASK),
1682                 .inner_type = RTE_BE16(0xffff),
1683         };
1684
1685         if (items == NULL)
1686                 return;
1687         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1688                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1689                 ;
1690         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1691                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1692                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1693
1694                 if (!vlan_m)
1695                         vlan_m = &nic_mask;
1696                 /* Only full match values are accepted */
1697                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1698                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1699                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1700                         vlan->vlan_tci |=
1701                                 rte_be_to_cpu_16(vlan_v->tci &
1702                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1703                 }
1704                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1705                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1706                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1707                         vlan->vlan_tci |=
1708                                 rte_be_to_cpu_16(vlan_v->tci &
1709                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1710                 }
1711                 if (vlan_m->inner_type == nic_mask.inner_type)
1712                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1713                                                            vlan_m->inner_type);
1714         }
1715 }
1716
1717 /**
1718  * Validate the push VLAN action.
1719  *
1720  * @param[in] action_flags
1721  *   Holds the actions detected until now.
1722  * @param[in] item_flags
1723  *   The items found in this flow rule.
1724  * @param[in] action
1725  *   Pointer to the action structure.
1726  * @param[in] attr
1727  *   Pointer to flow attributes
1728  * @param[out] error
1729  *   Pointer to error structure.
1730  *
1731  * @return
1732  *   0 on success, a negative errno value otherwise and rte_errno is set.
1733  */
1734 static int
1735 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1736                                   uint64_t item_flags __rte_unused,
1737                                   const struct rte_flow_action *action,
1738                                   const struct rte_flow_attr *attr,
1739                                   struct rte_flow_error *error)
1740 {
1741         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1742
1743         if (attr->ingress)
1744                 return rte_flow_error_set(error, ENOTSUP,
1745                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1746                                           NULL,
1747                                           "push VLAN action not supported for "
1748                                           "ingress");
1749         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1750             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1751                 return rte_flow_error_set(error, EINVAL,
1752                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1753                                           "invalid vlan ethertype");
1754         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1755                 return rte_flow_error_set(error, ENOTSUP,
1756                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1757                                           "no support for multiple VLAN "
1758                                           "actions");
1759         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1760                 return rte_flow_error_set(error, EINVAL,
1761                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1762                                           "wrong action order, port_id should "
1763                                           "be after push VLAN");
1764         (void)attr;
1765         return 0;
1766 }
1767
1768 /**
1769  * Validate the set VLAN PCP.
1770  *
1771  * @param[in] action_flags
1772  *   Holds the actions detected until now.
1773  * @param[in] actions
1774  *   Pointer to the list of actions remaining in the flow rule.
1775  * @param[out] error
1776  *   Pointer to error structure.
1777  *
1778  * @return
1779  *   0 on success, a negative errno value otherwise and rte_errno is set.
1780  */
1781 static int
1782 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1783                                      const struct rte_flow_action actions[],
1784                                      struct rte_flow_error *error)
1785 {
1786         const struct rte_flow_action *action = actions;
1787         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1788
1789         if (conf->vlan_pcp > 7)
1790                 return rte_flow_error_set(error, EINVAL,
1791                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1792                                           "VLAN PCP value is too big");
1793         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1794                 return rte_flow_error_set(error, ENOTSUP,
1795                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1796                                           "set VLAN PCP action must follow "
1797                                           "the push VLAN action");
1798         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1799                 return rte_flow_error_set(error, ENOTSUP,
1800                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1801                                           "Multiple VLAN PCP modification are "
1802                                           "not supported");
1803         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1804                 return rte_flow_error_set(error, EINVAL,
1805                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1806                                           "wrong action order, port_id should "
1807                                           "be after set VLAN PCP");
1808         return 0;
1809 }
1810
1811 /**
1812  * Validate the set VLAN VID.
1813  *
1814  * @param[in] item_flags
1815  *   Holds the items detected in this rule.
1816  * @param[in] action_flags
1817  *   Holds the actions detected until now.
1818  * @param[in] actions
1819  *   Pointer to the list of actions remaining in the flow rule.
1820  * @param[out] error
1821  *   Pointer to error structure.
1822  *
1823  * @return
1824  *   0 on success, a negative errno value otherwise and rte_errno is set.
1825  */
1826 static int
1827 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1828                                      uint64_t action_flags,
1829                                      const struct rte_flow_action actions[],
1830                                      struct rte_flow_error *error)
1831 {
1832         const struct rte_flow_action *action = actions;
1833         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1834
1835         if (conf->vlan_vid > RTE_BE16(0xFFE))
1836                 return rte_flow_error_set(error, EINVAL,
1837                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1838                                           "VLAN VID value is too big");
1839         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1840             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1841                 return rte_flow_error_set(error, ENOTSUP,
1842                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1843                                           "set VLAN VID action must follow push"
1844                                           " VLAN action or match on VLAN item");
1845         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1846                 return rte_flow_error_set(error, ENOTSUP,
1847                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1848                                           "Multiple VLAN VID modifications are "
1849                                           "not supported");
1850         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1851                 return rte_flow_error_set(error, EINVAL,
1852                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1853                                           "wrong action order, port_id should "
1854                                           "be after set VLAN VID");
1855         return 0;
1856 }
1857
1858 /*
1859  * Validate the FLAG action.
1860  *
1861  * @param[in] dev
1862  *   Pointer to the rte_eth_dev structure.
1863  * @param[in] action_flags
1864  *   Holds the actions detected until now.
1865  * @param[in] attr
1866  *   Pointer to flow attributes
1867  * @param[out] error
1868  *   Pointer to error structure.
1869  *
1870  * @return
1871  *   0 on success, a negative errno value otherwise and rte_errno is set.
1872  */
1873 static int
1874 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1875                              uint64_t action_flags,
1876                              const struct rte_flow_attr *attr,
1877                              struct rte_flow_error *error)
1878 {
1879         struct mlx5_priv *priv = dev->data->dev_private;
1880         struct mlx5_dev_config *config = &priv->config;
1881         int ret;
1882
1883         /* Fall back if no extended metadata register support. */
1884         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1885                 return mlx5_flow_validate_action_flag(action_flags, attr,
1886                                                       error);
1887         /* Extensive metadata mode requires registers. */
1888         if (!mlx5_flow_ext_mreg_supported(dev))
1889                 return rte_flow_error_set(error, ENOTSUP,
1890                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1891                                           "no metadata registers "
1892                                           "to support flag action");
1893         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1894                 return rte_flow_error_set(error, ENOTSUP,
1895                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1896                                           "extended metadata register"
1897                                           " isn't available");
1898         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1899         if (ret < 0)
1900                 return ret;
1901         assert(ret > 0);
1902         if (action_flags & MLX5_FLOW_ACTION_MARK)
1903                 return rte_flow_error_set(error, EINVAL,
1904                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1905                                           "can't mark and flag in same flow");
1906         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1907                 return rte_flow_error_set(error, EINVAL,
1908                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1909                                           "can't have 2 flag"
1910                                           " actions in same flow");
1911         return 0;
1912 }
1913
1914 /**
1915  * Validate MARK action.
1916  *
1917  * @param[in] dev
1918  *   Pointer to the rte_eth_dev structure.
1919  * @param[in] action
1920  *   Pointer to action.
1921  * @param[in] action_flags
1922  *   Holds the actions detected until now.
1923  * @param[in] attr
1924  *   Pointer to flow attributes
1925  * @param[out] error
1926  *   Pointer to error structure.
1927  *
1928  * @return
1929  *   0 on success, a negative errno value otherwise and rte_errno is set.
1930  */
1931 static int
1932 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1933                              const struct rte_flow_action *action,
1934                              uint64_t action_flags,
1935                              const struct rte_flow_attr *attr,
1936                              struct rte_flow_error *error)
1937 {
1938         struct mlx5_priv *priv = dev->data->dev_private;
1939         struct mlx5_dev_config *config = &priv->config;
1940         const struct rte_flow_action_mark *mark = action->conf;
1941         int ret;
1942
1943         /* Fall back if no extended metadata register support. */
1944         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1945                 return mlx5_flow_validate_action_mark(action, action_flags,
1946                                                       attr, error);
1947         /* Extensive metadata mode requires registers. */
1948         if (!mlx5_flow_ext_mreg_supported(dev))
1949                 return rte_flow_error_set(error, ENOTSUP,
1950                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1951                                           "no metadata registers "
1952                                           "to support mark action");
1953         if (!priv->sh->dv_mark_mask)
1954                 return rte_flow_error_set(error, ENOTSUP,
1955                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1956                                           "extended metadata register"
1957                                           " isn't available");
1958         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1959         if (ret < 0)
1960                 return ret;
1961         assert(ret > 0);
1962         if (!mark)
1963                 return rte_flow_error_set(error, EINVAL,
1964                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1965                                           "configuration cannot be null");
1966         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1967                 return rte_flow_error_set(error, EINVAL,
1968                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1969                                           &mark->id,
1970                                           "mark id exceeds the limit");
1971         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1972                 return rte_flow_error_set(error, EINVAL,
1973                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1974                                           "can't flag and mark in same flow");
1975         if (action_flags & MLX5_FLOW_ACTION_MARK)
1976                 return rte_flow_error_set(error, EINVAL,
1977                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1978                                           "can't have 2 mark actions in same"
1979                                           " flow");
1980         return 0;
1981 }
1982
1983 /**
1984  * Validate SET_META action.
1985  *
1986  * @param[in] dev
1987  *   Pointer to the rte_eth_dev structure.
1988  * @param[in] action
1989  *   Pointer to the action structure.
1990  * @param[in] action_flags
1991  *   Holds the actions detected until now.
1992  * @param[in] attr
1993  *   Pointer to flow attributes
1994  * @param[out] error
1995  *   Pointer to error structure.
1996  *
1997  * @return
1998  *   0 on success, a negative errno value otherwise and rte_errno is set.
1999  */
2000 static int
2001 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2002                                  const struct rte_flow_action *action,
2003                                  uint64_t action_flags __rte_unused,
2004                                  const struct rte_flow_attr *attr,
2005                                  struct rte_flow_error *error)
2006 {
2007         const struct rte_flow_action_set_meta *conf;
2008         uint32_t nic_mask = UINT32_MAX;
2009         int reg;
2010
2011         if (!mlx5_flow_ext_mreg_supported(dev))
2012                 return rte_flow_error_set(error, ENOTSUP,
2013                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2014                                           "extended metadata register"
2015                                           " isn't supported");
2016         reg = flow_dv_get_metadata_reg(dev, attr, error);
2017         if (reg < 0)
2018                 return reg;
2019         if (reg != REG_A && reg != REG_B) {
2020                 struct mlx5_priv *priv = dev->data->dev_private;
2021
2022                 nic_mask = priv->sh->dv_meta_mask;
2023         }
2024         if (!(action->conf))
2025                 return rte_flow_error_set(error, EINVAL,
2026                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2027                                           "configuration cannot be null");
2028         conf = (const struct rte_flow_action_set_meta *)action->conf;
2029         if (!conf->mask)
2030                 return rte_flow_error_set(error, EINVAL,
2031                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2032                                           "zero mask doesn't have any effect");
2033         if (conf->mask & ~nic_mask)
2034                 return rte_flow_error_set(error, EINVAL,
2035                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2036                                           "meta data must be within reg C0");
2037         if (!(conf->data & conf->mask))
2038                 return rte_flow_error_set(error, EINVAL,
2039                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2040                                           "zero value has no effect");
2041         return 0;
2042 }
2043
2044 /**
2045  * Validate SET_TAG action.
2046  *
2047  * @param[in] dev
2048  *   Pointer to the rte_eth_dev structure.
2049  * @param[in] action
2050  *   Pointer to the action structure.
2051  * @param[in] action_flags
2052  *   Holds the actions detected until now.
2053  * @param[in] attr
2054  *   Pointer to flow attributes
2055  * @param[out] error
2056  *   Pointer to error structure.
2057  *
2058  * @return
2059  *   0 on success, a negative errno value otherwise and rte_errno is set.
2060  */
2061 static int
2062 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2063                                 const struct rte_flow_action *action,
2064                                 uint64_t action_flags,
2065                                 const struct rte_flow_attr *attr,
2066                                 struct rte_flow_error *error)
2067 {
2068         const struct rte_flow_action_set_tag *conf;
2069         const uint64_t terminal_action_flags =
2070                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2071                 MLX5_FLOW_ACTION_RSS;
2072         int ret;
2073
2074         if (!mlx5_flow_ext_mreg_supported(dev))
2075                 return rte_flow_error_set(error, ENOTSUP,
2076                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2077                                           "extensive metadata register"
2078                                           " isn't supported");
2079         if (!(action->conf))
2080                 return rte_flow_error_set(error, EINVAL,
2081                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2082                                           "configuration cannot be null");
2083         conf = (const struct rte_flow_action_set_tag *)action->conf;
2084         if (!conf->mask)
2085                 return rte_flow_error_set(error, EINVAL,
2086                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2087                                           "zero mask doesn't have any effect");
2088         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2089         if (ret < 0)
2090                 return ret;
2091         if (!attr->transfer && attr->ingress &&
2092             (action_flags & terminal_action_flags))
2093                 return rte_flow_error_set(error, EINVAL,
2094                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2095                                           "set_tag has no effect"
2096                                           " with terminal actions");
2097         return 0;
2098 }
2099
2100 /**
2101  * Validate count action.
2102  *
2103  * @param[in] dev
2104  *   Pointer to rte_eth_dev structure.
2105  * @param[out] error
2106  *   Pointer to error structure.
2107  *
2108  * @return
2109  *   0 on success, a negative errno value otherwise and rte_errno is set.
2110  */
2111 static int
2112 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2113                               struct rte_flow_error *error)
2114 {
2115         struct mlx5_priv *priv = dev->data->dev_private;
2116
2117         if (!priv->config.devx)
2118                 goto notsup_err;
2119 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2120         return 0;
2121 #endif
2122 notsup_err:
2123         return rte_flow_error_set
2124                       (error, ENOTSUP,
2125                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2126                        NULL,
2127                        "count action not supported");
2128 }
2129
2130 /**
2131  * Validate the L2 encap action.
2132  *
2133  * @param[in] action_flags
2134  *   Holds the actions detected until now.
2135  * @param[in] action
2136  *   Pointer to the action structure.
2137  * @param[in] attr
2138  *   Pointer to flow attributes
2139  * @param[out] error
2140  *   Pointer to error structure.
2141  *
2142  * @return
2143  *   0 on success, a negative errno value otherwise and rte_errno is set.
2144  */
2145 static int
2146 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2147                                  const struct rte_flow_action *action,
2148                                  const struct rte_flow_attr *attr,
2149                                  struct rte_flow_error *error)
2150 {
2151         if (!(action->conf))
2152                 return rte_flow_error_set(error, EINVAL,
2153                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2154                                           "configuration cannot be null");
2155         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2156                 return rte_flow_error_set(error, EINVAL,
2157                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2158                                           "can only have a single encap or"
2159                                           " decap action in a flow");
2160         if (!attr->transfer && attr->ingress)
2161                 return rte_flow_error_set(error, ENOTSUP,
2162                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2163                                           NULL,
2164                                           "encap action not supported for "
2165                                           "ingress");
2166         return 0;
2167 }
2168
2169 /**
2170  * Validate the L2 decap action.
2171  *
2172  * @param[in] action_flags
2173  *   Holds the actions detected until now.
2174  * @param[in] attr
2175  *   Pointer to flow attributes
2176  * @param[out] error
2177  *   Pointer to error structure.
2178  *
2179  * @return
2180  *   0 on success, a negative errno value otherwise and rte_errno is set.
2181  */
2182 static int
2183 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2184                                  const struct rte_flow_attr *attr,
2185                                  struct rte_flow_error *error)
2186 {
2187         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2188                 return rte_flow_error_set(error, EINVAL,
2189                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2190                                           "can only have a single encap or"
2191                                           " decap action in a flow");
2192         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2193                 return rte_flow_error_set(error, EINVAL,
2194                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2195                                           "can't have decap action after"
2196                                           " modify action");
2197         if (attr->egress)
2198                 return rte_flow_error_set(error, ENOTSUP,
2199                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2200                                           NULL,
2201                                           "decap action not supported for "
2202                                           "egress");
2203         return 0;
2204 }
2205
2206 /**
2207  * Validate the raw encap action.
2208  *
2209  * @param[in] action_flags
2210  *   Holds the actions detected until now.
2211  * @param[in] action
2212  *   Pointer to the encap action.
2213  * @param[in] attr
2214  *   Pointer to flow attributes
2215  * @param[out] error
2216  *   Pointer to error structure.
2217  *
2218  * @return
2219  *   0 on success, a negative errno value otherwise and rte_errno is set.
2220  */
2221 static int
2222 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2223                                   const struct rte_flow_action *action,
2224                                   const struct rte_flow_attr *attr,
2225                                   struct rte_flow_error *error)
2226 {
2227         const struct rte_flow_action_raw_encap *raw_encap =
2228                 (const struct rte_flow_action_raw_encap *)action->conf;
2229         if (!(action->conf))
2230                 return rte_flow_error_set(error, EINVAL,
2231                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2232                                           "configuration cannot be null");
2233         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2234                 return rte_flow_error_set(error, EINVAL,
2235                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2236                                           "can only have a single encap"
2237                                           " action in a flow");
2238         /* encap without preceding decap is not supported for ingress */
2239         if (!attr->transfer &&  attr->ingress &&
2240             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2241                 return rte_flow_error_set(error, ENOTSUP,
2242                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2243                                           NULL,
2244                                           "encap action not supported for "
2245                                           "ingress");
2246         if (!raw_encap->size || !raw_encap->data)
2247                 return rte_flow_error_set(error, EINVAL,
2248                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2249                                           "raw encap data cannot be empty");
2250         return 0;
2251 }
2252
2253 /**
2254  * Validate the raw decap action.
2255  *
2256  * @param[in] action_flags
2257  *   Holds the actions detected until now.
2258  * @param[in] action
2259  *   Pointer to the encap action.
2260  * @param[in] attr
2261  *   Pointer to flow attributes
2262  * @param[out] error
2263  *   Pointer to error structure.
2264  *
2265  * @return
2266  *   0 on success, a negative errno value otherwise and rte_errno is set.
2267  */
2268 static int
2269 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2270                                   const struct rte_flow_action *action,
2271                                   const struct rte_flow_attr *attr,
2272                                   struct rte_flow_error *error)
2273 {
2274         const struct rte_flow_action_raw_decap *decap   = action->conf;
2275
2276         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2277                 return rte_flow_error_set(error, EINVAL,
2278                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2279                                           "can't have encap action before"
2280                                           " decap action");
2281         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2282                 return rte_flow_error_set(error, EINVAL,
2283                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2284                                           "can only have a single decap"
2285                                           " action in a flow");
2286         /* decap action is valid on egress only if it is followed by encap */
2287         if (attr->egress && decap &&
2288             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2289                 return rte_flow_error_set(error, ENOTSUP,
2290                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2291                                           NULL, "decap action not supported"
2292                                           " for egress");
2293         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2294                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2295                 return rte_flow_error_set(error, EINVAL,
2296                                           RTE_FLOW_ERROR_TYPE_ACTION,
2297                                           NULL,
2298                                           "can't have decap action "
2299                                           "after modify action");
2300         }
2301         return 0;
2302 }
2303
2304 /**
2305  * Find existing encap/decap resource or create and register a new one.
2306  *
2307  * @param[in, out] dev
2308  *   Pointer to rte_eth_dev structure.
2309  * @param[in, out] resource
2310  *   Pointer to encap/decap resource.
2311  * @parm[in, out] dev_flow
2312  *   Pointer to the dev_flow.
2313  * @param[out] error
2314  *   pointer to error structure.
2315  *
2316  * @return
2317  *   0 on success otherwise -errno and errno is set.
2318  */
2319 static int
2320 flow_dv_encap_decap_resource_register
2321                         (struct rte_eth_dev *dev,
2322                          struct mlx5_flow_dv_encap_decap_resource *resource,
2323                          struct mlx5_flow *dev_flow,
2324                          struct rte_flow_error *error)
2325 {
2326         struct mlx5_priv *priv = dev->data->dev_private;
2327         struct mlx5_ibv_shared *sh = priv->sh;
2328         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2329         struct mlx5dv_dr_domain *domain;
2330
2331         resource->flags = dev_flow->group ? 0 : 1;
2332         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2333                 domain = sh->fdb_domain;
2334         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2335                 domain = sh->rx_domain;
2336         else
2337                 domain = sh->tx_domain;
2338         /* Lookup a matching resource from cache. */
2339         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2340                 if (resource->reformat_type == cache_resource->reformat_type &&
2341                     resource->ft_type == cache_resource->ft_type &&
2342                     resource->flags == cache_resource->flags &&
2343                     resource->size == cache_resource->size &&
2344                     !memcmp((const void *)resource->buf,
2345                             (const void *)cache_resource->buf,
2346                             resource->size)) {
2347                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2348                                 (void *)cache_resource,
2349                                 rte_atomic32_read(&cache_resource->refcnt));
2350                         rte_atomic32_inc(&cache_resource->refcnt);
2351                         dev_flow->dv.encap_decap = cache_resource;
2352                         return 0;
2353                 }
2354         }
2355         /* Register new encap/decap resource. */
2356         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2357         if (!cache_resource)
2358                 return rte_flow_error_set(error, ENOMEM,
2359                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2360                                           "cannot allocate resource memory");
2361         *cache_resource = *resource;
2362         cache_resource->verbs_action =
2363                 mlx5_glue->dv_create_flow_action_packet_reformat
2364                         (sh->ctx, cache_resource->reformat_type,
2365                          cache_resource->ft_type, domain, cache_resource->flags,
2366                          cache_resource->size,
2367                          (cache_resource->size ? cache_resource->buf : NULL));
2368         if (!cache_resource->verbs_action) {
2369                 rte_free(cache_resource);
2370                 return rte_flow_error_set(error, ENOMEM,
2371                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2372                                           NULL, "cannot create action");
2373         }
2374         rte_atomic32_init(&cache_resource->refcnt);
2375         rte_atomic32_inc(&cache_resource->refcnt);
2376         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2377         dev_flow->dv.encap_decap = cache_resource;
2378         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2379                 (void *)cache_resource,
2380                 rte_atomic32_read(&cache_resource->refcnt));
2381         return 0;
2382 }
2383
2384 /**
2385  * Find existing table jump resource or create and register a new one.
2386  *
2387  * @param[in, out] dev
2388  *   Pointer to rte_eth_dev structure.
2389  * @param[in, out] tbl
2390  *   Pointer to flow table resource.
2391  * @parm[in, out] dev_flow
2392  *   Pointer to the dev_flow.
2393  * @param[out] error
2394  *   pointer to error structure.
2395  *
2396  * @return
2397  *   0 on success otherwise -errno and errno is set.
2398  */
2399 static int
2400 flow_dv_jump_tbl_resource_register
2401                         (struct rte_eth_dev *dev __rte_unused,
2402                          struct mlx5_flow_tbl_resource *tbl,
2403                          struct mlx5_flow *dev_flow,
2404                          struct rte_flow_error *error)
2405 {
2406         struct mlx5_flow_tbl_data_entry *tbl_data =
2407                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2408         int cnt;
2409
2410         assert(tbl);
2411         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2412         if (!cnt) {
2413                 tbl_data->jump.action =
2414                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2415                         (tbl->obj);
2416                 if (!tbl_data->jump.action)
2417                         return rte_flow_error_set(error, ENOMEM,
2418                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2419                                         NULL, "cannot create jump action");
2420                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2421                         (void *)&tbl_data->jump, cnt);
2422         } else {
2423                 assert(tbl_data->jump.action);
2424                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2425                         (void *)&tbl_data->jump, cnt);
2426         }
2427         rte_atomic32_inc(&tbl_data->jump.refcnt);
2428         dev_flow->dv.jump = &tbl_data->jump;
2429         return 0;
2430 }
2431
2432 /**
2433  * Find existing table port ID resource or create and register a new one.
2434  *
2435  * @param[in, out] dev
2436  *   Pointer to rte_eth_dev structure.
2437  * @param[in, out] resource
2438  *   Pointer to port ID action resource.
2439  * @parm[in, out] dev_flow
2440  *   Pointer to the dev_flow.
2441  * @param[out] error
2442  *   pointer to error structure.
2443  *
2444  * @return
2445  *   0 on success otherwise -errno and errno is set.
2446  */
2447 static int
2448 flow_dv_port_id_action_resource_register
2449                         (struct rte_eth_dev *dev,
2450                          struct mlx5_flow_dv_port_id_action_resource *resource,
2451                          struct mlx5_flow *dev_flow,
2452                          struct rte_flow_error *error)
2453 {
2454         struct mlx5_priv *priv = dev->data->dev_private;
2455         struct mlx5_ibv_shared *sh = priv->sh;
2456         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2457
2458         /* Lookup a matching resource from cache. */
2459         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2460                 if (resource->port_id == cache_resource->port_id) {
2461                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2462                                 "refcnt %d++",
2463                                 (void *)cache_resource,
2464                                 rte_atomic32_read(&cache_resource->refcnt));
2465                         rte_atomic32_inc(&cache_resource->refcnt);
2466                         dev_flow->dv.port_id_action = cache_resource;
2467                         return 0;
2468                 }
2469         }
2470         /* Register new port id action resource. */
2471         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2472         if (!cache_resource)
2473                 return rte_flow_error_set(error, ENOMEM,
2474                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2475                                           "cannot allocate resource memory");
2476         *cache_resource = *resource;
2477         /*
2478          * Depending on rdma_core version the glue routine calls
2479          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2480          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2481          */
2482         cache_resource->action =
2483                 mlx5_glue->dr_create_flow_action_dest_port
2484                         (priv->sh->fdb_domain, resource->port_id);
2485         if (!cache_resource->action) {
2486                 rte_free(cache_resource);
2487                 return rte_flow_error_set(error, ENOMEM,
2488                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2489                                           NULL, "cannot create action");
2490         }
2491         rte_atomic32_init(&cache_resource->refcnt);
2492         rte_atomic32_inc(&cache_resource->refcnt);
2493         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2494         dev_flow->dv.port_id_action = cache_resource;
2495         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2496                 (void *)cache_resource,
2497                 rte_atomic32_read(&cache_resource->refcnt));
2498         return 0;
2499 }
2500
2501 /**
2502  * Find existing push vlan resource or create and register a new one.
2503  *
2504  * @param [in, out] dev
2505  *   Pointer to rte_eth_dev structure.
2506  * @param[in, out] resource
2507  *   Pointer to port ID action resource.
2508  * @parm[in, out] dev_flow
2509  *   Pointer to the dev_flow.
2510  * @param[out] error
2511  *   pointer to error structure.
2512  *
2513  * @return
2514  *   0 on success otherwise -errno and errno is set.
2515  */
2516 static int
2517 flow_dv_push_vlan_action_resource_register
2518                        (struct rte_eth_dev *dev,
2519                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2520                         struct mlx5_flow *dev_flow,
2521                         struct rte_flow_error *error)
2522 {
2523         struct mlx5_priv *priv = dev->data->dev_private;
2524         struct mlx5_ibv_shared *sh = priv->sh;
2525         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2526         struct mlx5dv_dr_domain *domain;
2527
2528         /* Lookup a matching resource from cache. */
2529         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2530                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2531                     resource->ft_type == cache_resource->ft_type) {
2532                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2533                                 "refcnt %d++",
2534                                 (void *)cache_resource,
2535                                 rte_atomic32_read(&cache_resource->refcnt));
2536                         rte_atomic32_inc(&cache_resource->refcnt);
2537                         dev_flow->dv.push_vlan_res = cache_resource;
2538                         return 0;
2539                 }
2540         }
2541         /* Register new push_vlan action resource. */
2542         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2543         if (!cache_resource)
2544                 return rte_flow_error_set(error, ENOMEM,
2545                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2546                                           "cannot allocate resource memory");
2547         *cache_resource = *resource;
2548         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2549                 domain = sh->fdb_domain;
2550         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2551                 domain = sh->rx_domain;
2552         else
2553                 domain = sh->tx_domain;
2554         cache_resource->action =
2555                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2556                                                            resource->vlan_tag);
2557         if (!cache_resource->action) {
2558                 rte_free(cache_resource);
2559                 return rte_flow_error_set(error, ENOMEM,
2560                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2561                                           NULL, "cannot create action");
2562         }
2563         rte_atomic32_init(&cache_resource->refcnt);
2564         rte_atomic32_inc(&cache_resource->refcnt);
2565         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2566         dev_flow->dv.push_vlan_res = cache_resource;
2567         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2568                 (void *)cache_resource,
2569                 rte_atomic32_read(&cache_resource->refcnt));
2570         return 0;
2571 }
2572 /**
2573  * Get the size of specific rte_flow_item_type
2574  *
2575  * @param[in] item_type
2576  *   Tested rte_flow_item_type.
2577  *
2578  * @return
2579  *   sizeof struct item_type, 0 if void or irrelevant.
2580  */
2581 static size_t
2582 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2583 {
2584         size_t retval;
2585
2586         switch (item_type) {
2587         case RTE_FLOW_ITEM_TYPE_ETH:
2588                 retval = sizeof(struct rte_flow_item_eth);
2589                 break;
2590         case RTE_FLOW_ITEM_TYPE_VLAN:
2591                 retval = sizeof(struct rte_flow_item_vlan);
2592                 break;
2593         case RTE_FLOW_ITEM_TYPE_IPV4:
2594                 retval = sizeof(struct rte_flow_item_ipv4);
2595                 break;
2596         case RTE_FLOW_ITEM_TYPE_IPV6:
2597                 retval = sizeof(struct rte_flow_item_ipv6);
2598                 break;
2599         case RTE_FLOW_ITEM_TYPE_UDP:
2600                 retval = sizeof(struct rte_flow_item_udp);
2601                 break;
2602         case RTE_FLOW_ITEM_TYPE_TCP:
2603                 retval = sizeof(struct rte_flow_item_tcp);
2604                 break;
2605         case RTE_FLOW_ITEM_TYPE_VXLAN:
2606                 retval = sizeof(struct rte_flow_item_vxlan);
2607                 break;
2608         case RTE_FLOW_ITEM_TYPE_GRE:
2609                 retval = sizeof(struct rte_flow_item_gre);
2610                 break;
2611         case RTE_FLOW_ITEM_TYPE_NVGRE:
2612                 retval = sizeof(struct rte_flow_item_nvgre);
2613                 break;
2614         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2615                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2616                 break;
2617         case RTE_FLOW_ITEM_TYPE_MPLS:
2618                 retval = sizeof(struct rte_flow_item_mpls);
2619                 break;
2620         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2621         default:
2622                 retval = 0;
2623                 break;
2624         }
2625         return retval;
2626 }
2627
2628 #define MLX5_ENCAP_IPV4_VERSION         0x40
2629 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2630 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2631 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2632 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2633 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2634 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2635
2636 /**
2637  * Convert the encap action data from list of rte_flow_item to raw buffer
2638  *
2639  * @param[in] items
2640  *   Pointer to rte_flow_item objects list.
2641  * @param[out] buf
2642  *   Pointer to the output buffer.
2643  * @param[out] size
2644  *   Pointer to the output buffer size.
2645  * @param[out] error
2646  *   Pointer to the error structure.
2647  *
2648  * @return
2649  *   0 on success, a negative errno value otherwise and rte_errno is set.
2650  */
2651 static int
2652 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2653                            size_t *size, struct rte_flow_error *error)
2654 {
2655         struct rte_ether_hdr *eth = NULL;
2656         struct rte_vlan_hdr *vlan = NULL;
2657         struct rte_ipv4_hdr *ipv4 = NULL;
2658         struct rte_ipv6_hdr *ipv6 = NULL;
2659         struct rte_udp_hdr *udp = NULL;
2660         struct rte_vxlan_hdr *vxlan = NULL;
2661         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2662         struct rte_gre_hdr *gre = NULL;
2663         size_t len;
2664         size_t temp_size = 0;
2665
2666         if (!items)
2667                 return rte_flow_error_set(error, EINVAL,
2668                                           RTE_FLOW_ERROR_TYPE_ACTION,
2669                                           NULL, "invalid empty data");
2670         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2671                 len = flow_dv_get_item_len(items->type);
2672                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2673                         return rte_flow_error_set(error, EINVAL,
2674                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2675                                                   (void *)items->type,
2676                                                   "items total size is too big"
2677                                                   " for encap action");
2678                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2679                 switch (items->type) {
2680                 case RTE_FLOW_ITEM_TYPE_ETH:
2681                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2682                         break;
2683                 case RTE_FLOW_ITEM_TYPE_VLAN:
2684                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2685                         if (!eth)
2686                                 return rte_flow_error_set(error, EINVAL,
2687                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2688                                                 (void *)items->type,
2689                                                 "eth header not found");
2690                         if (!eth->ether_type)
2691                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2692                         break;
2693                 case RTE_FLOW_ITEM_TYPE_IPV4:
2694                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2695                         if (!vlan && !eth)
2696                                 return rte_flow_error_set(error, EINVAL,
2697                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2698                                                 (void *)items->type,
2699                                                 "neither eth nor vlan"
2700                                                 " header found");
2701                         if (vlan && !vlan->eth_proto)
2702                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2703                         else if (eth && !eth->ether_type)
2704                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2705                         if (!ipv4->version_ihl)
2706                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2707                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2708                         if (!ipv4->time_to_live)
2709                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2710                         break;
2711                 case RTE_FLOW_ITEM_TYPE_IPV6:
2712                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2713                         if (!vlan && !eth)
2714                                 return rte_flow_error_set(error, EINVAL,
2715                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2716                                                 (void *)items->type,
2717                                                 "neither eth nor vlan"
2718                                                 " header found");
2719                         if (vlan && !vlan->eth_proto)
2720                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2721                         else if (eth && !eth->ether_type)
2722                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2723                         if (!ipv6->vtc_flow)
2724                                 ipv6->vtc_flow =
2725                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2726                         if (!ipv6->hop_limits)
2727                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2728                         break;
2729                 case RTE_FLOW_ITEM_TYPE_UDP:
2730                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2731                         if (!ipv4 && !ipv6)
2732                                 return rte_flow_error_set(error, EINVAL,
2733                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2734                                                 (void *)items->type,
2735                                                 "ip header not found");
2736                         if (ipv4 && !ipv4->next_proto_id)
2737                                 ipv4->next_proto_id = IPPROTO_UDP;
2738                         else if (ipv6 && !ipv6->proto)
2739                                 ipv6->proto = IPPROTO_UDP;
2740                         break;
2741                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2742                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2743                         if (!udp)
2744                                 return rte_flow_error_set(error, EINVAL,
2745                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2746                                                 (void *)items->type,
2747                                                 "udp header not found");
2748                         if (!udp->dst_port)
2749                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2750                         if (!vxlan->vx_flags)
2751                                 vxlan->vx_flags =
2752                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2753                         break;
2754                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2755                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2756                         if (!udp)
2757                                 return rte_flow_error_set(error, EINVAL,
2758                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2759                                                 (void *)items->type,
2760                                                 "udp header not found");
2761                         if (!vxlan_gpe->proto)
2762                                 return rte_flow_error_set(error, EINVAL,
2763                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2764                                                 (void *)items->type,
2765                                                 "next protocol not found");
2766                         if (!udp->dst_port)
2767                                 udp->dst_port =
2768                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2769                         if (!vxlan_gpe->vx_flags)
2770                                 vxlan_gpe->vx_flags =
2771                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2772                         break;
2773                 case RTE_FLOW_ITEM_TYPE_GRE:
2774                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2775                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2776                         if (!gre->proto)
2777                                 return rte_flow_error_set(error, EINVAL,
2778                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2779                                                 (void *)items->type,
2780                                                 "next protocol not found");
2781                         if (!ipv4 && !ipv6)
2782                                 return rte_flow_error_set(error, EINVAL,
2783                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2784                                                 (void *)items->type,
2785                                                 "ip header not found");
2786                         if (ipv4 && !ipv4->next_proto_id)
2787                                 ipv4->next_proto_id = IPPROTO_GRE;
2788                         else if (ipv6 && !ipv6->proto)
2789                                 ipv6->proto = IPPROTO_GRE;
2790                         break;
2791                 case RTE_FLOW_ITEM_TYPE_VOID:
2792                         break;
2793                 default:
2794                         return rte_flow_error_set(error, EINVAL,
2795                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2796                                                   (void *)items->type,
2797                                                   "unsupported item type");
2798                         break;
2799                 }
2800                 temp_size += len;
2801         }
2802         *size = temp_size;
2803         return 0;
2804 }
2805
2806 static int
2807 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2808 {
2809         struct rte_ether_hdr *eth = NULL;
2810         struct rte_vlan_hdr *vlan = NULL;
2811         struct rte_ipv6_hdr *ipv6 = NULL;
2812         struct rte_udp_hdr *udp = NULL;
2813         char *next_hdr;
2814         uint16_t proto;
2815
2816         eth = (struct rte_ether_hdr *)data;
2817         next_hdr = (char *)(eth + 1);
2818         proto = RTE_BE16(eth->ether_type);
2819
2820         /* VLAN skipping */
2821         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2822                 vlan = (struct rte_vlan_hdr *)next_hdr;
2823                 proto = RTE_BE16(vlan->eth_proto);
2824                 next_hdr += sizeof(struct rte_vlan_hdr);
2825         }
2826
2827         /* HW calculates IPv4 csum. no need to proceed */
2828         if (proto == RTE_ETHER_TYPE_IPV4)
2829                 return 0;
2830
2831         /* non IPv4/IPv6 header. not supported */
2832         if (proto != RTE_ETHER_TYPE_IPV6) {
2833                 return rte_flow_error_set(error, ENOTSUP,
2834                                           RTE_FLOW_ERROR_TYPE_ACTION,
2835                                           NULL, "Cannot offload non IPv4/IPv6");
2836         }
2837
2838         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2839
2840         /* ignore non UDP */
2841         if (ipv6->proto != IPPROTO_UDP)
2842                 return 0;
2843
2844         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2845         udp->dgram_cksum = 0;
2846
2847         return 0;
2848 }
2849
2850 /**
2851  * Convert L2 encap action to DV specification.
2852  *
2853  * @param[in] dev
2854  *   Pointer to rte_eth_dev structure.
2855  * @param[in] action
2856  *   Pointer to action structure.
2857  * @param[in, out] dev_flow
2858  *   Pointer to the mlx5_flow.
2859  * @param[in] transfer
2860  *   Mark if the flow is E-Switch flow.
2861  * @param[out] error
2862  *   Pointer to the error structure.
2863  *
2864  * @return
2865  *   0 on success, a negative errno value otherwise and rte_errno is set.
2866  */
2867 static int
2868 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2869                                const struct rte_flow_action *action,
2870                                struct mlx5_flow *dev_flow,
2871                                uint8_t transfer,
2872                                struct rte_flow_error *error)
2873 {
2874         const struct rte_flow_item *encap_data;
2875         const struct rte_flow_action_raw_encap *raw_encap_data;
2876         struct mlx5_flow_dv_encap_decap_resource res = {
2877                 .reformat_type =
2878                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2879                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2880                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2881         };
2882
2883         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2884                 raw_encap_data =
2885                         (const struct rte_flow_action_raw_encap *)action->conf;
2886                 res.size = raw_encap_data->size;
2887                 memcpy(res.buf, raw_encap_data->data, res.size);
2888         } else {
2889                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2890                         encap_data =
2891                                 ((const struct rte_flow_action_vxlan_encap *)
2892                                                 action->conf)->definition;
2893                 else
2894                         encap_data =
2895                                 ((const struct rte_flow_action_nvgre_encap *)
2896                                                 action->conf)->definition;
2897                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2898                                                &res.size, error))
2899                         return -rte_errno;
2900         }
2901         if (flow_dv_zero_encap_udp_csum(res.buf, error))
2902                 return -rte_errno;
2903         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2904                 return rte_flow_error_set(error, EINVAL,
2905                                           RTE_FLOW_ERROR_TYPE_ACTION,
2906                                           NULL, "can't create L2 encap action");
2907         return 0;
2908 }
2909
2910 /**
2911  * Convert L2 decap action to DV specification.
2912  *
2913  * @param[in] dev
2914  *   Pointer to rte_eth_dev structure.
2915  * @param[in, out] dev_flow
2916  *   Pointer to the mlx5_flow.
2917  * @param[in] transfer
2918  *   Mark if the flow is E-Switch flow.
2919  * @param[out] error
2920  *   Pointer to the error structure.
2921  *
2922  * @return
2923  *   0 on success, a negative errno value otherwise and rte_errno is set.
2924  */
2925 static int
2926 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2927                                struct mlx5_flow *dev_flow,
2928                                uint8_t transfer,
2929                                struct rte_flow_error *error)
2930 {
2931         struct mlx5_flow_dv_encap_decap_resource res = {
2932                 .size = 0,
2933                 .reformat_type =
2934                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2935                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2936                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2937         };
2938
2939         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2940                 return rte_flow_error_set(error, EINVAL,
2941                                           RTE_FLOW_ERROR_TYPE_ACTION,
2942                                           NULL, "can't create L2 decap action");
2943         return 0;
2944 }
2945
2946 /**
2947  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2948  *
2949  * @param[in] dev
2950  *   Pointer to rte_eth_dev structure.
2951  * @param[in] action
2952  *   Pointer to action structure.
2953  * @param[in, out] dev_flow
2954  *   Pointer to the mlx5_flow.
2955  * @param[in] attr
2956  *   Pointer to the flow attributes.
2957  * @param[out] error
2958  *   Pointer to the error structure.
2959  *
2960  * @return
2961  *   0 on success, a negative errno value otherwise and rte_errno is set.
2962  */
2963 static int
2964 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2965                                 const struct rte_flow_action *action,
2966                                 struct mlx5_flow *dev_flow,
2967                                 const struct rte_flow_attr *attr,
2968                                 struct rte_flow_error *error)
2969 {
2970         const struct rte_flow_action_raw_encap *encap_data;
2971         struct mlx5_flow_dv_encap_decap_resource res;
2972
2973         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2974         res.size = encap_data->size;
2975         memcpy(res.buf, encap_data->data, res.size);
2976         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
2977                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
2978                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
2979         if (attr->transfer)
2980                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2981         else
2982                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2983                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2984         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2985                 return rte_flow_error_set(error, EINVAL,
2986                                           RTE_FLOW_ERROR_TYPE_ACTION,
2987                                           NULL, "can't create encap action");
2988         return 0;
2989 }
2990
2991 /**
2992  * Create action push VLAN.
2993  *
2994  * @param[in] dev
2995  *   Pointer to rte_eth_dev structure.
2996  * @param[in] attr
2997  *   Pointer to the flow attributes.
2998  * @param[in] vlan
2999  *   Pointer to the vlan to push to the Ethernet header.
3000  * @param[in, out] dev_flow
3001  *   Pointer to the mlx5_flow.
3002  * @param[out] error
3003  *   Pointer to the error structure.
3004  *
3005  * @return
3006  *   0 on success, a negative errno value otherwise and rte_errno is set.
3007  */
3008 static int
3009 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3010                                 const struct rte_flow_attr *attr,
3011                                 const struct rte_vlan_hdr *vlan,
3012                                 struct mlx5_flow *dev_flow,
3013                                 struct rte_flow_error *error)
3014 {
3015         struct mlx5_flow_dv_push_vlan_action_resource res;
3016
3017         res.vlan_tag =
3018                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3019                                  vlan->vlan_tci);
3020         if (attr->transfer)
3021                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3022         else
3023                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3024                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3025         return flow_dv_push_vlan_action_resource_register
3026                                             (dev, &res, dev_flow, error);
3027 }
3028
3029 /**
3030  * Validate the modify-header actions.
3031  *
3032  * @param[in] action_flags
3033  *   Holds the actions detected until now.
3034  * @param[in] action
3035  *   Pointer to the modify action.
3036  * @param[out] error
3037  *   Pointer to error structure.
3038  *
3039  * @return
3040  *   0 on success, a negative errno value otherwise and rte_errno is set.
3041  */
3042 static int
3043 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3044                                    const struct rte_flow_action *action,
3045                                    struct rte_flow_error *error)
3046 {
3047         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3048                 return rte_flow_error_set(error, EINVAL,
3049                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3050                                           NULL, "action configuration not set");
3051         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
3052                 return rte_flow_error_set(error, EINVAL,
3053                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3054                                           "can't have encap action before"
3055                                           " modify action");
3056         return 0;
3057 }
3058
3059 /**
3060  * Validate the modify-header MAC address actions.
3061  *
3062  * @param[in] action_flags
3063  *   Holds the actions detected until now.
3064  * @param[in] action
3065  *   Pointer to the modify action.
3066  * @param[in] item_flags
3067  *   Holds the items detected.
3068  * @param[out] error
3069  *   Pointer to error structure.
3070  *
3071  * @return
3072  *   0 on success, a negative errno value otherwise and rte_errno is set.
3073  */
3074 static int
3075 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3076                                    const struct rte_flow_action *action,
3077                                    const uint64_t item_flags,
3078                                    struct rte_flow_error *error)
3079 {
3080         int ret = 0;
3081
3082         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3083         if (!ret) {
3084                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3085                         return rte_flow_error_set(error, EINVAL,
3086                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3087                                                   NULL,
3088                                                   "no L2 item in pattern");
3089         }
3090         return ret;
3091 }
3092
3093 /**
3094  * Validate the modify-header IPv4 address actions.
3095  *
3096  * @param[in] action_flags
3097  *   Holds the actions detected until now.
3098  * @param[in] action
3099  *   Pointer to the modify action.
3100  * @param[in] item_flags
3101  *   Holds the items detected.
3102  * @param[out] error
3103  *   Pointer to error structure.
3104  *
3105  * @return
3106  *   0 on success, a negative errno value otherwise and rte_errno is set.
3107  */
3108 static int
3109 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3110                                     const struct rte_flow_action *action,
3111                                     const uint64_t item_flags,
3112                                     struct rte_flow_error *error)
3113 {
3114         int ret = 0;
3115
3116         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3117         if (!ret) {
3118                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3119                         return rte_flow_error_set(error, EINVAL,
3120                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3121                                                   NULL,
3122                                                   "no ipv4 item in pattern");
3123         }
3124         return ret;
3125 }
3126
3127 /**
3128  * Validate the modify-header IPv6 address actions.
3129  *
3130  * @param[in] action_flags
3131  *   Holds the actions detected until now.
3132  * @param[in] action
3133  *   Pointer to the modify action.
3134  * @param[in] item_flags
3135  *   Holds the items detected.
3136  * @param[out] error
3137  *   Pointer to error structure.
3138  *
3139  * @return
3140  *   0 on success, a negative errno value otherwise and rte_errno is set.
3141  */
3142 static int
3143 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3144                                     const struct rte_flow_action *action,
3145                                     const uint64_t item_flags,
3146                                     struct rte_flow_error *error)
3147 {
3148         int ret = 0;
3149
3150         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3151         if (!ret) {
3152                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3153                         return rte_flow_error_set(error, EINVAL,
3154                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3155                                                   NULL,
3156                                                   "no ipv6 item in pattern");
3157         }
3158         return ret;
3159 }
3160
3161 /**
3162  * Validate the modify-header TP actions.
3163  *
3164  * @param[in] action_flags
3165  *   Holds the actions detected until now.
3166  * @param[in] action
3167  *   Pointer to the modify action.
3168  * @param[in] item_flags
3169  *   Holds the items detected.
3170  * @param[out] error
3171  *   Pointer to error structure.
3172  *
3173  * @return
3174  *   0 on success, a negative errno value otherwise and rte_errno is set.
3175  */
3176 static int
3177 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3178                                   const struct rte_flow_action *action,
3179                                   const uint64_t item_flags,
3180                                   struct rte_flow_error *error)
3181 {
3182         int ret = 0;
3183
3184         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3185         if (!ret) {
3186                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3187                         return rte_flow_error_set(error, EINVAL,
3188                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3189                                                   NULL, "no transport layer "
3190                                                   "in pattern");
3191         }
3192         return ret;
3193 }
3194
3195 /**
3196  * Validate the modify-header actions of increment/decrement
3197  * TCP Sequence-number.
3198  *
3199  * @param[in] action_flags
3200  *   Holds the actions detected until now.
3201  * @param[in] action
3202  *   Pointer to the modify action.
3203  * @param[in] item_flags
3204  *   Holds the items detected.
3205  * @param[out] error
3206  *   Pointer to error structure.
3207  *
3208  * @return
3209  *   0 on success, a negative errno value otherwise and rte_errno is set.
3210  */
3211 static int
3212 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3213                                        const struct rte_flow_action *action,
3214                                        const uint64_t item_flags,
3215                                        struct rte_flow_error *error)
3216 {
3217         int ret = 0;
3218
3219         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3220         if (!ret) {
3221                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3222                         return rte_flow_error_set(error, EINVAL,
3223                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3224                                                   NULL, "no TCP item in"
3225                                                   " pattern");
3226                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3227                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3228                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3229                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3230                         return rte_flow_error_set(error, EINVAL,
3231                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3232                                                   NULL,
3233                                                   "cannot decrease and increase"
3234                                                   " TCP sequence number"
3235                                                   " at the same time");
3236         }
3237         return ret;
3238 }
3239
3240 /**
3241  * Validate the modify-header actions of increment/decrement
3242  * TCP Acknowledgment number.
3243  *
3244  * @param[in] action_flags
3245  *   Holds the actions detected until now.
3246  * @param[in] action
3247  *   Pointer to the modify action.
3248  * @param[in] item_flags
3249  *   Holds the items detected.
3250  * @param[out] error
3251  *   Pointer to error structure.
3252  *
3253  * @return
3254  *   0 on success, a negative errno value otherwise and rte_errno is set.
3255  */
3256 static int
3257 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3258                                        const struct rte_flow_action *action,
3259                                        const uint64_t item_flags,
3260                                        struct rte_flow_error *error)
3261 {
3262         int ret = 0;
3263
3264         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3265         if (!ret) {
3266                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3267                         return rte_flow_error_set(error, EINVAL,
3268                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3269                                                   NULL, "no TCP item in"
3270                                                   " pattern");
3271                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3272                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3273                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3274                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3275                         return rte_flow_error_set(error, EINVAL,
3276                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3277                                                   NULL,
3278                                                   "cannot decrease and increase"
3279                                                   " TCP acknowledgment number"
3280                                                   " at the same time");
3281         }
3282         return ret;
3283 }
3284
3285 /**
3286  * Validate the modify-header TTL actions.
3287  *
3288  * @param[in] action_flags
3289  *   Holds the actions detected until now.
3290  * @param[in] action
3291  *   Pointer to the modify action.
3292  * @param[in] item_flags
3293  *   Holds the items detected.
3294  * @param[out] error
3295  *   Pointer to error structure.
3296  *
3297  * @return
3298  *   0 on success, a negative errno value otherwise and rte_errno is set.
3299  */
3300 static int
3301 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3302                                    const struct rte_flow_action *action,
3303                                    const uint64_t item_flags,
3304                                    struct rte_flow_error *error)
3305 {
3306         int ret = 0;
3307
3308         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3309         if (!ret) {
3310                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3311                         return rte_flow_error_set(error, EINVAL,
3312                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3313                                                   NULL,
3314                                                   "no IP protocol in pattern");
3315         }
3316         return ret;
3317 }
3318
3319 /**
3320  * Validate jump action.
3321  *
3322  * @param[in] action
3323  *   Pointer to the jump action.
3324  * @param[in] action_flags
3325  *   Holds the actions detected until now.
3326  * @param[in] attributes
3327  *   Pointer to flow attributes
3328  * @param[in] external
3329  *   Action belongs to flow rule created by request external to PMD.
3330  * @param[out] error
3331  *   Pointer to error structure.
3332  *
3333  * @return
3334  *   0 on success, a negative errno value otherwise and rte_errno is set.
3335  */
3336 static int
3337 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3338                              uint64_t action_flags,
3339                              const struct rte_flow_attr *attributes,
3340                              bool external, struct rte_flow_error *error)
3341 {
3342         uint32_t target_group, table;
3343         int ret = 0;
3344
3345         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3346                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3347                 return rte_flow_error_set(error, EINVAL,
3348                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3349                                           "can't have 2 fate actions in"
3350                                           " same flow");
3351         if (action_flags & MLX5_FLOW_ACTION_METER)
3352                 return rte_flow_error_set(error, ENOTSUP,
3353                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3354                                           "jump with meter not support");
3355         if (!action->conf)
3356                 return rte_flow_error_set(error, EINVAL,
3357                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3358                                           NULL, "action configuration not set");
3359         target_group =
3360                 ((const struct rte_flow_action_jump *)action->conf)->group;
3361         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3362                                        true, &table, error);
3363         if (ret)
3364                 return ret;
3365         if (attributes->group == target_group)
3366                 return rte_flow_error_set(error, EINVAL,
3367                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3368                                           "target group must be other than"
3369                                           " the current flow group");
3370         return 0;
3371 }
3372
3373 /*
3374  * Validate the port_id action.
3375  *
3376  * @param[in] dev
3377  *   Pointer to rte_eth_dev structure.
3378  * @param[in] action_flags
3379  *   Bit-fields that holds the actions detected until now.
3380  * @param[in] action
3381  *   Port_id RTE action structure.
3382  * @param[in] attr
3383  *   Attributes of flow that includes this action.
3384  * @param[out] error
3385  *   Pointer to error structure.
3386  *
3387  * @return
3388  *   0 on success, a negative errno value otherwise and rte_errno is set.
3389  */
3390 static int
3391 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3392                                 uint64_t action_flags,
3393                                 const struct rte_flow_action *action,
3394                                 const struct rte_flow_attr *attr,
3395                                 struct rte_flow_error *error)
3396 {
3397         const struct rte_flow_action_port_id *port_id;
3398         struct mlx5_priv *act_priv;
3399         struct mlx5_priv *dev_priv;
3400         uint16_t port;
3401
3402         if (!attr->transfer)
3403                 return rte_flow_error_set(error, ENOTSUP,
3404                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3405                                           NULL,
3406                                           "port id action is valid in transfer"
3407                                           " mode only");
3408         if (!action || !action->conf)
3409                 return rte_flow_error_set(error, ENOTSUP,
3410                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3411                                           NULL,
3412                                           "port id action parameters must be"
3413                                           " specified");
3414         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3415                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3416                 return rte_flow_error_set(error, EINVAL,
3417                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3418                                           "can have only one fate actions in"
3419                                           " a flow");
3420         dev_priv = mlx5_dev_to_eswitch_info(dev);
3421         if (!dev_priv)
3422                 return rte_flow_error_set(error, rte_errno,
3423                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3424                                           NULL,
3425                                           "failed to obtain E-Switch info");
3426         port_id = action->conf;
3427         port = port_id->original ? dev->data->port_id : port_id->id;
3428         act_priv = mlx5_port_to_eswitch_info(port, false);
3429         if (!act_priv)
3430                 return rte_flow_error_set
3431                                 (error, rte_errno,
3432                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3433                                  "failed to obtain E-Switch port id for port");
3434         if (act_priv->domain_id != dev_priv->domain_id)
3435                 return rte_flow_error_set
3436                                 (error, EINVAL,
3437                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3438                                  "port does not belong to"
3439                                  " E-Switch being configured");
3440         return 0;
3441 }
3442
3443 /**
3444  * Get the maximum number of modify header actions.
3445  *
3446  * @param dev
3447  *   Pointer to rte_eth_dev structure.
3448  * @param flags
3449  *   Flags bits to check if root level.
3450  *
3451  * @return
3452  *   Max number of modify header actions device can support.
3453  */
3454 static unsigned int
3455 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3456 {
3457         /*
3458          * There's no way to directly query the max cap. Although it has to be
3459          * acquried by iterative trial, it is a safe assumption that more
3460          * actions are supported by FW if extensive metadata register is
3461          * supported. (Only in the root table)
3462          */
3463         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3464                 return MLX5_MAX_MODIFY_NUM;
3465         else
3466                 return mlx5_flow_ext_mreg_supported(dev) ?
3467                                         MLX5_ROOT_TBL_MODIFY_NUM :
3468                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3469 }
3470
3471 /**
3472  * Validate the meter action.
3473  *
3474  * @param[in] dev
3475  *   Pointer to rte_eth_dev structure.
3476  * @param[in] action_flags
3477  *   Bit-fields that holds the actions detected until now.
3478  * @param[in] action
3479  *   Pointer to the meter action.
3480  * @param[in] attr
3481  *   Attributes of flow that includes this action.
3482  * @param[out] error
3483  *   Pointer to error structure.
3484  *
3485  * @return
3486  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3487  */
3488 static int
3489 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3490                                 uint64_t action_flags,
3491                                 const struct rte_flow_action *action,
3492                                 const struct rte_flow_attr *attr,
3493                                 struct rte_flow_error *error)
3494 {
3495         struct mlx5_priv *priv = dev->data->dev_private;
3496         const struct rte_flow_action_meter *am = action->conf;
3497         struct mlx5_flow_meter *fm;
3498
3499         if (!am)
3500                 return rte_flow_error_set(error, EINVAL,
3501                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3502                                           "meter action conf is NULL");
3503
3504         if (action_flags & MLX5_FLOW_ACTION_METER)
3505                 return rte_flow_error_set(error, ENOTSUP,
3506                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3507                                           "meter chaining not support");
3508         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3509                 return rte_flow_error_set(error, ENOTSUP,
3510                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3511                                           "meter with jump not support");
3512         if (!priv->mtr_en)
3513                 return rte_flow_error_set(error, ENOTSUP,
3514                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3515                                           NULL,
3516                                           "meter action not supported");
3517         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3518         if (!fm)
3519                 return rte_flow_error_set(error, EINVAL,
3520                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3521                                           "Meter not found");
3522         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3523               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3524               (!fm->attr.egress && !attr->egress && attr->ingress))))
3525                 return rte_flow_error_set(error, EINVAL,
3526                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3527                                           "Flow attributes are either invalid "
3528                                           "or have a conflict with current "
3529                                           "meter attributes");
3530         return 0;
3531 }
3532
3533 /**
3534  * Validate the modify-header IPv4 DSCP actions.
3535  *
3536  * @param[in] action_flags
3537  *   Holds the actions detected until now.
3538  * @param[in] action
3539  *   Pointer to the modify action.
3540  * @param[in] item_flags
3541  *   Holds the items detected.
3542  * @param[out] error
3543  *   Pointer to error structure.
3544  *
3545  * @return
3546  *   0 on success, a negative errno value otherwise and rte_errno is set.
3547  */
3548 static int
3549 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3550                                          const struct rte_flow_action *action,
3551                                          const uint64_t item_flags,
3552                                          struct rte_flow_error *error)
3553 {
3554         int ret = 0;
3555
3556         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3557         if (!ret) {
3558                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3559                         return rte_flow_error_set(error, EINVAL,
3560                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3561                                                   NULL,
3562                                                   "no ipv4 item in pattern");
3563         }
3564         return ret;
3565 }
3566
3567 /**
3568  * Validate the modify-header IPv6 DSCP actions.
3569  *
3570  * @param[in] action_flags
3571  *   Holds the actions detected until now.
3572  * @param[in] action
3573  *   Pointer to the modify action.
3574  * @param[in] item_flags
3575  *   Holds the items detected.
3576  * @param[out] error
3577  *   Pointer to error structure.
3578  *
3579  * @return
3580  *   0 on success, a negative errno value otherwise and rte_errno is set.
3581  */
3582 static int
3583 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3584                                          const struct rte_flow_action *action,
3585                                          const uint64_t item_flags,
3586                                          struct rte_flow_error *error)
3587 {
3588         int ret = 0;
3589
3590         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3591         if (!ret) {
3592                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3593                         return rte_flow_error_set(error, EINVAL,
3594                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3595                                                   NULL,
3596                                                   "no ipv6 item in pattern");
3597         }
3598         return ret;
3599 }
3600
3601 /**
3602  * Find existing modify-header resource or create and register a new one.
3603  *
3604  * @param dev[in, out]
3605  *   Pointer to rte_eth_dev structure.
3606  * @param[in, out] resource
3607  *   Pointer to modify-header resource.
3608  * @parm[in, out] dev_flow
3609  *   Pointer to the dev_flow.
3610  * @param[out] error
3611  *   pointer to error structure.
3612  *
3613  * @return
3614  *   0 on success otherwise -errno and errno is set.
3615  */
3616 static int
3617 flow_dv_modify_hdr_resource_register
3618                         (struct rte_eth_dev *dev,
3619                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3620                          struct mlx5_flow *dev_flow,
3621                          struct rte_flow_error *error)
3622 {
3623         struct mlx5_priv *priv = dev->data->dev_private;
3624         struct mlx5_ibv_shared *sh = priv->sh;
3625         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3626         struct mlx5dv_dr_domain *ns;
3627         uint32_t actions_len;
3628
3629         resource->flags =
3630                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3631         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3632                                     resource->flags))
3633                 return rte_flow_error_set(error, EOVERFLOW,
3634                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3635                                           "too many modify header items");
3636         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3637                 ns = sh->fdb_domain;
3638         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3639                 ns = sh->tx_domain;
3640         else
3641                 ns = sh->rx_domain;
3642         /* Lookup a matching resource from cache. */
3643         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3644         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3645                 if (resource->ft_type == cache_resource->ft_type &&
3646                     resource->actions_num == cache_resource->actions_num &&
3647                     resource->flags == cache_resource->flags &&
3648                     !memcmp((const void *)resource->actions,
3649                             (const void *)cache_resource->actions,
3650                             actions_len)) {
3651                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3652                                 (void *)cache_resource,
3653                                 rte_atomic32_read(&cache_resource->refcnt));
3654                         rte_atomic32_inc(&cache_resource->refcnt);
3655                         dev_flow->dv.modify_hdr = cache_resource;
3656                         return 0;
3657                 }
3658         }
3659         /* Register new modify-header resource. */
3660         cache_resource = rte_calloc(__func__, 1,
3661                                     sizeof(*cache_resource) + actions_len, 0);
3662         if (!cache_resource)
3663                 return rte_flow_error_set(error, ENOMEM,
3664                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3665                                           "cannot allocate resource memory");
3666         *cache_resource = *resource;
3667         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3668         cache_resource->verbs_action =
3669                 mlx5_glue->dv_create_flow_action_modify_header
3670                                         (sh->ctx, cache_resource->ft_type, ns,
3671                                          cache_resource->flags, actions_len,
3672                                          (uint64_t *)cache_resource->actions);
3673         if (!cache_resource->verbs_action) {
3674                 rte_free(cache_resource);
3675                 return rte_flow_error_set(error, ENOMEM,
3676                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3677                                           NULL, "cannot create action");
3678         }
3679         rte_atomic32_init(&cache_resource->refcnt);
3680         rte_atomic32_inc(&cache_resource->refcnt);
3681         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3682         dev_flow->dv.modify_hdr = cache_resource;
3683         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3684                 (void *)cache_resource,
3685                 rte_atomic32_read(&cache_resource->refcnt));
3686         return 0;
3687 }
3688
3689 #define MLX5_CNT_CONTAINER_RESIZE 64
3690
3691 /**
3692  * Get or create a flow counter.
3693  *
3694  * @param[in] dev
3695  *   Pointer to the Ethernet device structure.
3696  * @param[in] shared
3697  *   Indicate if this counter is shared with other flows.
3698  * @param[in] id
3699  *   Counter identifier.
3700  *
3701  * @return
3702  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3703  */
3704 static struct mlx5_flow_counter *
3705 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3706                                uint32_t id)
3707 {
3708         struct mlx5_priv *priv = dev->data->dev_private;
3709         struct mlx5_flow_counter *cnt = NULL;
3710         struct mlx5_devx_obj *dcs = NULL;
3711
3712         if (!priv->config.devx) {
3713                 rte_errno = ENOTSUP;
3714                 return NULL;
3715         }
3716         if (shared) {
3717                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3718                         if (cnt->shared && cnt->id == id) {
3719                                 cnt->ref_cnt++;
3720                                 return cnt;
3721                         }
3722                 }
3723         }
3724         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3725         if (!dcs)
3726                 return NULL;
3727         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3728         if (!cnt) {
3729                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3730                 rte_errno = ENOMEM;
3731                 return NULL;
3732         }
3733         struct mlx5_flow_counter tmpl = {
3734                 .shared = shared,
3735                 .ref_cnt = 1,
3736                 .id = id,
3737                 .dcs = dcs,
3738         };
3739         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3740         if (!tmpl.action) {
3741                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3742                 rte_errno = errno;
3743                 rte_free(cnt);
3744                 return NULL;
3745         }
3746         *cnt = tmpl;
3747         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3748         return cnt;
3749 }
3750
3751 /**
3752  * Release a flow counter.
3753  *
3754  * @param[in] dev
3755  *   Pointer to the Ethernet device structure.
3756  * @param[in] counter
3757  *   Pointer to the counter handler.
3758  */
3759 static void
3760 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3761                                  struct mlx5_flow_counter *counter)
3762 {
3763         struct mlx5_priv *priv = dev->data->dev_private;
3764
3765         if (!counter)
3766                 return;
3767         if (--counter->ref_cnt == 0) {
3768                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3769                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3770                 rte_free(counter);
3771         }
3772 }
3773
3774 /**
3775  * Query a devx flow counter.
3776  *
3777  * @param[in] dev
3778  *   Pointer to the Ethernet device structure.
3779  * @param[in] cnt
3780  *   Pointer to the flow counter.
3781  * @param[out] pkts
3782  *   The statistics value of packets.
3783  * @param[out] bytes
3784  *   The statistics value of bytes.
3785  *
3786  * @return
3787  *   0 on success, otherwise a negative errno value and rte_errno is set.
3788  */
3789 static inline int
3790 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3791                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3792                      uint64_t *bytes)
3793 {
3794         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3795                                                 0, NULL, NULL, 0);
3796 }
3797
3798 /**
3799  * Get a pool by a counter.
3800  *
3801  * @param[in] cnt
3802  *   Pointer to the counter.
3803  *
3804  * @return
3805  *   The counter pool.
3806  */
3807 static struct mlx5_flow_counter_pool *
3808 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3809 {
3810         if (!cnt->batch) {
3811                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3812                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3813         }
3814         return cnt->pool;
3815 }
3816
3817 /**
3818  * Get a pool by devx counter ID.
3819  *
3820  * @param[in] cont
3821  *   Pointer to the counter container.
3822  * @param[in] id
3823  *   The counter devx ID.
3824  *
3825  * @return
3826  *   The counter pool pointer if exists, NULL otherwise,
3827  */
3828 static struct mlx5_flow_counter_pool *
3829 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3830 {
3831         struct mlx5_flow_counter_pool *pool;
3832
3833         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3834                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3835                                 MLX5_COUNTERS_PER_POOL;
3836
3837                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3838                         return pool;
3839         };
3840         return NULL;
3841 }
3842
3843 /**
3844  * Allocate a new memory for the counter values wrapped by all the needed
3845  * management.
3846  *
3847  * @param[in] dev
3848  *   Pointer to the Ethernet device structure.
3849  * @param[in] raws_n
3850  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3851  *
3852  * @return
3853  *   The new memory management pointer on success, otherwise NULL and rte_errno
3854  *   is set.
3855  */
3856 static struct mlx5_counter_stats_mem_mng *
3857 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3858 {
3859         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3860                                         (dev->data->dev_private))->sh;
3861         struct mlx5_devx_mkey_attr mkey_attr;
3862         struct mlx5_counter_stats_mem_mng *mem_mng;
3863         volatile struct flow_counter_stats *raw_data;
3864         int size = (sizeof(struct flow_counter_stats) *
3865                         MLX5_COUNTERS_PER_POOL +
3866                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3867                         sizeof(struct mlx5_counter_stats_mem_mng);
3868         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3869         int i;
3870
3871         if (!mem) {
3872                 rte_errno = ENOMEM;
3873                 return NULL;
3874         }
3875         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3876         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3877         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3878                                                  IBV_ACCESS_LOCAL_WRITE);
3879         if (!mem_mng->umem) {
3880                 rte_errno = errno;
3881                 rte_free(mem);
3882                 return NULL;
3883         }
3884         mkey_attr.addr = (uintptr_t)mem;
3885         mkey_attr.size = size;
3886         mkey_attr.umem_id = mem_mng->umem->umem_id;
3887         mkey_attr.pd = sh->pdn;
3888         mkey_attr.log_entity_size = 0;
3889         mkey_attr.pg_access = 0;
3890         mkey_attr.klm_array = NULL;
3891         mkey_attr.klm_num = 0;
3892         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3893         if (!mem_mng->dm) {
3894                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3895                 rte_errno = errno;
3896                 rte_free(mem);
3897                 return NULL;
3898         }
3899         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3900         raw_data = (volatile struct flow_counter_stats *)mem;
3901         for (i = 0; i < raws_n; ++i) {
3902                 mem_mng->raws[i].mem_mng = mem_mng;
3903                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3904         }
3905         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3906         return mem_mng;
3907 }
3908
3909 /**
3910  * Resize a counter container.
3911  *
3912  * @param[in] dev
3913  *   Pointer to the Ethernet device structure.
3914  * @param[in] batch
3915  *   Whether the pool is for counter that was allocated by batch command.
3916  *
3917  * @return
3918  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3919  */
3920 static struct mlx5_pools_container *
3921 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3922 {
3923         struct mlx5_priv *priv = dev->data->dev_private;
3924         struct mlx5_pools_container *cont =
3925                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3926         struct mlx5_pools_container *new_cont =
3927                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3928         struct mlx5_counter_stats_mem_mng *mem_mng;
3929         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3930         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3931         int i;
3932
3933         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3934                 /* The last resize still hasn't detected by the host thread. */
3935                 rte_errno = EAGAIN;
3936                 return NULL;
3937         }
3938         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3939         if (!new_cont->pools) {
3940                 rte_errno = ENOMEM;
3941                 return NULL;
3942         }
3943         if (cont->n)
3944                 memcpy(new_cont->pools, cont->pools, cont->n *
3945                        sizeof(struct mlx5_flow_counter_pool *));
3946         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3947                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3948         if (!mem_mng) {
3949                 rte_free(new_cont->pools);
3950                 return NULL;
3951         }
3952         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3953                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3954                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3955                                  i, next);
3956         new_cont->n = resize;
3957         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3958         TAILQ_INIT(&new_cont->pool_list);
3959         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3960         new_cont->init_mem_mng = mem_mng;
3961         rte_cio_wmb();
3962          /* Flip the master container. */
3963         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3964         return new_cont;
3965 }
3966
3967 /**
3968  * Query a devx flow counter.
3969  *
3970  * @param[in] dev
3971  *   Pointer to the Ethernet device structure.
3972  * @param[in] cnt
3973  *   Pointer to the flow counter.
3974  * @param[out] pkts
3975  *   The statistics value of packets.
3976  * @param[out] bytes
3977  *   The statistics value of bytes.
3978  *
3979  * @return
3980  *   0 on success, otherwise a negative errno value and rte_errno is set.
3981  */
3982 static inline int
3983 _flow_dv_query_count(struct rte_eth_dev *dev,
3984                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3985                      uint64_t *bytes)
3986 {
3987         struct mlx5_priv *priv = dev->data->dev_private;
3988         struct mlx5_flow_counter_pool *pool =
3989                         flow_dv_counter_pool_get(cnt);
3990         int offset = cnt - &pool->counters_raw[0];
3991
3992         if (priv->counter_fallback)
3993                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3994
3995         rte_spinlock_lock(&pool->sl);
3996         /*
3997          * The single counters allocation may allocate smaller ID than the
3998          * current allocated in parallel to the host reading.
3999          * In this case the new counter values must be reported as 0.
4000          */
4001         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4002                 *pkts = 0;
4003                 *bytes = 0;
4004         } else {
4005                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4006                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4007         }
4008         rte_spinlock_unlock(&pool->sl);
4009         return 0;
4010 }
4011
4012 /**
4013  * Create and initialize a new counter pool.
4014  *
4015  * @param[in] dev
4016  *   Pointer to the Ethernet device structure.
4017  * @param[out] dcs
4018  *   The devX counter handle.
4019  * @param[in] batch
4020  *   Whether the pool is for counter that was allocated by batch command.
4021  *
4022  * @return
4023  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4024  */
4025 static struct mlx5_flow_counter_pool *
4026 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4027                     uint32_t batch)
4028 {
4029         struct mlx5_priv *priv = dev->data->dev_private;
4030         struct mlx5_flow_counter_pool *pool;
4031         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4032                                                                0);
4033         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4034         uint32_t size;
4035
4036         if (cont->n == n_valid) {
4037                 cont = flow_dv_container_resize(dev, batch);
4038                 if (!cont)
4039                         return NULL;
4040         }
4041         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4042                         sizeof(struct mlx5_flow_counter);
4043         pool = rte_calloc(__func__, 1, size, 0);
4044         if (!pool) {
4045                 rte_errno = ENOMEM;
4046                 return NULL;
4047         }
4048         pool->min_dcs = dcs;
4049         pool->raw = cont->init_mem_mng->raws + n_valid %
4050                                                      MLX5_CNT_CONTAINER_RESIZE;
4051         pool->raw_hw = NULL;
4052         rte_spinlock_init(&pool->sl);
4053         /*
4054          * The generation of the new allocated counters in this pool is 0, 2 in
4055          * the pool generation makes all the counters valid for allocation.
4056          */
4057         rte_atomic64_set(&pool->query_gen, 0x2);
4058         TAILQ_INIT(&pool->counters);
4059         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4060         cont->pools[n_valid] = pool;
4061         /* Pool initialization must be updated before host thread access. */
4062         rte_cio_wmb();
4063         rte_atomic16_add(&cont->n_valid, 1);
4064         return pool;
4065 }
4066
4067 /**
4068  * Prepare a new counter and/or a new counter pool.
4069  *
4070  * @param[in] dev
4071  *   Pointer to the Ethernet device structure.
4072  * @param[out] cnt_free
4073  *   Where to put the pointer of a new counter.
4074  * @param[in] batch
4075  *   Whether the pool is for counter that was allocated by batch command.
4076  *
4077  * @return
4078  *   The free counter pool pointer and @p cnt_free is set on success,
4079  *   NULL otherwise and rte_errno is set.
4080  */
4081 static struct mlx5_flow_counter_pool *
4082 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4083                              struct mlx5_flow_counter **cnt_free,
4084                              uint32_t batch)
4085 {
4086         struct mlx5_priv *priv = dev->data->dev_private;
4087         struct mlx5_flow_counter_pool *pool;
4088         struct mlx5_devx_obj *dcs = NULL;
4089         struct mlx5_flow_counter *cnt;
4090         uint32_t i;
4091
4092         if (!batch) {
4093                 /* bulk_bitmap must be 0 for single counter allocation. */
4094                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4095                 if (!dcs)
4096                         return NULL;
4097                 pool = flow_dv_find_pool_by_id
4098                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4099                 if (!pool) {
4100                         pool = flow_dv_pool_create(dev, dcs, batch);
4101                         if (!pool) {
4102                                 mlx5_devx_cmd_destroy(dcs);
4103                                 return NULL;
4104                         }
4105                 } else if (dcs->id < pool->min_dcs->id) {
4106                         rte_atomic64_set(&pool->a64_dcs,
4107                                          (int64_t)(uintptr_t)dcs);
4108                 }
4109                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4110                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4111                 cnt->dcs = dcs;
4112                 *cnt_free = cnt;
4113                 return pool;
4114         }
4115         /* bulk_bitmap is in 128 counters units. */
4116         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4117                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4118         if (!dcs) {
4119                 rte_errno = ENODATA;
4120                 return NULL;
4121         }
4122         pool = flow_dv_pool_create(dev, dcs, batch);
4123         if (!pool) {
4124                 mlx5_devx_cmd_destroy(dcs);
4125                 return NULL;
4126         }
4127         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4128                 cnt = &pool->counters_raw[i];
4129                 cnt->pool = pool;
4130                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4131         }
4132         *cnt_free = &pool->counters_raw[0];
4133         return pool;
4134 }
4135
4136 /**
4137  * Search for existed shared counter.
4138  *
4139  * @param[in] cont
4140  *   Pointer to the relevant counter pool container.
4141  * @param[in] id
4142  *   The shared counter ID to search.
4143  *
4144  * @return
4145  *   NULL if not existed, otherwise pointer to the shared counter.
4146  */
4147 static struct mlx5_flow_counter *
4148 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4149                               uint32_t id)
4150 {
4151         static struct mlx5_flow_counter *cnt;
4152         struct mlx5_flow_counter_pool *pool;
4153         int i;
4154
4155         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4156                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4157                         cnt = &pool->counters_raw[i];
4158                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4159                                 return cnt;
4160                 }
4161         }
4162         return NULL;
4163 }
4164
4165 /**
4166  * Allocate a flow counter.
4167  *
4168  * @param[in] dev
4169  *   Pointer to the Ethernet device structure.
4170  * @param[in] shared
4171  *   Indicate if this counter is shared with other flows.
4172  * @param[in] id
4173  *   Counter identifier.
4174  * @param[in] group
4175  *   Counter flow group.
4176  *
4177  * @return
4178  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4179  */
4180 static struct mlx5_flow_counter *
4181 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4182                       uint16_t group)
4183 {
4184         struct mlx5_priv *priv = dev->data->dev_private;
4185         struct mlx5_flow_counter_pool *pool = NULL;
4186         struct mlx5_flow_counter *cnt_free = NULL;
4187         /*
4188          * Currently group 0 flow counter cannot be assigned to a flow if it is
4189          * not the first one in the batch counter allocation, so it is better
4190          * to allocate counters one by one for these flows in a separate
4191          * container.
4192          * A counter can be shared between different groups so need to take
4193          * shared counters from the single container.
4194          */
4195         uint32_t batch = (group && !shared) ? 1 : 0;
4196         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4197                                                                0);
4198
4199         if (priv->counter_fallback)
4200                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4201         if (!priv->config.devx) {
4202                 rte_errno = ENOTSUP;
4203                 return NULL;
4204         }
4205         if (shared) {
4206                 cnt_free = flow_dv_counter_shared_search(cont, id);
4207                 if (cnt_free) {
4208                         if (cnt_free->ref_cnt + 1 == 0) {
4209                                 rte_errno = E2BIG;
4210                                 return NULL;
4211                         }
4212                         cnt_free->ref_cnt++;
4213                         return cnt_free;
4214                 }
4215         }
4216         /* Pools which has a free counters are in the start. */
4217         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4218                 /*
4219                  * The free counter reset values must be updated between the
4220                  * counter release to the counter allocation, so, at least one
4221                  * query must be done in this time. ensure it by saving the
4222                  * query generation in the release time.
4223                  * The free list is sorted according to the generation - so if
4224                  * the first one is not updated, all the others are not
4225                  * updated too.
4226                  */
4227                 cnt_free = TAILQ_FIRST(&pool->counters);
4228                 if (cnt_free && cnt_free->query_gen + 1 <
4229                     rte_atomic64_read(&pool->query_gen))
4230                         break;
4231                 cnt_free = NULL;
4232         }
4233         if (!cnt_free) {
4234                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4235                 if (!pool)
4236                         return NULL;
4237         }
4238         cnt_free->batch = batch;
4239         /* Create a DV counter action only in the first time usage. */
4240         if (!cnt_free->action) {
4241                 uint16_t offset;
4242                 struct mlx5_devx_obj *dcs;
4243
4244                 if (batch) {
4245                         offset = cnt_free - &pool->counters_raw[0];
4246                         dcs = pool->min_dcs;
4247                 } else {
4248                         offset = 0;
4249                         dcs = cnt_free->dcs;
4250                 }
4251                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4252                                         (dcs->obj, offset);
4253                 if (!cnt_free->action) {
4254                         rte_errno = errno;
4255                         return NULL;
4256                 }
4257         }
4258         /* Update the counter reset values. */
4259         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4260                                  &cnt_free->bytes))
4261                 return NULL;
4262         cnt_free->shared = shared;
4263         cnt_free->ref_cnt = 1;
4264         cnt_free->id = id;
4265         if (!priv->sh->cmng.query_thread_on)
4266                 /* Start the asynchronous batch query by the host thread. */
4267                 mlx5_set_query_alarm(priv->sh);
4268         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4269         if (TAILQ_EMPTY(&pool->counters)) {
4270                 /* Move the pool to the end of the container pool list. */
4271                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4272                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4273         }
4274         return cnt_free;
4275 }
4276
4277 /**
4278  * Release a flow counter.
4279  *
4280  * @param[in] dev
4281  *   Pointer to the Ethernet device structure.
4282  * @param[in] counter
4283  *   Pointer to the counter handler.
4284  */
4285 static void
4286 flow_dv_counter_release(struct rte_eth_dev *dev,
4287                         struct mlx5_flow_counter *counter)
4288 {
4289         struct mlx5_priv *priv = dev->data->dev_private;
4290
4291         if (!counter)
4292                 return;
4293         if (priv->counter_fallback) {
4294                 flow_dv_counter_release_fallback(dev, counter);
4295                 return;
4296         }
4297         if (--counter->ref_cnt == 0) {
4298                 struct mlx5_flow_counter_pool *pool =
4299                                 flow_dv_counter_pool_get(counter);
4300
4301                 /* Put the counter in the end - the last updated one. */
4302                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4303                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4304         }
4305 }
4306
4307 /**
4308  * Verify the @p attributes will be correctly understood by the NIC and store
4309  * them in the @p flow if everything is correct.
4310  *
4311  * @param[in] dev
4312  *   Pointer to dev struct.
4313  * @param[in] attributes
4314  *   Pointer to flow attributes
4315  * @param[in] external
4316  *   This flow rule is created by request external to PMD.
4317  * @param[out] error
4318  *   Pointer to error structure.
4319  *
4320  * @return
4321  *   0 on success, a negative errno value otherwise and rte_errno is set.
4322  */
4323 static int
4324 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4325                             const struct rte_flow_attr *attributes,
4326                             bool external __rte_unused,
4327                             struct rte_flow_error *error)
4328 {
4329         struct mlx5_priv *priv = dev->data->dev_private;
4330         uint32_t priority_max = priv->config.flow_prio - 1;
4331
4332 #ifndef HAVE_MLX5DV_DR
4333         if (attributes->group)
4334                 return rte_flow_error_set(error, ENOTSUP,
4335                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4336                                           NULL,
4337                                           "groups are not supported");
4338 #else
4339         uint32_t table;
4340         int ret;
4341
4342         ret = mlx5_flow_group_to_table(attributes, external,
4343                                        attributes->group, !!priv->fdb_def_rule,
4344                                        &table, error);
4345         if (ret)
4346                 return ret;
4347 #endif
4348         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4349             attributes->priority >= priority_max)
4350                 return rte_flow_error_set(error, ENOTSUP,
4351                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4352                                           NULL,
4353                                           "priority out of range");
4354         if (attributes->transfer) {
4355                 if (!priv->config.dv_esw_en)
4356                         return rte_flow_error_set
4357                                 (error, ENOTSUP,
4358                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4359                                  "E-Switch dr is not supported");
4360                 if (!(priv->representor || priv->master))
4361                         return rte_flow_error_set
4362                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4363                                  NULL, "E-Switch configuration can only be"
4364                                  " done by a master or a representor device");
4365                 if (attributes->egress)
4366                         return rte_flow_error_set
4367                                 (error, ENOTSUP,
4368                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4369                                  "egress is not supported");
4370         }
4371         if (!(attributes->egress ^ attributes->ingress))
4372                 return rte_flow_error_set(error, ENOTSUP,
4373                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4374                                           "must specify exactly one of "
4375                                           "ingress or egress");
4376         return 0;
4377 }
4378
4379 /**
4380  * Internal validation function. For validating both actions and items.
4381  *
4382  * @param[in] dev
4383  *   Pointer to the rte_eth_dev structure.
4384  * @param[in] attr
4385  *   Pointer to the flow attributes.
4386  * @param[in] items
4387  *   Pointer to the list of items.
4388  * @param[in] actions
4389  *   Pointer to the list of actions.
4390  * @param[in] external
4391  *   This flow rule is created by request external to PMD.
4392  * @param[out] error
4393  *   Pointer to the error structure.
4394  *
4395  * @return
4396  *   0 on success, a negative errno value otherwise and rte_errno is set.
4397  */
4398 static int
4399 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4400                  const struct rte_flow_item items[],
4401                  const struct rte_flow_action actions[],
4402                  bool external, struct rte_flow_error *error)
4403 {
4404         int ret;
4405         uint64_t action_flags = 0;
4406         uint64_t item_flags = 0;
4407         uint64_t last_item = 0;
4408         uint8_t next_protocol = 0xff;
4409         uint16_t ether_type = 0;
4410         int actions_n = 0;
4411         uint8_t item_ipv6_proto = 0;
4412         const struct rte_flow_item *gre_item = NULL;
4413         struct rte_flow_item_tcp nic_tcp_mask = {
4414                 .hdr = {
4415                         .tcp_flags = 0xFF,
4416                         .src_port = RTE_BE16(UINT16_MAX),
4417                         .dst_port = RTE_BE16(UINT16_MAX),
4418                 }
4419         };
4420         struct mlx5_priv *priv = dev->data->dev_private;
4421         struct mlx5_dev_config *dev_conf = &priv->config;
4422
4423         if (items == NULL)
4424                 return -1;
4425         ret = flow_dv_validate_attributes(dev, attr, external, error);
4426         if (ret < 0)
4427                 return ret;
4428         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4429                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4430                 int type = items->type;
4431
4432                 switch (type) {
4433                 case RTE_FLOW_ITEM_TYPE_VOID:
4434                         break;
4435                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4436                         ret = flow_dv_validate_item_port_id
4437                                         (dev, items, attr, item_flags, error);
4438                         if (ret < 0)
4439                                 return ret;
4440                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4441                         break;
4442                 case RTE_FLOW_ITEM_TYPE_ETH:
4443                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4444                                                           error);
4445                         if (ret < 0)
4446                                 return ret;
4447                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4448                                              MLX5_FLOW_LAYER_OUTER_L2;
4449                         if (items->mask != NULL && items->spec != NULL) {
4450                                 ether_type =
4451                                         ((const struct rte_flow_item_eth *)
4452                                          items->spec)->type;
4453                                 ether_type &=
4454                                         ((const struct rte_flow_item_eth *)
4455                                          items->mask)->type;
4456                                 ether_type = rte_be_to_cpu_16(ether_type);
4457                         } else {
4458                                 ether_type = 0;
4459                         }
4460                         break;
4461                 case RTE_FLOW_ITEM_TYPE_VLAN:
4462                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4463                                                            dev, error);
4464                         if (ret < 0)
4465                                 return ret;
4466                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4467                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4468                         if (items->mask != NULL && items->spec != NULL) {
4469                                 ether_type =
4470                                         ((const struct rte_flow_item_vlan *)
4471                                          items->spec)->inner_type;
4472                                 ether_type &=
4473                                         ((const struct rte_flow_item_vlan *)
4474                                          items->mask)->inner_type;
4475                                 ether_type = rte_be_to_cpu_16(ether_type);
4476                         } else {
4477                                 ether_type = 0;
4478                         }
4479                         break;
4480                 case RTE_FLOW_ITEM_TYPE_IPV4:
4481                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4482                                                   &item_flags, &tunnel);
4483                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4484                                                            last_item,
4485                                                            ether_type, NULL,
4486                                                            error);
4487                         if (ret < 0)
4488                                 return ret;
4489                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4490                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4491                         if (items->mask != NULL &&
4492                             ((const struct rte_flow_item_ipv4 *)
4493                              items->mask)->hdr.next_proto_id) {
4494                                 next_protocol =
4495                                         ((const struct rte_flow_item_ipv4 *)
4496                                          (items->spec))->hdr.next_proto_id;
4497                                 next_protocol &=
4498                                         ((const struct rte_flow_item_ipv4 *)
4499                                          (items->mask))->hdr.next_proto_id;
4500                         } else {
4501                                 /* Reset for inner layer. */
4502                                 next_protocol = 0xff;
4503                         }
4504                         break;
4505                 case RTE_FLOW_ITEM_TYPE_IPV6:
4506                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4507                                                   &item_flags, &tunnel);
4508                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4509                                                            last_item,
4510                                                            ether_type, NULL,
4511                                                            error);
4512                         if (ret < 0)
4513                                 return ret;
4514                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4515                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4516                         if (items->mask != NULL &&
4517                             ((const struct rte_flow_item_ipv6 *)
4518                              items->mask)->hdr.proto) {
4519                                 item_ipv6_proto =
4520                                         ((const struct rte_flow_item_ipv6 *)
4521                                          items->spec)->hdr.proto;
4522                                 next_protocol =
4523                                         ((const struct rte_flow_item_ipv6 *)
4524                                          items->spec)->hdr.proto;
4525                                 next_protocol &=
4526                                         ((const struct rte_flow_item_ipv6 *)
4527                                          items->mask)->hdr.proto;
4528                         } else {
4529                                 /* Reset for inner layer. */
4530                                 next_protocol = 0xff;
4531                         }
4532                         break;
4533                 case RTE_FLOW_ITEM_TYPE_TCP:
4534                         ret = mlx5_flow_validate_item_tcp
4535                                                 (items, item_flags,
4536                                                  next_protocol,
4537                                                  &nic_tcp_mask,
4538                                                  error);
4539                         if (ret < 0)
4540                                 return ret;
4541                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4542                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4543                         break;
4544                 case RTE_FLOW_ITEM_TYPE_UDP:
4545                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4546                                                           next_protocol,
4547                                                           error);
4548                         if (ret < 0)
4549                                 return ret;
4550                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4551                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4552                         break;
4553                 case RTE_FLOW_ITEM_TYPE_GRE:
4554                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4555                                                           next_protocol, error);
4556                         if (ret < 0)
4557                                 return ret;
4558                         gre_item = items;
4559                         last_item = MLX5_FLOW_LAYER_GRE;
4560                         break;
4561                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4562                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4563                                                             next_protocol,
4564                                                             error);
4565                         if (ret < 0)
4566                                 return ret;
4567                         last_item = MLX5_FLOW_LAYER_NVGRE;
4568                         break;
4569                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4570                         ret = mlx5_flow_validate_item_gre_key
4571                                 (items, item_flags, gre_item, error);
4572                         if (ret < 0)
4573                                 return ret;
4574                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4575                         break;
4576                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4577                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4578                                                             error);
4579                         if (ret < 0)
4580                                 return ret;
4581                         last_item = MLX5_FLOW_LAYER_VXLAN;
4582                         break;
4583                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4584                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4585                                                                 item_flags, dev,
4586                                                                 error);
4587                         if (ret < 0)
4588                                 return ret;
4589                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4590                         break;
4591                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4592                         ret = mlx5_flow_validate_item_geneve(items,
4593                                                              item_flags, dev,
4594                                                              error);
4595                         if (ret < 0)
4596                                 return ret;
4597                         last_item = MLX5_FLOW_LAYER_GENEVE;
4598                         break;
4599                 case RTE_FLOW_ITEM_TYPE_MPLS:
4600                         ret = mlx5_flow_validate_item_mpls(dev, items,
4601                                                            item_flags,
4602                                                            last_item, error);
4603                         if (ret < 0)
4604                                 return ret;
4605                         last_item = MLX5_FLOW_LAYER_MPLS;
4606                         break;
4607
4608                 case RTE_FLOW_ITEM_TYPE_MARK:
4609                         ret = flow_dv_validate_item_mark(dev, items, attr,
4610                                                          error);
4611                         if (ret < 0)
4612                                 return ret;
4613                         last_item = MLX5_FLOW_ITEM_MARK;
4614                         break;
4615                 case RTE_FLOW_ITEM_TYPE_META:
4616                         ret = flow_dv_validate_item_meta(dev, items, attr,
4617                                                          error);
4618                         if (ret < 0)
4619                                 return ret;
4620                         last_item = MLX5_FLOW_ITEM_METADATA;
4621                         break;
4622                 case RTE_FLOW_ITEM_TYPE_ICMP:
4623                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4624                                                            next_protocol,
4625                                                            error);
4626                         if (ret < 0)
4627                                 return ret;
4628                         last_item = MLX5_FLOW_LAYER_ICMP;
4629                         break;
4630                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4631                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4632                                                             next_protocol,
4633                                                             error);
4634                         if (ret < 0)
4635                                 return ret;
4636                         last_item = MLX5_FLOW_LAYER_ICMP6;
4637                         break;
4638                 case RTE_FLOW_ITEM_TYPE_TAG:
4639                         ret = flow_dv_validate_item_tag(dev, items,
4640                                                         attr, error);
4641                         if (ret < 0)
4642                                 return ret;
4643                         last_item = MLX5_FLOW_ITEM_TAG;
4644                         break;
4645                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4646                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4647                         break;
4648                 case RTE_FLOW_ITEM_TYPE_GTP:
4649                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4650                                                         error);
4651                         if (ret < 0)
4652                                 return ret;
4653                         last_item = MLX5_FLOW_LAYER_GTP;
4654                         break;
4655                 default:
4656                         return rte_flow_error_set(error, ENOTSUP,
4657                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4658                                                   NULL, "item not supported");
4659                 }
4660                 item_flags |= last_item;
4661         }
4662         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4663                 int type = actions->type;
4664                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4665                         return rte_flow_error_set(error, ENOTSUP,
4666                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4667                                                   actions, "too many actions");
4668                 switch (type) {
4669                 case RTE_FLOW_ACTION_TYPE_VOID:
4670                         break;
4671                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4672                         ret = flow_dv_validate_action_port_id(dev,
4673                                                               action_flags,
4674                                                               actions,
4675                                                               attr,
4676                                                               error);
4677                         if (ret)
4678                                 return ret;
4679                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4680                         ++actions_n;
4681                         break;
4682                 case RTE_FLOW_ACTION_TYPE_FLAG:
4683                         ret = flow_dv_validate_action_flag(dev, action_flags,
4684                                                            attr, error);
4685                         if (ret < 0)
4686                                 return ret;
4687                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4688                                 /* Count all modify-header actions as one. */
4689                                 if (!(action_flags &
4690                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4691                                         ++actions_n;
4692                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4693                                                 MLX5_FLOW_ACTION_MARK_EXT;
4694                         } else {
4695                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4696                                 ++actions_n;
4697                         }
4698                         break;
4699                 case RTE_FLOW_ACTION_TYPE_MARK:
4700                         ret = flow_dv_validate_action_mark(dev, actions,
4701                                                            action_flags,
4702                                                            attr, error);
4703                         if (ret < 0)
4704                                 return ret;
4705                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4706                                 /* Count all modify-header actions as one. */
4707                                 if (!(action_flags &
4708                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4709                                         ++actions_n;
4710                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4711                                                 MLX5_FLOW_ACTION_MARK_EXT;
4712                         } else {
4713                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4714                                 ++actions_n;
4715                         }
4716                         break;
4717                 case RTE_FLOW_ACTION_TYPE_SET_META:
4718                         ret = flow_dv_validate_action_set_meta(dev, actions,
4719                                                                action_flags,
4720                                                                attr, error);
4721                         if (ret < 0)
4722                                 return ret;
4723                         /* Count all modify-header actions as one action. */
4724                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4725                                 ++actions_n;
4726                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4727                         break;
4728                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4729                         ret = flow_dv_validate_action_set_tag(dev, actions,
4730                                                               action_flags,
4731                                                               attr, error);
4732                         if (ret < 0)
4733                                 return ret;
4734                         /* Count all modify-header actions as one action. */
4735                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4736                                 ++actions_n;
4737                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4738                         break;
4739                 case RTE_FLOW_ACTION_TYPE_DROP:
4740                         ret = mlx5_flow_validate_action_drop(action_flags,
4741                                                              attr, error);
4742                         if (ret < 0)
4743                                 return ret;
4744                         action_flags |= MLX5_FLOW_ACTION_DROP;
4745                         ++actions_n;
4746                         break;
4747                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4748                         ret = mlx5_flow_validate_action_queue(actions,
4749                                                               action_flags, dev,
4750                                                               attr, error);
4751                         if (ret < 0)
4752                                 return ret;
4753                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4754                         ++actions_n;
4755                         break;
4756                 case RTE_FLOW_ACTION_TYPE_RSS:
4757                         ret = mlx5_flow_validate_action_rss(actions,
4758                                                             action_flags, dev,
4759                                                             attr, item_flags,
4760                                                             error);
4761                         if (ret < 0)
4762                                 return ret;
4763                         action_flags |= MLX5_FLOW_ACTION_RSS;
4764                         ++actions_n;
4765                         break;
4766                 case RTE_FLOW_ACTION_TYPE_COUNT:
4767                         ret = flow_dv_validate_action_count(dev, error);
4768                         if (ret < 0)
4769                                 return ret;
4770                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4771                         ++actions_n;
4772                         break;
4773                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4774                         if (flow_dv_validate_action_pop_vlan(dev,
4775                                                              action_flags,
4776                                                              actions,
4777                                                              item_flags, attr,
4778                                                              error))
4779                                 return -rte_errno;
4780                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4781                         ++actions_n;
4782                         break;
4783                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4784                         ret = flow_dv_validate_action_push_vlan(action_flags,
4785                                                                 item_flags,
4786                                                                 actions, attr,
4787                                                                 error);
4788                         if (ret < 0)
4789                                 return ret;
4790                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4791                         ++actions_n;
4792                         break;
4793                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4794                         ret = flow_dv_validate_action_set_vlan_pcp
4795                                                 (action_flags, actions, error);
4796                         if (ret < 0)
4797                                 return ret;
4798                         /* Count PCP with push_vlan command. */
4799                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4800                         break;
4801                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4802                         ret = flow_dv_validate_action_set_vlan_vid
4803                                                 (item_flags, action_flags,
4804                                                  actions, error);
4805                         if (ret < 0)
4806                                 return ret;
4807                         /* Count VID with push_vlan command. */
4808                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4809                         break;
4810                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4811                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4812                         ret = flow_dv_validate_action_l2_encap(action_flags,
4813                                                                actions, attr,
4814                                                                error);
4815                         if (ret < 0)
4816                                 return ret;
4817                         action_flags |= actions->type ==
4818                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4819                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4820                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4821                         ++actions_n;
4822                         break;
4823                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4824                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4825                         ret = flow_dv_validate_action_l2_decap(action_flags,
4826                                                                attr, error);
4827                         if (ret < 0)
4828                                 return ret;
4829                         action_flags |= actions->type ==
4830                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4831                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4832                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4833                         ++actions_n;
4834                         break;
4835                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4836                         ret = flow_dv_validate_action_raw_encap(action_flags,
4837                                                                 actions, attr,
4838                                                                 error);
4839                         if (ret < 0)
4840                                 return ret;
4841                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4842                         ++actions_n;
4843                         break;
4844                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4845                         ret = flow_dv_validate_action_raw_decap(action_flags,
4846                                                                 actions, attr,
4847                                                                 error);
4848                         if (ret < 0)
4849                                 return ret;
4850                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4851                         ++actions_n;
4852                         break;
4853                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4854                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4855                         ret = flow_dv_validate_action_modify_mac(action_flags,
4856                                                                  actions,
4857                                                                  item_flags,
4858                                                                  error);
4859                         if (ret < 0)
4860                                 return ret;
4861                         /* Count all modify-header actions as one action. */
4862                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4863                                 ++actions_n;
4864                         action_flags |= actions->type ==
4865                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4866                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4867                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4868                         break;
4869
4870                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4871                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4872                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4873                                                                   actions,
4874                                                                   item_flags,
4875                                                                   error);
4876                         if (ret < 0)
4877                                 return ret;
4878                         /* Count all modify-header actions as one action. */
4879                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4880                                 ++actions_n;
4881                         action_flags |= actions->type ==
4882                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4883                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4884                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4885                         break;
4886                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4887                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4888                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4889                                                                   actions,
4890                                                                   item_flags,
4891                                                                   error);
4892                         if (ret < 0)
4893                                 return ret;
4894                         if (item_ipv6_proto == IPPROTO_ICMPV6)
4895                                 return rte_flow_error_set(error, ENOTSUP,
4896                                         RTE_FLOW_ERROR_TYPE_ACTION,
4897                                         actions,
4898                                         "Can't change header "
4899                                         "with ICMPv6 proto");
4900                         /* Count all modify-header actions as one action. */
4901                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4902                                 ++actions_n;
4903                         action_flags |= actions->type ==
4904                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4905                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4906                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4907                         break;
4908                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4909                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4910                         ret = flow_dv_validate_action_modify_tp(action_flags,
4911                                                                 actions,
4912                                                                 item_flags,
4913                                                                 error);
4914                         if (ret < 0)
4915                                 return ret;
4916                         /* Count all modify-header actions as one action. */
4917                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4918                                 ++actions_n;
4919                         action_flags |= actions->type ==
4920                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4921                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4922                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4923                         break;
4924                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4925                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4926                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4927                                                                  actions,
4928                                                                  item_flags,
4929                                                                  error);
4930                         if (ret < 0)
4931                                 return ret;
4932                         /* Count all modify-header actions as one action. */
4933                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4934                                 ++actions_n;
4935                         action_flags |= actions->type ==
4936                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4937                                                 MLX5_FLOW_ACTION_SET_TTL :
4938                                                 MLX5_FLOW_ACTION_DEC_TTL;
4939                         break;
4940                 case RTE_FLOW_ACTION_TYPE_JUMP:
4941                         ret = flow_dv_validate_action_jump(actions,
4942                                                            action_flags,
4943                                                            attr, external,
4944                                                            error);
4945                         if (ret)
4946                                 return ret;
4947                         ++actions_n;
4948                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4949                         break;
4950                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4951                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4952                         ret = flow_dv_validate_action_modify_tcp_seq
4953                                                                 (action_flags,
4954                                                                  actions,
4955                                                                  item_flags,
4956                                                                  error);
4957                         if (ret < 0)
4958                                 return ret;
4959                         /* Count all modify-header actions as one action. */
4960                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4961                                 ++actions_n;
4962                         action_flags |= actions->type ==
4963                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4964                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4965                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4966                         break;
4967                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4968                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4969                         ret = flow_dv_validate_action_modify_tcp_ack
4970                                                                 (action_flags,
4971                                                                  actions,
4972                                                                  item_flags,
4973                                                                  error);
4974                         if (ret < 0)
4975                                 return ret;
4976                         /* Count all modify-header actions as one action. */
4977                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4978                                 ++actions_n;
4979                         action_flags |= actions->type ==
4980                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4981                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4982                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4983                         break;
4984                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4985                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4986                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4987                         break;
4988                 case RTE_FLOW_ACTION_TYPE_METER:
4989                         ret = mlx5_flow_validate_action_meter(dev,
4990                                                               action_flags,
4991                                                               actions, attr,
4992                                                               error);
4993                         if (ret < 0)
4994                                 return ret;
4995                         action_flags |= MLX5_FLOW_ACTION_METER;
4996                         ++actions_n;
4997                         break;
4998                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4999                         ret = flow_dv_validate_action_modify_ipv4_dscp
5000                                                          (action_flags,
5001                                                           actions,
5002                                                           item_flags,
5003                                                           error);
5004                         if (ret < 0)
5005                                 return ret;
5006                         /* Count all modify-header actions as one action. */
5007                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5008                                 ++actions_n;
5009                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5010                         break;
5011                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5012                         ret = flow_dv_validate_action_modify_ipv6_dscp
5013                                                                 (action_flags,
5014                                                                  actions,
5015                                                                  item_flags,
5016                                                                  error);
5017                         if (ret < 0)
5018                                 return ret;
5019                         /* Count all modify-header actions as one action. */
5020                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5021                                 ++actions_n;
5022                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5023                         break;
5024                 default:
5025                         return rte_flow_error_set(error, ENOTSUP,
5026                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5027                                                   actions,
5028                                                   "action not supported");
5029                 }
5030         }
5031         /*
5032          * Validate the drop action mutual exclusion with other actions.
5033          * Drop action is mutually-exclusive with any other action, except for
5034          * Count action.
5035          */
5036         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5037             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5038                 return rte_flow_error_set(error, EINVAL,
5039                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5040                                           "Drop action is mutually-exclusive "
5041                                           "with any other action, except for "
5042                                           "Count action");
5043         /* Eswitch has few restrictions on using items and actions */
5044         if (attr->transfer) {
5045                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5046                     action_flags & MLX5_FLOW_ACTION_FLAG)
5047                         return rte_flow_error_set(error, ENOTSUP,
5048                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5049                                                   NULL,
5050                                                   "unsupported action FLAG");
5051                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5052                     action_flags & MLX5_FLOW_ACTION_MARK)
5053                         return rte_flow_error_set(error, ENOTSUP,
5054                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5055                                                   NULL,
5056                                                   "unsupported action MARK");
5057                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5058                         return rte_flow_error_set(error, ENOTSUP,
5059                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5060                                                   NULL,
5061                                                   "unsupported action QUEUE");
5062                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5063                         return rte_flow_error_set(error, ENOTSUP,
5064                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5065                                                   NULL,
5066                                                   "unsupported action RSS");
5067                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5068                         return rte_flow_error_set(error, EINVAL,
5069                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5070                                                   actions,
5071                                                   "no fate action is found");
5072         } else {
5073                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5074                         return rte_flow_error_set(error, EINVAL,
5075                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5076                                                   actions,
5077                                                   "no fate action is found");
5078         }
5079         return 0;
5080 }
5081
5082 /**
5083  * Internal preparation function. Allocates the DV flow size,
5084  * this size is constant.
5085  *
5086  * @param[in] attr
5087  *   Pointer to the flow attributes.
5088  * @param[in] items
5089  *   Pointer to the list of items.
5090  * @param[in] actions
5091  *   Pointer to the list of actions.
5092  * @param[out] error
5093  *   Pointer to the error structure.
5094  *
5095  * @return
5096  *   Pointer to mlx5_flow object on success,
5097  *   otherwise NULL and rte_errno is set.
5098  */
5099 static struct mlx5_flow *
5100 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5101                 const struct rte_flow_item items[] __rte_unused,
5102                 const struct rte_flow_action actions[] __rte_unused,
5103                 struct rte_flow_error *error)
5104 {
5105         size_t size = sizeof(struct mlx5_flow);
5106         struct mlx5_flow *dev_flow;
5107
5108         dev_flow = rte_calloc(__func__, 1, size, 0);
5109         if (!dev_flow) {
5110                 rte_flow_error_set(error, ENOMEM,
5111                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5112                                    "not enough memory to create flow");
5113                 return NULL;
5114         }
5115         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5116         dev_flow->ingress = attr->ingress;
5117         dev_flow->transfer = attr->transfer;
5118         return dev_flow;
5119 }
5120
5121 #ifdef RTE_LIBRTE_MLX5_DEBUG
5122 /**
5123  * Sanity check for match mask and value. Similar to check_valid_spec() in
5124  * kernel driver. If unmasked bit is present in value, it returns failure.
5125  *
5126  * @param match_mask
5127  *   pointer to match mask buffer.
5128  * @param match_value
5129  *   pointer to match value buffer.
5130  *
5131  * @return
5132  *   0 if valid, -EINVAL otherwise.
5133  */
5134 static int
5135 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5136 {
5137         uint8_t *m = match_mask;
5138         uint8_t *v = match_value;
5139         unsigned int i;
5140
5141         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5142                 if (v[i] & ~m[i]) {
5143                         DRV_LOG(ERR,
5144                                 "match_value differs from match_criteria"
5145                                 " %p[%u] != %p[%u]",
5146                                 match_value, i, match_mask, i);
5147                         return -EINVAL;
5148                 }
5149         }
5150         return 0;
5151 }
5152 #endif
5153
5154 /**
5155  * Add Ethernet item to matcher and to the value.
5156  *
5157  * @param[in, out] matcher
5158  *   Flow matcher.
5159  * @param[in, out] key
5160  *   Flow matcher value.
5161  * @param[in] item
5162  *   Flow pattern to translate.
5163  * @param[in] inner
5164  *   Item is inner pattern.
5165  */
5166 static void
5167 flow_dv_translate_item_eth(void *matcher, void *key,
5168                            const struct rte_flow_item *item, int inner)
5169 {
5170         const struct rte_flow_item_eth *eth_m = item->mask;
5171         const struct rte_flow_item_eth *eth_v = item->spec;
5172         const struct rte_flow_item_eth nic_mask = {
5173                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5174                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5175                 .type = RTE_BE16(0xffff),
5176         };
5177         void *headers_m;
5178         void *headers_v;
5179         char *l24_v;
5180         unsigned int i;
5181
5182         if (!eth_v)
5183                 return;
5184         if (!eth_m)
5185                 eth_m = &nic_mask;
5186         if (inner) {
5187                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5188                                          inner_headers);
5189                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5190         } else {
5191                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5192                                          outer_headers);
5193                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5194         }
5195         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5196                &eth_m->dst, sizeof(eth_m->dst));
5197         /* The value must be in the range of the mask. */
5198         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5199         for (i = 0; i < sizeof(eth_m->dst); ++i)
5200                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5201         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5202                &eth_m->src, sizeof(eth_m->src));
5203         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5204         /* The value must be in the range of the mask. */
5205         for (i = 0; i < sizeof(eth_m->dst); ++i)
5206                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5207         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5208                  rte_be_to_cpu_16(eth_m->type));
5209         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5210         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5211 }
5212
5213 /**
5214  * Add VLAN item to matcher and to the value.
5215  *
5216  * @param[in, out] dev_flow
5217  *   Flow descriptor.
5218  * @param[in, out] matcher
5219  *   Flow matcher.
5220  * @param[in, out] key
5221  *   Flow matcher value.
5222  * @param[in] item
5223  *   Flow pattern to translate.
5224  * @param[in] inner
5225  *   Item is inner pattern.
5226  */
5227 static void
5228 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5229                             void *matcher, void *key,
5230                             const struct rte_flow_item *item,
5231                             int inner)
5232 {
5233         const struct rte_flow_item_vlan *vlan_m = item->mask;
5234         const struct rte_flow_item_vlan *vlan_v = item->spec;
5235         void *headers_m;
5236         void *headers_v;
5237         uint16_t tci_m;
5238         uint16_t tci_v;
5239
5240         if (!vlan_v)
5241                 return;
5242         if (!vlan_m)
5243                 vlan_m = &rte_flow_item_vlan_mask;
5244         if (inner) {
5245                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5246                                          inner_headers);
5247                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5248         } else {
5249                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5250                                          outer_headers);
5251                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5252                 /*
5253                  * This is workaround, masks are not supported,
5254                  * and pre-validated.
5255                  */
5256                 dev_flow->dv.vf_vlan.tag =
5257                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5258         }
5259         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5260         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5261         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5262         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5263         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5264         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5265         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5266         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5267         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5268         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5269         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5270                  rte_be_to_cpu_16(vlan_m->inner_type));
5271         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5272                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5273 }
5274
5275 /**
5276  * Add IPV4 item to matcher and to the value.
5277  *
5278  * @param[in, out] matcher
5279  *   Flow matcher.
5280  * @param[in, out] key
5281  *   Flow matcher value.
5282  * @param[in] item
5283  *   Flow pattern to translate.
5284  * @param[in] inner
5285  *   Item is inner pattern.
5286  * @param[in] group
5287  *   The group to insert the rule.
5288  */
5289 static void
5290 flow_dv_translate_item_ipv4(void *matcher, void *key,
5291                             const struct rte_flow_item *item,
5292                             int inner, uint32_t group)
5293 {
5294         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5295         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5296         const struct rte_flow_item_ipv4 nic_mask = {
5297                 .hdr = {
5298                         .src_addr = RTE_BE32(0xffffffff),
5299                         .dst_addr = RTE_BE32(0xffffffff),
5300                         .type_of_service = 0xff,
5301                         .next_proto_id = 0xff,
5302                 },
5303         };
5304         void *headers_m;
5305         void *headers_v;
5306         char *l24_m;
5307         char *l24_v;
5308         uint8_t tos;
5309
5310         if (inner) {
5311                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5312                                          inner_headers);
5313                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5314         } else {
5315                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5316                                          outer_headers);
5317                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5318         }
5319         if (group == 0)
5320                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5321         else
5322                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5323         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5324         if (!ipv4_v)
5325                 return;
5326         if (!ipv4_m)
5327                 ipv4_m = &nic_mask;
5328         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5329                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5330         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5331                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5332         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5333         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5334         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5335                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5336         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5337                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5338         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5339         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5340         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5341         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5342                  ipv4_m->hdr.type_of_service);
5343         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5344         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5345                  ipv4_m->hdr.type_of_service >> 2);
5346         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5347         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5348                  ipv4_m->hdr.next_proto_id);
5349         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5350                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5351 }
5352
5353 /**
5354  * Add IPV6 item to matcher and to the value.
5355  *
5356  * @param[in, out] matcher
5357  *   Flow matcher.
5358  * @param[in, out] key
5359  *   Flow matcher value.
5360  * @param[in] item
5361  *   Flow pattern to translate.
5362  * @param[in] inner
5363  *   Item is inner pattern.
5364  * @param[in] group
5365  *   The group to insert the rule.
5366  */
5367 static void
5368 flow_dv_translate_item_ipv6(void *matcher, void *key,
5369                             const struct rte_flow_item *item,
5370                             int inner, uint32_t group)
5371 {
5372         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5373         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5374         const struct rte_flow_item_ipv6 nic_mask = {
5375                 .hdr = {
5376                         .src_addr =
5377                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5378                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5379                         .dst_addr =
5380                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5381                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5382                         .vtc_flow = RTE_BE32(0xffffffff),
5383                         .proto = 0xff,
5384                         .hop_limits = 0xff,
5385                 },
5386         };
5387         void *headers_m;
5388         void *headers_v;
5389         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5390         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5391         char *l24_m;
5392         char *l24_v;
5393         uint32_t vtc_m;
5394         uint32_t vtc_v;
5395         int i;
5396         int size;
5397
5398         if (inner) {
5399                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5400                                          inner_headers);
5401                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5402         } else {
5403                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5404                                          outer_headers);
5405                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5406         }
5407         if (group == 0)
5408                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5409         else
5410                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5411         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5412         if (!ipv6_v)
5413                 return;
5414         if (!ipv6_m)
5415                 ipv6_m = &nic_mask;
5416         size = sizeof(ipv6_m->hdr.dst_addr);
5417         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5418                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5419         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5420                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5421         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5422         for (i = 0; i < size; ++i)
5423                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5424         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5425                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5426         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5427                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5428         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5429         for (i = 0; i < size; ++i)
5430                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5431         /* TOS. */
5432         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5433         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5434         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5435         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5436         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5437         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5438         /* Label. */
5439         if (inner) {
5440                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5441                          vtc_m);
5442                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5443                          vtc_v);
5444         } else {
5445                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5446                          vtc_m);
5447                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5448                          vtc_v);
5449         }
5450         /* Protocol. */
5451         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5452                  ipv6_m->hdr.proto);
5453         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5454                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5455 }
5456
5457 /**
5458  * Add TCP item to matcher and to the value.
5459  *
5460  * @param[in, out] matcher
5461  *   Flow matcher.
5462  * @param[in, out] key
5463  *   Flow matcher value.
5464  * @param[in] item
5465  *   Flow pattern to translate.
5466  * @param[in] inner
5467  *   Item is inner pattern.
5468  */
5469 static void
5470 flow_dv_translate_item_tcp(void *matcher, void *key,
5471                            const struct rte_flow_item *item,
5472                            int inner)
5473 {
5474         const struct rte_flow_item_tcp *tcp_m = item->mask;
5475         const struct rte_flow_item_tcp *tcp_v = item->spec;
5476         void *headers_m;
5477         void *headers_v;
5478
5479         if (inner) {
5480                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5481                                          inner_headers);
5482                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5483         } else {
5484                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5485                                          outer_headers);
5486                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5487         }
5488         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5489         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5490         if (!tcp_v)
5491                 return;
5492         if (!tcp_m)
5493                 tcp_m = &rte_flow_item_tcp_mask;
5494         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5495                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5496         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5497                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5498         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5499                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5500         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5501                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5502         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5503                  tcp_m->hdr.tcp_flags);
5504         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5505                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5506 }
5507
5508 /**
5509  * Add UDP item to matcher and to the value.
5510  *
5511  * @param[in, out] matcher
5512  *   Flow matcher.
5513  * @param[in, out] key
5514  *   Flow matcher value.
5515  * @param[in] item
5516  *   Flow pattern to translate.
5517  * @param[in] inner
5518  *   Item is inner pattern.
5519  */
5520 static void
5521 flow_dv_translate_item_udp(void *matcher, void *key,
5522                            const struct rte_flow_item *item,
5523                            int inner)
5524 {
5525         const struct rte_flow_item_udp *udp_m = item->mask;
5526         const struct rte_flow_item_udp *udp_v = item->spec;
5527         void *headers_m;
5528         void *headers_v;
5529
5530         if (inner) {
5531                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5532                                          inner_headers);
5533                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5534         } else {
5535                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5536                                          outer_headers);
5537                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5538         }
5539         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5540         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5541         if (!udp_v)
5542                 return;
5543         if (!udp_m)
5544                 udp_m = &rte_flow_item_udp_mask;
5545         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5546                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5547         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5548                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5549         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5550                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5551         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5552                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5553 }
5554
5555 /**
5556  * Add GRE optional Key item to matcher and to the value.
5557  *
5558  * @param[in, out] matcher
5559  *   Flow matcher.
5560  * @param[in, out] key
5561  *   Flow matcher value.
5562  * @param[in] item
5563  *   Flow pattern to translate.
5564  * @param[in] inner
5565  *   Item is inner pattern.
5566  */
5567 static void
5568 flow_dv_translate_item_gre_key(void *matcher, void *key,
5569                                    const struct rte_flow_item *item)
5570 {
5571         const rte_be32_t *key_m = item->mask;
5572         const rte_be32_t *key_v = item->spec;
5573         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5574         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5575         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5576
5577         if (!key_v)
5578                 return;
5579         if (!key_m)
5580                 key_m = &gre_key_default_mask;
5581         /* GRE K bit must be on and should already be validated */
5582         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5583         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5584         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5585                  rte_be_to_cpu_32(*key_m) >> 8);
5586         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5587                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5588         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5589                  rte_be_to_cpu_32(*key_m) & 0xFF);
5590         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5591                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5592 }
5593
5594 /**
5595  * Add GRE item to matcher and to the value.
5596  *
5597  * @param[in, out] matcher
5598  *   Flow matcher.
5599  * @param[in, out] key
5600  *   Flow matcher value.
5601  * @param[in] item
5602  *   Flow pattern to translate.
5603  * @param[in] inner
5604  *   Item is inner pattern.
5605  */
5606 static void
5607 flow_dv_translate_item_gre(void *matcher, void *key,
5608                            const struct rte_flow_item *item,
5609                            int inner)
5610 {
5611         const struct rte_flow_item_gre *gre_m = item->mask;
5612         const struct rte_flow_item_gre *gre_v = item->spec;
5613         void *headers_m;
5614         void *headers_v;
5615         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5616         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5617         struct {
5618                 union {
5619                         __extension__
5620                         struct {
5621                                 uint16_t version:3;
5622                                 uint16_t rsvd0:9;
5623                                 uint16_t s_present:1;
5624                                 uint16_t k_present:1;
5625                                 uint16_t rsvd_bit1:1;
5626                                 uint16_t c_present:1;
5627                         };
5628                         uint16_t value;
5629                 };
5630         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5631
5632         if (inner) {
5633                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5634                                          inner_headers);
5635                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5636         } else {
5637                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5638                                          outer_headers);
5639                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5640         }
5641         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5642         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5643         if (!gre_v)
5644                 return;
5645         if (!gre_m)
5646                 gre_m = &rte_flow_item_gre_mask;
5647         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5648                  rte_be_to_cpu_16(gre_m->protocol));
5649         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5650                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5651         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5652         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5653         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5654                  gre_crks_rsvd0_ver_m.c_present);
5655         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5656                  gre_crks_rsvd0_ver_v.c_present &
5657                  gre_crks_rsvd0_ver_m.c_present);
5658         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5659                  gre_crks_rsvd0_ver_m.k_present);
5660         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5661                  gre_crks_rsvd0_ver_v.k_present &
5662                  gre_crks_rsvd0_ver_m.k_present);
5663         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5664                  gre_crks_rsvd0_ver_m.s_present);
5665         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5666                  gre_crks_rsvd0_ver_v.s_present &
5667                  gre_crks_rsvd0_ver_m.s_present);
5668 }
5669
5670 /**
5671  * Add NVGRE item to matcher and to the value.
5672  *
5673  * @param[in, out] matcher
5674  *   Flow matcher.
5675  * @param[in, out] key
5676  *   Flow matcher value.
5677  * @param[in] item
5678  *   Flow pattern to translate.
5679  * @param[in] inner
5680  *   Item is inner pattern.
5681  */
5682 static void
5683 flow_dv_translate_item_nvgre(void *matcher, void *key,
5684                              const struct rte_flow_item *item,
5685                              int inner)
5686 {
5687         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5688         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5689         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5690         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5691         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5692         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5693         char *gre_key_m;
5694         char *gre_key_v;
5695         int size;
5696         int i;
5697
5698         /* For NVGRE, GRE header fields must be set with defined values. */
5699         const struct rte_flow_item_gre gre_spec = {
5700                 .c_rsvd0_ver = RTE_BE16(0x2000),
5701                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5702         };
5703         const struct rte_flow_item_gre gre_mask = {
5704                 .c_rsvd0_ver = RTE_BE16(0xB000),
5705                 .protocol = RTE_BE16(UINT16_MAX),
5706         };
5707         const struct rte_flow_item gre_item = {
5708                 .spec = &gre_spec,
5709                 .mask = &gre_mask,
5710                 .last = NULL,
5711         };
5712         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5713         if (!nvgre_v)
5714                 return;
5715         if (!nvgre_m)
5716                 nvgre_m = &rte_flow_item_nvgre_mask;
5717         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5718         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5719         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5720         memcpy(gre_key_m, tni_flow_id_m, size);
5721         for (i = 0; i < size; ++i)
5722                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5723 }
5724
5725 /**
5726  * Add VXLAN item to matcher and to the value.
5727  *
5728  * @param[in, out] matcher
5729  *   Flow matcher.
5730  * @param[in, out] key
5731  *   Flow matcher value.
5732  * @param[in] item
5733  *   Flow pattern to translate.
5734  * @param[in] inner
5735  *   Item is inner pattern.
5736  */
5737 static void
5738 flow_dv_translate_item_vxlan(void *matcher, void *key,
5739                              const struct rte_flow_item *item,
5740                              int inner)
5741 {
5742         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5743         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5744         void *headers_m;
5745         void *headers_v;
5746         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5747         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5748         char *vni_m;
5749         char *vni_v;
5750         uint16_t dport;
5751         int size;
5752         int i;
5753
5754         if (inner) {
5755                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5756                                          inner_headers);
5757                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5758         } else {
5759                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5760                                          outer_headers);
5761                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5762         }
5763         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5764                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5765         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5766                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5767                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5768         }
5769         if (!vxlan_v)
5770                 return;
5771         if (!vxlan_m)
5772                 vxlan_m = &rte_flow_item_vxlan_mask;
5773         size = sizeof(vxlan_m->vni);
5774         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5775         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5776         memcpy(vni_m, vxlan_m->vni, size);
5777         for (i = 0; i < size; ++i)
5778                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5779 }
5780
5781 /**
5782  * Add Geneve item to matcher and to the value.
5783  *
5784  * @param[in, out] matcher
5785  *   Flow matcher.
5786  * @param[in, out] key
5787  *   Flow matcher value.
5788  * @param[in] item
5789  *   Flow pattern to translate.
5790  * @param[in] inner
5791  *   Item is inner pattern.
5792  */
5793
5794 static void
5795 flow_dv_translate_item_geneve(void *matcher, void *key,
5796                               const struct rte_flow_item *item, int inner)
5797 {
5798         const struct rte_flow_item_geneve *geneve_m = item->mask;
5799         const struct rte_flow_item_geneve *geneve_v = item->spec;
5800         void *headers_m;
5801         void *headers_v;
5802         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5803         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5804         uint16_t dport;
5805         uint16_t gbhdr_m;
5806         uint16_t gbhdr_v;
5807         char *vni_m;
5808         char *vni_v;
5809         size_t size, i;
5810
5811         if (inner) {
5812                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5813                                          inner_headers);
5814                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5815         } else {
5816                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5817                                          outer_headers);
5818                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5819         }
5820         dport = MLX5_UDP_PORT_GENEVE;
5821         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5822                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5823                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5824         }
5825         if (!geneve_v)
5826                 return;
5827         if (!geneve_m)
5828                 geneve_m = &rte_flow_item_geneve_mask;
5829         size = sizeof(geneve_m->vni);
5830         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5831         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5832         memcpy(vni_m, geneve_m->vni, size);
5833         for (i = 0; i < size; ++i)
5834                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5835         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5836                  rte_be_to_cpu_16(geneve_m->protocol));
5837         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5838                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5839         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5840         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5841         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5842                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5843         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5844                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5845         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5846                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5847         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5848                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5849                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5850 }
5851
5852 /**
5853  * Add MPLS item to matcher and to the value.
5854  *
5855  * @param[in, out] matcher
5856  *   Flow matcher.
5857  * @param[in, out] key
5858  *   Flow matcher value.
5859  * @param[in] item
5860  *   Flow pattern to translate.
5861  * @param[in] prev_layer
5862  *   The protocol layer indicated in previous item.
5863  * @param[in] inner
5864  *   Item is inner pattern.
5865  */
5866 static void
5867 flow_dv_translate_item_mpls(void *matcher, void *key,
5868                             const struct rte_flow_item *item,
5869                             uint64_t prev_layer,
5870                             int inner)
5871 {
5872         const uint32_t *in_mpls_m = item->mask;
5873         const uint32_t *in_mpls_v = item->spec;
5874         uint32_t *out_mpls_m = 0;
5875         uint32_t *out_mpls_v = 0;
5876         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5877         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5878         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5879                                      misc_parameters_2);
5880         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5881         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5882         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5883
5884         switch (prev_layer) {
5885         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5886                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5887                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5888                          MLX5_UDP_PORT_MPLS);
5889                 break;
5890         case MLX5_FLOW_LAYER_GRE:
5891                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5892                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5893                          RTE_ETHER_TYPE_MPLS);
5894                 break;
5895         default:
5896                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5897                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5898                          IPPROTO_MPLS);
5899                 break;
5900         }
5901         if (!in_mpls_v)
5902                 return;
5903         if (!in_mpls_m)
5904                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5905         switch (prev_layer) {
5906         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5907                 out_mpls_m =
5908                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5909                                                  outer_first_mpls_over_udp);
5910                 out_mpls_v =
5911                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5912                                                  outer_first_mpls_over_udp);
5913                 break;
5914         case MLX5_FLOW_LAYER_GRE:
5915                 out_mpls_m =
5916                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5917                                                  outer_first_mpls_over_gre);
5918                 out_mpls_v =
5919                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5920                                                  outer_first_mpls_over_gre);
5921                 break;
5922         default:
5923                 /* Inner MPLS not over GRE is not supported. */
5924                 if (!inner) {
5925                         out_mpls_m =
5926                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5927                                                          misc2_m,
5928                                                          outer_first_mpls);
5929                         out_mpls_v =
5930                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5931                                                          misc2_v,
5932                                                          outer_first_mpls);
5933                 }
5934                 break;
5935         }
5936         if (out_mpls_m && out_mpls_v) {
5937                 *out_mpls_m = *in_mpls_m;
5938                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5939         }
5940 }
5941
5942 /**
5943  * Add metadata register item to matcher
5944  *
5945  * @param[in, out] matcher
5946  *   Flow matcher.
5947  * @param[in, out] key
5948  *   Flow matcher value.
5949  * @param[in] reg_type
5950  *   Type of device metadata register
5951  * @param[in] value
5952  *   Register value
5953  * @param[in] mask
5954  *   Register mask
5955  */
5956 static void
5957 flow_dv_match_meta_reg(void *matcher, void *key,
5958                        enum modify_reg reg_type,
5959                        uint32_t data, uint32_t mask)
5960 {
5961         void *misc2_m =
5962                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5963         void *misc2_v =
5964                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5965         uint32_t temp;
5966
5967         data &= mask;
5968         switch (reg_type) {
5969         case REG_A:
5970                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5971                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5972                 break;
5973         case REG_B:
5974                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5975                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5976                 break;
5977         case REG_C_0:
5978                 /*
5979                  * The metadata register C0 field might be divided into
5980                  * source vport index and META item value, we should set
5981                  * this field according to specified mask, not as whole one.
5982                  */
5983                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
5984                 temp |= mask;
5985                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
5986                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
5987                 temp &= ~mask;
5988                 temp |= data;
5989                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
5990                 break;
5991         case REG_C_1:
5992                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5993                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5994                 break;
5995         case REG_C_2:
5996                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5997                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5998                 break;
5999         case REG_C_3:
6000                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6001                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6002                 break;
6003         case REG_C_4:
6004                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6005                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6006                 break;
6007         case REG_C_5:
6008                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6009                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6010                 break;
6011         case REG_C_6:
6012                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6013                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6014                 break;
6015         case REG_C_7:
6016                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6017                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6018                 break;
6019         default:
6020                 assert(false);
6021                 break;
6022         }
6023 }
6024
6025 /**
6026  * Add MARK item to matcher
6027  *
6028  * @param[in] dev
6029  *   The device to configure through.
6030  * @param[in, out] matcher
6031  *   Flow matcher.
6032  * @param[in, out] key
6033  *   Flow matcher value.
6034  * @param[in] item
6035  *   Flow pattern to translate.
6036  */
6037 static void
6038 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6039                             void *matcher, void *key,
6040                             const struct rte_flow_item *item)
6041 {
6042         struct mlx5_priv *priv = dev->data->dev_private;
6043         const struct rte_flow_item_mark *mark;
6044         uint32_t value;
6045         uint32_t mask;
6046
6047         mark = item->mask ? (const void *)item->mask :
6048                             &rte_flow_item_mark_mask;
6049         mask = mark->id & priv->sh->dv_mark_mask;
6050         mark = (const void *)item->spec;
6051         assert(mark);
6052         value = mark->id & priv->sh->dv_mark_mask & mask;
6053         if (mask) {
6054                 enum modify_reg reg;
6055
6056                 /* Get the metadata register index for the mark. */
6057                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6058                 assert(reg > 0);
6059                 if (reg == REG_C_0) {
6060                         struct mlx5_priv *priv = dev->data->dev_private;
6061                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6062                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6063
6064                         mask &= msk_c0;
6065                         mask <<= shl_c0;
6066                         value <<= shl_c0;
6067                 }
6068                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6069         }
6070 }
6071
6072 /**
6073  * Add META item to matcher
6074  *
6075  * @param[in] dev
6076  *   The devich to configure through.
6077  * @param[in, out] matcher
6078  *   Flow matcher.
6079  * @param[in, out] key
6080  *   Flow matcher value.
6081  * @param[in] attr
6082  *   Attributes of flow that includes this item.
6083  * @param[in] item
6084  *   Flow pattern to translate.
6085  */
6086 static void
6087 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6088                             void *matcher, void *key,
6089                             const struct rte_flow_attr *attr,
6090                             const struct rte_flow_item *item)
6091 {
6092         const struct rte_flow_item_meta *meta_m;
6093         const struct rte_flow_item_meta *meta_v;
6094
6095         meta_m = (const void *)item->mask;
6096         if (!meta_m)
6097                 meta_m = &rte_flow_item_meta_mask;
6098         meta_v = (const void *)item->spec;
6099         if (meta_v) {
6100                 int reg;
6101                 uint32_t value = meta_v->data;
6102                 uint32_t mask = meta_m->data;
6103
6104                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6105                 if (reg < 0)
6106                         return;
6107                 /*
6108                  * In datapath code there is no endianness
6109                  * coversions for perfromance reasons, all
6110                  * pattern conversions are done in rte_flow.
6111                  */
6112                 value = rte_cpu_to_be_32(value);
6113                 mask = rte_cpu_to_be_32(mask);
6114                 if (reg == REG_C_0) {
6115                         struct mlx5_priv *priv = dev->data->dev_private;
6116                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6117                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6118 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6119                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6120
6121                         value >>= shr_c0;
6122                         mask >>= shr_c0;
6123 #endif
6124                         value <<= shl_c0;
6125                         mask <<= shl_c0;
6126                         assert(msk_c0);
6127                         assert(!(~msk_c0 & mask));
6128                 }
6129                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6130         }
6131 }
6132
6133 /**
6134  * Add vport metadata Reg C0 item to matcher
6135  *
6136  * @param[in, out] matcher
6137  *   Flow matcher.
6138  * @param[in, out] key
6139  *   Flow matcher value.
6140  * @param[in] reg
6141  *   Flow pattern to translate.
6142  */
6143 static void
6144 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6145                                   uint32_t value, uint32_t mask)
6146 {
6147         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6148 }
6149
6150 /**
6151  * Add tag item to matcher
6152  *
6153  * @param[in] dev
6154  *   The devich to configure through.
6155  * @param[in, out] matcher
6156  *   Flow matcher.
6157  * @param[in, out] key
6158  *   Flow matcher value.
6159  * @param[in] item
6160  *   Flow pattern to translate.
6161  */
6162 static void
6163 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6164                                 void *matcher, void *key,
6165                                 const struct rte_flow_item *item)
6166 {
6167         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6168         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6169         uint32_t mask, value;
6170
6171         assert(tag_v);
6172         value = tag_v->data;
6173         mask = tag_m ? tag_m->data : UINT32_MAX;
6174         if (tag_v->id == REG_C_0) {
6175                 struct mlx5_priv *priv = dev->data->dev_private;
6176                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6177                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6178
6179                 mask &= msk_c0;
6180                 mask <<= shl_c0;
6181                 value <<= shl_c0;
6182         }
6183         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6184 }
6185
6186 /**
6187  * Add TAG item to matcher
6188  *
6189  * @param[in] dev
6190  *   The devich to configure through.
6191  * @param[in, out] matcher
6192  *   Flow matcher.
6193  * @param[in, out] key
6194  *   Flow matcher value.
6195  * @param[in] item
6196  *   Flow pattern to translate.
6197  */
6198 static void
6199 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6200                            void *matcher, void *key,
6201                            const struct rte_flow_item *item)
6202 {
6203         const struct rte_flow_item_tag *tag_v = item->spec;
6204         const struct rte_flow_item_tag *tag_m = item->mask;
6205         enum modify_reg reg;
6206
6207         assert(tag_v);
6208         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6209         /* Get the metadata register index for the tag. */
6210         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6211         assert(reg > 0);
6212         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6213 }
6214
6215 /**
6216  * Add source vport match to the specified matcher.
6217  *
6218  * @param[in, out] matcher
6219  *   Flow matcher.
6220  * @param[in, out] key
6221  *   Flow matcher value.
6222  * @param[in] port
6223  *   Source vport value to match
6224  * @param[in] mask
6225  *   Mask
6226  */
6227 static void
6228 flow_dv_translate_item_source_vport(void *matcher, void *key,
6229                                     int16_t port, uint16_t mask)
6230 {
6231         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6232         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6233
6234         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6235         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6236 }
6237
6238 /**
6239  * Translate port-id item to eswitch match on  port-id.
6240  *
6241  * @param[in] dev
6242  *   The devich to configure through.
6243  * @param[in, out] matcher
6244  *   Flow matcher.
6245  * @param[in, out] key
6246  *   Flow matcher value.
6247  * @param[in] item
6248  *   Flow pattern to translate.
6249  *
6250  * @return
6251  *   0 on success, a negative errno value otherwise.
6252  */
6253 static int
6254 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6255                                void *key, const struct rte_flow_item *item)
6256 {
6257         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6258         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6259         struct mlx5_priv *priv;
6260         uint16_t mask, id;
6261
6262         mask = pid_m ? pid_m->id : 0xffff;
6263         id = pid_v ? pid_v->id : dev->data->port_id;
6264         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6265         if (!priv)
6266                 return -rte_errno;
6267         /* Translate to vport field or to metadata, depending on mode. */
6268         if (priv->vport_meta_mask)
6269                 flow_dv_translate_item_meta_vport(matcher, key,
6270                                                   priv->vport_meta_tag,
6271                                                   priv->vport_meta_mask);
6272         else
6273                 flow_dv_translate_item_source_vport(matcher, key,
6274                                                     priv->vport_id, mask);
6275         return 0;
6276 }
6277
6278 /**
6279  * Add ICMP6 item to matcher and to the value.
6280  *
6281  * @param[in, out] matcher
6282  *   Flow matcher.
6283  * @param[in, out] key
6284  *   Flow matcher value.
6285  * @param[in] item
6286  *   Flow pattern to translate.
6287  * @param[in] inner
6288  *   Item is inner pattern.
6289  */
6290 static void
6291 flow_dv_translate_item_icmp6(void *matcher, void *key,
6292                               const struct rte_flow_item *item,
6293                               int inner)
6294 {
6295         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6296         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6297         void *headers_m;
6298         void *headers_v;
6299         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6300                                      misc_parameters_3);
6301         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6302         if (inner) {
6303                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6304                                          inner_headers);
6305                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6306         } else {
6307                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6308                                          outer_headers);
6309                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6310         }
6311         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6312         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6313         if (!icmp6_v)
6314                 return;
6315         if (!icmp6_m)
6316                 icmp6_m = &rte_flow_item_icmp6_mask;
6317         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6318         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6319                  icmp6_v->type & icmp6_m->type);
6320         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6321         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6322                  icmp6_v->code & icmp6_m->code);
6323 }
6324
6325 /**
6326  * Add ICMP item to matcher and to the value.
6327  *
6328  * @param[in, out] matcher
6329  *   Flow matcher.
6330  * @param[in, out] key
6331  *   Flow matcher value.
6332  * @param[in] item
6333  *   Flow pattern to translate.
6334  * @param[in] inner
6335  *   Item is inner pattern.
6336  */
6337 static void
6338 flow_dv_translate_item_icmp(void *matcher, void *key,
6339                             const struct rte_flow_item *item,
6340                             int inner)
6341 {
6342         const struct rte_flow_item_icmp *icmp_m = item->mask;
6343         const struct rte_flow_item_icmp *icmp_v = item->spec;
6344         void *headers_m;
6345         void *headers_v;
6346         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6347                                      misc_parameters_3);
6348         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6349         if (inner) {
6350                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6351                                          inner_headers);
6352                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6353         } else {
6354                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6355                                          outer_headers);
6356                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6357         }
6358         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6359         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6360         if (!icmp_v)
6361                 return;
6362         if (!icmp_m)
6363                 icmp_m = &rte_flow_item_icmp_mask;
6364         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6365                  icmp_m->hdr.icmp_type);
6366         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6367                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6368         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6369                  icmp_m->hdr.icmp_code);
6370         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6371                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6372 }
6373
6374 /**
6375  * Add GTP item to matcher and to the value.
6376  *
6377  * @param[in, out] matcher
6378  *   Flow matcher.
6379  * @param[in, out] key
6380  *   Flow matcher value.
6381  * @param[in] item
6382  *   Flow pattern to translate.
6383  * @param[in] inner
6384  *   Item is inner pattern.
6385  */
6386 static void
6387 flow_dv_translate_item_gtp(void *matcher, void *key,
6388                            const struct rte_flow_item *item, int inner)
6389 {
6390         const struct rte_flow_item_gtp *gtp_m = item->mask;
6391         const struct rte_flow_item_gtp *gtp_v = item->spec;
6392         void *headers_m;
6393         void *headers_v;
6394         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6395                                      misc_parameters_3);
6396         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6397         uint16_t dport = RTE_GTPU_UDP_PORT;
6398
6399         if (inner) {
6400                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6401                                          inner_headers);
6402                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6403         } else {
6404                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6405                                          outer_headers);
6406                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6407         }
6408         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6409                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6410                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6411         }
6412         if (!gtp_v)
6413                 return;
6414         if (!gtp_m)
6415                 gtp_m = &rte_flow_item_gtp_mask;
6416         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6417         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6418                  gtp_v->msg_type & gtp_m->msg_type);
6419         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6420                  rte_be_to_cpu_32(gtp_m->teid));
6421         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6422                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6423 }
6424
6425 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6426
6427 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6428         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6429                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6430
6431 /**
6432  * Calculate flow matcher enable bitmap.
6433  *
6434  * @param match_criteria
6435  *   Pointer to flow matcher criteria.
6436  *
6437  * @return
6438  *   Bitmap of enabled fields.
6439  */
6440 static uint8_t
6441 flow_dv_matcher_enable(uint32_t *match_criteria)
6442 {
6443         uint8_t match_criteria_enable;
6444
6445         match_criteria_enable =
6446                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6447                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6448         match_criteria_enable |=
6449                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6450                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6451         match_criteria_enable |=
6452                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6453                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6454         match_criteria_enable |=
6455                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6456                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6457         match_criteria_enable |=
6458                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6459                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6460         return match_criteria_enable;
6461 }
6462
6463
6464 /**
6465  * Get a flow table.
6466  *
6467  * @param[in, out] dev
6468  *   Pointer to rte_eth_dev structure.
6469  * @param[in] table_id
6470  *   Table id to use.
6471  * @param[in] egress
6472  *   Direction of the table.
6473  * @param[in] transfer
6474  *   E-Switch or NIC flow.
6475  * @param[out] error
6476  *   pointer to error structure.
6477  *
6478  * @return
6479  *   Returns tables resource based on the index, NULL in case of failed.
6480  */
6481 static struct mlx5_flow_tbl_resource *
6482 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6483                          uint32_t table_id, uint8_t egress,
6484                          uint8_t transfer,
6485                          struct rte_flow_error *error)
6486 {
6487         struct mlx5_priv *priv = dev->data->dev_private;
6488         struct mlx5_ibv_shared *sh = priv->sh;
6489         struct mlx5_flow_tbl_resource *tbl;
6490         union mlx5_flow_tbl_key table_key = {
6491                 {
6492                         .table_id = table_id,
6493                         .reserved = 0,
6494                         .domain = !!transfer,
6495                         .direction = !!egress,
6496                 }
6497         };
6498         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6499                                                          table_key.v64);
6500         struct mlx5_flow_tbl_data_entry *tbl_data;
6501         int ret;
6502         void *domain;
6503
6504         if (pos) {
6505                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6506                                         entry);
6507                 tbl = &tbl_data->tbl;
6508                 rte_atomic32_inc(&tbl->refcnt);
6509                 return tbl;
6510         }
6511         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6512         if (!tbl_data) {
6513                 rte_flow_error_set(error, ENOMEM,
6514                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6515                                    NULL,
6516                                    "cannot allocate flow table data entry");
6517                 return NULL;
6518         }
6519         tbl = &tbl_data->tbl;
6520         pos = &tbl_data->entry;
6521         if (transfer)
6522                 domain = sh->fdb_domain;
6523         else if (egress)
6524                 domain = sh->tx_domain;
6525         else
6526                 domain = sh->rx_domain;
6527         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6528         if (!tbl->obj) {
6529                 rte_flow_error_set(error, ENOMEM,
6530                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6531                                    NULL, "cannot create flow table object");
6532                 rte_free(tbl_data);
6533                 return NULL;
6534         }
6535         /*
6536          * No multi-threads now, but still better to initialize the reference
6537          * count before insert it into the hash list.
6538          */
6539         rte_atomic32_init(&tbl->refcnt);
6540         /* Jump action reference count is initialized here. */
6541         rte_atomic32_init(&tbl_data->jump.refcnt);
6542         pos->key = table_key.v64;
6543         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6544         if (ret < 0) {
6545                 rte_flow_error_set(error, -ret,
6546                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6547                                    "cannot insert flow table data entry");
6548                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6549                 rte_free(tbl_data);
6550         }
6551         rte_atomic32_inc(&tbl->refcnt);
6552         return tbl;
6553 }
6554
6555 /**
6556  * Release a flow table.
6557  *
6558  * @param[in] dev
6559  *   Pointer to rte_eth_dev structure.
6560  * @param[in] tbl
6561  *   Table resource to be released.
6562  *
6563  * @return
6564  *   Returns 0 if table was released, else return 1;
6565  */
6566 static int
6567 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6568                              struct mlx5_flow_tbl_resource *tbl)
6569 {
6570         struct mlx5_priv *priv = dev->data->dev_private;
6571         struct mlx5_ibv_shared *sh = priv->sh;
6572         struct mlx5_flow_tbl_data_entry *tbl_data =
6573                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6574
6575         if (!tbl)
6576                 return 0;
6577         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6578                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6579
6580                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6581                 tbl->obj = NULL;
6582                 /* remove the entry from the hash list and free memory. */
6583                 mlx5_hlist_remove(sh->flow_tbls, pos);
6584                 rte_free(tbl_data);
6585                 return 0;
6586         }
6587         return 1;
6588 }
6589
6590 /**
6591  * Register the flow matcher.
6592  *
6593  * @param[in, out] dev
6594  *   Pointer to rte_eth_dev structure.
6595  * @param[in, out] matcher
6596  *   Pointer to flow matcher.
6597  * @param[in, out] key
6598  *   Pointer to flow table key.
6599  * @parm[in, out] dev_flow
6600  *   Pointer to the dev_flow.
6601  * @param[out] error
6602  *   pointer to error structure.
6603  *
6604  * @return
6605  *   0 on success otherwise -errno and errno is set.
6606  */
6607 static int
6608 flow_dv_matcher_register(struct rte_eth_dev *dev,
6609                          struct mlx5_flow_dv_matcher *matcher,
6610                          union mlx5_flow_tbl_key *key,
6611                          struct mlx5_flow *dev_flow,
6612                          struct rte_flow_error *error)
6613 {
6614         struct mlx5_priv *priv = dev->data->dev_private;
6615         struct mlx5_ibv_shared *sh = priv->sh;
6616         struct mlx5_flow_dv_matcher *cache_matcher;
6617         struct mlx5dv_flow_matcher_attr dv_attr = {
6618                 .type = IBV_FLOW_ATTR_NORMAL,
6619                 .match_mask = (void *)&matcher->mask,
6620         };
6621         struct mlx5_flow_tbl_resource *tbl;
6622         struct mlx5_flow_tbl_data_entry *tbl_data;
6623
6624         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6625                                        key->domain, error);
6626         if (!tbl)
6627                 return -rte_errno;      /* No need to refill the error info */
6628         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6629         /* Lookup from cache. */
6630         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6631                 if (matcher->crc == cache_matcher->crc &&
6632                     matcher->priority == cache_matcher->priority &&
6633                     !memcmp((const void *)matcher->mask.buf,
6634                             (const void *)cache_matcher->mask.buf,
6635                             cache_matcher->mask.size)) {
6636                         DRV_LOG(DEBUG,
6637                                 "%s group %u priority %hd use %s "
6638                                 "matcher %p: refcnt %d++",
6639                                 key->domain ? "FDB" : "NIC", key->table_id,
6640                                 cache_matcher->priority,
6641                                 key->direction ? "tx" : "rx",
6642                                 (void *)cache_matcher,
6643                                 rte_atomic32_read(&cache_matcher->refcnt));
6644                         rte_atomic32_inc(&cache_matcher->refcnt);
6645                         dev_flow->dv.matcher = cache_matcher;
6646                         /* old matcher should not make the table ref++. */
6647                         flow_dv_tbl_resource_release(dev, tbl);
6648                         return 0;
6649                 }
6650         }
6651         /* Register new matcher. */
6652         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6653         if (!cache_matcher) {
6654                 flow_dv_tbl_resource_release(dev, tbl);
6655                 return rte_flow_error_set(error, ENOMEM,
6656                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6657                                           "cannot allocate matcher memory");
6658         }
6659         *cache_matcher = *matcher;
6660         dv_attr.match_criteria_enable =
6661                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6662         dv_attr.priority = matcher->priority;
6663         if (key->direction)
6664                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6665         cache_matcher->matcher_object =
6666                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6667         if (!cache_matcher->matcher_object) {
6668                 rte_free(cache_matcher);
6669 #ifdef HAVE_MLX5DV_DR
6670                 flow_dv_tbl_resource_release(dev, tbl);
6671 #endif
6672                 return rte_flow_error_set(error, ENOMEM,
6673                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6674                                           NULL, "cannot create matcher");
6675         }
6676         /* Save the table information */
6677         cache_matcher->tbl = tbl;
6678         rte_atomic32_init(&cache_matcher->refcnt);
6679         /* only matcher ref++, table ref++ already done above in get API. */
6680         rte_atomic32_inc(&cache_matcher->refcnt);
6681         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6682         dev_flow->dv.matcher = cache_matcher;
6683         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6684                 key->domain ? "FDB" : "NIC", key->table_id,
6685                 cache_matcher->priority,
6686                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6687                 rte_atomic32_read(&cache_matcher->refcnt));
6688         return 0;
6689 }
6690
6691 /**
6692  * Find existing tag resource or create and register a new one.
6693  *
6694  * @param dev[in, out]
6695  *   Pointer to rte_eth_dev structure.
6696  * @param[in, out] tag_be24
6697  *   Tag value in big endian then R-shift 8.
6698  * @parm[in, out] dev_flow
6699  *   Pointer to the dev_flow.
6700  * @param[out] error
6701  *   pointer to error structure.
6702  *
6703  * @return
6704  *   0 on success otherwise -errno and errno is set.
6705  */
6706 static int
6707 flow_dv_tag_resource_register
6708                         (struct rte_eth_dev *dev,
6709                          uint32_t tag_be24,
6710                          struct mlx5_flow *dev_flow,
6711                          struct rte_flow_error *error)
6712 {
6713         struct mlx5_priv *priv = dev->data->dev_private;
6714         struct mlx5_ibv_shared *sh = priv->sh;
6715         struct mlx5_flow_dv_tag_resource *cache_resource;
6716         struct mlx5_hlist_entry *entry;
6717
6718         /* Lookup a matching resource from cache. */
6719         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6720         if (entry) {
6721                 cache_resource = container_of
6722                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6723                 rte_atomic32_inc(&cache_resource->refcnt);
6724                 dev_flow->dv.tag_resource = cache_resource;
6725                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6726                         (void *)cache_resource,
6727                         rte_atomic32_read(&cache_resource->refcnt));
6728                 return 0;
6729         }
6730         /* Register new resource. */
6731         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6732         if (!cache_resource)
6733                 return rte_flow_error_set(error, ENOMEM,
6734                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6735                                           "cannot allocate resource memory");
6736         cache_resource->entry.key = (uint64_t)tag_be24;
6737         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6738         if (!cache_resource->action) {
6739                 rte_free(cache_resource);
6740                 return rte_flow_error_set(error, ENOMEM,
6741                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6742                                           NULL, "cannot create action");
6743         }
6744         rte_atomic32_init(&cache_resource->refcnt);
6745         rte_atomic32_inc(&cache_resource->refcnt);
6746         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6747                 mlx5_glue->destroy_flow_action(cache_resource->action);
6748                 rte_free(cache_resource);
6749                 return rte_flow_error_set(error, EEXIST,
6750                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6751                                           NULL, "cannot insert tag");
6752         }
6753         dev_flow->dv.tag_resource = cache_resource;
6754         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6755                 (void *)cache_resource,
6756                 rte_atomic32_read(&cache_resource->refcnt));
6757         return 0;
6758 }
6759
6760 /**
6761  * Release the tag.
6762  *
6763  * @param dev
6764  *   Pointer to Ethernet device.
6765  * @param flow
6766  *   Pointer to mlx5_flow.
6767  *
6768  * @return
6769  *   1 while a reference on it exists, 0 when freed.
6770  */
6771 static int
6772 flow_dv_tag_release(struct rte_eth_dev *dev,
6773                     struct mlx5_flow_dv_tag_resource *tag)
6774 {
6775         struct mlx5_priv *priv = dev->data->dev_private;
6776         struct mlx5_ibv_shared *sh = priv->sh;
6777
6778         assert(tag);
6779         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6780                 dev->data->port_id, (void *)tag,
6781                 rte_atomic32_read(&tag->refcnt));
6782         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6783                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6784                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6785                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6786                         dev->data->port_id, (void *)tag);
6787                 rte_free(tag);
6788                 return 0;
6789         }
6790         return 1;
6791 }
6792
6793 /**
6794  * Translate port ID action to vport.
6795  *
6796  * @param[in] dev
6797  *   Pointer to rte_eth_dev structure.
6798  * @param[in] action
6799  *   Pointer to the port ID action.
6800  * @param[out] dst_port_id
6801  *   The target port ID.
6802  * @param[out] error
6803  *   Pointer to the error structure.
6804  *
6805  * @return
6806  *   0 on success, a negative errno value otherwise and rte_errno is set.
6807  */
6808 static int
6809 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6810                                  const struct rte_flow_action *action,
6811                                  uint32_t *dst_port_id,
6812                                  struct rte_flow_error *error)
6813 {
6814         uint32_t port;
6815         struct mlx5_priv *priv;
6816         const struct rte_flow_action_port_id *conf =
6817                         (const struct rte_flow_action_port_id *)action->conf;
6818
6819         port = conf->original ? dev->data->port_id : conf->id;
6820         priv = mlx5_port_to_eswitch_info(port, false);
6821         if (!priv)
6822                 return rte_flow_error_set(error, -rte_errno,
6823                                           RTE_FLOW_ERROR_TYPE_ACTION,
6824                                           NULL,
6825                                           "No eswitch info was found for port");
6826 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6827         /*
6828          * This parameter is transferred to
6829          * mlx5dv_dr_action_create_dest_ib_port().
6830          */
6831         *dst_port_id = priv->ibv_port;
6832 #else
6833         /*
6834          * Legacy mode, no LAG configurations is supported.
6835          * This parameter is transferred to
6836          * mlx5dv_dr_action_create_dest_vport().
6837          */
6838         *dst_port_id = priv->vport_id;
6839 #endif
6840         return 0;
6841 }
6842
6843 /**
6844  * Add Tx queue matcher
6845  *
6846  * @param[in] dev
6847  *   Pointer to the dev struct.
6848  * @param[in, out] matcher
6849  *   Flow matcher.
6850  * @param[in, out] key
6851  *   Flow matcher value.
6852  * @param[in] item
6853  *   Flow pattern to translate.
6854  * @param[in] inner
6855  *   Item is inner pattern.
6856  */
6857 static void
6858 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6859                                 void *matcher, void *key,
6860                                 const struct rte_flow_item *item)
6861 {
6862         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6863         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6864         void *misc_m =
6865                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6866         void *misc_v =
6867                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6868         struct mlx5_txq_ctrl *txq;
6869         uint32_t queue;
6870
6871
6872         queue_m = (const void *)item->mask;
6873         if (!queue_m)
6874                 return;
6875         queue_v = (const void *)item->spec;
6876         if (!queue_v)
6877                 return;
6878         txq = mlx5_txq_get(dev, queue_v->queue);
6879         if (!txq)
6880                 return;
6881         queue = txq->obj->sq->id;
6882         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6883         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6884                  queue & queue_m->queue);
6885         mlx5_txq_release(dev, queue_v->queue);
6886 }
6887
6888 /**
6889  * Set the hash fields according to the @p flow information.
6890  *
6891  * @param[in] dev_flow
6892  *   Pointer to the mlx5_flow.
6893  */
6894 static void
6895 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6896 {
6897         struct rte_flow *flow = dev_flow->flow;
6898         uint64_t items = dev_flow->layers;
6899         int rss_inner = 0;
6900         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6901
6902         dev_flow->hash_fields = 0;
6903 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6904         if (flow->rss.level >= 2) {
6905                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6906                 rss_inner = 1;
6907         }
6908 #endif
6909         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6910             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6911                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6912                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6913                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6914                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6915                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6916                         else
6917                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6918                 }
6919         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6920                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6921                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6922                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6923                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
6924                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6925                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
6926                         else
6927                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
6928                 }
6929         }
6930         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
6931             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
6932                 if (rss_types & ETH_RSS_UDP) {
6933                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6934                                 dev_flow->hash_fields |=
6935                                                 IBV_RX_HASH_SRC_PORT_UDP;
6936                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6937                                 dev_flow->hash_fields |=
6938                                                 IBV_RX_HASH_DST_PORT_UDP;
6939                         else
6940                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
6941                 }
6942         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
6943                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
6944                 if (rss_types & ETH_RSS_TCP) {
6945                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6946                                 dev_flow->hash_fields |=
6947                                                 IBV_RX_HASH_SRC_PORT_TCP;
6948                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6949                                 dev_flow->hash_fields |=
6950                                                 IBV_RX_HASH_DST_PORT_TCP;
6951                         else
6952                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
6953                 }
6954         }
6955 }
6956
6957 /**
6958  * Fill the flow with DV spec, lock free
6959  * (mutex should be acquired by caller).
6960  *
6961  * @param[in] dev
6962  *   Pointer to rte_eth_dev structure.
6963  * @param[in, out] dev_flow
6964  *   Pointer to the sub flow.
6965  * @param[in] attr
6966  *   Pointer to the flow attributes.
6967  * @param[in] items
6968  *   Pointer to the list of items.
6969  * @param[in] actions
6970  *   Pointer to the list of actions.
6971  * @param[out] error
6972  *   Pointer to the error structure.
6973  *
6974  * @return
6975  *   0 on success, a negative errno value otherwise and rte_errno is set.
6976  */
6977 static int
6978 __flow_dv_translate(struct rte_eth_dev *dev,
6979                     struct mlx5_flow *dev_flow,
6980                     const struct rte_flow_attr *attr,
6981                     const struct rte_flow_item items[],
6982                     const struct rte_flow_action actions[],
6983                     struct rte_flow_error *error)
6984 {
6985         struct mlx5_priv *priv = dev->data->dev_private;
6986         struct mlx5_dev_config *dev_conf = &priv->config;
6987         struct rte_flow *flow = dev_flow->flow;
6988         uint64_t item_flags = 0;
6989         uint64_t last_item = 0;
6990         uint64_t action_flags = 0;
6991         uint64_t priority = attr->priority;
6992         struct mlx5_flow_dv_matcher matcher = {
6993                 .mask = {
6994                         .size = sizeof(matcher.mask.buf),
6995                 },
6996         };
6997         int actions_n = 0;
6998         bool actions_end = false;
6999         union {
7000                 struct mlx5_flow_dv_modify_hdr_resource res;
7001                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7002                             sizeof(struct mlx5_modification_cmd) *
7003                             (MLX5_MAX_MODIFY_NUM + 1)];
7004         } mhdr_dummy;
7005         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7006         union flow_dv_attr flow_attr = { .attr = 0 };
7007         uint32_t tag_be;
7008         union mlx5_flow_tbl_key tbl_key;
7009         uint32_t modify_action_position = UINT32_MAX;
7010         void *match_mask = matcher.mask.buf;
7011         void *match_value = dev_flow->dv.value.buf;
7012         uint8_t next_protocol = 0xff;
7013         struct rte_vlan_hdr vlan = { 0 };
7014         uint32_t table;
7015         int ret = 0;
7016
7017         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7018                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7019         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7020                                        !!priv->fdb_def_rule, &table, error);
7021         if (ret)
7022                 return ret;
7023         dev_flow->group = table;
7024         if (attr->transfer)
7025                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7026         if (priority == MLX5_FLOW_PRIO_RSVD)
7027                 priority = dev_conf->flow_prio - 1;
7028         /* number of actions must be set to 0 in case of dirty stack. */
7029         mhdr_res->actions_num = 0;
7030         for (; !actions_end ; actions++) {
7031                 const struct rte_flow_action_queue *queue;
7032                 const struct rte_flow_action_rss *rss;
7033                 const struct rte_flow_action *action = actions;
7034                 const struct rte_flow_action_count *count = action->conf;
7035                 const uint8_t *rss_key;
7036                 const struct rte_flow_action_jump *jump_data;
7037                 const struct rte_flow_action_meter *mtr;
7038                 struct mlx5_flow_tbl_resource *tbl;
7039                 uint32_t port_id = 0;
7040                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7041                 int action_type = actions->type;
7042                 const struct rte_flow_action *found_action = NULL;
7043
7044                 switch (action_type) {
7045                 case RTE_FLOW_ACTION_TYPE_VOID:
7046                         break;
7047                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7048                         if (flow_dv_translate_action_port_id(dev, action,
7049                                                              &port_id, error))
7050                                 return -rte_errno;
7051                         port_id_resource.port_id = port_id;
7052                         if (flow_dv_port_id_action_resource_register
7053                             (dev, &port_id_resource, dev_flow, error))
7054                                 return -rte_errno;
7055                         dev_flow->dv.actions[actions_n++] =
7056                                 dev_flow->dv.port_id_action->action;
7057                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7058                         break;
7059                 case RTE_FLOW_ACTION_TYPE_FLAG:
7060                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7061                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7062                                 struct rte_flow_action_mark mark = {
7063                                         .id = MLX5_FLOW_MARK_DEFAULT,
7064                                 };
7065
7066                                 if (flow_dv_convert_action_mark(dev, &mark,
7067                                                                 mhdr_res,
7068                                                                 error))
7069                                         return -rte_errno;
7070                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7071                                 break;
7072                         }
7073                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7074                         if (!dev_flow->dv.tag_resource)
7075                                 if (flow_dv_tag_resource_register
7076                                     (dev, tag_be, dev_flow, error))
7077                                         return -rte_errno;
7078                         dev_flow->dv.actions[actions_n++] =
7079                                 dev_flow->dv.tag_resource->action;
7080                         break;
7081                 case RTE_FLOW_ACTION_TYPE_MARK:
7082                         action_flags |= MLX5_FLOW_ACTION_MARK;
7083                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7084                                 const struct rte_flow_action_mark *mark =
7085                                         (const struct rte_flow_action_mark *)
7086                                                 actions->conf;
7087
7088                                 if (flow_dv_convert_action_mark(dev, mark,
7089                                                                 mhdr_res,
7090                                                                 error))
7091                                         return -rte_errno;
7092                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7093                                 break;
7094                         }
7095                         /* Fall-through */
7096                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7097                         /* Legacy (non-extensive) MARK action. */
7098                         tag_be = mlx5_flow_mark_set
7099                               (((const struct rte_flow_action_mark *)
7100                                (actions->conf))->id);
7101                         if (!dev_flow->dv.tag_resource)
7102                                 if (flow_dv_tag_resource_register
7103                                     (dev, tag_be, dev_flow, error))
7104                                         return -rte_errno;
7105                         dev_flow->dv.actions[actions_n++] =
7106                                 dev_flow->dv.tag_resource->action;
7107                         break;
7108                 case RTE_FLOW_ACTION_TYPE_SET_META:
7109                         if (flow_dv_convert_action_set_meta
7110                                 (dev, mhdr_res, attr,
7111                                  (const struct rte_flow_action_set_meta *)
7112                                   actions->conf, error))
7113                                 return -rte_errno;
7114                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7115                         break;
7116                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7117                         if (flow_dv_convert_action_set_tag
7118                                 (dev, mhdr_res,
7119                                  (const struct rte_flow_action_set_tag *)
7120                                   actions->conf, error))
7121                                 return -rte_errno;
7122                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7123                         break;
7124                 case RTE_FLOW_ACTION_TYPE_DROP:
7125                         action_flags |= MLX5_FLOW_ACTION_DROP;
7126                         break;
7127                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7128                         assert(flow->rss.queue);
7129                         queue = actions->conf;
7130                         flow->rss.queue_num = 1;
7131                         (*flow->rss.queue)[0] = queue->index;
7132                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7133                         break;
7134                 case RTE_FLOW_ACTION_TYPE_RSS:
7135                         assert(flow->rss.queue);
7136                         rss = actions->conf;
7137                         if (flow->rss.queue)
7138                                 memcpy((*flow->rss.queue), rss->queue,
7139                                        rss->queue_num * sizeof(uint16_t));
7140                         flow->rss.queue_num = rss->queue_num;
7141                         /* NULL RSS key indicates default RSS key. */
7142                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7143                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7144                         /*
7145                          * rss->level and rss.types should be set in advance
7146                          * when expanding items for RSS.
7147                          */
7148                         action_flags |= MLX5_FLOW_ACTION_RSS;
7149                         break;
7150                 case RTE_FLOW_ACTION_TYPE_COUNT:
7151                         if (!dev_conf->devx) {
7152                                 rte_errno = ENOTSUP;
7153                                 goto cnt_err;
7154                         }
7155                         flow->counter = flow_dv_counter_alloc(dev,
7156                                                               count->shared,
7157                                                               count->id,
7158                                                               dev_flow->group);
7159                         if (flow->counter == NULL)
7160                                 goto cnt_err;
7161                         dev_flow->dv.actions[actions_n++] =
7162                                 flow->counter->action;
7163                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7164                         break;
7165 cnt_err:
7166                         if (rte_errno == ENOTSUP)
7167                                 return rte_flow_error_set
7168                                               (error, ENOTSUP,
7169                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7170                                                NULL,
7171                                                "count action not supported");
7172                         else
7173                                 return rte_flow_error_set
7174                                                 (error, rte_errno,
7175                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7176                                                  action,
7177                                                  "cannot create counter"
7178                                                   " object.");
7179                         break;
7180                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7181                         dev_flow->dv.actions[actions_n++] =
7182                                                 priv->sh->pop_vlan_action;
7183                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7184                         break;
7185                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7186                         flow_dev_get_vlan_info_from_items(items, &vlan);
7187                         vlan.eth_proto = rte_be_to_cpu_16
7188                              ((((const struct rte_flow_action_of_push_vlan *)
7189                                                    actions->conf)->ethertype));
7190                         found_action = mlx5_flow_find_action
7191                                         (actions + 1,
7192                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7193                         if (found_action)
7194                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7195                         found_action = mlx5_flow_find_action
7196                                         (actions + 1,
7197                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7198                         if (found_action)
7199                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7200                         if (flow_dv_create_action_push_vlan
7201                                             (dev, attr, &vlan, dev_flow, error))
7202                                 return -rte_errno;
7203                         dev_flow->dv.actions[actions_n++] =
7204                                            dev_flow->dv.push_vlan_res->action;
7205                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7206                         break;
7207                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7208                         /* of_vlan_push action handled this action */
7209                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7210                         break;
7211                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7212                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7213                                 break;
7214                         flow_dev_get_vlan_info_from_items(items, &vlan);
7215                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7216                         /* If no VLAN push - this is a modify header action */
7217                         if (flow_dv_convert_action_modify_vlan_vid
7218                                                 (mhdr_res, actions, error))
7219                                 return -rte_errno;
7220                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7221                         break;
7222                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7223                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7224                         if (flow_dv_create_action_l2_encap(dev, actions,
7225                                                            dev_flow,
7226                                                            attr->transfer,
7227                                                            error))
7228                                 return -rte_errno;
7229                         dev_flow->dv.actions[actions_n++] =
7230                                 dev_flow->dv.encap_decap->verbs_action;
7231                         action_flags |= actions->type ==
7232                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
7233                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
7234                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
7235                         break;
7236                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7237                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7238                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7239                                                            attr->transfer,
7240                                                            error))
7241                                 return -rte_errno;
7242                         dev_flow->dv.actions[actions_n++] =
7243                                 dev_flow->dv.encap_decap->verbs_action;
7244                         action_flags |= actions->type ==
7245                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
7246                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
7247                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
7248                         break;
7249                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7250                         /* Handle encap with preceding decap. */
7251                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
7252                                 if (flow_dv_create_action_raw_encap
7253                                         (dev, actions, dev_flow, attr, error))
7254                                         return -rte_errno;
7255                                 dev_flow->dv.actions[actions_n++] =
7256                                         dev_flow->dv.encap_decap->verbs_action;
7257                         } else {
7258                                 /* Handle encap without preceding decap. */
7259                                 if (flow_dv_create_action_l2_encap
7260                                     (dev, actions, dev_flow, attr->transfer,
7261                                      error))
7262                                         return -rte_errno;
7263                                 dev_flow->dv.actions[actions_n++] =
7264                                         dev_flow->dv.encap_decap->verbs_action;
7265                         }
7266                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
7267                         break;
7268                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7269                         /* Check if this decap is followed by encap. */
7270                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
7271                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
7272                                action++) {
7273                         }
7274                         /* Handle decap only if it isn't followed by encap. */
7275                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7276                                 if (flow_dv_create_action_l2_decap
7277                                     (dev, dev_flow, attr->transfer, error))
7278                                         return -rte_errno;
7279                                 dev_flow->dv.actions[actions_n++] =
7280                                         dev_flow->dv.encap_decap->verbs_action;
7281                         }
7282                         /* If decap is followed by encap, handle it at encap. */
7283                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
7284                         break;
7285                 case RTE_FLOW_ACTION_TYPE_JUMP:
7286                         jump_data = action->conf;
7287                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7288                                                        jump_data->group,
7289                                                        !!priv->fdb_def_rule,
7290                                                        &table, error);
7291                         if (ret)
7292                                 return ret;
7293                         tbl = flow_dv_tbl_resource_get(dev, table,
7294                                                        attr->egress,
7295                                                        attr->transfer, error);
7296                         if (!tbl)
7297                                 return rte_flow_error_set
7298                                                 (error, errno,
7299                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7300                                                  NULL,
7301                                                  "cannot create jump action.");
7302                         if (flow_dv_jump_tbl_resource_register
7303                             (dev, tbl, dev_flow, error)) {
7304                                 flow_dv_tbl_resource_release(dev, tbl);
7305                                 return rte_flow_error_set
7306                                                 (error, errno,
7307                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7308                                                  NULL,
7309                                                  "cannot create jump action.");
7310                         }
7311                         dev_flow->dv.actions[actions_n++] =
7312                                 dev_flow->dv.jump->action;
7313                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7314                         break;
7315                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7316                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7317                         if (flow_dv_convert_action_modify_mac
7318                                         (mhdr_res, actions, error))
7319                                 return -rte_errno;
7320                         action_flags |= actions->type ==
7321                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7322                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7323                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7324                         break;
7325                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7326                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7327                         if (flow_dv_convert_action_modify_ipv4
7328                                         (mhdr_res, actions, error))
7329                                 return -rte_errno;
7330                         action_flags |= actions->type ==
7331                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7332                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7333                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7334                         break;
7335                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7336                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7337                         if (flow_dv_convert_action_modify_ipv6
7338                                         (mhdr_res, actions, error))
7339                                 return -rte_errno;
7340                         action_flags |= actions->type ==
7341                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7342                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7343                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7344                         break;
7345                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7346                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7347                         if (flow_dv_convert_action_modify_tp
7348                                         (mhdr_res, actions, items,
7349                                          &flow_attr, error))
7350                                 return -rte_errno;
7351                         action_flags |= actions->type ==
7352                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7353                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7354                                         MLX5_FLOW_ACTION_SET_TP_DST;
7355                         break;
7356                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7357                         if (flow_dv_convert_action_modify_dec_ttl
7358                                         (mhdr_res, items, &flow_attr, error))
7359                                 return -rte_errno;
7360                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7361                         break;
7362                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7363                         if (flow_dv_convert_action_modify_ttl
7364                                         (mhdr_res, actions, items,
7365                                          &flow_attr, error))
7366                                 return -rte_errno;
7367                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7368                         break;
7369                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7370                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7371                         if (flow_dv_convert_action_modify_tcp_seq
7372                                         (mhdr_res, actions, error))
7373                                 return -rte_errno;
7374                         action_flags |= actions->type ==
7375                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7376                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7377                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7378                         break;
7379
7380                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7381                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7382                         if (flow_dv_convert_action_modify_tcp_ack
7383                                         (mhdr_res, actions, error))
7384                                 return -rte_errno;
7385                         action_flags |= actions->type ==
7386                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7387                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7388                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7389                         break;
7390                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7391                         if (flow_dv_convert_action_set_reg
7392                                         (mhdr_res, actions, error))
7393                                 return -rte_errno;
7394                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7395                         break;
7396                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7397                         if (flow_dv_convert_action_copy_mreg
7398                                         (dev, mhdr_res, actions, error))
7399                                 return -rte_errno;
7400                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7401                         break;
7402                 case RTE_FLOW_ACTION_TYPE_METER:
7403                         mtr = actions->conf;
7404                         if (!flow->meter) {
7405                                 flow->meter = mlx5_flow_meter_attach(priv,
7406                                                         mtr->mtr_id, attr,
7407                                                         error);
7408                                 if (!flow->meter)
7409                                         return rte_flow_error_set(error,
7410                                                 rte_errno,
7411                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7412                                                 NULL,
7413                                                 "meter not found "
7414                                                 "or invalid parameters");
7415                         }
7416                         /* Set the meter action. */
7417                         dev_flow->dv.actions[actions_n++] =
7418                                 flow->meter->mfts->meter_action;
7419                         action_flags |= MLX5_FLOW_ACTION_METER;
7420                         break;
7421                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7422                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7423                                                               actions, error))
7424                                 return -rte_errno;
7425                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7426                         break;
7427                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7428                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7429                                                               actions, error))
7430                                 return -rte_errno;
7431                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7432                         break;
7433                 case RTE_FLOW_ACTION_TYPE_END:
7434                         actions_end = true;
7435                         if (mhdr_res->actions_num) {
7436                                 /* create modify action if needed. */
7437                                 if (flow_dv_modify_hdr_resource_register
7438                                         (dev, mhdr_res, dev_flow, error))
7439                                         return -rte_errno;
7440                                 dev_flow->dv.actions[modify_action_position] =
7441                                         dev_flow->dv.modify_hdr->verbs_action;
7442                         }
7443                         break;
7444                 default:
7445                         break;
7446                 }
7447                 if (mhdr_res->actions_num &&
7448                     modify_action_position == UINT32_MAX)
7449                         modify_action_position = actions_n++;
7450         }
7451         dev_flow->dv.actions_n = actions_n;
7452         dev_flow->actions = action_flags;
7453         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7454                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7455                 int item_type = items->type;
7456
7457                 switch (item_type) {
7458                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7459                         flow_dv_translate_item_port_id(dev, match_mask,
7460                                                        match_value, items);
7461                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7462                         break;
7463                 case RTE_FLOW_ITEM_TYPE_ETH:
7464                         flow_dv_translate_item_eth(match_mask, match_value,
7465                                                    items, tunnel);
7466                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7467                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7468                                              MLX5_FLOW_LAYER_OUTER_L2;
7469                         break;
7470                 case RTE_FLOW_ITEM_TYPE_VLAN:
7471                         flow_dv_translate_item_vlan(dev_flow,
7472                                                     match_mask, match_value,
7473                                                     items, tunnel);
7474                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7475                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7476                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7477                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7478                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7479                         break;
7480                 case RTE_FLOW_ITEM_TYPE_IPV4:
7481                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7482                                                   &item_flags, &tunnel);
7483                         flow_dv_translate_item_ipv4(match_mask, match_value,
7484                                                     items, tunnel,
7485                                                     dev_flow->group);
7486                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7487                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7488                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7489                         if (items->mask != NULL &&
7490                             ((const struct rte_flow_item_ipv4 *)
7491                              items->mask)->hdr.next_proto_id) {
7492                                 next_protocol =
7493                                         ((const struct rte_flow_item_ipv4 *)
7494                                          (items->spec))->hdr.next_proto_id;
7495                                 next_protocol &=
7496                                         ((const struct rte_flow_item_ipv4 *)
7497                                          (items->mask))->hdr.next_proto_id;
7498                         } else {
7499                                 /* Reset for inner layer. */
7500                                 next_protocol = 0xff;
7501                         }
7502                         break;
7503                 case RTE_FLOW_ITEM_TYPE_IPV6:
7504                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7505                                                   &item_flags, &tunnel);
7506                         flow_dv_translate_item_ipv6(match_mask, match_value,
7507                                                     items, tunnel,
7508                                                     dev_flow->group);
7509                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7510                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7511                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7512                         if (items->mask != NULL &&
7513                             ((const struct rte_flow_item_ipv6 *)
7514                              items->mask)->hdr.proto) {
7515                                 next_protocol =
7516                                         ((const struct rte_flow_item_ipv6 *)
7517                                          items->spec)->hdr.proto;
7518                                 next_protocol &=
7519                                         ((const struct rte_flow_item_ipv6 *)
7520                                          items->mask)->hdr.proto;
7521                         } else {
7522                                 /* Reset for inner layer. */
7523                                 next_protocol = 0xff;
7524                         }
7525                         break;
7526                 case RTE_FLOW_ITEM_TYPE_TCP:
7527                         flow_dv_translate_item_tcp(match_mask, match_value,
7528                                                    items, tunnel);
7529                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7530                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7531                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7532                         break;
7533                 case RTE_FLOW_ITEM_TYPE_UDP:
7534                         flow_dv_translate_item_udp(match_mask, match_value,
7535                                                    items, tunnel);
7536                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7537                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7538                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7539                         break;
7540                 case RTE_FLOW_ITEM_TYPE_GRE:
7541                         flow_dv_translate_item_gre(match_mask, match_value,
7542                                                    items, tunnel);
7543                         last_item = MLX5_FLOW_LAYER_GRE;
7544                         break;
7545                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7546                         flow_dv_translate_item_gre_key(match_mask,
7547                                                        match_value, items);
7548                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7549                         break;
7550                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7551                         flow_dv_translate_item_nvgre(match_mask, match_value,
7552                                                      items, tunnel);
7553                         last_item = MLX5_FLOW_LAYER_GRE;
7554                         break;
7555                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7556                         flow_dv_translate_item_vxlan(match_mask, match_value,
7557                                                      items, tunnel);
7558                         last_item = MLX5_FLOW_LAYER_VXLAN;
7559                         break;
7560                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7561                         flow_dv_translate_item_vxlan(match_mask, match_value,
7562                                                      items, tunnel);
7563                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7564                         break;
7565                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7566                         flow_dv_translate_item_geneve(match_mask, match_value,
7567                                                       items, tunnel);
7568                         last_item = MLX5_FLOW_LAYER_GENEVE;
7569                         break;
7570                 case RTE_FLOW_ITEM_TYPE_MPLS:
7571                         flow_dv_translate_item_mpls(match_mask, match_value,
7572                                                     items, last_item, tunnel);
7573                         last_item = MLX5_FLOW_LAYER_MPLS;
7574                         break;
7575                 case RTE_FLOW_ITEM_TYPE_MARK:
7576                         flow_dv_translate_item_mark(dev, match_mask,
7577                                                     match_value, items);
7578                         last_item = MLX5_FLOW_ITEM_MARK;
7579                         break;
7580                 case RTE_FLOW_ITEM_TYPE_META:
7581                         flow_dv_translate_item_meta(dev, match_mask,
7582                                                     match_value, attr, items);
7583                         last_item = MLX5_FLOW_ITEM_METADATA;
7584                         break;
7585                 case RTE_FLOW_ITEM_TYPE_ICMP:
7586                         flow_dv_translate_item_icmp(match_mask, match_value,
7587                                                     items, tunnel);
7588                         last_item = MLX5_FLOW_LAYER_ICMP;
7589                         break;
7590                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7591                         flow_dv_translate_item_icmp6(match_mask, match_value,
7592                                                       items, tunnel);
7593                         last_item = MLX5_FLOW_LAYER_ICMP6;
7594                         break;
7595                 case RTE_FLOW_ITEM_TYPE_TAG:
7596                         flow_dv_translate_item_tag(dev, match_mask,
7597                                                    match_value, items);
7598                         last_item = MLX5_FLOW_ITEM_TAG;
7599                         break;
7600                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7601                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7602                                                         match_value, items);
7603                         last_item = MLX5_FLOW_ITEM_TAG;
7604                         break;
7605                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7606                         flow_dv_translate_item_tx_queue(dev, match_mask,
7607                                                         match_value,
7608                                                         items);
7609                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7610                         break;
7611                 case RTE_FLOW_ITEM_TYPE_GTP:
7612                         flow_dv_translate_item_gtp(match_mask, match_value,
7613                                                    items, tunnel);
7614                         last_item = MLX5_FLOW_LAYER_GTP;
7615                         break;
7616                 default:
7617                         break;
7618                 }
7619                 item_flags |= last_item;
7620         }
7621         /*
7622          * When E-Switch mode is enabled, we have two cases where we need to
7623          * set the source port manually.
7624          * The first one, is in case of Nic steering rule, and the second is
7625          * E-Switch rule where no port_id item was found. In both cases
7626          * the source port is set according the current port in use.
7627          */
7628         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
7629             (priv->representor || priv->master)) {
7630                 if (flow_dv_translate_item_port_id(dev, match_mask,
7631                                                    match_value, NULL))
7632                         return -rte_errno;
7633         }
7634         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7635                                          dev_flow->dv.value.buf));
7636         dev_flow->layers = item_flags;
7637         if (action_flags & MLX5_FLOW_ACTION_RSS)
7638                 flow_dv_hashfields_set(dev_flow);
7639         /* Register matcher. */
7640         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7641                                     matcher.mask.size);
7642         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7643                                                      matcher.priority);
7644         /* reserved field no needs to be set to 0 here. */
7645         tbl_key.domain = attr->transfer;
7646         tbl_key.direction = attr->egress;
7647         tbl_key.table_id = dev_flow->group;
7648         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7649                 return -rte_errno;
7650         return 0;
7651 }
7652
7653 /**
7654  * Apply the flow to the NIC, lock free,
7655  * (mutex should be acquired by caller).
7656  *
7657  * @param[in] dev
7658  *   Pointer to the Ethernet device structure.
7659  * @param[in, out] flow
7660  *   Pointer to flow structure.
7661  * @param[out] error
7662  *   Pointer to error structure.
7663  *
7664  * @return
7665  *   0 on success, a negative errno value otherwise and rte_errno is set.
7666  */
7667 static int
7668 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7669                 struct rte_flow_error *error)
7670 {
7671         struct mlx5_flow_dv *dv;
7672         struct mlx5_flow *dev_flow;
7673         struct mlx5_priv *priv = dev->data->dev_private;
7674         int n;
7675         int err;
7676
7677         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7678                 dv = &dev_flow->dv;
7679                 n = dv->actions_n;
7680                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7681                         if (dev_flow->transfer) {
7682                                 dv->actions[n++] = priv->sh->esw_drop_action;
7683                         } else {
7684                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7685                                 if (!dv->hrxq) {
7686                                         rte_flow_error_set
7687                                                 (error, errno,
7688                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7689                                                  NULL,
7690                                                  "cannot get drop hash queue");
7691                                         goto error;
7692                                 }
7693                                 dv->actions[n++] = dv->hrxq->action;
7694                         }
7695                 } else if (dev_flow->actions &
7696                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7697                         struct mlx5_hrxq *hrxq;
7698
7699                         assert(flow->rss.queue);
7700                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7701                                              MLX5_RSS_HASH_KEY_LEN,
7702                                              dev_flow->hash_fields,
7703                                              (*flow->rss.queue),
7704                                              flow->rss.queue_num);
7705                         if (!hrxq) {
7706                                 hrxq = mlx5_hrxq_new
7707                                         (dev, flow->rss.key,
7708                                          MLX5_RSS_HASH_KEY_LEN,
7709                                          dev_flow->hash_fields,
7710                                          (*flow->rss.queue),
7711                                          flow->rss.queue_num,
7712                                          !!(dev_flow->layers &
7713                                             MLX5_FLOW_LAYER_TUNNEL));
7714                         }
7715                         if (!hrxq) {
7716                                 rte_flow_error_set
7717                                         (error, rte_errno,
7718                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7719                                          "cannot get hash queue");
7720                                 goto error;
7721                         }
7722                         dv->hrxq = hrxq;
7723                         dv->actions[n++] = dv->hrxq->action;
7724                 }
7725                 dv->flow =
7726                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7727                                                   (void *)&dv->value, n,
7728                                                   dv->actions);
7729                 if (!dv->flow) {
7730                         rte_flow_error_set(error, errno,
7731                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7732                                            NULL,
7733                                            "hardware refuses to create flow");
7734                         goto error;
7735                 }
7736                 if (priv->vmwa_context &&
7737                     dev_flow->dv.vf_vlan.tag &&
7738                     !dev_flow->dv.vf_vlan.created) {
7739                         /*
7740                          * The rule contains the VLAN pattern.
7741                          * For VF we are going to create VLAN
7742                          * interface to make hypervisor set correct
7743                          * e-Switch vport context.
7744                          */
7745                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7746                 }
7747         }
7748         return 0;
7749 error:
7750         err = rte_errno; /* Save rte_errno before cleanup. */
7751         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7752                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7753                 if (dv->hrxq) {
7754                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7755                                 mlx5_hrxq_drop_release(dev);
7756                         else
7757                                 mlx5_hrxq_release(dev, dv->hrxq);
7758                         dv->hrxq = NULL;
7759                 }
7760                 if (dev_flow->dv.vf_vlan.tag &&
7761                     dev_flow->dv.vf_vlan.created)
7762                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7763         }
7764         rte_errno = err; /* Restore rte_errno. */
7765         return -rte_errno;
7766 }
7767
7768 /**
7769  * Release the flow matcher.
7770  *
7771  * @param dev
7772  *   Pointer to Ethernet device.
7773  * @param flow
7774  *   Pointer to mlx5_flow.
7775  *
7776  * @return
7777  *   1 while a reference on it exists, 0 when freed.
7778  */
7779 static int
7780 flow_dv_matcher_release(struct rte_eth_dev *dev,
7781                         struct mlx5_flow *flow)
7782 {
7783         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7784
7785         assert(matcher->matcher_object);
7786         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7787                 dev->data->port_id, (void *)matcher,
7788                 rte_atomic32_read(&matcher->refcnt));
7789         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7790                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7791                            (matcher->matcher_object));
7792                 LIST_REMOVE(matcher, next);
7793                 /* table ref-- in release interface. */
7794                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7795                 rte_free(matcher);
7796                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7797                         dev->data->port_id, (void *)matcher);
7798                 return 0;
7799         }
7800         return 1;
7801 }
7802
7803 /**
7804  * Release an encap/decap resource.
7805  *
7806  * @param flow
7807  *   Pointer to mlx5_flow.
7808  *
7809  * @return
7810  *   1 while a reference on it exists, 0 when freed.
7811  */
7812 static int
7813 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7814 {
7815         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7816                                                 flow->dv.encap_decap;
7817
7818         assert(cache_resource->verbs_action);
7819         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7820                 (void *)cache_resource,
7821                 rte_atomic32_read(&cache_resource->refcnt));
7822         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7823                 claim_zero(mlx5_glue->destroy_flow_action
7824                                 (cache_resource->verbs_action));
7825                 LIST_REMOVE(cache_resource, next);
7826                 rte_free(cache_resource);
7827                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7828                         (void *)cache_resource);
7829                 return 0;
7830         }
7831         return 1;
7832 }
7833
7834 /**
7835  * Release an jump to table action resource.
7836  *
7837  * @param dev
7838  *   Pointer to Ethernet device.
7839  * @param flow
7840  *   Pointer to mlx5_flow.
7841  *
7842  * @return
7843  *   1 while a reference on it exists, 0 when freed.
7844  */
7845 static int
7846 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7847                                   struct mlx5_flow *flow)
7848 {
7849         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7850         struct mlx5_flow_tbl_data_entry *tbl_data =
7851                         container_of(cache_resource,
7852                                      struct mlx5_flow_tbl_data_entry, jump);
7853
7854         assert(cache_resource->action);
7855         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7856                 (void *)cache_resource,
7857                 rte_atomic32_read(&cache_resource->refcnt));
7858         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7859                 claim_zero(mlx5_glue->destroy_flow_action
7860                                 (cache_resource->action));
7861                 /* jump action memory free is inside the table release. */
7862                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7863                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7864                         (void *)cache_resource);
7865                 return 0;
7866         }
7867         return 1;
7868 }
7869
7870 /**
7871  * Release a modify-header resource.
7872  *
7873  * @param flow
7874  *   Pointer to mlx5_flow.
7875  *
7876  * @return
7877  *   1 while a reference on it exists, 0 when freed.
7878  */
7879 static int
7880 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7881 {
7882         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7883                                                 flow->dv.modify_hdr;
7884
7885         assert(cache_resource->verbs_action);
7886         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7887                 (void *)cache_resource,
7888                 rte_atomic32_read(&cache_resource->refcnt));
7889         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7890                 claim_zero(mlx5_glue->destroy_flow_action
7891                                 (cache_resource->verbs_action));
7892                 LIST_REMOVE(cache_resource, next);
7893                 rte_free(cache_resource);
7894                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7895                         (void *)cache_resource);
7896                 return 0;
7897         }
7898         return 1;
7899 }
7900
7901 /**
7902  * Release port ID action resource.
7903  *
7904  * @param flow
7905  *   Pointer to mlx5_flow.
7906  *
7907  * @return
7908  *   1 while a reference on it exists, 0 when freed.
7909  */
7910 static int
7911 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7912 {
7913         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7914                 flow->dv.port_id_action;
7915
7916         assert(cache_resource->action);
7917         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7918                 (void *)cache_resource,
7919                 rte_atomic32_read(&cache_resource->refcnt));
7920         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7921                 claim_zero(mlx5_glue->destroy_flow_action
7922                                 (cache_resource->action));
7923                 LIST_REMOVE(cache_resource, next);
7924                 rte_free(cache_resource);
7925                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7926                         (void *)cache_resource);
7927                 return 0;
7928         }
7929         return 1;
7930 }
7931
7932 /**
7933  * Release push vlan action resource.
7934  *
7935  * @param flow
7936  *   Pointer to mlx5_flow.
7937  *
7938  * @return
7939  *   1 while a reference on it exists, 0 when freed.
7940  */
7941 static int
7942 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7943 {
7944         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7945                 flow->dv.push_vlan_res;
7946
7947         assert(cache_resource->action);
7948         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7949                 (void *)cache_resource,
7950                 rte_atomic32_read(&cache_resource->refcnt));
7951         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7952                 claim_zero(mlx5_glue->destroy_flow_action
7953                                 (cache_resource->action));
7954                 LIST_REMOVE(cache_resource, next);
7955                 rte_free(cache_resource);
7956                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7957                         (void *)cache_resource);
7958                 return 0;
7959         }
7960         return 1;
7961 }
7962
7963 /**
7964  * Remove the flow from the NIC but keeps it in memory.
7965  * Lock free, (mutex should be acquired by caller).
7966  *
7967  * @param[in] dev
7968  *   Pointer to Ethernet device.
7969  * @param[in, out] flow
7970  *   Pointer to flow structure.
7971  */
7972 static void
7973 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7974 {
7975         struct mlx5_flow_dv *dv;
7976         struct mlx5_flow *dev_flow;
7977
7978         if (!flow)
7979                 return;
7980         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7981                 dv = &dev_flow->dv;
7982                 if (dv->flow) {
7983                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7984                         dv->flow = NULL;
7985                 }
7986                 if (dv->hrxq) {
7987                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7988                                 mlx5_hrxq_drop_release(dev);
7989                         else
7990                                 mlx5_hrxq_release(dev, dv->hrxq);
7991                         dv->hrxq = NULL;
7992                 }
7993                 if (dev_flow->dv.vf_vlan.tag &&
7994                     dev_flow->dv.vf_vlan.created)
7995                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7996         }
7997 }
7998
7999 /**
8000  * Remove the flow from the NIC and the memory.
8001  * Lock free, (mutex should be acquired by caller).
8002  *
8003  * @param[in] dev
8004  *   Pointer to the Ethernet device structure.
8005  * @param[in, out] flow
8006  *   Pointer to flow structure.
8007  */
8008 static void
8009 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8010 {
8011         struct mlx5_flow *dev_flow;
8012
8013         if (!flow)
8014                 return;
8015         __flow_dv_remove(dev, flow);
8016         if (flow->counter) {
8017                 flow_dv_counter_release(dev, flow->counter);
8018                 flow->counter = NULL;
8019         }
8020         if (flow->meter) {
8021                 mlx5_flow_meter_detach(flow->meter);
8022                 flow->meter = NULL;
8023         }
8024         while (!LIST_EMPTY(&flow->dev_flows)) {
8025                 dev_flow = LIST_FIRST(&flow->dev_flows);
8026                 LIST_REMOVE(dev_flow, next);
8027                 if (dev_flow->dv.matcher)
8028                         flow_dv_matcher_release(dev, dev_flow);
8029                 if (dev_flow->dv.encap_decap)
8030                         flow_dv_encap_decap_resource_release(dev_flow);
8031                 if (dev_flow->dv.modify_hdr)
8032                         flow_dv_modify_hdr_resource_release(dev_flow);
8033                 if (dev_flow->dv.jump)
8034                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8035                 if (dev_flow->dv.port_id_action)
8036                         flow_dv_port_id_action_resource_release(dev_flow);
8037                 if (dev_flow->dv.push_vlan_res)
8038                         flow_dv_push_vlan_action_resource_release(dev_flow);
8039                 if (dev_flow->dv.tag_resource)
8040                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8041                 rte_free(dev_flow);
8042         }
8043 }
8044
8045 /**
8046  * Query a dv flow  rule for its statistics via devx.
8047  *
8048  * @param[in] dev
8049  *   Pointer to Ethernet device.
8050  * @param[in] flow
8051  *   Pointer to the sub flow.
8052  * @param[out] data
8053  *   data retrieved by the query.
8054  * @param[out] error
8055  *   Perform verbose error reporting if not NULL.
8056  *
8057  * @return
8058  *   0 on success, a negative errno value otherwise and rte_errno is set.
8059  */
8060 static int
8061 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8062                     void *data, struct rte_flow_error *error)
8063 {
8064         struct mlx5_priv *priv = dev->data->dev_private;
8065         struct rte_flow_query_count *qc = data;
8066
8067         if (!priv->config.devx)
8068                 return rte_flow_error_set(error, ENOTSUP,
8069                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8070                                           NULL,
8071                                           "counters are not supported");
8072         if (flow->counter) {
8073                 uint64_t pkts, bytes;
8074                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8075                                                &bytes);
8076
8077                 if (err)
8078                         return rte_flow_error_set(error, -err,
8079                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8080                                         NULL, "cannot read counters");
8081                 qc->hits_set = 1;
8082                 qc->bytes_set = 1;
8083                 qc->hits = pkts - flow->counter->hits;
8084                 qc->bytes = bytes - flow->counter->bytes;
8085                 if (qc->reset) {
8086                         flow->counter->hits = pkts;
8087                         flow->counter->bytes = bytes;
8088                 }
8089                 return 0;
8090         }
8091         return rte_flow_error_set(error, EINVAL,
8092                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8093                                   NULL,
8094                                   "counters are not available");
8095 }
8096
8097 /**
8098  * Query a flow.
8099  *
8100  * @see rte_flow_query()
8101  * @see rte_flow_ops
8102  */
8103 static int
8104 flow_dv_query(struct rte_eth_dev *dev,
8105               struct rte_flow *flow __rte_unused,
8106               const struct rte_flow_action *actions __rte_unused,
8107               void *data __rte_unused,
8108               struct rte_flow_error *error __rte_unused)
8109 {
8110         int ret = -EINVAL;
8111
8112         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8113                 switch (actions->type) {
8114                 case RTE_FLOW_ACTION_TYPE_VOID:
8115                         break;
8116                 case RTE_FLOW_ACTION_TYPE_COUNT:
8117                         ret = flow_dv_query_count(dev, flow, data, error);
8118                         break;
8119                 default:
8120                         return rte_flow_error_set(error, ENOTSUP,
8121                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8122                                                   actions,
8123                                                   "action not supported");
8124                 }
8125         }
8126         return ret;
8127 }
8128
8129 /**
8130  * Destroy the meter table set.
8131  * Lock free, (mutex should be acquired by caller).
8132  *
8133  * @param[in] dev
8134  *   Pointer to Ethernet device.
8135  * @param[in] tbl
8136  *   Pointer to the meter table set.
8137  *
8138  * @return
8139  *   Always 0.
8140  */
8141 static int
8142 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8143                         struct mlx5_meter_domains_infos *tbl)
8144 {
8145         struct mlx5_priv *priv = dev->data->dev_private;
8146         struct mlx5_meter_domains_infos *mtd =
8147                                 (struct mlx5_meter_domains_infos *)tbl;
8148
8149         if (!mtd || !priv->config.dv_flow_en)
8150                 return 0;
8151         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8152                 claim_zero(mlx5_glue->dv_destroy_flow
8153                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8154         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8155                 claim_zero(mlx5_glue->dv_destroy_flow
8156                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8157         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8158                 claim_zero(mlx5_glue->dv_destroy_flow
8159                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8160         if (mtd->egress.color_matcher)
8161                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8162                           (mtd->egress.color_matcher));
8163         if (mtd->egress.any_matcher)
8164                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8165                           (mtd->egress.any_matcher));
8166         if (mtd->egress.tbl)
8167                 claim_zero(flow_dv_tbl_resource_release(dev,
8168                                                         mtd->egress.tbl));
8169         if (mtd->ingress.color_matcher)
8170                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8171                           (mtd->ingress.color_matcher));
8172         if (mtd->ingress.any_matcher)
8173                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8174                           (mtd->ingress.any_matcher));
8175         if (mtd->ingress.tbl)
8176                 claim_zero(flow_dv_tbl_resource_release(dev,
8177                                                         mtd->ingress.tbl));
8178         if (mtd->transfer.color_matcher)
8179                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8180                           (mtd->transfer.color_matcher));
8181         if (mtd->transfer.any_matcher)
8182                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8183                           (mtd->transfer.any_matcher));
8184         if (mtd->transfer.tbl)
8185                 claim_zero(flow_dv_tbl_resource_release(dev,
8186                                                         mtd->transfer.tbl));
8187         if (mtd->drop_actn)
8188                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8189         rte_free(mtd);
8190         return 0;
8191 }
8192
8193 /* Number of meter flow actions, count and jump or count and drop. */
8194 #define METER_ACTIONS 2
8195
8196 /**
8197  * Create specify domain meter table and suffix table.
8198  *
8199  * @param[in] dev
8200  *   Pointer to Ethernet device.
8201  * @param[in,out] mtb
8202  *   Pointer to DV meter table set.
8203  * @param[in] egress
8204  *   Table attribute.
8205  * @param[in] transfer
8206  *   Table attribute.
8207  * @param[in] color_reg_c_idx
8208  *   Reg C index for color match.
8209  *
8210  * @return
8211  *   0 on success, -1 otherwise and rte_errno is set.
8212  */
8213 static int
8214 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8215                            struct mlx5_meter_domains_infos *mtb,
8216                            uint8_t egress, uint8_t transfer,
8217                            uint32_t color_reg_c_idx)
8218 {
8219         struct mlx5_priv *priv = dev->data->dev_private;
8220         struct mlx5_ibv_shared *sh = priv->sh;
8221         struct mlx5_flow_dv_match_params mask = {
8222                 .size = sizeof(mask.buf),
8223         };
8224         struct mlx5_flow_dv_match_params value = {
8225                 .size = sizeof(value.buf),
8226         };
8227         struct mlx5dv_flow_matcher_attr dv_attr = {
8228                 .type = IBV_FLOW_ATTR_NORMAL,
8229                 .priority = 0,
8230                 .match_criteria_enable = 0,
8231                 .match_mask = (void *)&mask,
8232         };
8233         void *actions[METER_ACTIONS];
8234         struct mlx5_flow_tbl_resource **sfx_tbl;
8235         struct mlx5_meter_domain_info *dtb;
8236         struct rte_flow_error error;
8237         int i = 0;
8238
8239         if (transfer) {
8240                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8241                 dtb = &mtb->transfer;
8242         } else if (egress) {
8243                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8244                 dtb = &mtb->egress;
8245         } else {
8246                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8247                 dtb = &mtb->ingress;
8248         }
8249         /* If the suffix table in missing, create it. */
8250         if (!(*sfx_tbl)) {
8251                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8252                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8253                                                 egress, transfer, &error);
8254                 if (!(*sfx_tbl)) {
8255                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8256                         return -1;
8257                 }
8258         }
8259         /* Create the meter table with METER level. */
8260         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8261                                             egress, transfer, &error);
8262         if (!dtb->tbl) {
8263                 DRV_LOG(ERR, "Failed to create meter policer table.");
8264                 return -1;
8265         }
8266         /* Create matchers, Any and Color. */
8267         dv_attr.priority = 3;
8268         dv_attr.match_criteria_enable = 0;
8269         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8270                                                              &dv_attr,
8271                                                              dtb->tbl->obj);
8272         if (!dtb->any_matcher) {
8273                 DRV_LOG(ERR, "Failed to create meter"
8274                              " policer default matcher.");
8275                 goto error_exit;
8276         }
8277         dv_attr.priority = 0;
8278         dv_attr.match_criteria_enable =
8279                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8280         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8281                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
8282         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8283                                                                &dv_attr,
8284                                                                dtb->tbl->obj);
8285         if (!dtb->color_matcher) {
8286                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8287                 goto error_exit;
8288         }
8289         if (mtb->count_actns[RTE_MTR_DROPPED])
8290                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8291         actions[i++] = mtb->drop_actn;
8292         /* Default rule: lowest priority, match any, actions: drop. */
8293         dtb->policer_rules[RTE_MTR_DROPPED] =
8294                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8295                                                  (void *)&value, i, actions);
8296         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8297                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8298                 goto error_exit;
8299         }
8300         return 0;
8301 error_exit:
8302         return -1;
8303 }
8304
8305 /**
8306  * Create the needed meter and suffix tables.
8307  * Lock free, (mutex should be acquired by caller).
8308  *
8309  * @param[in] dev
8310  *   Pointer to Ethernet device.
8311  * @param[in] fm
8312  *   Pointer to the flow meter.
8313  *
8314  * @return
8315  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8316  */
8317 static struct mlx5_meter_domains_infos *
8318 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8319                        const struct mlx5_flow_meter *fm)
8320 {
8321         struct mlx5_priv *priv = dev->data->dev_private;
8322         struct mlx5_meter_domains_infos *mtb;
8323         int ret;
8324         int i;
8325
8326         if (!priv->mtr_en) {
8327                 rte_errno = ENOTSUP;
8328                 return NULL;
8329         }
8330         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8331         if (!mtb) {
8332                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8333                 return NULL;
8334         }
8335         /* Create meter count actions */
8336         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8337                 if (!fm->policer_stats.cnt[i])
8338                         continue;
8339                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8340         }
8341         /* Create drop action. */
8342         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8343         if (!mtb->drop_actn) {
8344                 DRV_LOG(ERR, "Failed to create drop action.");
8345                 goto error_exit;
8346         }
8347         /* Egress meter table. */
8348         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8349         if (ret) {
8350                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8351                 goto error_exit;
8352         }
8353         /* Ingress meter table. */
8354         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8355         if (ret) {
8356                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8357                 goto error_exit;
8358         }
8359         /* FDB meter table. */
8360         if (priv->config.dv_esw_en) {
8361                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8362                                                  priv->mtr_color_reg);
8363                 if (ret) {
8364                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8365                         goto error_exit;
8366                 }
8367         }
8368         return mtb;
8369 error_exit:
8370         flow_dv_destroy_mtr_tbl(dev, mtb);
8371         return NULL;
8372 }
8373
8374 /**
8375  * Destroy domain policer rule.
8376  *
8377  * @param[in] dt
8378  *   Pointer to domain table.
8379  */
8380 static void
8381 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8382 {
8383         int i;
8384
8385         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8386                 if (dt->policer_rules[i]) {
8387                         claim_zero(mlx5_glue->dv_destroy_flow
8388                                   (dt->policer_rules[i]));
8389                         dt->policer_rules[i] = NULL;
8390                 }
8391         }
8392         if (dt->jump_actn) {
8393                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8394                 dt->jump_actn = NULL;
8395         }
8396 }
8397
8398 /**
8399  * Destroy policer rules.
8400  *
8401  * @param[in] dev
8402  *   Pointer to Ethernet device.
8403  * @param[in] fm
8404  *   Pointer to flow meter structure.
8405  * @param[in] attr
8406  *   Pointer to flow attributes.
8407  *
8408  * @return
8409  *   Always 0.
8410  */
8411 static int
8412 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8413                               const struct mlx5_flow_meter *fm,
8414                               const struct rte_flow_attr *attr)
8415 {
8416         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8417
8418         if (!mtb)
8419                 return 0;
8420         if (attr->egress)
8421                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8422         if (attr->ingress)
8423                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8424         if (attr->transfer)
8425                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8426         return 0;
8427 }
8428
8429 /**
8430  * Create specify domain meter policer rule.
8431  *
8432  * @param[in] fm
8433  *   Pointer to flow meter structure.
8434  * @param[in] mtb
8435  *   Pointer to DV meter table set.
8436  * @param[in] sfx_tb
8437  *   Pointer to suffix table.
8438  * @param[in] mtr_reg_c
8439  *   Color match REG_C.
8440  *
8441  * @return
8442  *   0 on success, -1 otherwise.
8443  */
8444 static int
8445 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8446                                     struct mlx5_meter_domain_info *dtb,
8447                                     struct mlx5_flow_tbl_resource *sfx_tb,
8448                                     uint8_t mtr_reg_c)
8449 {
8450         struct mlx5_flow_dv_match_params matcher = {
8451                 .size = sizeof(matcher.buf),
8452         };
8453         struct mlx5_flow_dv_match_params value = {
8454                 .size = sizeof(value.buf),
8455         };
8456         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8457         void *actions[METER_ACTIONS];
8458         int i;
8459
8460         /* Create jump action. */
8461         if (!sfx_tb)
8462                 return -1;
8463         if (!dtb->jump_actn)
8464                 dtb->jump_actn =
8465                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8466                                                         (sfx_tb->obj);
8467         if (!dtb->jump_actn) {
8468                 DRV_LOG(ERR, "Failed to create policer jump action.");
8469                 goto error;
8470         }
8471         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8472                 int j = 0;
8473
8474                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8475                                        rte_col_2_mlx5_col(i), UINT8_MAX);
8476                 if (mtb->count_actns[i])
8477                         actions[j++] = mtb->count_actns[i];
8478                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8479                         actions[j++] = mtb->drop_actn;
8480                 else
8481                         actions[j++] = dtb->jump_actn;
8482                 dtb->policer_rules[i] =
8483                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8484                                                  (void *)&value,
8485                                                   j, actions);
8486                 if (!dtb->policer_rules[i]) {
8487                         DRV_LOG(ERR, "Failed to create policer rule.");
8488                         goto error;
8489                 }
8490         }
8491         return 0;
8492 error:
8493         rte_errno = errno;
8494         return -1;
8495 }
8496
8497 /**
8498  * Create policer rules.
8499  *
8500  * @param[in] dev
8501  *   Pointer to Ethernet device.
8502  * @param[in] fm
8503  *   Pointer to flow meter structure.
8504  * @param[in] attr
8505  *   Pointer to flow attributes.
8506  *
8507  * @return
8508  *   0 on success, -1 otherwise.
8509  */
8510 static int
8511 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8512                              struct mlx5_flow_meter *fm,
8513                              const struct rte_flow_attr *attr)
8514 {
8515         struct mlx5_priv *priv = dev->data->dev_private;
8516         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8517         int ret;
8518
8519         if (attr->egress) {
8520                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8521                                                 priv->sh->tx_mtr_sfx_tbl,
8522                                                 priv->mtr_color_reg);
8523                 if (ret) {
8524                         DRV_LOG(ERR, "Failed to create egress policer.");
8525                         goto error;
8526                 }
8527         }
8528         if (attr->ingress) {
8529                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8530                                                 priv->sh->rx_mtr_sfx_tbl,
8531                                                 priv->mtr_color_reg);
8532                 if (ret) {
8533                         DRV_LOG(ERR, "Failed to create ingress policer.");
8534                         goto error;
8535                 }
8536         }
8537         if (attr->transfer) {
8538                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8539                                                 priv->sh->fdb_mtr_sfx_tbl,
8540                                                 priv->mtr_color_reg);
8541                 if (ret) {
8542                         DRV_LOG(ERR, "Failed to create transfer policer.");
8543                         goto error;
8544                 }
8545         }
8546         return 0;
8547 error:
8548         flow_dv_destroy_policer_rules(dev, fm, attr);
8549         return -1;
8550 }
8551
8552 /**
8553  * Query a devx counter.
8554  *
8555  * @param[in] dev
8556  *   Pointer to the Ethernet device structure.
8557  * @param[in] cnt
8558  *   Pointer to the flow counter.
8559  * @param[in] clear
8560  *   Set to clear the counter statistics.
8561  * @param[out] pkts
8562  *   The statistics value of packets.
8563  * @param[out] bytes
8564  *   The statistics value of bytes.
8565  *
8566  * @return
8567  *   0 on success, otherwise return -1.
8568  */
8569 static int
8570 flow_dv_counter_query(struct rte_eth_dev *dev,
8571                       struct mlx5_flow_counter *cnt, bool clear,
8572                       uint64_t *pkts, uint64_t *bytes)
8573 {
8574         struct mlx5_priv *priv = dev->data->dev_private;
8575         uint64_t inn_pkts, inn_bytes;
8576         int ret;
8577
8578         if (!priv->config.devx)
8579                 return -1;
8580         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8581         if (ret)
8582                 return -1;
8583         *pkts = inn_pkts - cnt->hits;
8584         *bytes = inn_bytes - cnt->bytes;
8585         if (clear) {
8586                 cnt->hits = inn_pkts;
8587                 cnt->bytes = inn_bytes;
8588         }
8589         return 0;
8590 }
8591
8592 /*
8593  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8594  */
8595 static int
8596 flow_dv_translate(struct rte_eth_dev *dev,
8597                   struct mlx5_flow *dev_flow,
8598                   const struct rte_flow_attr *attr,
8599                   const struct rte_flow_item items[],
8600                   const struct rte_flow_action actions[],
8601                   struct rte_flow_error *error)
8602 {
8603         int ret;
8604
8605         flow_dv_shared_lock(dev);
8606         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8607         flow_dv_shared_unlock(dev);
8608         return ret;
8609 }
8610
8611 /*
8612  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8613  */
8614 static int
8615 flow_dv_apply(struct rte_eth_dev *dev,
8616               struct rte_flow *flow,
8617               struct rte_flow_error *error)
8618 {
8619         int ret;
8620
8621         flow_dv_shared_lock(dev);
8622         ret = __flow_dv_apply(dev, flow, error);
8623         flow_dv_shared_unlock(dev);
8624         return ret;
8625 }
8626
8627 /*
8628  * Mutex-protected thunk to lock-free __flow_dv_remove().
8629  */
8630 static void
8631 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8632 {
8633         flow_dv_shared_lock(dev);
8634         __flow_dv_remove(dev, flow);
8635         flow_dv_shared_unlock(dev);
8636 }
8637
8638 /*
8639  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8640  */
8641 static void
8642 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8643 {
8644         flow_dv_shared_lock(dev);
8645         __flow_dv_destroy(dev, flow);
8646         flow_dv_shared_unlock(dev);
8647 }
8648
8649 /*
8650  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8651  */
8652 static struct mlx5_flow_counter *
8653 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8654 {
8655         struct mlx5_flow_counter *cnt;
8656
8657         flow_dv_shared_lock(dev);
8658         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8659         flow_dv_shared_unlock(dev);
8660         return cnt;
8661 }
8662
8663 /*
8664  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8665  */
8666 static void
8667 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8668 {
8669         flow_dv_shared_lock(dev);
8670         flow_dv_counter_release(dev, cnt);
8671         flow_dv_shared_unlock(dev);
8672 }
8673
8674 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8675         .validate = flow_dv_validate,
8676         .prepare = flow_dv_prepare,
8677         .translate = flow_dv_translate,
8678         .apply = flow_dv_apply,
8679         .remove = flow_dv_remove,
8680         .destroy = flow_dv_destroy,
8681         .query = flow_dv_query,
8682         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8683         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8684         .create_policer_rules = flow_dv_create_policer_rules,
8685         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8686         .counter_alloc = flow_dv_counter_allocate,
8687         .counter_free = flow_dv_counter_free,
8688         .counter_query = flow_dv_counter_query,
8689 };
8690
8691 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */