drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_prm.h>
  35
  36 #include "mlx5_defs.h"
  37 #include "mlx5.h"
  38 #include "mlx5_flow.h"
  39 #include "mlx5_rxtx.h"
  40
  41 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  58                                           sizeof(struct rte_flow_item_ipv4))
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 /**
  79  * Initialize flow attributes structure according to flow items' types.
  80  *
  81  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  82  * mode. For tunnel mode, the items to be modified are the outermost ones.
  83  *
  84  * @param[in] item
  85  *   Pointer to item specification.
  86  * @param[out] attr
  87  *   Pointer to flow attributes structure.
  88  */
  89 static void
  90 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  91 {
  92         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  93                 switch (item->type) {
  94                 case RTE_FLOW_ITEM_TYPE_IPV4:
  95                         if (!attr->ipv6)
  96                                 attr->ipv4 = 1;
  97                         break;
  98                 case RTE_FLOW_ITEM_TYPE_IPV6:
  99                         if (!attr->ipv4)
 100                                 attr->ipv6 = 1;
 101                         break;
 102                 case RTE_FLOW_ITEM_TYPE_UDP:
 103                         if (!attr->tcp)
 104                                 attr->udp = 1;
 105                         break;
 106                 case RTE_FLOW_ITEM_TYPE_TCP:
 107                         if (!attr->udp)
 108                                 attr->tcp = 1;
 109                         break;
 110                 default:
 111                         break;
 112                 }
 113         }
 114         attr->valid = 1;
 115 }
 116
 117 /**
 118  * Convert rte_mtr_color to mlx5 color.
 119  *
 120  * @param[in] rcol
 121  *   rte_mtr_color.
 122  *
 123  * @return
 124  *   mlx5 color.
 125  */
 126 static int
 127 rte_col_2_mlx5_col(enum rte_color rcol)
 128 {
 129         switch (rcol) {
 130         case RTE_COLOR_GREEN:
 131                 return MLX5_FLOW_COLOR_GREEN;
 132         case RTE_COLOR_YELLOW:
 133                 return MLX5_FLOW_COLOR_YELLOW;
 134         case RTE_COLOR_RED:
 135                 return MLX5_FLOW_COLOR_RED;
 136         default:
 137                 break;
 138         }
 139         return MLX5_FLOW_COLOR_UNDEFINED;
 140 }
 141
 142 struct field_modify_info {
 143         uint32_t size; /* Size of field in protocol header, in bytes. */
 144         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 145         enum mlx5_modification_field id;
 146 };
 147
 148 struct field_modify_info modify_eth[] = {
 149         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 150         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 151         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 152         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 153         {0, 0, 0},
 154 };
 155
 156 struct field_modify_info modify_vlan_out_first_vid[] = {
 157         /* Size in bits !!! */
 158         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 159         {0, 0, 0},
 160 };
 161
 162 struct field_modify_info modify_ipv4[] = {
 163         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 164         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 165         {4, 12, MLX5_MODI_OUT_SIPV4},
 166         {4, 16, MLX5_MODI_OUT_DIPV4},
 167         {0, 0, 0},
 168 };
 169
 170 struct field_modify_info modify_ipv6[] = {
 171         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 172         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 173         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 174         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 175         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 176         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 177         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 178         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 179         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 180         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 181         {0, 0, 0},
 182 };
 183
 184 struct field_modify_info modify_udp[] = {
 185         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 186         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 187         {0, 0, 0},
 188 };
 189
 190 struct field_modify_info modify_tcp[] = {
 191         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 192         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 193         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 194         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 195         {0, 0, 0},
 196 };
 197
 198 static void
 199 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 200                           uint8_t next_protocol, uint64_t *item_flags,
 201                           int *tunnel)
 202 {
 203         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 204                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 205         if (next_protocol == IPPROTO_IPIP) {
 206                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 207                 *tunnel = 1;
 208         }
 209         if (next_protocol == IPPROTO_IPV6) {
 210                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 211                 *tunnel = 1;
 212         }
 213 }
 214
 215 /**
 216  * Acquire the synchronizing object to protect multithreaded access
 217  * to shared dv context. Lock occurs only if context is actually
 218  * shared, i.e. we have multiport IB device and representors are
 219  * created.
 220  *
 221  * @param[in] dev
 222  *   Pointer to the rte_eth_dev structure.
 223  */
 224 static void
 225 flow_dv_shared_lock(struct rte_eth_dev *dev)
 226 {
 227         struct mlx5_priv *priv = dev->data->dev_private;
 228         struct mlx5_ibv_shared *sh = priv->sh;
 229
 230         if (sh->dv_refcnt > 1) {
 231                 int ret;
 232
 233                 ret = pthread_mutex_lock(&sh->dv_mutex);
 234                 assert(!ret);
 235                 (void)ret;
 236         }
 237 }
 238
 239 static void
 240 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 241 {
 242         struct mlx5_priv *priv = dev->data->dev_private;
 243         struct mlx5_ibv_shared *sh = priv->sh;
 244
 245         if (sh->dv_refcnt > 1) {
 246                 int ret;
 247
 248                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 249                 assert(!ret);
 250                 (void)ret;
 251         }
 252 }
 253
 254 /* Update VLAN's VID/PCP based on input rte_flow_action.
 255  *
 256  * @param[in] action
 257  *   Pointer to struct rte_flow_action.
 258  * @param[out] vlan
 259  *   Pointer to struct rte_vlan_hdr.
 260  */
 261 static void
 262 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 263                          struct rte_vlan_hdr *vlan)
 264 {
 265         uint16_t vlan_tci;
 266         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 267                 vlan_tci =
 268                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 269                                                action->conf)->vlan_pcp;
 270                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 271                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 272                 vlan->vlan_tci |= vlan_tci;
 273         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 274                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 275                 vlan->vlan_tci |= rte_be_to_cpu_16
 276                     (((const struct rte_flow_action_of_set_vlan_vid *)
 277                                              action->conf)->vlan_vid);
 278         }
 279 }
 280
 281 /**
 282  * Fetch 1, 2, 3 or 4 byte field from the byte array
 283  * and return as unsigned integer in host-endian format.
 284  *
 285  * @param[in] data
 286  *   Pointer to data array.
 287  * @param[in] size
 288  *   Size of field to extract.
 289  *
 290  * @return
 291  *   converted field in host endian format.
 292  */
 293 static inline uint32_t
 294 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 295 {
 296         uint32_t ret;
 297
 298         switch (size) {
 299         case 1:
 300                 ret = *data;
 301                 break;
 302         case 2:
 303                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 304                 break;
 305         case 3:
 306                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 307                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 308                 break;
 309         case 4:
 310                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 311                 break;
 312         default:
 313                 assert(false);
 314                 ret = 0;
 315                 break;
 316         }
 317         return ret;
 318 }
 319
 320 /**
 321  * Convert modify-header action to DV specification.
 322  *
 323  * Data length of each action is determined by provided field description
 324  * and the item mask. Data bit offset and width of each action is determined
 325  * by provided item mask.
 326  *
 327  * @param[in] item
 328  *   Pointer to item specification.
 329  * @param[in] field
 330  *   Pointer to field modification information.
 331  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 332  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 333  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 334  * @param[in] dcopy
 335  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 336  *   Negative offset value sets the same offset as source offset.
 337  *   size field is ignored, value is taken from source field.
 338  * @param[in,out] resource
 339  *   Pointer to the modify-header resource.
 340  * @param[in] type
 341  *   Type of modification.
 342  * @param[out] error
 343  *   Pointer to the error structure.
 344  *
 345  * @return
 346  *   0 on success, a negative errno value otherwise and rte_errno is set.
 347  */
 348 static int
 349 flow_dv_convert_modify_action(struct rte_flow_item *item,
 350                               struct field_modify_info *field,
 351                               struct field_modify_info *dcopy,
 352                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 353                               uint32_t type, struct rte_flow_error *error)
 354 {
 355         uint32_t i = resource->actions_num;
 356         struct mlx5_modification_cmd *actions = resource->actions;
 357
 358         /*
 359          * The item and mask are provided in big-endian format.
 360          * The fields should be presented as in big-endian format either.
 361          * Mask must be always present, it defines the actual field width.
 362          */
 363         assert(item->mask);
 364         assert(field->size);
 365         do {
 366                 unsigned int size_b;
 367                 unsigned int off_b;
 368                 uint32_t mask;
 369                 uint32_t data;
 370
 371                 if (i >= MLX5_MAX_MODIFY_NUM)
 372                         return rte_flow_error_set(error, EINVAL,
 373                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 374                                  "too many items to modify");
 375                 /* Fetch variable byte size mask from the array. */
 376                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 377                                            field->offset, field->size);
 378                 if (!mask) {
 379                         ++field;
 380                         continue;
 381                 }
 382                 /* Deduce actual data width in bits from mask value. */
 383                 off_b = rte_bsf32(mask);
 384                 size_b = sizeof(uint32_t) * CHAR_BIT -
 385                          off_b - __builtin_clz(mask);
 386                 assert(size_b);
 387                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 388                 actions[i].action_type = type;
 389                 actions[i].field = field->id;
 390                 actions[i].offset = off_b;
 391                 actions[i].length = size_b;
 392                 /* Convert entire record to expected big-endian format. */
 393                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 394                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 395                         assert(dcopy);
 396                         actions[i].dst_field = dcopy->id;
 397                         actions[i].dst_offset =
 398                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 399                         /* Convert entire record to big-endian format. */
 400                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 401                 } else {
 402                         assert(item->spec);
 403                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 404                                                    field->offset, field->size);
 405                         /* Shift out the trailing masked bits from data. */
 406                         data = (data & mask) >> off_b;
 407                         actions[i].data1 = rte_cpu_to_be_32(data);
 408                 }
 409                 ++i;
 410                 ++field;
 411         } while (field->size);
 412         if (resource->actions_num == i)
 413                 return rte_flow_error_set(error, EINVAL,
 414                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 415                                           "invalid modification flow item");
 416         resource->actions_num = i;
 417         return 0;
 418 }
 419
 420 /**
 421  * Convert modify-header set IPv4 address action to DV specification.
 422  *
 423  * @param[in,out] resource
 424  *   Pointer to the modify-header resource.
 425  * @param[in] action
 426  *   Pointer to action specification.
 427  * @param[out] error
 428  *   Pointer to the error structure.
 429  *
 430  * @return
 431  *   0 on success, a negative errno value otherwise and rte_errno is set.
 432  */
 433 static int
 434 flow_dv_convert_action_modify_ipv4
 435                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 436                          const struct rte_flow_action *action,
 437                          struct rte_flow_error *error)
 438 {
 439         const struct rte_flow_action_set_ipv4 *conf =
 440                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 441         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 442         struct rte_flow_item_ipv4 ipv4;
 443         struct rte_flow_item_ipv4 ipv4_mask;
 444
 445         memset(&ipv4, 0, sizeof(ipv4));
 446         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 447         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 448                 ipv4.hdr.src_addr = conf->ipv4_addr;
 449                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 450         } else {
 451                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 452                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 453         }
 454         item.spec = &ipv4;
 455         item.mask = &ipv4_mask;
 456         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 457                                              MLX5_MODIFICATION_TYPE_SET, error);
 458 }
 459
 460 /**
 461  * Convert modify-header set IPv6 address action to DV specification.
 462  *
 463  * @param[in,out] resource
 464  *   Pointer to the modify-header resource.
 465  * @param[in] action
 466  *   Pointer to action specification.
 467  * @param[out] error
 468  *   Pointer to the error structure.
 469  *
 470  * @return
 471  *   0 on success, a negative errno value otherwise and rte_errno is set.
 472  */
 473 static int
 474 flow_dv_convert_action_modify_ipv6
 475                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 476                          const struct rte_flow_action *action,
 477                          struct rte_flow_error *error)
 478 {
 479         const struct rte_flow_action_set_ipv6 *conf =
 480                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 481         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 482         struct rte_flow_item_ipv6 ipv6;
 483         struct rte_flow_item_ipv6 ipv6_mask;
 484
 485         memset(&ipv6, 0, sizeof(ipv6));
 486         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 487         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 488                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 489                        sizeof(ipv6.hdr.src_addr));
 490                 memcpy(&ipv6_mask.hdr.src_addr,
 491                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 492                        sizeof(ipv6.hdr.src_addr));
 493         } else {
 494                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 495                        sizeof(ipv6.hdr.dst_addr));
 496                 memcpy(&ipv6_mask.hdr.dst_addr,
 497                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 498                        sizeof(ipv6.hdr.dst_addr));
 499         }
 500         item.spec = &ipv6;
 501         item.mask = &ipv6_mask;
 502         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 503                                              MLX5_MODIFICATION_TYPE_SET, error);
 504 }
 505
 506 /**
 507  * Convert modify-header set MAC address action to DV specification.
 508  *
 509  * @param[in,out] resource
 510  *   Pointer to the modify-header resource.
 511  * @param[in] action
 512  *   Pointer to action specification.
 513  * @param[out] error
 514  *   Pointer to the error structure.
 515  *
 516  * @return
 517  *   0 on success, a negative errno value otherwise and rte_errno is set.
 518  */
 519 static int
 520 flow_dv_convert_action_modify_mac
 521                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 522                          const struct rte_flow_action *action,
 523                          struct rte_flow_error *error)
 524 {
 525         const struct rte_flow_action_set_mac *conf =
 526                 (const struct rte_flow_action_set_mac *)(action->conf);
 527         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 528         struct rte_flow_item_eth eth;
 529         struct rte_flow_item_eth eth_mask;
 530
 531         memset(&eth, 0, sizeof(eth));
 532         memset(&eth_mask, 0, sizeof(eth_mask));
 533         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 534                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 535                        sizeof(eth.src.addr_bytes));
 536                 memcpy(&eth_mask.src.addr_bytes,
 537                        &rte_flow_item_eth_mask.src.addr_bytes,
 538                        sizeof(eth_mask.src.addr_bytes));
 539         } else {
 540                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 541                        sizeof(eth.dst.addr_bytes));
 542                 memcpy(&eth_mask.dst.addr_bytes,
 543                        &rte_flow_item_eth_mask.dst.addr_bytes,
 544                        sizeof(eth_mask.dst.addr_bytes));
 545         }
 546         item.spec = &eth;
 547         item.mask = &eth_mask;
 548         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 549                                              MLX5_MODIFICATION_TYPE_SET, error);
 550 }
 551
 552 /**
 553  * Convert modify-header set VLAN VID action to DV specification.
 554  *
 555  * @param[in,out] resource
 556  *   Pointer to the modify-header resource.
 557  * @param[in] action
 558  *   Pointer to action specification.
 559  * @param[out] error
 560  *   Pointer to the error structure.
 561  *
 562  * @return
 563  *   0 on success, a negative errno value otherwise and rte_errno is set.
 564  */
 565 static int
 566 flow_dv_convert_action_modify_vlan_vid
 567                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 568                          const struct rte_flow_action *action,
 569                          struct rte_flow_error *error)
 570 {
 571         const struct rte_flow_action_of_set_vlan_vid *conf =
 572                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 573         int i = resource->actions_num;
 574         struct mlx5_modification_cmd *actions = &resource->actions[i];
 575         struct field_modify_info *field = modify_vlan_out_first_vid;
 576
 577         if (i >= MLX5_MAX_MODIFY_NUM)
 578                 return rte_flow_error_set(error, EINVAL,
 579                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 580                          "too many items to modify");
 581         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 582         actions[i].field = field->id;
 583         actions[i].length = field->size;
 584         actions[i].offset = field->offset;
 585         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 586         actions[i].data1 = conf->vlan_vid;
 587         actions[i].data1 = actions[i].data1 << 16;
 588         resource->actions_num = ++i;
 589         return 0;
 590 }
 591
 592 /**
 593  * Convert modify-header set TP action to DV specification.
 594  *
 595  * @param[in,out] resource
 596  *   Pointer to the modify-header resource.
 597  * @param[in] action
 598  *   Pointer to action specification.
 599  * @param[in] items
 600  *   Pointer to rte_flow_item objects list.
 601  * @param[in] attr
 602  *   Pointer to flow attributes structure.
 603  * @param[out] error
 604  *   Pointer to the error structure.
 605  *
 606  * @return
 607  *   0 on success, a negative errno value otherwise and rte_errno is set.
 608  */
 609 static int
 610 flow_dv_convert_action_modify_tp
 611                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 612                          const struct rte_flow_action *action,
 613                          const struct rte_flow_item *items,
 614                          union flow_dv_attr *attr,
 615                          struct rte_flow_error *error)
 616 {
 617         const struct rte_flow_action_set_tp *conf =
 618                 (const struct rte_flow_action_set_tp *)(action->conf);
 619         struct rte_flow_item item;
 620         struct rte_flow_item_udp udp;
 621         struct rte_flow_item_udp udp_mask;
 622         struct rte_flow_item_tcp tcp;
 623         struct rte_flow_item_tcp tcp_mask;
 624         struct field_modify_info *field;
 625
 626         if (!attr->valid)
 627                 flow_dv_attr_init(items, attr);
 628         if (attr->udp) {
 629                 memset(&udp, 0, sizeof(udp));
 630                 memset(&udp_mask, 0, sizeof(udp_mask));
 631                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 632                         udp.hdr.src_port = conf->port;
 633                         udp_mask.hdr.src_port =
 634                                         rte_flow_item_udp_mask.hdr.src_port;
 635                 } else {
 636                         udp.hdr.dst_port = conf->port;
 637                         udp_mask.hdr.dst_port =
 638                                         rte_flow_item_udp_mask.hdr.dst_port;
 639                 }
 640                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 641                 item.spec = &udp;
 642                 item.mask = &udp_mask;
 643                 field = modify_udp;
 644         }
 645         if (attr->tcp) {
 646                 memset(&tcp, 0, sizeof(tcp));
 647                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 648                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 649                         tcp.hdr.src_port = conf->port;
 650                         tcp_mask.hdr.src_port =
 651                                         rte_flow_item_tcp_mask.hdr.src_port;
 652                 } else {
 653                         tcp.hdr.dst_port = conf->port;
 654                         tcp_mask.hdr.dst_port =
 655                                         rte_flow_item_tcp_mask.hdr.dst_port;
 656                 }
 657                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 658                 item.spec = &tcp;
 659                 item.mask = &tcp_mask;
 660                 field = modify_tcp;
 661         }
 662         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 663                                              MLX5_MODIFICATION_TYPE_SET, error);
 664 }
 665
 666 /**
 667  * Convert modify-header set TTL action to DV specification.
 668  *
 669  * @param[in,out] resource
 670  *   Pointer to the modify-header resource.
 671  * @param[in] action
 672  *   Pointer to action specification.
 673  * @param[in] items
 674  *   Pointer to rte_flow_item objects list.
 675  * @param[in] attr
 676  *   Pointer to flow attributes structure.
 677  * @param[out] error
 678  *   Pointer to the error structure.
 679  *
 680  * @return
 681  *   0 on success, a negative errno value otherwise and rte_errno is set.
 682  */
 683 static int
 684 flow_dv_convert_action_modify_ttl
 685                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 686                          const struct rte_flow_action *action,
 687                          const struct rte_flow_item *items,
 688                          union flow_dv_attr *attr,
 689                          struct rte_flow_error *error)
 690 {
 691         const struct rte_flow_action_set_ttl *conf =
 692                 (const struct rte_flow_action_set_ttl *)(action->conf);
 693         struct rte_flow_item item;
 694         struct rte_flow_item_ipv4 ipv4;
 695         struct rte_flow_item_ipv4 ipv4_mask;
 696         struct rte_flow_item_ipv6 ipv6;
 697         struct rte_flow_item_ipv6 ipv6_mask;
 698         struct field_modify_info *field;
 699
 700         if (!attr->valid)
 701                 flow_dv_attr_init(items, attr);
 702         if (attr->ipv4) {
 703                 memset(&ipv4, 0, sizeof(ipv4));
 704                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 705                 ipv4.hdr.time_to_live = conf->ttl_value;
 706                 ipv4_mask.hdr.time_to_live = 0xFF;
 707                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 708                 item.spec = &ipv4;
 709                 item.mask = &ipv4_mask;
 710                 field = modify_ipv4;
 711         }
 712         if (attr->ipv6) {
 713                 memset(&ipv6, 0, sizeof(ipv6));
 714                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 715                 ipv6.hdr.hop_limits = conf->ttl_value;
 716                 ipv6_mask.hdr.hop_limits = 0xFF;
 717                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 718                 item.spec = &ipv6;
 719                 item.mask = &ipv6_mask;
 720                 field = modify_ipv6;
 721         }
 722         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 723                                              MLX5_MODIFICATION_TYPE_SET, error);
 724 }
 725
 726 /**
 727  * Convert modify-header decrement TTL action to DV specification.
 728  *
 729  * @param[in,out] resource
 730  *   Pointer to the modify-header resource.
 731  * @param[in] action
 732  *   Pointer to action specification.
 733  * @param[in] items
 734  *   Pointer to rte_flow_item objects list.
 735  * @param[in] attr
 736  *   Pointer to flow attributes structure.
 737  * @param[out] error
 738  *   Pointer to the error structure.
 739  *
 740  * @return
 741  *   0 on success, a negative errno value otherwise and rte_errno is set.
 742  */
 743 static int
 744 flow_dv_convert_action_modify_dec_ttl
 745                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 746                          const struct rte_flow_item *items,
 747                          union flow_dv_attr *attr,
 748                          struct rte_flow_error *error)
 749 {
 750         struct rte_flow_item item;
 751         struct rte_flow_item_ipv4 ipv4;
 752         struct rte_flow_item_ipv4 ipv4_mask;
 753         struct rte_flow_item_ipv6 ipv6;
 754         struct rte_flow_item_ipv6 ipv6_mask;
 755         struct field_modify_info *field;
 756
 757         if (!attr->valid)
 758                 flow_dv_attr_init(items, attr);
 759         if (attr->ipv4) {
 760                 memset(&ipv4, 0, sizeof(ipv4));
 761                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 762                 ipv4.hdr.time_to_live = 0xFF;
 763                 ipv4_mask.hdr.time_to_live = 0xFF;
 764                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 765                 item.spec = &ipv4;
 766                 item.mask = &ipv4_mask;
 767                 field = modify_ipv4;
 768         }
 769         if (attr->ipv6) {
 770                 memset(&ipv6, 0, sizeof(ipv6));
 771                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 772                 ipv6.hdr.hop_limits = 0xFF;
 773                 ipv6_mask.hdr.hop_limits = 0xFF;
 774                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 775                 item.spec = &ipv6;
 776                 item.mask = &ipv6_mask;
 777                 field = modify_ipv6;
 778         }
 779         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 780                                              MLX5_MODIFICATION_TYPE_ADD, error);
 781 }
 782
 783 /**
 784  * Convert modify-header increment/decrement TCP Sequence number
 785  * to DV specification.
 786  *
 787  * @param[in,out] resource
 788  *   Pointer to the modify-header resource.
 789  * @param[in] action
 790  *   Pointer to action specification.
 791  * @param[out] error
 792  *   Pointer to the error structure.
 793  *
 794  * @return
 795  *   0 on success, a negative errno value otherwise and rte_errno is set.
 796  */
 797 static int
 798 flow_dv_convert_action_modify_tcp_seq
 799                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 800                          const struct rte_flow_action *action,
 801                          struct rte_flow_error *error)
 802 {
 803         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 804         uint64_t value = rte_be_to_cpu_32(*conf);
 805         struct rte_flow_item item;
 806         struct rte_flow_item_tcp tcp;
 807         struct rte_flow_item_tcp tcp_mask;
 808
 809         memset(&tcp, 0, sizeof(tcp));
 810         memset(&tcp_mask, 0, sizeof(tcp_mask));
 811         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 812                 /*
 813                  * The HW has no decrement operation, only increment operation.
 814                  * To simulate decrement X from Y using increment operation
 815                  * we need to add UINT32_MAX X times to Y.
 816                  * Each adding of UINT32_MAX decrements Y by 1.
 817                  */
 818                 value *= UINT32_MAX;
 819         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 820         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 821         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 822         item.spec = &tcp;
 823         item.mask = &tcp_mask;
 824         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 825                                              MLX5_MODIFICATION_TYPE_ADD, error);
 826 }
 827
 828 /**
 829  * Convert modify-header increment/decrement TCP Acknowledgment number
 830  * to DV specification.
 831  *
 832  * @param[in,out] resource
 833  *   Pointer to the modify-header resource.
 834  * @param[in] action
 835  *   Pointer to action specification.
 836  * @param[out] error
 837  *   Pointer to the error structure.
 838  *
 839  * @return
 840  *   0 on success, a negative errno value otherwise and rte_errno is set.
 841  */
 842 static int
 843 flow_dv_convert_action_modify_tcp_ack
 844                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 845                          const struct rte_flow_action *action,
 846                          struct rte_flow_error *error)
 847 {
 848         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 849         uint64_t value = rte_be_to_cpu_32(*conf);
 850         struct rte_flow_item item;
 851         struct rte_flow_item_tcp tcp;
 852         struct rte_flow_item_tcp tcp_mask;
 853
 854         memset(&tcp, 0, sizeof(tcp));
 855         memset(&tcp_mask, 0, sizeof(tcp_mask));
 856         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 857                 /*
 858                  * The HW has no decrement operation, only increment operation.
 859                  * To simulate decrement X from Y using increment operation
 860                  * we need to add UINT32_MAX X times to Y.
 861                  * Each adding of UINT32_MAX decrements Y by 1.
 862                  */
 863                 value *= UINT32_MAX;
 864         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 865         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 866         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 867         item.spec = &tcp;
 868         item.mask = &tcp_mask;
 869         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 870                                              MLX5_MODIFICATION_TYPE_ADD, error);
 871 }
 872
 873 static enum mlx5_modification_field reg_to_field[] = {
 874         [REG_NONE] = MLX5_MODI_OUT_NONE,
 875         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 876         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 877         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 878         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 879         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 880         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 881         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 882         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 883         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 884         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 885 };
 886
 887 /**
 888  * Convert register set to DV specification.
 889  *
 890  * @param[in,out] resource
 891  *   Pointer to the modify-header resource.
 892  * @param[in] action
 893  *   Pointer to action specification.
 894  * @param[out] error
 895  *   Pointer to the error structure.
 896  *
 897  * @return
 898  *   0 on success, a negative errno value otherwise and rte_errno is set.
 899  */
 900 static int
 901 flow_dv_convert_action_set_reg
 902                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 903                          const struct rte_flow_action *action,
 904                          struct rte_flow_error *error)
 905 {
 906         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 907         struct mlx5_modification_cmd *actions = resource->actions;
 908         uint32_t i = resource->actions_num;
 909
 910         if (i >= MLX5_MAX_MODIFY_NUM)
 911                 return rte_flow_error_set(error, EINVAL,
 912                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 913                                           "too many items to modify");
 914         assert(conf->id != REG_NONE);
 915         assert(conf->id < RTE_DIM(reg_to_field));
 916         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 917         actions[i].field = reg_to_field[conf->id];
 918         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 919         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 920         ++i;
 921         resource->actions_num = i;
 922         return 0;
 923 }
 924
 925 /**
 926  * Convert SET_TAG action to DV specification.
 927  *
 928  * @param[in] dev
 929  *   Pointer to the rte_eth_dev structure.
 930  * @param[in,out] resource
 931  *   Pointer to the modify-header resource.
 932  * @param[in] conf
 933  *   Pointer to action specification.
 934  * @param[out] error
 935  *   Pointer to the error structure.
 936  *
 937  * @return
 938  *   0 on success, a negative errno value otherwise and rte_errno is set.
 939  */
 940 static int
 941 flow_dv_convert_action_set_tag
 942                         (struct rte_eth_dev *dev,
 943                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 944                          const struct rte_flow_action_set_tag *conf,
 945                          struct rte_flow_error *error)
 946 {
 947         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 948         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 949         struct rte_flow_item item = {
 950                 .spec = &data,
 951                 .mask = &mask,
 952         };
 953         struct field_modify_info reg_c_x[] = {
 954                 [1] = {0, 0, 0},
 955         };
 956         enum mlx5_modification_field reg_type;
 957         int ret;
 958
 959         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 960         if (ret < 0)
 961                 return ret;
 962         assert(ret != REG_NONE);
 963         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 964         reg_type = reg_to_field[ret];
 965         assert(reg_type > 0);
 966         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 967         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 968                                              MLX5_MODIFICATION_TYPE_SET, error);
 969 }
 970
 971 /**
 972  * Convert internal COPY_REG action to DV specification.
 973  *
 974  * @param[in] dev
 975  *   Pointer to the rte_eth_dev structure.
 976  * @param[in,out] res
 977  *   Pointer to the modify-header resource.
 978  * @param[in] action
 979  *   Pointer to action specification.
 980  * @param[out] error
 981  *   Pointer to the error structure.
 982  *
 983  * @return
 984  *   0 on success, a negative errno value otherwise and rte_errno is set.
 985  */
 986 static int
 987 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 988                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 989                                  const struct rte_flow_action *action,
 990                                  struct rte_flow_error *error)
 991 {
 992         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 993         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 994         struct rte_flow_item item = {
 995                 .spec = NULL,
 996                 .mask = &mask,
 997         };
 998         struct field_modify_info reg_src[] = {
 999                 {4, 0, reg_to_field[conf->src]},
1000                 {0, 0, 0},
1001         };
1002         struct field_modify_info reg_dst = {
1003                 .offset = 0,
1004                 .id = reg_to_field[conf->dst],
1005         };
1006         /* Adjust reg_c[0] usage according to reported mask. */
1007         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1008                 struct mlx5_priv *priv = dev->data->dev_private;
1009                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1010
1011                 assert(reg_c0);
1012                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1013                 if (conf->dst == REG_C_0) {
1014                         /* Copy to reg_c[0], within mask only. */
1015                         reg_dst.offset = rte_bsf32(reg_c0);
1016                         /*
1017                          * Mask is ignoring the enianness, because
1018                          * there is no conversion in datapath.
1019                          */
1020 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1021                         /* Copy from destination lower bits to reg_c[0]. */
1022                         mask = reg_c0 >> reg_dst.offset;
1023 #else
1024                         /* Copy from destination upper bits to reg_c[0]. */
1025                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1026                                           rte_fls_u32(reg_c0));
1027 #endif
1028                 } else {
1029                         mask = rte_cpu_to_be_32(reg_c0);
1030 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1031                         /* Copy from reg_c[0] to destination lower bits. */
1032                         reg_dst.offset = 0;
1033 #else
1034                         /* Copy from reg_c[0] to destination upper bits. */
1035                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1036                                          (rte_fls_u32(reg_c0) -
1037                                           rte_bsf32(reg_c0));
1038 #endif
1039                 }
1040         }
1041         return flow_dv_convert_modify_action(&item,
1042                                              reg_src, &reg_dst, res,
1043                                              MLX5_MODIFICATION_TYPE_COPY,
1044                                              error);
1045 }
1046
1047 /**
1048  * Convert MARK action to DV specification. This routine is used
1049  * in extensive metadata only and requires metadata register to be
1050  * handled. In legacy mode hardware tag resource is engaged.
1051  *
1052  * @param[in] dev
1053  *   Pointer to the rte_eth_dev structure.
1054  * @param[in] conf
1055  *   Pointer to MARK action specification.
1056  * @param[in,out] resource
1057  *   Pointer to the modify-header resource.
1058  * @param[out] error
1059  *   Pointer to the error structure.
1060  *
1061  * @return
1062  *   0 on success, a negative errno value otherwise and rte_errno is set.
1063  */
1064 static int
1065 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1066                             const struct rte_flow_action_mark *conf,
1067                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1068                             struct rte_flow_error *error)
1069 {
1070         struct mlx5_priv *priv = dev->data->dev_private;
1071         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1072                                            priv->sh->dv_mark_mask);
1073         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1074         struct rte_flow_item item = {
1075                 .spec = &data,
1076                 .mask = &mask,
1077         };
1078         struct field_modify_info reg_c_x[] = {
1079                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1080                 {0, 0, 0},
1081         };
1082         int reg;
1083
1084         if (!mask)
1085                 return rte_flow_error_set(error, EINVAL,
1086                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1087                                           NULL, "zero mark action mask");
1088         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1089         if (reg < 0)
1090                 return reg;
1091         assert(reg > 0);
1092         if (reg == REG_C_0) {
1093                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1094                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1095
1096                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1097                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1098                 mask = rte_cpu_to_be_32(mask << shl_c0);
1099         }
1100         reg_c_x[0].id = reg_to_field[reg];
1101         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1102                                              MLX5_MODIFICATION_TYPE_SET, error);
1103 }
1104
1105 /**
1106  * Get metadata register index for specified steering domain.
1107  *
1108  * @param[in] dev
1109  *   Pointer to the rte_eth_dev structure.
1110  * @param[in] attr
1111  *   Attributes of flow to determine steering domain.
1112  * @param[out] error
1113  *   Pointer to the error structure.
1114  *
1115  * @return
1116  *   positive index on success, a negative errno value otherwise
1117  *   and rte_errno is set.
1118  */
1119 static enum modify_reg
1120 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1121                          const struct rte_flow_attr *attr,
1122                          struct rte_flow_error *error)
1123 {
1124         int reg =
1125                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1126                                           MLX5_METADATA_FDB :
1127                                             attr->egress ?
1128                                             MLX5_METADATA_TX :
1129                                             MLX5_METADATA_RX, 0, error);
1130         if (reg < 0)
1131                 return rte_flow_error_set(error,
1132                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1133                                           NULL, "unavailable "
1134                                           "metadata register");
1135         return reg;
1136 }
1137
1138 /**
1139  * Convert SET_META action to DV specification.
1140  *
1141  * @param[in] dev
1142  *   Pointer to the rte_eth_dev structure.
1143  * @param[in,out] resource
1144  *   Pointer to the modify-header resource.
1145  * @param[in] attr
1146  *   Attributes of flow that includes this item.
1147  * @param[in] conf
1148  *   Pointer to action specification.
1149  * @param[out] error
1150  *   Pointer to the error structure.
1151  *
1152  * @return
1153  *   0 on success, a negative errno value otherwise and rte_errno is set.
1154  */
1155 static int
1156 flow_dv_convert_action_set_meta
1157                         (struct rte_eth_dev *dev,
1158                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1159                          const struct rte_flow_attr *attr,
1160                          const struct rte_flow_action_set_meta *conf,
1161                          struct rte_flow_error *error)
1162 {
1163         uint32_t data = conf->data;
1164         uint32_t mask = conf->mask;
1165         struct rte_flow_item item = {
1166                 .spec = &data,
1167                 .mask = &mask,
1168         };
1169         struct field_modify_info reg_c_x[] = {
1170                 [1] = {0, 0, 0},
1171         };
1172         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1173
1174         if (reg < 0)
1175                 return reg;
1176         /*
1177          * In datapath code there is no endianness
1178          * coversions for perfromance reasons, all
1179          * pattern conversions are done in rte_flow.
1180          */
1181         if (reg == REG_C_0) {
1182                 struct mlx5_priv *priv = dev->data->dev_private;
1183                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1184                 uint32_t shl_c0;
1185
1186                 assert(msk_c0);
1187 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1188                 shl_c0 = rte_bsf32(msk_c0);
1189 #else
1190                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1191 #endif
1192                 mask <<= shl_c0;
1193                 data <<= shl_c0;
1194                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1195         }
1196         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1197         /* The routine expects parameters in memory as big-endian ones. */
1198         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1199                                              MLX5_MODIFICATION_TYPE_SET, error);
1200 }
1201
1202 /**
1203  * Convert modify-header set IPv4 DSCP action to DV specification.
1204  *
1205  * @param[in,out] resource
1206  *   Pointer to the modify-header resource.
1207  * @param[in] action
1208  *   Pointer to action specification.
1209  * @param[out] error
1210  *   Pointer to the error structure.
1211  *
1212  * @return
1213  *   0 on success, a negative errno value otherwise and rte_errno is set.
1214  */
1215 static int
1216 flow_dv_convert_action_modify_ipv4_dscp
1217                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1218                          const struct rte_flow_action *action,
1219                          struct rte_flow_error *error)
1220 {
1221         const struct rte_flow_action_set_dscp *conf =
1222                 (const struct rte_flow_action_set_dscp *)(action->conf);
1223         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1224         struct rte_flow_item_ipv4 ipv4;
1225         struct rte_flow_item_ipv4 ipv4_mask;
1226
1227         memset(&ipv4, 0, sizeof(ipv4));
1228         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1229         ipv4.hdr.type_of_service = conf->dscp;
1230         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1231         item.spec = &ipv4;
1232         item.mask = &ipv4_mask;
1233         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1234                                              MLX5_MODIFICATION_TYPE_SET, error);
1235 }
1236
1237 /**
1238  * Convert modify-header set IPv6 DSCP action to DV specification.
1239  *
1240  * @param[in,out] resource
1241  *   Pointer to the modify-header resource.
1242  * @param[in] action
1243  *   Pointer to action specification.
1244  * @param[out] error
1245  *   Pointer to the error structure.
1246  *
1247  * @return
1248  *   0 on success, a negative errno value otherwise and rte_errno is set.
1249  */
1250 static int
1251 flow_dv_convert_action_modify_ipv6_dscp
1252                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1253                          const struct rte_flow_action *action,
1254                          struct rte_flow_error *error)
1255 {
1256         const struct rte_flow_action_set_dscp *conf =
1257                 (const struct rte_flow_action_set_dscp *)(action->conf);
1258         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1259         struct rte_flow_item_ipv6 ipv6;
1260         struct rte_flow_item_ipv6 ipv6_mask;
1261
1262         memset(&ipv6, 0, sizeof(ipv6));
1263         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1264         /*
1265          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1266          * rdma-core only accept the DSCP bits byte aligned start from
1267          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1268          * bits in IPv6 case as rdma-core requires byte aligned value.
1269          */
1270         ipv6.hdr.vtc_flow = conf->dscp;
1271         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1272         item.spec = &ipv6;
1273         item.mask = &ipv6_mask;
1274         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1275                                              MLX5_MODIFICATION_TYPE_SET, error);
1276 }
1277
1278 /**
1279  * Validate MARK item.
1280  *
1281  * @param[in] dev
1282  *   Pointer to the rte_eth_dev structure.
1283  * @param[in] item
1284  *   Item specification.
1285  * @param[in] attr
1286  *   Attributes of flow that includes this item.
1287  * @param[out] error
1288  *   Pointer to error structure.
1289  *
1290  * @return
1291  *   0 on success, a negative errno value otherwise and rte_errno is set.
1292  */
1293 static int
1294 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1295                            const struct rte_flow_item *item,
1296                            const struct rte_flow_attr *attr __rte_unused,
1297                            struct rte_flow_error *error)
1298 {
1299         struct mlx5_priv *priv = dev->data->dev_private;
1300         struct mlx5_dev_config *config = &priv->config;
1301         const struct rte_flow_item_mark *spec = item->spec;
1302         const struct rte_flow_item_mark *mask = item->mask;
1303         const struct rte_flow_item_mark nic_mask = {
1304                 .id = priv->sh->dv_mark_mask,
1305         };
1306         int ret;
1307
1308         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1309                 return rte_flow_error_set(error, ENOTSUP,
1310                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1311                                           "extended metadata feature"
1312                                           " isn't enabled");
1313         if (!mlx5_flow_ext_mreg_supported(dev))
1314                 return rte_flow_error_set(error, ENOTSUP,
1315                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1316                                           "extended metadata register"
1317                                           " isn't supported");
1318         if (!nic_mask.id)
1319                 return rte_flow_error_set(error, ENOTSUP,
1320                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1321                                           "extended metadata register"
1322                                           " isn't available");
1323         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1324         if (ret < 0)
1325                 return ret;
1326         if (!spec)
1327                 return rte_flow_error_set(error, EINVAL,
1328                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1329                                           item->spec,
1330                                           "data cannot be empty");
1331         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1332                 return rte_flow_error_set(error, EINVAL,
1333                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1334                                           &spec->id,
1335                                           "mark id exceeds the limit");
1336         if (!mask)
1337                 mask = &nic_mask;
1338         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1339                                         (const uint8_t *)&nic_mask,
1340                                         sizeof(struct rte_flow_item_mark),
1341                                         error);
1342         if (ret < 0)
1343                 return ret;
1344         return 0;
1345 }
1346
1347 /**
1348  * Validate META item.
1349  *
1350  * @param[in] dev
1351  *   Pointer to the rte_eth_dev structure.
1352  * @param[in] item
1353  *   Item specification.
1354  * @param[in] attr
1355  *   Attributes of flow that includes this item.
1356  * @param[out] error
1357  *   Pointer to error structure.
1358  *
1359  * @return
1360  *   0 on success, a negative errno value otherwise and rte_errno is set.
1361  */
1362 static int
1363 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1364                            const struct rte_flow_item *item,
1365                            const struct rte_flow_attr *attr,
1366                            struct rte_flow_error *error)
1367 {
1368         struct mlx5_priv *priv = dev->data->dev_private;
1369         struct mlx5_dev_config *config = &priv->config;
1370         const struct rte_flow_item_meta *spec = item->spec;
1371         const struct rte_flow_item_meta *mask = item->mask;
1372         struct rte_flow_item_meta nic_mask = {
1373                 .data = UINT32_MAX
1374         };
1375         int reg;
1376         int ret;
1377
1378         if (!spec)
1379                 return rte_flow_error_set(error, EINVAL,
1380                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1381                                           item->spec,
1382                                           "data cannot be empty");
1383         if (!spec->data)
1384                 return rte_flow_error_set(error, EINVAL,
1385                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1386                                           "data cannot be zero");
1387         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1388                 if (!mlx5_flow_ext_mreg_supported(dev))
1389                         return rte_flow_error_set(error, ENOTSUP,
1390                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1391                                           "extended metadata register"
1392                                           " isn't supported");
1393                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1394                 if (reg < 0)
1395                         return reg;
1396                 if (reg == REG_B)
1397                         return rte_flow_error_set(error, ENOTSUP,
1398                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1399                                           "match on reg_b "
1400                                           "isn't supported");
1401                 if (reg != REG_A)
1402                         nic_mask.data = priv->sh->dv_meta_mask;
1403         }
1404         if (!mask)
1405                 mask = &rte_flow_item_meta_mask;
1406         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1407                                         (const uint8_t *)&nic_mask,
1408                                         sizeof(struct rte_flow_item_meta),
1409                                         error);
1410         return ret;
1411 }
1412
1413 /**
1414  * Validate TAG item.
1415  *
1416  * @param[in] dev
1417  *   Pointer to the rte_eth_dev structure.
1418  * @param[in] item
1419  *   Item specification.
1420  * @param[in] attr
1421  *   Attributes of flow that includes this item.
1422  * @param[out] error
1423  *   Pointer to error structure.
1424  *
1425  * @return
1426  *   0 on success, a negative errno value otherwise and rte_errno is set.
1427  */
1428 static int
1429 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1430                           const struct rte_flow_item *item,
1431                           const struct rte_flow_attr *attr __rte_unused,
1432                           struct rte_flow_error *error)
1433 {
1434         const struct rte_flow_item_tag *spec = item->spec;
1435         const struct rte_flow_item_tag *mask = item->mask;
1436         const struct rte_flow_item_tag nic_mask = {
1437                 .data = RTE_BE32(UINT32_MAX),
1438                 .index = 0xff,
1439         };
1440         int ret;
1441
1442         if (!mlx5_flow_ext_mreg_supported(dev))
1443                 return rte_flow_error_set(error, ENOTSUP,
1444                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1445                                           "extensive metadata register"
1446                                           " isn't supported");
1447         if (!spec)
1448                 return rte_flow_error_set(error, EINVAL,
1449                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1450                                           item->spec,
1451                                           "data cannot be empty");
1452         if (!mask)
1453                 mask = &rte_flow_item_tag_mask;
1454         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1455                                         (const uint8_t *)&nic_mask,
1456                                         sizeof(struct rte_flow_item_tag),
1457                                         error);
1458         if (ret < 0)
1459                 return ret;
1460         if (mask->index != 0xff)
1461                 return rte_flow_error_set(error, EINVAL,
1462                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1463                                           "partial mask for tag index"
1464                                           " is not supported");
1465         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1466         if (ret < 0)
1467                 return ret;
1468         assert(ret != REG_NONE);
1469         return 0;
1470 }
1471
1472 /**
1473  * Validate vport item.
1474  *
1475  * @param[in] dev
1476  *   Pointer to the rte_eth_dev structure.
1477  * @param[in] item
1478  *   Item specification.
1479  * @param[in] attr
1480  *   Attributes of flow that includes this item.
1481  * @param[in] item_flags
1482  *   Bit-fields that holds the items detected until now.
1483  * @param[out] error
1484  *   Pointer to error structure.
1485  *
1486  * @return
1487  *   0 on success, a negative errno value otherwise and rte_errno is set.
1488  */
1489 static int
1490 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1491                               const struct rte_flow_item *item,
1492                               const struct rte_flow_attr *attr,
1493                               uint64_t item_flags,
1494                               struct rte_flow_error *error)
1495 {
1496         const struct rte_flow_item_port_id *spec = item->spec;
1497         const struct rte_flow_item_port_id *mask = item->mask;
1498         const struct rte_flow_item_port_id switch_mask = {
1499                         .id = 0xffffffff,
1500         };
1501         struct mlx5_priv *esw_priv;
1502         struct mlx5_priv *dev_priv;
1503         int ret;
1504
1505         if (!attr->transfer)
1506                 return rte_flow_error_set(error, EINVAL,
1507                                           RTE_FLOW_ERROR_TYPE_ITEM,
1508                                           NULL,
1509                                           "match on port id is valid only"
1510                                           " when transfer flag is enabled");
1511         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1512                 return rte_flow_error_set(error, ENOTSUP,
1513                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1514                                           "multiple source ports are not"
1515                                           " supported");
1516         if (!mask)
1517                 mask = &switch_mask;
1518         if (mask->id != 0xffffffff)
1519                 return rte_flow_error_set(error, ENOTSUP,
1520                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1521                                            mask,
1522                                            "no support for partial mask on"
1523                                            " \"id\" field");
1524         ret = mlx5_flow_item_acceptable
1525                                 (item, (const uint8_t *)mask,
1526                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1527                                  sizeof(struct rte_flow_item_port_id),
1528                                  error);
1529         if (ret)
1530                 return ret;
1531         if (!spec)
1532                 return 0;
1533         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1534         if (!esw_priv)
1535                 return rte_flow_error_set(error, rte_errno,
1536                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1537                                           "failed to obtain E-Switch info for"
1538                                           " port");
1539         dev_priv = mlx5_dev_to_eswitch_info(dev);
1540         if (!dev_priv)
1541                 return rte_flow_error_set(error, rte_errno,
1542                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1543                                           NULL,
1544                                           "failed to obtain E-Switch info");
1545         if (esw_priv->domain_id != dev_priv->domain_id)
1546                 return rte_flow_error_set(error, EINVAL,
1547                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1548                                           "cannot match on a port from a"
1549                                           " different E-Switch");
1550         return 0;
1551 }
1552
1553 /**
1554  * Validate GTP item.
1555  *
1556  * @param[in] dev
1557  *   Pointer to the rte_eth_dev structure.
1558  * @param[in] item
1559  *   Item specification.
1560  * @param[in] item_flags
1561  *   Bit-fields that holds the items detected until now.
1562  * @param[out] error
1563  *   Pointer to error structure.
1564  *
1565  * @return
1566  *   0 on success, a negative errno value otherwise and rte_errno is set.
1567  */
1568 static int
1569 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1570                           const struct rte_flow_item *item,
1571                           uint64_t item_flags,
1572                           struct rte_flow_error *error)
1573 {
1574         struct mlx5_priv *priv = dev->data->dev_private;
1575         const struct rte_flow_item_gtp *mask = item->mask;
1576         const struct rte_flow_item_gtp nic_mask = {
1577                 .msg_type = 0xff,
1578                 .teid = RTE_BE32(0xffffffff),
1579         };
1580
1581         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1582                 return rte_flow_error_set(error, ENOTSUP,
1583                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1584                                           "GTP support is not enabled");
1585         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1586                 return rte_flow_error_set(error, ENOTSUP,
1587                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1588                                           "multiple tunnel layers not"
1589                                           " supported");
1590         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1591                 return rte_flow_error_set(error, EINVAL,
1592                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1593                                           "no outer UDP layer found");
1594         if (!mask)
1595                 mask = &rte_flow_item_gtp_mask;
1596         return mlx5_flow_item_acceptable
1597                 (item, (const uint8_t *)mask,
1598                  (const uint8_t *)&nic_mask,
1599                  sizeof(struct rte_flow_item_gtp),
1600                  error);
1601 }
1602
1603 /**
1604  * Validate the pop VLAN action.
1605  *
1606  * @param[in] dev
1607  *   Pointer to the rte_eth_dev structure.
1608  * @param[in] action_flags
1609  *   Holds the actions detected until now.
1610  * @param[in] action
1611  *   Pointer to the pop vlan action.
1612  * @param[in] item_flags
1613  *   The items found in this flow rule.
1614  * @param[in] attr
1615  *   Pointer to flow attributes.
1616  * @param[out] error
1617  *   Pointer to error structure.
1618  *
1619  * @return
1620  *   0 on success, a negative errno value otherwise and rte_errno is set.
1621  */
1622 static int
1623 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1624                                  uint64_t action_flags,
1625                                  const struct rte_flow_action *action,
1626                                  uint64_t item_flags,
1627                                  const struct rte_flow_attr *attr,
1628                                  struct rte_flow_error *error)
1629 {
1630         struct mlx5_priv *priv = dev->data->dev_private;
1631
1632         (void)action;
1633         (void)attr;
1634         if (!priv->sh->pop_vlan_action)
1635                 return rte_flow_error_set(error, ENOTSUP,
1636                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1637                                           NULL,
1638                                           "pop vlan action is not supported");
1639         if (attr->egress)
1640                 return rte_flow_error_set(error, ENOTSUP,
1641                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1642                                           NULL,
1643                                           "pop vlan action not supported for "
1644                                           "egress");
1645         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1646                 return rte_flow_error_set(error, ENOTSUP,
1647                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1648                                           "no support for multiple VLAN "
1649                                           "actions");
1650         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1651                 return rte_flow_error_set(error, ENOTSUP,
1652                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1653                                           NULL,
1654                                           "cannot pop vlan without a "
1655                                           "match on (outer) vlan in the flow");
1656         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1657                 return rte_flow_error_set(error, EINVAL,
1658                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1659                                           "wrong action order, port_id should "
1660                                           "be after pop VLAN action");
1661         return 0;
1662 }
1663
1664 /**
1665  * Get VLAN default info from vlan match info.
1666  *
1667  * @param[in] items
1668  *   the list of item specifications.
1669  * @param[out] vlan
1670  *   pointer VLAN info to fill to.
1671  *
1672  * @return
1673  *   0 on success, a negative errno value otherwise and rte_errno is set.
1674  */
1675 static void
1676 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1677                                   struct rte_vlan_hdr *vlan)
1678 {
1679         const struct rte_flow_item_vlan nic_mask = {
1680                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1681                                 MLX5DV_FLOW_VLAN_VID_MASK),
1682                 .inner_type = RTE_BE16(0xffff),
1683         };
1684
1685         if (items == NULL)
1686                 return;
1687         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1688                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1689                 ;
1690         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1691                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1692                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1693
1694                 if (!vlan_m)
1695                         vlan_m = &nic_mask;
1696                 /* Only full match values are accepted */
1697                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1698                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1699                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1700                         vlan->vlan_tci |=
1701                                 rte_be_to_cpu_16(vlan_v->tci &
1702                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1703                 }
1704                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1705                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1706                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1707                         vlan->vlan_tci |=
1708                                 rte_be_to_cpu_16(vlan_v->tci &
1709                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1710                 }
1711                 if (vlan_m->inner_type == nic_mask.inner_type)
1712                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1713                                                            vlan_m->inner_type);
1714         }
1715 }
1716
1717 /**
1718  * Validate the push VLAN action.
1719  *
1720  * @param[in] action_flags
1721  *   Holds the actions detected until now.
1722  * @param[in] item_flags
1723  *   The items found in this flow rule.
1724  * @param[in] action
1725  *   Pointer to the action structure.
1726  * @param[in] attr
1727  *   Pointer to flow attributes
1728  * @param[out] error
1729  *   Pointer to error structure.
1730  *
1731  * @return
1732  *   0 on success, a negative errno value otherwise and rte_errno is set.
1733  */
1734 static int
1735 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1736                                   uint64_t item_flags __rte_unused,
1737                                   const struct rte_flow_action *action,
1738                                   const struct rte_flow_attr *attr,
1739                                   struct rte_flow_error *error)
1740 {
1741         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1742
1743         if (attr->ingress)
1744                 return rte_flow_error_set(error, ENOTSUP,
1745                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1746                                           NULL,
1747                                           "push VLAN action not supported for "
1748                                           "ingress");
1749         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1750             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1751                 return rte_flow_error_set(error, EINVAL,
1752                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1753                                           "invalid vlan ethertype");
1754         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1755                 return rte_flow_error_set(error, ENOTSUP,
1756                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1757                                           "no support for multiple VLAN "
1758                                           "actions");
1759         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1760                 return rte_flow_error_set(error, EINVAL,
1761                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1762                                           "wrong action order, port_id should "
1763                                           "be after push VLAN");
1764         (void)attr;
1765         return 0;
1766 }
1767
1768 /**
1769  * Validate the set VLAN PCP.
1770  *
1771  * @param[in] action_flags
1772  *   Holds the actions detected until now.
1773  * @param[in] actions
1774  *   Pointer to the list of actions remaining in the flow rule.
1775  * @param[out] error
1776  *   Pointer to error structure.
1777  *
1778  * @return
1779  *   0 on success, a negative errno value otherwise and rte_errno is set.
1780  */
1781 static int
1782 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1783                                      const struct rte_flow_action actions[],
1784                                      struct rte_flow_error *error)
1785 {
1786         const struct rte_flow_action *action = actions;
1787         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1788
1789         if (conf->vlan_pcp > 7)
1790                 return rte_flow_error_set(error, EINVAL,
1791                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1792                                           "VLAN PCP value is too big");
1793         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1794                 return rte_flow_error_set(error, ENOTSUP,
1795                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1796                                           "set VLAN PCP action must follow "
1797                                           "the push VLAN action");
1798         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1799                 return rte_flow_error_set(error, ENOTSUP,
1800                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1801                                           "Multiple VLAN PCP modification are "
1802                                           "not supported");
1803         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1804                 return rte_flow_error_set(error, EINVAL,
1805                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1806                                           "wrong action order, port_id should "
1807                                           "be after set VLAN PCP");
1808         return 0;
1809 }
1810
1811 /**
1812  * Validate the set VLAN VID.
1813  *
1814  * @param[in] item_flags
1815  *   Holds the items detected in this rule.
1816  * @param[in] action_flags
1817  *   Holds the actions detected until now.
1818  * @param[in] actions
1819  *   Pointer to the list of actions remaining in the flow rule.
1820  * @param[out] error
1821  *   Pointer to error structure.
1822  *
1823  * @return
1824  *   0 on success, a negative errno value otherwise and rte_errno is set.
1825  */
1826 static int
1827 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1828                                      uint64_t action_flags,
1829                                      const struct rte_flow_action actions[],
1830                                      struct rte_flow_error *error)
1831 {
1832         const struct rte_flow_action *action = actions;
1833         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1834
1835         if (conf->vlan_vid > RTE_BE16(0xFFE))
1836                 return rte_flow_error_set(error, EINVAL,
1837                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1838                                           "VLAN VID value is too big");
1839         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1840             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1841                 return rte_flow_error_set(error, ENOTSUP,
1842                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1843                                           "set VLAN VID action must follow push"
1844                                           " VLAN action or match on VLAN item");
1845         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1846                 return rte_flow_error_set(error, ENOTSUP,
1847                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1848                                           "Multiple VLAN VID modifications are "
1849                                           "not supported");
1850         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1851                 return rte_flow_error_set(error, EINVAL,
1852                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1853                                           "wrong action order, port_id should "
1854                                           "be after set VLAN VID");
1855         return 0;
1856 }
1857
1858 /*
1859  * Validate the FLAG action.
1860  *
1861  * @param[in] dev
1862  *   Pointer to the rte_eth_dev structure.
1863  * @param[in] action_flags
1864  *   Holds the actions detected until now.
1865  * @param[in] attr
1866  *   Pointer to flow attributes
1867  * @param[out] error
1868  *   Pointer to error structure.
1869  *
1870  * @return
1871  *   0 on success, a negative errno value otherwise and rte_errno is set.
1872  */
1873 static int
1874 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1875                              uint64_t action_flags,
1876                              const struct rte_flow_attr *attr,
1877                              struct rte_flow_error *error)
1878 {
1879         struct mlx5_priv *priv = dev->data->dev_private;
1880         struct mlx5_dev_config *config = &priv->config;
1881         int ret;
1882
1883         /* Fall back if no extended metadata register support. */
1884         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1885                 return mlx5_flow_validate_action_flag(action_flags, attr,
1886                                                       error);
1887         /* Extensive metadata mode requires registers. */
1888         if (!mlx5_flow_ext_mreg_supported(dev))
1889                 return rte_flow_error_set(error, ENOTSUP,
1890                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1891                                           "no metadata registers "
1892                                           "to support flag action");
1893         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1894                 return rte_flow_error_set(error, ENOTSUP,
1895                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1896                                           "extended metadata register"
1897                                           " isn't available");
1898         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1899         if (ret < 0)
1900                 return ret;
1901         assert(ret > 0);
1902         if (action_flags & MLX5_FLOW_ACTION_MARK)
1903                 return rte_flow_error_set(error, EINVAL,
1904                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1905                                           "can't mark and flag in same flow");
1906         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1907                 return rte_flow_error_set(error, EINVAL,
1908                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1909                                           "can't have 2 flag"
1910                                           " actions in same flow");
1911         return 0;
1912 }
1913
1914 /**
1915  * Validate MARK action.
1916  *
1917  * @param[in] dev
1918  *   Pointer to the rte_eth_dev structure.
1919  * @param[in] action
1920  *   Pointer to action.
1921  * @param[in] action_flags
1922  *   Holds the actions detected until now.
1923  * @param[in] attr
1924  *   Pointer to flow attributes
1925  * @param[out] error
1926  *   Pointer to error structure.
1927  *
1928  * @return
1929  *   0 on success, a negative errno value otherwise and rte_errno is set.
1930  */
1931 static int
1932 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1933                              const struct rte_flow_action *action,
1934                              uint64_t action_flags,
1935                              const struct rte_flow_attr *attr,
1936                              struct rte_flow_error *error)
1937 {
1938         struct mlx5_priv *priv = dev->data->dev_private;
1939         struct mlx5_dev_config *config = &priv->config;
1940         const struct rte_flow_action_mark *mark = action->conf;
1941         int ret;
1942
1943         /* Fall back if no extended metadata register support. */
1944         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1945                 return mlx5_flow_validate_action_mark(action, action_flags,
1946                                                       attr, error);
1947         /* Extensive metadata mode requires registers. */
1948         if (!mlx5_flow_ext_mreg_supported(dev))
1949                 return rte_flow_error_set(error, ENOTSUP,
1950                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1951                                           "no metadata registers "
1952                                           "to support mark action");
1953         if (!priv->sh->dv_mark_mask)
1954                 return rte_flow_error_set(error, ENOTSUP,
1955                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1956                                           "extended metadata register"
1957                                           " isn't available");
1958         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1959         if (ret < 0)
1960                 return ret;
1961         assert(ret > 0);
1962         if (!mark)
1963                 return rte_flow_error_set(error, EINVAL,
1964                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1965                                           "configuration cannot be null");
1966         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1967                 return rte_flow_error_set(error, EINVAL,
1968                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1969                                           &mark->id,
1970                                           "mark id exceeds the limit");
1971         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1972                 return rte_flow_error_set(error, EINVAL,
1973                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1974                                           "can't flag and mark in same flow");
1975         if (action_flags & MLX5_FLOW_ACTION_MARK)
1976                 return rte_flow_error_set(error, EINVAL,
1977                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1978                                           "can't have 2 mark actions in same"
1979                                           " flow");
1980         return 0;
1981 }
1982
1983 /**
1984  * Validate SET_META action.
1985  *
1986  * @param[in] dev
1987  *   Pointer to the rte_eth_dev structure.
1988  * @param[in] action
1989  *   Pointer to the action structure.
1990  * @param[in] action_flags
1991  *   Holds the actions detected until now.
1992  * @param[in] attr
1993  *   Pointer to flow attributes
1994  * @param[out] error
1995  *   Pointer to error structure.
1996  *
1997  * @return
1998  *   0 on success, a negative errno value otherwise and rte_errno is set.
1999  */
2000 static int
2001 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2002                                  const struct rte_flow_action *action,
2003                                  uint64_t action_flags __rte_unused,
2004                                  const struct rte_flow_attr *attr,
2005                                  struct rte_flow_error *error)
2006 {
2007         const struct rte_flow_action_set_meta *conf;
2008         uint32_t nic_mask = UINT32_MAX;
2009         int reg;
2010
2011         if (!mlx5_flow_ext_mreg_supported(dev))
2012                 return rte_flow_error_set(error, ENOTSUP,
2013                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2014                                           "extended metadata register"
2015                                           " isn't supported");
2016         reg = flow_dv_get_metadata_reg(dev, attr, error);
2017         if (reg < 0)
2018                 return reg;
2019         if (reg != REG_A && reg != REG_B) {
2020                 struct mlx5_priv *priv = dev->data->dev_private;
2021
2022                 nic_mask = priv->sh->dv_meta_mask;
2023         }
2024         if (!(action->conf))
2025                 return rte_flow_error_set(error, EINVAL,
2026                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2027                                           "configuration cannot be null");
2028         conf = (const struct rte_flow_action_set_meta *)action->conf;
2029         if (!conf->mask)
2030                 return rte_flow_error_set(error, EINVAL,
2031                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2032                                           "zero mask doesn't have any effect");
2033         if (conf->mask & ~nic_mask)
2034                 return rte_flow_error_set(error, EINVAL,
2035                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2036                                           "meta data must be within reg C0");
2037         if (!(conf->data & conf->mask))
2038                 return rte_flow_error_set(error, EINVAL,
2039                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2040                                           "zero value has no effect");
2041         return 0;
2042 }
2043
2044 /**
2045  * Validate SET_TAG action.
2046  *
2047  * @param[in] dev
2048  *   Pointer to the rte_eth_dev structure.
2049  * @param[in] action
2050  *   Pointer to the action structure.
2051  * @param[in] action_flags
2052  *   Holds the actions detected until now.
2053  * @param[in] attr
2054  *   Pointer to flow attributes
2055  * @param[out] error
2056  *   Pointer to error structure.
2057  *
2058  * @return
2059  *   0 on success, a negative errno value otherwise and rte_errno is set.
2060  */
2061 static int
2062 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2063                                 const struct rte_flow_action *action,
2064                                 uint64_t action_flags,
2065                                 const struct rte_flow_attr *attr,
2066                                 struct rte_flow_error *error)
2067 {
2068         const struct rte_flow_action_set_tag *conf;
2069         const uint64_t terminal_action_flags =
2070                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2071                 MLX5_FLOW_ACTION_RSS;
2072         int ret;
2073
2074         if (!mlx5_flow_ext_mreg_supported(dev))
2075                 return rte_flow_error_set(error, ENOTSUP,
2076                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2077                                           "extensive metadata register"
2078                                           " isn't supported");
2079         if (!(action->conf))
2080                 return rte_flow_error_set(error, EINVAL,
2081                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2082                                           "configuration cannot be null");
2083         conf = (const struct rte_flow_action_set_tag *)action->conf;
2084         if (!conf->mask)
2085                 return rte_flow_error_set(error, EINVAL,
2086                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2087                                           "zero mask doesn't have any effect");
2088         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2089         if (ret < 0)
2090                 return ret;
2091         if (!attr->transfer && attr->ingress &&
2092             (action_flags & terminal_action_flags))
2093                 return rte_flow_error_set(error, EINVAL,
2094                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2095                                           "set_tag has no effect"
2096                                           " with terminal actions");
2097         return 0;
2098 }
2099
2100 /**
2101  * Validate count action.
2102  *
2103  * @param[in] dev
2104  *   Pointer to rte_eth_dev structure.
2105  * @param[out] error
2106  *   Pointer to error structure.
2107  *
2108  * @return
2109  *   0 on success, a negative errno value otherwise and rte_errno is set.
2110  */
2111 static int
2112 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2113                               struct rte_flow_error *error)
2114 {
2115         struct mlx5_priv *priv = dev->data->dev_private;
2116
2117         if (!priv->config.devx)
2118                 goto notsup_err;
2119 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2120         return 0;
2121 #endif
2122 notsup_err:
2123         return rte_flow_error_set
2124                       (error, ENOTSUP,
2125                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2126                        NULL,
2127                        "count action not supported");
2128 }
2129
2130 /**
2131  * Validate the L2 encap action.
2132  *
2133  * @param[in] action_flags
2134  *   Holds the actions detected until now.
2135  * @param[in] action
2136  *   Pointer to the action structure.
2137  * @param[in] attr
2138  *   Pointer to flow attributes
2139  * @param[out] error
2140  *   Pointer to error structure.
2141  *
2142  * @return
2143  *   0 on success, a negative errno value otherwise and rte_errno is set.
2144  */
2145 static int
2146 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2147                                  const struct rte_flow_action *action,
2148                                  const struct rte_flow_attr *attr,
2149                                  struct rte_flow_error *error)
2150 {
2151         if (!(action->conf))
2152                 return rte_flow_error_set(error, EINVAL,
2153                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2154                                           "configuration cannot be null");
2155         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2156                 return rte_flow_error_set(error, EINVAL,
2157                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2158                                           "can only have a single encap or"
2159                                           " decap action in a flow");
2160         if (!attr->transfer && attr->ingress)
2161                 return rte_flow_error_set(error, ENOTSUP,
2162                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2163                                           NULL,
2164                                           "encap action not supported for "
2165                                           "ingress");
2166         return 0;
2167 }
2168
2169 /**
2170  * Validate the L2 decap action.
2171  *
2172  * @param[in] action_flags
2173  *   Holds the actions detected until now.
2174  * @param[in] attr
2175  *   Pointer to flow attributes
2176  * @param[out] error
2177  *   Pointer to error structure.
2178  *
2179  * @return
2180  *   0 on success, a negative errno value otherwise and rte_errno is set.
2181  */
2182 static int
2183 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2184                                  const struct rte_flow_attr *attr,
2185                                  struct rte_flow_error *error)
2186 {
2187         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2188                 return rte_flow_error_set(error, EINVAL,
2189                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2190                                           "can only have a single encap or"
2191                                           " decap action in a flow");
2192         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2193                 return rte_flow_error_set(error, EINVAL,
2194                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2195                                           "can't have decap action after"
2196                                           " modify action");
2197         if (attr->egress)
2198                 return rte_flow_error_set(error, ENOTSUP,
2199                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2200                                           NULL,
2201                                           "decap action not supported for "
2202                                           "egress");
2203         return 0;
2204 }
2205
2206 /**
2207  * Validate the raw encap action.
2208  *
2209  * @param[in] action_flags
2210  *   Holds the actions detected until now.
2211  * @param[in] action
2212  *   Pointer to the encap action.
2213  * @param[in] attr
2214  *   Pointer to flow attributes
2215  * @param[out] error
2216  *   Pointer to error structure.
2217  *
2218  * @return
2219  *   0 on success, a negative errno value otherwise and rte_errno is set.
2220  */
2221 static int
2222 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2223                                   const struct rte_flow_action *action,
2224                                   const struct rte_flow_attr *attr,
2225                                   struct rte_flow_error *error)
2226 {
2227         const struct rte_flow_action_raw_encap *raw_encap =
2228                 (const struct rte_flow_action_raw_encap *)action->conf;
2229         if (!(action->conf))
2230                 return rte_flow_error_set(error, EINVAL,
2231                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2232                                           "configuration cannot be null");
2233         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2234                 return rte_flow_error_set(error, EINVAL,
2235                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2236                                           "can only have a single encap"
2237                                           " action in a flow");
2238         /* encap without preceding decap is not supported for ingress */
2239         if (!attr->transfer &&  attr->ingress &&
2240             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2241                 return rte_flow_error_set(error, ENOTSUP,
2242                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2243                                           NULL,
2244                                           "encap action not supported for "
2245                                           "ingress");
2246         if (!raw_encap->size || !raw_encap->data)
2247                 return rte_flow_error_set(error, EINVAL,
2248                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2249                                           "raw encap data cannot be empty");
2250         return 0;
2251 }
2252
2253 /**
2254  * Validate the raw decap action.
2255  *
2256  * @param[in] action_flags
2257  *   Holds the actions detected until now.
2258  * @param[in] action
2259  *   Pointer to the encap action.
2260  * @param[in] attr
2261  *   Pointer to flow attributes
2262  * @param[out] error
2263  *   Pointer to error structure.
2264  *
2265  * @return
2266  *   0 on success, a negative errno value otherwise and rte_errno is set.
2267  */
2268 static int
2269 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2270                                   const struct rte_flow_action *action,
2271                                   const struct rte_flow_attr *attr,
2272                                   struct rte_flow_error *error)
2273 {
2274         const struct rte_flow_action_raw_decap *decap   = action->conf;
2275
2276         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2277                 return rte_flow_error_set(error, EINVAL,
2278                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2279                                           "can't have encap action before"
2280                                           " decap action");
2281         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2282                 return rte_flow_error_set(error, EINVAL,
2283                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2284                                           "can only have a single decap"
2285                                           " action in a flow");
2286         /* decap action is valid on egress only if it is followed by encap */
2287         if (attr->egress && decap &&
2288             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2289                 return rte_flow_error_set(error, ENOTSUP,
2290                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2291                                           NULL, "decap action not supported"
2292                                           " for egress");
2293         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2294                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2295                 return rte_flow_error_set(error, EINVAL,
2296                                           RTE_FLOW_ERROR_TYPE_ACTION,
2297                                           NULL,
2298                                           "can't have decap action "
2299                                           "after modify action");
2300         }
2301         return 0;
2302 }
2303
2304 /**
2305  * Find existing encap/decap resource or create and register a new one.
2306  *
2307  * @param[in, out] dev
2308  *   Pointer to rte_eth_dev structure.
2309  * @param[in, out] resource
2310  *   Pointer to encap/decap resource.
2311  * @parm[in, out] dev_flow
2312  *   Pointer to the dev_flow.
2313  * @param[out] error
2314  *   pointer to error structure.
2315  *
2316  * @return
2317  *   0 on success otherwise -errno and errno is set.
2318  */
2319 static int
2320 flow_dv_encap_decap_resource_register
2321                         (struct rte_eth_dev *dev,
2322                          struct mlx5_flow_dv_encap_decap_resource *resource,
2323                          struct mlx5_flow *dev_flow,
2324                          struct rte_flow_error *error)
2325 {
2326         struct mlx5_priv *priv = dev->data->dev_private;
2327         struct mlx5_ibv_shared *sh = priv->sh;
2328         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2329         struct mlx5dv_dr_domain *domain;
2330
2331         resource->flags = dev_flow->group ? 0 : 1;
2332         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2333                 domain = sh->fdb_domain;
2334         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2335                 domain = sh->rx_domain;
2336         else
2337                 domain = sh->tx_domain;
2338         /* Lookup a matching resource from cache. */
2339         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2340                 if (resource->reformat_type == cache_resource->reformat_type &&
2341                     resource->ft_type == cache_resource->ft_type &&
2342                     resource->flags == cache_resource->flags &&
2343                     resource->size == cache_resource->size &&
2344                     !memcmp((const void *)resource->buf,
2345                             (const void *)cache_resource->buf,
2346                             resource->size)) {
2347                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2348                                 (void *)cache_resource,
2349                                 rte_atomic32_read(&cache_resource->refcnt));
2350                         rte_atomic32_inc(&cache_resource->refcnt);
2351                         dev_flow->dv.encap_decap = cache_resource;
2352                         return 0;
2353                 }
2354         }
2355         /* Register new encap/decap resource. */
2356         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2357         if (!cache_resource)
2358                 return rte_flow_error_set(error, ENOMEM,
2359                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2360                                           "cannot allocate resource memory");
2361         *cache_resource = *resource;
2362         cache_resource->verbs_action =
2363                 mlx5_glue->dv_create_flow_action_packet_reformat
2364                         (sh->ctx, cache_resource->reformat_type,
2365                          cache_resource->ft_type, domain, cache_resource->flags,
2366                          cache_resource->size,
2367                          (cache_resource->size ? cache_resource->buf : NULL));
2368         if (!cache_resource->verbs_action) {
2369                 rte_free(cache_resource);
2370                 return rte_flow_error_set(error, ENOMEM,
2371                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2372                                           NULL, "cannot create action");
2373         }
2374         rte_atomic32_init(&cache_resource->refcnt);
2375         rte_atomic32_inc(&cache_resource->refcnt);
2376         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2377         dev_flow->dv.encap_decap = cache_resource;
2378         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2379                 (void *)cache_resource,
2380                 rte_atomic32_read(&cache_resource->refcnt));
2381         return 0;
2382 }
2383
2384 /**
2385  * Find existing table jump resource or create and register a new one.
2386  *
2387  * @param[in, out] dev
2388  *   Pointer to rte_eth_dev structure.
2389  * @param[in, out] tbl
2390  *   Pointer to flow table resource.
2391  * @parm[in, out] dev_flow
2392  *   Pointer to the dev_flow.
2393  * @param[out] error
2394  *   pointer to error structure.
2395  *
2396  * @return
2397  *   0 on success otherwise -errno and errno is set.
2398  */
2399 static int
2400 flow_dv_jump_tbl_resource_register
2401                         (struct rte_eth_dev *dev __rte_unused,
2402                          struct mlx5_flow_tbl_resource *tbl,
2403                          struct mlx5_flow *dev_flow,
2404                          struct rte_flow_error *error)
2405 {
2406         struct mlx5_flow_tbl_data_entry *tbl_data =
2407                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2408         int cnt;
2409
2410         assert(tbl);
2411         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2412         if (!cnt) {
2413                 tbl_data->jump.action =
2414                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2415                         (tbl->obj);
2416                 if (!tbl_data->jump.action)
2417                         return rte_flow_error_set(error, ENOMEM,
2418                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2419                                         NULL, "cannot create jump action");
2420                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2421                         (void *)&tbl_data->jump, cnt);
2422         } else {
2423                 assert(tbl_data->jump.action);
2424                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2425                         (void *)&tbl_data->jump, cnt);
2426         }
2427         rte_atomic32_inc(&tbl_data->jump.refcnt);
2428         dev_flow->dv.jump = &tbl_data->jump;
2429         return 0;
2430 }
2431
2432 /**
2433  * Find existing table port ID resource or create and register a new one.
2434  *
2435  * @param[in, out] dev
2436  *   Pointer to rte_eth_dev structure.
2437  * @param[in, out] resource
2438  *   Pointer to port ID action resource.
2439  * @parm[in, out] dev_flow
2440  *   Pointer to the dev_flow.
2441  * @param[out] error
2442  *   pointer to error structure.
2443  *
2444  * @return
2445  *   0 on success otherwise -errno and errno is set.
2446  */
2447 static int
2448 flow_dv_port_id_action_resource_register
2449                         (struct rte_eth_dev *dev,
2450                          struct mlx5_flow_dv_port_id_action_resource *resource,
2451                          struct mlx5_flow *dev_flow,
2452                          struct rte_flow_error *error)
2453 {
2454         struct mlx5_priv *priv = dev->data->dev_private;
2455         struct mlx5_ibv_shared *sh = priv->sh;
2456         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2457
2458         /* Lookup a matching resource from cache. */
2459         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2460                 if (resource->port_id == cache_resource->port_id) {
2461                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2462                                 "refcnt %d++",
2463                                 (void *)cache_resource,
2464                                 rte_atomic32_read(&cache_resource->refcnt));
2465                         rte_atomic32_inc(&cache_resource->refcnt);
2466                         dev_flow->dv.port_id_action = cache_resource;
2467                         return 0;
2468                 }
2469         }
2470         /* Register new port id action resource. */
2471         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2472         if (!cache_resource)
2473                 return rte_flow_error_set(error, ENOMEM,
2474                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2475                                           "cannot allocate resource memory");
2476         *cache_resource = *resource;
2477         /*
2478          * Depending on rdma_core version the glue routine calls
2479          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2480          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2481          */
2482         cache_resource->action =
2483                 mlx5_glue->dr_create_flow_action_dest_port
2484                         (priv->sh->fdb_domain, resource->port_id);
2485         if (!cache_resource->action) {
2486                 rte_free(cache_resource);
2487                 return rte_flow_error_set(error, ENOMEM,
2488                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2489                                           NULL, "cannot create action");
2490         }
2491         rte_atomic32_init(&cache_resource->refcnt);
2492         rte_atomic32_inc(&cache_resource->refcnt);
2493         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2494         dev_flow->dv.port_id_action = cache_resource;
2495         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2496                 (void *)cache_resource,
2497                 rte_atomic32_read(&cache_resource->refcnt));
2498         return 0;
2499 }
2500
2501 /**
2502  * Find existing push vlan resource or create and register a new one.
2503  *
2504  * @param [in, out] dev
2505  *   Pointer to rte_eth_dev structure.
2506  * @param[in, out] resource
2507  *   Pointer to port ID action resource.
2508  * @parm[in, out] dev_flow
2509  *   Pointer to the dev_flow.
2510  * @param[out] error
2511  *   pointer to error structure.
2512  *
2513  * @return
2514  *   0 on success otherwise -errno and errno is set.
2515  */
2516 static int
2517 flow_dv_push_vlan_action_resource_register
2518                        (struct rte_eth_dev *dev,
2519                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2520                         struct mlx5_flow *dev_flow,
2521                         struct rte_flow_error *error)
2522 {
2523         struct mlx5_priv *priv = dev->data->dev_private;
2524         struct mlx5_ibv_shared *sh = priv->sh;
2525         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2526         struct mlx5dv_dr_domain *domain;
2527
2528         /* Lookup a matching resource from cache. */
2529         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2530                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2531                     resource->ft_type == cache_resource->ft_type) {
2532                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2533                                 "refcnt %d++",
2534                                 (void *)cache_resource,
2535                                 rte_atomic32_read(&cache_resource->refcnt));
2536                         rte_atomic32_inc(&cache_resource->refcnt);
2537                         dev_flow->dv.push_vlan_res = cache_resource;
2538                         return 0;
2539                 }
2540         }
2541         /* Register new push_vlan action resource. */
2542         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2543         if (!cache_resource)
2544                 return rte_flow_error_set(error, ENOMEM,
2545                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2546                                           "cannot allocate resource memory");
2547         *cache_resource = *resource;
2548         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2549                 domain = sh->fdb_domain;
2550         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2551                 domain = sh->rx_domain;
2552         else
2553                 domain = sh->tx_domain;
2554         cache_resource->action =
2555                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2556                                                            resource->vlan_tag);
2557         if (!cache_resource->action) {
2558                 rte_free(cache_resource);
2559                 return rte_flow_error_set(error, ENOMEM,
2560                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2561                                           NULL, "cannot create action");
2562         }
2563         rte_atomic32_init(&cache_resource->refcnt);
2564         rte_atomic32_inc(&cache_resource->refcnt);
2565         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2566         dev_flow->dv.push_vlan_res = cache_resource;
2567         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2568                 (void *)cache_resource,
2569                 rte_atomic32_read(&cache_resource->refcnt));
2570         return 0;
2571 }
2572 /**
2573  * Get the size of specific rte_flow_item_type
2574  *
2575  * @param[in] item_type
2576  *   Tested rte_flow_item_type.
2577  *
2578  * @return
2579  *   sizeof struct item_type, 0 if void or irrelevant.
2580  */
2581 static size_t
2582 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2583 {
2584         size_t retval;
2585
2586         switch (item_type) {
2587         case RTE_FLOW_ITEM_TYPE_ETH:
2588                 retval = sizeof(struct rte_flow_item_eth);
2589                 break;
2590         case RTE_FLOW_ITEM_TYPE_VLAN:
2591                 retval = sizeof(struct rte_flow_item_vlan);
2592                 break;
2593         case RTE_FLOW_ITEM_TYPE_IPV4:
2594                 retval = sizeof(struct rte_flow_item_ipv4);
2595                 break;
2596         case RTE_FLOW_ITEM_TYPE_IPV6:
2597                 retval = sizeof(struct rte_flow_item_ipv6);
2598                 break;
2599         case RTE_FLOW_ITEM_TYPE_UDP:
2600                 retval = sizeof(struct rte_flow_item_udp);
2601                 break;
2602         case RTE_FLOW_ITEM_TYPE_TCP:
2603                 retval = sizeof(struct rte_flow_item_tcp);
2604                 break;
2605         case RTE_FLOW_ITEM_TYPE_VXLAN:
2606                 retval = sizeof(struct rte_flow_item_vxlan);
2607                 break;
2608         case RTE_FLOW_ITEM_TYPE_GRE:
2609                 retval = sizeof(struct rte_flow_item_gre);
2610                 break;
2611         case RTE_FLOW_ITEM_TYPE_NVGRE:
2612                 retval = sizeof(struct rte_flow_item_nvgre);
2613                 break;
2614         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2615                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2616                 break;
2617         case RTE_FLOW_ITEM_TYPE_MPLS:
2618                 retval = sizeof(struct rte_flow_item_mpls);
2619                 break;
2620         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2621         default:
2622                 retval = 0;
2623                 break;
2624         }
2625         return retval;
2626 }
2627
2628 #define MLX5_ENCAP_IPV4_VERSION         0x40
2629 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2630 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2631 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2632 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2633 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2634 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2635
2636 /**
2637  * Convert the encap action data from list of rte_flow_item to raw buffer
2638  *
2639  * @param[in] items
2640  *   Pointer to rte_flow_item objects list.
2641  * @param[out] buf
2642  *   Pointer to the output buffer.
2643  * @param[out] size
2644  *   Pointer to the output buffer size.
2645  * @param[out] error
2646  *   Pointer to the error structure.
2647  *
2648  * @return
2649  *   0 on success, a negative errno value otherwise and rte_errno is set.
2650  */
2651 static int
2652 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2653                            size_t *size, struct rte_flow_error *error)
2654 {
2655         struct rte_ether_hdr *eth = NULL;
2656         struct rte_vlan_hdr *vlan = NULL;
2657         struct rte_ipv4_hdr *ipv4 = NULL;
2658         struct rte_ipv6_hdr *ipv6 = NULL;
2659         struct rte_udp_hdr *udp = NULL;
2660         struct rte_vxlan_hdr *vxlan = NULL;
2661         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2662         struct rte_gre_hdr *gre = NULL;
2663         size_t len;
2664         size_t temp_size = 0;
2665
2666         if (!items)
2667                 return rte_flow_error_set(error, EINVAL,
2668                                           RTE_FLOW_ERROR_TYPE_ACTION,
2669                                           NULL, "invalid empty data");
2670         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2671                 len = flow_dv_get_item_len(items->type);
2672                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2673                         return rte_flow_error_set(error, EINVAL,
2674                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2675                                                   (void *)items->type,
2676                                                   "items total size is too big"
2677                                                   " for encap action");
2678                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2679                 switch (items->type) {
2680                 case RTE_FLOW_ITEM_TYPE_ETH:
2681                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2682                         break;
2683                 case RTE_FLOW_ITEM_TYPE_VLAN:
2684                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2685                         if (!eth)
2686                                 return rte_flow_error_set(error, EINVAL,
2687                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2688                                                 (void *)items->type,
2689                                                 "eth header not found");
2690                         if (!eth->ether_type)
2691                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2692                         break;
2693                 case RTE_FLOW_ITEM_TYPE_IPV4:
2694                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2695                         if (!vlan && !eth)
2696                                 return rte_flow_error_set(error, EINVAL,
2697                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2698                                                 (void *)items->type,
2699                                                 "neither eth nor vlan"
2700                                                 " header found");
2701                         if (vlan && !vlan->eth_proto)
2702                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2703                         else if (eth && !eth->ether_type)
2704                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2705                         if (!ipv4->version_ihl)
2706                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2707                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2708                         if (!ipv4->time_to_live)
2709                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2710                         break;
2711                 case RTE_FLOW_ITEM_TYPE_IPV6:
2712                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2713                         if (!vlan && !eth)
2714                                 return rte_flow_error_set(error, EINVAL,
2715                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2716                                                 (void *)items->type,
2717                                                 "neither eth nor vlan"
2718                                                 " header found");
2719                         if (vlan && !vlan->eth_proto)
2720                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2721                         else if (eth && !eth->ether_type)
2722                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2723                         if (!ipv6->vtc_flow)
2724                                 ipv6->vtc_flow =
2725                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2726                         if (!ipv6->hop_limits)
2727                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2728                         break;
2729                 case RTE_FLOW_ITEM_TYPE_UDP:
2730                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2731                         if (!ipv4 && !ipv6)
2732                                 return rte_flow_error_set(error, EINVAL,
2733                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2734                                                 (void *)items->type,
2735                                                 "ip header not found");
2736                         if (ipv4 && !ipv4->next_proto_id)
2737                                 ipv4->next_proto_id = IPPROTO_UDP;
2738                         else if (ipv6 && !ipv6->proto)
2739                                 ipv6->proto = IPPROTO_UDP;
2740                         break;
2741                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2742                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2743                         if (!udp)
2744                                 return rte_flow_error_set(error, EINVAL,
2745                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2746                                                 (void *)items->type,
2747                                                 "udp header not found");
2748                         if (!udp->dst_port)
2749                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2750                         if (!vxlan->vx_flags)
2751                                 vxlan->vx_flags =
2752                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2753                         break;
2754                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2755                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2756                         if (!udp)
2757                                 return rte_flow_error_set(error, EINVAL,
2758                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2759                                                 (void *)items->type,
2760                                                 "udp header not found");
2761                         if (!vxlan_gpe->proto)
2762                                 return rte_flow_error_set(error, EINVAL,
2763                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2764                                                 (void *)items->type,
2765                                                 "next protocol not found");
2766                         if (!udp->dst_port)
2767                                 udp->dst_port =
2768                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2769                         if (!vxlan_gpe->vx_flags)
2770                                 vxlan_gpe->vx_flags =
2771                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2772                         break;
2773                 case RTE_FLOW_ITEM_TYPE_GRE:
2774                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2775                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2776                         if (!gre->proto)
2777                                 return rte_flow_error_set(error, EINVAL,
2778                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2779                                                 (void *)items->type,
2780                                                 "next protocol not found");
2781                         if (!ipv4 && !ipv6)
2782                                 return rte_flow_error_set(error, EINVAL,
2783                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2784                                                 (void *)items->type,
2785                                                 "ip header not found");
2786                         if (ipv4 && !ipv4->next_proto_id)
2787                                 ipv4->next_proto_id = IPPROTO_GRE;
2788                         else if (ipv6 && !ipv6->proto)
2789                                 ipv6->proto = IPPROTO_GRE;
2790                         break;
2791                 case RTE_FLOW_ITEM_TYPE_VOID:
2792                         break;
2793                 default:
2794                         return rte_flow_error_set(error, EINVAL,
2795                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2796                                                   (void *)items->type,
2797                                                   "unsupported item type");
2798                         break;
2799                 }
2800                 temp_size += len;
2801         }
2802         *size = temp_size;
2803         return 0;
2804 }
2805
2806 static int
2807 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2808 {
2809         struct rte_ether_hdr *eth = NULL;
2810         struct rte_vlan_hdr *vlan = NULL;
2811         struct rte_ipv6_hdr *ipv6 = NULL;
2812         struct rte_udp_hdr *udp = NULL;
2813         char *next_hdr;
2814         uint16_t proto;
2815
2816         eth = (struct rte_ether_hdr *)data;
2817         next_hdr = (char *)(eth + 1);
2818         proto = RTE_BE16(eth->ether_type);
2819
2820         /* VLAN skipping */
2821         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2822                 vlan = (struct rte_vlan_hdr *)next_hdr;
2823                 proto = RTE_BE16(vlan->eth_proto);
2824                 next_hdr += sizeof(struct rte_vlan_hdr);
2825         }
2826
2827         /* HW calculates IPv4 csum. no need to proceed */
2828         if (proto == RTE_ETHER_TYPE_IPV4)
2829                 return 0;
2830
2831         /* non IPv4/IPv6 header. not supported */
2832         if (proto != RTE_ETHER_TYPE_IPV6) {
2833                 return rte_flow_error_set(error, ENOTSUP,
2834                                           RTE_FLOW_ERROR_TYPE_ACTION,
2835                                           NULL, "Cannot offload non IPv4/IPv6");
2836         }
2837
2838         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2839
2840         /* ignore non UDP */
2841         if (ipv6->proto != IPPROTO_UDP)
2842                 return 0;
2843
2844         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2845         udp->dgram_cksum = 0;
2846
2847         return 0;
2848 }
2849
2850 /**
2851  * Convert L2 encap action to DV specification.
2852  *
2853  * @param[in] dev
2854  *   Pointer to rte_eth_dev structure.
2855  * @param[in] action
2856  *   Pointer to action structure.
2857  * @param[in, out] dev_flow
2858  *   Pointer to the mlx5_flow.
2859  * @param[in] transfer
2860  *   Mark if the flow is E-Switch flow.
2861  * @param[out] error
2862  *   Pointer to the error structure.
2863  *
2864  * @return
2865  *   0 on success, a negative errno value otherwise and rte_errno is set.
2866  */
2867 static int
2868 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2869                                const struct rte_flow_action *action,
2870                                struct mlx5_flow *dev_flow,
2871                                uint8_t transfer,
2872                                struct rte_flow_error *error)
2873 {
2874         const struct rte_flow_item *encap_data;
2875         const struct rte_flow_action_raw_encap *raw_encap_data;
2876         struct mlx5_flow_dv_encap_decap_resource res = {
2877                 .reformat_type =
2878                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2879                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2880                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2881         };
2882
2883         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2884                 raw_encap_data =
2885                         (const struct rte_flow_action_raw_encap *)action->conf;
2886                 res.size = raw_encap_data->size;
2887                 memcpy(res.buf, raw_encap_data->data, res.size);
2888         } else {
2889                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2890                         encap_data =
2891                                 ((const struct rte_flow_action_vxlan_encap *)
2892                                                 action->conf)->definition;
2893                 else
2894                         encap_data =
2895                                 ((const struct rte_flow_action_nvgre_encap *)
2896                                                 action->conf)->definition;
2897                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2898                                                &res.size, error))
2899                         return -rte_errno;
2900         }
2901         if (flow_dv_zero_encap_udp_csum(res.buf, error))
2902                 return -rte_errno;
2903         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2904                 return rte_flow_error_set(error, EINVAL,
2905                                           RTE_FLOW_ERROR_TYPE_ACTION,
2906                                           NULL, "can't create L2 encap action");
2907         return 0;
2908 }
2909
2910 /**
2911  * Convert L2 decap action to DV specification.
2912  *
2913  * @param[in] dev
2914  *   Pointer to rte_eth_dev structure.
2915  * @param[in, out] dev_flow
2916  *   Pointer to the mlx5_flow.
2917  * @param[in] transfer
2918  *   Mark if the flow is E-Switch flow.
2919  * @param[out] error
2920  *   Pointer to the error structure.
2921  *
2922  * @return
2923  *   0 on success, a negative errno value otherwise and rte_errno is set.
2924  */
2925 static int
2926 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2927                                struct mlx5_flow *dev_flow,
2928                                uint8_t transfer,
2929                                struct rte_flow_error *error)
2930 {
2931         struct mlx5_flow_dv_encap_decap_resource res = {
2932                 .size = 0,
2933                 .reformat_type =
2934                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2935                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2936                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2937         };
2938
2939         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2940                 return rte_flow_error_set(error, EINVAL,
2941                                           RTE_FLOW_ERROR_TYPE_ACTION,
2942                                           NULL, "can't create L2 decap action");
2943         return 0;
2944 }
2945
2946 /**
2947  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2948  *
2949  * @param[in] dev
2950  *   Pointer to rte_eth_dev structure.
2951  * @param[in] action
2952  *   Pointer to action structure.
2953  * @param[in, out] dev_flow
2954  *   Pointer to the mlx5_flow.
2955  * @param[in] attr
2956  *   Pointer to the flow attributes.
2957  * @param[out] error
2958  *   Pointer to the error structure.
2959  *
2960  * @return
2961  *   0 on success, a negative errno value otherwise and rte_errno is set.
2962  */
2963 static int
2964 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2965                                 const struct rte_flow_action *action,
2966                                 struct mlx5_flow *dev_flow,
2967                                 const struct rte_flow_attr *attr,
2968                                 struct rte_flow_error *error)
2969 {
2970         const struct rte_flow_action_raw_encap *encap_data;
2971         struct mlx5_flow_dv_encap_decap_resource res;
2972
2973         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2974         res.size = encap_data->size;
2975         memcpy(res.buf, encap_data->data, res.size);
2976         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
2977                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
2978                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
2979         if (attr->transfer)
2980                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2981         else
2982                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2983                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2984         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2985                 return rte_flow_error_set(error, EINVAL,
2986                                           RTE_FLOW_ERROR_TYPE_ACTION,
2987                                           NULL, "can't create encap action");
2988         return 0;
2989 }
2990
2991 /**
2992  * Create action push VLAN.
2993  *
2994  * @param[in] dev
2995  *   Pointer to rte_eth_dev structure.
2996  * @param[in] attr
2997  *   Pointer to the flow attributes.
2998  * @param[in] vlan
2999  *   Pointer to the vlan to push to the Ethernet header.
3000  * @param[in, out] dev_flow
3001  *   Pointer to the mlx5_flow.
3002  * @param[out] error
3003  *   Pointer to the error structure.
3004  *
3005  * @return
3006  *   0 on success, a negative errno value otherwise and rte_errno is set.
3007  */
3008 static int
3009 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3010                                 const struct rte_flow_attr *attr,
3011                                 const struct rte_vlan_hdr *vlan,
3012                                 struct mlx5_flow *dev_flow,
3013                                 struct rte_flow_error *error)
3014 {
3015         struct mlx5_flow_dv_push_vlan_action_resource res;
3016
3017         res.vlan_tag =
3018                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3019                                  vlan->vlan_tci);
3020         if (attr->transfer)
3021                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3022         else
3023                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3024                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3025         return flow_dv_push_vlan_action_resource_register
3026                                             (dev, &res, dev_flow, error);
3027 }
3028
3029 /**
3030  * Validate the modify-header actions.
3031  *
3032  * @param[in] action_flags
3033  *   Holds the actions detected until now.
3034  * @param[in] action
3035  *   Pointer to the modify action.
3036  * @param[out] error
3037  *   Pointer to error structure.
3038  *
3039  * @return
3040  *   0 on success, a negative errno value otherwise and rte_errno is set.
3041  */
3042 static int
3043 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3044                                    const struct rte_flow_action *action,
3045                                    struct rte_flow_error *error)
3046 {
3047         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3048                 return rte_flow_error_set(error, EINVAL,
3049                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3050                                           NULL, "action configuration not set");
3051         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
3052                 return rte_flow_error_set(error, EINVAL,
3053                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3054                                           "can't have encap action before"
3055                                           " modify action");
3056         return 0;
3057 }
3058
3059 /**
3060  * Validate the modify-header MAC address actions.
3061  *
3062  * @param[in] action_flags
3063  *   Holds the actions detected until now.
3064  * @param[in] action
3065  *   Pointer to the modify action.
3066  * @param[in] item_flags
3067  *   Holds the items detected.
3068  * @param[out] error
3069  *   Pointer to error structure.
3070  *
3071  * @return
3072  *   0 on success, a negative errno value otherwise and rte_errno is set.
3073  */
3074 static int
3075 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3076                                    const struct rte_flow_action *action,
3077                                    const uint64_t item_flags,
3078                                    struct rte_flow_error *error)
3079 {
3080         int ret = 0;
3081
3082         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3083         if (!ret) {
3084                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3085                         return rte_flow_error_set(error, EINVAL,
3086                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3087                                                   NULL,
3088                                                   "no L2 item in pattern");
3089         }
3090         return ret;
3091 }
3092
3093 /**
3094  * Validate the modify-header IPv4 address actions.
3095  *
3096  * @param[in] action_flags
3097  *   Holds the actions detected until now.
3098  * @param[in] action
3099  *   Pointer to the modify action.
3100  * @param[in] item_flags
3101  *   Holds the items detected.
3102  * @param[out] error
3103  *   Pointer to error structure.
3104  *
3105  * @return
3106  *   0 on success, a negative errno value otherwise and rte_errno is set.
3107  */
3108 static int
3109 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3110                                     const struct rte_flow_action *action,
3111                                     const uint64_t item_flags,
3112                                     struct rte_flow_error *error)
3113 {
3114         int ret = 0;
3115
3116         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3117         if (!ret) {
3118                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3119                         return rte_flow_error_set(error, EINVAL,
3120                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3121                                                   NULL,
3122                                                   "no ipv4 item in pattern");
3123         }
3124         return ret;
3125 }
3126
3127 /**
3128  * Validate the modify-header IPv6 address actions.
3129  *
3130  * @param[in] action_flags
3131  *   Holds the actions detected until now.
3132  * @param[in] action
3133  *   Pointer to the modify action.
3134  * @param[in] item_flags
3135  *   Holds the items detected.
3136  * @param[out] error
3137  *   Pointer to error structure.
3138  *
3139  * @return
3140  *   0 on success, a negative errno value otherwise and rte_errno is set.
3141  */
3142 static int
3143 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3144                                     const struct rte_flow_action *action,
3145                                     const uint64_t item_flags,
3146                                     struct rte_flow_error *error)
3147 {
3148         int ret = 0;
3149
3150         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3151         if (!ret) {
3152                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3153                         return rte_flow_error_set(error, EINVAL,
3154                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3155                                                   NULL,
3156                                                   "no ipv6 item in pattern");
3157         }
3158         return ret;
3159 }
3160
3161 /**
3162  * Validate the modify-header TP actions.
3163  *
3164  * @param[in] action_flags
3165  *   Holds the actions detected until now.
3166  * @param[in] action
3167  *   Pointer to the modify action.
3168  * @param[in] item_flags
3169  *   Holds the items detected.
3170  * @param[out] error
3171  *   Pointer to error structure.
3172  *
3173  * @return
3174  *   0 on success, a negative errno value otherwise and rte_errno is set.
3175  */
3176 static int
3177 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3178                                   const struct rte_flow_action *action,
3179                                   const uint64_t item_flags,
3180                                   struct rte_flow_error *error)
3181 {
3182         int ret = 0;
3183
3184         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3185         if (!ret) {
3186                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3187                         return rte_flow_error_set(error, EINVAL,
3188                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3189                                                   NULL, "no transport layer "
3190                                                   "in pattern");
3191         }
3192         return ret;
3193 }
3194
3195 /**
3196  * Validate the modify-header actions of increment/decrement
3197  * TCP Sequence-number.
3198  *
3199  * @param[in] action_flags
3200  *   Holds the actions detected until now.
3201  * @param[in] action
3202  *   Pointer to the modify action.
3203  * @param[in] item_flags
3204  *   Holds the items detected.
3205  * @param[out] error
3206  *   Pointer to error structure.
3207  *
3208  * @return
3209  *   0 on success, a negative errno value otherwise and rte_errno is set.
3210  */
3211 static int
3212 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3213                                        const struct rte_flow_action *action,
3214                                        const uint64_t item_flags,
3215                                        struct rte_flow_error *error)
3216 {
3217         int ret = 0;
3218
3219         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3220         if (!ret) {
3221                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3222                         return rte_flow_error_set(error, EINVAL,
3223                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3224                                                   NULL, "no TCP item in"
3225                                                   " pattern");
3226                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3227                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3228                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3229                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3230                         return rte_flow_error_set(error, EINVAL,
3231                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3232                                                   NULL,
3233                                                   "cannot decrease and increase"
3234                                                   " TCP sequence number"
3235                                                   " at the same time");
3236         }
3237         return ret;
3238 }
3239
3240 /**
3241  * Validate the modify-header actions of increment/decrement
3242  * TCP Acknowledgment number.
3243  *
3244  * @param[in] action_flags
3245  *   Holds the actions detected until now.
3246  * @param[in] action
3247  *   Pointer to the modify action.
3248  * @param[in] item_flags
3249  *   Holds the items detected.
3250  * @param[out] error
3251  *   Pointer to error structure.
3252  *
3253  * @return
3254  *   0 on success, a negative errno value otherwise and rte_errno is set.
3255  */
3256 static int
3257 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3258                                        const struct rte_flow_action *action,
3259                                        const uint64_t item_flags,
3260                                        struct rte_flow_error *error)
3261 {
3262         int ret = 0;
3263
3264         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3265         if (!ret) {
3266                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3267                         return rte_flow_error_set(error, EINVAL,
3268                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3269                                                   NULL, "no TCP item in"
3270                                                   " pattern");
3271                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3272                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3273                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3274                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3275                         return rte_flow_error_set(error, EINVAL,
3276                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3277                                                   NULL,
3278                                                   "cannot decrease and increase"
3279                                                   " TCP acknowledgment number"
3280                                                   " at the same time");
3281         }
3282         return ret;
3283 }
3284
3285 /**
3286  * Validate the modify-header TTL actions.
3287  *
3288  * @param[in] action_flags
3289  *   Holds the actions detected until now.
3290  * @param[in] action
3291  *   Pointer to the modify action.
3292  * @param[in] item_flags
3293  *   Holds the items detected.
3294  * @param[out] error
3295  *   Pointer to error structure.
3296  *
3297  * @return
3298  *   0 on success, a negative errno value otherwise and rte_errno is set.
3299  */
3300 static int
3301 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3302                                    const struct rte_flow_action *action,
3303                                    const uint64_t item_flags,
3304                                    struct rte_flow_error *error)
3305 {
3306         int ret = 0;
3307
3308         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3309         if (!ret) {
3310                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3311                         return rte_flow_error_set(error, EINVAL,
3312                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3313                                                   NULL,
3314                                                   "no IP protocol in pattern");
3315         }
3316         return ret;
3317 }
3318
3319 /**
3320  * Validate jump action.
3321  *
3322  * @param[in] action
3323  *   Pointer to the jump action.
3324  * @param[in] action_flags
3325  *   Holds the actions detected until now.
3326  * @param[in] attributes
3327  *   Pointer to flow attributes
3328  * @param[in] external
3329  *   Action belongs to flow rule created by request external to PMD.
3330  * @param[out] error
3331  *   Pointer to error structure.
3332  *
3333  * @return
3334  *   0 on success, a negative errno value otherwise and rte_errno is set.
3335  */
3336 static int
3337 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3338                              uint64_t action_flags,
3339                              const struct rte_flow_attr *attributes,
3340                              bool external, struct rte_flow_error *error)
3341 {
3342         uint32_t target_group, table;
3343         int ret = 0;
3344
3345         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3346                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3347                 return rte_flow_error_set(error, EINVAL,
3348                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3349                                           "can't have 2 fate actions in"
3350                                           " same flow");
3351         if (action_flags & MLX5_FLOW_ACTION_METER)
3352                 return rte_flow_error_set(error, ENOTSUP,
3353                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3354                                           "jump with meter not support");
3355         if (!action->conf)
3356                 return rte_flow_error_set(error, EINVAL,
3357                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3358                                           NULL, "action configuration not set");
3359         target_group =
3360                 ((const struct rte_flow_action_jump *)action->conf)->group;
3361         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3362                                        &table, error);
3363         if (ret)
3364                 return ret;
3365         if (attributes->group == target_group)
3366                 return rte_flow_error_set(error, EINVAL,
3367                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3368                                           "target group must be other than"
3369                                           " the current flow group");
3370         return 0;
3371 }
3372
3373 /*
3374  * Validate the port_id action.
3375  *
3376  * @param[in] dev
3377  *   Pointer to rte_eth_dev structure.
3378  * @param[in] action_flags
3379  *   Bit-fields that holds the actions detected until now.
3380  * @param[in] action
3381  *   Port_id RTE action structure.
3382  * @param[in] attr
3383  *   Attributes of flow that includes this action.
3384  * @param[out] error
3385  *   Pointer to error structure.
3386  *
3387  * @return
3388  *   0 on success, a negative errno value otherwise and rte_errno is set.
3389  */
3390 static int
3391 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3392                                 uint64_t action_flags,
3393                                 const struct rte_flow_action *action,
3394                                 const struct rte_flow_attr *attr,
3395                                 struct rte_flow_error *error)
3396 {
3397         const struct rte_flow_action_port_id *port_id;
3398         struct mlx5_priv *act_priv;
3399         struct mlx5_priv *dev_priv;
3400         uint16_t port;
3401
3402         if (!attr->transfer)
3403                 return rte_flow_error_set(error, ENOTSUP,
3404                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3405                                           NULL,
3406                                           "port id action is valid in transfer"
3407                                           " mode only");
3408         if (!action || !action->conf)
3409                 return rte_flow_error_set(error, ENOTSUP,
3410                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3411                                           NULL,
3412                                           "port id action parameters must be"
3413                                           " specified");
3414         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3415                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3416                 return rte_flow_error_set(error, EINVAL,
3417                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3418                                           "can have only one fate actions in"
3419                                           " a flow");
3420         dev_priv = mlx5_dev_to_eswitch_info(dev);
3421         if (!dev_priv)
3422                 return rte_flow_error_set(error, rte_errno,
3423                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3424                                           NULL,
3425                                           "failed to obtain E-Switch info");
3426         port_id = action->conf;
3427         port = port_id->original ? dev->data->port_id : port_id->id;
3428         act_priv = mlx5_port_to_eswitch_info(port, false);
3429         if (!act_priv)
3430                 return rte_flow_error_set
3431                                 (error, rte_errno,
3432                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3433                                  "failed to obtain E-Switch port id for port");
3434         if (act_priv->domain_id != dev_priv->domain_id)
3435                 return rte_flow_error_set
3436                                 (error, EINVAL,
3437                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3438                                  "port does not belong to"
3439                                  " E-Switch being configured");
3440         return 0;
3441 }
3442
3443 /**
3444  * Get the maximum number of modify header actions.
3445  *
3446  * @param dev
3447  *   Pointer to rte_eth_dev structure.
3448  * @param flags
3449  *   Flags bits to check if root level.
3450  *
3451  * @return
3452  *   Max number of modify header actions device can support.
3453  */
3454 static unsigned int
3455 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3456 {
3457         /*
3458          * There's no way to directly query the max cap. Although it has to be
3459          * acquried by iterative trial, it is a safe assumption that more
3460          * actions are supported by FW if extensive metadata register is
3461          * supported. (Only in the root table)
3462          */
3463         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3464                 return MLX5_MAX_MODIFY_NUM;
3465         else
3466                 return mlx5_flow_ext_mreg_supported(dev) ?
3467                                         MLX5_ROOT_TBL_MODIFY_NUM :
3468                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3469 }
3470
3471 /**
3472  * Validate the meter action.
3473  *
3474  * @param[in] dev
3475  *   Pointer to rte_eth_dev structure.
3476  * @param[in] action_flags
3477  *   Bit-fields that holds the actions detected until now.
3478  * @param[in] action
3479  *   Pointer to the meter action.
3480  * @param[in] attr
3481  *   Attributes of flow that includes this action.
3482  * @param[out] error
3483  *   Pointer to error structure.
3484  *
3485  * @return
3486  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3487  */
3488 static int
3489 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3490                                 uint64_t action_flags,
3491                                 const struct rte_flow_action *action,
3492                                 const struct rte_flow_attr *attr,
3493                                 struct rte_flow_error *error)
3494 {
3495         struct mlx5_priv *priv = dev->data->dev_private;
3496         const struct rte_flow_action_meter *am = action->conf;
3497         struct mlx5_flow_meter *fm;
3498
3499         if (!am)
3500                 return rte_flow_error_set(error, EINVAL,
3501                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3502                                           "meter action conf is NULL");
3503
3504         if (action_flags & MLX5_FLOW_ACTION_METER)
3505                 return rte_flow_error_set(error, ENOTSUP,
3506                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3507                                           "meter chaining not support");
3508         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3509                 return rte_flow_error_set(error, ENOTSUP,
3510                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3511                                           "meter with jump not support");
3512         if (!priv->mtr_en)
3513                 return rte_flow_error_set(error, ENOTSUP,
3514                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3515                                           NULL,
3516                                           "meter action not supported");
3517         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3518         if (!fm)
3519                 return rte_flow_error_set(error, EINVAL,
3520                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3521                                           "Meter not found");
3522         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3523               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3524               (!fm->attr.egress && !attr->egress && attr->ingress))))
3525                 return rte_flow_error_set(error, EINVAL,
3526                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3527                                           "Flow attributes are either invalid "
3528                                           "or have a conflict with current "
3529                                           "meter attributes");
3530         return 0;
3531 }
3532
3533 /**
3534  * Validate the modify-header IPv4 DSCP actions.
3535  *
3536  * @param[in] action_flags
3537  *   Holds the actions detected until now.
3538  * @param[in] action
3539  *   Pointer to the modify action.
3540  * @param[in] item_flags
3541  *   Holds the items detected.
3542  * @param[out] error
3543  *   Pointer to error structure.
3544  *
3545  * @return
3546  *   0 on success, a negative errno value otherwise and rte_errno is set.
3547  */
3548 static int
3549 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3550                                          const struct rte_flow_action *action,
3551                                          const uint64_t item_flags,
3552                                          struct rte_flow_error *error)
3553 {
3554         int ret = 0;
3555
3556         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3557         if (!ret) {
3558                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3559                         return rte_flow_error_set(error, EINVAL,
3560                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3561                                                   NULL,
3562                                                   "no ipv4 item in pattern");
3563         }
3564         return ret;
3565 }
3566
3567 /**
3568  * Validate the modify-header IPv6 DSCP actions.
3569  *
3570  * @param[in] action_flags
3571  *   Holds the actions detected until now.
3572  * @param[in] action
3573  *   Pointer to the modify action.
3574  * @param[in] item_flags
3575  *   Holds the items detected.
3576  * @param[out] error
3577  *   Pointer to error structure.
3578  *
3579  * @return
3580  *   0 on success, a negative errno value otherwise and rte_errno is set.
3581  */
3582 static int
3583 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3584                                          const struct rte_flow_action *action,
3585                                          const uint64_t item_flags,
3586                                          struct rte_flow_error *error)
3587 {
3588         int ret = 0;
3589
3590         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3591         if (!ret) {
3592                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3593                         return rte_flow_error_set(error, EINVAL,
3594                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3595                                                   NULL,
3596                                                   "no ipv6 item in pattern");
3597         }
3598         return ret;
3599 }
3600
3601 /**
3602  * Find existing modify-header resource or create and register a new one.
3603  *
3604  * @param dev[in, out]
3605  *   Pointer to rte_eth_dev structure.
3606  * @param[in, out] resource
3607  *   Pointer to modify-header resource.
3608  * @parm[in, out] dev_flow
3609  *   Pointer to the dev_flow.
3610  * @param[out] error
3611  *   pointer to error structure.
3612  *
3613  * @return
3614  *   0 on success otherwise -errno and errno is set.
3615  */
3616 static int
3617 flow_dv_modify_hdr_resource_register
3618                         (struct rte_eth_dev *dev,
3619                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3620                          struct mlx5_flow *dev_flow,
3621                          struct rte_flow_error *error)
3622 {
3623         struct mlx5_priv *priv = dev->data->dev_private;
3624         struct mlx5_ibv_shared *sh = priv->sh;
3625         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3626         struct mlx5dv_dr_domain *ns;
3627         uint32_t actions_len;
3628
3629         resource->flags =
3630                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3631         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3632                                     resource->flags))
3633                 return rte_flow_error_set(error, EOVERFLOW,
3634                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3635                                           "too many modify header items");
3636         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3637                 ns = sh->fdb_domain;
3638         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3639                 ns = sh->tx_domain;
3640         else
3641                 ns = sh->rx_domain;
3642         /* Lookup a matching resource from cache. */
3643         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3644         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3645                 if (resource->ft_type == cache_resource->ft_type &&
3646                     resource->actions_num == cache_resource->actions_num &&
3647                     resource->flags == cache_resource->flags &&
3648                     !memcmp((const void *)resource->actions,
3649                             (const void *)cache_resource->actions,
3650                             actions_len)) {
3651                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3652                                 (void *)cache_resource,
3653                                 rte_atomic32_read(&cache_resource->refcnt));
3654                         rte_atomic32_inc(&cache_resource->refcnt);
3655                         dev_flow->dv.modify_hdr = cache_resource;
3656                         return 0;
3657                 }
3658         }
3659         /* Register new modify-header resource. */
3660         cache_resource = rte_calloc(__func__, 1,
3661                                     sizeof(*cache_resource) + actions_len, 0);
3662         if (!cache_resource)
3663                 return rte_flow_error_set(error, ENOMEM,
3664                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3665                                           "cannot allocate resource memory");
3666         *cache_resource = *resource;
3667         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3668         cache_resource->verbs_action =
3669                 mlx5_glue->dv_create_flow_action_modify_header
3670                                         (sh->ctx, cache_resource->ft_type, ns,
3671                                          cache_resource->flags, actions_len,
3672                                          (uint64_t *)cache_resource->actions);
3673         if (!cache_resource->verbs_action) {
3674                 rte_free(cache_resource);
3675                 return rte_flow_error_set(error, ENOMEM,
3676                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3677                                           NULL, "cannot create action");
3678         }
3679         rte_atomic32_init(&cache_resource->refcnt);
3680         rte_atomic32_inc(&cache_resource->refcnt);
3681         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3682         dev_flow->dv.modify_hdr = cache_resource;
3683         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3684                 (void *)cache_resource,
3685                 rte_atomic32_read(&cache_resource->refcnt));
3686         return 0;
3687 }
3688
3689 #define MLX5_CNT_CONTAINER_RESIZE 64
3690
3691 /**
3692  * Get or create a flow counter.
3693  *
3694  * @param[in] dev
3695  *   Pointer to the Ethernet device structure.
3696  * @param[in] shared
3697  *   Indicate if this counter is shared with other flows.
3698  * @param[in] id
3699  *   Counter identifier.
3700  *
3701  * @return
3702  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3703  */
3704 static struct mlx5_flow_counter *
3705 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3706                                uint32_t id)
3707 {
3708         struct mlx5_priv *priv = dev->data->dev_private;
3709         struct mlx5_flow_counter *cnt = NULL;
3710         struct mlx5_devx_obj *dcs = NULL;
3711
3712         if (!priv->config.devx) {
3713                 rte_errno = ENOTSUP;
3714                 return NULL;
3715         }
3716         if (shared) {
3717                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3718                         if (cnt->shared && cnt->id == id) {
3719                                 cnt->ref_cnt++;
3720                                 return cnt;
3721                         }
3722                 }
3723         }
3724         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3725         if (!dcs)
3726                 return NULL;
3727         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3728         if (!cnt) {
3729                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3730                 rte_errno = ENOMEM;
3731                 return NULL;
3732         }
3733         struct mlx5_flow_counter tmpl = {
3734                 .shared = shared,
3735                 .ref_cnt = 1,
3736                 .id = id,
3737                 .dcs = dcs,
3738         };
3739         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3740         if (!tmpl.action) {
3741                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3742                 rte_errno = errno;
3743                 rte_free(cnt);
3744                 return NULL;
3745         }
3746         *cnt = tmpl;
3747         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3748         return cnt;
3749 }
3750
3751 /**
3752  * Release a flow counter.
3753  *
3754  * @param[in] dev
3755  *   Pointer to the Ethernet device structure.
3756  * @param[in] counter
3757  *   Pointer to the counter handler.
3758  */
3759 static void
3760 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3761                                  struct mlx5_flow_counter *counter)
3762 {
3763         struct mlx5_priv *priv = dev->data->dev_private;
3764
3765         if (!counter)
3766                 return;
3767         if (--counter->ref_cnt == 0) {
3768                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3769                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3770                 rte_free(counter);
3771         }
3772 }
3773
3774 /**
3775  * Query a devx flow counter.
3776  *
3777  * @param[in] dev
3778  *   Pointer to the Ethernet device structure.
3779  * @param[in] cnt
3780  *   Pointer to the flow counter.
3781  * @param[out] pkts
3782  *   The statistics value of packets.
3783  * @param[out] bytes
3784  *   The statistics value of bytes.
3785  *
3786  * @return
3787  *   0 on success, otherwise a negative errno value and rte_errno is set.
3788  */
3789 static inline int
3790 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3791                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3792                      uint64_t *bytes)
3793 {
3794         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3795                                                 0, NULL, NULL, 0);
3796 }
3797
3798 /**
3799  * Get a pool by a counter.
3800  *
3801  * @param[in] cnt
3802  *   Pointer to the counter.
3803  *
3804  * @return
3805  *   The counter pool.
3806  */
3807 static struct mlx5_flow_counter_pool *
3808 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3809 {
3810         if (!cnt->batch) {
3811                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3812                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3813         }
3814         return cnt->pool;
3815 }
3816
3817 /**
3818  * Get a pool by devx counter ID.
3819  *
3820  * @param[in] cont
3821  *   Pointer to the counter container.
3822  * @param[in] id
3823  *   The counter devx ID.
3824  *
3825  * @return
3826  *   The counter pool pointer if exists, NULL otherwise,
3827  */
3828 static struct mlx5_flow_counter_pool *
3829 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3830 {
3831         struct mlx5_flow_counter_pool *pool;
3832
3833         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3834                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3835                                 MLX5_COUNTERS_PER_POOL;
3836
3837                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3838                         return pool;
3839         };
3840         return NULL;
3841 }
3842
3843 /**
3844  * Allocate a new memory for the counter values wrapped by all the needed
3845  * management.
3846  *
3847  * @param[in] dev
3848  *   Pointer to the Ethernet device structure.
3849  * @param[in] raws_n
3850  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3851  *
3852  * @return
3853  *   The new memory management pointer on success, otherwise NULL and rte_errno
3854  *   is set.
3855  */
3856 static struct mlx5_counter_stats_mem_mng *
3857 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3858 {
3859         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3860                                         (dev->data->dev_private))->sh;
3861         struct mlx5_devx_mkey_attr mkey_attr;
3862         struct mlx5_counter_stats_mem_mng *mem_mng;
3863         volatile struct flow_counter_stats *raw_data;
3864         int size = (sizeof(struct flow_counter_stats) *
3865                         MLX5_COUNTERS_PER_POOL +
3866                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3867                         sizeof(struct mlx5_counter_stats_mem_mng);
3868         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3869         int i;
3870
3871         if (!mem) {
3872                 rte_errno = ENOMEM;
3873                 return NULL;
3874         }
3875         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3876         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3877         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3878                                                  IBV_ACCESS_LOCAL_WRITE);
3879         if (!mem_mng->umem) {
3880                 rte_errno = errno;
3881                 rte_free(mem);
3882                 return NULL;
3883         }
3884         mkey_attr.addr = (uintptr_t)mem;
3885         mkey_attr.size = size;
3886         mkey_attr.umem_id = mem_mng->umem->umem_id;
3887         mkey_attr.pd = sh->pdn;
3888         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3889         if (!mem_mng->dm) {
3890                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3891                 rte_errno = errno;
3892                 rte_free(mem);
3893                 return NULL;
3894         }
3895         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3896         raw_data = (volatile struct flow_counter_stats *)mem;
3897         for (i = 0; i < raws_n; ++i) {
3898                 mem_mng->raws[i].mem_mng = mem_mng;
3899                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3900         }
3901         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3902         return mem_mng;
3903 }
3904
3905 /**
3906  * Resize a counter container.
3907  *
3908  * @param[in] dev
3909  *   Pointer to the Ethernet device structure.
3910  * @param[in] batch
3911  *   Whether the pool is for counter that was allocated by batch command.
3912  *
3913  * @return
3914  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3915  */
3916 static struct mlx5_pools_container *
3917 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3918 {
3919         struct mlx5_priv *priv = dev->data->dev_private;
3920         struct mlx5_pools_container *cont =
3921                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3922         struct mlx5_pools_container *new_cont =
3923                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3924         struct mlx5_counter_stats_mem_mng *mem_mng;
3925         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3926         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3927         int i;
3928
3929         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3930                 /* The last resize still hasn't detected by the host thread. */
3931                 rte_errno = EAGAIN;
3932                 return NULL;
3933         }
3934         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3935         if (!new_cont->pools) {
3936                 rte_errno = ENOMEM;
3937                 return NULL;
3938         }
3939         if (cont->n)
3940                 memcpy(new_cont->pools, cont->pools, cont->n *
3941                        sizeof(struct mlx5_flow_counter_pool *));
3942         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3943                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3944         if (!mem_mng) {
3945                 rte_free(new_cont->pools);
3946                 return NULL;
3947         }
3948         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3949                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3950                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3951                                  i, next);
3952         new_cont->n = resize;
3953         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3954         TAILQ_INIT(&new_cont->pool_list);
3955         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3956         new_cont->init_mem_mng = mem_mng;
3957         rte_cio_wmb();
3958          /* Flip the master container. */
3959         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3960         return new_cont;
3961 }
3962
3963 /**
3964  * Query a devx flow counter.
3965  *
3966  * @param[in] dev
3967  *   Pointer to the Ethernet device structure.
3968  * @param[in] cnt
3969  *   Pointer to the flow counter.
3970  * @param[out] pkts
3971  *   The statistics value of packets.
3972  * @param[out] bytes
3973  *   The statistics value of bytes.
3974  *
3975  * @return
3976  *   0 on success, otherwise a negative errno value and rte_errno is set.
3977  */
3978 static inline int
3979 _flow_dv_query_count(struct rte_eth_dev *dev,
3980                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3981                      uint64_t *bytes)
3982 {
3983         struct mlx5_priv *priv = dev->data->dev_private;
3984         struct mlx5_flow_counter_pool *pool =
3985                         flow_dv_counter_pool_get(cnt);
3986         int offset = cnt - &pool->counters_raw[0];
3987
3988         if (priv->counter_fallback)
3989                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3990
3991         rte_spinlock_lock(&pool->sl);
3992         /*
3993          * The single counters allocation may allocate smaller ID than the
3994          * current allocated in parallel to the host reading.
3995          * In this case the new counter values must be reported as 0.
3996          */
3997         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
3998                 *pkts = 0;
3999                 *bytes = 0;
4000         } else {
4001                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4002                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4003         }
4004         rte_spinlock_unlock(&pool->sl);
4005         return 0;
4006 }
4007
4008 /**
4009  * Create and initialize a new counter pool.
4010  *
4011  * @param[in] dev
4012  *   Pointer to the Ethernet device structure.
4013  * @param[out] dcs
4014  *   The devX counter handle.
4015  * @param[in] batch
4016  *   Whether the pool is for counter that was allocated by batch command.
4017  *
4018  * @return
4019  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4020  */
4021 static struct mlx5_flow_counter_pool *
4022 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4023                     uint32_t batch)
4024 {
4025         struct mlx5_priv *priv = dev->data->dev_private;
4026         struct mlx5_flow_counter_pool *pool;
4027         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4028                                                                0);
4029         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4030         uint32_t size;
4031
4032         if (cont->n == n_valid) {
4033                 cont = flow_dv_container_resize(dev, batch);
4034                 if (!cont)
4035                         return NULL;
4036         }
4037         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4038                         sizeof(struct mlx5_flow_counter);
4039         pool = rte_calloc(__func__, 1, size, 0);
4040         if (!pool) {
4041                 rte_errno = ENOMEM;
4042                 return NULL;
4043         }
4044         pool->min_dcs = dcs;
4045         pool->raw = cont->init_mem_mng->raws + n_valid %
4046                                                      MLX5_CNT_CONTAINER_RESIZE;
4047         pool->raw_hw = NULL;
4048         rte_spinlock_init(&pool->sl);
4049         /*
4050          * The generation of the new allocated counters in this pool is 0, 2 in
4051          * the pool generation makes all the counters valid for allocation.
4052          */
4053         rte_atomic64_set(&pool->query_gen, 0x2);
4054         TAILQ_INIT(&pool->counters);
4055         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4056         cont->pools[n_valid] = pool;
4057         /* Pool initialization must be updated before host thread access. */
4058         rte_cio_wmb();
4059         rte_atomic16_add(&cont->n_valid, 1);
4060         return pool;
4061 }
4062
4063 /**
4064  * Prepare a new counter and/or a new counter pool.
4065  *
4066  * @param[in] dev
4067  *   Pointer to the Ethernet device structure.
4068  * @param[out] cnt_free
4069  *   Where to put the pointer of a new counter.
4070  * @param[in] batch
4071  *   Whether the pool is for counter that was allocated by batch command.
4072  *
4073  * @return
4074  *   The free counter pool pointer and @p cnt_free is set on success,
4075  *   NULL otherwise and rte_errno is set.
4076  */
4077 static struct mlx5_flow_counter_pool *
4078 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4079                              struct mlx5_flow_counter **cnt_free,
4080                              uint32_t batch)
4081 {
4082         struct mlx5_priv *priv = dev->data->dev_private;
4083         struct mlx5_flow_counter_pool *pool;
4084         struct mlx5_devx_obj *dcs = NULL;
4085         struct mlx5_flow_counter *cnt;
4086         uint32_t i;
4087
4088         if (!batch) {
4089                 /* bulk_bitmap must be 0 for single counter allocation. */
4090                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4091                 if (!dcs)
4092                         return NULL;
4093                 pool = flow_dv_find_pool_by_id
4094                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4095                 if (!pool) {
4096                         pool = flow_dv_pool_create(dev, dcs, batch);
4097                         if (!pool) {
4098                                 mlx5_devx_cmd_destroy(dcs);
4099                                 return NULL;
4100                         }
4101                 } else if (dcs->id < pool->min_dcs->id) {
4102                         rte_atomic64_set(&pool->a64_dcs,
4103                                          (int64_t)(uintptr_t)dcs);
4104                 }
4105                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4106                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4107                 cnt->dcs = dcs;
4108                 *cnt_free = cnt;
4109                 return pool;
4110         }
4111         /* bulk_bitmap is in 128 counters units. */
4112         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4113                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4114         if (!dcs) {
4115                 rte_errno = ENODATA;
4116                 return NULL;
4117         }
4118         pool = flow_dv_pool_create(dev, dcs, batch);
4119         if (!pool) {
4120                 mlx5_devx_cmd_destroy(dcs);
4121                 return NULL;
4122         }
4123         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4124                 cnt = &pool->counters_raw[i];
4125                 cnt->pool = pool;
4126                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4127         }
4128         *cnt_free = &pool->counters_raw[0];
4129         return pool;
4130 }
4131
4132 /**
4133  * Search for existed shared counter.
4134  *
4135  * @param[in] cont
4136  *   Pointer to the relevant counter pool container.
4137  * @param[in] id
4138  *   The shared counter ID to search.
4139  *
4140  * @return
4141  *   NULL if not existed, otherwise pointer to the shared counter.
4142  */
4143 static struct mlx5_flow_counter *
4144 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4145                               uint32_t id)
4146 {
4147         static struct mlx5_flow_counter *cnt;
4148         struct mlx5_flow_counter_pool *pool;
4149         int i;
4150
4151         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4152                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4153                         cnt = &pool->counters_raw[i];
4154                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4155                                 return cnt;
4156                 }
4157         }
4158         return NULL;
4159 }
4160
4161 /**
4162  * Allocate a flow counter.
4163  *
4164  * @param[in] dev
4165  *   Pointer to the Ethernet device structure.
4166  * @param[in] shared
4167  *   Indicate if this counter is shared with other flows.
4168  * @param[in] id
4169  *   Counter identifier.
4170  * @param[in] group
4171  *   Counter flow group.
4172  *
4173  * @return
4174  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4175  */
4176 static struct mlx5_flow_counter *
4177 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4178                       uint16_t group)
4179 {
4180         struct mlx5_priv *priv = dev->data->dev_private;
4181         struct mlx5_flow_counter_pool *pool = NULL;
4182         struct mlx5_flow_counter *cnt_free = NULL;
4183         /*
4184          * Currently group 0 flow counter cannot be assigned to a flow if it is
4185          * not the first one in the batch counter allocation, so it is better
4186          * to allocate counters one by one for these flows in a separate
4187          * container.
4188          * A counter can be shared between different groups so need to take
4189          * shared counters from the single container.
4190          */
4191         uint32_t batch = (group && !shared) ? 1 : 0;
4192         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4193                                                                0);
4194
4195         if (priv->counter_fallback)
4196                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4197         if (!priv->config.devx) {
4198                 rte_errno = ENOTSUP;
4199                 return NULL;
4200         }
4201         if (shared) {
4202                 cnt_free = flow_dv_counter_shared_search(cont, id);
4203                 if (cnt_free) {
4204                         if (cnt_free->ref_cnt + 1 == 0) {
4205                                 rte_errno = E2BIG;
4206                                 return NULL;
4207                         }
4208                         cnt_free->ref_cnt++;
4209                         return cnt_free;
4210                 }
4211         }
4212         /* Pools which has a free counters are in the start. */
4213         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4214                 /*
4215                  * The free counter reset values must be updated between the
4216                  * counter release to the counter allocation, so, at least one
4217                  * query must be done in this time. ensure it by saving the
4218                  * query generation in the release time.
4219                  * The free list is sorted according to the generation - so if
4220                  * the first one is not updated, all the others are not
4221                  * updated too.
4222                  */
4223                 cnt_free = TAILQ_FIRST(&pool->counters);
4224                 if (cnt_free && cnt_free->query_gen + 1 <
4225                     rte_atomic64_read(&pool->query_gen))
4226                         break;
4227                 cnt_free = NULL;
4228         }
4229         if (!cnt_free) {
4230                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4231                 if (!pool)
4232                         return NULL;
4233         }
4234         cnt_free->batch = batch;
4235         /* Create a DV counter action only in the first time usage. */
4236         if (!cnt_free->action) {
4237                 uint16_t offset;
4238                 struct mlx5_devx_obj *dcs;
4239
4240                 if (batch) {
4241                         offset = cnt_free - &pool->counters_raw[0];
4242                         dcs = pool->min_dcs;
4243                 } else {
4244                         offset = 0;
4245                         dcs = cnt_free->dcs;
4246                 }
4247                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4248                                         (dcs->obj, offset);
4249                 if (!cnt_free->action) {
4250                         rte_errno = errno;
4251                         return NULL;
4252                 }
4253         }
4254         /* Update the counter reset values. */
4255         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4256                                  &cnt_free->bytes))
4257                 return NULL;
4258         cnt_free->shared = shared;
4259         cnt_free->ref_cnt = 1;
4260         cnt_free->id = id;
4261         if (!priv->sh->cmng.query_thread_on)
4262                 /* Start the asynchronous batch query by the host thread. */
4263                 mlx5_set_query_alarm(priv->sh);
4264         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4265         if (TAILQ_EMPTY(&pool->counters)) {
4266                 /* Move the pool to the end of the container pool list. */
4267                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4268                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4269         }
4270         return cnt_free;
4271 }
4272
4273 /**
4274  * Release a flow counter.
4275  *
4276  * @param[in] dev
4277  *   Pointer to the Ethernet device structure.
4278  * @param[in] counter
4279  *   Pointer to the counter handler.
4280  */
4281 static void
4282 flow_dv_counter_release(struct rte_eth_dev *dev,
4283                         struct mlx5_flow_counter *counter)
4284 {
4285         struct mlx5_priv *priv = dev->data->dev_private;
4286
4287         if (!counter)
4288                 return;
4289         if (priv->counter_fallback) {
4290                 flow_dv_counter_release_fallback(dev, counter);
4291                 return;
4292         }
4293         if (--counter->ref_cnt == 0) {
4294                 struct mlx5_flow_counter_pool *pool =
4295                                 flow_dv_counter_pool_get(counter);
4296
4297                 /* Put the counter in the end - the last updated one. */
4298                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4299                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4300         }
4301 }
4302
4303 /**
4304  * Verify the @p attributes will be correctly understood by the NIC and store
4305  * them in the @p flow if everything is correct.
4306  *
4307  * @param[in] dev
4308  *   Pointer to dev struct.
4309  * @param[in] attributes
4310  *   Pointer to flow attributes
4311  * @param[in] external
4312  *   This flow rule is created by request external to PMD.
4313  * @param[out] error
4314  *   Pointer to error structure.
4315  *
4316  * @return
4317  *   0 on success, a negative errno value otherwise and rte_errno is set.
4318  */
4319 static int
4320 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4321                             const struct rte_flow_attr *attributes,
4322                             bool external __rte_unused,
4323                             struct rte_flow_error *error)
4324 {
4325         struct mlx5_priv *priv = dev->data->dev_private;
4326         uint32_t priority_max = priv->config.flow_prio - 1;
4327
4328 #ifndef HAVE_MLX5DV_DR
4329         if (attributes->group)
4330                 return rte_flow_error_set(error, ENOTSUP,
4331                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4332                                           NULL,
4333                                           "groups are not supported");
4334 #else
4335         uint32_t table;
4336         int ret;
4337
4338         ret = mlx5_flow_group_to_table(attributes, external,
4339                                        attributes->group,
4340                                        &table, error);
4341         if (ret)
4342                 return ret;
4343 #endif
4344         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4345             attributes->priority >= priority_max)
4346                 return rte_flow_error_set(error, ENOTSUP,
4347                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4348                                           NULL,
4349                                           "priority out of range");
4350         if (attributes->transfer) {
4351                 if (!priv->config.dv_esw_en)
4352                         return rte_flow_error_set
4353                                 (error, ENOTSUP,
4354                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4355                                  "E-Switch dr is not supported");
4356                 if (!(priv->representor || priv->master))
4357                         return rte_flow_error_set
4358                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4359                                  NULL, "E-Switch configuration can only be"
4360                                  " done by a master or a representor device");
4361                 if (attributes->egress)
4362                         return rte_flow_error_set
4363                                 (error, ENOTSUP,
4364                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4365                                  "egress is not supported");
4366         }
4367         if (!(attributes->egress ^ attributes->ingress))
4368                 return rte_flow_error_set(error, ENOTSUP,
4369                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4370                                           "must specify exactly one of "
4371                                           "ingress or egress");
4372         return 0;
4373 }
4374
4375 /**
4376  * Internal validation function. For validating both actions and items.
4377  *
4378  * @param[in] dev
4379  *   Pointer to the rte_eth_dev structure.
4380  * @param[in] attr
4381  *   Pointer to the flow attributes.
4382  * @param[in] items
4383  *   Pointer to the list of items.
4384  * @param[in] actions
4385  *   Pointer to the list of actions.
4386  * @param[in] external
4387  *   This flow rule is created by request external to PMD.
4388  * @param[out] error
4389  *   Pointer to the error structure.
4390  *
4391  * @return
4392  *   0 on success, a negative errno value otherwise and rte_errno is set.
4393  */
4394 static int
4395 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4396                  const struct rte_flow_item items[],
4397                  const struct rte_flow_action actions[],
4398                  bool external, struct rte_flow_error *error)
4399 {
4400         int ret;
4401         uint64_t action_flags = 0;
4402         uint64_t item_flags = 0;
4403         uint64_t last_item = 0;
4404         uint8_t next_protocol = 0xff;
4405         uint16_t ether_type = 0;
4406         int actions_n = 0;
4407         uint8_t item_ipv6_proto = 0;
4408         const struct rte_flow_item *gre_item = NULL;
4409         struct rte_flow_item_tcp nic_tcp_mask = {
4410                 .hdr = {
4411                         .tcp_flags = 0xFF,
4412                         .src_port = RTE_BE16(UINT16_MAX),
4413                         .dst_port = RTE_BE16(UINT16_MAX),
4414                 }
4415         };
4416         struct mlx5_priv *priv = dev->data->dev_private;
4417         struct mlx5_dev_config *dev_conf = &priv->config;
4418
4419         if (items == NULL)
4420                 return -1;
4421         ret = flow_dv_validate_attributes(dev, attr, external, error);
4422         if (ret < 0)
4423                 return ret;
4424         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4425                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4426                 int type = items->type;
4427
4428                 switch (type) {
4429                 case RTE_FLOW_ITEM_TYPE_VOID:
4430                         break;
4431                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4432                         ret = flow_dv_validate_item_port_id
4433                                         (dev, items, attr, item_flags, error);
4434                         if (ret < 0)
4435                                 return ret;
4436                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4437                         break;
4438                 case RTE_FLOW_ITEM_TYPE_ETH:
4439                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4440                                                           error);
4441                         if (ret < 0)
4442                                 return ret;
4443                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4444                                              MLX5_FLOW_LAYER_OUTER_L2;
4445                         if (items->mask != NULL && items->spec != NULL) {
4446                                 ether_type =
4447                                         ((const struct rte_flow_item_eth *)
4448                                          items->spec)->type;
4449                                 ether_type &=
4450                                         ((const struct rte_flow_item_eth *)
4451                                          items->mask)->type;
4452                                 ether_type = rte_be_to_cpu_16(ether_type);
4453                         } else {
4454                                 ether_type = 0;
4455                         }
4456                         break;
4457                 case RTE_FLOW_ITEM_TYPE_VLAN:
4458                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4459                                                            dev, error);
4460                         if (ret < 0)
4461                                 return ret;
4462                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4463                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4464                         if (items->mask != NULL && items->spec != NULL) {
4465                                 ether_type =
4466                                         ((const struct rte_flow_item_vlan *)
4467                                          items->spec)->inner_type;
4468                                 ether_type &=
4469                                         ((const struct rte_flow_item_vlan *)
4470                                          items->mask)->inner_type;
4471                                 ether_type = rte_be_to_cpu_16(ether_type);
4472                         } else {
4473                                 ether_type = 0;
4474                         }
4475                         break;
4476                 case RTE_FLOW_ITEM_TYPE_IPV4:
4477                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4478                                                   &item_flags, &tunnel);
4479                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4480                                                            last_item,
4481                                                            ether_type, NULL,
4482                                                            error);
4483                         if (ret < 0)
4484                                 return ret;
4485                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4486                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4487                         if (items->mask != NULL &&
4488                             ((const struct rte_flow_item_ipv4 *)
4489                              items->mask)->hdr.next_proto_id) {
4490                                 next_protocol =
4491                                         ((const struct rte_flow_item_ipv4 *)
4492                                          (items->spec))->hdr.next_proto_id;
4493                                 next_protocol &=
4494                                         ((const struct rte_flow_item_ipv4 *)
4495                                          (items->mask))->hdr.next_proto_id;
4496                         } else {
4497                                 /* Reset for inner layer. */
4498                                 next_protocol = 0xff;
4499                         }
4500                         break;
4501                 case RTE_FLOW_ITEM_TYPE_IPV6:
4502                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4503                                                   &item_flags, &tunnel);
4504                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4505                                                            last_item,
4506                                                            ether_type, NULL,
4507                                                            error);
4508                         if (ret < 0)
4509                                 return ret;
4510                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4511                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4512                         if (items->mask != NULL &&
4513                             ((const struct rte_flow_item_ipv6 *)
4514                              items->mask)->hdr.proto) {
4515                                 item_ipv6_proto =
4516                                         ((const struct rte_flow_item_ipv6 *)
4517                                          items->spec)->hdr.proto;
4518                                 next_protocol =
4519                                         ((const struct rte_flow_item_ipv6 *)
4520                                          items->spec)->hdr.proto;
4521                                 next_protocol &=
4522                                         ((const struct rte_flow_item_ipv6 *)
4523                                          items->mask)->hdr.proto;
4524                         } else {
4525                                 /* Reset for inner layer. */
4526                                 next_protocol = 0xff;
4527                         }
4528                         break;
4529                 case RTE_FLOW_ITEM_TYPE_TCP:
4530                         ret = mlx5_flow_validate_item_tcp
4531                                                 (items, item_flags,
4532                                                  next_protocol,
4533                                                  &nic_tcp_mask,
4534                                                  error);
4535                         if (ret < 0)
4536                                 return ret;
4537                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4538                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4539                         break;
4540                 case RTE_FLOW_ITEM_TYPE_UDP:
4541                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4542                                                           next_protocol,
4543                                                           error);
4544                         if (ret < 0)
4545                                 return ret;
4546                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4547                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4548                         break;
4549                 case RTE_FLOW_ITEM_TYPE_GRE:
4550                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4551                                                           next_protocol, error);
4552                         if (ret < 0)
4553                                 return ret;
4554                         gre_item = items;
4555                         last_item = MLX5_FLOW_LAYER_GRE;
4556                         break;
4557                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4558                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4559                                                             next_protocol,
4560                                                             error);
4561                         if (ret < 0)
4562                                 return ret;
4563                         last_item = MLX5_FLOW_LAYER_NVGRE;
4564                         break;
4565                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4566                         ret = mlx5_flow_validate_item_gre_key
4567                                 (items, item_flags, gre_item, error);
4568                         if (ret < 0)
4569                                 return ret;
4570                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4571                         break;
4572                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4573                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4574                                                             error);
4575                         if (ret < 0)
4576                                 return ret;
4577                         last_item = MLX5_FLOW_LAYER_VXLAN;
4578                         break;
4579                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4580                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4581                                                                 item_flags, dev,
4582                                                                 error);
4583                         if (ret < 0)
4584                                 return ret;
4585                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4586                         break;
4587                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4588                         ret = mlx5_flow_validate_item_geneve(items,
4589                                                              item_flags, dev,
4590                                                              error);
4591                         if (ret < 0)
4592                                 return ret;
4593                         last_item = MLX5_FLOW_LAYER_GENEVE;
4594                         break;
4595                 case RTE_FLOW_ITEM_TYPE_MPLS:
4596                         ret = mlx5_flow_validate_item_mpls(dev, items,
4597                                                            item_flags,
4598                                                            last_item, error);
4599                         if (ret < 0)
4600                                 return ret;
4601                         last_item = MLX5_FLOW_LAYER_MPLS;
4602                         break;
4603
4604                 case RTE_FLOW_ITEM_TYPE_MARK:
4605                         ret = flow_dv_validate_item_mark(dev, items, attr,
4606                                                          error);
4607                         if (ret < 0)
4608                                 return ret;
4609                         last_item = MLX5_FLOW_ITEM_MARK;
4610                         break;
4611                 case RTE_FLOW_ITEM_TYPE_META:
4612                         ret = flow_dv_validate_item_meta(dev, items, attr,
4613                                                          error);
4614                         if (ret < 0)
4615                                 return ret;
4616                         last_item = MLX5_FLOW_ITEM_METADATA;
4617                         break;
4618                 case RTE_FLOW_ITEM_TYPE_ICMP:
4619                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4620                                                            next_protocol,
4621                                                            error);
4622                         if (ret < 0)
4623                                 return ret;
4624                         last_item = MLX5_FLOW_LAYER_ICMP;
4625                         break;
4626                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4627                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4628                                                             next_protocol,
4629                                                             error);
4630                         if (ret < 0)
4631                                 return ret;
4632                         last_item = MLX5_FLOW_LAYER_ICMP6;
4633                         break;
4634                 case RTE_FLOW_ITEM_TYPE_TAG:
4635                         ret = flow_dv_validate_item_tag(dev, items,
4636                                                         attr, error);
4637                         if (ret < 0)
4638                                 return ret;
4639                         last_item = MLX5_FLOW_ITEM_TAG;
4640                         break;
4641                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4642                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4643                         break;
4644                 case RTE_FLOW_ITEM_TYPE_GTP:
4645                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4646                                                         error);
4647                         if (ret < 0)
4648                                 return ret;
4649                         last_item = MLX5_FLOW_LAYER_GTP;
4650                         break;
4651                 default:
4652                         return rte_flow_error_set(error, ENOTSUP,
4653                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4654                                                   NULL, "item not supported");
4655                 }
4656                 item_flags |= last_item;
4657         }
4658         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4659                 int type = actions->type;
4660                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4661                         return rte_flow_error_set(error, ENOTSUP,
4662                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4663                                                   actions, "too many actions");
4664                 switch (type) {
4665                 case RTE_FLOW_ACTION_TYPE_VOID:
4666                         break;
4667                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4668                         ret = flow_dv_validate_action_port_id(dev,
4669                                                               action_flags,
4670                                                               actions,
4671                                                               attr,
4672                                                               error);
4673                         if (ret)
4674                                 return ret;
4675                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4676                         ++actions_n;
4677                         break;
4678                 case RTE_FLOW_ACTION_TYPE_FLAG:
4679                         ret = flow_dv_validate_action_flag(dev, action_flags,
4680                                                            attr, error);
4681                         if (ret < 0)
4682                                 return ret;
4683                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4684                                 /* Count all modify-header actions as one. */
4685                                 if (!(action_flags &
4686                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4687                                         ++actions_n;
4688                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4689                                                 MLX5_FLOW_ACTION_MARK_EXT;
4690                         } else {
4691                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4692                                 ++actions_n;
4693                         }
4694                         break;
4695                 case RTE_FLOW_ACTION_TYPE_MARK:
4696                         ret = flow_dv_validate_action_mark(dev, actions,
4697                                                            action_flags,
4698                                                            attr, error);
4699                         if (ret < 0)
4700                                 return ret;
4701                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4702                                 /* Count all modify-header actions as one. */
4703                                 if (!(action_flags &
4704                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4705                                         ++actions_n;
4706                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4707                                                 MLX5_FLOW_ACTION_MARK_EXT;
4708                         } else {
4709                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4710                                 ++actions_n;
4711                         }
4712                         break;
4713                 case RTE_FLOW_ACTION_TYPE_SET_META:
4714                         ret = flow_dv_validate_action_set_meta(dev, actions,
4715                                                                action_flags,
4716                                                                attr, error);
4717                         if (ret < 0)
4718                                 return ret;
4719                         /* Count all modify-header actions as one action. */
4720                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4721                                 ++actions_n;
4722                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4723                         break;
4724                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4725                         ret = flow_dv_validate_action_set_tag(dev, actions,
4726                                                               action_flags,
4727                                                               attr, error);
4728                         if (ret < 0)
4729                                 return ret;
4730                         /* Count all modify-header actions as one action. */
4731                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4732                                 ++actions_n;
4733                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4734                         break;
4735                 case RTE_FLOW_ACTION_TYPE_DROP:
4736                         ret = mlx5_flow_validate_action_drop(action_flags,
4737                                                              attr, error);
4738                         if (ret < 0)
4739                                 return ret;
4740                         action_flags |= MLX5_FLOW_ACTION_DROP;
4741                         ++actions_n;
4742                         break;
4743                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4744                         ret = mlx5_flow_validate_action_queue(actions,
4745                                                               action_flags, dev,
4746                                                               attr, error);
4747                         if (ret < 0)
4748                                 return ret;
4749                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4750                         ++actions_n;
4751                         break;
4752                 case RTE_FLOW_ACTION_TYPE_RSS:
4753                         ret = mlx5_flow_validate_action_rss(actions,
4754                                                             action_flags, dev,
4755                                                             attr, item_flags,
4756                                                             error);
4757                         if (ret < 0)
4758                                 return ret;
4759                         action_flags |= MLX5_FLOW_ACTION_RSS;
4760                         ++actions_n;
4761                         break;
4762                 case RTE_FLOW_ACTION_TYPE_COUNT:
4763                         ret = flow_dv_validate_action_count(dev, error);
4764                         if (ret < 0)
4765                                 return ret;
4766                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4767                         ++actions_n;
4768                         break;
4769                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4770                         if (flow_dv_validate_action_pop_vlan(dev,
4771                                                              action_flags,
4772                                                              actions,
4773                                                              item_flags, attr,
4774                                                              error))
4775                                 return -rte_errno;
4776                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4777                         ++actions_n;
4778                         break;
4779                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4780                         ret = flow_dv_validate_action_push_vlan(action_flags,
4781                                                                 item_flags,
4782                                                                 actions, attr,
4783                                                                 error);
4784                         if (ret < 0)
4785                                 return ret;
4786                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4787                         ++actions_n;
4788                         break;
4789                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4790                         ret = flow_dv_validate_action_set_vlan_pcp
4791                                                 (action_flags, actions, error);
4792                         if (ret < 0)
4793                                 return ret;
4794                         /* Count PCP with push_vlan command. */
4795                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4796                         break;
4797                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4798                         ret = flow_dv_validate_action_set_vlan_vid
4799                                                 (item_flags, action_flags,
4800                                                  actions, error);
4801                         if (ret < 0)
4802                                 return ret;
4803                         /* Count VID with push_vlan command. */
4804                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4805                         break;
4806                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4807                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4808                         ret = flow_dv_validate_action_l2_encap(action_flags,
4809                                                                actions, attr,
4810                                                                error);
4811                         if (ret < 0)
4812                                 return ret;
4813                         action_flags |= actions->type ==
4814                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4815                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4816                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4817                         ++actions_n;
4818                         break;
4819                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4820                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4821                         ret = flow_dv_validate_action_l2_decap(action_flags,
4822                                                                attr, error);
4823                         if (ret < 0)
4824                                 return ret;
4825                         action_flags |= actions->type ==
4826                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4827                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4828                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4829                         ++actions_n;
4830                         break;
4831                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4832                         ret = flow_dv_validate_action_raw_encap(action_flags,
4833                                                                 actions, attr,
4834                                                                 error);
4835                         if (ret < 0)
4836                                 return ret;
4837                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4838                         ++actions_n;
4839                         break;
4840                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4841                         ret = flow_dv_validate_action_raw_decap(action_flags,
4842                                                                 actions, attr,
4843                                                                 error);
4844                         if (ret < 0)
4845                                 return ret;
4846                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4847                         ++actions_n;
4848                         break;
4849                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4850                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4851                         ret = flow_dv_validate_action_modify_mac(action_flags,
4852                                                                  actions,
4853                                                                  item_flags,
4854                                                                  error);
4855                         if (ret < 0)
4856                                 return ret;
4857                         /* Count all modify-header actions as one action. */
4858                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4859                                 ++actions_n;
4860                         action_flags |= actions->type ==
4861                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4862                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4863                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4864                         break;
4865
4866                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4867                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4868                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4869                                                                   actions,
4870                                                                   item_flags,
4871                                                                   error);
4872                         if (ret < 0)
4873                                 return ret;
4874                         /* Count all modify-header actions as one action. */
4875                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4876                                 ++actions_n;
4877                         action_flags |= actions->type ==
4878                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4879                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4880                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4881                         break;
4882                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4883                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4884                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4885                                                                   actions,
4886                                                                   item_flags,
4887                                                                   error);
4888                         if (ret < 0)
4889                                 return ret;
4890                         if (item_ipv6_proto == IPPROTO_ICMPV6)
4891                                 return rte_flow_error_set(error, ENOTSUP,
4892                                         RTE_FLOW_ERROR_TYPE_ACTION,
4893                                         actions,
4894                                         "Can't change header "
4895                                         "with ICMPv6 proto");
4896                         /* Count all modify-header actions as one action. */
4897                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4898                                 ++actions_n;
4899                         action_flags |= actions->type ==
4900                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4901                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4902                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4903                         break;
4904                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4905                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4906                         ret = flow_dv_validate_action_modify_tp(action_flags,
4907                                                                 actions,
4908                                                                 item_flags,
4909                                                                 error);
4910                         if (ret < 0)
4911                                 return ret;
4912                         /* Count all modify-header actions as one action. */
4913                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4914                                 ++actions_n;
4915                         action_flags |= actions->type ==
4916                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4917                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4918                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4919                         break;
4920                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4921                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4922                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4923                                                                  actions,
4924                                                                  item_flags,
4925                                                                  error);
4926                         if (ret < 0)
4927                                 return ret;
4928                         /* Count all modify-header actions as one action. */
4929                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4930                                 ++actions_n;
4931                         action_flags |= actions->type ==
4932                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4933                                                 MLX5_FLOW_ACTION_SET_TTL :
4934                                                 MLX5_FLOW_ACTION_DEC_TTL;
4935                         break;
4936                 case RTE_FLOW_ACTION_TYPE_JUMP:
4937                         ret = flow_dv_validate_action_jump(actions,
4938                                                            action_flags,
4939                                                            attr, external,
4940                                                            error);
4941                         if (ret)
4942                                 return ret;
4943                         ++actions_n;
4944                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4945                         break;
4946                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4947                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4948                         ret = flow_dv_validate_action_modify_tcp_seq
4949                                                                 (action_flags,
4950                                                                  actions,
4951                                                                  item_flags,
4952                                                                  error);
4953                         if (ret < 0)
4954                                 return ret;
4955                         /* Count all modify-header actions as one action. */
4956                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4957                                 ++actions_n;
4958                         action_flags |= actions->type ==
4959                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4960                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4961                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4962                         break;
4963                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4964                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4965                         ret = flow_dv_validate_action_modify_tcp_ack
4966                                                                 (action_flags,
4967                                                                  actions,
4968                                                                  item_flags,
4969                                                                  error);
4970                         if (ret < 0)
4971                                 return ret;
4972                         /* Count all modify-header actions as one action. */
4973                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4974                                 ++actions_n;
4975                         action_flags |= actions->type ==
4976                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4977                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4978                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4979                         break;
4980                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4981                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4982                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4983                         break;
4984                 case RTE_FLOW_ACTION_TYPE_METER:
4985                         ret = mlx5_flow_validate_action_meter(dev,
4986                                                               action_flags,
4987                                                               actions, attr,
4988                                                               error);
4989                         if (ret < 0)
4990                                 return ret;
4991                         action_flags |= MLX5_FLOW_ACTION_METER;
4992                         ++actions_n;
4993                         break;
4994                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4995                         ret = flow_dv_validate_action_modify_ipv4_dscp
4996                                                          (action_flags,
4997                                                           actions,
4998                                                           item_flags,
4999                                                           error);
5000                         if (ret < 0)
5001                                 return ret;
5002                         /* Count all modify-header actions as one action. */
5003                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5004                                 ++actions_n;
5005                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5006                         break;
5007                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5008                         ret = flow_dv_validate_action_modify_ipv6_dscp
5009                                                                 (action_flags,
5010                                                                  actions,
5011                                                                  item_flags,
5012                                                                  error);
5013                         if (ret < 0)
5014                                 return ret;
5015                         /* Count all modify-header actions as one action. */
5016                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5017                                 ++actions_n;
5018                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5019                         break;
5020                 default:
5021                         return rte_flow_error_set(error, ENOTSUP,
5022                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5023                                                   actions,
5024                                                   "action not supported");
5025                 }
5026         }
5027         /*
5028          * Validate the drop action mutual exclusion with other actions.
5029          * Drop action is mutually-exclusive with any other action, except for
5030          * Count action.
5031          */
5032         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5033             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5034                 return rte_flow_error_set(error, EINVAL,
5035                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5036                                           "Drop action is mutually-exclusive "
5037                                           "with any other action, except for "
5038                                           "Count action");
5039         /* Eswitch has few restrictions on using items and actions */
5040         if (attr->transfer) {
5041                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5042                     action_flags & MLX5_FLOW_ACTION_FLAG)
5043                         return rte_flow_error_set(error, ENOTSUP,
5044                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5045                                                   NULL,
5046                                                   "unsupported action FLAG");
5047                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5048                     action_flags & MLX5_FLOW_ACTION_MARK)
5049                         return rte_flow_error_set(error, ENOTSUP,
5050                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5051                                                   NULL,
5052                                                   "unsupported action MARK");
5053                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5054                         return rte_flow_error_set(error, ENOTSUP,
5055                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5056                                                   NULL,
5057                                                   "unsupported action QUEUE");
5058                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5059                         return rte_flow_error_set(error, ENOTSUP,
5060                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5061                                                   NULL,
5062                                                   "unsupported action RSS");
5063                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5064                         return rte_flow_error_set(error, EINVAL,
5065                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5066                                                   actions,
5067                                                   "no fate action is found");
5068         } else {
5069                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5070                         return rte_flow_error_set(error, EINVAL,
5071                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5072                                                   actions,
5073                                                   "no fate action is found");
5074         }
5075         return 0;
5076 }
5077
5078 /**
5079  * Internal preparation function. Allocates the DV flow size,
5080  * this size is constant.
5081  *
5082  * @param[in] attr
5083  *   Pointer to the flow attributes.
5084  * @param[in] items
5085  *   Pointer to the list of items.
5086  * @param[in] actions
5087  *   Pointer to the list of actions.
5088  * @param[out] error
5089  *   Pointer to the error structure.
5090  *
5091  * @return
5092  *   Pointer to mlx5_flow object on success,
5093  *   otherwise NULL and rte_errno is set.
5094  */
5095 static struct mlx5_flow *
5096 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5097                 const struct rte_flow_item items[] __rte_unused,
5098                 const struct rte_flow_action actions[] __rte_unused,
5099                 struct rte_flow_error *error)
5100 {
5101         size_t size = sizeof(struct mlx5_flow);
5102         struct mlx5_flow *dev_flow;
5103
5104         dev_flow = rte_calloc(__func__, 1, size, 0);
5105         if (!dev_flow) {
5106                 rte_flow_error_set(error, ENOMEM,
5107                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5108                                    "not enough memory to create flow");
5109                 return NULL;
5110         }
5111         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5112         dev_flow->ingress = attr->ingress;
5113         dev_flow->transfer = attr->transfer;
5114         return dev_flow;
5115 }
5116
5117 #ifndef NDEBUG
5118 /**
5119  * Sanity check for match mask and value. Similar to check_valid_spec() in
5120  * kernel driver. If unmasked bit is present in value, it returns failure.
5121  *
5122  * @param match_mask
5123  *   pointer to match mask buffer.
5124  * @param match_value
5125  *   pointer to match value buffer.
5126  *
5127  * @return
5128  *   0 if valid, -EINVAL otherwise.
5129  */
5130 static int
5131 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5132 {
5133         uint8_t *m = match_mask;
5134         uint8_t *v = match_value;
5135         unsigned int i;
5136
5137         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5138                 if (v[i] & ~m[i]) {
5139                         DRV_LOG(ERR,
5140                                 "match_value differs from match_criteria"
5141                                 " %p[%u] != %p[%u]",
5142                                 match_value, i, match_mask, i);
5143                         return -EINVAL;
5144                 }
5145         }
5146         return 0;
5147 }
5148 #endif
5149
5150 /**
5151  * Add Ethernet item to matcher and to the value.
5152  *
5153  * @param[in, out] matcher
5154  *   Flow matcher.
5155  * @param[in, out] key
5156  *   Flow matcher value.
5157  * @param[in] item
5158  *   Flow pattern to translate.
5159  * @param[in] inner
5160  *   Item is inner pattern.
5161  */
5162 static void
5163 flow_dv_translate_item_eth(void *matcher, void *key,
5164                            const struct rte_flow_item *item, int inner)
5165 {
5166         const struct rte_flow_item_eth *eth_m = item->mask;
5167         const struct rte_flow_item_eth *eth_v = item->spec;
5168         const struct rte_flow_item_eth nic_mask = {
5169                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5170                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5171                 .type = RTE_BE16(0xffff),
5172         };
5173         void *headers_m;
5174         void *headers_v;
5175         char *l24_v;
5176         unsigned int i;
5177
5178         if (!eth_v)
5179                 return;
5180         if (!eth_m)
5181                 eth_m = &nic_mask;
5182         if (inner) {
5183                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5184                                          inner_headers);
5185                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5186         } else {
5187                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5188                                          outer_headers);
5189                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5190         }
5191         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5192                &eth_m->dst, sizeof(eth_m->dst));
5193         /* The value must be in the range of the mask. */
5194         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5195         for (i = 0; i < sizeof(eth_m->dst); ++i)
5196                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5197         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5198                &eth_m->src, sizeof(eth_m->src));
5199         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5200         /* The value must be in the range of the mask. */
5201         for (i = 0; i < sizeof(eth_m->dst); ++i)
5202                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5203         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5204                  rte_be_to_cpu_16(eth_m->type));
5205         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5206         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5207 }
5208
5209 /**
5210  * Add VLAN item to matcher and to the value.
5211  *
5212  * @param[in, out] dev_flow
5213  *   Flow descriptor.
5214  * @param[in, out] matcher
5215  *   Flow matcher.
5216  * @param[in, out] key
5217  *   Flow matcher value.
5218  * @param[in] item
5219  *   Flow pattern to translate.
5220  * @param[in] inner
5221  *   Item is inner pattern.
5222  */
5223 static void
5224 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5225                             void *matcher, void *key,
5226                             const struct rte_flow_item *item,
5227                             int inner)
5228 {
5229         const struct rte_flow_item_vlan *vlan_m = item->mask;
5230         const struct rte_flow_item_vlan *vlan_v = item->spec;
5231         void *headers_m;
5232         void *headers_v;
5233         uint16_t tci_m;
5234         uint16_t tci_v;
5235
5236         if (!vlan_v)
5237                 return;
5238         if (!vlan_m)
5239                 vlan_m = &rte_flow_item_vlan_mask;
5240         if (inner) {
5241                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5242                                          inner_headers);
5243                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5244         } else {
5245                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5246                                          outer_headers);
5247                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5248                 /*
5249                  * This is workaround, masks are not supported,
5250                  * and pre-validated.
5251                  */
5252                 dev_flow->dv.vf_vlan.tag =
5253                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5254         }
5255         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5256         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5257         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5258         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5259         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5260         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5261         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5262         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5263         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5264         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5265         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5266                  rte_be_to_cpu_16(vlan_m->inner_type));
5267         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5268                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5269 }
5270
5271 /**
5272  * Add IPV4 item to matcher and to the value.
5273  *
5274  * @param[in, out] matcher
5275  *   Flow matcher.
5276  * @param[in, out] key
5277  *   Flow matcher value.
5278  * @param[in] item
5279  *   Flow pattern to translate.
5280  * @param[in] inner
5281  *   Item is inner pattern.
5282  * @param[in] group
5283  *   The group to insert the rule.
5284  */
5285 static void
5286 flow_dv_translate_item_ipv4(void *matcher, void *key,
5287                             const struct rte_flow_item *item,
5288                             int inner, uint32_t group)
5289 {
5290         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5291         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5292         const struct rte_flow_item_ipv4 nic_mask = {
5293                 .hdr = {
5294                         .src_addr = RTE_BE32(0xffffffff),
5295                         .dst_addr = RTE_BE32(0xffffffff),
5296                         .type_of_service = 0xff,
5297                         .next_proto_id = 0xff,
5298                 },
5299         };
5300         void *headers_m;
5301         void *headers_v;
5302         char *l24_m;
5303         char *l24_v;
5304         uint8_t tos;
5305
5306         if (inner) {
5307                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5308                                          inner_headers);
5309                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5310         } else {
5311                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5312                                          outer_headers);
5313                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5314         }
5315         if (group == 0)
5316                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5317         else
5318                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5319         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5320         if (!ipv4_v)
5321                 return;
5322         if (!ipv4_m)
5323                 ipv4_m = &nic_mask;
5324         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5325                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5326         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5327                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5328         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5329         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5330         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5331                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5332         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5333                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5334         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5335         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5336         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5337         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5338                  ipv4_m->hdr.type_of_service);
5339         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5340         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5341                  ipv4_m->hdr.type_of_service >> 2);
5342         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5343         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5344                  ipv4_m->hdr.next_proto_id);
5345         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5346                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5347 }
5348
5349 /**
5350  * Add IPV6 item to matcher and to the value.
5351  *
5352  * @param[in, out] matcher
5353  *   Flow matcher.
5354  * @param[in, out] key
5355  *   Flow matcher value.
5356  * @param[in] item
5357  *   Flow pattern to translate.
5358  * @param[in] inner
5359  *   Item is inner pattern.
5360  * @param[in] group
5361  *   The group to insert the rule.
5362  */
5363 static void
5364 flow_dv_translate_item_ipv6(void *matcher, void *key,
5365                             const struct rte_flow_item *item,
5366                             int inner, uint32_t group)
5367 {
5368         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5369         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5370         const struct rte_flow_item_ipv6 nic_mask = {
5371                 .hdr = {
5372                         .src_addr =
5373                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5374                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5375                         .dst_addr =
5376                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5377                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5378                         .vtc_flow = RTE_BE32(0xffffffff),
5379                         .proto = 0xff,
5380                         .hop_limits = 0xff,
5381                 },
5382         };
5383         void *headers_m;
5384         void *headers_v;
5385         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5386         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5387         char *l24_m;
5388         char *l24_v;
5389         uint32_t vtc_m;
5390         uint32_t vtc_v;
5391         int i;
5392         int size;
5393
5394         if (inner) {
5395                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5396                                          inner_headers);
5397                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5398         } else {
5399                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5400                                          outer_headers);
5401                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5402         }
5403         if (group == 0)
5404                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5405         else
5406                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5407         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5408         if (!ipv6_v)
5409                 return;
5410         if (!ipv6_m)
5411                 ipv6_m = &nic_mask;
5412         size = sizeof(ipv6_m->hdr.dst_addr);
5413         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5414                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5415         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5416                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5417         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5418         for (i = 0; i < size; ++i)
5419                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5420         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5421                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5422         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5423                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5424         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5425         for (i = 0; i < size; ++i)
5426                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5427         /* TOS. */
5428         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5429         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5430         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5431         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5432         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5433         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5434         /* Label. */
5435         if (inner) {
5436                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5437                          vtc_m);
5438                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5439                          vtc_v);
5440         } else {
5441                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5442                          vtc_m);
5443                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5444                          vtc_v);
5445         }
5446         /* Protocol. */
5447         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5448                  ipv6_m->hdr.proto);
5449         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5450                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5451 }
5452
5453 /**
5454  * Add TCP item to matcher and to the value.
5455  *
5456  * @param[in, out] matcher
5457  *   Flow matcher.
5458  * @param[in, out] key
5459  *   Flow matcher value.
5460  * @param[in] item
5461  *   Flow pattern to translate.
5462  * @param[in] inner
5463  *   Item is inner pattern.
5464  */
5465 static void
5466 flow_dv_translate_item_tcp(void *matcher, void *key,
5467                            const struct rte_flow_item *item,
5468                            int inner)
5469 {
5470         const struct rte_flow_item_tcp *tcp_m = item->mask;
5471         const struct rte_flow_item_tcp *tcp_v = item->spec;
5472         void *headers_m;
5473         void *headers_v;
5474
5475         if (inner) {
5476                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5477                                          inner_headers);
5478                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5479         } else {
5480                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5481                                          outer_headers);
5482                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5483         }
5484         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5485         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5486         if (!tcp_v)
5487                 return;
5488         if (!tcp_m)
5489                 tcp_m = &rte_flow_item_tcp_mask;
5490         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5491                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5492         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5493                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5494         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5495                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5496         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5497                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5498         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5499                  tcp_m->hdr.tcp_flags);
5500         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5501                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5502 }
5503
5504 /**
5505  * Add UDP item to matcher and to the value.
5506  *
5507  * @param[in, out] matcher
5508  *   Flow matcher.
5509  * @param[in, out] key
5510  *   Flow matcher value.
5511  * @param[in] item
5512  *   Flow pattern to translate.
5513  * @param[in] inner
5514  *   Item is inner pattern.
5515  */
5516 static void
5517 flow_dv_translate_item_udp(void *matcher, void *key,
5518                            const struct rte_flow_item *item,
5519                            int inner)
5520 {
5521         const struct rte_flow_item_udp *udp_m = item->mask;
5522         const struct rte_flow_item_udp *udp_v = item->spec;
5523         void *headers_m;
5524         void *headers_v;
5525
5526         if (inner) {
5527                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5528                                          inner_headers);
5529                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5530         } else {
5531                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5532                                          outer_headers);
5533                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5534         }
5535         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5536         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5537         if (!udp_v)
5538                 return;
5539         if (!udp_m)
5540                 udp_m = &rte_flow_item_udp_mask;
5541         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5542                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5543         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5544                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5545         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5546                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5547         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5548                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5549 }
5550
5551 /**
5552  * Add GRE optional Key item to matcher and to the value.
5553  *
5554  * @param[in, out] matcher
5555  *   Flow matcher.
5556  * @param[in, out] key
5557  *   Flow matcher value.
5558  * @param[in] item
5559  *   Flow pattern to translate.
5560  * @param[in] inner
5561  *   Item is inner pattern.
5562  */
5563 static void
5564 flow_dv_translate_item_gre_key(void *matcher, void *key,
5565                                    const struct rte_flow_item *item)
5566 {
5567         const rte_be32_t *key_m = item->mask;
5568         const rte_be32_t *key_v = item->spec;
5569         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5570         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5571         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5572
5573         if (!key_v)
5574                 return;
5575         if (!key_m)
5576                 key_m = &gre_key_default_mask;
5577         /* GRE K bit must be on and should already be validated */
5578         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5579         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5580         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5581                  rte_be_to_cpu_32(*key_m) >> 8);
5582         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5583                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5584         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5585                  rte_be_to_cpu_32(*key_m) & 0xFF);
5586         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5587                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5588 }
5589
5590 /**
5591  * Add GRE item to matcher and to the value.
5592  *
5593  * @param[in, out] matcher
5594  *   Flow matcher.
5595  * @param[in, out] key
5596  *   Flow matcher value.
5597  * @param[in] item
5598  *   Flow pattern to translate.
5599  * @param[in] inner
5600  *   Item is inner pattern.
5601  */
5602 static void
5603 flow_dv_translate_item_gre(void *matcher, void *key,
5604                            const struct rte_flow_item *item,
5605                            int inner)
5606 {
5607         const struct rte_flow_item_gre *gre_m = item->mask;
5608         const struct rte_flow_item_gre *gre_v = item->spec;
5609         void *headers_m;
5610         void *headers_v;
5611         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5612         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5613         struct {
5614                 union {
5615                         __extension__
5616                         struct {
5617                                 uint16_t version:3;
5618                                 uint16_t rsvd0:9;
5619                                 uint16_t s_present:1;
5620                                 uint16_t k_present:1;
5621                                 uint16_t rsvd_bit1:1;
5622                                 uint16_t c_present:1;
5623                         };
5624                         uint16_t value;
5625                 };
5626         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5627
5628         if (inner) {
5629                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5630                                          inner_headers);
5631                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5632         } else {
5633                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5634                                          outer_headers);
5635                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5636         }
5637         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5638         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5639         if (!gre_v)
5640                 return;
5641         if (!gre_m)
5642                 gre_m = &rte_flow_item_gre_mask;
5643         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5644                  rte_be_to_cpu_16(gre_m->protocol));
5645         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5646                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5647         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5648         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5649         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5650                  gre_crks_rsvd0_ver_m.c_present);
5651         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5652                  gre_crks_rsvd0_ver_v.c_present &
5653                  gre_crks_rsvd0_ver_m.c_present);
5654         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5655                  gre_crks_rsvd0_ver_m.k_present);
5656         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5657                  gre_crks_rsvd0_ver_v.k_present &
5658                  gre_crks_rsvd0_ver_m.k_present);
5659         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5660                  gre_crks_rsvd0_ver_m.s_present);
5661         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5662                  gre_crks_rsvd0_ver_v.s_present &
5663                  gre_crks_rsvd0_ver_m.s_present);
5664 }
5665
5666 /**
5667  * Add NVGRE item to matcher and to the value.
5668  *
5669  * @param[in, out] matcher
5670  *   Flow matcher.
5671  * @param[in, out] key
5672  *   Flow matcher value.
5673  * @param[in] item
5674  *   Flow pattern to translate.
5675  * @param[in] inner
5676  *   Item is inner pattern.
5677  */
5678 static void
5679 flow_dv_translate_item_nvgre(void *matcher, void *key,
5680                              const struct rte_flow_item *item,
5681                              int inner)
5682 {
5683         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5684         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5685         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5686         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5687         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5688         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5689         char *gre_key_m;
5690         char *gre_key_v;
5691         int size;
5692         int i;
5693
5694         /* For NVGRE, GRE header fields must be set with defined values. */
5695         const struct rte_flow_item_gre gre_spec = {
5696                 .c_rsvd0_ver = RTE_BE16(0x2000),
5697                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5698         };
5699         const struct rte_flow_item_gre gre_mask = {
5700                 .c_rsvd0_ver = RTE_BE16(0xB000),
5701                 .protocol = RTE_BE16(UINT16_MAX),
5702         };
5703         const struct rte_flow_item gre_item = {
5704                 .spec = &gre_spec,
5705                 .mask = &gre_mask,
5706                 .last = NULL,
5707         };
5708         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5709         if (!nvgre_v)
5710                 return;
5711         if (!nvgre_m)
5712                 nvgre_m = &rte_flow_item_nvgre_mask;
5713         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5714         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5715         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5716         memcpy(gre_key_m, tni_flow_id_m, size);
5717         for (i = 0; i < size; ++i)
5718                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5719 }
5720
5721 /**
5722  * Add VXLAN item to matcher and to the value.
5723  *
5724  * @param[in, out] matcher
5725  *   Flow matcher.
5726  * @param[in, out] key
5727  *   Flow matcher value.
5728  * @param[in] item
5729  *   Flow pattern to translate.
5730  * @param[in] inner
5731  *   Item is inner pattern.
5732  */
5733 static void
5734 flow_dv_translate_item_vxlan(void *matcher, void *key,
5735                              const struct rte_flow_item *item,
5736                              int inner)
5737 {
5738         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5739         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5740         void *headers_m;
5741         void *headers_v;
5742         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5743         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5744         char *vni_m;
5745         char *vni_v;
5746         uint16_t dport;
5747         int size;
5748         int i;
5749
5750         if (inner) {
5751                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5752                                          inner_headers);
5753                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5754         } else {
5755                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5756                                          outer_headers);
5757                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5758         }
5759         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5760                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5761         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5762                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5763                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5764         }
5765         if (!vxlan_v)
5766                 return;
5767         if (!vxlan_m)
5768                 vxlan_m = &rte_flow_item_vxlan_mask;
5769         size = sizeof(vxlan_m->vni);
5770         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5771         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5772         memcpy(vni_m, vxlan_m->vni, size);
5773         for (i = 0; i < size; ++i)
5774                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5775 }
5776
5777 /**
5778  * Add Geneve item to matcher and to the value.
5779  *
5780  * @param[in, out] matcher
5781  *   Flow matcher.
5782  * @param[in, out] key
5783  *   Flow matcher value.
5784  * @param[in] item
5785  *   Flow pattern to translate.
5786  * @param[in] inner
5787  *   Item is inner pattern.
5788  */
5789
5790 static void
5791 flow_dv_translate_item_geneve(void *matcher, void *key,
5792                               const struct rte_flow_item *item, int inner)
5793 {
5794         const struct rte_flow_item_geneve *geneve_m = item->mask;
5795         const struct rte_flow_item_geneve *geneve_v = item->spec;
5796         void *headers_m;
5797         void *headers_v;
5798         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5799         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5800         uint16_t dport;
5801         uint16_t gbhdr_m;
5802         uint16_t gbhdr_v;
5803         char *vni_m;
5804         char *vni_v;
5805         size_t size, i;
5806
5807         if (inner) {
5808                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5809                                          inner_headers);
5810                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5811         } else {
5812                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5813                                          outer_headers);
5814                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5815         }
5816         dport = MLX5_UDP_PORT_GENEVE;
5817         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5818                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5819                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5820         }
5821         if (!geneve_v)
5822                 return;
5823         if (!geneve_m)
5824                 geneve_m = &rte_flow_item_geneve_mask;
5825         size = sizeof(geneve_m->vni);
5826         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5827         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5828         memcpy(vni_m, geneve_m->vni, size);
5829         for (i = 0; i < size; ++i)
5830                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5831         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5832                  rte_be_to_cpu_16(geneve_m->protocol));
5833         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5834                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5835         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5836         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5837         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5838                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5839         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5840                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5841         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5842                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5843         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5844                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5845                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5846 }
5847
5848 /**
5849  * Add MPLS item to matcher and to the value.
5850  *
5851  * @param[in, out] matcher
5852  *   Flow matcher.
5853  * @param[in, out] key
5854  *   Flow matcher value.
5855  * @param[in] item
5856  *   Flow pattern to translate.
5857  * @param[in] prev_layer
5858  *   The protocol layer indicated in previous item.
5859  * @param[in] inner
5860  *   Item is inner pattern.
5861  */
5862 static void
5863 flow_dv_translate_item_mpls(void *matcher, void *key,
5864                             const struct rte_flow_item *item,
5865                             uint64_t prev_layer,
5866                             int inner)
5867 {
5868         const uint32_t *in_mpls_m = item->mask;
5869         const uint32_t *in_mpls_v = item->spec;
5870         uint32_t *out_mpls_m = 0;
5871         uint32_t *out_mpls_v = 0;
5872         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5873         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5874         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5875                                      misc_parameters_2);
5876         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5877         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5878         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5879
5880         switch (prev_layer) {
5881         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5882                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5883                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5884                          MLX5_UDP_PORT_MPLS);
5885                 break;
5886         case MLX5_FLOW_LAYER_GRE:
5887                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5888                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5889                          RTE_ETHER_TYPE_MPLS);
5890                 break;
5891         default:
5892                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5893                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5894                          IPPROTO_MPLS);
5895                 break;
5896         }
5897         if (!in_mpls_v)
5898                 return;
5899         if (!in_mpls_m)
5900                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5901         switch (prev_layer) {
5902         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5903                 out_mpls_m =
5904                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5905                                                  outer_first_mpls_over_udp);
5906                 out_mpls_v =
5907                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5908                                                  outer_first_mpls_over_udp);
5909                 break;
5910         case MLX5_FLOW_LAYER_GRE:
5911                 out_mpls_m =
5912                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5913                                                  outer_first_mpls_over_gre);
5914                 out_mpls_v =
5915                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5916                                                  outer_first_mpls_over_gre);
5917                 break;
5918         default:
5919                 /* Inner MPLS not over GRE is not supported. */
5920                 if (!inner) {
5921                         out_mpls_m =
5922                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5923                                                          misc2_m,
5924                                                          outer_first_mpls);
5925                         out_mpls_v =
5926                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5927                                                          misc2_v,
5928                                                          outer_first_mpls);
5929                 }
5930                 break;
5931         }
5932         if (out_mpls_m && out_mpls_v) {
5933                 *out_mpls_m = *in_mpls_m;
5934                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5935         }
5936 }
5937
5938 /**
5939  * Add metadata register item to matcher
5940  *
5941  * @param[in, out] matcher
5942  *   Flow matcher.
5943  * @param[in, out] key
5944  *   Flow matcher value.
5945  * @param[in] reg_type
5946  *   Type of device metadata register
5947  * @param[in] value
5948  *   Register value
5949  * @param[in] mask
5950  *   Register mask
5951  */
5952 static void
5953 flow_dv_match_meta_reg(void *matcher, void *key,
5954                        enum modify_reg reg_type,
5955                        uint32_t data, uint32_t mask)
5956 {
5957         void *misc2_m =
5958                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5959         void *misc2_v =
5960                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5961         uint32_t temp;
5962
5963         data &= mask;
5964         switch (reg_type) {
5965         case REG_A:
5966                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5967                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5968                 break;
5969         case REG_B:
5970                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5971                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5972                 break;
5973         case REG_C_0:
5974                 /*
5975                  * The metadata register C0 field might be divided into
5976                  * source vport index and META item value, we should set
5977                  * this field according to specified mask, not as whole one.
5978                  */
5979                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
5980                 temp |= mask;
5981                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
5982                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
5983                 temp &= ~mask;
5984                 temp |= data;
5985                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
5986                 break;
5987         case REG_C_1:
5988                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5989                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5990                 break;
5991         case REG_C_2:
5992                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5993                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5994                 break;
5995         case REG_C_3:
5996                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
5997                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
5998                 break;
5999         case REG_C_4:
6000                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6001                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6002                 break;
6003         case REG_C_5:
6004                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6005                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6006                 break;
6007         case REG_C_6:
6008                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6009                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6010                 break;
6011         case REG_C_7:
6012                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6013                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6014                 break;
6015         default:
6016                 assert(false);
6017                 break;
6018         }
6019 }
6020
6021 /**
6022  * Add MARK item to matcher
6023  *
6024  * @param[in] dev
6025  *   The device to configure through.
6026  * @param[in, out] matcher
6027  *   Flow matcher.
6028  * @param[in, out] key
6029  *   Flow matcher value.
6030  * @param[in] item
6031  *   Flow pattern to translate.
6032  */
6033 static void
6034 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6035                             void *matcher, void *key,
6036                             const struct rte_flow_item *item)
6037 {
6038         struct mlx5_priv *priv = dev->data->dev_private;
6039         const struct rte_flow_item_mark *mark;
6040         uint32_t value;
6041         uint32_t mask;
6042
6043         mark = item->mask ? (const void *)item->mask :
6044                             &rte_flow_item_mark_mask;
6045         mask = mark->id & priv->sh->dv_mark_mask;
6046         mark = (const void *)item->spec;
6047         assert(mark);
6048         value = mark->id & priv->sh->dv_mark_mask & mask;
6049         if (mask) {
6050                 enum modify_reg reg;
6051
6052                 /* Get the metadata register index for the mark. */
6053                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6054                 assert(reg > 0);
6055                 if (reg == REG_C_0) {
6056                         struct mlx5_priv *priv = dev->data->dev_private;
6057                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6058                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6059
6060                         mask &= msk_c0;
6061                         mask <<= shl_c0;
6062                         value <<= shl_c0;
6063                 }
6064                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6065         }
6066 }
6067
6068 /**
6069  * Add META item to matcher
6070  *
6071  * @param[in] dev
6072  *   The devich to configure through.
6073  * @param[in, out] matcher
6074  *   Flow matcher.
6075  * @param[in, out] key
6076  *   Flow matcher value.
6077  * @param[in] attr
6078  *   Attributes of flow that includes this item.
6079  * @param[in] item
6080  *   Flow pattern to translate.
6081  */
6082 static void
6083 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6084                             void *matcher, void *key,
6085                             const struct rte_flow_attr *attr,
6086                             const struct rte_flow_item *item)
6087 {
6088         const struct rte_flow_item_meta *meta_m;
6089         const struct rte_flow_item_meta *meta_v;
6090
6091         meta_m = (const void *)item->mask;
6092         if (!meta_m)
6093                 meta_m = &rte_flow_item_meta_mask;
6094         meta_v = (const void *)item->spec;
6095         if (meta_v) {
6096                 int reg;
6097                 uint32_t value = meta_v->data;
6098                 uint32_t mask = meta_m->data;
6099
6100                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6101                 if (reg < 0)
6102                         return;
6103                 /*
6104                  * In datapath code there is no endianness
6105                  * coversions for perfromance reasons, all
6106                  * pattern conversions are done in rte_flow.
6107                  */
6108                 value = rte_cpu_to_be_32(value);
6109                 mask = rte_cpu_to_be_32(mask);
6110                 if (reg == REG_C_0) {
6111                         struct mlx5_priv *priv = dev->data->dev_private;
6112                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6113                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6114 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6115                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6116
6117                         value >>= shr_c0;
6118                         mask >>= shr_c0;
6119 #endif
6120                         value <<= shl_c0;
6121                         mask <<= shl_c0;
6122                         assert(msk_c0);
6123                         assert(!(~msk_c0 & mask));
6124                 }
6125                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6126         }
6127 }
6128
6129 /**
6130  * Add vport metadata Reg C0 item to matcher
6131  *
6132  * @param[in, out] matcher
6133  *   Flow matcher.
6134  * @param[in, out] key
6135  *   Flow matcher value.
6136  * @param[in] reg
6137  *   Flow pattern to translate.
6138  */
6139 static void
6140 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6141                                   uint32_t value, uint32_t mask)
6142 {
6143         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6144 }
6145
6146 /**
6147  * Add tag item to matcher
6148  *
6149  * @param[in] dev
6150  *   The devich to configure through.
6151  * @param[in, out] matcher
6152  *   Flow matcher.
6153  * @param[in, out] key
6154  *   Flow matcher value.
6155  * @param[in] item
6156  *   Flow pattern to translate.
6157  */
6158 static void
6159 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6160                                 void *matcher, void *key,
6161                                 const struct rte_flow_item *item)
6162 {
6163         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6164         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6165         uint32_t mask, value;
6166
6167         assert(tag_v);
6168         value = tag_v->data;
6169         mask = tag_m ? tag_m->data : UINT32_MAX;
6170         if (tag_v->id == REG_C_0) {
6171                 struct mlx5_priv *priv = dev->data->dev_private;
6172                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6173                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6174
6175                 mask &= msk_c0;
6176                 mask <<= shl_c0;
6177                 value <<= shl_c0;
6178         }
6179         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6180 }
6181
6182 /**
6183  * Add TAG item to matcher
6184  *
6185  * @param[in] dev
6186  *   The devich to configure through.
6187  * @param[in, out] matcher
6188  *   Flow matcher.
6189  * @param[in, out] key
6190  *   Flow matcher value.
6191  * @param[in] item
6192  *   Flow pattern to translate.
6193  */
6194 static void
6195 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6196                            void *matcher, void *key,
6197                            const struct rte_flow_item *item)
6198 {
6199         const struct rte_flow_item_tag *tag_v = item->spec;
6200         const struct rte_flow_item_tag *tag_m = item->mask;
6201         enum modify_reg reg;
6202
6203         assert(tag_v);
6204         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6205         /* Get the metadata register index for the tag. */
6206         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6207         assert(reg > 0);
6208         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6209 }
6210
6211 /**
6212  * Add source vport match to the specified matcher.
6213  *
6214  * @param[in, out] matcher
6215  *   Flow matcher.
6216  * @param[in, out] key
6217  *   Flow matcher value.
6218  * @param[in] port
6219  *   Source vport value to match
6220  * @param[in] mask
6221  *   Mask
6222  */
6223 static void
6224 flow_dv_translate_item_source_vport(void *matcher, void *key,
6225                                     int16_t port, uint16_t mask)
6226 {
6227         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6228         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6229
6230         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6231         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6232 }
6233
6234 /**
6235  * Translate port-id item to eswitch match on  port-id.
6236  *
6237  * @param[in] dev
6238  *   The devich to configure through.
6239  * @param[in, out] matcher
6240  *   Flow matcher.
6241  * @param[in, out] key
6242  *   Flow matcher value.
6243  * @param[in] item
6244  *   Flow pattern to translate.
6245  *
6246  * @return
6247  *   0 on success, a negative errno value otherwise.
6248  */
6249 static int
6250 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6251                                void *key, const struct rte_flow_item *item)
6252 {
6253         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6254         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6255         struct mlx5_priv *priv;
6256         uint16_t mask, id;
6257
6258         mask = pid_m ? pid_m->id : 0xffff;
6259         id = pid_v ? pid_v->id : dev->data->port_id;
6260         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6261         if (!priv)
6262                 return -rte_errno;
6263         /* Translate to vport field or to metadata, depending on mode. */
6264         if (priv->vport_meta_mask)
6265                 flow_dv_translate_item_meta_vport(matcher, key,
6266                                                   priv->vport_meta_tag,
6267                                                   priv->vport_meta_mask);
6268         else
6269                 flow_dv_translate_item_source_vport(matcher, key,
6270                                                     priv->vport_id, mask);
6271         return 0;
6272 }
6273
6274 /**
6275  * Add ICMP6 item to matcher and to the value.
6276  *
6277  * @param[in, out] matcher
6278  *   Flow matcher.
6279  * @param[in, out] key
6280  *   Flow matcher value.
6281  * @param[in] item
6282  *   Flow pattern to translate.
6283  * @param[in] inner
6284  *   Item is inner pattern.
6285  */
6286 static void
6287 flow_dv_translate_item_icmp6(void *matcher, void *key,
6288                               const struct rte_flow_item *item,
6289                               int inner)
6290 {
6291         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6292         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6293         void *headers_m;
6294         void *headers_v;
6295         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6296                                      misc_parameters_3);
6297         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6298         if (inner) {
6299                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6300                                          inner_headers);
6301                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6302         } else {
6303                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6304                                          outer_headers);
6305                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6306         }
6307         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6308         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6309         if (!icmp6_v)
6310                 return;
6311         if (!icmp6_m)
6312                 icmp6_m = &rte_flow_item_icmp6_mask;
6313         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6314         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6315                  icmp6_v->type & icmp6_m->type);
6316         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6317         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6318                  icmp6_v->code & icmp6_m->code);
6319 }
6320
6321 /**
6322  * Add ICMP item to matcher and to the value.
6323  *
6324  * @param[in, out] matcher
6325  *   Flow matcher.
6326  * @param[in, out] key
6327  *   Flow matcher value.
6328  * @param[in] item
6329  *   Flow pattern to translate.
6330  * @param[in] inner
6331  *   Item is inner pattern.
6332  */
6333 static void
6334 flow_dv_translate_item_icmp(void *matcher, void *key,
6335                             const struct rte_flow_item *item,
6336                             int inner)
6337 {
6338         const struct rte_flow_item_icmp *icmp_m = item->mask;
6339         const struct rte_flow_item_icmp *icmp_v = item->spec;
6340         void *headers_m;
6341         void *headers_v;
6342         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6343                                      misc_parameters_3);
6344         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6345         if (inner) {
6346                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6347                                          inner_headers);
6348                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6349         } else {
6350                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6351                                          outer_headers);
6352                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6353         }
6354         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6355         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6356         if (!icmp_v)
6357                 return;
6358         if (!icmp_m)
6359                 icmp_m = &rte_flow_item_icmp_mask;
6360         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6361                  icmp_m->hdr.icmp_type);
6362         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6363                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6364         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6365                  icmp_m->hdr.icmp_code);
6366         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6367                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6368 }
6369
6370 /**
6371  * Add GTP item to matcher and to the value.
6372  *
6373  * @param[in, out] matcher
6374  *   Flow matcher.
6375  * @param[in, out] key
6376  *   Flow matcher value.
6377  * @param[in] item
6378  *   Flow pattern to translate.
6379  * @param[in] inner
6380  *   Item is inner pattern.
6381  */
6382 static void
6383 flow_dv_translate_item_gtp(void *matcher, void *key,
6384                            const struct rte_flow_item *item, int inner)
6385 {
6386         const struct rte_flow_item_gtp *gtp_m = item->mask;
6387         const struct rte_flow_item_gtp *gtp_v = item->spec;
6388         void *headers_m;
6389         void *headers_v;
6390         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6391                                      misc_parameters_3);
6392         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6393         uint16_t dport = RTE_GTPU_UDP_PORT;
6394
6395         if (inner) {
6396                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6397                                          inner_headers);
6398                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6399         } else {
6400                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6401                                          outer_headers);
6402                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6403         }
6404         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6405                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6406                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6407         }
6408         if (!gtp_v)
6409                 return;
6410         if (!gtp_m)
6411                 gtp_m = &rte_flow_item_gtp_mask;
6412         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6413         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6414                  gtp_v->msg_type & gtp_m->msg_type);
6415         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6416                  rte_be_to_cpu_32(gtp_m->teid));
6417         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6418                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6419 }
6420
6421 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6422
6423 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6424         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6425                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6426
6427 /**
6428  * Calculate flow matcher enable bitmap.
6429  *
6430  * @param match_criteria
6431  *   Pointer to flow matcher criteria.
6432  *
6433  * @return
6434  *   Bitmap of enabled fields.
6435  */
6436 static uint8_t
6437 flow_dv_matcher_enable(uint32_t *match_criteria)
6438 {
6439         uint8_t match_criteria_enable;
6440
6441         match_criteria_enable =
6442                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6443                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6444         match_criteria_enable |=
6445                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6446                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6447         match_criteria_enable |=
6448                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6449                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6450         match_criteria_enable |=
6451                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6452                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6453         match_criteria_enable |=
6454                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6455                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6456         return match_criteria_enable;
6457 }
6458
6459
6460 /**
6461  * Get a flow table.
6462  *
6463  * @param[in, out] dev
6464  *   Pointer to rte_eth_dev structure.
6465  * @param[in] table_id
6466  *   Table id to use.
6467  * @param[in] egress
6468  *   Direction of the table.
6469  * @param[in] transfer
6470  *   E-Switch or NIC flow.
6471  * @param[out] error
6472  *   pointer to error structure.
6473  *
6474  * @return
6475  *   Returns tables resource based on the index, NULL in case of failed.
6476  */
6477 static struct mlx5_flow_tbl_resource *
6478 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6479                          uint32_t table_id, uint8_t egress,
6480                          uint8_t transfer,
6481                          struct rte_flow_error *error)
6482 {
6483         struct mlx5_priv *priv = dev->data->dev_private;
6484         struct mlx5_ibv_shared *sh = priv->sh;
6485         struct mlx5_flow_tbl_resource *tbl;
6486         union mlx5_flow_tbl_key table_key = {
6487                 {
6488                         .table_id = table_id,
6489                         .reserved = 0,
6490                         .domain = !!transfer,
6491                         .direction = !!egress,
6492                 }
6493         };
6494         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6495                                                          table_key.v64);
6496         struct mlx5_flow_tbl_data_entry *tbl_data;
6497         int ret;
6498         void *domain;
6499
6500         if (pos) {
6501                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6502                                         entry);
6503                 tbl = &tbl_data->tbl;
6504                 rte_atomic32_inc(&tbl->refcnt);
6505                 return tbl;
6506         }
6507         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6508         if (!tbl_data) {
6509                 rte_flow_error_set(error, ENOMEM,
6510                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6511                                    NULL,
6512                                    "cannot allocate flow table data entry");
6513                 return NULL;
6514         }
6515         tbl = &tbl_data->tbl;
6516         pos = &tbl_data->entry;
6517         if (transfer)
6518                 domain = sh->fdb_domain;
6519         else if (egress)
6520                 domain = sh->tx_domain;
6521         else
6522                 domain = sh->rx_domain;
6523         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6524         if (!tbl->obj) {
6525                 rte_flow_error_set(error, ENOMEM,
6526                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6527                                    NULL, "cannot create flow table object");
6528                 rte_free(tbl_data);
6529                 return NULL;
6530         }
6531         /*
6532          * No multi-threads now, but still better to initialize the reference
6533          * count before insert it into the hash list.
6534          */
6535         rte_atomic32_init(&tbl->refcnt);
6536         /* Jump action reference count is initialized here. */
6537         rte_atomic32_init(&tbl_data->jump.refcnt);
6538         pos->key = table_key.v64;
6539         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6540         if (ret < 0) {
6541                 rte_flow_error_set(error, -ret,
6542                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6543                                    "cannot insert flow table data entry");
6544                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6545                 rte_free(tbl_data);
6546         }
6547         rte_atomic32_inc(&tbl->refcnt);
6548         return tbl;
6549 }
6550
6551 /**
6552  * Release a flow table.
6553  *
6554  * @param[in] dev
6555  *   Pointer to rte_eth_dev structure.
6556  * @param[in] tbl
6557  *   Table resource to be released.
6558  *
6559  * @return
6560  *   Returns 0 if table was released, else return 1;
6561  */
6562 static int
6563 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6564                              struct mlx5_flow_tbl_resource *tbl)
6565 {
6566         struct mlx5_priv *priv = dev->data->dev_private;
6567         struct mlx5_ibv_shared *sh = priv->sh;
6568         struct mlx5_flow_tbl_data_entry *tbl_data =
6569                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6570
6571         if (!tbl)
6572                 return 0;
6573         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6574                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6575
6576                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6577                 tbl->obj = NULL;
6578                 /* remove the entry from the hash list and free memory. */
6579                 mlx5_hlist_remove(sh->flow_tbls, pos);
6580                 rte_free(tbl_data);
6581                 return 0;
6582         }
6583         return 1;
6584 }
6585
6586 /**
6587  * Register the flow matcher.
6588  *
6589  * @param[in, out] dev
6590  *   Pointer to rte_eth_dev structure.
6591  * @param[in, out] matcher
6592  *   Pointer to flow matcher.
6593  * @param[in, out] key
6594  *   Pointer to flow table key.
6595  * @parm[in, out] dev_flow
6596  *   Pointer to the dev_flow.
6597  * @param[out] error
6598  *   pointer to error structure.
6599  *
6600  * @return
6601  *   0 on success otherwise -errno and errno is set.
6602  */
6603 static int
6604 flow_dv_matcher_register(struct rte_eth_dev *dev,
6605                          struct mlx5_flow_dv_matcher *matcher,
6606                          union mlx5_flow_tbl_key *key,
6607                          struct mlx5_flow *dev_flow,
6608                          struct rte_flow_error *error)
6609 {
6610         struct mlx5_priv *priv = dev->data->dev_private;
6611         struct mlx5_ibv_shared *sh = priv->sh;
6612         struct mlx5_flow_dv_matcher *cache_matcher;
6613         struct mlx5dv_flow_matcher_attr dv_attr = {
6614                 .type = IBV_FLOW_ATTR_NORMAL,
6615                 .match_mask = (void *)&matcher->mask,
6616         };
6617         struct mlx5_flow_tbl_resource *tbl;
6618         struct mlx5_flow_tbl_data_entry *tbl_data;
6619
6620         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6621                                        key->domain, error);
6622         if (!tbl)
6623                 return -rte_errno;      /* No need to refill the error info */
6624         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6625         /* Lookup from cache. */
6626         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6627                 if (matcher->crc == cache_matcher->crc &&
6628                     matcher->priority == cache_matcher->priority &&
6629                     !memcmp((const void *)matcher->mask.buf,
6630                             (const void *)cache_matcher->mask.buf,
6631                             cache_matcher->mask.size)) {
6632                         DRV_LOG(DEBUG,
6633                                 "%s group %u priority %hd use %s "
6634                                 "matcher %p: refcnt %d++",
6635                                 key->domain ? "FDB" : "NIC", key->table_id,
6636                                 cache_matcher->priority,
6637                                 key->direction ? "tx" : "rx",
6638                                 (void *)cache_matcher,
6639                                 rte_atomic32_read(&cache_matcher->refcnt));
6640                         rte_atomic32_inc(&cache_matcher->refcnt);
6641                         dev_flow->dv.matcher = cache_matcher;
6642                         /* old matcher should not make the table ref++. */
6643                         flow_dv_tbl_resource_release(dev, tbl);
6644                         return 0;
6645                 }
6646         }
6647         /* Register new matcher. */
6648         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6649         if (!cache_matcher) {
6650                 flow_dv_tbl_resource_release(dev, tbl);
6651                 return rte_flow_error_set(error, ENOMEM,
6652                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6653                                           "cannot allocate matcher memory");
6654         }
6655         *cache_matcher = *matcher;
6656         dv_attr.match_criteria_enable =
6657                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6658         dv_attr.priority = matcher->priority;
6659         if (key->direction)
6660                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6661         cache_matcher->matcher_object =
6662                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6663         if (!cache_matcher->matcher_object) {
6664                 rte_free(cache_matcher);
6665 #ifdef HAVE_MLX5DV_DR
6666                 flow_dv_tbl_resource_release(dev, tbl);
6667 #endif
6668                 return rte_flow_error_set(error, ENOMEM,
6669                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6670                                           NULL, "cannot create matcher");
6671         }
6672         /* Save the table information */
6673         cache_matcher->tbl = tbl;
6674         rte_atomic32_init(&cache_matcher->refcnt);
6675         /* only matcher ref++, table ref++ already done above in get API. */
6676         rte_atomic32_inc(&cache_matcher->refcnt);
6677         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6678         dev_flow->dv.matcher = cache_matcher;
6679         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6680                 key->domain ? "FDB" : "NIC", key->table_id,
6681                 cache_matcher->priority,
6682                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6683                 rte_atomic32_read(&cache_matcher->refcnt));
6684         return 0;
6685 }
6686
6687 /**
6688  * Find existing tag resource or create and register a new one.
6689  *
6690  * @param dev[in, out]
6691  *   Pointer to rte_eth_dev structure.
6692  * @param[in, out] tag_be24
6693  *   Tag value in big endian then R-shift 8.
6694  * @parm[in, out] dev_flow
6695  *   Pointer to the dev_flow.
6696  * @param[out] error
6697  *   pointer to error structure.
6698  *
6699  * @return
6700  *   0 on success otherwise -errno and errno is set.
6701  */
6702 static int
6703 flow_dv_tag_resource_register
6704                         (struct rte_eth_dev *dev,
6705                          uint32_t tag_be24,
6706                          struct mlx5_flow *dev_flow,
6707                          struct rte_flow_error *error)
6708 {
6709         struct mlx5_priv *priv = dev->data->dev_private;
6710         struct mlx5_ibv_shared *sh = priv->sh;
6711         struct mlx5_flow_dv_tag_resource *cache_resource;
6712         struct mlx5_hlist_entry *entry;
6713
6714         /* Lookup a matching resource from cache. */
6715         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6716         if (entry) {
6717                 cache_resource = container_of
6718                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6719                 rte_atomic32_inc(&cache_resource->refcnt);
6720                 dev_flow->dv.tag_resource = cache_resource;
6721                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6722                         (void *)cache_resource,
6723                         rte_atomic32_read(&cache_resource->refcnt));
6724                 return 0;
6725         }
6726         /* Register new resource. */
6727         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6728         if (!cache_resource)
6729                 return rte_flow_error_set(error, ENOMEM,
6730                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6731                                           "cannot allocate resource memory");
6732         cache_resource->entry.key = (uint64_t)tag_be24;
6733         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6734         if (!cache_resource->action) {
6735                 rte_free(cache_resource);
6736                 return rte_flow_error_set(error, ENOMEM,
6737                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6738                                           NULL, "cannot create action");
6739         }
6740         rte_atomic32_init(&cache_resource->refcnt);
6741         rte_atomic32_inc(&cache_resource->refcnt);
6742         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6743                 mlx5_glue->destroy_flow_action(cache_resource->action);
6744                 rte_free(cache_resource);
6745                 return rte_flow_error_set(error, EEXIST,
6746                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6747                                           NULL, "cannot insert tag");
6748         }
6749         dev_flow->dv.tag_resource = cache_resource;
6750         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6751                 (void *)cache_resource,
6752                 rte_atomic32_read(&cache_resource->refcnt));
6753         return 0;
6754 }
6755
6756 /**
6757  * Release the tag.
6758  *
6759  * @param dev
6760  *   Pointer to Ethernet device.
6761  * @param flow
6762  *   Pointer to mlx5_flow.
6763  *
6764  * @return
6765  *   1 while a reference on it exists, 0 when freed.
6766  */
6767 static int
6768 flow_dv_tag_release(struct rte_eth_dev *dev,
6769                     struct mlx5_flow_dv_tag_resource *tag)
6770 {
6771         struct mlx5_priv *priv = dev->data->dev_private;
6772         struct mlx5_ibv_shared *sh = priv->sh;
6773
6774         assert(tag);
6775         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6776                 dev->data->port_id, (void *)tag,
6777                 rte_atomic32_read(&tag->refcnt));
6778         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6779                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6780                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6781                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6782                         dev->data->port_id, (void *)tag);
6783                 rte_free(tag);
6784                 return 0;
6785         }
6786         return 1;
6787 }
6788
6789 /**
6790  * Translate port ID action to vport.
6791  *
6792  * @param[in] dev
6793  *   Pointer to rte_eth_dev structure.
6794  * @param[in] action
6795  *   Pointer to the port ID action.
6796  * @param[out] dst_port_id
6797  *   The target port ID.
6798  * @param[out] error
6799  *   Pointer to the error structure.
6800  *
6801  * @return
6802  *   0 on success, a negative errno value otherwise and rte_errno is set.
6803  */
6804 static int
6805 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6806                                  const struct rte_flow_action *action,
6807                                  uint32_t *dst_port_id,
6808                                  struct rte_flow_error *error)
6809 {
6810         uint32_t port;
6811         struct mlx5_priv *priv;
6812         const struct rte_flow_action_port_id *conf =
6813                         (const struct rte_flow_action_port_id *)action->conf;
6814
6815         port = conf->original ? dev->data->port_id : conf->id;
6816         priv = mlx5_port_to_eswitch_info(port, false);
6817         if (!priv)
6818                 return rte_flow_error_set(error, -rte_errno,
6819                                           RTE_FLOW_ERROR_TYPE_ACTION,
6820                                           NULL,
6821                                           "No eswitch info was found for port");
6822 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6823         /*
6824          * This parameter is transferred to
6825          * mlx5dv_dr_action_create_dest_ib_port().
6826          */
6827         *dst_port_id = priv->ibv_port;
6828 #else
6829         /*
6830          * Legacy mode, no LAG configurations is supported.
6831          * This parameter is transferred to
6832          * mlx5dv_dr_action_create_dest_vport().
6833          */
6834         *dst_port_id = priv->vport_id;
6835 #endif
6836         return 0;
6837 }
6838
6839 /**
6840  * Add Tx queue matcher
6841  *
6842  * @param[in] dev
6843  *   Pointer to the dev struct.
6844  * @param[in, out] matcher
6845  *   Flow matcher.
6846  * @param[in, out] key
6847  *   Flow matcher value.
6848  * @param[in] item
6849  *   Flow pattern to translate.
6850  * @param[in] inner
6851  *   Item is inner pattern.
6852  */
6853 static void
6854 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6855                                 void *matcher, void *key,
6856                                 const struct rte_flow_item *item)
6857 {
6858         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6859         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6860         void *misc_m =
6861                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6862         void *misc_v =
6863                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6864         struct mlx5_txq_ctrl *txq;
6865         uint32_t queue;
6866
6867
6868         queue_m = (const void *)item->mask;
6869         if (!queue_m)
6870                 return;
6871         queue_v = (const void *)item->spec;
6872         if (!queue_v)
6873                 return;
6874         txq = mlx5_txq_get(dev, queue_v->queue);
6875         if (!txq)
6876                 return;
6877         queue = txq->obj->sq->id;
6878         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6879         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6880                  queue & queue_m->queue);
6881         mlx5_txq_release(dev, queue_v->queue);
6882 }
6883
6884 /**
6885  * Set the hash fields according to the @p flow information.
6886  *
6887  * @param[in] dev_flow
6888  *   Pointer to the mlx5_flow.
6889  */
6890 static void
6891 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6892 {
6893         struct rte_flow *flow = dev_flow->flow;
6894         uint64_t items = dev_flow->layers;
6895         int rss_inner = 0;
6896         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6897
6898         dev_flow->hash_fields = 0;
6899 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6900         if (flow->rss.level >= 2) {
6901                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6902                 rss_inner = 1;
6903         }
6904 #endif
6905         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6906             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6907                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6908                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6909                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6910                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6911                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6912                         else
6913                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6914                 }
6915         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6916                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6917                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6918                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6919                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
6920                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6921                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
6922                         else
6923                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
6924                 }
6925         }
6926         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
6927             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
6928                 if (rss_types & ETH_RSS_UDP) {
6929                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6930                                 dev_flow->hash_fields |=
6931                                                 IBV_RX_HASH_SRC_PORT_UDP;
6932                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6933                                 dev_flow->hash_fields |=
6934                                                 IBV_RX_HASH_DST_PORT_UDP;
6935                         else
6936                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
6937                 }
6938         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
6939                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
6940                 if (rss_types & ETH_RSS_TCP) {
6941                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6942                                 dev_flow->hash_fields |=
6943                                                 IBV_RX_HASH_SRC_PORT_TCP;
6944                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6945                                 dev_flow->hash_fields |=
6946                                                 IBV_RX_HASH_DST_PORT_TCP;
6947                         else
6948                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
6949                 }
6950         }
6951 }
6952
6953 /**
6954  * Fill the flow with DV spec, lock free
6955  * (mutex should be acquired by caller).
6956  *
6957  * @param[in] dev
6958  *   Pointer to rte_eth_dev structure.
6959  * @param[in, out] dev_flow
6960  *   Pointer to the sub flow.
6961  * @param[in] attr
6962  *   Pointer to the flow attributes.
6963  * @param[in] items
6964  *   Pointer to the list of items.
6965  * @param[in] actions
6966  *   Pointer to the list of actions.
6967  * @param[out] error
6968  *   Pointer to the error structure.
6969  *
6970  * @return
6971  *   0 on success, a negative errno value otherwise and rte_errno is set.
6972  */
6973 static int
6974 __flow_dv_translate(struct rte_eth_dev *dev,
6975                     struct mlx5_flow *dev_flow,
6976                     const struct rte_flow_attr *attr,
6977                     const struct rte_flow_item items[],
6978                     const struct rte_flow_action actions[],
6979                     struct rte_flow_error *error)
6980 {
6981         struct mlx5_priv *priv = dev->data->dev_private;
6982         struct mlx5_dev_config *dev_conf = &priv->config;
6983         struct rte_flow *flow = dev_flow->flow;
6984         uint64_t item_flags = 0;
6985         uint64_t last_item = 0;
6986         uint64_t action_flags = 0;
6987         uint64_t priority = attr->priority;
6988         struct mlx5_flow_dv_matcher matcher = {
6989                 .mask = {
6990                         .size = sizeof(matcher.mask.buf),
6991                 },
6992         };
6993         int actions_n = 0;
6994         bool actions_end = false;
6995         union {
6996                 struct mlx5_flow_dv_modify_hdr_resource res;
6997                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
6998                             sizeof(struct mlx5_modification_cmd) *
6999                             (MLX5_MAX_MODIFY_NUM + 1)];
7000         } mhdr_dummy;
7001         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7002         union flow_dv_attr flow_attr = { .attr = 0 };
7003         uint32_t tag_be;
7004         union mlx5_flow_tbl_key tbl_key;
7005         uint32_t modify_action_position = UINT32_MAX;
7006         void *match_mask = matcher.mask.buf;
7007         void *match_value = dev_flow->dv.value.buf;
7008         uint8_t next_protocol = 0xff;
7009         struct rte_vlan_hdr vlan = { 0 };
7010         uint32_t table;
7011         int ret = 0;
7012
7013         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7014                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7015         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7016                                        &table, error);
7017         if (ret)
7018                 return ret;
7019         dev_flow->group = table;
7020         if (attr->transfer)
7021                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7022         if (priority == MLX5_FLOW_PRIO_RSVD)
7023                 priority = dev_conf->flow_prio - 1;
7024         /* number of actions must be set to 0 in case of dirty stack. */
7025         mhdr_res->actions_num = 0;
7026         for (; !actions_end ; actions++) {
7027                 const struct rte_flow_action_queue *queue;
7028                 const struct rte_flow_action_rss *rss;
7029                 const struct rte_flow_action *action = actions;
7030                 const struct rte_flow_action_count *count = action->conf;
7031                 const uint8_t *rss_key;
7032                 const struct rte_flow_action_jump *jump_data;
7033                 const struct rte_flow_action_meter *mtr;
7034                 struct mlx5_flow_tbl_resource *tbl;
7035                 uint32_t port_id = 0;
7036                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7037                 int action_type = actions->type;
7038                 const struct rte_flow_action *found_action = NULL;
7039
7040                 switch (action_type) {
7041                 case RTE_FLOW_ACTION_TYPE_VOID:
7042                         break;
7043                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7044                         if (flow_dv_translate_action_port_id(dev, action,
7045                                                              &port_id, error))
7046                                 return -rte_errno;
7047                         port_id_resource.port_id = port_id;
7048                         if (flow_dv_port_id_action_resource_register
7049                             (dev, &port_id_resource, dev_flow, error))
7050                                 return -rte_errno;
7051                         dev_flow->dv.actions[actions_n++] =
7052                                 dev_flow->dv.port_id_action->action;
7053                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7054                         break;
7055                 case RTE_FLOW_ACTION_TYPE_FLAG:
7056                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7057                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7058                                 struct rte_flow_action_mark mark = {
7059                                         .id = MLX5_FLOW_MARK_DEFAULT,
7060                                 };
7061
7062                                 if (flow_dv_convert_action_mark(dev, &mark,
7063                                                                 mhdr_res,
7064                                                                 error))
7065                                         return -rte_errno;
7066                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7067                                 break;
7068                         }
7069                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7070                         if (!dev_flow->dv.tag_resource)
7071                                 if (flow_dv_tag_resource_register
7072                                     (dev, tag_be, dev_flow, error))
7073                                         return -rte_errno;
7074                         dev_flow->dv.actions[actions_n++] =
7075                                 dev_flow->dv.tag_resource->action;
7076                         break;
7077                 case RTE_FLOW_ACTION_TYPE_MARK:
7078                         action_flags |= MLX5_FLOW_ACTION_MARK;
7079                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7080                                 const struct rte_flow_action_mark *mark =
7081                                         (const struct rte_flow_action_mark *)
7082                                                 actions->conf;
7083
7084                                 if (flow_dv_convert_action_mark(dev, mark,
7085                                                                 mhdr_res,
7086                                                                 error))
7087                                         return -rte_errno;
7088                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7089                                 break;
7090                         }
7091                         /* Fall-through */
7092                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7093                         /* Legacy (non-extensive) MARK action. */
7094                         tag_be = mlx5_flow_mark_set
7095                               (((const struct rte_flow_action_mark *)
7096                                (actions->conf))->id);
7097                         if (!dev_flow->dv.tag_resource)
7098                                 if (flow_dv_tag_resource_register
7099                                     (dev, tag_be, dev_flow, error))
7100                                         return -rte_errno;
7101                         dev_flow->dv.actions[actions_n++] =
7102                                 dev_flow->dv.tag_resource->action;
7103                         break;
7104                 case RTE_FLOW_ACTION_TYPE_SET_META:
7105                         if (flow_dv_convert_action_set_meta
7106                                 (dev, mhdr_res, attr,
7107                                  (const struct rte_flow_action_set_meta *)
7108                                   actions->conf, error))
7109                                 return -rte_errno;
7110                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7111                         break;
7112                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7113                         if (flow_dv_convert_action_set_tag
7114                                 (dev, mhdr_res,
7115                                  (const struct rte_flow_action_set_tag *)
7116                                   actions->conf, error))
7117                                 return -rte_errno;
7118                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7119                         break;
7120                 case RTE_FLOW_ACTION_TYPE_DROP:
7121                         action_flags |= MLX5_FLOW_ACTION_DROP;
7122                         break;
7123                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7124                         assert(flow->rss.queue);
7125                         queue = actions->conf;
7126                         flow->rss.queue_num = 1;
7127                         (*flow->rss.queue)[0] = queue->index;
7128                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7129                         break;
7130                 case RTE_FLOW_ACTION_TYPE_RSS:
7131                         assert(flow->rss.queue);
7132                         rss = actions->conf;
7133                         if (flow->rss.queue)
7134                                 memcpy((*flow->rss.queue), rss->queue,
7135                                        rss->queue_num * sizeof(uint16_t));
7136                         flow->rss.queue_num = rss->queue_num;
7137                         /* NULL RSS key indicates default RSS key. */
7138                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7139                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7140                         /*
7141                          * rss->level and rss.types should be set in advance
7142                          * when expanding items for RSS.
7143                          */
7144                         action_flags |= MLX5_FLOW_ACTION_RSS;
7145                         break;
7146                 case RTE_FLOW_ACTION_TYPE_COUNT:
7147                         if (!dev_conf->devx) {
7148                                 rte_errno = ENOTSUP;
7149                                 goto cnt_err;
7150                         }
7151                         flow->counter = flow_dv_counter_alloc(dev,
7152                                                               count->shared,
7153                                                               count->id,
7154                                                               dev_flow->group);
7155                         if (flow->counter == NULL)
7156                                 goto cnt_err;
7157                         dev_flow->dv.actions[actions_n++] =
7158                                 flow->counter->action;
7159                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7160                         break;
7161 cnt_err:
7162                         if (rte_errno == ENOTSUP)
7163                                 return rte_flow_error_set
7164                                               (error, ENOTSUP,
7165                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7166                                                NULL,
7167                                                "count action not supported");
7168                         else
7169                                 return rte_flow_error_set
7170                                                 (error, rte_errno,
7171                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7172                                                  action,
7173                                                  "cannot create counter"
7174                                                   " object.");
7175                         break;
7176                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7177                         dev_flow->dv.actions[actions_n++] =
7178                                                 priv->sh->pop_vlan_action;
7179                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7180                         break;
7181                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7182                         flow_dev_get_vlan_info_from_items(items, &vlan);
7183                         vlan.eth_proto = rte_be_to_cpu_16
7184                              ((((const struct rte_flow_action_of_push_vlan *)
7185                                                    actions->conf)->ethertype));
7186                         found_action = mlx5_flow_find_action
7187                                         (actions + 1,
7188                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7189                         if (found_action)
7190                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7191                         found_action = mlx5_flow_find_action
7192                                         (actions + 1,
7193                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7194                         if (found_action)
7195                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7196                         if (flow_dv_create_action_push_vlan
7197                                             (dev, attr, &vlan, dev_flow, error))
7198                                 return -rte_errno;
7199                         dev_flow->dv.actions[actions_n++] =
7200                                            dev_flow->dv.push_vlan_res->action;
7201                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7202                         break;
7203                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7204                         /* of_vlan_push action handled this action */
7205                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7206                         break;
7207                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7208                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7209                                 break;
7210                         flow_dev_get_vlan_info_from_items(items, &vlan);
7211                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7212                         /* If no VLAN push - this is a modify header action */
7213                         if (flow_dv_convert_action_modify_vlan_vid
7214                                                 (mhdr_res, actions, error))
7215                                 return -rte_errno;
7216                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7217                         break;
7218                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7219                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7220                         if (flow_dv_create_action_l2_encap(dev, actions,
7221                                                            dev_flow,
7222                                                            attr->transfer,
7223                                                            error))
7224                                 return -rte_errno;
7225                         dev_flow->dv.actions[actions_n++] =
7226                                 dev_flow->dv.encap_decap->verbs_action;
7227                         action_flags |= actions->type ==
7228                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
7229                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
7230                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
7231                         break;
7232                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7233                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7234                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7235                                                            attr->transfer,
7236                                                            error))
7237                                 return -rte_errno;
7238                         dev_flow->dv.actions[actions_n++] =
7239                                 dev_flow->dv.encap_decap->verbs_action;
7240                         action_flags |= actions->type ==
7241                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
7242                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
7243                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
7244                         break;
7245                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7246                         /* Handle encap with preceding decap. */
7247                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
7248                                 if (flow_dv_create_action_raw_encap
7249                                         (dev, actions, dev_flow, attr, error))
7250                                         return -rte_errno;
7251                                 dev_flow->dv.actions[actions_n++] =
7252                                         dev_flow->dv.encap_decap->verbs_action;
7253                         } else {
7254                                 /* Handle encap without preceding decap. */
7255                                 if (flow_dv_create_action_l2_encap
7256                                     (dev, actions, dev_flow, attr->transfer,
7257                                      error))
7258                                         return -rte_errno;
7259                                 dev_flow->dv.actions[actions_n++] =
7260                                         dev_flow->dv.encap_decap->verbs_action;
7261                         }
7262                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
7263                         break;
7264                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7265                         /* Check if this decap is followed by encap. */
7266                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
7267                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
7268                                action++) {
7269                         }
7270                         /* Handle decap only if it isn't followed by encap. */
7271                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7272                                 if (flow_dv_create_action_l2_decap
7273                                     (dev, dev_flow, attr->transfer, error))
7274                                         return -rte_errno;
7275                                 dev_flow->dv.actions[actions_n++] =
7276                                         dev_flow->dv.encap_decap->verbs_action;
7277                         }
7278                         /* If decap is followed by encap, handle it at encap. */
7279                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
7280                         break;
7281                 case RTE_FLOW_ACTION_TYPE_JUMP:
7282                         jump_data = action->conf;
7283                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7284                                                        jump_data->group, &table,
7285                                                        error);
7286                         if (ret)
7287                                 return ret;
7288                         tbl = flow_dv_tbl_resource_get(dev, table,
7289                                                        attr->egress,
7290                                                        attr->transfer, error);
7291                         if (!tbl)
7292                                 return rte_flow_error_set
7293                                                 (error, errno,
7294                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7295                                                  NULL,
7296                                                  "cannot create jump action.");
7297                         if (flow_dv_jump_tbl_resource_register
7298                             (dev, tbl, dev_flow, error)) {
7299                                 flow_dv_tbl_resource_release(dev, tbl);
7300                                 return rte_flow_error_set
7301                                                 (error, errno,
7302                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7303                                                  NULL,
7304                                                  "cannot create jump action.");
7305                         }
7306                         dev_flow->dv.actions[actions_n++] =
7307                                 dev_flow->dv.jump->action;
7308                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7309                         break;
7310                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7311                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7312                         if (flow_dv_convert_action_modify_mac
7313                                         (mhdr_res, actions, error))
7314                                 return -rte_errno;
7315                         action_flags |= actions->type ==
7316                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7317                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7318                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7319                         break;
7320                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7321                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7322                         if (flow_dv_convert_action_modify_ipv4
7323                                         (mhdr_res, actions, error))
7324                                 return -rte_errno;
7325                         action_flags |= actions->type ==
7326                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7327                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7328                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7329                         break;
7330                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7331                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7332                         if (flow_dv_convert_action_modify_ipv6
7333                                         (mhdr_res, actions, error))
7334                                 return -rte_errno;
7335                         action_flags |= actions->type ==
7336                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7337                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7338                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7339                         break;
7340                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7341                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7342                         if (flow_dv_convert_action_modify_tp
7343                                         (mhdr_res, actions, items,
7344                                          &flow_attr, error))
7345                                 return -rte_errno;
7346                         action_flags |= actions->type ==
7347                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7348                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7349                                         MLX5_FLOW_ACTION_SET_TP_DST;
7350                         break;
7351                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7352                         if (flow_dv_convert_action_modify_dec_ttl
7353                                         (mhdr_res, items, &flow_attr, error))
7354                                 return -rte_errno;
7355                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7356                         break;
7357                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7358                         if (flow_dv_convert_action_modify_ttl
7359                                         (mhdr_res, actions, items,
7360                                          &flow_attr, error))
7361                                 return -rte_errno;
7362                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7363                         break;
7364                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7365                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7366                         if (flow_dv_convert_action_modify_tcp_seq
7367                                         (mhdr_res, actions, error))
7368                                 return -rte_errno;
7369                         action_flags |= actions->type ==
7370                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7371                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7372                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7373                         break;
7374
7375                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7376                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7377                         if (flow_dv_convert_action_modify_tcp_ack
7378                                         (mhdr_res, actions, error))
7379                                 return -rte_errno;
7380                         action_flags |= actions->type ==
7381                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7382                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7383                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7384                         break;
7385                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7386                         if (flow_dv_convert_action_set_reg
7387                                         (mhdr_res, actions, error))
7388                                 return -rte_errno;
7389                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7390                         break;
7391                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7392                         if (flow_dv_convert_action_copy_mreg
7393                                         (dev, mhdr_res, actions, error))
7394                                 return -rte_errno;
7395                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7396                         break;
7397                 case RTE_FLOW_ACTION_TYPE_METER:
7398                         mtr = actions->conf;
7399                         if (!flow->meter) {
7400                                 flow->meter = mlx5_flow_meter_attach(priv,
7401                                                         mtr->mtr_id, attr,
7402                                                         error);
7403                                 if (!flow->meter)
7404                                         return rte_flow_error_set(error,
7405                                                 rte_errno,
7406                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7407                                                 NULL,
7408                                                 "meter not found "
7409                                                 "or invalid parameters");
7410                         }
7411                         /* Set the meter action. */
7412                         dev_flow->dv.actions[actions_n++] =
7413                                 flow->meter->mfts->meter_action;
7414                         action_flags |= MLX5_FLOW_ACTION_METER;
7415                         break;
7416                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7417                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7418                                                               actions, error))
7419                                 return -rte_errno;
7420                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7421                         break;
7422                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7423                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7424                                                               actions, error))
7425                                 return -rte_errno;
7426                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7427                         break;
7428                 case RTE_FLOW_ACTION_TYPE_END:
7429                         actions_end = true;
7430                         if (mhdr_res->actions_num) {
7431                                 /* create modify action if needed. */
7432                                 if (flow_dv_modify_hdr_resource_register
7433                                         (dev, mhdr_res, dev_flow, error))
7434                                         return -rte_errno;
7435                                 dev_flow->dv.actions[modify_action_position] =
7436                                         dev_flow->dv.modify_hdr->verbs_action;
7437                         }
7438                         break;
7439                 default:
7440                         break;
7441                 }
7442                 if (mhdr_res->actions_num &&
7443                     modify_action_position == UINT32_MAX)
7444                         modify_action_position = actions_n++;
7445         }
7446         dev_flow->dv.actions_n = actions_n;
7447         dev_flow->actions = action_flags;
7448         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7449                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7450                 int item_type = items->type;
7451
7452                 switch (item_type) {
7453                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7454                         flow_dv_translate_item_port_id(dev, match_mask,
7455                                                        match_value, items);
7456                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7457                         break;
7458                 case RTE_FLOW_ITEM_TYPE_ETH:
7459                         flow_dv_translate_item_eth(match_mask, match_value,
7460                                                    items, tunnel);
7461                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7462                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7463                                              MLX5_FLOW_LAYER_OUTER_L2;
7464                         break;
7465                 case RTE_FLOW_ITEM_TYPE_VLAN:
7466                         flow_dv_translate_item_vlan(dev_flow,
7467                                                     match_mask, match_value,
7468                                                     items, tunnel);
7469                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7470                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7471                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7472                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7473                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7474                         break;
7475                 case RTE_FLOW_ITEM_TYPE_IPV4:
7476                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7477                                                   &item_flags, &tunnel);
7478                         flow_dv_translate_item_ipv4(match_mask, match_value,
7479                                                     items, tunnel,
7480                                                     dev_flow->group);
7481                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7482                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7483                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7484                         if (items->mask != NULL &&
7485                             ((const struct rte_flow_item_ipv4 *)
7486                              items->mask)->hdr.next_proto_id) {
7487                                 next_protocol =
7488                                         ((const struct rte_flow_item_ipv4 *)
7489                                          (items->spec))->hdr.next_proto_id;
7490                                 next_protocol &=
7491                                         ((const struct rte_flow_item_ipv4 *)
7492                                          (items->mask))->hdr.next_proto_id;
7493                         } else {
7494                                 /* Reset for inner layer. */
7495                                 next_protocol = 0xff;
7496                         }
7497                         break;
7498                 case RTE_FLOW_ITEM_TYPE_IPV6:
7499                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7500                                                   &item_flags, &tunnel);
7501                         flow_dv_translate_item_ipv6(match_mask, match_value,
7502                                                     items, tunnel,
7503                                                     dev_flow->group);
7504                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7505                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7506                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7507                         if (items->mask != NULL &&
7508                             ((const struct rte_flow_item_ipv6 *)
7509                              items->mask)->hdr.proto) {
7510                                 next_protocol =
7511                                         ((const struct rte_flow_item_ipv6 *)
7512                                          items->spec)->hdr.proto;
7513                                 next_protocol &=
7514                                         ((const struct rte_flow_item_ipv6 *)
7515                                          items->mask)->hdr.proto;
7516                         } else {
7517                                 /* Reset for inner layer. */
7518                                 next_protocol = 0xff;
7519                         }
7520                         break;
7521                 case RTE_FLOW_ITEM_TYPE_TCP:
7522                         flow_dv_translate_item_tcp(match_mask, match_value,
7523                                                    items, tunnel);
7524                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7525                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7526                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7527                         break;
7528                 case RTE_FLOW_ITEM_TYPE_UDP:
7529                         flow_dv_translate_item_udp(match_mask, match_value,
7530                                                    items, tunnel);
7531                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7532                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7533                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7534                         break;
7535                 case RTE_FLOW_ITEM_TYPE_GRE:
7536                         flow_dv_translate_item_gre(match_mask, match_value,
7537                                                    items, tunnel);
7538                         last_item = MLX5_FLOW_LAYER_GRE;
7539                         break;
7540                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7541                         flow_dv_translate_item_gre_key(match_mask,
7542                                                        match_value, items);
7543                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7544                         break;
7545                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7546                         flow_dv_translate_item_nvgre(match_mask, match_value,
7547                                                      items, tunnel);
7548                         last_item = MLX5_FLOW_LAYER_GRE;
7549                         break;
7550                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7551                         flow_dv_translate_item_vxlan(match_mask, match_value,
7552                                                      items, tunnel);
7553                         last_item = MLX5_FLOW_LAYER_VXLAN;
7554                         break;
7555                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7556                         flow_dv_translate_item_vxlan(match_mask, match_value,
7557                                                      items, tunnel);
7558                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7559                         break;
7560                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7561                         flow_dv_translate_item_geneve(match_mask, match_value,
7562                                                       items, tunnel);
7563                         last_item = MLX5_FLOW_LAYER_GENEVE;
7564                         break;
7565                 case RTE_FLOW_ITEM_TYPE_MPLS:
7566                         flow_dv_translate_item_mpls(match_mask, match_value,
7567                                                     items, last_item, tunnel);
7568                         last_item = MLX5_FLOW_LAYER_MPLS;
7569                         break;
7570                 case RTE_FLOW_ITEM_TYPE_MARK:
7571                         flow_dv_translate_item_mark(dev, match_mask,
7572                                                     match_value, items);
7573                         last_item = MLX5_FLOW_ITEM_MARK;
7574                         break;
7575                 case RTE_FLOW_ITEM_TYPE_META:
7576                         flow_dv_translate_item_meta(dev, match_mask,
7577                                                     match_value, attr, items);
7578                         last_item = MLX5_FLOW_ITEM_METADATA;
7579                         break;
7580                 case RTE_FLOW_ITEM_TYPE_ICMP:
7581                         flow_dv_translate_item_icmp(match_mask, match_value,
7582                                                     items, tunnel);
7583                         last_item = MLX5_FLOW_LAYER_ICMP;
7584                         break;
7585                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7586                         flow_dv_translate_item_icmp6(match_mask, match_value,
7587                                                       items, tunnel);
7588                         last_item = MLX5_FLOW_LAYER_ICMP6;
7589                         break;
7590                 case RTE_FLOW_ITEM_TYPE_TAG:
7591                         flow_dv_translate_item_tag(dev, match_mask,
7592                                                    match_value, items);
7593                         last_item = MLX5_FLOW_ITEM_TAG;
7594                         break;
7595                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7596                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7597                                                         match_value, items);
7598                         last_item = MLX5_FLOW_ITEM_TAG;
7599                         break;
7600                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7601                         flow_dv_translate_item_tx_queue(dev, match_mask,
7602                                                         match_value,
7603                                                         items);
7604                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7605                         break;
7606                 case RTE_FLOW_ITEM_TYPE_GTP:
7607                         flow_dv_translate_item_gtp(match_mask, match_value,
7608                                                    items, tunnel);
7609                         last_item = MLX5_FLOW_LAYER_GTP;
7610                         break;
7611                 default:
7612                         break;
7613                 }
7614                 item_flags |= last_item;
7615         }
7616         /*
7617          * When E-Switch mode is enabled, we have two cases where we need to
7618          * set the source port manually.
7619          * The first one, is in case of Nic steering rule, and the second is
7620          * E-Switch rule where no port_id item was found. In both cases
7621          * the source port is set according the current port in use.
7622          */
7623         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
7624             (priv->representor || priv->master)) {
7625                 if (flow_dv_translate_item_port_id(dev, match_mask,
7626                                                    match_value, NULL))
7627                         return -rte_errno;
7628         }
7629         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7630                                          dev_flow->dv.value.buf));
7631         dev_flow->layers = item_flags;
7632         if (action_flags & MLX5_FLOW_ACTION_RSS)
7633                 flow_dv_hashfields_set(dev_flow);
7634         /* Register matcher. */
7635         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7636                                     matcher.mask.size);
7637         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7638                                                      matcher.priority);
7639         /* reserved field no needs to be set to 0 here. */
7640         tbl_key.domain = attr->transfer;
7641         tbl_key.direction = attr->egress;
7642         tbl_key.table_id = dev_flow->group;
7643         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7644                 return -rte_errno;
7645         return 0;
7646 }
7647
7648 /**
7649  * Apply the flow to the NIC, lock free,
7650  * (mutex should be acquired by caller).
7651  *
7652  * @param[in] dev
7653  *   Pointer to the Ethernet device structure.
7654  * @param[in, out] flow
7655  *   Pointer to flow structure.
7656  * @param[out] error
7657  *   Pointer to error structure.
7658  *
7659  * @return
7660  *   0 on success, a negative errno value otherwise and rte_errno is set.
7661  */
7662 static int
7663 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7664                 struct rte_flow_error *error)
7665 {
7666         struct mlx5_flow_dv *dv;
7667         struct mlx5_flow *dev_flow;
7668         struct mlx5_priv *priv = dev->data->dev_private;
7669         int n;
7670         int err;
7671
7672         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7673                 dv = &dev_flow->dv;
7674                 n = dv->actions_n;
7675                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7676                         if (dev_flow->transfer) {
7677                                 dv->actions[n++] = priv->sh->esw_drop_action;
7678                         } else {
7679                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7680                                 if (!dv->hrxq) {
7681                                         rte_flow_error_set
7682                                                 (error, errno,
7683                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7684                                                  NULL,
7685                                                  "cannot get drop hash queue");
7686                                         goto error;
7687                                 }
7688                                 dv->actions[n++] = dv->hrxq->action;
7689                         }
7690                 } else if (dev_flow->actions &
7691                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7692                         struct mlx5_hrxq *hrxq;
7693
7694                         assert(flow->rss.queue);
7695                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7696                                              MLX5_RSS_HASH_KEY_LEN,
7697                                              dev_flow->hash_fields,
7698                                              (*flow->rss.queue),
7699                                              flow->rss.queue_num);
7700                         if (!hrxq) {
7701                                 hrxq = mlx5_hrxq_new
7702                                         (dev, flow->rss.key,
7703                                          MLX5_RSS_HASH_KEY_LEN,
7704                                          dev_flow->hash_fields,
7705                                          (*flow->rss.queue),
7706                                          flow->rss.queue_num,
7707                                          !!(dev_flow->layers &
7708                                             MLX5_FLOW_LAYER_TUNNEL));
7709                         }
7710                         if (!hrxq) {
7711                                 rte_flow_error_set
7712                                         (error, rte_errno,
7713                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7714                                          "cannot get hash queue");
7715                                 goto error;
7716                         }
7717                         dv->hrxq = hrxq;
7718                         dv->actions[n++] = dv->hrxq->action;
7719                 }
7720                 dv->flow =
7721                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7722                                                   (void *)&dv->value, n,
7723                                                   dv->actions);
7724                 if (!dv->flow) {
7725                         rte_flow_error_set(error, errno,
7726                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7727                                            NULL,
7728                                            "hardware refuses to create flow");
7729                         goto error;
7730                 }
7731                 if (priv->vmwa_context &&
7732                     dev_flow->dv.vf_vlan.tag &&
7733                     !dev_flow->dv.vf_vlan.created) {
7734                         /*
7735                          * The rule contains the VLAN pattern.
7736                          * For VF we are going to create VLAN
7737                          * interface to make hypervisor set correct
7738                          * e-Switch vport context.
7739                          */
7740                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7741                 }
7742         }
7743         return 0;
7744 error:
7745         err = rte_errno; /* Save rte_errno before cleanup. */
7746         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7747                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7748                 if (dv->hrxq) {
7749                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7750                                 mlx5_hrxq_drop_release(dev);
7751                         else
7752                                 mlx5_hrxq_release(dev, dv->hrxq);
7753                         dv->hrxq = NULL;
7754                 }
7755                 if (dev_flow->dv.vf_vlan.tag &&
7756                     dev_flow->dv.vf_vlan.created)
7757                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7758         }
7759         rte_errno = err; /* Restore rte_errno. */
7760         return -rte_errno;
7761 }
7762
7763 /**
7764  * Release the flow matcher.
7765  *
7766  * @param dev
7767  *   Pointer to Ethernet device.
7768  * @param flow
7769  *   Pointer to mlx5_flow.
7770  *
7771  * @return
7772  *   1 while a reference on it exists, 0 when freed.
7773  */
7774 static int
7775 flow_dv_matcher_release(struct rte_eth_dev *dev,
7776                         struct mlx5_flow *flow)
7777 {
7778         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7779
7780         assert(matcher->matcher_object);
7781         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7782                 dev->data->port_id, (void *)matcher,
7783                 rte_atomic32_read(&matcher->refcnt));
7784         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7785                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7786                            (matcher->matcher_object));
7787                 LIST_REMOVE(matcher, next);
7788                 /* table ref-- in release interface. */
7789                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7790                 rte_free(matcher);
7791                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7792                         dev->data->port_id, (void *)matcher);
7793                 return 0;
7794         }
7795         return 1;
7796 }
7797
7798 /**
7799  * Release an encap/decap resource.
7800  *
7801  * @param flow
7802  *   Pointer to mlx5_flow.
7803  *
7804  * @return
7805  *   1 while a reference on it exists, 0 when freed.
7806  */
7807 static int
7808 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7809 {
7810         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7811                                                 flow->dv.encap_decap;
7812
7813         assert(cache_resource->verbs_action);
7814         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7815                 (void *)cache_resource,
7816                 rte_atomic32_read(&cache_resource->refcnt));
7817         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7818                 claim_zero(mlx5_glue->destroy_flow_action
7819                                 (cache_resource->verbs_action));
7820                 LIST_REMOVE(cache_resource, next);
7821                 rte_free(cache_resource);
7822                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7823                         (void *)cache_resource);
7824                 return 0;
7825         }
7826         return 1;
7827 }
7828
7829 /**
7830  * Release an jump to table action resource.
7831  *
7832  * @param dev
7833  *   Pointer to Ethernet device.
7834  * @param flow
7835  *   Pointer to mlx5_flow.
7836  *
7837  * @return
7838  *   1 while a reference on it exists, 0 when freed.
7839  */
7840 static int
7841 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7842                                   struct mlx5_flow *flow)
7843 {
7844         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7845         struct mlx5_flow_tbl_data_entry *tbl_data =
7846                         container_of(cache_resource,
7847                                      struct mlx5_flow_tbl_data_entry, jump);
7848
7849         assert(cache_resource->action);
7850         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7851                 (void *)cache_resource,
7852                 rte_atomic32_read(&cache_resource->refcnt));
7853         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7854                 claim_zero(mlx5_glue->destroy_flow_action
7855                                 (cache_resource->action));
7856                 /* jump action memory free is inside the table release. */
7857                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7858                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7859                         (void *)cache_resource);
7860                 return 0;
7861         }
7862         return 1;
7863 }
7864
7865 /**
7866  * Release a modify-header resource.
7867  *
7868  * @param flow
7869  *   Pointer to mlx5_flow.
7870  *
7871  * @return
7872  *   1 while a reference on it exists, 0 when freed.
7873  */
7874 static int
7875 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7876 {
7877         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7878                                                 flow->dv.modify_hdr;
7879
7880         assert(cache_resource->verbs_action);
7881         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7882                 (void *)cache_resource,
7883                 rte_atomic32_read(&cache_resource->refcnt));
7884         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7885                 claim_zero(mlx5_glue->destroy_flow_action
7886                                 (cache_resource->verbs_action));
7887                 LIST_REMOVE(cache_resource, next);
7888                 rte_free(cache_resource);
7889                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7890                         (void *)cache_resource);
7891                 return 0;
7892         }
7893         return 1;
7894 }
7895
7896 /**
7897  * Release port ID action resource.
7898  *
7899  * @param flow
7900  *   Pointer to mlx5_flow.
7901  *
7902  * @return
7903  *   1 while a reference on it exists, 0 when freed.
7904  */
7905 static int
7906 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7907 {
7908         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7909                 flow->dv.port_id_action;
7910
7911         assert(cache_resource->action);
7912         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7913                 (void *)cache_resource,
7914                 rte_atomic32_read(&cache_resource->refcnt));
7915         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7916                 claim_zero(mlx5_glue->destroy_flow_action
7917                                 (cache_resource->action));
7918                 LIST_REMOVE(cache_resource, next);
7919                 rte_free(cache_resource);
7920                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7921                         (void *)cache_resource);
7922                 return 0;
7923         }
7924         return 1;
7925 }
7926
7927 /**
7928  * Release push vlan action resource.
7929  *
7930  * @param flow
7931  *   Pointer to mlx5_flow.
7932  *
7933  * @return
7934  *   1 while a reference on it exists, 0 when freed.
7935  */
7936 static int
7937 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7938 {
7939         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7940                 flow->dv.push_vlan_res;
7941
7942         assert(cache_resource->action);
7943         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7944                 (void *)cache_resource,
7945                 rte_atomic32_read(&cache_resource->refcnt));
7946         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7947                 claim_zero(mlx5_glue->destroy_flow_action
7948                                 (cache_resource->action));
7949                 LIST_REMOVE(cache_resource, next);
7950                 rte_free(cache_resource);
7951                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7952                         (void *)cache_resource);
7953                 return 0;
7954         }
7955         return 1;
7956 }
7957
7958 /**
7959  * Remove the flow from the NIC but keeps it in memory.
7960  * Lock free, (mutex should be acquired by caller).
7961  *
7962  * @param[in] dev
7963  *   Pointer to Ethernet device.
7964  * @param[in, out] flow
7965  *   Pointer to flow structure.
7966  */
7967 static void
7968 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7969 {
7970         struct mlx5_flow_dv *dv;
7971         struct mlx5_flow *dev_flow;
7972
7973         if (!flow)
7974                 return;
7975         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7976                 dv = &dev_flow->dv;
7977                 if (dv->flow) {
7978                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7979                         dv->flow = NULL;
7980                 }
7981                 if (dv->hrxq) {
7982                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7983                                 mlx5_hrxq_drop_release(dev);
7984                         else
7985                                 mlx5_hrxq_release(dev, dv->hrxq);
7986                         dv->hrxq = NULL;
7987                 }
7988                 if (dev_flow->dv.vf_vlan.tag &&
7989                     dev_flow->dv.vf_vlan.created)
7990                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7991         }
7992 }
7993
7994 /**
7995  * Remove the flow from the NIC and the memory.
7996  * Lock free, (mutex should be acquired by caller).
7997  *
7998  * @param[in] dev
7999  *   Pointer to the Ethernet device structure.
8000  * @param[in, out] flow
8001  *   Pointer to flow structure.
8002  */
8003 static void
8004 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8005 {
8006         struct mlx5_flow *dev_flow;
8007
8008         if (!flow)
8009                 return;
8010         __flow_dv_remove(dev, flow);
8011         if (flow->counter) {
8012                 flow_dv_counter_release(dev, flow->counter);
8013                 flow->counter = NULL;
8014         }
8015         if (flow->meter) {
8016                 mlx5_flow_meter_detach(flow->meter);
8017                 flow->meter = NULL;
8018         }
8019         while (!LIST_EMPTY(&flow->dev_flows)) {
8020                 dev_flow = LIST_FIRST(&flow->dev_flows);
8021                 LIST_REMOVE(dev_flow, next);
8022                 if (dev_flow->dv.matcher)
8023                         flow_dv_matcher_release(dev, dev_flow);
8024                 if (dev_flow->dv.encap_decap)
8025                         flow_dv_encap_decap_resource_release(dev_flow);
8026                 if (dev_flow->dv.modify_hdr)
8027                         flow_dv_modify_hdr_resource_release(dev_flow);
8028                 if (dev_flow->dv.jump)
8029                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8030                 if (dev_flow->dv.port_id_action)
8031                         flow_dv_port_id_action_resource_release(dev_flow);
8032                 if (dev_flow->dv.push_vlan_res)
8033                         flow_dv_push_vlan_action_resource_release(dev_flow);
8034                 if (dev_flow->dv.tag_resource)
8035                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8036                 rte_free(dev_flow);
8037         }
8038 }
8039
8040 /**
8041  * Query a dv flow  rule for its statistics via devx.
8042  *
8043  * @param[in] dev
8044  *   Pointer to Ethernet device.
8045  * @param[in] flow
8046  *   Pointer to the sub flow.
8047  * @param[out] data
8048  *   data retrieved by the query.
8049  * @param[out] error
8050  *   Perform verbose error reporting if not NULL.
8051  *
8052  * @return
8053  *   0 on success, a negative errno value otherwise and rte_errno is set.
8054  */
8055 static int
8056 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8057                     void *data, struct rte_flow_error *error)
8058 {
8059         struct mlx5_priv *priv = dev->data->dev_private;
8060         struct rte_flow_query_count *qc = data;
8061
8062         if (!priv->config.devx)
8063                 return rte_flow_error_set(error, ENOTSUP,
8064                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8065                                           NULL,
8066                                           "counters are not supported");
8067         if (flow->counter) {
8068                 uint64_t pkts, bytes;
8069                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8070                                                &bytes);
8071
8072                 if (err)
8073                         return rte_flow_error_set(error, -err,
8074                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8075                                         NULL, "cannot read counters");
8076                 qc->hits_set = 1;
8077                 qc->bytes_set = 1;
8078                 qc->hits = pkts - flow->counter->hits;
8079                 qc->bytes = bytes - flow->counter->bytes;
8080                 if (qc->reset) {
8081                         flow->counter->hits = pkts;
8082                         flow->counter->bytes = bytes;
8083                 }
8084                 return 0;
8085         }
8086         return rte_flow_error_set(error, EINVAL,
8087                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8088                                   NULL,
8089                                   "counters are not available");
8090 }
8091
8092 /**
8093  * Query a flow.
8094  *
8095  * @see rte_flow_query()
8096  * @see rte_flow_ops
8097  */
8098 static int
8099 flow_dv_query(struct rte_eth_dev *dev,
8100               struct rte_flow *flow __rte_unused,
8101               const struct rte_flow_action *actions __rte_unused,
8102               void *data __rte_unused,
8103               struct rte_flow_error *error __rte_unused)
8104 {
8105         int ret = -EINVAL;
8106
8107         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8108                 switch (actions->type) {
8109                 case RTE_FLOW_ACTION_TYPE_VOID:
8110                         break;
8111                 case RTE_FLOW_ACTION_TYPE_COUNT:
8112                         ret = flow_dv_query_count(dev, flow, data, error);
8113                         break;
8114                 default:
8115                         return rte_flow_error_set(error, ENOTSUP,
8116                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8117                                                   actions,
8118                                                   "action not supported");
8119                 }
8120         }
8121         return ret;
8122 }
8123
8124 /**
8125  * Destroy the meter table set.
8126  * Lock free, (mutex should be acquired by caller).
8127  *
8128  * @param[in] dev
8129  *   Pointer to Ethernet device.
8130  * @param[in] tbl
8131  *   Pointer to the meter table set.
8132  *
8133  * @return
8134  *   Always 0.
8135  */
8136 static int
8137 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8138                         struct mlx5_meter_domains_infos *tbl)
8139 {
8140         struct mlx5_priv *priv = dev->data->dev_private;
8141         struct mlx5_meter_domains_infos *mtd =
8142                                 (struct mlx5_meter_domains_infos *)tbl;
8143
8144         if (!mtd || !priv->config.dv_flow_en)
8145                 return 0;
8146         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8147                 claim_zero(mlx5_glue->dv_destroy_flow
8148                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8149         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8150                 claim_zero(mlx5_glue->dv_destroy_flow
8151                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8152         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8153                 claim_zero(mlx5_glue->dv_destroy_flow
8154                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8155         if (mtd->egress.color_matcher)
8156                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8157                           (mtd->egress.color_matcher));
8158         if (mtd->egress.any_matcher)
8159                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8160                           (mtd->egress.any_matcher));
8161         if (mtd->egress.tbl)
8162                 claim_zero(flow_dv_tbl_resource_release(dev,
8163                                                         mtd->egress.tbl));
8164         if (mtd->ingress.color_matcher)
8165                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8166                           (mtd->ingress.color_matcher));
8167         if (mtd->ingress.any_matcher)
8168                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8169                           (mtd->ingress.any_matcher));
8170         if (mtd->ingress.tbl)
8171                 claim_zero(flow_dv_tbl_resource_release(dev,
8172                                                         mtd->ingress.tbl));
8173         if (mtd->transfer.color_matcher)
8174                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8175                           (mtd->transfer.color_matcher));
8176         if (mtd->transfer.any_matcher)
8177                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8178                           (mtd->transfer.any_matcher));
8179         if (mtd->transfer.tbl)
8180                 claim_zero(flow_dv_tbl_resource_release(dev,
8181                                                         mtd->transfer.tbl));
8182         if (mtd->drop_actn)
8183                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8184         rte_free(mtd);
8185         return 0;
8186 }
8187
8188 /* Number of meter flow actions, count and jump or count and drop. */
8189 #define METER_ACTIONS 2
8190
8191 /**
8192  * Create specify domain meter table and suffix table.
8193  *
8194  * @param[in] dev
8195  *   Pointer to Ethernet device.
8196  * @param[in,out] mtb
8197  *   Pointer to DV meter table set.
8198  * @param[in] egress
8199  *   Table attribute.
8200  * @param[in] transfer
8201  *   Table attribute.
8202  * @param[in] color_reg_c_idx
8203  *   Reg C index for color match.
8204  *
8205  * @return
8206  *   0 on success, -1 otherwise and rte_errno is set.
8207  */
8208 static int
8209 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8210                            struct mlx5_meter_domains_infos *mtb,
8211                            uint8_t egress, uint8_t transfer,
8212                            uint32_t color_reg_c_idx)
8213 {
8214         struct mlx5_priv *priv = dev->data->dev_private;
8215         struct mlx5_ibv_shared *sh = priv->sh;
8216         struct mlx5_flow_dv_match_params mask = {
8217                 .size = sizeof(mask.buf),
8218         };
8219         struct mlx5_flow_dv_match_params value = {
8220                 .size = sizeof(value.buf),
8221         };
8222         struct mlx5dv_flow_matcher_attr dv_attr = {
8223                 .type = IBV_FLOW_ATTR_NORMAL,
8224                 .priority = 0,
8225                 .match_criteria_enable = 0,
8226                 .match_mask = (void *)&mask,
8227         };
8228         void *actions[METER_ACTIONS];
8229         struct mlx5_flow_tbl_resource **sfx_tbl;
8230         struct mlx5_meter_domain_info *dtb;
8231         struct rte_flow_error error;
8232         int i = 0;
8233
8234         if (transfer) {
8235                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8236                 dtb = &mtb->transfer;
8237         } else if (egress) {
8238                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8239                 dtb = &mtb->egress;
8240         } else {
8241                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8242                 dtb = &mtb->ingress;
8243         }
8244         /* If the suffix table in missing, create it. */
8245         if (!(*sfx_tbl)) {
8246                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8247                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8248                                                 egress, transfer, &error);
8249                 if (!(*sfx_tbl)) {
8250                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8251                         return -1;
8252                 }
8253         }
8254         /* Create the meter table with METER level. */
8255         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8256                                             egress, transfer, &error);
8257         if (!dtb->tbl) {
8258                 DRV_LOG(ERR, "Failed to create meter policer table.");
8259                 return -1;
8260         }
8261         /* Create matchers, Any and Color. */
8262         dv_attr.priority = 3;
8263         dv_attr.match_criteria_enable = 0;
8264         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8265                                                              &dv_attr,
8266                                                              dtb->tbl->obj);
8267         if (!dtb->any_matcher) {
8268                 DRV_LOG(ERR, "Failed to create meter"
8269                              " policer default matcher.");
8270                 goto error_exit;
8271         }
8272         dv_attr.priority = 0;
8273         dv_attr.match_criteria_enable =
8274                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8275         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8276                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
8277         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8278                                                                &dv_attr,
8279                                                                dtb->tbl->obj);
8280         if (!dtb->color_matcher) {
8281                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8282                 goto error_exit;
8283         }
8284         if (mtb->count_actns[RTE_MTR_DROPPED])
8285                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8286         actions[i++] = mtb->drop_actn;
8287         /* Default rule: lowest priority, match any, actions: drop. */
8288         dtb->policer_rules[RTE_MTR_DROPPED] =
8289                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8290                                                  (void *)&value, i, actions);
8291         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8292                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8293                 goto error_exit;
8294         }
8295         return 0;
8296 error_exit:
8297         return -1;
8298 }
8299
8300 /**
8301  * Create the needed meter and suffix tables.
8302  * Lock free, (mutex should be acquired by caller).
8303  *
8304  * @param[in] dev
8305  *   Pointer to Ethernet device.
8306  * @param[in] fm
8307  *   Pointer to the flow meter.
8308  *
8309  * @return
8310  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8311  */
8312 static struct mlx5_meter_domains_infos *
8313 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8314                        const struct mlx5_flow_meter *fm)
8315 {
8316         struct mlx5_priv *priv = dev->data->dev_private;
8317         struct mlx5_meter_domains_infos *mtb;
8318         int ret;
8319         int i;
8320
8321         if (!priv->mtr_en) {
8322                 rte_errno = ENOTSUP;
8323                 return NULL;
8324         }
8325         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8326         if (!mtb) {
8327                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8328                 return NULL;
8329         }
8330         /* Create meter count actions */
8331         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8332                 if (!fm->policer_stats.cnt[i])
8333                         continue;
8334                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8335         }
8336         /* Create drop action. */
8337         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8338         if (!mtb->drop_actn) {
8339                 DRV_LOG(ERR, "Failed to create drop action.");
8340                 goto error_exit;
8341         }
8342         /* Egress meter table. */
8343         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8344         if (ret) {
8345                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8346                 goto error_exit;
8347         }
8348         /* Ingress meter table. */
8349         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8350         if (ret) {
8351                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8352                 goto error_exit;
8353         }
8354         /* FDB meter table. */
8355         if (priv->config.dv_esw_en) {
8356                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8357                                                  priv->mtr_color_reg);
8358                 if (ret) {
8359                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8360                         goto error_exit;
8361                 }
8362         }
8363         return mtb;
8364 error_exit:
8365         flow_dv_destroy_mtr_tbl(dev, mtb);
8366         return NULL;
8367 }
8368
8369 /**
8370  * Destroy domain policer rule.
8371  *
8372  * @param[in] dt
8373  *   Pointer to domain table.
8374  */
8375 static void
8376 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8377 {
8378         int i;
8379
8380         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8381                 if (dt->policer_rules[i]) {
8382                         claim_zero(mlx5_glue->dv_destroy_flow
8383                                   (dt->policer_rules[i]));
8384                         dt->policer_rules[i] = NULL;
8385                 }
8386         }
8387         if (dt->jump_actn) {
8388                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8389                 dt->jump_actn = NULL;
8390         }
8391 }
8392
8393 /**
8394  * Destroy policer rules.
8395  *
8396  * @param[in] dev
8397  *   Pointer to Ethernet device.
8398  * @param[in] fm
8399  *   Pointer to flow meter structure.
8400  * @param[in] attr
8401  *   Pointer to flow attributes.
8402  *
8403  * @return
8404  *   Always 0.
8405  */
8406 static int
8407 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8408                               const struct mlx5_flow_meter *fm,
8409                               const struct rte_flow_attr *attr)
8410 {
8411         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8412
8413         if (!mtb)
8414                 return 0;
8415         if (attr->egress)
8416                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8417         if (attr->ingress)
8418                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8419         if (attr->transfer)
8420                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8421         return 0;
8422 }
8423
8424 /**
8425  * Create specify domain meter policer rule.
8426  *
8427  * @param[in] fm
8428  *   Pointer to flow meter structure.
8429  * @param[in] mtb
8430  *   Pointer to DV meter table set.
8431  * @param[in] sfx_tb
8432  *   Pointer to suffix table.
8433  * @param[in] mtr_reg_c
8434  *   Color match REG_C.
8435  *
8436  * @return
8437  *   0 on success, -1 otherwise.
8438  */
8439 static int
8440 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8441                                     struct mlx5_meter_domain_info *dtb,
8442                                     struct mlx5_flow_tbl_resource *sfx_tb,
8443                                     uint8_t mtr_reg_c)
8444 {
8445         struct mlx5_flow_dv_match_params matcher = {
8446                 .size = sizeof(matcher.buf),
8447         };
8448         struct mlx5_flow_dv_match_params value = {
8449                 .size = sizeof(value.buf),
8450         };
8451         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8452         void *actions[METER_ACTIONS];
8453         int i;
8454
8455         /* Create jump action. */
8456         if (!sfx_tb)
8457                 return -1;
8458         if (!dtb->jump_actn)
8459                 dtb->jump_actn =
8460                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8461                                                         (sfx_tb->obj);
8462         if (!dtb->jump_actn) {
8463                 DRV_LOG(ERR, "Failed to create policer jump action.");
8464                 goto error;
8465         }
8466         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8467                 int j = 0;
8468
8469                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8470                                        rte_col_2_mlx5_col(i), UINT8_MAX);
8471                 if (mtb->count_actns[i])
8472                         actions[j++] = mtb->count_actns[i];
8473                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8474                         actions[j++] = mtb->drop_actn;
8475                 else
8476                         actions[j++] = dtb->jump_actn;
8477                 dtb->policer_rules[i] =
8478                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8479                                                  (void *)&value,
8480                                                   j, actions);
8481                 if (!dtb->policer_rules[i]) {
8482                         DRV_LOG(ERR, "Failed to create policer rule.");
8483                         goto error;
8484                 }
8485         }
8486         return 0;
8487 error:
8488         rte_errno = errno;
8489         return -1;
8490 }
8491
8492 /**
8493  * Create policer rules.
8494  *
8495  * @param[in] dev
8496  *   Pointer to Ethernet device.
8497  * @param[in] fm
8498  *   Pointer to flow meter structure.
8499  * @param[in] attr
8500  *   Pointer to flow attributes.
8501  *
8502  * @return
8503  *   0 on success, -1 otherwise.
8504  */
8505 static int
8506 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8507                              struct mlx5_flow_meter *fm,
8508                              const struct rte_flow_attr *attr)
8509 {
8510         struct mlx5_priv *priv = dev->data->dev_private;
8511         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8512         int ret;
8513
8514         if (attr->egress) {
8515                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8516                                                 priv->sh->tx_mtr_sfx_tbl,
8517                                                 priv->mtr_color_reg);
8518                 if (ret) {
8519                         DRV_LOG(ERR, "Failed to create egress policer.");
8520                         goto error;
8521                 }
8522         }
8523         if (attr->ingress) {
8524                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8525                                                 priv->sh->rx_mtr_sfx_tbl,
8526                                                 priv->mtr_color_reg);
8527                 if (ret) {
8528                         DRV_LOG(ERR, "Failed to create ingress policer.");
8529                         goto error;
8530                 }
8531         }
8532         if (attr->transfer) {
8533                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8534                                                 priv->sh->fdb_mtr_sfx_tbl,
8535                                                 priv->mtr_color_reg);
8536                 if (ret) {
8537                         DRV_LOG(ERR, "Failed to create transfer policer.");
8538                         goto error;
8539                 }
8540         }
8541         return 0;
8542 error:
8543         flow_dv_destroy_policer_rules(dev, fm, attr);
8544         return -1;
8545 }
8546
8547 /**
8548  * Query a devx counter.
8549  *
8550  * @param[in] dev
8551  *   Pointer to the Ethernet device structure.
8552  * @param[in] cnt
8553  *   Pointer to the flow counter.
8554  * @param[in] clear
8555  *   Set to clear the counter statistics.
8556  * @param[out] pkts
8557  *   The statistics value of packets.
8558  * @param[out] bytes
8559  *   The statistics value of bytes.
8560  *
8561  * @return
8562  *   0 on success, otherwise return -1.
8563  */
8564 static int
8565 flow_dv_counter_query(struct rte_eth_dev *dev,
8566                       struct mlx5_flow_counter *cnt, bool clear,
8567                       uint64_t *pkts, uint64_t *bytes)
8568 {
8569         struct mlx5_priv *priv = dev->data->dev_private;
8570         uint64_t inn_pkts, inn_bytes;
8571         int ret;
8572
8573         if (!priv->config.devx)
8574                 return -1;
8575         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8576         if (ret)
8577                 return -1;
8578         *pkts = inn_pkts - cnt->hits;
8579         *bytes = inn_bytes - cnt->bytes;
8580         if (clear) {
8581                 cnt->hits = inn_pkts;
8582                 cnt->bytes = inn_bytes;
8583         }
8584         return 0;
8585 }
8586
8587 /*
8588  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8589  */
8590 static int
8591 flow_dv_translate(struct rte_eth_dev *dev,
8592                   struct mlx5_flow *dev_flow,
8593                   const struct rte_flow_attr *attr,
8594                   const struct rte_flow_item items[],
8595                   const struct rte_flow_action actions[],
8596                   struct rte_flow_error *error)
8597 {
8598         int ret;
8599
8600         flow_dv_shared_lock(dev);
8601         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8602         flow_dv_shared_unlock(dev);
8603         return ret;
8604 }
8605
8606 /*
8607  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8608  */
8609 static int
8610 flow_dv_apply(struct rte_eth_dev *dev,
8611               struct rte_flow *flow,
8612               struct rte_flow_error *error)
8613 {
8614         int ret;
8615
8616         flow_dv_shared_lock(dev);
8617         ret = __flow_dv_apply(dev, flow, error);
8618         flow_dv_shared_unlock(dev);
8619         return ret;
8620 }
8621
8622 /*
8623  * Mutex-protected thunk to lock-free __flow_dv_remove().
8624  */
8625 static void
8626 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8627 {
8628         flow_dv_shared_lock(dev);
8629         __flow_dv_remove(dev, flow);
8630         flow_dv_shared_unlock(dev);
8631 }
8632
8633 /*
8634  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8635  */
8636 static void
8637 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8638 {
8639         flow_dv_shared_lock(dev);
8640         __flow_dv_destroy(dev, flow);
8641         flow_dv_shared_unlock(dev);
8642 }
8643
8644 /*
8645  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8646  */
8647 static struct mlx5_flow_counter *
8648 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8649 {
8650         struct mlx5_flow_counter *cnt;
8651
8652         flow_dv_shared_lock(dev);
8653         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8654         flow_dv_shared_unlock(dev);
8655         return cnt;
8656 }
8657
8658 /*
8659  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8660  */
8661 static void
8662 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8663 {
8664         flow_dv_shared_lock(dev);
8665         flow_dv_counter_release(dev, cnt);
8666         flow_dv_shared_unlock(dev);
8667 }
8668
8669 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8670         .validate = flow_dv_validate,
8671         .prepare = flow_dv_prepare,
8672         .translate = flow_dv_translate,
8673         .apply = flow_dv_apply,
8674         .remove = flow_dv_remove,
8675         .destroy = flow_dv_destroy,
8676         .query = flow_dv_query,
8677         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8678         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8679         .create_policer_rules = flow_dv_create_policer_rules,
8680         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8681         .counter_alloc = flow_dv_counter_allocate,
8682         .counter_free = flow_dv_counter_free,
8683         .counter_query = flow_dv_counter_query,
8684 };
8685
8686 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */