drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include "mlx5.h"
  33 #include "mlx5_defs.h"
  34 #include "mlx5_glue.h"
  35 #include "mlx5_flow.h"
  36 #include "mlx5_prm.h"
  37 #include "mlx5_rxtx.h"
  38
  39 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  40
  41 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  42 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  43 #endif
  44
  45 #ifndef HAVE_MLX5DV_DR_ESWITCH
  46 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  47 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  48 #endif
  49 #endif
  50
  51 #ifndef HAVE_MLX5DV_DR
  52 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  53 #endif
  54
  55 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  56                                           sizeof(struct rte_flow_item_ipv4))
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 /**
  77  * Initialize flow attributes structure according to flow items' types.
  78  *
  79  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  80  * mode. For tunnel mode, the items to be modified are the outermost ones.
  81  *
  82  * @param[in] item
  83  *   Pointer to item specification.
  84  * @param[out] attr
  85  *   Pointer to flow attributes structure.
  86  */
  87 static void
  88 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  89 {
  90         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  91                 switch (item->type) {
  92                 case RTE_FLOW_ITEM_TYPE_IPV4:
  93                         if (!attr->ipv6)
  94                                 attr->ipv4 = 1;
  95                         break;
  96                 case RTE_FLOW_ITEM_TYPE_IPV6:
  97                         if (!attr->ipv4)
  98                                 attr->ipv6 = 1;
  99                         break;
 100                 case RTE_FLOW_ITEM_TYPE_UDP:
 101                         if (!attr->tcp)
 102                                 attr->udp = 1;
 103                         break;
 104                 case RTE_FLOW_ITEM_TYPE_TCP:
 105                         if (!attr->udp)
 106                                 attr->tcp = 1;
 107                         break;
 108                 default:
 109                         break;
 110                 }
 111         }
 112         attr->valid = 1;
 113 }
 114
 115 /**
 116  * Convert rte_mtr_color to mlx5 color.
 117  *
 118  * @param[in] rcol
 119  *   rte_mtr_color.
 120  *
 121  * @return
 122  *   mlx5 color.
 123  */
 124 static int
 125 rte_col_2_mlx5_col(enum rte_color rcol)
 126 {
 127         switch (rcol) {
 128         case RTE_COLOR_GREEN:
 129                 return MLX5_FLOW_COLOR_GREEN;
 130         case RTE_COLOR_YELLOW:
 131                 return MLX5_FLOW_COLOR_YELLOW;
 132         case RTE_COLOR_RED:
 133                 return MLX5_FLOW_COLOR_RED;
 134         default:
 135                 break;
 136         }
 137         return MLX5_FLOW_COLOR_UNDEFINED;
 138 }
 139
 140 struct field_modify_info {
 141         uint32_t size; /* Size of field in protocol header, in bytes. */
 142         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 143         enum mlx5_modification_field id;
 144 };
 145
 146 struct field_modify_info modify_eth[] = {
 147         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 148         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 149         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 150         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 151         {0, 0, 0},
 152 };
 153
 154 struct field_modify_info modify_vlan_out_first_vid[] = {
 155         /* Size in bits !!! */
 156         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 157         {0, 0, 0},
 158 };
 159
 160 struct field_modify_info modify_ipv4[] = {
 161         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 162         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 163         {4, 12, MLX5_MODI_OUT_SIPV4},
 164         {4, 16, MLX5_MODI_OUT_DIPV4},
 165         {0, 0, 0},
 166 };
 167
 168 struct field_modify_info modify_ipv6[] = {
 169         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 170         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 171         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 172         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 173         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 174         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 175         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 176         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 177         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 178         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 179         {0, 0, 0},
 180 };
 181
 182 struct field_modify_info modify_udp[] = {
 183         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 184         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 185         {0, 0, 0},
 186 };
 187
 188 struct field_modify_info modify_tcp[] = {
 189         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 190         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 191         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 192         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 193         {0, 0, 0},
 194 };
 195
 196 static void
 197 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 198                           uint8_t next_protocol, uint64_t *item_flags,
 199                           int *tunnel)
 200 {
 201         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 202                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 203         if (next_protocol == IPPROTO_IPIP) {
 204                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 205                 *tunnel = 1;
 206         }
 207         if (next_protocol == IPPROTO_IPV6) {
 208                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 209                 *tunnel = 1;
 210         }
 211 }
 212
 213 /**
 214  * Acquire the synchronizing object to protect multithreaded access
 215  * to shared dv context. Lock occurs only if context is actually
 216  * shared, i.e. we have multiport IB device and representors are
 217  * created.
 218  *
 219  * @param[in] dev
 220  *   Pointer to the rte_eth_dev structure.
 221  */
 222 static void
 223 flow_dv_shared_lock(struct rte_eth_dev *dev)
 224 {
 225         struct mlx5_priv *priv = dev->data->dev_private;
 226         struct mlx5_ibv_shared *sh = priv->sh;
 227
 228         if (sh->dv_refcnt > 1) {
 229                 int ret;
 230
 231                 ret = pthread_mutex_lock(&sh->dv_mutex);
 232                 assert(!ret);
 233                 (void)ret;
 234         }
 235 }
 236
 237 static void
 238 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 239 {
 240         struct mlx5_priv *priv = dev->data->dev_private;
 241         struct mlx5_ibv_shared *sh = priv->sh;
 242
 243         if (sh->dv_refcnt > 1) {
 244                 int ret;
 245
 246                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 247                 assert(!ret);
 248                 (void)ret;
 249         }
 250 }
 251
 252 /* Update VLAN's VID/PCP based on input rte_flow_action.
 253  *
 254  * @param[in] action
 255  *   Pointer to struct rte_flow_action.
 256  * @param[out] vlan
 257  *   Pointer to struct rte_vlan_hdr.
 258  */
 259 static void
 260 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 261                          struct rte_vlan_hdr *vlan)
 262 {
 263         uint16_t vlan_tci;
 264         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 265                 vlan_tci =
 266                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 267                                                action->conf)->vlan_pcp;
 268                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 269                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 270                 vlan->vlan_tci |= vlan_tci;
 271         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 272                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 273                 vlan->vlan_tci |= rte_be_to_cpu_16
 274                     (((const struct rte_flow_action_of_set_vlan_vid *)
 275                                              action->conf)->vlan_vid);
 276         }
 277 }
 278
 279 /**
 280  * Fetch 1, 2, 3 or 4 byte field from the byte array
 281  * and return as unsigned integer in host-endian format.
 282  *
 283  * @param[in] data
 284  *   Pointer to data array.
 285  * @param[in] size
 286  *   Size of field to extract.
 287  *
 288  * @return
 289  *   converted field in host endian format.
 290  */
 291 static inline uint32_t
 292 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 293 {
 294         uint32_t ret;
 295
 296         switch (size) {
 297         case 1:
 298                 ret = *data;
 299                 break;
 300         case 2:
 301                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 302                 break;
 303         case 3:
 304                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 305                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 306                 break;
 307         case 4:
 308                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 309                 break;
 310         default:
 311                 assert(false);
 312                 ret = 0;
 313                 break;
 314         }
 315         return ret;
 316 }
 317
 318 /**
 319  * Convert modify-header action to DV specification.
 320  *
 321  * Data length of each action is determined by provided field description
 322  * and the item mask. Data bit offset and width of each action is determined
 323  * by provided item mask.
 324  *
 325  * @param[in] item
 326  *   Pointer to item specification.
 327  * @param[in] field
 328  *   Pointer to field modification information.
 329  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 330  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 331  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 332  * @param[in] dcopy
 333  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 334  *   Negative offset value sets the same offset as source offset.
 335  *   size field is ignored, value is taken from source field.
 336  * @param[in,out] resource
 337  *   Pointer to the modify-header resource.
 338  * @param[in] type
 339  *   Type of modification.
 340  * @param[out] error
 341  *   Pointer to the error structure.
 342  *
 343  * @return
 344  *   0 on success, a negative errno value otherwise and rte_errno is set.
 345  */
 346 static int
 347 flow_dv_convert_modify_action(struct rte_flow_item *item,
 348                               struct field_modify_info *field,
 349                               struct field_modify_info *dcopy,
 350                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 351                               uint32_t type, struct rte_flow_error *error)
 352 {
 353         uint32_t i = resource->actions_num;
 354         struct mlx5_modification_cmd *actions = resource->actions;
 355
 356         /*
 357          * The item and mask are provided in big-endian format.
 358          * The fields should be presented as in big-endian format either.
 359          * Mask must be always present, it defines the actual field width.
 360          */
 361         assert(item->mask);
 362         assert(field->size);
 363         do {
 364                 unsigned int size_b;
 365                 unsigned int off_b;
 366                 uint32_t mask;
 367                 uint32_t data;
 368
 369                 if (i >= MLX5_MAX_MODIFY_NUM)
 370                         return rte_flow_error_set(error, EINVAL,
 371                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 372                                  "too many items to modify");
 373                 /* Fetch variable byte size mask from the array. */
 374                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 375                                            field->offset, field->size);
 376                 if (!mask) {
 377                         ++field;
 378                         continue;
 379                 }
 380                 /* Deduce actual data width in bits from mask value. */
 381                 off_b = rte_bsf32(mask);
 382                 size_b = sizeof(uint32_t) * CHAR_BIT -
 383                          off_b - __builtin_clz(mask);
 384                 assert(size_b);
 385                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 386                 actions[i].action_type = type;
 387                 actions[i].field = field->id;
 388                 actions[i].offset = off_b;
 389                 actions[i].length = size_b;
 390                 /* Convert entire record to expected big-endian format. */
 391                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 392                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 393                         assert(dcopy);
 394                         actions[i].dst_field = dcopy->id;
 395                         actions[i].dst_offset =
 396                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 397                         /* Convert entire record to big-endian format. */
 398                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 399                 } else {
 400                         assert(item->spec);
 401                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 402                                                    field->offset, field->size);
 403                         /* Shift out the trailing masked bits from data. */
 404                         data = (data & mask) >> off_b;
 405                         actions[i].data1 = rte_cpu_to_be_32(data);
 406                 }
 407                 ++i;
 408                 ++field;
 409         } while (field->size);
 410         if (resource->actions_num == i)
 411                 return rte_flow_error_set(error, EINVAL,
 412                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 413                                           "invalid modification flow item");
 414         resource->actions_num = i;
 415         return 0;
 416 }
 417
 418 /**
 419  * Convert modify-header set IPv4 address action to DV specification.
 420  *
 421  * @param[in,out] resource
 422  *   Pointer to the modify-header resource.
 423  * @param[in] action
 424  *   Pointer to action specification.
 425  * @param[out] error
 426  *   Pointer to the error structure.
 427  *
 428  * @return
 429  *   0 on success, a negative errno value otherwise and rte_errno is set.
 430  */
 431 static int
 432 flow_dv_convert_action_modify_ipv4
 433                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 434                          const struct rte_flow_action *action,
 435                          struct rte_flow_error *error)
 436 {
 437         const struct rte_flow_action_set_ipv4 *conf =
 438                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 439         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 440         struct rte_flow_item_ipv4 ipv4;
 441         struct rte_flow_item_ipv4 ipv4_mask;
 442
 443         memset(&ipv4, 0, sizeof(ipv4));
 444         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 445         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 446                 ipv4.hdr.src_addr = conf->ipv4_addr;
 447                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 448         } else {
 449                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 450                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 451         }
 452         item.spec = &ipv4;
 453         item.mask = &ipv4_mask;
 454         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 455                                              MLX5_MODIFICATION_TYPE_SET, error);
 456 }
 457
 458 /**
 459  * Convert modify-header set IPv6 address action to DV specification.
 460  *
 461  * @param[in,out] resource
 462  *   Pointer to the modify-header resource.
 463  * @param[in] action
 464  *   Pointer to action specification.
 465  * @param[out] error
 466  *   Pointer to the error structure.
 467  *
 468  * @return
 469  *   0 on success, a negative errno value otherwise and rte_errno is set.
 470  */
 471 static int
 472 flow_dv_convert_action_modify_ipv6
 473                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 474                          const struct rte_flow_action *action,
 475                          struct rte_flow_error *error)
 476 {
 477         const struct rte_flow_action_set_ipv6 *conf =
 478                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 479         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 480         struct rte_flow_item_ipv6 ipv6;
 481         struct rte_flow_item_ipv6 ipv6_mask;
 482
 483         memset(&ipv6, 0, sizeof(ipv6));
 484         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 485         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 486                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 487                        sizeof(ipv6.hdr.src_addr));
 488                 memcpy(&ipv6_mask.hdr.src_addr,
 489                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 490                        sizeof(ipv6.hdr.src_addr));
 491         } else {
 492                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 493                        sizeof(ipv6.hdr.dst_addr));
 494                 memcpy(&ipv6_mask.hdr.dst_addr,
 495                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 496                        sizeof(ipv6.hdr.dst_addr));
 497         }
 498         item.spec = &ipv6;
 499         item.mask = &ipv6_mask;
 500         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 501                                              MLX5_MODIFICATION_TYPE_SET, error);
 502 }
 503
 504 /**
 505  * Convert modify-header set MAC address action to DV specification.
 506  *
 507  * @param[in,out] resource
 508  *   Pointer to the modify-header resource.
 509  * @param[in] action
 510  *   Pointer to action specification.
 511  * @param[out] error
 512  *   Pointer to the error structure.
 513  *
 514  * @return
 515  *   0 on success, a negative errno value otherwise and rte_errno is set.
 516  */
 517 static int
 518 flow_dv_convert_action_modify_mac
 519                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 520                          const struct rte_flow_action *action,
 521                          struct rte_flow_error *error)
 522 {
 523         const struct rte_flow_action_set_mac *conf =
 524                 (const struct rte_flow_action_set_mac *)(action->conf);
 525         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 526         struct rte_flow_item_eth eth;
 527         struct rte_flow_item_eth eth_mask;
 528
 529         memset(&eth, 0, sizeof(eth));
 530         memset(&eth_mask, 0, sizeof(eth_mask));
 531         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 532                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 533                        sizeof(eth.src.addr_bytes));
 534                 memcpy(&eth_mask.src.addr_bytes,
 535                        &rte_flow_item_eth_mask.src.addr_bytes,
 536                        sizeof(eth_mask.src.addr_bytes));
 537         } else {
 538                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 539                        sizeof(eth.dst.addr_bytes));
 540                 memcpy(&eth_mask.dst.addr_bytes,
 541                        &rte_flow_item_eth_mask.dst.addr_bytes,
 542                        sizeof(eth_mask.dst.addr_bytes));
 543         }
 544         item.spec = &eth;
 545         item.mask = &eth_mask;
 546         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 547                                              MLX5_MODIFICATION_TYPE_SET, error);
 548 }
 549
 550 /**
 551  * Convert modify-header set VLAN VID action to DV specification.
 552  *
 553  * @param[in,out] resource
 554  *   Pointer to the modify-header resource.
 555  * @param[in] action
 556  *   Pointer to action specification.
 557  * @param[out] error
 558  *   Pointer to the error structure.
 559  *
 560  * @return
 561  *   0 on success, a negative errno value otherwise and rte_errno is set.
 562  */
 563 static int
 564 flow_dv_convert_action_modify_vlan_vid
 565                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 566                          const struct rte_flow_action *action,
 567                          struct rte_flow_error *error)
 568 {
 569         const struct rte_flow_action_of_set_vlan_vid *conf =
 570                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 571         int i = resource->actions_num;
 572         struct mlx5_modification_cmd *actions = &resource->actions[i];
 573         struct field_modify_info *field = modify_vlan_out_first_vid;
 574
 575         if (i >= MLX5_MAX_MODIFY_NUM)
 576                 return rte_flow_error_set(error, EINVAL,
 577                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 578                          "too many items to modify");
 579         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 580         actions[i].field = field->id;
 581         actions[i].length = field->size;
 582         actions[i].offset = field->offset;
 583         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 584         actions[i].data1 = conf->vlan_vid;
 585         actions[i].data1 = actions[i].data1 << 16;
 586         resource->actions_num = ++i;
 587         return 0;
 588 }
 589
 590 /**
 591  * Convert modify-header set TP action to DV specification.
 592  *
 593  * @param[in,out] resource
 594  *   Pointer to the modify-header resource.
 595  * @param[in] action
 596  *   Pointer to action specification.
 597  * @param[in] items
 598  *   Pointer to rte_flow_item objects list.
 599  * @param[in] attr
 600  *   Pointer to flow attributes structure.
 601  * @param[out] error
 602  *   Pointer to the error structure.
 603  *
 604  * @return
 605  *   0 on success, a negative errno value otherwise and rte_errno is set.
 606  */
 607 static int
 608 flow_dv_convert_action_modify_tp
 609                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 610                          const struct rte_flow_action *action,
 611                          const struct rte_flow_item *items,
 612                          union flow_dv_attr *attr,
 613                          struct rte_flow_error *error)
 614 {
 615         const struct rte_flow_action_set_tp *conf =
 616                 (const struct rte_flow_action_set_tp *)(action->conf);
 617         struct rte_flow_item item;
 618         struct rte_flow_item_udp udp;
 619         struct rte_flow_item_udp udp_mask;
 620         struct rte_flow_item_tcp tcp;
 621         struct rte_flow_item_tcp tcp_mask;
 622         struct field_modify_info *field;
 623
 624         if (!attr->valid)
 625                 flow_dv_attr_init(items, attr);
 626         if (attr->udp) {
 627                 memset(&udp, 0, sizeof(udp));
 628                 memset(&udp_mask, 0, sizeof(udp_mask));
 629                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 630                         udp.hdr.src_port = conf->port;
 631                         udp_mask.hdr.src_port =
 632                                         rte_flow_item_udp_mask.hdr.src_port;
 633                 } else {
 634                         udp.hdr.dst_port = conf->port;
 635                         udp_mask.hdr.dst_port =
 636                                         rte_flow_item_udp_mask.hdr.dst_port;
 637                 }
 638                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 639                 item.spec = &udp;
 640                 item.mask = &udp_mask;
 641                 field = modify_udp;
 642         }
 643         if (attr->tcp) {
 644                 memset(&tcp, 0, sizeof(tcp));
 645                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 646                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 647                         tcp.hdr.src_port = conf->port;
 648                         tcp_mask.hdr.src_port =
 649                                         rte_flow_item_tcp_mask.hdr.src_port;
 650                 } else {
 651                         tcp.hdr.dst_port = conf->port;
 652                         tcp_mask.hdr.dst_port =
 653                                         rte_flow_item_tcp_mask.hdr.dst_port;
 654                 }
 655                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 656                 item.spec = &tcp;
 657                 item.mask = &tcp_mask;
 658                 field = modify_tcp;
 659         }
 660         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 661                                              MLX5_MODIFICATION_TYPE_SET, error);
 662 }
 663
 664 /**
 665  * Convert modify-header set TTL action to DV specification.
 666  *
 667  * @param[in,out] resource
 668  *   Pointer to the modify-header resource.
 669  * @param[in] action
 670  *   Pointer to action specification.
 671  * @param[in] items
 672  *   Pointer to rte_flow_item objects list.
 673  * @param[in] attr
 674  *   Pointer to flow attributes structure.
 675  * @param[out] error
 676  *   Pointer to the error structure.
 677  *
 678  * @return
 679  *   0 on success, a negative errno value otherwise and rte_errno is set.
 680  */
 681 static int
 682 flow_dv_convert_action_modify_ttl
 683                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 684                          const struct rte_flow_action *action,
 685                          const struct rte_flow_item *items,
 686                          union flow_dv_attr *attr,
 687                          struct rte_flow_error *error)
 688 {
 689         const struct rte_flow_action_set_ttl *conf =
 690                 (const struct rte_flow_action_set_ttl *)(action->conf);
 691         struct rte_flow_item item;
 692         struct rte_flow_item_ipv4 ipv4;
 693         struct rte_flow_item_ipv4 ipv4_mask;
 694         struct rte_flow_item_ipv6 ipv6;
 695         struct rte_flow_item_ipv6 ipv6_mask;
 696         struct field_modify_info *field;
 697
 698         if (!attr->valid)
 699                 flow_dv_attr_init(items, attr);
 700         if (attr->ipv4) {
 701                 memset(&ipv4, 0, sizeof(ipv4));
 702                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 703                 ipv4.hdr.time_to_live = conf->ttl_value;
 704                 ipv4_mask.hdr.time_to_live = 0xFF;
 705                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 706                 item.spec = &ipv4;
 707                 item.mask = &ipv4_mask;
 708                 field = modify_ipv4;
 709         }
 710         if (attr->ipv6) {
 711                 memset(&ipv6, 0, sizeof(ipv6));
 712                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 713                 ipv6.hdr.hop_limits = conf->ttl_value;
 714                 ipv6_mask.hdr.hop_limits = 0xFF;
 715                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 716                 item.spec = &ipv6;
 717                 item.mask = &ipv6_mask;
 718                 field = modify_ipv6;
 719         }
 720         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 721                                              MLX5_MODIFICATION_TYPE_SET, error);
 722 }
 723
 724 /**
 725  * Convert modify-header decrement TTL action to DV specification.
 726  *
 727  * @param[in,out] resource
 728  *   Pointer to the modify-header resource.
 729  * @param[in] action
 730  *   Pointer to action specification.
 731  * @param[in] items
 732  *   Pointer to rte_flow_item objects list.
 733  * @param[in] attr
 734  *   Pointer to flow attributes structure.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_dec_ttl
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_item *items,
 745                          union flow_dv_attr *attr,
 746                          struct rte_flow_error *error)
 747 {
 748         struct rte_flow_item item;
 749         struct rte_flow_item_ipv4 ipv4;
 750         struct rte_flow_item_ipv4 ipv4_mask;
 751         struct rte_flow_item_ipv6 ipv6;
 752         struct rte_flow_item_ipv6 ipv6_mask;
 753         struct field_modify_info *field;
 754
 755         if (!attr->valid)
 756                 flow_dv_attr_init(items, attr);
 757         if (attr->ipv4) {
 758                 memset(&ipv4, 0, sizeof(ipv4));
 759                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 760                 ipv4.hdr.time_to_live = 0xFF;
 761                 ipv4_mask.hdr.time_to_live = 0xFF;
 762                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 763                 item.spec = &ipv4;
 764                 item.mask = &ipv4_mask;
 765                 field = modify_ipv4;
 766         }
 767         if (attr->ipv6) {
 768                 memset(&ipv6, 0, sizeof(ipv6));
 769                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 770                 ipv6.hdr.hop_limits = 0xFF;
 771                 ipv6_mask.hdr.hop_limits = 0xFF;
 772                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 773                 item.spec = &ipv6;
 774                 item.mask = &ipv6_mask;
 775                 field = modify_ipv6;
 776         }
 777         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 778                                              MLX5_MODIFICATION_TYPE_ADD, error);
 779 }
 780
 781 /**
 782  * Convert modify-header increment/decrement TCP Sequence number
 783  * to DV specification.
 784  *
 785  * @param[in,out] resource
 786  *   Pointer to the modify-header resource.
 787  * @param[in] action
 788  *   Pointer to action specification.
 789  * @param[out] error
 790  *   Pointer to the error structure.
 791  *
 792  * @return
 793  *   0 on success, a negative errno value otherwise and rte_errno is set.
 794  */
 795 static int
 796 flow_dv_convert_action_modify_tcp_seq
 797                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 798                          const struct rte_flow_action *action,
 799                          struct rte_flow_error *error)
 800 {
 801         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 802         uint64_t value = rte_be_to_cpu_32(*conf);
 803         struct rte_flow_item item;
 804         struct rte_flow_item_tcp tcp;
 805         struct rte_flow_item_tcp tcp_mask;
 806
 807         memset(&tcp, 0, sizeof(tcp));
 808         memset(&tcp_mask, 0, sizeof(tcp_mask));
 809         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 810                 /*
 811                  * The HW has no decrement operation, only increment operation.
 812                  * To simulate decrement X from Y using increment operation
 813                  * we need to add UINT32_MAX X times to Y.
 814                  * Each adding of UINT32_MAX decrements Y by 1.
 815                  */
 816                 value *= UINT32_MAX;
 817         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 818         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 819         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 820         item.spec = &tcp;
 821         item.mask = &tcp_mask;
 822         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 823                                              MLX5_MODIFICATION_TYPE_ADD, error);
 824 }
 825
 826 /**
 827  * Convert modify-header increment/decrement TCP Acknowledgment number
 828  * to DV specification.
 829  *
 830  * @param[in,out] resource
 831  *   Pointer to the modify-header resource.
 832  * @param[in] action
 833  *   Pointer to action specification.
 834  * @param[out] error
 835  *   Pointer to the error structure.
 836  *
 837  * @return
 838  *   0 on success, a negative errno value otherwise and rte_errno is set.
 839  */
 840 static int
 841 flow_dv_convert_action_modify_tcp_ack
 842                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 843                          const struct rte_flow_action *action,
 844                          struct rte_flow_error *error)
 845 {
 846         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 847         uint64_t value = rte_be_to_cpu_32(*conf);
 848         struct rte_flow_item item;
 849         struct rte_flow_item_tcp tcp;
 850         struct rte_flow_item_tcp tcp_mask;
 851
 852         memset(&tcp, 0, sizeof(tcp));
 853         memset(&tcp_mask, 0, sizeof(tcp_mask));
 854         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 855                 /*
 856                  * The HW has no decrement operation, only increment operation.
 857                  * To simulate decrement X from Y using increment operation
 858                  * we need to add UINT32_MAX X times to Y.
 859                  * Each adding of UINT32_MAX decrements Y by 1.
 860                  */
 861                 value *= UINT32_MAX;
 862         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 863         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 864         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 865         item.spec = &tcp;
 866         item.mask = &tcp_mask;
 867         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 868                                              MLX5_MODIFICATION_TYPE_ADD, error);
 869 }
 870
 871 static enum mlx5_modification_field reg_to_field[] = {
 872         [REG_NONE] = MLX5_MODI_OUT_NONE,
 873         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 874         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 875         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 876         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 877         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 878         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 879         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 880         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 881         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 882         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 883 };
 884
 885 /**
 886  * Convert register set to DV specification.
 887  *
 888  * @param[in,out] resource
 889  *   Pointer to the modify-header resource.
 890  * @param[in] action
 891  *   Pointer to action specification.
 892  * @param[out] error
 893  *   Pointer to the error structure.
 894  *
 895  * @return
 896  *   0 on success, a negative errno value otherwise and rte_errno is set.
 897  */
 898 static int
 899 flow_dv_convert_action_set_reg
 900                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 901                          const struct rte_flow_action *action,
 902                          struct rte_flow_error *error)
 903 {
 904         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 905         struct mlx5_modification_cmd *actions = resource->actions;
 906         uint32_t i = resource->actions_num;
 907
 908         if (i >= MLX5_MAX_MODIFY_NUM)
 909                 return rte_flow_error_set(error, EINVAL,
 910                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 911                                           "too many items to modify");
 912         assert(conf->id != REG_NONE);
 913         assert(conf->id < RTE_DIM(reg_to_field));
 914         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 915         actions[i].field = reg_to_field[conf->id];
 916         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 917         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 918         ++i;
 919         resource->actions_num = i;
 920         return 0;
 921 }
 922
 923 /**
 924  * Convert SET_TAG action to DV specification.
 925  *
 926  * @param[in] dev
 927  *   Pointer to the rte_eth_dev structure.
 928  * @param[in,out] resource
 929  *   Pointer to the modify-header resource.
 930  * @param[in] conf
 931  *   Pointer to action specification.
 932  * @param[out] error
 933  *   Pointer to the error structure.
 934  *
 935  * @return
 936  *   0 on success, a negative errno value otherwise and rte_errno is set.
 937  */
 938 static int
 939 flow_dv_convert_action_set_tag
 940                         (struct rte_eth_dev *dev,
 941                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 942                          const struct rte_flow_action_set_tag *conf,
 943                          struct rte_flow_error *error)
 944 {
 945         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 946         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 947         struct rte_flow_item item = {
 948                 .spec = &data,
 949                 .mask = &mask,
 950         };
 951         struct field_modify_info reg_c_x[] = {
 952                 [1] = {0, 0, 0},
 953         };
 954         enum mlx5_modification_field reg_type;
 955         int ret;
 956
 957         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 958         if (ret < 0)
 959                 return ret;
 960         assert(ret != REG_NONE);
 961         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 962         reg_type = reg_to_field[ret];
 963         assert(reg_type > 0);
 964         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 965         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 966                                              MLX5_MODIFICATION_TYPE_SET, error);
 967 }
 968
 969 /**
 970  * Convert internal COPY_REG action to DV specification.
 971  *
 972  * @param[in] dev
 973  *   Pointer to the rte_eth_dev structure.
 974  * @param[in,out] res
 975  *   Pointer to the modify-header resource.
 976  * @param[in] action
 977  *   Pointer to action specification.
 978  * @param[out] error
 979  *   Pointer to the error structure.
 980  *
 981  * @return
 982  *   0 on success, a negative errno value otherwise and rte_errno is set.
 983  */
 984 static int
 985 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 986                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 987                                  const struct rte_flow_action *action,
 988                                  struct rte_flow_error *error)
 989 {
 990         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 991         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 992         struct rte_flow_item item = {
 993                 .spec = NULL,
 994                 .mask = &mask,
 995         };
 996         struct field_modify_info reg_src[] = {
 997                 {4, 0, reg_to_field[conf->src]},
 998                 {0, 0, 0},
 999         };
1000         struct field_modify_info reg_dst = {
1001                 .offset = 0,
1002                 .id = reg_to_field[conf->dst],
1003         };
1004         /* Adjust reg_c[0] usage according to reported mask. */
1005         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1006                 struct mlx5_priv *priv = dev->data->dev_private;
1007                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1008
1009                 assert(reg_c0);
1010                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1011                 if (conf->dst == REG_C_0) {
1012                         /* Copy to reg_c[0], within mask only. */
1013                         reg_dst.offset = rte_bsf32(reg_c0);
1014                         /*
1015                          * Mask is ignoring the enianness, because
1016                          * there is no conversion in datapath.
1017                          */
1018 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1019                         /* Copy from destination lower bits to reg_c[0]. */
1020                         mask = reg_c0 >> reg_dst.offset;
1021 #else
1022                         /* Copy from destination upper bits to reg_c[0]. */
1023                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1024                                           rte_fls_u32(reg_c0));
1025 #endif
1026                 } else {
1027                         mask = rte_cpu_to_be_32(reg_c0);
1028 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1029                         /* Copy from reg_c[0] to destination lower bits. */
1030                         reg_dst.offset = 0;
1031 #else
1032                         /* Copy from reg_c[0] to destination upper bits. */
1033                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1034                                          (rte_fls_u32(reg_c0) -
1035                                           rte_bsf32(reg_c0));
1036 #endif
1037                 }
1038         }
1039         return flow_dv_convert_modify_action(&item,
1040                                              reg_src, &reg_dst, res,
1041                                              MLX5_MODIFICATION_TYPE_COPY,
1042                                              error);
1043 }
1044
1045 /**
1046  * Convert MARK action to DV specification. This routine is used
1047  * in extensive metadata only and requires metadata register to be
1048  * handled. In legacy mode hardware tag resource is engaged.
1049  *
1050  * @param[in] dev
1051  *   Pointer to the rte_eth_dev structure.
1052  * @param[in] conf
1053  *   Pointer to MARK action specification.
1054  * @param[in,out] resource
1055  *   Pointer to the modify-header resource.
1056  * @param[out] error
1057  *   Pointer to the error structure.
1058  *
1059  * @return
1060  *   0 on success, a negative errno value otherwise and rte_errno is set.
1061  */
1062 static int
1063 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1064                             const struct rte_flow_action_mark *conf,
1065                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1066                             struct rte_flow_error *error)
1067 {
1068         struct mlx5_priv *priv = dev->data->dev_private;
1069         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1070                                            priv->sh->dv_mark_mask);
1071         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1072         struct rte_flow_item item = {
1073                 .spec = &data,
1074                 .mask = &mask,
1075         };
1076         struct field_modify_info reg_c_x[] = {
1077                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1078                 {0, 0, 0},
1079         };
1080         enum modify_reg reg;
1081
1082         if (!mask)
1083                 return rte_flow_error_set(error, EINVAL,
1084                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1085                                           NULL, "zero mark action mask");
1086         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1087         if (reg < 0)
1088                 return reg;
1089         assert(reg > 0);
1090         if (reg == REG_C_0) {
1091                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1092                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1093
1094                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1095                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1096                 mask = rte_cpu_to_be_32(mask << shl_c0);
1097         }
1098         reg_c_x[0].id = reg_to_field[reg];
1099         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1100                                              MLX5_MODIFICATION_TYPE_SET, error);
1101 }
1102
1103 /**
1104  * Get metadata register index for specified steering domain.
1105  *
1106  * @param[in] dev
1107  *   Pointer to the rte_eth_dev structure.
1108  * @param[in] attr
1109  *   Attributes of flow to determine steering domain.
1110  * @param[out] error
1111  *   Pointer to the error structure.
1112  *
1113  * @return
1114  *   positive index on success, a negative errno value otherwise
1115  *   and rte_errno is set.
1116  */
1117 static enum modify_reg
1118 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1119                          const struct rte_flow_attr *attr,
1120                          struct rte_flow_error *error)
1121 {
1122         enum modify_reg reg =
1123                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1124                                           MLX5_METADATA_FDB :
1125                                             attr->egress ?
1126                                             MLX5_METADATA_TX :
1127                                             MLX5_METADATA_RX, 0, error);
1128         if (reg < 0)
1129                 return rte_flow_error_set(error,
1130                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1131                                           NULL, "unavailable "
1132                                           "metadata register");
1133         return reg;
1134 }
1135
1136 /**
1137  * Convert SET_META action to DV specification.
1138  *
1139  * @param[in] dev
1140  *   Pointer to the rte_eth_dev structure.
1141  * @param[in,out] resource
1142  *   Pointer to the modify-header resource.
1143  * @param[in] attr
1144  *   Attributes of flow that includes this item.
1145  * @param[in] conf
1146  *   Pointer to action specification.
1147  * @param[out] error
1148  *   Pointer to the error structure.
1149  *
1150  * @return
1151  *   0 on success, a negative errno value otherwise and rte_errno is set.
1152  */
1153 static int
1154 flow_dv_convert_action_set_meta
1155                         (struct rte_eth_dev *dev,
1156                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1157                          const struct rte_flow_attr *attr,
1158                          const struct rte_flow_action_set_meta *conf,
1159                          struct rte_flow_error *error)
1160 {
1161         uint32_t data = conf->data;
1162         uint32_t mask = conf->mask;
1163         struct rte_flow_item item = {
1164                 .spec = &data,
1165                 .mask = &mask,
1166         };
1167         struct field_modify_info reg_c_x[] = {
1168                 [1] = {0, 0, 0},
1169         };
1170         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1171
1172         if (reg < 0)
1173                 return reg;
1174         /*
1175          * In datapath code there is no endianness
1176          * coversions for perfromance reasons, all
1177          * pattern conversions are done in rte_flow.
1178          */
1179         if (reg == REG_C_0) {
1180                 struct mlx5_priv *priv = dev->data->dev_private;
1181                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1182                 uint32_t shl_c0;
1183
1184                 assert(msk_c0);
1185 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1186                 shl_c0 = rte_bsf32(msk_c0);
1187 #else
1188                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1189 #endif
1190                 mask <<= shl_c0;
1191                 data <<= shl_c0;
1192                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1193         }
1194         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1195         /* The routine expects parameters in memory as big-endian ones. */
1196         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1197                                              MLX5_MODIFICATION_TYPE_SET, error);
1198 }
1199
1200 /**
1201  * Convert modify-header set IPv4 DSCP action to DV specification.
1202  *
1203  * @param[in,out] resource
1204  *   Pointer to the modify-header resource.
1205  * @param[in] action
1206  *   Pointer to action specification.
1207  * @param[out] error
1208  *   Pointer to the error structure.
1209  *
1210  * @return
1211  *   0 on success, a negative errno value otherwise and rte_errno is set.
1212  */
1213 static int
1214 flow_dv_convert_action_modify_ipv4_dscp
1215                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1216                          const struct rte_flow_action *action,
1217                          struct rte_flow_error *error)
1218 {
1219         const struct rte_flow_action_set_dscp *conf =
1220                 (const struct rte_flow_action_set_dscp *)(action->conf);
1221         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1222         struct rte_flow_item_ipv4 ipv4;
1223         struct rte_flow_item_ipv4 ipv4_mask;
1224
1225         memset(&ipv4, 0, sizeof(ipv4));
1226         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1227         ipv4.hdr.type_of_service = conf->dscp;
1228         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1229         item.spec = &ipv4;
1230         item.mask = &ipv4_mask;
1231         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1232                                              MLX5_MODIFICATION_TYPE_SET, error);
1233 }
1234
1235 /**
1236  * Convert modify-header set IPv6 DSCP action to DV specification.
1237  *
1238  * @param[in,out] resource
1239  *   Pointer to the modify-header resource.
1240  * @param[in] action
1241  *   Pointer to action specification.
1242  * @param[out] error
1243  *   Pointer to the error structure.
1244  *
1245  * @return
1246  *   0 on success, a negative errno value otherwise and rte_errno is set.
1247  */
1248 static int
1249 flow_dv_convert_action_modify_ipv6_dscp
1250                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1251                          const struct rte_flow_action *action,
1252                          struct rte_flow_error *error)
1253 {
1254         const struct rte_flow_action_set_dscp *conf =
1255                 (const struct rte_flow_action_set_dscp *)(action->conf);
1256         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1257         struct rte_flow_item_ipv6 ipv6;
1258         struct rte_flow_item_ipv6 ipv6_mask;
1259
1260         memset(&ipv6, 0, sizeof(ipv6));
1261         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1262         /*
1263          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1264          * rdma-core only accept the DSCP bits byte aligned start from
1265          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1266          * bits in IPv6 case as rdma-core requires byte aligned value.
1267          */
1268         ipv6.hdr.vtc_flow = conf->dscp;
1269         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1270         item.spec = &ipv6;
1271         item.mask = &ipv6_mask;
1272         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1273                                              MLX5_MODIFICATION_TYPE_SET, error);
1274 }
1275
1276 /**
1277  * Validate MARK item.
1278  *
1279  * @param[in] dev
1280  *   Pointer to the rte_eth_dev structure.
1281  * @param[in] item
1282  *   Item specification.
1283  * @param[in] attr
1284  *   Attributes of flow that includes this item.
1285  * @param[out] error
1286  *   Pointer to error structure.
1287  *
1288  * @return
1289  *   0 on success, a negative errno value otherwise and rte_errno is set.
1290  */
1291 static int
1292 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1293                            const struct rte_flow_item *item,
1294                            const struct rte_flow_attr *attr __rte_unused,
1295                            struct rte_flow_error *error)
1296 {
1297         struct mlx5_priv *priv = dev->data->dev_private;
1298         struct mlx5_dev_config *config = &priv->config;
1299         const struct rte_flow_item_mark *spec = item->spec;
1300         const struct rte_flow_item_mark *mask = item->mask;
1301         const struct rte_flow_item_mark nic_mask = {
1302                 .id = priv->sh->dv_mark_mask,
1303         };
1304         int ret;
1305
1306         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1307                 return rte_flow_error_set(error, ENOTSUP,
1308                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1309                                           "extended metadata feature"
1310                                           " isn't enabled");
1311         if (!mlx5_flow_ext_mreg_supported(dev))
1312                 return rte_flow_error_set(error, ENOTSUP,
1313                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1314                                           "extended metadata register"
1315                                           " isn't supported");
1316         if (!nic_mask.id)
1317                 return rte_flow_error_set(error, ENOTSUP,
1318                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1319                                           "extended metadata register"
1320                                           " isn't available");
1321         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1322         if (ret < 0)
1323                 return ret;
1324         if (!spec)
1325                 return rte_flow_error_set(error, EINVAL,
1326                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1327                                           item->spec,
1328                                           "data cannot be empty");
1329         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1330                 return rte_flow_error_set(error, EINVAL,
1331                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1332                                           &spec->id,
1333                                           "mark id exceeds the limit");
1334         if (!mask)
1335                 mask = &nic_mask;
1336         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1337                                         (const uint8_t *)&nic_mask,
1338                                         sizeof(struct rte_flow_item_mark),
1339                                         error);
1340         if (ret < 0)
1341                 return ret;
1342         return 0;
1343 }
1344
1345 /**
1346  * Validate META item.
1347  *
1348  * @param[in] dev
1349  *   Pointer to the rte_eth_dev structure.
1350  * @param[in] item
1351  *   Item specification.
1352  * @param[in] attr
1353  *   Attributes of flow that includes this item.
1354  * @param[out] error
1355  *   Pointer to error structure.
1356  *
1357  * @return
1358  *   0 on success, a negative errno value otherwise and rte_errno is set.
1359  */
1360 static int
1361 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1362                            const struct rte_flow_item *item,
1363                            const struct rte_flow_attr *attr,
1364                            struct rte_flow_error *error)
1365 {
1366         struct mlx5_priv *priv = dev->data->dev_private;
1367         struct mlx5_dev_config *config = &priv->config;
1368         const struct rte_flow_item_meta *spec = item->spec;
1369         const struct rte_flow_item_meta *mask = item->mask;
1370         struct rte_flow_item_meta nic_mask = {
1371                 .data = UINT32_MAX
1372         };
1373         enum modify_reg reg;
1374         int ret;
1375
1376         if (!spec)
1377                 return rte_flow_error_set(error, EINVAL,
1378                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1379                                           item->spec,
1380                                           "data cannot be empty");
1381         if (!spec->data)
1382                 return rte_flow_error_set(error, EINVAL,
1383                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1384                                           "data cannot be zero");
1385         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1386                 if (!mlx5_flow_ext_mreg_supported(dev))
1387                         return rte_flow_error_set(error, ENOTSUP,
1388                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1389                                           "extended metadata register"
1390                                           " isn't supported");
1391                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1392                 if (reg < 0)
1393                         return reg;
1394                 if (reg == REG_B)
1395                         return rte_flow_error_set(error, ENOTSUP,
1396                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1397                                           "match on reg_b "
1398                                           "isn't supported");
1399                 if (reg != REG_A)
1400                         nic_mask.data = priv->sh->dv_meta_mask;
1401         }
1402         if (!mask)
1403                 mask = &rte_flow_item_meta_mask;
1404         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1405                                         (const uint8_t *)&nic_mask,
1406                                         sizeof(struct rte_flow_item_meta),
1407                                         error);
1408         return ret;
1409 }
1410
1411 /**
1412  * Validate TAG item.
1413  *
1414  * @param[in] dev
1415  *   Pointer to the rte_eth_dev structure.
1416  * @param[in] item
1417  *   Item specification.
1418  * @param[in] attr
1419  *   Attributes of flow that includes this item.
1420  * @param[out] error
1421  *   Pointer to error structure.
1422  *
1423  * @return
1424  *   0 on success, a negative errno value otherwise and rte_errno is set.
1425  */
1426 static int
1427 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1428                           const struct rte_flow_item *item,
1429                           const struct rte_flow_attr *attr __rte_unused,
1430                           struct rte_flow_error *error)
1431 {
1432         const struct rte_flow_item_tag *spec = item->spec;
1433         const struct rte_flow_item_tag *mask = item->mask;
1434         const struct rte_flow_item_tag nic_mask = {
1435                 .data = RTE_BE32(UINT32_MAX),
1436                 .index = 0xff,
1437         };
1438         int ret;
1439
1440         if (!mlx5_flow_ext_mreg_supported(dev))
1441                 return rte_flow_error_set(error, ENOTSUP,
1442                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1443                                           "extensive metadata register"
1444                                           " isn't supported");
1445         if (!spec)
1446                 return rte_flow_error_set(error, EINVAL,
1447                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1448                                           item->spec,
1449                                           "data cannot be empty");
1450         if (!mask)
1451                 mask = &rte_flow_item_tag_mask;
1452         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1453                                         (const uint8_t *)&nic_mask,
1454                                         sizeof(struct rte_flow_item_tag),
1455                                         error);
1456         if (ret < 0)
1457                 return ret;
1458         if (mask->index != 0xff)
1459                 return rte_flow_error_set(error, EINVAL,
1460                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1461                                           "partial mask for tag index"
1462                                           " is not supported");
1463         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1464         if (ret < 0)
1465                 return ret;
1466         assert(ret != REG_NONE);
1467         return 0;
1468 }
1469
1470 /**
1471  * Validate vport item.
1472  *
1473  * @param[in] dev
1474  *   Pointer to the rte_eth_dev structure.
1475  * @param[in] item
1476  *   Item specification.
1477  * @param[in] attr
1478  *   Attributes of flow that includes this item.
1479  * @param[in] item_flags
1480  *   Bit-fields that holds the items detected until now.
1481  * @param[out] error
1482  *   Pointer to error structure.
1483  *
1484  * @return
1485  *   0 on success, a negative errno value otherwise and rte_errno is set.
1486  */
1487 static int
1488 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1489                               const struct rte_flow_item *item,
1490                               const struct rte_flow_attr *attr,
1491                               uint64_t item_flags,
1492                               struct rte_flow_error *error)
1493 {
1494         const struct rte_flow_item_port_id *spec = item->spec;
1495         const struct rte_flow_item_port_id *mask = item->mask;
1496         const struct rte_flow_item_port_id switch_mask = {
1497                         .id = 0xffffffff,
1498         };
1499         struct mlx5_priv *esw_priv;
1500         struct mlx5_priv *dev_priv;
1501         int ret;
1502
1503         if (!attr->transfer)
1504                 return rte_flow_error_set(error, EINVAL,
1505                                           RTE_FLOW_ERROR_TYPE_ITEM,
1506                                           NULL,
1507                                           "match on port id is valid only"
1508                                           " when transfer flag is enabled");
1509         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1510                 return rte_flow_error_set(error, ENOTSUP,
1511                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1512                                           "multiple source ports are not"
1513                                           " supported");
1514         if (!mask)
1515                 mask = &switch_mask;
1516         if (mask->id != 0xffffffff)
1517                 return rte_flow_error_set(error, ENOTSUP,
1518                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1519                                            mask,
1520                                            "no support for partial mask on"
1521                                            " \"id\" field");
1522         ret = mlx5_flow_item_acceptable
1523                                 (item, (const uint8_t *)mask,
1524                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1525                                  sizeof(struct rte_flow_item_port_id),
1526                                  error);
1527         if (ret)
1528                 return ret;
1529         if (!spec)
1530                 return 0;
1531         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1532         if (!esw_priv)
1533                 return rte_flow_error_set(error, rte_errno,
1534                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1535                                           "failed to obtain E-Switch info for"
1536                                           " port");
1537         dev_priv = mlx5_dev_to_eswitch_info(dev);
1538         if (!dev_priv)
1539                 return rte_flow_error_set(error, rte_errno,
1540                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1541                                           NULL,
1542                                           "failed to obtain E-Switch info");
1543         if (esw_priv->domain_id != dev_priv->domain_id)
1544                 return rte_flow_error_set(error, EINVAL,
1545                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1546                                           "cannot match on a port from a"
1547                                           " different E-Switch");
1548         return 0;
1549 }
1550
1551 /**
1552  * Validate GTP item.
1553  *
1554  * @param[in] dev
1555  *   Pointer to the rte_eth_dev structure.
1556  * @param[in] item
1557  *   Item specification.
1558  * @param[in] item_flags
1559  *   Bit-fields that holds the items detected until now.
1560  * @param[out] error
1561  *   Pointer to error structure.
1562  *
1563  * @return
1564  *   0 on success, a negative errno value otherwise and rte_errno is set.
1565  */
1566 static int
1567 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1568                           const struct rte_flow_item *item,
1569                           uint64_t item_flags,
1570                           struct rte_flow_error *error)
1571 {
1572         struct mlx5_priv *priv = dev->data->dev_private;
1573         const struct rte_flow_item_gtp *mask = item->mask;
1574         const struct rte_flow_item_gtp nic_mask = {
1575                 .msg_type = 0xff,
1576                 .teid = RTE_BE32(0xffffffff),
1577         };
1578
1579         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1580                 return rte_flow_error_set(error, ENOTSUP,
1581                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1582                                           "GTP support is not enabled");
1583         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1584                 return rte_flow_error_set(error, ENOTSUP,
1585                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1586                                           "multiple tunnel layers not"
1587                                           " supported");
1588         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1589                 return rte_flow_error_set(error, EINVAL,
1590                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1591                                           "no outer UDP layer found");
1592         if (!mask)
1593                 mask = &rte_flow_item_gtp_mask;
1594         return mlx5_flow_item_acceptable
1595                 (item, (const uint8_t *)mask,
1596                  (const uint8_t *)&nic_mask,
1597                  sizeof(struct rte_flow_item_gtp),
1598                  error);
1599 }
1600
1601 /**
1602  * Validate the pop VLAN action.
1603  *
1604  * @param[in] dev
1605  *   Pointer to the rte_eth_dev structure.
1606  * @param[in] action_flags
1607  *   Holds the actions detected until now.
1608  * @param[in] action
1609  *   Pointer to the pop vlan action.
1610  * @param[in] item_flags
1611  *   The items found in this flow rule.
1612  * @param[in] attr
1613  *   Pointer to flow attributes.
1614  * @param[out] error
1615  *   Pointer to error structure.
1616  *
1617  * @return
1618  *   0 on success, a negative errno value otherwise and rte_errno is set.
1619  */
1620 static int
1621 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1622                                  uint64_t action_flags,
1623                                  const struct rte_flow_action *action,
1624                                  uint64_t item_flags,
1625                                  const struct rte_flow_attr *attr,
1626                                  struct rte_flow_error *error)
1627 {
1628         struct mlx5_priv *priv = dev->data->dev_private;
1629
1630         (void)action;
1631         (void)attr;
1632         if (!priv->sh->pop_vlan_action)
1633                 return rte_flow_error_set(error, ENOTSUP,
1634                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1635                                           NULL,
1636                                           "pop vlan action is not supported");
1637         /*
1638          * Check for inconsistencies:
1639          *  fail strip_vlan in a flow that matches packets without VLAN tags.
1640          *  fail strip_vlan in a flow that matches packets without explicitly a
1641          *  matching on VLAN tag ?
1642          */
1643         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
1644                 return rte_flow_error_set(error, ENOTSUP,
1645                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1646                                           NULL,
1647                                           "no support for multiple vlan pop "
1648                                           "actions");
1649         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1650                 return rte_flow_error_set(error, ENOTSUP,
1651                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1652                                           NULL,
1653                                           "cannot pop vlan without a "
1654                                           "match on (outer) vlan in the flow");
1655         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1656                 return rte_flow_error_set(error, EINVAL,
1657                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1658                                           "wrong action order, port_id should "
1659                                           "be after pop VLAN action");
1660         return 0;
1661 }
1662
1663 /**
1664  * Get VLAN default info from vlan match info.
1665  *
1666  * @param[in] dev
1667  *   Pointer to the rte_eth_dev structure.
1668  * @param[in] item
1669  *   the list of item specifications.
1670  * @param[out] vlan
1671  *   pointer VLAN info to fill to.
1672  * @param[out] error
1673  *   Pointer to error structure.
1674  *
1675  * @return
1676  *   0 on success, a negative errno value otherwise and rte_errno is set.
1677  */
1678 static void
1679 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1680                                   struct rte_vlan_hdr *vlan)
1681 {
1682         const struct rte_flow_item_vlan nic_mask = {
1683                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1684                                 MLX5DV_FLOW_VLAN_VID_MASK),
1685                 .inner_type = RTE_BE16(0xffff),
1686         };
1687
1688         if (items == NULL)
1689                 return;
1690         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1691                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1692                 ;
1693         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1694                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1695                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1696
1697                 if (!vlan_m)
1698                         vlan_m = &nic_mask;
1699                 /* Only full match values are accepted */
1700                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1701                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1702                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1703                         vlan->vlan_tci |=
1704                                 rte_be_to_cpu_16(vlan_v->tci &
1705                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1706                 }
1707                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1708                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1709                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1710                         vlan->vlan_tci |=
1711                                 rte_be_to_cpu_16(vlan_v->tci &
1712                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1713                 }
1714                 if (vlan_m->inner_type == nic_mask.inner_type)
1715                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1716                                                            vlan_m->inner_type);
1717         }
1718 }
1719
1720 /**
1721  * Validate the push VLAN action.
1722  *
1723  * @param[in] action_flags
1724  *   Holds the actions detected until now.
1725  * @param[in] action
1726  *   Pointer to the encap action.
1727  * @param[in] attr
1728  *   Pointer to flow attributes
1729  * @param[out] error
1730  *   Pointer to error structure.
1731  *
1732  * @return
1733  *   0 on success, a negative errno value otherwise and rte_errno is set.
1734  */
1735 static int
1736 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1737                                   uint64_t item_flags __rte_unused,
1738                                   const struct rte_flow_action *action,
1739                                   const struct rte_flow_attr *attr,
1740                                   struct rte_flow_error *error)
1741 {
1742         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1743
1744         if (attr->ingress)
1745                 return rte_flow_error_set(error, ENOTSUP,
1746                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1747                                           NULL,
1748                                           "push VLAN action not supported for "
1749                                           "ingress");
1750         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1751             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1752                 return rte_flow_error_set(error, EINVAL,
1753                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1754                                           "invalid vlan ethertype");
1755         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1756                 return rte_flow_error_set(error, ENOTSUP,
1757                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1758                                           "no support for multiple VLAN "
1759                                           "actions");
1760         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1761                 return rte_flow_error_set(error, EINVAL,
1762                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1763                                           "wrong action order, port_id should "
1764                                           "be after push VLAN");
1765         (void)attr;
1766         return 0;
1767 }
1768
1769 /**
1770  * Validate the set VLAN PCP.
1771  *
1772  * @param[in] action_flags
1773  *   Holds the actions detected until now.
1774  * @param[in] actions
1775  *   Pointer to the list of actions remaining in the flow rule.
1776  * @param[in] attr
1777  *   Pointer to flow attributes
1778  * @param[out] error
1779  *   Pointer to error structure.
1780  *
1781  * @return
1782  *   0 on success, a negative errno value otherwise and rte_errno is set.
1783  */
1784 static int
1785 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1786                                      const struct rte_flow_action actions[],
1787                                      struct rte_flow_error *error)
1788 {
1789         const struct rte_flow_action *action = actions;
1790         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1791
1792         if (conf->vlan_pcp > 7)
1793                 return rte_flow_error_set(error, EINVAL,
1794                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1795                                           "VLAN PCP value is too big");
1796         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1797                 return rte_flow_error_set(error, ENOTSUP,
1798                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1799                                           "set VLAN PCP action must follow "
1800                                           "the push VLAN action");
1801         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1802                 return rte_flow_error_set(error, ENOTSUP,
1803                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1804                                           "Multiple VLAN PCP modification are "
1805                                           "not supported");
1806         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1807                 return rte_flow_error_set(error, EINVAL,
1808                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1809                                           "wrong action order, port_id should "
1810                                           "be after set VLAN PCP");
1811         return 0;
1812 }
1813
1814 /**
1815  * Validate the set VLAN VID.
1816  *
1817  * @param[in] item_flags
1818  *   Holds the items detected in this rule.
1819  * @param[in] actions
1820  *   Pointer to the list of actions remaining in the flow rule.
1821  * @param[in] attr
1822  *   Pointer to flow attributes
1823  * @param[out] error
1824  *   Pointer to error structure.
1825  *
1826  * @return
1827  *   0 on success, a negative errno value otherwise and rte_errno is set.
1828  */
1829 static int
1830 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1831                                      uint64_t action_flags,
1832                                      const struct rte_flow_action actions[],
1833                                      struct rte_flow_error *error)
1834 {
1835         const struct rte_flow_action *action = actions;
1836         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1837
1838         if (conf->vlan_vid > RTE_BE16(0xFFE))
1839                 return rte_flow_error_set(error, EINVAL,
1840                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1841                                           "VLAN VID value is too big");
1842         /* there is an of_push_vlan action before us */
1843         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1844                 if (mlx5_flow_find_action(actions + 1,
1845                                           RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1846                         return rte_flow_error_set(error, ENOTSUP,
1847                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
1848                                         "Multiple VLAN VID modifications are "
1849                                         "not supported");
1850                 else
1851                         return 0;
1852         }
1853
1854         /*
1855          * Action is on an existing VLAN header:
1856          *    Need to verify this is a single modify CID action.
1857          *   Rule mast include a match on outer VLAN.
1858          */
1859         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1860                 return rte_flow_error_set(error, ENOTSUP,
1861                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1862                                           "Multiple VLAN VID modifications are "
1863                                           "not supported");
1864         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1865                 return rte_flow_error_set(error, EINVAL,
1866                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1867                                           "match on VLAN is required in order "
1868                                           "to set VLAN VID");
1869         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1870                 return rte_flow_error_set(error, EINVAL,
1871                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1872                                           "wrong action order, port_id should "
1873                                           "be after set VLAN VID");
1874         return 0;
1875 }
1876
1877 /*
1878  * Validate the FLAG action.
1879  *
1880  * @param[in] dev
1881  *   Pointer to the rte_eth_dev structure.
1882  * @param[in] action_flags
1883  *   Holds the actions detected until now.
1884  * @param[in] attr
1885  *   Pointer to flow attributes
1886  * @param[out] error
1887  *   Pointer to error structure.
1888  *
1889  * @return
1890  *   0 on success, a negative errno value otherwise and rte_errno is set.
1891  */
1892 static int
1893 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1894                              uint64_t action_flags,
1895                              const struct rte_flow_attr *attr,
1896                              struct rte_flow_error *error)
1897 {
1898         struct mlx5_priv *priv = dev->data->dev_private;
1899         struct mlx5_dev_config *config = &priv->config;
1900         int ret;
1901
1902         /* Fall back if no extended metadata register support. */
1903         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1904                 return mlx5_flow_validate_action_flag(action_flags, attr,
1905                                                       error);
1906         /* Extensive metadata mode requires registers. */
1907         if (!mlx5_flow_ext_mreg_supported(dev))
1908                 return rte_flow_error_set(error, ENOTSUP,
1909                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1910                                           "no metadata registers "
1911                                           "to support flag action");
1912         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1913                 return rte_flow_error_set(error, ENOTSUP,
1914                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1915                                           "extended metadata register"
1916                                           " isn't available");
1917         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1918         if (ret < 0)
1919                 return ret;
1920         assert(ret > 0);
1921         if (action_flags & MLX5_FLOW_ACTION_MARK)
1922                 return rte_flow_error_set(error, EINVAL,
1923                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1924                                           "can't mark and flag in same flow");
1925         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1926                 return rte_flow_error_set(error, EINVAL,
1927                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1928                                           "can't have 2 flag"
1929                                           " actions in same flow");
1930         return 0;
1931 }
1932
1933 /**
1934  * Validate MARK action.
1935  *
1936  * @param[in] dev
1937  *   Pointer to the rte_eth_dev structure.
1938  * @param[in] action
1939  *   Pointer to action.
1940  * @param[in] action_flags
1941  *   Holds the actions detected until now.
1942  * @param[in] attr
1943  *   Pointer to flow attributes
1944  * @param[out] error
1945  *   Pointer to error structure.
1946  *
1947  * @return
1948  *   0 on success, a negative errno value otherwise and rte_errno is set.
1949  */
1950 static int
1951 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1952                              const struct rte_flow_action *action,
1953                              uint64_t action_flags,
1954                              const struct rte_flow_attr *attr,
1955                              struct rte_flow_error *error)
1956 {
1957         struct mlx5_priv *priv = dev->data->dev_private;
1958         struct mlx5_dev_config *config = &priv->config;
1959         const struct rte_flow_action_mark *mark = action->conf;
1960         int ret;
1961
1962         /* Fall back if no extended metadata register support. */
1963         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1964                 return mlx5_flow_validate_action_mark(action, action_flags,
1965                                                       attr, error);
1966         /* Extensive metadata mode requires registers. */
1967         if (!mlx5_flow_ext_mreg_supported(dev))
1968                 return rte_flow_error_set(error, ENOTSUP,
1969                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1970                                           "no metadata registers "
1971                                           "to support mark action");
1972         if (!priv->sh->dv_mark_mask)
1973                 return rte_flow_error_set(error, ENOTSUP,
1974                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1975                                           "extended metadata register"
1976                                           " isn't available");
1977         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1978         if (ret < 0)
1979                 return ret;
1980         assert(ret > 0);
1981         if (!mark)
1982                 return rte_flow_error_set(error, EINVAL,
1983                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1984                                           "configuration cannot be null");
1985         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1986                 return rte_flow_error_set(error, EINVAL,
1987                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1988                                           &mark->id,
1989                                           "mark id exceeds the limit");
1990         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1991                 return rte_flow_error_set(error, EINVAL,
1992                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1993                                           "can't flag and mark in same flow");
1994         if (action_flags & MLX5_FLOW_ACTION_MARK)
1995                 return rte_flow_error_set(error, EINVAL,
1996                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1997                                           "can't have 2 mark actions in same"
1998                                           " flow");
1999         return 0;
2000 }
2001
2002 /**
2003  * Validate SET_META action.
2004  *
2005  * @param[in] dev
2006  *   Pointer to the rte_eth_dev structure.
2007  * @param[in] action
2008  *   Pointer to the encap action.
2009  * @param[in] action_flags
2010  *   Holds the actions detected until now.
2011  * @param[in] attr
2012  *   Pointer to flow attributes
2013  * @param[out] error
2014  *   Pointer to error structure.
2015  *
2016  * @return
2017  *   0 on success, a negative errno value otherwise and rte_errno is set.
2018  */
2019 static int
2020 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2021                                  const struct rte_flow_action *action,
2022                                  uint64_t action_flags __rte_unused,
2023                                  const struct rte_flow_attr *attr,
2024                                  struct rte_flow_error *error)
2025 {
2026         const struct rte_flow_action_set_meta *conf;
2027         uint32_t nic_mask = UINT32_MAX;
2028         enum modify_reg reg;
2029
2030         if (!mlx5_flow_ext_mreg_supported(dev))
2031                 return rte_flow_error_set(error, ENOTSUP,
2032                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2033                                           "extended metadata register"
2034                                           " isn't supported");
2035         reg = flow_dv_get_metadata_reg(dev, attr, error);
2036         if (reg < 0)
2037                 return reg;
2038         if (reg != REG_A && reg != REG_B) {
2039                 struct mlx5_priv *priv = dev->data->dev_private;
2040
2041                 nic_mask = priv->sh->dv_meta_mask;
2042         }
2043         if (!(action->conf))
2044                 return rte_flow_error_set(error, EINVAL,
2045                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2046                                           "configuration cannot be null");
2047         conf = (const struct rte_flow_action_set_meta *)action->conf;
2048         if (!conf->mask)
2049                 return rte_flow_error_set(error, EINVAL,
2050                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2051                                           "zero mask doesn't have any effect");
2052         if (conf->mask & ~nic_mask)
2053                 return rte_flow_error_set(error, EINVAL,
2054                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2055                                           "meta data must be within reg C0");
2056         if (!(conf->data & conf->mask))
2057                 return rte_flow_error_set(error, EINVAL,
2058                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2059                                           "zero value has no effect");
2060         return 0;
2061 }
2062
2063 /**
2064  * Validate SET_TAG action.
2065  *
2066  * @param[in] dev
2067  *   Pointer to the rte_eth_dev structure.
2068  * @param[in] action
2069  *   Pointer to the encap action.
2070  * @param[in] action_flags
2071  *   Holds the actions detected until now.
2072  * @param[in] attr
2073  *   Pointer to flow attributes
2074  * @param[out] error
2075  *   Pointer to error structure.
2076  *
2077  * @return
2078  *   0 on success, a negative errno value otherwise and rte_errno is set.
2079  */
2080 static int
2081 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2082                                 const struct rte_flow_action *action,
2083                                 uint64_t action_flags,
2084                                 const struct rte_flow_attr *attr,
2085                                 struct rte_flow_error *error)
2086 {
2087         const struct rte_flow_action_set_tag *conf;
2088         const uint64_t terminal_action_flags =
2089                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2090                 MLX5_FLOW_ACTION_RSS;
2091         int ret;
2092
2093         if (!mlx5_flow_ext_mreg_supported(dev))
2094                 return rte_flow_error_set(error, ENOTSUP,
2095                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2096                                           "extensive metadata register"
2097                                           " isn't supported");
2098         if (!(action->conf))
2099                 return rte_flow_error_set(error, EINVAL,
2100                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2101                                           "configuration cannot be null");
2102         conf = (const struct rte_flow_action_set_tag *)action->conf;
2103         if (!conf->mask)
2104                 return rte_flow_error_set(error, EINVAL,
2105                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2106                                           "zero mask doesn't have any effect");
2107         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2108         if (ret < 0)
2109                 return ret;
2110         if (!attr->transfer && attr->ingress &&
2111             (action_flags & terminal_action_flags))
2112                 return rte_flow_error_set(error, EINVAL,
2113                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2114                                           "set_tag has no effect"
2115                                           " with terminal actions");
2116         return 0;
2117 }
2118
2119 /**
2120  * Validate count action.
2121  *
2122  * @param[in] dev
2123  *   device otr.
2124  * @param[out] error
2125  *   Pointer to error structure.
2126  *
2127  * @return
2128  *   0 on success, a negative errno value otherwise and rte_errno is set.
2129  */
2130 static int
2131 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2132                               struct rte_flow_error *error)
2133 {
2134         struct mlx5_priv *priv = dev->data->dev_private;
2135
2136         if (!priv->config.devx)
2137                 goto notsup_err;
2138 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2139         return 0;
2140 #endif
2141 notsup_err:
2142         return rte_flow_error_set
2143                       (error, ENOTSUP,
2144                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2145                        NULL,
2146                        "count action not supported");
2147 }
2148
2149 /**
2150  * Validate the L2 encap action.
2151  *
2152  * @param[in] action_flags
2153  *   Holds the actions detected until now.
2154  * @param[in] action
2155  *   Pointer to the encap action.
2156  * @param[in] attr
2157  *   Pointer to flow attributes
2158  * @param[out] error
2159  *   Pointer to error structure.
2160  *
2161  * @return
2162  *   0 on success, a negative errno value otherwise and rte_errno is set.
2163  */
2164 static int
2165 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2166                                  const struct rte_flow_action *action,
2167                                  const struct rte_flow_attr *attr,
2168                                  struct rte_flow_error *error)
2169 {
2170         if (!(action->conf))
2171                 return rte_flow_error_set(error, EINVAL,
2172                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2173                                           "configuration cannot be null");
2174         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2175                 return rte_flow_error_set(error, EINVAL,
2176                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2177                                           "can only have a single encap or"
2178                                           " decap action in a flow");
2179         if (!attr->transfer && attr->ingress)
2180                 return rte_flow_error_set(error, ENOTSUP,
2181                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2182                                           NULL,
2183                                           "encap action not supported for "
2184                                           "ingress");
2185         return 0;
2186 }
2187
2188 /**
2189  * Validate the L2 decap action.
2190  *
2191  * @param[in] action_flags
2192  *   Holds the actions detected until now.
2193  * @param[in] attr
2194  *   Pointer to flow attributes
2195  * @param[out] error
2196  *   Pointer to error structure.
2197  *
2198  * @return
2199  *   0 on success, a negative errno value otherwise and rte_errno is set.
2200  */
2201 static int
2202 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2203                                  const struct rte_flow_attr *attr,
2204                                  struct rte_flow_error *error)
2205 {
2206         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2207                 return rte_flow_error_set(error, EINVAL,
2208                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2209                                           "can only have a single encap or"
2210                                           " decap action in a flow");
2211         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2212                 return rte_flow_error_set(error, EINVAL,
2213                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2214                                           "can't have decap action after"
2215                                           " modify action");
2216         if (attr->egress)
2217                 return rte_flow_error_set(error, ENOTSUP,
2218                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2219                                           NULL,
2220                                           "decap action not supported for "
2221                                           "egress");
2222         return 0;
2223 }
2224
2225 /**
2226  * Validate the raw encap action.
2227  *
2228  * @param[in] action_flags
2229  *   Holds the actions detected until now.
2230  * @param[in] action
2231  *   Pointer to the encap action.
2232  * @param[in] attr
2233  *   Pointer to flow attributes
2234  * @param[out] error
2235  *   Pointer to error structure.
2236  *
2237  * @return
2238  *   0 on success, a negative errno value otherwise and rte_errno is set.
2239  */
2240 static int
2241 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2242                                   const struct rte_flow_action *action,
2243                                   const struct rte_flow_attr *attr,
2244                                   struct rte_flow_error *error)
2245 {
2246         const struct rte_flow_action_raw_encap *raw_encap =
2247                 (const struct rte_flow_action_raw_encap *)action->conf;
2248         if (!(action->conf))
2249                 return rte_flow_error_set(error, EINVAL,
2250                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2251                                           "configuration cannot be null");
2252         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2253                 return rte_flow_error_set(error, EINVAL,
2254                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2255                                           "can only have a single encap"
2256                                           " action in a flow");
2257         /* encap without preceding decap is not supported for ingress */
2258         if (!attr->transfer &&  attr->ingress &&
2259             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2260                 return rte_flow_error_set(error, ENOTSUP,
2261                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2262                                           NULL,
2263                                           "encap action not supported for "
2264                                           "ingress");
2265         if (!raw_encap->size || !raw_encap->data)
2266                 return rte_flow_error_set(error, EINVAL,
2267                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2268                                           "raw encap data cannot be empty");
2269         return 0;
2270 }
2271
2272 /**
2273  * Validate the raw decap action.
2274  *
2275  * @param[in] action_flags
2276  *   Holds the actions detected until now.
2277  * @param[in] action
2278  *   Pointer to the encap action.
2279  * @param[in] attr
2280  *   Pointer to flow attributes
2281  * @param[out] error
2282  *   Pointer to error structure.
2283  *
2284  * @return
2285  *   0 on success, a negative errno value otherwise and rte_errno is set.
2286  */
2287 static int
2288 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2289                                   const struct rte_flow_action *action,
2290                                   const struct rte_flow_attr *attr,
2291                                   struct rte_flow_error *error)
2292 {
2293         const struct rte_flow_action_raw_decap *decap   = action->conf;
2294
2295         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2296                 return rte_flow_error_set(error, EINVAL,
2297                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2298                                           "can't have encap action before"
2299                                           " decap action");
2300         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2301                 return rte_flow_error_set(error, EINVAL,
2302                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2303                                           "can only have a single decap"
2304                                           " action in a flow");
2305         /* decap action is valid on egress only if it is followed by encap */
2306         if (attr->egress && decap &&
2307             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2308                 return rte_flow_error_set(error, ENOTSUP,
2309                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2310                                           NULL, "decap action not supported"
2311                                           " for egress");
2312         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2313                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2314                 return rte_flow_error_set(error, EINVAL,
2315                                           RTE_FLOW_ERROR_TYPE_ACTION,
2316                                           NULL,
2317                                           "can't have decap action "
2318                                           "after modify action");
2319         }
2320         return 0;
2321 }
2322
2323 /**
2324  * Find existing encap/decap resource or create and register a new one.
2325  *
2326  * @param[in, out] dev
2327  *   Pointer to rte_eth_dev structure.
2328  * @param[in, out] resource
2329  *   Pointer to encap/decap resource.
2330  * @parm[in, out] dev_flow
2331  *   Pointer to the dev_flow.
2332  * @param[out] error
2333  *   pointer to error structure.
2334  *
2335  * @return
2336  *   0 on success otherwise -errno and errno is set.
2337  */
2338 static int
2339 flow_dv_encap_decap_resource_register
2340                         (struct rte_eth_dev *dev,
2341                          struct mlx5_flow_dv_encap_decap_resource *resource,
2342                          struct mlx5_flow *dev_flow,
2343                          struct rte_flow_error *error)
2344 {
2345         struct mlx5_priv *priv = dev->data->dev_private;
2346         struct mlx5_ibv_shared *sh = priv->sh;
2347         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2348         struct mlx5dv_dr_domain *domain;
2349
2350         resource->flags = dev_flow->group ? 0 : 1;
2351         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2352                 domain = sh->fdb_domain;
2353         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2354                 domain = sh->rx_domain;
2355         else
2356                 domain = sh->tx_domain;
2357         /* Lookup a matching resource from cache. */
2358         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2359                 if (resource->reformat_type == cache_resource->reformat_type &&
2360                     resource->ft_type == cache_resource->ft_type &&
2361                     resource->flags == cache_resource->flags &&
2362                     resource->size == cache_resource->size &&
2363                     !memcmp((const void *)resource->buf,
2364                             (const void *)cache_resource->buf,
2365                             resource->size)) {
2366                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2367                                 (void *)cache_resource,
2368                                 rte_atomic32_read(&cache_resource->refcnt));
2369                         rte_atomic32_inc(&cache_resource->refcnt);
2370                         dev_flow->dv.encap_decap = cache_resource;
2371                         return 0;
2372                 }
2373         }
2374         /* Register new encap/decap resource. */
2375         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2376         if (!cache_resource)
2377                 return rte_flow_error_set(error, ENOMEM,
2378                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2379                                           "cannot allocate resource memory");
2380         *cache_resource = *resource;
2381         cache_resource->verbs_action =
2382                 mlx5_glue->dv_create_flow_action_packet_reformat
2383                         (sh->ctx, cache_resource->reformat_type,
2384                          cache_resource->ft_type, domain, cache_resource->flags,
2385                          cache_resource->size,
2386                          (cache_resource->size ? cache_resource->buf : NULL));
2387         if (!cache_resource->verbs_action) {
2388                 rte_free(cache_resource);
2389                 return rte_flow_error_set(error, ENOMEM,
2390                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2391                                           NULL, "cannot create action");
2392         }
2393         rte_atomic32_init(&cache_resource->refcnt);
2394         rte_atomic32_inc(&cache_resource->refcnt);
2395         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2396         dev_flow->dv.encap_decap = cache_resource;
2397         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2398                 (void *)cache_resource,
2399                 rte_atomic32_read(&cache_resource->refcnt));
2400         return 0;
2401 }
2402
2403 /**
2404  * Find existing table jump resource or create and register a new one.
2405  *
2406  * @param[in, out] dev
2407  *   Pointer to rte_eth_dev structure.
2408  * @param[in, out] tbl
2409  *   Pointer to flow table resource.
2410  * @parm[in, out] dev_flow
2411  *   Pointer to the dev_flow.
2412  * @param[out] error
2413  *   pointer to error structure.
2414  *
2415  * @return
2416  *   0 on success otherwise -errno and errno is set.
2417  */
2418 static int
2419 flow_dv_jump_tbl_resource_register
2420                         (struct rte_eth_dev *dev __rte_unused,
2421                          struct mlx5_flow_tbl_resource *tbl,
2422                          struct mlx5_flow *dev_flow,
2423                          struct rte_flow_error *error)
2424 {
2425         struct mlx5_flow_tbl_data_entry *tbl_data =
2426                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2427         int cnt;
2428
2429         assert(tbl);
2430         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2431         if (!cnt) {
2432                 tbl_data->jump.action =
2433                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2434                         (tbl->obj);
2435                 if (!tbl_data->jump.action)
2436                         return rte_flow_error_set(error, ENOMEM,
2437                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2438                                         NULL, "cannot create jump action");
2439                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2440                         (void *)&tbl_data->jump, cnt);
2441         } else {
2442                 assert(tbl_data->jump.action);
2443                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2444                         (void *)&tbl_data->jump, cnt);
2445         }
2446         rte_atomic32_inc(&tbl_data->jump.refcnt);
2447         dev_flow->dv.jump = &tbl_data->jump;
2448         return 0;
2449 }
2450
2451 /**
2452  * Find existing table port ID resource or create and register a new one.
2453  *
2454  * @param[in, out] dev
2455  *   Pointer to rte_eth_dev structure.
2456  * @param[in, out] resource
2457  *   Pointer to port ID action resource.
2458  * @parm[in, out] dev_flow
2459  *   Pointer to the dev_flow.
2460  * @param[out] error
2461  *   pointer to error structure.
2462  *
2463  * @return
2464  *   0 on success otherwise -errno and errno is set.
2465  */
2466 static int
2467 flow_dv_port_id_action_resource_register
2468                         (struct rte_eth_dev *dev,
2469                          struct mlx5_flow_dv_port_id_action_resource *resource,
2470                          struct mlx5_flow *dev_flow,
2471                          struct rte_flow_error *error)
2472 {
2473         struct mlx5_priv *priv = dev->data->dev_private;
2474         struct mlx5_ibv_shared *sh = priv->sh;
2475         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2476
2477         /* Lookup a matching resource from cache. */
2478         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2479                 if (resource->port_id == cache_resource->port_id) {
2480                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2481                                 "refcnt %d++",
2482                                 (void *)cache_resource,
2483                                 rte_atomic32_read(&cache_resource->refcnt));
2484                         rte_atomic32_inc(&cache_resource->refcnt);
2485                         dev_flow->dv.port_id_action = cache_resource;
2486                         return 0;
2487                 }
2488         }
2489         /* Register new port id action resource. */
2490         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2491         if (!cache_resource)
2492                 return rte_flow_error_set(error, ENOMEM,
2493                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2494                                           "cannot allocate resource memory");
2495         *cache_resource = *resource;
2496         /*
2497          * Depending on rdma_core version the glue routine calls
2498          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2499          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2500          */
2501         cache_resource->action =
2502                 mlx5_glue->dr_create_flow_action_dest_port
2503                         (priv->sh->fdb_domain, resource->port_id);
2504         if (!cache_resource->action) {
2505                 rte_free(cache_resource);
2506                 return rte_flow_error_set(error, ENOMEM,
2507                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2508                                           NULL, "cannot create action");
2509         }
2510         rte_atomic32_init(&cache_resource->refcnt);
2511         rte_atomic32_inc(&cache_resource->refcnt);
2512         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2513         dev_flow->dv.port_id_action = cache_resource;
2514         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2515                 (void *)cache_resource,
2516                 rte_atomic32_read(&cache_resource->refcnt));
2517         return 0;
2518 }
2519
2520 /**
2521  * Find existing push vlan resource or create and register a new one.
2522  *
2523  * @param [in, out] dev
2524  *   Pointer to rte_eth_dev structure.
2525  * @param[in, out] resource
2526  *   Pointer to port ID action resource.
2527  * @parm[in, out] dev_flow
2528  *   Pointer to the dev_flow.
2529  * @param[out] error
2530  *   pointer to error structure.
2531  *
2532  * @return
2533  *   0 on success otherwise -errno and errno is set.
2534  */
2535 static int
2536 flow_dv_push_vlan_action_resource_register
2537                        (struct rte_eth_dev *dev,
2538                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2539                         struct mlx5_flow *dev_flow,
2540                         struct rte_flow_error *error)
2541 {
2542         struct mlx5_priv *priv = dev->data->dev_private;
2543         struct mlx5_ibv_shared *sh = priv->sh;
2544         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2545         struct mlx5dv_dr_domain *domain;
2546
2547         /* Lookup a matching resource from cache. */
2548         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2549                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2550                     resource->ft_type == cache_resource->ft_type) {
2551                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2552                                 "refcnt %d++",
2553                                 (void *)cache_resource,
2554                                 rte_atomic32_read(&cache_resource->refcnt));
2555                         rte_atomic32_inc(&cache_resource->refcnt);
2556                         dev_flow->dv.push_vlan_res = cache_resource;
2557                         return 0;
2558                 }
2559         }
2560         /* Register new push_vlan action resource. */
2561         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2562         if (!cache_resource)
2563                 return rte_flow_error_set(error, ENOMEM,
2564                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2565                                           "cannot allocate resource memory");
2566         *cache_resource = *resource;
2567         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2568                 domain = sh->fdb_domain;
2569         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2570                 domain = sh->rx_domain;
2571         else
2572                 domain = sh->tx_domain;
2573         cache_resource->action =
2574                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2575                                                            resource->vlan_tag);
2576         if (!cache_resource->action) {
2577                 rte_free(cache_resource);
2578                 return rte_flow_error_set(error, ENOMEM,
2579                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2580                                           NULL, "cannot create action");
2581         }
2582         rte_atomic32_init(&cache_resource->refcnt);
2583         rte_atomic32_inc(&cache_resource->refcnt);
2584         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2585         dev_flow->dv.push_vlan_res = cache_resource;
2586         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2587                 (void *)cache_resource,
2588                 rte_atomic32_read(&cache_resource->refcnt));
2589         return 0;
2590 }
2591 /**
2592  * Get the size of specific rte_flow_item_type
2593  *
2594  * @param[in] item_type
2595  *   Tested rte_flow_item_type.
2596  *
2597  * @return
2598  *   sizeof struct item_type, 0 if void or irrelevant.
2599  */
2600 static size_t
2601 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2602 {
2603         size_t retval;
2604
2605         switch (item_type) {
2606         case RTE_FLOW_ITEM_TYPE_ETH:
2607                 retval = sizeof(struct rte_flow_item_eth);
2608                 break;
2609         case RTE_FLOW_ITEM_TYPE_VLAN:
2610                 retval = sizeof(struct rte_flow_item_vlan);
2611                 break;
2612         case RTE_FLOW_ITEM_TYPE_IPV4:
2613                 retval = sizeof(struct rte_flow_item_ipv4);
2614                 break;
2615         case RTE_FLOW_ITEM_TYPE_IPV6:
2616                 retval = sizeof(struct rte_flow_item_ipv6);
2617                 break;
2618         case RTE_FLOW_ITEM_TYPE_UDP:
2619                 retval = sizeof(struct rte_flow_item_udp);
2620                 break;
2621         case RTE_FLOW_ITEM_TYPE_TCP:
2622                 retval = sizeof(struct rte_flow_item_tcp);
2623                 break;
2624         case RTE_FLOW_ITEM_TYPE_VXLAN:
2625                 retval = sizeof(struct rte_flow_item_vxlan);
2626                 break;
2627         case RTE_FLOW_ITEM_TYPE_GRE:
2628                 retval = sizeof(struct rte_flow_item_gre);
2629                 break;
2630         case RTE_FLOW_ITEM_TYPE_NVGRE:
2631                 retval = sizeof(struct rte_flow_item_nvgre);
2632                 break;
2633         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2634                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2635                 break;
2636         case RTE_FLOW_ITEM_TYPE_MPLS:
2637                 retval = sizeof(struct rte_flow_item_mpls);
2638                 break;
2639         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2640         default:
2641                 retval = 0;
2642                 break;
2643         }
2644         return retval;
2645 }
2646
2647 #define MLX5_ENCAP_IPV4_VERSION         0x40
2648 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2649 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2650 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2651 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2652 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2653 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2654
2655 /**
2656  * Convert the encap action data from list of rte_flow_item to raw buffer
2657  *
2658  * @param[in] items
2659  *   Pointer to rte_flow_item objects list.
2660  * @param[out] buf
2661  *   Pointer to the output buffer.
2662  * @param[out] size
2663  *   Pointer to the output buffer size.
2664  * @param[out] error
2665  *   Pointer to the error structure.
2666  *
2667  * @return
2668  *   0 on success, a negative errno value otherwise and rte_errno is set.
2669  */
2670 static int
2671 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2672                            size_t *size, struct rte_flow_error *error)
2673 {
2674         struct rte_ether_hdr *eth = NULL;
2675         struct rte_vlan_hdr *vlan = NULL;
2676         struct rte_ipv4_hdr *ipv4 = NULL;
2677         struct rte_ipv6_hdr *ipv6 = NULL;
2678         struct rte_udp_hdr *udp = NULL;
2679         struct rte_vxlan_hdr *vxlan = NULL;
2680         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2681         struct rte_gre_hdr *gre = NULL;
2682         size_t len;
2683         size_t temp_size = 0;
2684
2685         if (!items)
2686                 return rte_flow_error_set(error, EINVAL,
2687                                           RTE_FLOW_ERROR_TYPE_ACTION,
2688                                           NULL, "invalid empty data");
2689         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2690                 len = flow_dv_get_item_len(items->type);
2691                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2692                         return rte_flow_error_set(error, EINVAL,
2693                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2694                                                   (void *)items->type,
2695                                                   "items total size is too big"
2696                                                   " for encap action");
2697                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2698                 switch (items->type) {
2699                 case RTE_FLOW_ITEM_TYPE_ETH:
2700                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2701                         break;
2702                 case RTE_FLOW_ITEM_TYPE_VLAN:
2703                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2704                         if (!eth)
2705                                 return rte_flow_error_set(error, EINVAL,
2706                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2707                                                 (void *)items->type,
2708                                                 "eth header not found");
2709                         if (!eth->ether_type)
2710                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2711                         break;
2712                 case RTE_FLOW_ITEM_TYPE_IPV4:
2713                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2714                         if (!vlan && !eth)
2715                                 return rte_flow_error_set(error, EINVAL,
2716                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2717                                                 (void *)items->type,
2718                                                 "neither eth nor vlan"
2719                                                 " header found");
2720                         if (vlan && !vlan->eth_proto)
2721                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2722                         else if (eth && !eth->ether_type)
2723                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2724                         if (!ipv4->version_ihl)
2725                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2726                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2727                         if (!ipv4->time_to_live)
2728                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2729                         break;
2730                 case RTE_FLOW_ITEM_TYPE_IPV6:
2731                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2732                         if (!vlan && !eth)
2733                                 return rte_flow_error_set(error, EINVAL,
2734                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2735                                                 (void *)items->type,
2736                                                 "neither eth nor vlan"
2737                                                 " header found");
2738                         if (vlan && !vlan->eth_proto)
2739                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2740                         else if (eth && !eth->ether_type)
2741                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2742                         if (!ipv6->vtc_flow)
2743                                 ipv6->vtc_flow =
2744                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2745                         if (!ipv6->hop_limits)
2746                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2747                         break;
2748                 case RTE_FLOW_ITEM_TYPE_UDP:
2749                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2750                         if (!ipv4 && !ipv6)
2751                                 return rte_flow_error_set(error, EINVAL,
2752                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2753                                                 (void *)items->type,
2754                                                 "ip header not found");
2755                         if (ipv4 && !ipv4->next_proto_id)
2756                                 ipv4->next_proto_id = IPPROTO_UDP;
2757                         else if (ipv6 && !ipv6->proto)
2758                                 ipv6->proto = IPPROTO_UDP;
2759                         break;
2760                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2761                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2762                         if (!udp)
2763                                 return rte_flow_error_set(error, EINVAL,
2764                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2765                                                 (void *)items->type,
2766                                                 "udp header not found");
2767                         if (!udp->dst_port)
2768                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2769                         if (!vxlan->vx_flags)
2770                                 vxlan->vx_flags =
2771                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2772                         break;
2773                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2774                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2775                         if (!udp)
2776                                 return rte_flow_error_set(error, EINVAL,
2777                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2778                                                 (void *)items->type,
2779                                                 "udp header not found");
2780                         if (!vxlan_gpe->proto)
2781                                 return rte_flow_error_set(error, EINVAL,
2782                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2783                                                 (void *)items->type,
2784                                                 "next protocol not found");
2785                         if (!udp->dst_port)
2786                                 udp->dst_port =
2787                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2788                         if (!vxlan_gpe->vx_flags)
2789                                 vxlan_gpe->vx_flags =
2790                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2791                         break;
2792                 case RTE_FLOW_ITEM_TYPE_GRE:
2793                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2794                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2795                         if (!gre->proto)
2796                                 return rte_flow_error_set(error, EINVAL,
2797                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2798                                                 (void *)items->type,
2799                                                 "next protocol not found");
2800                         if (!ipv4 && !ipv6)
2801                                 return rte_flow_error_set(error, EINVAL,
2802                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2803                                                 (void *)items->type,
2804                                                 "ip header not found");
2805                         if (ipv4 && !ipv4->next_proto_id)
2806                                 ipv4->next_proto_id = IPPROTO_GRE;
2807                         else if (ipv6 && !ipv6->proto)
2808                                 ipv6->proto = IPPROTO_GRE;
2809                         break;
2810                 case RTE_FLOW_ITEM_TYPE_VOID:
2811                         break;
2812                 default:
2813                         return rte_flow_error_set(error, EINVAL,
2814                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2815                                                   (void *)items->type,
2816                                                   "unsupported item type");
2817                         break;
2818                 }
2819                 temp_size += len;
2820         }
2821         *size = temp_size;
2822         return 0;
2823 }
2824
2825 static int
2826 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2827 {
2828         struct rte_ether_hdr *eth = NULL;
2829         struct rte_vlan_hdr *vlan = NULL;
2830         struct rte_ipv6_hdr *ipv6 = NULL;
2831         struct rte_udp_hdr *udp = NULL;
2832         char *next_hdr;
2833         uint16_t proto;
2834
2835         eth = (struct rte_ether_hdr *)data;
2836         next_hdr = (char *)(eth + 1);
2837         proto = RTE_BE16(eth->ether_type);
2838
2839         /* VLAN skipping */
2840         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2841                 vlan = (struct rte_vlan_hdr *)next_hdr;
2842                 proto = RTE_BE16(vlan->eth_proto);
2843                 next_hdr += sizeof(struct rte_vlan_hdr);
2844         }
2845
2846         /* HW calculates IPv4 csum. no need to proceed */
2847         if (proto == RTE_ETHER_TYPE_IPV4)
2848                 return 0;
2849
2850         /* non IPv4/IPv6 header. not supported */
2851         if (proto != RTE_ETHER_TYPE_IPV6) {
2852                 return rte_flow_error_set(error, ENOTSUP,
2853                                           RTE_FLOW_ERROR_TYPE_ACTION,
2854                                           NULL, "Cannot offload non IPv4/IPv6");
2855         }
2856
2857         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2858
2859         /* ignore non UDP */
2860         if (ipv6->proto != IPPROTO_UDP)
2861                 return 0;
2862
2863         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2864         udp->dgram_cksum = 0;
2865
2866         return 0;
2867 }
2868
2869 /**
2870  * Convert L2 encap action to DV specification.
2871  *
2872  * @param[in] dev
2873  *   Pointer to rte_eth_dev structure.
2874  * @param[in] action
2875  *   Pointer to action structure.
2876  * @param[in, out] dev_flow
2877  *   Pointer to the mlx5_flow.
2878  * @param[in] transfer
2879  *   Mark if the flow is E-Switch flow.
2880  * @param[out] error
2881  *   Pointer to the error structure.
2882  *
2883  * @return
2884  *   0 on success, a negative errno value otherwise and rte_errno is set.
2885  */
2886 static int
2887 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2888                                const struct rte_flow_action *action,
2889                                struct mlx5_flow *dev_flow,
2890                                uint8_t transfer,
2891                                struct rte_flow_error *error)
2892 {
2893         const struct rte_flow_item *encap_data;
2894         const struct rte_flow_action_raw_encap *raw_encap_data;
2895         struct mlx5_flow_dv_encap_decap_resource res = {
2896                 .reformat_type =
2897                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2898                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2899                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2900         };
2901
2902         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2903                 raw_encap_data =
2904                         (const struct rte_flow_action_raw_encap *)action->conf;
2905                 res.size = raw_encap_data->size;
2906                 memcpy(res.buf, raw_encap_data->data, res.size);
2907                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2908                         return -rte_errno;
2909         } else {
2910                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2911                         encap_data =
2912                                 ((const struct rte_flow_action_vxlan_encap *)
2913                                                 action->conf)->definition;
2914                 else
2915                         encap_data =
2916                                 ((const struct rte_flow_action_nvgre_encap *)
2917                                                 action->conf)->definition;
2918                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2919                                                &res.size, error))
2920                         return -rte_errno;
2921         }
2922         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2923                 return rte_flow_error_set(error, EINVAL,
2924                                           RTE_FLOW_ERROR_TYPE_ACTION,
2925                                           NULL, "can't create L2 encap action");
2926         return 0;
2927 }
2928
2929 /**
2930  * Convert L2 decap action to DV specification.
2931  *
2932  * @param[in] dev
2933  *   Pointer to rte_eth_dev structure.
2934  * @param[in, out] dev_flow
2935  *   Pointer to the mlx5_flow.
2936  * @param[in] transfer
2937  *   Mark if the flow is E-Switch flow.
2938  * @param[out] error
2939  *   Pointer to the error structure.
2940  *
2941  * @return
2942  *   0 on success, a negative errno value otherwise and rte_errno is set.
2943  */
2944 static int
2945 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2946                                struct mlx5_flow *dev_flow,
2947                                uint8_t transfer,
2948                                struct rte_flow_error *error)
2949 {
2950         struct mlx5_flow_dv_encap_decap_resource res = {
2951                 .size = 0,
2952                 .reformat_type =
2953                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2954                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2955                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2956         };
2957
2958         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2959                 return rte_flow_error_set(error, EINVAL,
2960                                           RTE_FLOW_ERROR_TYPE_ACTION,
2961                                           NULL, "can't create L2 decap action");
2962         return 0;
2963 }
2964
2965 /**
2966  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2967  *
2968  * @param[in] dev
2969  *   Pointer to rte_eth_dev structure.
2970  * @param[in] action
2971  *   Pointer to action structure.
2972  * @param[in, out] dev_flow
2973  *   Pointer to the mlx5_flow.
2974  * @param[in] attr
2975  *   Pointer to the flow attributes.
2976  * @param[out] error
2977  *   Pointer to the error structure.
2978  *
2979  * @return
2980  *   0 on success, a negative errno value otherwise and rte_errno is set.
2981  */
2982 static int
2983 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2984                                 const struct rte_flow_action *action,
2985                                 struct mlx5_flow *dev_flow,
2986                                 const struct rte_flow_attr *attr,
2987                                 struct rte_flow_error *error)
2988 {
2989         const struct rte_flow_action_raw_encap *encap_data;
2990         struct mlx5_flow_dv_encap_decap_resource res;
2991
2992         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2993         res.size = encap_data->size;
2994         memcpy(res.buf, encap_data->data, res.size);
2995         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
2996                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
2997                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
2998         if (attr->transfer)
2999                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3000         else
3001                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3002                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3003         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3004                 return rte_flow_error_set(error, EINVAL,
3005                                           RTE_FLOW_ERROR_TYPE_ACTION,
3006                                           NULL, "can't create encap action");
3007         return 0;
3008 }
3009
3010 /**
3011  * Create action push VLAN.
3012  *
3013  * @param[in] dev
3014  *   Pointer to rte_eth_dev structure.
3015  * @param[in] vlan_tag
3016  *   the vlan tag to push to the Ethernet header.
3017  * @param[in, out] dev_flow
3018  *   Pointer to the mlx5_flow.
3019  * @param[in] attr
3020  *   Pointer to the flow attributes.
3021  * @param[out] error
3022  *   Pointer to the error structure.
3023  *
3024  * @return
3025  *   0 on success, a negative errno value otherwise and rte_errno is set.
3026  */
3027 static int
3028 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3029                                 const struct rte_flow_attr *attr,
3030                                 const struct rte_vlan_hdr *vlan,
3031                                 struct mlx5_flow *dev_flow,
3032                                 struct rte_flow_error *error)
3033 {
3034         struct mlx5_flow_dv_push_vlan_action_resource res;
3035
3036         res.vlan_tag =
3037                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3038                                  vlan->vlan_tci);
3039         if (attr->transfer)
3040                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3041         else
3042                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3043                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3044         return flow_dv_push_vlan_action_resource_register
3045                                             (dev, &res, dev_flow, error);
3046 }
3047
3048 /**
3049  * Validate the modify-header actions.
3050  *
3051  * @param[in] action_flags
3052  *   Holds the actions detected until now.
3053  * @param[in] action
3054  *   Pointer to the modify action.
3055  * @param[out] error
3056  *   Pointer to error structure.
3057  *
3058  * @return
3059  *   0 on success, a negative errno value otherwise and rte_errno is set.
3060  */
3061 static int
3062 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3063                                    const struct rte_flow_action *action,
3064                                    struct rte_flow_error *error)
3065 {
3066         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3067                 return rte_flow_error_set(error, EINVAL,
3068                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3069                                           NULL, "action configuration not set");
3070         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
3071                 return rte_flow_error_set(error, EINVAL,
3072                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3073                                           "can't have encap action before"
3074                                           " modify action");
3075         return 0;
3076 }
3077
3078 /**
3079  * Validate the modify-header MAC address actions.
3080  *
3081  * @param[in] action_flags
3082  *   Holds the actions detected until now.
3083  * @param[in] action
3084  *   Pointer to the modify action.
3085  * @param[in] item_flags
3086  *   Holds the items detected.
3087  * @param[out] error
3088  *   Pointer to error structure.
3089  *
3090  * @return
3091  *   0 on success, a negative errno value otherwise and rte_errno is set.
3092  */
3093 static int
3094 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3095                                    const struct rte_flow_action *action,
3096                                    const uint64_t item_flags,
3097                                    struct rte_flow_error *error)
3098 {
3099         int ret = 0;
3100
3101         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3102         if (!ret) {
3103                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3104                         return rte_flow_error_set(error, EINVAL,
3105                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3106                                                   NULL,
3107                                                   "no L2 item in pattern");
3108         }
3109         return ret;
3110 }
3111
3112 /**
3113  * Validate the modify-header IPv4 address actions.
3114  *
3115  * @param[in] action_flags
3116  *   Holds the actions detected until now.
3117  * @param[in] action
3118  *   Pointer to the modify action.
3119  * @param[in] item_flags
3120  *   Holds the items detected.
3121  * @param[out] error
3122  *   Pointer to error structure.
3123  *
3124  * @return
3125  *   0 on success, a negative errno value otherwise and rte_errno is set.
3126  */
3127 static int
3128 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3129                                     const struct rte_flow_action *action,
3130                                     const uint64_t item_flags,
3131                                     struct rte_flow_error *error)
3132 {
3133         int ret = 0;
3134
3135         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3136         if (!ret) {
3137                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3138                         return rte_flow_error_set(error, EINVAL,
3139                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3140                                                   NULL,
3141                                                   "no ipv4 item in pattern");
3142         }
3143         return ret;
3144 }
3145
3146 /**
3147  * Validate the modify-header IPv6 address actions.
3148  *
3149  * @param[in] action_flags
3150  *   Holds the actions detected until now.
3151  * @param[in] action
3152  *   Pointer to the modify action.
3153  * @param[in] item_flags
3154  *   Holds the items detected.
3155  * @param[out] error
3156  *   Pointer to error structure.
3157  *
3158  * @return
3159  *   0 on success, a negative errno value otherwise and rte_errno is set.
3160  */
3161 static int
3162 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3163                                     const struct rte_flow_action *action,
3164                                     const uint64_t item_flags,
3165                                     struct rte_flow_error *error)
3166 {
3167         int ret = 0;
3168
3169         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3170         if (!ret) {
3171                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3172                         return rte_flow_error_set(error, EINVAL,
3173                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3174                                                   NULL,
3175                                                   "no ipv6 item in pattern");
3176         }
3177         return ret;
3178 }
3179
3180 /**
3181  * Validate the modify-header TP actions.
3182  *
3183  * @param[in] action_flags
3184  *   Holds the actions detected until now.
3185  * @param[in] action
3186  *   Pointer to the modify action.
3187  * @param[in] item_flags
3188  *   Holds the items detected.
3189  * @param[out] error
3190  *   Pointer to error structure.
3191  *
3192  * @return
3193  *   0 on success, a negative errno value otherwise and rte_errno is set.
3194  */
3195 static int
3196 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3197                                   const struct rte_flow_action *action,
3198                                   const uint64_t item_flags,
3199                                   struct rte_flow_error *error)
3200 {
3201         int ret = 0;
3202
3203         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3204         if (!ret) {
3205                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3206                         return rte_flow_error_set(error, EINVAL,
3207                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3208                                                   NULL, "no transport layer "
3209                                                   "in pattern");
3210         }
3211         return ret;
3212 }
3213
3214 /**
3215  * Validate the modify-header actions of increment/decrement
3216  * TCP Sequence-number.
3217  *
3218  * @param[in] action_flags
3219  *   Holds the actions detected until now.
3220  * @param[in] action
3221  *   Pointer to the modify action.
3222  * @param[in] item_flags
3223  *   Holds the items detected.
3224  * @param[out] error
3225  *   Pointer to error structure.
3226  *
3227  * @return
3228  *   0 on success, a negative errno value otherwise and rte_errno is set.
3229  */
3230 static int
3231 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3232                                        const struct rte_flow_action *action,
3233                                        const uint64_t item_flags,
3234                                        struct rte_flow_error *error)
3235 {
3236         int ret = 0;
3237
3238         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3239         if (!ret) {
3240                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3241                         return rte_flow_error_set(error, EINVAL,
3242                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3243                                                   NULL, "no TCP item in"
3244                                                   " pattern");
3245                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3246                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3247                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3248                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3249                         return rte_flow_error_set(error, EINVAL,
3250                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3251                                                   NULL,
3252                                                   "cannot decrease and increase"
3253                                                   " TCP sequence number"
3254                                                   " at the same time");
3255         }
3256         return ret;
3257 }
3258
3259 /**
3260  * Validate the modify-header actions of increment/decrement
3261  * TCP Acknowledgment number.
3262  *
3263  * @param[in] action_flags
3264  *   Holds the actions detected until now.
3265  * @param[in] action
3266  *   Pointer to the modify action.
3267  * @param[in] item_flags
3268  *   Holds the items detected.
3269  * @param[out] error
3270  *   Pointer to error structure.
3271  *
3272  * @return
3273  *   0 on success, a negative errno value otherwise and rte_errno is set.
3274  */
3275 static int
3276 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3277                                        const struct rte_flow_action *action,
3278                                        const uint64_t item_flags,
3279                                        struct rte_flow_error *error)
3280 {
3281         int ret = 0;
3282
3283         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3284         if (!ret) {
3285                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3286                         return rte_flow_error_set(error, EINVAL,
3287                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3288                                                   NULL, "no TCP item in"
3289                                                   " pattern");
3290                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3291                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3292                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3293                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3294                         return rte_flow_error_set(error, EINVAL,
3295                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3296                                                   NULL,
3297                                                   "cannot decrease and increase"
3298                                                   " TCP acknowledgment number"
3299                                                   " at the same time");
3300         }
3301         return ret;
3302 }
3303
3304 /**
3305  * Validate the modify-header TTL actions.
3306  *
3307  * @param[in] action_flags
3308  *   Holds the actions detected until now.
3309  * @param[in] action
3310  *   Pointer to the modify action.
3311  * @param[in] item_flags
3312  *   Holds the items detected.
3313  * @param[out] error
3314  *   Pointer to error structure.
3315  *
3316  * @return
3317  *   0 on success, a negative errno value otherwise and rte_errno is set.
3318  */
3319 static int
3320 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3321                                    const struct rte_flow_action *action,
3322                                    const uint64_t item_flags,
3323                                    struct rte_flow_error *error)
3324 {
3325         int ret = 0;
3326
3327         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3328         if (!ret) {
3329                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3330                         return rte_flow_error_set(error, EINVAL,
3331                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3332                                                   NULL,
3333                                                   "no IP protocol in pattern");
3334         }
3335         return ret;
3336 }
3337
3338 /**
3339  * Validate jump action.
3340  *
3341  * @param[in] action
3342  *   Pointer to the jump action.
3343  * @param[in] action_flags
3344  *   Holds the actions detected until now.
3345  * @param[in] attributes
3346  *   Pointer to flow attributes
3347  * @param[in] external
3348  *   Action belongs to flow rule created by request external to PMD.
3349  * @param[out] error
3350  *   Pointer to error structure.
3351  *
3352  * @return
3353  *   0 on success, a negative errno value otherwise and rte_errno is set.
3354  */
3355 static int
3356 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3357                              uint64_t action_flags,
3358                              const struct rte_flow_attr *attributes,
3359                              bool external, struct rte_flow_error *error)
3360 {
3361         uint32_t target_group, table;
3362         int ret = 0;
3363
3364         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3365                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3366                 return rte_flow_error_set(error, EINVAL,
3367                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3368                                           "can't have 2 fate actions in"
3369                                           " same flow");
3370         if (action_flags & MLX5_FLOW_ACTION_METER)
3371                 return rte_flow_error_set(error, ENOTSUP,
3372                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3373                                           "jump with meter not support");
3374         if (!action->conf)
3375                 return rte_flow_error_set(error, EINVAL,
3376                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3377                                           NULL, "action configuration not set");
3378         target_group =
3379                 ((const struct rte_flow_action_jump *)action->conf)->group;
3380         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3381                                        &table, error);
3382         if (ret)
3383                 return ret;
3384         if (attributes->group == target_group)
3385                 return rte_flow_error_set(error, EINVAL,
3386                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3387                                           "target group must be other than"
3388                                           " the current flow group");
3389         return 0;
3390 }
3391
3392 /*
3393  * Validate the port_id action.
3394  *
3395  * @param[in] dev
3396  *   Pointer to rte_eth_dev structure.
3397  * @param[in] action_flags
3398  *   Bit-fields that holds the actions detected until now.
3399  * @param[in] action
3400  *   Port_id RTE action structure.
3401  * @param[in] attr
3402  *   Attributes of flow that includes this action.
3403  * @param[out] error
3404  *   Pointer to error structure.
3405  *
3406  * @return
3407  *   0 on success, a negative errno value otherwise and rte_errno is set.
3408  */
3409 static int
3410 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3411                                 uint64_t action_flags,
3412                                 const struct rte_flow_action *action,
3413                                 const struct rte_flow_attr *attr,
3414                                 struct rte_flow_error *error)
3415 {
3416         const struct rte_flow_action_port_id *port_id;
3417         struct mlx5_priv *act_priv;
3418         struct mlx5_priv *dev_priv;
3419         uint16_t port;
3420
3421         if (!attr->transfer)
3422                 return rte_flow_error_set(error, ENOTSUP,
3423                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3424                                           NULL,
3425                                           "port id action is valid in transfer"
3426                                           " mode only");
3427         if (!action || !action->conf)
3428                 return rte_flow_error_set(error, ENOTSUP,
3429                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3430                                           NULL,
3431                                           "port id action parameters must be"
3432                                           " specified");
3433         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3434                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3435                 return rte_flow_error_set(error, EINVAL,
3436                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3437                                           "can have only one fate actions in"
3438                                           " a flow");
3439         dev_priv = mlx5_dev_to_eswitch_info(dev);
3440         if (!dev_priv)
3441                 return rte_flow_error_set(error, rte_errno,
3442                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3443                                           NULL,
3444                                           "failed to obtain E-Switch info");
3445         port_id = action->conf;
3446         port = port_id->original ? dev->data->port_id : port_id->id;
3447         act_priv = mlx5_port_to_eswitch_info(port, false);
3448         if (!act_priv)
3449                 return rte_flow_error_set
3450                                 (error, rte_errno,
3451                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3452                                  "failed to obtain E-Switch port id for port");
3453         if (act_priv->domain_id != dev_priv->domain_id)
3454                 return rte_flow_error_set
3455                                 (error, EINVAL,
3456                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3457                                  "port does not belong to"
3458                                  " E-Switch being configured");
3459         return 0;
3460 }
3461
3462 /**
3463  * Get the maximum number of modify header actions.
3464  *
3465  * @param dev
3466  *   Pointer to rte_eth_dev structure.
3467  * @param flags
3468  *   Flags bits to check if root level.
3469  *
3470  * @return
3471  *   Max number of modify header actions device can support.
3472  */
3473 static unsigned int
3474 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3475 {
3476         /*
3477          * There's no way to directly query the max cap. Although it has to be
3478          * acquried by iterative trial, it is a safe assumption that more
3479          * actions are supported by FW if extensive metadata register is
3480          * supported. (Only in the root table)
3481          */
3482         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3483                 return MLX5_MAX_MODIFY_NUM;
3484         else
3485                 return mlx5_flow_ext_mreg_supported(dev) ?
3486                                         MLX5_ROOT_TBL_MODIFY_NUM :
3487                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3488 }
3489
3490 /**
3491  * Validate the meter action.
3492  *
3493  * @param[in] dev
3494  *   Pointer to rte_eth_dev structure.
3495  * @param[in] action_flags
3496  *   Bit-fields that holds the actions detected until now.
3497  * @param[in] action
3498  *   Pointer to the meter action.
3499  * @param[in] attr
3500  *   Attributes of flow that includes this action.
3501  * @param[out] error
3502  *   Pointer to error structure.
3503  *
3504  * @return
3505  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3506  */
3507 static int
3508 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3509                                 uint64_t action_flags,
3510                                 const struct rte_flow_action *action,
3511                                 const struct rte_flow_attr *attr,
3512                                 struct rte_flow_error *error)
3513 {
3514         struct mlx5_priv *priv = dev->data->dev_private;
3515         const struct rte_flow_action_meter *am = action->conf;
3516         struct mlx5_flow_meter *fm;
3517
3518         if (!am)
3519                 return rte_flow_error_set(error, EINVAL,
3520                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3521                                           "meter action conf is NULL");
3522
3523         if (action_flags & MLX5_FLOW_ACTION_METER)
3524                 return rte_flow_error_set(error, ENOTSUP,
3525                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3526                                           "meter chaining not support");
3527         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3528                 return rte_flow_error_set(error, ENOTSUP,
3529                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3530                                           "meter with jump not support");
3531         if (!priv->mtr_en)
3532                 return rte_flow_error_set(error, ENOTSUP,
3533                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3534                                           NULL,
3535                                           "meter action not supported");
3536         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3537         if (!fm)
3538                 return rte_flow_error_set(error, EINVAL,
3539                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3540                                           "Meter not found");
3541         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3542               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3543               (!fm->attr.egress && !attr->egress && attr->ingress))))
3544                 return rte_flow_error_set(error, EINVAL,
3545                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3546                                           "Flow attributes are either invalid "
3547                                           "or have a conflict with current "
3548                                           "meter attributes");
3549         return 0;
3550 }
3551
3552 /**
3553  * Validate the modify-header IPv4 DSCP actions.
3554  *
3555  * @param[in] action_flags
3556  *   Holds the actions detected until now.
3557  * @param[in] action
3558  *   Pointer to the modify action.
3559  * @param[in] item_flags
3560  *   Holds the items detected.
3561  * @param[out] error
3562  *   Pointer to error structure.
3563  *
3564  * @return
3565  *   0 on success, a negative errno value otherwise and rte_errno is set.
3566  */
3567 static int
3568 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3569                                          const struct rte_flow_action *action,
3570                                          const uint64_t item_flags,
3571                                          struct rte_flow_error *error)
3572 {
3573         int ret = 0;
3574
3575         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3576         if (!ret) {
3577                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3578                         return rte_flow_error_set(error, EINVAL,
3579                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3580                                                   NULL,
3581                                                   "no ipv4 item in pattern");
3582         }
3583         return ret;
3584 }
3585
3586 /**
3587  * Validate the modify-header IPv6 DSCP actions.
3588  *
3589  * @param[in] action_flags
3590  *   Holds the actions detected until now.
3591  * @param[in] action
3592  *   Pointer to the modify action.
3593  * @param[in] item_flags
3594  *   Holds the items detected.
3595  * @param[out] error
3596  *   Pointer to error structure.
3597  *
3598  * @return
3599  *   0 on success, a negative errno value otherwise and rte_errno is set.
3600  */
3601 static int
3602 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3603                                          const struct rte_flow_action *action,
3604                                          const uint64_t item_flags,
3605                                          struct rte_flow_error *error)
3606 {
3607         int ret = 0;
3608
3609         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3610         if (!ret) {
3611                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3612                         return rte_flow_error_set(error, EINVAL,
3613                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3614                                                   NULL,
3615                                                   "no ipv6 item in pattern");
3616         }
3617         return ret;
3618 }
3619
3620 /**
3621  * Find existing modify-header resource or create and register a new one.
3622  *
3623  * @param dev[in, out]
3624  *   Pointer to rte_eth_dev structure.
3625  * @param[in, out] resource
3626  *   Pointer to modify-header resource.
3627  * @parm[in, out] dev_flow
3628  *   Pointer to the dev_flow.
3629  * @param[out] error
3630  *   pointer to error structure.
3631  *
3632  * @return
3633  *   0 on success otherwise -errno and errno is set.
3634  */
3635 static int
3636 flow_dv_modify_hdr_resource_register
3637                         (struct rte_eth_dev *dev,
3638                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3639                          struct mlx5_flow *dev_flow,
3640                          struct rte_flow_error *error)
3641 {
3642         struct mlx5_priv *priv = dev->data->dev_private;
3643         struct mlx5_ibv_shared *sh = priv->sh;
3644         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3645         struct mlx5dv_dr_domain *ns;
3646         uint32_t actions_len;
3647
3648         resource->flags =
3649                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3650         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3651                                     resource->flags))
3652                 return rte_flow_error_set(error, EOVERFLOW,
3653                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3654                                           "too many modify header items");
3655         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3656                 ns = sh->fdb_domain;
3657         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3658                 ns = sh->tx_domain;
3659         else
3660                 ns = sh->rx_domain;
3661         /* Lookup a matching resource from cache. */
3662         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3663         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3664                 if (resource->ft_type == cache_resource->ft_type &&
3665                     resource->actions_num == cache_resource->actions_num &&
3666                     resource->flags == cache_resource->flags &&
3667                     !memcmp((const void *)resource->actions,
3668                             (const void *)cache_resource->actions,
3669                             actions_len)) {
3670                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3671                                 (void *)cache_resource,
3672                                 rte_atomic32_read(&cache_resource->refcnt));
3673                         rte_atomic32_inc(&cache_resource->refcnt);
3674                         dev_flow->dv.modify_hdr = cache_resource;
3675                         return 0;
3676                 }
3677         }
3678         /* Register new modify-header resource. */
3679         cache_resource = rte_calloc(__func__, 1,
3680                                     sizeof(*cache_resource) + actions_len, 0);
3681         if (!cache_resource)
3682                 return rte_flow_error_set(error, ENOMEM,
3683                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3684                                           "cannot allocate resource memory");
3685         *cache_resource = *resource;
3686         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3687         cache_resource->verbs_action =
3688                 mlx5_glue->dv_create_flow_action_modify_header
3689                                         (sh->ctx, cache_resource->ft_type, ns,
3690                                          cache_resource->flags, actions_len,
3691                                          (uint64_t *)cache_resource->actions);
3692         if (!cache_resource->verbs_action) {
3693                 rte_free(cache_resource);
3694                 return rte_flow_error_set(error, ENOMEM,
3695                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3696                                           NULL, "cannot create action");
3697         }
3698         rte_atomic32_init(&cache_resource->refcnt);
3699         rte_atomic32_inc(&cache_resource->refcnt);
3700         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3701         dev_flow->dv.modify_hdr = cache_resource;
3702         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3703                 (void *)cache_resource,
3704                 rte_atomic32_read(&cache_resource->refcnt));
3705         return 0;
3706 }
3707
3708 #define MLX5_CNT_CONTAINER_RESIZE 64
3709
3710 /**
3711  * Get or create a flow counter.
3712  *
3713  * @param[in] dev
3714  *   Pointer to the Ethernet device structure.
3715  * @param[in] shared
3716  *   Indicate if this counter is shared with other flows.
3717  * @param[in] id
3718  *   Counter identifier.
3719  *
3720  * @return
3721  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3722  */
3723 static struct mlx5_flow_counter *
3724 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3725                                uint32_t id)
3726 {
3727         struct mlx5_priv *priv = dev->data->dev_private;
3728         struct mlx5_flow_counter *cnt = NULL;
3729         struct mlx5_devx_obj *dcs = NULL;
3730
3731         if (!priv->config.devx) {
3732                 rte_errno = ENOTSUP;
3733                 return NULL;
3734         }
3735         if (shared) {
3736                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3737                         if (cnt->shared && cnt->id == id) {
3738                                 cnt->ref_cnt++;
3739                                 return cnt;
3740                         }
3741                 }
3742         }
3743         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3744         if (!dcs)
3745                 return NULL;
3746         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3747         if (!cnt) {
3748                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3749                 rte_errno = ENOMEM;
3750                 return NULL;
3751         }
3752         struct mlx5_flow_counter tmpl = {
3753                 .shared = shared,
3754                 .ref_cnt = 1,
3755                 .id = id,
3756                 .dcs = dcs,
3757         };
3758         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3759         if (!tmpl.action) {
3760                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3761                 rte_errno = errno;
3762                 rte_free(cnt);
3763                 return NULL;
3764         }
3765         *cnt = tmpl;
3766         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3767         return cnt;
3768 }
3769
3770 /**
3771  * Release a flow counter.
3772  *
3773  * @param[in] dev
3774  *   Pointer to the Ethernet device structure.
3775  * @param[in] counter
3776  *   Pointer to the counter handler.
3777  */
3778 static void
3779 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3780                                  struct mlx5_flow_counter *counter)
3781 {
3782         struct mlx5_priv *priv = dev->data->dev_private;
3783
3784         if (!counter)
3785                 return;
3786         if (--counter->ref_cnt == 0) {
3787                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3788                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3789                 rte_free(counter);
3790         }
3791 }
3792
3793 /**
3794  * Query a devx flow counter.
3795  *
3796  * @param[in] dev
3797  *   Pointer to the Ethernet device structure.
3798  * @param[in] cnt
3799  *   Pointer to the flow counter.
3800  * @param[out] pkts
3801  *   The statistics value of packets.
3802  * @param[out] bytes
3803  *   The statistics value of bytes.
3804  *
3805  * @return
3806  *   0 on success, otherwise a negative errno value and rte_errno is set.
3807  */
3808 static inline int
3809 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3810                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3811                      uint64_t *bytes)
3812 {
3813         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3814                                                 0, NULL, NULL, 0);
3815 }
3816
3817 /**
3818  * Get a pool by a counter.
3819  *
3820  * @param[in] cnt
3821  *   Pointer to the counter.
3822  *
3823  * @return
3824  *   The counter pool.
3825  */
3826 static struct mlx5_flow_counter_pool *
3827 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3828 {
3829         if (!cnt->batch) {
3830                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3831                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3832         }
3833         return cnt->pool;
3834 }
3835
3836 /**
3837  * Get a pool by devx counter ID.
3838  *
3839  * @param[in] cont
3840  *   Pointer to the counter container.
3841  * @param[in] id
3842  *   The counter devx ID.
3843  *
3844  * @return
3845  *   The counter pool pointer if exists, NULL otherwise,
3846  */
3847 static struct mlx5_flow_counter_pool *
3848 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3849 {
3850         struct mlx5_flow_counter_pool *pool;
3851
3852         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3853                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3854                                 MLX5_COUNTERS_PER_POOL;
3855
3856                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3857                         return pool;
3858         };
3859         return NULL;
3860 }
3861
3862 /**
3863  * Allocate a new memory for the counter values wrapped by all the needed
3864  * management.
3865  *
3866  * @param[in] dev
3867  *   Pointer to the Ethernet device structure.
3868  * @param[in] raws_n
3869  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3870  *
3871  * @return
3872  *   The new memory management pointer on success, otherwise NULL and rte_errno
3873  *   is set.
3874  */
3875 static struct mlx5_counter_stats_mem_mng *
3876 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3877 {
3878         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3879                                         (dev->data->dev_private))->sh;
3880         struct mlx5_devx_mkey_attr mkey_attr;
3881         struct mlx5_counter_stats_mem_mng *mem_mng;
3882         volatile struct flow_counter_stats *raw_data;
3883         int size = (sizeof(struct flow_counter_stats) *
3884                         MLX5_COUNTERS_PER_POOL +
3885                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3886                         sizeof(struct mlx5_counter_stats_mem_mng);
3887         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3888         int i;
3889
3890         if (!mem) {
3891                 rte_errno = ENOMEM;
3892                 return NULL;
3893         }
3894         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3895         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3896         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3897                                                  IBV_ACCESS_LOCAL_WRITE);
3898         if (!mem_mng->umem) {
3899                 rte_errno = errno;
3900                 rte_free(mem);
3901                 return NULL;
3902         }
3903         mkey_attr.addr = (uintptr_t)mem;
3904         mkey_attr.size = size;
3905         mkey_attr.umem_id = mem_mng->umem->umem_id;
3906         mkey_attr.pd = sh->pdn;
3907         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3908         if (!mem_mng->dm) {
3909                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3910                 rte_errno = errno;
3911                 rte_free(mem);
3912                 return NULL;
3913         }
3914         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3915         raw_data = (volatile struct flow_counter_stats *)mem;
3916         for (i = 0; i < raws_n; ++i) {
3917                 mem_mng->raws[i].mem_mng = mem_mng;
3918                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3919         }
3920         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3921         return mem_mng;
3922 }
3923
3924 /**
3925  * Resize a counter container.
3926  *
3927  * @param[in] dev
3928  *   Pointer to the Ethernet device structure.
3929  * @param[in] batch
3930  *   Whether the pool is for counter that was allocated by batch command.
3931  *
3932  * @return
3933  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3934  */
3935 static struct mlx5_pools_container *
3936 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3937 {
3938         struct mlx5_priv *priv = dev->data->dev_private;
3939         struct mlx5_pools_container *cont =
3940                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3941         struct mlx5_pools_container *new_cont =
3942                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3943         struct mlx5_counter_stats_mem_mng *mem_mng;
3944         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3945         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3946         int i;
3947
3948         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3949                 /* The last resize still hasn't detected by the host thread. */
3950                 rte_errno = EAGAIN;
3951                 return NULL;
3952         }
3953         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3954         if (!new_cont->pools) {
3955                 rte_errno = ENOMEM;
3956                 return NULL;
3957         }
3958         if (cont->n)
3959                 memcpy(new_cont->pools, cont->pools, cont->n *
3960                        sizeof(struct mlx5_flow_counter_pool *));
3961         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3962                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3963         if (!mem_mng) {
3964                 rte_free(new_cont->pools);
3965                 return NULL;
3966         }
3967         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3968                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3969                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3970                                  i, next);
3971         new_cont->n = resize;
3972         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3973         TAILQ_INIT(&new_cont->pool_list);
3974         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3975         new_cont->init_mem_mng = mem_mng;
3976         rte_cio_wmb();
3977          /* Flip the master container. */
3978         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3979         return new_cont;
3980 }
3981
3982 /**
3983  * Query a devx flow counter.
3984  *
3985  * @param[in] dev
3986  *   Pointer to the Ethernet device structure.
3987  * @param[in] cnt
3988  *   Pointer to the flow counter.
3989  * @param[out] pkts
3990  *   The statistics value of packets.
3991  * @param[out] bytes
3992  *   The statistics value of bytes.
3993  *
3994  * @return
3995  *   0 on success, otherwise a negative errno value and rte_errno is set.
3996  */
3997 static inline int
3998 _flow_dv_query_count(struct rte_eth_dev *dev,
3999                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
4000                      uint64_t *bytes)
4001 {
4002         struct mlx5_priv *priv = dev->data->dev_private;
4003         struct mlx5_flow_counter_pool *pool =
4004                         flow_dv_counter_pool_get(cnt);
4005         int offset = cnt - &pool->counters_raw[0];
4006
4007         if (priv->counter_fallback)
4008                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4009
4010         rte_spinlock_lock(&pool->sl);
4011         /*
4012          * The single counters allocation may allocate smaller ID than the
4013          * current allocated in parallel to the host reading.
4014          * In this case the new counter values must be reported as 0.
4015          */
4016         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4017                 *pkts = 0;
4018                 *bytes = 0;
4019         } else {
4020                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4021                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4022         }
4023         rte_spinlock_unlock(&pool->sl);
4024         return 0;
4025 }
4026
4027 /**
4028  * Create and initialize a new counter pool.
4029  *
4030  * @param[in] dev
4031  *   Pointer to the Ethernet device structure.
4032  * @param[out] dcs
4033  *   The devX counter handle.
4034  * @param[in] batch
4035  *   Whether the pool is for counter that was allocated by batch command.
4036  *
4037  * @return
4038  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4039  */
4040 static struct mlx5_flow_counter_pool *
4041 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4042                     uint32_t batch)
4043 {
4044         struct mlx5_priv *priv = dev->data->dev_private;
4045         struct mlx5_flow_counter_pool *pool;
4046         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4047                                                                0);
4048         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4049         uint32_t size;
4050
4051         if (cont->n == n_valid) {
4052                 cont = flow_dv_container_resize(dev, batch);
4053                 if (!cont)
4054                         return NULL;
4055         }
4056         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4057                         sizeof(struct mlx5_flow_counter);
4058         pool = rte_calloc(__func__, 1, size, 0);
4059         if (!pool) {
4060                 rte_errno = ENOMEM;
4061                 return NULL;
4062         }
4063         pool->min_dcs = dcs;
4064         pool->raw = cont->init_mem_mng->raws + n_valid %
4065                                                      MLX5_CNT_CONTAINER_RESIZE;
4066         pool->raw_hw = NULL;
4067         rte_spinlock_init(&pool->sl);
4068         /*
4069          * The generation of the new allocated counters in this pool is 0, 2 in
4070          * the pool generation makes all the counters valid for allocation.
4071          */
4072         rte_atomic64_set(&pool->query_gen, 0x2);
4073         TAILQ_INIT(&pool->counters);
4074         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4075         cont->pools[n_valid] = pool;
4076         /* Pool initialization must be updated before host thread access. */
4077         rte_cio_wmb();
4078         rte_atomic16_add(&cont->n_valid, 1);
4079         return pool;
4080 }
4081
4082 /**
4083  * Prepare a new counter and/or a new counter pool.
4084  *
4085  * @param[in] dev
4086  *   Pointer to the Ethernet device structure.
4087  * @param[out] cnt_free
4088  *   Where to put the pointer of a new counter.
4089  * @param[in] batch
4090  *   Whether the pool is for counter that was allocated by batch command.
4091  *
4092  * @return
4093  *   The free counter pool pointer and @p cnt_free is set on success,
4094  *   NULL otherwise and rte_errno is set.
4095  */
4096 static struct mlx5_flow_counter_pool *
4097 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4098                              struct mlx5_flow_counter **cnt_free,
4099                              uint32_t batch)
4100 {
4101         struct mlx5_priv *priv = dev->data->dev_private;
4102         struct mlx5_flow_counter_pool *pool;
4103         struct mlx5_devx_obj *dcs = NULL;
4104         struct mlx5_flow_counter *cnt;
4105         uint32_t i;
4106
4107         if (!batch) {
4108                 /* bulk_bitmap must be 0 for single counter allocation. */
4109                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4110                 if (!dcs)
4111                         return NULL;
4112                 pool = flow_dv_find_pool_by_id
4113                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4114                 if (!pool) {
4115                         pool = flow_dv_pool_create(dev, dcs, batch);
4116                         if (!pool) {
4117                                 mlx5_devx_cmd_destroy(dcs);
4118                                 return NULL;
4119                         }
4120                 } else if (dcs->id < pool->min_dcs->id) {
4121                         rte_atomic64_set(&pool->a64_dcs,
4122                                          (int64_t)(uintptr_t)dcs);
4123                 }
4124                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4125                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4126                 cnt->dcs = dcs;
4127                 *cnt_free = cnt;
4128                 return pool;
4129         }
4130         /* bulk_bitmap is in 128 counters units. */
4131         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4132                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4133         if (!dcs) {
4134                 rte_errno = ENODATA;
4135                 return NULL;
4136         }
4137         pool = flow_dv_pool_create(dev, dcs, batch);
4138         if (!pool) {
4139                 mlx5_devx_cmd_destroy(dcs);
4140                 return NULL;
4141         }
4142         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4143                 cnt = &pool->counters_raw[i];
4144                 cnt->pool = pool;
4145                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4146         }
4147         *cnt_free = &pool->counters_raw[0];
4148         return pool;
4149 }
4150
4151 /**
4152  * Search for existed shared counter.
4153  *
4154  * @param[in] cont
4155  *   Pointer to the relevant counter pool container.
4156  * @param[in] id
4157  *   The shared counter ID to search.
4158  *
4159  * @return
4160  *   NULL if not existed, otherwise pointer to the shared counter.
4161  */
4162 static struct mlx5_flow_counter *
4163 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4164                               uint32_t id)
4165 {
4166         static struct mlx5_flow_counter *cnt;
4167         struct mlx5_flow_counter_pool *pool;
4168         int i;
4169
4170         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4171                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4172                         cnt = &pool->counters_raw[i];
4173                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4174                                 return cnt;
4175                 }
4176         }
4177         return NULL;
4178 }
4179
4180 /**
4181  * Allocate a flow counter.
4182  *
4183  * @param[in] dev
4184  *   Pointer to the Ethernet device structure.
4185  * @param[in] shared
4186  *   Indicate if this counter is shared with other flows.
4187  * @param[in] id
4188  *   Counter identifier.
4189  * @param[in] group
4190  *   Counter flow group.
4191  *
4192  * @return
4193  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4194  */
4195 static struct mlx5_flow_counter *
4196 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4197                       uint16_t group)
4198 {
4199         struct mlx5_priv *priv = dev->data->dev_private;
4200         struct mlx5_flow_counter_pool *pool = NULL;
4201         struct mlx5_flow_counter *cnt_free = NULL;
4202         /*
4203          * Currently group 0 flow counter cannot be assigned to a flow if it is
4204          * not the first one in the batch counter allocation, so it is better
4205          * to allocate counters one by one for these flows in a separate
4206          * container.
4207          * A counter can be shared between different groups so need to take
4208          * shared counters from the single container.
4209          */
4210         uint32_t batch = (group && !shared) ? 1 : 0;
4211         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4212                                                                0);
4213
4214         if (priv->counter_fallback)
4215                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4216         if (!priv->config.devx) {
4217                 rte_errno = ENOTSUP;
4218                 return NULL;
4219         }
4220         if (shared) {
4221                 cnt_free = flow_dv_counter_shared_search(cont, id);
4222                 if (cnt_free) {
4223                         if (cnt_free->ref_cnt + 1 == 0) {
4224                                 rte_errno = E2BIG;
4225                                 return NULL;
4226                         }
4227                         cnt_free->ref_cnt++;
4228                         return cnt_free;
4229                 }
4230         }
4231         /* Pools which has a free counters are in the start. */
4232         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4233                 /*
4234                  * The free counter reset values must be updated between the
4235                  * counter release to the counter allocation, so, at least one
4236                  * query must be done in this time. ensure it by saving the
4237                  * query generation in the release time.
4238                  * The free list is sorted according to the generation - so if
4239                  * the first one is not updated, all the others are not
4240                  * updated too.
4241                  */
4242                 cnt_free = TAILQ_FIRST(&pool->counters);
4243                 if (cnt_free && cnt_free->query_gen + 1 <
4244                     rte_atomic64_read(&pool->query_gen))
4245                         break;
4246                 cnt_free = NULL;
4247         }
4248         if (!cnt_free) {
4249                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4250                 if (!pool)
4251                         return NULL;
4252         }
4253         cnt_free->batch = batch;
4254         /* Create a DV counter action only in the first time usage. */
4255         if (!cnt_free->action) {
4256                 uint16_t offset;
4257                 struct mlx5_devx_obj *dcs;
4258
4259                 if (batch) {
4260                         offset = cnt_free - &pool->counters_raw[0];
4261                         dcs = pool->min_dcs;
4262                 } else {
4263                         offset = 0;
4264                         dcs = cnt_free->dcs;
4265                 }
4266                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4267                                         (dcs->obj, offset);
4268                 if (!cnt_free->action) {
4269                         rte_errno = errno;
4270                         return NULL;
4271                 }
4272         }
4273         /* Update the counter reset values. */
4274         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4275                                  &cnt_free->bytes))
4276                 return NULL;
4277         cnt_free->shared = shared;
4278         cnt_free->ref_cnt = 1;
4279         cnt_free->id = id;
4280         if (!priv->sh->cmng.query_thread_on)
4281                 /* Start the asynchronous batch query by the host thread. */
4282                 mlx5_set_query_alarm(priv->sh);
4283         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4284         if (TAILQ_EMPTY(&pool->counters)) {
4285                 /* Move the pool to the end of the container pool list. */
4286                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4287                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4288         }
4289         return cnt_free;
4290 }
4291
4292 /**
4293  * Release a flow counter.
4294  *
4295  * @param[in] dev
4296  *   Pointer to the Ethernet device structure.
4297  * @param[in] counter
4298  *   Pointer to the counter handler.
4299  */
4300 static void
4301 flow_dv_counter_release(struct rte_eth_dev *dev,
4302                         struct mlx5_flow_counter *counter)
4303 {
4304         struct mlx5_priv *priv = dev->data->dev_private;
4305
4306         if (!counter)
4307                 return;
4308         if (priv->counter_fallback) {
4309                 flow_dv_counter_release_fallback(dev, counter);
4310                 return;
4311         }
4312         if (--counter->ref_cnt == 0) {
4313                 struct mlx5_flow_counter_pool *pool =
4314                                 flow_dv_counter_pool_get(counter);
4315
4316                 /* Put the counter in the end - the last updated one. */
4317                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4318                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4319         }
4320 }
4321
4322 /**
4323  * Verify the @p attributes will be correctly understood by the NIC and store
4324  * them in the @p flow if everything is correct.
4325  *
4326  * @param[in] dev
4327  *   Pointer to dev struct.
4328  * @param[in] attributes
4329  *   Pointer to flow attributes
4330  * @param[in] external
4331  *   This flow rule is created by request external to PMD.
4332  * @param[out] error
4333  *   Pointer to error structure.
4334  *
4335  * @return
4336  *   0 on success, a negative errno value otherwise and rte_errno is set.
4337  */
4338 static int
4339 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4340                             const struct rte_flow_attr *attributes,
4341                             bool external __rte_unused,
4342                             struct rte_flow_error *error)
4343 {
4344         struct mlx5_priv *priv = dev->data->dev_private;
4345         uint32_t priority_max = priv->config.flow_prio - 1;
4346
4347 #ifndef HAVE_MLX5DV_DR
4348         if (attributes->group)
4349                 return rte_flow_error_set(error, ENOTSUP,
4350                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4351                                           NULL,
4352                                           "groups are not supported");
4353 #else
4354         uint32_t table;
4355         int ret;
4356
4357         ret = mlx5_flow_group_to_table(attributes, external,
4358                                        attributes->group,
4359                                        &table, error);
4360         if (ret)
4361                 return ret;
4362 #endif
4363         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4364             attributes->priority >= priority_max)
4365                 return rte_flow_error_set(error, ENOTSUP,
4366                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4367                                           NULL,
4368                                           "priority out of range");
4369         if (attributes->transfer) {
4370                 if (!priv->config.dv_esw_en)
4371                         return rte_flow_error_set
4372                                 (error, ENOTSUP,
4373                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4374                                  "E-Switch dr is not supported");
4375                 if (!(priv->representor || priv->master))
4376                         return rte_flow_error_set
4377                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4378                                  NULL, "E-Switch configuration can only be"
4379                                  " done by a master or a representor device");
4380                 if (attributes->egress)
4381                         return rte_flow_error_set
4382                                 (error, ENOTSUP,
4383                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4384                                  "egress is not supported");
4385         }
4386         if (!(attributes->egress ^ attributes->ingress))
4387                 return rte_flow_error_set(error, ENOTSUP,
4388                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4389                                           "must specify exactly one of "
4390                                           "ingress or egress");
4391         return 0;
4392 }
4393
4394 /**
4395  * Internal validation function. For validating both actions and items.
4396  *
4397  * @param[in] dev
4398  *   Pointer to the rte_eth_dev structure.
4399  * @param[in] attr
4400  *   Pointer to the flow attributes.
4401  * @param[in] items
4402  *   Pointer to the list of items.
4403  * @param[in] actions
4404  *   Pointer to the list of actions.
4405  * @param[in] external
4406  *   This flow rule is created by request external to PMD.
4407  * @param[out] error
4408  *   Pointer to the error structure.
4409  *
4410  * @return
4411  *   0 on success, a negative errno value otherwise and rte_errno is set.
4412  */
4413 static int
4414 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4415                  const struct rte_flow_item items[],
4416                  const struct rte_flow_action actions[],
4417                  bool external, struct rte_flow_error *error)
4418 {
4419         int ret;
4420         uint64_t action_flags = 0;
4421         uint64_t item_flags = 0;
4422         uint64_t last_item = 0;
4423         uint8_t next_protocol = 0xff;
4424         uint16_t ether_type = 0;
4425         int actions_n = 0;
4426         const struct rte_flow_item *gre_item = NULL;
4427         struct rte_flow_item_tcp nic_tcp_mask = {
4428                 .hdr = {
4429                         .tcp_flags = 0xFF,
4430                         .src_port = RTE_BE16(UINT16_MAX),
4431                         .dst_port = RTE_BE16(UINT16_MAX),
4432                 }
4433         };
4434         struct mlx5_priv *priv = dev->data->dev_private;
4435         struct mlx5_dev_config *dev_conf = &priv->config;
4436
4437         if (items == NULL)
4438                 return -1;
4439         ret = flow_dv_validate_attributes(dev, attr, external, error);
4440         if (ret < 0)
4441                 return ret;
4442         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4443                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4444                 int type = items->type;
4445
4446                 switch (type) {
4447                 case RTE_FLOW_ITEM_TYPE_VOID:
4448                         break;
4449                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4450                         ret = flow_dv_validate_item_port_id
4451                                         (dev, items, attr, item_flags, error);
4452                         if (ret < 0)
4453                                 return ret;
4454                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4455                         break;
4456                 case RTE_FLOW_ITEM_TYPE_ETH:
4457                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4458                                                           error);
4459                         if (ret < 0)
4460                                 return ret;
4461                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4462                                              MLX5_FLOW_LAYER_OUTER_L2;
4463                         if (items->mask != NULL && items->spec != NULL) {
4464                                 ether_type =
4465                                         ((const struct rte_flow_item_eth *)
4466                                          items->spec)->type;
4467                                 ether_type &=
4468                                         ((const struct rte_flow_item_eth *)
4469                                          items->mask)->type;
4470                                 ether_type = rte_be_to_cpu_16(ether_type);
4471                         } else {
4472                                 ether_type = 0;
4473                         }
4474                         break;
4475                 case RTE_FLOW_ITEM_TYPE_VLAN:
4476                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4477                                                            dev, error);
4478                         if (ret < 0)
4479                                 return ret;
4480                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4481                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4482                         if (items->mask != NULL && items->spec != NULL) {
4483                                 ether_type =
4484                                         ((const struct rte_flow_item_vlan *)
4485                                          items->spec)->inner_type;
4486                                 ether_type &=
4487                                         ((const struct rte_flow_item_vlan *)
4488                                          items->mask)->inner_type;
4489                                 ether_type = rte_be_to_cpu_16(ether_type);
4490                         } else {
4491                                 ether_type = 0;
4492                         }
4493                         break;
4494                 case RTE_FLOW_ITEM_TYPE_IPV4:
4495                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4496                                                   &item_flags, &tunnel);
4497                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4498                                                            last_item,
4499                                                            ether_type, NULL,
4500                                                            error);
4501                         if (ret < 0)
4502                                 return ret;
4503                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4504                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4505                         if (items->mask != NULL &&
4506                             ((const struct rte_flow_item_ipv4 *)
4507                              items->mask)->hdr.next_proto_id) {
4508                                 next_protocol =
4509                                         ((const struct rte_flow_item_ipv4 *)
4510                                          (items->spec))->hdr.next_proto_id;
4511                                 next_protocol &=
4512                                         ((const struct rte_flow_item_ipv4 *)
4513                                          (items->mask))->hdr.next_proto_id;
4514                         } else {
4515                                 /* Reset for inner layer. */
4516                                 next_protocol = 0xff;
4517                         }
4518                         break;
4519                 case RTE_FLOW_ITEM_TYPE_IPV6:
4520                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4521                                                   &item_flags, &tunnel);
4522                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4523                                                            last_item,
4524                                                            ether_type, NULL,
4525                                                            error);
4526                         if (ret < 0)
4527                                 return ret;
4528                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4529                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4530                         if (items->mask != NULL &&
4531                             ((const struct rte_flow_item_ipv6 *)
4532                              items->mask)->hdr.proto) {
4533                                 next_protocol =
4534                                         ((const struct rte_flow_item_ipv6 *)
4535                                          items->spec)->hdr.proto;
4536                                 next_protocol &=
4537                                         ((const struct rte_flow_item_ipv6 *)
4538                                          items->mask)->hdr.proto;
4539                         } else {
4540                                 /* Reset for inner layer. */
4541                                 next_protocol = 0xff;
4542                         }
4543                         break;
4544                 case RTE_FLOW_ITEM_TYPE_TCP:
4545                         ret = mlx5_flow_validate_item_tcp
4546                                                 (items, item_flags,
4547                                                  next_protocol,
4548                                                  &nic_tcp_mask,
4549                                                  error);
4550                         if (ret < 0)
4551                                 return ret;
4552                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4553                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4554                         break;
4555                 case RTE_FLOW_ITEM_TYPE_UDP:
4556                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4557                                                           next_protocol,
4558                                                           error);
4559                         if (ret < 0)
4560                                 return ret;
4561                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4562                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4563                         break;
4564                 case RTE_FLOW_ITEM_TYPE_GRE:
4565                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4566                                                           next_protocol, error);
4567                         if (ret < 0)
4568                                 return ret;
4569                         gre_item = items;
4570                         last_item = MLX5_FLOW_LAYER_GRE;
4571                         break;
4572                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4573                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4574                                                             next_protocol,
4575                                                             error);
4576                         if (ret < 0)
4577                                 return ret;
4578                         last_item = MLX5_FLOW_LAYER_NVGRE;
4579                         break;
4580                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4581                         ret = mlx5_flow_validate_item_gre_key
4582                                 (items, item_flags, gre_item, error);
4583                         if (ret < 0)
4584                                 return ret;
4585                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4586                         break;
4587                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4588                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4589                                                             error);
4590                         if (ret < 0)
4591                                 return ret;
4592                         last_item = MLX5_FLOW_LAYER_VXLAN;
4593                         break;
4594                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4595                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4596                                                                 item_flags, dev,
4597                                                                 error);
4598                         if (ret < 0)
4599                                 return ret;
4600                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4601                         break;
4602                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4603                         ret = mlx5_flow_validate_item_geneve(items,
4604                                                              item_flags, dev,
4605                                                              error);
4606                         if (ret < 0)
4607                                 return ret;
4608                         last_item = MLX5_FLOW_LAYER_GENEVE;
4609                         break;
4610                 case RTE_FLOW_ITEM_TYPE_MPLS:
4611                         ret = mlx5_flow_validate_item_mpls(dev, items,
4612                                                            item_flags,
4613                                                            last_item, error);
4614                         if (ret < 0)
4615                                 return ret;
4616                         last_item = MLX5_FLOW_LAYER_MPLS;
4617                         break;
4618
4619                 case RTE_FLOW_ITEM_TYPE_MARK:
4620                         ret = flow_dv_validate_item_mark(dev, items, attr,
4621                                                          error);
4622                         if (ret < 0)
4623                                 return ret;
4624                         last_item = MLX5_FLOW_ITEM_MARK;
4625                         break;
4626                 case RTE_FLOW_ITEM_TYPE_META:
4627                         ret = flow_dv_validate_item_meta(dev, items, attr,
4628                                                          error);
4629                         if (ret < 0)
4630                                 return ret;
4631                         last_item = MLX5_FLOW_ITEM_METADATA;
4632                         break;
4633                 case RTE_FLOW_ITEM_TYPE_ICMP:
4634                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4635                                                            next_protocol,
4636                                                            error);
4637                         if (ret < 0)
4638                                 return ret;
4639                         last_item = MLX5_FLOW_LAYER_ICMP;
4640                         break;
4641                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4642                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4643                                                             next_protocol,
4644                                                             error);
4645                         if (ret < 0)
4646                                 return ret;
4647                         last_item = MLX5_FLOW_LAYER_ICMP6;
4648                         break;
4649                 case RTE_FLOW_ITEM_TYPE_TAG:
4650                         ret = flow_dv_validate_item_tag(dev, items,
4651                                                         attr, error);
4652                         if (ret < 0)
4653                                 return ret;
4654                         last_item = MLX5_FLOW_ITEM_TAG;
4655                         break;
4656                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4657                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4658                         break;
4659                 case RTE_FLOW_ITEM_TYPE_GTP:
4660                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4661                                                         error);
4662                         if (ret < 0)
4663                                 return ret;
4664                         last_item = MLX5_FLOW_LAYER_GTP;
4665                         break;
4666                 default:
4667                         return rte_flow_error_set(error, ENOTSUP,
4668                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4669                                                   NULL, "item not supported");
4670                 }
4671                 item_flags |= last_item;
4672         }
4673         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4674                 int type = actions->type;
4675                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4676                         return rte_flow_error_set(error, ENOTSUP,
4677                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4678                                                   actions, "too many actions");
4679                 switch (type) {
4680                 case RTE_FLOW_ACTION_TYPE_VOID:
4681                         break;
4682                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4683                         ret = flow_dv_validate_action_port_id(dev,
4684                                                               action_flags,
4685                                                               actions,
4686                                                               attr,
4687                                                               error);
4688                         if (ret)
4689                                 return ret;
4690                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4691                         ++actions_n;
4692                         break;
4693                 case RTE_FLOW_ACTION_TYPE_FLAG:
4694                         ret = flow_dv_validate_action_flag(dev, action_flags,
4695                                                            attr, error);
4696                         if (ret < 0)
4697                                 return ret;
4698                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4699                                 /* Count all modify-header actions as one. */
4700                                 if (!(action_flags &
4701                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4702                                         ++actions_n;
4703                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4704                                                 MLX5_FLOW_ACTION_MARK_EXT;
4705                         } else {
4706                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4707                                 ++actions_n;
4708                         }
4709                         break;
4710                 case RTE_FLOW_ACTION_TYPE_MARK:
4711                         ret = flow_dv_validate_action_mark(dev, actions,
4712                                                            action_flags,
4713                                                            attr, error);
4714                         if (ret < 0)
4715                                 return ret;
4716                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4717                                 /* Count all modify-header actions as one. */
4718                                 if (!(action_flags &
4719                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4720                                         ++actions_n;
4721                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4722                                                 MLX5_FLOW_ACTION_MARK_EXT;
4723                         } else {
4724                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4725                                 ++actions_n;
4726                         }
4727                         break;
4728                 case RTE_FLOW_ACTION_TYPE_SET_META:
4729                         ret = flow_dv_validate_action_set_meta(dev, actions,
4730                                                                action_flags,
4731                                                                attr, error);
4732                         if (ret < 0)
4733                                 return ret;
4734                         /* Count all modify-header actions as one action. */
4735                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4736                                 ++actions_n;
4737                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4738                         break;
4739                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4740                         ret = flow_dv_validate_action_set_tag(dev, actions,
4741                                                               action_flags,
4742                                                               attr, error);
4743                         if (ret < 0)
4744                                 return ret;
4745                         /* Count all modify-header actions as one action. */
4746                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4747                                 ++actions_n;
4748                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4749                         break;
4750                 case RTE_FLOW_ACTION_TYPE_DROP:
4751                         ret = mlx5_flow_validate_action_drop(action_flags,
4752                                                              attr, error);
4753                         if (ret < 0)
4754                                 return ret;
4755                         action_flags |= MLX5_FLOW_ACTION_DROP;
4756                         ++actions_n;
4757                         break;
4758                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4759                         ret = mlx5_flow_validate_action_queue(actions,
4760                                                               action_flags, dev,
4761                                                               attr, error);
4762                         if (ret < 0)
4763                                 return ret;
4764                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4765                         ++actions_n;
4766                         break;
4767                 case RTE_FLOW_ACTION_TYPE_RSS:
4768                         ret = mlx5_flow_validate_action_rss(actions,
4769                                                             action_flags, dev,
4770                                                             attr, item_flags,
4771                                                             error);
4772                         if (ret < 0)
4773                                 return ret;
4774                         action_flags |= MLX5_FLOW_ACTION_RSS;
4775                         ++actions_n;
4776                         break;
4777                 case RTE_FLOW_ACTION_TYPE_COUNT:
4778                         ret = flow_dv_validate_action_count(dev, error);
4779                         if (ret < 0)
4780                                 return ret;
4781                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4782                         ++actions_n;
4783                         break;
4784                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4785                         if (flow_dv_validate_action_pop_vlan(dev,
4786                                                              action_flags,
4787                                                              actions,
4788                                                              item_flags, attr,
4789                                                              error))
4790                                 return -rte_errno;
4791                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4792                         ++actions_n;
4793                         break;
4794                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4795                         ret = flow_dv_validate_action_push_vlan(action_flags,
4796                                                                 item_flags,
4797                                                                 actions, attr,
4798                                                                 error);
4799                         if (ret < 0)
4800                                 return ret;
4801                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4802                         ++actions_n;
4803                         break;
4804                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4805                         ret = flow_dv_validate_action_set_vlan_pcp
4806                                                 (action_flags, actions, error);
4807                         if (ret < 0)
4808                                 return ret;
4809                         /* Count PCP with push_vlan command. */
4810                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4811                         break;
4812                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4813                         ret = flow_dv_validate_action_set_vlan_vid
4814                                                 (item_flags, action_flags,
4815                                                  actions, error);
4816                         if (ret < 0)
4817                                 return ret;
4818                         /* Count VID with push_vlan command. */
4819                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4820                         break;
4821                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4822                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4823                         ret = flow_dv_validate_action_l2_encap(action_flags,
4824                                                                actions, attr,
4825                                                                error);
4826                         if (ret < 0)
4827                                 return ret;
4828                         action_flags |= actions->type ==
4829                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4830                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4831                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4832                         ++actions_n;
4833                         break;
4834                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4835                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4836                         ret = flow_dv_validate_action_l2_decap(action_flags,
4837                                                                attr, error);
4838                         if (ret < 0)
4839                                 return ret;
4840                         action_flags |= actions->type ==
4841                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4842                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4843                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4844                         ++actions_n;
4845                         break;
4846                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4847                         ret = flow_dv_validate_action_raw_encap(action_flags,
4848                                                                 actions, attr,
4849                                                                 error);
4850                         if (ret < 0)
4851                                 return ret;
4852                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4853                         ++actions_n;
4854                         break;
4855                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4856                         ret = flow_dv_validate_action_raw_decap(action_flags,
4857                                                                 actions, attr,
4858                                                                 error);
4859                         if (ret < 0)
4860                                 return ret;
4861                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4862                         ++actions_n;
4863                         break;
4864                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4865                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4866                         ret = flow_dv_validate_action_modify_mac(action_flags,
4867                                                                  actions,
4868                                                                  item_flags,
4869                                                                  error);
4870                         if (ret < 0)
4871                                 return ret;
4872                         /* Count all modify-header actions as one action. */
4873                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4874                                 ++actions_n;
4875                         action_flags |= actions->type ==
4876                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4877                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4878                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4879                         break;
4880
4881                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4882                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4883                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4884                                                                   actions,
4885                                                                   item_flags,
4886                                                                   error);
4887                         if (ret < 0)
4888                                 return ret;
4889                         /* Count all modify-header actions as one action. */
4890                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4891                                 ++actions_n;
4892                         action_flags |= actions->type ==
4893                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4894                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4895                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4896                         break;
4897                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4898                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4899                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4900                                                                   actions,
4901                                                                   item_flags,
4902                                                                   error);
4903                         if (ret < 0)
4904                                 return ret;
4905                         /* Count all modify-header actions as one action. */
4906                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4907                                 ++actions_n;
4908                         action_flags |= actions->type ==
4909                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4910                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4911                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4912                         break;
4913                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4914                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4915                         ret = flow_dv_validate_action_modify_tp(action_flags,
4916                                                                 actions,
4917                                                                 item_flags,
4918                                                                 error);
4919                         if (ret < 0)
4920                                 return ret;
4921                         /* Count all modify-header actions as one action. */
4922                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4923                                 ++actions_n;
4924                         action_flags |= actions->type ==
4925                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4926                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4927                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4928                         break;
4929                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4930                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4931                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4932                                                                  actions,
4933                                                                  item_flags,
4934                                                                  error);
4935                         if (ret < 0)
4936                                 return ret;
4937                         /* Count all modify-header actions as one action. */
4938                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4939                                 ++actions_n;
4940                         action_flags |= actions->type ==
4941                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4942                                                 MLX5_FLOW_ACTION_SET_TTL :
4943                                                 MLX5_FLOW_ACTION_DEC_TTL;
4944                         break;
4945                 case RTE_FLOW_ACTION_TYPE_JUMP:
4946                         ret = flow_dv_validate_action_jump(actions,
4947                                                            action_flags,
4948                                                            attr, external,
4949                                                            error);
4950                         if (ret)
4951                                 return ret;
4952                         ++actions_n;
4953                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4954                         break;
4955                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4956                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4957                         ret = flow_dv_validate_action_modify_tcp_seq
4958                                                                 (action_flags,
4959                                                                  actions,
4960                                                                  item_flags,
4961                                                                  error);
4962                         if (ret < 0)
4963                                 return ret;
4964                         /* Count all modify-header actions as one action. */
4965                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4966                                 ++actions_n;
4967                         action_flags |= actions->type ==
4968                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4969                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4970                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4971                         break;
4972                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4973                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4974                         ret = flow_dv_validate_action_modify_tcp_ack
4975                                                                 (action_flags,
4976                                                                  actions,
4977                                                                  item_flags,
4978                                                                  error);
4979                         if (ret < 0)
4980                                 return ret;
4981                         /* Count all modify-header actions as one action. */
4982                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4983                                 ++actions_n;
4984                         action_flags |= actions->type ==
4985                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4986                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4987                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4988                         break;
4989                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4990                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4991                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4992                         break;
4993                 case RTE_FLOW_ACTION_TYPE_METER:
4994                         ret = mlx5_flow_validate_action_meter(dev,
4995                                                               action_flags,
4996                                                               actions, attr,
4997                                                               error);
4998                         if (ret < 0)
4999                                 return ret;
5000                         action_flags |= MLX5_FLOW_ACTION_METER;
5001                         ++actions_n;
5002                         break;
5003                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5004                         ret = flow_dv_validate_action_modify_ipv4_dscp
5005                                                          (action_flags,
5006                                                           actions,
5007                                                           item_flags,
5008                                                           error);
5009                         if (ret < 0)
5010                                 return ret;
5011                         /* Count all modify-header actions as one action. */
5012                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5013                                 ++actions_n;
5014                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5015                         break;
5016                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5017                         ret = flow_dv_validate_action_modify_ipv6_dscp
5018                                                                 (action_flags,
5019                                                                  actions,
5020                                                                  item_flags,
5021                                                                  error);
5022                         if (ret < 0)
5023                                 return ret;
5024                         /* Count all modify-header actions as one action. */
5025                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5026                                 ++actions_n;
5027                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5028                         break;
5029                 default:
5030                         return rte_flow_error_set(error, ENOTSUP,
5031                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5032                                                   actions,
5033                                                   "action not supported");
5034                 }
5035         }
5036         /*
5037          * Validate the drop action mutual exclusion with other actions.
5038          * Drop action is mutually-exclusive with any other action, except for
5039          * Count action.
5040          */
5041         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5042             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5043                 return rte_flow_error_set(error, EINVAL,
5044                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5045                                           "Drop action is mutually-exclusive "
5046                                           "with any other action, except for "
5047                                           "Count action");
5048         /* Eswitch has few restrictions on using items and actions */
5049         if (attr->transfer) {
5050                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5051                     action_flags & MLX5_FLOW_ACTION_FLAG)
5052                         return rte_flow_error_set(error, ENOTSUP,
5053                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5054                                                   NULL,
5055                                                   "unsupported action FLAG");
5056                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5057                     action_flags & MLX5_FLOW_ACTION_MARK)
5058                         return rte_flow_error_set(error, ENOTSUP,
5059                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5060                                                   NULL,
5061                                                   "unsupported action MARK");
5062                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5063                         return rte_flow_error_set(error, ENOTSUP,
5064                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5065                                                   NULL,
5066                                                   "unsupported action QUEUE");
5067                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5068                         return rte_flow_error_set(error, ENOTSUP,
5069                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5070                                                   NULL,
5071                                                   "unsupported action RSS");
5072                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5073                         return rte_flow_error_set(error, EINVAL,
5074                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5075                                                   actions,
5076                                                   "no fate action is found");
5077         } else {
5078                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5079                         return rte_flow_error_set(error, EINVAL,
5080                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5081                                                   actions,
5082                                                   "no fate action is found");
5083         }
5084         return 0;
5085 }
5086
5087 /**
5088  * Internal preparation function. Allocates the DV flow size,
5089  * this size is constant.
5090  *
5091  * @param[in] attr
5092  *   Pointer to the flow attributes.
5093  * @param[in] items
5094  *   Pointer to the list of items.
5095  * @param[in] actions
5096  *   Pointer to the list of actions.
5097  * @param[out] error
5098  *   Pointer to the error structure.
5099  *
5100  * @return
5101  *   Pointer to mlx5_flow object on success,
5102  *   otherwise NULL and rte_errno is set.
5103  */
5104 static struct mlx5_flow *
5105 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5106                 const struct rte_flow_item items[] __rte_unused,
5107                 const struct rte_flow_action actions[] __rte_unused,
5108                 struct rte_flow_error *error)
5109 {
5110         size_t size = sizeof(struct mlx5_flow);
5111         struct mlx5_flow *dev_flow;
5112
5113         dev_flow = rte_calloc(__func__, 1, size, 0);
5114         if (!dev_flow) {
5115                 rte_flow_error_set(error, ENOMEM,
5116                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5117                                    "not enough memory to create flow");
5118                 return NULL;
5119         }
5120         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5121         dev_flow->ingress = attr->ingress;
5122         dev_flow->transfer = attr->transfer;
5123         return dev_flow;
5124 }
5125
5126 #ifndef NDEBUG
5127 /**
5128  * Sanity check for match mask and value. Similar to check_valid_spec() in
5129  * kernel driver. If unmasked bit is present in value, it returns failure.
5130  *
5131  * @param match_mask
5132  *   pointer to match mask buffer.
5133  * @param match_value
5134  *   pointer to match value buffer.
5135  *
5136  * @return
5137  *   0 if valid, -EINVAL otherwise.
5138  */
5139 static int
5140 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5141 {
5142         uint8_t *m = match_mask;
5143         uint8_t *v = match_value;
5144         unsigned int i;
5145
5146         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5147                 if (v[i] & ~m[i]) {
5148                         DRV_LOG(ERR,
5149                                 "match_value differs from match_criteria"
5150                                 " %p[%u] != %p[%u]",
5151                                 match_value, i, match_mask, i);
5152                         return -EINVAL;
5153                 }
5154         }
5155         return 0;
5156 }
5157 #endif
5158
5159 /**
5160  * Add Ethernet item to matcher and to the value.
5161  *
5162  * @param[in, out] matcher
5163  *   Flow matcher.
5164  * @param[in, out] key
5165  *   Flow matcher value.
5166  * @param[in] item
5167  *   Flow pattern to translate.
5168  * @param[in] inner
5169  *   Item is inner pattern.
5170  */
5171 static void
5172 flow_dv_translate_item_eth(void *matcher, void *key,
5173                            const struct rte_flow_item *item, int inner)
5174 {
5175         const struct rte_flow_item_eth *eth_m = item->mask;
5176         const struct rte_flow_item_eth *eth_v = item->spec;
5177         const struct rte_flow_item_eth nic_mask = {
5178                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5179                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5180                 .type = RTE_BE16(0xffff),
5181         };
5182         void *headers_m;
5183         void *headers_v;
5184         char *l24_v;
5185         unsigned int i;
5186
5187         if (!eth_v)
5188                 return;
5189         if (!eth_m)
5190                 eth_m = &nic_mask;
5191         if (inner) {
5192                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5193                                          inner_headers);
5194                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5195         } else {
5196                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5197                                          outer_headers);
5198                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5199         }
5200         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5201                &eth_m->dst, sizeof(eth_m->dst));
5202         /* The value must be in the range of the mask. */
5203         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5204         for (i = 0; i < sizeof(eth_m->dst); ++i)
5205                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5206         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5207                &eth_m->src, sizeof(eth_m->src));
5208         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5209         /* The value must be in the range of the mask. */
5210         for (i = 0; i < sizeof(eth_m->dst); ++i)
5211                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5212         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5213                  rte_be_to_cpu_16(eth_m->type));
5214         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5215         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5216 }
5217
5218 /**
5219  * Add VLAN item to matcher and to the value.
5220  *
5221  * @param[in, out] dev_flow
5222  *   Flow descriptor.
5223  * @param[in, out] matcher
5224  *   Flow matcher.
5225  * @param[in, out] key
5226  *   Flow matcher value.
5227  * @param[in] item
5228  *   Flow pattern to translate.
5229  * @param[in] inner
5230  *   Item is inner pattern.
5231  */
5232 static void
5233 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5234                             void *matcher, void *key,
5235                             const struct rte_flow_item *item,
5236                             int inner)
5237 {
5238         const struct rte_flow_item_vlan *vlan_m = item->mask;
5239         const struct rte_flow_item_vlan *vlan_v = item->spec;
5240         void *headers_m;
5241         void *headers_v;
5242         uint16_t tci_m;
5243         uint16_t tci_v;
5244
5245         if (!vlan_v)
5246                 return;
5247         if (!vlan_m)
5248                 vlan_m = &rte_flow_item_vlan_mask;
5249         if (inner) {
5250                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5251                                          inner_headers);
5252                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5253         } else {
5254                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5255                                          outer_headers);
5256                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5257                 /*
5258                  * This is workaround, masks are not supported,
5259                  * and pre-validated.
5260                  */
5261                 dev_flow->dv.vf_vlan.tag =
5262                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5263         }
5264         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5265         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5266         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5267         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5268         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5269         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5270         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5271         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5272         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5273         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5274         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5275                  rte_be_to_cpu_16(vlan_m->inner_type));
5276         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5277                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5278 }
5279
5280 /**
5281  * Add IPV4 item to matcher and to the value.
5282  *
5283  * @param[in, out] matcher
5284  *   Flow matcher.
5285  * @param[in, out] key
5286  *   Flow matcher value.
5287  * @param[in] item
5288  *   Flow pattern to translate.
5289  * @param[in] inner
5290  *   Item is inner pattern.
5291  * @param[in] group
5292  *   The group to insert the rule.
5293  */
5294 static void
5295 flow_dv_translate_item_ipv4(void *matcher, void *key,
5296                             const struct rte_flow_item *item,
5297                             int inner, uint32_t group)
5298 {
5299         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5300         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5301         const struct rte_flow_item_ipv4 nic_mask = {
5302                 .hdr = {
5303                         .src_addr = RTE_BE32(0xffffffff),
5304                         .dst_addr = RTE_BE32(0xffffffff),
5305                         .type_of_service = 0xff,
5306                         .next_proto_id = 0xff,
5307                 },
5308         };
5309         void *headers_m;
5310         void *headers_v;
5311         char *l24_m;
5312         char *l24_v;
5313         uint8_t tos;
5314
5315         if (inner) {
5316                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5317                                          inner_headers);
5318                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5319         } else {
5320                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5321                                          outer_headers);
5322                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5323         }
5324         if (group == 0)
5325                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5326         else
5327                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5328         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5329         if (!ipv4_v)
5330                 return;
5331         if (!ipv4_m)
5332                 ipv4_m = &nic_mask;
5333         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5334                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5335         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5336                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5337         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5338         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5339         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5340                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5341         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5342                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5343         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5344         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5345         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5346         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5347                  ipv4_m->hdr.type_of_service);
5348         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5349         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5350                  ipv4_m->hdr.type_of_service >> 2);
5351         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5352         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5353                  ipv4_m->hdr.next_proto_id);
5354         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5355                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5356 }
5357
5358 /**
5359  * Add IPV6 item to matcher and to the value.
5360  *
5361  * @param[in, out] matcher
5362  *   Flow matcher.
5363  * @param[in, out] key
5364  *   Flow matcher value.
5365  * @param[in] item
5366  *   Flow pattern to translate.
5367  * @param[in] inner
5368  *   Item is inner pattern.
5369  * @param[in] group
5370  *   The group to insert the rule.
5371  */
5372 static void
5373 flow_dv_translate_item_ipv6(void *matcher, void *key,
5374                             const struct rte_flow_item *item,
5375                             int inner, uint32_t group)
5376 {
5377         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5378         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5379         const struct rte_flow_item_ipv6 nic_mask = {
5380                 .hdr = {
5381                         .src_addr =
5382                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5383                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5384                         .dst_addr =
5385                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5386                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5387                         .vtc_flow = RTE_BE32(0xffffffff),
5388                         .proto = 0xff,
5389                         .hop_limits = 0xff,
5390                 },
5391         };
5392         void *headers_m;
5393         void *headers_v;
5394         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5395         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5396         char *l24_m;
5397         char *l24_v;
5398         uint32_t vtc_m;
5399         uint32_t vtc_v;
5400         int i;
5401         int size;
5402
5403         if (inner) {
5404                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5405                                          inner_headers);
5406                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5407         } else {
5408                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5409                                          outer_headers);
5410                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5411         }
5412         if (group == 0)
5413                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5414         else
5415                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5416         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5417         if (!ipv6_v)
5418                 return;
5419         if (!ipv6_m)
5420                 ipv6_m = &nic_mask;
5421         size = sizeof(ipv6_m->hdr.dst_addr);
5422         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5423                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5424         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5425                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5426         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5427         for (i = 0; i < size; ++i)
5428                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5429         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5430                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5431         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5432                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5433         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5434         for (i = 0; i < size; ++i)
5435                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5436         /* TOS. */
5437         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5438         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5439         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5440         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5441         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5442         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5443         /* Label. */
5444         if (inner) {
5445                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5446                          vtc_m);
5447                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5448                          vtc_v);
5449         } else {
5450                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5451                          vtc_m);
5452                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5453                          vtc_v);
5454         }
5455         /* Protocol. */
5456         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5457                  ipv6_m->hdr.proto);
5458         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5459                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5460 }
5461
5462 /**
5463  * Add TCP item to matcher and to the value.
5464  *
5465  * @param[in, out] matcher
5466  *   Flow matcher.
5467  * @param[in, out] key
5468  *   Flow matcher value.
5469  * @param[in] item
5470  *   Flow pattern to translate.
5471  * @param[in] inner
5472  *   Item is inner pattern.
5473  */
5474 static void
5475 flow_dv_translate_item_tcp(void *matcher, void *key,
5476                            const struct rte_flow_item *item,
5477                            int inner)
5478 {
5479         const struct rte_flow_item_tcp *tcp_m = item->mask;
5480         const struct rte_flow_item_tcp *tcp_v = item->spec;
5481         void *headers_m;
5482         void *headers_v;
5483
5484         if (inner) {
5485                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5486                                          inner_headers);
5487                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5488         } else {
5489                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5490                                          outer_headers);
5491                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5492         }
5493         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5494         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5495         if (!tcp_v)
5496                 return;
5497         if (!tcp_m)
5498                 tcp_m = &rte_flow_item_tcp_mask;
5499         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5500                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5501         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5502                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5503         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5504                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5505         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5506                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5507         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5508                  tcp_m->hdr.tcp_flags);
5509         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5510                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5511 }
5512
5513 /**
5514  * Add UDP item to matcher and to the value.
5515  *
5516  * @param[in, out] matcher
5517  *   Flow matcher.
5518  * @param[in, out] key
5519  *   Flow matcher value.
5520  * @param[in] item
5521  *   Flow pattern to translate.
5522  * @param[in] inner
5523  *   Item is inner pattern.
5524  */
5525 static void
5526 flow_dv_translate_item_udp(void *matcher, void *key,
5527                            const struct rte_flow_item *item,
5528                            int inner)
5529 {
5530         const struct rte_flow_item_udp *udp_m = item->mask;
5531         const struct rte_flow_item_udp *udp_v = item->spec;
5532         void *headers_m;
5533         void *headers_v;
5534
5535         if (inner) {
5536                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5537                                          inner_headers);
5538                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5539         } else {
5540                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5541                                          outer_headers);
5542                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5543         }
5544         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5545         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5546         if (!udp_v)
5547                 return;
5548         if (!udp_m)
5549                 udp_m = &rte_flow_item_udp_mask;
5550         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5551                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5552         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5553                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5554         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5555                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5556         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5557                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5558 }
5559
5560 /**
5561  * Add GRE optional Key item to matcher and to the value.
5562  *
5563  * @param[in, out] matcher
5564  *   Flow matcher.
5565  * @param[in, out] key
5566  *   Flow matcher value.
5567  * @param[in] item
5568  *   Flow pattern to translate.
5569  * @param[in] inner
5570  *   Item is inner pattern.
5571  */
5572 static void
5573 flow_dv_translate_item_gre_key(void *matcher, void *key,
5574                                    const struct rte_flow_item *item)
5575 {
5576         const rte_be32_t *key_m = item->mask;
5577         const rte_be32_t *key_v = item->spec;
5578         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5579         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5580         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5581
5582         if (!key_v)
5583                 return;
5584         if (!key_m)
5585                 key_m = &gre_key_default_mask;
5586         /* GRE K bit must be on and should already be validated */
5587         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5588         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5589         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5590                  rte_be_to_cpu_32(*key_m) >> 8);
5591         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5592                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5593         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5594                  rte_be_to_cpu_32(*key_m) & 0xFF);
5595         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5596                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5597 }
5598
5599 /**
5600  * Add GRE item to matcher and to the value.
5601  *
5602  * @param[in, out] matcher
5603  *   Flow matcher.
5604  * @param[in, out] key
5605  *   Flow matcher value.
5606  * @param[in] item
5607  *   Flow pattern to translate.
5608  * @param[in] inner
5609  *   Item is inner pattern.
5610  */
5611 static void
5612 flow_dv_translate_item_gre(void *matcher, void *key,
5613                            const struct rte_flow_item *item,
5614                            int inner)
5615 {
5616         const struct rte_flow_item_gre *gre_m = item->mask;
5617         const struct rte_flow_item_gre *gre_v = item->spec;
5618         void *headers_m;
5619         void *headers_v;
5620         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5621         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5622         struct {
5623                 union {
5624                         __extension__
5625                         struct {
5626                                 uint16_t version:3;
5627                                 uint16_t rsvd0:9;
5628                                 uint16_t s_present:1;
5629                                 uint16_t k_present:1;
5630                                 uint16_t rsvd_bit1:1;
5631                                 uint16_t c_present:1;
5632                         };
5633                         uint16_t value;
5634                 };
5635         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5636
5637         if (inner) {
5638                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5639                                          inner_headers);
5640                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5641         } else {
5642                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5643                                          outer_headers);
5644                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5645         }
5646         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5647         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5648         if (!gre_v)
5649                 return;
5650         if (!gre_m)
5651                 gre_m = &rte_flow_item_gre_mask;
5652         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5653                  rte_be_to_cpu_16(gre_m->protocol));
5654         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5655                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5656         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5657         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5658         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5659                  gre_crks_rsvd0_ver_m.c_present);
5660         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5661                  gre_crks_rsvd0_ver_v.c_present &
5662                  gre_crks_rsvd0_ver_m.c_present);
5663         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5664                  gre_crks_rsvd0_ver_m.k_present);
5665         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5666                  gre_crks_rsvd0_ver_v.k_present &
5667                  gre_crks_rsvd0_ver_m.k_present);
5668         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5669                  gre_crks_rsvd0_ver_m.s_present);
5670         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5671                  gre_crks_rsvd0_ver_v.s_present &
5672                  gre_crks_rsvd0_ver_m.s_present);
5673 }
5674
5675 /**
5676  * Add NVGRE item to matcher and to the value.
5677  *
5678  * @param[in, out] matcher
5679  *   Flow matcher.
5680  * @param[in, out] key
5681  *   Flow matcher value.
5682  * @param[in] item
5683  *   Flow pattern to translate.
5684  * @param[in] inner
5685  *   Item is inner pattern.
5686  */
5687 static void
5688 flow_dv_translate_item_nvgre(void *matcher, void *key,
5689                              const struct rte_flow_item *item,
5690                              int inner)
5691 {
5692         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5693         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5694         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5695         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5696         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5697         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5698         char *gre_key_m;
5699         char *gre_key_v;
5700         int size;
5701         int i;
5702
5703         /* For NVGRE, GRE header fields must be set with defined values. */
5704         const struct rte_flow_item_gre gre_spec = {
5705                 .c_rsvd0_ver = RTE_BE16(0x2000),
5706                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5707         };
5708         const struct rte_flow_item_gre gre_mask = {
5709                 .c_rsvd0_ver = RTE_BE16(0xB000),
5710                 .protocol = RTE_BE16(UINT16_MAX),
5711         };
5712         const struct rte_flow_item gre_item = {
5713                 .spec = &gre_spec,
5714                 .mask = &gre_mask,
5715                 .last = NULL,
5716         };
5717         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5718         if (!nvgre_v)
5719                 return;
5720         if (!nvgre_m)
5721                 nvgre_m = &rte_flow_item_nvgre_mask;
5722         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5723         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5724         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5725         memcpy(gre_key_m, tni_flow_id_m, size);
5726         for (i = 0; i < size; ++i)
5727                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5728 }
5729
5730 /**
5731  * Add VXLAN item to matcher and to the value.
5732  *
5733  * @param[in, out] matcher
5734  *   Flow matcher.
5735  * @param[in, out] key
5736  *   Flow matcher value.
5737  * @param[in] item
5738  *   Flow pattern to translate.
5739  * @param[in] inner
5740  *   Item is inner pattern.
5741  */
5742 static void
5743 flow_dv_translate_item_vxlan(void *matcher, void *key,
5744                              const struct rte_flow_item *item,
5745                              int inner)
5746 {
5747         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5748         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5749         void *headers_m;
5750         void *headers_v;
5751         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5752         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5753         char *vni_m;
5754         char *vni_v;
5755         uint16_t dport;
5756         int size;
5757         int i;
5758
5759         if (inner) {
5760                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5761                                          inner_headers);
5762                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5763         } else {
5764                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5765                                          outer_headers);
5766                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5767         }
5768         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5769                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5770         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5771                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5772                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5773         }
5774         if (!vxlan_v)
5775                 return;
5776         if (!vxlan_m)
5777                 vxlan_m = &rte_flow_item_vxlan_mask;
5778         size = sizeof(vxlan_m->vni);
5779         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5780         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5781         memcpy(vni_m, vxlan_m->vni, size);
5782         for (i = 0; i < size; ++i)
5783                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5784 }
5785
5786 /**
5787  * Add Geneve item to matcher and to the value.
5788  *
5789  * @param[in, out] matcher
5790  *   Flow matcher.
5791  * @param[in, out] key
5792  *   Flow matcher value.
5793  * @param[in] item
5794  *   Flow pattern to translate.
5795  * @param[in] inner
5796  *   Item is inner pattern.
5797  */
5798
5799 static void
5800 flow_dv_translate_item_geneve(void *matcher, void *key,
5801                               const struct rte_flow_item *item, int inner)
5802 {
5803         const struct rte_flow_item_geneve *geneve_m = item->mask;
5804         const struct rte_flow_item_geneve *geneve_v = item->spec;
5805         void *headers_m;
5806         void *headers_v;
5807         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5808         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5809         uint16_t dport;
5810         uint16_t gbhdr_m;
5811         uint16_t gbhdr_v;
5812         char *vni_m;
5813         char *vni_v;
5814         size_t size, i;
5815
5816         if (inner) {
5817                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5818                                          inner_headers);
5819                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5820         } else {
5821                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5822                                          outer_headers);
5823                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5824         }
5825         dport = MLX5_UDP_PORT_GENEVE;
5826         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5827                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5828                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5829         }
5830         if (!geneve_v)
5831                 return;
5832         if (!geneve_m)
5833                 geneve_m = &rte_flow_item_geneve_mask;
5834         size = sizeof(geneve_m->vni);
5835         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5836         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5837         memcpy(vni_m, geneve_m->vni, size);
5838         for (i = 0; i < size; ++i)
5839                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5840         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5841                  rte_be_to_cpu_16(geneve_m->protocol));
5842         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5843                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5844         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5845         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5846         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5847                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5848         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5849                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5850         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5851                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5852         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5853                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5854                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5855 }
5856
5857 /**
5858  * Add MPLS item to matcher and to the value.
5859  *
5860  * @param[in, out] matcher
5861  *   Flow matcher.
5862  * @param[in, out] key
5863  *   Flow matcher value.
5864  * @param[in] item
5865  *   Flow pattern to translate.
5866  * @param[in] prev_layer
5867  *   The protocol layer indicated in previous item.
5868  * @param[in] inner
5869  *   Item is inner pattern.
5870  */
5871 static void
5872 flow_dv_translate_item_mpls(void *matcher, void *key,
5873                             const struct rte_flow_item *item,
5874                             uint64_t prev_layer,
5875                             int inner)
5876 {
5877         const uint32_t *in_mpls_m = item->mask;
5878         const uint32_t *in_mpls_v = item->spec;
5879         uint32_t *out_mpls_m = 0;
5880         uint32_t *out_mpls_v = 0;
5881         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5882         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5883         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5884                                      misc_parameters_2);
5885         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5886         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5887         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5888
5889         switch (prev_layer) {
5890         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5891                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5892                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5893                          MLX5_UDP_PORT_MPLS);
5894                 break;
5895         case MLX5_FLOW_LAYER_GRE:
5896                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5897                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5898                          RTE_ETHER_TYPE_MPLS);
5899                 break;
5900         default:
5901                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5902                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5903                          IPPROTO_MPLS);
5904                 break;
5905         }
5906         if (!in_mpls_v)
5907                 return;
5908         if (!in_mpls_m)
5909                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5910         switch (prev_layer) {
5911         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5912                 out_mpls_m =
5913                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5914                                                  outer_first_mpls_over_udp);
5915                 out_mpls_v =
5916                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5917                                                  outer_first_mpls_over_udp);
5918                 break;
5919         case MLX5_FLOW_LAYER_GRE:
5920                 out_mpls_m =
5921                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5922                                                  outer_first_mpls_over_gre);
5923                 out_mpls_v =
5924                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5925                                                  outer_first_mpls_over_gre);
5926                 break;
5927         default:
5928                 /* Inner MPLS not over GRE is not supported. */
5929                 if (!inner) {
5930                         out_mpls_m =
5931                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5932                                                          misc2_m,
5933                                                          outer_first_mpls);
5934                         out_mpls_v =
5935                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5936                                                          misc2_v,
5937                                                          outer_first_mpls);
5938                 }
5939                 break;
5940         }
5941         if (out_mpls_m && out_mpls_v) {
5942                 *out_mpls_m = *in_mpls_m;
5943                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5944         }
5945 }
5946
5947 /**
5948  * Add metadata register item to matcher
5949  *
5950  * @param[in, out] matcher
5951  *   Flow matcher.
5952  * @param[in, out] key
5953  *   Flow matcher value.
5954  * @param[in] reg_type
5955  *   Type of device metadata register
5956  * @param[in] value
5957  *   Register value
5958  * @param[in] mask
5959  *   Register mask
5960  */
5961 static void
5962 flow_dv_match_meta_reg(void *matcher, void *key,
5963                        enum modify_reg reg_type,
5964                        uint32_t data, uint32_t mask)
5965 {
5966         void *misc2_m =
5967                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5968         void *misc2_v =
5969                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5970         uint32_t temp;
5971
5972         data &= mask;
5973         switch (reg_type) {
5974         case REG_A:
5975                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5976                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5977                 break;
5978         case REG_B:
5979                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5980                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5981                 break;
5982         case REG_C_0:
5983                 /*
5984                  * The metadata register C0 field might be divided into
5985                  * source vport index and META item value, we should set
5986                  * this field according to specified mask, not as whole one.
5987                  */
5988                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
5989                 temp |= mask;
5990                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
5991                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
5992                 temp &= ~mask;
5993                 temp |= data;
5994                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
5995                 break;
5996         case REG_C_1:
5997                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5998                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5999                 break;
6000         case REG_C_2:
6001                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
6002                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
6003                 break;
6004         case REG_C_3:
6005                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6006                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6007                 break;
6008         case REG_C_4:
6009                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6010                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6011                 break;
6012         case REG_C_5:
6013                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6014                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6015                 break;
6016         case REG_C_6:
6017                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6018                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6019                 break;
6020         case REG_C_7:
6021                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6022                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6023                 break;
6024         default:
6025                 assert(false);
6026                 break;
6027         }
6028 }
6029
6030 /**
6031  * Add MARK item to matcher
6032  *
6033  * @param[in] dev
6034  *   The device to configure through.
6035  * @param[in, out] matcher
6036  *   Flow matcher.
6037  * @param[in, out] key
6038  *   Flow matcher value.
6039  * @param[in] item
6040  *   Flow pattern to translate.
6041  */
6042 static void
6043 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6044                             void *matcher, void *key,
6045                             const struct rte_flow_item *item)
6046 {
6047         struct mlx5_priv *priv = dev->data->dev_private;
6048         const struct rte_flow_item_mark *mark;
6049         uint32_t value;
6050         uint32_t mask;
6051
6052         mark = item->mask ? (const void *)item->mask :
6053                             &rte_flow_item_mark_mask;
6054         mask = mark->id & priv->sh->dv_mark_mask;
6055         mark = (const void *)item->spec;
6056         assert(mark);
6057         value = mark->id & priv->sh->dv_mark_mask & mask;
6058         if (mask) {
6059                 enum modify_reg reg;
6060
6061                 /* Get the metadata register index for the mark. */
6062                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6063                 assert(reg > 0);
6064                 if (reg == REG_C_0) {
6065                         struct mlx5_priv *priv = dev->data->dev_private;
6066                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6067                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6068
6069                         mask &= msk_c0;
6070                         mask <<= shl_c0;
6071                         value <<= shl_c0;
6072                 }
6073                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6074         }
6075 }
6076
6077 /**
6078  * Add META item to matcher
6079  *
6080  * @param[in] dev
6081  *   The devich to configure through.
6082  * @param[in, out] matcher
6083  *   Flow matcher.
6084  * @param[in, out] key
6085  *   Flow matcher value.
6086  * @param[in] attr
6087  *   Attributes of flow that includes this item.
6088  * @param[in] item
6089  *   Flow pattern to translate.
6090  */
6091 static void
6092 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6093                             void *matcher, void *key,
6094                             const struct rte_flow_attr *attr,
6095                             const struct rte_flow_item *item)
6096 {
6097         const struct rte_flow_item_meta *meta_m;
6098         const struct rte_flow_item_meta *meta_v;
6099
6100         meta_m = (const void *)item->mask;
6101         if (!meta_m)
6102                 meta_m = &rte_flow_item_meta_mask;
6103         meta_v = (const void *)item->spec;
6104         if (meta_v) {
6105                 enum modify_reg reg;
6106                 uint32_t value = meta_v->data;
6107                 uint32_t mask = meta_m->data;
6108
6109                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6110                 if (reg < 0)
6111                         return;
6112                 /*
6113                  * In datapath code there is no endianness
6114                  * coversions for perfromance reasons, all
6115                  * pattern conversions are done in rte_flow.
6116                  */
6117                 value = rte_cpu_to_be_32(value);
6118                 mask = rte_cpu_to_be_32(mask);
6119                 if (reg == REG_C_0) {
6120                         struct mlx5_priv *priv = dev->data->dev_private;
6121                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6122                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6123 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6124                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6125
6126                         value >>= shr_c0;
6127                         mask >>= shr_c0;
6128 #endif
6129                         value <<= shl_c0;
6130                         mask <<= shl_c0;
6131                         assert(msk_c0);
6132                         assert(!(~msk_c0 & mask));
6133                 }
6134                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6135         }
6136 }
6137
6138 /**
6139  * Add vport metadata Reg C0 item to matcher
6140  *
6141  * @param[in, out] matcher
6142  *   Flow matcher.
6143  * @param[in, out] key
6144  *   Flow matcher value.
6145  * @param[in] reg
6146  *   Flow pattern to translate.
6147  */
6148 static void
6149 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6150                                   uint32_t value, uint32_t mask)
6151 {
6152         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6153 }
6154
6155 /**
6156  * Add tag item to matcher
6157  *
6158  * @param[in] dev
6159  *   The devich to configure through.
6160  * @param[in, out] matcher
6161  *   Flow matcher.
6162  * @param[in, out] key
6163  *   Flow matcher value.
6164  * @param[in] item
6165  *   Flow pattern to translate.
6166  */
6167 static void
6168 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6169                                 void *matcher, void *key,
6170                                 const struct rte_flow_item *item)
6171 {
6172         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6173         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6174         uint32_t mask, value;
6175
6176         assert(tag_v);
6177         value = tag_v->data;
6178         mask = tag_m ? tag_m->data : UINT32_MAX;
6179         if (tag_v->id == REG_C_0) {
6180                 struct mlx5_priv *priv = dev->data->dev_private;
6181                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6182                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6183
6184                 mask &= msk_c0;
6185                 mask <<= shl_c0;
6186                 value <<= shl_c0;
6187         }
6188         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6189 }
6190
6191 /**
6192  * Add TAG item to matcher
6193  *
6194  * @param[in] dev
6195  *   The devich to configure through.
6196  * @param[in, out] matcher
6197  *   Flow matcher.
6198  * @param[in, out] key
6199  *   Flow matcher value.
6200  * @param[in] item
6201  *   Flow pattern to translate.
6202  */
6203 static void
6204 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6205                            void *matcher, void *key,
6206                            const struct rte_flow_item *item)
6207 {
6208         const struct rte_flow_item_tag *tag_v = item->spec;
6209         const struct rte_flow_item_tag *tag_m = item->mask;
6210         enum modify_reg reg;
6211
6212         assert(tag_v);
6213         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6214         /* Get the metadata register index for the tag. */
6215         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6216         assert(reg > 0);
6217         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6218 }
6219
6220 /**
6221  * Add source vport match to the specified matcher.
6222  *
6223  * @param[in, out] matcher
6224  *   Flow matcher.
6225  * @param[in, out] key
6226  *   Flow matcher value.
6227  * @param[in] port
6228  *   Source vport value to match
6229  * @param[in] mask
6230  *   Mask
6231  */
6232 static void
6233 flow_dv_translate_item_source_vport(void *matcher, void *key,
6234                                     int16_t port, uint16_t mask)
6235 {
6236         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6237         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6238
6239         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6240         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6241 }
6242
6243 /**
6244  * Translate port-id item to eswitch match on  port-id.
6245  *
6246  * @param[in] dev
6247  *   The devich to configure through.
6248  * @param[in, out] matcher
6249  *   Flow matcher.
6250  * @param[in, out] key
6251  *   Flow matcher value.
6252  * @param[in] item
6253  *   Flow pattern to translate.
6254  *
6255  * @return
6256  *   0 on success, a negative errno value otherwise.
6257  */
6258 static int
6259 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6260                                void *key, const struct rte_flow_item *item)
6261 {
6262         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6263         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6264         struct mlx5_priv *priv;
6265         uint16_t mask, id;
6266
6267         mask = pid_m ? pid_m->id : 0xffff;
6268         id = pid_v ? pid_v->id : dev->data->port_id;
6269         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6270         if (!priv)
6271                 return -rte_errno;
6272         /* Translate to vport field or to metadata, depending on mode. */
6273         if (priv->vport_meta_mask)
6274                 flow_dv_translate_item_meta_vport(matcher, key,
6275                                                   priv->vport_meta_tag,
6276                                                   priv->vport_meta_mask);
6277         else
6278                 flow_dv_translate_item_source_vport(matcher, key,
6279                                                     priv->vport_id, mask);
6280         return 0;
6281 }
6282
6283 /**
6284  * Add ICMP6 item to matcher and to the value.
6285  *
6286  * @param[in, out] matcher
6287  *   Flow matcher.
6288  * @param[in, out] key
6289  *   Flow matcher value.
6290  * @param[in] item
6291  *   Flow pattern to translate.
6292  * @param[in] inner
6293  *   Item is inner pattern.
6294  */
6295 static void
6296 flow_dv_translate_item_icmp6(void *matcher, void *key,
6297                               const struct rte_flow_item *item,
6298                               int inner)
6299 {
6300         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6301         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6302         void *headers_m;
6303         void *headers_v;
6304         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6305                                      misc_parameters_3);
6306         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6307         if (inner) {
6308                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6309                                          inner_headers);
6310                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6311         } else {
6312                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6313                                          outer_headers);
6314                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6315         }
6316         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6317         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6318         if (!icmp6_v)
6319                 return;
6320         if (!icmp6_m)
6321                 icmp6_m = &rte_flow_item_icmp6_mask;
6322         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6323         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6324                  icmp6_v->type & icmp6_m->type);
6325         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6326         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6327                  icmp6_v->code & icmp6_m->code);
6328 }
6329
6330 /**
6331  * Add ICMP item to matcher and to the value.
6332  *
6333  * @param[in, out] matcher
6334  *   Flow matcher.
6335  * @param[in, out] key
6336  *   Flow matcher value.
6337  * @param[in] item
6338  *   Flow pattern to translate.
6339  * @param[in] inner
6340  *   Item is inner pattern.
6341  */
6342 static void
6343 flow_dv_translate_item_icmp(void *matcher, void *key,
6344                             const struct rte_flow_item *item,
6345                             int inner)
6346 {
6347         const struct rte_flow_item_icmp *icmp_m = item->mask;
6348         const struct rte_flow_item_icmp *icmp_v = item->spec;
6349         void *headers_m;
6350         void *headers_v;
6351         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6352                                      misc_parameters_3);
6353         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6354         if (inner) {
6355                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6356                                          inner_headers);
6357                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6358         } else {
6359                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6360                                          outer_headers);
6361                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6362         }
6363         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6364         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6365         if (!icmp_v)
6366                 return;
6367         if (!icmp_m)
6368                 icmp_m = &rte_flow_item_icmp_mask;
6369         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6370                  icmp_m->hdr.icmp_type);
6371         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6372                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6373         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6374                  icmp_m->hdr.icmp_code);
6375         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6376                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6377 }
6378
6379 /**
6380  * Add GTP item to matcher and to the value.
6381  *
6382  * @param[in, out] matcher
6383  *   Flow matcher.
6384  * @param[in, out] key
6385  *   Flow matcher value.
6386  * @param[in] item
6387  *   Flow pattern to translate.
6388  * @param[in] inner
6389  *   Item is inner pattern.
6390  */
6391 static void
6392 flow_dv_translate_item_gtp(void *matcher, void *key,
6393                            const struct rte_flow_item *item, int inner)
6394 {
6395         const struct rte_flow_item_gtp *gtp_m = item->mask;
6396         const struct rte_flow_item_gtp *gtp_v = item->spec;
6397         void *headers_m;
6398         void *headers_v;
6399         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6400                                      misc_parameters_3);
6401         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6402         uint16_t dport = RTE_GTPU_UDP_PORT;
6403
6404         if (inner) {
6405                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6406                                          inner_headers);
6407                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6408         } else {
6409                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6410                                          outer_headers);
6411                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6412         }
6413         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6414                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6415                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6416         }
6417         if (!gtp_v)
6418                 return;
6419         if (!gtp_m)
6420                 gtp_m = &rte_flow_item_gtp_mask;
6421         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6422         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6423                  gtp_v->msg_type & gtp_m->msg_type);
6424         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6425                  rte_be_to_cpu_32(gtp_m->teid));
6426         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6427                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6428 }
6429
6430 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6431
6432 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6433         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6434                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6435
6436 /**
6437  * Calculate flow matcher enable bitmap.
6438  *
6439  * @param match_criteria
6440  *   Pointer to flow matcher criteria.
6441  *
6442  * @return
6443  *   Bitmap of enabled fields.
6444  */
6445 static uint8_t
6446 flow_dv_matcher_enable(uint32_t *match_criteria)
6447 {
6448         uint8_t match_criteria_enable;
6449
6450         match_criteria_enable =
6451                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6452                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6453         match_criteria_enable |=
6454                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6455                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6456         match_criteria_enable |=
6457                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6458                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6459         match_criteria_enable |=
6460                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6461                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6462         match_criteria_enable |=
6463                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6464                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6465         return match_criteria_enable;
6466 }
6467
6468
6469 /**
6470  * Get a flow table.
6471  *
6472  * @param[in, out] dev
6473  *   Pointer to rte_eth_dev structure.
6474  * @param[in] table_id
6475  *   Table id to use.
6476  * @param[in] egress
6477  *   Direction of the table.
6478  * @param[in] transfer
6479  *   E-Switch or NIC flow.
6480  * @param[out] error
6481  *   pointer to error structure.
6482  *
6483  * @return
6484  *   Returns tables resource based on the index, NULL in case of failed.
6485  */
6486 static struct mlx5_flow_tbl_resource *
6487 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6488                          uint32_t table_id, uint8_t egress,
6489                          uint8_t transfer,
6490                          struct rte_flow_error *error)
6491 {
6492         struct mlx5_priv *priv = dev->data->dev_private;
6493         struct mlx5_ibv_shared *sh = priv->sh;
6494         struct mlx5_flow_tbl_resource *tbl;
6495         union mlx5_flow_tbl_key table_key = {
6496                 {
6497                         .table_id = table_id,
6498                         .reserved = 0,
6499                         .domain = !!transfer,
6500                         .direction = !!egress,
6501                 }
6502         };
6503         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6504                                                          table_key.v64);
6505         struct mlx5_flow_tbl_data_entry *tbl_data;
6506         int ret;
6507         void *domain;
6508
6509         if (pos) {
6510                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6511                                         entry);
6512                 tbl = &tbl_data->tbl;
6513                 rte_atomic32_inc(&tbl->refcnt);
6514                 return tbl;
6515         }
6516         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6517         if (!tbl_data) {
6518                 rte_flow_error_set(error, ENOMEM,
6519                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6520                                    NULL,
6521                                    "cannot allocate flow table data entry");
6522                 return NULL;
6523         }
6524         tbl = &tbl_data->tbl;
6525         pos = &tbl_data->entry;
6526         if (transfer)
6527                 domain = sh->fdb_domain;
6528         else if (egress)
6529                 domain = sh->tx_domain;
6530         else
6531                 domain = sh->rx_domain;
6532         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6533         if (!tbl->obj) {
6534                 rte_flow_error_set(error, ENOMEM,
6535                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6536                                    NULL, "cannot create flow table object");
6537                 rte_free(tbl_data);
6538                 return NULL;
6539         }
6540         /*
6541          * No multi-threads now, but still better to initialize the reference
6542          * count before insert it into the hash list.
6543          */
6544         rte_atomic32_init(&tbl->refcnt);
6545         /* Jump action reference count is initialized here. */
6546         rte_atomic32_init(&tbl_data->jump.refcnt);
6547         pos->key = table_key.v64;
6548         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6549         if (ret < 0) {
6550                 rte_flow_error_set(error, -ret,
6551                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6552                                    "cannot insert flow table data entry");
6553                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6554                 rte_free(tbl_data);
6555         }
6556         rte_atomic32_inc(&tbl->refcnt);
6557         return tbl;
6558 }
6559
6560 /**
6561  * Release a flow table.
6562  *
6563  * @param[in] dev
6564  *   Pointer to rte_eth_dev structure.
6565  * @param[in] tbl
6566  *   Table resource to be released.
6567  *
6568  * @return
6569  *   Returns 0 if table was released, else return 1;
6570  */
6571 static int
6572 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6573                              struct mlx5_flow_tbl_resource *tbl)
6574 {
6575         struct mlx5_priv *priv = dev->data->dev_private;
6576         struct mlx5_ibv_shared *sh = priv->sh;
6577         struct mlx5_flow_tbl_data_entry *tbl_data =
6578                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6579
6580         if (!tbl)
6581                 return 0;
6582         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6583                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6584
6585                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6586                 tbl->obj = NULL;
6587                 /* remove the entry from the hash list and free memory. */
6588                 mlx5_hlist_remove(sh->flow_tbls, pos);
6589                 rte_free(tbl_data);
6590                 return 0;
6591         }
6592         return 1;
6593 }
6594
6595 /**
6596  * Register the flow matcher.
6597  *
6598  * @param[in, out] dev
6599  *   Pointer to rte_eth_dev structure.
6600  * @param[in, out] matcher
6601  *   Pointer to flow matcher.
6602  * @param[in, out] key
6603  *   Pointer to flow table key.
6604  * @parm[in, out] dev_flow
6605  *   Pointer to the dev_flow.
6606  * @param[out] error
6607  *   pointer to error structure.
6608  *
6609  * @return
6610  *   0 on success otherwise -errno and errno is set.
6611  */
6612 static int
6613 flow_dv_matcher_register(struct rte_eth_dev *dev,
6614                          struct mlx5_flow_dv_matcher *matcher,
6615                          union mlx5_flow_tbl_key *key,
6616                          struct mlx5_flow *dev_flow,
6617                          struct rte_flow_error *error)
6618 {
6619         struct mlx5_priv *priv = dev->data->dev_private;
6620         struct mlx5_ibv_shared *sh = priv->sh;
6621         struct mlx5_flow_dv_matcher *cache_matcher;
6622         struct mlx5dv_flow_matcher_attr dv_attr = {
6623                 .type = IBV_FLOW_ATTR_NORMAL,
6624                 .match_mask = (void *)&matcher->mask,
6625         };
6626         struct mlx5_flow_tbl_resource *tbl;
6627         struct mlx5_flow_tbl_data_entry *tbl_data;
6628
6629         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6630                                        key->domain, error);
6631         if (!tbl)
6632                 return -rte_errno;      /* No need to refill the error info */
6633         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6634         /* Lookup from cache. */
6635         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6636                 if (matcher->crc == cache_matcher->crc &&
6637                     matcher->priority == cache_matcher->priority &&
6638                     !memcmp((const void *)matcher->mask.buf,
6639                             (const void *)cache_matcher->mask.buf,
6640                             cache_matcher->mask.size)) {
6641                         DRV_LOG(DEBUG,
6642                                 "%s group %u priority %hd use %s "
6643                                 "matcher %p: refcnt %d++",
6644                                 key->domain ? "FDB" : "NIC", key->table_id,
6645                                 cache_matcher->priority,
6646                                 key->direction ? "tx" : "rx",
6647                                 (void *)cache_matcher,
6648                                 rte_atomic32_read(&cache_matcher->refcnt));
6649                         rte_atomic32_inc(&cache_matcher->refcnt);
6650                         dev_flow->dv.matcher = cache_matcher;
6651                         /* old matcher should not make the table ref++. */
6652                         flow_dv_tbl_resource_release(dev, tbl);
6653                         return 0;
6654                 }
6655         }
6656         /* Register new matcher. */
6657         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6658         if (!cache_matcher) {
6659                 flow_dv_tbl_resource_release(dev, tbl);
6660                 return rte_flow_error_set(error, ENOMEM,
6661                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6662                                           "cannot allocate matcher memory");
6663         }
6664         *cache_matcher = *matcher;
6665         dv_attr.match_criteria_enable =
6666                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6667         dv_attr.priority = matcher->priority;
6668         if (key->direction)
6669                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6670         cache_matcher->matcher_object =
6671                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6672         if (!cache_matcher->matcher_object) {
6673                 rte_free(cache_matcher);
6674 #ifdef HAVE_MLX5DV_DR
6675                 flow_dv_tbl_resource_release(dev, tbl);
6676 #endif
6677                 return rte_flow_error_set(error, ENOMEM,
6678                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6679                                           NULL, "cannot create matcher");
6680         }
6681         /* Save the table information */
6682         cache_matcher->tbl = tbl;
6683         rte_atomic32_init(&cache_matcher->refcnt);
6684         /* only matcher ref++, table ref++ already done above in get API. */
6685         rte_atomic32_inc(&cache_matcher->refcnt);
6686         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6687         dev_flow->dv.matcher = cache_matcher;
6688         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6689                 key->domain ? "FDB" : "NIC", key->table_id,
6690                 cache_matcher->priority,
6691                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6692                 rte_atomic32_read(&cache_matcher->refcnt));
6693         return 0;
6694 }
6695
6696 /**
6697  * Find existing tag resource or create and register a new one.
6698  *
6699  * @param dev[in, out]
6700  *   Pointer to rte_eth_dev structure.
6701  * @param[in, out] tag_be24
6702  *   Tag value in big endian then R-shift 8.
6703  * @parm[in, out] dev_flow
6704  *   Pointer to the dev_flow.
6705  * @param[out] error
6706  *   pointer to error structure.
6707  *
6708  * @return
6709  *   0 on success otherwise -errno and errno is set.
6710  */
6711 static int
6712 flow_dv_tag_resource_register
6713                         (struct rte_eth_dev *dev,
6714                          uint32_t tag_be24,
6715                          struct mlx5_flow *dev_flow,
6716                          struct rte_flow_error *error)
6717 {
6718         struct mlx5_priv *priv = dev->data->dev_private;
6719         struct mlx5_ibv_shared *sh = priv->sh;
6720         struct mlx5_flow_dv_tag_resource *cache_resource;
6721         struct mlx5_hlist_entry *entry;
6722
6723         /* Lookup a matching resource from cache. */
6724         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6725         if (entry) {
6726                 cache_resource = container_of
6727                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6728                 rte_atomic32_inc(&cache_resource->refcnt);
6729                 dev_flow->dv.tag_resource = cache_resource;
6730                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6731                         (void *)cache_resource,
6732                         rte_atomic32_read(&cache_resource->refcnt));
6733                 return 0;
6734         }
6735         /* Register new resource. */
6736         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6737         if (!cache_resource)
6738                 return rte_flow_error_set(error, ENOMEM,
6739                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6740                                           "cannot allocate resource memory");
6741         cache_resource->entry.key = (uint64_t)tag_be24;
6742         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6743         if (!cache_resource->action) {
6744                 rte_free(cache_resource);
6745                 return rte_flow_error_set(error, ENOMEM,
6746                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6747                                           NULL, "cannot create action");
6748         }
6749         rte_atomic32_init(&cache_resource->refcnt);
6750         rte_atomic32_inc(&cache_resource->refcnt);
6751         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6752                 mlx5_glue->destroy_flow_action(cache_resource->action);
6753                 rte_free(cache_resource);
6754                 return rte_flow_error_set(error, EEXIST,
6755                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6756                                           NULL, "cannot insert tag");
6757         }
6758         dev_flow->dv.tag_resource = cache_resource;
6759         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6760                 (void *)cache_resource,
6761                 rte_atomic32_read(&cache_resource->refcnt));
6762         return 0;
6763 }
6764
6765 /**
6766  * Release the tag.
6767  *
6768  * @param dev
6769  *   Pointer to Ethernet device.
6770  * @param flow
6771  *   Pointer to mlx5_flow.
6772  *
6773  * @return
6774  *   1 while a reference on it exists, 0 when freed.
6775  */
6776 static int
6777 flow_dv_tag_release(struct rte_eth_dev *dev,
6778                     struct mlx5_flow_dv_tag_resource *tag)
6779 {
6780         struct mlx5_priv *priv = dev->data->dev_private;
6781         struct mlx5_ibv_shared *sh = priv->sh;
6782
6783         assert(tag);
6784         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6785                 dev->data->port_id, (void *)tag,
6786                 rte_atomic32_read(&tag->refcnt));
6787         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6788                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6789                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6790                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6791                         dev->data->port_id, (void *)tag);
6792                 rte_free(tag);
6793                 return 0;
6794         }
6795         return 1;
6796 }
6797
6798 /**
6799  * Translate port ID action to vport.
6800  *
6801  * @param[in] dev
6802  *   Pointer to rte_eth_dev structure.
6803  * @param[in] action
6804  *   Pointer to the port ID action.
6805  * @param[out] dst_port_id
6806  *   The target port ID.
6807  * @param[out] error
6808  *   Pointer to the error structure.
6809  *
6810  * @return
6811  *   0 on success, a negative errno value otherwise and rte_errno is set.
6812  */
6813 static int
6814 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6815                                  const struct rte_flow_action *action,
6816                                  uint32_t *dst_port_id,
6817                                  struct rte_flow_error *error)
6818 {
6819         uint32_t port;
6820         struct mlx5_priv *priv;
6821         const struct rte_flow_action_port_id *conf =
6822                         (const struct rte_flow_action_port_id *)action->conf;
6823
6824         port = conf->original ? dev->data->port_id : conf->id;
6825         priv = mlx5_port_to_eswitch_info(port, false);
6826         if (!priv)
6827                 return rte_flow_error_set(error, -rte_errno,
6828                                           RTE_FLOW_ERROR_TYPE_ACTION,
6829                                           NULL,
6830                                           "No eswitch info was found for port");
6831 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6832         /*
6833          * This parameter is transferred to
6834          * mlx5dv_dr_action_create_dest_ib_port().
6835          */
6836         *dst_port_id = priv->ibv_port;
6837 #else
6838         /*
6839          * Legacy mode, no LAG configurations is supported.
6840          * This parameter is transferred to
6841          * mlx5dv_dr_action_create_dest_vport().
6842          */
6843         *dst_port_id = priv->vport_id;
6844 #endif
6845         return 0;
6846 }
6847
6848 /**
6849  * Add Tx queue matcher
6850  *
6851  * @param[in] dev
6852  *   Pointer to the dev struct.
6853  * @param[in, out] matcher
6854  *   Flow matcher.
6855  * @param[in, out] key
6856  *   Flow matcher value.
6857  * @param[in] item
6858  *   Flow pattern to translate.
6859  * @param[in] inner
6860  *   Item is inner pattern.
6861  */
6862 static void
6863 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6864                                 void *matcher, void *key,
6865                                 const struct rte_flow_item *item)
6866 {
6867         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6868         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6869         void *misc_m =
6870                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6871         void *misc_v =
6872                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6873         struct mlx5_txq_ctrl *txq;
6874         uint32_t queue;
6875
6876
6877         queue_m = (const void *)item->mask;
6878         if (!queue_m)
6879                 return;
6880         queue_v = (const void *)item->spec;
6881         if (!queue_v)
6882                 return;
6883         txq = mlx5_txq_get(dev, queue_v->queue);
6884         if (!txq)
6885                 return;
6886         queue = txq->obj->sq->id;
6887         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6888         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6889                  queue & queue_m->queue);
6890         mlx5_txq_release(dev, queue_v->queue);
6891 }
6892
6893 /**
6894  * Set the hash fields according to the @p flow information.
6895  *
6896  * @param[in] dev_flow
6897  *   Pointer to the mlx5_flow.
6898  */
6899 static void
6900 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6901 {
6902         struct rte_flow *flow = dev_flow->flow;
6903         uint64_t items = dev_flow->layers;
6904         int rss_inner = 0;
6905         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6906
6907         dev_flow->hash_fields = 0;
6908 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6909         if (flow->rss.level >= 2) {
6910                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6911                 rss_inner = 1;
6912         }
6913 #endif
6914         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6915             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6916                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6917                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6918                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6919                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6920                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6921                         else
6922                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6923                 }
6924         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6925                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6926                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6927                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6928                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
6929                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6930                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
6931                         else
6932                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
6933                 }
6934         }
6935         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
6936             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
6937                 if (rss_types & ETH_RSS_UDP) {
6938                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6939                                 dev_flow->hash_fields |=
6940                                                 IBV_RX_HASH_SRC_PORT_UDP;
6941                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6942                                 dev_flow->hash_fields |=
6943                                                 IBV_RX_HASH_DST_PORT_UDP;
6944                         else
6945                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
6946                 }
6947         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
6948                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
6949                 if (rss_types & ETH_RSS_TCP) {
6950                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6951                                 dev_flow->hash_fields |=
6952                                                 IBV_RX_HASH_SRC_PORT_TCP;
6953                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6954                                 dev_flow->hash_fields |=
6955                                                 IBV_RX_HASH_DST_PORT_TCP;
6956                         else
6957                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
6958                 }
6959         }
6960 }
6961
6962 /**
6963  * Fill the flow with DV spec, lock free
6964  * (mutex should be acquired by caller).
6965  *
6966  * @param[in] dev
6967  *   Pointer to rte_eth_dev structure.
6968  * @param[in, out] dev_flow
6969  *   Pointer to the sub flow.
6970  * @param[in] attr
6971  *   Pointer to the flow attributes.
6972  * @param[in] items
6973  *   Pointer to the list of items.
6974  * @param[in] actions
6975  *   Pointer to the list of actions.
6976  * @param[out] error
6977  *   Pointer to the error structure.
6978  *
6979  * @return
6980  *   0 on success, a negative errno value otherwise and rte_errno is set.
6981  */
6982 static int
6983 __flow_dv_translate(struct rte_eth_dev *dev,
6984                     struct mlx5_flow *dev_flow,
6985                     const struct rte_flow_attr *attr,
6986                     const struct rte_flow_item items[],
6987                     const struct rte_flow_action actions[],
6988                     struct rte_flow_error *error)
6989 {
6990         struct mlx5_priv *priv = dev->data->dev_private;
6991         struct mlx5_dev_config *dev_conf = &priv->config;
6992         struct rte_flow *flow = dev_flow->flow;
6993         uint64_t item_flags = 0;
6994         uint64_t last_item = 0;
6995         uint64_t action_flags = 0;
6996         uint64_t priority = attr->priority;
6997         struct mlx5_flow_dv_matcher matcher = {
6998                 .mask = {
6999                         .size = sizeof(matcher.mask.buf),
7000                 },
7001         };
7002         int actions_n = 0;
7003         bool actions_end = false;
7004         union {
7005                 struct mlx5_flow_dv_modify_hdr_resource res;
7006                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7007                             sizeof(struct mlx5_modification_cmd) *
7008                             (MLX5_MAX_MODIFY_NUM + 1)];
7009         } mhdr_dummy;
7010         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7011         union flow_dv_attr flow_attr = { .attr = 0 };
7012         uint32_t tag_be;
7013         union mlx5_flow_tbl_key tbl_key;
7014         uint32_t modify_action_position = UINT32_MAX;
7015         void *match_mask = matcher.mask.buf;
7016         void *match_value = dev_flow->dv.value.buf;
7017         uint8_t next_protocol = 0xff;
7018         struct rte_vlan_hdr vlan = { 0 };
7019         uint32_t table;
7020         int ret = 0;
7021
7022         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7023                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7024         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7025                                        &table, error);
7026         if (ret)
7027                 return ret;
7028         dev_flow->group = table;
7029         if (attr->transfer)
7030                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7031         if (priority == MLX5_FLOW_PRIO_RSVD)
7032                 priority = dev_conf->flow_prio - 1;
7033         /* number of actions must be set to 0 in case of dirty stack. */
7034         mhdr_res->actions_num = 0;
7035         for (; !actions_end ; actions++) {
7036                 const struct rte_flow_action_queue *queue;
7037                 const struct rte_flow_action_rss *rss;
7038                 const struct rte_flow_action *action = actions;
7039                 const struct rte_flow_action_count *count = action->conf;
7040                 const uint8_t *rss_key;
7041                 const struct rte_flow_action_jump *jump_data;
7042                 const struct rte_flow_action_meter *mtr;
7043                 struct mlx5_flow_tbl_resource *tbl;
7044                 uint32_t port_id = 0;
7045                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7046                 int action_type = actions->type;
7047                 const struct rte_flow_action *found_action = NULL;
7048
7049                 switch (action_type) {
7050                 case RTE_FLOW_ACTION_TYPE_VOID:
7051                         break;
7052                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7053                         if (flow_dv_translate_action_port_id(dev, action,
7054                                                              &port_id, error))
7055                                 return -rte_errno;
7056                         port_id_resource.port_id = port_id;
7057                         if (flow_dv_port_id_action_resource_register
7058                             (dev, &port_id_resource, dev_flow, error))
7059                                 return -rte_errno;
7060                         dev_flow->dv.actions[actions_n++] =
7061                                 dev_flow->dv.port_id_action->action;
7062                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7063                         break;
7064                 case RTE_FLOW_ACTION_TYPE_FLAG:
7065                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7066                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7067                                 struct rte_flow_action_mark mark = {
7068                                         .id = MLX5_FLOW_MARK_DEFAULT,
7069                                 };
7070
7071                                 if (flow_dv_convert_action_mark(dev, &mark,
7072                                                                 mhdr_res,
7073                                                                 error))
7074                                         return -rte_errno;
7075                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7076                                 break;
7077                         }
7078                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7079                         if (!dev_flow->dv.tag_resource)
7080                                 if (flow_dv_tag_resource_register
7081                                     (dev, tag_be, dev_flow, error))
7082                                         return -rte_errno;
7083                         dev_flow->dv.actions[actions_n++] =
7084                                 dev_flow->dv.tag_resource->action;
7085                         break;
7086                 case RTE_FLOW_ACTION_TYPE_MARK:
7087                         action_flags |= MLX5_FLOW_ACTION_MARK;
7088                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7089                                 const struct rte_flow_action_mark *mark =
7090                                         (const struct rte_flow_action_mark *)
7091                                                 actions->conf;
7092
7093                                 if (flow_dv_convert_action_mark(dev, mark,
7094                                                                 mhdr_res,
7095                                                                 error))
7096                                         return -rte_errno;
7097                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7098                                 break;
7099                         }
7100                         /* Fall-through */
7101                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7102                         /* Legacy (non-extensive) MARK action. */
7103                         tag_be = mlx5_flow_mark_set
7104                               (((const struct rte_flow_action_mark *)
7105                                (actions->conf))->id);
7106                         if (!dev_flow->dv.tag_resource)
7107                                 if (flow_dv_tag_resource_register
7108                                     (dev, tag_be, dev_flow, error))
7109                                         return -rte_errno;
7110                         dev_flow->dv.actions[actions_n++] =
7111                                 dev_flow->dv.tag_resource->action;
7112                         break;
7113                 case RTE_FLOW_ACTION_TYPE_SET_META:
7114                         if (flow_dv_convert_action_set_meta
7115                                 (dev, mhdr_res, attr,
7116                                  (const struct rte_flow_action_set_meta *)
7117                                   actions->conf, error))
7118                                 return -rte_errno;
7119                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7120                         break;
7121                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7122                         if (flow_dv_convert_action_set_tag
7123                                 (dev, mhdr_res,
7124                                  (const struct rte_flow_action_set_tag *)
7125                                   actions->conf, error))
7126                                 return -rte_errno;
7127                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7128                         break;
7129                 case RTE_FLOW_ACTION_TYPE_DROP:
7130                         action_flags |= MLX5_FLOW_ACTION_DROP;
7131                         break;
7132                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7133                         assert(flow->rss.queue);
7134                         queue = actions->conf;
7135                         flow->rss.queue_num = 1;
7136                         (*flow->rss.queue)[0] = queue->index;
7137                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7138                         break;
7139                 case RTE_FLOW_ACTION_TYPE_RSS:
7140                         assert(flow->rss.queue);
7141                         rss = actions->conf;
7142                         if (flow->rss.queue)
7143                                 memcpy((*flow->rss.queue), rss->queue,
7144                                        rss->queue_num * sizeof(uint16_t));
7145                         flow->rss.queue_num = rss->queue_num;
7146                         /* NULL RSS key indicates default RSS key. */
7147                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7148                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7149                         /*
7150                          * rss->level and rss.types should be set in advance
7151                          * when expanding items for RSS.
7152                          */
7153                         action_flags |= MLX5_FLOW_ACTION_RSS;
7154                         break;
7155                 case RTE_FLOW_ACTION_TYPE_COUNT:
7156                         if (!dev_conf->devx) {
7157                                 rte_errno = ENOTSUP;
7158                                 goto cnt_err;
7159                         }
7160                         flow->counter = flow_dv_counter_alloc(dev,
7161                                                               count->shared,
7162                                                               count->id,
7163                                                               dev_flow->group);
7164                         if (flow->counter == NULL)
7165                                 goto cnt_err;
7166                         dev_flow->dv.actions[actions_n++] =
7167                                 flow->counter->action;
7168                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7169                         break;
7170 cnt_err:
7171                         if (rte_errno == ENOTSUP)
7172                                 return rte_flow_error_set
7173                                               (error, ENOTSUP,
7174                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7175                                                NULL,
7176                                                "count action not supported");
7177                         else
7178                                 return rte_flow_error_set
7179                                                 (error, rte_errno,
7180                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7181                                                  action,
7182                                                  "cannot create counter"
7183                                                   " object.");
7184                         break;
7185                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7186                         dev_flow->dv.actions[actions_n++] =
7187                                                 priv->sh->pop_vlan_action;
7188                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7189                         break;
7190                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7191                         flow_dev_get_vlan_info_from_items(items, &vlan);
7192                         vlan.eth_proto = rte_be_to_cpu_16
7193                              ((((const struct rte_flow_action_of_push_vlan *)
7194                                                    actions->conf)->ethertype));
7195                         found_action = mlx5_flow_find_action
7196                                         (actions + 1,
7197                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7198                         if (found_action)
7199                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7200                         found_action = mlx5_flow_find_action
7201                                         (actions + 1,
7202                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7203                         if (found_action)
7204                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7205                         if (flow_dv_create_action_push_vlan
7206                                             (dev, attr, &vlan, dev_flow, error))
7207                                 return -rte_errno;
7208                         dev_flow->dv.actions[actions_n++] =
7209                                            dev_flow->dv.push_vlan_res->action;
7210                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7211                         break;
7212                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7213                         /* of_vlan_push action handled this action */
7214                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7215                         break;
7216                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7217                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7218                                 break;
7219                         flow_dev_get_vlan_info_from_items(items, &vlan);
7220                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7221                         /* If no VLAN push - this is a modify header action */
7222                         if (flow_dv_convert_action_modify_vlan_vid
7223                                                 (mhdr_res, actions, error))
7224                                 return -rte_errno;
7225                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7226                         break;
7227                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7228                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7229                         if (flow_dv_create_action_l2_encap(dev, actions,
7230                                                            dev_flow,
7231                                                            attr->transfer,
7232                                                            error))
7233                                 return -rte_errno;
7234                         dev_flow->dv.actions[actions_n++] =
7235                                 dev_flow->dv.encap_decap->verbs_action;
7236                         action_flags |= actions->type ==
7237                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
7238                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
7239                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
7240                         break;
7241                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7242                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7243                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7244                                                            attr->transfer,
7245                                                            error))
7246                                 return -rte_errno;
7247                         dev_flow->dv.actions[actions_n++] =
7248                                 dev_flow->dv.encap_decap->verbs_action;
7249                         action_flags |= actions->type ==
7250                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
7251                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
7252                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
7253                         break;
7254                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7255                         /* Handle encap with preceding decap. */
7256                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
7257                                 if (flow_dv_create_action_raw_encap
7258                                         (dev, actions, dev_flow, attr, error))
7259                                         return -rte_errno;
7260                                 dev_flow->dv.actions[actions_n++] =
7261                                         dev_flow->dv.encap_decap->verbs_action;
7262                         } else {
7263                                 /* Handle encap without preceding decap. */
7264                                 if (flow_dv_create_action_l2_encap
7265                                     (dev, actions, dev_flow, attr->transfer,
7266                                      error))
7267                                         return -rte_errno;
7268                                 dev_flow->dv.actions[actions_n++] =
7269                                         dev_flow->dv.encap_decap->verbs_action;
7270                         }
7271                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
7272                         break;
7273                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7274                         /* Check if this decap is followed by encap. */
7275                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
7276                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
7277                                action++) {
7278                         }
7279                         /* Handle decap only if it isn't followed by encap. */
7280                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7281                                 if (flow_dv_create_action_l2_decap
7282                                     (dev, dev_flow, attr->transfer, error))
7283                                         return -rte_errno;
7284                                 dev_flow->dv.actions[actions_n++] =
7285                                         dev_flow->dv.encap_decap->verbs_action;
7286                         }
7287                         /* If decap is followed by encap, handle it at encap. */
7288                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
7289                         break;
7290                 case RTE_FLOW_ACTION_TYPE_JUMP:
7291                         jump_data = action->conf;
7292                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7293                                                        jump_data->group, &table,
7294                                                        error);
7295                         if (ret)
7296                                 return ret;
7297                         tbl = flow_dv_tbl_resource_get(dev, table,
7298                                                        attr->egress,
7299                                                        attr->transfer, error);
7300                         if (!tbl)
7301                                 return rte_flow_error_set
7302                                                 (error, errno,
7303                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7304                                                  NULL,
7305                                                  "cannot create jump action.");
7306                         if (flow_dv_jump_tbl_resource_register
7307                             (dev, tbl, dev_flow, error)) {
7308                                 flow_dv_tbl_resource_release(dev, tbl);
7309                                 return rte_flow_error_set
7310                                                 (error, errno,
7311                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7312                                                  NULL,
7313                                                  "cannot create jump action.");
7314                         }
7315                         dev_flow->dv.actions[actions_n++] =
7316                                 dev_flow->dv.jump->action;
7317                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7318                         break;
7319                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7320                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7321                         if (flow_dv_convert_action_modify_mac
7322                                         (mhdr_res, actions, error))
7323                                 return -rte_errno;
7324                         action_flags |= actions->type ==
7325                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7326                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7327                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7328                         break;
7329                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7330                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7331                         if (flow_dv_convert_action_modify_ipv4
7332                                         (mhdr_res, actions, error))
7333                                 return -rte_errno;
7334                         action_flags |= actions->type ==
7335                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7336                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7337                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7338                         break;
7339                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7340                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7341                         if (flow_dv_convert_action_modify_ipv6
7342                                         (mhdr_res, actions, error))
7343                                 return -rte_errno;
7344                         action_flags |= actions->type ==
7345                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7346                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7347                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7348                         break;
7349                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7350                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7351                         if (flow_dv_convert_action_modify_tp
7352                                         (mhdr_res, actions, items,
7353                                          &flow_attr, error))
7354                                 return -rte_errno;
7355                         action_flags |= actions->type ==
7356                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7357                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7358                                         MLX5_FLOW_ACTION_SET_TP_DST;
7359                         break;
7360                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7361                         if (flow_dv_convert_action_modify_dec_ttl
7362                                         (mhdr_res, items, &flow_attr, error))
7363                                 return -rte_errno;
7364                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7365                         break;
7366                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7367                         if (flow_dv_convert_action_modify_ttl
7368                                         (mhdr_res, actions, items,
7369                                          &flow_attr, error))
7370                                 return -rte_errno;
7371                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7372                         break;
7373                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7374                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7375                         if (flow_dv_convert_action_modify_tcp_seq
7376                                         (mhdr_res, actions, error))
7377                                 return -rte_errno;
7378                         action_flags |= actions->type ==
7379                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7380                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7381                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7382                         break;
7383
7384                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7385                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7386                         if (flow_dv_convert_action_modify_tcp_ack
7387                                         (mhdr_res, actions, error))
7388                                 return -rte_errno;
7389                         action_flags |= actions->type ==
7390                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7391                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7392                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7393                         break;
7394                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7395                         if (flow_dv_convert_action_set_reg
7396                                         (mhdr_res, actions, error))
7397                                 return -rte_errno;
7398                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7399                         break;
7400                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7401                         if (flow_dv_convert_action_copy_mreg
7402                                         (dev, mhdr_res, actions, error))
7403                                 return -rte_errno;
7404                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7405                         break;
7406                 case RTE_FLOW_ACTION_TYPE_METER:
7407                         mtr = actions->conf;
7408                         if (!flow->meter) {
7409                                 flow->meter = mlx5_flow_meter_attach(priv,
7410                                                         mtr->mtr_id, attr,
7411                                                         error);
7412                                 if (!flow->meter)
7413                                         return rte_flow_error_set(error,
7414                                                 rte_errno,
7415                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7416                                                 NULL,
7417                                                 "meter not found "
7418                                                 "or invalid parameters");
7419                         }
7420                         /* Set the meter action. */
7421                         dev_flow->dv.actions[actions_n++] =
7422                                 flow->meter->mfts->meter_action;
7423                         action_flags |= MLX5_FLOW_ACTION_METER;
7424                         break;
7425                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7426                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7427                                                               actions, error))
7428                                 return -rte_errno;
7429                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7430                         break;
7431                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7432                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7433                                                               actions, error))
7434                                 return -rte_errno;
7435                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7436                         break;
7437                 case RTE_FLOW_ACTION_TYPE_END:
7438                         actions_end = true;
7439                         if (mhdr_res->actions_num) {
7440                                 /* create modify action if needed. */
7441                                 if (flow_dv_modify_hdr_resource_register
7442                                         (dev, mhdr_res, dev_flow, error))
7443                                         return -rte_errno;
7444                                 dev_flow->dv.actions[modify_action_position] =
7445                                         dev_flow->dv.modify_hdr->verbs_action;
7446                         }
7447                         break;
7448                 default:
7449                         break;
7450                 }
7451                 if (mhdr_res->actions_num &&
7452                     modify_action_position == UINT32_MAX)
7453                         modify_action_position = actions_n++;
7454         }
7455         dev_flow->dv.actions_n = actions_n;
7456         dev_flow->actions = action_flags;
7457         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7458                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7459                 int item_type = items->type;
7460
7461                 switch (item_type) {
7462                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7463                         flow_dv_translate_item_port_id(dev, match_mask,
7464                                                        match_value, items);
7465                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7466                         break;
7467                 case RTE_FLOW_ITEM_TYPE_ETH:
7468                         flow_dv_translate_item_eth(match_mask, match_value,
7469                                                    items, tunnel);
7470                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7471                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7472                                              MLX5_FLOW_LAYER_OUTER_L2;
7473                         break;
7474                 case RTE_FLOW_ITEM_TYPE_VLAN:
7475                         flow_dv_translate_item_vlan(dev_flow,
7476                                                     match_mask, match_value,
7477                                                     items, tunnel);
7478                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7479                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7480                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7481                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7482                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7483                         break;
7484                 case RTE_FLOW_ITEM_TYPE_IPV4:
7485                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7486                                                   &item_flags, &tunnel);
7487                         flow_dv_translate_item_ipv4(match_mask, match_value,
7488                                                     items, tunnel,
7489                                                     dev_flow->group);
7490                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7491                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7492                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7493                         if (items->mask != NULL &&
7494                             ((const struct rte_flow_item_ipv4 *)
7495                              items->mask)->hdr.next_proto_id) {
7496                                 next_protocol =
7497                                         ((const struct rte_flow_item_ipv4 *)
7498                                          (items->spec))->hdr.next_proto_id;
7499                                 next_protocol &=
7500                                         ((const struct rte_flow_item_ipv4 *)
7501                                          (items->mask))->hdr.next_proto_id;
7502                         } else {
7503                                 /* Reset for inner layer. */
7504                                 next_protocol = 0xff;
7505                         }
7506                         break;
7507                 case RTE_FLOW_ITEM_TYPE_IPV6:
7508                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7509                                                   &item_flags, &tunnel);
7510                         flow_dv_translate_item_ipv6(match_mask, match_value,
7511                                                     items, tunnel,
7512                                                     dev_flow->group);
7513                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7514                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7515                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7516                         if (items->mask != NULL &&
7517                             ((const struct rte_flow_item_ipv6 *)
7518                              items->mask)->hdr.proto) {
7519                                 next_protocol =
7520                                         ((const struct rte_flow_item_ipv6 *)
7521                                          items->spec)->hdr.proto;
7522                                 next_protocol &=
7523                                         ((const struct rte_flow_item_ipv6 *)
7524                                          items->mask)->hdr.proto;
7525                         } else {
7526                                 /* Reset for inner layer. */
7527                                 next_protocol = 0xff;
7528                         }
7529                         break;
7530                 case RTE_FLOW_ITEM_TYPE_TCP:
7531                         flow_dv_translate_item_tcp(match_mask, match_value,
7532                                                    items, tunnel);
7533                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7534                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7535                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7536                         break;
7537                 case RTE_FLOW_ITEM_TYPE_UDP:
7538                         flow_dv_translate_item_udp(match_mask, match_value,
7539                                                    items, tunnel);
7540                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7541                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7542                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7543                         break;
7544                 case RTE_FLOW_ITEM_TYPE_GRE:
7545                         flow_dv_translate_item_gre(match_mask, match_value,
7546                                                    items, tunnel);
7547                         last_item = MLX5_FLOW_LAYER_GRE;
7548                         break;
7549                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7550                         flow_dv_translate_item_gre_key(match_mask,
7551                                                        match_value, items);
7552                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7553                         break;
7554                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7555                         flow_dv_translate_item_nvgre(match_mask, match_value,
7556                                                      items, tunnel);
7557                         last_item = MLX5_FLOW_LAYER_GRE;
7558                         break;
7559                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7560                         flow_dv_translate_item_vxlan(match_mask, match_value,
7561                                                      items, tunnel);
7562                         last_item = MLX5_FLOW_LAYER_VXLAN;
7563                         break;
7564                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7565                         flow_dv_translate_item_vxlan(match_mask, match_value,
7566                                                      items, tunnel);
7567                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7568                         break;
7569                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7570                         flow_dv_translate_item_geneve(match_mask, match_value,
7571                                                       items, tunnel);
7572                         last_item = MLX5_FLOW_LAYER_GENEVE;
7573                         break;
7574                 case RTE_FLOW_ITEM_TYPE_MPLS:
7575                         flow_dv_translate_item_mpls(match_mask, match_value,
7576                                                     items, last_item, tunnel);
7577                         last_item = MLX5_FLOW_LAYER_MPLS;
7578                         break;
7579                 case RTE_FLOW_ITEM_TYPE_MARK:
7580                         flow_dv_translate_item_mark(dev, match_mask,
7581                                                     match_value, items);
7582                         last_item = MLX5_FLOW_ITEM_MARK;
7583                         break;
7584                 case RTE_FLOW_ITEM_TYPE_META:
7585                         flow_dv_translate_item_meta(dev, match_mask,
7586                                                     match_value, attr, items);
7587                         last_item = MLX5_FLOW_ITEM_METADATA;
7588                         break;
7589                 case RTE_FLOW_ITEM_TYPE_ICMP:
7590                         flow_dv_translate_item_icmp(match_mask, match_value,
7591                                                     items, tunnel);
7592                         last_item = MLX5_FLOW_LAYER_ICMP;
7593                         break;
7594                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7595                         flow_dv_translate_item_icmp6(match_mask, match_value,
7596                                                       items, tunnel);
7597                         last_item = MLX5_FLOW_LAYER_ICMP6;
7598                         break;
7599                 case RTE_FLOW_ITEM_TYPE_TAG:
7600                         flow_dv_translate_item_tag(dev, match_mask,
7601                                                    match_value, items);
7602                         last_item = MLX5_FLOW_ITEM_TAG;
7603                         break;
7604                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7605                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7606                                                         match_value, items);
7607                         last_item = MLX5_FLOW_ITEM_TAG;
7608                         break;
7609                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7610                         flow_dv_translate_item_tx_queue(dev, match_mask,
7611                                                         match_value,
7612                                                         items);
7613                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7614                         break;
7615                 case RTE_FLOW_ITEM_TYPE_GTP:
7616                         flow_dv_translate_item_gtp(match_mask, match_value,
7617                                                    items, tunnel);
7618                         last_item = MLX5_FLOW_LAYER_GTP;
7619                         break;
7620                 default:
7621                         break;
7622                 }
7623                 item_flags |= last_item;
7624         }
7625         /*
7626          * In case of ingress traffic when E-Switch mode is enabled,
7627          * we have two cases where we need to set the source port manually.
7628          * The first one, is in case of Nic steering rule, and the second is
7629          * E-Switch rule where no port_id item was found. In both cases
7630          * the source port is set according the current port in use.
7631          */
7632         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7633             (priv->representor || priv->master)) {
7634                 if (flow_dv_translate_item_port_id(dev, match_mask,
7635                                                    match_value, NULL))
7636                         return -rte_errno;
7637         }
7638         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7639                                          dev_flow->dv.value.buf));
7640         dev_flow->layers = item_flags;
7641         if (action_flags & MLX5_FLOW_ACTION_RSS)
7642                 flow_dv_hashfields_set(dev_flow);
7643         /* Register matcher. */
7644         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7645                                     matcher.mask.size);
7646         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7647                                                      matcher.priority);
7648         /* reserved field no needs to be set to 0 here. */
7649         tbl_key.domain = attr->transfer;
7650         tbl_key.direction = attr->egress;
7651         tbl_key.table_id = dev_flow->group;
7652         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7653                 return -rte_errno;
7654         return 0;
7655 }
7656
7657 /**
7658  * Apply the flow to the NIC, lock free,
7659  * (mutex should be acquired by caller).
7660  *
7661  * @param[in] dev
7662  *   Pointer to the Ethernet device structure.
7663  * @param[in, out] flow
7664  *   Pointer to flow structure.
7665  * @param[out] error
7666  *   Pointer to error structure.
7667  *
7668  * @return
7669  *   0 on success, a negative errno value otherwise and rte_errno is set.
7670  */
7671 static int
7672 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7673                 struct rte_flow_error *error)
7674 {
7675         struct mlx5_flow_dv *dv;
7676         struct mlx5_flow *dev_flow;
7677         struct mlx5_priv *priv = dev->data->dev_private;
7678         int n;
7679         int err;
7680
7681         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7682                 dv = &dev_flow->dv;
7683                 n = dv->actions_n;
7684                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7685                         if (dev_flow->transfer) {
7686                                 dv->actions[n++] = priv->sh->esw_drop_action;
7687                         } else {
7688                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7689                                 if (!dv->hrxq) {
7690                                         rte_flow_error_set
7691                                                 (error, errno,
7692                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7693                                                  NULL,
7694                                                  "cannot get drop hash queue");
7695                                         goto error;
7696                                 }
7697                                 dv->actions[n++] = dv->hrxq->action;
7698                         }
7699                 } else if (dev_flow->actions &
7700                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7701                         struct mlx5_hrxq *hrxq;
7702
7703                         assert(flow->rss.queue);
7704                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7705                                              MLX5_RSS_HASH_KEY_LEN,
7706                                              dev_flow->hash_fields,
7707                                              (*flow->rss.queue),
7708                                              flow->rss.queue_num);
7709                         if (!hrxq) {
7710                                 hrxq = mlx5_hrxq_new
7711                                         (dev, flow->rss.key,
7712                                          MLX5_RSS_HASH_KEY_LEN,
7713                                          dev_flow->hash_fields,
7714                                          (*flow->rss.queue),
7715                                          flow->rss.queue_num,
7716                                          !!(dev_flow->layers &
7717                                             MLX5_FLOW_LAYER_TUNNEL));
7718                         }
7719                         if (!hrxq) {
7720                                 rte_flow_error_set
7721                                         (error, rte_errno,
7722                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7723                                          "cannot get hash queue");
7724                                 goto error;
7725                         }
7726                         dv->hrxq = hrxq;
7727                         dv->actions[n++] = dv->hrxq->action;
7728                 }
7729                 dv->flow =
7730                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7731                                                   (void *)&dv->value, n,
7732                                                   dv->actions);
7733                 if (!dv->flow) {
7734                         rte_flow_error_set(error, errno,
7735                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7736                                            NULL,
7737                                            "hardware refuses to create flow");
7738                         goto error;
7739                 }
7740                 if (priv->vmwa_context &&
7741                     dev_flow->dv.vf_vlan.tag &&
7742                     !dev_flow->dv.vf_vlan.created) {
7743                         /*
7744                          * The rule contains the VLAN pattern.
7745                          * For VF we are going to create VLAN
7746                          * interface to make hypervisor set correct
7747                          * e-Switch vport context.
7748                          */
7749                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7750                 }
7751         }
7752         return 0;
7753 error:
7754         err = rte_errno; /* Save rte_errno before cleanup. */
7755         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7756                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7757                 if (dv->hrxq) {
7758                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7759                                 mlx5_hrxq_drop_release(dev);
7760                         else
7761                                 mlx5_hrxq_release(dev, dv->hrxq);
7762                         dv->hrxq = NULL;
7763                 }
7764                 if (dev_flow->dv.vf_vlan.tag &&
7765                     dev_flow->dv.vf_vlan.created)
7766                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7767         }
7768         rte_errno = err; /* Restore rte_errno. */
7769         return -rte_errno;
7770 }
7771
7772 /**
7773  * Release the flow matcher.
7774  *
7775  * @param dev
7776  *   Pointer to Ethernet device.
7777  * @param flow
7778  *   Pointer to mlx5_flow.
7779  *
7780  * @return
7781  *   1 while a reference on it exists, 0 when freed.
7782  */
7783 static int
7784 flow_dv_matcher_release(struct rte_eth_dev *dev,
7785                         struct mlx5_flow *flow)
7786 {
7787         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7788
7789         assert(matcher->matcher_object);
7790         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7791                 dev->data->port_id, (void *)matcher,
7792                 rte_atomic32_read(&matcher->refcnt));
7793         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7794                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7795                            (matcher->matcher_object));
7796                 LIST_REMOVE(matcher, next);
7797                 /* table ref-- in release interface. */
7798                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7799                 rte_free(matcher);
7800                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7801                         dev->data->port_id, (void *)matcher);
7802                 return 0;
7803         }
7804         return 1;
7805 }
7806
7807 /**
7808  * Release an encap/decap resource.
7809  *
7810  * @param flow
7811  *   Pointer to mlx5_flow.
7812  *
7813  * @return
7814  *   1 while a reference on it exists, 0 when freed.
7815  */
7816 static int
7817 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7818 {
7819         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7820                                                 flow->dv.encap_decap;
7821
7822         assert(cache_resource->verbs_action);
7823         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7824                 (void *)cache_resource,
7825                 rte_atomic32_read(&cache_resource->refcnt));
7826         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7827                 claim_zero(mlx5_glue->destroy_flow_action
7828                                 (cache_resource->verbs_action));
7829                 LIST_REMOVE(cache_resource, next);
7830                 rte_free(cache_resource);
7831                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7832                         (void *)cache_resource);
7833                 return 0;
7834         }
7835         return 1;
7836 }
7837
7838 /**
7839  * Release an jump to table action resource.
7840  *
7841  * @param dev
7842  *   Pointer to Ethernet device.
7843  * @param flow
7844  *   Pointer to mlx5_flow.
7845  *
7846  * @return
7847  *   1 while a reference on it exists, 0 when freed.
7848  */
7849 static int
7850 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7851                                   struct mlx5_flow *flow)
7852 {
7853         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7854         struct mlx5_flow_tbl_data_entry *tbl_data =
7855                         container_of(cache_resource,
7856                                      struct mlx5_flow_tbl_data_entry, jump);
7857
7858         assert(cache_resource->action);
7859         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7860                 (void *)cache_resource,
7861                 rte_atomic32_read(&cache_resource->refcnt));
7862         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7863                 claim_zero(mlx5_glue->destroy_flow_action
7864                                 (cache_resource->action));
7865                 /* jump action memory free is inside the table release. */
7866                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7867                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7868                         (void *)cache_resource);
7869                 return 0;
7870         }
7871         return 1;
7872 }
7873
7874 /**
7875  * Release a modify-header resource.
7876  *
7877  * @param flow
7878  *   Pointer to mlx5_flow.
7879  *
7880  * @return
7881  *   1 while a reference on it exists, 0 when freed.
7882  */
7883 static int
7884 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7885 {
7886         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7887                                                 flow->dv.modify_hdr;
7888
7889         assert(cache_resource->verbs_action);
7890         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7891                 (void *)cache_resource,
7892                 rte_atomic32_read(&cache_resource->refcnt));
7893         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7894                 claim_zero(mlx5_glue->destroy_flow_action
7895                                 (cache_resource->verbs_action));
7896                 LIST_REMOVE(cache_resource, next);
7897                 rte_free(cache_resource);
7898                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7899                         (void *)cache_resource);
7900                 return 0;
7901         }
7902         return 1;
7903 }
7904
7905 /**
7906  * Release port ID action resource.
7907  *
7908  * @param flow
7909  *   Pointer to mlx5_flow.
7910  *
7911  * @return
7912  *   1 while a reference on it exists, 0 when freed.
7913  */
7914 static int
7915 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7916 {
7917         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7918                 flow->dv.port_id_action;
7919
7920         assert(cache_resource->action);
7921         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7922                 (void *)cache_resource,
7923                 rte_atomic32_read(&cache_resource->refcnt));
7924         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7925                 claim_zero(mlx5_glue->destroy_flow_action
7926                                 (cache_resource->action));
7927                 LIST_REMOVE(cache_resource, next);
7928                 rte_free(cache_resource);
7929                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7930                         (void *)cache_resource);
7931                 return 0;
7932         }
7933         return 1;
7934 }
7935
7936 /**
7937  * Release push vlan action resource.
7938  *
7939  * @param flow
7940  *   Pointer to mlx5_flow.
7941  *
7942  * @return
7943  *   1 while a reference on it exists, 0 when freed.
7944  */
7945 static int
7946 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7947 {
7948         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7949                 flow->dv.push_vlan_res;
7950
7951         assert(cache_resource->action);
7952         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7953                 (void *)cache_resource,
7954                 rte_atomic32_read(&cache_resource->refcnt));
7955         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7956                 claim_zero(mlx5_glue->destroy_flow_action
7957                                 (cache_resource->action));
7958                 LIST_REMOVE(cache_resource, next);
7959                 rte_free(cache_resource);
7960                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7961                         (void *)cache_resource);
7962                 return 0;
7963         }
7964         return 1;
7965 }
7966
7967 /**
7968  * Remove the flow from the NIC but keeps it in memory.
7969  * Lock free, (mutex should be acquired by caller).
7970  *
7971  * @param[in] dev
7972  *   Pointer to Ethernet device.
7973  * @param[in, out] flow
7974  *   Pointer to flow structure.
7975  */
7976 static void
7977 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7978 {
7979         struct mlx5_flow_dv *dv;
7980         struct mlx5_flow *dev_flow;
7981
7982         if (!flow)
7983                 return;
7984         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7985                 dv = &dev_flow->dv;
7986                 if (dv->flow) {
7987                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7988                         dv->flow = NULL;
7989                 }
7990                 if (dv->hrxq) {
7991                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7992                                 mlx5_hrxq_drop_release(dev);
7993                         else
7994                                 mlx5_hrxq_release(dev, dv->hrxq);
7995                         dv->hrxq = NULL;
7996                 }
7997                 if (dev_flow->dv.vf_vlan.tag &&
7998                     dev_flow->dv.vf_vlan.created)
7999                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8000         }
8001 }
8002
8003 /**
8004  * Remove the flow from the NIC and the memory.
8005  * Lock free, (mutex should be acquired by caller).
8006  *
8007  * @param[in] dev
8008  *   Pointer to the Ethernet device structure.
8009  * @param[in, out] flow
8010  *   Pointer to flow structure.
8011  */
8012 static void
8013 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8014 {
8015         struct mlx5_flow *dev_flow;
8016
8017         if (!flow)
8018                 return;
8019         __flow_dv_remove(dev, flow);
8020         if (flow->counter) {
8021                 flow_dv_counter_release(dev, flow->counter);
8022                 flow->counter = NULL;
8023         }
8024         if (flow->meter) {
8025                 mlx5_flow_meter_detach(flow->meter);
8026                 flow->meter = NULL;
8027         }
8028         while (!LIST_EMPTY(&flow->dev_flows)) {
8029                 dev_flow = LIST_FIRST(&flow->dev_flows);
8030                 LIST_REMOVE(dev_flow, next);
8031                 if (dev_flow->dv.matcher)
8032                         flow_dv_matcher_release(dev, dev_flow);
8033                 if (dev_flow->dv.encap_decap)
8034                         flow_dv_encap_decap_resource_release(dev_flow);
8035                 if (dev_flow->dv.modify_hdr)
8036                         flow_dv_modify_hdr_resource_release(dev_flow);
8037                 if (dev_flow->dv.jump)
8038                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8039                 if (dev_flow->dv.port_id_action)
8040                         flow_dv_port_id_action_resource_release(dev_flow);
8041                 if (dev_flow->dv.push_vlan_res)
8042                         flow_dv_push_vlan_action_resource_release(dev_flow);
8043                 if (dev_flow->dv.tag_resource)
8044                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8045                 rte_free(dev_flow);
8046         }
8047 }
8048
8049 /**
8050  * Query a dv flow  rule for its statistics via devx.
8051  *
8052  * @param[in] dev
8053  *   Pointer to Ethernet device.
8054  * @param[in] flow
8055  *   Pointer to the sub flow.
8056  * @param[out] data
8057  *   data retrieved by the query.
8058  * @param[out] error
8059  *   Perform verbose error reporting if not NULL.
8060  *
8061  * @return
8062  *   0 on success, a negative errno value otherwise and rte_errno is set.
8063  */
8064 static int
8065 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8066                     void *data, struct rte_flow_error *error)
8067 {
8068         struct mlx5_priv *priv = dev->data->dev_private;
8069         struct rte_flow_query_count *qc = data;
8070
8071         if (!priv->config.devx)
8072                 return rte_flow_error_set(error, ENOTSUP,
8073                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8074                                           NULL,
8075                                           "counters are not supported");
8076         if (flow->counter) {
8077                 uint64_t pkts, bytes;
8078                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8079                                                &bytes);
8080
8081                 if (err)
8082                         return rte_flow_error_set(error, -err,
8083                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8084                                         NULL, "cannot read counters");
8085                 qc->hits_set = 1;
8086                 qc->bytes_set = 1;
8087                 qc->hits = pkts - flow->counter->hits;
8088                 qc->bytes = bytes - flow->counter->bytes;
8089                 if (qc->reset) {
8090                         flow->counter->hits = pkts;
8091                         flow->counter->bytes = bytes;
8092                 }
8093                 return 0;
8094         }
8095         return rte_flow_error_set(error, EINVAL,
8096                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8097                                   NULL,
8098                                   "counters are not available");
8099 }
8100
8101 /**
8102  * Query a flow.
8103  *
8104  * @see rte_flow_query()
8105  * @see rte_flow_ops
8106  */
8107 static int
8108 flow_dv_query(struct rte_eth_dev *dev,
8109               struct rte_flow *flow __rte_unused,
8110               const struct rte_flow_action *actions __rte_unused,
8111               void *data __rte_unused,
8112               struct rte_flow_error *error __rte_unused)
8113 {
8114         int ret = -EINVAL;
8115
8116         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8117                 switch (actions->type) {
8118                 case RTE_FLOW_ACTION_TYPE_VOID:
8119                         break;
8120                 case RTE_FLOW_ACTION_TYPE_COUNT:
8121                         ret = flow_dv_query_count(dev, flow, data, error);
8122                         break;
8123                 default:
8124                         return rte_flow_error_set(error, ENOTSUP,
8125                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8126                                                   actions,
8127                                                   "action not supported");
8128                 }
8129         }
8130         return ret;
8131 }
8132
8133 /**
8134  * Destroy the meter table set.
8135  * Lock free, (mutex should be acquired by caller).
8136  *
8137  * @param[in] dev
8138  *   Pointer to Ethernet device.
8139  * @param[in] tbl
8140  *   Pointer to the meter table set.
8141  *
8142  * @return
8143  *   Always 0.
8144  */
8145 static int
8146 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8147                         struct mlx5_meter_domains_infos *tbl)
8148 {
8149         struct mlx5_priv *priv = dev->data->dev_private;
8150         struct mlx5_meter_domains_infos *mtd =
8151                                 (struct mlx5_meter_domains_infos *)tbl;
8152
8153         if (!mtd || !priv->config.dv_flow_en)
8154                 return 0;
8155         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8156                 claim_zero(mlx5_glue->dv_destroy_flow
8157                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8158         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8159                 claim_zero(mlx5_glue->dv_destroy_flow
8160                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8161         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8162                 claim_zero(mlx5_glue->dv_destroy_flow
8163                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8164         if (mtd->egress.color_matcher)
8165                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8166                           (mtd->egress.color_matcher));
8167         if (mtd->egress.any_matcher)
8168                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8169                           (mtd->egress.any_matcher));
8170         if (mtd->egress.tbl)
8171                 claim_zero(flow_dv_tbl_resource_release(dev,
8172                                                         mtd->egress.tbl));
8173         if (mtd->ingress.color_matcher)
8174                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8175                           (mtd->ingress.color_matcher));
8176         if (mtd->ingress.any_matcher)
8177                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8178                           (mtd->ingress.any_matcher));
8179         if (mtd->ingress.tbl)
8180                 claim_zero(flow_dv_tbl_resource_release(dev,
8181                                                         mtd->ingress.tbl));
8182         if (mtd->transfer.color_matcher)
8183                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8184                           (mtd->transfer.color_matcher));
8185         if (mtd->transfer.any_matcher)
8186                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8187                           (mtd->transfer.any_matcher));
8188         if (mtd->transfer.tbl)
8189                 claim_zero(flow_dv_tbl_resource_release(dev,
8190                                                         mtd->transfer.tbl));
8191         if (mtd->drop_actn)
8192                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8193         rte_free(mtd);
8194         return 0;
8195 }
8196
8197 /* Number of meter flow actions, count and jump or count and drop. */
8198 #define METER_ACTIONS 2
8199
8200 /**
8201  * Create specify domain meter table and suffix table.
8202  *
8203  * @param[in] dev
8204  *   Pointer to Ethernet device.
8205  * @param[in,out] mtb
8206  *   Pointer to DV meter table set.
8207  * @param[in] egress
8208  *   Table attribute.
8209  * @param[in] transfer
8210  *   Table attribute.
8211  * @param[in] color_reg_c_idx
8212  *   Reg C index for color match.
8213  *
8214  * @return
8215  *   0 on success, -1 otherwise and rte_errno is set.
8216  */
8217 static int
8218 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8219                            struct mlx5_meter_domains_infos *mtb,
8220                            uint8_t egress, uint8_t transfer,
8221                            uint32_t color_reg_c_idx)
8222 {
8223         struct mlx5_priv *priv = dev->data->dev_private;
8224         struct mlx5_ibv_shared *sh = priv->sh;
8225         struct mlx5_flow_dv_match_params mask = {
8226                 .size = sizeof(mask.buf),
8227         };
8228         struct mlx5_flow_dv_match_params value = {
8229                 .size = sizeof(value.buf),
8230         };
8231         struct mlx5dv_flow_matcher_attr dv_attr = {
8232                 .type = IBV_FLOW_ATTR_NORMAL,
8233                 .priority = 0,
8234                 .match_criteria_enable = 0,
8235                 .match_mask = (void *)&mask,
8236         };
8237         void *actions[METER_ACTIONS];
8238         struct mlx5_flow_tbl_resource **sfx_tbl;
8239         struct mlx5_meter_domain_info *dtb;
8240         struct rte_flow_error error;
8241         int i = 0;
8242
8243         if (transfer) {
8244                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8245                 dtb = &mtb->transfer;
8246         } else if (egress) {
8247                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8248                 dtb = &mtb->egress;
8249         } else {
8250                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8251                 dtb = &mtb->ingress;
8252         }
8253         /* If the suffix table in missing, create it. */
8254         if (!(*sfx_tbl)) {
8255                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8256                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8257                                                 egress, transfer, &error);
8258                 if (!(*sfx_tbl)) {
8259                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8260                         return -1;
8261                 }
8262         }
8263         /* Create the meter table with METER level. */
8264         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8265                                             egress, transfer, &error);
8266         if (!dtb->tbl) {
8267                 DRV_LOG(ERR, "Failed to create meter policer table.");
8268                 return -1;
8269         }
8270         /* Create matchers, Any and Color. */
8271         dv_attr.priority = 3;
8272         dv_attr.match_criteria_enable = 0;
8273         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8274                                                              &dv_attr,
8275                                                              dtb->tbl->obj);
8276         if (!dtb->any_matcher) {
8277                 DRV_LOG(ERR, "Failed to create meter"
8278                              " policer default matcher.");
8279                 goto error_exit;
8280         }
8281         dv_attr.priority = 0;
8282         dv_attr.match_criteria_enable =
8283                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8284         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8285                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
8286         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8287                                                                &dv_attr,
8288                                                                dtb->tbl->obj);
8289         if (!dtb->color_matcher) {
8290                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8291                 goto error_exit;
8292         }
8293         if (mtb->count_actns[RTE_MTR_DROPPED])
8294                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8295         actions[i++] = mtb->drop_actn;
8296         /* Default rule: lowest priority, match any, actions: drop. */
8297         dtb->policer_rules[RTE_MTR_DROPPED] =
8298                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8299                                                  (void *)&value, i, actions);
8300         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8301                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8302                 goto error_exit;
8303         }
8304         return 0;
8305 error_exit:
8306         return -1;
8307 }
8308
8309 /**
8310  * Create the needed meter and suffix tables.
8311  * Lock free, (mutex should be acquired by caller).
8312  *
8313  * @param[in] dev
8314  *   Pointer to Ethernet device.
8315  * @param[in] fm
8316  *   Pointer to the flow meter.
8317  *
8318  * @return
8319  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8320  */
8321 static struct mlx5_meter_domains_infos *
8322 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8323                        const struct mlx5_flow_meter *fm)
8324 {
8325         struct mlx5_priv *priv = dev->data->dev_private;
8326         struct mlx5_meter_domains_infos *mtb;
8327         int ret;
8328         int i;
8329
8330         if (!priv->mtr_en) {
8331                 rte_errno = ENOTSUP;
8332                 return NULL;
8333         }
8334         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8335         if (!mtb) {
8336                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8337                 return NULL;
8338         }
8339         /* Create meter count actions */
8340         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8341                 if (!fm->policer_stats.cnt[i])
8342                         continue;
8343                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8344         }
8345         /* Create drop action. */
8346         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8347         if (!mtb->drop_actn) {
8348                 DRV_LOG(ERR, "Failed to create drop action.");
8349                 goto error_exit;
8350         }
8351         /* Egress meter table. */
8352         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8353         if (ret) {
8354                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8355                 goto error_exit;
8356         }
8357         /* Ingress meter table. */
8358         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8359         if (ret) {
8360                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8361                 goto error_exit;
8362         }
8363         /* FDB meter table. */
8364         if (priv->config.dv_esw_en) {
8365                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8366                                                  priv->mtr_color_reg);
8367                 if (ret) {
8368                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8369                         goto error_exit;
8370                 }
8371         }
8372         return mtb;
8373 error_exit:
8374         flow_dv_destroy_mtr_tbl(dev, mtb);
8375         return NULL;
8376 }
8377
8378 /**
8379  * Destroy domain policer rule.
8380  *
8381  * @param[in] dt
8382  *   Pointer to domain table.
8383  */
8384 static void
8385 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8386 {
8387         int i;
8388
8389         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8390                 if (dt->policer_rules[i]) {
8391                         claim_zero(mlx5_glue->dv_destroy_flow
8392                                   (dt->policer_rules[i]));
8393                         dt->policer_rules[i] = NULL;
8394                 }
8395         }
8396         if (dt->jump_actn) {
8397                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8398                 dt->jump_actn = NULL;
8399         }
8400 }
8401
8402 /**
8403  * Destroy policer rules.
8404  *
8405  * @param[in] dev
8406  *   Pointer to Ethernet device.
8407  * @param[in] fm
8408  *   Pointer to flow meter structure.
8409  * @param[in] attr
8410  *   Pointer to flow attributes.
8411  *
8412  * @return
8413  *   Always 0.
8414  */
8415 static int
8416 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8417                               const struct mlx5_flow_meter *fm,
8418                               const struct rte_flow_attr *attr)
8419 {
8420         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8421
8422         if (!mtb)
8423                 return 0;
8424         if (attr->egress)
8425                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8426         if (attr->ingress)
8427                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8428         if (attr->transfer)
8429                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8430         return 0;
8431 }
8432
8433 /**
8434  * Create specify domain meter policer rule.
8435  *
8436  * @param[in] fm
8437  *   Pointer to flow meter structure.
8438  * @param[in] mtb
8439  *   Pointer to DV meter table set.
8440  * @param[in] sfx_tb
8441  *   Pointer to suffix table.
8442  * @param[in] mtr_reg_c
8443  *   Color match REG_C.
8444  *
8445  * @return
8446  *   0 on success, -1 otherwise.
8447  */
8448 static int
8449 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8450                                     struct mlx5_meter_domain_info *dtb,
8451                                     struct mlx5_flow_tbl_resource *sfx_tb,
8452                                     uint8_t mtr_reg_c)
8453 {
8454         struct mlx5_flow_dv_match_params matcher = {
8455                 .size = sizeof(matcher.buf),
8456         };
8457         struct mlx5_flow_dv_match_params value = {
8458                 .size = sizeof(value.buf),
8459         };
8460         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8461         void *actions[METER_ACTIONS];
8462         int i;
8463
8464         /* Create jump action. */
8465         if (!sfx_tb)
8466                 return -1;
8467         if (!dtb->jump_actn)
8468                 dtb->jump_actn =
8469                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8470                                                         (sfx_tb->obj);
8471         if (!dtb->jump_actn) {
8472                 DRV_LOG(ERR, "Failed to create policer jump action.");
8473                 goto error;
8474         }
8475         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8476                 int j = 0;
8477
8478                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8479                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8480                 if (mtb->count_actns[i])
8481                         actions[j++] = mtb->count_actns[i];
8482                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8483                         actions[j++] = mtb->drop_actn;
8484                 else
8485                         actions[j++] = dtb->jump_actn;
8486                 dtb->policer_rules[i] =
8487                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8488                                                  (void *)&value,
8489                                                   j, actions);
8490                 if (!dtb->policer_rules[i]) {
8491                         DRV_LOG(ERR, "Failed to create policer rule.");
8492                         goto error;
8493                 }
8494         }
8495         return 0;
8496 error:
8497         rte_errno = errno;
8498         return -1;
8499 }
8500
8501 /**
8502  * Create policer rules.
8503  *
8504  * @param[in] dev
8505  *   Pointer to Ethernet device.
8506  * @param[in] fm
8507  *   Pointer to flow meter structure.
8508  * @param[in] attr
8509  *   Pointer to flow attributes.
8510  *
8511  * @return
8512  *   0 on success, -1 otherwise.
8513  */
8514 static int
8515 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8516                              struct mlx5_flow_meter *fm,
8517                              const struct rte_flow_attr *attr)
8518 {
8519         struct mlx5_priv *priv = dev->data->dev_private;
8520         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8521         int ret;
8522
8523         if (attr->egress) {
8524                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8525                                                 priv->sh->tx_mtr_sfx_tbl,
8526                                                 priv->mtr_color_reg);
8527                 if (ret) {
8528                         DRV_LOG(ERR, "Failed to create egress policer.");
8529                         goto error;
8530                 }
8531         }
8532         if (attr->ingress) {
8533                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8534                                                 priv->sh->rx_mtr_sfx_tbl,
8535                                                 priv->mtr_color_reg);
8536                 if (ret) {
8537                         DRV_LOG(ERR, "Failed to create ingress policer.");
8538                         goto error;
8539                 }
8540         }
8541         if (attr->transfer) {
8542                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8543                                                 priv->sh->fdb_mtr_sfx_tbl,
8544                                                 priv->mtr_color_reg);
8545                 if (ret) {
8546                         DRV_LOG(ERR, "Failed to create transfer policer.");
8547                         goto error;
8548                 }
8549         }
8550         return 0;
8551 error:
8552         flow_dv_destroy_policer_rules(dev, fm, attr);
8553         return -1;
8554 }
8555
8556 /**
8557  * Query a devx counter.
8558  *
8559  * @param[in] dev
8560  *   Pointer to the Ethernet device structure.
8561  * @param[in] cnt
8562  *   Pointer to the flow counter.
8563  * @param[in] clear
8564  *   Set to clear the counter statistics.
8565  * @param[out] pkts
8566  *   The statistics value of packets.
8567  * @param[out] bytes
8568  *   The statistics value of bytes.
8569  *
8570  * @return
8571  *   0 on success, otherwise return -1.
8572  */
8573 static int
8574 flow_dv_counter_query(struct rte_eth_dev *dev,
8575                       struct mlx5_flow_counter *cnt, bool clear,
8576                       uint64_t *pkts, uint64_t *bytes)
8577 {
8578         struct mlx5_priv *priv = dev->data->dev_private;
8579         uint64_t inn_pkts, inn_bytes;
8580         int ret;
8581
8582         if (!priv->config.devx)
8583                 return -1;
8584         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8585         if (ret)
8586                 return -1;
8587         *pkts = inn_pkts - cnt->hits;
8588         *bytes = inn_bytes - cnt->bytes;
8589         if (clear) {
8590                 cnt->hits = inn_pkts;
8591                 cnt->bytes = inn_bytes;
8592         }
8593         return 0;
8594 }
8595
8596 /*
8597  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8598  */
8599 static int
8600 flow_dv_translate(struct rte_eth_dev *dev,
8601                   struct mlx5_flow *dev_flow,
8602                   const struct rte_flow_attr *attr,
8603                   const struct rte_flow_item items[],
8604                   const struct rte_flow_action actions[],
8605                   struct rte_flow_error *error)
8606 {
8607         int ret;
8608
8609         flow_dv_shared_lock(dev);
8610         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8611         flow_dv_shared_unlock(dev);
8612         return ret;
8613 }
8614
8615 /*
8616  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8617  */
8618 static int
8619 flow_dv_apply(struct rte_eth_dev *dev,
8620               struct rte_flow *flow,
8621               struct rte_flow_error *error)
8622 {
8623         int ret;
8624
8625         flow_dv_shared_lock(dev);
8626         ret = __flow_dv_apply(dev, flow, error);
8627         flow_dv_shared_unlock(dev);
8628         return ret;
8629 }
8630
8631 /*
8632  * Mutex-protected thunk to lock-free __flow_dv_remove().
8633  */
8634 static void
8635 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8636 {
8637         flow_dv_shared_lock(dev);
8638         __flow_dv_remove(dev, flow);
8639         flow_dv_shared_unlock(dev);
8640 }
8641
8642 /*
8643  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8644  */
8645 static void
8646 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8647 {
8648         flow_dv_shared_lock(dev);
8649         __flow_dv_destroy(dev, flow);
8650         flow_dv_shared_unlock(dev);
8651 }
8652
8653 /*
8654  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8655  */
8656 static struct mlx5_flow_counter *
8657 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8658 {
8659         struct mlx5_flow_counter *cnt;
8660
8661         flow_dv_shared_lock(dev);
8662         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8663         flow_dv_shared_unlock(dev);
8664         return cnt;
8665 }
8666
8667 /*
8668  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8669  */
8670 static void
8671 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8672 {
8673         flow_dv_shared_lock(dev);
8674         flow_dv_counter_release(dev, cnt);
8675         flow_dv_shared_unlock(dev);
8676 }
8677
8678 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8679         .validate = flow_dv_validate,
8680         .prepare = flow_dv_prepare,
8681         .translate = flow_dv_translate,
8682         .apply = flow_dv_apply,
8683         .remove = flow_dv_remove,
8684         .destroy = flow_dv_destroy,
8685         .query = flow_dv_query,
8686         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8687         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8688         .create_policer_rules = flow_dv_create_policer_rules,
8689         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8690         .counter_alloc = flow_dv_counter_allocate,
8691         .counter_free = flow_dv_counter_free,
8692         .counter_query = flow_dv_counter_query,
8693 };
8694
8695 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */