drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_bus_pci.h>
  19 #include <rte_ip.h>
  20 #include <rte_gre.h>
  21 #include <rte_vxlan.h>
  22 #include <rte_gtp.h>
  23 #include <rte_eal_paging.h>
  24 #include <rte_mpls.h>
  25 #include <rte_mtr.h>
  26 #include <rte_mtr_driver.h>
  27 #include <rte_tailq.h>
  28
  29 #include <mlx5_glue.h>
  30 #include <mlx5_devx_cmds.h>
  31 #include <mlx5_prm.h>
  32 #include <mlx5_malloc.h>
  33
  34 #include "mlx5_defs.h"
  35 #include "mlx5.h"
  36 #include "mlx5_common_os.h"
  37 #include "mlx5_flow.h"
  38 #include "mlx5_flow_os.h"
  39 #include "mlx5_rx.h"
  40 #include "mlx5_tx.h"
  41 #include "rte_pmd_mlx5.h"
  42
  43 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  44
  45 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  46 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR_ESWITCH
  50 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  51 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  52 #endif
  53 #endif
  54
  55 #ifndef HAVE_MLX5DV_DR
  56 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  57 #endif
  58
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 static int
  79 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  80                              struct mlx5_flow_tbl_resource *tbl);
  81
  82 static int
  83 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  84                                      uint32_t encap_decap_idx);
  85
  86 static int
  87 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  88                                         uint32_t port_id);
  89 static void
  90 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  91
  92 static int
  93 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  94                                   uint32_t rix_jump);
  95
  96 static inline uint16_t
  97 mlx5_translate_tunnel_etypes(uint64_t pattern_flags)
  98 {
  99         if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2)
 100                 return RTE_ETHER_TYPE_TEB;
 101         else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4)
 102                 return RTE_ETHER_TYPE_IPV4;
 103         else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)
 104                 return RTE_ETHER_TYPE_IPV6;
 105         else if (pattern_flags & MLX5_FLOW_LAYER_MPLS)
 106                 return RTE_ETHER_TYPE_MPLS;
 107         return 0;
 108 }
 109
 110 static int16_t
 111 flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
 112 {
 113         struct mlx5_priv *priv = dev->data->dev_private;
 114
 115         if (priv->pci_dev == NULL)
 116                 return 0;
 117         switch (priv->pci_dev->id.device_id) {
 118         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
 119         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
 120         case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
 121                 return (int16_t)0xfffe;
 122         default:
 123                 return 0;
 124         }
 125 }
 126
 127 /**
 128  * Initialize flow attributes structure according to flow items' types.
 129  *
 130  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
 131  * mode. For tunnel mode, the items to be modified are the outermost ones.
 132  *
 133  * @param[in] item
 134  *   Pointer to item specification.
 135  * @param[out] attr
 136  *   Pointer to flow attributes structure.
 137  * @param[in] dev_flow
 138  *   Pointer to the sub flow.
 139  * @param[in] tunnel_decap
 140  *   Whether action is after tunnel decapsulation.
 141  */
 142 static void
 143 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 144                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 145 {
 146         uint64_t layers = dev_flow->handle->layers;
 147
 148         /*
 149          * If layers is already initialized, it means this dev_flow is the
 150          * suffix flow, the layers flags is set by the prefix flow. Need to
 151          * use the layer flags from prefix flow as the suffix flow may not
 152          * have the user defined items as the flow is split.
 153          */
 154         if (layers) {
 155                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 156                         attr->ipv4 = 1;
 157                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 158                         attr->ipv6 = 1;
 159                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 160                         attr->tcp = 1;
 161                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 162                         attr->udp = 1;
 163                 attr->valid = 1;
 164                 return;
 165         }
 166         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 167                 uint8_t next_protocol = 0xff;
 168                 switch (item->type) {
 169                 case RTE_FLOW_ITEM_TYPE_GRE:
 170                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 171                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 172                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 173                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 174                 case RTE_FLOW_ITEM_TYPE_MPLS:
 175                         if (tunnel_decap)
 176                                 attr->attr = 0;
 177                         break;
 178                 case RTE_FLOW_ITEM_TYPE_IPV4:
 179                         if (!attr->ipv6)
 180                                 attr->ipv4 = 1;
 181                         if (item->mask != NULL &&
 182                             ((const struct rte_flow_item_ipv4 *)
 183                             item->mask)->hdr.next_proto_id)
 184                                 next_protocol =
 185                                     ((const struct rte_flow_item_ipv4 *)
 186                                       (item->spec))->hdr.next_proto_id &
 187                                     ((const struct rte_flow_item_ipv4 *)
 188                                       (item->mask))->hdr.next_proto_id;
 189                         if ((next_protocol == IPPROTO_IPIP ||
 190                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 191                                 attr->attr = 0;
 192                         break;
 193                 case RTE_FLOW_ITEM_TYPE_IPV6:
 194                         if (!attr->ipv4)
 195                                 attr->ipv6 = 1;
 196                         if (item->mask != NULL &&
 197                             ((const struct rte_flow_item_ipv6 *)
 198                             item->mask)->hdr.proto)
 199                                 next_protocol =
 200                                     ((const struct rte_flow_item_ipv6 *)
 201                                       (item->spec))->hdr.proto &
 202                                     ((const struct rte_flow_item_ipv6 *)
 203                                       (item->mask))->hdr.proto;
 204                         if ((next_protocol == IPPROTO_IPIP ||
 205                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 206                                 attr->attr = 0;
 207                         break;
 208                 case RTE_FLOW_ITEM_TYPE_UDP:
 209                         if (!attr->tcp)
 210                                 attr->udp = 1;
 211                         break;
 212                 case RTE_FLOW_ITEM_TYPE_TCP:
 213                         if (!attr->udp)
 214                                 attr->tcp = 1;
 215                         break;
 216                 default:
 217                         break;
 218                 }
 219         }
 220         attr->valid = 1;
 221 }
 222
 223 /*
 224  * Convert rte_mtr_color to mlx5 color.
 225  *
 226  * @param[in] rcol
 227  *   rte_mtr_color.
 228  *
 229  * @return
 230  *   mlx5 color.
 231  */
 232 static inline int
 233 rte_col_2_mlx5_col(enum rte_color rcol)
 234 {
 235         switch (rcol) {
 236         case RTE_COLOR_GREEN:
 237                 return MLX5_FLOW_COLOR_GREEN;
 238         case RTE_COLOR_YELLOW:
 239                 return MLX5_FLOW_COLOR_YELLOW;
 240         case RTE_COLOR_RED:
 241                 return MLX5_FLOW_COLOR_RED;
 242         default:
 243                 break;
 244         }
 245         return MLX5_FLOW_COLOR_UNDEFINED;
 246 }
 247
 248 struct field_modify_info {
 249         uint32_t size; /* Size of field in protocol header, in bytes. */
 250         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 251         enum mlx5_modification_field id;
 252 };
 253
 254 struct field_modify_info modify_eth[] = {
 255         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 256         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 257         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 258         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 259         {0, 0, 0},
 260 };
 261
 262 struct field_modify_info modify_vlan_out_first_vid[] = {
 263         /* Size in bits !!! */
 264         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 265         {0, 0, 0},
 266 };
 267
 268 struct field_modify_info modify_ipv4[] = {
 269         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 270         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 271         {4, 12, MLX5_MODI_OUT_SIPV4},
 272         {4, 16, MLX5_MODI_OUT_DIPV4},
 273         {0, 0, 0},
 274 };
 275
 276 struct field_modify_info modify_ipv6[] = {
 277         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 278         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 279         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 280         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 281         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 282         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 283         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 284         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 285         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 286         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 287         {0, 0, 0},
 288 };
 289
 290 struct field_modify_info modify_udp[] = {
 291         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 292         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 293         {0, 0, 0},
 294 };
 295
 296 struct field_modify_info modify_tcp[] = {
 297         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 298         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 299         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 300         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 301         {0, 0, 0},
 302 };
 303
 304 static void
 305 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 306                           uint8_t next_protocol, uint64_t *item_flags,
 307                           int *tunnel)
 308 {
 309         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 310                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 311         if (next_protocol == IPPROTO_IPIP) {
 312                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 313                 *tunnel = 1;
 314         }
 315         if (next_protocol == IPPROTO_IPV6) {
 316                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 317                 *tunnel = 1;
 318         }
 319 }
 320
 321 static inline struct mlx5_hlist *
 322 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
 323                      const char *name, uint32_t size, bool direct_key,
 324                      bool lcores_share, void *ctx,
 325                      mlx5_list_create_cb cb_create,
 326                      mlx5_list_match_cb cb_match,
 327                      mlx5_list_remove_cb cb_remove,
 328                      mlx5_list_clone_cb cb_clone,
 329                      mlx5_list_clone_free_cb cb_clone_free)
 330 {
 331         struct mlx5_hlist *hl;
 332         struct mlx5_hlist *expected = NULL;
 333         char s[MLX5_NAME_SIZE];
 334
 335         hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 336         if (likely(hl))
 337                 return hl;
 338         snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
 339         hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
 340                         ctx, cb_create, cb_match, cb_remove, cb_clone,
 341                         cb_clone_free);
 342         if (!hl) {
 343                 DRV_LOG(ERR, "%s hash creation failed", name);
 344                 rte_errno = ENOMEM;
 345                 return NULL;
 346         }
 347         if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
 348                                          __ATOMIC_SEQ_CST,
 349                                          __ATOMIC_SEQ_CST)) {
 350                 mlx5_hlist_destroy(hl);
 351                 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 352         }
 353         return hl;
 354 }
 355
 356 /* Update VLAN's VID/PCP based on input rte_flow_action.
 357  *
 358  * @param[in] action
 359  *   Pointer to struct rte_flow_action.
 360  * @param[out] vlan
 361  *   Pointer to struct rte_vlan_hdr.
 362  */
 363 static void
 364 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 365                          struct rte_vlan_hdr *vlan)
 366 {
 367         uint16_t vlan_tci;
 368         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 369                 vlan_tci =
 370                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 371                                                action->conf)->vlan_pcp;
 372                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 373                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 374                 vlan->vlan_tci |= vlan_tci;
 375         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 376                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 377                 vlan->vlan_tci |= rte_be_to_cpu_16
 378                     (((const struct rte_flow_action_of_set_vlan_vid *)
 379                                              action->conf)->vlan_vid);
 380         }
 381 }
 382
 383 /**
 384  * Fetch 1, 2, 3 or 4 byte field from the byte array
 385  * and return as unsigned integer in host-endian format.
 386  *
 387  * @param[in] data
 388  *   Pointer to data array.
 389  * @param[in] size
 390  *   Size of field to extract.
 391  *
 392  * @return
 393  *   converted field in host endian format.
 394  */
 395 static inline uint32_t
 396 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 397 {
 398         uint32_t ret;
 399
 400         switch (size) {
 401         case 1:
 402                 ret = *data;
 403                 break;
 404         case 2:
 405                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 406                 break;
 407         case 3:
 408                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 409                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 410                 break;
 411         case 4:
 412                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 413                 break;
 414         default:
 415                 MLX5_ASSERT(false);
 416                 ret = 0;
 417                 break;
 418         }
 419         return ret;
 420 }
 421
 422 /**
 423  * Convert modify-header action to DV specification.
 424  *
 425  * Data length of each action is determined by provided field description
 426  * and the item mask. Data bit offset and width of each action is determined
 427  * by provided item mask.
 428  *
 429  * @param[in] item
 430  *   Pointer to item specification.
 431  * @param[in] field
 432  *   Pointer to field modification information.
 433  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 434  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 435  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 436  * @param[in] dcopy
 437  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 438  *   Negative offset value sets the same offset as source offset.
 439  *   size field is ignored, value is taken from source field.
 440  * @param[in,out] resource
 441  *   Pointer to the modify-header resource.
 442  * @param[in] type
 443  *   Type of modification.
 444  * @param[out] error
 445  *   Pointer to the error structure.
 446  *
 447  * @return
 448  *   0 on success, a negative errno value otherwise and rte_errno is set.
 449  */
 450 static int
 451 flow_dv_convert_modify_action(struct rte_flow_item *item,
 452                               struct field_modify_info *field,
 453                               struct field_modify_info *dcopy,
 454                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 455                               uint32_t type, struct rte_flow_error *error)
 456 {
 457         uint32_t i = resource->actions_num;
 458         struct mlx5_modification_cmd *actions = resource->actions;
 459         uint32_t carry_b = 0;
 460
 461         /*
 462          * The item and mask are provided in big-endian format.
 463          * The fields should be presented as in big-endian format either.
 464          * Mask must be always present, it defines the actual field width.
 465          */
 466         MLX5_ASSERT(item->mask);
 467         MLX5_ASSERT(field->size);
 468         do {
 469                 uint32_t size_b;
 470                 uint32_t off_b;
 471                 uint32_t mask;
 472                 uint32_t data;
 473                 bool next_field = true;
 474                 bool next_dcopy = true;
 475
 476                 if (i >= MLX5_MAX_MODIFY_NUM)
 477                         return rte_flow_error_set(error, EINVAL,
 478                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 479                                  "too many items to modify");
 480                 /* Fetch variable byte size mask from the array. */
 481                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 482                                            field->offset, field->size);
 483                 if (!mask) {
 484                         ++field;
 485                         continue;
 486                 }
 487                 /* Deduce actual data width in bits from mask value. */
 488                 off_b = rte_bsf32(mask) + carry_b;
 489                 size_b = sizeof(uint32_t) * CHAR_BIT -
 490                          off_b - __builtin_clz(mask);
 491                 MLX5_ASSERT(size_b);
 492                 actions[i] = (struct mlx5_modification_cmd) {
 493                         .action_type = type,
 494                         .field = field->id,
 495                         .offset = off_b,
 496                         .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
 497                                 0 : size_b,
 498                 };
 499                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 500                         MLX5_ASSERT(dcopy);
 501                         actions[i].dst_field = dcopy->id;
 502                         actions[i].dst_offset =
 503                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 504                         /* Convert entire record to big-endian format. */
 505                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 506                         /*
 507                          * Destination field overflow. Copy leftovers of
 508                          * a source field to the next destination field.
 509                          */
 510                         carry_b = 0;
 511                         if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
 512                             dcopy->size != 0) {
 513                                 actions[i].length =
 514                                         dcopy->size * CHAR_BIT - dcopy->offset;
 515                                 carry_b = actions[i].length;
 516                                 next_field = false;
 517                         }
 518                         /*
 519                          * Not enough bits in a source filed to fill a
 520                          * destination field. Switch to the next source.
 521                          */
 522                         if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
 523                             (size_b == field->size * CHAR_BIT - off_b)) {
 524                                 actions[i].length =
 525                                         field->size * CHAR_BIT - off_b;
 526                                 dcopy->offset += actions[i].length;
 527                                 next_dcopy = false;
 528                         }
 529                         if (next_dcopy)
 530                                 ++dcopy;
 531                 } else {
 532                         MLX5_ASSERT(item->spec);
 533                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 534                                                    field->offset, field->size);
 535                         /* Shift out the trailing masked bits from data. */
 536                         data = (data & mask) >> off_b;
 537                         actions[i].data1 = rte_cpu_to_be_32(data);
 538                 }
 539                 /* Convert entire record to expected big-endian format. */
 540                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 541                 if (next_field)
 542                         ++field;
 543                 ++i;
 544         } while (field->size);
 545         if (resource->actions_num == i)
 546                 return rte_flow_error_set(error, EINVAL,
 547                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 548                                           "invalid modification flow item");
 549         resource->actions_num = i;
 550         return 0;
 551 }
 552
 553 /**
 554  * Convert modify-header set IPv4 address action to DV specification.
 555  *
 556  * @param[in,out] resource
 557  *   Pointer to the modify-header resource.
 558  * @param[in] action
 559  *   Pointer to action specification.
 560  * @param[out] error
 561  *   Pointer to the error structure.
 562  *
 563  * @return
 564  *   0 on success, a negative errno value otherwise and rte_errno is set.
 565  */
 566 static int
 567 flow_dv_convert_action_modify_ipv4
 568                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 569                          const struct rte_flow_action *action,
 570                          struct rte_flow_error *error)
 571 {
 572         const struct rte_flow_action_set_ipv4 *conf =
 573                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 574         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 575         struct rte_flow_item_ipv4 ipv4;
 576         struct rte_flow_item_ipv4 ipv4_mask;
 577
 578         memset(&ipv4, 0, sizeof(ipv4));
 579         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 580         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 581                 ipv4.hdr.src_addr = conf->ipv4_addr;
 582                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 583         } else {
 584                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 585                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 586         }
 587         item.spec = &ipv4;
 588         item.mask = &ipv4_mask;
 589         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 590                                              MLX5_MODIFICATION_TYPE_SET, error);
 591 }
 592
 593 /**
 594  * Convert modify-header set IPv6 address action to DV specification.
 595  *
 596  * @param[in,out] resource
 597  *   Pointer to the modify-header resource.
 598  * @param[in] action
 599  *   Pointer to action specification.
 600  * @param[out] error
 601  *   Pointer to the error structure.
 602  *
 603  * @return
 604  *   0 on success, a negative errno value otherwise and rte_errno is set.
 605  */
 606 static int
 607 flow_dv_convert_action_modify_ipv6
 608                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 609                          const struct rte_flow_action *action,
 610                          struct rte_flow_error *error)
 611 {
 612         const struct rte_flow_action_set_ipv6 *conf =
 613                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 614         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 615         struct rte_flow_item_ipv6 ipv6;
 616         struct rte_flow_item_ipv6 ipv6_mask;
 617
 618         memset(&ipv6, 0, sizeof(ipv6));
 619         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 620         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 621                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 622                        sizeof(ipv6.hdr.src_addr));
 623                 memcpy(&ipv6_mask.hdr.src_addr,
 624                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 625                        sizeof(ipv6.hdr.src_addr));
 626         } else {
 627                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 628                        sizeof(ipv6.hdr.dst_addr));
 629                 memcpy(&ipv6_mask.hdr.dst_addr,
 630                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 631                        sizeof(ipv6.hdr.dst_addr));
 632         }
 633         item.spec = &ipv6;
 634         item.mask = &ipv6_mask;
 635         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 636                                              MLX5_MODIFICATION_TYPE_SET, error);
 637 }
 638
 639 /**
 640  * Convert modify-header set MAC address action to DV specification.
 641  *
 642  * @param[in,out] resource
 643  *   Pointer to the modify-header resource.
 644  * @param[in] action
 645  *   Pointer to action specification.
 646  * @param[out] error
 647  *   Pointer to the error structure.
 648  *
 649  * @return
 650  *   0 on success, a negative errno value otherwise and rte_errno is set.
 651  */
 652 static int
 653 flow_dv_convert_action_modify_mac
 654                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 655                          const struct rte_flow_action *action,
 656                          struct rte_flow_error *error)
 657 {
 658         const struct rte_flow_action_set_mac *conf =
 659                 (const struct rte_flow_action_set_mac *)(action->conf);
 660         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 661         struct rte_flow_item_eth eth;
 662         struct rte_flow_item_eth eth_mask;
 663
 664         memset(&eth, 0, sizeof(eth));
 665         memset(&eth_mask, 0, sizeof(eth_mask));
 666         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 667                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 668                        sizeof(eth.src.addr_bytes));
 669                 memcpy(&eth_mask.src.addr_bytes,
 670                        &rte_flow_item_eth_mask.src.addr_bytes,
 671                        sizeof(eth_mask.src.addr_bytes));
 672         } else {
 673                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 674                        sizeof(eth.dst.addr_bytes));
 675                 memcpy(&eth_mask.dst.addr_bytes,
 676                        &rte_flow_item_eth_mask.dst.addr_bytes,
 677                        sizeof(eth_mask.dst.addr_bytes));
 678         }
 679         item.spec = &eth;
 680         item.mask = &eth_mask;
 681         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 682                                              MLX5_MODIFICATION_TYPE_SET, error);
 683 }
 684
 685 /**
 686  * Convert modify-header set VLAN VID action to DV specification.
 687  *
 688  * @param[in,out] resource
 689  *   Pointer to the modify-header resource.
 690  * @param[in] action
 691  *   Pointer to action specification.
 692  * @param[out] error
 693  *   Pointer to the error structure.
 694  *
 695  * @return
 696  *   0 on success, a negative errno value otherwise and rte_errno is set.
 697  */
 698 static int
 699 flow_dv_convert_action_modify_vlan_vid
 700                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 701                          const struct rte_flow_action *action,
 702                          struct rte_flow_error *error)
 703 {
 704         const struct rte_flow_action_of_set_vlan_vid *conf =
 705                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 706         int i = resource->actions_num;
 707         struct mlx5_modification_cmd *actions = resource->actions;
 708         struct field_modify_info *field = modify_vlan_out_first_vid;
 709
 710         if (i >= MLX5_MAX_MODIFY_NUM)
 711                 return rte_flow_error_set(error, EINVAL,
 712                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 713                          "too many items to modify");
 714         actions[i] = (struct mlx5_modification_cmd) {
 715                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 716                 .field = field->id,
 717                 .length = field->size,
 718                 .offset = field->offset,
 719         };
 720         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 721         actions[i].data1 = conf->vlan_vid;
 722         actions[i].data1 = actions[i].data1 << 16;
 723         resource->actions_num = ++i;
 724         return 0;
 725 }
 726
 727 /**
 728  * Convert modify-header set TP action to DV specification.
 729  *
 730  * @param[in,out] resource
 731  *   Pointer to the modify-header resource.
 732  * @param[in] action
 733  *   Pointer to action specification.
 734  * @param[in] items
 735  *   Pointer to rte_flow_item objects list.
 736  * @param[in] attr
 737  *   Pointer to flow attributes structure.
 738  * @param[in] dev_flow
 739  *   Pointer to the sub flow.
 740  * @param[in] tunnel_decap
 741  *   Whether action is after tunnel decapsulation.
 742  * @param[out] error
 743  *   Pointer to the error structure.
 744  *
 745  * @return
 746  *   0 on success, a negative errno value otherwise and rte_errno is set.
 747  */
 748 static int
 749 flow_dv_convert_action_modify_tp
 750                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 751                          const struct rte_flow_action *action,
 752                          const struct rte_flow_item *items,
 753                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 754                          bool tunnel_decap, struct rte_flow_error *error)
 755 {
 756         const struct rte_flow_action_set_tp *conf =
 757                 (const struct rte_flow_action_set_tp *)(action->conf);
 758         struct rte_flow_item item;
 759         struct rte_flow_item_udp udp;
 760         struct rte_flow_item_udp udp_mask;
 761         struct rte_flow_item_tcp tcp;
 762         struct rte_flow_item_tcp tcp_mask;
 763         struct field_modify_info *field;
 764
 765         if (!attr->valid)
 766                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 767         if (attr->udp) {
 768                 memset(&udp, 0, sizeof(udp));
 769                 memset(&udp_mask, 0, sizeof(udp_mask));
 770                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 771                         udp.hdr.src_port = conf->port;
 772                         udp_mask.hdr.src_port =
 773                                         rte_flow_item_udp_mask.hdr.src_port;
 774                 } else {
 775                         udp.hdr.dst_port = conf->port;
 776                         udp_mask.hdr.dst_port =
 777                                         rte_flow_item_udp_mask.hdr.dst_port;
 778                 }
 779                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 780                 item.spec = &udp;
 781                 item.mask = &udp_mask;
 782                 field = modify_udp;
 783         } else {
 784                 MLX5_ASSERT(attr->tcp);
 785                 memset(&tcp, 0, sizeof(tcp));
 786                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 787                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 788                         tcp.hdr.src_port = conf->port;
 789                         tcp_mask.hdr.src_port =
 790                                         rte_flow_item_tcp_mask.hdr.src_port;
 791                 } else {
 792                         tcp.hdr.dst_port = conf->port;
 793                         tcp_mask.hdr.dst_port =
 794                                         rte_flow_item_tcp_mask.hdr.dst_port;
 795                 }
 796                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 797                 item.spec = &tcp;
 798                 item.mask = &tcp_mask;
 799                 field = modify_tcp;
 800         }
 801         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 802                                              MLX5_MODIFICATION_TYPE_SET, error);
 803 }
 804
 805 /**
 806  * Convert modify-header set TTL action to DV specification.
 807  *
 808  * @param[in,out] resource
 809  *   Pointer to the modify-header resource.
 810  * @param[in] action
 811  *   Pointer to action specification.
 812  * @param[in] items
 813  *   Pointer to rte_flow_item objects list.
 814  * @param[in] attr
 815  *   Pointer to flow attributes structure.
 816  * @param[in] dev_flow
 817  *   Pointer to the sub flow.
 818  * @param[in] tunnel_decap
 819  *   Whether action is after tunnel decapsulation.
 820  * @param[out] error
 821  *   Pointer to the error structure.
 822  *
 823  * @return
 824  *   0 on success, a negative errno value otherwise and rte_errno is set.
 825  */
 826 static int
 827 flow_dv_convert_action_modify_ttl
 828                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 829                          const struct rte_flow_action *action,
 830                          const struct rte_flow_item *items,
 831                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 832                          bool tunnel_decap, struct rte_flow_error *error)
 833 {
 834         const struct rte_flow_action_set_ttl *conf =
 835                 (const struct rte_flow_action_set_ttl *)(action->conf);
 836         struct rte_flow_item item;
 837         struct rte_flow_item_ipv4 ipv4;
 838         struct rte_flow_item_ipv4 ipv4_mask;
 839         struct rte_flow_item_ipv6 ipv6;
 840         struct rte_flow_item_ipv6 ipv6_mask;
 841         struct field_modify_info *field;
 842
 843         if (!attr->valid)
 844                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 845         if (attr->ipv4) {
 846                 memset(&ipv4, 0, sizeof(ipv4));
 847                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 848                 ipv4.hdr.time_to_live = conf->ttl_value;
 849                 ipv4_mask.hdr.time_to_live = 0xFF;
 850                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 851                 item.spec = &ipv4;
 852                 item.mask = &ipv4_mask;
 853                 field = modify_ipv4;
 854         } else {
 855                 MLX5_ASSERT(attr->ipv6);
 856                 memset(&ipv6, 0, sizeof(ipv6));
 857                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 858                 ipv6.hdr.hop_limits = conf->ttl_value;
 859                 ipv6_mask.hdr.hop_limits = 0xFF;
 860                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 861                 item.spec = &ipv6;
 862                 item.mask = &ipv6_mask;
 863                 field = modify_ipv6;
 864         }
 865         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 866                                              MLX5_MODIFICATION_TYPE_SET, error);
 867 }
 868
 869 /**
 870  * Convert modify-header decrement TTL action to DV specification.
 871  *
 872  * @param[in,out] resource
 873  *   Pointer to the modify-header resource.
 874  * @param[in] action
 875  *   Pointer to action specification.
 876  * @param[in] items
 877  *   Pointer to rte_flow_item objects list.
 878  * @param[in] attr
 879  *   Pointer to flow attributes structure.
 880  * @param[in] dev_flow
 881  *   Pointer to the sub flow.
 882  * @param[in] tunnel_decap
 883  *   Whether action is after tunnel decapsulation.
 884  * @param[out] error
 885  *   Pointer to the error structure.
 886  *
 887  * @return
 888  *   0 on success, a negative errno value otherwise and rte_errno is set.
 889  */
 890 static int
 891 flow_dv_convert_action_modify_dec_ttl
 892                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 893                          const struct rte_flow_item *items,
 894                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 895                          bool tunnel_decap, struct rte_flow_error *error)
 896 {
 897         struct rte_flow_item item;
 898         struct rte_flow_item_ipv4 ipv4;
 899         struct rte_flow_item_ipv4 ipv4_mask;
 900         struct rte_flow_item_ipv6 ipv6;
 901         struct rte_flow_item_ipv6 ipv6_mask;
 902         struct field_modify_info *field;
 903
 904         if (!attr->valid)
 905                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 906         if (attr->ipv4) {
 907                 memset(&ipv4, 0, sizeof(ipv4));
 908                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 909                 ipv4.hdr.time_to_live = 0xFF;
 910                 ipv4_mask.hdr.time_to_live = 0xFF;
 911                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 912                 item.spec = &ipv4;
 913                 item.mask = &ipv4_mask;
 914                 field = modify_ipv4;
 915         } else {
 916                 MLX5_ASSERT(attr->ipv6);
 917                 memset(&ipv6, 0, sizeof(ipv6));
 918                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 919                 ipv6.hdr.hop_limits = 0xFF;
 920                 ipv6_mask.hdr.hop_limits = 0xFF;
 921                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 922                 item.spec = &ipv6;
 923                 item.mask = &ipv6_mask;
 924                 field = modify_ipv6;
 925         }
 926         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 927                                              MLX5_MODIFICATION_TYPE_ADD, error);
 928 }
 929
 930 /**
 931  * Convert modify-header increment/decrement TCP Sequence number
 932  * to DV specification.
 933  *
 934  * @param[in,out] resource
 935  *   Pointer to the modify-header resource.
 936  * @param[in] action
 937  *   Pointer to action specification.
 938  * @param[out] error
 939  *   Pointer to the error structure.
 940  *
 941  * @return
 942  *   0 on success, a negative errno value otherwise and rte_errno is set.
 943  */
 944 static int
 945 flow_dv_convert_action_modify_tcp_seq
 946                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 947                          const struct rte_flow_action *action,
 948                          struct rte_flow_error *error)
 949 {
 950         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 951         uint64_t value = rte_be_to_cpu_32(*conf);
 952         struct rte_flow_item item;
 953         struct rte_flow_item_tcp tcp;
 954         struct rte_flow_item_tcp tcp_mask;
 955
 956         memset(&tcp, 0, sizeof(tcp));
 957         memset(&tcp_mask, 0, sizeof(tcp_mask));
 958         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 959                 /*
 960                  * The HW has no decrement operation, only increment operation.
 961                  * To simulate decrement X from Y using increment operation
 962                  * we need to add UINT32_MAX X times to Y.
 963                  * Each adding of UINT32_MAX decrements Y by 1.
 964                  */
 965                 value *= UINT32_MAX;
 966         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 967         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 968         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 969         item.spec = &tcp;
 970         item.mask = &tcp_mask;
 971         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 972                                              MLX5_MODIFICATION_TYPE_ADD, error);
 973 }
 974
 975 /**
 976  * Convert modify-header increment/decrement TCP Acknowledgment number
 977  * to DV specification.
 978  *
 979  * @param[in,out] resource
 980  *   Pointer to the modify-header resource.
 981  * @param[in] action
 982  *   Pointer to action specification.
 983  * @param[out] error
 984  *   Pointer to the error structure.
 985  *
 986  * @return
 987  *   0 on success, a negative errno value otherwise and rte_errno is set.
 988  */
 989 static int
 990 flow_dv_convert_action_modify_tcp_ack
 991                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 992                          const struct rte_flow_action *action,
 993                          struct rte_flow_error *error)
 994 {
 995         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 996         uint64_t value = rte_be_to_cpu_32(*conf);
 997         struct rte_flow_item item;
 998         struct rte_flow_item_tcp tcp;
 999         struct rte_flow_item_tcp tcp_mask;
1000
1001         memset(&tcp, 0, sizeof(tcp));
1002         memset(&tcp_mask, 0, sizeof(tcp_mask));
1003         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
1004                 /*
1005                  * The HW has no decrement operation, only increment operation.
1006                  * To simulate decrement X from Y using increment operation
1007                  * we need to add UINT32_MAX X times to Y.
1008                  * Each adding of UINT32_MAX decrements Y by 1.
1009                  */
1010                 value *= UINT32_MAX;
1011         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1012         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1013         item.type = RTE_FLOW_ITEM_TYPE_TCP;
1014         item.spec = &tcp;
1015         item.mask = &tcp_mask;
1016         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1017                                              MLX5_MODIFICATION_TYPE_ADD, error);
1018 }
1019
1020 static enum mlx5_modification_field reg_to_field[] = {
1021         [REG_NON] = MLX5_MODI_OUT_NONE,
1022         [REG_A] = MLX5_MODI_META_DATA_REG_A,
1023         [REG_B] = MLX5_MODI_META_DATA_REG_B,
1024         [REG_C_0] = MLX5_MODI_META_REG_C_0,
1025         [REG_C_1] = MLX5_MODI_META_REG_C_1,
1026         [REG_C_2] = MLX5_MODI_META_REG_C_2,
1027         [REG_C_3] = MLX5_MODI_META_REG_C_3,
1028         [REG_C_4] = MLX5_MODI_META_REG_C_4,
1029         [REG_C_5] = MLX5_MODI_META_REG_C_5,
1030         [REG_C_6] = MLX5_MODI_META_REG_C_6,
1031         [REG_C_7] = MLX5_MODI_META_REG_C_7,
1032 };
1033
1034 /**
1035  * Convert register set to DV specification.
1036  *
1037  * @param[in,out] resource
1038  *   Pointer to the modify-header resource.
1039  * @param[in] action
1040  *   Pointer to action specification.
1041  * @param[out] error
1042  *   Pointer to the error structure.
1043  *
1044  * @return
1045  *   0 on success, a negative errno value otherwise and rte_errno is set.
1046  */
1047 static int
1048 flow_dv_convert_action_set_reg
1049                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1050                          const struct rte_flow_action *action,
1051                          struct rte_flow_error *error)
1052 {
1053         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1054         struct mlx5_modification_cmd *actions = resource->actions;
1055         uint32_t i = resource->actions_num;
1056
1057         if (i >= MLX5_MAX_MODIFY_NUM)
1058                 return rte_flow_error_set(error, EINVAL,
1059                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1060                                           "too many items to modify");
1061         MLX5_ASSERT(conf->id != REG_NON);
1062         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1063         actions[i] = (struct mlx5_modification_cmd) {
1064                 .action_type = MLX5_MODIFICATION_TYPE_SET,
1065                 .field = reg_to_field[conf->id],
1066                 .offset = conf->offset,
1067                 .length = conf->length,
1068         };
1069         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1070         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1071         ++i;
1072         resource->actions_num = i;
1073         return 0;
1074 }
1075
1076 /**
1077  * Convert SET_TAG action to DV specification.
1078  *
1079  * @param[in] dev
1080  *   Pointer to the rte_eth_dev structure.
1081  * @param[in,out] resource
1082  *   Pointer to the modify-header resource.
1083  * @param[in] conf
1084  *   Pointer to action specification.
1085  * @param[out] error
1086  *   Pointer to the error structure.
1087  *
1088  * @return
1089  *   0 on success, a negative errno value otherwise and rte_errno is set.
1090  */
1091 static int
1092 flow_dv_convert_action_set_tag
1093                         (struct rte_eth_dev *dev,
1094                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1095                          const struct rte_flow_action_set_tag *conf,
1096                          struct rte_flow_error *error)
1097 {
1098         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1099         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1100         struct rte_flow_item item = {
1101                 .spec = &data,
1102                 .mask = &mask,
1103         };
1104         struct field_modify_info reg_c_x[] = {
1105                 [1] = {0, 0, 0},
1106         };
1107         enum mlx5_modification_field reg_type;
1108         int ret;
1109
1110         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1111         if (ret < 0)
1112                 return ret;
1113         MLX5_ASSERT(ret != REG_NON);
1114         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1115         reg_type = reg_to_field[ret];
1116         MLX5_ASSERT(reg_type > 0);
1117         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1118         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1119                                              MLX5_MODIFICATION_TYPE_SET, error);
1120 }
1121
1122 /**
1123  * Convert internal COPY_REG action to DV specification.
1124  *
1125  * @param[in] dev
1126  *   Pointer to the rte_eth_dev structure.
1127  * @param[in,out] res
1128  *   Pointer to the modify-header resource.
1129  * @param[in] action
1130  *   Pointer to action specification.
1131  * @param[out] error
1132  *   Pointer to the error structure.
1133  *
1134  * @return
1135  *   0 on success, a negative errno value otherwise and rte_errno is set.
1136  */
1137 static int
1138 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1139                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1140                                  const struct rte_flow_action *action,
1141                                  struct rte_flow_error *error)
1142 {
1143         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1144         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1145         struct rte_flow_item item = {
1146                 .spec = NULL,
1147                 .mask = &mask,
1148         };
1149         struct field_modify_info reg_src[] = {
1150                 {4, 0, reg_to_field[conf->src]},
1151                 {0, 0, 0},
1152         };
1153         struct field_modify_info reg_dst = {
1154                 .offset = 0,
1155                 .id = reg_to_field[conf->dst],
1156         };
1157         /* Adjust reg_c[0] usage according to reported mask. */
1158         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1159                 struct mlx5_priv *priv = dev->data->dev_private;
1160                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1161
1162                 MLX5_ASSERT(reg_c0);
1163                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1164                 if (conf->dst == REG_C_0) {
1165                         /* Copy to reg_c[0], within mask only. */
1166                         reg_dst.offset = rte_bsf32(reg_c0);
1167                         mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1168                 } else {
1169                         reg_dst.offset = 0;
1170                         mask = rte_cpu_to_be_32(reg_c0);
1171                 }
1172         }
1173         return flow_dv_convert_modify_action(&item,
1174                                              reg_src, &reg_dst, res,
1175                                              MLX5_MODIFICATION_TYPE_COPY,
1176                                              error);
1177 }
1178
1179 /**
1180  * Convert MARK action to DV specification. This routine is used
1181  * in extensive metadata only and requires metadata register to be
1182  * handled. In legacy mode hardware tag resource is engaged.
1183  *
1184  * @param[in] dev
1185  *   Pointer to the rte_eth_dev structure.
1186  * @param[in] conf
1187  *   Pointer to MARK action specification.
1188  * @param[in,out] resource
1189  *   Pointer to the modify-header resource.
1190  * @param[out] error
1191  *   Pointer to the error structure.
1192  *
1193  * @return
1194  *   0 on success, a negative errno value otherwise and rte_errno is set.
1195  */
1196 static int
1197 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1198                             const struct rte_flow_action_mark *conf,
1199                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1200                             struct rte_flow_error *error)
1201 {
1202         struct mlx5_priv *priv = dev->data->dev_private;
1203         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1204                                            priv->sh->dv_mark_mask);
1205         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1206         struct rte_flow_item item = {
1207                 .spec = &data,
1208                 .mask = &mask,
1209         };
1210         struct field_modify_info reg_c_x[] = {
1211                 [1] = {0, 0, 0},
1212         };
1213         int reg;
1214
1215         if (!mask)
1216                 return rte_flow_error_set(error, EINVAL,
1217                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1218                                           NULL, "zero mark action mask");
1219         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1220         if (reg < 0)
1221                 return reg;
1222         MLX5_ASSERT(reg > 0);
1223         if (reg == REG_C_0) {
1224                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1225                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1226
1227                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1228                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1229                 mask = rte_cpu_to_be_32(mask << shl_c0);
1230         }
1231         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1232         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1233                                              MLX5_MODIFICATION_TYPE_SET, error);
1234 }
1235
1236 /**
1237  * Get metadata register index for specified steering domain.
1238  *
1239  * @param[in] dev
1240  *   Pointer to the rte_eth_dev structure.
1241  * @param[in] attr
1242  *   Attributes of flow to determine steering domain.
1243  * @param[out] error
1244  *   Pointer to the error structure.
1245  *
1246  * @return
1247  *   positive index on success, a negative errno value otherwise
1248  *   and rte_errno is set.
1249  */
1250 static enum modify_reg
1251 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1252                          const struct rte_flow_attr *attr,
1253                          struct rte_flow_error *error)
1254 {
1255         int reg =
1256                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1257                                           MLX5_METADATA_FDB :
1258                                             attr->egress ?
1259                                             MLX5_METADATA_TX :
1260                                             MLX5_METADATA_RX, 0, error);
1261         if (reg < 0)
1262                 return rte_flow_error_set(error,
1263                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1264                                           NULL, "unavailable "
1265                                           "metadata register");
1266         return reg;
1267 }
1268
1269 /**
1270  * Convert SET_META action to DV specification.
1271  *
1272  * @param[in] dev
1273  *   Pointer to the rte_eth_dev structure.
1274  * @param[in,out] resource
1275  *   Pointer to the modify-header resource.
1276  * @param[in] attr
1277  *   Attributes of flow that includes this item.
1278  * @param[in] conf
1279  *   Pointer to action specification.
1280  * @param[out] error
1281  *   Pointer to the error structure.
1282  *
1283  * @return
1284  *   0 on success, a negative errno value otherwise and rte_errno is set.
1285  */
1286 static int
1287 flow_dv_convert_action_set_meta
1288                         (struct rte_eth_dev *dev,
1289                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1290                          const struct rte_flow_attr *attr,
1291                          const struct rte_flow_action_set_meta *conf,
1292                          struct rte_flow_error *error)
1293 {
1294         uint32_t mask = rte_cpu_to_be_32(conf->mask);
1295         uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1296         struct rte_flow_item item = {
1297                 .spec = &data,
1298                 .mask = &mask,
1299         };
1300         struct field_modify_info reg_c_x[] = {
1301                 [1] = {0, 0, 0},
1302         };
1303         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1304
1305         if (reg < 0)
1306                 return reg;
1307         MLX5_ASSERT(reg != REG_NON);
1308         if (reg == REG_C_0) {
1309                 struct mlx5_priv *priv = dev->data->dev_private;
1310                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1311                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1312
1313                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1314                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1315                 mask = rte_cpu_to_be_32(mask << shl_c0);
1316         }
1317         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1318         /* The routine expects parameters in memory as big-endian ones. */
1319         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1320                                              MLX5_MODIFICATION_TYPE_SET, error);
1321 }
1322
1323 /**
1324  * Convert modify-header set IPv4 DSCP action to DV specification.
1325  *
1326  * @param[in,out] resource
1327  *   Pointer to the modify-header resource.
1328  * @param[in] action
1329  *   Pointer to action specification.
1330  * @param[out] error
1331  *   Pointer to the error structure.
1332  *
1333  * @return
1334  *   0 on success, a negative errno value otherwise and rte_errno is set.
1335  */
1336 static int
1337 flow_dv_convert_action_modify_ipv4_dscp
1338                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1339                          const struct rte_flow_action *action,
1340                          struct rte_flow_error *error)
1341 {
1342         const struct rte_flow_action_set_dscp *conf =
1343                 (const struct rte_flow_action_set_dscp *)(action->conf);
1344         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1345         struct rte_flow_item_ipv4 ipv4;
1346         struct rte_flow_item_ipv4 ipv4_mask;
1347
1348         memset(&ipv4, 0, sizeof(ipv4));
1349         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1350         ipv4.hdr.type_of_service = conf->dscp;
1351         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1352         item.spec = &ipv4;
1353         item.mask = &ipv4_mask;
1354         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1355                                              MLX5_MODIFICATION_TYPE_SET, error);
1356 }
1357
1358 /**
1359  * Convert modify-header set IPv6 DSCP action to DV specification.
1360  *
1361  * @param[in,out] resource
1362  *   Pointer to the modify-header resource.
1363  * @param[in] action
1364  *   Pointer to action specification.
1365  * @param[out] error
1366  *   Pointer to the error structure.
1367  *
1368  * @return
1369  *   0 on success, a negative errno value otherwise and rte_errno is set.
1370  */
1371 static int
1372 flow_dv_convert_action_modify_ipv6_dscp
1373                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1374                          const struct rte_flow_action *action,
1375                          struct rte_flow_error *error)
1376 {
1377         const struct rte_flow_action_set_dscp *conf =
1378                 (const struct rte_flow_action_set_dscp *)(action->conf);
1379         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1380         struct rte_flow_item_ipv6 ipv6;
1381         struct rte_flow_item_ipv6 ipv6_mask;
1382
1383         memset(&ipv6, 0, sizeof(ipv6));
1384         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1385         /*
1386          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1387          * rdma-core only accept the DSCP bits byte aligned start from
1388          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1389          * bits in IPv6 case as rdma-core requires byte aligned value.
1390          */
1391         ipv6.hdr.vtc_flow = conf->dscp;
1392         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1393         item.spec = &ipv6;
1394         item.mask = &ipv6_mask;
1395         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1396                                              MLX5_MODIFICATION_TYPE_SET, error);
1397 }
1398
1399 static int
1400 mlx5_flow_item_field_width(struct rte_eth_dev *dev,
1401                            enum rte_flow_field_id field, int inherit,
1402                            const struct rte_flow_attr *attr,
1403                            struct rte_flow_error *error)
1404 {
1405         struct mlx5_priv *priv = dev->data->dev_private;
1406
1407         switch (field) {
1408         case RTE_FLOW_FIELD_START:
1409                 return 32;
1410         case RTE_FLOW_FIELD_MAC_DST:
1411         case RTE_FLOW_FIELD_MAC_SRC:
1412                 return 48;
1413         case RTE_FLOW_FIELD_VLAN_TYPE:
1414                 return 16;
1415         case RTE_FLOW_FIELD_VLAN_ID:
1416                 return 12;
1417         case RTE_FLOW_FIELD_MAC_TYPE:
1418                 return 16;
1419         case RTE_FLOW_FIELD_IPV4_DSCP:
1420                 return 6;
1421         case RTE_FLOW_FIELD_IPV4_TTL:
1422                 return 8;
1423         case RTE_FLOW_FIELD_IPV4_SRC:
1424         case RTE_FLOW_FIELD_IPV4_DST:
1425                 return 32;
1426         case RTE_FLOW_FIELD_IPV6_DSCP:
1427                 return 6;
1428         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1429                 return 8;
1430         case RTE_FLOW_FIELD_IPV6_SRC:
1431         case RTE_FLOW_FIELD_IPV6_DST:
1432                 return 128;
1433         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1434         case RTE_FLOW_FIELD_TCP_PORT_DST:
1435                 return 16;
1436         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1437         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1438                 return 32;
1439         case RTE_FLOW_FIELD_TCP_FLAGS:
1440                 return 9;
1441         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1442         case RTE_FLOW_FIELD_UDP_PORT_DST:
1443                 return 16;
1444         case RTE_FLOW_FIELD_VXLAN_VNI:
1445         case RTE_FLOW_FIELD_GENEVE_VNI:
1446                 return 24;
1447         case RTE_FLOW_FIELD_GTP_TEID:
1448         case RTE_FLOW_FIELD_TAG:
1449                 return 32;
1450         case RTE_FLOW_FIELD_MARK:
1451                 return __builtin_popcount(priv->sh->dv_mark_mask);
1452         case RTE_FLOW_FIELD_META:
1453                 return (flow_dv_get_metadata_reg(dev, attr, error) == REG_C_0) ?
1454                         __builtin_popcount(priv->sh->dv_meta_mask) : 32;
1455         case RTE_FLOW_FIELD_POINTER:
1456         case RTE_FLOW_FIELD_VALUE:
1457                 return inherit < 0 ? 0 : inherit;
1458         default:
1459                 MLX5_ASSERT(false);
1460         }
1461         return 0;
1462 }
1463
1464 static void
1465 mlx5_flow_field_id_to_modify_info
1466                 (const struct rte_flow_action_modify_data *data,
1467                  struct field_modify_info *info, uint32_t *mask,
1468                  uint32_t width, uint32_t *shift, struct rte_eth_dev *dev,
1469                  const struct rte_flow_attr *attr, struct rte_flow_error *error)
1470 {
1471         struct mlx5_priv *priv = dev->data->dev_private;
1472         uint32_t idx = 0;
1473         uint32_t off = 0;
1474
1475         switch (data->field) {
1476         case RTE_FLOW_FIELD_START:
1477                 /* not supported yet */
1478                 MLX5_ASSERT(false);
1479                 break;
1480         case RTE_FLOW_FIELD_MAC_DST:
1481                 off = data->offset > 16 ? data->offset - 16 : 0;
1482                 if (mask) {
1483                         if (data->offset < 16) {
1484                                 info[idx] = (struct field_modify_info){2, 4,
1485                                                 MLX5_MODI_OUT_DMAC_15_0};
1486                                 if (width < 16) {
1487                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1488                                                                  (16 - width));
1489                                         width = 0;
1490                                 } else {
1491                                         mask[1] = RTE_BE16(0xffff);
1492                                         width -= 16;
1493                                 }
1494                                 if (!width)
1495                                         break;
1496                                 ++idx;
1497                         }
1498                         info[idx] = (struct field_modify_info){4, 0,
1499                                                 MLX5_MODI_OUT_DMAC_47_16};
1500                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1501                                                     (32 - width)) << off);
1502                 } else {
1503                         if (data->offset < 16)
1504                                 info[idx++] = (struct field_modify_info){2, 0,
1505                                                 MLX5_MODI_OUT_DMAC_15_0};
1506                         info[idx] = (struct field_modify_info){4, 0,
1507                                                 MLX5_MODI_OUT_DMAC_47_16};
1508                 }
1509                 break;
1510         case RTE_FLOW_FIELD_MAC_SRC:
1511                 off = data->offset > 16 ? data->offset - 16 : 0;
1512                 if (mask) {
1513                         if (data->offset < 16) {
1514                                 info[idx] = (struct field_modify_info){2, 4,
1515                                                 MLX5_MODI_OUT_SMAC_15_0};
1516                                 if (width < 16) {
1517                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1518                                                                  (16 - width));
1519                                         width = 0;
1520                                 } else {
1521                                         mask[1] = RTE_BE16(0xffff);
1522                                         width -= 16;
1523                                 }
1524                                 if (!width)
1525                                         break;
1526                                 ++idx;
1527                         }
1528                         info[idx] = (struct field_modify_info){4, 0,
1529                                                 MLX5_MODI_OUT_SMAC_47_16};
1530                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1531                                                     (32 - width)) << off);
1532                 } else {
1533                         if (data->offset < 16)
1534                                 info[idx++] = (struct field_modify_info){2, 0,
1535                                                 MLX5_MODI_OUT_SMAC_15_0};
1536                         info[idx] = (struct field_modify_info){4, 0,
1537                                                 MLX5_MODI_OUT_SMAC_47_16};
1538                 }
1539                 break;
1540         case RTE_FLOW_FIELD_VLAN_TYPE:
1541                 /* not supported yet */
1542                 break;
1543         case RTE_FLOW_FIELD_VLAN_ID:
1544                 info[idx] = (struct field_modify_info){2, 0,
1545                                         MLX5_MODI_OUT_FIRST_VID};
1546                 if (mask)
1547                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1548                 break;
1549         case RTE_FLOW_FIELD_MAC_TYPE:
1550                 info[idx] = (struct field_modify_info){2, 0,
1551                                         MLX5_MODI_OUT_ETHERTYPE};
1552                 if (mask)
1553                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1554                 break;
1555         case RTE_FLOW_FIELD_IPV4_DSCP:
1556                 info[idx] = (struct field_modify_info){1, 0,
1557                                         MLX5_MODI_OUT_IP_DSCP};
1558                 if (mask)
1559                         mask[idx] = 0x3f >> (6 - width);
1560                 break;
1561         case RTE_FLOW_FIELD_IPV4_TTL:
1562                 info[idx] = (struct field_modify_info){1, 0,
1563                                         MLX5_MODI_OUT_IPV4_TTL};
1564                 if (mask)
1565                         mask[idx] = 0xff >> (8 - width);
1566                 break;
1567         case RTE_FLOW_FIELD_IPV4_SRC:
1568                 info[idx] = (struct field_modify_info){4, 0,
1569                                         MLX5_MODI_OUT_SIPV4};
1570                 if (mask)
1571                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1572                                                      (32 - width));
1573                 break;
1574         case RTE_FLOW_FIELD_IPV4_DST:
1575                 info[idx] = (struct field_modify_info){4, 0,
1576                                         MLX5_MODI_OUT_DIPV4};
1577                 if (mask)
1578                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1579                                                      (32 - width));
1580                 break;
1581         case RTE_FLOW_FIELD_IPV6_DSCP:
1582                 info[idx] = (struct field_modify_info){1, 0,
1583                                         MLX5_MODI_OUT_IP_DSCP};
1584                 if (mask)
1585                         mask[idx] = 0x3f >> (6 - width);
1586                 break;
1587         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1588                 info[idx] = (struct field_modify_info){1, 0,
1589                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1590                 if (mask)
1591                         mask[idx] = 0xff >> (8 - width);
1592                 break;
1593         case RTE_FLOW_FIELD_IPV6_SRC:
1594                 if (mask) {
1595                         if (data->offset < 32) {
1596                                 info[idx] = (struct field_modify_info){4, 12,
1597                                                 MLX5_MODI_OUT_SIPV6_31_0};
1598                                 if (width < 32) {
1599                                         mask[3] =
1600                                                 rte_cpu_to_be_32(0xffffffff >>
1601                                                                  (32 - width));
1602                                         width = 0;
1603                                 } else {
1604                                         mask[3] = RTE_BE32(0xffffffff);
1605                                         width -= 32;
1606                                 }
1607                                 if (!width)
1608                                         break;
1609                                 ++idx;
1610                         }
1611                         if (data->offset < 64) {
1612                                 info[idx] = (struct field_modify_info){4, 8,
1613                                                 MLX5_MODI_OUT_SIPV6_63_32};
1614                                 if (width < 32) {
1615                                         mask[2] =
1616                                                 rte_cpu_to_be_32(0xffffffff >>
1617                                                                  (32 - width));
1618                                         width = 0;
1619                                 } else {
1620                                         mask[2] = RTE_BE32(0xffffffff);
1621                                         width -= 32;
1622                                 }
1623                                 if (!width)
1624                                         break;
1625                                 ++idx;
1626                         }
1627                         if (data->offset < 96) {
1628                                 info[idx] = (struct field_modify_info){4, 4,
1629                                                 MLX5_MODI_OUT_SIPV6_95_64};
1630                                 if (width < 32) {
1631                                         mask[1] =
1632                                                 rte_cpu_to_be_32(0xffffffff >>
1633                                                                  (32 - width));
1634                                         width = 0;
1635                                 } else {
1636                                         mask[1] = RTE_BE32(0xffffffff);
1637                                         width -= 32;
1638                                 }
1639                                 if (!width)
1640                                         break;
1641                                 ++idx;
1642                         }
1643                         info[idx] = (struct field_modify_info){4, 0,
1644                                                 MLX5_MODI_OUT_SIPV6_127_96};
1645                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1646                 } else {
1647                         if (data->offset < 32)
1648                                 info[idx++] = (struct field_modify_info){4, 0,
1649                                                 MLX5_MODI_OUT_SIPV6_31_0};
1650                         if (data->offset < 64)
1651                                 info[idx++] = (struct field_modify_info){4, 0,
1652                                                 MLX5_MODI_OUT_SIPV6_63_32};
1653                         if (data->offset < 96)
1654                                 info[idx++] = (struct field_modify_info){4, 0,
1655                                                 MLX5_MODI_OUT_SIPV6_95_64};
1656                         if (data->offset < 128)
1657                                 info[idx++] = (struct field_modify_info){4, 0,
1658                                                 MLX5_MODI_OUT_SIPV6_127_96};
1659                 }
1660                 break;
1661         case RTE_FLOW_FIELD_IPV6_DST:
1662                 if (mask) {
1663                         if (data->offset < 32) {
1664                                 info[idx] = (struct field_modify_info){4, 12,
1665                                                 MLX5_MODI_OUT_DIPV6_31_0};
1666                                 if (width < 32) {
1667                                         mask[3] =
1668                                                 rte_cpu_to_be_32(0xffffffff >>
1669                                                                  (32 - width));
1670                                         width = 0;
1671                                 } else {
1672                                         mask[3] = RTE_BE32(0xffffffff);
1673                                         width -= 32;
1674                                 }
1675                                 if (!width)
1676                                         break;
1677                                 ++idx;
1678                         }
1679                         if (data->offset < 64) {
1680                                 info[idx] = (struct field_modify_info){4, 8,
1681                                                 MLX5_MODI_OUT_DIPV6_63_32};
1682                                 if (width < 32) {
1683                                         mask[2] =
1684                                                 rte_cpu_to_be_32(0xffffffff >>
1685                                                                  (32 - width));
1686                                         width = 0;
1687                                 } else {
1688                                         mask[2] = RTE_BE32(0xffffffff);
1689                                         width -= 32;
1690                                 }
1691                                 if (!width)
1692                                         break;
1693                                 ++idx;
1694                         }
1695                         if (data->offset < 96) {
1696                                 info[idx] = (struct field_modify_info){4, 4,
1697                                                 MLX5_MODI_OUT_DIPV6_95_64};
1698                                 if (width < 32) {
1699                                         mask[1] =
1700                                                 rte_cpu_to_be_32(0xffffffff >>
1701                                                                  (32 - width));
1702                                         width = 0;
1703                                 } else {
1704                                         mask[1] = RTE_BE32(0xffffffff);
1705                                         width -= 32;
1706                                 }
1707                                 if (!width)
1708                                         break;
1709                                 ++idx;
1710                         }
1711                         info[idx] = (struct field_modify_info){4, 0,
1712                                                 MLX5_MODI_OUT_DIPV6_127_96};
1713                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1714                 } else {
1715                         if (data->offset < 32)
1716                                 info[idx++] = (struct field_modify_info){4, 0,
1717                                                 MLX5_MODI_OUT_DIPV6_31_0};
1718                         if (data->offset < 64)
1719                                 info[idx++] = (struct field_modify_info){4, 0,
1720                                                 MLX5_MODI_OUT_DIPV6_63_32};
1721                         if (data->offset < 96)
1722                                 info[idx++] = (struct field_modify_info){4, 0,
1723                                                 MLX5_MODI_OUT_DIPV6_95_64};
1724                         if (data->offset < 128)
1725                                 info[idx++] = (struct field_modify_info){4, 0,
1726                                                 MLX5_MODI_OUT_DIPV6_127_96};
1727                 }
1728                 break;
1729         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1730                 info[idx] = (struct field_modify_info){2, 0,
1731                                         MLX5_MODI_OUT_TCP_SPORT};
1732                 if (mask)
1733                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1734                 break;
1735         case RTE_FLOW_FIELD_TCP_PORT_DST:
1736                 info[idx] = (struct field_modify_info){2, 0,
1737                                         MLX5_MODI_OUT_TCP_DPORT};
1738                 if (mask)
1739                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1740                 break;
1741         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1742                 info[idx] = (struct field_modify_info){4, 0,
1743                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1744                 if (mask)
1745                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1746                                                      (32 - width));
1747                 break;
1748         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1749                 info[idx] = (struct field_modify_info){4, 0,
1750                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1751                 if (mask)
1752                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1753                                                      (32 - width));
1754                 break;
1755         case RTE_FLOW_FIELD_TCP_FLAGS:
1756                 info[idx] = (struct field_modify_info){2, 0,
1757                                         MLX5_MODI_OUT_TCP_FLAGS};
1758                 if (mask)
1759                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1760                 break;
1761         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1762                 info[idx] = (struct field_modify_info){2, 0,
1763                                         MLX5_MODI_OUT_UDP_SPORT};
1764                 if (mask)
1765                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1766                 break;
1767         case RTE_FLOW_FIELD_UDP_PORT_DST:
1768                 info[idx] = (struct field_modify_info){2, 0,
1769                                         MLX5_MODI_OUT_UDP_DPORT};
1770                 if (mask)
1771                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1772                 break;
1773         case RTE_FLOW_FIELD_VXLAN_VNI:
1774                 /* not supported yet */
1775                 break;
1776         case RTE_FLOW_FIELD_GENEVE_VNI:
1777                 /* not supported yet*/
1778                 break;
1779         case RTE_FLOW_FIELD_GTP_TEID:
1780                 info[idx] = (struct field_modify_info){4, 0,
1781                                         MLX5_MODI_GTP_TEID};
1782                 if (mask)
1783                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1784                                                      (32 - width));
1785                 break;
1786         case RTE_FLOW_FIELD_TAG:
1787                 {
1788                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1789                                                    data->level, error);
1790                         if (reg < 0)
1791                                 return;
1792                         MLX5_ASSERT(reg != REG_NON);
1793                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1794                         info[idx] = (struct field_modify_info){4, 0,
1795                                                 reg_to_field[reg]};
1796                         if (mask)
1797                                 mask[idx] =
1798                                         rte_cpu_to_be_32(0xffffffff >>
1799                                                          (32 - width));
1800                 }
1801                 break;
1802         case RTE_FLOW_FIELD_MARK:
1803                 {
1804                         uint32_t mark_mask = priv->sh->dv_mark_mask;
1805                         uint32_t mark_count = __builtin_popcount(mark_mask);
1806                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1807                                                        0, error);
1808                         if (reg < 0)
1809                                 return;
1810                         MLX5_ASSERT(reg != REG_NON);
1811                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1812                         info[idx] = (struct field_modify_info){4, 0,
1813                                                 reg_to_field[reg]};
1814                         if (mask)
1815                                 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1816                                          (mark_count - width)) & mark_mask);
1817                 }
1818                 break;
1819         case RTE_FLOW_FIELD_META:
1820                 {
1821                         uint32_t meta_mask = priv->sh->dv_meta_mask;
1822                         uint32_t meta_count = __builtin_popcount(meta_mask);
1823                         uint32_t msk_c0 =
1824                                 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1825                         uint32_t shl_c0 = rte_bsf32(msk_c0);
1826                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1827                         if (reg < 0)
1828                                 return;
1829                         MLX5_ASSERT(reg != REG_NON);
1830                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1831                         if (reg == REG_C_0)
1832                                 *shift = shl_c0;
1833                         info[idx] = (struct field_modify_info){4, 0,
1834                                                 reg_to_field[reg]};
1835                         if (mask)
1836                                 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1837                                         (meta_count - width)) & meta_mask);
1838                 }
1839                 break;
1840         case RTE_FLOW_FIELD_POINTER:
1841         case RTE_FLOW_FIELD_VALUE:
1842         default:
1843                 MLX5_ASSERT(false);
1844                 break;
1845         }
1846 }
1847
1848 /**
1849  * Convert modify_field action to DV specification.
1850  *
1851  * @param[in] dev
1852  *   Pointer to the rte_eth_dev structure.
1853  * @param[in,out] resource
1854  *   Pointer to the modify-header resource.
1855  * @param[in] action
1856  *   Pointer to action specification.
1857  * @param[in] attr
1858  *   Attributes of flow that includes this item.
1859  * @param[out] error
1860  *   Pointer to the error structure.
1861  *
1862  * @return
1863  *   0 on success, a negative errno value otherwise and rte_errno is set.
1864  */
1865 static int
1866 flow_dv_convert_action_modify_field
1867                         (struct rte_eth_dev *dev,
1868                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1869                          const struct rte_flow_action *action,
1870                          const struct rte_flow_attr *attr,
1871                          struct rte_flow_error *error)
1872 {
1873         const struct rte_flow_action_modify_field *conf =
1874                 (const struct rte_flow_action_modify_field *)(action->conf);
1875         struct rte_flow_item item = {
1876                 .spec = NULL,
1877                 .mask = NULL
1878         };
1879         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1880                                                                 {0, 0, 0} };
1881         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1882                                                                 {0, 0, 0} };
1883         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1884         uint32_t type;
1885         uint32_t shift = 0;
1886
1887         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1888             conf->src.field == RTE_FLOW_FIELD_VALUE) {
1889                 type = MLX5_MODIFICATION_TYPE_SET;
1890                 /** For SET fill the destination field (field) first. */
1891                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1892                                                   conf->width, &shift, dev,
1893                                                   attr, error);
1894                 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1895                                         (void *)(uintptr_t)conf->src.pvalue :
1896                                         (void *)(uintptr_t)&conf->src.value;
1897         } else {
1898                 type = MLX5_MODIFICATION_TYPE_COPY;
1899                 /** For COPY fill the destination field (dcopy) without mask. */
1900                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1901                                                   conf->width, &shift, dev,
1902                                                   attr, error);
1903                 /** Then construct the source field (field) with mask. */
1904                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1905                                                   conf->width, &shift,
1906                                                   dev, attr, error);
1907         }
1908         item.mask = &mask;
1909         return flow_dv_convert_modify_action(&item,
1910                         field, dcopy, resource, type, error);
1911 }
1912
1913 /**
1914  * Validate MARK item.
1915  *
1916  * @param[in] dev
1917  *   Pointer to the rte_eth_dev structure.
1918  * @param[in] item
1919  *   Item specification.
1920  * @param[in] attr
1921  *   Attributes of flow that includes this item.
1922  * @param[out] error
1923  *   Pointer to error structure.
1924  *
1925  * @return
1926  *   0 on success, a negative errno value otherwise and rte_errno is set.
1927  */
1928 static int
1929 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1930                            const struct rte_flow_item *item,
1931                            const struct rte_flow_attr *attr __rte_unused,
1932                            struct rte_flow_error *error)
1933 {
1934         struct mlx5_priv *priv = dev->data->dev_private;
1935         struct mlx5_dev_config *config = &priv->config;
1936         const struct rte_flow_item_mark *spec = item->spec;
1937         const struct rte_flow_item_mark *mask = item->mask;
1938         const struct rte_flow_item_mark nic_mask = {
1939                 .id = priv->sh->dv_mark_mask,
1940         };
1941         int ret;
1942
1943         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1944                 return rte_flow_error_set(error, ENOTSUP,
1945                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1946                                           "extended metadata feature"
1947                                           " isn't enabled");
1948         if (!mlx5_flow_ext_mreg_supported(dev))
1949                 return rte_flow_error_set(error, ENOTSUP,
1950                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1951                                           "extended metadata register"
1952                                           " isn't supported");
1953         if (!nic_mask.id)
1954                 return rte_flow_error_set(error, ENOTSUP,
1955                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1956                                           "extended metadata register"
1957                                           " isn't available");
1958         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1959         if (ret < 0)
1960                 return ret;
1961         if (!spec)
1962                 return rte_flow_error_set(error, EINVAL,
1963                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1964                                           item->spec,
1965                                           "data cannot be empty");
1966         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1967                 return rte_flow_error_set(error, EINVAL,
1968                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1969                                           &spec->id,
1970                                           "mark id exceeds the limit");
1971         if (!mask)
1972                 mask = &nic_mask;
1973         if (!mask->id)
1974                 return rte_flow_error_set(error, EINVAL,
1975                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1976                                         "mask cannot be zero");
1977
1978         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1979                                         (const uint8_t *)&nic_mask,
1980                                         sizeof(struct rte_flow_item_mark),
1981                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1982         if (ret < 0)
1983                 return ret;
1984         return 0;
1985 }
1986
1987 /**
1988  * Validate META item.
1989  *
1990  * @param[in] dev
1991  *   Pointer to the rte_eth_dev structure.
1992  * @param[in] item
1993  *   Item specification.
1994  * @param[in] attr
1995  *   Attributes of flow that includes this item.
1996  * @param[out] error
1997  *   Pointer to error structure.
1998  *
1999  * @return
2000  *   0 on success, a negative errno value otherwise and rte_errno is set.
2001  */
2002 static int
2003 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
2004                            const struct rte_flow_item *item,
2005                            const struct rte_flow_attr *attr,
2006                            struct rte_flow_error *error)
2007 {
2008         struct mlx5_priv *priv = dev->data->dev_private;
2009         struct mlx5_dev_config *config = &priv->config;
2010         const struct rte_flow_item_meta *spec = item->spec;
2011         const struct rte_flow_item_meta *mask = item->mask;
2012         struct rte_flow_item_meta nic_mask = {
2013                 .data = UINT32_MAX
2014         };
2015         int reg;
2016         int ret;
2017
2018         if (!spec)
2019                 return rte_flow_error_set(error, EINVAL,
2020                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2021                                           item->spec,
2022                                           "data cannot be empty");
2023         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2024                 if (!mlx5_flow_ext_mreg_supported(dev))
2025                         return rte_flow_error_set(error, ENOTSUP,
2026                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2027                                           "extended metadata register"
2028                                           " isn't supported");
2029                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2030                 if (reg < 0)
2031                         return reg;
2032                 if (reg == REG_NON)
2033                         return rte_flow_error_set(error, ENOTSUP,
2034                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2035                                         "unavalable extended metadata register");
2036                 if (reg == REG_B)
2037                         return rte_flow_error_set(error, ENOTSUP,
2038                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2039                                           "match on reg_b "
2040                                           "isn't supported");
2041                 if (reg != REG_A)
2042                         nic_mask.data = priv->sh->dv_meta_mask;
2043         } else {
2044                 if (attr->transfer)
2045                         return rte_flow_error_set(error, ENOTSUP,
2046                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2047                                         "extended metadata feature "
2048                                         "should be enabled when "
2049                                         "meta item is requested "
2050                                         "with e-switch mode ");
2051                 if (attr->ingress)
2052                         return rte_flow_error_set(error, ENOTSUP,
2053                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2054                                         "match on metadata for ingress "
2055                                         "is not supported in legacy "
2056                                         "metadata mode");
2057         }
2058         if (!mask)
2059                 mask = &rte_flow_item_meta_mask;
2060         if (!mask->data)
2061                 return rte_flow_error_set(error, EINVAL,
2062                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2063                                         "mask cannot be zero");
2064
2065         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2066                                         (const uint8_t *)&nic_mask,
2067                                         sizeof(struct rte_flow_item_meta),
2068                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2069         return ret;
2070 }
2071
2072 /**
2073  * Validate TAG item.
2074  *
2075  * @param[in] dev
2076  *   Pointer to the rte_eth_dev structure.
2077  * @param[in] item
2078  *   Item specification.
2079  * @param[in] attr
2080  *   Attributes of flow that includes this item.
2081  * @param[out] error
2082  *   Pointer to error structure.
2083  *
2084  * @return
2085  *   0 on success, a negative errno value otherwise and rte_errno is set.
2086  */
2087 static int
2088 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2089                           const struct rte_flow_item *item,
2090                           const struct rte_flow_attr *attr __rte_unused,
2091                           struct rte_flow_error *error)
2092 {
2093         const struct rte_flow_item_tag *spec = item->spec;
2094         const struct rte_flow_item_tag *mask = item->mask;
2095         const struct rte_flow_item_tag nic_mask = {
2096                 .data = RTE_BE32(UINT32_MAX),
2097                 .index = 0xff,
2098         };
2099         int ret;
2100
2101         if (!mlx5_flow_ext_mreg_supported(dev))
2102                 return rte_flow_error_set(error, ENOTSUP,
2103                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2104                                           "extensive metadata register"
2105                                           " isn't supported");
2106         if (!spec)
2107                 return rte_flow_error_set(error, EINVAL,
2108                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2109                                           item->spec,
2110                                           "data cannot be empty");
2111         if (!mask)
2112                 mask = &rte_flow_item_tag_mask;
2113         if (!mask->data)
2114                 return rte_flow_error_set(error, EINVAL,
2115                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2116                                         "mask cannot be zero");
2117
2118         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2119                                         (const uint8_t *)&nic_mask,
2120                                         sizeof(struct rte_flow_item_tag),
2121                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2122         if (ret < 0)
2123                 return ret;
2124         if (mask->index != 0xff)
2125                 return rte_flow_error_set(error, EINVAL,
2126                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2127                                           "partial mask for tag index"
2128                                           " is not supported");
2129         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2130         if (ret < 0)
2131                 return ret;
2132         MLX5_ASSERT(ret != REG_NON);
2133         return 0;
2134 }
2135
2136 /**
2137  * Validate vport item.
2138  *
2139  * @param[in] dev
2140  *   Pointer to the rte_eth_dev structure.
2141  * @param[in] item
2142  *   Item specification.
2143  * @param[in] attr
2144  *   Attributes of flow that includes this item.
2145  * @param[in] item_flags
2146  *   Bit-fields that holds the items detected until now.
2147  * @param[out] error
2148  *   Pointer to error structure.
2149  *
2150  * @return
2151  *   0 on success, a negative errno value otherwise and rte_errno is set.
2152  */
2153 static int
2154 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2155                               const struct rte_flow_item *item,
2156                               const struct rte_flow_attr *attr,
2157                               uint64_t item_flags,
2158                               struct rte_flow_error *error)
2159 {
2160         const struct rte_flow_item_port_id *spec = item->spec;
2161         const struct rte_flow_item_port_id *mask = item->mask;
2162         const struct rte_flow_item_port_id switch_mask = {
2163                         .id = 0xffffffff,
2164         };
2165         struct mlx5_priv *esw_priv;
2166         struct mlx5_priv *dev_priv;
2167         int ret;
2168
2169         if (!attr->transfer)
2170                 return rte_flow_error_set(error, EINVAL,
2171                                           RTE_FLOW_ERROR_TYPE_ITEM,
2172                                           NULL,
2173                                           "match on port id is valid only"
2174                                           " when transfer flag is enabled");
2175         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2176                 return rte_flow_error_set(error, ENOTSUP,
2177                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2178                                           "multiple source ports are not"
2179                                           " supported");
2180         if (!mask)
2181                 mask = &switch_mask;
2182         if (mask->id != 0xffffffff)
2183                 return rte_flow_error_set(error, ENOTSUP,
2184                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2185                                            mask,
2186                                            "no support for partial mask on"
2187                                            " \"id\" field");
2188         ret = mlx5_flow_item_acceptable
2189                                 (item, (const uint8_t *)mask,
2190                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2191                                  sizeof(struct rte_flow_item_port_id),
2192                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2193         if (ret)
2194                 return ret;
2195         if (!spec)
2196                 return 0;
2197         if (spec->id == MLX5_PORT_ESW_MGR)
2198                 return 0;
2199         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2200         if (!esw_priv)
2201                 return rte_flow_error_set(error, rte_errno,
2202                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2203                                           "failed to obtain E-Switch info for"
2204                                           " port");
2205         dev_priv = mlx5_dev_to_eswitch_info(dev);
2206         if (!dev_priv)
2207                 return rte_flow_error_set(error, rte_errno,
2208                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2209                                           NULL,
2210                                           "failed to obtain E-Switch info");
2211         if (esw_priv->domain_id != dev_priv->domain_id)
2212                 return rte_flow_error_set(error, EINVAL,
2213                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2214                                           "cannot match on a port from a"
2215                                           " different E-Switch");
2216         return 0;
2217 }
2218
2219 /**
2220  * Validate VLAN item.
2221  *
2222  * @param[in] item
2223  *   Item specification.
2224  * @param[in] item_flags
2225  *   Bit-fields that holds the items detected until now.
2226  * @param[in] dev
2227  *   Ethernet device flow is being created on.
2228  * @param[out] error
2229  *   Pointer to error structure.
2230  *
2231  * @return
2232  *   0 on success, a negative errno value otherwise and rte_errno is set.
2233  */
2234 static int
2235 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2236                            uint64_t item_flags,
2237                            struct rte_eth_dev *dev,
2238                            struct rte_flow_error *error)
2239 {
2240         const struct rte_flow_item_vlan *mask = item->mask;
2241         const struct rte_flow_item_vlan nic_mask = {
2242                 .tci = RTE_BE16(UINT16_MAX),
2243                 .inner_type = RTE_BE16(UINT16_MAX),
2244                 .has_more_vlan = 1,
2245         };
2246         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2247         int ret;
2248         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2249                                         MLX5_FLOW_LAYER_INNER_L4) :
2250                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2251                                         MLX5_FLOW_LAYER_OUTER_L4);
2252         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2253                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2254
2255         if (item_flags & vlanm)
2256                 return rte_flow_error_set(error, EINVAL,
2257                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2258                                           "multiple VLAN layers not supported");
2259         else if ((item_flags & l34m) != 0)
2260                 return rte_flow_error_set(error, EINVAL,
2261                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2262                                           "VLAN cannot follow L3/L4 layer");
2263         if (!mask)
2264                 mask = &rte_flow_item_vlan_mask;
2265         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2266                                         (const uint8_t *)&nic_mask,
2267                                         sizeof(struct rte_flow_item_vlan),
2268                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2269         if (ret)
2270                 return ret;
2271         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2272                 struct mlx5_priv *priv = dev->data->dev_private;
2273
2274                 if (priv->vmwa_context) {
2275                         /*
2276                          * Non-NULL context means we have a virtual machine
2277                          * and SR-IOV enabled, we have to create VLAN interface
2278                          * to make hypervisor to setup E-Switch vport
2279                          * context correctly. We avoid creating the multiple
2280                          * VLAN interfaces, so we cannot support VLAN tag mask.
2281                          */
2282                         return rte_flow_error_set(error, EINVAL,
2283                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2284                                                   item,
2285                                                   "VLAN tag mask is not"
2286                                                   " supported in virtual"
2287                                                   " environment");
2288                 }
2289         }
2290         return 0;
2291 }
2292
2293 /*
2294  * GTP flags are contained in 1 byte of the format:
2295  * -------------------------------------------
2296  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2297  * |-----------------------------------------|
2298  * | value | Version | PT | Res | E | S | PN |
2299  * -------------------------------------------
2300  *
2301  * Matching is supported only for GTP flags E, S, PN.
2302  */
2303 #define MLX5_GTP_FLAGS_MASK     0x07
2304
2305 /**
2306  * Validate GTP item.
2307  *
2308  * @param[in] dev
2309  *   Pointer to the rte_eth_dev structure.
2310  * @param[in] item
2311  *   Item specification.
2312  * @param[in] item_flags
2313  *   Bit-fields that holds the items detected until now.
2314  * @param[out] error
2315  *   Pointer to error structure.
2316  *
2317  * @return
2318  *   0 on success, a negative errno value otherwise and rte_errno is set.
2319  */
2320 static int
2321 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2322                           const struct rte_flow_item *item,
2323                           uint64_t item_flags,
2324                           struct rte_flow_error *error)
2325 {
2326         struct mlx5_priv *priv = dev->data->dev_private;
2327         const struct rte_flow_item_gtp *spec = item->spec;
2328         const struct rte_flow_item_gtp *mask = item->mask;
2329         const struct rte_flow_item_gtp nic_mask = {
2330                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2331                 .msg_type = 0xff,
2332                 .teid = RTE_BE32(0xffffffff),
2333         };
2334
2335         if (!priv->config.hca_attr.tunnel_stateless_gtp)
2336                 return rte_flow_error_set(error, ENOTSUP,
2337                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2338                                           "GTP support is not enabled");
2339         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2340                 return rte_flow_error_set(error, ENOTSUP,
2341                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2342                                           "multiple tunnel layers not"
2343                                           " supported");
2344         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2345                 return rte_flow_error_set(error, EINVAL,
2346                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2347                                           "no outer UDP layer found");
2348         if (!mask)
2349                 mask = &rte_flow_item_gtp_mask;
2350         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2351                 return rte_flow_error_set(error, ENOTSUP,
2352                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2353                                           "Match is supported for GTP"
2354                                           " flags only");
2355         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2356                                          (const uint8_t *)&nic_mask,
2357                                          sizeof(struct rte_flow_item_gtp),
2358                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2359 }
2360
2361 /**
2362  * Validate GTP PSC item.
2363  *
2364  * @param[in] item
2365  *   Item specification.
2366  * @param[in] last_item
2367  *   Previous validated item in the pattern items.
2368  * @param[in] gtp_item
2369  *   Previous GTP item specification.
2370  * @param[in] attr
2371  *   Pointer to flow attributes.
2372  * @param[out] error
2373  *   Pointer to error structure.
2374  *
2375  * @return
2376  *   0 on success, a negative errno value otherwise and rte_errno is set.
2377  */
2378 static int
2379 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2380                               uint64_t last_item,
2381                               const struct rte_flow_item *gtp_item,
2382                               const struct rte_flow_attr *attr,
2383                               struct rte_flow_error *error)
2384 {
2385         const struct rte_flow_item_gtp *gtp_spec;
2386         const struct rte_flow_item_gtp *gtp_mask;
2387         const struct rte_flow_item_gtp_psc *mask;
2388         const struct rte_flow_item_gtp_psc nic_mask = {
2389                 .hdr.type = 0xF,
2390                 .hdr.qfi = 0x3F,
2391         };
2392
2393         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2394                 return rte_flow_error_set
2395                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2396                          "GTP PSC item must be preceded with GTP item");
2397         gtp_spec = gtp_item->spec;
2398         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2399         /* GTP spec and E flag is requested to match zero. */
2400         if (gtp_spec &&
2401                 (gtp_mask->v_pt_rsv_flags &
2402                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2403                 return rte_flow_error_set
2404                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2405                          "GTP E flag must be 1 to match GTP PSC");
2406         /* Check the flow is not created in group zero. */
2407         if (!attr->transfer && !attr->group)
2408                 return rte_flow_error_set
2409                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2410                          "GTP PSC is not supported for group 0");
2411         /* GTP spec is here and E flag is requested to match zero. */
2412         if (!item->spec)
2413                 return 0;
2414         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2415         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2416                                          (const uint8_t *)&nic_mask,
2417                                          sizeof(struct rte_flow_item_gtp_psc),
2418                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2419 }
2420
2421 /**
2422  * Validate IPV4 item.
2423  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2424  * add specific validation of fragment_offset field,
2425  *
2426  * @param[in] item
2427  *   Item specification.
2428  * @param[in] item_flags
2429  *   Bit-fields that holds the items detected until now.
2430  * @param[out] error
2431  *   Pointer to error structure.
2432  *
2433  * @return
2434  *   0 on success, a negative errno value otherwise and rte_errno is set.
2435  */
2436 static int
2437 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2438                            const struct rte_flow_item *item,
2439                            uint64_t item_flags, uint64_t last_item,
2440                            uint16_t ether_type, struct rte_flow_error *error)
2441 {
2442         int ret;
2443         struct mlx5_priv *priv = dev->data->dev_private;
2444         const struct rte_flow_item_ipv4 *spec = item->spec;
2445         const struct rte_flow_item_ipv4 *last = item->last;
2446         const struct rte_flow_item_ipv4 *mask = item->mask;
2447         rte_be16_t fragment_offset_spec = 0;
2448         rte_be16_t fragment_offset_last = 0;
2449         struct rte_flow_item_ipv4 nic_ipv4_mask = {
2450                 .hdr = {
2451                         .src_addr = RTE_BE32(0xffffffff),
2452                         .dst_addr = RTE_BE32(0xffffffff),
2453                         .type_of_service = 0xff,
2454                         .fragment_offset = RTE_BE16(0xffff),
2455                         .next_proto_id = 0xff,
2456                         .time_to_live = 0xff,
2457                 },
2458         };
2459
2460         if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2461                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2462                 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2463                                priv->config.hca_attr.inner_ipv4_ihl;
2464                 if (!ihl_cap)
2465                         return rte_flow_error_set(error, ENOTSUP,
2466                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2467                                                   item,
2468                                                   "IPV4 ihl offload not supported");
2469                 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2470         }
2471         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2472                                            ether_type, &nic_ipv4_mask,
2473                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2474         if (ret < 0)
2475                 return ret;
2476         if (spec && mask)
2477                 fragment_offset_spec = spec->hdr.fragment_offset &
2478                                        mask->hdr.fragment_offset;
2479         if (!fragment_offset_spec)
2480                 return 0;
2481         /*
2482          * spec and mask are valid, enforce using full mask to make sure the
2483          * complete value is used correctly.
2484          */
2485         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2486                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2487                 return rte_flow_error_set(error, EINVAL,
2488                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2489                                           item, "must use full mask for"
2490                                           " fragment_offset");
2491         /*
2492          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2493          * indicating this is 1st fragment of fragmented packet.
2494          * This is not yet supported in MLX5, return appropriate error message.
2495          */
2496         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2497                 return rte_flow_error_set(error, ENOTSUP,
2498                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2499                                           "match on first fragment not "
2500                                           "supported");
2501         if (fragment_offset_spec && !last)
2502                 return rte_flow_error_set(error, ENOTSUP,
2503                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2504                                           "specified value not supported");
2505         /* spec and last are valid, validate the specified range. */
2506         fragment_offset_last = last->hdr.fragment_offset &
2507                                mask->hdr.fragment_offset;
2508         /*
2509          * Match on fragment_offset spec 0x2001 and last 0x3fff
2510          * means MF is 1 and frag-offset is > 0.
2511          * This packet is fragment 2nd and onward, excluding last.
2512          * This is not yet supported in MLX5, return appropriate
2513          * error message.
2514          */
2515         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2516             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2517                 return rte_flow_error_set(error, ENOTSUP,
2518                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2519                                           last, "match on following "
2520                                           "fragments not supported");
2521         /*
2522          * Match on fragment_offset spec 0x0001 and last 0x1fff
2523          * means MF is 0 and frag-offset is > 0.
2524          * This packet is last fragment of fragmented packet.
2525          * This is not yet supported in MLX5, return appropriate
2526          * error message.
2527          */
2528         if (fragment_offset_spec == RTE_BE16(1) &&
2529             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2530                 return rte_flow_error_set(error, ENOTSUP,
2531                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2532                                           last, "match on last "
2533                                           "fragment not supported");
2534         /*
2535          * Match on fragment_offset spec 0x0001 and last 0x3fff
2536          * means MF and/or frag-offset is not 0.
2537          * This is a fragmented packet.
2538          * Other range values are invalid and rejected.
2539          */
2540         if (!(fragment_offset_spec == RTE_BE16(1) &&
2541               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2542                 return rte_flow_error_set(error, ENOTSUP,
2543                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2544                                           "specified range not supported");
2545         return 0;
2546 }
2547
2548 /**
2549  * Validate IPV6 fragment extension item.
2550  *
2551  * @param[in] item
2552  *   Item specification.
2553  * @param[in] item_flags
2554  *   Bit-fields that holds the items detected until now.
2555  * @param[out] error
2556  *   Pointer to error structure.
2557  *
2558  * @return
2559  *   0 on success, a negative errno value otherwise and rte_errno is set.
2560  */
2561 static int
2562 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2563                                     uint64_t item_flags,
2564                                     struct rte_flow_error *error)
2565 {
2566         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2567         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2568         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2569         rte_be16_t frag_data_spec = 0;
2570         rte_be16_t frag_data_last = 0;
2571         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2572         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2573                                       MLX5_FLOW_LAYER_OUTER_L4;
2574         int ret = 0;
2575         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2576                 .hdr = {
2577                         .next_header = 0xff,
2578                         .frag_data = RTE_BE16(0xffff),
2579                 },
2580         };
2581
2582         if (item_flags & l4m)
2583                 return rte_flow_error_set(error, EINVAL,
2584                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2585                                           "ipv6 fragment extension item cannot "
2586                                           "follow L4 item.");
2587         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2588             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2589                 return rte_flow_error_set(error, EINVAL,
2590                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2591                                           "ipv6 fragment extension item must "
2592                                           "follow ipv6 item");
2593         if (spec && mask)
2594                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2595         if (!frag_data_spec)
2596                 return 0;
2597         /*
2598          * spec and mask are valid, enforce using full mask to make sure the
2599          * complete value is used correctly.
2600          */
2601         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2602                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2603                 return rte_flow_error_set(error, EINVAL,
2604                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2605                                           item, "must use full mask for"
2606                                           " frag_data");
2607         /*
2608          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2609          * This is 1st fragment of fragmented packet.
2610          */
2611         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2612                 return rte_flow_error_set(error, ENOTSUP,
2613                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2614                                           "match on first fragment not "
2615                                           "supported");
2616         if (frag_data_spec && !last)
2617                 return rte_flow_error_set(error, EINVAL,
2618                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2619                                           "specified value not supported");
2620         ret = mlx5_flow_item_acceptable
2621                                 (item, (const uint8_t *)mask,
2622                                  (const uint8_t *)&nic_mask,
2623                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2624                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2625         if (ret)
2626                 return ret;
2627         /* spec and last are valid, validate the specified range. */
2628         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2629         /*
2630          * Match on frag_data spec 0x0009 and last 0xfff9
2631          * means M is 1 and frag-offset is > 0.
2632          * This packet is fragment 2nd and onward, excluding last.
2633          * This is not yet supported in MLX5, return appropriate
2634          * error message.
2635          */
2636         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2637                                        RTE_IPV6_EHDR_MF_MASK) &&
2638             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2639                 return rte_flow_error_set(error, ENOTSUP,
2640                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2641                                           last, "match on following "
2642                                           "fragments not supported");
2643         /*
2644          * Match on frag_data spec 0x0008 and last 0xfff8
2645          * means M is 0 and frag-offset is > 0.
2646          * This packet is last fragment of fragmented packet.
2647          * This is not yet supported in MLX5, return appropriate
2648          * error message.
2649          */
2650         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2651             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2652                 return rte_flow_error_set(error, ENOTSUP,
2653                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2654                                           last, "match on last "
2655                                           "fragment not supported");
2656         /* Other range values are invalid and rejected. */
2657         return rte_flow_error_set(error, EINVAL,
2658                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2659                                   "specified range not supported");
2660 }
2661
2662 /*
2663  * Validate ASO CT item.
2664  *
2665  * @param[in] dev
2666  *   Pointer to the rte_eth_dev structure.
2667  * @param[in] item
2668  *   Item specification.
2669  * @param[in] item_flags
2670  *   Pointer to bit-fields that holds the items detected until now.
2671  * @param[out] error
2672  *   Pointer to error structure.
2673  *
2674  * @return
2675  *   0 on success, a negative errno value otherwise and rte_errno is set.
2676  */
2677 static int
2678 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2679                              const struct rte_flow_item *item,
2680                              uint64_t *item_flags,
2681                              struct rte_flow_error *error)
2682 {
2683         const struct rte_flow_item_conntrack *spec = item->spec;
2684         const struct rte_flow_item_conntrack *mask = item->mask;
2685         RTE_SET_USED(dev);
2686         uint32_t flags;
2687
2688         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2689                 return rte_flow_error_set(error, EINVAL,
2690                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2691                                           "Only one CT is supported");
2692         if (!mask)
2693                 mask = &rte_flow_item_conntrack_mask;
2694         flags = spec->flags & mask->flags;
2695         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2696             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2697              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2698              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2699                 return rte_flow_error_set(error, EINVAL,
2700                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2701                                           "Conflict status bits");
2702         /* State change also needs to be considered. */
2703         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2704         return 0;
2705 }
2706
2707 /**
2708  * Validate the pop VLAN action.
2709  *
2710  * @param[in] dev
2711  *   Pointer to the rte_eth_dev structure.
2712  * @param[in] action_flags
2713  *   Holds the actions detected until now.
2714  * @param[in] action
2715  *   Pointer to the pop vlan action.
2716  * @param[in] item_flags
2717  *   The items found in this flow rule.
2718  * @param[in] attr
2719  *   Pointer to flow attributes.
2720  * @param[out] error
2721  *   Pointer to error structure.
2722  *
2723  * @return
2724  *   0 on success, a negative errno value otherwise and rte_errno is set.
2725  */
2726 static int
2727 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2728                                  uint64_t action_flags,
2729                                  const struct rte_flow_action *action,
2730                                  uint64_t item_flags,
2731                                  const struct rte_flow_attr *attr,
2732                                  struct rte_flow_error *error)
2733 {
2734         const struct mlx5_priv *priv = dev->data->dev_private;
2735         struct mlx5_dev_ctx_shared *sh = priv->sh;
2736         bool direction_error = false;
2737
2738         if (!priv->sh->pop_vlan_action)
2739                 return rte_flow_error_set(error, ENOTSUP,
2740                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2741                                           NULL,
2742                                           "pop vlan action is not supported");
2743         /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2744         if (attr->transfer) {
2745                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2746                 bool is_cx5 = sh->steering_format_version ==
2747                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2748
2749                 if (fdb_tx && is_cx5)
2750                         direction_error = true;
2751         } else if (attr->egress) {
2752                 direction_error = true;
2753         }
2754         if (direction_error)
2755                 return rte_flow_error_set(error, ENOTSUP,
2756                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2757                                           NULL,
2758                                           "pop vlan action not supported for egress");
2759         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2760                 return rte_flow_error_set(error, ENOTSUP,
2761                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2762                                           "no support for multiple VLAN "
2763                                           "actions");
2764         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2765         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2766             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2767                 return rte_flow_error_set(error, ENOTSUP,
2768                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2769                                           NULL,
2770                                           "cannot pop vlan after decap without "
2771                                           "match on inner vlan in the flow");
2772         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2773         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2774             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2775                 return rte_flow_error_set(error, ENOTSUP,
2776                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2777                                           NULL,
2778                                           "cannot pop vlan without a "
2779                                           "match on (outer) vlan in the flow");
2780         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2781                 return rte_flow_error_set(error, EINVAL,
2782                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2783                                           "wrong action order, port_id should "
2784                                           "be after pop VLAN action");
2785         if (!attr->transfer && priv->representor)
2786                 return rte_flow_error_set(error, ENOTSUP,
2787                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2788                                           "pop vlan action for VF representor "
2789                                           "not supported on NIC table");
2790         return 0;
2791 }
2792
2793 /**
2794  * Get VLAN default info from vlan match info.
2795  *
2796  * @param[in] items
2797  *   the list of item specifications.
2798  * @param[out] vlan
2799  *   pointer VLAN info to fill to.
2800  *
2801  * @return
2802  *   0 on success, a negative errno value otherwise and rte_errno is set.
2803  */
2804 static void
2805 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2806                                   struct rte_vlan_hdr *vlan)
2807 {
2808         const struct rte_flow_item_vlan nic_mask = {
2809                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2810                                 MLX5DV_FLOW_VLAN_VID_MASK),
2811                 .inner_type = RTE_BE16(0xffff),
2812         };
2813
2814         if (items == NULL)
2815                 return;
2816         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2817                 int type = items->type;
2818
2819                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2820                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2821                         break;
2822         }
2823         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2824                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2825                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2826
2827                 /* If VLAN item in pattern doesn't contain data, return here. */
2828                 if (!vlan_v)
2829                         return;
2830                 if (!vlan_m)
2831                         vlan_m = &nic_mask;
2832                 /* Only full match values are accepted */
2833                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2834                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2835                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2836                         vlan->vlan_tci |=
2837                                 rte_be_to_cpu_16(vlan_v->tci &
2838                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2839                 }
2840                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2841                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2842                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2843                         vlan->vlan_tci |=
2844                                 rte_be_to_cpu_16(vlan_v->tci &
2845                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2846                 }
2847                 if (vlan_m->inner_type == nic_mask.inner_type)
2848                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2849                                                            vlan_m->inner_type);
2850         }
2851 }
2852
2853 /**
2854  * Validate the push VLAN action.
2855  *
2856  * @param[in] dev
2857  *   Pointer to the rte_eth_dev structure.
2858  * @param[in] action_flags
2859  *   Holds the actions detected until now.
2860  * @param[in] item_flags
2861  *   The items found in this flow rule.
2862  * @param[in] action
2863  *   Pointer to the action structure.
2864  * @param[in] attr
2865  *   Pointer to flow attributes
2866  * @param[out] error
2867  *   Pointer to error structure.
2868  *
2869  * @return
2870  *   0 on success, a negative errno value otherwise and rte_errno is set.
2871  */
2872 static int
2873 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2874                                   uint64_t action_flags,
2875                                   const struct rte_flow_item_vlan *vlan_m,
2876                                   const struct rte_flow_action *action,
2877                                   const struct rte_flow_attr *attr,
2878                                   struct rte_flow_error *error)
2879 {
2880         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2881         const struct mlx5_priv *priv = dev->data->dev_private;
2882         struct mlx5_dev_ctx_shared *sh = priv->sh;
2883         bool direction_error = false;
2884
2885         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2886             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2887                 return rte_flow_error_set(error, EINVAL,
2888                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2889                                           "invalid vlan ethertype");
2890         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2891                 return rte_flow_error_set(error, EINVAL,
2892                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2893                                           "wrong action order, port_id should "
2894                                           "be after push VLAN");
2895         /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2896         if (attr->transfer) {
2897                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2898                 bool is_cx5 = sh->steering_format_version ==
2899                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2900
2901                 if (!fdb_tx && is_cx5)
2902                         direction_error = true;
2903         } else if (attr->ingress) {
2904                 direction_error = true;
2905         }
2906         if (direction_error)
2907                 return rte_flow_error_set(error, ENOTSUP,
2908                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2909                                           NULL,
2910                                           "push vlan action not supported for ingress");
2911         if (!attr->transfer && priv->representor)
2912                 return rte_flow_error_set(error, ENOTSUP,
2913                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2914                                           "push vlan action for VF representor "
2915                                           "not supported on NIC table");
2916         if (vlan_m &&
2917             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2918             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2919                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2920             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2921             !(mlx5_flow_find_action
2922                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2923                 return rte_flow_error_set(error, EINVAL,
2924                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2925                                           "not full match mask on VLAN PCP and "
2926                                           "there is no of_set_vlan_pcp action, "
2927                                           "push VLAN action cannot figure out "
2928                                           "PCP value");
2929         if (vlan_m &&
2930             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2931             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2932                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2933             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2934             !(mlx5_flow_find_action
2935                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2936                 return rte_flow_error_set(error, EINVAL,
2937                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2938                                           "not full match mask on VLAN VID and "
2939                                           "there is no of_set_vlan_vid action, "
2940                                           "push VLAN action cannot figure out "
2941                                           "VID value");
2942         (void)attr;
2943         return 0;
2944 }
2945
2946 /**
2947  * Validate the set VLAN PCP.
2948  *
2949  * @param[in] action_flags
2950  *   Holds the actions detected until now.
2951  * @param[in] actions
2952  *   Pointer to the list of actions remaining in the flow rule.
2953  * @param[out] error
2954  *   Pointer to error structure.
2955  *
2956  * @return
2957  *   0 on success, a negative errno value otherwise and rte_errno is set.
2958  */
2959 static int
2960 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2961                                      const struct rte_flow_action actions[],
2962                                      struct rte_flow_error *error)
2963 {
2964         const struct rte_flow_action *action = actions;
2965         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2966
2967         if (conf->vlan_pcp > 7)
2968                 return rte_flow_error_set(error, EINVAL,
2969                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2970                                           "VLAN PCP value is too big");
2971         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2972                 return rte_flow_error_set(error, ENOTSUP,
2973                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2974                                           "set VLAN PCP action must follow "
2975                                           "the push VLAN action");
2976         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2977                 return rte_flow_error_set(error, ENOTSUP,
2978                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2979                                           "Multiple VLAN PCP modification are "
2980                                           "not supported");
2981         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2982                 return rte_flow_error_set(error, EINVAL,
2983                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2984                                           "wrong action order, port_id should "
2985                                           "be after set VLAN PCP");
2986         return 0;
2987 }
2988
2989 /**
2990  * Validate the set VLAN VID.
2991  *
2992  * @param[in] item_flags
2993  *   Holds the items detected in this rule.
2994  * @param[in] action_flags
2995  *   Holds the actions detected until now.
2996  * @param[in] actions
2997  *   Pointer to the list of actions remaining in the flow rule.
2998  * @param[out] error
2999  *   Pointer to error structure.
3000  *
3001  * @return
3002  *   0 on success, a negative errno value otherwise and rte_errno is set.
3003  */
3004 static int
3005 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3006                                      uint64_t action_flags,
3007                                      const struct rte_flow_action actions[],
3008                                      struct rte_flow_error *error)
3009 {
3010         const struct rte_flow_action *action = actions;
3011         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3012
3013         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3014                 return rte_flow_error_set(error, EINVAL,
3015                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3016                                           "VLAN VID value is too big");
3017         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3018             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3019                 return rte_flow_error_set(error, ENOTSUP,
3020                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3021                                           "set VLAN VID action must follow push"
3022                                           " VLAN action or match on VLAN item");
3023         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3024                 return rte_flow_error_set(error, ENOTSUP,
3025                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3026                                           "Multiple VLAN VID modifications are "
3027                                           "not supported");
3028         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3029                 return rte_flow_error_set(error, EINVAL,
3030                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3031                                           "wrong action order, port_id should "
3032                                           "be after set VLAN VID");
3033         return 0;
3034 }
3035
3036 /*
3037  * Validate the FLAG action.
3038  *
3039  * @param[in] dev
3040  *   Pointer to the rte_eth_dev structure.
3041  * @param[in] action_flags
3042  *   Holds the actions detected until now.
3043  * @param[in] attr
3044  *   Pointer to flow attributes
3045  * @param[out] error
3046  *   Pointer to error structure.
3047  *
3048  * @return
3049  *   0 on success, a negative errno value otherwise and rte_errno is set.
3050  */
3051 static int
3052 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3053                              uint64_t action_flags,
3054                              const struct rte_flow_attr *attr,
3055                              struct rte_flow_error *error)
3056 {
3057         struct mlx5_priv *priv = dev->data->dev_private;
3058         struct mlx5_dev_config *config = &priv->config;
3059         int ret;
3060
3061         /* Fall back if no extended metadata register support. */
3062         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3063                 return mlx5_flow_validate_action_flag(action_flags, attr,
3064                                                       error);
3065         /* Extensive metadata mode requires registers. */
3066         if (!mlx5_flow_ext_mreg_supported(dev))
3067                 return rte_flow_error_set(error, ENOTSUP,
3068                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3069                                           "no metadata registers "
3070                                           "to support flag action");
3071         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3072                 return rte_flow_error_set(error, ENOTSUP,
3073                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3074                                           "extended metadata register"
3075                                           " isn't available");
3076         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3077         if (ret < 0)
3078                 return ret;
3079         MLX5_ASSERT(ret > 0);
3080         if (action_flags & MLX5_FLOW_ACTION_MARK)
3081                 return rte_flow_error_set(error, EINVAL,
3082                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3083                                           "can't mark and flag in same flow");
3084         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3085                 return rte_flow_error_set(error, EINVAL,
3086                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3087                                           "can't have 2 flag"
3088                                           " actions in same flow");
3089         return 0;
3090 }
3091
3092 /**
3093  * Validate MARK action.
3094  *
3095  * @param[in] dev
3096  *   Pointer to the rte_eth_dev structure.
3097  * @param[in] action
3098  *   Pointer to action.
3099  * @param[in] action_flags
3100  *   Holds the actions detected until now.
3101  * @param[in] attr
3102  *   Pointer to flow attributes
3103  * @param[out] error
3104  *   Pointer to error structure.
3105  *
3106  * @return
3107  *   0 on success, a negative errno value otherwise and rte_errno is set.
3108  */
3109 static int
3110 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3111                              const struct rte_flow_action *action,
3112                              uint64_t action_flags,
3113                              const struct rte_flow_attr *attr,
3114                              struct rte_flow_error *error)
3115 {
3116         struct mlx5_priv *priv = dev->data->dev_private;
3117         struct mlx5_dev_config *config = &priv->config;
3118         const struct rte_flow_action_mark *mark = action->conf;
3119         int ret;
3120
3121         if (is_tunnel_offload_active(dev))
3122                 return rte_flow_error_set(error, ENOTSUP,
3123                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3124                                           "no mark action "
3125                                           "if tunnel offload active");
3126         /* Fall back if no extended metadata register support. */
3127         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3128                 return mlx5_flow_validate_action_mark(action, action_flags,
3129                                                       attr, error);
3130         /* Extensive metadata mode requires registers. */
3131         if (!mlx5_flow_ext_mreg_supported(dev))
3132                 return rte_flow_error_set(error, ENOTSUP,
3133                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3134                                           "no metadata registers "
3135                                           "to support mark action");
3136         if (!priv->sh->dv_mark_mask)
3137                 return rte_flow_error_set(error, ENOTSUP,
3138                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3139                                           "extended metadata register"
3140                                           " isn't available");
3141         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3142         if (ret < 0)
3143                 return ret;
3144         MLX5_ASSERT(ret > 0);
3145         if (!mark)
3146                 return rte_flow_error_set(error, EINVAL,
3147                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3148                                           "configuration cannot be null");
3149         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3150                 return rte_flow_error_set(error, EINVAL,
3151                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3152                                           &mark->id,
3153                                           "mark id exceeds the limit");
3154         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3155                 return rte_flow_error_set(error, EINVAL,
3156                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3157                                           "can't flag and mark in same flow");
3158         if (action_flags & MLX5_FLOW_ACTION_MARK)
3159                 return rte_flow_error_set(error, EINVAL,
3160                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3161                                           "can't have 2 mark actions in same"
3162                                           " flow");
3163         return 0;
3164 }
3165
3166 /**
3167  * Validate SET_META action.
3168  *
3169  * @param[in] dev
3170  *   Pointer to the rte_eth_dev structure.
3171  * @param[in] action
3172  *   Pointer to the action structure.
3173  * @param[in] action_flags
3174  *   Holds the actions detected until now.
3175  * @param[in] attr
3176  *   Pointer to flow attributes
3177  * @param[out] error
3178  *   Pointer to error structure.
3179  *
3180  * @return
3181  *   0 on success, a negative errno value otherwise and rte_errno is set.
3182  */
3183 static int
3184 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3185                                  const struct rte_flow_action *action,
3186                                  uint64_t action_flags __rte_unused,
3187                                  const struct rte_flow_attr *attr,
3188                                  struct rte_flow_error *error)
3189 {
3190         struct mlx5_priv *priv = dev->data->dev_private;
3191         struct mlx5_dev_config *config = &priv->config;
3192         const struct rte_flow_action_set_meta *conf;
3193         uint32_t nic_mask = UINT32_MAX;
3194         int reg;
3195
3196         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
3197             !mlx5_flow_ext_mreg_supported(dev))
3198                 return rte_flow_error_set(error, ENOTSUP,
3199                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3200                                           "extended metadata register"
3201                                           " isn't supported");
3202         reg = flow_dv_get_metadata_reg(dev, attr, error);
3203         if (reg < 0)
3204                 return reg;
3205         if (reg == REG_NON)
3206                 return rte_flow_error_set(error, ENOTSUP,
3207                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3208                                           "unavalable extended metadata register");
3209         if (reg != REG_A && reg != REG_B) {
3210                 struct mlx5_priv *priv = dev->data->dev_private;
3211
3212                 nic_mask = priv->sh->dv_meta_mask;
3213         }
3214         if (!(action->conf))
3215                 return rte_flow_error_set(error, EINVAL,
3216                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3217                                           "configuration cannot be null");
3218         conf = (const struct rte_flow_action_set_meta *)action->conf;
3219         if (!conf->mask)
3220                 return rte_flow_error_set(error, EINVAL,
3221                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3222                                           "zero mask doesn't have any effect");
3223         if (conf->mask & ~nic_mask)
3224                 return rte_flow_error_set(error, EINVAL,
3225                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3226                                           "meta data must be within reg C0");
3227         return 0;
3228 }
3229
3230 /**
3231  * Validate SET_TAG action.
3232  *
3233  * @param[in] dev
3234  *   Pointer to the rte_eth_dev structure.
3235  * @param[in] action
3236  *   Pointer to the action structure.
3237  * @param[in] action_flags
3238  *   Holds the actions detected until now.
3239  * @param[in] attr
3240  *   Pointer to flow attributes
3241  * @param[out] error
3242  *   Pointer to error structure.
3243  *
3244  * @return
3245  *   0 on success, a negative errno value otherwise and rte_errno is set.
3246  */
3247 static int
3248 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3249                                 const struct rte_flow_action *action,
3250                                 uint64_t action_flags,
3251                                 const struct rte_flow_attr *attr,
3252                                 struct rte_flow_error *error)
3253 {
3254         const struct rte_flow_action_set_tag *conf;
3255         const uint64_t terminal_action_flags =
3256                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3257                 MLX5_FLOW_ACTION_RSS;
3258         int ret;
3259
3260         if (!mlx5_flow_ext_mreg_supported(dev))
3261                 return rte_flow_error_set(error, ENOTSUP,
3262                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3263                                           "extensive metadata register"
3264                                           " isn't supported");
3265         if (!(action->conf))
3266                 return rte_flow_error_set(error, EINVAL,
3267                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3268                                           "configuration cannot be null");
3269         conf = (const struct rte_flow_action_set_tag *)action->conf;
3270         if (!conf->mask)
3271                 return rte_flow_error_set(error, EINVAL,
3272                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3273                                           "zero mask doesn't have any effect");
3274         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3275         if (ret < 0)
3276                 return ret;
3277         if (!attr->transfer && attr->ingress &&
3278             (action_flags & terminal_action_flags))
3279                 return rte_flow_error_set(error, EINVAL,
3280                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3281                                           "set_tag has no effect"
3282                                           " with terminal actions");
3283         return 0;
3284 }
3285
3286 /**
3287  * Validate count action.
3288  *
3289  * @param[in] dev
3290  *   Pointer to rte_eth_dev structure.
3291  * @param[in] shared
3292  *   Indicator if action is shared.
3293  * @param[in] action_flags
3294  *   Holds the actions detected until now.
3295  * @param[out] error
3296  *   Pointer to error structure.
3297  *
3298  * @return
3299  *   0 on success, a negative errno value otherwise and rte_errno is set.
3300  */
3301 static int
3302 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3303                               uint64_t action_flags,
3304                               struct rte_flow_error *error)
3305 {
3306         struct mlx5_priv *priv = dev->data->dev_private;
3307
3308         if (!priv->sh->devx)
3309                 goto notsup_err;
3310         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3311                 return rte_flow_error_set(error, EINVAL,
3312                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3313                                           "duplicate count actions set");
3314         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3315             !priv->sh->flow_hit_aso_en)
3316                 return rte_flow_error_set(error, EINVAL,
3317                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3318                                           "old age and shared count combination is not supported");
3319 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3320         return 0;
3321 #endif
3322 notsup_err:
3323         return rte_flow_error_set
3324                       (error, ENOTSUP,
3325                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3326                        NULL,
3327                        "count action not supported");
3328 }
3329
3330 /**
3331  * Validate the L2 encap action.
3332  *
3333  * @param[in] dev
3334  *   Pointer to the rte_eth_dev structure.
3335  * @param[in] action_flags
3336  *   Holds the actions detected until now.
3337  * @param[in] action
3338  *   Pointer to the action structure.
3339  * @param[in] attr
3340  *   Pointer to flow attributes.
3341  * @param[out] error
3342  *   Pointer to error structure.
3343  *
3344  * @return
3345  *   0 on success, a negative errno value otherwise and rte_errno is set.
3346  */
3347 static int
3348 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3349                                  uint64_t action_flags,
3350                                  const struct rte_flow_action *action,
3351                                  const struct rte_flow_attr *attr,
3352                                  struct rte_flow_error *error)
3353 {
3354         const struct mlx5_priv *priv = dev->data->dev_private;
3355
3356         if (!(action->conf))
3357                 return rte_flow_error_set(error, EINVAL,
3358                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3359                                           "configuration cannot be null");
3360         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3361                 return rte_flow_error_set(error, EINVAL,
3362                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3363                                           "can only have a single encap action "
3364                                           "in a flow");
3365         if (!attr->transfer && priv->representor)
3366                 return rte_flow_error_set(error, ENOTSUP,
3367                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3368                                           "encap action for VF representor "
3369                                           "not supported on NIC table");
3370         return 0;
3371 }
3372
3373 /**
3374  * Validate a decap action.
3375  *
3376  * @param[in] dev
3377  *   Pointer to the rte_eth_dev structure.
3378  * @param[in] action_flags
3379  *   Holds the actions detected until now.
3380  * @param[in] action
3381  *   Pointer to the action structure.
3382  * @param[in] item_flags
3383  *   Holds the items detected.
3384  * @param[in] attr
3385  *   Pointer to flow attributes
3386  * @param[out] error
3387  *   Pointer to error structure.
3388  *
3389  * @return
3390  *   0 on success, a negative errno value otherwise and rte_errno is set.
3391  */
3392 static int
3393 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3394                               uint64_t action_flags,
3395                               const struct rte_flow_action *action,
3396                               const uint64_t item_flags,
3397                               const struct rte_flow_attr *attr,
3398                               struct rte_flow_error *error)
3399 {
3400         const struct mlx5_priv *priv = dev->data->dev_private;
3401
3402         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3403             !priv->config.decap_en)
3404                 return rte_flow_error_set(error, ENOTSUP,
3405                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3406                                           "decap is not enabled");
3407         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3408                 return rte_flow_error_set(error, ENOTSUP,
3409                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3410                                           action_flags &
3411                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3412                                           "have a single decap action" : "decap "
3413                                           "after encap is not supported");
3414         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3415                 return rte_flow_error_set(error, EINVAL,
3416                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3417                                           "can't have decap action after"
3418                                           " modify action");
3419         if (attr->egress)
3420                 return rte_flow_error_set(error, ENOTSUP,
3421                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3422                                           NULL,
3423                                           "decap action not supported for "
3424                                           "egress");
3425         if (!attr->transfer && priv->representor)
3426                 return rte_flow_error_set(error, ENOTSUP,
3427                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3428                                           "decap action for VF representor "
3429                                           "not supported on NIC table");
3430         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3431             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3432                 return rte_flow_error_set(error, ENOTSUP,
3433                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3434                                 "VXLAN item should be present for VXLAN decap");
3435         return 0;
3436 }
3437
3438 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3439
3440 /**
3441  * Validate the raw encap and decap actions.
3442  *
3443  * @param[in] dev
3444  *   Pointer to the rte_eth_dev structure.
3445  * @param[in] decap
3446  *   Pointer to the decap action.
3447  * @param[in] encap
3448  *   Pointer to the encap action.
3449  * @param[in] attr
3450  *   Pointer to flow attributes
3451  * @param[in/out] action_flags
3452  *   Holds the actions detected until now.
3453  * @param[out] actions_n
3454  *   pointer to the number of actions counter.
3455  * @param[in] action
3456  *   Pointer to the action structure.
3457  * @param[in] item_flags
3458  *   Holds the items detected.
3459  * @param[out] error
3460  *   Pointer to error structure.
3461  *
3462  * @return
3463  *   0 on success, a negative errno value otherwise and rte_errno is set.
3464  */
3465 static int
3466 flow_dv_validate_action_raw_encap_decap
3467         (struct rte_eth_dev *dev,
3468          const struct rte_flow_action_raw_decap *decap,
3469          const struct rte_flow_action_raw_encap *encap,
3470          const struct rte_flow_attr *attr, uint64_t *action_flags,
3471          int *actions_n, const struct rte_flow_action *action,
3472          uint64_t item_flags, struct rte_flow_error *error)
3473 {
3474         const struct mlx5_priv *priv = dev->data->dev_private;
3475         int ret;
3476
3477         if (encap && (!encap->size || !encap->data))
3478                 return rte_flow_error_set(error, EINVAL,
3479                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3480                                           "raw encap data cannot be empty");
3481         if (decap && encap) {
3482                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3483                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3484                         /* L3 encap. */
3485                         decap = NULL;
3486                 else if (encap->size <=
3487                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3488                            decap->size >
3489                            MLX5_ENCAPSULATION_DECISION_SIZE)
3490                         /* L3 decap. */
3491                         encap = NULL;
3492                 else if (encap->size >
3493                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3494                            decap->size >
3495                            MLX5_ENCAPSULATION_DECISION_SIZE)
3496                         /* 2 L2 actions: encap and decap. */
3497                         ;
3498                 else
3499                         return rte_flow_error_set(error,
3500                                 ENOTSUP,
3501                                 RTE_FLOW_ERROR_TYPE_ACTION,
3502                                 NULL, "unsupported too small "
3503                                 "raw decap and too small raw "
3504                                 "encap combination");
3505         }
3506         if (decap) {
3507                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3508                                                     item_flags, attr, error);
3509                 if (ret < 0)
3510                         return ret;
3511                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3512                 ++(*actions_n);
3513         }
3514         if (encap) {
3515                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3516                         return rte_flow_error_set(error, ENOTSUP,
3517                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3518                                                   NULL,
3519                                                   "small raw encap size");
3520                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3521                         return rte_flow_error_set(error, EINVAL,
3522                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3523                                                   NULL,
3524                                                   "more than one encap action");
3525                 if (!attr->transfer && priv->representor)
3526                         return rte_flow_error_set
3527                                         (error, ENOTSUP,
3528                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3529                                          "encap action for VF representor "
3530                                          "not supported on NIC table");
3531                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3532                 ++(*actions_n);
3533         }
3534         return 0;
3535 }
3536
3537 /*
3538  * Validate the ASO CT action.
3539  *
3540  * @param[in] dev
3541  *   Pointer to the rte_eth_dev structure.
3542  * @param[in] action_flags
3543  *   Holds the actions detected until now.
3544  * @param[in] item_flags
3545  *   The items found in this flow rule.
3546  * @param[in] attr
3547  *   Pointer to flow attributes.
3548  * @param[out] error
3549  *   Pointer to error structure.
3550  *
3551  * @return
3552  *   0 on success, a negative errno value otherwise and rte_errno is set.
3553  */
3554 static int
3555 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3556                                uint64_t action_flags,
3557                                uint64_t item_flags,
3558                                const struct rte_flow_attr *attr,
3559                                struct rte_flow_error *error)
3560 {
3561         RTE_SET_USED(dev);
3562
3563         if (attr->group == 0 && !attr->transfer)
3564                 return rte_flow_error_set(error, ENOTSUP,
3565                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3566                                           NULL,
3567                                           "Only support non-root table");
3568         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3569                 return rte_flow_error_set(error, ENOTSUP,
3570                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3571                                           "CT cannot follow a fate action");
3572         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3573             (action_flags & MLX5_FLOW_ACTION_AGE))
3574                 return rte_flow_error_set(error, EINVAL,
3575                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3576                                           "Only one ASO action is supported");
3577         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3578                 return rte_flow_error_set(error, EINVAL,
3579                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3580                                           "Encap cannot exist before CT");
3581         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3582                 return rte_flow_error_set(error, EINVAL,
3583                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3584                                           "Not a outer TCP packet");
3585         return 0;
3586 }
3587
3588 int
3589 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3590                              struct mlx5_list_entry *entry, void *cb_ctx)
3591 {
3592         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3593         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3594         struct mlx5_flow_dv_encap_decap_resource *resource;
3595
3596         resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3597                                 entry);
3598         if (resource->reformat_type == ctx_resource->reformat_type &&
3599             resource->ft_type == ctx_resource->ft_type &&
3600             resource->flags == ctx_resource->flags &&
3601             resource->size == ctx_resource->size &&
3602             !memcmp((const void *)resource->buf,
3603                     (const void *)ctx_resource->buf,
3604                     resource->size))
3605                 return 0;
3606         return -1;
3607 }
3608
3609 struct mlx5_list_entry *
3610 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3611 {
3612         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3613         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3614         struct mlx5dv_dr_domain *domain;
3615         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3616         struct mlx5_flow_dv_encap_decap_resource *resource;
3617         uint32_t idx;
3618         int ret;
3619
3620         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3621                 domain = sh->fdb_domain;
3622         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3623                 domain = sh->rx_domain;
3624         else
3625                 domain = sh->tx_domain;
3626         /* Register new encap/decap resource. */
3627         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3628         if (!resource) {
3629                 rte_flow_error_set(ctx->error, ENOMEM,
3630                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3631                                    "cannot allocate resource memory");
3632                 return NULL;
3633         }
3634         *resource = *ctx_resource;
3635         resource->idx = idx;
3636         ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3637                                                               domain, resource,
3638                                                              &resource->action);
3639         if (ret) {
3640                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3641                 rte_flow_error_set(ctx->error, ENOMEM,
3642                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3643                                    NULL, "cannot create action");
3644                 return NULL;
3645         }
3646
3647         return &resource->entry;
3648 }
3649
3650 struct mlx5_list_entry *
3651 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3652                              void *cb_ctx)
3653 {
3654         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3655         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3656         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3657         uint32_t idx;
3658
3659         cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3660                                            &idx);
3661         if (!cache_resource) {
3662                 rte_flow_error_set(ctx->error, ENOMEM,
3663                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3664                                    "cannot allocate resource memory");
3665                 return NULL;
3666         }
3667         memcpy(cache_resource, oentry, sizeof(*cache_resource));
3668         cache_resource->idx = idx;
3669         return &cache_resource->entry;
3670 }
3671
3672 void
3673 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3674 {
3675         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3676         struct mlx5_flow_dv_encap_decap_resource *res =
3677                                        container_of(entry, typeof(*res), entry);
3678
3679         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3680 }
3681
3682 /**
3683  * Find existing encap/decap resource or create and register a new one.
3684  *
3685  * @param[in, out] dev
3686  *   Pointer to rte_eth_dev structure.
3687  * @param[in, out] resource
3688  *   Pointer to encap/decap resource.
3689  * @parm[in, out] dev_flow
3690  *   Pointer to the dev_flow.
3691  * @param[out] error
3692  *   pointer to error structure.
3693  *
3694  * @return
3695  *   0 on success otherwise -errno and errno is set.
3696  */
3697 static int
3698 flow_dv_encap_decap_resource_register
3699                         (struct rte_eth_dev *dev,
3700                          struct mlx5_flow_dv_encap_decap_resource *resource,
3701                          struct mlx5_flow *dev_flow,
3702                          struct rte_flow_error *error)
3703 {
3704         struct mlx5_priv *priv = dev->data->dev_private;
3705         struct mlx5_dev_ctx_shared *sh = priv->sh;
3706         struct mlx5_list_entry *entry;
3707         union {
3708                 struct {
3709                         uint32_t ft_type:8;
3710                         uint32_t refmt_type:8;
3711                         /*
3712                          * Header reformat actions can be shared between
3713                          * non-root tables. One bit to indicate non-root
3714                          * table or not.
3715                          */
3716                         uint32_t is_root:1;
3717                         uint32_t reserve:15;
3718                 };
3719                 uint32_t v32;
3720         } encap_decap_key = {
3721                 {
3722                         .ft_type = resource->ft_type,
3723                         .refmt_type = resource->reformat_type,
3724                         .is_root = !!dev_flow->dv.group,
3725                         .reserve = 0,
3726                 }
3727         };
3728         struct mlx5_flow_cb_ctx ctx = {
3729                 .error = error,
3730                 .data = resource,
3731         };
3732         struct mlx5_hlist *encaps_decaps;
3733         uint64_t key64;
3734
3735         encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3736                                 "encaps_decaps",
3737                                 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3738                                 true, true, sh,
3739                                 flow_dv_encap_decap_create_cb,
3740                                 flow_dv_encap_decap_match_cb,
3741                                 flow_dv_encap_decap_remove_cb,
3742                                 flow_dv_encap_decap_clone_cb,
3743                                 flow_dv_encap_decap_clone_free_cb);
3744         if (unlikely(!encaps_decaps))
3745                 return -rte_errno;
3746         resource->flags = dev_flow->dv.group ? 0 : 1;
3747         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3748                                  sizeof(encap_decap_key.v32), 0);
3749         if (resource->reformat_type !=
3750             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3751             resource->size)
3752                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3753         entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3754         if (!entry)
3755                 return -rte_errno;
3756         resource = container_of(entry, typeof(*resource), entry);
3757         dev_flow->dv.encap_decap = resource;
3758         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3759         return 0;
3760 }
3761
3762 /**
3763  * Find existing table jump resource or create and register a new one.
3764  *
3765  * @param[in, out] dev
3766  *   Pointer to rte_eth_dev structure.
3767  * @param[in, out] tbl
3768  *   Pointer to flow table resource.
3769  * @parm[in, out] dev_flow
3770  *   Pointer to the dev_flow.
3771  * @param[out] error
3772  *   pointer to error structure.
3773  *
3774  * @return
3775  *   0 on success otherwise -errno and errno is set.
3776  */
3777 static int
3778 flow_dv_jump_tbl_resource_register
3779                         (struct rte_eth_dev *dev __rte_unused,
3780                          struct mlx5_flow_tbl_resource *tbl,
3781                          struct mlx5_flow *dev_flow,
3782                          struct rte_flow_error *error __rte_unused)
3783 {
3784         struct mlx5_flow_tbl_data_entry *tbl_data =
3785                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3786
3787         MLX5_ASSERT(tbl);
3788         MLX5_ASSERT(tbl_data->jump.action);
3789         dev_flow->handle->rix_jump = tbl_data->idx;
3790         dev_flow->dv.jump = &tbl_data->jump;
3791         return 0;
3792 }
3793
3794 int
3795 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3796                          struct mlx5_list_entry *entry, void *cb_ctx)
3797 {
3798         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3799         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3800         struct mlx5_flow_dv_port_id_action_resource *res =
3801                                        container_of(entry, typeof(*res), entry);
3802
3803         return ref->port_id != res->port_id;
3804 }
3805
3806 struct mlx5_list_entry *
3807 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3808 {
3809         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3810         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3811         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3812         struct mlx5_flow_dv_port_id_action_resource *resource;
3813         uint32_t idx;
3814         int ret;
3815
3816         /* Register new port id action resource. */
3817         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3818         if (!resource) {
3819                 rte_flow_error_set(ctx->error, ENOMEM,
3820                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3821                                    "cannot allocate port_id action memory");
3822                 return NULL;
3823         }
3824         *resource = *ref;
3825         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3826                                                         ref->port_id,
3827                                                         &resource->action);
3828         if (ret) {
3829                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3830                 rte_flow_error_set(ctx->error, ENOMEM,
3831                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3832                                    "cannot create action");
3833                 return NULL;
3834         }
3835         resource->idx = idx;
3836         return &resource->entry;
3837 }
3838
3839 struct mlx5_list_entry *
3840 flow_dv_port_id_clone_cb(void *tool_ctx,
3841                          struct mlx5_list_entry *entry __rte_unused,
3842                          void *cb_ctx)
3843 {
3844         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3845         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3846         struct mlx5_flow_dv_port_id_action_resource *resource;
3847         uint32_t idx;
3848
3849         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3850         if (!resource) {
3851                 rte_flow_error_set(ctx->error, ENOMEM,
3852                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3853                                    "cannot allocate port_id action memory");
3854                 return NULL;
3855         }
3856         memcpy(resource, entry, sizeof(*resource));
3857         resource->idx = idx;
3858         return &resource->entry;
3859 }
3860
3861 void
3862 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3863 {
3864         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3865         struct mlx5_flow_dv_port_id_action_resource *resource =
3866                                   container_of(entry, typeof(*resource), entry);
3867
3868         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3869 }
3870
3871 /**
3872  * Find existing table port ID resource or create and register a new one.
3873  *
3874  * @param[in, out] dev
3875  *   Pointer to rte_eth_dev structure.
3876  * @param[in, out] ref
3877  *   Pointer to port ID action resource reference.
3878  * @parm[in, out] dev_flow
3879  *   Pointer to the dev_flow.
3880  * @param[out] error
3881  *   pointer to error structure.
3882  *
3883  * @return
3884  *   0 on success otherwise -errno and errno is set.
3885  */
3886 static int
3887 flow_dv_port_id_action_resource_register
3888                         (struct rte_eth_dev *dev,
3889                          struct mlx5_flow_dv_port_id_action_resource *ref,
3890                          struct mlx5_flow *dev_flow,
3891                          struct rte_flow_error *error)
3892 {
3893         struct mlx5_priv *priv = dev->data->dev_private;
3894         struct mlx5_list_entry *entry;
3895         struct mlx5_flow_dv_port_id_action_resource *resource;
3896         struct mlx5_flow_cb_ctx ctx = {
3897                 .error = error,
3898                 .data = ref,
3899         };
3900
3901         entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3902         if (!entry)
3903                 return -rte_errno;
3904         resource = container_of(entry, typeof(*resource), entry);
3905         dev_flow->dv.port_id_action = resource;
3906         dev_flow->handle->rix_port_id_action = resource->idx;
3907         return 0;
3908 }
3909
3910 int
3911 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3912                            struct mlx5_list_entry *entry, void *cb_ctx)
3913 {
3914         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3915         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3916         struct mlx5_flow_dv_push_vlan_action_resource *res =
3917                                        container_of(entry, typeof(*res), entry);
3918
3919         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3920 }
3921
3922 struct mlx5_list_entry *
3923 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3924 {
3925         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3926         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3927         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3928         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3929         struct mlx5dv_dr_domain *domain;
3930         uint32_t idx;
3931         int ret;
3932
3933         /* Register new port id action resource. */
3934         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3935         if (!resource) {
3936                 rte_flow_error_set(ctx->error, ENOMEM,
3937                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3938                                    "cannot allocate push_vlan action memory");
3939                 return NULL;
3940         }
3941         *resource = *ref;
3942         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3943                 domain = sh->fdb_domain;
3944         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3945                 domain = sh->rx_domain;
3946         else
3947                 domain = sh->tx_domain;
3948         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3949                                                         &resource->action);
3950         if (ret) {
3951                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3952                 rte_flow_error_set(ctx->error, ENOMEM,
3953                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3954                                    "cannot create push vlan action");
3955                 return NULL;
3956         }
3957         resource->idx = idx;
3958         return &resource->entry;
3959 }
3960
3961 struct mlx5_list_entry *
3962 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3963                            struct mlx5_list_entry *entry __rte_unused,
3964                            void *cb_ctx)
3965 {
3966         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3967         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3968         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3969         uint32_t idx;
3970
3971         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3972         if (!resource) {
3973                 rte_flow_error_set(ctx->error, ENOMEM,
3974                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3975                                    "cannot allocate push_vlan action memory");
3976                 return NULL;
3977         }
3978         memcpy(resource, entry, sizeof(*resource));
3979         resource->idx = idx;
3980         return &resource->entry;
3981 }
3982
3983 void
3984 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3985 {
3986         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3987         struct mlx5_flow_dv_push_vlan_action_resource *resource =
3988                                   container_of(entry, typeof(*resource), entry);
3989
3990         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3991 }
3992
3993 /**
3994  * Find existing push vlan resource or create and register a new one.
3995  *
3996  * @param [in, out] dev
3997  *   Pointer to rte_eth_dev structure.
3998  * @param[in, out] ref
3999  *   Pointer to port ID action resource reference.
4000  * @parm[in, out] dev_flow
4001  *   Pointer to the dev_flow.
4002  * @param[out] error
4003  *   pointer to error structure.
4004  *
4005  * @return
4006  *   0 on success otherwise -errno and errno is set.
4007  */
4008 static int
4009 flow_dv_push_vlan_action_resource_register
4010                        (struct rte_eth_dev *dev,
4011                         struct mlx5_flow_dv_push_vlan_action_resource *ref,
4012                         struct mlx5_flow *dev_flow,
4013                         struct rte_flow_error *error)
4014 {
4015         struct mlx5_priv *priv = dev->data->dev_private;
4016         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4017         struct mlx5_list_entry *entry;
4018         struct mlx5_flow_cb_ctx ctx = {
4019                 .error = error,
4020                 .data = ref,
4021         };
4022
4023         entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4024         if (!entry)
4025                 return -rte_errno;
4026         resource = container_of(entry, typeof(*resource), entry);
4027
4028         dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4029         dev_flow->dv.push_vlan_res = resource;
4030         return 0;
4031 }
4032
4033 /**
4034  * Get the size of specific rte_flow_item_type hdr size
4035  *
4036  * @param[in] item_type
4037  *   Tested rte_flow_item_type.
4038  *
4039  * @return
4040  *   sizeof struct item_type, 0 if void or irrelevant.
4041  */
4042 static size_t
4043 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4044 {
4045         size_t retval;
4046
4047         switch (item_type) {
4048         case RTE_FLOW_ITEM_TYPE_ETH:
4049                 retval = sizeof(struct rte_ether_hdr);
4050                 break;
4051         case RTE_FLOW_ITEM_TYPE_VLAN:
4052                 retval = sizeof(struct rte_vlan_hdr);
4053                 break;
4054         case RTE_FLOW_ITEM_TYPE_IPV4:
4055                 retval = sizeof(struct rte_ipv4_hdr);
4056                 break;
4057         case RTE_FLOW_ITEM_TYPE_IPV6:
4058                 retval = sizeof(struct rte_ipv6_hdr);
4059                 break;
4060         case RTE_FLOW_ITEM_TYPE_UDP:
4061                 retval = sizeof(struct rte_udp_hdr);
4062                 break;
4063         case RTE_FLOW_ITEM_TYPE_TCP:
4064                 retval = sizeof(struct rte_tcp_hdr);
4065                 break;
4066         case RTE_FLOW_ITEM_TYPE_VXLAN:
4067         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4068                 retval = sizeof(struct rte_vxlan_hdr);
4069                 break;
4070         case RTE_FLOW_ITEM_TYPE_GRE:
4071         case RTE_FLOW_ITEM_TYPE_NVGRE:
4072                 retval = sizeof(struct rte_gre_hdr);
4073                 break;
4074         case RTE_FLOW_ITEM_TYPE_MPLS:
4075                 retval = sizeof(struct rte_mpls_hdr);
4076                 break;
4077         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4078         default:
4079                 retval = 0;
4080                 break;
4081         }
4082         return retval;
4083 }
4084
4085 #define MLX5_ENCAP_IPV4_VERSION         0x40
4086 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
4087 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
4088 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
4089 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
4090 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
4091 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
4092
4093 /**
4094  * Convert the encap action data from list of rte_flow_item to raw buffer
4095  *
4096  * @param[in] items
4097  *   Pointer to rte_flow_item objects list.
4098  * @param[out] buf
4099  *   Pointer to the output buffer.
4100  * @param[out] size
4101  *   Pointer to the output buffer size.
4102  * @param[out] error
4103  *   Pointer to the error structure.
4104  *
4105  * @return
4106  *   0 on success, a negative errno value otherwise and rte_errno is set.
4107  */
4108 static int
4109 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4110                            size_t *size, struct rte_flow_error *error)
4111 {
4112         struct rte_ether_hdr *eth = NULL;
4113         struct rte_vlan_hdr *vlan = NULL;
4114         struct rte_ipv4_hdr *ipv4 = NULL;
4115         struct rte_ipv6_hdr *ipv6 = NULL;
4116         struct rte_udp_hdr *udp = NULL;
4117         struct rte_vxlan_hdr *vxlan = NULL;
4118         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4119         struct rte_gre_hdr *gre = NULL;
4120         size_t len;
4121         size_t temp_size = 0;
4122
4123         if (!items)
4124                 return rte_flow_error_set(error, EINVAL,
4125                                           RTE_FLOW_ERROR_TYPE_ACTION,
4126                                           NULL, "invalid empty data");
4127         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4128                 len = flow_dv_get_item_hdr_len(items->type);
4129                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4130                         return rte_flow_error_set(error, EINVAL,
4131                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4132                                                   (void *)items->type,
4133                                                   "items total size is too big"
4134                                                   " for encap action");
4135                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4136                 switch (items->type) {
4137                 case RTE_FLOW_ITEM_TYPE_ETH:
4138                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4139                         break;
4140                 case RTE_FLOW_ITEM_TYPE_VLAN:
4141                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4142                         if (!eth)
4143                                 return rte_flow_error_set(error, EINVAL,
4144                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4145                                                 (void *)items->type,
4146                                                 "eth header not found");
4147                         if (!eth->ether_type)
4148                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4149                         break;
4150                 case RTE_FLOW_ITEM_TYPE_IPV4:
4151                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4152                         if (!vlan && !eth)
4153                                 return rte_flow_error_set(error, EINVAL,
4154                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4155                                                 (void *)items->type,
4156                                                 "neither eth nor vlan"
4157                                                 " header found");
4158                         if (vlan && !vlan->eth_proto)
4159                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4160                         else if (eth && !eth->ether_type)
4161                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4162                         if (!ipv4->version_ihl)
4163                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4164                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4165                         if (!ipv4->time_to_live)
4166                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4167                         break;
4168                 case RTE_FLOW_ITEM_TYPE_IPV6:
4169                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4170                         if (!vlan && !eth)
4171                                 return rte_flow_error_set(error, EINVAL,
4172                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4173                                                 (void *)items->type,
4174                                                 "neither eth nor vlan"
4175                                                 " header found");
4176                         if (vlan && !vlan->eth_proto)
4177                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4178                         else if (eth && !eth->ether_type)
4179                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4180                         if (!ipv6->vtc_flow)
4181                                 ipv6->vtc_flow =
4182                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4183                         if (!ipv6->hop_limits)
4184                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4185                         break;
4186                 case RTE_FLOW_ITEM_TYPE_UDP:
4187                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4188                         if (!ipv4 && !ipv6)
4189                                 return rte_flow_error_set(error, EINVAL,
4190                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4191                                                 (void *)items->type,
4192                                                 "ip header not found");
4193                         if (ipv4 && !ipv4->next_proto_id)
4194                                 ipv4->next_proto_id = IPPROTO_UDP;
4195                         else if (ipv6 && !ipv6->proto)
4196                                 ipv6->proto = IPPROTO_UDP;
4197                         break;
4198                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4199                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4200                         if (!udp)
4201                                 return rte_flow_error_set(error, EINVAL,
4202                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4203                                                 (void *)items->type,
4204                                                 "udp header not found");
4205                         if (!udp->dst_port)
4206                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4207                         if (!vxlan->vx_flags)
4208                                 vxlan->vx_flags =
4209                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4210                         break;
4211                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4212                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4213                         if (!udp)
4214                                 return rte_flow_error_set(error, EINVAL,
4215                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4216                                                 (void *)items->type,
4217                                                 "udp header not found");
4218                         if (!vxlan_gpe->proto)
4219                                 return rte_flow_error_set(error, EINVAL,
4220                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4221                                                 (void *)items->type,
4222                                                 "next protocol not found");
4223                         if (!udp->dst_port)
4224                                 udp->dst_port =
4225                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4226                         if (!vxlan_gpe->vx_flags)
4227                                 vxlan_gpe->vx_flags =
4228                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4229                         break;
4230                 case RTE_FLOW_ITEM_TYPE_GRE:
4231                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4232                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4233                         if (!gre->proto)
4234                                 return rte_flow_error_set(error, EINVAL,
4235                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4236                                                 (void *)items->type,
4237                                                 "next protocol not found");
4238                         if (!ipv4 && !ipv6)
4239                                 return rte_flow_error_set(error, EINVAL,
4240                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4241                                                 (void *)items->type,
4242                                                 "ip header not found");
4243                         if (ipv4 && !ipv4->next_proto_id)
4244                                 ipv4->next_proto_id = IPPROTO_GRE;
4245                         else if (ipv6 && !ipv6->proto)
4246                                 ipv6->proto = IPPROTO_GRE;
4247                         break;
4248                 case RTE_FLOW_ITEM_TYPE_VOID:
4249                         break;
4250                 default:
4251                         return rte_flow_error_set(error, EINVAL,
4252                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4253                                                   (void *)items->type,
4254                                                   "unsupported item type");
4255                         break;
4256                 }
4257                 temp_size += len;
4258         }
4259         *size = temp_size;
4260         return 0;
4261 }
4262
4263 static int
4264 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4265 {
4266         struct rte_ether_hdr *eth = NULL;
4267         struct rte_vlan_hdr *vlan = NULL;
4268         struct rte_ipv6_hdr *ipv6 = NULL;
4269         struct rte_udp_hdr *udp = NULL;
4270         char *next_hdr;
4271         uint16_t proto;
4272
4273         eth = (struct rte_ether_hdr *)data;
4274         next_hdr = (char *)(eth + 1);
4275         proto = RTE_BE16(eth->ether_type);
4276
4277         /* VLAN skipping */
4278         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4279                 vlan = (struct rte_vlan_hdr *)next_hdr;
4280                 proto = RTE_BE16(vlan->eth_proto);
4281                 next_hdr += sizeof(struct rte_vlan_hdr);
4282         }
4283
4284         /* HW calculates IPv4 csum. no need to proceed */
4285         if (proto == RTE_ETHER_TYPE_IPV4)
4286                 return 0;
4287
4288         /* non IPv4/IPv6 header. not supported */
4289         if (proto != RTE_ETHER_TYPE_IPV6) {
4290                 return rte_flow_error_set(error, ENOTSUP,
4291                                           RTE_FLOW_ERROR_TYPE_ACTION,
4292                                           NULL, "Cannot offload non IPv4/IPv6");
4293         }
4294
4295         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4296
4297         /* ignore non UDP */
4298         if (ipv6->proto != IPPROTO_UDP)
4299                 return 0;
4300
4301         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4302         udp->dgram_cksum = 0;
4303
4304         return 0;
4305 }
4306
4307 /**
4308  * Convert L2 encap action to DV specification.
4309  *
4310  * @param[in] dev
4311  *   Pointer to rte_eth_dev structure.
4312  * @param[in] action
4313  *   Pointer to action structure.
4314  * @param[in, out] dev_flow
4315  *   Pointer to the mlx5_flow.
4316  * @param[in] transfer
4317  *   Mark if the flow is E-Switch flow.
4318  * @param[out] error
4319  *   Pointer to the error structure.
4320  *
4321  * @return
4322  *   0 on success, a negative errno value otherwise and rte_errno is set.
4323  */
4324 static int
4325 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4326                                const struct rte_flow_action *action,
4327                                struct mlx5_flow *dev_flow,
4328                                uint8_t transfer,
4329                                struct rte_flow_error *error)
4330 {
4331         const struct rte_flow_item *encap_data;
4332         const struct rte_flow_action_raw_encap *raw_encap_data;
4333         struct mlx5_flow_dv_encap_decap_resource res = {
4334                 .reformat_type =
4335                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4336                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4337                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4338         };
4339
4340         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4341                 raw_encap_data =
4342                         (const struct rte_flow_action_raw_encap *)action->conf;
4343                 res.size = raw_encap_data->size;
4344                 memcpy(res.buf, raw_encap_data->data, res.size);
4345         } else {
4346                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4347                         encap_data =
4348                                 ((const struct rte_flow_action_vxlan_encap *)
4349                                                 action->conf)->definition;
4350                 else
4351                         encap_data =
4352                                 ((const struct rte_flow_action_nvgre_encap *)
4353                                                 action->conf)->definition;
4354                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4355                                                &res.size, error))
4356                         return -rte_errno;
4357         }
4358         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4359                 return -rte_errno;
4360         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4361                 return rte_flow_error_set(error, EINVAL,
4362                                           RTE_FLOW_ERROR_TYPE_ACTION,
4363                                           NULL, "can't create L2 encap action");
4364         return 0;
4365 }
4366
4367 /**
4368  * Convert L2 decap action to DV specification.
4369  *
4370  * @param[in] dev
4371  *   Pointer to rte_eth_dev structure.
4372  * @param[in, out] dev_flow
4373  *   Pointer to the mlx5_flow.
4374  * @param[in] transfer
4375  *   Mark if the flow is E-Switch flow.
4376  * @param[out] error
4377  *   Pointer to the error structure.
4378  *
4379  * @return
4380  *   0 on success, a negative errno value otherwise and rte_errno is set.
4381  */
4382 static int
4383 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4384                                struct mlx5_flow *dev_flow,
4385                                uint8_t transfer,
4386                                struct rte_flow_error *error)
4387 {
4388         struct mlx5_flow_dv_encap_decap_resource res = {
4389                 .size = 0,
4390                 .reformat_type =
4391                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4392                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4393                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4394         };
4395
4396         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4397                 return rte_flow_error_set(error, EINVAL,
4398                                           RTE_FLOW_ERROR_TYPE_ACTION,
4399                                           NULL, "can't create L2 decap action");
4400         return 0;
4401 }
4402
4403 /**
4404  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4405  *
4406  * @param[in] dev
4407  *   Pointer to rte_eth_dev structure.
4408  * @param[in] action
4409  *   Pointer to action structure.
4410  * @param[in, out] dev_flow
4411  *   Pointer to the mlx5_flow.
4412  * @param[in] attr
4413  *   Pointer to the flow attributes.
4414  * @param[out] error
4415  *   Pointer to the error structure.
4416  *
4417  * @return
4418  *   0 on success, a negative errno value otherwise and rte_errno is set.
4419  */
4420 static int
4421 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4422                                 const struct rte_flow_action *action,
4423                                 struct mlx5_flow *dev_flow,
4424                                 const struct rte_flow_attr *attr,
4425                                 struct rte_flow_error *error)
4426 {
4427         const struct rte_flow_action_raw_encap *encap_data;
4428         struct mlx5_flow_dv_encap_decap_resource res;
4429
4430         memset(&res, 0, sizeof(res));
4431         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4432         res.size = encap_data->size;
4433         memcpy(res.buf, encap_data->data, res.size);
4434         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4435                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4436                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4437         if (attr->transfer)
4438                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4439         else
4440                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4441                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4442         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4443                 return rte_flow_error_set(error, EINVAL,
4444                                           RTE_FLOW_ERROR_TYPE_ACTION,
4445                                           NULL, "can't create encap action");
4446         return 0;
4447 }
4448
4449 /**
4450  * Create action push VLAN.
4451  *
4452  * @param[in] dev
4453  *   Pointer to rte_eth_dev structure.
4454  * @param[in] attr
4455  *   Pointer to the flow attributes.
4456  * @param[in] vlan
4457  *   Pointer to the vlan to push to the Ethernet header.
4458  * @param[in, out] dev_flow
4459  *   Pointer to the mlx5_flow.
4460  * @param[out] error
4461  *   Pointer to the error structure.
4462  *
4463  * @return
4464  *   0 on success, a negative errno value otherwise and rte_errno is set.
4465  */
4466 static int
4467 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4468                                 const struct rte_flow_attr *attr,
4469                                 const struct rte_vlan_hdr *vlan,
4470                                 struct mlx5_flow *dev_flow,
4471                                 struct rte_flow_error *error)
4472 {
4473         struct mlx5_flow_dv_push_vlan_action_resource res;
4474
4475         memset(&res, 0, sizeof(res));
4476         res.vlan_tag =
4477                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4478                                  vlan->vlan_tci);
4479         if (attr->transfer)
4480                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4481         else
4482                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4483                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4484         return flow_dv_push_vlan_action_resource_register
4485                                             (dev, &res, dev_flow, error);
4486 }
4487
4488 /**
4489  * Validate the modify-header actions.
4490  *
4491  * @param[in] action_flags
4492  *   Holds the actions detected until now.
4493  * @param[in] action
4494  *   Pointer to the modify action.
4495  * @param[out] error
4496  *   Pointer to error structure.
4497  *
4498  * @return
4499  *   0 on success, a negative errno value otherwise and rte_errno is set.
4500  */
4501 static int
4502 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4503                                    const struct rte_flow_action *action,
4504                                    struct rte_flow_error *error)
4505 {
4506         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4507                 return rte_flow_error_set(error, EINVAL,
4508                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4509                                           NULL, "action configuration not set");
4510         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4511                 return rte_flow_error_set(error, EINVAL,
4512                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4513                                           "can't have encap action before"
4514                                           " modify action");
4515         return 0;
4516 }
4517
4518 /**
4519  * Validate the modify-header MAC address actions.
4520  *
4521  * @param[in] action_flags
4522  *   Holds the actions detected until now.
4523  * @param[in] action
4524  *   Pointer to the modify action.
4525  * @param[in] item_flags
4526  *   Holds the items detected.
4527  * @param[out] error
4528  *   Pointer to error structure.
4529  *
4530  * @return
4531  *   0 on success, a negative errno value otherwise and rte_errno is set.
4532  */
4533 static int
4534 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4535                                    const struct rte_flow_action *action,
4536                                    const uint64_t item_flags,
4537                                    struct rte_flow_error *error)
4538 {
4539         int ret = 0;
4540
4541         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4542         if (!ret) {
4543                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4544                         return rte_flow_error_set(error, EINVAL,
4545                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4546                                                   NULL,
4547                                                   "no L2 item in pattern");
4548         }
4549         return ret;
4550 }
4551
4552 /**
4553  * Validate the modify-header IPv4 address actions.
4554  *
4555  * @param[in] action_flags
4556  *   Holds the actions detected until now.
4557  * @param[in] action
4558  *   Pointer to the modify action.
4559  * @param[in] item_flags
4560  *   Holds the items detected.
4561  * @param[out] error
4562  *   Pointer to error structure.
4563  *
4564  * @return
4565  *   0 on success, a negative errno value otherwise and rte_errno is set.
4566  */
4567 static int
4568 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4569                                     const struct rte_flow_action *action,
4570                                     const uint64_t item_flags,
4571                                     struct rte_flow_error *error)
4572 {
4573         int ret = 0;
4574         uint64_t layer;
4575
4576         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4577         if (!ret) {
4578                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4579                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4580                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4581                 if (!(item_flags & layer))
4582                         return rte_flow_error_set(error, EINVAL,
4583                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4584                                                   NULL,
4585                                                   "no ipv4 item in pattern");
4586         }
4587         return ret;
4588 }
4589
4590 /**
4591  * Validate the modify-header IPv6 address actions.
4592  *
4593  * @param[in] action_flags
4594  *   Holds the actions detected until now.
4595  * @param[in] action
4596  *   Pointer to the modify action.
4597  * @param[in] item_flags
4598  *   Holds the items detected.
4599  * @param[out] error
4600  *   Pointer to error structure.
4601  *
4602  * @return
4603  *   0 on success, a negative errno value otherwise and rte_errno is set.
4604  */
4605 static int
4606 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4607                                     const struct rte_flow_action *action,
4608                                     const uint64_t item_flags,
4609                                     struct rte_flow_error *error)
4610 {
4611         int ret = 0;
4612         uint64_t layer;
4613
4614         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4615         if (!ret) {
4616                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4617                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4618                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4619                 if (!(item_flags & layer))
4620                         return rte_flow_error_set(error, EINVAL,
4621                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4622                                                   NULL,
4623                                                   "no ipv6 item in pattern");
4624         }
4625         return ret;
4626 }
4627
4628 /**
4629  * Validate the modify-header TP actions.
4630  *
4631  * @param[in] action_flags
4632  *   Holds the actions detected until now.
4633  * @param[in] action
4634  *   Pointer to the modify action.
4635  * @param[in] item_flags
4636  *   Holds the items detected.
4637  * @param[out] error
4638  *   Pointer to error structure.
4639  *
4640  * @return
4641  *   0 on success, a negative errno value otherwise and rte_errno is set.
4642  */
4643 static int
4644 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4645                                   const struct rte_flow_action *action,
4646                                   const uint64_t item_flags,
4647                                   struct rte_flow_error *error)
4648 {
4649         int ret = 0;
4650         uint64_t layer;
4651
4652         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4653         if (!ret) {
4654                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4655                                  MLX5_FLOW_LAYER_INNER_L4 :
4656                                  MLX5_FLOW_LAYER_OUTER_L4;
4657                 if (!(item_flags & layer))
4658                         return rte_flow_error_set(error, EINVAL,
4659                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4660                                                   NULL, "no transport layer "
4661                                                   "in pattern");
4662         }
4663         return ret;
4664 }
4665
4666 /**
4667  * Validate the modify-header actions of increment/decrement
4668  * TCP Sequence-number.
4669  *
4670  * @param[in] action_flags
4671  *   Holds the actions detected until now.
4672  * @param[in] action
4673  *   Pointer to the modify action.
4674  * @param[in] item_flags
4675  *   Holds the items detected.
4676  * @param[out] error
4677  *   Pointer to error structure.
4678  *
4679  * @return
4680  *   0 on success, a negative errno value otherwise and rte_errno is set.
4681  */
4682 static int
4683 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4684                                        const struct rte_flow_action *action,
4685                                        const uint64_t item_flags,
4686                                        struct rte_flow_error *error)
4687 {
4688         int ret = 0;
4689         uint64_t layer;
4690
4691         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4692         if (!ret) {
4693                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4694                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4695                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4696                 if (!(item_flags & layer))
4697                         return rte_flow_error_set(error, EINVAL,
4698                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4699                                                   NULL, "no TCP item in"
4700                                                   " pattern");
4701                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4702                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4703                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4704                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4705                         return rte_flow_error_set(error, EINVAL,
4706                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4707                                                   NULL,
4708                                                   "cannot decrease and increase"
4709                                                   " TCP sequence number"
4710                                                   " at the same time");
4711         }
4712         return ret;
4713 }
4714
4715 /**
4716  * Validate the modify-header actions of increment/decrement
4717  * TCP Acknowledgment number.
4718  *
4719  * @param[in] action_flags
4720  *   Holds the actions detected until now.
4721  * @param[in] action
4722  *   Pointer to the modify action.
4723  * @param[in] item_flags
4724  *   Holds the items detected.
4725  * @param[out] error
4726  *   Pointer to error structure.
4727  *
4728  * @return
4729  *   0 on success, a negative errno value otherwise and rte_errno is set.
4730  */
4731 static int
4732 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4733                                        const struct rte_flow_action *action,
4734                                        const uint64_t item_flags,
4735                                        struct rte_flow_error *error)
4736 {
4737         int ret = 0;
4738         uint64_t layer;
4739
4740         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4741         if (!ret) {
4742                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4743                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4744                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4745                 if (!(item_flags & layer))
4746                         return rte_flow_error_set(error, EINVAL,
4747                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4748                                                   NULL, "no TCP item in"
4749                                                   " pattern");
4750                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4751                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4752                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4753                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4754                         return rte_flow_error_set(error, EINVAL,
4755                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4756                                                   NULL,
4757                                                   "cannot decrease and increase"
4758                                                   " TCP acknowledgment number"
4759                                                   " at the same time");
4760         }
4761         return ret;
4762 }
4763
4764 /**
4765  * Validate the modify-header TTL actions.
4766  *
4767  * @param[in] action_flags
4768  *   Holds the actions detected until now.
4769  * @param[in] action
4770  *   Pointer to the modify action.
4771  * @param[in] item_flags
4772  *   Holds the items detected.
4773  * @param[out] error
4774  *   Pointer to error structure.
4775  *
4776  * @return
4777  *   0 on success, a negative errno value otherwise and rte_errno is set.
4778  */
4779 static int
4780 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4781                                    const struct rte_flow_action *action,
4782                                    const uint64_t item_flags,
4783                                    struct rte_flow_error *error)
4784 {
4785         int ret = 0;
4786         uint64_t layer;
4787
4788         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4789         if (!ret) {
4790                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4791                                  MLX5_FLOW_LAYER_INNER_L3 :
4792                                  MLX5_FLOW_LAYER_OUTER_L3;
4793                 if (!(item_flags & layer))
4794                         return rte_flow_error_set(error, EINVAL,
4795                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4796                                                   NULL,
4797                                                   "no IP protocol in pattern");
4798         }
4799         return ret;
4800 }
4801
4802 /**
4803  * Validate the generic modify field actions.
4804  * @param[in] dev
4805  *   Pointer to the rte_eth_dev structure.
4806  * @param[in] action_flags
4807  *   Holds the actions detected until now.
4808  * @param[in] action
4809  *   Pointer to the modify action.
4810  * @param[in] attr
4811  *   Pointer to the flow attributes.
4812  * @param[out] error
4813  *   Pointer to error structure.
4814  *
4815  * @return
4816  *   Number of header fields to modify (0 or more) on success,
4817  *   a negative errno value otherwise and rte_errno is set.
4818  */
4819 static int
4820 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4821                                    const uint64_t action_flags,
4822                                    const struct rte_flow_action *action,
4823                                    const struct rte_flow_attr *attr,
4824                                    struct rte_flow_error *error)
4825 {
4826         int ret = 0;
4827         struct mlx5_priv *priv = dev->data->dev_private;
4828         struct mlx5_dev_config *config = &priv->config;
4829         const struct rte_flow_action_modify_field *action_modify_field =
4830                 action->conf;
4831         uint32_t dst_width = mlx5_flow_item_field_width(dev,
4832                                 action_modify_field->dst.field,
4833                                 -1, attr, error);
4834         uint32_t src_width = mlx5_flow_item_field_width(dev,
4835                                 action_modify_field->src.field,
4836                                 dst_width, attr, error);
4837
4838         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4839         if (ret)
4840                 return ret;
4841
4842         if (action_modify_field->width == 0)
4843                 return rte_flow_error_set(error, EINVAL,
4844                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4845                                 "no bits are requested to be modified");
4846         else if (action_modify_field->width > dst_width ||
4847                  action_modify_field->width > src_width)
4848                 return rte_flow_error_set(error, EINVAL,
4849                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4850                                 "cannot modify more bits than"
4851                                 " the width of a field");
4852         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4853             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4854                 if ((action_modify_field->dst.offset +
4855                      action_modify_field->width > dst_width) ||
4856                     (action_modify_field->dst.offset % 32))
4857                         return rte_flow_error_set(error, EINVAL,
4858                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4859                                         "destination offset is too big"
4860                                         " or not aligned to 4 bytes");
4861                 if (action_modify_field->dst.level &&
4862                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4863                         return rte_flow_error_set(error, ENOTSUP,
4864                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4865                                         "inner header fields modification"
4866                                         " is not supported");
4867         }
4868         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4869             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4870                 if (!attr->transfer && !attr->group)
4871                         return rte_flow_error_set(error, ENOTSUP,
4872                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4873                                         "modify field action is not"
4874                                         " supported for group 0");
4875                 if ((action_modify_field->src.offset +
4876                      action_modify_field->width > src_width) ||
4877                     (action_modify_field->src.offset % 32))
4878                         return rte_flow_error_set(error, EINVAL,
4879                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4880                                         "source offset is too big"
4881                                         " or not aligned to 4 bytes");
4882                 if (action_modify_field->src.level &&
4883                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4884                         return rte_flow_error_set(error, ENOTSUP,
4885                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4886                                         "inner header fields modification"
4887                                         " is not supported");
4888         }
4889         if ((action_modify_field->dst.field ==
4890              action_modify_field->src.field) &&
4891             (action_modify_field->dst.level ==
4892              action_modify_field->src.level))
4893                 return rte_flow_error_set(error, EINVAL,
4894                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4895                                 "source and destination fields"
4896                                 " cannot be the same");
4897         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4898             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4899             action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4900                 return rte_flow_error_set(error, EINVAL,
4901                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4902                                 "mark, immediate value or a pointer to it"
4903                                 " cannot be used as a destination");
4904         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4905             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4906                 return rte_flow_error_set(error, ENOTSUP,
4907                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4908                                 "modifications of an arbitrary"
4909                                 " place in a packet is not supported");
4910         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4911             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4912                 return rte_flow_error_set(error, ENOTSUP,
4913                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4914                                 "modifications of the 802.1Q Tag"
4915                                 " Identifier is not supported");
4916         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4917             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4918                 return rte_flow_error_set(error, ENOTSUP,
4919                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4920                                 "modifications of the VXLAN Network"
4921                                 " Identifier is not supported");
4922         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4923             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4924                 return rte_flow_error_set(error, ENOTSUP,
4925                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4926                                 "modifications of the GENEVE Network"
4927                                 " Identifier is not supported");
4928         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4929             action_modify_field->src.field == RTE_FLOW_FIELD_MARK)
4930                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4931                     !mlx5_flow_ext_mreg_supported(dev))
4932                         return rte_flow_error_set(error, ENOTSUP,
4933                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4934                                         "cannot modify mark in legacy mode"
4935                                         " or without extensive registers");
4936         if (action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4937             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4938                 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
4939                     !mlx5_flow_ext_mreg_supported(dev))
4940                         return rte_flow_error_set(error, ENOTSUP,
4941                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4942                                         "cannot modify meta without"
4943                                         " extensive registers support");
4944                 ret = flow_dv_get_metadata_reg(dev, attr, error);
4945                 if (ret < 0 || ret == REG_NON)
4946                         return rte_flow_error_set(error, ENOTSUP,
4947                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4948                                         "cannot modify meta without"
4949                                         " extensive registers available");
4950         }
4951         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4952                 return rte_flow_error_set(error, ENOTSUP,
4953                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4954                                 "add and sub operations"
4955                                 " are not supported");
4956         return (action_modify_field->width / 32) +
4957                !!(action_modify_field->width % 32);
4958 }
4959
4960 /**
4961  * Validate jump action.
4962  *
4963  * @param[in] action
4964  *   Pointer to the jump action.
4965  * @param[in] action_flags
4966  *   Holds the actions detected until now.
4967  * @param[in] attributes
4968  *   Pointer to flow attributes
4969  * @param[in] external
4970  *   Action belongs to flow rule created by request external to PMD.
4971  * @param[out] error
4972  *   Pointer to error structure.
4973  *
4974  * @return
4975  *   0 on success, a negative errno value otherwise and rte_errno is set.
4976  */
4977 static int
4978 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4979                              const struct mlx5_flow_tunnel *tunnel,
4980                              const struct rte_flow_action *action,
4981                              uint64_t action_flags,
4982                              const struct rte_flow_attr *attributes,
4983                              bool external, struct rte_flow_error *error)
4984 {
4985         uint32_t target_group, table;
4986         int ret = 0;
4987         struct flow_grp_info grp_info = {
4988                 .external = !!external,
4989                 .transfer = !!attributes->transfer,
4990                 .fdb_def_rule = 1,
4991                 .std_tbl_fix = 0
4992         };
4993         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4994                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4995                 return rte_flow_error_set(error, EINVAL,
4996                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4997                                           "can't have 2 fate actions in"
4998                                           " same flow");
4999         if (!action->conf)
5000                 return rte_flow_error_set(error, EINVAL,
5001                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5002                                           NULL, "action configuration not set");
5003         target_group =
5004                 ((const struct rte_flow_action_jump *)action->conf)->group;
5005         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5006                                        &grp_info, error);
5007         if (ret)
5008                 return ret;
5009         if (attributes->group == target_group &&
5010             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5011                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5012                 return rte_flow_error_set(error, EINVAL,
5013                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5014                                           "target group must be other than"
5015                                           " the current flow group");
5016         return 0;
5017 }
5018
5019 /*
5020  * Validate action PORT_ID / REPRESENTED_PORT.
5021  *
5022  * @param[in] dev
5023  *   Pointer to rte_eth_dev structure.
5024  * @param[in] action_flags
5025  *   Bit-fields that holds the actions detected until now.
5026  * @param[in] action
5027  *   PORT_ID / REPRESENTED_PORT action structure.
5028  * @param[in] attr
5029  *   Attributes of flow that includes this action.
5030  * @param[out] error
5031  *   Pointer to error structure.
5032  *
5033  * @return
5034  *   0 on success, a negative errno value otherwise and rte_errno is set.
5035  */
5036 static int
5037 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5038                                 uint64_t action_flags,
5039                                 const struct rte_flow_action *action,
5040                                 const struct rte_flow_attr *attr,
5041                                 struct rte_flow_error *error)
5042 {
5043         const struct rte_flow_action_port_id *port_id;
5044         const struct rte_flow_action_ethdev *ethdev;
5045         struct mlx5_priv *act_priv;
5046         struct mlx5_priv *dev_priv;
5047         uint16_t port;
5048
5049         if (!attr->transfer)
5050                 return rte_flow_error_set(error, ENOTSUP,
5051                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5052                                           NULL,
5053                                           "port action is valid in transfer"
5054                                           " mode only");
5055         if (!action || !action->conf)
5056                 return rte_flow_error_set(error, ENOTSUP,
5057                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5058                                           NULL,
5059                                           "port action parameters must be"
5060                                           " specified");
5061         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5062                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5063                 return rte_flow_error_set(error, EINVAL,
5064                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5065                                           "can have only one fate actions in"
5066                                           " a flow");
5067         dev_priv = mlx5_dev_to_eswitch_info(dev);
5068         if (!dev_priv)
5069                 return rte_flow_error_set(error, rte_errno,
5070                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5071                                           NULL,
5072                                           "failed to obtain E-Switch info");
5073         switch (action->type) {
5074         case RTE_FLOW_ACTION_TYPE_PORT_ID:
5075                 port_id = action->conf;
5076                 port = port_id->original ? dev->data->port_id : port_id->id;
5077                 break;
5078         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5079                 ethdev = action->conf;
5080                 port = ethdev->port_id;
5081                 break;
5082         default:
5083                 MLX5_ASSERT(false);
5084                 return rte_flow_error_set
5085                                 (error, EINVAL,
5086                                  RTE_FLOW_ERROR_TYPE_ACTION, action,
5087                                  "unknown E-Switch action");
5088         }
5089         act_priv = mlx5_port_to_eswitch_info(port, false);
5090         if (!act_priv)
5091                 return rte_flow_error_set
5092                                 (error, rte_errno,
5093                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5094                                  "failed to obtain E-Switch port id for port");
5095         if (act_priv->domain_id != dev_priv->domain_id)
5096                 return rte_flow_error_set
5097                                 (error, EINVAL,
5098                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5099                                  "port does not belong to"
5100                                  " E-Switch being configured");
5101         return 0;
5102 }
5103
5104 /**
5105  * Get the maximum number of modify header actions.
5106  *
5107  * @param dev
5108  *   Pointer to rte_eth_dev structure.
5109  * @param root
5110  *   Whether action is on root table.
5111  *
5112  * @return
5113  *   Max number of modify header actions device can support.
5114  */
5115 static inline unsigned int
5116 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5117                               bool root)
5118 {
5119         /*
5120          * There's no way to directly query the max capacity from FW.
5121          * The maximal value on root table should be assumed to be supported.
5122          */
5123         if (!root)
5124                 return MLX5_MAX_MODIFY_NUM;
5125         else
5126                 return MLX5_ROOT_TBL_MODIFY_NUM;
5127 }
5128
5129 /**
5130  * Validate the meter action.
5131  *
5132  * @param[in] dev
5133  *   Pointer to rte_eth_dev structure.
5134  * @param[in] action_flags
5135  *   Bit-fields that holds the actions detected until now.
5136  * @param[in] item_flags
5137  *   Holds the items detected.
5138  * @param[in] action
5139  *   Pointer to the meter action.
5140  * @param[in] attr
5141  *   Attributes of flow that includes this action.
5142  * @param[in] port_id_item
5143  *   Pointer to item indicating port id.
5144  * @param[out] error
5145  *   Pointer to error structure.
5146  *
5147  * @return
5148  *   0 on success, a negative errno value otherwise and rte_ernno is set.
5149  */
5150 static int
5151 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5152                                 uint64_t action_flags, uint64_t item_flags,
5153                                 const struct rte_flow_action *action,
5154                                 const struct rte_flow_attr *attr,
5155                                 const struct rte_flow_item *port_id_item,
5156                                 bool *def_policy,
5157                                 struct rte_flow_error *error)
5158 {
5159         struct mlx5_priv *priv = dev->data->dev_private;
5160         const struct rte_flow_action_meter *am = action->conf;
5161         struct mlx5_flow_meter_info *fm;
5162         struct mlx5_flow_meter_policy *mtr_policy;
5163         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5164
5165         if (!am)
5166                 return rte_flow_error_set(error, EINVAL,
5167                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5168                                           "meter action conf is NULL");
5169
5170         if (action_flags & MLX5_FLOW_ACTION_METER)
5171                 return rte_flow_error_set(error, ENOTSUP,
5172                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5173                                           "meter chaining not support");
5174         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5175                 return rte_flow_error_set(error, ENOTSUP,
5176                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5177                                           "meter with jump not support");
5178         if (!priv->mtr_en)
5179                 return rte_flow_error_set(error, ENOTSUP,
5180                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5181                                           NULL,
5182                                           "meter action not supported");
5183         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5184         if (!fm)
5185                 return rte_flow_error_set(error, EINVAL,
5186                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5187                                           "Meter not found");
5188         /* aso meter can always be shared by different domains */
5189         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5190             !(fm->transfer == attr->transfer ||
5191               (!fm->ingress && !attr->ingress && attr->egress) ||
5192               (!fm->egress && !attr->egress && attr->ingress)))
5193                 return rte_flow_error_set(error, EINVAL,
5194                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5195                         "Flow attributes domain are either invalid "
5196                         "or have a domain conflict with current "
5197                         "meter attributes");
5198         if (fm->def_policy) {
5199                 if (!((attr->transfer &&
5200                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5201                         (attr->egress &&
5202                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5203                         (attr->ingress &&
5204                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5205                         return rte_flow_error_set(error, EINVAL,
5206                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5207                                           "Flow attributes domain "
5208                                           "have a conflict with current "
5209                                           "meter domain attributes");
5210                 *def_policy = true;
5211         } else {
5212                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5213                                                 fm->policy_id, NULL);
5214                 if (!mtr_policy)
5215                         return rte_flow_error_set(error, EINVAL,
5216                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5217                                           "Invalid policy id for meter ");
5218                 if (!((attr->transfer && mtr_policy->transfer) ||
5219                         (attr->egress && mtr_policy->egress) ||
5220                         (attr->ingress && mtr_policy->ingress)))
5221                         return rte_flow_error_set(error, EINVAL,
5222                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5223                                           "Flow attributes domain "
5224                                           "have a conflict with current "
5225                                           "meter domain attributes");
5226                 if (attr->transfer && mtr_policy->dev) {
5227                         /**
5228                          * When policy has fate action of port_id,
5229                          * the flow should have the same src port as policy.
5230                          */
5231                         struct mlx5_priv *policy_port_priv =
5232                                         mtr_policy->dev->data->dev_private;
5233                         int32_t flow_src_port = priv->representor_id;
5234
5235                         if (port_id_item) {
5236                                 const struct rte_flow_item_port_id *spec =
5237                                                         port_id_item->spec;
5238                                 struct mlx5_priv *port_priv =
5239                                         mlx5_port_to_eswitch_info(spec->id,
5240                                                                   false);
5241                                 if (!port_priv)
5242                                         return rte_flow_error_set(error,
5243                                                 rte_errno,
5244                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5245                                                 spec,
5246                                                 "Failed to get port info.");
5247                                 flow_src_port = port_priv->representor_id;
5248                         }
5249                         if (flow_src_port != policy_port_priv->representor_id)
5250                                 return rte_flow_error_set(error,
5251                                                 rte_errno,
5252                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5253                                                 NULL,
5254                                                 "Flow and meter policy "
5255                                                 "have different src port.");
5256                 } else if (mtr_policy->is_rss) {
5257                         struct mlx5_meter_policy_action_container *acg =
5258                                 &mtr_policy->act_cnt[RTE_COLOR_GREEN];
5259                         struct mlx5_meter_policy_action_container *acy =
5260                                 &mtr_policy->act_cnt[RTE_COLOR_YELLOW];
5261                         const struct rte_flow_action *rss_act;
5262                         int ret;
5263
5264                         MLX5_ASSERT(acg->fate_action ==
5265                                     MLX5_FLOW_FATE_SHARED_RSS ||
5266                                     acy->fate_action ==
5267                                     MLX5_FLOW_FATE_SHARED_RSS);
5268                         if (acg->fate_action == MLX5_FLOW_FATE_SHARED_RSS)
5269                                 rss_act = acg->rss;
5270                         else
5271                                 rss_act = acy->rss;
5272                         ret = mlx5_flow_validate_action_rss(rss_act,
5273                                         action_flags, dev, attr,
5274                                         item_flags, error);
5275                         if (ret)
5276                                 return ret;
5277                 }
5278                 *def_policy = false;
5279         }
5280         return 0;
5281 }
5282
5283 /**
5284  * Validate the age action.
5285  *
5286  * @param[in] action_flags
5287  *   Holds the actions detected until now.
5288  * @param[in] action
5289  *   Pointer to the age action.
5290  * @param[in] dev
5291  *   Pointer to the Ethernet device structure.
5292  * @param[out] error
5293  *   Pointer to error structure.
5294  *
5295  * @return
5296  *   0 on success, a negative errno value otherwise and rte_errno is set.
5297  */
5298 static int
5299 flow_dv_validate_action_age(uint64_t action_flags,
5300                             const struct rte_flow_action *action,
5301                             struct rte_eth_dev *dev,
5302                             struct rte_flow_error *error)
5303 {
5304         struct mlx5_priv *priv = dev->data->dev_private;
5305         const struct rte_flow_action_age *age = action->conf;
5306
5307         if (!priv->sh->devx || (priv->sh->cmng.counter_fallback &&
5308             !priv->sh->aso_age_mng))
5309                 return rte_flow_error_set(error, ENOTSUP,
5310                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5311                                           NULL,
5312                                           "age action not supported");
5313         if (!(action->conf))
5314                 return rte_flow_error_set(error, EINVAL,
5315                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5316                                           "configuration cannot be null");
5317         if (!(age->timeout))
5318                 return rte_flow_error_set(error, EINVAL,
5319                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5320                                           "invalid timeout value 0");
5321         if (action_flags & MLX5_FLOW_ACTION_AGE)
5322                 return rte_flow_error_set(error, EINVAL,
5323                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5324                                           "duplicate age actions set");
5325         return 0;
5326 }
5327
5328 /**
5329  * Validate the modify-header IPv4 DSCP actions.
5330  *
5331  * @param[in] action_flags
5332  *   Holds the actions detected until now.
5333  * @param[in] action
5334  *   Pointer to the modify action.
5335  * @param[in] item_flags
5336  *   Holds the items detected.
5337  * @param[out] error
5338  *   Pointer to error structure.
5339  *
5340  * @return
5341  *   0 on success, a negative errno value otherwise and rte_errno is set.
5342  */
5343 static int
5344 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5345                                          const struct rte_flow_action *action,
5346                                          const uint64_t item_flags,
5347                                          struct rte_flow_error *error)
5348 {
5349         int ret = 0;
5350
5351         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5352         if (!ret) {
5353                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5354                         return rte_flow_error_set(error, EINVAL,
5355                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5356                                                   NULL,
5357                                                   "no ipv4 item in pattern");
5358         }
5359         return ret;
5360 }
5361
5362 /**
5363  * Validate the modify-header IPv6 DSCP actions.
5364  *
5365  * @param[in] action_flags
5366  *   Holds the actions detected until now.
5367  * @param[in] action
5368  *   Pointer to the modify action.
5369  * @param[in] item_flags
5370  *   Holds the items detected.
5371  * @param[out] error
5372  *   Pointer to error structure.
5373  *
5374  * @return
5375  *   0 on success, a negative errno value otherwise and rte_errno is set.
5376  */
5377 static int
5378 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5379                                          const struct rte_flow_action *action,
5380                                          const uint64_t item_flags,
5381                                          struct rte_flow_error *error)
5382 {
5383         int ret = 0;
5384
5385         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5386         if (!ret) {
5387                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5388                         return rte_flow_error_set(error, EINVAL,
5389                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5390                                                   NULL,
5391                                                   "no ipv6 item in pattern");
5392         }
5393         return ret;
5394 }
5395
5396 int
5397 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5398                         struct mlx5_list_entry *entry, void *cb_ctx)
5399 {
5400         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5401         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5402         struct mlx5_flow_dv_modify_hdr_resource *resource =
5403                                   container_of(entry, typeof(*resource), entry);
5404         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5405
5406         key_len += ref->actions_num * sizeof(ref->actions[0]);
5407         return ref->actions_num != resource->actions_num ||
5408                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5409 }
5410
5411 static struct mlx5_indexed_pool *
5412 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5413 {
5414         struct mlx5_indexed_pool *ipool = __atomic_load_n
5415                                      (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5416
5417         if (!ipool) {
5418                 struct mlx5_indexed_pool *expected = NULL;
5419                 struct mlx5_indexed_pool_config cfg =
5420                     (struct mlx5_indexed_pool_config) {
5421                        .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5422                                                                    (index + 1) *
5423                                            sizeof(struct mlx5_modification_cmd),
5424                        .trunk_size = 64,
5425                        .grow_trunk = 3,
5426                        .grow_shift = 2,
5427                        .need_lock = 1,
5428                        .release_mem_en = !!sh->reclaim_mode,
5429                        .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5430                        .malloc = mlx5_malloc,
5431                        .free = mlx5_free,
5432                        .type = "mlx5_modify_action_resource",
5433                 };
5434
5435                 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5436                 ipool = mlx5_ipool_create(&cfg);
5437                 if (!ipool)
5438                         return NULL;
5439                 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5440                                                  &expected, ipool, false,
5441                                                  __ATOMIC_SEQ_CST,
5442                                                  __ATOMIC_SEQ_CST)) {
5443                         mlx5_ipool_destroy(ipool);
5444                         ipool = __atomic_load_n(&sh->mdh_ipools[index],
5445                                                 __ATOMIC_SEQ_CST);
5446                 }
5447         }
5448         return ipool;
5449 }
5450
5451 struct mlx5_list_entry *
5452 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5453 {
5454         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5455         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5456         struct mlx5dv_dr_domain *ns;
5457         struct mlx5_flow_dv_modify_hdr_resource *entry;
5458         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5459         struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5460                                                           ref->actions_num - 1);
5461         int ret;
5462         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5463         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5464         uint32_t idx;
5465
5466         if (unlikely(!ipool)) {
5467                 rte_flow_error_set(ctx->error, ENOMEM,
5468                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5469                                    NULL, "cannot allocate modify ipool");
5470                 return NULL;
5471         }
5472         entry = mlx5_ipool_zmalloc(ipool, &idx);
5473         if (!entry) {
5474                 rte_flow_error_set(ctx->error, ENOMEM,
5475                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5476                                    "cannot allocate resource memory");
5477                 return NULL;
5478         }
5479         rte_memcpy(&entry->ft_type,
5480                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5481                    key_len + data_len);
5482         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5483                 ns = sh->fdb_domain;
5484         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5485                 ns = sh->tx_domain;
5486         else
5487                 ns = sh->rx_domain;
5488         ret = mlx5_flow_os_create_flow_action_modify_header
5489                                         (sh->cdev->ctx, ns, entry,
5490                                          data_len, &entry->action);
5491         if (ret) {
5492                 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5493                 rte_flow_error_set(ctx->error, ENOMEM,
5494                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5495                                    NULL, "cannot create modification action");
5496                 return NULL;
5497         }
5498         entry->idx = idx;
5499         return &entry->entry;
5500 }
5501
5502 struct mlx5_list_entry *
5503 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5504                         void *cb_ctx)
5505 {
5506         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5507         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5508         struct mlx5_flow_dv_modify_hdr_resource *entry;
5509         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5510         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5511         uint32_t idx;
5512
5513         entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5514                                   &idx);
5515         if (!entry) {
5516                 rte_flow_error_set(ctx->error, ENOMEM,
5517                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5518                                    "cannot allocate resource memory");
5519                 return NULL;
5520         }
5521         memcpy(entry, oentry, sizeof(*entry) + data_len);
5522         entry->idx = idx;
5523         return &entry->entry;
5524 }
5525
5526 void
5527 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5528 {
5529         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5530         struct mlx5_flow_dv_modify_hdr_resource *res =
5531                 container_of(entry, typeof(*res), entry);
5532
5533         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5534 }
5535
5536 /**
5537  * Validate the sample action.
5538  *
5539  * @param[in, out] action_flags
5540  *   Holds the actions detected until now.
5541  * @param[in] action
5542  *   Pointer to the sample action.
5543  * @param[in] dev
5544  *   Pointer to the Ethernet device structure.
5545  * @param[in] attr
5546  *   Attributes of flow that includes this action.
5547  * @param[in] item_flags
5548  *   Holds the items detected.
5549  * @param[in] rss
5550  *   Pointer to the RSS action.
5551  * @param[out] sample_rss
5552  *   Pointer to the RSS action in sample action list.
5553  * @param[out] count
5554  *   Pointer to the COUNT action in sample action list.
5555  * @param[out] fdb_mirror_limit
5556  *   Pointer to the FDB mirror limitation flag.
5557  * @param[out] error
5558  *   Pointer to error structure.
5559  *
5560  * @return
5561  *   0 on success, a negative errno value otherwise and rte_errno is set.
5562  */
5563 static int
5564 flow_dv_validate_action_sample(uint64_t *action_flags,
5565                                const struct rte_flow_action *action,
5566                                struct rte_eth_dev *dev,
5567                                const struct rte_flow_attr *attr,
5568                                uint64_t item_flags,
5569                                const struct rte_flow_action_rss *rss,
5570                                const struct rte_flow_action_rss **sample_rss,
5571                                const struct rte_flow_action_count **count,
5572                                int *fdb_mirror_limit,
5573                                struct rte_flow_error *error)
5574 {
5575         struct mlx5_priv *priv = dev->data->dev_private;
5576         struct mlx5_dev_config *dev_conf = &priv->config;
5577         const struct rte_flow_action_sample *sample = action->conf;
5578         const struct rte_flow_action *act;
5579         uint64_t sub_action_flags = 0;
5580         uint16_t queue_index = 0xFFFF;
5581         int actions_n = 0;
5582         int ret;
5583
5584         if (!sample)
5585                 return rte_flow_error_set(error, EINVAL,
5586                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5587                                           "configuration cannot be NULL");
5588         if (sample->ratio == 0)
5589                 return rte_flow_error_set(error, EINVAL,
5590                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5591                                           "ratio value starts from 1");
5592         if (!priv->sh->devx || (sample->ratio > 0 && !priv->sampler_en))
5593                 return rte_flow_error_set(error, ENOTSUP,
5594                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5595                                           NULL,
5596                                           "sample action not supported");
5597         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5598                 return rte_flow_error_set(error, EINVAL,
5599                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5600                                           "Multiple sample actions not "
5601                                           "supported");
5602         if (*action_flags & MLX5_FLOW_ACTION_METER)
5603                 return rte_flow_error_set(error, EINVAL,
5604                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5605                                           "wrong action order, meter should "
5606                                           "be after sample action");
5607         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5608                 return rte_flow_error_set(error, EINVAL,
5609                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5610                                           "wrong action order, jump should "
5611                                           "be after sample action");
5612         if (*action_flags & MLX5_FLOW_ACTION_CT)
5613                 return rte_flow_error_set(error, EINVAL,
5614                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5615                                           "Sample after CT not supported");
5616         act = sample->actions;
5617         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5618                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5619                         return rte_flow_error_set(error, ENOTSUP,
5620                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5621                                                   act, "too many actions");
5622                 switch (act->type) {
5623                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5624                         ret = mlx5_flow_validate_action_queue(act,
5625                                                               sub_action_flags,
5626                                                               dev,
5627                                                               attr, error);
5628                         if (ret < 0)
5629                                 return ret;
5630                         queue_index = ((const struct rte_flow_action_queue *)
5631                                                         (act->conf))->index;
5632                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5633                         ++actions_n;
5634                         break;
5635                 case RTE_FLOW_ACTION_TYPE_RSS:
5636                         *sample_rss = act->conf;
5637                         ret = mlx5_flow_validate_action_rss(act,
5638                                                             sub_action_flags,
5639                                                             dev, attr,
5640                                                             item_flags,
5641                                                             error);
5642                         if (ret < 0)
5643                                 return ret;
5644                         if (rss && *sample_rss &&
5645                             ((*sample_rss)->level != rss->level ||
5646                             (*sample_rss)->types != rss->types))
5647                                 return rte_flow_error_set(error, ENOTSUP,
5648                                         RTE_FLOW_ERROR_TYPE_ACTION,
5649                                         NULL,
5650                                         "Can't use the different RSS types "
5651                                         "or level in the same flow");
5652                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5653                                 queue_index = (*sample_rss)->queue[0];
5654                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5655                         ++actions_n;
5656                         break;
5657                 case RTE_FLOW_ACTION_TYPE_MARK:
5658                         ret = flow_dv_validate_action_mark(dev, act,
5659                                                            sub_action_flags,
5660                                                            attr, error);
5661                         if (ret < 0)
5662                                 return ret;
5663                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5664                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5665                                                 MLX5_FLOW_ACTION_MARK_EXT;
5666                         else
5667                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5668                         ++actions_n;
5669                         break;
5670                 case RTE_FLOW_ACTION_TYPE_COUNT:
5671                         ret = flow_dv_validate_action_count
5672                                 (dev, false, *action_flags | sub_action_flags,
5673                                  error);
5674                         if (ret < 0)
5675                                 return ret;
5676                         *count = act->conf;
5677                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5678                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5679                         ++actions_n;
5680                         break;
5681                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5682                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5683                         ret = flow_dv_validate_action_port_id(dev,
5684                                                               sub_action_flags,
5685                                                               act,
5686                                                               attr,
5687                                                               error);
5688                         if (ret)
5689                                 return ret;
5690                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5691                         ++actions_n;
5692                         break;
5693                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5694                         ret = flow_dv_validate_action_raw_encap_decap
5695                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5696                                  &actions_n, action, item_flags, error);
5697                         if (ret < 0)
5698                                 return ret;
5699                         ++actions_n;
5700                         break;
5701                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5702                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5703                         ret = flow_dv_validate_action_l2_encap(dev,
5704                                                                sub_action_flags,
5705                                                                act, attr,
5706                                                                error);
5707                         if (ret < 0)
5708                                 return ret;
5709                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5710                         ++actions_n;
5711                         break;
5712                 default:
5713                         return rte_flow_error_set(error, ENOTSUP,
5714                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5715                                                   NULL,
5716                                                   "Doesn't support optional "
5717                                                   "action");
5718                 }
5719         }
5720         if (attr->ingress && !attr->transfer) {
5721                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5722                                           MLX5_FLOW_ACTION_RSS)))
5723                         return rte_flow_error_set(error, EINVAL,
5724                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5725                                                   NULL,
5726                                                   "Ingress must has a dest "
5727                                                   "QUEUE for Sample");
5728         } else if (attr->egress && !attr->transfer) {
5729                 return rte_flow_error_set(error, ENOTSUP,
5730                                           RTE_FLOW_ERROR_TYPE_ACTION,
5731                                           NULL,
5732                                           "Sample Only support Ingress "
5733                                           "or E-Switch");
5734         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5735                 MLX5_ASSERT(attr->transfer);
5736                 if (sample->ratio > 1)
5737                         return rte_flow_error_set(error, ENOTSUP,
5738                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5739                                                   NULL,
5740                                                   "E-Switch doesn't support "
5741                                                   "any optional action "
5742                                                   "for sampling");
5743                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5744                         return rte_flow_error_set(error, ENOTSUP,
5745                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5746                                                   NULL,
5747                                                   "unsupported action QUEUE");
5748                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5749                         return rte_flow_error_set(error, ENOTSUP,
5750                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5751                                                   NULL,
5752                                                   "unsupported action QUEUE");
5753                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5754                         return rte_flow_error_set(error, EINVAL,
5755                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5756                                                   NULL,
5757                                                   "E-Switch must has a dest "
5758                                                   "port for mirroring");
5759                 if (!priv->config.hca_attr.reg_c_preserve &&
5760                      priv->representor_id != UINT16_MAX)
5761                         *fdb_mirror_limit = 1;
5762         }
5763         /* Continue validation for Xcap actions.*/
5764         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5765             (queue_index == 0xFFFF ||
5766              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5767                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5768                      MLX5_FLOW_XCAP_ACTIONS)
5769                         return rte_flow_error_set(error, ENOTSUP,
5770                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5771                                                   NULL, "encap and decap "
5772                                                   "combination aren't "
5773                                                   "supported");
5774                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5775                                                         MLX5_FLOW_ACTION_ENCAP))
5776                         return rte_flow_error_set(error, ENOTSUP,
5777                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5778                                                   NULL, "encap is not supported"
5779                                                   " for ingress traffic");
5780         }
5781         return 0;
5782 }
5783
5784 /**
5785  * Find existing modify-header resource or create and register a new one.
5786  *
5787  * @param dev[in, out]
5788  *   Pointer to rte_eth_dev structure.
5789  * @param[in, out] resource
5790  *   Pointer to modify-header resource.
5791  * @parm[in, out] dev_flow
5792  *   Pointer to the dev_flow.
5793  * @param[out] error
5794  *   pointer to error structure.
5795  *
5796  * @return
5797  *   0 on success otherwise -errno and errno is set.
5798  */
5799 static int
5800 flow_dv_modify_hdr_resource_register
5801                         (struct rte_eth_dev *dev,
5802                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5803                          struct mlx5_flow *dev_flow,
5804                          struct rte_flow_error *error)
5805 {
5806         struct mlx5_priv *priv = dev->data->dev_private;
5807         struct mlx5_dev_ctx_shared *sh = priv->sh;
5808         uint32_t key_len = sizeof(*resource) -
5809                            offsetof(typeof(*resource), ft_type) +
5810                            resource->actions_num * sizeof(resource->actions[0]);
5811         struct mlx5_list_entry *entry;
5812         struct mlx5_flow_cb_ctx ctx = {
5813                 .error = error,
5814                 .data = resource,
5815         };
5816         struct mlx5_hlist *modify_cmds;
5817         uint64_t key64;
5818
5819         modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5820                                 "hdr_modify",
5821                                 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5822                                 true, false, sh,
5823                                 flow_dv_modify_create_cb,
5824                                 flow_dv_modify_match_cb,
5825                                 flow_dv_modify_remove_cb,
5826                                 flow_dv_modify_clone_cb,
5827                                 flow_dv_modify_clone_free_cb);
5828         if (unlikely(!modify_cmds))
5829                 return -rte_errno;
5830         resource->root = !dev_flow->dv.group;
5831         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5832                                                                 resource->root))
5833                 return rte_flow_error_set(error, EOVERFLOW,
5834                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5835                                           "too many modify header items");
5836         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5837         entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5838         if (!entry)
5839                 return -rte_errno;
5840         resource = container_of(entry, typeof(*resource), entry);
5841         dev_flow->handle->dvh.modify_hdr = resource;
5842         return 0;
5843 }
5844
5845 /**
5846  * Get DV flow counter by index.
5847  *
5848  * @param[in] dev
5849  *   Pointer to the Ethernet device structure.
5850  * @param[in] idx
5851  *   mlx5 flow counter index in the container.
5852  * @param[out] ppool
5853  *   mlx5 flow counter pool in the container.
5854  *
5855  * @return
5856  *   Pointer to the counter, NULL otherwise.
5857  */
5858 static struct mlx5_flow_counter *
5859 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5860                            uint32_t idx,
5861                            struct mlx5_flow_counter_pool **ppool)
5862 {
5863         struct mlx5_priv *priv = dev->data->dev_private;
5864         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5865         struct mlx5_flow_counter_pool *pool;
5866
5867         /* Decrease to original index and clear shared bit. */
5868         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5869         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5870         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5871         MLX5_ASSERT(pool);
5872         if (ppool)
5873                 *ppool = pool;
5874         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5875 }
5876
5877 /**
5878  * Check the devx counter belongs to the pool.
5879  *
5880  * @param[in] pool
5881  *   Pointer to the counter pool.
5882  * @param[in] id
5883  *   The counter devx ID.
5884  *
5885  * @return
5886  *   True if counter belongs to the pool, false otherwise.
5887  */
5888 static bool
5889 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5890 {
5891         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5892                    MLX5_COUNTERS_PER_POOL;
5893
5894         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5895                 return true;
5896         return false;
5897 }
5898
5899 /**
5900  * Get a pool by devx counter ID.
5901  *
5902  * @param[in] cmng
5903  *   Pointer to the counter management.
5904  * @param[in] id
5905  *   The counter devx ID.
5906  *
5907  * @return
5908  *   The counter pool pointer if exists, NULL otherwise,
5909  */
5910 static struct mlx5_flow_counter_pool *
5911 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5912 {
5913         uint32_t i;
5914         struct mlx5_flow_counter_pool *pool = NULL;
5915
5916         rte_spinlock_lock(&cmng->pool_update_sl);
5917         /* Check last used pool. */
5918         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5919             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5920                 pool = cmng->pools[cmng->last_pool_idx];
5921                 goto out;
5922         }
5923         /* ID out of range means no suitable pool in the container. */
5924         if (id > cmng->max_id || id < cmng->min_id)
5925                 goto out;
5926         /*
5927          * Find the pool from the end of the container, since mostly counter
5928          * ID is sequence increasing, and the last pool should be the needed
5929          * one.
5930          */
5931         i = cmng->n_valid;
5932         while (i--) {
5933                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5934
5935                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5936                         pool = pool_tmp;
5937                         break;
5938                 }
5939         }
5940 out:
5941         rte_spinlock_unlock(&cmng->pool_update_sl);
5942         return pool;
5943 }
5944
5945 /**
5946  * Resize a counter container.
5947  *
5948  * @param[in] dev
5949  *   Pointer to the Ethernet device structure.
5950  *
5951  * @return
5952  *   0 on success, otherwise negative errno value and rte_errno is set.
5953  */
5954 static int
5955 flow_dv_container_resize(struct rte_eth_dev *dev)
5956 {
5957         struct mlx5_priv *priv = dev->data->dev_private;
5958         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5959         void *old_pools = cmng->pools;
5960         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5961         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5962         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5963
5964         if (!pools) {
5965                 rte_errno = ENOMEM;
5966                 return -ENOMEM;
5967         }
5968         if (old_pools)
5969                 memcpy(pools, old_pools, cmng->n *
5970                                        sizeof(struct mlx5_flow_counter_pool *));
5971         cmng->n = resize;
5972         cmng->pools = pools;
5973         if (old_pools)
5974                 mlx5_free(old_pools);
5975         return 0;
5976 }
5977
5978 /**
5979  * Query a devx flow counter.
5980  *
5981  * @param[in] dev
5982  *   Pointer to the Ethernet device structure.
5983  * @param[in] counter
5984  *   Index to the flow counter.
5985  * @param[out] pkts
5986  *   The statistics value of packets.
5987  * @param[out] bytes
5988  *   The statistics value of bytes.
5989  *
5990  * @return
5991  *   0 on success, otherwise a negative errno value and rte_errno is set.
5992  */
5993 static inline int
5994 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5995                      uint64_t *bytes)
5996 {
5997         struct mlx5_priv *priv = dev->data->dev_private;
5998         struct mlx5_flow_counter_pool *pool = NULL;
5999         struct mlx5_flow_counter *cnt;
6000         int offset;
6001
6002         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6003         MLX5_ASSERT(pool);
6004         if (priv->sh->cmng.counter_fallback)
6005                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
6006                                         0, pkts, bytes, 0, NULL, NULL, 0);
6007         rte_spinlock_lock(&pool->sl);
6008         if (!pool->raw) {
6009                 *pkts = 0;
6010                 *bytes = 0;
6011         } else {
6012                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
6013                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
6014                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
6015         }
6016         rte_spinlock_unlock(&pool->sl);
6017         return 0;
6018 }
6019
6020 /**
6021  * Create and initialize a new counter pool.
6022  *
6023  * @param[in] dev
6024  *   Pointer to the Ethernet device structure.
6025  * @param[out] dcs
6026  *   The devX counter handle.
6027  * @param[in] age
6028  *   Whether the pool is for counter that was allocated for aging.
6029  * @param[in/out] cont_cur
6030  *   Pointer to the container pointer, it will be update in pool resize.
6031  *
6032  * @return
6033  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
6034  */
6035 static struct mlx5_flow_counter_pool *
6036 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6037                     uint32_t age)
6038 {
6039         struct mlx5_priv *priv = dev->data->dev_private;
6040         struct mlx5_flow_counter_pool *pool;
6041         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6042         bool fallback = priv->sh->cmng.counter_fallback;
6043         uint32_t size = sizeof(*pool);
6044
6045         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6046         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6047         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6048         if (!pool) {
6049                 rte_errno = ENOMEM;
6050                 return NULL;
6051         }
6052         pool->raw = NULL;
6053         pool->is_aged = !!age;
6054         pool->query_gen = 0;
6055         pool->min_dcs = dcs;
6056         rte_spinlock_init(&pool->sl);
6057         rte_spinlock_init(&pool->csl);
6058         TAILQ_INIT(&pool->counters[0]);
6059         TAILQ_INIT(&pool->counters[1]);
6060         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6061         rte_spinlock_lock(&cmng->pool_update_sl);
6062         pool->index = cmng->n_valid;
6063         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6064                 mlx5_free(pool);
6065                 rte_spinlock_unlock(&cmng->pool_update_sl);
6066                 return NULL;
6067         }
6068         cmng->pools[pool->index] = pool;
6069         cmng->n_valid++;
6070         if (unlikely(fallback)) {
6071                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6072
6073                 if (base < cmng->min_id)
6074                         cmng->min_id = base;
6075                 if (base > cmng->max_id)
6076                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6077                 cmng->last_pool_idx = pool->index;
6078         }
6079         rte_spinlock_unlock(&cmng->pool_update_sl);
6080         return pool;
6081 }
6082
6083 /**
6084  * Prepare a new counter and/or a new counter pool.
6085  *
6086  * @param[in] dev
6087  *   Pointer to the Ethernet device structure.
6088  * @param[out] cnt_free
6089  *   Where to put the pointer of a new counter.
6090  * @param[in] age
6091  *   Whether the pool is for counter that was allocated for aging.
6092  *
6093  * @return
6094  *   The counter pool pointer and @p cnt_free is set on success,
6095  *   NULL otherwise and rte_errno is set.
6096  */
6097 static struct mlx5_flow_counter_pool *
6098 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6099                              struct mlx5_flow_counter **cnt_free,
6100                              uint32_t age)
6101 {
6102         struct mlx5_priv *priv = dev->data->dev_private;
6103         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6104         struct mlx5_flow_counter_pool *pool;
6105         struct mlx5_counters tmp_tq;
6106         struct mlx5_devx_obj *dcs = NULL;
6107         struct mlx5_flow_counter *cnt;
6108         enum mlx5_counter_type cnt_type =
6109                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6110         bool fallback = priv->sh->cmng.counter_fallback;
6111         uint32_t i;
6112
6113         if (fallback) {
6114                 /* bulk_bitmap must be 0 for single counter allocation. */
6115                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6116                 if (!dcs)
6117                         return NULL;
6118                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6119                 if (!pool) {
6120                         pool = flow_dv_pool_create(dev, dcs, age);
6121                         if (!pool) {
6122                                 mlx5_devx_cmd_destroy(dcs);
6123                                 return NULL;
6124                         }
6125                 }
6126                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6127                 cnt = MLX5_POOL_GET_CNT(pool, i);
6128                 cnt->pool = pool;
6129                 cnt->dcs_when_free = dcs;
6130                 *cnt_free = cnt;
6131                 return pool;
6132         }
6133         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6134         if (!dcs) {
6135                 rte_errno = ENODATA;
6136                 return NULL;
6137         }
6138         pool = flow_dv_pool_create(dev, dcs, age);
6139         if (!pool) {
6140                 mlx5_devx_cmd_destroy(dcs);
6141                 return NULL;
6142         }
6143         TAILQ_INIT(&tmp_tq);
6144         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6145                 cnt = MLX5_POOL_GET_CNT(pool, i);
6146                 cnt->pool = pool;
6147                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6148         }
6149         rte_spinlock_lock(&cmng->csl[cnt_type]);
6150         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6151         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6152         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6153         (*cnt_free)->pool = pool;
6154         return pool;
6155 }
6156
6157 /**
6158  * Allocate a flow counter.
6159  *
6160  * @param[in] dev
6161  *   Pointer to the Ethernet device structure.
6162  * @param[in] age
6163  *   Whether the counter was allocated for aging.
6164  *
6165  * @return
6166  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6167  */
6168 static uint32_t
6169 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6170 {
6171         struct mlx5_priv *priv = dev->data->dev_private;
6172         struct mlx5_flow_counter_pool *pool = NULL;
6173         struct mlx5_flow_counter *cnt_free = NULL;
6174         bool fallback = priv->sh->cmng.counter_fallback;
6175         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6176         enum mlx5_counter_type cnt_type =
6177                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6178         uint32_t cnt_idx;
6179
6180         if (!priv->sh->devx) {
6181                 rte_errno = ENOTSUP;
6182                 return 0;
6183         }
6184         /* Get free counters from container. */
6185         rte_spinlock_lock(&cmng->csl[cnt_type]);
6186         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6187         if (cnt_free)
6188                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6189         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6190         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6191                 goto err;
6192         pool = cnt_free->pool;
6193         if (fallback)
6194                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6195         /* Create a DV counter action only in the first time usage. */
6196         if (!cnt_free->action) {
6197                 uint16_t offset;
6198                 struct mlx5_devx_obj *dcs;
6199                 int ret;
6200
6201                 if (!fallback) {
6202                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6203                         dcs = pool->min_dcs;
6204                 } else {
6205                         offset = 0;
6206                         dcs = cnt_free->dcs_when_free;
6207                 }
6208                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6209                                                             &cnt_free->action);
6210                 if (ret) {
6211                         rte_errno = errno;
6212                         goto err;
6213                 }
6214         }
6215         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6216                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6217         /* Update the counter reset values. */
6218         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6219                                  &cnt_free->bytes))
6220                 goto err;
6221         if (!fallback && !priv->sh->cmng.query_thread_on)
6222                 /* Start the asynchronous batch query by the host thread. */
6223                 mlx5_set_query_alarm(priv->sh);
6224         /*
6225          * When the count action isn't shared (by ID), shared_info field is
6226          * used for indirect action API's refcnt.
6227          * When the counter action is not shared neither by ID nor by indirect
6228          * action API, shared info must be 1.
6229          */
6230         cnt_free->shared_info.refcnt = 1;
6231         return cnt_idx;
6232 err:
6233         if (cnt_free) {
6234                 cnt_free->pool = pool;
6235                 if (fallback)
6236                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6237                 rte_spinlock_lock(&cmng->csl[cnt_type]);
6238                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6239                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6240         }
6241         return 0;
6242 }
6243
6244 /**
6245  * Get age param from counter index.
6246  *
6247  * @param[in] dev
6248  *   Pointer to the Ethernet device structure.
6249  * @param[in] counter
6250  *   Index to the counter handler.
6251  *
6252  * @return
6253  *   The aging parameter specified for the counter index.
6254  */
6255 static struct mlx5_age_param*
6256 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6257                                 uint32_t counter)
6258 {
6259         struct mlx5_flow_counter *cnt;
6260         struct mlx5_flow_counter_pool *pool = NULL;
6261
6262         flow_dv_counter_get_by_idx(dev, counter, &pool);
6263         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6264         cnt = MLX5_POOL_GET_CNT(pool, counter);
6265         return MLX5_CNT_TO_AGE(cnt);
6266 }
6267
6268 /**
6269  * Remove a flow counter from aged counter list.
6270  *
6271  * @param[in] dev
6272  *   Pointer to the Ethernet device structure.
6273  * @param[in] counter
6274  *   Index to the counter handler.
6275  * @param[in] cnt
6276  *   Pointer to the counter handler.
6277  */
6278 static void
6279 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6280                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6281 {
6282         struct mlx5_age_info *age_info;
6283         struct mlx5_age_param *age_param;
6284         struct mlx5_priv *priv = dev->data->dev_private;
6285         uint16_t expected = AGE_CANDIDATE;
6286
6287         age_info = GET_PORT_AGE_INFO(priv);
6288         age_param = flow_dv_counter_idx_get_age(dev, counter);
6289         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6290                                          AGE_FREE, false, __ATOMIC_RELAXED,
6291                                          __ATOMIC_RELAXED)) {
6292                 /**
6293                  * We need the lock even it is age timeout,
6294                  * since counter may still in process.
6295                  */
6296                 rte_spinlock_lock(&age_info->aged_sl);
6297                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6298                 rte_spinlock_unlock(&age_info->aged_sl);
6299                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6300         }
6301 }
6302
6303 /**
6304  * Release a flow counter.
6305  *
6306  * @param[in] dev
6307  *   Pointer to the Ethernet device structure.
6308  * @param[in] counter
6309  *   Index to the counter handler.
6310  */
6311 static void
6312 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6313 {
6314         struct mlx5_priv *priv = dev->data->dev_private;
6315         struct mlx5_flow_counter_pool *pool = NULL;
6316         struct mlx5_flow_counter *cnt;
6317         enum mlx5_counter_type cnt_type;
6318
6319         if (!counter)
6320                 return;
6321         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6322         MLX5_ASSERT(pool);
6323         if (pool->is_aged) {
6324                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6325         } else {
6326                 /*
6327                  * If the counter action is shared by indirect action API,
6328                  * the atomic function reduces its references counter.
6329                  * If after the reduction the action is still referenced, the
6330                  * function returns here and does not release it.
6331                  * When the counter action is not shared by
6332                  * indirect action API, shared info is 1 before the reduction,
6333                  * so this condition is failed and function doesn't return here.
6334                  */
6335                 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6336                                        __ATOMIC_RELAXED))
6337                         return;
6338         }
6339         cnt->pool = pool;
6340         /*
6341          * Put the counter back to list to be updated in none fallback mode.
6342          * Currently, we are using two list alternately, while one is in query,
6343          * add the freed counter to the other list based on the pool query_gen
6344          * value. After query finishes, add counter the list to the global
6345          * container counter list. The list changes while query starts. In
6346          * this case, lock will not be needed as query callback and release
6347          * function both operate with the different list.
6348          */
6349         if (!priv->sh->cmng.counter_fallback) {
6350                 rte_spinlock_lock(&pool->csl);
6351                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6352                 rte_spinlock_unlock(&pool->csl);
6353         } else {
6354                 cnt->dcs_when_free = cnt->dcs_when_active;
6355                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6356                                            MLX5_COUNTER_TYPE_ORIGIN;
6357                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6358                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6359                                   cnt, next);
6360                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6361         }
6362 }
6363
6364 /**
6365  * Resize a meter id container.
6366  *
6367  * @param[in] dev
6368  *   Pointer to the Ethernet device structure.
6369  *
6370  * @return
6371  *   0 on success, otherwise negative errno value and rte_errno is set.
6372  */
6373 static int
6374 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6375 {
6376         struct mlx5_priv *priv = dev->data->dev_private;
6377         struct mlx5_aso_mtr_pools_mng *pools_mng =
6378                                 &priv->sh->mtrmng->pools_mng;
6379         void *old_pools = pools_mng->pools;
6380         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6381         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6382         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6383
6384         if (!pools) {
6385                 rte_errno = ENOMEM;
6386                 return -ENOMEM;
6387         }
6388         if (!pools_mng->n)
6389                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6390                         mlx5_free(pools);
6391                         return -ENOMEM;
6392                 }
6393         if (old_pools)
6394                 memcpy(pools, old_pools, pools_mng->n *
6395                                        sizeof(struct mlx5_aso_mtr_pool *));
6396         pools_mng->n = resize;
6397         pools_mng->pools = pools;
6398         if (old_pools)
6399                 mlx5_free(old_pools);
6400         return 0;
6401 }
6402
6403 /**
6404  * Prepare a new meter and/or a new meter pool.
6405  *
6406  * @param[in] dev
6407  *   Pointer to the Ethernet device structure.
6408  * @param[out] mtr_free
6409  *   Where to put the pointer of a new meter.g.
6410  *
6411  * @return
6412  *   The meter pool pointer and @mtr_free is set on success,
6413  *   NULL otherwise and rte_errno is set.
6414  */
6415 static struct mlx5_aso_mtr_pool *
6416 flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
6417 {
6418         struct mlx5_priv *priv = dev->data->dev_private;
6419         struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
6420         struct mlx5_aso_mtr_pool *pool = NULL;
6421         struct mlx5_devx_obj *dcs = NULL;
6422         uint32_t i;
6423         uint32_t log_obj_size;
6424
6425         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6426         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6427                                                       priv->sh->cdev->pdn,
6428                                                       log_obj_size);
6429         if (!dcs) {
6430                 rte_errno = ENODATA;
6431                 return NULL;
6432         }
6433         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6434         if (!pool) {
6435                 rte_errno = ENOMEM;
6436                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6437                 return NULL;
6438         }
6439         pool->devx_obj = dcs;
6440         rte_rwlock_write_lock(&pools_mng->resize_mtrwl);
6441         pool->index = pools_mng->n_valid;
6442         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6443                 mlx5_free(pool);
6444                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6445                 rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6446                 return NULL;
6447         }
6448         pools_mng->pools[pool->index] = pool;
6449         pools_mng->n_valid++;
6450         rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6451         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6452                 pool->mtrs[i].offset = i;
6453                 LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
6454         }
6455         pool->mtrs[0].offset = 0;
6456         *mtr_free = &pool->mtrs[0];
6457         return pool;
6458 }
6459
6460 /**
6461  * Release a flow meter into pool.
6462  *
6463  * @param[in] dev
6464  *   Pointer to the Ethernet device structure.
6465  * @param[in] mtr_idx
6466  *   Index to aso flow meter.
6467  */
6468 static void
6469 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6470 {
6471         struct mlx5_priv *priv = dev->data->dev_private;
6472         struct mlx5_aso_mtr_pools_mng *pools_mng =
6473                                 &priv->sh->mtrmng->pools_mng;
6474         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6475
6476         MLX5_ASSERT(aso_mtr);
6477         rte_spinlock_lock(&pools_mng->mtrsl);
6478         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6479         aso_mtr->state = ASO_METER_FREE;
6480         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6481         rte_spinlock_unlock(&pools_mng->mtrsl);
6482 }
6483
6484 /**
6485  * Allocate a aso flow meter.
6486  *
6487  * @param[in] dev
6488  *   Pointer to the Ethernet device structure.
6489  *
6490  * @return
6491  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6492  */
6493 static uint32_t
6494 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6495 {
6496         struct mlx5_priv *priv = dev->data->dev_private;
6497         struct mlx5_aso_mtr *mtr_free = NULL;
6498         struct mlx5_aso_mtr_pools_mng *pools_mng =
6499                                 &priv->sh->mtrmng->pools_mng;
6500         struct mlx5_aso_mtr_pool *pool;
6501         uint32_t mtr_idx = 0;
6502
6503         if (!priv->sh->devx) {
6504                 rte_errno = ENOTSUP;
6505                 return 0;
6506         }
6507         /* Allocate the flow meter memory. */
6508         /* Get free meters from management. */
6509         rte_spinlock_lock(&pools_mng->mtrsl);
6510         mtr_free = LIST_FIRST(&pools_mng->meters);
6511         if (mtr_free)
6512                 LIST_REMOVE(mtr_free, next);
6513         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6514                 rte_spinlock_unlock(&pools_mng->mtrsl);
6515                 return 0;
6516         }
6517         mtr_free->state = ASO_METER_WAIT;
6518         rte_spinlock_unlock(&pools_mng->mtrsl);
6519         pool = container_of(mtr_free,
6520                         struct mlx5_aso_mtr_pool,
6521                         mtrs[mtr_free->offset]);
6522         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6523         if (!mtr_free->fm.meter_action) {
6524 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6525                 struct rte_flow_error error;
6526                 uint8_t reg_id;
6527
6528                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6529                 mtr_free->fm.meter_action =
6530                         mlx5_glue->dv_create_flow_action_aso
6531                                                 (priv->sh->rx_domain,
6532                                                  pool->devx_obj->obj,
6533                                                  mtr_free->offset,
6534                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6535                                                  reg_id - REG_C_0);
6536 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6537                 if (!mtr_free->fm.meter_action) {
6538                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6539                         return 0;
6540                 }
6541         }
6542         return mtr_idx;
6543 }
6544
6545 /**
6546  * Verify the @p attributes will be correctly understood by the NIC and store
6547  * them in the @p flow if everything is correct.
6548  *
6549  * @param[in] dev
6550  *   Pointer to dev struct.
6551  * @param[in] attributes
6552  *   Pointer to flow attributes
6553  * @param[in] external
6554  *   This flow rule is created by request external to PMD.
6555  * @param[out] error
6556  *   Pointer to error structure.
6557  *
6558  * @return
6559  *   - 0 on success and non root table.
6560  *   - 1 on success and root table.
6561  *   - a negative errno value otherwise and rte_errno is set.
6562  */
6563 static int
6564 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6565                             const struct mlx5_flow_tunnel *tunnel,
6566                             const struct rte_flow_attr *attributes,
6567                             const struct flow_grp_info *grp_info,
6568                             struct rte_flow_error *error)
6569 {
6570         struct mlx5_priv *priv = dev->data->dev_private;
6571         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6572         int ret = 0;
6573
6574 #ifndef HAVE_MLX5DV_DR
6575         RTE_SET_USED(tunnel);
6576         RTE_SET_USED(grp_info);
6577         if (attributes->group)
6578                 return rte_flow_error_set(error, ENOTSUP,
6579                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6580                                           NULL,
6581                                           "groups are not supported");
6582 #else
6583         uint32_t table = 0;
6584
6585         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6586                                        grp_info, error);
6587         if (ret)
6588                 return ret;
6589         if (!table)
6590                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6591 #endif
6592         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6593             attributes->priority > lowest_priority)
6594                 return rte_flow_error_set(error, ENOTSUP,
6595                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6596                                           NULL,
6597                                           "priority out of range");
6598         if (attributes->transfer) {
6599                 if (!priv->config.dv_esw_en)
6600                         return rte_flow_error_set
6601                                 (error, ENOTSUP,
6602                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6603                                  "E-Switch dr is not supported");
6604                 if (!(priv->representor || priv->master))
6605                         return rte_flow_error_set
6606                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6607                                  NULL, "E-Switch configuration can only be"
6608                                  " done by a master or a representor device");
6609                 if (attributes->egress)
6610                         return rte_flow_error_set
6611                                 (error, ENOTSUP,
6612                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6613                                  "egress is not supported");
6614         }
6615         if (!(attributes->egress ^ attributes->ingress))
6616                 return rte_flow_error_set(error, ENOTSUP,
6617                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6618                                           "must specify exactly one of "
6619                                           "ingress or egress");
6620         return ret;
6621 }
6622
6623 static int
6624 validate_integrity_bits(const struct rte_flow_item_integrity *mask,
6625                         int64_t pattern_flags, uint64_t l3_flags,
6626                         uint64_t l4_flags, uint64_t ip4_flag,
6627                         struct rte_flow_error *error)
6628 {
6629         if (mask->l3_ok && !(pattern_flags & l3_flags))
6630                 return rte_flow_error_set(error, EINVAL,
6631                                           RTE_FLOW_ERROR_TYPE_ITEM,
6632                                           NULL, "missing L3 protocol");
6633
6634         if (mask->ipv4_csum_ok && !(pattern_flags & ip4_flag))
6635                 return rte_flow_error_set(error, EINVAL,
6636                                           RTE_FLOW_ERROR_TYPE_ITEM,
6637                                           NULL, "missing IPv4 protocol");
6638
6639         if ((mask->l4_ok || mask->l4_csum_ok) && !(pattern_flags & l4_flags))
6640                 return rte_flow_error_set(error, EINVAL,
6641                                           RTE_FLOW_ERROR_TYPE_ITEM,
6642                                           NULL, "missing L4 protocol");
6643
6644         return 0;
6645 }
6646
6647 static int
6648 flow_dv_validate_item_integrity_post(const struct
6649                                      rte_flow_item *integrity_items[2],
6650                                      int64_t pattern_flags,
6651                                      struct rte_flow_error *error)
6652 {
6653         const struct rte_flow_item_integrity *mask;
6654         int ret;
6655
6656         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
6657                 mask = (typeof(mask))integrity_items[0]->mask;
6658                 ret = validate_integrity_bits(mask, pattern_flags,
6659                                               MLX5_FLOW_LAYER_OUTER_L3,
6660                                               MLX5_FLOW_LAYER_OUTER_L4,
6661                                               MLX5_FLOW_LAYER_OUTER_L3_IPV4,
6662                                               error);
6663                 if (ret)
6664                         return ret;
6665         }
6666         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
6667                 mask = (typeof(mask))integrity_items[1]->mask;
6668                 ret = validate_integrity_bits(mask, pattern_flags,
6669                                               MLX5_FLOW_LAYER_INNER_L3,
6670                                               MLX5_FLOW_LAYER_INNER_L4,
6671                                               MLX5_FLOW_LAYER_INNER_L3_IPV4,
6672                                               error);
6673                 if (ret)
6674                         return ret;
6675         }
6676         return 0;
6677 }
6678
6679 static int
6680 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6681                                 const struct rte_flow_item *integrity_item,
6682                                 uint64_t pattern_flags, uint64_t *last_item,
6683                                 const struct rte_flow_item *integrity_items[2],
6684                                 struct rte_flow_error *error)
6685 {
6686         struct mlx5_priv *priv = dev->data->dev_private;
6687         const struct rte_flow_item_integrity *mask = (typeof(mask))
6688                                                      integrity_item->mask;
6689         const struct rte_flow_item_integrity *spec = (typeof(spec))
6690                                                      integrity_item->spec;
6691
6692         if (!priv->config.hca_attr.pkt_integrity_match)
6693                 return rte_flow_error_set(error, ENOTSUP,
6694                                           RTE_FLOW_ERROR_TYPE_ITEM,
6695                                           integrity_item,
6696                                           "packet integrity integrity_item not supported");
6697         if (!spec)
6698                 return rte_flow_error_set(error, ENOTSUP,
6699                                           RTE_FLOW_ERROR_TYPE_ITEM,
6700                                           integrity_item,
6701                                           "no spec for integrity item");
6702         if (!mask)
6703                 mask = &rte_flow_item_integrity_mask;
6704         if (!mlx5_validate_integrity_item(mask))
6705                 return rte_flow_error_set(error, ENOTSUP,
6706                                           RTE_FLOW_ERROR_TYPE_ITEM,
6707                                           integrity_item,
6708                                           "unsupported integrity filter");
6709         if (spec->level > 1) {
6710                 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY)
6711                         return rte_flow_error_set
6712                                 (error, ENOTSUP,
6713                                  RTE_FLOW_ERROR_TYPE_ITEM,
6714                                  NULL, "multiple inner integrity items not supported");
6715                 integrity_items[1] = integrity_item;
6716                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
6717         } else {
6718                 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY)
6719                         return rte_flow_error_set
6720                                 (error, ENOTSUP,
6721                                  RTE_FLOW_ERROR_TYPE_ITEM,
6722                                  NULL, "multiple outer integrity items not supported");
6723                 integrity_items[0] = integrity_item;
6724                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
6725         }
6726         return 0;
6727 }
6728
6729 static int
6730 flow_dv_validate_item_flex(struct rte_eth_dev *dev,
6731                            const struct rte_flow_item *item,
6732                            uint64_t item_flags,
6733                            uint64_t *last_item,
6734                            bool is_inner,
6735                            struct rte_flow_error *error)
6736 {
6737         const struct rte_flow_item_flex *flow_spec = item->spec;
6738         const struct rte_flow_item_flex *flow_mask = item->mask;
6739         struct mlx5_flex_item *flex;
6740
6741         if (!flow_spec)
6742                 return rte_flow_error_set(error, EINVAL,
6743                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6744                                           "flex flow item spec cannot be NULL");
6745         if (!flow_mask)
6746                 return rte_flow_error_set(error, EINVAL,
6747                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6748                                           "flex flow item mask cannot be NULL");
6749         if (item->last)
6750                 return rte_flow_error_set(error, ENOTSUP,
6751                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6752                                           "flex flow item last not supported");
6753         if (mlx5_flex_acquire_index(dev, flow_spec->handle, false) < 0)
6754                 return rte_flow_error_set(error, EINVAL,
6755                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6756                                           "invalid flex flow item handle");
6757         flex = (struct mlx5_flex_item *)flow_spec->handle;
6758         switch (flex->tunnel_mode) {
6759         case FLEX_TUNNEL_MODE_SINGLE:
6760                 if (item_flags &
6761                     (MLX5_FLOW_ITEM_OUTER_FLEX | MLX5_FLOW_ITEM_INNER_FLEX))
6762                         rte_flow_error_set(error, EINVAL,
6763                                            RTE_FLOW_ERROR_TYPE_ITEM,
6764                                            NULL, "multiple flex items not supported");
6765                 break;
6766         case FLEX_TUNNEL_MODE_OUTER:
6767                 if (is_inner)
6768                         rte_flow_error_set(error, EINVAL,
6769                                            RTE_FLOW_ERROR_TYPE_ITEM,
6770                                            NULL, "inner flex item was not configured");
6771                 if (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX)
6772                         rte_flow_error_set(error, ENOTSUP,
6773                                            RTE_FLOW_ERROR_TYPE_ITEM,
6774                                            NULL, "multiple flex items not supported");
6775                 break;
6776         case FLEX_TUNNEL_MODE_INNER:
6777                 if (!is_inner)
6778                         rte_flow_error_set(error, EINVAL,
6779                                            RTE_FLOW_ERROR_TYPE_ITEM,
6780                                            NULL, "outer flex item was not configured");
6781                 if (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)
6782                         rte_flow_error_set(error, EINVAL,
6783                                            RTE_FLOW_ERROR_TYPE_ITEM,
6784                                            NULL, "multiple flex items not supported");
6785                 break;
6786         case FLEX_TUNNEL_MODE_MULTI:
6787                 if ((is_inner && (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)) ||
6788                     (!is_inner && (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX))) {
6789                         rte_flow_error_set(error, EINVAL,
6790                                            RTE_FLOW_ERROR_TYPE_ITEM,
6791                                            NULL, "multiple flex items not supported");
6792                 }
6793                 break;
6794         case FLEX_TUNNEL_MODE_TUNNEL:
6795                 if (is_inner || (item_flags & MLX5_FLOW_ITEM_FLEX_TUNNEL))
6796                         rte_flow_error_set(error, EINVAL,
6797                                            RTE_FLOW_ERROR_TYPE_ITEM,
6798                                            NULL, "multiple flex tunnel items not supported");
6799                 break;
6800         default:
6801                 rte_flow_error_set(error, EINVAL,
6802                                    RTE_FLOW_ERROR_TYPE_ITEM,
6803                                    NULL, "invalid flex item configuration");
6804         }
6805         *last_item = flex->tunnel_mode == FLEX_TUNNEL_MODE_TUNNEL ?
6806                      MLX5_FLOW_ITEM_FLEX_TUNNEL : is_inner ?
6807                      MLX5_FLOW_ITEM_INNER_FLEX : MLX5_FLOW_ITEM_OUTER_FLEX;
6808         return 0;
6809 }
6810
6811 /**
6812  * Internal validation function. For validating both actions and items.
6813  *
6814  * @param[in] dev
6815  *   Pointer to the rte_eth_dev structure.
6816  * @param[in] attr
6817  *   Pointer to the flow attributes.
6818  * @param[in] items
6819  *   Pointer to the list of items.
6820  * @param[in] actions
6821  *   Pointer to the list of actions.
6822  * @param[in] external
6823  *   This flow rule is created by request external to PMD.
6824  * @param[in] hairpin
6825  *   Number of hairpin TX actions, 0 means classic flow.
6826  * @param[out] error
6827  *   Pointer to the error structure.
6828  *
6829  * @return
6830  *   0 on success, a negative errno value otherwise and rte_errno is set.
6831  */
6832 static int
6833 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6834                  const struct rte_flow_item items[],
6835                  const struct rte_flow_action actions[],
6836                  bool external, int hairpin, struct rte_flow_error *error)
6837 {
6838         int ret;
6839         uint64_t action_flags = 0;
6840         uint64_t item_flags = 0;
6841         uint64_t last_item = 0;
6842         uint8_t next_protocol = 0xff;
6843         uint16_t ether_type = 0;
6844         int actions_n = 0;
6845         uint8_t item_ipv6_proto = 0;
6846         int fdb_mirror_limit = 0;
6847         int modify_after_mirror = 0;
6848         const struct rte_flow_item *geneve_item = NULL;
6849         const struct rte_flow_item *gre_item = NULL;
6850         const struct rte_flow_item *gtp_item = NULL;
6851         const struct rte_flow_action_raw_decap *decap;
6852         const struct rte_flow_action_raw_encap *encap;
6853         const struct rte_flow_action_rss *rss = NULL;
6854         const struct rte_flow_action_rss *sample_rss = NULL;
6855         const struct rte_flow_action_count *sample_count = NULL;
6856         const struct rte_flow_item_tcp nic_tcp_mask = {
6857                 .hdr = {
6858                         .tcp_flags = 0xFF,
6859                         .src_port = RTE_BE16(UINT16_MAX),
6860                         .dst_port = RTE_BE16(UINT16_MAX),
6861                 }
6862         };
6863         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6864                 .hdr = {
6865                         .src_addr =
6866                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6867                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6868                         .dst_addr =
6869                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6870                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6871                         .vtc_flow = RTE_BE32(0xffffffff),
6872                         .proto = 0xff,
6873                         .hop_limits = 0xff,
6874                 },
6875                 .has_frag_ext = 1,
6876         };
6877         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6878                 .hdr = {
6879                         .common = {
6880                                 .u32 =
6881                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6882                                         .type = 0xFF,
6883                                         }).u32),
6884                         },
6885                         .dummy[0] = 0xffffffff,
6886                 },
6887         };
6888         struct mlx5_priv *priv = dev->data->dev_private;
6889         struct mlx5_dev_config *dev_conf = &priv->config;
6890         uint16_t queue_index = 0xFFFF;
6891         const struct rte_flow_item_vlan *vlan_m = NULL;
6892         uint32_t rw_act_num = 0;
6893         uint64_t is_root;
6894         const struct mlx5_flow_tunnel *tunnel;
6895         enum mlx5_tof_rule_type tof_rule_type;
6896         struct flow_grp_info grp_info = {
6897                 .external = !!external,
6898                 .transfer = !!attr->transfer,
6899                 .fdb_def_rule = !!priv->fdb_def_rule,
6900                 .std_tbl_fix = true,
6901         };
6902         const struct rte_eth_hairpin_conf *conf;
6903         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
6904         const struct rte_flow_item *port_id_item = NULL;
6905         bool def_policy = false;
6906         uint16_t udp_dport = 0;
6907
6908         if (items == NULL)
6909                 return -1;
6910         tunnel = is_tunnel_offload_active(dev) ?
6911                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6912         if (tunnel) {
6913                 if (!priv->config.dv_flow_en)
6914                         return rte_flow_error_set
6915                                 (error, ENOTSUP,
6916                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6917                                  NULL, "tunnel offload requires DV flow interface");
6918                 if (priv->representor)
6919                         return rte_flow_error_set
6920                                 (error, ENOTSUP,
6921                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6922                                  NULL, "decap not supported for VF representor");
6923                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6924                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6925                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6926                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6927                                         MLX5_FLOW_ACTION_DECAP;
6928                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6929                                         (dev, attr, tunnel, tof_rule_type);
6930         }
6931         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6932         if (ret < 0)
6933                 return ret;
6934         is_root = (uint64_t)ret;
6935         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6936                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6937                 int type = items->type;
6938
6939                 if (!mlx5_flow_os_item_supported(type))
6940                         return rte_flow_error_set(error, ENOTSUP,
6941                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6942                                                   NULL, "item not supported");
6943                 switch (type) {
6944                 case RTE_FLOW_ITEM_TYPE_VOID:
6945                         break;
6946                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6947                         ret = flow_dv_validate_item_port_id
6948                                         (dev, items, attr, item_flags, error);
6949                         if (ret < 0)
6950                                 return ret;
6951                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6952                         port_id_item = items;
6953                         break;
6954                 case RTE_FLOW_ITEM_TYPE_ETH:
6955                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6956                                                           true, error);
6957                         if (ret < 0)
6958                                 return ret;
6959                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6960                                              MLX5_FLOW_LAYER_OUTER_L2;
6961                         if (items->mask != NULL && items->spec != NULL) {
6962                                 ether_type =
6963                                         ((const struct rte_flow_item_eth *)
6964                                          items->spec)->type;
6965                                 ether_type &=
6966                                         ((const struct rte_flow_item_eth *)
6967                                          items->mask)->type;
6968                                 ether_type = rte_be_to_cpu_16(ether_type);
6969                         } else {
6970                                 ether_type = 0;
6971                         }
6972                         break;
6973                 case RTE_FLOW_ITEM_TYPE_VLAN:
6974                         ret = flow_dv_validate_item_vlan(items, item_flags,
6975                                                          dev, error);
6976                         if (ret < 0)
6977                                 return ret;
6978                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6979                                              MLX5_FLOW_LAYER_OUTER_VLAN;
6980                         if (items->mask != NULL && items->spec != NULL) {
6981                                 ether_type =
6982                                         ((const struct rte_flow_item_vlan *)
6983                                          items->spec)->inner_type;
6984                                 ether_type &=
6985                                         ((const struct rte_flow_item_vlan *)
6986                                          items->mask)->inner_type;
6987                                 ether_type = rte_be_to_cpu_16(ether_type);
6988                         } else {
6989                                 ether_type = 0;
6990                         }
6991                         /* Store outer VLAN mask for of_push_vlan action. */
6992                         if (!tunnel)
6993                                 vlan_m = items->mask;
6994                         break;
6995                 case RTE_FLOW_ITEM_TYPE_IPV4:
6996                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6997                                                   &item_flags, &tunnel);
6998                         ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
6999                                                          last_item, ether_type,
7000                                                          error);
7001                         if (ret < 0)
7002                                 return ret;
7003                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7004                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7005                         if (items->mask != NULL &&
7006                             ((const struct rte_flow_item_ipv4 *)
7007                              items->mask)->hdr.next_proto_id) {
7008                                 next_protocol =
7009                                         ((const struct rte_flow_item_ipv4 *)
7010                                          (items->spec))->hdr.next_proto_id;
7011                                 next_protocol &=
7012                                         ((const struct rte_flow_item_ipv4 *)
7013                                          (items->mask))->hdr.next_proto_id;
7014                         } else {
7015                                 /* Reset for inner layer. */
7016                                 next_protocol = 0xff;
7017                         }
7018                         break;
7019                 case RTE_FLOW_ITEM_TYPE_IPV6:
7020                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7021                                                   &item_flags, &tunnel);
7022                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7023                                                            last_item,
7024                                                            ether_type,
7025                                                            &nic_ipv6_mask,
7026                                                            error);
7027                         if (ret < 0)
7028                                 return ret;
7029                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7030                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7031                         if (items->mask != NULL &&
7032                             ((const struct rte_flow_item_ipv6 *)
7033                              items->mask)->hdr.proto) {
7034                                 item_ipv6_proto =
7035                                         ((const struct rte_flow_item_ipv6 *)
7036                                          items->spec)->hdr.proto;
7037                                 next_protocol =
7038                                         ((const struct rte_flow_item_ipv6 *)
7039                                          items->spec)->hdr.proto;
7040                                 next_protocol &=
7041                                         ((const struct rte_flow_item_ipv6 *)
7042                                          items->mask)->hdr.proto;
7043                         } else {
7044                                 /* Reset for inner layer. */
7045                                 next_protocol = 0xff;
7046                         }
7047                         break;
7048                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7049                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
7050                                                                   item_flags,
7051                                                                   error);
7052                         if (ret < 0)
7053                                 return ret;
7054                         last_item = tunnel ?
7055                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7056                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7057                         if (items->mask != NULL &&
7058                             ((const struct rte_flow_item_ipv6_frag_ext *)
7059                              items->mask)->hdr.next_header) {
7060                                 next_protocol =
7061                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7062                                  items->spec)->hdr.next_header;
7063                                 next_protocol &=
7064                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7065                                  items->mask)->hdr.next_header;
7066                         } else {
7067                                 /* Reset for inner layer. */
7068                                 next_protocol = 0xff;
7069                         }
7070                         break;
7071                 case RTE_FLOW_ITEM_TYPE_TCP:
7072                         ret = mlx5_flow_validate_item_tcp
7073                                                 (items, item_flags,
7074                                                  next_protocol,
7075                                                  &nic_tcp_mask,
7076                                                  error);
7077                         if (ret < 0)
7078                                 return ret;
7079                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7080                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7081                         break;
7082                 case RTE_FLOW_ITEM_TYPE_UDP:
7083                         ret = mlx5_flow_validate_item_udp(items, item_flags,
7084                                                           next_protocol,
7085                                                           error);
7086                         const struct rte_flow_item_udp *spec = items->spec;
7087                         const struct rte_flow_item_udp *mask = items->mask;
7088                         if (!mask)
7089                                 mask = &rte_flow_item_udp_mask;
7090                         if (spec != NULL)
7091                                 udp_dport = rte_be_to_cpu_16
7092                                                 (spec->hdr.dst_port &
7093                                                  mask->hdr.dst_port);
7094                         if (ret < 0)
7095                                 return ret;
7096                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7097                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7098                         break;
7099                 case RTE_FLOW_ITEM_TYPE_GRE:
7100                         ret = mlx5_flow_validate_item_gre(items, item_flags,
7101                                                           next_protocol, error);
7102                         if (ret < 0)
7103                                 return ret;
7104                         gre_item = items;
7105                         last_item = MLX5_FLOW_LAYER_GRE;
7106                         break;
7107                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7108                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7109                                                             next_protocol,
7110                                                             error);
7111                         if (ret < 0)
7112                                 return ret;
7113                         last_item = MLX5_FLOW_LAYER_NVGRE;
7114                         break;
7115                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7116                         ret = mlx5_flow_validate_item_gre_key
7117                                 (items, item_flags, gre_item, error);
7118                         if (ret < 0)
7119                                 return ret;
7120                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7121                         break;
7122                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7123                         ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7124                                                             items, item_flags,
7125                                                             attr, error);
7126                         if (ret < 0)
7127                                 return ret;
7128                         last_item = MLX5_FLOW_LAYER_VXLAN;
7129                         break;
7130                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7131                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
7132                                                                 item_flags, dev,
7133                                                                 error);
7134                         if (ret < 0)
7135                                 return ret;
7136                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7137                         break;
7138                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7139                         ret = mlx5_flow_validate_item_geneve(items,
7140                                                              item_flags, dev,
7141                                                              error);
7142                         if (ret < 0)
7143                                 return ret;
7144                         geneve_item = items;
7145                         last_item = MLX5_FLOW_LAYER_GENEVE;
7146                         break;
7147                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7148                         ret = mlx5_flow_validate_item_geneve_opt(items,
7149                                                                  last_item,
7150                                                                  geneve_item,
7151                                                                  dev,
7152                                                                  error);
7153                         if (ret < 0)
7154                                 return ret;
7155                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7156                         break;
7157                 case RTE_FLOW_ITEM_TYPE_MPLS:
7158                         ret = mlx5_flow_validate_item_mpls(dev, items,
7159                                                            item_flags,
7160                                                            last_item, error);
7161                         if (ret < 0)
7162                                 return ret;
7163                         last_item = MLX5_FLOW_LAYER_MPLS;
7164                         break;
7165
7166                 case RTE_FLOW_ITEM_TYPE_MARK:
7167                         ret = flow_dv_validate_item_mark(dev, items, attr,
7168                                                          error);
7169                         if (ret < 0)
7170                                 return ret;
7171                         last_item = MLX5_FLOW_ITEM_MARK;
7172                         break;
7173                 case RTE_FLOW_ITEM_TYPE_META:
7174                         ret = flow_dv_validate_item_meta(dev, items, attr,
7175                                                          error);
7176                         if (ret < 0)
7177                                 return ret;
7178                         last_item = MLX5_FLOW_ITEM_METADATA;
7179                         break;
7180                 case RTE_FLOW_ITEM_TYPE_ICMP:
7181                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
7182                                                            next_protocol,
7183                                                            error);
7184                         if (ret < 0)
7185                                 return ret;
7186                         last_item = MLX5_FLOW_LAYER_ICMP;
7187                         break;
7188                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7189                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7190                                                             next_protocol,
7191                                                             error);
7192                         if (ret < 0)
7193                                 return ret;
7194                         item_ipv6_proto = IPPROTO_ICMPV6;
7195                         last_item = MLX5_FLOW_LAYER_ICMP6;
7196                         break;
7197                 case RTE_FLOW_ITEM_TYPE_TAG:
7198                         ret = flow_dv_validate_item_tag(dev, items,
7199                                                         attr, error);
7200                         if (ret < 0)
7201                                 return ret;
7202                         last_item = MLX5_FLOW_ITEM_TAG;
7203                         break;
7204                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7205                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7206                         break;
7207                 case RTE_FLOW_ITEM_TYPE_GTP:
7208                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7209                                                         error);
7210                         if (ret < 0)
7211                                 return ret;
7212                         gtp_item = items;
7213                         last_item = MLX5_FLOW_LAYER_GTP;
7214                         break;
7215                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7216                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
7217                                                             gtp_item, attr,
7218                                                             error);
7219                         if (ret < 0)
7220                                 return ret;
7221                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
7222                         break;
7223                 case RTE_FLOW_ITEM_TYPE_ECPRI:
7224                         /* Capacity will be checked in the translate stage. */
7225                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7226                                                             last_item,
7227                                                             ether_type,
7228                                                             &nic_ecpri_mask,
7229                                                             error);
7230                         if (ret < 0)
7231                                 return ret;
7232                         last_item = MLX5_FLOW_LAYER_ECPRI;
7233                         break;
7234                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7235                         ret = flow_dv_validate_item_integrity(dev, items,
7236                                                               item_flags,
7237                                                               &last_item,
7238                                                               integrity_items,
7239                                                               error);
7240                         if (ret < 0)
7241                                 return ret;
7242                         break;
7243                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7244                         ret = flow_dv_validate_item_aso_ct(dev, items,
7245                                                            &item_flags, error);
7246                         if (ret < 0)
7247                                 return ret;
7248                         break;
7249                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7250                         /* tunnel offload item was processed before
7251                          * list it here as a supported type
7252                          */
7253                         break;
7254                 case RTE_FLOW_ITEM_TYPE_FLEX:
7255                         ret = flow_dv_validate_item_flex(dev, items, item_flags,
7256                                                          &last_item,
7257                                                          tunnel != 0, error);
7258                         if (ret < 0)
7259                                 return ret;
7260                         break;
7261                 default:
7262                         return rte_flow_error_set(error, ENOTSUP,
7263                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7264                                                   NULL, "item not supported");
7265                 }
7266                 item_flags |= last_item;
7267         }
7268         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
7269                 ret = flow_dv_validate_item_integrity_post(integrity_items,
7270                                                            item_flags, error);
7271                 if (ret)
7272                         return ret;
7273         }
7274         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7275                 int type = actions->type;
7276                 bool shared_count = false;
7277
7278                 if (!mlx5_flow_os_action_supported(type))
7279                         return rte_flow_error_set(error, ENOTSUP,
7280                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7281                                                   actions,
7282                                                   "action not supported");
7283                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7284                         return rte_flow_error_set(error, ENOTSUP,
7285                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7286                                                   actions, "too many actions");
7287                 if (action_flags &
7288                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7289                         return rte_flow_error_set(error, ENOTSUP,
7290                                 RTE_FLOW_ERROR_TYPE_ACTION,
7291                                 NULL, "meter action with policy "
7292                                 "must be the last action");
7293                 switch (type) {
7294                 case RTE_FLOW_ACTION_TYPE_VOID:
7295                         break;
7296                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7297                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7298                         ret = flow_dv_validate_action_port_id(dev,
7299                                                               action_flags,
7300                                                               actions,
7301                                                               attr,
7302                                                               error);
7303                         if (ret)
7304                                 return ret;
7305                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7306                         ++actions_n;
7307                         break;
7308                 case RTE_FLOW_ACTION_TYPE_FLAG:
7309                         ret = flow_dv_validate_action_flag(dev, action_flags,
7310                                                            attr, error);
7311                         if (ret < 0)
7312                                 return ret;
7313                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7314                                 /* Count all modify-header actions as one. */
7315                                 if (!(action_flags &
7316                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7317                                         ++actions_n;
7318                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7319                                                 MLX5_FLOW_ACTION_MARK_EXT;
7320                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7321                                         modify_after_mirror = 1;
7322
7323                         } else {
7324                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7325                                 ++actions_n;
7326                         }
7327                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7328                         break;
7329                 case RTE_FLOW_ACTION_TYPE_MARK:
7330                         ret = flow_dv_validate_action_mark(dev, actions,
7331                                                            action_flags,
7332                                                            attr, error);
7333                         if (ret < 0)
7334                                 return ret;
7335                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7336                                 /* Count all modify-header actions as one. */
7337                                 if (!(action_flags &
7338                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7339                                         ++actions_n;
7340                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7341                                                 MLX5_FLOW_ACTION_MARK_EXT;
7342                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7343                                         modify_after_mirror = 1;
7344                         } else {
7345                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7346                                 ++actions_n;
7347                         }
7348                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7349                         break;
7350                 case RTE_FLOW_ACTION_TYPE_SET_META:
7351                         ret = flow_dv_validate_action_set_meta(dev, actions,
7352                                                                action_flags,
7353                                                                attr, error);
7354                         if (ret < 0)
7355                                 return ret;
7356                         /* Count all modify-header actions as one action. */
7357                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7358                                 ++actions_n;
7359                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7360                                 modify_after_mirror = 1;
7361                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7362                         rw_act_num += MLX5_ACT_NUM_SET_META;
7363                         break;
7364                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7365                         ret = flow_dv_validate_action_set_tag(dev, actions,
7366                                                               action_flags,
7367                                                               attr, error);
7368                         if (ret < 0)
7369                                 return ret;
7370                         /* Count all modify-header actions as one action. */
7371                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7372                                 ++actions_n;
7373                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7374                                 modify_after_mirror = 1;
7375                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7376                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7377                         break;
7378                 case RTE_FLOW_ACTION_TYPE_DROP:
7379                         ret = mlx5_flow_validate_action_drop(action_flags,
7380                                                              attr, error);
7381                         if (ret < 0)
7382                                 return ret;
7383                         action_flags |= MLX5_FLOW_ACTION_DROP;
7384                         ++actions_n;
7385                         break;
7386                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7387                         ret = mlx5_flow_validate_action_queue(actions,
7388                                                               action_flags, dev,
7389                                                               attr, error);
7390                         if (ret < 0)
7391                                 return ret;
7392                         queue_index = ((const struct rte_flow_action_queue *)
7393                                                         (actions->conf))->index;
7394                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7395                         ++actions_n;
7396                         break;
7397                 case RTE_FLOW_ACTION_TYPE_RSS:
7398                         rss = actions->conf;
7399                         ret = mlx5_flow_validate_action_rss(actions,
7400                                                             action_flags, dev,
7401                                                             attr, item_flags,
7402                                                             error);
7403                         if (ret < 0)
7404                                 return ret;
7405                         if (rss && sample_rss &&
7406                             (sample_rss->level != rss->level ||
7407                             sample_rss->types != rss->types))
7408                                 return rte_flow_error_set(error, ENOTSUP,
7409                                         RTE_FLOW_ERROR_TYPE_ACTION,
7410                                         NULL,
7411                                         "Can't use the different RSS types "
7412                                         "or level in the same flow");
7413                         if (rss != NULL && rss->queue_num)
7414                                 queue_index = rss->queue[0];
7415                         action_flags |= MLX5_FLOW_ACTION_RSS;
7416                         ++actions_n;
7417                         break;
7418                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7419                         ret =
7420                         mlx5_flow_validate_action_default_miss(action_flags,
7421                                         attr, error);
7422                         if (ret < 0)
7423                                 return ret;
7424                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7425                         ++actions_n;
7426                         break;
7427                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7428                         shared_count = true;
7429                         /* fall-through. */
7430                 case RTE_FLOW_ACTION_TYPE_COUNT:
7431                         ret = flow_dv_validate_action_count(dev, shared_count,
7432                                                             action_flags,
7433                                                             error);
7434                         if (ret < 0)
7435                                 return ret;
7436                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7437                         ++actions_n;
7438                         break;
7439                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7440                         if (flow_dv_validate_action_pop_vlan(dev,
7441                                                              action_flags,
7442                                                              actions,
7443                                                              item_flags, attr,
7444                                                              error))
7445                                 return -rte_errno;
7446                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7447                                 modify_after_mirror = 1;
7448                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7449                         ++actions_n;
7450                         break;
7451                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7452                         ret = flow_dv_validate_action_push_vlan(dev,
7453                                                                 action_flags,
7454                                                                 vlan_m,
7455                                                                 actions, attr,
7456                                                                 error);
7457                         if (ret < 0)
7458                                 return ret;
7459                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7460                                 modify_after_mirror = 1;
7461                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7462                         ++actions_n;
7463                         break;
7464                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7465                         ret = flow_dv_validate_action_set_vlan_pcp
7466                                                 (action_flags, actions, error);
7467                         if (ret < 0)
7468                                 return ret;
7469                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7470                                 modify_after_mirror = 1;
7471                         /* Count PCP with push_vlan command. */
7472                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7473                         break;
7474                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7475                         ret = flow_dv_validate_action_set_vlan_vid
7476                                                 (item_flags, action_flags,
7477                                                  actions, error);
7478                         if (ret < 0)
7479                                 return ret;
7480                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7481                                 modify_after_mirror = 1;
7482                         /* Count VID with push_vlan command. */
7483                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7484                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7485                         break;
7486                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7487                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7488                         ret = flow_dv_validate_action_l2_encap(dev,
7489                                                                action_flags,
7490                                                                actions, attr,
7491                                                                error);
7492                         if (ret < 0)
7493                                 return ret;
7494                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7495                         ++actions_n;
7496                         break;
7497                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7498                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7499                         ret = flow_dv_validate_action_decap(dev, action_flags,
7500                                                             actions, item_flags,
7501                                                             attr, error);
7502                         if (ret < 0)
7503                                 return ret;
7504                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7505                                 modify_after_mirror = 1;
7506                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7507                         ++actions_n;
7508                         break;
7509                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7510                         ret = flow_dv_validate_action_raw_encap_decap
7511                                 (dev, NULL, actions->conf, attr, &action_flags,
7512                                  &actions_n, actions, item_flags, error);
7513                         if (ret < 0)
7514                                 return ret;
7515                         break;
7516                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7517                         decap = actions->conf;
7518                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7519                                 ;
7520                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7521                                 encap = NULL;
7522                                 actions--;
7523                         } else {
7524                                 encap = actions->conf;
7525                         }
7526                         ret = flow_dv_validate_action_raw_encap_decap
7527                                            (dev,
7528                                             decap ? decap : &empty_decap, encap,
7529                                             attr, &action_flags, &actions_n,
7530                                             actions, item_flags, error);
7531                         if (ret < 0)
7532                                 return ret;
7533                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7534                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7535                                 modify_after_mirror = 1;
7536                         break;
7537                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7538                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7539                         ret = flow_dv_validate_action_modify_mac(action_flags,
7540                                                                  actions,
7541                                                                  item_flags,
7542                                                                  error);
7543                         if (ret < 0)
7544                                 return ret;
7545                         /* Count all modify-header actions as one action. */
7546                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7547                                 ++actions_n;
7548                         action_flags |= actions->type ==
7549                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7550                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7551                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7552                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7553                                 modify_after_mirror = 1;
7554                         /*
7555                          * Even if the source and destination MAC addresses have
7556                          * overlap in the header with 4B alignment, the convert
7557                          * function will handle them separately and 4 SW actions
7558                          * will be created. And 2 actions will be added each
7559                          * time no matter how many bytes of address will be set.
7560                          */
7561                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7562                         break;
7563                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7564                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7565                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7566                                                                   actions,
7567                                                                   item_flags,
7568                                                                   error);
7569                         if (ret < 0)
7570                                 return ret;
7571                         /* Count all modify-header actions as one action. */
7572                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7573                                 ++actions_n;
7574                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7575                                 modify_after_mirror = 1;
7576                         action_flags |= actions->type ==
7577                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7578                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7579                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7580                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7581                         break;
7582                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7583                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7584                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7585                                                                   actions,
7586                                                                   item_flags,
7587                                                                   error);
7588                         if (ret < 0)
7589                                 return ret;
7590                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7591                                 return rte_flow_error_set(error, ENOTSUP,
7592                                         RTE_FLOW_ERROR_TYPE_ACTION,
7593                                         actions,
7594                                         "Can't change header "
7595                                         "with ICMPv6 proto");
7596                         /* Count all modify-header actions as one action. */
7597                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7598                                 ++actions_n;
7599                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7600                                 modify_after_mirror = 1;
7601                         action_flags |= actions->type ==
7602                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7603                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7604                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7605                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7606                         break;
7607                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7608                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7609                         ret = flow_dv_validate_action_modify_tp(action_flags,
7610                                                                 actions,
7611                                                                 item_flags,
7612                                                                 error);
7613                         if (ret < 0)
7614                                 return ret;
7615                         /* Count all modify-header actions as one action. */
7616                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7617                                 ++actions_n;
7618                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7619                                 modify_after_mirror = 1;
7620                         action_flags |= actions->type ==
7621                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7622                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7623                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7624                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7625                         break;
7626                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7627                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7628                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7629                                                                  actions,
7630                                                                  item_flags,
7631                                                                  error);
7632                         if (ret < 0)
7633                                 return ret;
7634                         /* Count all modify-header actions as one action. */
7635                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7636                                 ++actions_n;
7637                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7638                                 modify_after_mirror = 1;
7639                         action_flags |= actions->type ==
7640                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7641                                                 MLX5_FLOW_ACTION_SET_TTL :
7642                                                 MLX5_FLOW_ACTION_DEC_TTL;
7643                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7644                         break;
7645                 case RTE_FLOW_ACTION_TYPE_JUMP:
7646                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7647                                                            action_flags,
7648                                                            attr, external,
7649                                                            error);
7650                         if (ret)
7651                                 return ret;
7652                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7653                             fdb_mirror_limit)
7654                                 return rte_flow_error_set(error, EINVAL,
7655                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7656                                                   NULL,
7657                                                   "sample and jump action combination is not supported");
7658                         ++actions_n;
7659                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7660                         break;
7661                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7662                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7663                         ret = flow_dv_validate_action_modify_tcp_seq
7664                                                                 (action_flags,
7665                                                                  actions,
7666                                                                  item_flags,
7667                                                                  error);
7668                         if (ret < 0)
7669                                 return ret;
7670                         /* Count all modify-header actions as one action. */
7671                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7672                                 ++actions_n;
7673                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7674                                 modify_after_mirror = 1;
7675                         action_flags |= actions->type ==
7676                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7677                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7678                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7679                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7680                         break;
7681                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7682                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7683                         ret = flow_dv_validate_action_modify_tcp_ack
7684                                                                 (action_flags,
7685                                                                  actions,
7686                                                                  item_flags,
7687                                                                  error);
7688                         if (ret < 0)
7689                                 return ret;
7690                         /* Count all modify-header actions as one action. */
7691                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7692                                 ++actions_n;
7693                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7694                                 modify_after_mirror = 1;
7695                         action_flags |= actions->type ==
7696                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7697                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7698                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7699                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7700                         break;
7701                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7702                         break;
7703                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7704                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7705                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7706                         break;
7707                 case RTE_FLOW_ACTION_TYPE_METER:
7708                         ret = mlx5_flow_validate_action_meter(dev,
7709                                                               action_flags,
7710                                                               item_flags,
7711                                                               actions, attr,
7712                                                               port_id_item,
7713                                                               &def_policy,
7714                                                               error);
7715                         if (ret < 0)
7716                                 return ret;
7717                         action_flags |= MLX5_FLOW_ACTION_METER;
7718                         if (!def_policy)
7719                                 action_flags |=
7720                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7721                         ++actions_n;
7722                         /* Meter action will add one more TAG action. */
7723                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7724                         break;
7725                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7726                         if (!attr->transfer && !attr->group)
7727                                 return rte_flow_error_set(error, ENOTSUP,
7728                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7729                                                                            NULL,
7730                           "Shared ASO age action is not supported for group 0");
7731                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7732                                 return rte_flow_error_set
7733                                                   (error, EINVAL,
7734                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7735                                                    NULL,
7736                                                    "duplicate age actions set");
7737                         action_flags |= MLX5_FLOW_ACTION_AGE;
7738                         ++actions_n;
7739                         break;
7740                 case RTE_FLOW_ACTION_TYPE_AGE:
7741                         ret = flow_dv_validate_action_age(action_flags,
7742                                                           actions, dev,
7743                                                           error);
7744                         if (ret < 0)
7745                                 return ret;
7746                         /*
7747                          * Validate the regular AGE action (using counter)
7748                          * mutual exclusion with share counter actions.
7749                          */
7750                         if (!priv->sh->flow_hit_aso_en) {
7751                                 if (shared_count)
7752                                         return rte_flow_error_set
7753                                                 (error, EINVAL,
7754                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7755                                                 NULL,
7756                                                 "old age and shared count combination is not supported");
7757                                 if (sample_count)
7758                                         return rte_flow_error_set
7759                                                 (error, EINVAL,
7760                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7761                                                 NULL,
7762                                                 "old age action and count must be in the same sub flow");
7763                         }
7764                         action_flags |= MLX5_FLOW_ACTION_AGE;
7765                         ++actions_n;
7766                         break;
7767                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7768                         ret = flow_dv_validate_action_modify_ipv4_dscp
7769                                                          (action_flags,
7770                                                           actions,
7771                                                           item_flags,
7772                                                           error);
7773                         if (ret < 0)
7774                                 return ret;
7775                         /* Count all modify-header actions as one action. */
7776                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7777                                 ++actions_n;
7778                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7779                                 modify_after_mirror = 1;
7780                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7781                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7782                         break;
7783                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7784                         ret = flow_dv_validate_action_modify_ipv6_dscp
7785                                                                 (action_flags,
7786                                                                  actions,
7787                                                                  item_flags,
7788                                                                  error);
7789                         if (ret < 0)
7790                                 return ret;
7791                         /* Count all modify-header actions as one action. */
7792                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7793                                 ++actions_n;
7794                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7795                                 modify_after_mirror = 1;
7796                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7797                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7798                         break;
7799                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7800                         ret = flow_dv_validate_action_sample(&action_flags,
7801                                                              actions, dev,
7802                                                              attr, item_flags,
7803                                                              rss, &sample_rss,
7804                                                              &sample_count,
7805                                                              &fdb_mirror_limit,
7806                                                              error);
7807                         if (ret < 0)
7808                                 return ret;
7809                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7810                         ++actions_n;
7811                         break;
7812                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7813                         ret = flow_dv_validate_action_modify_field(dev,
7814                                                                    action_flags,
7815                                                                    actions,
7816                                                                    attr,
7817                                                                    error);
7818                         if (ret < 0)
7819                                 return ret;
7820                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7821                                 modify_after_mirror = 1;
7822                         /* Count all modify-header actions as one action. */
7823                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7824                                 ++actions_n;
7825                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7826                         rw_act_num += ret;
7827                         break;
7828                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7829                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7830                                                              item_flags, attr,
7831                                                              error);
7832                         if (ret < 0)
7833                                 return ret;
7834                         action_flags |= MLX5_FLOW_ACTION_CT;
7835                         break;
7836                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7837                         /* tunnel offload action was processed before
7838                          * list it here as a supported type
7839                          */
7840                         break;
7841                 default:
7842                         return rte_flow_error_set(error, ENOTSUP,
7843                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7844                                                   actions,
7845                                                   "action not supported");
7846                 }
7847         }
7848         /*
7849          * Validate actions in flow rules
7850          * - Explicit decap action is prohibited by the tunnel offload API.
7851          * - Drop action in tunnel steer rule is prohibited by the API.
7852          * - Application cannot use MARK action because it's value can mask
7853          *   tunnel default miss nitification.
7854          * - JUMP in tunnel match rule has no support in current PMD
7855          *   implementation.
7856          * - TAG & META are reserved for future uses.
7857          */
7858         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7859                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7860                                             MLX5_FLOW_ACTION_MARK     |
7861                                             MLX5_FLOW_ACTION_SET_TAG  |
7862                                             MLX5_FLOW_ACTION_SET_META |
7863                                             MLX5_FLOW_ACTION_DROP;
7864
7865                 if (action_flags & bad_actions_mask)
7866                         return rte_flow_error_set
7867                                         (error, EINVAL,
7868                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7869                                         "Invalid RTE action in tunnel "
7870                                         "set decap rule");
7871                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7872                         return rte_flow_error_set
7873                                         (error, EINVAL,
7874                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7875                                         "tunnel set decap rule must terminate "
7876                                         "with JUMP");
7877                 if (!attr->ingress)
7878                         return rte_flow_error_set
7879                                         (error, EINVAL,
7880                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7881                                         "tunnel flows for ingress traffic only");
7882         }
7883         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7884                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7885                                             MLX5_FLOW_ACTION_MARK    |
7886                                             MLX5_FLOW_ACTION_SET_TAG |
7887                                             MLX5_FLOW_ACTION_SET_META;
7888
7889                 if (action_flags & bad_actions_mask)
7890                         return rte_flow_error_set
7891                                         (error, EINVAL,
7892                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7893                                         "Invalid RTE action in tunnel "
7894                                         "set match rule");
7895         }
7896         /*
7897          * Validate the drop action mutual exclusion with other actions.
7898          * Drop action is mutually-exclusive with any other action, except for
7899          * Count action.
7900          * Drop action compatibility with tunnel offload was already validated.
7901          */
7902         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7903                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7904         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7905             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7906                 return rte_flow_error_set(error, EINVAL,
7907                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7908                                           "Drop action is mutually-exclusive "
7909                                           "with any other action, except for "
7910                                           "Count action");
7911         /* Eswitch has few restrictions on using items and actions */
7912         if (attr->transfer) {
7913                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7914                     action_flags & MLX5_FLOW_ACTION_FLAG)
7915                         return rte_flow_error_set(error, ENOTSUP,
7916                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7917                                                   NULL,
7918                                                   "unsupported action FLAG");
7919                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7920                     action_flags & MLX5_FLOW_ACTION_MARK)
7921                         return rte_flow_error_set(error, ENOTSUP,
7922                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7923                                                   NULL,
7924                                                   "unsupported action MARK");
7925                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7926                         return rte_flow_error_set(error, ENOTSUP,
7927                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7928                                                   NULL,
7929                                                   "unsupported action QUEUE");
7930                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7931                         return rte_flow_error_set(error, ENOTSUP,
7932                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7933                                                   NULL,
7934                                                   "unsupported action RSS");
7935                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7936                         return rte_flow_error_set(error, EINVAL,
7937                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7938                                                   actions,
7939                                                   "no fate action is found");
7940         } else {
7941                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7942                         return rte_flow_error_set(error, EINVAL,
7943                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7944                                                   actions,
7945                                                   "no fate action is found");
7946         }
7947         /*
7948          * Continue validation for Xcap and VLAN actions.
7949          * If hairpin is working in explicit TX rule mode, there is no actions
7950          * splitting and the validation of hairpin ingress flow should be the
7951          * same as other standard flows.
7952          */
7953         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7954                              MLX5_FLOW_VLAN_ACTIONS)) &&
7955             (queue_index == 0xFFFF ||
7956              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7957              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7958              conf->tx_explicit != 0))) {
7959                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7960                     MLX5_FLOW_XCAP_ACTIONS)
7961                         return rte_flow_error_set(error, ENOTSUP,
7962                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7963                                                   NULL, "encap and decap "
7964                                                   "combination aren't supported");
7965                 if (!attr->transfer && attr->ingress) {
7966                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7967                                 return rte_flow_error_set
7968                                                 (error, ENOTSUP,
7969                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7970                                                  NULL, "encap is not supported"
7971                                                  " for ingress traffic");
7972                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7973                                 return rte_flow_error_set
7974                                                 (error, ENOTSUP,
7975                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7976                                                  NULL, "push VLAN action not "
7977                                                  "supported for ingress");
7978                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7979                                         MLX5_FLOW_VLAN_ACTIONS)
7980                                 return rte_flow_error_set
7981                                                 (error, ENOTSUP,
7982                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7983                                                  NULL, "no support for "
7984                                                  "multiple VLAN actions");
7985                 }
7986         }
7987         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7988                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7989                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7990                         attr->ingress)
7991                         return rte_flow_error_set
7992                                 (error, ENOTSUP,
7993                                 RTE_FLOW_ERROR_TYPE_ACTION,
7994                                 NULL, "fate action not supported for "
7995                                 "meter with policy");
7996                 if (attr->egress) {
7997                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7998                                 return rte_flow_error_set
7999                                         (error, ENOTSUP,
8000                                         RTE_FLOW_ERROR_TYPE_ACTION,
8001                                         NULL, "modify header action in egress "
8002                                         "cannot be done before meter action");
8003                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
8004                                 return rte_flow_error_set
8005                                         (error, ENOTSUP,
8006                                         RTE_FLOW_ERROR_TYPE_ACTION,
8007                                         NULL, "encap action in egress "
8008                                         "cannot be done before meter action");
8009                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8010                                 return rte_flow_error_set
8011                                         (error, ENOTSUP,
8012                                         RTE_FLOW_ERROR_TYPE_ACTION,
8013                                         NULL, "push vlan action in egress "
8014                                         "cannot be done before meter action");
8015                 }
8016         }
8017         /*
8018          * Hairpin flow will add one more TAG action in TX implicit mode.
8019          * In TX explicit mode, there will be no hairpin flow ID.
8020          */
8021         if (hairpin > 0)
8022                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8023         /* extra metadata enabled: one more TAG action will be add. */
8024         if (dev_conf->dv_flow_en &&
8025             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8026             mlx5_flow_ext_mreg_supported(dev))
8027                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8028         if (rw_act_num >
8029                         flow_dv_modify_hdr_action_max(dev, is_root)) {
8030                 return rte_flow_error_set(error, ENOTSUP,
8031                                           RTE_FLOW_ERROR_TYPE_ACTION,
8032                                           NULL, "too many header modify"
8033                                           " actions to support");
8034         }
8035         /* Eswitch egress mirror and modify flow has limitation on CX5 */
8036         if (fdb_mirror_limit && modify_after_mirror)
8037                 return rte_flow_error_set(error, EINVAL,
8038                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8039                                 "sample before modify action is not supported");
8040         return 0;
8041 }
8042
8043 /**
8044  * Internal preparation function. Allocates the DV flow size,
8045  * this size is constant.
8046  *
8047  * @param[in] dev
8048  *   Pointer to the rte_eth_dev structure.
8049  * @param[in] attr
8050  *   Pointer to the flow attributes.
8051  * @param[in] items
8052  *   Pointer to the list of items.
8053  * @param[in] actions
8054  *   Pointer to the list of actions.
8055  * @param[out] error
8056  *   Pointer to the error structure.
8057  *
8058  * @return
8059  *   Pointer to mlx5_flow object on success,
8060  *   otherwise NULL and rte_errno is set.
8061  */
8062 static struct mlx5_flow *
8063 flow_dv_prepare(struct rte_eth_dev *dev,
8064                 const struct rte_flow_attr *attr __rte_unused,
8065                 const struct rte_flow_item items[] __rte_unused,
8066                 const struct rte_flow_action actions[] __rte_unused,
8067                 struct rte_flow_error *error)
8068 {
8069         uint32_t handle_idx = 0;
8070         struct mlx5_flow *dev_flow;
8071         struct mlx5_flow_handle *dev_handle;
8072         struct mlx5_priv *priv = dev->data->dev_private;
8073         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8074
8075         MLX5_ASSERT(wks);
8076         wks->skip_matcher_reg = 0;
8077         wks->policy = NULL;
8078         wks->final_policy = NULL;
8079         /* In case of corrupting the memory. */
8080         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8081                 rte_flow_error_set(error, ENOSPC,
8082                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8083                                    "not free temporary device flow");
8084                 return NULL;
8085         }
8086         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8087                                    &handle_idx);
8088         if (!dev_handle) {
8089                 rte_flow_error_set(error, ENOMEM,
8090                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8091                                    "not enough memory to create flow handle");
8092                 return NULL;
8093         }
8094         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8095         dev_flow = &wks->flows[wks->flow_idx++];
8096         memset(dev_flow, 0, sizeof(*dev_flow));
8097         dev_flow->handle = dev_handle;
8098         dev_flow->handle_idx = handle_idx;
8099         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8100         dev_flow->ingress = attr->ingress;
8101         dev_flow->dv.transfer = attr->transfer;
8102         return dev_flow;
8103 }
8104
8105 #ifdef RTE_LIBRTE_MLX5_DEBUG
8106 /**
8107  * Sanity check for match mask and value. Similar to check_valid_spec() in
8108  * kernel driver. If unmasked bit is present in value, it returns failure.
8109  *
8110  * @param match_mask
8111  *   pointer to match mask buffer.
8112  * @param match_value
8113  *   pointer to match value buffer.
8114  *
8115  * @return
8116  *   0 if valid, -EINVAL otherwise.
8117  */
8118 static int
8119 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8120 {
8121         uint8_t *m = match_mask;
8122         uint8_t *v = match_value;
8123         unsigned int i;
8124
8125         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8126                 if (v[i] & ~m[i]) {
8127                         DRV_LOG(ERR,
8128                                 "match_value differs from match_criteria"
8129                                 " %p[%u] != %p[%u]",
8130                                 match_value, i, match_mask, i);
8131                         return -EINVAL;
8132                 }
8133         }
8134         return 0;
8135 }
8136 #endif
8137
8138 /**
8139  * Add match of ip_version.
8140  *
8141  * @param[in] group
8142  *   Flow group.
8143  * @param[in] headers_v
8144  *   Values header pointer.
8145  * @param[in] headers_m
8146  *   Masks header pointer.
8147  * @param[in] ip_version
8148  *   The IP version to set.
8149  */
8150 static inline void
8151 flow_dv_set_match_ip_version(uint32_t group,
8152                              void *headers_v,
8153                              void *headers_m,
8154                              uint8_t ip_version)
8155 {
8156         if (group == 0)
8157                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8158         else
8159                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8160                          ip_version);
8161         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8162         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8163         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8164 }
8165
8166 /**
8167  * Add Ethernet item to matcher and to the value.
8168  *
8169  * @param[in, out] matcher
8170  *   Flow matcher.
8171  * @param[in, out] key
8172  *   Flow matcher value.
8173  * @param[in] item
8174  *   Flow pattern to translate.
8175  * @param[in] inner
8176  *   Item is inner pattern.
8177  */
8178 static void
8179 flow_dv_translate_item_eth(void *matcher, void *key,
8180                            const struct rte_flow_item *item, int inner,
8181                            uint32_t group)
8182 {
8183         const struct rte_flow_item_eth *eth_m = item->mask;
8184         const struct rte_flow_item_eth *eth_v = item->spec;
8185         const struct rte_flow_item_eth nic_mask = {
8186                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8187                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8188                 .type = RTE_BE16(0xffff),
8189                 .has_vlan = 0,
8190         };
8191         void *hdrs_m;
8192         void *hdrs_v;
8193         char *l24_v;
8194         unsigned int i;
8195
8196         if (!eth_v)
8197                 return;
8198         if (!eth_m)
8199                 eth_m = &nic_mask;
8200         if (inner) {
8201                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8202                                          inner_headers);
8203                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8204         } else {
8205                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8206                                          outer_headers);
8207                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8208         }
8209         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8210                &eth_m->dst, sizeof(eth_m->dst));
8211         /* The value must be in the range of the mask. */
8212         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8213         for (i = 0; i < sizeof(eth_m->dst); ++i)
8214                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8215         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8216                &eth_m->src, sizeof(eth_m->src));
8217         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8218         /* The value must be in the range of the mask. */
8219         for (i = 0; i < sizeof(eth_m->dst); ++i)
8220                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8221         /*
8222          * HW supports match on one Ethertype, the Ethertype following the last
8223          * VLAN tag of the packet (see PRM).
8224          * Set match on ethertype only if ETH header is not followed by VLAN.
8225          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8226          * ethertype, and use ip_version field instead.
8227          * eCPRI over Ether layer will use type value 0xAEFE.
8228          */
8229         if (eth_m->type == 0xFFFF) {
8230                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8231                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8232                 switch (eth_v->type) {
8233                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8234                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8235                         return;
8236                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8237                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8238                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8239                         return;
8240                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8241                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8242                         return;
8243                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8244                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8245                         return;
8246                 default:
8247                         break;
8248                 }
8249         }
8250         if (eth_m->has_vlan) {
8251                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8252                 if (eth_v->has_vlan) {
8253                         /*
8254                          * Here, when also has_more_vlan field in VLAN item is
8255                          * not set, only single-tagged packets will be matched.
8256                          */
8257                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8258                         return;
8259                 }
8260         }
8261         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8262                  rte_be_to_cpu_16(eth_m->type));
8263         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8264         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8265 }
8266
8267 /**
8268  * Add VLAN item to matcher and to the value.
8269  *
8270  * @param[in, out] dev_flow
8271  *   Flow descriptor.
8272  * @param[in, out] matcher
8273  *   Flow matcher.
8274  * @param[in, out] key
8275  *   Flow matcher value.
8276  * @param[in] item
8277  *   Flow pattern to translate.
8278  * @param[in] inner
8279  *   Item is inner pattern.
8280  */
8281 static void
8282 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8283                             void *matcher, void *key,
8284                             const struct rte_flow_item *item,
8285                             int inner, uint32_t group)
8286 {
8287         const struct rte_flow_item_vlan *vlan_m = item->mask;
8288         const struct rte_flow_item_vlan *vlan_v = item->spec;
8289         void *hdrs_m;
8290         void *hdrs_v;
8291         uint16_t tci_m;
8292         uint16_t tci_v;
8293
8294         if (inner) {
8295                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8296                                          inner_headers);
8297                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8298         } else {
8299                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8300                                          outer_headers);
8301                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8302                 /*
8303                  * This is workaround, masks are not supported,
8304                  * and pre-validated.
8305                  */
8306                 if (vlan_v)
8307                         dev_flow->handle->vf_vlan.tag =
8308                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8309         }
8310         /*
8311          * When VLAN item exists in flow, mark packet as tagged,
8312          * even if TCI is not specified.
8313          */
8314         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8315                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8316                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8317         }
8318         if (!vlan_v)
8319                 return;
8320         if (!vlan_m)
8321                 vlan_m = &rte_flow_item_vlan_mask;
8322         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8323         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8324         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8325         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8326         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8327         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8328         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8329         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8330         /*
8331          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8332          * ethertype, and use ip_version field instead.
8333          */
8334         if (vlan_m->inner_type == 0xFFFF) {
8335                 switch (vlan_v->inner_type) {
8336                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8337                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8338                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8339                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8340                         return;
8341                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8342                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8343                         return;
8344                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8345                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8346                         return;
8347                 default:
8348                         break;
8349                 }
8350         }
8351         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8352                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8353                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8354                 /* Only one vlan_tag bit can be set. */
8355                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8356                 return;
8357         }
8358         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8359                  rte_be_to_cpu_16(vlan_m->inner_type));
8360         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8361                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8362 }
8363
8364 /**
8365  * Add IPV4 item to matcher and to the value.
8366  *
8367  * @param[in, out] matcher
8368  *   Flow matcher.
8369  * @param[in, out] key
8370  *   Flow matcher value.
8371  * @param[in] item
8372  *   Flow pattern to translate.
8373  * @param[in] inner
8374  *   Item is inner pattern.
8375  * @param[in] group
8376  *   The group to insert the rule.
8377  */
8378 static void
8379 flow_dv_translate_item_ipv4(void *matcher, void *key,
8380                             const struct rte_flow_item *item,
8381                             int inner, uint32_t group)
8382 {
8383         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8384         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8385         const struct rte_flow_item_ipv4 nic_mask = {
8386                 .hdr = {
8387                         .src_addr = RTE_BE32(0xffffffff),
8388                         .dst_addr = RTE_BE32(0xffffffff),
8389                         .type_of_service = 0xff,
8390                         .next_proto_id = 0xff,
8391                         .time_to_live = 0xff,
8392                 },
8393         };
8394         void *headers_m;
8395         void *headers_v;
8396         char *l24_m;
8397         char *l24_v;
8398         uint8_t tos, ihl_m, ihl_v;
8399
8400         if (inner) {
8401                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8402                                          inner_headers);
8403                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8404         } else {
8405                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8406                                          outer_headers);
8407                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8408         }
8409         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8410         if (!ipv4_v)
8411                 return;
8412         if (!ipv4_m)
8413                 ipv4_m = &nic_mask;
8414         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8415                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8416         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8417                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8418         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8419         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8420         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8421                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8422         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8423                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8424         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8425         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8426         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8427         ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8428         ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8429         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8430         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8431         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8432                  ipv4_m->hdr.type_of_service);
8433         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8434         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8435                  ipv4_m->hdr.type_of_service >> 2);
8436         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8437         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8438                  ipv4_m->hdr.next_proto_id);
8439         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8440                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8441         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8442                  ipv4_m->hdr.time_to_live);
8443         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8444                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8445         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8446                  !!(ipv4_m->hdr.fragment_offset));
8447         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8448                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8449 }
8450
8451 /**
8452  * Add IPV6 item to matcher and to the value.
8453  *
8454  * @param[in, out] matcher
8455  *   Flow matcher.
8456  * @param[in, out] key
8457  *   Flow matcher value.
8458  * @param[in] item
8459  *   Flow pattern to translate.
8460  * @param[in] inner
8461  *   Item is inner pattern.
8462  * @param[in] group
8463  *   The group to insert the rule.
8464  */
8465 static void
8466 flow_dv_translate_item_ipv6(void *matcher, void *key,
8467                             const struct rte_flow_item *item,
8468                             int inner, uint32_t group)
8469 {
8470         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8471         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8472         const struct rte_flow_item_ipv6 nic_mask = {
8473                 .hdr = {
8474                         .src_addr =
8475                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8476                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8477                         .dst_addr =
8478                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8479                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8480                         .vtc_flow = RTE_BE32(0xffffffff),
8481                         .proto = 0xff,
8482                         .hop_limits = 0xff,
8483                 },
8484         };
8485         void *headers_m;
8486         void *headers_v;
8487         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8488         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8489         char *l24_m;
8490         char *l24_v;
8491         uint32_t vtc_m;
8492         uint32_t vtc_v;
8493         int i;
8494         int size;
8495
8496         if (inner) {
8497                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8498                                          inner_headers);
8499                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8500         } else {
8501                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8502                                          outer_headers);
8503                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8504         }
8505         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8506         if (!ipv6_v)
8507                 return;
8508         if (!ipv6_m)
8509                 ipv6_m = &nic_mask;
8510         size = sizeof(ipv6_m->hdr.dst_addr);
8511         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8512                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8513         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8514                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8515         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8516         for (i = 0; i < size; ++i)
8517                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8518         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8519                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8520         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8521                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8522         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8523         for (i = 0; i < size; ++i)
8524                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8525         /* TOS. */
8526         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8527         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8528         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8529         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8530         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8531         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8532         /* Label. */
8533         if (inner) {
8534                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8535                          vtc_m);
8536                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8537                          vtc_v);
8538         } else {
8539                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8540                          vtc_m);
8541                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8542                          vtc_v);
8543         }
8544         /* Protocol. */
8545         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8546                  ipv6_m->hdr.proto);
8547         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8548                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8549         /* Hop limit. */
8550         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8551                  ipv6_m->hdr.hop_limits);
8552         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8553                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8554         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8555                  !!(ipv6_m->has_frag_ext));
8556         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8557                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8558 }
8559
8560 /**
8561  * Add IPV6 fragment extension item to matcher and to the value.
8562  *
8563  * @param[in, out] matcher
8564  *   Flow matcher.
8565  * @param[in, out] key
8566  *   Flow matcher value.
8567  * @param[in] item
8568  *   Flow pattern to translate.
8569  * @param[in] inner
8570  *   Item is inner pattern.
8571  */
8572 static void
8573 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8574                                      const struct rte_flow_item *item,
8575                                      int inner)
8576 {
8577         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8578         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8579         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8580                 .hdr = {
8581                         .next_header = 0xff,
8582                         .frag_data = RTE_BE16(0xffff),
8583                 },
8584         };
8585         void *headers_m;
8586         void *headers_v;
8587
8588         if (inner) {
8589                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8590                                          inner_headers);
8591                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8592         } else {
8593                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8594                                          outer_headers);
8595                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8596         }
8597         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8598         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8599         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8600         if (!ipv6_frag_ext_v)
8601                 return;
8602         if (!ipv6_frag_ext_m)
8603                 ipv6_frag_ext_m = &nic_mask;
8604         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8605                  ipv6_frag_ext_m->hdr.next_header);
8606         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8607                  ipv6_frag_ext_v->hdr.next_header &
8608                  ipv6_frag_ext_m->hdr.next_header);
8609 }
8610
8611 /**
8612  * Add TCP item to matcher and to the value.
8613  *
8614  * @param[in, out] matcher
8615  *   Flow matcher.
8616  * @param[in, out] key
8617  *   Flow matcher value.
8618  * @param[in] item
8619  *   Flow pattern to translate.
8620  * @param[in] inner
8621  *   Item is inner pattern.
8622  */
8623 static void
8624 flow_dv_translate_item_tcp(void *matcher, void *key,
8625                            const struct rte_flow_item *item,
8626                            int inner)
8627 {
8628         const struct rte_flow_item_tcp *tcp_m = item->mask;
8629         const struct rte_flow_item_tcp *tcp_v = item->spec;
8630         void *headers_m;
8631         void *headers_v;
8632
8633         if (inner) {
8634                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8635                                          inner_headers);
8636                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8637         } else {
8638                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8639                                          outer_headers);
8640                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8641         }
8642         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8643         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8644         if (!tcp_v)
8645                 return;
8646         if (!tcp_m)
8647                 tcp_m = &rte_flow_item_tcp_mask;
8648         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8649                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8650         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8651                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8652         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8653                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8654         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8655                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8656         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8657                  tcp_m->hdr.tcp_flags);
8658         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8659                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8660 }
8661
8662 /**
8663  * Add UDP item to matcher and to the value.
8664  *
8665  * @param[in, out] matcher
8666  *   Flow matcher.
8667  * @param[in, out] key
8668  *   Flow matcher value.
8669  * @param[in] item
8670  *   Flow pattern to translate.
8671  * @param[in] inner
8672  *   Item is inner pattern.
8673  */
8674 static void
8675 flow_dv_translate_item_udp(void *matcher, void *key,
8676                            const struct rte_flow_item *item,
8677                            int inner)
8678 {
8679         const struct rte_flow_item_udp *udp_m = item->mask;
8680         const struct rte_flow_item_udp *udp_v = item->spec;
8681         void *headers_m;
8682         void *headers_v;
8683
8684         if (inner) {
8685                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8686                                          inner_headers);
8687                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8688         } else {
8689                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8690                                          outer_headers);
8691                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8692         }
8693         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8694         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8695         if (!udp_v)
8696                 return;
8697         if (!udp_m)
8698                 udp_m = &rte_flow_item_udp_mask;
8699         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8700                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8701         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8702                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8703         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8704                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8705         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8706                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8707 }
8708
8709 /**
8710  * Add GRE optional Key item to matcher and to the value.
8711  *
8712  * @param[in, out] matcher
8713  *   Flow matcher.
8714  * @param[in, out] key
8715  *   Flow matcher value.
8716  * @param[in] item
8717  *   Flow pattern to translate.
8718  * @param[in] inner
8719  *   Item is inner pattern.
8720  */
8721 static void
8722 flow_dv_translate_item_gre_key(void *matcher, void *key,
8723                                    const struct rte_flow_item *item)
8724 {
8725         const rte_be32_t *key_m = item->mask;
8726         const rte_be32_t *key_v = item->spec;
8727         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8728         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8729         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8730
8731         /* GRE K bit must be on and should already be validated */
8732         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8733         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8734         if (!key_v)
8735                 return;
8736         if (!key_m)
8737                 key_m = &gre_key_default_mask;
8738         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8739                  rte_be_to_cpu_32(*key_m) >> 8);
8740         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8741                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8742         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8743                  rte_be_to_cpu_32(*key_m) & 0xFF);
8744         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8745                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8746 }
8747
8748 /**
8749  * Add GRE item to matcher and to the value.
8750  *
8751  * @param[in, out] matcher
8752  *   Flow matcher.
8753  * @param[in, out] key
8754  *   Flow matcher value.
8755  * @param[in] item
8756  *   Flow pattern to translate.
8757  * @param[in] pattern_flags
8758  *   Accumulated pattern flags.
8759  */
8760 static void
8761 flow_dv_translate_item_gre(void *matcher, void *key,
8762                            const struct rte_flow_item *item,
8763                            uint64_t pattern_flags)
8764 {
8765         static const struct rte_flow_item_gre empty_gre = {0,};
8766         const struct rte_flow_item_gre *gre_m = item->mask;
8767         const struct rte_flow_item_gre *gre_v = item->spec;
8768         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
8769         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8770         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8771         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8772         struct {
8773                 union {
8774                         __extension__
8775                         struct {
8776                                 uint16_t version:3;
8777                                 uint16_t rsvd0:9;
8778                                 uint16_t s_present:1;
8779                                 uint16_t k_present:1;
8780                                 uint16_t rsvd_bit1:1;
8781                                 uint16_t c_present:1;
8782                         };
8783                         uint16_t value;
8784                 };
8785         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8786         uint16_t protocol_m, protocol_v;
8787
8788         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8789         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8790         if (!gre_v) {
8791                 gre_v = &empty_gre;
8792                 gre_m = &empty_gre;
8793         } else {
8794                 if (!gre_m)
8795                         gre_m = &rte_flow_item_gre_mask;
8796         }
8797         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8798         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8799         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8800                  gre_crks_rsvd0_ver_m.c_present);
8801         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8802                  gre_crks_rsvd0_ver_v.c_present &
8803                  gre_crks_rsvd0_ver_m.c_present);
8804         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8805                  gre_crks_rsvd0_ver_m.k_present);
8806         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8807                  gre_crks_rsvd0_ver_v.k_present &
8808                  gre_crks_rsvd0_ver_m.k_present);
8809         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8810                  gre_crks_rsvd0_ver_m.s_present);
8811         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8812                  gre_crks_rsvd0_ver_v.s_present &
8813                  gre_crks_rsvd0_ver_m.s_present);
8814         protocol_m = rte_be_to_cpu_16(gre_m->protocol);
8815         protocol_v = rte_be_to_cpu_16(gre_v->protocol);
8816         if (!protocol_m) {
8817                 /* Force next protocol to prevent matchers duplication */
8818                 protocol_m = 0xFFFF;
8819                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
8820         }
8821         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, protocol_m);
8822         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8823                  protocol_m & protocol_v);
8824 }
8825
8826 /**
8827  * Add NVGRE item to matcher and to the value.
8828  *
8829  * @param[in, out] matcher
8830  *   Flow matcher.
8831  * @param[in, out] key
8832  *   Flow matcher value.
8833  * @param[in] item
8834  *   Flow pattern to translate.
8835  * @param[in] pattern_flags
8836  *   Accumulated pattern flags.
8837  */
8838 static void
8839 flow_dv_translate_item_nvgre(void *matcher, void *key,
8840                              const struct rte_flow_item *item,
8841                              unsigned long pattern_flags)
8842 {
8843         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8844         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8845         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8846         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8847         const char *tni_flow_id_m;
8848         const char *tni_flow_id_v;
8849         char *gre_key_m;
8850         char *gre_key_v;
8851         int size;
8852         int i;
8853
8854         /* For NVGRE, GRE header fields must be set with defined values. */
8855         const struct rte_flow_item_gre gre_spec = {
8856                 .c_rsvd0_ver = RTE_BE16(0x2000),
8857                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8858         };
8859         const struct rte_flow_item_gre gre_mask = {
8860                 .c_rsvd0_ver = RTE_BE16(0xB000),
8861                 .protocol = RTE_BE16(UINT16_MAX),
8862         };
8863         const struct rte_flow_item gre_item = {
8864                 .spec = &gre_spec,
8865                 .mask = &gre_mask,
8866                 .last = NULL,
8867         };
8868         flow_dv_translate_item_gre(matcher, key, &gre_item, pattern_flags);
8869         if (!nvgre_v)
8870                 return;
8871         if (!nvgre_m)
8872                 nvgre_m = &rte_flow_item_nvgre_mask;
8873         tni_flow_id_m = (const char *)nvgre_m->tni;
8874         tni_flow_id_v = (const char *)nvgre_v->tni;
8875         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8876         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8877         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8878         memcpy(gre_key_m, tni_flow_id_m, size);
8879         for (i = 0; i < size; ++i)
8880                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8881 }
8882
8883 /**
8884  * Add VXLAN item to matcher and to the value.
8885  *
8886  * @param[in] dev
8887  *   Pointer to the Ethernet device structure.
8888  * @param[in] attr
8889  *   Flow rule attributes.
8890  * @param[in, out] matcher
8891  *   Flow matcher.
8892  * @param[in, out] key
8893  *   Flow matcher value.
8894  * @param[in] item
8895  *   Flow pattern to translate.
8896  * @param[in] inner
8897  *   Item is inner pattern.
8898  */
8899 static void
8900 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8901                              const struct rte_flow_attr *attr,
8902                              void *matcher, void *key,
8903                              const struct rte_flow_item *item,
8904                              int inner)
8905 {
8906         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8907         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8908         void *headers_m;
8909         void *headers_v;
8910         void *misc5_m;
8911         void *misc5_v;
8912         uint32_t *tunnel_header_v;
8913         uint32_t *tunnel_header_m;
8914         uint16_t dport;
8915         struct mlx5_priv *priv = dev->data->dev_private;
8916         const struct rte_flow_item_vxlan nic_mask = {
8917                 .vni = "\xff\xff\xff",
8918                 .rsvd1 = 0xff,
8919         };
8920
8921         if (inner) {
8922                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8923                                          inner_headers);
8924                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8925         } else {
8926                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8927                                          outer_headers);
8928                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8929         }
8930         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8931                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8932         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8933                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8934                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8935         }
8936         dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
8937         if (!vxlan_v)
8938                 return;
8939         if (!vxlan_m) {
8940                 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8941                     (attr->group && !priv->sh->misc5_cap))
8942                         vxlan_m = &rte_flow_item_vxlan_mask;
8943                 else
8944                         vxlan_m = &nic_mask;
8945         }
8946         if ((priv->sh->steering_format_version ==
8947             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
8948             dport != MLX5_UDP_PORT_VXLAN) ||
8949             (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8950             ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8951                 void *misc_m;
8952                 void *misc_v;
8953                 char *vni_m;
8954                 char *vni_v;
8955                 int size;
8956                 int i;
8957                 misc_m = MLX5_ADDR_OF(fte_match_param,
8958                                       matcher, misc_parameters);
8959                 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8960                 size = sizeof(vxlan_m->vni);
8961                 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8962                 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8963                 memcpy(vni_m, vxlan_m->vni, size);
8964                 for (i = 0; i < size; ++i)
8965                         vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8966                 return;
8967         }
8968         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8969         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8970         tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8971                                                    misc5_v,
8972                                                    tunnel_header_1);
8973         tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8974                                                    misc5_m,
8975                                                    tunnel_header_1);
8976         *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8977                            (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8978                            (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8979         if (*tunnel_header_v)
8980                 *tunnel_header_m = vxlan_m->vni[0] |
8981                         vxlan_m->vni[1] << 8 |
8982                         vxlan_m->vni[2] << 16;
8983         else
8984                 *tunnel_header_m = 0x0;
8985         *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8986         if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8987                 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8988 }
8989
8990 /**
8991  * Add VXLAN-GPE item to matcher and to the value.
8992  *
8993  * @param[in, out] matcher
8994  *   Flow matcher.
8995  * @param[in, out] key
8996  *   Flow matcher value.
8997  * @param[in] item
8998  *   Flow pattern to translate.
8999  * @param[in] inner
9000  *   Item is inner pattern.
9001  */
9002
9003 static void
9004 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
9005                                  const struct rte_flow_item *item,
9006                                  const uint64_t pattern_flags)
9007 {
9008         static const struct rte_flow_item_vxlan_gpe dummy_vxlan_gpe_hdr = {0, };
9009         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
9010         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
9011         /* The item was validated to be on the outer side */
9012         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9013         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9014         void *misc_m =
9015                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
9016         void *misc_v =
9017                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9018         char *vni_m =
9019                 MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
9020         char *vni_v =
9021                 MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
9022         int i, size = sizeof(vxlan_m->vni);
9023         uint8_t flags_m = 0xff;
9024         uint8_t flags_v = 0xc;
9025         uint8_t m_protocol, v_protocol;
9026
9027         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9028                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9029                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9030                          MLX5_UDP_PORT_VXLAN_GPE);
9031         }
9032         if (!vxlan_v) {
9033                 vxlan_v = &dummy_vxlan_gpe_hdr;
9034                 vxlan_m = &dummy_vxlan_gpe_hdr;
9035         } else {
9036                 if (!vxlan_m)
9037                         vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9038         }
9039         memcpy(vni_m, vxlan_m->vni, size);
9040         for (i = 0; i < size; ++i)
9041                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9042         if (vxlan_m->flags) {
9043                 flags_m = vxlan_m->flags;
9044                 flags_v = vxlan_v->flags;
9045         }
9046         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9047         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9048         m_protocol = vxlan_m->protocol;
9049         v_protocol = vxlan_v->protocol;
9050         if (!m_protocol) {
9051                 m_protocol = 0xff;
9052                 /* Force next protocol to ensure next headers parsing. */
9053                 if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2)
9054                         v_protocol = RTE_VXLAN_GPE_TYPE_ETH;
9055                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4)
9056                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV4;
9057                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)
9058                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV6;
9059         }
9060         MLX5_SET(fte_match_set_misc3, misc_m,
9061                  outer_vxlan_gpe_next_protocol, m_protocol);
9062         MLX5_SET(fte_match_set_misc3, misc_v,
9063                  outer_vxlan_gpe_next_protocol, m_protocol & v_protocol);
9064 }
9065
9066 /**
9067  * Add Geneve item to matcher and to the value.
9068  *
9069  * @param[in, out] matcher
9070  *   Flow matcher.
9071  * @param[in, out] key
9072  *   Flow matcher value.
9073  * @param[in] item
9074  *   Flow pattern to translate.
9075  * @param[in] inner
9076  *   Item is inner pattern.
9077  */
9078
9079 static void
9080 flow_dv_translate_item_geneve(void *matcher, void *key,
9081                               const struct rte_flow_item *item,
9082                               uint64_t pattern_flags)
9083 {
9084         static const struct rte_flow_item_geneve empty_geneve = {0,};
9085         const struct rte_flow_item_geneve *geneve_m = item->mask;
9086         const struct rte_flow_item_geneve *geneve_v = item->spec;
9087         /* GENEVE flow item validation allows single tunnel item */
9088         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9089         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9090         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9091         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9092         uint16_t gbhdr_m;
9093         uint16_t gbhdr_v;
9094         char *vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9095         char *vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9096         size_t size = sizeof(geneve_m->vni), i;
9097         uint16_t protocol_m, protocol_v;
9098
9099         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9100                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9101                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9102                          MLX5_UDP_PORT_GENEVE);
9103         }
9104         if (!geneve_v) {
9105                 geneve_v = &empty_geneve;
9106                 geneve_m = &empty_geneve;
9107         } else {
9108                 if (!geneve_m)
9109                         geneve_m = &rte_flow_item_geneve_mask;
9110         }
9111         memcpy(vni_m, geneve_m->vni, size);
9112         for (i = 0; i < size; ++i)
9113                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9114         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9115         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9116         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9117                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9118         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9119                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9120         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9121                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9122         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9123                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9124                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9125         protocol_m = rte_be_to_cpu_16(geneve_m->protocol);
9126         protocol_v = rte_be_to_cpu_16(geneve_v->protocol);
9127         if (!protocol_m) {
9128                 /* Force next protocol to prevent matchers duplication */
9129                 protocol_m = 0xFFFF;
9130                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
9131         }
9132         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type, protocol_m);
9133         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9134                  protocol_m & protocol_v);
9135 }
9136
9137 /**
9138  * Create Geneve TLV option resource.
9139  *
9140  * @param dev[in, out]
9141  *   Pointer to rte_eth_dev structure.
9142  * @param[in, out] tag_be24
9143  *   Tag value in big endian then R-shift 8.
9144  * @parm[in, out] dev_flow
9145  *   Pointer to the dev_flow.
9146  * @param[out] error
9147  *   pointer to error structure.
9148  *
9149  * @return
9150  *   0 on success otherwise -errno and errno is set.
9151  */
9152
9153 int
9154 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9155                                              const struct rte_flow_item *item,
9156                                              struct rte_flow_error *error)
9157 {
9158         struct mlx5_priv *priv = dev->data->dev_private;
9159         struct mlx5_dev_ctx_shared *sh = priv->sh;
9160         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9161                         sh->geneve_tlv_option_resource;
9162         struct mlx5_devx_obj *obj;
9163         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9164         int ret = 0;
9165
9166         if (!geneve_opt_v)
9167                 return -1;
9168         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9169         if (geneve_opt_resource != NULL) {
9170                 if (geneve_opt_resource->option_class ==
9171                         geneve_opt_v->option_class &&
9172                         geneve_opt_resource->option_type ==
9173                         geneve_opt_v->option_type &&
9174                         geneve_opt_resource->length ==
9175                         geneve_opt_v->option_len) {
9176                         /* We already have GENVE TLV option obj allocated. */
9177                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9178                                            __ATOMIC_RELAXED);
9179                 } else {
9180                         ret = rte_flow_error_set(error, ENOMEM,
9181                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9182                                 "Only one GENEVE TLV option supported");
9183                         goto exit;
9184                 }
9185         } else {
9186                 /* Create a GENEVE TLV object and resource. */
9187                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9188                                 geneve_opt_v->option_class,
9189                                 geneve_opt_v->option_type,
9190                                 geneve_opt_v->option_len);
9191                 if (!obj) {
9192                         ret = rte_flow_error_set(error, ENODATA,
9193                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9194                                 "Failed to create GENEVE TLV Devx object");
9195                         goto exit;
9196                 }
9197                 sh->geneve_tlv_option_resource =
9198                                 mlx5_malloc(MLX5_MEM_ZERO,
9199                                                 sizeof(*geneve_opt_resource),
9200                                                 0, SOCKET_ID_ANY);
9201                 if (!sh->geneve_tlv_option_resource) {
9202                         claim_zero(mlx5_devx_cmd_destroy(obj));
9203                         ret = rte_flow_error_set(error, ENOMEM,
9204                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9205                                 "GENEVE TLV object memory allocation failed");
9206                         goto exit;
9207                 }
9208                 geneve_opt_resource = sh->geneve_tlv_option_resource;
9209                 geneve_opt_resource->obj = obj;
9210                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9211                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9212                 geneve_opt_resource->length = geneve_opt_v->option_len;
9213                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9214                                 __ATOMIC_RELAXED);
9215         }
9216 exit:
9217         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9218         return ret;
9219 }
9220
9221 /**
9222  * Add Geneve TLV option item to matcher.
9223  *
9224  * @param[in, out] dev
9225  *   Pointer to rte_eth_dev structure.
9226  * @param[in, out] matcher
9227  *   Flow matcher.
9228  * @param[in, out] key
9229  *   Flow matcher value.
9230  * @param[in] item
9231  *   Flow pattern to translate.
9232  * @param[out] error
9233  *   Pointer to error structure.
9234  */
9235 static int
9236 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9237                                   void *key, const struct rte_flow_item *item,
9238                                   struct rte_flow_error *error)
9239 {
9240         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9241         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9242         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9243         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9244         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9245                         misc_parameters_3);
9246         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9247         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9248         int ret = 0;
9249
9250         if (!geneve_opt_v)
9251                 return -1;
9252         if (!geneve_opt_m)
9253                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9254         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9255                                                            error);
9256         if (ret) {
9257                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9258                 return ret;
9259         }
9260         /*
9261          * Set the option length in GENEVE header if not requested.
9262          * The GENEVE TLV option length is expressed by the option length field
9263          * in the GENEVE header.
9264          * If the option length was not requested but the GENEVE TLV option item
9265          * is present we set the option length field implicitly.
9266          */
9267         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9268                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9269                          MLX5_GENEVE_OPTLEN_MASK);
9270                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9271                          geneve_opt_v->option_len + 1);
9272         }
9273         MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9274         MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9275         /* Set the data. */
9276         if (geneve_opt_v->data) {
9277                 memcpy(&opt_data_key, geneve_opt_v->data,
9278                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9279                                 sizeof(opt_data_key)));
9280                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9281                                 sizeof(opt_data_key));
9282                 memcpy(&opt_data_mask, geneve_opt_m->data,
9283                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9284                                 sizeof(opt_data_mask)));
9285                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9286                                 sizeof(opt_data_mask));
9287                 MLX5_SET(fte_match_set_misc3, misc3_m,
9288                                 geneve_tlv_option_0_data,
9289                                 rte_be_to_cpu_32(opt_data_mask));
9290                 MLX5_SET(fte_match_set_misc3, misc3_v,
9291                                 geneve_tlv_option_0_data,
9292                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9293         }
9294         return ret;
9295 }
9296
9297 /**
9298  * Add MPLS item to matcher and to the value.
9299  *
9300  * @param[in, out] matcher
9301  *   Flow matcher.
9302  * @param[in, out] key
9303  *   Flow matcher value.
9304  * @param[in] item
9305  *   Flow pattern to translate.
9306  * @param[in] prev_layer
9307  *   The protocol layer indicated in previous item.
9308  * @param[in] inner
9309  *   Item is inner pattern.
9310  */
9311 static void
9312 flow_dv_translate_item_mpls(void *matcher, void *key,
9313                             const struct rte_flow_item *item,
9314                             uint64_t prev_layer,
9315                             int inner)
9316 {
9317         const uint32_t *in_mpls_m = item->mask;
9318         const uint32_t *in_mpls_v = item->spec;
9319         uint32_t *out_mpls_m = 0;
9320         uint32_t *out_mpls_v = 0;
9321         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9322         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9323         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9324                                      misc_parameters_2);
9325         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9326         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9327         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9328
9329         switch (prev_layer) {
9330         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9331                 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9332                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
9333                                  0xffff);
9334                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9335                                  MLX5_UDP_PORT_MPLS);
9336                 }
9337                 break;
9338         case MLX5_FLOW_LAYER_GRE:
9339                 /* Fall-through. */
9340         case MLX5_FLOW_LAYER_GRE_KEY:
9341                 if (!MLX5_GET16(fte_match_set_misc, misc_v, gre_protocol)) {
9342                         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
9343                                  0xffff);
9344                         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9345                                  RTE_ETHER_TYPE_MPLS);
9346                 }
9347                 break;
9348         default:
9349                 break;
9350         }
9351         if (!in_mpls_v)
9352                 return;
9353         if (!in_mpls_m)
9354                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9355         switch (prev_layer) {
9356         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9357                 out_mpls_m =
9358                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9359                                                  outer_first_mpls_over_udp);
9360                 out_mpls_v =
9361                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9362                                                  outer_first_mpls_over_udp);
9363                 break;
9364         case MLX5_FLOW_LAYER_GRE:
9365                 out_mpls_m =
9366                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9367                                                  outer_first_mpls_over_gre);
9368                 out_mpls_v =
9369                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9370                                                  outer_first_mpls_over_gre);
9371                 break;
9372         default:
9373                 /* Inner MPLS not over GRE is not supported. */
9374                 if (!inner) {
9375                         out_mpls_m =
9376                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9377                                                          misc2_m,
9378                                                          outer_first_mpls);
9379                         out_mpls_v =
9380                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9381                                                          misc2_v,
9382                                                          outer_first_mpls);
9383                 }
9384                 break;
9385         }
9386         if (out_mpls_m && out_mpls_v) {
9387                 *out_mpls_m = *in_mpls_m;
9388                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9389         }
9390 }
9391
9392 /**
9393  * Add metadata register item to matcher
9394  *
9395  * @param[in, out] matcher
9396  *   Flow matcher.
9397  * @param[in, out] key
9398  *   Flow matcher value.
9399  * @param[in] reg_type
9400  *   Type of device metadata register
9401  * @param[in] value
9402  *   Register value
9403  * @param[in] mask
9404  *   Register mask
9405  */
9406 static void
9407 flow_dv_match_meta_reg(void *matcher, void *key,
9408                        enum modify_reg reg_type,
9409                        uint32_t data, uint32_t mask)
9410 {
9411         void *misc2_m =
9412                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9413         void *misc2_v =
9414                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9415         uint32_t temp;
9416
9417         data &= mask;
9418         switch (reg_type) {
9419         case REG_A:
9420                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9421                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9422                 break;
9423         case REG_B:
9424                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9425                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9426                 break;
9427         case REG_C_0:
9428                 /*
9429                  * The metadata register C0 field might be divided into
9430                  * source vport index and META item value, we should set
9431                  * this field according to specified mask, not as whole one.
9432                  */
9433                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9434                 temp |= mask;
9435                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9436                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9437                 temp &= ~mask;
9438                 temp |= data;
9439                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9440                 break;
9441         case REG_C_1:
9442                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9443                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9444                 break;
9445         case REG_C_2:
9446                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9447                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9448                 break;
9449         case REG_C_3:
9450                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9451                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9452                 break;
9453         case REG_C_4:
9454                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9455                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9456                 break;
9457         case REG_C_5:
9458                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9459                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9460                 break;
9461         case REG_C_6:
9462                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9463                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9464                 break;
9465         case REG_C_7:
9466                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9467                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9468                 break;
9469         default:
9470                 MLX5_ASSERT(false);
9471                 break;
9472         }
9473 }
9474
9475 /**
9476  * Add MARK item to matcher
9477  *
9478  * @param[in] dev
9479  *   The device to configure through.
9480  * @param[in, out] matcher
9481  *   Flow matcher.
9482  * @param[in, out] key
9483  *   Flow matcher value.
9484  * @param[in] item
9485  *   Flow pattern to translate.
9486  */
9487 static void
9488 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9489                             void *matcher, void *key,
9490                             const struct rte_flow_item *item)
9491 {
9492         struct mlx5_priv *priv = dev->data->dev_private;
9493         const struct rte_flow_item_mark *mark;
9494         uint32_t value;
9495         uint32_t mask;
9496
9497         mark = item->mask ? (const void *)item->mask :
9498                             &rte_flow_item_mark_mask;
9499         mask = mark->id & priv->sh->dv_mark_mask;
9500         mark = (const void *)item->spec;
9501         MLX5_ASSERT(mark);
9502         value = mark->id & priv->sh->dv_mark_mask & mask;
9503         if (mask) {
9504                 enum modify_reg reg;
9505
9506                 /* Get the metadata register index for the mark. */
9507                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9508                 MLX5_ASSERT(reg > 0);
9509                 if (reg == REG_C_0) {
9510                         struct mlx5_priv *priv = dev->data->dev_private;
9511                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9512                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9513
9514                         mask &= msk_c0;
9515                         mask <<= shl_c0;
9516                         value <<= shl_c0;
9517                 }
9518                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9519         }
9520 }
9521
9522 /**
9523  * Add META item to matcher
9524  *
9525  * @param[in] dev
9526  *   The devich to configure through.
9527  * @param[in, out] matcher
9528  *   Flow matcher.
9529  * @param[in, out] key
9530  *   Flow matcher value.
9531  * @param[in] attr
9532  *   Attributes of flow that includes this item.
9533  * @param[in] item
9534  *   Flow pattern to translate.
9535  */
9536 static void
9537 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9538                             void *matcher, void *key,
9539                             const struct rte_flow_attr *attr,
9540                             const struct rte_flow_item *item)
9541 {
9542         const struct rte_flow_item_meta *meta_m;
9543         const struct rte_flow_item_meta *meta_v;
9544
9545         meta_m = (const void *)item->mask;
9546         if (!meta_m)
9547                 meta_m = &rte_flow_item_meta_mask;
9548         meta_v = (const void *)item->spec;
9549         if (meta_v) {
9550                 int reg;
9551                 uint32_t value = meta_v->data;
9552                 uint32_t mask = meta_m->data;
9553
9554                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9555                 if (reg < 0)
9556                         return;
9557                 MLX5_ASSERT(reg != REG_NON);
9558                 if (reg == REG_C_0) {
9559                         struct mlx5_priv *priv = dev->data->dev_private;
9560                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9561                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9562
9563                         mask &= msk_c0;
9564                         mask <<= shl_c0;
9565                         value <<= shl_c0;
9566                 }
9567                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9568         }
9569 }
9570
9571 /**
9572  * Add vport metadata Reg C0 item to matcher
9573  *
9574  * @param[in, out] matcher
9575  *   Flow matcher.
9576  * @param[in, out] key
9577  *   Flow matcher value.
9578  * @param[in] reg
9579  *   Flow pattern to translate.
9580  */
9581 static void
9582 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9583                                   uint32_t value, uint32_t mask)
9584 {
9585         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9586 }
9587
9588 /**
9589  * Add tag item to matcher
9590  *
9591  * @param[in] dev
9592  *   The devich to configure through.
9593  * @param[in, out] matcher
9594  *   Flow matcher.
9595  * @param[in, out] key
9596  *   Flow matcher value.
9597  * @param[in] item
9598  *   Flow pattern to translate.
9599  */
9600 static void
9601 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9602                                 void *matcher, void *key,
9603                                 const struct rte_flow_item *item)
9604 {
9605         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9606         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9607         uint32_t mask, value;
9608
9609         MLX5_ASSERT(tag_v);
9610         value = tag_v->data;
9611         mask = tag_m ? tag_m->data : UINT32_MAX;
9612         if (tag_v->id == REG_C_0) {
9613                 struct mlx5_priv *priv = dev->data->dev_private;
9614                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9615                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9616
9617                 mask &= msk_c0;
9618                 mask <<= shl_c0;
9619                 value <<= shl_c0;
9620         }
9621         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9622 }
9623
9624 /**
9625  * Add TAG item to matcher
9626  *
9627  * @param[in] dev
9628  *   The devich to configure through.
9629  * @param[in, out] matcher
9630  *   Flow matcher.
9631  * @param[in, out] key
9632  *   Flow matcher value.
9633  * @param[in] item
9634  *   Flow pattern to translate.
9635  */
9636 static void
9637 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9638                            void *matcher, void *key,
9639                            const struct rte_flow_item *item)
9640 {
9641         const struct rte_flow_item_tag *tag_v = item->spec;
9642         const struct rte_flow_item_tag *tag_m = item->mask;
9643         enum modify_reg reg;
9644
9645         MLX5_ASSERT(tag_v);
9646         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9647         /* Get the metadata register index for the tag. */
9648         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9649         MLX5_ASSERT(reg > 0);
9650         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9651 }
9652
9653 /**
9654  * Add source vport match to the specified matcher.
9655  *
9656  * @param[in, out] matcher
9657  *   Flow matcher.
9658  * @param[in, out] key
9659  *   Flow matcher value.
9660  * @param[in] port
9661  *   Source vport value to match
9662  * @param[in] mask
9663  *   Mask
9664  */
9665 static void
9666 flow_dv_translate_item_source_vport(void *matcher, void *key,
9667                                     int16_t port, uint16_t mask)
9668 {
9669         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9670         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9671
9672         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9673         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9674 }
9675
9676 /**
9677  * Translate port-id item to eswitch match on  port-id.
9678  *
9679  * @param[in] dev
9680  *   The devich to configure through.
9681  * @param[in, out] matcher
9682  *   Flow matcher.
9683  * @param[in, out] key
9684  *   Flow matcher value.
9685  * @param[in] item
9686  *   Flow pattern to translate.
9687  * @param[in]
9688  *   Flow attributes.
9689  *
9690  * @return
9691  *   0 on success, a negative errno value otherwise.
9692  */
9693 static int
9694 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9695                                void *key, const struct rte_flow_item *item,
9696                                const struct rte_flow_attr *attr)
9697 {
9698         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9699         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9700         struct mlx5_priv *priv;
9701         uint16_t mask, id;
9702
9703         if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
9704                 flow_dv_translate_item_source_vport(matcher, key,
9705                         flow_dv_get_esw_manager_vport_id(dev), 0xffff);
9706                 return 0;
9707         }
9708         mask = pid_m ? pid_m->id : 0xffff;
9709         id = pid_v ? pid_v->id : dev->data->port_id;
9710         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9711         if (!priv)
9712                 return -rte_errno;
9713         /*
9714          * Translate to vport field or to metadata, depending on mode.
9715          * Kernel can use either misc.source_port or half of C0 metadata
9716          * register.
9717          */
9718         if (priv->vport_meta_mask) {
9719                 /*
9720                  * Provide the hint for SW steering library
9721                  * to insert the flow into ingress domain and
9722                  * save the extra vport match.
9723                  */
9724                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9725                     priv->pf_bond < 0 && attr->transfer)
9726                         flow_dv_translate_item_source_vport
9727                                 (matcher, key, priv->vport_id, mask);
9728                 /*
9729                  * We should always set the vport metadata register,
9730                  * otherwise the SW steering library can drop
9731                  * the rule if wire vport metadata value is not zero,
9732                  * it depends on kernel configuration.
9733                  */
9734                 flow_dv_translate_item_meta_vport(matcher, key,
9735                                                   priv->vport_meta_tag,
9736                                                   priv->vport_meta_mask);
9737         } else {
9738                 flow_dv_translate_item_source_vport(matcher, key,
9739                                                     priv->vport_id, mask);
9740         }
9741         return 0;
9742 }
9743
9744 /**
9745  * Add ICMP6 item to matcher and to the value.
9746  *
9747  * @param[in, out] matcher
9748  *   Flow matcher.
9749  * @param[in, out] key
9750  *   Flow matcher value.
9751  * @param[in] item
9752  *   Flow pattern to translate.
9753  * @param[in] inner
9754  *   Item is inner pattern.
9755  */
9756 static void
9757 flow_dv_translate_item_icmp6(void *matcher, void *key,
9758                               const struct rte_flow_item *item,
9759                               int inner)
9760 {
9761         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9762         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9763         void *headers_m;
9764         void *headers_v;
9765         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9766                                      misc_parameters_3);
9767         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9768         if (inner) {
9769                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9770                                          inner_headers);
9771                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9772         } else {
9773                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9774                                          outer_headers);
9775                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9776         }
9777         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9778         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9779         if (!icmp6_v)
9780                 return;
9781         if (!icmp6_m)
9782                 icmp6_m = &rte_flow_item_icmp6_mask;
9783         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9784         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9785                  icmp6_v->type & icmp6_m->type);
9786         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9787         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9788                  icmp6_v->code & icmp6_m->code);
9789 }
9790
9791 /**
9792  * Add ICMP item to matcher and to the value.
9793  *
9794  * @param[in, out] matcher
9795  *   Flow matcher.
9796  * @param[in, out] key
9797  *   Flow matcher value.
9798  * @param[in] item
9799  *   Flow pattern to translate.
9800  * @param[in] inner
9801  *   Item is inner pattern.
9802  */
9803 static void
9804 flow_dv_translate_item_icmp(void *matcher, void *key,
9805                             const struct rte_flow_item *item,
9806                             int inner)
9807 {
9808         const struct rte_flow_item_icmp *icmp_m = item->mask;
9809         const struct rte_flow_item_icmp *icmp_v = item->spec;
9810         uint32_t icmp_header_data_m = 0;
9811         uint32_t icmp_header_data_v = 0;
9812         void *headers_m;
9813         void *headers_v;
9814         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9815                                      misc_parameters_3);
9816         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9817         if (inner) {
9818                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9819                                          inner_headers);
9820                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9821         } else {
9822                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9823                                          outer_headers);
9824                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9825         }
9826         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9827         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9828         if (!icmp_v)
9829                 return;
9830         if (!icmp_m)
9831                 icmp_m = &rte_flow_item_icmp_mask;
9832         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9833                  icmp_m->hdr.icmp_type);
9834         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9835                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9836         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9837                  icmp_m->hdr.icmp_code);
9838         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9839                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9840         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9841         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9842         if (icmp_header_data_m) {
9843                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9844                 icmp_header_data_v |=
9845                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9846                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9847                          icmp_header_data_m);
9848                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9849                          icmp_header_data_v & icmp_header_data_m);
9850         }
9851 }
9852
9853 /**
9854  * Add GTP item to matcher and to the value.
9855  *
9856  * @param[in, out] matcher
9857  *   Flow matcher.
9858  * @param[in, out] key
9859  *   Flow matcher value.
9860  * @param[in] item
9861  *   Flow pattern to translate.
9862  * @param[in] inner
9863  *   Item is inner pattern.
9864  */
9865 static void
9866 flow_dv_translate_item_gtp(void *matcher, void *key,
9867                            const struct rte_flow_item *item, int inner)
9868 {
9869         const struct rte_flow_item_gtp *gtp_m = item->mask;
9870         const struct rte_flow_item_gtp *gtp_v = item->spec;
9871         void *headers_m;
9872         void *headers_v;
9873         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9874                                      misc_parameters_3);
9875         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9876         uint16_t dport = RTE_GTPU_UDP_PORT;
9877
9878         if (inner) {
9879                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9880                                          inner_headers);
9881                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9882         } else {
9883                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9884                                          outer_headers);
9885                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9886         }
9887         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9888                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9889                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9890         }
9891         if (!gtp_v)
9892                 return;
9893         if (!gtp_m)
9894                 gtp_m = &rte_flow_item_gtp_mask;
9895         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9896                  gtp_m->v_pt_rsv_flags);
9897         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9898                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9899         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9900         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9901                  gtp_v->msg_type & gtp_m->msg_type);
9902         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9903                  rte_be_to_cpu_32(gtp_m->teid));
9904         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9905                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9906 }
9907
9908 /**
9909  * Add GTP PSC item to matcher.
9910  *
9911  * @param[in, out] matcher
9912  *   Flow matcher.
9913  * @param[in, out] key
9914  *   Flow matcher value.
9915  * @param[in] item
9916  *   Flow pattern to translate.
9917  */
9918 static int
9919 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9920                                const struct rte_flow_item *item)
9921 {
9922         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9923         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9924         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9925                         misc_parameters_3);
9926         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9927         union {
9928                 uint32_t w32;
9929                 struct {
9930                         uint16_t seq_num;
9931                         uint8_t npdu_num;
9932                         uint8_t next_ext_header_type;
9933                 };
9934         } dw_2;
9935         uint8_t gtp_flags;
9936
9937         /* Always set E-flag match on one, regardless of GTP item settings. */
9938         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9939         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9940         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9941         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9942         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9943         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9944         /*Set next extension header type. */
9945         dw_2.seq_num = 0;
9946         dw_2.npdu_num = 0;
9947         dw_2.next_ext_header_type = 0xff;
9948         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9949                  rte_cpu_to_be_32(dw_2.w32));
9950         dw_2.seq_num = 0;
9951         dw_2.npdu_num = 0;
9952         dw_2.next_ext_header_type = 0x85;
9953         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9954                  rte_cpu_to_be_32(dw_2.w32));
9955         if (gtp_psc_v) {
9956                 union {
9957                         uint32_t w32;
9958                         struct {
9959                                 uint8_t len;
9960                                 uint8_t type_flags;
9961                                 uint8_t qfi;
9962                                 uint8_t reserved;
9963                         };
9964                 } dw_0;
9965
9966                 /*Set extension header PDU type and Qos. */
9967                 if (!gtp_psc_m)
9968                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9969                 dw_0.w32 = 0;
9970                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
9971                 dw_0.qfi = gtp_psc_m->hdr.qfi;
9972                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9973                          rte_cpu_to_be_32(dw_0.w32));
9974                 dw_0.w32 = 0;
9975                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
9976                                                         gtp_psc_m->hdr.type);
9977                 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
9978                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9979                          rte_cpu_to_be_32(dw_0.w32));
9980         }
9981         return 0;
9982 }
9983
9984 /**
9985  * Add eCPRI item to matcher and to the value.
9986  *
9987  * @param[in] dev
9988  *   The devich to configure through.
9989  * @param[in, out] matcher
9990  *   Flow matcher.
9991  * @param[in, out] key
9992  *   Flow matcher value.
9993  * @param[in] item
9994  *   Flow pattern to translate.
9995  * @param[in] last_item
9996  *   Last item flags.
9997  */
9998 static void
9999 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
10000                              void *key, const struct rte_flow_item *item,
10001                              uint64_t last_item)
10002 {
10003         struct mlx5_priv *priv = dev->data->dev_private;
10004         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
10005         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
10006         struct rte_ecpri_common_hdr common;
10007         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
10008                                      misc_parameters_4);
10009         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
10010         uint32_t *samples;
10011         void *dw_m;
10012         void *dw_v;
10013
10014         /*
10015          * In case of eCPRI over Ethernet, if EtherType is not specified,
10016          * match on eCPRI EtherType implicitly.
10017          */
10018         if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
10019                 void *hdrs_m, *hdrs_v, *l2m, *l2v;
10020
10021                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
10022                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10023                 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
10024                 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
10025                 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
10026                         *(uint16_t *)l2m = UINT16_MAX;
10027                         *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
10028                 }
10029         }
10030         if (!ecpri_v)
10031                 return;
10032         if (!ecpri_m)
10033                 ecpri_m = &rte_flow_item_ecpri_mask;
10034         /*
10035          * Maximal four DW samples are supported in a single matching now.
10036          * Two are used now for a eCPRI matching:
10037          * 1. Type: one byte, mask should be 0x00ff0000 in network order
10038          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
10039          *    if any.
10040          */
10041         if (!ecpri_m->hdr.common.u32)
10042                 return;
10043         samples = priv->sh->ecpri_parser.ids;
10044         /* Need to take the whole DW as the mask to fill the entry. */
10045         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10046                             prog_sample_field_value_0);
10047         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10048                             prog_sample_field_value_0);
10049         /* Already big endian (network order) in the header. */
10050         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10051         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10052         /* Sample#0, used for matching type, offset 0. */
10053         MLX5_SET(fte_match_set_misc4, misc4_m,
10054                  prog_sample_field_id_0, samples[0]);
10055         /* It makes no sense to set the sample ID in the mask field. */
10056         MLX5_SET(fte_match_set_misc4, misc4_v,
10057                  prog_sample_field_id_0, samples[0]);
10058         /*
10059          * Checking if message body part needs to be matched.
10060          * Some wildcard rules only matching type field should be supported.
10061          */
10062         if (ecpri_m->hdr.dummy[0]) {
10063                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10064                 switch (common.type) {
10065                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10066                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10067                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10068                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10069                                             prog_sample_field_value_1);
10070                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10071                                             prog_sample_field_value_1);
10072                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10073                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10074                                             ecpri_m->hdr.dummy[0];
10075                         /* Sample#1, to match message body, offset 4. */
10076                         MLX5_SET(fte_match_set_misc4, misc4_m,
10077                                  prog_sample_field_id_1, samples[1]);
10078                         MLX5_SET(fte_match_set_misc4, misc4_v,
10079                                  prog_sample_field_id_1, samples[1]);
10080                         break;
10081                 default:
10082                         /* Others, do not match any sample ID. */
10083                         break;
10084                 }
10085         }
10086 }
10087
10088 /*
10089  * Add connection tracking status item to matcher
10090  *
10091  * @param[in] dev
10092  *   The devich to configure through.
10093  * @param[in, out] matcher
10094  *   Flow matcher.
10095  * @param[in, out] key
10096  *   Flow matcher value.
10097  * @param[in] item
10098  *   Flow pattern to translate.
10099  */
10100 static void
10101 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10102                               void *matcher, void *key,
10103                               const struct rte_flow_item *item)
10104 {
10105         uint32_t reg_value = 0;
10106         int reg_id;
10107         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10108         uint32_t reg_mask = 0;
10109         const struct rte_flow_item_conntrack *spec = item->spec;
10110         const struct rte_flow_item_conntrack *mask = item->mask;
10111         uint32_t flags;
10112         struct rte_flow_error error;
10113
10114         if (!mask)
10115                 mask = &rte_flow_item_conntrack_mask;
10116         if (!spec || !mask->flags)
10117                 return;
10118         flags = spec->flags & mask->flags;
10119         /* The conflict should be checked in the validation. */
10120         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10121                 reg_value |= MLX5_CT_SYNDROME_VALID;
10122         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10123                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10124         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10125                 reg_value |= MLX5_CT_SYNDROME_INVALID;
10126         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10127                 reg_value |= MLX5_CT_SYNDROME_TRAP;
10128         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10129                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10130         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10131                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10132                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10133                 reg_mask |= 0xc0;
10134         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10135                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10136         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10137                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10138         /* The REG_C_x value could be saved during startup. */
10139         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10140         if (reg_id == REG_NON)
10141                 return;
10142         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10143                                reg_value, reg_mask);
10144 }
10145
10146 static void
10147 flow_dv_translate_item_flex(struct rte_eth_dev *dev, void *matcher, void *key,
10148                             const struct rte_flow_item *item,
10149                             struct mlx5_flow *dev_flow, bool is_inner)
10150 {
10151         const struct rte_flow_item_flex *spec =
10152                 (const struct rte_flow_item_flex *)item->spec;
10153         int index = mlx5_flex_acquire_index(dev, spec->handle, false);
10154
10155         MLX5_ASSERT(index >= 0 && index <= (int)(sizeof(uint32_t) * CHAR_BIT));
10156         if (index < 0)
10157                 return;
10158         if (!(dev_flow->handle->flex_item & RTE_BIT32(index))) {
10159                 /* Don't count both inner and outer flex items in one rule. */
10160                 if (mlx5_flex_acquire_index(dev, spec->handle, true) != index)
10161                         MLX5_ASSERT(false);
10162                 dev_flow->handle->flex_item |= RTE_BIT32(index);
10163         }
10164         mlx5_flex_flow_translate_item(dev, matcher, key, item, is_inner);
10165 }
10166
10167 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10168
10169 #define HEADER_IS_ZERO(match_criteria, headers)                              \
10170         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
10171                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10172
10173 /**
10174  * Calculate flow matcher enable bitmap.
10175  *
10176  * @param match_criteria
10177  *   Pointer to flow matcher criteria.
10178  *
10179  * @return
10180  *   Bitmap of enabled fields.
10181  */
10182 static uint8_t
10183 flow_dv_matcher_enable(uint32_t *match_criteria)
10184 {
10185         uint8_t match_criteria_enable;
10186
10187         match_criteria_enable =
10188                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10189                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10190         match_criteria_enable |=
10191                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10192                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10193         match_criteria_enable |=
10194                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10195                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10196         match_criteria_enable |=
10197                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10198                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10199         match_criteria_enable |=
10200                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10201                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10202         match_criteria_enable |=
10203                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10204                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10205         match_criteria_enable |=
10206                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10207                 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10208         return match_criteria_enable;
10209 }
10210
10211 static void
10212 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10213 {
10214         /*
10215          * Check flow matching criteria first, subtract misc5/4 length if flow
10216          * doesn't own misc5/4 parameters. In some old rdma-core releases,
10217          * misc5/4 are not supported, and matcher creation failure is expected
10218          * w/o subtration. If misc5 is provided, misc4 must be counted in since
10219          * misc5 is right after misc4.
10220          */
10221         if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10222                 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10223                         MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10224                 if (!(match_criteria & (1 <<
10225                         MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10226                         *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10227                 }
10228         }
10229 }
10230
10231 static struct mlx5_list_entry *
10232 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10233                          struct mlx5_list_entry *entry, void *cb_ctx)
10234 {
10235         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10236         struct mlx5_flow_dv_matcher *ref = ctx->data;
10237         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10238                                                             typeof(*tbl), tbl);
10239         struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10240                                                             sizeof(*resource),
10241                                                             0, SOCKET_ID_ANY);
10242
10243         if (!resource) {
10244                 rte_flow_error_set(ctx->error, ENOMEM,
10245                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10246                                    "cannot create matcher");
10247                 return NULL;
10248         }
10249         memcpy(resource, entry, sizeof(*resource));
10250         resource->tbl = &tbl->tbl;
10251         return &resource->entry;
10252 }
10253
10254 static void
10255 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10256                              struct mlx5_list_entry *entry)
10257 {
10258         mlx5_free(entry);
10259 }
10260
10261 struct mlx5_list_entry *
10262 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10263 {
10264         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10265         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10266         struct rte_eth_dev *dev = ctx->dev;
10267         struct mlx5_flow_tbl_data_entry *tbl_data;
10268         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10269         struct rte_flow_error *error = ctx->error;
10270         union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10271         struct mlx5_flow_tbl_resource *tbl;
10272         void *domain;
10273         uint32_t idx = 0;
10274         int ret;
10275
10276         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10277         if (!tbl_data) {
10278                 rte_flow_error_set(error, ENOMEM,
10279                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10280                                    NULL,
10281                                    "cannot allocate flow table data entry");
10282                 return NULL;
10283         }
10284         tbl_data->idx = idx;
10285         tbl_data->tunnel = tt_prm->tunnel;
10286         tbl_data->group_id = tt_prm->group_id;
10287         tbl_data->external = !!tt_prm->external;
10288         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10289         tbl_data->is_egress = !!key.is_egress;
10290         tbl_data->is_transfer = !!key.is_fdb;
10291         tbl_data->dummy = !!key.dummy;
10292         tbl_data->level = key.level;
10293         tbl_data->id = key.id;
10294         tbl = &tbl_data->tbl;
10295         if (key.dummy)
10296                 return &tbl_data->entry;
10297         if (key.is_fdb)
10298                 domain = sh->fdb_domain;
10299         else if (key.is_egress)
10300                 domain = sh->tx_domain;
10301         else
10302                 domain = sh->rx_domain;
10303         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10304         if (ret) {
10305                 rte_flow_error_set(error, ENOMEM,
10306                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10307                                    NULL, "cannot create flow table object");
10308                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10309                 return NULL;
10310         }
10311         if (key.level != 0) {
10312                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10313                                         (tbl->obj, &tbl_data->jump.action);
10314                 if (ret) {
10315                         rte_flow_error_set(error, ENOMEM,
10316                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10317                                            NULL,
10318                                            "cannot create flow jump action");
10319                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10320                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10321                         return NULL;
10322                 }
10323         }
10324         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10325               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10326               key.level, key.id);
10327         tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10328                                               flow_dv_matcher_create_cb,
10329                                               flow_dv_matcher_match_cb,
10330                                               flow_dv_matcher_remove_cb,
10331                                               flow_dv_matcher_clone_cb,
10332                                               flow_dv_matcher_clone_free_cb);
10333         if (!tbl_data->matchers) {
10334                 rte_flow_error_set(error, ENOMEM,
10335                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10336                                    NULL,
10337                                    "cannot create tbl matcher list");
10338                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10339                 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10340                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10341                 return NULL;
10342         }
10343         return &tbl_data->entry;
10344 }
10345
10346 int
10347 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10348                      void *cb_ctx)
10349 {
10350         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10351         struct mlx5_flow_tbl_data_entry *tbl_data =
10352                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10353         union mlx5_flow_tbl_key key = { .v64 =  *(uint64_t *)(ctx->data) };
10354
10355         return tbl_data->level != key.level ||
10356                tbl_data->id != key.id ||
10357                tbl_data->dummy != key.dummy ||
10358                tbl_data->is_transfer != !!key.is_fdb ||
10359                tbl_data->is_egress != !!key.is_egress;
10360 }
10361
10362 struct mlx5_list_entry *
10363 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10364                       void *cb_ctx)
10365 {
10366         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10367         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10368         struct mlx5_flow_tbl_data_entry *tbl_data;
10369         struct rte_flow_error *error = ctx->error;
10370         uint32_t idx = 0;
10371
10372         tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10373         if (!tbl_data) {
10374                 rte_flow_error_set(error, ENOMEM,
10375                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10376                                    NULL,
10377                                    "cannot allocate flow table data entry");
10378                 return NULL;
10379         }
10380         memcpy(tbl_data, oentry, sizeof(*tbl_data));
10381         tbl_data->idx = idx;
10382         return &tbl_data->entry;
10383 }
10384
10385 void
10386 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10387 {
10388         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10389         struct mlx5_flow_tbl_data_entry *tbl_data =
10390                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10391
10392         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10393 }
10394
10395 /**
10396  * Get a flow table.
10397  *
10398  * @param[in, out] dev
10399  *   Pointer to rte_eth_dev structure.
10400  * @param[in] table_level
10401  *   Table level to use.
10402  * @param[in] egress
10403  *   Direction of the table.
10404  * @param[in] transfer
10405  *   E-Switch or NIC flow.
10406  * @param[in] dummy
10407  *   Dummy entry for dv API.
10408  * @param[in] table_id
10409  *   Table id to use.
10410  * @param[out] error
10411  *   pointer to error structure.
10412  *
10413  * @return
10414  *   Returns tables resource based on the index, NULL in case of failed.
10415  */
10416 struct mlx5_flow_tbl_resource *
10417 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10418                          uint32_t table_level, uint8_t egress,
10419                          uint8_t transfer,
10420                          bool external,
10421                          const struct mlx5_flow_tunnel *tunnel,
10422                          uint32_t group_id, uint8_t dummy,
10423                          uint32_t table_id,
10424                          struct rte_flow_error *error)
10425 {
10426         struct mlx5_priv *priv = dev->data->dev_private;
10427         union mlx5_flow_tbl_key table_key = {
10428                 {
10429                         .level = table_level,
10430                         .id = table_id,
10431                         .reserved = 0,
10432                         .dummy = !!dummy,
10433                         .is_fdb = !!transfer,
10434                         .is_egress = !!egress,
10435                 }
10436         };
10437         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10438                 .tunnel = tunnel,
10439                 .group_id = group_id,
10440                 .external = external,
10441         };
10442         struct mlx5_flow_cb_ctx ctx = {
10443                 .dev = dev,
10444                 .error = error,
10445                 .data = &table_key.v64,
10446                 .data2 = &tt_prm,
10447         };
10448         struct mlx5_list_entry *entry;
10449         struct mlx5_flow_tbl_data_entry *tbl_data;
10450
10451         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10452         if (!entry) {
10453                 rte_flow_error_set(error, ENOMEM,
10454                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10455                                    "cannot get table");
10456                 return NULL;
10457         }
10458         DRV_LOG(DEBUG, "table_level %u table_id %u "
10459                 "tunnel %u group %u registered.",
10460                 table_level, table_id,
10461                 tunnel ? tunnel->tunnel_id : 0, group_id);
10462         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10463         return &tbl_data->tbl;
10464 }
10465
10466 void
10467 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10468 {
10469         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10470         struct mlx5_flow_tbl_data_entry *tbl_data =
10471                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10472
10473         MLX5_ASSERT(entry && sh);
10474         if (tbl_data->jump.action)
10475                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10476         if (tbl_data->tbl.obj)
10477                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10478         if (tbl_data->tunnel_offload && tbl_data->external) {
10479                 struct mlx5_list_entry *he;
10480                 struct mlx5_hlist *tunnel_grp_hash;
10481                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10482                 union tunnel_tbl_key tunnel_key = {
10483                         .tunnel_id = tbl_data->tunnel ?
10484                                         tbl_data->tunnel->tunnel_id : 0,
10485                         .group = tbl_data->group_id
10486                 };
10487                 uint32_t table_level = tbl_data->level;
10488                 struct mlx5_flow_cb_ctx ctx = {
10489                         .data = (void *)&tunnel_key.val,
10490                 };
10491
10492                 tunnel_grp_hash = tbl_data->tunnel ?
10493                                         tbl_data->tunnel->groups :
10494                                         thub->groups;
10495                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10496                 if (he)
10497                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10498                 DRV_LOG(DEBUG,
10499                         "table_level %u id %u tunnel %u group %u released.",
10500                         table_level,
10501                         tbl_data->id,
10502                         tbl_data->tunnel ?
10503                         tbl_data->tunnel->tunnel_id : 0,
10504                         tbl_data->group_id);
10505         }
10506         mlx5_list_destroy(tbl_data->matchers);
10507         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10508 }
10509
10510 /**
10511  * Release a flow table.
10512  *
10513  * @param[in] sh
10514  *   Pointer to device shared structure.
10515  * @param[in] tbl
10516  *   Table resource to be released.
10517  *
10518  * @return
10519  *   Returns 0 if table was released, else return 1;
10520  */
10521 static int
10522 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10523                              struct mlx5_flow_tbl_resource *tbl)
10524 {
10525         struct mlx5_flow_tbl_data_entry *tbl_data =
10526                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10527
10528         if (!tbl)
10529                 return 0;
10530         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10531 }
10532
10533 int
10534 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10535                          struct mlx5_list_entry *entry, void *cb_ctx)
10536 {
10537         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10538         struct mlx5_flow_dv_matcher *ref = ctx->data;
10539         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10540                                                         entry);
10541
10542         return cur->crc != ref->crc ||
10543                cur->priority != ref->priority ||
10544                memcmp((const void *)cur->mask.buf,
10545                       (const void *)ref->mask.buf, ref->mask.size);
10546 }
10547
10548 struct mlx5_list_entry *
10549 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10550 {
10551         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10552         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10553         struct mlx5_flow_dv_matcher *ref = ctx->data;
10554         struct mlx5_flow_dv_matcher *resource;
10555         struct mlx5dv_flow_matcher_attr dv_attr = {
10556                 .type = IBV_FLOW_ATTR_NORMAL,
10557                 .match_mask = (void *)&ref->mask,
10558         };
10559         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10560                                                             typeof(*tbl), tbl);
10561         int ret;
10562
10563         resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10564                                SOCKET_ID_ANY);
10565         if (!resource) {
10566                 rte_flow_error_set(ctx->error, ENOMEM,
10567                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10568                                    "cannot create matcher");
10569                 return NULL;
10570         }
10571         *resource = *ref;
10572         dv_attr.match_criteria_enable =
10573                 flow_dv_matcher_enable(resource->mask.buf);
10574         __flow_dv_adjust_buf_size(&ref->mask.size,
10575                                   dv_attr.match_criteria_enable);
10576         dv_attr.priority = ref->priority;
10577         if (tbl->is_egress)
10578                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10579         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10580                                                tbl->tbl.obj,
10581                                                &resource->matcher_object);
10582         if (ret) {
10583                 mlx5_free(resource);
10584                 rte_flow_error_set(ctx->error, ENOMEM,
10585                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10586                                    "cannot create matcher");
10587                 return NULL;
10588         }
10589         return &resource->entry;
10590 }
10591
10592 /**
10593  * Register the flow matcher.
10594  *
10595  * @param[in, out] dev
10596  *   Pointer to rte_eth_dev structure.
10597  * @param[in, out] matcher
10598  *   Pointer to flow matcher.
10599  * @param[in, out] key
10600  *   Pointer to flow table key.
10601  * @parm[in, out] dev_flow
10602  *   Pointer to the dev_flow.
10603  * @param[out] error
10604  *   pointer to error structure.
10605  *
10606  * @return
10607  *   0 on success otherwise -errno and errno is set.
10608  */
10609 static int
10610 flow_dv_matcher_register(struct rte_eth_dev *dev,
10611                          struct mlx5_flow_dv_matcher *ref,
10612                          union mlx5_flow_tbl_key *key,
10613                          struct mlx5_flow *dev_flow,
10614                          const struct mlx5_flow_tunnel *tunnel,
10615                          uint32_t group_id,
10616                          struct rte_flow_error *error)
10617 {
10618         struct mlx5_list_entry *entry;
10619         struct mlx5_flow_dv_matcher *resource;
10620         struct mlx5_flow_tbl_resource *tbl;
10621         struct mlx5_flow_tbl_data_entry *tbl_data;
10622         struct mlx5_flow_cb_ctx ctx = {
10623                 .error = error,
10624                 .data = ref,
10625         };
10626         /**
10627          * tunnel offload API requires this registration for cases when
10628          * tunnel match rule was inserted before tunnel set rule.
10629          */
10630         tbl = flow_dv_tbl_resource_get(dev, key->level,
10631                                        key->is_egress, key->is_fdb,
10632                                        dev_flow->external, tunnel,
10633                                        group_id, 0, key->id, error);
10634         if (!tbl)
10635                 return -rte_errno;      /* No need to refill the error info */
10636         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10637         ref->tbl = tbl;
10638         entry = mlx5_list_register(tbl_data->matchers, &ctx);
10639         if (!entry) {
10640                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10641                 return rte_flow_error_set(error, ENOMEM,
10642                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10643                                           "cannot allocate ref memory");
10644         }
10645         resource = container_of(entry, typeof(*resource), entry);
10646         dev_flow->handle->dvh.matcher = resource;
10647         return 0;
10648 }
10649
10650 struct mlx5_list_entry *
10651 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10652 {
10653         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10654         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10655         struct mlx5_flow_dv_tag_resource *entry;
10656         uint32_t idx = 0;
10657         int ret;
10658
10659         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10660         if (!entry) {
10661                 rte_flow_error_set(ctx->error, ENOMEM,
10662                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10663                                    "cannot allocate resource memory");
10664                 return NULL;
10665         }
10666         entry->idx = idx;
10667         entry->tag_id = *(uint32_t *)(ctx->data);
10668         ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10669                                                   &entry->action);
10670         if (ret) {
10671                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10672                 rte_flow_error_set(ctx->error, ENOMEM,
10673                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10674                                    NULL, "cannot create action");
10675                 return NULL;
10676         }
10677         return &entry->entry;
10678 }
10679
10680 int
10681 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10682                      void *cb_ctx)
10683 {
10684         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10685         struct mlx5_flow_dv_tag_resource *tag =
10686                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10687
10688         return *(uint32_t *)(ctx->data) != tag->tag_id;
10689 }
10690
10691 struct mlx5_list_entry *
10692 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10693                      void *cb_ctx)
10694 {
10695         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10696         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10697         struct mlx5_flow_dv_tag_resource *entry;
10698         uint32_t idx = 0;
10699
10700         entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10701         if (!entry) {
10702                 rte_flow_error_set(ctx->error, ENOMEM,
10703                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10704                                    "cannot allocate tag resource memory");
10705                 return NULL;
10706         }
10707         memcpy(entry, oentry, sizeof(*entry));
10708         entry->idx = idx;
10709         return &entry->entry;
10710 }
10711
10712 void
10713 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10714 {
10715         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10716         struct mlx5_flow_dv_tag_resource *tag =
10717                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10718
10719         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10720 }
10721
10722 /**
10723  * Find existing tag resource or create and register a new one.
10724  *
10725  * @param dev[in, out]
10726  *   Pointer to rte_eth_dev structure.
10727  * @param[in, out] tag_be24
10728  *   Tag value in big endian then R-shift 8.
10729  * @parm[in, out] dev_flow
10730  *   Pointer to the dev_flow.
10731  * @param[out] error
10732  *   pointer to error structure.
10733  *
10734  * @return
10735  *   0 on success otherwise -errno and errno is set.
10736  */
10737 static int
10738 flow_dv_tag_resource_register
10739                         (struct rte_eth_dev *dev,
10740                          uint32_t tag_be24,
10741                          struct mlx5_flow *dev_flow,
10742                          struct rte_flow_error *error)
10743 {
10744         struct mlx5_priv *priv = dev->data->dev_private;
10745         struct mlx5_flow_dv_tag_resource *resource;
10746         struct mlx5_list_entry *entry;
10747         struct mlx5_flow_cb_ctx ctx = {
10748                                         .error = error,
10749                                         .data = &tag_be24,
10750                                         };
10751         struct mlx5_hlist *tag_table;
10752
10753         tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10754                                       "tags",
10755                                       MLX5_TAGS_HLIST_ARRAY_SIZE,
10756                                       false, false, priv->sh,
10757                                       flow_dv_tag_create_cb,
10758                                       flow_dv_tag_match_cb,
10759                                       flow_dv_tag_remove_cb,
10760                                       flow_dv_tag_clone_cb,
10761                                       flow_dv_tag_clone_free_cb);
10762         if (unlikely(!tag_table))
10763                 return -rte_errno;
10764         entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10765         if (entry) {
10766                 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10767                                         entry);
10768                 dev_flow->handle->dvh.rix_tag = resource->idx;
10769                 dev_flow->dv.tag_resource = resource;
10770                 return 0;
10771         }
10772         return -rte_errno;
10773 }
10774
10775 void
10776 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10777 {
10778         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10779         struct mlx5_flow_dv_tag_resource *tag =
10780                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10781
10782         MLX5_ASSERT(tag && sh && tag->action);
10783         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10784         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10785         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10786 }
10787
10788 /**
10789  * Release the tag.
10790  *
10791  * @param dev
10792  *   Pointer to Ethernet device.
10793  * @param tag_idx
10794  *   Tag index.
10795  *
10796  * @return
10797  *   1 while a reference on it exists, 0 when freed.
10798  */
10799 static int
10800 flow_dv_tag_release(struct rte_eth_dev *dev,
10801                     uint32_t tag_idx)
10802 {
10803         struct mlx5_priv *priv = dev->data->dev_private;
10804         struct mlx5_flow_dv_tag_resource *tag;
10805
10806         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10807         if (!tag)
10808                 return 0;
10809         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10810                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10811         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10812 }
10813
10814 /**
10815  * Translate action PORT_ID / REPRESENTED_PORT to vport.
10816  *
10817  * @param[in] dev
10818  *   Pointer to rte_eth_dev structure.
10819  * @param[in] action
10820  *   Pointer to action PORT_ID / REPRESENTED_PORT.
10821  * @param[out] dst_port_id
10822  *   The target port ID.
10823  * @param[out] error
10824  *   Pointer to the error structure.
10825  *
10826  * @return
10827  *   0 on success, a negative errno value otherwise and rte_errno is set.
10828  */
10829 static int
10830 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10831                                  const struct rte_flow_action *action,
10832                                  uint32_t *dst_port_id,
10833                                  struct rte_flow_error *error)
10834 {
10835         uint32_t port;
10836         struct mlx5_priv *priv;
10837
10838         switch (action->type) {
10839         case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10840                 const struct rte_flow_action_port_id *conf;
10841
10842                 conf = (const struct rte_flow_action_port_id *)action->conf;
10843                 port = conf->original ? dev->data->port_id : conf->id;
10844                 break;
10845         }
10846         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10847                 const struct rte_flow_action_ethdev *ethdev;
10848
10849                 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10850                 port = ethdev->port_id;
10851                 break;
10852         }
10853         default:
10854                 MLX5_ASSERT(false);
10855                 return rte_flow_error_set(error, EINVAL,
10856                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
10857                                           "unknown E-Switch action");
10858         }
10859
10860         priv = mlx5_port_to_eswitch_info(port, false);
10861         if (!priv)
10862                 return rte_flow_error_set(error, -rte_errno,
10863                                           RTE_FLOW_ERROR_TYPE_ACTION,
10864                                           NULL,
10865                                           "No eswitch info was found for port");
10866 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10867         /*
10868          * This parameter is transferred to
10869          * mlx5dv_dr_action_create_dest_ib_port().
10870          */
10871         *dst_port_id = priv->dev_port;
10872 #else
10873         /*
10874          * Legacy mode, no LAG configurations is supported.
10875          * This parameter is transferred to
10876          * mlx5dv_dr_action_create_dest_vport().
10877          */
10878         *dst_port_id = priv->vport_id;
10879 #endif
10880         return 0;
10881 }
10882
10883 /**
10884  * Create a counter with aging configuration.
10885  *
10886  * @param[in] dev
10887  *   Pointer to rte_eth_dev structure.
10888  * @param[in] dev_flow
10889  *   Pointer to the mlx5_flow.
10890  * @param[out] count
10891  *   Pointer to the counter action configuration.
10892  * @param[in] age
10893  *   Pointer to the aging action configuration.
10894  *
10895  * @return
10896  *   Index to flow counter on success, 0 otherwise.
10897  */
10898 static uint32_t
10899 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10900                                 struct mlx5_flow *dev_flow,
10901                                 const struct rte_flow_action_count *count
10902                                         __rte_unused,
10903                                 const struct rte_flow_action_age *age)
10904 {
10905         uint32_t counter;
10906         struct mlx5_age_param *age_param;
10907
10908         counter = flow_dv_counter_alloc(dev, !!age);
10909         if (!counter || age == NULL)
10910                 return counter;
10911         age_param = flow_dv_counter_idx_get_age(dev, counter);
10912         age_param->context = age->context ? age->context :
10913                 (void *)(uintptr_t)(dev_flow->flow_idx);
10914         age_param->timeout = age->timeout;
10915         age_param->port_id = dev->data->port_id;
10916         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10917         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10918         return counter;
10919 }
10920
10921 /**
10922  * Add Tx queue matcher
10923  *
10924  * @param[in] dev
10925  *   Pointer to the dev struct.
10926  * @param[in, out] matcher
10927  *   Flow matcher.
10928  * @param[in, out] key
10929  *   Flow matcher value.
10930  * @param[in] item
10931  *   Flow pattern to translate.
10932  * @param[in] inner
10933  *   Item is inner pattern.
10934  */
10935 static void
10936 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10937                                 void *matcher, void *key,
10938                                 const struct rte_flow_item *item)
10939 {
10940         const struct mlx5_rte_flow_item_tx_queue *queue_m;
10941         const struct mlx5_rte_flow_item_tx_queue *queue_v;
10942         void *misc_m =
10943                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10944         void *misc_v =
10945                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10946         struct mlx5_txq_ctrl *txq;
10947         uint32_t queue, mask;
10948
10949         queue_m = (const void *)item->mask;
10950         queue_v = (const void *)item->spec;
10951         if (!queue_v)
10952                 return;
10953         txq = mlx5_txq_get(dev, queue_v->queue);
10954         if (!txq)
10955                 return;
10956         if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
10957                 queue = txq->obj->sq->id;
10958         else
10959                 queue = txq->obj->sq_obj.sq->id;
10960         mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
10961         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
10962         MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
10963         mlx5_txq_release(dev, queue_v->queue);
10964 }
10965
10966 /**
10967  * Set the hash fields according to the @p flow information.
10968  *
10969  * @param[in] dev_flow
10970  *   Pointer to the mlx5_flow.
10971  * @param[in] rss_desc
10972  *   Pointer to the mlx5_flow_rss_desc.
10973  */
10974 static void
10975 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10976                        struct mlx5_flow_rss_desc *rss_desc)
10977 {
10978         uint64_t items = dev_flow->handle->layers;
10979         int rss_inner = 0;
10980         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10981
10982         dev_flow->hash_fields = 0;
10983 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10984         if (rss_desc->level >= 2)
10985                 rss_inner = 1;
10986 #endif
10987         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10988             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10989                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10990                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
10991                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10992                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
10993                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10994                         else
10995                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10996                 }
10997         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10998                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10999                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
11000                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
11001                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
11002                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11003                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
11004                         else
11005                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
11006                 }
11007         }
11008         if (dev_flow->hash_fields == 0)
11009                 /*
11010                  * There is no match between the RSS types and the
11011                  * L3 protocol (IPv4/IPv6) defined in the flow rule.
11012                  */
11013                 return;
11014         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
11015             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
11016                 if (rss_types & RTE_ETH_RSS_UDP) {
11017                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11018                                 dev_flow->hash_fields |=
11019                                                 IBV_RX_HASH_SRC_PORT_UDP;
11020                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11021                                 dev_flow->hash_fields |=
11022                                                 IBV_RX_HASH_DST_PORT_UDP;
11023                         else
11024                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
11025                 }
11026         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
11027                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
11028                 if (rss_types & RTE_ETH_RSS_TCP) {
11029                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11030                                 dev_flow->hash_fields |=
11031                                                 IBV_RX_HASH_SRC_PORT_TCP;
11032                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11033                                 dev_flow->hash_fields |=
11034                                                 IBV_RX_HASH_DST_PORT_TCP;
11035                         else
11036                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
11037                 }
11038         }
11039         if (rss_inner)
11040                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
11041 }
11042
11043 /**
11044  * Prepare an Rx Hash queue.
11045  *
11046  * @param dev
11047  *   Pointer to Ethernet device.
11048  * @param[in] dev_flow
11049  *   Pointer to the mlx5_flow.
11050  * @param[in] rss_desc
11051  *   Pointer to the mlx5_flow_rss_desc.
11052  * @param[out] hrxq_idx
11053  *   Hash Rx queue index.
11054  *
11055  * @return
11056  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
11057  */
11058 static struct mlx5_hrxq *
11059 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
11060                      struct mlx5_flow *dev_flow,
11061                      struct mlx5_flow_rss_desc *rss_desc,
11062                      uint32_t *hrxq_idx)
11063 {
11064         struct mlx5_priv *priv = dev->data->dev_private;
11065         struct mlx5_flow_handle *dh = dev_flow->handle;
11066         struct mlx5_hrxq *hrxq;
11067
11068         MLX5_ASSERT(rss_desc->queue_num);
11069         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
11070         rss_desc->hash_fields = dev_flow->hash_fields;
11071         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
11072         rss_desc->shared_rss = 0;
11073         if (rss_desc->hash_fields == 0)
11074                 rss_desc->queue_num = 1;
11075         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
11076         if (!*hrxq_idx)
11077                 return NULL;
11078         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
11079                               *hrxq_idx);
11080         return hrxq;
11081 }
11082
11083 /**
11084  * Release sample sub action resource.
11085  *
11086  * @param[in, out] dev
11087  *   Pointer to rte_eth_dev structure.
11088  * @param[in] act_res
11089  *   Pointer to sample sub action resource.
11090  */
11091 static void
11092 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11093                                    struct mlx5_flow_sub_actions_idx *act_res)
11094 {
11095         if (act_res->rix_hrxq) {
11096                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11097                 act_res->rix_hrxq = 0;
11098         }
11099         if (act_res->rix_encap_decap) {
11100                 flow_dv_encap_decap_resource_release(dev,
11101                                                      act_res->rix_encap_decap);
11102                 act_res->rix_encap_decap = 0;
11103         }
11104         if (act_res->rix_port_id_action) {
11105                 flow_dv_port_id_action_resource_release(dev,
11106                                                 act_res->rix_port_id_action);
11107                 act_res->rix_port_id_action = 0;
11108         }
11109         if (act_res->rix_tag) {
11110                 flow_dv_tag_release(dev, act_res->rix_tag);
11111                 act_res->rix_tag = 0;
11112         }
11113         if (act_res->rix_jump) {
11114                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11115                 act_res->rix_jump = 0;
11116         }
11117 }
11118
11119 int
11120 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11121                         struct mlx5_list_entry *entry, void *cb_ctx)
11122 {
11123         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11124         struct rte_eth_dev *dev = ctx->dev;
11125         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11126         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11127                                                               typeof(*resource),
11128                                                               entry);
11129
11130         if (ctx_resource->ratio == resource->ratio &&
11131             ctx_resource->ft_type == resource->ft_type &&
11132             ctx_resource->ft_id == resource->ft_id &&
11133             ctx_resource->set_action == resource->set_action &&
11134             !memcmp((void *)&ctx_resource->sample_act,
11135                     (void *)&resource->sample_act,
11136                     sizeof(struct mlx5_flow_sub_actions_list))) {
11137                 /*
11138                  * Existing sample action should release the prepared
11139                  * sub-actions reference counter.
11140                  */
11141                 flow_dv_sample_sub_actions_release(dev,
11142                                                    &ctx_resource->sample_idx);
11143                 return 0;
11144         }
11145         return 1;
11146 }
11147
11148 struct mlx5_list_entry *
11149 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11150 {
11151         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11152         struct rte_eth_dev *dev = ctx->dev;
11153         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11154         void **sample_dv_actions = ctx_resource->sub_actions;
11155         struct mlx5_flow_dv_sample_resource *resource;
11156         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11157         struct mlx5_priv *priv = dev->data->dev_private;
11158         struct mlx5_dev_ctx_shared *sh = priv->sh;
11159         struct mlx5_flow_tbl_resource *tbl;
11160         uint32_t idx = 0;
11161         const uint32_t next_ft_step = 1;
11162         uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11163         uint8_t is_egress = 0;
11164         uint8_t is_transfer = 0;
11165         struct rte_flow_error *error = ctx->error;
11166
11167         /* Register new sample resource. */
11168         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11169         if (!resource) {
11170                 rte_flow_error_set(error, ENOMEM,
11171                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11172                                           NULL,
11173                                           "cannot allocate resource memory");
11174                 return NULL;
11175         }
11176         *resource = *ctx_resource;
11177         /* Create normal path table level */
11178         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11179                 is_transfer = 1;
11180         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11181                 is_egress = 1;
11182         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11183                                         is_egress, is_transfer,
11184                                         true, NULL, 0, 0, 0, error);
11185         if (!tbl) {
11186                 rte_flow_error_set(error, ENOMEM,
11187                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11188                                           NULL,
11189                                           "fail to create normal path table "
11190                                           "for sample");
11191                 goto error;
11192         }
11193         resource->normal_path_tbl = tbl;
11194         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11195                 if (!sh->default_miss_action) {
11196                         rte_flow_error_set(error, ENOMEM,
11197                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11198                                                 NULL,
11199                                                 "default miss action was not "
11200                                                 "created");
11201                         goto error;
11202                 }
11203                 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11204                                                 sh->default_miss_action;
11205         }
11206         /* Create a DR sample action */
11207         sampler_attr.sample_ratio = resource->ratio;
11208         sampler_attr.default_next_table = tbl->obj;
11209         sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11210         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11211                                                         &sample_dv_actions[0];
11212         sampler_attr.action = resource->set_action;
11213         if (mlx5_os_flow_dr_create_flow_action_sampler
11214                         (&sampler_attr, &resource->verbs_action)) {
11215                 rte_flow_error_set(error, ENOMEM,
11216                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11217                                         NULL, "cannot create sample action");
11218                 goto error;
11219         }
11220         resource->idx = idx;
11221         resource->dev = dev;
11222         return &resource->entry;
11223 error:
11224         if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11225                 flow_dv_sample_sub_actions_release(dev,
11226                                                    &resource->sample_idx);
11227         if (resource->normal_path_tbl)
11228                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11229                                 resource->normal_path_tbl);
11230         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11231         return NULL;
11232
11233 }
11234
11235 struct mlx5_list_entry *
11236 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11237                          struct mlx5_list_entry *entry __rte_unused,
11238                          void *cb_ctx)
11239 {
11240         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11241         struct rte_eth_dev *dev = ctx->dev;
11242         struct mlx5_flow_dv_sample_resource *resource;
11243         struct mlx5_priv *priv = dev->data->dev_private;
11244         struct mlx5_dev_ctx_shared *sh = priv->sh;
11245         uint32_t idx = 0;
11246
11247         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11248         if (!resource) {
11249                 rte_flow_error_set(ctx->error, ENOMEM,
11250                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11251                                           NULL,
11252                                           "cannot allocate resource memory");
11253                 return NULL;
11254         }
11255         memcpy(resource, entry, sizeof(*resource));
11256         resource->idx = idx;
11257         resource->dev = dev;
11258         return &resource->entry;
11259 }
11260
11261 void
11262 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11263                              struct mlx5_list_entry *entry)
11264 {
11265         struct mlx5_flow_dv_sample_resource *resource =
11266                                   container_of(entry, typeof(*resource), entry);
11267         struct rte_eth_dev *dev = resource->dev;
11268         struct mlx5_priv *priv = dev->data->dev_private;
11269
11270         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11271 }
11272
11273 /**
11274  * Find existing sample resource or create and register a new one.
11275  *
11276  * @param[in, out] dev
11277  *   Pointer to rte_eth_dev structure.
11278  * @param[in] ref
11279  *   Pointer to sample resource reference.
11280  * @parm[in, out] dev_flow
11281  *   Pointer to the dev_flow.
11282  * @param[out] error
11283  *   pointer to error structure.
11284  *
11285  * @return
11286  *   0 on success otherwise -errno and errno is set.
11287  */
11288 static int
11289 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11290                          struct mlx5_flow_dv_sample_resource *ref,
11291                          struct mlx5_flow *dev_flow,
11292                          struct rte_flow_error *error)
11293 {
11294         struct mlx5_flow_dv_sample_resource *resource;
11295         struct mlx5_list_entry *entry;
11296         struct mlx5_priv *priv = dev->data->dev_private;
11297         struct mlx5_flow_cb_ctx ctx = {
11298                 .dev = dev,
11299                 .error = error,
11300                 .data = ref,
11301         };
11302
11303         entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11304         if (!entry)
11305                 return -rte_errno;
11306         resource = container_of(entry, typeof(*resource), entry);
11307         dev_flow->handle->dvh.rix_sample = resource->idx;
11308         dev_flow->dv.sample_res = resource;
11309         return 0;
11310 }
11311
11312 int
11313 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11314                             struct mlx5_list_entry *entry, void *cb_ctx)
11315 {
11316         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11317         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11318         struct rte_eth_dev *dev = ctx->dev;
11319         struct mlx5_flow_dv_dest_array_resource *resource =
11320                                   container_of(entry, typeof(*resource), entry);
11321         uint32_t idx = 0;
11322
11323         if (ctx_resource->num_of_dest == resource->num_of_dest &&
11324             ctx_resource->ft_type == resource->ft_type &&
11325             !memcmp((void *)resource->sample_act,
11326                     (void *)ctx_resource->sample_act,
11327                    (ctx_resource->num_of_dest *
11328                    sizeof(struct mlx5_flow_sub_actions_list)))) {
11329                 /*
11330                  * Existing sample action should release the prepared
11331                  * sub-actions reference counter.
11332                  */
11333                 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11334                         flow_dv_sample_sub_actions_release(dev,
11335                                         &ctx_resource->sample_idx[idx]);
11336                 return 0;
11337         }
11338         return 1;
11339 }
11340
11341 struct mlx5_list_entry *
11342 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11343 {
11344         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11345         struct rte_eth_dev *dev = ctx->dev;
11346         struct mlx5_flow_dv_dest_array_resource *resource;
11347         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11348         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11349         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11350         struct mlx5_priv *priv = dev->data->dev_private;
11351         struct mlx5_dev_ctx_shared *sh = priv->sh;
11352         struct mlx5_flow_sub_actions_list *sample_act;
11353         struct mlx5dv_dr_domain *domain;
11354         uint32_t idx = 0, res_idx = 0;
11355         struct rte_flow_error *error = ctx->error;
11356         uint64_t action_flags;
11357         int ret;
11358
11359         /* Register new destination array resource. */
11360         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11361                                             &res_idx);
11362         if (!resource) {
11363                 rte_flow_error_set(error, ENOMEM,
11364                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11365                                           NULL,
11366                                           "cannot allocate resource memory");
11367                 return NULL;
11368         }
11369         *resource = *ctx_resource;
11370         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11371                 domain = sh->fdb_domain;
11372         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11373                 domain = sh->rx_domain;
11374         else
11375                 domain = sh->tx_domain;
11376         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11377                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11378                                  mlx5_malloc(MLX5_MEM_ZERO,
11379                                  sizeof(struct mlx5dv_dr_action_dest_attr),
11380                                  0, SOCKET_ID_ANY);
11381                 if (!dest_attr[idx]) {
11382                         rte_flow_error_set(error, ENOMEM,
11383                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11384                                            NULL,
11385                                            "cannot allocate resource memory");
11386                         goto error;
11387                 }
11388                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11389                 sample_act = &ctx_resource->sample_act[idx];
11390                 action_flags = sample_act->action_flags;
11391                 switch (action_flags) {
11392                 case MLX5_FLOW_ACTION_QUEUE:
11393                         dest_attr[idx]->dest = sample_act->dr_queue_action;
11394                         break;
11395                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11396                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11397                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11398                         dest_attr[idx]->dest_reformat->reformat =
11399                                         sample_act->dr_encap_action;
11400                         dest_attr[idx]->dest_reformat->dest =
11401                                         sample_act->dr_port_id_action;
11402                         break;
11403                 case MLX5_FLOW_ACTION_PORT_ID:
11404                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
11405                         break;
11406                 case MLX5_FLOW_ACTION_JUMP:
11407                         dest_attr[idx]->dest = sample_act->dr_jump_action;
11408                         break;
11409                 default:
11410                         rte_flow_error_set(error, EINVAL,
11411                                            RTE_FLOW_ERROR_TYPE_ACTION,
11412                                            NULL,
11413                                            "unsupported actions type");
11414                         goto error;
11415                 }
11416         }
11417         /* create a dest array actioin */
11418         ret = mlx5_os_flow_dr_create_flow_action_dest_array
11419                                                 (domain,
11420                                                  resource->num_of_dest,
11421                                                  dest_attr,
11422                                                  &resource->action);
11423         if (ret) {
11424                 rte_flow_error_set(error, ENOMEM,
11425                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11426                                    NULL,
11427                                    "cannot create destination array action");
11428                 goto error;
11429         }
11430         resource->idx = res_idx;
11431         resource->dev = dev;
11432         for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11433                 mlx5_free(dest_attr[idx]);
11434         return &resource->entry;
11435 error:
11436         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11437                 flow_dv_sample_sub_actions_release(dev,
11438                                                    &resource->sample_idx[idx]);
11439                 if (dest_attr[idx])
11440                         mlx5_free(dest_attr[idx]);
11441         }
11442         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11443         return NULL;
11444 }
11445
11446 struct mlx5_list_entry *
11447 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11448                             struct mlx5_list_entry *entry __rte_unused,
11449                             void *cb_ctx)
11450 {
11451         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11452         struct rte_eth_dev *dev = ctx->dev;
11453         struct mlx5_flow_dv_dest_array_resource *resource;
11454         struct mlx5_priv *priv = dev->data->dev_private;
11455         struct mlx5_dev_ctx_shared *sh = priv->sh;
11456         uint32_t res_idx = 0;
11457         struct rte_flow_error *error = ctx->error;
11458
11459         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11460                                       &res_idx);
11461         if (!resource) {
11462                 rte_flow_error_set(error, ENOMEM,
11463                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11464                                           NULL,
11465                                           "cannot allocate dest-array memory");
11466                 return NULL;
11467         }
11468         memcpy(resource, entry, sizeof(*resource));
11469         resource->idx = res_idx;
11470         resource->dev = dev;
11471         return &resource->entry;
11472 }
11473
11474 void
11475 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11476                                  struct mlx5_list_entry *entry)
11477 {
11478         struct mlx5_flow_dv_dest_array_resource *resource =
11479                         container_of(entry, typeof(*resource), entry);
11480         struct rte_eth_dev *dev = resource->dev;
11481         struct mlx5_priv *priv = dev->data->dev_private;
11482
11483         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11484 }
11485
11486 /**
11487  * Find existing destination array resource or create and register a new one.
11488  *
11489  * @param[in, out] dev
11490  *   Pointer to rte_eth_dev structure.
11491  * @param[in] ref
11492  *   Pointer to destination array resource reference.
11493  * @parm[in, out] dev_flow
11494  *   Pointer to the dev_flow.
11495  * @param[out] error
11496  *   pointer to error structure.
11497  *
11498  * @return
11499  *   0 on success otherwise -errno and errno is set.
11500  */
11501 static int
11502 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11503                          struct mlx5_flow_dv_dest_array_resource *ref,
11504                          struct mlx5_flow *dev_flow,
11505                          struct rte_flow_error *error)
11506 {
11507         struct mlx5_flow_dv_dest_array_resource *resource;
11508         struct mlx5_priv *priv = dev->data->dev_private;
11509         struct mlx5_list_entry *entry;
11510         struct mlx5_flow_cb_ctx ctx = {
11511                 .dev = dev,
11512                 .error = error,
11513                 .data = ref,
11514         };
11515
11516         entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11517         if (!entry)
11518                 return -rte_errno;
11519         resource = container_of(entry, typeof(*resource), entry);
11520         dev_flow->handle->dvh.rix_dest_array = resource->idx;
11521         dev_flow->dv.dest_array_res = resource;
11522         return 0;
11523 }
11524
11525 /**
11526  * Convert Sample action to DV specification.
11527  *
11528  * @param[in] dev
11529  *   Pointer to rte_eth_dev structure.
11530  * @param[in] action
11531  *   Pointer to sample action structure.
11532  * @param[in, out] dev_flow
11533  *   Pointer to the mlx5_flow.
11534  * @param[in] attr
11535  *   Pointer to the flow attributes.
11536  * @param[in, out] num_of_dest
11537  *   Pointer to the num of destination.
11538  * @param[in, out] sample_actions
11539  *   Pointer to sample actions list.
11540  * @param[in, out] res
11541  *   Pointer to sample resource.
11542  * @param[out] error
11543  *   Pointer to the error structure.
11544  *
11545  * @return
11546  *   0 on success, a negative errno value otherwise and rte_errno is set.
11547  */
11548 static int
11549 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11550                                 const struct rte_flow_action_sample *action,
11551                                 struct mlx5_flow *dev_flow,
11552                                 const struct rte_flow_attr *attr,
11553                                 uint32_t *num_of_dest,
11554                                 void **sample_actions,
11555                                 struct mlx5_flow_dv_sample_resource *res,
11556                                 struct rte_flow_error *error)
11557 {
11558         struct mlx5_priv *priv = dev->data->dev_private;
11559         const struct rte_flow_action *sub_actions;
11560         struct mlx5_flow_sub_actions_list *sample_act;
11561         struct mlx5_flow_sub_actions_idx *sample_idx;
11562         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11563         struct rte_flow *flow = dev_flow->flow;
11564         struct mlx5_flow_rss_desc *rss_desc;
11565         uint64_t action_flags = 0;
11566
11567         MLX5_ASSERT(wks);
11568         rss_desc = &wks->rss_desc;
11569         sample_act = &res->sample_act;
11570         sample_idx = &res->sample_idx;
11571         res->ratio = action->ratio;
11572         sub_actions = action->actions;
11573         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11574                 int type = sub_actions->type;
11575                 uint32_t pre_rix = 0;
11576                 void *pre_r;
11577                 switch (type) {
11578                 case RTE_FLOW_ACTION_TYPE_QUEUE:
11579                 {
11580                         const struct rte_flow_action_queue *queue;
11581                         struct mlx5_hrxq *hrxq;
11582                         uint32_t hrxq_idx;
11583
11584                         queue = sub_actions->conf;
11585                         rss_desc->queue_num = 1;
11586                         rss_desc->queue[0] = queue->index;
11587                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11588                                                     rss_desc, &hrxq_idx);
11589                         if (!hrxq)
11590                                 return rte_flow_error_set
11591                                         (error, rte_errno,
11592                                          RTE_FLOW_ERROR_TYPE_ACTION,
11593                                          NULL,
11594                                          "cannot create fate queue");
11595                         sample_act->dr_queue_action = hrxq->action;
11596                         sample_idx->rix_hrxq = hrxq_idx;
11597                         sample_actions[sample_act->actions_num++] =
11598                                                 hrxq->action;
11599                         (*num_of_dest)++;
11600                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
11601                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11602                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11603                         dev_flow->handle->fate_action =
11604                                         MLX5_FLOW_FATE_QUEUE;
11605                         break;
11606                 }
11607                 case RTE_FLOW_ACTION_TYPE_RSS:
11608                 {
11609                         struct mlx5_hrxq *hrxq;
11610                         uint32_t hrxq_idx;
11611                         const struct rte_flow_action_rss *rss;
11612                         const uint8_t *rss_key;
11613
11614                         rss = sub_actions->conf;
11615                         memcpy(rss_desc->queue, rss->queue,
11616                                rss->queue_num * sizeof(uint16_t));
11617                         rss_desc->queue_num = rss->queue_num;
11618                         /* NULL RSS key indicates default RSS key. */
11619                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11620                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11621                         /*
11622                          * rss->level and rss.types should be set in advance
11623                          * when expanding items for RSS.
11624                          */
11625                         flow_dv_hashfields_set(dev_flow, rss_desc);
11626                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11627                                                     rss_desc, &hrxq_idx);
11628                         if (!hrxq)
11629                                 return rte_flow_error_set
11630                                         (error, rte_errno,
11631                                          RTE_FLOW_ERROR_TYPE_ACTION,
11632                                          NULL,
11633                                          "cannot create fate queue");
11634                         sample_act->dr_queue_action = hrxq->action;
11635                         sample_idx->rix_hrxq = hrxq_idx;
11636                         sample_actions[sample_act->actions_num++] =
11637                                                 hrxq->action;
11638                         (*num_of_dest)++;
11639                         action_flags |= MLX5_FLOW_ACTION_RSS;
11640                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11641                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11642                         dev_flow->handle->fate_action =
11643                                         MLX5_FLOW_FATE_QUEUE;
11644                         break;
11645                 }
11646                 case RTE_FLOW_ACTION_TYPE_MARK:
11647                 {
11648                         uint32_t tag_be = mlx5_flow_mark_set
11649                                 (((const struct rte_flow_action_mark *)
11650                                 (sub_actions->conf))->id);
11651
11652                         dev_flow->handle->mark = 1;
11653                         pre_rix = dev_flow->handle->dvh.rix_tag;
11654                         /* Save the mark resource before sample */
11655                         pre_r = dev_flow->dv.tag_resource;
11656                         if (flow_dv_tag_resource_register(dev, tag_be,
11657                                                   dev_flow, error))
11658                                 return -rte_errno;
11659                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11660                         sample_act->dr_tag_action =
11661                                 dev_flow->dv.tag_resource->action;
11662                         sample_idx->rix_tag =
11663                                 dev_flow->handle->dvh.rix_tag;
11664                         sample_actions[sample_act->actions_num++] =
11665                                                 sample_act->dr_tag_action;
11666                         /* Recover the mark resource after sample */
11667                         dev_flow->dv.tag_resource = pre_r;
11668                         dev_flow->handle->dvh.rix_tag = pre_rix;
11669                         action_flags |= MLX5_FLOW_ACTION_MARK;
11670                         break;
11671                 }
11672                 case RTE_FLOW_ACTION_TYPE_COUNT:
11673                 {
11674                         if (!flow->counter) {
11675                                 flow->counter =
11676                                         flow_dv_translate_create_counter(dev,
11677                                                 dev_flow, sub_actions->conf,
11678                                                 0);
11679                                 if (!flow->counter)
11680                                         return rte_flow_error_set
11681                                                 (error, rte_errno,
11682                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11683                                                 NULL,
11684                                                 "cannot create counter"
11685                                                 " object.");
11686                         }
11687                         sample_act->dr_cnt_action =
11688                                   (flow_dv_counter_get_by_idx(dev,
11689                                   flow->counter, NULL))->action;
11690                         sample_actions[sample_act->actions_num++] =
11691                                                 sample_act->dr_cnt_action;
11692                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11693                         break;
11694                 }
11695                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11696                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11697                 {
11698                         struct mlx5_flow_dv_port_id_action_resource
11699                                         port_id_resource;
11700                         uint32_t port_id = 0;
11701
11702                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11703                         /* Save the port id resource before sample */
11704                         pre_rix = dev_flow->handle->rix_port_id_action;
11705                         pre_r = dev_flow->dv.port_id_action;
11706                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11707                                                              &port_id, error))
11708                                 return -rte_errno;
11709                         port_id_resource.port_id = port_id;
11710                         if (flow_dv_port_id_action_resource_register
11711                             (dev, &port_id_resource, dev_flow, error))
11712                                 return -rte_errno;
11713                         sample_act->dr_port_id_action =
11714                                 dev_flow->dv.port_id_action->action;
11715                         sample_idx->rix_port_id_action =
11716                                 dev_flow->handle->rix_port_id_action;
11717                         sample_actions[sample_act->actions_num++] =
11718                                                 sample_act->dr_port_id_action;
11719                         /* Recover the port id resource after sample */
11720                         dev_flow->dv.port_id_action = pre_r;
11721                         dev_flow->handle->rix_port_id_action = pre_rix;
11722                         (*num_of_dest)++;
11723                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11724                         break;
11725                 }
11726                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11727                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11728                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11729                         /* Save the encap resource before sample */
11730                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11731                         pre_r = dev_flow->dv.encap_decap;
11732                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11733                                                            dev_flow,
11734                                                            attr->transfer,
11735                                                            error))
11736                                 return -rte_errno;
11737                         sample_act->dr_encap_action =
11738                                 dev_flow->dv.encap_decap->action;
11739                         sample_idx->rix_encap_decap =
11740                                 dev_flow->handle->dvh.rix_encap_decap;
11741                         sample_actions[sample_act->actions_num++] =
11742                                                 sample_act->dr_encap_action;
11743                         /* Recover the encap resource after sample */
11744                         dev_flow->dv.encap_decap = pre_r;
11745                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11746                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11747                         break;
11748                 default:
11749                         return rte_flow_error_set(error, EINVAL,
11750                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11751                                 NULL,
11752                                 "Not support for sampler action");
11753                 }
11754         }
11755         sample_act->action_flags = action_flags;
11756         res->ft_id = dev_flow->dv.group;
11757         if (attr->transfer) {
11758                 union {
11759                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11760                         uint64_t set_action;
11761                 } action_ctx = { .set_action = 0 };
11762
11763                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11764                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11765                          MLX5_MODIFICATION_TYPE_SET);
11766                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11767                          MLX5_MODI_META_REG_C_0);
11768                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11769                          priv->vport_meta_tag);
11770                 res->set_action = action_ctx.set_action;
11771         } else if (attr->ingress) {
11772                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11773         } else {
11774                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11775         }
11776         return 0;
11777 }
11778
11779 /**
11780  * Convert Sample action to DV specification.
11781  *
11782  * @param[in] dev
11783  *   Pointer to rte_eth_dev structure.
11784  * @param[in, out] dev_flow
11785  *   Pointer to the mlx5_flow.
11786  * @param[in] num_of_dest
11787  *   The num of destination.
11788  * @param[in, out] res
11789  *   Pointer to sample resource.
11790  * @param[in, out] mdest_res
11791  *   Pointer to destination array resource.
11792  * @param[in] sample_actions
11793  *   Pointer to sample path actions list.
11794  * @param[in] action_flags
11795  *   Holds the actions detected until now.
11796  * @param[out] error
11797  *   Pointer to the error structure.
11798  *
11799  * @return
11800  *   0 on success, a negative errno value otherwise and rte_errno is set.
11801  */
11802 static int
11803 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11804                              struct mlx5_flow *dev_flow,
11805                              uint32_t num_of_dest,
11806                              struct mlx5_flow_dv_sample_resource *res,
11807                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11808                              void **sample_actions,
11809                              uint64_t action_flags,
11810                              struct rte_flow_error *error)
11811 {
11812         /* update normal path action resource into last index of array */
11813         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11814         struct mlx5_flow_sub_actions_list *sample_act =
11815                                         &mdest_res->sample_act[dest_index];
11816         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11817         struct mlx5_flow_rss_desc *rss_desc;
11818         uint32_t normal_idx = 0;
11819         struct mlx5_hrxq *hrxq;
11820         uint32_t hrxq_idx;
11821
11822         MLX5_ASSERT(wks);
11823         rss_desc = &wks->rss_desc;
11824         if (num_of_dest > 1) {
11825                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11826                         /* Handle QP action for mirroring */
11827                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11828                                                     rss_desc, &hrxq_idx);
11829                         if (!hrxq)
11830                                 return rte_flow_error_set
11831                                      (error, rte_errno,
11832                                       RTE_FLOW_ERROR_TYPE_ACTION,
11833                                       NULL,
11834                                       "cannot create rx queue");
11835                         normal_idx++;
11836                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11837                         sample_act->dr_queue_action = hrxq->action;
11838                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11839                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11840                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11841                 }
11842                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11843                         normal_idx++;
11844                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11845                                 dev_flow->handle->dvh.rix_encap_decap;
11846                         sample_act->dr_encap_action =
11847                                 dev_flow->dv.encap_decap->action;
11848                         dev_flow->handle->dvh.rix_encap_decap = 0;
11849                 }
11850                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11851                         normal_idx++;
11852                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11853                                 dev_flow->handle->rix_port_id_action;
11854                         sample_act->dr_port_id_action =
11855                                 dev_flow->dv.port_id_action->action;
11856                         dev_flow->handle->rix_port_id_action = 0;
11857                 }
11858                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11859                         normal_idx++;
11860                         mdest_res->sample_idx[dest_index].rix_jump =
11861                                 dev_flow->handle->rix_jump;
11862                         sample_act->dr_jump_action =
11863                                 dev_flow->dv.jump->action;
11864                         dev_flow->handle->rix_jump = 0;
11865                 }
11866                 sample_act->actions_num = normal_idx;
11867                 /* update sample action resource into first index of array */
11868                 mdest_res->ft_type = res->ft_type;
11869                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11870                                 sizeof(struct mlx5_flow_sub_actions_idx));
11871                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11872                                 sizeof(struct mlx5_flow_sub_actions_list));
11873                 mdest_res->num_of_dest = num_of_dest;
11874                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11875                                                          dev_flow, error))
11876                         return rte_flow_error_set(error, EINVAL,
11877                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11878                                                   NULL, "can't create sample "
11879                                                   "action");
11880         } else {
11881                 res->sub_actions = sample_actions;
11882                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11883                         return rte_flow_error_set(error, EINVAL,
11884                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11885                                                   NULL,
11886                                                   "can't create sample action");
11887         }
11888         return 0;
11889 }
11890
11891 /**
11892  * Remove an ASO age action from age actions list.
11893  *
11894  * @param[in] dev
11895  *   Pointer to the Ethernet device structure.
11896  * @param[in] age
11897  *   Pointer to the aso age action handler.
11898  */
11899 static void
11900 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11901                                 struct mlx5_aso_age_action *age)
11902 {
11903         struct mlx5_age_info *age_info;
11904         struct mlx5_age_param *age_param = &age->age_params;
11905         struct mlx5_priv *priv = dev->data->dev_private;
11906         uint16_t expected = AGE_CANDIDATE;
11907
11908         age_info = GET_PORT_AGE_INFO(priv);
11909         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11910                                          AGE_FREE, false, __ATOMIC_RELAXED,
11911                                          __ATOMIC_RELAXED)) {
11912                 /**
11913                  * We need the lock even it is age timeout,
11914                  * since age action may still in process.
11915                  */
11916                 rte_spinlock_lock(&age_info->aged_sl);
11917                 LIST_REMOVE(age, next);
11918                 rte_spinlock_unlock(&age_info->aged_sl);
11919                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11920         }
11921 }
11922
11923 /**
11924  * Release an ASO age action.
11925  *
11926  * @param[in] dev
11927  *   Pointer to the Ethernet device structure.
11928  * @param[in] age_idx
11929  *   Index of ASO age action to release.
11930  * @param[in] flow
11931  *   True if the release operation is during flow destroy operation.
11932  *   False if the release operation is during action destroy operation.
11933  *
11934  * @return
11935  *   0 when age action was removed, otherwise the number of references.
11936  */
11937 static int
11938 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11939 {
11940         struct mlx5_priv *priv = dev->data->dev_private;
11941         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11942         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11943         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11944
11945         if (!ret) {
11946                 flow_dv_aso_age_remove_from_age(dev, age);
11947                 rte_spinlock_lock(&mng->free_sl);
11948                 LIST_INSERT_HEAD(&mng->free, age, next);
11949                 rte_spinlock_unlock(&mng->free_sl);
11950         }
11951         return ret;
11952 }
11953
11954 /**
11955  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11956  *
11957  * @param[in] dev
11958  *   Pointer to the Ethernet device structure.
11959  *
11960  * @return
11961  *   0 on success, otherwise negative errno value and rte_errno is set.
11962  */
11963 static int
11964 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11965 {
11966         struct mlx5_priv *priv = dev->data->dev_private;
11967         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11968         void *old_pools = mng->pools;
11969         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11970         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11971         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11972
11973         if (!pools) {
11974                 rte_errno = ENOMEM;
11975                 return -ENOMEM;
11976         }
11977         if (old_pools) {
11978                 memcpy(pools, old_pools,
11979                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
11980                 mlx5_free(old_pools);
11981         } else {
11982                 /* First ASO flow hit allocation - starting ASO data-path. */
11983                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11984
11985                 if (ret) {
11986                         mlx5_free(pools);
11987                         return ret;
11988                 }
11989         }
11990         mng->n = resize;
11991         mng->pools = pools;
11992         return 0;
11993 }
11994
11995 /**
11996  * Create and initialize a new ASO aging pool.
11997  *
11998  * @param[in] dev
11999  *   Pointer to the Ethernet device structure.
12000  * @param[out] age_free
12001  *   Where to put the pointer of a new age action.
12002  *
12003  * @return
12004  *   The age actions pool pointer and @p age_free is set on success,
12005  *   NULL otherwise and rte_errno is set.
12006  */
12007 static struct mlx5_aso_age_pool *
12008 flow_dv_age_pool_create(struct rte_eth_dev *dev,
12009                         struct mlx5_aso_age_action **age_free)
12010 {
12011         struct mlx5_priv *priv = dev->data->dev_private;
12012         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12013         struct mlx5_aso_age_pool *pool = NULL;
12014         struct mlx5_devx_obj *obj = NULL;
12015         uint32_t i;
12016
12017         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
12018                                                     priv->sh->cdev->pdn);
12019         if (!obj) {
12020                 rte_errno = ENODATA;
12021                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
12022                 return NULL;
12023         }
12024         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12025         if (!pool) {
12026                 claim_zero(mlx5_devx_cmd_destroy(obj));
12027                 rte_errno = ENOMEM;
12028                 return NULL;
12029         }
12030         pool->flow_hit_aso_obj = obj;
12031         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
12032         rte_rwlock_write_lock(&mng->resize_rwl);
12033         pool->index = mng->next;
12034         /* Resize pools array if there is no room for the new pool in it. */
12035         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
12036                 claim_zero(mlx5_devx_cmd_destroy(obj));
12037                 mlx5_free(pool);
12038                 rte_rwlock_write_unlock(&mng->resize_rwl);
12039                 return NULL;
12040         }
12041         mng->pools[pool->index] = pool;
12042         mng->next++;
12043         rte_rwlock_write_unlock(&mng->resize_rwl);
12044         /* Assign the first action in the new pool, the rest go to free list. */
12045         *age_free = &pool->actions[0];
12046         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
12047                 pool->actions[i].offset = i;
12048                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
12049         }
12050         return pool;
12051 }
12052
12053 /**
12054  * Allocate a ASO aging bit.
12055  *
12056  * @param[in] dev
12057  *   Pointer to the Ethernet device structure.
12058  * @param[out] error
12059  *   Pointer to the error structure.
12060  *
12061  * @return
12062  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
12063  */
12064 static uint32_t
12065 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12066 {
12067         struct mlx5_priv *priv = dev->data->dev_private;
12068         const struct mlx5_aso_age_pool *pool;
12069         struct mlx5_aso_age_action *age_free = NULL;
12070         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12071
12072         MLX5_ASSERT(mng);
12073         /* Try to get the next free age action bit. */
12074         rte_spinlock_lock(&mng->free_sl);
12075         age_free = LIST_FIRST(&mng->free);
12076         if (age_free) {
12077                 LIST_REMOVE(age_free, next);
12078         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
12079                 rte_spinlock_unlock(&mng->free_sl);
12080                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12081                                    NULL, "failed to create ASO age pool");
12082                 return 0; /* 0 is an error. */
12083         }
12084         rte_spinlock_unlock(&mng->free_sl);
12085         pool = container_of
12086           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
12087                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12088                                                                        actions);
12089         if (!age_free->dr_action) {
12090                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12091                                                  error);
12092
12093                 if (reg_c < 0) {
12094                         rte_flow_error_set(error, rte_errno,
12095                                            RTE_FLOW_ERROR_TYPE_ACTION,
12096                                            NULL, "failed to get reg_c "
12097                                            "for ASO flow hit");
12098                         return 0; /* 0 is an error. */
12099                 }
12100 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12101                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12102                                 (priv->sh->rx_domain,
12103                                  pool->flow_hit_aso_obj->obj, age_free->offset,
12104                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12105                                  (reg_c - REG_C_0));
12106 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12107                 if (!age_free->dr_action) {
12108                         rte_errno = errno;
12109                         rte_spinlock_lock(&mng->free_sl);
12110                         LIST_INSERT_HEAD(&mng->free, age_free, next);
12111                         rte_spinlock_unlock(&mng->free_sl);
12112                         rte_flow_error_set(error, rte_errno,
12113                                            RTE_FLOW_ERROR_TYPE_ACTION,
12114                                            NULL, "failed to create ASO "
12115                                            "flow hit action");
12116                         return 0; /* 0 is an error. */
12117                 }
12118         }
12119         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12120         return pool->index | ((age_free->offset + 1) << 16);
12121 }
12122
12123 /**
12124  * Initialize flow ASO age parameters.
12125  *
12126  * @param[in] dev
12127  *   Pointer to rte_eth_dev structure.
12128  * @param[in] age_idx
12129  *   Index of ASO age action.
12130  * @param[in] context
12131  *   Pointer to flow counter age context.
12132  * @param[in] timeout
12133  *   Aging timeout in seconds.
12134  *
12135  */
12136 static void
12137 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12138                             uint32_t age_idx,
12139                             void *context,
12140                             uint32_t timeout)
12141 {
12142         struct mlx5_aso_age_action *aso_age;
12143
12144         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12145         MLX5_ASSERT(aso_age);
12146         aso_age->age_params.context = context;
12147         aso_age->age_params.timeout = timeout;
12148         aso_age->age_params.port_id = dev->data->port_id;
12149         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12150                          __ATOMIC_RELAXED);
12151         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12152                          __ATOMIC_RELAXED);
12153 }
12154
12155 static void
12156 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12157                                const struct rte_flow_item_integrity *value,
12158                                void *headers_m, void *headers_v)
12159 {
12160         if (mask->l4_ok) {
12161                 /* RTE l4_ok filter aggregates hardware l4_ok and
12162                  * l4_checksum_ok filters.
12163                  * Positive RTE l4_ok match requires hardware match on both L4
12164                  * hardware integrity bits.
12165                  * For negative match, check hardware l4_checksum_ok bit only,
12166                  * because hardware sets that bit to 0 for all packets
12167                  * with bad L4.
12168                  */
12169                 if (value->l4_ok) {
12170                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok, 1);
12171                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok, 1);
12172                 }
12173                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12174                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12175                          !!value->l4_ok);
12176         }
12177         if (mask->l4_csum_ok) {
12178                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12179                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12180                          value->l4_csum_ok);
12181         }
12182 }
12183
12184 static void
12185 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12186                                const struct rte_flow_item_integrity *value,
12187                                void *headers_m, void *headers_v, bool is_ipv4)
12188 {
12189         if (mask->l3_ok) {
12190                 /* RTE l3_ok filter aggregates for IPv4 hardware l3_ok and
12191                  * ipv4_csum_ok filters.
12192                  * Positive RTE l3_ok match requires hardware match on both L3
12193                  * hardware integrity bits.
12194                  * For negative match, check hardware l3_csum_ok bit only,
12195                  * because hardware sets that bit to 0 for all packets
12196                  * with bad L3.
12197                  */
12198                 if (is_ipv4) {
12199                         if (value->l3_ok) {
12200                                 MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12201                                          l3_ok, 1);
12202                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12203                                          l3_ok, 1);
12204                         }
12205                         MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12206                                  ipv4_checksum_ok, 1);
12207                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12208                                  ipv4_checksum_ok, !!value->l3_ok);
12209                 } else {
12210                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok, 1);
12211                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12212                                  value->l3_ok);
12213                 }
12214         }
12215         if (mask->ipv4_csum_ok) {
12216                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok, 1);
12217                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12218                          value->ipv4_csum_ok);
12219         }
12220 }
12221
12222 static void
12223 set_integrity_bits(void *headers_m, void *headers_v,
12224                    const struct rte_flow_item *integrity_item, bool is_l3_ip4)
12225 {
12226         const struct rte_flow_item_integrity *spec = integrity_item->spec;
12227         const struct rte_flow_item_integrity *mask = integrity_item->mask;
12228
12229         /* Integrity bits validation cleared spec pointer */
12230         MLX5_ASSERT(spec != NULL);
12231         if (!mask)
12232                 mask = &rte_flow_item_integrity_mask;
12233         flow_dv_translate_integrity_l3(mask, spec, headers_m, headers_v,
12234                                        is_l3_ip4);
12235         flow_dv_translate_integrity_l4(mask, spec, headers_m, headers_v);
12236 }
12237
12238 static void
12239 flow_dv_translate_item_integrity_post(void *matcher, void *key,
12240                                       const
12241                                       struct rte_flow_item *integrity_items[2],
12242                                       uint64_t pattern_flags)
12243 {
12244         void *headers_m, *headers_v;
12245         bool is_l3_ip4;
12246
12247         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
12248                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12249                                          inner_headers);
12250                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12251                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) !=
12252                             0;
12253                 set_integrity_bits(headers_m, headers_v,
12254                                    integrity_items[1], is_l3_ip4);
12255         }
12256         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
12257                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12258                                          outer_headers);
12259                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12260                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV4) !=
12261                             0;
12262                 set_integrity_bits(headers_m, headers_v,
12263                                    integrity_items[0], is_l3_ip4);
12264         }
12265 }
12266
12267 static void
12268 flow_dv_translate_item_integrity(const struct rte_flow_item *item,
12269                                  const struct rte_flow_item *integrity_items[2],
12270                                  uint64_t *last_item)
12271 {
12272         const struct rte_flow_item_integrity *spec = (typeof(spec))item->spec;
12273
12274         /* integrity bits validation cleared spec pointer */
12275         MLX5_ASSERT(spec != NULL);
12276         if (spec->level > 1) {
12277                 integrity_items[1] = item;
12278                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
12279         } else {
12280                 integrity_items[0] = item;
12281                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
12282         }
12283 }
12284
12285 /**
12286  * Prepares DV flow counter with aging configuration.
12287  * Gets it by index when exists, creates a new one when doesn't.
12288  *
12289  * @param[in] dev
12290  *   Pointer to rte_eth_dev structure.
12291  * @param[in] dev_flow
12292  *   Pointer to the mlx5_flow.
12293  * @param[in, out] flow
12294  *   Pointer to the sub flow.
12295  * @param[in] count
12296  *   Pointer to the counter action configuration.
12297  * @param[in] age
12298  *   Pointer to the aging action configuration.
12299  * @param[out] error
12300  *   Pointer to the error structure.
12301  *
12302  * @return
12303  *   Pointer to the counter, NULL otherwise.
12304  */
12305 static struct mlx5_flow_counter *
12306 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12307                         struct mlx5_flow *dev_flow,
12308                         struct rte_flow *flow,
12309                         const struct rte_flow_action_count *count,
12310                         const struct rte_flow_action_age *age,
12311                         struct rte_flow_error *error)
12312 {
12313         if (!flow->counter) {
12314                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12315                                                                  count, age);
12316                 if (!flow->counter) {
12317                         rte_flow_error_set(error, rte_errno,
12318                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12319                                            "cannot create counter object.");
12320                         return NULL;
12321                 }
12322         }
12323         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12324 }
12325
12326 /*
12327  * Release an ASO CT action by its own device.
12328  *
12329  * @param[in] dev
12330  *   Pointer to the Ethernet device structure.
12331  * @param[in] idx
12332  *   Index of ASO CT action to release.
12333  *
12334  * @return
12335  *   0 when CT action was removed, otherwise the number of references.
12336  */
12337 static inline int
12338 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12339 {
12340         struct mlx5_priv *priv = dev->data->dev_private;
12341         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12342         uint32_t ret;
12343         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12344         enum mlx5_aso_ct_state state =
12345                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12346
12347         /* Cannot release when CT is in the ASO SQ. */
12348         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12349                 return -1;
12350         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12351         if (!ret) {
12352                 if (ct->dr_action_orig) {
12353 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12354                         claim_zero(mlx5_glue->destroy_flow_action
12355                                         (ct->dr_action_orig));
12356 #endif
12357                         ct->dr_action_orig = NULL;
12358                 }
12359                 if (ct->dr_action_rply) {
12360 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12361                         claim_zero(mlx5_glue->destroy_flow_action
12362                                         (ct->dr_action_rply));
12363 #endif
12364                         ct->dr_action_rply = NULL;
12365                 }
12366                 /* Clear the state to free, no need in 1st allocation. */
12367                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12368                 rte_spinlock_lock(&mng->ct_sl);
12369                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12370                 rte_spinlock_unlock(&mng->ct_sl);
12371         }
12372         return (int)ret;
12373 }
12374
12375 static inline int
12376 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12377                        struct rte_flow_error *error)
12378 {
12379         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12380         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12381         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12382         int ret;
12383
12384         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12385         if (dev->data->dev_started != 1)
12386                 return rte_flow_error_set(error, EAGAIN,
12387                                           RTE_FLOW_ERROR_TYPE_ACTION,
12388                                           NULL,
12389                                           "Indirect CT action cannot be destroyed when the port is stopped");
12390         ret = flow_dv_aso_ct_dev_release(owndev, idx);
12391         if (ret < 0)
12392                 return rte_flow_error_set(error, EAGAIN,
12393                                           RTE_FLOW_ERROR_TYPE_ACTION,
12394                                           NULL,
12395                                           "Current state prevents indirect CT action from being destroyed");
12396         return ret;
12397 }
12398
12399 /*
12400  * Resize the ASO CT pools array by 64 pools.
12401  *
12402  * @param[in] dev
12403  *   Pointer to the Ethernet device structure.
12404  *
12405  * @return
12406  *   0 on success, otherwise negative errno value and rte_errno is set.
12407  */
12408 static int
12409 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12410 {
12411         struct mlx5_priv *priv = dev->data->dev_private;
12412         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12413         void *old_pools = mng->pools;
12414         /* Magic number now, need a macro. */
12415         uint32_t resize = mng->n + 64;
12416         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12417         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12418
12419         if (!pools) {
12420                 rte_errno = ENOMEM;
12421                 return -rte_errno;
12422         }
12423         rte_rwlock_write_lock(&mng->resize_rwl);
12424         /* ASO SQ/QP was already initialized in the startup. */
12425         if (old_pools) {
12426                 /* Realloc could be an alternative choice. */
12427                 rte_memcpy(pools, old_pools,
12428                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
12429                 mlx5_free(old_pools);
12430         }
12431         mng->n = resize;
12432         mng->pools = pools;
12433         rte_rwlock_write_unlock(&mng->resize_rwl);
12434         return 0;
12435 }
12436
12437 /*
12438  * Create and initialize a new ASO CT pool.
12439  *
12440  * @param[in] dev
12441  *   Pointer to the Ethernet device structure.
12442  * @param[out] ct_free
12443  *   Where to put the pointer of a new CT action.
12444  *
12445  * @return
12446  *   The CT actions pool pointer and @p ct_free is set on success,
12447  *   NULL otherwise and rte_errno is set.
12448  */
12449 static struct mlx5_aso_ct_pool *
12450 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12451                        struct mlx5_aso_ct_action **ct_free)
12452 {
12453         struct mlx5_priv *priv = dev->data->dev_private;
12454         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12455         struct mlx5_aso_ct_pool *pool = NULL;
12456         struct mlx5_devx_obj *obj = NULL;
12457         uint32_t i;
12458         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12459
12460         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12461                                                           priv->sh->cdev->pdn,
12462                                                           log_obj_size);
12463         if (!obj) {
12464                 rte_errno = ENODATA;
12465                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12466                 return NULL;
12467         }
12468         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12469         if (!pool) {
12470                 rte_errno = ENOMEM;
12471                 claim_zero(mlx5_devx_cmd_destroy(obj));
12472                 return NULL;
12473         }
12474         pool->devx_obj = obj;
12475         pool->index = mng->next;
12476         /* Resize pools array if there is no room for the new pool in it. */
12477         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12478                 claim_zero(mlx5_devx_cmd_destroy(obj));
12479                 mlx5_free(pool);
12480                 return NULL;
12481         }
12482         mng->pools[pool->index] = pool;
12483         mng->next++;
12484         /* Assign the first action in the new pool, the rest go to free list. */
12485         *ct_free = &pool->actions[0];
12486         /* Lock outside, the list operation is safe here. */
12487         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12488                 /* refcnt is 0 when allocating the memory. */
12489                 pool->actions[i].offset = i;
12490                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12491         }
12492         return pool;
12493 }
12494
12495 /*
12496  * Allocate a ASO CT action from free list.
12497  *
12498  * @param[in] dev
12499  *   Pointer to the Ethernet device structure.
12500  * @param[out] error
12501  *   Pointer to the error structure.
12502  *
12503  * @return
12504  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12505  */
12506 static uint32_t
12507 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12508 {
12509         struct mlx5_priv *priv = dev->data->dev_private;
12510         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12511         struct mlx5_aso_ct_action *ct = NULL;
12512         struct mlx5_aso_ct_pool *pool;
12513         uint8_t reg_c;
12514         uint32_t ct_idx;
12515
12516         MLX5_ASSERT(mng);
12517         if (!priv->sh->devx) {
12518                 rte_errno = ENOTSUP;
12519                 return 0;
12520         }
12521         /* Get a free CT action, if no, a new pool will be created. */
12522         rte_spinlock_lock(&mng->ct_sl);
12523         ct = LIST_FIRST(&mng->free_cts);
12524         if (ct) {
12525                 LIST_REMOVE(ct, next);
12526         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12527                 rte_spinlock_unlock(&mng->ct_sl);
12528                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12529                                    NULL, "failed to create ASO CT pool");
12530                 return 0;
12531         }
12532         rte_spinlock_unlock(&mng->ct_sl);
12533         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12534         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12535         /* 0: inactive, 1: created, 2+: used by flows. */
12536         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12537         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12538         if (!ct->dr_action_orig) {
12539 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12540                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12541                         (priv->sh->rx_domain, pool->devx_obj->obj,
12542                          ct->offset,
12543                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12544                          reg_c - REG_C_0);
12545 #else
12546                 RTE_SET_USED(reg_c);
12547 #endif
12548                 if (!ct->dr_action_orig) {
12549                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12550                         rte_flow_error_set(error, rte_errno,
12551                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12552                                            "failed to create ASO CT action");
12553                         return 0;
12554                 }
12555         }
12556         if (!ct->dr_action_rply) {
12557 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12558                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12559                         (priv->sh->rx_domain, pool->devx_obj->obj,
12560                          ct->offset,
12561                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12562                          reg_c - REG_C_0);
12563 #endif
12564                 if (!ct->dr_action_rply) {
12565                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12566                         rte_flow_error_set(error, rte_errno,
12567                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12568                                            "failed to create ASO CT action");
12569                         return 0;
12570                 }
12571         }
12572         return ct_idx;
12573 }
12574
12575 /*
12576  * Create a conntrack object with context and actions by using ASO mechanism.
12577  *
12578  * @param[in] dev
12579  *   Pointer to rte_eth_dev structure.
12580  * @param[in] pro
12581  *   Pointer to conntrack information profile.
12582  * @param[out] error
12583  *   Pointer to the error structure.
12584  *
12585  * @return
12586  *   Index to conntrack object on success, 0 otherwise.
12587  */
12588 static uint32_t
12589 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12590                                    const struct rte_flow_action_conntrack *pro,
12591                                    struct rte_flow_error *error)
12592 {
12593         struct mlx5_priv *priv = dev->data->dev_private;
12594         struct mlx5_dev_ctx_shared *sh = priv->sh;
12595         struct mlx5_aso_ct_action *ct;
12596         uint32_t idx;
12597
12598         if (!sh->ct_aso_en)
12599                 return rte_flow_error_set(error, ENOTSUP,
12600                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12601                                           "Connection is not supported");
12602         idx = flow_dv_aso_ct_alloc(dev, error);
12603         if (!idx)
12604                 return rte_flow_error_set(error, rte_errno,
12605                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12606                                           "Failed to allocate CT object");
12607         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12608         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12609                 return rte_flow_error_set(error, EBUSY,
12610                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12611                                           "Failed to update CT");
12612         ct->is_original = !!pro->is_original_dir;
12613         ct->peer = pro->peer_port;
12614         return idx;
12615 }
12616
12617 /**
12618  * Fill the flow with DV spec, lock free
12619  * (mutex should be acquired by caller).
12620  *
12621  * @param[in] dev
12622  *   Pointer to rte_eth_dev structure.
12623  * @param[in, out] dev_flow
12624  *   Pointer to the sub flow.
12625  * @param[in] attr
12626  *   Pointer to the flow attributes.
12627  * @param[in] items
12628  *   Pointer to the list of items.
12629  * @param[in] actions
12630  *   Pointer to the list of actions.
12631  * @param[out] error
12632  *   Pointer to the error structure.
12633  *
12634  * @return
12635  *   0 on success, a negative errno value otherwise and rte_errno is set.
12636  */
12637 static int
12638 flow_dv_translate(struct rte_eth_dev *dev,
12639                   struct mlx5_flow *dev_flow,
12640                   const struct rte_flow_attr *attr,
12641                   const struct rte_flow_item items[],
12642                   const struct rte_flow_action actions[],
12643                   struct rte_flow_error *error)
12644 {
12645         struct mlx5_priv *priv = dev->data->dev_private;
12646         struct mlx5_dev_config *dev_conf = &priv->config;
12647         struct rte_flow *flow = dev_flow->flow;
12648         struct mlx5_flow_handle *handle = dev_flow->handle;
12649         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12650         struct mlx5_flow_rss_desc *rss_desc;
12651         uint64_t item_flags = 0;
12652         uint64_t last_item = 0;
12653         uint64_t action_flags = 0;
12654         struct mlx5_flow_dv_matcher matcher = {
12655                 .mask = {
12656                         .size = sizeof(matcher.mask.buf),
12657                 },
12658         };
12659         int actions_n = 0;
12660         bool actions_end = false;
12661         union {
12662                 struct mlx5_flow_dv_modify_hdr_resource res;
12663                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12664                             sizeof(struct mlx5_modification_cmd) *
12665                             (MLX5_MAX_MODIFY_NUM + 1)];
12666         } mhdr_dummy;
12667         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12668         const struct rte_flow_action_count *count = NULL;
12669         const struct rte_flow_action_age *non_shared_age = NULL;
12670         union flow_dv_attr flow_attr = { .attr = 0 };
12671         uint32_t tag_be;
12672         union mlx5_flow_tbl_key tbl_key;
12673         uint32_t modify_action_position = UINT32_MAX;
12674         void *match_mask = matcher.mask.buf;
12675         void *match_value = dev_flow->dv.value.buf;
12676         uint8_t next_protocol = 0xff;
12677         struct rte_vlan_hdr vlan = { 0 };
12678         struct mlx5_flow_dv_dest_array_resource mdest_res;
12679         struct mlx5_flow_dv_sample_resource sample_res;
12680         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12681         const struct rte_flow_action_sample *sample = NULL;
12682         struct mlx5_flow_sub_actions_list *sample_act;
12683         uint32_t sample_act_pos = UINT32_MAX;
12684         uint32_t age_act_pos = UINT32_MAX;
12685         uint32_t num_of_dest = 0;
12686         int tmp_actions_n = 0;
12687         uint32_t table;
12688         int ret = 0;
12689         const struct mlx5_flow_tunnel *tunnel = NULL;
12690         struct flow_grp_info grp_info = {
12691                 .external = !!dev_flow->external,
12692                 .transfer = !!attr->transfer,
12693                 .fdb_def_rule = !!priv->fdb_def_rule,
12694                 .skip_scale = dev_flow->skip_scale &
12695                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12696                 .std_tbl_fix = true,
12697         };
12698         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
12699         const struct rte_flow_item *tunnel_item = NULL;
12700
12701         if (!wks)
12702                 return rte_flow_error_set(error, ENOMEM,
12703                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12704                                           NULL,
12705                                           "failed to push flow workspace");
12706         rss_desc = &wks->rss_desc;
12707         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12708         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12709         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12710                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12711         /* update normal path action resource into last index of array */
12712         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12713         if (is_tunnel_offload_active(dev)) {
12714                 if (dev_flow->tunnel) {
12715                         RTE_VERIFY(dev_flow->tof_type ==
12716                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12717                         tunnel = dev_flow->tunnel;
12718                 } else {
12719                         tunnel = mlx5_get_tof(items, actions,
12720                                               &dev_flow->tof_type);
12721                         dev_flow->tunnel = tunnel;
12722                 }
12723                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12724                                         (dev, attr, tunnel, dev_flow->tof_type);
12725         }
12726         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12727                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12728         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12729                                        &grp_info, error);
12730         if (ret)
12731                 return ret;
12732         dev_flow->dv.group = table;
12733         if (attr->transfer)
12734                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12735         /* number of actions must be set to 0 in case of dirty stack. */
12736         mhdr_res->actions_num = 0;
12737         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12738                 /*
12739                  * do not add decap action if match rule drops packet
12740                  * HW rejects rules with decap & drop
12741                  *
12742                  * if tunnel match rule was inserted before matching tunnel set
12743                  * rule flow table used in the match rule must be registered.
12744                  * current implementation handles that in the
12745                  * flow_dv_match_register() at the function end.
12746                  */
12747                 bool add_decap = true;
12748                 const struct rte_flow_action *ptr = actions;
12749
12750                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12751                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12752                                 add_decap = false;
12753                                 break;
12754                         }
12755                 }
12756                 if (add_decap) {
12757                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12758                                                            attr->transfer,
12759                                                            error))
12760                                 return -rte_errno;
12761                         dev_flow->dv.actions[actions_n++] =
12762                                         dev_flow->dv.encap_decap->action;
12763                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12764                 }
12765         }
12766         for (; !actions_end ; actions++) {
12767                 const struct rte_flow_action_queue *queue;
12768                 const struct rte_flow_action_rss *rss;
12769                 const struct rte_flow_action *action = actions;
12770                 const uint8_t *rss_key;
12771                 struct mlx5_flow_tbl_resource *tbl;
12772                 struct mlx5_aso_age_action *age_act;
12773                 struct mlx5_flow_counter *cnt_act;
12774                 uint32_t port_id = 0;
12775                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12776                 int action_type = actions->type;
12777                 const struct rte_flow_action *found_action = NULL;
12778                 uint32_t jump_group = 0;
12779                 uint32_t owner_idx;
12780                 struct mlx5_aso_ct_action *ct;
12781
12782                 if (!mlx5_flow_os_action_supported(action_type))
12783                         return rte_flow_error_set(error, ENOTSUP,
12784                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12785                                                   actions,
12786                                                   "action not supported");
12787                 switch (action_type) {
12788                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12789                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12790                         break;
12791                 case RTE_FLOW_ACTION_TYPE_VOID:
12792                         break;
12793                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12794                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12795                         if (flow_dv_translate_action_port_id(dev, action,
12796                                                              &port_id, error))
12797                                 return -rte_errno;
12798                         port_id_resource.port_id = port_id;
12799                         MLX5_ASSERT(!handle->rix_port_id_action);
12800                         if (flow_dv_port_id_action_resource_register
12801                             (dev, &port_id_resource, dev_flow, error))
12802                                 return -rte_errno;
12803                         dev_flow->dv.actions[actions_n++] =
12804                                         dev_flow->dv.port_id_action->action;
12805                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12806                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12807                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12808                         num_of_dest++;
12809                         break;
12810                 case RTE_FLOW_ACTION_TYPE_FLAG:
12811                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12812                         dev_flow->handle->mark = 1;
12813                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12814                                 struct rte_flow_action_mark mark = {
12815                                         .id = MLX5_FLOW_MARK_DEFAULT,
12816                                 };
12817
12818                                 if (flow_dv_convert_action_mark(dev, &mark,
12819                                                                 mhdr_res,
12820                                                                 error))
12821                                         return -rte_errno;
12822                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12823                                 break;
12824                         }
12825                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12826                         /*
12827                          * Only one FLAG or MARK is supported per device flow
12828                          * right now. So the pointer to the tag resource must be
12829                          * zero before the register process.
12830                          */
12831                         MLX5_ASSERT(!handle->dvh.rix_tag);
12832                         if (flow_dv_tag_resource_register(dev, tag_be,
12833                                                           dev_flow, error))
12834                                 return -rte_errno;
12835                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12836                         dev_flow->dv.actions[actions_n++] =
12837                                         dev_flow->dv.tag_resource->action;
12838                         break;
12839                 case RTE_FLOW_ACTION_TYPE_MARK:
12840                         action_flags |= MLX5_FLOW_ACTION_MARK;
12841                         dev_flow->handle->mark = 1;
12842                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12843                                 const struct rte_flow_action_mark *mark =
12844                                         (const struct rte_flow_action_mark *)
12845                                                 actions->conf;
12846
12847                                 if (flow_dv_convert_action_mark(dev, mark,
12848                                                                 mhdr_res,
12849                                                                 error))
12850                                         return -rte_errno;
12851                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12852                                 break;
12853                         }
12854                         /* Fall-through */
12855                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12856                         /* Legacy (non-extensive) MARK action. */
12857                         tag_be = mlx5_flow_mark_set
12858                               (((const struct rte_flow_action_mark *)
12859                                (actions->conf))->id);
12860                         MLX5_ASSERT(!handle->dvh.rix_tag);
12861                         if (flow_dv_tag_resource_register(dev, tag_be,
12862                                                           dev_flow, error))
12863                                 return -rte_errno;
12864                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12865                         dev_flow->dv.actions[actions_n++] =
12866                                         dev_flow->dv.tag_resource->action;
12867                         break;
12868                 case RTE_FLOW_ACTION_TYPE_SET_META:
12869                         if (flow_dv_convert_action_set_meta
12870                                 (dev, mhdr_res, attr,
12871                                  (const struct rte_flow_action_set_meta *)
12872                                   actions->conf, error))
12873                                 return -rte_errno;
12874                         action_flags |= MLX5_FLOW_ACTION_SET_META;
12875                         break;
12876                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12877                         if (flow_dv_convert_action_set_tag
12878                                 (dev, mhdr_res,
12879                                  (const struct rte_flow_action_set_tag *)
12880                                   actions->conf, error))
12881                                 return -rte_errno;
12882                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12883                         break;
12884                 case RTE_FLOW_ACTION_TYPE_DROP:
12885                         action_flags |= MLX5_FLOW_ACTION_DROP;
12886                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12887                         break;
12888                 case RTE_FLOW_ACTION_TYPE_QUEUE:
12889                         queue = actions->conf;
12890                         rss_desc->queue_num = 1;
12891                         rss_desc->queue[0] = queue->index;
12892                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
12893                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12894                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12895                         num_of_dest++;
12896                         break;
12897                 case RTE_FLOW_ACTION_TYPE_RSS:
12898                         rss = actions->conf;
12899                         memcpy(rss_desc->queue, rss->queue,
12900                                rss->queue_num * sizeof(uint16_t));
12901                         rss_desc->queue_num = rss->queue_num;
12902                         /* NULL RSS key indicates default RSS key. */
12903                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
12904                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12905                         /*
12906                          * rss->level and rss.types should be set in advance
12907                          * when expanding items for RSS.
12908                          */
12909                         action_flags |= MLX5_FLOW_ACTION_RSS;
12910                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
12911                                 MLX5_FLOW_FATE_SHARED_RSS :
12912                                 MLX5_FLOW_FATE_QUEUE;
12913                         break;
12914                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12915                         owner_idx = (uint32_t)(uintptr_t)action->conf;
12916                         age_act = flow_aso_age_get_by_idx(dev, owner_idx);
12917                         if (flow->age == 0) {
12918                                 flow->age = owner_idx;
12919                                 __atomic_fetch_add(&age_act->refcnt, 1,
12920                                                    __ATOMIC_RELAXED);
12921                         }
12922                         age_act_pos = actions_n++;
12923                         action_flags |= MLX5_FLOW_ACTION_AGE;
12924                         break;
12925                 case RTE_FLOW_ACTION_TYPE_AGE:
12926                         non_shared_age = action->conf;
12927                         age_act_pos = actions_n++;
12928                         action_flags |= MLX5_FLOW_ACTION_AGE;
12929                         break;
12930                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12931                         owner_idx = (uint32_t)(uintptr_t)action->conf;
12932                         cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
12933                                                              NULL);
12934                         MLX5_ASSERT(cnt_act != NULL);
12935                         /**
12936                          * When creating meter drop flow in drop table, the
12937                          * counter should not overwrite the rte flow counter.
12938                          */
12939                         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
12940                             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
12941                                 dev_flow->dv.actions[actions_n++] =
12942                                                         cnt_act->action;
12943                         } else {
12944                                 if (flow->counter == 0) {
12945                                         flow->counter = owner_idx;
12946                                         __atomic_fetch_add
12947                                                 (&cnt_act->shared_info.refcnt,
12948                                                  1, __ATOMIC_RELAXED);
12949                                 }
12950                                 /* Save information first, will apply later. */
12951                                 action_flags |= MLX5_FLOW_ACTION_COUNT;
12952                         }
12953                         break;
12954                 case RTE_FLOW_ACTION_TYPE_COUNT:
12955                         if (!priv->sh->devx) {
12956                                 return rte_flow_error_set
12957                                               (error, ENOTSUP,
12958                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12959                                                NULL,
12960                                                "count action not supported");
12961                         }
12962                         /* Save information first, will apply later. */
12963                         count = action->conf;
12964                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12965                         break;
12966                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12967                         dev_flow->dv.actions[actions_n++] =
12968                                                 priv->sh->pop_vlan_action;
12969                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12970                         break;
12971                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12972                         if (!(action_flags &
12973                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12974                                 flow_dev_get_vlan_info_from_items(items, &vlan);
12975                         vlan.eth_proto = rte_be_to_cpu_16
12976                              ((((const struct rte_flow_action_of_push_vlan *)
12977                                                    actions->conf)->ethertype));
12978                         found_action = mlx5_flow_find_action
12979                                         (actions + 1,
12980                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12981                         if (found_action)
12982                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12983                         found_action = mlx5_flow_find_action
12984                                         (actions + 1,
12985                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12986                         if (found_action)
12987                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12988                         if (flow_dv_create_action_push_vlan
12989                                             (dev, attr, &vlan, dev_flow, error))
12990                                 return -rte_errno;
12991                         dev_flow->dv.actions[actions_n++] =
12992                                         dev_flow->dv.push_vlan_res->action;
12993                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12994                         break;
12995                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12996                         /* of_vlan_push action handled this action */
12997                         MLX5_ASSERT(action_flags &
12998                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12999                         break;
13000                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
13001                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
13002                                 break;
13003                         flow_dev_get_vlan_info_from_items(items, &vlan);
13004                         mlx5_update_vlan_vid_pcp(actions, &vlan);
13005                         /* If no VLAN push - this is a modify header action */
13006                         if (flow_dv_convert_action_modify_vlan_vid
13007                                                 (mhdr_res, actions, error))
13008                                 return -rte_errno;
13009                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
13010                         break;
13011                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
13012                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
13013                         if (flow_dv_create_action_l2_encap(dev, actions,
13014                                                            dev_flow,
13015                                                            attr->transfer,
13016                                                            error))
13017                                 return -rte_errno;
13018                         dev_flow->dv.actions[actions_n++] =
13019                                         dev_flow->dv.encap_decap->action;
13020                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13021                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13022                                 sample_act->action_flags |=
13023                                                         MLX5_FLOW_ACTION_ENCAP;
13024                         break;
13025                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
13026                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
13027                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
13028                                                            attr->transfer,
13029                                                            error))
13030                                 return -rte_errno;
13031                         dev_flow->dv.actions[actions_n++] =
13032                                         dev_flow->dv.encap_decap->action;
13033                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13034                         break;
13035                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
13036                         /* Handle encap with preceding decap. */
13037                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
13038                                 if (flow_dv_create_action_raw_encap
13039                                         (dev, actions, dev_flow, attr, error))
13040                                         return -rte_errno;
13041                                 dev_flow->dv.actions[actions_n++] =
13042                                         dev_flow->dv.encap_decap->action;
13043                         } else {
13044                                 /* Handle encap without preceding decap. */
13045                                 if (flow_dv_create_action_l2_encap
13046                                     (dev, actions, dev_flow, attr->transfer,
13047                                      error))
13048                                         return -rte_errno;
13049                                 dev_flow->dv.actions[actions_n++] =
13050                                         dev_flow->dv.encap_decap->action;
13051                         }
13052                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13053                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13054                                 sample_act->action_flags |=
13055                                                         MLX5_FLOW_ACTION_ENCAP;
13056                         break;
13057                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
13058                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
13059                                 ;
13060                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
13061                                 if (flow_dv_create_action_l2_decap
13062                                     (dev, dev_flow, attr->transfer, error))
13063                                         return -rte_errno;
13064                                 dev_flow->dv.actions[actions_n++] =
13065                                         dev_flow->dv.encap_decap->action;
13066                         }
13067                         /* If decap is followed by encap, handle it at encap. */
13068                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13069                         break;
13070                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
13071                         dev_flow->dv.actions[actions_n++] =
13072                                 (void *)(uintptr_t)action->conf;
13073                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13074                         break;
13075                 case RTE_FLOW_ACTION_TYPE_JUMP:
13076                         jump_group = ((const struct rte_flow_action_jump *)
13077                                                         action->conf)->group;
13078                         grp_info.std_tbl_fix = 0;
13079                         if (dev_flow->skip_scale &
13080                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
13081                                 grp_info.skip_scale = 1;
13082                         else
13083                                 grp_info.skip_scale = 0;
13084                         ret = mlx5_flow_group_to_table(dev, tunnel,
13085                                                        jump_group,
13086                                                        &table,
13087                                                        &grp_info, error);
13088                         if (ret)
13089                                 return ret;
13090                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
13091                                                        attr->transfer,
13092                                                        !!dev_flow->external,
13093                                                        tunnel, jump_group, 0,
13094                                                        0, error);
13095                         if (!tbl)
13096                                 return rte_flow_error_set
13097                                                 (error, errno,
13098                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13099                                                  NULL,
13100                                                  "cannot create jump action.");
13101                         if (flow_dv_jump_tbl_resource_register
13102                             (dev, tbl, dev_flow, error)) {
13103                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
13104                                 return rte_flow_error_set
13105                                                 (error, errno,
13106                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13107                                                  NULL,
13108                                                  "cannot create jump action.");
13109                         }
13110                         dev_flow->dv.actions[actions_n++] =
13111                                         dev_flow->dv.jump->action;
13112                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13113                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
13114                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
13115                         num_of_dest++;
13116                         break;
13117                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
13118                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
13119                         if (flow_dv_convert_action_modify_mac
13120                                         (mhdr_res, actions, error))
13121                                 return -rte_errno;
13122                         action_flags |= actions->type ==
13123                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
13124                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
13125                                         MLX5_FLOW_ACTION_SET_MAC_DST;
13126                         break;
13127                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
13128                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
13129                         if (flow_dv_convert_action_modify_ipv4
13130                                         (mhdr_res, actions, error))
13131                                 return -rte_errno;
13132                         action_flags |= actions->type ==
13133                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13134                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
13135                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
13136                         break;
13137                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13138                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13139                         if (flow_dv_convert_action_modify_ipv6
13140                                         (mhdr_res, actions, error))
13141                                 return -rte_errno;
13142                         action_flags |= actions->type ==
13143                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13144                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
13145                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
13146                         break;
13147                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13148                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13149                         if (flow_dv_convert_action_modify_tp
13150                                         (mhdr_res, actions, items,
13151                                          &flow_attr, dev_flow, !!(action_flags &
13152                                          MLX5_FLOW_ACTION_DECAP), error))
13153                                 return -rte_errno;
13154                         action_flags |= actions->type ==
13155                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13156                                         MLX5_FLOW_ACTION_SET_TP_SRC :
13157                                         MLX5_FLOW_ACTION_SET_TP_DST;
13158                         break;
13159                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13160                         if (flow_dv_convert_action_modify_dec_ttl
13161                                         (mhdr_res, items, &flow_attr, dev_flow,
13162                                          !!(action_flags &
13163                                          MLX5_FLOW_ACTION_DECAP), error))
13164                                 return -rte_errno;
13165                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13166                         break;
13167                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13168                         if (flow_dv_convert_action_modify_ttl
13169                                         (mhdr_res, actions, items, &flow_attr,
13170                                          dev_flow, !!(action_flags &
13171                                          MLX5_FLOW_ACTION_DECAP), error))
13172                                 return -rte_errno;
13173                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13174                         break;
13175                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13176                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13177                         if (flow_dv_convert_action_modify_tcp_seq
13178                                         (mhdr_res, actions, error))
13179                                 return -rte_errno;
13180                         action_flags |= actions->type ==
13181                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13182                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
13183                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13184                         break;
13185
13186                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13187                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13188                         if (flow_dv_convert_action_modify_tcp_ack
13189                                         (mhdr_res, actions, error))
13190                                 return -rte_errno;
13191                         action_flags |= actions->type ==
13192                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13193                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
13194                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
13195                         break;
13196                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13197                         if (flow_dv_convert_action_set_reg
13198                                         (mhdr_res, actions, error))
13199                                 return -rte_errno;
13200                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13201                         break;
13202                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13203                         if (flow_dv_convert_action_copy_mreg
13204                                         (dev, mhdr_res, actions, error))
13205                                 return -rte_errno;
13206                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13207                         break;
13208                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13209                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13210                         dev_flow->handle->fate_action =
13211                                         MLX5_FLOW_FATE_DEFAULT_MISS;
13212                         break;
13213                 case RTE_FLOW_ACTION_TYPE_METER:
13214                         if (!wks->fm)
13215                                 return rte_flow_error_set(error, rte_errno,
13216                                         RTE_FLOW_ERROR_TYPE_ACTION,
13217                                         NULL, "Failed to get meter in flow.");
13218                         /* Set the meter action. */
13219                         dev_flow->dv.actions[actions_n++] =
13220                                 wks->fm->meter_action;
13221                         action_flags |= MLX5_FLOW_ACTION_METER;
13222                         break;
13223                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13224                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13225                                                               actions, error))
13226                                 return -rte_errno;
13227                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13228                         break;
13229                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13230                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13231                                                               actions, error))
13232                                 return -rte_errno;
13233                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13234                         break;
13235                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13236                         sample_act_pos = actions_n;
13237                         sample = (const struct rte_flow_action_sample *)
13238                                  action->conf;
13239                         actions_n++;
13240                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13241                         /* put encap action into group if work with port id */
13242                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13243                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13244                                 sample_act->action_flags |=
13245                                                         MLX5_FLOW_ACTION_ENCAP;
13246                         break;
13247                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13248                         if (flow_dv_convert_action_modify_field
13249                                         (dev, mhdr_res, actions, attr, error))
13250                                 return -rte_errno;
13251                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13252                         break;
13253                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13254                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13255                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13256                         if (!ct)
13257                                 return rte_flow_error_set(error, EINVAL,
13258                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13259                                                 NULL,
13260                                                 "Failed to get CT object.");
13261                         if (mlx5_aso_ct_available(priv->sh, ct))
13262                                 return rte_flow_error_set(error, rte_errno,
13263                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13264                                                 NULL,
13265                                                 "CT is unavailable.");
13266                         if (ct->is_original)
13267                                 dev_flow->dv.actions[actions_n] =
13268                                                         ct->dr_action_orig;
13269                         else
13270                                 dev_flow->dv.actions[actions_n] =
13271                                                         ct->dr_action_rply;
13272                         if (flow->ct == 0) {
13273                                 flow->indirect_type =
13274                                                 MLX5_INDIRECT_ACTION_TYPE_CT;
13275                                 flow->ct = owner_idx;
13276                                 __atomic_fetch_add(&ct->refcnt, 1,
13277                                                    __ATOMIC_RELAXED);
13278                         }
13279                         actions_n++;
13280                         action_flags |= MLX5_FLOW_ACTION_CT;
13281                         break;
13282                 case RTE_FLOW_ACTION_TYPE_END:
13283                         actions_end = true;
13284                         if (mhdr_res->actions_num) {
13285                                 /* create modify action if needed. */
13286                                 if (flow_dv_modify_hdr_resource_register
13287                                         (dev, mhdr_res, dev_flow, error))
13288                                         return -rte_errno;
13289                                 dev_flow->dv.actions[modify_action_position] =
13290                                         handle->dvh.modify_hdr->action;
13291                         }
13292                         /*
13293                          * Handle AGE and COUNT action by single HW counter
13294                          * when they are not shared.
13295                          */
13296                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
13297                                 if ((non_shared_age && count) ||
13298                                     !(priv->sh->flow_hit_aso_en &&
13299                                       (attr->group || attr->transfer))) {
13300                                         /* Creates age by counters. */
13301                                         cnt_act = flow_dv_prepare_counter
13302                                                                 (dev, dev_flow,
13303                                                                  flow, count,
13304                                                                  non_shared_age,
13305                                                                  error);
13306                                         if (!cnt_act)
13307                                                 return -rte_errno;
13308                                         dev_flow->dv.actions[age_act_pos] =
13309                                                                 cnt_act->action;
13310                                         break;
13311                                 }
13312                                 if (!flow->age && non_shared_age) {
13313                                         flow->age = flow_dv_aso_age_alloc
13314                                                                 (dev, error);
13315                                         if (!flow->age)
13316                                                 return -rte_errno;
13317                                         flow_dv_aso_age_params_init
13318                                                     (dev, flow->age,
13319                                                      non_shared_age->context ?
13320                                                      non_shared_age->context :
13321                                                      (void *)(uintptr_t)
13322                                                      (dev_flow->flow_idx),
13323                                                      non_shared_age->timeout);
13324                                 }
13325                                 age_act = flow_aso_age_get_by_idx(dev,
13326                                                                   flow->age);
13327                                 dev_flow->dv.actions[age_act_pos] =
13328                                                              age_act->dr_action;
13329                         }
13330                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13331                                 /*
13332                                  * Create one count action, to be used
13333                                  * by all sub-flows.
13334                                  */
13335                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13336                                                                   flow, count,
13337                                                                   NULL, error);
13338                                 if (!cnt_act)
13339                                         return -rte_errno;
13340                                 dev_flow->dv.actions[actions_n++] =
13341                                                                 cnt_act->action;
13342                         }
13343                 default:
13344                         break;
13345                 }
13346                 if (mhdr_res->actions_num &&
13347                     modify_action_position == UINT32_MAX)
13348                         modify_action_position = actions_n++;
13349         }
13350         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13351                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13352                 int item_type = items->type;
13353
13354                 if (!mlx5_flow_os_item_supported(item_type))
13355                         return rte_flow_error_set(error, ENOTSUP,
13356                                                   RTE_FLOW_ERROR_TYPE_ITEM,
13357                                                   NULL, "item not supported");
13358                 switch (item_type) {
13359                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13360                         flow_dv_translate_item_port_id
13361                                 (dev, match_mask, match_value, items, attr);
13362                         last_item = MLX5_FLOW_ITEM_PORT_ID;
13363                         break;
13364                 case RTE_FLOW_ITEM_TYPE_ETH:
13365                         flow_dv_translate_item_eth(match_mask, match_value,
13366                                                    items, tunnel,
13367                                                    dev_flow->dv.group);
13368                         matcher.priority = action_flags &
13369                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
13370                                         !dev_flow->external ?
13371                                         MLX5_PRIORITY_MAP_L3 :
13372                                         MLX5_PRIORITY_MAP_L2;
13373                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13374                                              MLX5_FLOW_LAYER_OUTER_L2;
13375                         break;
13376                 case RTE_FLOW_ITEM_TYPE_VLAN:
13377                         flow_dv_translate_item_vlan(dev_flow,
13378                                                     match_mask, match_value,
13379                                                     items, tunnel,
13380                                                     dev_flow->dv.group);
13381                         matcher.priority = MLX5_PRIORITY_MAP_L2;
13382                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13383                                               MLX5_FLOW_LAYER_INNER_VLAN) :
13384                                              (MLX5_FLOW_LAYER_OUTER_L2 |
13385                                               MLX5_FLOW_LAYER_OUTER_VLAN);
13386                         break;
13387                 case RTE_FLOW_ITEM_TYPE_IPV4:
13388                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13389                                                   &item_flags, &tunnel);
13390                         flow_dv_translate_item_ipv4(match_mask, match_value,
13391                                                     items, tunnel,
13392                                                     dev_flow->dv.group);
13393                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13394                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13395                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13396                         if (items->mask != NULL &&
13397                             ((const struct rte_flow_item_ipv4 *)
13398                              items->mask)->hdr.next_proto_id) {
13399                                 next_protocol =
13400                                         ((const struct rte_flow_item_ipv4 *)
13401                                          (items->spec))->hdr.next_proto_id;
13402                                 next_protocol &=
13403                                         ((const struct rte_flow_item_ipv4 *)
13404                                          (items->mask))->hdr.next_proto_id;
13405                         } else {
13406                                 /* Reset for inner layer. */
13407                                 next_protocol = 0xff;
13408                         }
13409                         break;
13410                 case RTE_FLOW_ITEM_TYPE_IPV6:
13411                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13412                                                   &item_flags, &tunnel);
13413                         flow_dv_translate_item_ipv6(match_mask, match_value,
13414                                                     items, tunnel,
13415                                                     dev_flow->dv.group);
13416                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13417                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13418                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13419                         if (items->mask != NULL &&
13420                             ((const struct rte_flow_item_ipv6 *)
13421                              items->mask)->hdr.proto) {
13422                                 next_protocol =
13423                                         ((const struct rte_flow_item_ipv6 *)
13424                                          items->spec)->hdr.proto;
13425                                 next_protocol &=
13426                                         ((const struct rte_flow_item_ipv6 *)
13427                                          items->mask)->hdr.proto;
13428                         } else {
13429                                 /* Reset for inner layer. */
13430                                 next_protocol = 0xff;
13431                         }
13432                         break;
13433                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13434                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
13435                                                              match_value,
13436                                                              items, tunnel);
13437                         last_item = tunnel ?
13438                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13439                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13440                         if (items->mask != NULL &&
13441                             ((const struct rte_flow_item_ipv6_frag_ext *)
13442                              items->mask)->hdr.next_header) {
13443                                 next_protocol =
13444                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13445                                  items->spec)->hdr.next_header;
13446                                 next_protocol &=
13447                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13448                                  items->mask)->hdr.next_header;
13449                         } else {
13450                                 /* Reset for inner layer. */
13451                                 next_protocol = 0xff;
13452                         }
13453                         break;
13454                 case RTE_FLOW_ITEM_TYPE_TCP:
13455                         flow_dv_translate_item_tcp(match_mask, match_value,
13456                                                    items, tunnel);
13457                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13458                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13459                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
13460                         break;
13461                 case RTE_FLOW_ITEM_TYPE_UDP:
13462                         flow_dv_translate_item_udp(match_mask, match_value,
13463                                                    items, tunnel);
13464                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13465                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13466                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
13467                         break;
13468                 case RTE_FLOW_ITEM_TYPE_GRE:
13469                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13470                         last_item = MLX5_FLOW_LAYER_GRE;
13471                         tunnel_item = items;
13472                         break;
13473                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13474                         flow_dv_translate_item_gre_key(match_mask,
13475                                                        match_value, items);
13476                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
13477                         break;
13478                 case RTE_FLOW_ITEM_TYPE_NVGRE:
13479                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13480                         last_item = MLX5_FLOW_LAYER_GRE;
13481                         tunnel_item = items;
13482                         break;
13483                 case RTE_FLOW_ITEM_TYPE_VXLAN:
13484                         flow_dv_translate_item_vxlan(dev, attr,
13485                                                      match_mask, match_value,
13486                                                      items, tunnel);
13487                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13488                         last_item = MLX5_FLOW_LAYER_VXLAN;
13489                         break;
13490                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13491                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13492                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13493                         tunnel_item = items;
13494                         break;
13495                 case RTE_FLOW_ITEM_TYPE_GENEVE:
13496                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13497                         last_item = MLX5_FLOW_LAYER_GENEVE;
13498                         tunnel_item = items;
13499                         break;
13500                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13501                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13502                                                           match_value,
13503                                                           items, error);
13504                         if (ret)
13505                                 return rte_flow_error_set(error, -ret,
13506                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13507                                         "cannot create GENEVE TLV option");
13508                         flow->geneve_tlv_option = 1;
13509                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13510                         break;
13511                 case RTE_FLOW_ITEM_TYPE_MPLS:
13512                         flow_dv_translate_item_mpls(match_mask, match_value,
13513                                                     items, last_item, tunnel);
13514                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13515                         last_item = MLX5_FLOW_LAYER_MPLS;
13516                         break;
13517                 case RTE_FLOW_ITEM_TYPE_MARK:
13518                         flow_dv_translate_item_mark(dev, match_mask,
13519                                                     match_value, items);
13520                         last_item = MLX5_FLOW_ITEM_MARK;
13521                         break;
13522                 case RTE_FLOW_ITEM_TYPE_META:
13523                         flow_dv_translate_item_meta(dev, match_mask,
13524                                                     match_value, attr, items);
13525                         last_item = MLX5_FLOW_ITEM_METADATA;
13526                         break;
13527                 case RTE_FLOW_ITEM_TYPE_ICMP:
13528                         flow_dv_translate_item_icmp(match_mask, match_value,
13529                                                     items, tunnel);
13530                         last_item = MLX5_FLOW_LAYER_ICMP;
13531                         break;
13532                 case RTE_FLOW_ITEM_TYPE_ICMP6:
13533                         flow_dv_translate_item_icmp6(match_mask, match_value,
13534                                                       items, tunnel);
13535                         last_item = MLX5_FLOW_LAYER_ICMP6;
13536                         break;
13537                 case RTE_FLOW_ITEM_TYPE_TAG:
13538                         flow_dv_translate_item_tag(dev, match_mask,
13539                                                    match_value, items);
13540                         last_item = MLX5_FLOW_ITEM_TAG;
13541                         break;
13542                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13543                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
13544                                                         match_value, items);
13545                         last_item = MLX5_FLOW_ITEM_TAG;
13546                         break;
13547                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13548                         flow_dv_translate_item_tx_queue(dev, match_mask,
13549                                                         match_value,
13550                                                         items);
13551                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13552                         break;
13553                 case RTE_FLOW_ITEM_TYPE_GTP:
13554                         flow_dv_translate_item_gtp(match_mask, match_value,
13555                                                    items, tunnel);
13556                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13557                         last_item = MLX5_FLOW_LAYER_GTP;
13558                         break;
13559                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13560                         ret = flow_dv_translate_item_gtp_psc(match_mask,
13561                                                           match_value,
13562                                                           items);
13563                         if (ret)
13564                                 return rte_flow_error_set(error, -ret,
13565                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13566                                         "cannot create GTP PSC item");
13567                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
13568                         break;
13569                 case RTE_FLOW_ITEM_TYPE_ECPRI:
13570                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
13571                                 /* Create it only the first time to be used. */
13572                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
13573                                 if (ret)
13574                                         return rte_flow_error_set
13575                                                 (error, -ret,
13576                                                 RTE_FLOW_ERROR_TYPE_ITEM,
13577                                                 NULL,
13578                                                 "cannot create eCPRI parser");
13579                         }
13580                         flow_dv_translate_item_ecpri(dev, match_mask,
13581                                                      match_value, items,
13582                                                      last_item);
13583                         /* No other protocol should follow eCPRI layer. */
13584                         last_item = MLX5_FLOW_LAYER_ECPRI;
13585                         break;
13586                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13587                         flow_dv_translate_item_integrity(items, integrity_items,
13588                                                          &last_item);
13589                         break;
13590                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13591                         flow_dv_translate_item_aso_ct(dev, match_mask,
13592                                                       match_value, items);
13593                         break;
13594                 case RTE_FLOW_ITEM_TYPE_FLEX:
13595                         flow_dv_translate_item_flex(dev, match_mask,
13596                                                     match_value, items,
13597                                                     dev_flow, tunnel != 0);
13598                         last_item = tunnel ? MLX5_FLOW_ITEM_INNER_FLEX :
13599                                     MLX5_FLOW_ITEM_OUTER_FLEX;
13600                         break;
13601                 default:
13602                         break;
13603                 }
13604                 item_flags |= last_item;
13605         }
13606         /*
13607          * When E-Switch mode is enabled, we have two cases where we need to
13608          * set the source port manually.
13609          * The first one, is in case of Nic steering rule, and the second is
13610          * E-Switch rule where no port_id item was found. In both cases
13611          * the source port is set according the current port in use.
13612          */
13613         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13614             (priv->representor || priv->master)) {
13615                 if (flow_dv_translate_item_port_id(dev, match_mask,
13616                                                    match_value, NULL, attr))
13617                         return -rte_errno;
13618         }
13619         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
13620                 flow_dv_translate_item_integrity_post(match_mask, match_value,
13621                                                       integrity_items,
13622                                                       item_flags);
13623         }
13624         if (item_flags & MLX5_FLOW_LAYER_VXLAN_GPE)
13625                 flow_dv_translate_item_vxlan_gpe(match_mask, match_value,
13626                                                  tunnel_item, item_flags);
13627         else if (item_flags & MLX5_FLOW_LAYER_GENEVE)
13628                 flow_dv_translate_item_geneve(match_mask, match_value,
13629                                               tunnel_item, item_flags);
13630         else if (item_flags & MLX5_FLOW_LAYER_GRE) {
13631                 if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_GRE)
13632                         flow_dv_translate_item_gre(match_mask, match_value,
13633                                                    tunnel_item, item_flags);
13634                 else if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_NVGRE)
13635                         flow_dv_translate_item_nvgre(match_mask, match_value,
13636                                                      tunnel_item, item_flags);
13637                 else
13638                         MLX5_ASSERT(false);
13639         }
13640 #ifdef RTE_LIBRTE_MLX5_DEBUG
13641         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13642                                               dev_flow->dv.value.buf));
13643 #endif
13644         /*
13645          * Layers may be already initialized from prefix flow if this dev_flow
13646          * is the suffix flow.
13647          */
13648         handle->layers |= item_flags;
13649         if (action_flags & MLX5_FLOW_ACTION_RSS)
13650                 flow_dv_hashfields_set(dev_flow, rss_desc);
13651         /* If has RSS action in the sample action, the Sample/Mirror resource
13652          * should be registered after the hash filed be update.
13653          */
13654         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13655                 ret = flow_dv_translate_action_sample(dev,
13656                                                       sample,
13657                                                       dev_flow, attr,
13658                                                       &num_of_dest,
13659                                                       sample_actions,
13660                                                       &sample_res,
13661                                                       error);
13662                 if (ret < 0)
13663                         return ret;
13664                 ret = flow_dv_create_action_sample(dev,
13665                                                    dev_flow,
13666                                                    num_of_dest,
13667                                                    &sample_res,
13668                                                    &mdest_res,
13669                                                    sample_actions,
13670                                                    action_flags,
13671                                                    error);
13672                 if (ret < 0)
13673                         return rte_flow_error_set
13674                                                 (error, rte_errno,
13675                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13676                                                 NULL,
13677                                                 "cannot create sample action");
13678                 if (num_of_dest > 1) {
13679                         dev_flow->dv.actions[sample_act_pos] =
13680                         dev_flow->dv.dest_array_res->action;
13681                 } else {
13682                         dev_flow->dv.actions[sample_act_pos] =
13683                         dev_flow->dv.sample_res->verbs_action;
13684                 }
13685         }
13686         /*
13687          * For multiple destination (sample action with ratio=1), the encap
13688          * action and port id action will be combined into group action.
13689          * So need remove the original these actions in the flow and only
13690          * use the sample action instead of.
13691          */
13692         if (num_of_dest > 1 &&
13693             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13694                 int i;
13695                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13696
13697                 for (i = 0; i < actions_n; i++) {
13698                         if ((sample_act->dr_encap_action &&
13699                                 sample_act->dr_encap_action ==
13700                                 dev_flow->dv.actions[i]) ||
13701                                 (sample_act->dr_port_id_action &&
13702                                 sample_act->dr_port_id_action ==
13703                                 dev_flow->dv.actions[i]) ||
13704                                 (sample_act->dr_jump_action &&
13705                                 sample_act->dr_jump_action ==
13706                                 dev_flow->dv.actions[i]))
13707                                 continue;
13708                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13709                 }
13710                 memcpy((void *)dev_flow->dv.actions,
13711                                 (void *)temp_actions,
13712                                 tmp_actions_n * sizeof(void *));
13713                 actions_n = tmp_actions_n;
13714         }
13715         dev_flow->dv.actions_n = actions_n;
13716         dev_flow->act_flags = action_flags;
13717         if (wks->skip_matcher_reg)
13718                 return 0;
13719         /* Register matcher. */
13720         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13721                                     matcher.mask.size);
13722         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13723                                                      matcher.priority,
13724                                                      dev_flow->external);
13725         /**
13726          * When creating meter drop flow in drop table, using original
13727          * 5-tuple match, the matcher priority should be lower than
13728          * mtr_id matcher.
13729          */
13730         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13731             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13732             matcher.priority <= MLX5_REG_BITS)
13733                 matcher.priority += MLX5_REG_BITS;
13734         /* reserved field no needs to be set to 0 here. */
13735         tbl_key.is_fdb = attr->transfer;
13736         tbl_key.is_egress = attr->egress;
13737         tbl_key.level = dev_flow->dv.group;
13738         tbl_key.id = dev_flow->dv.table_id;
13739         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13740                                      tunnel, attr->group, error))
13741                 return -rte_errno;
13742         return 0;
13743 }
13744
13745 /**
13746  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13747  * and tunnel.
13748  *
13749  * @param[in, out] action
13750  *   Shred RSS action holding hash RX queue objects.
13751  * @param[in] hash_fields
13752  *   Defines combination of packet fields to participate in RX hash.
13753  * @param[in] tunnel
13754  *   Tunnel type
13755  * @param[in] hrxq_idx
13756  *   Hash RX queue index to set.
13757  *
13758  * @return
13759  *   0 on success, otherwise negative errno value.
13760  */
13761 static int
13762 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13763                               const uint64_t hash_fields,
13764                               uint32_t hrxq_idx)
13765 {
13766         uint32_t *hrxqs = action->hrxq;
13767
13768         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13769         case MLX5_RSS_HASH_IPV4:
13770                 /* fall-through. */
13771         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13772                 /* fall-through. */
13773         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13774                 hrxqs[0] = hrxq_idx;
13775                 return 0;
13776         case MLX5_RSS_HASH_IPV4_TCP:
13777                 /* fall-through. */
13778         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13779                 /* fall-through. */
13780         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13781                 hrxqs[1] = hrxq_idx;
13782                 return 0;
13783         case MLX5_RSS_HASH_IPV4_UDP:
13784                 /* fall-through. */
13785         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13786                 /* fall-through. */
13787         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13788                 hrxqs[2] = hrxq_idx;
13789                 return 0;
13790         case MLX5_RSS_HASH_IPV6:
13791                 /* fall-through. */
13792         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13793                 /* fall-through. */
13794         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13795                 hrxqs[3] = hrxq_idx;
13796                 return 0;
13797         case MLX5_RSS_HASH_IPV6_TCP:
13798                 /* fall-through. */
13799         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13800                 /* fall-through. */
13801         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13802                 hrxqs[4] = hrxq_idx;
13803                 return 0;
13804         case MLX5_RSS_HASH_IPV6_UDP:
13805                 /* fall-through. */
13806         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13807                 /* fall-through. */
13808         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13809                 hrxqs[5] = hrxq_idx;
13810                 return 0;
13811         case MLX5_RSS_HASH_NONE:
13812                 hrxqs[6] = hrxq_idx;
13813                 return 0;
13814         default:
13815                 return -1;
13816         }
13817 }
13818
13819 /**
13820  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13821  * and tunnel.
13822  *
13823  * @param[in] dev
13824  *   Pointer to the Ethernet device structure.
13825  * @param[in] idx
13826  *   Shared RSS action ID holding hash RX queue objects.
13827  * @param[in] hash_fields
13828  *   Defines combination of packet fields to participate in RX hash.
13829  * @param[in] tunnel
13830  *   Tunnel type
13831  *
13832  * @return
13833  *   Valid hash RX queue index, otherwise 0.
13834  */
13835 static uint32_t
13836 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13837                                  const uint64_t hash_fields)
13838 {
13839         struct mlx5_priv *priv = dev->data->dev_private;
13840         struct mlx5_shared_action_rss *shared_rss =
13841             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13842         const uint32_t *hrxqs = shared_rss->hrxq;
13843
13844         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13845         case MLX5_RSS_HASH_IPV4:
13846                 /* fall-through. */
13847         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13848                 /* fall-through. */
13849         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13850                 return hrxqs[0];
13851         case MLX5_RSS_HASH_IPV4_TCP:
13852                 /* fall-through. */
13853         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13854                 /* fall-through. */
13855         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13856                 return hrxqs[1];
13857         case MLX5_RSS_HASH_IPV4_UDP:
13858                 /* fall-through. */
13859         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13860                 /* fall-through. */
13861         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13862                 return hrxqs[2];
13863         case MLX5_RSS_HASH_IPV6:
13864                 /* fall-through. */
13865         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13866                 /* fall-through. */
13867         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13868                 return hrxqs[3];
13869         case MLX5_RSS_HASH_IPV6_TCP:
13870                 /* fall-through. */
13871         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13872                 /* fall-through. */
13873         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13874                 return hrxqs[4];
13875         case MLX5_RSS_HASH_IPV6_UDP:
13876                 /* fall-through. */
13877         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13878                 /* fall-through. */
13879         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13880                 return hrxqs[5];
13881         case MLX5_RSS_HASH_NONE:
13882                 return hrxqs[6];
13883         default:
13884                 return 0;
13885         }
13886
13887 }
13888
13889 /**
13890  * Apply the flow to the NIC, lock free,
13891  * (mutex should be acquired by caller).
13892  *
13893  * @param[in] dev
13894  *   Pointer to the Ethernet device structure.
13895  * @param[in, out] flow
13896  *   Pointer to flow structure.
13897  * @param[out] error
13898  *   Pointer to error structure.
13899  *
13900  * @return
13901  *   0 on success, a negative errno value otherwise and rte_errno is set.
13902  */
13903 static int
13904 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13905               struct rte_flow_error *error)
13906 {
13907         struct mlx5_flow_dv_workspace *dv;
13908         struct mlx5_flow_handle *dh;
13909         struct mlx5_flow_handle_dv *dv_h;
13910         struct mlx5_flow *dev_flow;
13911         struct mlx5_priv *priv = dev->data->dev_private;
13912         uint32_t handle_idx;
13913         int n;
13914         int err;
13915         int idx;
13916         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13917         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13918         uint8_t misc_mask;
13919
13920         MLX5_ASSERT(wks);
13921         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13922                 dev_flow = &wks->flows[idx];
13923                 dv = &dev_flow->dv;
13924                 dh = dev_flow->handle;
13925                 dv_h = &dh->dvh;
13926                 n = dv->actions_n;
13927                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13928                         if (dv->transfer) {
13929                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13930                                 dv->actions[n++] = priv->sh->dr_drop_action;
13931                         } else {
13932 #ifdef HAVE_MLX5DV_DR
13933                                 /* DR supports drop action placeholder. */
13934                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13935                                 dv->actions[n++] = dv->group ?
13936                                         priv->sh->dr_drop_action :
13937                                         priv->root_drop_action;
13938 #else
13939                                 /* For DV we use the explicit drop queue. */
13940                                 MLX5_ASSERT(priv->drop_queue.hrxq);
13941                                 dv->actions[n++] =
13942                                                 priv->drop_queue.hrxq->action;
13943 #endif
13944                         }
13945                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13946                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13947                         struct mlx5_hrxq *hrxq;
13948                         uint32_t hrxq_idx;
13949
13950                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13951                                                     &hrxq_idx);
13952                         if (!hrxq) {
13953                                 rte_flow_error_set
13954                                         (error, rte_errno,
13955                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13956                                          "cannot get hash queue");
13957                                 goto error;
13958                         }
13959                         dh->rix_hrxq = hrxq_idx;
13960                         dv->actions[n++] = hrxq->action;
13961                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13962                         struct mlx5_hrxq *hrxq = NULL;
13963                         uint32_t hrxq_idx;
13964
13965                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13966                                                 rss_desc->shared_rss,
13967                                                 dev_flow->hash_fields);
13968                         if (hrxq_idx)
13969                                 hrxq = mlx5_ipool_get
13970                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13971                                          hrxq_idx);
13972                         if (!hrxq) {
13973                                 rte_flow_error_set
13974                                         (error, rte_errno,
13975                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13976                                          "cannot get hash queue");
13977                                 goto error;
13978                         }
13979                         dh->rix_srss = rss_desc->shared_rss;
13980                         dv->actions[n++] = hrxq->action;
13981                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13982                         if (!priv->sh->default_miss_action) {
13983                                 rte_flow_error_set
13984                                         (error, rte_errno,
13985                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13986                                          "default miss action not be created.");
13987                                 goto error;
13988                         }
13989                         dv->actions[n++] = priv->sh->default_miss_action;
13990                 }
13991                 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13992                 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13993                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13994                                                (void *)&dv->value, n,
13995                                                dv->actions, &dh->drv_flow);
13996                 if (err) {
13997                         rte_flow_error_set
13998                                 (error, errno,
13999                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14000                                 NULL,
14001                                 (!priv->config.allow_duplicate_pattern &&
14002                                 errno == EEXIST) ?
14003                                 "duplicating pattern is not allowed" :
14004                                 "hardware refuses to create flow");
14005                         goto error;
14006                 }
14007                 if (priv->vmwa_context &&
14008                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
14009                         /*
14010                          * The rule contains the VLAN pattern.
14011                          * For VF we are going to create VLAN
14012                          * interface to make hypervisor set correct
14013                          * e-Switch vport context.
14014                          */
14015                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
14016                 }
14017         }
14018         return 0;
14019 error:
14020         err = rte_errno; /* Save rte_errno before cleanup. */
14021         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
14022                        handle_idx, dh, next) {
14023                 /* hrxq is union, don't clear it if the flag is not set. */
14024                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
14025                         mlx5_hrxq_release(dev, dh->rix_hrxq);
14026                         dh->rix_hrxq = 0;
14027                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
14028                         dh->rix_srss = 0;
14029                 }
14030                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14031                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14032         }
14033         rte_errno = err; /* Restore rte_errno. */
14034         return -rte_errno;
14035 }
14036
14037 void
14038 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
14039                           struct mlx5_list_entry *entry)
14040 {
14041         struct mlx5_flow_dv_matcher *resource = container_of(entry,
14042                                                              typeof(*resource),
14043                                                              entry);
14044
14045         claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
14046         mlx5_free(resource);
14047 }
14048
14049 /**
14050  * Release the flow matcher.
14051  *
14052  * @param dev
14053  *   Pointer to Ethernet device.
14054  * @param port_id
14055  *   Index to port ID action resource.
14056  *
14057  * @return
14058  *   1 while a reference on it exists, 0 when freed.
14059  */
14060 static int
14061 flow_dv_matcher_release(struct rte_eth_dev *dev,
14062                         struct mlx5_flow_handle *handle)
14063 {
14064         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
14065         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
14066                                                             typeof(*tbl), tbl);
14067         int ret;
14068
14069         MLX5_ASSERT(matcher->matcher_object);
14070         ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
14071         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
14072         return ret;
14073 }
14074
14075 void
14076 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14077 {
14078         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14079         struct mlx5_flow_dv_encap_decap_resource *res =
14080                                        container_of(entry, typeof(*res), entry);
14081
14082         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14083         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
14084 }
14085
14086 /**
14087  * Release an encap/decap resource.
14088  *
14089  * @param dev
14090  *   Pointer to Ethernet device.
14091  * @param encap_decap_idx
14092  *   Index of encap decap resource.
14093  *
14094  * @return
14095  *   1 while a reference on it exists, 0 when freed.
14096  */
14097 static int
14098 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
14099                                      uint32_t encap_decap_idx)
14100 {
14101         struct mlx5_priv *priv = dev->data->dev_private;
14102         struct mlx5_flow_dv_encap_decap_resource *resource;
14103
14104         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
14105                                   encap_decap_idx);
14106         if (!resource)
14107                 return 0;
14108         MLX5_ASSERT(resource->action);
14109         return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
14110 }
14111
14112 /**
14113  * Release an jump to table action resource.
14114  *
14115  * @param dev
14116  *   Pointer to Ethernet device.
14117  * @param rix_jump
14118  *   Index to the jump action resource.
14119  *
14120  * @return
14121  *   1 while a reference on it exists, 0 when freed.
14122  */
14123 static int
14124 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
14125                                   uint32_t rix_jump)
14126 {
14127         struct mlx5_priv *priv = dev->data->dev_private;
14128         struct mlx5_flow_tbl_data_entry *tbl_data;
14129
14130         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
14131                                   rix_jump);
14132         if (!tbl_data)
14133                 return 0;
14134         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
14135 }
14136
14137 void
14138 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14139 {
14140         struct mlx5_flow_dv_modify_hdr_resource *res =
14141                 container_of(entry, typeof(*res), entry);
14142         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14143
14144         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14145         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
14146 }
14147
14148 /**
14149  * Release a modify-header resource.
14150  *
14151  * @param dev
14152  *   Pointer to Ethernet device.
14153  * @param handle
14154  *   Pointer to mlx5_flow_handle.
14155  *
14156  * @return
14157  *   1 while a reference on it exists, 0 when freed.
14158  */
14159 static int
14160 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14161                                     struct mlx5_flow_handle *handle)
14162 {
14163         struct mlx5_priv *priv = dev->data->dev_private;
14164         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14165
14166         MLX5_ASSERT(entry->action);
14167         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14168 }
14169
14170 void
14171 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14172 {
14173         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14174         struct mlx5_flow_dv_port_id_action_resource *resource =
14175                                   container_of(entry, typeof(*resource), entry);
14176
14177         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14178         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14179 }
14180
14181 /**
14182  * Release port ID action resource.
14183  *
14184  * @param dev
14185  *   Pointer to Ethernet device.
14186  * @param handle
14187  *   Pointer to mlx5_flow_handle.
14188  *
14189  * @return
14190  *   1 while a reference on it exists, 0 when freed.
14191  */
14192 static int
14193 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14194                                         uint32_t port_id)
14195 {
14196         struct mlx5_priv *priv = dev->data->dev_private;
14197         struct mlx5_flow_dv_port_id_action_resource *resource;
14198
14199         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14200         if (!resource)
14201                 return 0;
14202         MLX5_ASSERT(resource->action);
14203         return mlx5_list_unregister(priv->sh->port_id_action_list,
14204                                     &resource->entry);
14205 }
14206
14207 /**
14208  * Release shared RSS action resource.
14209  *
14210  * @param dev
14211  *   Pointer to Ethernet device.
14212  * @param srss
14213  *   Shared RSS action index.
14214  */
14215 static void
14216 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14217 {
14218         struct mlx5_priv *priv = dev->data->dev_private;
14219         struct mlx5_shared_action_rss *shared_rss;
14220
14221         shared_rss = mlx5_ipool_get
14222                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14223         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14224 }
14225
14226 void
14227 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14228 {
14229         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14230         struct mlx5_flow_dv_push_vlan_action_resource *resource =
14231                         container_of(entry, typeof(*resource), entry);
14232
14233         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14234         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14235 }
14236
14237 /**
14238  * Release push vlan action resource.
14239  *
14240  * @param dev
14241  *   Pointer to Ethernet device.
14242  * @param handle
14243  *   Pointer to mlx5_flow_handle.
14244  *
14245  * @return
14246  *   1 while a reference on it exists, 0 when freed.
14247  */
14248 static int
14249 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14250                                           struct mlx5_flow_handle *handle)
14251 {
14252         struct mlx5_priv *priv = dev->data->dev_private;
14253         struct mlx5_flow_dv_push_vlan_action_resource *resource;
14254         uint32_t idx = handle->dvh.rix_push_vlan;
14255
14256         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14257         if (!resource)
14258                 return 0;
14259         MLX5_ASSERT(resource->action);
14260         return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14261                                     &resource->entry);
14262 }
14263
14264 /**
14265  * Release the fate resource.
14266  *
14267  * @param dev
14268  *   Pointer to Ethernet device.
14269  * @param handle
14270  *   Pointer to mlx5_flow_handle.
14271  */
14272 static void
14273 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14274                                struct mlx5_flow_handle *handle)
14275 {
14276         if (!handle->rix_fate)
14277                 return;
14278         switch (handle->fate_action) {
14279         case MLX5_FLOW_FATE_QUEUE:
14280                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14281                         mlx5_hrxq_release(dev, handle->rix_hrxq);
14282                 break;
14283         case MLX5_FLOW_FATE_JUMP:
14284                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14285                 break;
14286         case MLX5_FLOW_FATE_PORT_ID:
14287                 flow_dv_port_id_action_resource_release(dev,
14288                                 handle->rix_port_id_action);
14289                 break;
14290         default:
14291                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14292                 break;
14293         }
14294         handle->rix_fate = 0;
14295 }
14296
14297 void
14298 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14299                          struct mlx5_list_entry *entry)
14300 {
14301         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14302                                                               typeof(*resource),
14303                                                               entry);
14304         struct rte_eth_dev *dev = resource->dev;
14305         struct mlx5_priv *priv = dev->data->dev_private;
14306
14307         if (resource->verbs_action)
14308                 claim_zero(mlx5_flow_os_destroy_flow_action
14309                                                       (resource->verbs_action));
14310         if (resource->normal_path_tbl)
14311                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14312                                              resource->normal_path_tbl);
14313         flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14314         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14315         DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14316 }
14317
14318 /**
14319  * Release an sample resource.
14320  *
14321  * @param dev
14322  *   Pointer to Ethernet device.
14323  * @param handle
14324  *   Pointer to mlx5_flow_handle.
14325  *
14326  * @return
14327  *   1 while a reference on it exists, 0 when freed.
14328  */
14329 static int
14330 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14331                                      struct mlx5_flow_handle *handle)
14332 {
14333         struct mlx5_priv *priv = dev->data->dev_private;
14334         struct mlx5_flow_dv_sample_resource *resource;
14335
14336         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14337                                   handle->dvh.rix_sample);
14338         if (!resource)
14339                 return 0;
14340         MLX5_ASSERT(resource->verbs_action);
14341         return mlx5_list_unregister(priv->sh->sample_action_list,
14342                                     &resource->entry);
14343 }
14344
14345 void
14346 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14347                              struct mlx5_list_entry *entry)
14348 {
14349         struct mlx5_flow_dv_dest_array_resource *resource =
14350                         container_of(entry, typeof(*resource), entry);
14351         struct rte_eth_dev *dev = resource->dev;
14352         struct mlx5_priv *priv = dev->data->dev_private;
14353         uint32_t i = 0;
14354
14355         MLX5_ASSERT(resource->action);
14356         if (resource->action)
14357                 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14358         for (; i < resource->num_of_dest; i++)
14359                 flow_dv_sample_sub_actions_release(dev,
14360                                                    &resource->sample_idx[i]);
14361         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14362         DRV_LOG(DEBUG, "destination array resource %p: removed",
14363                 (void *)resource);
14364 }
14365
14366 /**
14367  * Release an destination array resource.
14368  *
14369  * @param dev
14370  *   Pointer to Ethernet device.
14371  * @param handle
14372  *   Pointer to mlx5_flow_handle.
14373  *
14374  * @return
14375  *   1 while a reference on it exists, 0 when freed.
14376  */
14377 static int
14378 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14379                                     struct mlx5_flow_handle *handle)
14380 {
14381         struct mlx5_priv *priv = dev->data->dev_private;
14382         struct mlx5_flow_dv_dest_array_resource *resource;
14383
14384         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14385                                   handle->dvh.rix_dest_array);
14386         if (!resource)
14387                 return 0;
14388         MLX5_ASSERT(resource->action);
14389         return mlx5_list_unregister(priv->sh->dest_array_list,
14390                                     &resource->entry);
14391 }
14392
14393 static void
14394 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14395 {
14396         struct mlx5_priv *priv = dev->data->dev_private;
14397         struct mlx5_dev_ctx_shared *sh = priv->sh;
14398         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14399                                 sh->geneve_tlv_option_resource;
14400         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14401         if (geneve_opt_resource) {
14402                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14403                                          __ATOMIC_RELAXED))) {
14404                         claim_zero(mlx5_devx_cmd_destroy
14405                                         (geneve_opt_resource->obj));
14406                         mlx5_free(sh->geneve_tlv_option_resource);
14407                         sh->geneve_tlv_option_resource = NULL;
14408                 }
14409         }
14410         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14411 }
14412
14413 /**
14414  * Remove the flow from the NIC but keeps it in memory.
14415  * Lock free, (mutex should be acquired by caller).
14416  *
14417  * @param[in] dev
14418  *   Pointer to Ethernet device.
14419  * @param[in, out] flow
14420  *   Pointer to flow structure.
14421  */
14422 static void
14423 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14424 {
14425         struct mlx5_flow_handle *dh;
14426         uint32_t handle_idx;
14427         struct mlx5_priv *priv = dev->data->dev_private;
14428
14429         if (!flow)
14430                 return;
14431         handle_idx = flow->dev_handles;
14432         while (handle_idx) {
14433                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14434                                     handle_idx);
14435                 if (!dh)
14436                         return;
14437                 if (dh->drv_flow) {
14438                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14439                         dh->drv_flow = NULL;
14440                 }
14441                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14442                         flow_dv_fate_resource_release(dev, dh);
14443                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14444                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14445                 handle_idx = dh->next.next;
14446         }
14447 }
14448
14449 /**
14450  * Remove the flow from the NIC and the memory.
14451  * Lock free, (mutex should be acquired by caller).
14452  *
14453  * @param[in] dev
14454  *   Pointer to the Ethernet device structure.
14455  * @param[in, out] flow
14456  *   Pointer to flow structure.
14457  */
14458 static void
14459 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14460 {
14461         struct mlx5_flow_handle *dev_handle;
14462         struct mlx5_priv *priv = dev->data->dev_private;
14463         struct mlx5_flow_meter_info *fm = NULL;
14464         uint32_t srss = 0;
14465
14466         if (!flow)
14467                 return;
14468         flow_dv_remove(dev, flow);
14469         if (flow->counter) {
14470                 flow_dv_counter_free(dev, flow->counter);
14471                 flow->counter = 0;
14472         }
14473         if (flow->meter) {
14474                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14475                 if (fm)
14476                         mlx5_flow_meter_detach(priv, fm);
14477                 flow->meter = 0;
14478         }
14479         /* Keep the current age handling by default. */
14480         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14481                 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14482         else if (flow->age)
14483                 flow_dv_aso_age_release(dev, flow->age);
14484         if (flow->geneve_tlv_option) {
14485                 flow_dv_geneve_tlv_option_resource_release(dev);
14486                 flow->geneve_tlv_option = 0;
14487         }
14488         while (flow->dev_handles) {
14489                 uint32_t tmp_idx = flow->dev_handles;
14490
14491                 dev_handle = mlx5_ipool_get(priv->sh->ipool
14492                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14493                 if (!dev_handle)
14494                         return;
14495                 flow->dev_handles = dev_handle->next.next;
14496                 while (dev_handle->flex_item) {
14497                         int index = rte_bsf32(dev_handle->flex_item);
14498
14499                         mlx5_flex_release_index(dev, index);
14500                         dev_handle->flex_item &= ~RTE_BIT32(index);
14501                 }
14502                 if (dev_handle->dvh.matcher)
14503                         flow_dv_matcher_release(dev, dev_handle);
14504                 if (dev_handle->dvh.rix_sample)
14505                         flow_dv_sample_resource_release(dev, dev_handle);
14506                 if (dev_handle->dvh.rix_dest_array)
14507                         flow_dv_dest_array_resource_release(dev, dev_handle);
14508                 if (dev_handle->dvh.rix_encap_decap)
14509                         flow_dv_encap_decap_resource_release(dev,
14510                                 dev_handle->dvh.rix_encap_decap);
14511                 if (dev_handle->dvh.modify_hdr)
14512                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
14513                 if (dev_handle->dvh.rix_push_vlan)
14514                         flow_dv_push_vlan_action_resource_release(dev,
14515                                                                   dev_handle);
14516                 if (dev_handle->dvh.rix_tag)
14517                         flow_dv_tag_release(dev,
14518                                             dev_handle->dvh.rix_tag);
14519                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14520                         flow_dv_fate_resource_release(dev, dev_handle);
14521                 else if (!srss)
14522                         srss = dev_handle->rix_srss;
14523                 if (fm && dev_handle->is_meter_flow_id &&
14524                     dev_handle->split_flow_id)
14525                         mlx5_ipool_free(fm->flow_ipool,
14526                                         dev_handle->split_flow_id);
14527                 else if (dev_handle->split_flow_id &&
14528                     !dev_handle->is_meter_flow_id)
14529                         mlx5_ipool_free(priv->sh->ipool
14530                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14531                                         dev_handle->split_flow_id);
14532                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14533                            tmp_idx);
14534         }
14535         if (srss)
14536                 flow_dv_shared_rss_action_release(dev, srss);
14537 }
14538
14539 /**
14540  * Release array of hash RX queue objects.
14541  * Helper function.
14542  *
14543  * @param[in] dev
14544  *   Pointer to the Ethernet device structure.
14545  * @param[in, out] hrxqs
14546  *   Array of hash RX queue objects.
14547  *
14548  * @return
14549  *   Total number of references to hash RX queue objects in *hrxqs* array
14550  *   after this operation.
14551  */
14552 static int
14553 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14554                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14555 {
14556         size_t i;
14557         int remaining = 0;
14558
14559         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14560                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14561
14562                 if (!ret)
14563                         (*hrxqs)[i] = 0;
14564                 remaining += ret;
14565         }
14566         return remaining;
14567 }
14568
14569 /**
14570  * Release all hash RX queue objects representing shared RSS action.
14571  *
14572  * @param[in] dev
14573  *   Pointer to the Ethernet device structure.
14574  * @param[in, out] action
14575  *   Shared RSS action to remove hash RX queue objects from.
14576  *
14577  * @return
14578  *   Total number of references to hash RX queue objects stored in *action*
14579  *   after this operation.
14580  *   Expected to be 0 if no external references held.
14581  */
14582 static int
14583 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14584                                  struct mlx5_shared_action_rss *shared_rss)
14585 {
14586         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14587 }
14588
14589 /**
14590  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14591  * user input.
14592  *
14593  * Only one hash value is available for one L3+L4 combination:
14594  * for example:
14595  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14596  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14597  * same slot in mlx5_rss_hash_fields.
14598  *
14599  * @param[in] rss
14600  *   Pointer to the shared action RSS conf.
14601  * @param[in, out] hash_field
14602  *   hash_field variable needed to be adjusted.
14603  *
14604  * @return
14605  *   void
14606  */
14607 static void
14608 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14609                                      uint64_t *hash_field)
14610 {
14611         uint64_t rss_types = rss->origin.types;
14612
14613         switch (*hash_field & ~IBV_RX_HASH_INNER) {
14614         case MLX5_RSS_HASH_IPV4:
14615                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14616                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
14617                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14618                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
14619                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14620                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14621                         else
14622                                 *hash_field |= MLX5_RSS_HASH_IPV4;
14623                 }
14624                 return;
14625         case MLX5_RSS_HASH_IPV6:
14626                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14627                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
14628                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14629                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
14630                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14631                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14632                         else
14633                                 *hash_field |= MLX5_RSS_HASH_IPV6;
14634                 }
14635                 return;
14636         case MLX5_RSS_HASH_IPV4_UDP:
14637                 /* fall-through. */
14638         case MLX5_RSS_HASH_IPV6_UDP:
14639                 if (rss_types & RTE_ETH_RSS_UDP) {
14640                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14641                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14642                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14643                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14644                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14645                         else
14646                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14647                 }
14648                 return;
14649         case MLX5_RSS_HASH_IPV4_TCP:
14650                 /* fall-through. */
14651         case MLX5_RSS_HASH_IPV6_TCP:
14652                 if (rss_types & RTE_ETH_RSS_TCP) {
14653                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14654                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14655                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14656                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14657                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14658                         else
14659                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14660                 }
14661                 return;
14662         default:
14663                 return;
14664         }
14665 }
14666
14667 /**
14668  * Setup shared RSS action.
14669  * Prepare set of hash RX queue objects sufficient to handle all valid
14670  * hash_fields combinations (see enum ibv_rx_hash_fields).
14671  *
14672  * @param[in] dev
14673  *   Pointer to the Ethernet device structure.
14674  * @param[in] action_idx
14675  *   Shared RSS action ipool index.
14676  * @param[in, out] action
14677  *   Partially initialized shared RSS action.
14678  * @param[out] error
14679  *   Perform verbose error reporting if not NULL. Initialized in case of
14680  *   error only.
14681  *
14682  * @return
14683  *   0 on success, otherwise negative errno value.
14684  */
14685 static int
14686 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14687                            uint32_t action_idx,
14688                            struct mlx5_shared_action_rss *shared_rss,
14689                            struct rte_flow_error *error)
14690 {
14691         struct mlx5_flow_rss_desc rss_desc = { 0 };
14692         size_t i;
14693         int err;
14694
14695         if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14696                 return rte_flow_error_set(error, rte_errno,
14697                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14698                                           "cannot setup indirection table");
14699         }
14700         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14701         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14702         rss_desc.const_q = shared_rss->origin.queue;
14703         rss_desc.queue_num = shared_rss->origin.queue_num;
14704         /* Set non-zero value to indicate a shared RSS. */
14705         rss_desc.shared_rss = action_idx;
14706         rss_desc.ind_tbl = shared_rss->ind_tbl;
14707         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14708                 uint32_t hrxq_idx;
14709                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14710                 int tunnel = 0;
14711
14712                 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14713                 if (shared_rss->origin.level > 1) {
14714                         hash_fields |= IBV_RX_HASH_INNER;
14715                         tunnel = 1;
14716                 }
14717                 rss_desc.tunnel = tunnel;
14718                 rss_desc.hash_fields = hash_fields;
14719                 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14720                 if (!hrxq_idx) {
14721                         rte_flow_error_set
14722                                 (error, rte_errno,
14723                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14724                                  "cannot get hash queue");
14725                         goto error_hrxq_new;
14726                 }
14727                 err = __flow_dv_action_rss_hrxq_set
14728                         (shared_rss, hash_fields, hrxq_idx);
14729                 MLX5_ASSERT(!err);
14730         }
14731         return 0;
14732 error_hrxq_new:
14733         err = rte_errno;
14734         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14735         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14736                 shared_rss->ind_tbl = NULL;
14737         rte_errno = err;
14738         return -rte_errno;
14739 }
14740
14741 /**
14742  * Create shared RSS action.
14743  *
14744  * @param[in] dev
14745  *   Pointer to the Ethernet device structure.
14746  * @param[in] conf
14747  *   Shared action configuration.
14748  * @param[in] rss
14749  *   RSS action specification used to create shared action.
14750  * @param[out] error
14751  *   Perform verbose error reporting if not NULL. Initialized in case of
14752  *   error only.
14753  *
14754  * @return
14755  *   A valid shared action ID in case of success, 0 otherwise and
14756  *   rte_errno is set.
14757  */
14758 static uint32_t
14759 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14760                             const struct rte_flow_indir_action_conf *conf,
14761                             const struct rte_flow_action_rss *rss,
14762                             struct rte_flow_error *error)
14763 {
14764         struct mlx5_priv *priv = dev->data->dev_private;
14765         struct mlx5_shared_action_rss *shared_rss = NULL;
14766         void *queue = NULL;
14767         struct rte_flow_action_rss *origin;
14768         const uint8_t *rss_key;
14769         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14770         uint32_t idx;
14771
14772         RTE_SET_USED(conf);
14773         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14774                             0, SOCKET_ID_ANY);
14775         shared_rss = mlx5_ipool_zmalloc
14776                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14777         if (!shared_rss || !queue) {
14778                 rte_flow_error_set(error, ENOMEM,
14779                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14780                                    "cannot allocate resource memory");
14781                 goto error_rss_init;
14782         }
14783         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14784                 rte_flow_error_set(error, E2BIG,
14785                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14786                                    "rss action number out of range");
14787                 goto error_rss_init;
14788         }
14789         shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14790                                           sizeof(*shared_rss->ind_tbl),
14791                                           0, SOCKET_ID_ANY);
14792         if (!shared_rss->ind_tbl) {
14793                 rte_flow_error_set(error, ENOMEM,
14794                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14795                                    "cannot allocate resource memory");
14796                 goto error_rss_init;
14797         }
14798         memcpy(queue, rss->queue, queue_size);
14799         shared_rss->ind_tbl->queues = queue;
14800         shared_rss->ind_tbl->queues_n = rss->queue_num;
14801         origin = &shared_rss->origin;
14802         origin->func = rss->func;
14803         origin->level = rss->level;
14804         /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
14805         origin->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
14806         /* NULL RSS key indicates default RSS key. */
14807         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14808         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14809         origin->key = &shared_rss->key[0];
14810         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14811         origin->queue = queue;
14812         origin->queue_num = rss->queue_num;
14813         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14814                 goto error_rss_init;
14815         rte_spinlock_init(&shared_rss->action_rss_sl);
14816         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14817         rte_spinlock_lock(&priv->shared_act_sl);
14818         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14819                      &priv->rss_shared_actions, idx, shared_rss, next);
14820         rte_spinlock_unlock(&priv->shared_act_sl);
14821         return idx;
14822 error_rss_init:
14823         if (shared_rss) {
14824                 if (shared_rss->ind_tbl)
14825                         mlx5_free(shared_rss->ind_tbl);
14826                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14827                                 idx);
14828         }
14829         if (queue)
14830                 mlx5_free(queue);
14831         return 0;
14832 }
14833
14834 /**
14835  * Destroy the shared RSS action.
14836  * Release related hash RX queue objects.
14837  *
14838  * @param[in] dev
14839  *   Pointer to the Ethernet device structure.
14840  * @param[in] idx
14841  *   The shared RSS action object ID to be removed.
14842  * @param[out] error
14843  *   Perform verbose error reporting if not NULL. Initialized in case of
14844  *   error only.
14845  *
14846  * @return
14847  *   0 on success, otherwise negative errno value.
14848  */
14849 static int
14850 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14851                              struct rte_flow_error *error)
14852 {
14853         struct mlx5_priv *priv = dev->data->dev_private;
14854         struct mlx5_shared_action_rss *shared_rss =
14855             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14856         uint32_t old_refcnt = 1;
14857         int remaining;
14858         uint16_t *queue = NULL;
14859
14860         if (!shared_rss)
14861                 return rte_flow_error_set(error, EINVAL,
14862                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14863                                           "invalid shared action");
14864         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14865                                          0, 0, __ATOMIC_ACQUIRE,
14866                                          __ATOMIC_RELAXED))
14867                 return rte_flow_error_set(error, EBUSY,
14868                                           RTE_FLOW_ERROR_TYPE_ACTION,
14869                                           NULL,
14870                                           "shared rss has references");
14871         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14872         if (remaining)
14873                 return rte_flow_error_set(error, EBUSY,
14874                                           RTE_FLOW_ERROR_TYPE_ACTION,
14875                                           NULL,
14876                                           "shared rss hrxq has references");
14877         queue = shared_rss->ind_tbl->queues;
14878         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14879         if (remaining)
14880                 return rte_flow_error_set(error, EBUSY,
14881                                           RTE_FLOW_ERROR_TYPE_ACTION,
14882                                           NULL,
14883                                           "shared rss indirection table has"
14884                                           " references");
14885         mlx5_free(queue);
14886         rte_spinlock_lock(&priv->shared_act_sl);
14887         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14888                      &priv->rss_shared_actions, idx, shared_rss, next);
14889         rte_spinlock_unlock(&priv->shared_act_sl);
14890         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14891                         idx);
14892         return 0;
14893 }
14894
14895 /**
14896  * Create indirect action, lock free,
14897  * (mutex should be acquired by caller).
14898  * Dispatcher for action type specific call.
14899  *
14900  * @param[in] dev
14901  *   Pointer to the Ethernet device structure.
14902  * @param[in] conf
14903  *   Shared action configuration.
14904  * @param[in] action
14905  *   Action specification used to create indirect action.
14906  * @param[out] error
14907  *   Perform verbose error reporting if not NULL. Initialized in case of
14908  *   error only.
14909  *
14910  * @return
14911  *   A valid shared action handle in case of success, NULL otherwise and
14912  *   rte_errno is set.
14913  */
14914 static struct rte_flow_action_handle *
14915 flow_dv_action_create(struct rte_eth_dev *dev,
14916                       const struct rte_flow_indir_action_conf *conf,
14917                       const struct rte_flow_action *action,
14918                       struct rte_flow_error *err)
14919 {
14920         struct mlx5_priv *priv = dev->data->dev_private;
14921         uint32_t age_idx = 0;
14922         uint32_t idx = 0;
14923         uint32_t ret = 0;
14924
14925         switch (action->type) {
14926         case RTE_FLOW_ACTION_TYPE_RSS:
14927                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14928                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14929                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14930                 break;
14931         case RTE_FLOW_ACTION_TYPE_AGE:
14932                 age_idx = flow_dv_aso_age_alloc(dev, err);
14933                 if (!age_idx) {
14934                         ret = -rte_errno;
14935                         break;
14936                 }
14937                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14938                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14939                 flow_dv_aso_age_params_init(dev, age_idx,
14940                                         ((const struct rte_flow_action_age *)
14941                                                 action->conf)->context ?
14942                                         ((const struct rte_flow_action_age *)
14943                                                 action->conf)->context :
14944                                         (void *)(uintptr_t)idx,
14945                                         ((const struct rte_flow_action_age *)
14946                                                 action->conf)->timeout);
14947                 ret = age_idx;
14948                 break;
14949         case RTE_FLOW_ACTION_TYPE_COUNT:
14950                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14951                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14952                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14953                 break;
14954         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14955                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14956                                                          err);
14957                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14958                 break;
14959         default:
14960                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14961                                    NULL, "action type not supported");
14962                 break;
14963         }
14964         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14965 }
14966
14967 /**
14968  * Destroy the indirect action.
14969  * Release action related resources on the NIC and the memory.
14970  * Lock free, (mutex should be acquired by caller).
14971  * Dispatcher for action type specific call.
14972  *
14973  * @param[in] dev
14974  *   Pointer to the Ethernet device structure.
14975  * @param[in] handle
14976  *   The indirect action object handle to be removed.
14977  * @param[out] error
14978  *   Perform verbose error reporting if not NULL. Initialized in case of
14979  *   error only.
14980  *
14981  * @return
14982  *   0 on success, otherwise negative errno value.
14983  */
14984 static int
14985 flow_dv_action_destroy(struct rte_eth_dev *dev,
14986                        struct rte_flow_action_handle *handle,
14987                        struct rte_flow_error *error)
14988 {
14989         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14990         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14991         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14992         struct mlx5_flow_counter *cnt;
14993         uint32_t no_flow_refcnt = 1;
14994         int ret;
14995
14996         switch (type) {
14997         case MLX5_INDIRECT_ACTION_TYPE_RSS:
14998                 return __flow_dv_action_rss_release(dev, idx, error);
14999         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15000                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
15001                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
15002                                                  &no_flow_refcnt, 1, false,
15003                                                  __ATOMIC_ACQUIRE,
15004                                                  __ATOMIC_RELAXED))
15005                         return rte_flow_error_set(error, EBUSY,
15006                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15007                                                   NULL,
15008                                                   "Indirect count action has references");
15009                 flow_dv_counter_free(dev, idx);
15010                 return 0;
15011         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15012                 ret = flow_dv_aso_age_release(dev, idx);
15013                 if (ret)
15014                         /*
15015                          * In this case, the last flow has a reference will
15016                          * actually release the age action.
15017                          */
15018                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
15019                                 " released with references %d.", idx, ret);
15020                 return 0;
15021         case MLX5_INDIRECT_ACTION_TYPE_CT:
15022                 ret = flow_dv_aso_ct_release(dev, idx, error);
15023                 if (ret < 0)
15024                         return ret;
15025                 if (ret > 0)
15026                         DRV_LOG(DEBUG, "Connection tracking object %u still "
15027                                 "has references %d.", idx, ret);
15028                 return 0;
15029         default:
15030                 return rte_flow_error_set(error, ENOTSUP,
15031                                           RTE_FLOW_ERROR_TYPE_ACTION,
15032                                           NULL,
15033                                           "action type not supported");
15034         }
15035 }
15036
15037 /**
15038  * Updates in place shared RSS action configuration.
15039  *
15040  * @param[in] dev
15041  *   Pointer to the Ethernet device structure.
15042  * @param[in] idx
15043  *   The shared RSS action object ID to be updated.
15044  * @param[in] action_conf
15045  *   RSS action specification used to modify *shared_rss*.
15046  * @param[out] error
15047  *   Perform verbose error reporting if not NULL. Initialized in case of
15048  *   error only.
15049  *
15050  * @return
15051  *   0 on success, otherwise negative errno value.
15052  * @note: currently only support update of RSS queues.
15053  */
15054 static int
15055 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
15056                             const struct rte_flow_action_rss *action_conf,
15057                             struct rte_flow_error *error)
15058 {
15059         struct mlx5_priv *priv = dev->data->dev_private;
15060         struct mlx5_shared_action_rss *shared_rss =
15061             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
15062         int ret = 0;
15063         void *queue = NULL;
15064         uint16_t *queue_old = NULL;
15065         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
15066
15067         if (!shared_rss)
15068                 return rte_flow_error_set(error, EINVAL,
15069                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15070                                           "invalid shared action to update");
15071         if (priv->obj_ops.ind_table_modify == NULL)
15072                 return rte_flow_error_set(error, ENOTSUP,
15073                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15074                                           "cannot modify indirection table");
15075         queue = mlx5_malloc(MLX5_MEM_ZERO,
15076                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
15077                             0, SOCKET_ID_ANY);
15078         if (!queue)
15079                 return rte_flow_error_set(error, ENOMEM,
15080                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15081                                           NULL,
15082                                           "cannot allocate resource memory");
15083         memcpy(queue, action_conf->queue, queue_size);
15084         MLX5_ASSERT(shared_rss->ind_tbl);
15085         rte_spinlock_lock(&shared_rss->action_rss_sl);
15086         queue_old = shared_rss->ind_tbl->queues;
15087         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
15088                                         queue, action_conf->queue_num, true);
15089         if (ret) {
15090                 mlx5_free(queue);
15091                 ret = rte_flow_error_set(error, rte_errno,
15092                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15093                                           "cannot update indirection table");
15094         } else {
15095                 mlx5_free(queue_old);
15096                 shared_rss->origin.queue = queue;
15097                 shared_rss->origin.queue_num = action_conf->queue_num;
15098         }
15099         rte_spinlock_unlock(&shared_rss->action_rss_sl);
15100         return ret;
15101 }
15102
15103 /*
15104  * Updates in place conntrack context or direction.
15105  * Context update should be synchronized.
15106  *
15107  * @param[in] dev
15108  *   Pointer to the Ethernet device structure.
15109  * @param[in] idx
15110  *   The conntrack object ID to be updated.
15111  * @param[in] update
15112  *   Pointer to the structure of information to update.
15113  * @param[out] error
15114  *   Perform verbose error reporting if not NULL. Initialized in case of
15115  *   error only.
15116  *
15117  * @return
15118  *   0 on success, otherwise negative errno value.
15119  */
15120 static int
15121 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
15122                            const struct rte_flow_modify_conntrack *update,
15123                            struct rte_flow_error *error)
15124 {
15125         struct mlx5_priv *priv = dev->data->dev_private;
15126         struct mlx5_aso_ct_action *ct;
15127         const struct rte_flow_action_conntrack *new_prf;
15128         int ret = 0;
15129         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15130         uint32_t dev_idx;
15131
15132         if (PORT_ID(priv) != owner)
15133                 return rte_flow_error_set(error, EACCES,
15134                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15135                                           NULL,
15136                                           "CT object owned by another port");
15137         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15138         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15139         if (!ct->refcnt)
15140                 return rte_flow_error_set(error, ENOMEM,
15141                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15142                                           NULL,
15143                                           "CT object is inactive");
15144         new_prf = &update->new_ct;
15145         if (update->direction)
15146                 ct->is_original = !!new_prf->is_original_dir;
15147         if (update->state) {
15148                 /* Only validate the profile when it needs to be updated. */
15149                 ret = mlx5_validate_action_ct(dev, new_prf, error);
15150                 if (ret)
15151                         return ret;
15152                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
15153                 if (ret)
15154                         return rte_flow_error_set(error, EIO,
15155                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15156                                         NULL,
15157                                         "Failed to send CT context update WQE");
15158                 /* Block until ready or a failure. */
15159                 ret = mlx5_aso_ct_available(priv->sh, ct);
15160                 if (ret)
15161                         rte_flow_error_set(error, rte_errno,
15162                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15163                                            NULL,
15164                                            "Timeout to get the CT update");
15165         }
15166         return ret;
15167 }
15168
15169 /**
15170  * Updates in place shared action configuration, lock free,
15171  * (mutex should be acquired by caller).
15172  *
15173  * @param[in] dev
15174  *   Pointer to the Ethernet device structure.
15175  * @param[in] handle
15176  *   The indirect action object handle to be updated.
15177  * @param[in] update
15178  *   Action specification used to modify the action pointed by *handle*.
15179  *   *update* could be of same type with the action pointed by the *handle*
15180  *   handle argument, or some other structures like a wrapper, depending on
15181  *   the indirect action type.
15182  * @param[out] error
15183  *   Perform verbose error reporting if not NULL. Initialized in case of
15184  *   error only.
15185  *
15186  * @return
15187  *   0 on success, otherwise negative errno value.
15188  */
15189 static int
15190 flow_dv_action_update(struct rte_eth_dev *dev,
15191                         struct rte_flow_action_handle *handle,
15192                         const void *update,
15193                         struct rte_flow_error *err)
15194 {
15195         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15196         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15197         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15198         const void *action_conf;
15199
15200         switch (type) {
15201         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15202                 action_conf = ((const struct rte_flow_action *)update)->conf;
15203                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15204         case MLX5_INDIRECT_ACTION_TYPE_CT:
15205                 return __flow_dv_action_ct_update(dev, idx, update, err);
15206         default:
15207                 return rte_flow_error_set(err, ENOTSUP,
15208                                           RTE_FLOW_ERROR_TYPE_ACTION,
15209                                           NULL,
15210                                           "action type update not supported");
15211         }
15212 }
15213
15214 /**
15215  * Destroy the meter sub policy table rules.
15216  * Lock free, (mutex should be acquired by caller).
15217  *
15218  * @param[in] dev
15219  *   Pointer to Ethernet device.
15220  * @param[in] sub_policy
15221  *   Pointer to meter sub policy table.
15222  */
15223 static void
15224 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15225                              struct mlx5_flow_meter_sub_policy *sub_policy)
15226 {
15227         struct mlx5_priv *priv = dev->data->dev_private;
15228         struct mlx5_flow_tbl_data_entry *tbl;
15229         struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15230         struct mlx5_flow_meter_info *next_fm;
15231         struct mlx5_sub_policy_color_rule *color_rule;
15232         void *tmp;
15233         uint32_t i;
15234
15235         for (i = 0; i < RTE_COLORS; i++) {
15236                 next_fm = NULL;
15237                 if (i == RTE_COLOR_GREEN && policy &&
15238                     policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15239                         next_fm = mlx5_flow_meter_find(priv,
15240                                         policy->act_cnt[i].next_mtr_id, NULL);
15241                 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15242                                    next_port, tmp) {
15243                         claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15244                         tbl = container_of(color_rule->matcher->tbl,
15245                                            typeof(*tbl), tbl);
15246                         mlx5_list_unregister(tbl->matchers,
15247                                              &color_rule->matcher->entry);
15248                         TAILQ_REMOVE(&sub_policy->color_rules[i],
15249                                      color_rule, next_port);
15250                         mlx5_free(color_rule);
15251                         if (next_fm)
15252                                 mlx5_flow_meter_detach(priv, next_fm);
15253                 }
15254         }
15255         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15256                 if (sub_policy->rix_hrxq[i]) {
15257                         if (policy && !policy->is_hierarchy)
15258                                 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15259                         sub_policy->rix_hrxq[i] = 0;
15260                 }
15261                 if (sub_policy->jump_tbl[i]) {
15262                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15263                                                      sub_policy->jump_tbl[i]);
15264                         sub_policy->jump_tbl[i] = NULL;
15265                 }
15266         }
15267         if (sub_policy->tbl_rsc) {
15268                 flow_dv_tbl_resource_release(MLX5_SH(dev),
15269                                              sub_policy->tbl_rsc);
15270                 sub_policy->tbl_rsc = NULL;
15271         }
15272 }
15273
15274 /**
15275  * Destroy policy rules, lock free,
15276  * (mutex should be acquired by caller).
15277  * Dispatcher for action type specific call.
15278  *
15279  * @param[in] dev
15280  *   Pointer to the Ethernet device structure.
15281  * @param[in] mtr_policy
15282  *   Meter policy struct.
15283  */
15284 static void
15285 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15286                              struct mlx5_flow_meter_policy *mtr_policy)
15287 {
15288         uint32_t i, j;
15289         struct mlx5_flow_meter_sub_policy *sub_policy;
15290         uint16_t sub_policy_num;
15291
15292         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15293                 sub_policy_num = (mtr_policy->sub_policy_num >>
15294                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15295                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15296                 for (j = 0; j < sub_policy_num; j++) {
15297                         sub_policy = mtr_policy->sub_policys[i][j];
15298                         if (sub_policy)
15299                                 __flow_dv_destroy_sub_policy_rules(dev,
15300                                                                    sub_policy);
15301                 }
15302         }
15303 }
15304
15305 /**
15306  * Destroy policy action, lock free,
15307  * (mutex should be acquired by caller).
15308  * Dispatcher for action type specific call.
15309  *
15310  * @param[in] dev
15311  *   Pointer to the Ethernet device structure.
15312  * @param[in] mtr_policy
15313  *   Meter policy struct.
15314  */
15315 static void
15316 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15317                       struct mlx5_flow_meter_policy *mtr_policy)
15318 {
15319         struct rte_flow_action *rss_action;
15320         struct mlx5_flow_handle dev_handle;
15321         uint32_t i, j;
15322
15323         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15324                 if (mtr_policy->act_cnt[i].rix_mark) {
15325                         flow_dv_tag_release(dev,
15326                                 mtr_policy->act_cnt[i].rix_mark);
15327                         mtr_policy->act_cnt[i].rix_mark = 0;
15328                 }
15329                 if (mtr_policy->act_cnt[i].modify_hdr) {
15330                         dev_handle.dvh.modify_hdr =
15331                                 mtr_policy->act_cnt[i].modify_hdr;
15332                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15333                 }
15334                 switch (mtr_policy->act_cnt[i].fate_action) {
15335                 case MLX5_FLOW_FATE_SHARED_RSS:
15336                         rss_action = mtr_policy->act_cnt[i].rss;
15337                         mlx5_free(rss_action);
15338                         break;
15339                 case MLX5_FLOW_FATE_PORT_ID:
15340                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
15341                                 flow_dv_port_id_action_resource_release(dev,
15342                                 mtr_policy->act_cnt[i].rix_port_id_action);
15343                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15344                         }
15345                         break;
15346                 case MLX5_FLOW_FATE_DROP:
15347                 case MLX5_FLOW_FATE_JUMP:
15348                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15349                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
15350                                                 NULL;
15351                         break;
15352                 default:
15353                         /*Queue action do nothing*/
15354                         break;
15355                 }
15356         }
15357         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15358                 mtr_policy->dr_drop_action[j] = NULL;
15359 }
15360
15361 /**
15362  * Create policy action per domain, lock free,
15363  * (mutex should be acquired by caller).
15364  * Dispatcher for action type specific call.
15365  *
15366  * @param[in] dev
15367  *   Pointer to the Ethernet device structure.
15368  * @param[in] mtr_policy
15369  *   Meter policy struct.
15370  * @param[in] action
15371  *   Action specification used to create meter actions.
15372  * @param[out] error
15373  *   Perform verbose error reporting if not NULL. Initialized in case of
15374  *   error only.
15375  *
15376  * @return
15377  *   0 on success, otherwise negative errno value.
15378  */
15379 static int
15380 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15381                         struct mlx5_flow_meter_policy *mtr_policy,
15382                         const struct rte_flow_action *actions[RTE_COLORS],
15383                         enum mlx5_meter_domain domain,
15384                         struct rte_mtr_error *error)
15385 {
15386         struct mlx5_priv *priv = dev->data->dev_private;
15387         struct rte_flow_error flow_err;
15388         const struct rte_flow_action *act;
15389         uint64_t action_flags;
15390         struct mlx5_flow_handle dh;
15391         struct mlx5_flow dev_flow;
15392         struct mlx5_flow_dv_port_id_action_resource port_id_action;
15393         int i, ret;
15394         uint8_t egress, transfer;
15395         struct mlx5_meter_policy_action_container *act_cnt = NULL;
15396         union {
15397                 struct mlx5_flow_dv_modify_hdr_resource res;
15398                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15399                             sizeof(struct mlx5_modification_cmd) *
15400                             (MLX5_MAX_MODIFY_NUM + 1)];
15401         } mhdr_dummy;
15402         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15403
15404         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15405         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15406         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15407         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15408         memset(&port_id_action, 0,
15409                sizeof(struct mlx5_flow_dv_port_id_action_resource));
15410         memset(mhdr_res, 0, sizeof(*mhdr_res));
15411         mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15412                                        (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15413                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15414         dev_flow.handle = &dh;
15415         dev_flow.dv.port_id_action = &port_id_action;
15416         dev_flow.external = true;
15417         for (i = 0; i < RTE_COLORS; i++) {
15418                 if (i < MLX5_MTR_RTE_COLORS)
15419                         act_cnt = &mtr_policy->act_cnt[i];
15420                 /* Skip the color policy actions creation. */
15421                 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15422                     (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15423                         continue;
15424                 action_flags = 0;
15425                 for (act = actions[i];
15426                      act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15427                         switch (act->type) {
15428                         case RTE_FLOW_ACTION_TYPE_MARK:
15429                         {
15430                                 uint32_t tag_be = mlx5_flow_mark_set
15431                                         (((const struct rte_flow_action_mark *)
15432                                         (act->conf))->id);
15433
15434                                 if (i >= MLX5_MTR_RTE_COLORS)
15435                                         return -rte_mtr_error_set(error,
15436                                           ENOTSUP,
15437                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15438                                           NULL,
15439                                           "cannot create policy "
15440                                           "mark action for this color");
15441                                 dev_flow.handle->mark = 1;
15442                                 if (flow_dv_tag_resource_register(dev, tag_be,
15443                                                   &dev_flow, &flow_err))
15444                                         return -rte_mtr_error_set(error,
15445                                         ENOTSUP,
15446                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15447                                         NULL,
15448                                         "cannot setup policy mark action");
15449                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
15450                                 act_cnt->rix_mark =
15451                                         dev_flow.handle->dvh.rix_tag;
15452                                 action_flags |= MLX5_FLOW_ACTION_MARK;
15453                                 break;
15454                         }
15455                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
15456                                 if (i >= MLX5_MTR_RTE_COLORS)
15457                                         return -rte_mtr_error_set(error,
15458                                           ENOTSUP,
15459                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15460                                           NULL,
15461                                           "cannot create policy "
15462                                           "set tag action for this color");
15463                                 if (flow_dv_convert_action_set_tag
15464                                 (dev, mhdr_res,
15465                                 (const struct rte_flow_action_set_tag *)
15466                                 act->conf,  &flow_err))
15467                                         return -rte_mtr_error_set(error,
15468                                         ENOTSUP,
15469                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15470                                         NULL, "cannot convert policy "
15471                                         "set tag action");
15472                                 if (!mhdr_res->actions_num)
15473                                         return -rte_mtr_error_set(error,
15474                                         ENOTSUP,
15475                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15476                                         NULL, "cannot find policy "
15477                                         "set tag action");
15478                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15479                                 break;
15480                         case RTE_FLOW_ACTION_TYPE_DROP:
15481                         {
15482                                 struct mlx5_flow_mtr_mng *mtrmng =
15483                                                 priv->sh->mtrmng;
15484                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15485
15486                                 /*
15487                                  * Create the drop table with
15488                                  * METER DROP level.
15489                                  */
15490                                 if (!mtrmng->drop_tbl[domain]) {
15491                                         mtrmng->drop_tbl[domain] =
15492                                         flow_dv_tbl_resource_get(dev,
15493                                         MLX5_FLOW_TABLE_LEVEL_METER,
15494                                         egress, transfer, false, NULL, 0,
15495                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15496                                         if (!mtrmng->drop_tbl[domain])
15497                                                 return -rte_mtr_error_set
15498                                         (error, ENOTSUP,
15499                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15500                                         NULL,
15501                                         "Failed to create meter drop table");
15502                                 }
15503                                 tbl_data = container_of
15504                                 (mtrmng->drop_tbl[domain],
15505                                 struct mlx5_flow_tbl_data_entry, tbl);
15506                                 if (i < MLX5_MTR_RTE_COLORS) {
15507                                         act_cnt->dr_jump_action[domain] =
15508                                                 tbl_data->jump.action;
15509                                         act_cnt->fate_action =
15510                                                 MLX5_FLOW_FATE_DROP;
15511                                 }
15512                                 if (i == RTE_COLOR_RED)
15513                                         mtr_policy->dr_drop_action[domain] =
15514                                                 tbl_data->jump.action;
15515                                 action_flags |= MLX5_FLOW_ACTION_DROP;
15516                                 break;
15517                         }
15518                         case RTE_FLOW_ACTION_TYPE_QUEUE:
15519                         {
15520                                 if (i >= MLX5_MTR_RTE_COLORS)
15521                                         return -rte_mtr_error_set(error,
15522                                         ENOTSUP,
15523                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15524                                         NULL, "cannot create policy "
15525                                         "fate queue for this color");
15526                                 act_cnt->queue =
15527                                 ((const struct rte_flow_action_queue *)
15528                                         (act->conf))->index;
15529                                 act_cnt->fate_action =
15530                                         MLX5_FLOW_FATE_QUEUE;
15531                                 dev_flow.handle->fate_action =
15532                                         MLX5_FLOW_FATE_QUEUE;
15533                                 mtr_policy->is_queue = 1;
15534                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15535                                 break;
15536                         }
15537                         case RTE_FLOW_ACTION_TYPE_RSS:
15538                         {
15539                                 int rss_size;
15540
15541                                 if (i >= MLX5_MTR_RTE_COLORS)
15542                                         return -rte_mtr_error_set(error,
15543                                           ENOTSUP,
15544                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15545                                           NULL,
15546                                           "cannot create policy "
15547                                           "rss action for this color");
15548                                 /*
15549                                  * Save RSS conf into policy struct
15550                                  * for translate stage.
15551                                  */
15552                                 rss_size = (int)rte_flow_conv
15553                                         (RTE_FLOW_CONV_OP_ACTION,
15554                                         NULL, 0, act, &flow_err);
15555                                 if (rss_size <= 0)
15556                                         return -rte_mtr_error_set(error,
15557                                           ENOTSUP,
15558                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15559                                           NULL, "Get the wrong "
15560                                           "rss action struct size");
15561                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15562                                                 rss_size, 0, SOCKET_ID_ANY);
15563                                 if (!act_cnt->rss)
15564                                         return -rte_mtr_error_set(error,
15565                                           ENOTSUP,
15566                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15567                                           NULL,
15568                                           "Fail to malloc rss action memory");
15569                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15570                                         act_cnt->rss, rss_size,
15571                                         act, &flow_err);
15572                                 if (ret < 0)
15573                                         return -rte_mtr_error_set(error,
15574                                           ENOTSUP,
15575                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15576                                           NULL, "Fail to save "
15577                                           "rss action into policy struct");
15578                                 act_cnt->fate_action =
15579                                         MLX5_FLOW_FATE_SHARED_RSS;
15580                                 action_flags |= MLX5_FLOW_ACTION_RSS;
15581                                 break;
15582                         }
15583                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
15584                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15585                         {
15586                                 struct mlx5_flow_dv_port_id_action_resource
15587                                         port_id_resource;
15588                                 uint32_t port_id = 0;
15589
15590                                 if (i >= MLX5_MTR_RTE_COLORS)
15591                                         return -rte_mtr_error_set(error,
15592                                         ENOTSUP,
15593                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15594                                         NULL, "cannot create policy "
15595                                         "port action for this color");
15596                                 memset(&port_id_resource, 0,
15597                                         sizeof(port_id_resource));
15598                                 if (flow_dv_translate_action_port_id(dev, act,
15599                                                 &port_id, &flow_err))
15600                                         return -rte_mtr_error_set(error,
15601                                         ENOTSUP,
15602                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15603                                         NULL, "cannot translate "
15604                                         "policy port action");
15605                                 port_id_resource.port_id = port_id;
15606                                 if (flow_dv_port_id_action_resource_register
15607                                         (dev, &port_id_resource,
15608                                         &dev_flow, &flow_err))
15609                                         return -rte_mtr_error_set(error,
15610                                         ENOTSUP,
15611                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15612                                         NULL, "cannot setup "
15613                                         "policy port action");
15614                                 act_cnt->rix_port_id_action =
15615                                         dev_flow.handle->rix_port_id_action;
15616                                 act_cnt->fate_action =
15617                                         MLX5_FLOW_FATE_PORT_ID;
15618                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15619                                 break;
15620                         }
15621                         case RTE_FLOW_ACTION_TYPE_JUMP:
15622                         {
15623                                 uint32_t jump_group = 0;
15624                                 uint32_t table = 0;
15625                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15626                                 struct flow_grp_info grp_info = {
15627                                         .external = !!dev_flow.external,
15628                                         .transfer = !!transfer,
15629                                         .fdb_def_rule = !!priv->fdb_def_rule,
15630                                         .std_tbl_fix = 0,
15631                                         .skip_scale = dev_flow.skip_scale &
15632                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15633                                 };
15634                                 struct mlx5_flow_meter_sub_policy *sub_policy =
15635                                         mtr_policy->sub_policys[domain][0];
15636
15637                                 if (i >= MLX5_MTR_RTE_COLORS)
15638                                         return -rte_mtr_error_set(error,
15639                                           ENOTSUP,
15640                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15641                                           NULL,
15642                                           "cannot create policy "
15643                                           "jump action for this color");
15644                                 jump_group =
15645                                 ((const struct rte_flow_action_jump *)
15646                                                         act->conf)->group;
15647                                 if (mlx5_flow_group_to_table(dev, NULL,
15648                                                        jump_group,
15649                                                        &table,
15650                                                        &grp_info, &flow_err))
15651                                         return -rte_mtr_error_set(error,
15652                                         ENOTSUP,
15653                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15654                                         NULL, "cannot setup "
15655                                         "policy jump action");
15656                                 sub_policy->jump_tbl[i] =
15657                                 flow_dv_tbl_resource_get(dev,
15658                                         table, egress,
15659                                         transfer,
15660                                         !!dev_flow.external,
15661                                         NULL, jump_group, 0,
15662                                         0, &flow_err);
15663                                 if
15664                                 (!sub_policy->jump_tbl[i])
15665                                         return  -rte_mtr_error_set(error,
15666                                         ENOTSUP,
15667                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15668                                         NULL, "cannot create jump action.");
15669                                 tbl_data = container_of
15670                                 (sub_policy->jump_tbl[i],
15671                                 struct mlx5_flow_tbl_data_entry, tbl);
15672                                 act_cnt->dr_jump_action[domain] =
15673                                         tbl_data->jump.action;
15674                                 act_cnt->fate_action =
15675                                         MLX5_FLOW_FATE_JUMP;
15676                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
15677                                 break;
15678                         }
15679                         /*
15680                          * No need to check meter hierarchy for Y or R colors
15681                          * here since it is done in the validation stage.
15682                          */
15683                         case RTE_FLOW_ACTION_TYPE_METER:
15684                         {
15685                                 const struct rte_flow_action_meter *mtr;
15686                                 struct mlx5_flow_meter_info *next_fm;
15687                                 struct mlx5_flow_meter_policy *next_policy;
15688                                 struct rte_flow_action tag_action;
15689                                 struct mlx5_rte_flow_action_set_tag set_tag;
15690                                 uint32_t next_mtr_idx = 0;
15691
15692                                 mtr = act->conf;
15693                                 next_fm = mlx5_flow_meter_find(priv,
15694                                                         mtr->mtr_id,
15695                                                         &next_mtr_idx);
15696                                 if (!next_fm)
15697                                         return -rte_mtr_error_set(error, EINVAL,
15698                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15699                                                 "Fail to find next meter.");
15700                                 if (next_fm->def_policy)
15701                                         return -rte_mtr_error_set(error, EINVAL,
15702                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15703                                 "Hierarchy only supports termination meter.");
15704                                 next_policy = mlx5_flow_meter_policy_find(dev,
15705                                                 next_fm->policy_id, NULL);
15706                                 MLX5_ASSERT(next_policy);
15707                                 if (next_fm->drop_cnt) {
15708                                         set_tag.id =
15709                                                 (enum modify_reg)
15710                                                 mlx5_flow_get_reg_id(dev,
15711                                                 MLX5_MTR_ID,
15712                                                 0,
15713                                                 (struct rte_flow_error *)error);
15714                                         set_tag.offset = (priv->mtr_reg_share ?
15715                                                 MLX5_MTR_COLOR_BITS : 0);
15716                                         set_tag.length = (priv->mtr_reg_share ?
15717                                                MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15718                                                MLX5_REG_BITS);
15719                                         set_tag.data = next_mtr_idx;
15720                                         tag_action.type =
15721                                                 (enum rte_flow_action_type)
15722                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15723                                         tag_action.conf = &set_tag;
15724                                         if (flow_dv_convert_action_set_reg
15725                                                 (mhdr_res, &tag_action,
15726                                                 (struct rte_flow_error *)error))
15727                                                 return -rte_errno;
15728                                         action_flags |=
15729                                                 MLX5_FLOW_ACTION_SET_TAG;
15730                                 }
15731                                 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15732                                 act_cnt->next_mtr_id = next_fm->meter_id;
15733                                 act_cnt->next_sub_policy = NULL;
15734                                 mtr_policy->is_hierarchy = 1;
15735                                 mtr_policy->dev = next_policy->dev;
15736                                 action_flags |=
15737                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15738                                 break;
15739                         }
15740                         default:
15741                                 return -rte_mtr_error_set(error, ENOTSUP,
15742                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15743                                           NULL, "action type not supported");
15744                         }
15745                         if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15746                                 /* create modify action if needed. */
15747                                 dev_flow.dv.group = 1;
15748                                 if (flow_dv_modify_hdr_resource_register
15749                                         (dev, mhdr_res, &dev_flow, &flow_err))
15750                                         return -rte_mtr_error_set(error,
15751                                                 ENOTSUP,
15752                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
15753                                                 NULL, "cannot register policy "
15754                                                 "set tag action");
15755                                 act_cnt->modify_hdr =
15756                                         dev_flow.handle->dvh.modify_hdr;
15757                         }
15758                 }
15759         }
15760         return 0;
15761 }
15762
15763 /**
15764  * Create policy action per domain, lock free,
15765  * (mutex should be acquired by caller).
15766  * Dispatcher for action type specific call.
15767  *
15768  * @param[in] dev
15769  *   Pointer to the Ethernet device structure.
15770  * @param[in] mtr_policy
15771  *   Meter policy struct.
15772  * @param[in] action
15773  *   Action specification used to create meter actions.
15774  * @param[out] error
15775  *   Perform verbose error reporting if not NULL. Initialized in case of
15776  *   error only.
15777  *
15778  * @return
15779  *   0 on success, otherwise negative errno value.
15780  */
15781 static int
15782 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15783                       struct mlx5_flow_meter_policy *mtr_policy,
15784                       const struct rte_flow_action *actions[RTE_COLORS],
15785                       struct rte_mtr_error *error)
15786 {
15787         int ret, i;
15788         uint16_t sub_policy_num;
15789
15790         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15791                 sub_policy_num = (mtr_policy->sub_policy_num >>
15792                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15793                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15794                 if (sub_policy_num) {
15795                         ret = __flow_dv_create_domain_policy_acts(dev,
15796                                 mtr_policy, actions,
15797                                 (enum mlx5_meter_domain)i, error);
15798                         /* Cleaning resource is done in the caller level. */
15799                         if (ret)
15800                                 return ret;
15801                 }
15802         }
15803         return 0;
15804 }
15805
15806 /**
15807  * Query a DV flow rule for its statistics via DevX.
15808  *
15809  * @param[in] dev
15810  *   Pointer to Ethernet device.
15811  * @param[in] cnt_idx
15812  *   Index to the flow counter.
15813  * @param[out] data
15814  *   Data retrieved by the query.
15815  * @param[out] error
15816  *   Perform verbose error reporting if not NULL.
15817  *
15818  * @return
15819  *   0 on success, a negative errno value otherwise and rte_errno is set.
15820  */
15821 int
15822 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15823                     struct rte_flow_error *error)
15824 {
15825         struct mlx5_priv *priv = dev->data->dev_private;
15826         struct rte_flow_query_count *qc = data;
15827
15828         if (!priv->sh->devx)
15829                 return rte_flow_error_set(error, ENOTSUP,
15830                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15831                                           NULL,
15832                                           "counters are not supported");
15833         if (cnt_idx) {
15834                 uint64_t pkts, bytes;
15835                 struct mlx5_flow_counter *cnt;
15836                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15837
15838                 if (err)
15839                         return rte_flow_error_set(error, -err,
15840                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15841                                         NULL, "cannot read counters");
15842                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15843                 qc->hits_set = 1;
15844                 qc->bytes_set = 1;
15845                 qc->hits = pkts - cnt->hits;
15846                 qc->bytes = bytes - cnt->bytes;
15847                 if (qc->reset) {
15848                         cnt->hits = pkts;
15849                         cnt->bytes = bytes;
15850                 }
15851                 return 0;
15852         }
15853         return rte_flow_error_set(error, EINVAL,
15854                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15855                                   NULL,
15856                                   "counters are not available");
15857 }
15858
15859
15860 /**
15861  * Query counter's action pointer for a DV flow rule via DevX.
15862  *
15863  * @param[in] dev
15864  *   Pointer to Ethernet device.
15865  * @param[in] cnt_idx
15866  *   Index to the flow counter.
15867  * @param[out] action_ptr
15868  *   Action pointer for counter.
15869  * @param[out] error
15870  *   Perform verbose error reporting if not NULL.
15871  *
15872  * @return
15873  *   0 on success, a negative errno value otherwise and rte_errno is set.
15874  */
15875 int
15876 flow_dv_query_count_ptr(struct rte_eth_dev *dev, uint32_t cnt_idx,
15877         void **action_ptr, struct rte_flow_error *error)
15878 {
15879         struct mlx5_priv *priv = dev->data->dev_private;
15880
15881         if (!priv->sh->devx || !action_ptr)
15882                 return rte_flow_error_set(error, ENOTSUP,
15883                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15884                                           NULL,
15885                                           "counters are not supported");
15886
15887         if (cnt_idx) {
15888                 struct mlx5_flow_counter *cnt = NULL;
15889                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15890                 if (cnt) {
15891                         *action_ptr = cnt->action;
15892                         return 0;
15893                 }
15894         }
15895         return rte_flow_error_set(error, EINVAL,
15896                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15897                                   NULL,
15898                                   "counters are not available");
15899 }
15900
15901 static int
15902 flow_dv_action_query(struct rte_eth_dev *dev,
15903                      const struct rte_flow_action_handle *handle, void *data,
15904                      struct rte_flow_error *error)
15905 {
15906         struct mlx5_age_param *age_param;
15907         struct rte_flow_query_age *resp;
15908         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15909         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15910         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15911         struct mlx5_priv *priv = dev->data->dev_private;
15912         struct mlx5_aso_ct_action *ct;
15913         uint16_t owner;
15914         uint32_t dev_idx;
15915
15916         switch (type) {
15917         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15918                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15919                 resp = data;
15920                 resp->aged = __atomic_load_n(&age_param->state,
15921                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
15922                                                                           1 : 0;
15923                 resp->sec_since_last_hit_valid = !resp->aged;
15924                 if (resp->sec_since_last_hit_valid)
15925                         resp->sec_since_last_hit = __atomic_load_n
15926                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15927                 return 0;
15928         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15929                 return flow_dv_query_count(dev, idx, data, error);
15930         case MLX5_INDIRECT_ACTION_TYPE_CT:
15931                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15932                 if (owner != PORT_ID(priv))
15933                         return rte_flow_error_set(error, EACCES,
15934                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15935                                         NULL,
15936                                         "CT object owned by another port");
15937                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15938                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15939                 MLX5_ASSERT(ct);
15940                 if (!ct->refcnt)
15941                         return rte_flow_error_set(error, EFAULT,
15942                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15943                                         NULL,
15944                                         "CT object is inactive");
15945                 ((struct rte_flow_action_conntrack *)data)->peer_port =
15946                                                         ct->peer;
15947                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15948                                                         ct->is_original;
15949                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15950                         return rte_flow_error_set(error, EIO,
15951                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15952                                         NULL,
15953                                         "Failed to query CT context");
15954                 return 0;
15955         default:
15956                 return rte_flow_error_set(error, ENOTSUP,
15957                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15958                                           "action type query not supported");
15959         }
15960 }
15961
15962 /**
15963  * Query a flow rule AGE action for aging information.
15964  *
15965  * @param[in] dev
15966  *   Pointer to Ethernet device.
15967  * @param[in] flow
15968  *   Pointer to the sub flow.
15969  * @param[out] data
15970  *   data retrieved by the query.
15971  * @param[out] error
15972  *   Perform verbose error reporting if not NULL.
15973  *
15974  * @return
15975  *   0 on success, a negative errno value otherwise and rte_errno is set.
15976  */
15977 static int
15978 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15979                   void *data, struct rte_flow_error *error)
15980 {
15981         struct rte_flow_query_age *resp = data;
15982         struct mlx5_age_param *age_param;
15983
15984         if (flow->age) {
15985                 struct mlx5_aso_age_action *act =
15986                                      flow_aso_age_get_by_idx(dev, flow->age);
15987
15988                 age_param = &act->age_params;
15989         } else if (flow->counter) {
15990                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15991
15992                 if (!age_param || !age_param->timeout)
15993                         return rte_flow_error_set
15994                                         (error, EINVAL,
15995                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15996                                          NULL, "cannot read age data");
15997         } else {
15998                 return rte_flow_error_set(error, EINVAL,
15999                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16000                                           NULL, "age data not available");
16001         }
16002         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
16003                                      AGE_TMOUT ? 1 : 0;
16004         resp->sec_since_last_hit_valid = !resp->aged;
16005         if (resp->sec_since_last_hit_valid)
16006                 resp->sec_since_last_hit = __atomic_load_n
16007                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
16008         return 0;
16009 }
16010
16011 /**
16012  * Query a flow.
16013  *
16014  * @see rte_flow_query()
16015  * @see rte_flow_ops
16016  */
16017 static int
16018 flow_dv_query(struct rte_eth_dev *dev,
16019               struct rte_flow *flow __rte_unused,
16020               const struct rte_flow_action *actions __rte_unused,
16021               void *data __rte_unused,
16022               struct rte_flow_error *error __rte_unused)
16023 {
16024         int ret = -EINVAL;
16025
16026         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
16027                 switch (actions->type) {
16028                 case RTE_FLOW_ACTION_TYPE_VOID:
16029                         break;
16030                 case RTE_FLOW_ACTION_TYPE_COUNT:
16031                         ret = flow_dv_query_count(dev, flow->counter, data,
16032                                                   error);
16033                         break;
16034                 case RTE_FLOW_ACTION_TYPE_AGE:
16035                         ret = flow_dv_query_age(dev, flow, data, error);
16036                         break;
16037                 default:
16038                         return rte_flow_error_set(error, ENOTSUP,
16039                                                   RTE_FLOW_ERROR_TYPE_ACTION,
16040                                                   actions,
16041                                                   "action not supported");
16042                 }
16043         }
16044         return ret;
16045 }
16046
16047 /**
16048  * Destroy the meter table set.
16049  * Lock free, (mutex should be acquired by caller).
16050  *
16051  * @param[in] dev
16052  *   Pointer to Ethernet device.
16053  * @param[in] fm
16054  *   Meter information table.
16055  */
16056 static void
16057 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
16058                         struct mlx5_flow_meter_info *fm)
16059 {
16060         struct mlx5_priv *priv = dev->data->dev_private;
16061         int i;
16062
16063         if (!fm || !priv->config.dv_flow_en)
16064                 return;
16065         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16066                 if (fm->drop_rule[i]) {
16067                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
16068                         fm->drop_rule[i] = NULL;
16069                 }
16070         }
16071 }
16072
16073 static void
16074 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
16075 {
16076         struct mlx5_priv *priv = dev->data->dev_private;
16077         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16078         struct mlx5_flow_tbl_data_entry *tbl;
16079         int i, j;
16080
16081         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16082                 if (mtrmng->def_rule[i]) {
16083                         claim_zero(mlx5_flow_os_destroy_flow
16084                                         (mtrmng->def_rule[i]));
16085                         mtrmng->def_rule[i] = NULL;
16086                 }
16087                 if (mtrmng->def_matcher[i]) {
16088                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
16089                                 struct mlx5_flow_tbl_data_entry, tbl);
16090                         mlx5_list_unregister(tbl->matchers,
16091                                              &mtrmng->def_matcher[i]->entry);
16092                         mtrmng->def_matcher[i] = NULL;
16093                 }
16094                 for (j = 0; j < MLX5_REG_BITS; j++) {
16095                         if (mtrmng->drop_matcher[i][j]) {
16096                                 tbl =
16097                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
16098                                              struct mlx5_flow_tbl_data_entry,
16099                                              tbl);
16100                                 mlx5_list_unregister(tbl->matchers,
16101                                             &mtrmng->drop_matcher[i][j]->entry);
16102                                 mtrmng->drop_matcher[i][j] = NULL;
16103                         }
16104                 }
16105                 if (mtrmng->drop_tbl[i]) {
16106                         flow_dv_tbl_resource_release(MLX5_SH(dev),
16107                                 mtrmng->drop_tbl[i]);
16108                         mtrmng->drop_tbl[i] = NULL;
16109                 }
16110         }
16111 }
16112
16113 /* Number of meter flow actions, count and jump or count and drop. */
16114 #define METER_ACTIONS 2
16115
16116 static void
16117 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
16118                                     enum mlx5_meter_domain domain)
16119 {
16120         struct mlx5_priv *priv = dev->data->dev_private;
16121         struct mlx5_flow_meter_def_policy *def_policy =
16122                         priv->sh->mtrmng->def_policy[domain];
16123
16124         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
16125         mlx5_free(def_policy);
16126         priv->sh->mtrmng->def_policy[domain] = NULL;
16127 }
16128
16129 /**
16130  * Destroy the default policy table set.
16131  *
16132  * @param[in] dev
16133  *   Pointer to Ethernet device.
16134  */
16135 static void
16136 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
16137 {
16138         struct mlx5_priv *priv = dev->data->dev_private;
16139         int i;
16140
16141         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
16142                 if (priv->sh->mtrmng->def_policy[i])
16143                         __flow_dv_destroy_domain_def_policy(dev,
16144                                         (enum mlx5_meter_domain)i);
16145         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
16146 }
16147
16148 static int
16149 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
16150                         uint32_t color_reg_c_idx,
16151                         enum rte_color color, void *matcher_object,
16152                         int actions_n, void *actions,
16153                         bool match_src_port, const struct rte_flow_item *item,
16154                         void **rule, const struct rte_flow_attr *attr)
16155 {
16156         int ret;
16157         struct mlx5_flow_dv_match_params value = {
16158                 .size = sizeof(value.buf),
16159         };
16160         struct mlx5_flow_dv_match_params matcher = {
16161                 .size = sizeof(matcher.buf),
16162         };
16163         struct mlx5_priv *priv = dev->data->dev_private;
16164         uint8_t misc_mask;
16165
16166         if (match_src_port && (priv->representor || priv->master)) {
16167                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
16168                                                    value.buf, item, attr)) {
16169                         DRV_LOG(ERR, "Failed to create meter policy%d flow's"
16170                                 " value with port.", color);
16171                         return -1;
16172                 }
16173         }
16174         flow_dv_match_meta_reg(matcher.buf, value.buf,
16175                                (enum modify_reg)color_reg_c_idx,
16176                                rte_col_2_mlx5_col(color), UINT32_MAX);
16177         misc_mask = flow_dv_matcher_enable(value.buf);
16178         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16179         ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
16180                                        actions_n, actions, rule);
16181         if (ret) {
16182                 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
16183                 return -1;
16184         }
16185         return 0;
16186 }
16187
16188 static int
16189 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
16190                         uint32_t color_reg_c_idx,
16191                         uint16_t priority,
16192                         struct mlx5_flow_meter_sub_policy *sub_policy,
16193                         const struct rte_flow_attr *attr,
16194                         bool match_src_port,
16195                         const struct rte_flow_item *item,
16196                         struct mlx5_flow_dv_matcher **policy_matcher,
16197                         struct rte_flow_error *error)
16198 {
16199         struct mlx5_list_entry *entry;
16200         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16201         struct mlx5_flow_dv_matcher matcher = {
16202                 .mask = {
16203                         .size = sizeof(matcher.mask.buf),
16204                 },
16205                 .tbl = tbl_rsc,
16206         };
16207         struct mlx5_flow_dv_match_params value = {
16208                 .size = sizeof(value.buf),
16209         };
16210         struct mlx5_flow_cb_ctx ctx = {
16211                 .error = error,
16212                 .data = &matcher,
16213         };
16214         struct mlx5_flow_tbl_data_entry *tbl_data;
16215         struct mlx5_priv *priv = dev->data->dev_private;
16216         const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16217
16218         if (match_src_port && (priv->representor || priv->master)) {
16219                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16220                                                    value.buf, item, attr)) {
16221                         DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16222                                 " with port.", priority);
16223                         return -1;
16224                 }
16225         }
16226         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16227         if (priority < RTE_COLOR_RED)
16228                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16229                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
16230         matcher.priority = priority;
16231         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16232                                     matcher.mask.size);
16233         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16234         if (!entry) {
16235                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16236                 return -1;
16237         }
16238         *policy_matcher =
16239                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16240         return 0;
16241 }
16242
16243 /**
16244  * Create the policy rules per domain.
16245  *
16246  * @param[in] dev
16247  *   Pointer to Ethernet device.
16248  * @param[in] sub_policy
16249  *    Pointer to sub policy table..
16250  * @param[in] egress
16251  *   Direction of the table.
16252  * @param[in] transfer
16253  *   E-Switch or NIC flow.
16254  * @param[in] acts
16255  *   Pointer to policy action list per color.
16256  *
16257  * @return
16258  *   0 on success, -1 otherwise.
16259  */
16260 static int
16261 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16262                 struct mlx5_flow_meter_sub_policy *sub_policy,
16263                 uint8_t egress, uint8_t transfer, bool match_src_port,
16264                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16265 {
16266         struct mlx5_priv *priv = dev->data->dev_private;
16267         struct rte_flow_error flow_err;
16268         uint32_t color_reg_c_idx;
16269         struct rte_flow_attr attr = {
16270                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16271                 .priority = 0,
16272                 .ingress = 0,
16273                 .egress = !!egress,
16274                 .transfer = !!transfer,
16275                 .reserved = 0,
16276         };
16277         int i;
16278         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16279         struct mlx5_sub_policy_color_rule *color_rule;
16280         bool svport_match;
16281         struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16282
16283         if (ret < 0)
16284                 return -1;
16285         /* Create policy table with POLICY level. */
16286         if (!sub_policy->tbl_rsc)
16287                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16288                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
16289                                 egress, transfer, false, NULL, 0, 0,
16290                                 sub_policy->idx, &flow_err);
16291         if (!sub_policy->tbl_rsc) {
16292                 DRV_LOG(ERR,
16293                         "Failed to create meter sub policy table.");
16294                 return -1;
16295         }
16296         /* Prepare matchers. */
16297         color_reg_c_idx = ret;
16298         for (i = 0; i < RTE_COLORS; i++) {
16299                 TAILQ_INIT(&sub_policy->color_rules[i]);
16300                 if (!acts[i].actions_n)
16301                         continue;
16302                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16303                                 sizeof(struct mlx5_sub_policy_color_rule),
16304                                 0, SOCKET_ID_ANY);
16305                 if (!color_rule) {
16306                         DRV_LOG(ERR, "No memory to create color rule.");
16307                         goto err_exit;
16308                 }
16309                 tmp_rules[i] = color_rule;
16310                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16311                                   color_rule, next_port);
16312                 color_rule->src_port = priv->representor_id;
16313                 /* No use. */
16314                 attr.priority = i;
16315                 /* Create matchers for colors. */
16316                 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16317                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16318                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16319                                 &attr, svport_match, NULL,
16320                                 &color_rule->matcher, &flow_err)) {
16321                         DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16322                         goto err_exit;
16323                 }
16324                 /* Create flow, matching color. */
16325                 if (__flow_dv_create_policy_flow(dev,
16326                                 color_reg_c_idx, (enum rte_color)i,
16327                                 color_rule->matcher->matcher_object,
16328                                 acts[i].actions_n, acts[i].dv_actions,
16329                                 svport_match, NULL, &color_rule->rule,
16330                                 &attr)) {
16331                         DRV_LOG(ERR, "Failed to create color%u rule.", i);
16332                         goto err_exit;
16333                 }
16334         }
16335         return 0;
16336 err_exit:
16337         /* All the policy rules will be cleared. */
16338         do {
16339                 color_rule = tmp_rules[i];
16340                 if (color_rule) {
16341                         if (color_rule->rule)
16342                                 mlx5_flow_os_destroy_flow(color_rule->rule);
16343                         if (color_rule->matcher) {
16344                                 struct mlx5_flow_tbl_data_entry *tbl =
16345                                         container_of(color_rule->matcher->tbl,
16346                                                      typeof(*tbl), tbl);
16347                                 mlx5_list_unregister(tbl->matchers,
16348                                                 &color_rule->matcher->entry);
16349                         }
16350                         TAILQ_REMOVE(&sub_policy->color_rules[i],
16351                                      color_rule, next_port);
16352                         mlx5_free(color_rule);
16353                 }
16354         } while (i--);
16355         return -1;
16356 }
16357
16358 static int
16359 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16360                         struct mlx5_flow_meter_policy *mtr_policy,
16361                         struct mlx5_flow_meter_sub_policy *sub_policy,
16362                         uint32_t domain)
16363 {
16364         struct mlx5_priv *priv = dev->data->dev_private;
16365         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16366         struct mlx5_flow_dv_tag_resource *tag;
16367         struct mlx5_flow_dv_port_id_action_resource *port_action;
16368         struct mlx5_hrxq *hrxq;
16369         struct mlx5_flow_meter_info *next_fm = NULL;
16370         struct mlx5_flow_meter_policy *next_policy;
16371         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16372         struct mlx5_flow_tbl_data_entry *tbl_data;
16373         struct rte_flow_error error;
16374         uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16375         uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16376         bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16377         bool match_src_port = false;
16378         int i;
16379
16380         /* If RSS or Queue, no previous actions / rules is created. */
16381         for (i = 0; i < RTE_COLORS; i++) {
16382                 acts[i].actions_n = 0;
16383                 if (i == RTE_COLOR_RED) {
16384                         /* Only support drop on red. */
16385                         acts[i].dv_actions[0] =
16386                                 mtr_policy->dr_drop_action[domain];
16387                         acts[i].actions_n = 1;
16388                         continue;
16389                 }
16390                 if (i == RTE_COLOR_GREEN &&
16391                     mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16392                         struct rte_flow_attr attr = {
16393                                 .transfer = transfer
16394                         };
16395
16396                         next_fm = mlx5_flow_meter_find(priv,
16397                                         mtr_policy->act_cnt[i].next_mtr_id,
16398                                         NULL);
16399                         if (!next_fm) {
16400                                 DRV_LOG(ERR,
16401                                         "Failed to get next hierarchy meter.");
16402                                 goto err_exit;
16403                         }
16404                         if (mlx5_flow_meter_attach(priv, next_fm,
16405                                                    &attr, &error)) {
16406                                 DRV_LOG(ERR, "%s", error.message);
16407                                 next_fm = NULL;
16408                                 goto err_exit;
16409                         }
16410                         /* Meter action must be the first for TX. */
16411                         if (mtr_first) {
16412                                 acts[i].dv_actions[acts[i].actions_n] =
16413                                         next_fm->meter_action;
16414                                 acts[i].actions_n++;
16415                         }
16416                 }
16417                 if (mtr_policy->act_cnt[i].rix_mark) {
16418                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16419                                         mtr_policy->act_cnt[i].rix_mark);
16420                         if (!tag) {
16421                                 DRV_LOG(ERR, "Failed to find "
16422                                 "mark action for policy.");
16423                                 goto err_exit;
16424                         }
16425                         acts[i].dv_actions[acts[i].actions_n] = tag->action;
16426                         acts[i].actions_n++;
16427                 }
16428                 if (mtr_policy->act_cnt[i].modify_hdr) {
16429                         acts[i].dv_actions[acts[i].actions_n] =
16430                                 mtr_policy->act_cnt[i].modify_hdr->action;
16431                         acts[i].actions_n++;
16432                 }
16433                 if (mtr_policy->act_cnt[i].fate_action) {
16434                         switch (mtr_policy->act_cnt[i].fate_action) {
16435                         case MLX5_FLOW_FATE_PORT_ID:
16436                                 port_action = mlx5_ipool_get
16437                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16438                                 mtr_policy->act_cnt[i].rix_port_id_action);
16439                                 if (!port_action) {
16440                                         DRV_LOG(ERR, "Failed to find "
16441                                                 "port action for policy.");
16442                                         goto err_exit;
16443                                 }
16444                                 acts[i].dv_actions[acts[i].actions_n] =
16445                                         port_action->action;
16446                                 acts[i].actions_n++;
16447                                 mtr_policy->dev = dev;
16448                                 match_src_port = true;
16449                                 break;
16450                         case MLX5_FLOW_FATE_DROP:
16451                         case MLX5_FLOW_FATE_JUMP:
16452                                 acts[i].dv_actions[acts[i].actions_n] =
16453                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
16454                                 acts[i].actions_n++;
16455                                 break;
16456                         case MLX5_FLOW_FATE_SHARED_RSS:
16457                         case MLX5_FLOW_FATE_QUEUE:
16458                                 hrxq = mlx5_ipool_get
16459                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16460                                          sub_policy->rix_hrxq[i]);
16461                                 if (!hrxq) {
16462                                         DRV_LOG(ERR, "Failed to find "
16463                                                 "queue action for policy.");
16464                                         goto err_exit;
16465                                 }
16466                                 acts[i].dv_actions[acts[i].actions_n] =
16467                                         hrxq->action;
16468                                 acts[i].actions_n++;
16469                                 break;
16470                         case MLX5_FLOW_FATE_MTR:
16471                                 if (!next_fm) {
16472                                         DRV_LOG(ERR,
16473                                                 "No next hierarchy meter.");
16474                                         goto err_exit;
16475                                 }
16476                                 if (!mtr_first) {
16477                                         acts[i].dv_actions[acts[i].actions_n] =
16478                                                         next_fm->meter_action;
16479                                         acts[i].actions_n++;
16480                                 }
16481                                 if (mtr_policy->act_cnt[i].next_sub_policy) {
16482                                         next_sub_policy =
16483                                         mtr_policy->act_cnt[i].next_sub_policy;
16484                                 } else {
16485                                         next_policy =
16486                                                 mlx5_flow_meter_policy_find(dev,
16487                                                 next_fm->policy_id, NULL);
16488                                         MLX5_ASSERT(next_policy);
16489                                         next_sub_policy =
16490                                         next_policy->sub_policys[domain][0];
16491                                 }
16492                                 tbl_data =
16493                                         container_of(next_sub_policy->tbl_rsc,
16494                                         struct mlx5_flow_tbl_data_entry, tbl);
16495                                 acts[i].dv_actions[acts[i].actions_n++] =
16496                                                         tbl_data->jump.action;
16497                                 if (mtr_policy->act_cnt[i].modify_hdr)
16498                                         match_src_port = !!transfer;
16499                                 break;
16500                         default:
16501                                 /*Queue action do nothing*/
16502                                 break;
16503                         }
16504                 }
16505         }
16506         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16507                                 egress, transfer, match_src_port, acts)) {
16508                 DRV_LOG(ERR,
16509                         "Failed to create policy rules per domain.");
16510                 goto err_exit;
16511         }
16512         return 0;
16513 err_exit:
16514         if (next_fm)
16515                 mlx5_flow_meter_detach(priv, next_fm);
16516         return -1;
16517 }
16518
16519 /**
16520  * Create the policy rules.
16521  *
16522  * @param[in] dev
16523  *   Pointer to Ethernet device.
16524  * @param[in,out] mtr_policy
16525  *   Pointer to meter policy table.
16526  *
16527  * @return
16528  *   0 on success, -1 otherwise.
16529  */
16530 static int
16531 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16532                              struct mlx5_flow_meter_policy *mtr_policy)
16533 {
16534         int i;
16535         uint16_t sub_policy_num;
16536
16537         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16538                 sub_policy_num = (mtr_policy->sub_policy_num >>
16539                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16540                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16541                 if (!sub_policy_num)
16542                         continue;
16543                 /* Prepare actions list and create policy rules. */
16544                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16545                         mtr_policy->sub_policys[i][0], i)) {
16546                         DRV_LOG(ERR, "Failed to create policy action "
16547                                 "list per domain.");
16548                         return -1;
16549                 }
16550         }
16551         return 0;
16552 }
16553
16554 static int
16555 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16556 {
16557         struct mlx5_priv *priv = dev->data->dev_private;
16558         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16559         struct mlx5_flow_meter_def_policy *def_policy;
16560         struct mlx5_flow_tbl_resource *jump_tbl;
16561         struct mlx5_flow_tbl_data_entry *tbl_data;
16562         uint8_t egress, transfer;
16563         struct rte_flow_error error;
16564         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16565         int ret;
16566
16567         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16568         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16569         def_policy = mtrmng->def_policy[domain];
16570         if (!def_policy) {
16571                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16572                         sizeof(struct mlx5_flow_meter_def_policy),
16573                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16574                 if (!def_policy) {
16575                         DRV_LOG(ERR, "Failed to alloc default policy table.");
16576                         goto def_policy_error;
16577                 }
16578                 mtrmng->def_policy[domain] = def_policy;
16579                 /* Create the meter suffix table with SUFFIX level. */
16580                 jump_tbl = flow_dv_tbl_resource_get(dev,
16581                                 MLX5_FLOW_TABLE_LEVEL_METER,
16582                                 egress, transfer, false, NULL, 0,
16583                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16584                 if (!jump_tbl) {
16585                         DRV_LOG(ERR,
16586                                 "Failed to create meter suffix table.");
16587                         goto def_policy_error;
16588                 }
16589                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16590                 tbl_data = container_of(jump_tbl,
16591                                         struct mlx5_flow_tbl_data_entry, tbl);
16592                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16593                                                 tbl_data->jump.action;
16594                 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16595                 acts[RTE_COLOR_GREEN].actions_n = 1;
16596                 /*
16597                  * YELLOW has the same default policy as GREEN does.
16598                  * G & Y share the same table and action. The 2nd time of table
16599                  * resource getting is just to update the reference count for
16600                  * the releasing stage.
16601                  */
16602                 jump_tbl = flow_dv_tbl_resource_get(dev,
16603                                 MLX5_FLOW_TABLE_LEVEL_METER,
16604                                 egress, transfer, false, NULL, 0,
16605                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16606                 if (!jump_tbl) {
16607                         DRV_LOG(ERR,
16608                                 "Failed to get meter suffix table.");
16609                         goto def_policy_error;
16610                 }
16611                 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16612                 tbl_data = container_of(jump_tbl,
16613                                         struct mlx5_flow_tbl_data_entry, tbl);
16614                 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16615                                                 tbl_data->jump.action;
16616                 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16617                 acts[RTE_COLOR_YELLOW].actions_n = 1;
16618                 /* Create jump action to the drop table. */
16619                 if (!mtrmng->drop_tbl[domain]) {
16620                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16621                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16622                                  egress, transfer, false, NULL, 0,
16623                                  0, MLX5_MTR_TABLE_ID_DROP, &error);
16624                         if (!mtrmng->drop_tbl[domain]) {
16625                                 DRV_LOG(ERR, "Failed to create meter "
16626                                         "drop table for default policy.");
16627                                 goto def_policy_error;
16628                         }
16629                 }
16630                 /* all RED: unique Drop table for jump action. */
16631                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16632                                         struct mlx5_flow_tbl_data_entry, tbl);
16633                 def_policy->dr_jump_action[RTE_COLOR_RED] =
16634                                                 tbl_data->jump.action;
16635                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16636                 acts[RTE_COLOR_RED].actions_n = 1;
16637                 /* Create default policy rules. */
16638                 ret = __flow_dv_create_domain_policy_rules(dev,
16639                                         &def_policy->sub_policy,
16640                                         egress, transfer, false, acts);
16641                 if (ret) {
16642                         DRV_LOG(ERR, "Failed to create default policy rules.");
16643                         goto def_policy_error;
16644                 }
16645         }
16646         return 0;
16647 def_policy_error:
16648         __flow_dv_destroy_domain_def_policy(dev,
16649                                             (enum mlx5_meter_domain)domain);
16650         return -1;
16651 }
16652
16653 /**
16654  * Create the default policy table set.
16655  *
16656  * @param[in] dev
16657  *   Pointer to Ethernet device.
16658  * @return
16659  *   0 on success, -1 otherwise.
16660  */
16661 static int
16662 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16663 {
16664         struct mlx5_priv *priv = dev->data->dev_private;
16665         int i;
16666
16667         /* Non-termination policy table. */
16668         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16669                 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16670                         continue;
16671                 if (__flow_dv_create_domain_def_policy(dev, i)) {
16672                         DRV_LOG(ERR, "Failed to create default policy");
16673                         /* Rollback the created default policies for others. */
16674                         flow_dv_destroy_def_policy(dev);
16675                         return -1;
16676                 }
16677         }
16678         return 0;
16679 }
16680
16681 /**
16682  * Create the needed meter tables.
16683  * Lock free, (mutex should be acquired by caller).
16684  *
16685  * @param[in] dev
16686  *   Pointer to Ethernet device.
16687  * @param[in] fm
16688  *   Meter information table.
16689  * @param[in] mtr_idx
16690  *   Meter index.
16691  * @param[in] domain_bitmap
16692  *   Domain bitmap.
16693  * @return
16694  *   0 on success, -1 otherwise.
16695  */
16696 static int
16697 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16698                         struct mlx5_flow_meter_info *fm,
16699                         uint32_t mtr_idx,
16700                         uint8_t domain_bitmap)
16701 {
16702         struct mlx5_priv *priv = dev->data->dev_private;
16703         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16704         struct rte_flow_error error;
16705         struct mlx5_flow_tbl_data_entry *tbl_data;
16706         uint8_t egress, transfer;
16707         void *actions[METER_ACTIONS];
16708         int domain, ret, i;
16709         struct mlx5_flow_counter *cnt;
16710         struct mlx5_flow_dv_match_params value = {
16711                 .size = sizeof(value.buf),
16712         };
16713         struct mlx5_flow_dv_match_params matcher_para = {
16714                 .size = sizeof(matcher_para.buf),
16715         };
16716         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16717                                                      0, &error);
16718         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16719         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16720         struct mlx5_list_entry *entry;
16721         struct mlx5_flow_dv_matcher matcher = {
16722                 .mask = {
16723                         .size = sizeof(matcher.mask.buf),
16724                 },
16725         };
16726         struct mlx5_flow_dv_matcher *drop_matcher;
16727         struct mlx5_flow_cb_ctx ctx = {
16728                 .error = &error,
16729                 .data = &matcher,
16730         };
16731         uint8_t misc_mask;
16732
16733         if (!priv->mtr_en || mtr_id_reg_c < 0) {
16734                 rte_errno = ENOTSUP;
16735                 return -1;
16736         }
16737         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16738                 if (!(domain_bitmap & (1 << domain)) ||
16739                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
16740                         continue;
16741                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16742                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16743                 /* Create the drop table with METER DROP level. */
16744                 if (!mtrmng->drop_tbl[domain]) {
16745                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16746                                         MLX5_FLOW_TABLE_LEVEL_METER,
16747                                         egress, transfer, false, NULL, 0,
16748                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
16749                         if (!mtrmng->drop_tbl[domain]) {
16750                                 DRV_LOG(ERR, "Failed to create meter drop table.");
16751                                 goto policy_error;
16752                         }
16753                 }
16754                 /* Create default matcher in drop table. */
16755                 matcher.tbl = mtrmng->drop_tbl[domain],
16756                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16757                                 struct mlx5_flow_tbl_data_entry, tbl);
16758                 if (!mtrmng->def_matcher[domain]) {
16759                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16760                                        (enum modify_reg)mtr_id_reg_c,
16761                                        0, 0);
16762                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16763                         matcher.crc = rte_raw_cksum
16764                                         ((const void *)matcher.mask.buf,
16765                                         matcher.mask.size);
16766                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16767                         if (!entry) {
16768                                 DRV_LOG(ERR, "Failed to register meter "
16769                                 "drop default matcher.");
16770                                 goto policy_error;
16771                         }
16772                         mtrmng->def_matcher[domain] = container_of(entry,
16773                         struct mlx5_flow_dv_matcher, entry);
16774                 }
16775                 /* Create default rule in drop table. */
16776                 if (!mtrmng->def_rule[domain]) {
16777                         i = 0;
16778                         actions[i++] = priv->sh->dr_drop_action;
16779                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16780                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
16781                         misc_mask = flow_dv_matcher_enable(value.buf);
16782                         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16783                         ret = mlx5_flow_os_create_flow
16784                                 (mtrmng->def_matcher[domain]->matcher_object,
16785                                 (void *)&value, i, actions,
16786                                 &mtrmng->def_rule[domain]);
16787                         if (ret) {
16788                                 DRV_LOG(ERR, "Failed to create meter "
16789                                 "default drop rule for drop table.");
16790                                 goto policy_error;
16791                         }
16792                 }
16793                 if (!fm->drop_cnt)
16794                         continue;
16795                 MLX5_ASSERT(mtrmng->max_mtr_bits);
16796                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16797                         /* Create matchers for Drop. */
16798                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16799                                         (enum modify_reg)mtr_id_reg_c, 0,
16800                                         (mtr_id_mask << mtr_id_offset));
16801                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16802                         matcher.crc = rte_raw_cksum
16803                                         ((const void *)matcher.mask.buf,
16804                                         matcher.mask.size);
16805                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16806                         if (!entry) {
16807                                 DRV_LOG(ERR,
16808                                 "Failed to register meter drop matcher.");
16809                                 goto policy_error;
16810                         }
16811                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16812                                 container_of(entry, struct mlx5_flow_dv_matcher,
16813                                              entry);
16814                 }
16815                 drop_matcher =
16816                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16817                 /* Create drop rule, matching meter_id only. */
16818                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16819                                 (enum modify_reg)mtr_id_reg_c,
16820                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
16821                 i = 0;
16822                 cnt = flow_dv_counter_get_by_idx(dev,
16823                                         fm->drop_cnt, NULL);
16824                 actions[i++] = cnt->action;
16825                 actions[i++] = priv->sh->dr_drop_action;
16826                 misc_mask = flow_dv_matcher_enable(value.buf);
16827                 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16828                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16829                                                (void *)&value, i, actions,
16830                                                &fm->drop_rule[domain]);
16831                 if (ret) {
16832                         DRV_LOG(ERR, "Failed to create meter "
16833                                 "drop rule for drop table.");
16834                                 goto policy_error;
16835                 }
16836         }
16837         return 0;
16838 policy_error:
16839         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16840                 if (fm->drop_rule[i]) {
16841                         claim_zero(mlx5_flow_os_destroy_flow
16842                                 (fm->drop_rule[i]));
16843                         fm->drop_rule[i] = NULL;
16844                 }
16845         }
16846         return -1;
16847 }
16848
16849 static struct mlx5_flow_meter_sub_policy *
16850 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16851                 struct mlx5_flow_meter_policy *mtr_policy,
16852                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16853                 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16854                 bool *is_reuse)
16855 {
16856         struct mlx5_priv *priv = dev->data->dev_private;
16857         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16858         uint32_t sub_policy_idx = 0;
16859         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16860         uint32_t i, j;
16861         struct mlx5_hrxq *hrxq;
16862         struct mlx5_flow_handle dh;
16863         struct mlx5_meter_policy_action_container *act_cnt;
16864         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16865         uint16_t sub_policy_num;
16866
16867         rte_spinlock_lock(&mtr_policy->sl);
16868         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16869                 if (!rss_desc[i])
16870                         continue;
16871                 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16872                 if (!hrxq_idx[i]) {
16873                         rte_spinlock_unlock(&mtr_policy->sl);
16874                         return NULL;
16875                 }
16876         }
16877         sub_policy_num = (mtr_policy->sub_policy_num >>
16878                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16879                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16880         for (j = 0; j < sub_policy_num; j++) {
16881                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16882                         if (rss_desc[i] &&
16883                             hrxq_idx[i] !=
16884                             mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16885                                 break;
16886                 }
16887                 if (i >= MLX5_MTR_RTE_COLORS) {
16888                         /*
16889                          * Found the sub policy table with
16890                          * the same queue per color.
16891                          */
16892                         rte_spinlock_unlock(&mtr_policy->sl);
16893                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16894                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16895                         *is_reuse = true;
16896                         return mtr_policy->sub_policys[domain][j];
16897                 }
16898         }
16899         /* Create sub policy. */
16900         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16901                 /* Reuse the first pre-allocated sub_policy. */
16902                 sub_policy = mtr_policy->sub_policys[domain][0];
16903                 sub_policy_idx = sub_policy->idx;
16904         } else {
16905                 sub_policy = mlx5_ipool_zmalloc
16906                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16907                                  &sub_policy_idx);
16908                 if (!sub_policy ||
16909                     sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16910                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16911                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16912                         goto rss_sub_policy_error;
16913                 }
16914                 sub_policy->idx = sub_policy_idx;
16915                 sub_policy->main_policy = mtr_policy;
16916         }
16917         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16918                 if (!rss_desc[i])
16919                         continue;
16920                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16921                 if (mtr_policy->is_hierarchy) {
16922                         act_cnt = &mtr_policy->act_cnt[i];
16923                         act_cnt->next_sub_policy = next_sub_policy;
16924                         mlx5_hrxq_release(dev, hrxq_idx[i]);
16925                 } else {
16926                         /*
16927                          * Overwrite the last action from
16928                          * RSS action to Queue action.
16929                          */
16930                         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16931                                               hrxq_idx[i]);
16932                         if (!hrxq) {
16933                                 DRV_LOG(ERR, "Failed to get policy hrxq");
16934                                 goto rss_sub_policy_error;
16935                         }
16936                         act_cnt = &mtr_policy->act_cnt[i];
16937                         if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16938                                 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16939                                 if (act_cnt->rix_mark)
16940                                         dh.mark = 1;
16941                                 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16942                                 dh.rix_hrxq = hrxq_idx[i];
16943                                 flow_drv_rxq_flags_set(dev, &dh);
16944                         }
16945                 }
16946         }
16947         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16948                                                sub_policy, domain)) {
16949                 DRV_LOG(ERR, "Failed to create policy "
16950                         "rules for ingress domain.");
16951                 goto rss_sub_policy_error;
16952         }
16953         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16954                 i = (mtr_policy->sub_policy_num >>
16955                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16956                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16957                 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16958                         DRV_LOG(ERR, "No free sub-policy slot.");
16959                         goto rss_sub_policy_error;
16960                 }
16961                 mtr_policy->sub_policys[domain][i] = sub_policy;
16962                 i++;
16963                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16964                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16965                 mtr_policy->sub_policy_num |=
16966                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16967                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16968         }
16969         rte_spinlock_unlock(&mtr_policy->sl);
16970         *is_reuse = false;
16971         return sub_policy;
16972 rss_sub_policy_error:
16973         if (sub_policy) {
16974                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16975                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16976                         i = (mtr_policy->sub_policy_num >>
16977                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16978                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16979                         mtr_policy->sub_policys[domain][i] = NULL;
16980                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16981                                         sub_policy->idx);
16982                 }
16983         }
16984         rte_spinlock_unlock(&mtr_policy->sl);
16985         return NULL;
16986 }
16987
16988 /**
16989  * Find the policy table for prefix table with RSS.
16990  *
16991  * @param[in] dev
16992  *   Pointer to Ethernet device.
16993  * @param[in] mtr_policy
16994  *   Pointer to meter policy table.
16995  * @param[in] rss_desc
16996  *   Pointer to rss_desc
16997  * @return
16998  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
16999  */
17000 static struct mlx5_flow_meter_sub_policy *
17001 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
17002                 struct mlx5_flow_meter_policy *mtr_policy,
17003                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
17004 {
17005         struct mlx5_priv *priv = dev->data->dev_private;
17006         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17007         struct mlx5_flow_meter_info *next_fm;
17008         struct mlx5_flow_meter_policy *next_policy;
17009         struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
17010         struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
17011         struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
17012         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17013         bool reuse_sub_policy;
17014         uint32_t i = 0;
17015         uint32_t j = 0;
17016
17017         while (true) {
17018                 /* Iterate hierarchy to get all policies in this hierarchy. */
17019                 policies[i++] = mtr_policy;
17020                 if (!mtr_policy->is_hierarchy)
17021                         break;
17022                 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
17023                         DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
17024                         return NULL;
17025                 }
17026                 next_fm = mlx5_flow_meter_find(priv,
17027                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17028                 if (!next_fm) {
17029                         DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
17030                         return NULL;
17031                 }
17032                 next_policy =
17033                         mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
17034                                                     NULL);
17035                 MLX5_ASSERT(next_policy);
17036                 mtr_policy = next_policy;
17037         }
17038         while (i) {
17039                 /**
17040                  * From last policy to the first one in hierarchy,
17041                  * create / get the sub policy for each of them.
17042                  */
17043                 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
17044                                                         policies[--i],
17045                                                         rss_desc,
17046                                                         next_sub_policy,
17047                                                         &reuse_sub_policy);
17048                 if (!sub_policy) {
17049                         DRV_LOG(ERR, "Failed to get the sub policy.");
17050                         goto err_exit;
17051                 }
17052                 if (!reuse_sub_policy)
17053                         sub_policies[j++] = sub_policy;
17054                 next_sub_policy = sub_policy;
17055         }
17056         return sub_policy;
17057 err_exit:
17058         while (j) {
17059                 uint16_t sub_policy_num;
17060
17061                 sub_policy = sub_policies[--j];
17062                 mtr_policy = sub_policy->main_policy;
17063                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17064                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17065                         sub_policy_num = (mtr_policy->sub_policy_num >>
17066                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17067                                 MLX5_MTR_SUB_POLICY_NUM_MASK;
17068                         mtr_policy->sub_policys[domain][sub_policy_num - 1] =
17069                                                                         NULL;
17070                         sub_policy_num--;
17071                         mtr_policy->sub_policy_num &=
17072                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17073                                   (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
17074                         mtr_policy->sub_policy_num |=
17075                         (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17076                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
17077                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17078                                         sub_policy->idx);
17079                 }
17080         }
17081         return NULL;
17082 }
17083
17084 /**
17085  * Create the sub policy tag rule for all meters in hierarchy.
17086  *
17087  * @param[in] dev
17088  *   Pointer to Ethernet device.
17089  * @param[in] fm
17090  *   Meter information table.
17091  * @param[in] src_port
17092  *   The src port this extra rule should use.
17093  * @param[in] item
17094  *   The src port match item.
17095  * @param[out] error
17096  *   Perform verbose error reporting if not NULL.
17097  * @return
17098  *   0 on success, a negative errno value otherwise and rte_errno is set.
17099  */
17100 static int
17101 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
17102                                 struct mlx5_flow_meter_info *fm,
17103                                 int32_t src_port,
17104                                 const struct rte_flow_item *item,
17105                                 struct rte_flow_error *error)
17106 {
17107         struct mlx5_priv *priv = dev->data->dev_private;
17108         struct mlx5_flow_meter_policy *mtr_policy;
17109         struct mlx5_flow_meter_sub_policy *sub_policy;
17110         struct mlx5_flow_meter_info *next_fm = NULL;
17111         struct mlx5_flow_meter_policy *next_policy;
17112         struct mlx5_flow_meter_sub_policy *next_sub_policy;
17113         struct mlx5_flow_tbl_data_entry *tbl_data;
17114         struct mlx5_sub_policy_color_rule *color_rule;
17115         struct mlx5_meter_policy_acts acts;
17116         uint32_t color_reg_c_idx;
17117         bool mtr_first = (src_port != UINT16_MAX) ? true : false;
17118         struct rte_flow_attr attr = {
17119                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
17120                 .priority = 0,
17121                 .ingress = 0,
17122                 .egress = 0,
17123                 .transfer = 1,
17124                 .reserved = 0,
17125         };
17126         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
17127         int i;
17128
17129         mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17130         MLX5_ASSERT(mtr_policy);
17131         if (!mtr_policy->is_hierarchy)
17132                 return 0;
17133         next_fm = mlx5_flow_meter_find(priv,
17134                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17135         if (!next_fm) {
17136                 return rte_flow_error_set(error, EINVAL,
17137                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
17138                                 "Failed to find next meter in hierarchy.");
17139         }
17140         if (!next_fm->drop_cnt)
17141                 goto exit;
17142         color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
17143         sub_policy = mtr_policy->sub_policys[domain][0];
17144         for (i = 0; i < RTE_COLORS; i++) {
17145                 bool rule_exist = false;
17146                 struct mlx5_meter_policy_action_container *act_cnt;
17147
17148                 if (i >= RTE_COLOR_YELLOW)
17149                         break;
17150                 TAILQ_FOREACH(color_rule,
17151                               &sub_policy->color_rules[i], next_port)
17152                         if (color_rule->src_port == src_port) {
17153                                 rule_exist = true;
17154                                 break;
17155                         }
17156                 if (rule_exist)
17157                         continue;
17158                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
17159                                 sizeof(struct mlx5_sub_policy_color_rule),
17160                                 0, SOCKET_ID_ANY);
17161                 if (!color_rule)
17162                         return rte_flow_error_set(error, ENOMEM,
17163                                 RTE_FLOW_ERROR_TYPE_ACTION,
17164                                 NULL, "No memory to create tag color rule.");
17165                 color_rule->src_port = src_port;
17166                 attr.priority = i;
17167                 next_policy = mlx5_flow_meter_policy_find(dev,
17168                                                 next_fm->policy_id, NULL);
17169                 MLX5_ASSERT(next_policy);
17170                 next_sub_policy = next_policy->sub_policys[domain][0];
17171                 tbl_data = container_of(next_sub_policy->tbl_rsc,
17172                                         struct mlx5_flow_tbl_data_entry, tbl);
17173                 act_cnt = &mtr_policy->act_cnt[i];
17174                 if (mtr_first) {
17175                         acts.dv_actions[0] = next_fm->meter_action;
17176                         acts.dv_actions[1] = act_cnt->modify_hdr->action;
17177                 } else {
17178                         acts.dv_actions[0] = act_cnt->modify_hdr->action;
17179                         acts.dv_actions[1] = next_fm->meter_action;
17180                 }
17181                 acts.dv_actions[2] = tbl_data->jump.action;
17182                 acts.actions_n = 3;
17183                 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
17184                         next_fm = NULL;
17185                         goto err_exit;
17186                 }
17187                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
17188                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
17189                                 &attr, true, item,
17190                                 &color_rule->matcher, error)) {
17191                         rte_flow_error_set(error, errno,
17192                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17193                                 "Failed to create hierarchy meter matcher.");
17194                         goto err_exit;
17195                 }
17196                 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
17197                                         (enum rte_color)i,
17198                                         color_rule->matcher->matcher_object,
17199                                         acts.actions_n, acts.dv_actions,
17200                                         true, item,
17201                                         &color_rule->rule, &attr)) {
17202                         rte_flow_error_set(error, errno,
17203                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17204                                 "Failed to create hierarchy meter rule.");
17205                         goto err_exit;
17206                 }
17207                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17208                                   color_rule, next_port);
17209         }
17210 exit:
17211         /**
17212          * Recursive call to iterate all meters in hierarchy and
17213          * create needed rules.
17214          */
17215         return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17216                                                 src_port, item, error);
17217 err_exit:
17218         if (color_rule) {
17219                 if (color_rule->rule)
17220                         mlx5_flow_os_destroy_flow(color_rule->rule);
17221                 if (color_rule->matcher) {
17222                         struct mlx5_flow_tbl_data_entry *tbl =
17223                                 container_of(color_rule->matcher->tbl,
17224                                                 typeof(*tbl), tbl);
17225                         mlx5_list_unregister(tbl->matchers,
17226                                                 &color_rule->matcher->entry);
17227                 }
17228                 mlx5_free(color_rule);
17229         }
17230         if (next_fm)
17231                 mlx5_flow_meter_detach(priv, next_fm);
17232         return -rte_errno;
17233 }
17234
17235 /**
17236  * Destroy the sub policy table with RX queue.
17237  *
17238  * @param[in] dev
17239  *   Pointer to Ethernet device.
17240  * @param[in] mtr_policy
17241  *   Pointer to meter policy table.
17242  */
17243 static void
17244 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17245                                     struct mlx5_flow_meter_policy *mtr_policy)
17246 {
17247         struct mlx5_priv *priv = dev->data->dev_private;
17248         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17249         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17250         uint32_t i, j;
17251         uint16_t sub_policy_num, new_policy_num;
17252
17253         rte_spinlock_lock(&mtr_policy->sl);
17254         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17255                 switch (mtr_policy->act_cnt[i].fate_action) {
17256                 case MLX5_FLOW_FATE_SHARED_RSS:
17257                         sub_policy_num = (mtr_policy->sub_policy_num >>
17258                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17259                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17260                         new_policy_num = sub_policy_num;
17261                         for (j = 0; j < sub_policy_num; j++) {
17262                                 sub_policy =
17263                                         mtr_policy->sub_policys[domain][j];
17264                                 if (sub_policy) {
17265                                         __flow_dv_destroy_sub_policy_rules(dev,
17266                                                 sub_policy);
17267                                 if (sub_policy !=
17268                                         mtr_policy->sub_policys[domain][0]) {
17269                                         mtr_policy->sub_policys[domain][j] =
17270                                                                 NULL;
17271                                         mlx5_ipool_free
17272                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17273                                                 sub_policy->idx);
17274                                                 new_policy_num--;
17275                                         }
17276                                 }
17277                         }
17278                         if (new_policy_num != sub_policy_num) {
17279                                 mtr_policy->sub_policy_num &=
17280                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17281                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17282                                 mtr_policy->sub_policy_num |=
17283                                 (new_policy_num &
17284                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17285                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17286                         }
17287                         break;
17288                 case MLX5_FLOW_FATE_QUEUE:
17289                         sub_policy = mtr_policy->sub_policys[domain][0];
17290                         __flow_dv_destroy_sub_policy_rules(dev,
17291                                                            sub_policy);
17292                         break;
17293                 default:
17294                         /*Other actions without queue and do nothing*/
17295                         break;
17296                 }
17297         }
17298         rte_spinlock_unlock(&mtr_policy->sl);
17299 }
17300 /**
17301  * Check whether the DR drop action is supported on the root table or not.
17302  *
17303  * Create a simple flow with DR drop action on root table to validate
17304  * if DR drop action on root table is supported or not.
17305  *
17306  * @param[in] dev
17307  *   Pointer to rte_eth_dev structure.
17308  *
17309  * @return
17310  *   0 on success, a negative errno value otherwise and rte_errno is set.
17311  */
17312 int
17313 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17314 {
17315         struct mlx5_priv *priv = dev->data->dev_private;
17316         struct mlx5_dev_ctx_shared *sh = priv->sh;
17317         struct mlx5_flow_dv_match_params mask = {
17318                 .size = sizeof(mask.buf),
17319         };
17320         struct mlx5_flow_dv_match_params value = {
17321                 .size = sizeof(value.buf),
17322         };
17323         struct mlx5dv_flow_matcher_attr dv_attr = {
17324                 .type = IBV_FLOW_ATTR_NORMAL,
17325                 .priority = 0,
17326                 .match_criteria_enable = 0,
17327                 .match_mask = (void *)&mask,
17328         };
17329         struct mlx5_flow_tbl_resource *tbl = NULL;
17330         void *matcher = NULL;
17331         void *flow = NULL;
17332         int ret = -1;
17333
17334         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17335                                         0, 0, 0, NULL);
17336         if (!tbl)
17337                 goto err;
17338         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17339         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17340         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17341                                                tbl->obj, &matcher);
17342         if (ret)
17343                 goto err;
17344         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17345         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17346                                        &sh->dr_drop_action, &flow);
17347 err:
17348         /*
17349          * If DR drop action is not supported on root table, flow create will
17350          * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17351          */
17352         if (!flow) {
17353                 if (matcher &&
17354                     (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17355                         DRV_LOG(INFO, "DR drop action is not supported in root table.");
17356                 else
17357                         DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17358                 ret = -1;
17359         } else {
17360                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17361         }
17362         if (matcher)
17363                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17364         if (tbl)
17365                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17366         return ret;
17367 }
17368
17369 /**
17370  * Validate the batch counter support in root table.
17371  *
17372  * Create a simple flow with invalid counter and drop action on root table to
17373  * validate if batch counter with offset on root table is supported or not.
17374  *
17375  * @param[in] dev
17376  *   Pointer to rte_eth_dev structure.
17377  *
17378  * @return
17379  *   0 on success, a negative errno value otherwise and rte_errno is set.
17380  */
17381 int
17382 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17383 {
17384         struct mlx5_priv *priv = dev->data->dev_private;
17385         struct mlx5_dev_ctx_shared *sh = priv->sh;
17386         struct mlx5_flow_dv_match_params mask = {
17387                 .size = sizeof(mask.buf),
17388         };
17389         struct mlx5_flow_dv_match_params value = {
17390                 .size = sizeof(value.buf),
17391         };
17392         struct mlx5dv_flow_matcher_attr dv_attr = {
17393                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17394                 .priority = 0,
17395                 .match_criteria_enable = 0,
17396                 .match_mask = (void *)&mask,
17397         };
17398         void *actions[2] = { 0 };
17399         struct mlx5_flow_tbl_resource *tbl = NULL;
17400         struct mlx5_devx_obj *dcs = NULL;
17401         void *matcher = NULL;
17402         void *flow = NULL;
17403         int ret = -1;
17404
17405         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17406                                         0, 0, 0, NULL);
17407         if (!tbl)
17408                 goto err;
17409         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17410         if (!dcs)
17411                 goto err;
17412         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17413                                                     &actions[0]);
17414         if (ret)
17415                 goto err;
17416         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17417         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17418         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17419                                                tbl->obj, &matcher);
17420         if (ret)
17421                 goto err;
17422         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17423         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17424                                        actions, &flow);
17425 err:
17426         /*
17427          * If batch counter with offset is not supported, the driver will not
17428          * validate the invalid offset value, flow create should success.
17429          * In this case, it means batch counter is not supported in root table.
17430          *
17431          * Otherwise, if flow create is failed, counter offset is supported.
17432          */
17433         if (flow) {
17434                 DRV_LOG(INFO, "Batch counter is not supported in root "
17435                               "table. Switch to fallback mode.");
17436                 rte_errno = ENOTSUP;
17437                 ret = -rte_errno;
17438                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17439         } else {
17440                 /* Check matcher to make sure validate fail at flow create. */
17441                 if (!matcher || (matcher && errno != EINVAL))
17442                         DRV_LOG(ERR, "Unexpected error in counter offset "
17443                                      "support detection");
17444                 ret = 0;
17445         }
17446         if (actions[0])
17447                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17448         if (matcher)
17449                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17450         if (tbl)
17451                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17452         if (dcs)
17453                 claim_zero(mlx5_devx_cmd_destroy(dcs));
17454         return ret;
17455 }
17456
17457 /**
17458  * Query a devx counter.
17459  *
17460  * @param[in] dev
17461  *   Pointer to the Ethernet device structure.
17462  * @param[in] cnt
17463  *   Index to the flow counter.
17464  * @param[in] clear
17465  *   Set to clear the counter statistics.
17466  * @param[out] pkts
17467  *   The statistics value of packets.
17468  * @param[out] bytes
17469  *   The statistics value of bytes.
17470  *
17471  * @return
17472  *   0 on success, otherwise return -1.
17473  */
17474 static int
17475 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17476                       uint64_t *pkts, uint64_t *bytes)
17477 {
17478         struct mlx5_priv *priv = dev->data->dev_private;
17479         struct mlx5_flow_counter *cnt;
17480         uint64_t inn_pkts, inn_bytes;
17481         int ret;
17482
17483         if (!priv->sh->devx)
17484                 return -1;
17485
17486         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17487         if (ret)
17488                 return -1;
17489         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17490         *pkts = inn_pkts - cnt->hits;
17491         *bytes = inn_bytes - cnt->bytes;
17492         if (clear) {
17493                 cnt->hits = inn_pkts;
17494                 cnt->bytes = inn_bytes;
17495         }
17496         return 0;
17497 }
17498
17499 /**
17500  * Get aged-out flows.
17501  *
17502  * @param[in] dev
17503  *   Pointer to the Ethernet device structure.
17504  * @param[in] context
17505  *   The address of an array of pointers to the aged-out flows contexts.
17506  * @param[in] nb_contexts
17507  *   The length of context array pointers.
17508  * @param[out] error
17509  *   Perform verbose error reporting if not NULL. Initialized in case of
17510  *   error only.
17511  *
17512  * @return
17513  *   how many contexts get in success, otherwise negative errno value.
17514  *   if nb_contexts is 0, return the amount of all aged contexts.
17515  *   if nb_contexts is not 0 , return the amount of aged flows reported
17516  *   in the context array.
17517  * @note: only stub for now
17518  */
17519 static int
17520 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17521                     void **context,
17522                     uint32_t nb_contexts,
17523                     struct rte_flow_error *error)
17524 {
17525         struct mlx5_priv *priv = dev->data->dev_private;
17526         struct mlx5_age_info *age_info;
17527         struct mlx5_age_param *age_param;
17528         struct mlx5_flow_counter *counter;
17529         struct mlx5_aso_age_action *act;
17530         int nb_flows = 0;
17531
17532         if (nb_contexts && !context)
17533                 return rte_flow_error_set(error, EINVAL,
17534                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17535                                           NULL, "empty context");
17536         age_info = GET_PORT_AGE_INFO(priv);
17537         rte_spinlock_lock(&age_info->aged_sl);
17538         LIST_FOREACH(act, &age_info->aged_aso, next) {
17539                 nb_flows++;
17540                 if (nb_contexts) {
17541                         context[nb_flows - 1] =
17542                                                 act->age_params.context;
17543                         if (!(--nb_contexts))
17544                                 break;
17545                 }
17546         }
17547         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17548                 nb_flows++;
17549                 if (nb_contexts) {
17550                         age_param = MLX5_CNT_TO_AGE(counter);
17551                         context[nb_flows - 1] = age_param->context;
17552                         if (!(--nb_contexts))
17553                                 break;
17554                 }
17555         }
17556         rte_spinlock_unlock(&age_info->aged_sl);
17557         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17558         return nb_flows;
17559 }
17560
17561 /*
17562  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17563  */
17564 static uint32_t
17565 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17566 {
17567         return flow_dv_counter_alloc(dev, 0);
17568 }
17569
17570 /**
17571  * Validate indirect action.
17572  * Dispatcher for action type specific validation.
17573  *
17574  * @param[in] dev
17575  *   Pointer to the Ethernet device structure.
17576  * @param[in] conf
17577  *   Indirect action configuration.
17578  * @param[in] action
17579  *   The indirect action object to validate.
17580  * @param[out] error
17581  *   Perform verbose error reporting if not NULL. Initialized in case of
17582  *   error only.
17583  *
17584  * @return
17585  *   0 on success, otherwise negative errno value.
17586  */
17587 static int
17588 flow_dv_action_validate(struct rte_eth_dev *dev,
17589                         const struct rte_flow_indir_action_conf *conf,
17590                         const struct rte_flow_action *action,
17591                         struct rte_flow_error *err)
17592 {
17593         struct mlx5_priv *priv = dev->data->dev_private;
17594
17595         RTE_SET_USED(conf);
17596         switch (action->type) {
17597         case RTE_FLOW_ACTION_TYPE_RSS:
17598                 /*
17599                  * priv->obj_ops is set according to driver capabilities.
17600                  * When DevX capabilities are
17601                  * sufficient, it is set to devx_obj_ops.
17602                  * Otherwise, it is set to ibv_obj_ops.
17603                  * ibv_obj_ops doesn't support ind_table_modify operation.
17604                  * In this case the indirect RSS action can't be used.
17605                  */
17606                 if (priv->obj_ops.ind_table_modify == NULL)
17607                         return rte_flow_error_set
17608                                         (err, ENOTSUP,
17609                                          RTE_FLOW_ERROR_TYPE_ACTION,
17610                                          NULL,
17611                                          "Indirect RSS action not supported");
17612                 return mlx5_validate_action_rss(dev, action, err);
17613         case RTE_FLOW_ACTION_TYPE_AGE:
17614                 if (!priv->sh->aso_age_mng)
17615                         return rte_flow_error_set(err, ENOTSUP,
17616                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17617                                                 NULL,
17618                                                 "Indirect age action not supported");
17619                 return flow_dv_validate_action_age(0, action, dev, err);
17620         case RTE_FLOW_ACTION_TYPE_COUNT:
17621                 return flow_dv_validate_action_count(dev, true, 0, err);
17622         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17623                 if (!priv->sh->ct_aso_en)
17624                         return rte_flow_error_set(err, ENOTSUP,
17625                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17626                                         "ASO CT is not supported");
17627                 return mlx5_validate_action_ct(dev, action->conf, err);
17628         default:
17629                 return rte_flow_error_set(err, ENOTSUP,
17630                                           RTE_FLOW_ERROR_TYPE_ACTION,
17631                                           NULL,
17632                                           "action type not supported");
17633         }
17634 }
17635
17636 /*
17637  * Check if the RSS configurations for colors of a meter policy match
17638  * each other, except the queues.
17639  *
17640  * @param[in] r1
17641  *   Pointer to the first RSS flow action.
17642  * @param[in] r2
17643  *   Pointer to the second RSS flow action.
17644  *
17645  * @return
17646  *   0 on match, 1 on conflict.
17647  */
17648 static inline int
17649 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17650                                const struct rte_flow_action_rss *r2)
17651 {
17652         if (r1 == NULL || r2 == NULL)
17653                 return 0;
17654         if (!(r1->level <= 1 && r2->level <= 1) &&
17655             !(r1->level > 1 && r2->level > 1))
17656                 return 1;
17657         if (r1->types != r2->types &&
17658             !((r1->types == 0 || r1->types == RTE_ETH_RSS_IP) &&
17659               (r2->types == 0 || r2->types == RTE_ETH_RSS_IP)))
17660                 return 1;
17661         if (r1->key || r2->key) {
17662                 const void *key1 = r1->key ? r1->key : rss_hash_default_key;
17663                 const void *key2 = r2->key ? r2->key : rss_hash_default_key;
17664
17665                 if (memcmp(key1, key2, MLX5_RSS_HASH_KEY_LEN))
17666                         return 1;
17667         }
17668         return 0;
17669 }
17670
17671 /**
17672  * Validate the meter hierarchy chain for meter policy.
17673  *
17674  * @param[in] dev
17675  *   Pointer to the Ethernet device structure.
17676  * @param[in] meter_id
17677  *   Meter id.
17678  * @param[in] action_flags
17679  *   Holds the actions detected until now.
17680  * @param[out] is_rss
17681  *   Is RSS or not.
17682  * @param[out] hierarchy_domain
17683  *   The domain bitmap for hierarchy policy.
17684  * @param[out] error
17685  *   Perform verbose error reporting if not NULL. Initialized in case of
17686  *   error only.
17687  *
17688  * @return
17689  *   0 on success, otherwise negative errno value with error set.
17690  */
17691 static int
17692 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17693                                   uint32_t meter_id,
17694                                   uint64_t action_flags,
17695                                   bool *is_rss,
17696                                   uint8_t *hierarchy_domain,
17697                                   struct rte_mtr_error *error)
17698 {
17699         struct mlx5_priv *priv = dev->data->dev_private;
17700         struct mlx5_flow_meter_info *fm;
17701         struct mlx5_flow_meter_policy *policy;
17702         uint8_t cnt = 1;
17703
17704         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17705                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17706                 return -rte_mtr_error_set(error, EINVAL,
17707                                         RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17708                                         NULL,
17709                                         "Multiple fate actions not supported.");
17710         *hierarchy_domain = 0;
17711         while (true) {
17712                 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17713                 if (!fm)
17714                         return -rte_mtr_error_set(error, EINVAL,
17715                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17716                                         "Meter not found in meter hierarchy.");
17717                 if (fm->def_policy)
17718                         return -rte_mtr_error_set(error, EINVAL,
17719                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17720                         "Non termination meter not supported in hierarchy.");
17721                 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17722                 MLX5_ASSERT(policy);
17723                 /**
17724                  * Only inherit the supported domains of the first meter in
17725                  * hierarchy.
17726                  * One meter supports at least one domain.
17727                  */
17728                 if (!*hierarchy_domain) {
17729                         if (policy->transfer)
17730                                 *hierarchy_domain |=
17731                                                 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17732                         if (policy->ingress)
17733                                 *hierarchy_domain |=
17734                                                 MLX5_MTR_DOMAIN_INGRESS_BIT;
17735                         if (policy->egress)
17736                                 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17737                 }
17738                 if (!policy->is_hierarchy) {
17739                         *is_rss = policy->is_rss;
17740                         break;
17741                 }
17742                 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17743                 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17744                         return -rte_mtr_error_set(error, EINVAL,
17745                                         RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17746                                         "Exceed max hierarchy meter number.");
17747         }
17748         return 0;
17749 }
17750
17751 /**
17752  * Validate meter policy actions.
17753  * Dispatcher for action type specific validation.
17754  *
17755  * @param[in] dev
17756  *   Pointer to the Ethernet device structure.
17757  * @param[in] action
17758  *   The meter policy action object to validate.
17759  * @param[in] attr
17760  *   Attributes of flow to determine steering domain.
17761  * @param[out] error
17762  *   Perform verbose error reporting if not NULL. Initialized in case of
17763  *   error only.
17764  *
17765  * @return
17766  *   0 on success, otherwise negative errno value.
17767  */
17768 static int
17769 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17770                         const struct rte_flow_action *actions[RTE_COLORS],
17771                         struct rte_flow_attr *attr,
17772                         bool *is_rss,
17773                         uint8_t *domain_bitmap,
17774                         uint8_t *policy_mode,
17775                         struct rte_mtr_error *error)
17776 {
17777         struct mlx5_priv *priv = dev->data->dev_private;
17778         struct mlx5_dev_config *dev_conf = &priv->config;
17779         const struct rte_flow_action *act;
17780         uint64_t action_flags[RTE_COLORS] = {0};
17781         int actions_n;
17782         int i, ret;
17783         struct rte_flow_error flow_err;
17784         uint8_t domain_color[RTE_COLORS] = {0};
17785         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17786         uint8_t hierarchy_domain = 0;
17787         const struct rte_flow_action_meter *mtr;
17788         bool def_green = false;
17789         bool def_yellow = false;
17790         const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17791
17792         if (!priv->config.dv_esw_en)
17793                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17794         *domain_bitmap = def_domain;
17795         /* Red color could only support DROP action. */
17796         if (!actions[RTE_COLOR_RED] ||
17797             actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17798                 return -rte_mtr_error_set(error, ENOTSUP,
17799                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17800                                 NULL, "Red color only supports drop action.");
17801         /*
17802          * Check default policy actions:
17803          * Green / Yellow: no action, Red: drop action
17804          * Either G or Y will trigger default policy actions to be created.
17805          */
17806         if (!actions[RTE_COLOR_GREEN] ||
17807             actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17808                 def_green = true;
17809         if (!actions[RTE_COLOR_YELLOW] ||
17810             actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17811                 def_yellow = true;
17812         if (def_green && def_yellow) {
17813                 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17814                 return 0;
17815         } else if (!def_green && def_yellow) {
17816                 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17817         } else if (def_green && !def_yellow) {
17818                 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17819         } else {
17820                 *policy_mode = MLX5_MTR_POLICY_MODE_ALL;
17821         }
17822         /* Set to empty string in case of NULL pointer access by user. */
17823         flow_err.message = "";
17824         for (i = 0; i < RTE_COLORS; i++) {
17825                 act = actions[i];
17826                 for (action_flags[i] = 0, actions_n = 0;
17827                      act && act->type != RTE_FLOW_ACTION_TYPE_END;
17828                      act++) {
17829                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17830                                 return -rte_mtr_error_set(error, ENOTSUP,
17831                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17832                                           NULL, "too many actions");
17833                         switch (act->type) {
17834                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
17835                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17836                                 if (!priv->config.dv_esw_en)
17837                                         return -rte_mtr_error_set(error,
17838                                         ENOTSUP,
17839                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17840                                         NULL, "PORT action validate check"
17841                                         " fail for ESW disable");
17842                                 ret = flow_dv_validate_action_port_id(dev,
17843                                                 action_flags[i],
17844                                                 act, attr, &flow_err);
17845                                 if (ret)
17846                                         return -rte_mtr_error_set(error,
17847                                         ENOTSUP,
17848                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17849                                         NULL, flow_err.message ?
17850                                         flow_err.message :
17851                                         "PORT action validate check fail");
17852                                 ++actions_n;
17853                                 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17854                                 break;
17855                         case RTE_FLOW_ACTION_TYPE_MARK:
17856                                 ret = flow_dv_validate_action_mark(dev, act,
17857                                                            action_flags[i],
17858                                                            attr, &flow_err);
17859                                 if (ret < 0)
17860                                         return -rte_mtr_error_set(error,
17861                                         ENOTSUP,
17862                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17863                                         NULL, flow_err.message ?
17864                                         flow_err.message :
17865                                         "Mark action validate check fail");
17866                                 if (dev_conf->dv_xmeta_en !=
17867                                         MLX5_XMETA_MODE_LEGACY)
17868                                         return -rte_mtr_error_set(error,
17869                                         ENOTSUP,
17870                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17871                                         NULL, "Extend MARK action is "
17872                                         "not supported. Please try use "
17873                                         "default policy for meter.");
17874                                 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17875                                 ++actions_n;
17876                                 break;
17877                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
17878                                 ret = flow_dv_validate_action_set_tag(dev,
17879                                                         act, action_flags[i],
17880                                                         attr, &flow_err);
17881                                 if (ret)
17882                                         return -rte_mtr_error_set(error,
17883                                         ENOTSUP,
17884                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17885                                         NULL, flow_err.message ?
17886                                         flow_err.message :
17887                                         "Set tag action validate check fail");
17888                                 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17889                                 ++actions_n;
17890                                 break;
17891                         case RTE_FLOW_ACTION_TYPE_DROP:
17892                                 ret = mlx5_flow_validate_action_drop
17893                                         (action_flags[i], attr, &flow_err);
17894                                 if (ret < 0)
17895                                         return -rte_mtr_error_set(error,
17896                                         ENOTSUP,
17897                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17898                                         NULL, flow_err.message ?
17899                                         flow_err.message :
17900                                         "Drop action validate check fail");
17901                                 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17902                                 ++actions_n;
17903                                 break;
17904                         case RTE_FLOW_ACTION_TYPE_QUEUE:
17905                                 /*
17906                                  * Check whether extensive
17907                                  * metadata feature is engaged.
17908                                  */
17909                                 if (dev_conf->dv_flow_en &&
17910                                     (dev_conf->dv_xmeta_en !=
17911                                      MLX5_XMETA_MODE_LEGACY) &&
17912                                     mlx5_flow_ext_mreg_supported(dev))
17913                                         return -rte_mtr_error_set(error,
17914                                           ENOTSUP,
17915                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17916                                           NULL, "Queue action with meta "
17917                                           "is not supported. Please try use "
17918                                           "default policy for meter.");
17919                                 ret = mlx5_flow_validate_action_queue(act,
17920                                                         action_flags[i], dev,
17921                                                         attr, &flow_err);
17922                                 if (ret < 0)
17923                                         return -rte_mtr_error_set(error,
17924                                           ENOTSUP,
17925                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17926                                           NULL, flow_err.message ?
17927                                           flow_err.message :
17928                                           "Queue action validate check fail");
17929                                 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17930                                 ++actions_n;
17931                                 break;
17932                         case RTE_FLOW_ACTION_TYPE_RSS:
17933                                 if (dev_conf->dv_flow_en &&
17934                                     (dev_conf->dv_xmeta_en !=
17935                                      MLX5_XMETA_MODE_LEGACY) &&
17936                                     mlx5_flow_ext_mreg_supported(dev))
17937                                         return -rte_mtr_error_set(error,
17938                                           ENOTSUP,
17939                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17940                                           NULL, "RSS action with meta "
17941                                           "is not supported. Please try use "
17942                                           "default policy for meter.");
17943                                 ret = mlx5_validate_action_rss(dev, act,
17944                                                                &flow_err);
17945                                 if (ret < 0)
17946                                         return -rte_mtr_error_set(error,
17947                                           ENOTSUP,
17948                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17949                                           NULL, flow_err.message ?
17950                                           flow_err.message :
17951                                           "RSS action validate check fail");
17952                                 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17953                                 ++actions_n;
17954                                 /* Either G or Y will set the RSS. */
17955                                 rss_color[i] = act->conf;
17956                                 break;
17957                         case RTE_FLOW_ACTION_TYPE_JUMP:
17958                                 ret = flow_dv_validate_action_jump(dev,
17959                                         NULL, act, action_flags[i],
17960                                         attr, true, &flow_err);
17961                                 if (ret)
17962                                         return -rte_mtr_error_set(error,
17963                                           ENOTSUP,
17964                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17965                                           NULL, flow_err.message ?
17966                                           flow_err.message :
17967                                           "Jump action validate check fail");
17968                                 ++actions_n;
17969                                 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17970                                 break;
17971                         /*
17972                          * Only the last meter in the hierarchy will support
17973                          * the YELLOW color steering. Then in the meter policy
17974                          * actions list, there should be no other meter inside.
17975                          */
17976                         case RTE_FLOW_ACTION_TYPE_METER:
17977                                 if (i != RTE_COLOR_GREEN)
17978                                         return -rte_mtr_error_set(error,
17979                                                 ENOTSUP,
17980                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17981                                                 NULL,
17982                                                 "Meter hierarchy only supports GREEN color.");
17983                                 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
17984                                         return -rte_mtr_error_set(error,
17985                                                 ENOTSUP,
17986                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17987                                                 NULL,
17988                                                 "No yellow policy should be provided in meter hierarchy.");
17989                                 mtr = act->conf;
17990                                 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17991                                                         mtr->mtr_id,
17992                                                         action_flags[i],
17993                                                         is_rss,
17994                                                         &hierarchy_domain,
17995                                                         error);
17996                                 if (ret)
17997                                         return ret;
17998                                 ++actions_n;
17999                                 action_flags[i] |=
18000                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
18001                                 break;
18002                         default:
18003                                 return -rte_mtr_error_set(error, ENOTSUP,
18004                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18005                                         NULL,
18006                                         "Doesn't support optional action");
18007                         }
18008                 }
18009                 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
18010                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
18011                 } else if ((action_flags[i] &
18012                           (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
18013                           (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
18014                         /*
18015                          * Only support MLX5_XMETA_MODE_LEGACY
18016                          * so MARK action is only in ingress domain.
18017                          */
18018                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
18019                 } else {
18020                         domain_color[i] = def_domain;
18021                         if (action_flags[i] &&
18022                             !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18023                                 domain_color[i] &=
18024                                 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
18025                 }
18026                 if (action_flags[i] &
18027                     MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
18028                         domain_color[i] &= hierarchy_domain;
18029                 /*
18030                  * Non-termination actions only support NIC Tx domain.
18031                  * The adjustion should be skipped when there is no
18032                  * action or only END is provided. The default domains
18033                  * bit-mask is set to find the MIN intersection.
18034                  * The action flags checking should also be skipped.
18035                  */
18036                 if ((def_green && i == RTE_COLOR_GREEN) ||
18037                     (def_yellow && i == RTE_COLOR_YELLOW))
18038                         continue;
18039                 /*
18040                  * Validate the drop action mutual exclusion
18041                  * with other actions. Drop action is mutually-exclusive
18042                  * with any other action, except for Count action.
18043                  */
18044                 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
18045                     (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
18046                         return -rte_mtr_error_set(error, ENOTSUP,
18047                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18048                                 NULL, "Drop action is mutually-exclusive "
18049                                 "with any other action");
18050                 }
18051                 /* Eswitch has few restrictions on using items and actions */
18052                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
18053                         if (!mlx5_flow_ext_mreg_supported(dev) &&
18054                             action_flags[i] & MLX5_FLOW_ACTION_MARK)
18055                                 return -rte_mtr_error_set(error, ENOTSUP,
18056                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18057                                         NULL, "unsupported action MARK");
18058                         if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
18059                                 return -rte_mtr_error_set(error, ENOTSUP,
18060                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18061                                         NULL, "unsupported action QUEUE");
18062                         if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
18063                                 return -rte_mtr_error_set(error, ENOTSUP,
18064                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18065                                         NULL, "unsupported action RSS");
18066                         if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18067                                 return -rte_mtr_error_set(error, ENOTSUP,
18068                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18069                                         NULL, "no fate action is found");
18070                 } else {
18071                         if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
18072                             (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
18073                                 if ((domain_color[i] &
18074                                      MLX5_MTR_DOMAIN_EGRESS_BIT))
18075                                         domain_color[i] =
18076                                                 MLX5_MTR_DOMAIN_EGRESS_BIT;
18077                                 else
18078                                         return -rte_mtr_error_set(error,
18079                                                 ENOTSUP,
18080                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18081                                                 NULL,
18082                                                 "no fate action is found");
18083                         }
18084                 }
18085         }
18086         /* If both colors have RSS, the attributes should be the same. */
18087         if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
18088                                            rss_color[RTE_COLOR_YELLOW]))
18089                 return -rte_mtr_error_set(error, EINVAL,
18090                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18091                                           NULL, "policy RSS attr conflict");
18092         if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
18093                 *is_rss = true;
18094         /* "domain_color[C]" is non-zero for each color, default is ALL. */
18095         if (!def_green && !def_yellow &&
18096             domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
18097             !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
18098             !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
18099                 return -rte_mtr_error_set(error, EINVAL,
18100                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18101                                           NULL, "policy domains conflict");
18102         /*
18103          * At least one color policy is listed in the actions, the domains
18104          * to be supported should be the intersection.
18105          */
18106         *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
18107                          domain_color[RTE_COLOR_YELLOW];
18108         return 0;
18109 }
18110
18111 static int
18112 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
18113 {
18114         struct mlx5_priv *priv = dev->data->dev_private;
18115         int ret = 0;
18116
18117         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
18118                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
18119                                                 flags);
18120                 if (ret != 0)
18121                         return ret;
18122         }
18123         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
18124                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
18125                 if (ret != 0)
18126                         return ret;
18127         }
18128         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
18129                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
18130                 if (ret != 0)
18131                         return ret;
18132         }
18133         return 0;
18134 }
18135
18136 /**
18137  * Discover the number of available flow priorities
18138  * by trying to create a flow with the highest priority value
18139  * for each possible number.
18140  *
18141  * @param[in] dev
18142  *   Ethernet device.
18143  * @param[in] vprio
18144  *   List of possible number of available priorities.
18145  * @param[in] vprio_n
18146  *   Size of @p vprio array.
18147  * @return
18148  *   On success, number of available flow priorities.
18149  *   On failure, a negative errno-style code and rte_errno is set.
18150  */
18151 static int
18152 flow_dv_discover_priorities(struct rte_eth_dev *dev,
18153                             const uint16_t *vprio, int vprio_n)
18154 {
18155         struct mlx5_priv *priv = dev->data->dev_private;
18156         struct mlx5_indexed_pool *pool = priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW];
18157         struct rte_flow_item_eth eth;
18158         struct rte_flow_item item = {
18159                 .type = RTE_FLOW_ITEM_TYPE_ETH,
18160                 .spec = &eth,
18161                 .mask = &eth,
18162         };
18163         struct mlx5_flow_dv_matcher matcher = {
18164                 .mask = {
18165                         .size = sizeof(matcher.mask.buf),
18166                 },
18167         };
18168         union mlx5_flow_tbl_key tbl_key;
18169         struct mlx5_flow flow;
18170         void *action;
18171         struct rte_flow_error error;
18172         uint8_t misc_mask;
18173         int i, err, ret = -ENOTSUP;
18174
18175         /*
18176          * Prepare a flow with a catch-all pattern and a drop action.
18177          * Use drop queue, because shared drop action may be unavailable.
18178          */
18179         action = priv->drop_queue.hrxq->action;
18180         if (action == NULL) {
18181                 DRV_LOG(ERR, "Priority discovery requires a drop action");
18182                 rte_errno = ENOTSUP;
18183                 return -rte_errno;
18184         }
18185         memset(&flow, 0, sizeof(flow));
18186         flow.handle = mlx5_ipool_zmalloc(pool, &flow.handle_idx);
18187         if (flow.handle == NULL) {
18188                 DRV_LOG(ERR, "Cannot create flow handle");
18189                 rte_errno = ENOMEM;
18190                 return -rte_errno;
18191         }
18192         flow.ingress = true;
18193         flow.dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
18194         flow.dv.actions[0] = action;
18195         flow.dv.actions_n = 1;
18196         memset(&eth, 0, sizeof(eth));
18197         flow_dv_translate_item_eth(matcher.mask.buf, flow.dv.value.buf,
18198                                    &item, /* inner */ false, /* group */ 0);
18199         matcher.crc = rte_raw_cksum(matcher.mask.buf, matcher.mask.size);
18200         for (i = 0; i < vprio_n; i++) {
18201                 /* Configure the next proposed maximum priority. */
18202                 matcher.priority = vprio[i] - 1;
18203                 memset(&tbl_key, 0, sizeof(tbl_key));
18204                 err = flow_dv_matcher_register(dev, &matcher, &tbl_key, &flow,
18205                                                /* tunnel */ NULL,
18206                                                /* group */ 0,
18207                                                &error);
18208                 if (err != 0) {
18209                         /* This action is pure SW and must always succeed. */
18210                         DRV_LOG(ERR, "Cannot register matcher");
18211                         ret = -rte_errno;
18212                         break;
18213                 }
18214                 /* Try to apply the flow to HW. */
18215                 misc_mask = flow_dv_matcher_enable(flow.dv.value.buf);
18216                 __flow_dv_adjust_buf_size(&flow.dv.value.size, misc_mask);
18217                 err = mlx5_flow_os_create_flow
18218                                 (flow.handle->dvh.matcher->matcher_object,
18219                                  (void *)&flow.dv.value, flow.dv.actions_n,
18220                                  flow.dv.actions, &flow.handle->drv_flow);
18221                 if (err == 0) {
18222                         claim_zero(mlx5_flow_os_destroy_flow
18223                                                 (flow.handle->drv_flow));
18224                         flow.handle->drv_flow = NULL;
18225                 }
18226                 claim_zero(flow_dv_matcher_release(dev, flow.handle));
18227                 if (err != 0)
18228                         break;
18229                 ret = vprio[i];
18230         }
18231         mlx5_ipool_free(pool, flow.handle_idx);
18232         /* Set rte_errno if no expected priority value matched. */
18233         if (ret < 0)
18234                 rte_errno = -ret;
18235         return ret;
18236 }
18237
18238 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
18239         .validate = flow_dv_validate,
18240         .prepare = flow_dv_prepare,
18241         .translate = flow_dv_translate,
18242         .apply = flow_dv_apply,
18243         .remove = flow_dv_remove,
18244         .destroy = flow_dv_destroy,
18245         .query = flow_dv_query,
18246         .create_mtr_tbls = flow_dv_create_mtr_tbls,
18247         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
18248         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
18249         .create_meter = flow_dv_mtr_alloc,
18250         .free_meter = flow_dv_aso_mtr_release_to_pool,
18251         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
18252         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
18253         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
18254         .create_policy_rules = flow_dv_create_policy_rules,
18255         .destroy_policy_rules = flow_dv_destroy_policy_rules,
18256         .create_def_policy = flow_dv_create_def_policy,
18257         .destroy_def_policy = flow_dv_destroy_def_policy,
18258         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
18259         .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
18260         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
18261         .counter_alloc = flow_dv_counter_allocate,
18262         .counter_free = flow_dv_counter_free,
18263         .counter_query = flow_dv_counter_query,
18264         .get_aged_flows = flow_dv_get_aged_flows,
18265         .action_validate = flow_dv_action_validate,
18266         .action_create = flow_dv_action_create,
18267         .action_destroy = flow_dv_action_destroy,
18268         .action_update = flow_dv_action_update,
18269         .action_query = flow_dv_action_query,
18270         .sync_domain = flow_dv_sync_domain,
18271         .discover_priorities = flow_dv_discover_priorities,
18272         .item_create = flow_dv_item_create,
18273         .item_release = flow_dv_item_release,
18274 };
18275
18276 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
18277