drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_prm.h>
  35
  36 #include "mlx5_defs.h"
  37 #include "mlx5.h"
  38 #include "mlx5_flow.h"
  39 #include "mlx5_rxtx.h"
  40
  41 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 /**
  77  * Initialize flow attributes structure according to flow items' types.
  78  *
  79  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  80  * mode. For tunnel mode, the items to be modified are the outermost ones.
  81  *
  82  * @param[in] item
  83  *   Pointer to item specification.
  84  * @param[out] attr
  85  *   Pointer to flow attributes structure.
  86  * @param[in] dev_flow
  87  *   Pointer to the sub flow.
  88  * @param[in] tunnel_decap
  89  *   Whether action is after tunnel decapsulation.
  90  */
  91 static void
  92 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
  93                   struct mlx5_flow *dev_flow, bool tunnel_decap)
  94 {
  95         /*
  96          * If layers is already initialized, it means this dev_flow is the
  97          * suffix flow, the layers flags is set by the prefix flow. Need to
  98          * use the layer flags from prefix flow as the suffix flow may not
  99          * have the user defined items as the flow is split.
 100          */
 101         if (dev_flow->layers) {
 102                 if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 103                         attr->ipv4 = 1;
 104                 else if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 105                         attr->ipv6 = 1;
 106                 if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 107                         attr->tcp = 1;
 108                 else if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 109                         attr->udp = 1;
 110                 attr->valid = 1;
 111                 return;
 112         }
 113         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 114                 uint8_t next_protocol = 0xff;
 115                 switch (item->type) {
 116                 case RTE_FLOW_ITEM_TYPE_GRE:
 117                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 118                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 119                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 120                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 121                 case RTE_FLOW_ITEM_TYPE_MPLS:
 122                         if (tunnel_decap)
 123                                 attr->attr = 0;
 124                         break;
 125                 case RTE_FLOW_ITEM_TYPE_IPV4:
 126                         if (!attr->ipv6)
 127                                 attr->ipv4 = 1;
 128                         if (item->mask != NULL &&
 129                             ((const struct rte_flow_item_ipv4 *)
 130                             item->mask)->hdr.next_proto_id)
 131                                 next_protocol =
 132                                     ((const struct rte_flow_item_ipv4 *)
 133                                       (item->spec))->hdr.next_proto_id &
 134                                     ((const struct rte_flow_item_ipv4 *)
 135                                       (item->mask))->hdr.next_proto_id;
 136                         if ((next_protocol == IPPROTO_IPIP ||
 137                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 138                                 attr->attr = 0;
 139                         break;
 140                 case RTE_FLOW_ITEM_TYPE_IPV6:
 141                         if (!attr->ipv4)
 142                                 attr->ipv6 = 1;
 143                         if (item->mask != NULL &&
 144                             ((const struct rte_flow_item_ipv6 *)
 145                             item->mask)->hdr.proto)
 146                                 next_protocol =
 147                                     ((const struct rte_flow_item_ipv6 *)
 148                                       (item->spec))->hdr.proto &
 149                                     ((const struct rte_flow_item_ipv6 *)
 150                                       (item->mask))->hdr.proto;
 151                         if ((next_protocol == IPPROTO_IPIP ||
 152                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 153                                 attr->attr = 0;
 154                         break;
 155                 case RTE_FLOW_ITEM_TYPE_UDP:
 156                         if (!attr->tcp)
 157                                 attr->udp = 1;
 158                         break;
 159                 case RTE_FLOW_ITEM_TYPE_TCP:
 160                         if (!attr->udp)
 161                                 attr->tcp = 1;
 162                         break;
 163                 default:
 164                         break;
 165                 }
 166         }
 167         attr->valid = 1;
 168 }
 169
 170 /**
 171  * Convert rte_mtr_color to mlx5 color.
 172  *
 173  * @param[in] rcol
 174  *   rte_mtr_color.
 175  *
 176  * @return
 177  *   mlx5 color.
 178  */
 179 static int
 180 rte_col_2_mlx5_col(enum rte_color rcol)
 181 {
 182         switch (rcol) {
 183         case RTE_COLOR_GREEN:
 184                 return MLX5_FLOW_COLOR_GREEN;
 185         case RTE_COLOR_YELLOW:
 186                 return MLX5_FLOW_COLOR_YELLOW;
 187         case RTE_COLOR_RED:
 188                 return MLX5_FLOW_COLOR_RED;
 189         default:
 190                 break;
 191         }
 192         return MLX5_FLOW_COLOR_UNDEFINED;
 193 }
 194
 195 struct field_modify_info {
 196         uint32_t size; /* Size of field in protocol header, in bytes. */
 197         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 198         enum mlx5_modification_field id;
 199 };
 200
 201 struct field_modify_info modify_eth[] = {
 202         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 203         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 204         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 205         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 206         {0, 0, 0},
 207 };
 208
 209 struct field_modify_info modify_vlan_out_first_vid[] = {
 210         /* Size in bits !!! */
 211         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 212         {0, 0, 0},
 213 };
 214
 215 struct field_modify_info modify_ipv4[] = {
 216         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 217         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 218         {4, 12, MLX5_MODI_OUT_SIPV4},
 219         {4, 16, MLX5_MODI_OUT_DIPV4},
 220         {0, 0, 0},
 221 };
 222
 223 struct field_modify_info modify_ipv6[] = {
 224         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 225         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 226         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 227         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 228         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 229         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 230         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 231         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 232         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 233         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 234         {0, 0, 0},
 235 };
 236
 237 struct field_modify_info modify_udp[] = {
 238         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 239         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 240         {0, 0, 0},
 241 };
 242
 243 struct field_modify_info modify_tcp[] = {
 244         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 245         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 246         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 247         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 248         {0, 0, 0},
 249 };
 250
 251 static void
 252 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 253                           uint8_t next_protocol, uint64_t *item_flags,
 254                           int *tunnel)
 255 {
 256         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 257                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 258         if (next_protocol == IPPROTO_IPIP) {
 259                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 260                 *tunnel = 1;
 261         }
 262         if (next_protocol == IPPROTO_IPV6) {
 263                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 264                 *tunnel = 1;
 265         }
 266 }
 267
 268 /**
 269  * Acquire the synchronizing object to protect multithreaded access
 270  * to shared dv context. Lock occurs only if context is actually
 271  * shared, i.e. we have multiport IB device and representors are
 272  * created.
 273  *
 274  * @param[in] dev
 275  *   Pointer to the rte_eth_dev structure.
 276  */
 277 static void
 278 flow_dv_shared_lock(struct rte_eth_dev *dev)
 279 {
 280         struct mlx5_priv *priv = dev->data->dev_private;
 281         struct mlx5_ibv_shared *sh = priv->sh;
 282
 283         if (sh->dv_refcnt > 1) {
 284                 int ret;
 285
 286                 ret = pthread_mutex_lock(&sh->dv_mutex);
 287                 MLX5_ASSERT(!ret);
 288                 (void)ret;
 289         }
 290 }
 291
 292 static void
 293 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 294 {
 295         struct mlx5_priv *priv = dev->data->dev_private;
 296         struct mlx5_ibv_shared *sh = priv->sh;
 297
 298         if (sh->dv_refcnt > 1) {
 299                 int ret;
 300
 301                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 302                 MLX5_ASSERT(!ret);
 303                 (void)ret;
 304         }
 305 }
 306
 307 /* Update VLAN's VID/PCP based on input rte_flow_action.
 308  *
 309  * @param[in] action
 310  *   Pointer to struct rte_flow_action.
 311  * @param[out] vlan
 312  *   Pointer to struct rte_vlan_hdr.
 313  */
 314 static void
 315 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 316                          struct rte_vlan_hdr *vlan)
 317 {
 318         uint16_t vlan_tci;
 319         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 320                 vlan_tci =
 321                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 322                                                action->conf)->vlan_pcp;
 323                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 324                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 325                 vlan->vlan_tci |= vlan_tci;
 326         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 327                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 328                 vlan->vlan_tci |= rte_be_to_cpu_16
 329                     (((const struct rte_flow_action_of_set_vlan_vid *)
 330                                              action->conf)->vlan_vid);
 331         }
 332 }
 333
 334 /**
 335  * Fetch 1, 2, 3 or 4 byte field from the byte array
 336  * and return as unsigned integer in host-endian format.
 337  *
 338  * @param[in] data
 339  *   Pointer to data array.
 340  * @param[in] size
 341  *   Size of field to extract.
 342  *
 343  * @return
 344  *   converted field in host endian format.
 345  */
 346 static inline uint32_t
 347 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 348 {
 349         uint32_t ret;
 350
 351         switch (size) {
 352         case 1:
 353                 ret = *data;
 354                 break;
 355         case 2:
 356                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 357                 break;
 358         case 3:
 359                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 360                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 361                 break;
 362         case 4:
 363                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 364                 break;
 365         default:
 366                 MLX5_ASSERT(false);
 367                 ret = 0;
 368                 break;
 369         }
 370         return ret;
 371 }
 372
 373 /**
 374  * Convert modify-header action to DV specification.
 375  *
 376  * Data length of each action is determined by provided field description
 377  * and the item mask. Data bit offset and width of each action is determined
 378  * by provided item mask.
 379  *
 380  * @param[in] item
 381  *   Pointer to item specification.
 382  * @param[in] field
 383  *   Pointer to field modification information.
 384  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 385  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 386  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 387  * @param[in] dcopy
 388  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 389  *   Negative offset value sets the same offset as source offset.
 390  *   size field is ignored, value is taken from source field.
 391  * @param[in,out] resource
 392  *   Pointer to the modify-header resource.
 393  * @param[in] type
 394  *   Type of modification.
 395  * @param[out] error
 396  *   Pointer to the error structure.
 397  *
 398  * @return
 399  *   0 on success, a negative errno value otherwise and rte_errno is set.
 400  */
 401 static int
 402 flow_dv_convert_modify_action(struct rte_flow_item *item,
 403                               struct field_modify_info *field,
 404                               struct field_modify_info *dcopy,
 405                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 406                               uint32_t type, struct rte_flow_error *error)
 407 {
 408         uint32_t i = resource->actions_num;
 409         struct mlx5_modification_cmd *actions = resource->actions;
 410
 411         /*
 412          * The item and mask are provided in big-endian format.
 413          * The fields should be presented as in big-endian format either.
 414          * Mask must be always present, it defines the actual field width.
 415          */
 416         MLX5_ASSERT(item->mask);
 417         MLX5_ASSERT(field->size);
 418         do {
 419                 unsigned int size_b;
 420                 unsigned int off_b;
 421                 uint32_t mask;
 422                 uint32_t data;
 423
 424                 if (i >= MLX5_MAX_MODIFY_NUM)
 425                         return rte_flow_error_set(error, EINVAL,
 426                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 427                                  "too many items to modify");
 428                 /* Fetch variable byte size mask from the array. */
 429                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 430                                            field->offset, field->size);
 431                 if (!mask) {
 432                         ++field;
 433                         continue;
 434                 }
 435                 /* Deduce actual data width in bits from mask value. */
 436                 off_b = rte_bsf32(mask);
 437                 size_b = sizeof(uint32_t) * CHAR_BIT -
 438                          off_b - __builtin_clz(mask);
 439                 MLX5_ASSERT(size_b);
 440                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 441                 actions[i] = (struct mlx5_modification_cmd) {
 442                         .action_type = type,
 443                         .field = field->id,
 444                         .offset = off_b,
 445                         .length = size_b,
 446                 };
 447                 /* Convert entire record to expected big-endian format. */
 448                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 449                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 450                         MLX5_ASSERT(dcopy);
 451                         actions[i].dst_field = dcopy->id;
 452                         actions[i].dst_offset =
 453                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 454                         /* Convert entire record to big-endian format. */
 455                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 456                 } else {
 457                         MLX5_ASSERT(item->spec);
 458                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 459                                                    field->offset, field->size);
 460                         /* Shift out the trailing masked bits from data. */
 461                         data = (data & mask) >> off_b;
 462                         actions[i].data1 = rte_cpu_to_be_32(data);
 463                 }
 464                 ++i;
 465                 ++field;
 466         } while (field->size);
 467         if (resource->actions_num == i)
 468                 return rte_flow_error_set(error, EINVAL,
 469                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 470                                           "invalid modification flow item");
 471         resource->actions_num = i;
 472         return 0;
 473 }
 474
 475 /**
 476  * Convert modify-header set IPv4 address action to DV specification.
 477  *
 478  * @param[in,out] resource
 479  *   Pointer to the modify-header resource.
 480  * @param[in] action
 481  *   Pointer to action specification.
 482  * @param[out] error
 483  *   Pointer to the error structure.
 484  *
 485  * @return
 486  *   0 on success, a negative errno value otherwise and rte_errno is set.
 487  */
 488 static int
 489 flow_dv_convert_action_modify_ipv4
 490                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 491                          const struct rte_flow_action *action,
 492                          struct rte_flow_error *error)
 493 {
 494         const struct rte_flow_action_set_ipv4 *conf =
 495                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 496         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 497         struct rte_flow_item_ipv4 ipv4;
 498         struct rte_flow_item_ipv4 ipv4_mask;
 499
 500         memset(&ipv4, 0, sizeof(ipv4));
 501         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 502         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 503                 ipv4.hdr.src_addr = conf->ipv4_addr;
 504                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 505         } else {
 506                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 507                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 508         }
 509         item.spec = &ipv4;
 510         item.mask = &ipv4_mask;
 511         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 512                                              MLX5_MODIFICATION_TYPE_SET, error);
 513 }
 514
 515 /**
 516  * Convert modify-header set IPv6 address action to DV specification.
 517  *
 518  * @param[in,out] resource
 519  *   Pointer to the modify-header resource.
 520  * @param[in] action
 521  *   Pointer to action specification.
 522  * @param[out] error
 523  *   Pointer to the error structure.
 524  *
 525  * @return
 526  *   0 on success, a negative errno value otherwise and rte_errno is set.
 527  */
 528 static int
 529 flow_dv_convert_action_modify_ipv6
 530                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 531                          const struct rte_flow_action *action,
 532                          struct rte_flow_error *error)
 533 {
 534         const struct rte_flow_action_set_ipv6 *conf =
 535                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 536         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 537         struct rte_flow_item_ipv6 ipv6;
 538         struct rte_flow_item_ipv6 ipv6_mask;
 539
 540         memset(&ipv6, 0, sizeof(ipv6));
 541         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 542         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 543                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 544                        sizeof(ipv6.hdr.src_addr));
 545                 memcpy(&ipv6_mask.hdr.src_addr,
 546                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 547                        sizeof(ipv6.hdr.src_addr));
 548         } else {
 549                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 550                        sizeof(ipv6.hdr.dst_addr));
 551                 memcpy(&ipv6_mask.hdr.dst_addr,
 552                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 553                        sizeof(ipv6.hdr.dst_addr));
 554         }
 555         item.spec = &ipv6;
 556         item.mask = &ipv6_mask;
 557         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 558                                              MLX5_MODIFICATION_TYPE_SET, error);
 559 }
 560
 561 /**
 562  * Convert modify-header set MAC address action to DV specification.
 563  *
 564  * @param[in,out] resource
 565  *   Pointer to the modify-header resource.
 566  * @param[in] action
 567  *   Pointer to action specification.
 568  * @param[out] error
 569  *   Pointer to the error structure.
 570  *
 571  * @return
 572  *   0 on success, a negative errno value otherwise and rte_errno is set.
 573  */
 574 static int
 575 flow_dv_convert_action_modify_mac
 576                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 577                          const struct rte_flow_action *action,
 578                          struct rte_flow_error *error)
 579 {
 580         const struct rte_flow_action_set_mac *conf =
 581                 (const struct rte_flow_action_set_mac *)(action->conf);
 582         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 583         struct rte_flow_item_eth eth;
 584         struct rte_flow_item_eth eth_mask;
 585
 586         memset(&eth, 0, sizeof(eth));
 587         memset(&eth_mask, 0, sizeof(eth_mask));
 588         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 589                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 590                        sizeof(eth.src.addr_bytes));
 591                 memcpy(&eth_mask.src.addr_bytes,
 592                        &rte_flow_item_eth_mask.src.addr_bytes,
 593                        sizeof(eth_mask.src.addr_bytes));
 594         } else {
 595                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 596                        sizeof(eth.dst.addr_bytes));
 597                 memcpy(&eth_mask.dst.addr_bytes,
 598                        &rte_flow_item_eth_mask.dst.addr_bytes,
 599                        sizeof(eth_mask.dst.addr_bytes));
 600         }
 601         item.spec = &eth;
 602         item.mask = &eth_mask;
 603         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 604                                              MLX5_MODIFICATION_TYPE_SET, error);
 605 }
 606
 607 /**
 608  * Convert modify-header set VLAN VID action to DV specification.
 609  *
 610  * @param[in,out] resource
 611  *   Pointer to the modify-header resource.
 612  * @param[in] action
 613  *   Pointer to action specification.
 614  * @param[out] error
 615  *   Pointer to the error structure.
 616  *
 617  * @return
 618  *   0 on success, a negative errno value otherwise and rte_errno is set.
 619  */
 620 static int
 621 flow_dv_convert_action_modify_vlan_vid
 622                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 623                          const struct rte_flow_action *action,
 624                          struct rte_flow_error *error)
 625 {
 626         const struct rte_flow_action_of_set_vlan_vid *conf =
 627                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 628         int i = resource->actions_num;
 629         struct mlx5_modification_cmd *actions = resource->actions;
 630         struct field_modify_info *field = modify_vlan_out_first_vid;
 631
 632         if (i >= MLX5_MAX_MODIFY_NUM)
 633                 return rte_flow_error_set(error, EINVAL,
 634                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 635                          "too many items to modify");
 636         actions[i] = (struct mlx5_modification_cmd) {
 637                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 638                 .field = field->id,
 639                 .length = field->size,
 640                 .offset = field->offset,
 641         };
 642         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 643         actions[i].data1 = conf->vlan_vid;
 644         actions[i].data1 = actions[i].data1 << 16;
 645         resource->actions_num = ++i;
 646         return 0;
 647 }
 648
 649 /**
 650  * Convert modify-header set TP action to DV specification.
 651  *
 652  * @param[in,out] resource
 653  *   Pointer to the modify-header resource.
 654  * @param[in] action
 655  *   Pointer to action specification.
 656  * @param[in] items
 657  *   Pointer to rte_flow_item objects list.
 658  * @param[in] attr
 659  *   Pointer to flow attributes structure.
 660  * @param[in] dev_flow
 661  *   Pointer to the sub flow.
 662  * @param[in] tunnel_decap
 663  *   Whether action is after tunnel decapsulation.
 664  * @param[out] error
 665  *   Pointer to the error structure.
 666  *
 667  * @return
 668  *   0 on success, a negative errno value otherwise and rte_errno is set.
 669  */
 670 static int
 671 flow_dv_convert_action_modify_tp
 672                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 673                          const struct rte_flow_action *action,
 674                          const struct rte_flow_item *items,
 675                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 676                          bool tunnel_decap, struct rte_flow_error *error)
 677 {
 678         const struct rte_flow_action_set_tp *conf =
 679                 (const struct rte_flow_action_set_tp *)(action->conf);
 680         struct rte_flow_item item;
 681         struct rte_flow_item_udp udp;
 682         struct rte_flow_item_udp udp_mask;
 683         struct rte_flow_item_tcp tcp;
 684         struct rte_flow_item_tcp tcp_mask;
 685         struct field_modify_info *field;
 686
 687         if (!attr->valid)
 688                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 689         if (attr->udp) {
 690                 memset(&udp, 0, sizeof(udp));
 691                 memset(&udp_mask, 0, sizeof(udp_mask));
 692                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 693                         udp.hdr.src_port = conf->port;
 694                         udp_mask.hdr.src_port =
 695                                         rte_flow_item_udp_mask.hdr.src_port;
 696                 } else {
 697                         udp.hdr.dst_port = conf->port;
 698                         udp_mask.hdr.dst_port =
 699                                         rte_flow_item_udp_mask.hdr.dst_port;
 700                 }
 701                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 702                 item.spec = &udp;
 703                 item.mask = &udp_mask;
 704                 field = modify_udp;
 705         }
 706         if (attr->tcp) {
 707                 memset(&tcp, 0, sizeof(tcp));
 708                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 709                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 710                         tcp.hdr.src_port = conf->port;
 711                         tcp_mask.hdr.src_port =
 712                                         rte_flow_item_tcp_mask.hdr.src_port;
 713                 } else {
 714                         tcp.hdr.dst_port = conf->port;
 715                         tcp_mask.hdr.dst_port =
 716                                         rte_flow_item_tcp_mask.hdr.dst_port;
 717                 }
 718                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 719                 item.spec = &tcp;
 720                 item.mask = &tcp_mask;
 721                 field = modify_tcp;
 722         }
 723         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 724                                              MLX5_MODIFICATION_TYPE_SET, error);
 725 }
 726
 727 /**
 728  * Convert modify-header set TTL action to DV specification.
 729  *
 730  * @param[in,out] resource
 731  *   Pointer to the modify-header resource.
 732  * @param[in] action
 733  *   Pointer to action specification.
 734  * @param[in] items
 735  *   Pointer to rte_flow_item objects list.
 736  * @param[in] attr
 737  *   Pointer to flow attributes structure.
 738  * @param[in] dev_flow
 739  *   Pointer to the sub flow.
 740  * @param[in] tunnel_decap
 741  *   Whether action is after tunnel decapsulation.
 742  * @param[out] error
 743  *   Pointer to the error structure.
 744  *
 745  * @return
 746  *   0 on success, a negative errno value otherwise and rte_errno is set.
 747  */
 748 static int
 749 flow_dv_convert_action_modify_ttl
 750                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 751                          const struct rte_flow_action *action,
 752                          const struct rte_flow_item *items,
 753                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 754                          bool tunnel_decap, struct rte_flow_error *error)
 755 {
 756         const struct rte_flow_action_set_ttl *conf =
 757                 (const struct rte_flow_action_set_ttl *)(action->conf);
 758         struct rte_flow_item item;
 759         struct rte_flow_item_ipv4 ipv4;
 760         struct rte_flow_item_ipv4 ipv4_mask;
 761         struct rte_flow_item_ipv6 ipv6;
 762         struct rte_flow_item_ipv6 ipv6_mask;
 763         struct field_modify_info *field;
 764
 765         if (!attr->valid)
 766                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 767         if (attr->ipv4) {
 768                 memset(&ipv4, 0, sizeof(ipv4));
 769                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 770                 ipv4.hdr.time_to_live = conf->ttl_value;
 771                 ipv4_mask.hdr.time_to_live = 0xFF;
 772                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 773                 item.spec = &ipv4;
 774                 item.mask = &ipv4_mask;
 775                 field = modify_ipv4;
 776         }
 777         if (attr->ipv6) {
 778                 memset(&ipv6, 0, sizeof(ipv6));
 779                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 780                 ipv6.hdr.hop_limits = conf->ttl_value;
 781                 ipv6_mask.hdr.hop_limits = 0xFF;
 782                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 783                 item.spec = &ipv6;
 784                 item.mask = &ipv6_mask;
 785                 field = modify_ipv6;
 786         }
 787         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 788                                              MLX5_MODIFICATION_TYPE_SET, error);
 789 }
 790
 791 /**
 792  * Convert modify-header decrement TTL action to DV specification.
 793  *
 794  * @param[in,out] resource
 795  *   Pointer to the modify-header resource.
 796  * @param[in] action
 797  *   Pointer to action specification.
 798  * @param[in] items
 799  *   Pointer to rte_flow_item objects list.
 800  * @param[in] attr
 801  *   Pointer to flow attributes structure.
 802  * @param[in] dev_flow
 803  *   Pointer to the sub flow.
 804  * @param[in] tunnel_decap
 805  *   Whether action is after tunnel decapsulation.
 806  * @param[out] error
 807  *   Pointer to the error structure.
 808  *
 809  * @return
 810  *   0 on success, a negative errno value otherwise and rte_errno is set.
 811  */
 812 static int
 813 flow_dv_convert_action_modify_dec_ttl
 814                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 815                          const struct rte_flow_item *items,
 816                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 817                          bool tunnel_decap, struct rte_flow_error *error)
 818 {
 819         struct rte_flow_item item;
 820         struct rte_flow_item_ipv4 ipv4;
 821         struct rte_flow_item_ipv4 ipv4_mask;
 822         struct rte_flow_item_ipv6 ipv6;
 823         struct rte_flow_item_ipv6 ipv6_mask;
 824         struct field_modify_info *field;
 825
 826         if (!attr->valid)
 827                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 828         if (attr->ipv4) {
 829                 memset(&ipv4, 0, sizeof(ipv4));
 830                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 831                 ipv4.hdr.time_to_live = 0xFF;
 832                 ipv4_mask.hdr.time_to_live = 0xFF;
 833                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 834                 item.spec = &ipv4;
 835                 item.mask = &ipv4_mask;
 836                 field = modify_ipv4;
 837         }
 838         if (attr->ipv6) {
 839                 memset(&ipv6, 0, sizeof(ipv6));
 840                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 841                 ipv6.hdr.hop_limits = 0xFF;
 842                 ipv6_mask.hdr.hop_limits = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 844                 item.spec = &ipv6;
 845                 item.mask = &ipv6_mask;
 846                 field = modify_ipv6;
 847         }
 848         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 849                                              MLX5_MODIFICATION_TYPE_ADD, error);
 850 }
 851
 852 /**
 853  * Convert modify-header increment/decrement TCP Sequence number
 854  * to DV specification.
 855  *
 856  * @param[in,out] resource
 857  *   Pointer to the modify-header resource.
 858  * @param[in] action
 859  *   Pointer to action specification.
 860  * @param[out] error
 861  *   Pointer to the error structure.
 862  *
 863  * @return
 864  *   0 on success, a negative errno value otherwise and rte_errno is set.
 865  */
 866 static int
 867 flow_dv_convert_action_modify_tcp_seq
 868                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 869                          const struct rte_flow_action *action,
 870                          struct rte_flow_error *error)
 871 {
 872         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 873         uint64_t value = rte_be_to_cpu_32(*conf);
 874         struct rte_flow_item item;
 875         struct rte_flow_item_tcp tcp;
 876         struct rte_flow_item_tcp tcp_mask;
 877
 878         memset(&tcp, 0, sizeof(tcp));
 879         memset(&tcp_mask, 0, sizeof(tcp_mask));
 880         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 881                 /*
 882                  * The HW has no decrement operation, only increment operation.
 883                  * To simulate decrement X from Y using increment operation
 884                  * we need to add UINT32_MAX X times to Y.
 885                  * Each adding of UINT32_MAX decrements Y by 1.
 886                  */
 887                 value *= UINT32_MAX;
 888         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 889         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 890         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 891         item.spec = &tcp;
 892         item.mask = &tcp_mask;
 893         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 894                                              MLX5_MODIFICATION_TYPE_ADD, error);
 895 }
 896
 897 /**
 898  * Convert modify-header increment/decrement TCP Acknowledgment number
 899  * to DV specification.
 900  *
 901  * @param[in,out] resource
 902  *   Pointer to the modify-header resource.
 903  * @param[in] action
 904  *   Pointer to action specification.
 905  * @param[out] error
 906  *   Pointer to the error structure.
 907  *
 908  * @return
 909  *   0 on success, a negative errno value otherwise and rte_errno is set.
 910  */
 911 static int
 912 flow_dv_convert_action_modify_tcp_ack
 913                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 914                          const struct rte_flow_action *action,
 915                          struct rte_flow_error *error)
 916 {
 917         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 918         uint64_t value = rte_be_to_cpu_32(*conf);
 919         struct rte_flow_item item;
 920         struct rte_flow_item_tcp tcp;
 921         struct rte_flow_item_tcp tcp_mask;
 922
 923         memset(&tcp, 0, sizeof(tcp));
 924         memset(&tcp_mask, 0, sizeof(tcp_mask));
 925         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 926                 /*
 927                  * The HW has no decrement operation, only increment operation.
 928                  * To simulate decrement X from Y using increment operation
 929                  * we need to add UINT32_MAX X times to Y.
 930                  * Each adding of UINT32_MAX decrements Y by 1.
 931                  */
 932                 value *= UINT32_MAX;
 933         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 934         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 935         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 936         item.spec = &tcp;
 937         item.mask = &tcp_mask;
 938         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 939                                              MLX5_MODIFICATION_TYPE_ADD, error);
 940 }
 941
 942 static enum mlx5_modification_field reg_to_field[] = {
 943         [REG_NONE] = MLX5_MODI_OUT_NONE,
 944         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 945         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 946         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 947         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 948         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 949         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 950         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 951         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 952         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 953         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 954 };
 955
 956 /**
 957  * Convert register set to DV specification.
 958  *
 959  * @param[in,out] resource
 960  *   Pointer to the modify-header resource.
 961  * @param[in] action
 962  *   Pointer to action specification.
 963  * @param[out] error
 964  *   Pointer to the error structure.
 965  *
 966  * @return
 967  *   0 on success, a negative errno value otherwise and rte_errno is set.
 968  */
 969 static int
 970 flow_dv_convert_action_set_reg
 971                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 972                          const struct rte_flow_action *action,
 973                          struct rte_flow_error *error)
 974 {
 975         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 976         struct mlx5_modification_cmd *actions = resource->actions;
 977         uint32_t i = resource->actions_num;
 978
 979         if (i >= MLX5_MAX_MODIFY_NUM)
 980                 return rte_flow_error_set(error, EINVAL,
 981                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 982                                           "too many items to modify");
 983         MLX5_ASSERT(conf->id != REG_NONE);
 984         MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field));
 985         actions[i] = (struct mlx5_modification_cmd) {
 986                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 987                 .field = reg_to_field[conf->id],
 988         };
 989         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 990         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 991         ++i;
 992         resource->actions_num = i;
 993         return 0;
 994 }
 995
 996 /**
 997  * Convert SET_TAG action to DV specification.
 998  *
 999  * @param[in] dev
1000  *   Pointer to the rte_eth_dev structure.
1001  * @param[in,out] resource
1002  *   Pointer to the modify-header resource.
1003  * @param[in] conf
1004  *   Pointer to action specification.
1005  * @param[out] error
1006  *   Pointer to the error structure.
1007  *
1008  * @return
1009  *   0 on success, a negative errno value otherwise and rte_errno is set.
1010  */
1011 static int
1012 flow_dv_convert_action_set_tag
1013                         (struct rte_eth_dev *dev,
1014                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1015                          const struct rte_flow_action_set_tag *conf,
1016                          struct rte_flow_error *error)
1017 {
1018         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1019         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1020         struct rte_flow_item item = {
1021                 .spec = &data,
1022                 .mask = &mask,
1023         };
1024         struct field_modify_info reg_c_x[] = {
1025                 [1] = {0, 0, 0},
1026         };
1027         enum mlx5_modification_field reg_type;
1028         int ret;
1029
1030         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1031         if (ret < 0)
1032                 return ret;
1033         MLX5_ASSERT(ret != REG_NONE);
1034         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1035         reg_type = reg_to_field[ret];
1036         MLX5_ASSERT(reg_type > 0);
1037         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1038         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1039                                              MLX5_MODIFICATION_TYPE_SET, error);
1040 }
1041
1042 /**
1043  * Convert internal COPY_REG action to DV specification.
1044  *
1045  * @param[in] dev
1046  *   Pointer to the rte_eth_dev structure.
1047  * @param[in,out] res
1048  *   Pointer to the modify-header resource.
1049  * @param[in] action
1050  *   Pointer to action specification.
1051  * @param[out] error
1052  *   Pointer to the error structure.
1053  *
1054  * @return
1055  *   0 on success, a negative errno value otherwise and rte_errno is set.
1056  */
1057 static int
1058 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1059                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1060                                  const struct rte_flow_action *action,
1061                                  struct rte_flow_error *error)
1062 {
1063         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1064         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1065         struct rte_flow_item item = {
1066                 .spec = NULL,
1067                 .mask = &mask,
1068         };
1069         struct field_modify_info reg_src[] = {
1070                 {4, 0, reg_to_field[conf->src]},
1071                 {0, 0, 0},
1072         };
1073         struct field_modify_info reg_dst = {
1074                 .offset = 0,
1075                 .id = reg_to_field[conf->dst],
1076         };
1077         /* Adjust reg_c[0] usage according to reported mask. */
1078         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1079                 struct mlx5_priv *priv = dev->data->dev_private;
1080                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1081
1082                 MLX5_ASSERT(reg_c0);
1083                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1084                 if (conf->dst == REG_C_0) {
1085                         /* Copy to reg_c[0], within mask only. */
1086                         reg_dst.offset = rte_bsf32(reg_c0);
1087                         /*
1088                          * Mask is ignoring the enianness, because
1089                          * there is no conversion in datapath.
1090                          */
1091 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1092                         /* Copy from destination lower bits to reg_c[0]. */
1093                         mask = reg_c0 >> reg_dst.offset;
1094 #else
1095                         /* Copy from destination upper bits to reg_c[0]. */
1096                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1097                                           rte_fls_u32(reg_c0));
1098 #endif
1099                 } else {
1100                         mask = rte_cpu_to_be_32(reg_c0);
1101 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1102                         /* Copy from reg_c[0] to destination lower bits. */
1103                         reg_dst.offset = 0;
1104 #else
1105                         /* Copy from reg_c[0] to destination upper bits. */
1106                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1107                                          (rte_fls_u32(reg_c0) -
1108                                           rte_bsf32(reg_c0));
1109 #endif
1110                 }
1111         }
1112         return flow_dv_convert_modify_action(&item,
1113                                              reg_src, &reg_dst, res,
1114                                              MLX5_MODIFICATION_TYPE_COPY,
1115                                              error);
1116 }
1117
1118 /**
1119  * Convert MARK action to DV specification. This routine is used
1120  * in extensive metadata only and requires metadata register to be
1121  * handled. In legacy mode hardware tag resource is engaged.
1122  *
1123  * @param[in] dev
1124  *   Pointer to the rte_eth_dev structure.
1125  * @param[in] conf
1126  *   Pointer to MARK action specification.
1127  * @param[in,out] resource
1128  *   Pointer to the modify-header resource.
1129  * @param[out] error
1130  *   Pointer to the error structure.
1131  *
1132  * @return
1133  *   0 on success, a negative errno value otherwise and rte_errno is set.
1134  */
1135 static int
1136 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1137                             const struct rte_flow_action_mark *conf,
1138                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1139                             struct rte_flow_error *error)
1140 {
1141         struct mlx5_priv *priv = dev->data->dev_private;
1142         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1143                                            priv->sh->dv_mark_mask);
1144         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1145         struct rte_flow_item item = {
1146                 .spec = &data,
1147                 .mask = &mask,
1148         };
1149         struct field_modify_info reg_c_x[] = {
1150                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1151                 {0, 0, 0},
1152         };
1153         int reg;
1154
1155         if (!mask)
1156                 return rte_flow_error_set(error, EINVAL,
1157                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1158                                           NULL, "zero mark action mask");
1159         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1160         if (reg < 0)
1161                 return reg;
1162         MLX5_ASSERT(reg > 0);
1163         if (reg == REG_C_0) {
1164                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1165                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1166
1167                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1168                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1169                 mask = rte_cpu_to_be_32(mask << shl_c0);
1170         }
1171         reg_c_x[0].id = reg_to_field[reg];
1172         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1173                                              MLX5_MODIFICATION_TYPE_SET, error);
1174 }
1175
1176 /**
1177  * Get metadata register index for specified steering domain.
1178  *
1179  * @param[in] dev
1180  *   Pointer to the rte_eth_dev structure.
1181  * @param[in] attr
1182  *   Attributes of flow to determine steering domain.
1183  * @param[out] error
1184  *   Pointer to the error structure.
1185  *
1186  * @return
1187  *   positive index on success, a negative errno value otherwise
1188  *   and rte_errno is set.
1189  */
1190 static enum modify_reg
1191 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1192                          const struct rte_flow_attr *attr,
1193                          struct rte_flow_error *error)
1194 {
1195         int reg =
1196                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1197                                           MLX5_METADATA_FDB :
1198                                             attr->egress ?
1199                                             MLX5_METADATA_TX :
1200                                             MLX5_METADATA_RX, 0, error);
1201         if (reg < 0)
1202                 return rte_flow_error_set(error,
1203                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1204                                           NULL, "unavailable "
1205                                           "metadata register");
1206         return reg;
1207 }
1208
1209 /**
1210  * Convert SET_META action to DV specification.
1211  *
1212  * @param[in] dev
1213  *   Pointer to the rte_eth_dev structure.
1214  * @param[in,out] resource
1215  *   Pointer to the modify-header resource.
1216  * @param[in] attr
1217  *   Attributes of flow that includes this item.
1218  * @param[in] conf
1219  *   Pointer to action specification.
1220  * @param[out] error
1221  *   Pointer to the error structure.
1222  *
1223  * @return
1224  *   0 on success, a negative errno value otherwise and rte_errno is set.
1225  */
1226 static int
1227 flow_dv_convert_action_set_meta
1228                         (struct rte_eth_dev *dev,
1229                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1230                          const struct rte_flow_attr *attr,
1231                          const struct rte_flow_action_set_meta *conf,
1232                          struct rte_flow_error *error)
1233 {
1234         uint32_t data = conf->data;
1235         uint32_t mask = conf->mask;
1236         struct rte_flow_item item = {
1237                 .spec = &data,
1238                 .mask = &mask,
1239         };
1240         struct field_modify_info reg_c_x[] = {
1241                 [1] = {0, 0, 0},
1242         };
1243         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1244
1245         if (reg < 0)
1246                 return reg;
1247         /*
1248          * In datapath code there is no endianness
1249          * coversions for perfromance reasons, all
1250          * pattern conversions are done in rte_flow.
1251          */
1252         if (reg == REG_C_0) {
1253                 struct mlx5_priv *priv = dev->data->dev_private;
1254                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1255                 uint32_t shl_c0;
1256
1257                 MLX5_ASSERT(msk_c0);
1258 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1259                 shl_c0 = rte_bsf32(msk_c0);
1260 #else
1261                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1262 #endif
1263                 mask <<= shl_c0;
1264                 data <<= shl_c0;
1265                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1266         }
1267         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1268         /* The routine expects parameters in memory as big-endian ones. */
1269         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1270                                              MLX5_MODIFICATION_TYPE_SET, error);
1271 }
1272
1273 /**
1274  * Convert modify-header set IPv4 DSCP action to DV specification.
1275  *
1276  * @param[in,out] resource
1277  *   Pointer to the modify-header resource.
1278  * @param[in] action
1279  *   Pointer to action specification.
1280  * @param[out] error
1281  *   Pointer to the error structure.
1282  *
1283  * @return
1284  *   0 on success, a negative errno value otherwise and rte_errno is set.
1285  */
1286 static int
1287 flow_dv_convert_action_modify_ipv4_dscp
1288                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1289                          const struct rte_flow_action *action,
1290                          struct rte_flow_error *error)
1291 {
1292         const struct rte_flow_action_set_dscp *conf =
1293                 (const struct rte_flow_action_set_dscp *)(action->conf);
1294         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1295         struct rte_flow_item_ipv4 ipv4;
1296         struct rte_flow_item_ipv4 ipv4_mask;
1297
1298         memset(&ipv4, 0, sizeof(ipv4));
1299         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1300         ipv4.hdr.type_of_service = conf->dscp;
1301         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1302         item.spec = &ipv4;
1303         item.mask = &ipv4_mask;
1304         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1305                                              MLX5_MODIFICATION_TYPE_SET, error);
1306 }
1307
1308 /**
1309  * Convert modify-header set IPv6 DSCP action to DV specification.
1310  *
1311  * @param[in,out] resource
1312  *   Pointer to the modify-header resource.
1313  * @param[in] action
1314  *   Pointer to action specification.
1315  * @param[out] error
1316  *   Pointer to the error structure.
1317  *
1318  * @return
1319  *   0 on success, a negative errno value otherwise and rte_errno is set.
1320  */
1321 static int
1322 flow_dv_convert_action_modify_ipv6_dscp
1323                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1324                          const struct rte_flow_action *action,
1325                          struct rte_flow_error *error)
1326 {
1327         const struct rte_flow_action_set_dscp *conf =
1328                 (const struct rte_flow_action_set_dscp *)(action->conf);
1329         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1330         struct rte_flow_item_ipv6 ipv6;
1331         struct rte_flow_item_ipv6 ipv6_mask;
1332
1333         memset(&ipv6, 0, sizeof(ipv6));
1334         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1335         /*
1336          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1337          * rdma-core only accept the DSCP bits byte aligned start from
1338          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1339          * bits in IPv6 case as rdma-core requires byte aligned value.
1340          */
1341         ipv6.hdr.vtc_flow = conf->dscp;
1342         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1343         item.spec = &ipv6;
1344         item.mask = &ipv6_mask;
1345         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1346                                              MLX5_MODIFICATION_TYPE_SET, error);
1347 }
1348
1349 /**
1350  * Validate MARK item.
1351  *
1352  * @param[in] dev
1353  *   Pointer to the rte_eth_dev structure.
1354  * @param[in] item
1355  *   Item specification.
1356  * @param[in] attr
1357  *   Attributes of flow that includes this item.
1358  * @param[out] error
1359  *   Pointer to error structure.
1360  *
1361  * @return
1362  *   0 on success, a negative errno value otherwise and rte_errno is set.
1363  */
1364 static int
1365 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1366                            const struct rte_flow_item *item,
1367                            const struct rte_flow_attr *attr __rte_unused,
1368                            struct rte_flow_error *error)
1369 {
1370         struct mlx5_priv *priv = dev->data->dev_private;
1371         struct mlx5_dev_config *config = &priv->config;
1372         const struct rte_flow_item_mark *spec = item->spec;
1373         const struct rte_flow_item_mark *mask = item->mask;
1374         const struct rte_flow_item_mark nic_mask = {
1375                 .id = priv->sh->dv_mark_mask,
1376         };
1377         int ret;
1378
1379         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1380                 return rte_flow_error_set(error, ENOTSUP,
1381                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1382                                           "extended metadata feature"
1383                                           " isn't enabled");
1384         if (!mlx5_flow_ext_mreg_supported(dev))
1385                 return rte_flow_error_set(error, ENOTSUP,
1386                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1387                                           "extended metadata register"
1388                                           " isn't supported");
1389         if (!nic_mask.id)
1390                 return rte_flow_error_set(error, ENOTSUP,
1391                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1392                                           "extended metadata register"
1393                                           " isn't available");
1394         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1395         if (ret < 0)
1396                 return ret;
1397         if (!spec)
1398                 return rte_flow_error_set(error, EINVAL,
1399                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1400                                           item->spec,
1401                                           "data cannot be empty");
1402         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1403                 return rte_flow_error_set(error, EINVAL,
1404                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1405                                           &spec->id,
1406                                           "mark id exceeds the limit");
1407         if (!mask)
1408                 mask = &nic_mask;
1409         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1410                                         (const uint8_t *)&nic_mask,
1411                                         sizeof(struct rte_flow_item_mark),
1412                                         error);
1413         if (ret < 0)
1414                 return ret;
1415         return 0;
1416 }
1417
1418 /**
1419  * Validate META item.
1420  *
1421  * @param[in] dev
1422  *   Pointer to the rte_eth_dev structure.
1423  * @param[in] item
1424  *   Item specification.
1425  * @param[in] attr
1426  *   Attributes of flow that includes this item.
1427  * @param[out] error
1428  *   Pointer to error structure.
1429  *
1430  * @return
1431  *   0 on success, a negative errno value otherwise and rte_errno is set.
1432  */
1433 static int
1434 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1435                            const struct rte_flow_item *item,
1436                            const struct rte_flow_attr *attr,
1437                            struct rte_flow_error *error)
1438 {
1439         struct mlx5_priv *priv = dev->data->dev_private;
1440         struct mlx5_dev_config *config = &priv->config;
1441         const struct rte_flow_item_meta *spec = item->spec;
1442         const struct rte_flow_item_meta *mask = item->mask;
1443         struct rte_flow_item_meta nic_mask = {
1444                 .data = UINT32_MAX
1445         };
1446         int reg;
1447         int ret;
1448
1449         if (!spec)
1450                 return rte_flow_error_set(error, EINVAL,
1451                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1452                                           item->spec,
1453                                           "data cannot be empty");
1454         if (!spec->data)
1455                 return rte_flow_error_set(error, EINVAL,
1456                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1457                                           "data cannot be zero");
1458         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1459                 if (!mlx5_flow_ext_mreg_supported(dev))
1460                         return rte_flow_error_set(error, ENOTSUP,
1461                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1462                                           "extended metadata register"
1463                                           " isn't supported");
1464                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1465                 if (reg < 0)
1466                         return reg;
1467                 if (reg == REG_B)
1468                         return rte_flow_error_set(error, ENOTSUP,
1469                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1470                                           "match on reg_b "
1471                                           "isn't supported");
1472                 if (reg != REG_A)
1473                         nic_mask.data = priv->sh->dv_meta_mask;
1474         }
1475         if (!mask)
1476                 mask = &rte_flow_item_meta_mask;
1477         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1478                                         (const uint8_t *)&nic_mask,
1479                                         sizeof(struct rte_flow_item_meta),
1480                                         error);
1481         return ret;
1482 }
1483
1484 /**
1485  * Validate TAG item.
1486  *
1487  * @param[in] dev
1488  *   Pointer to the rte_eth_dev structure.
1489  * @param[in] item
1490  *   Item specification.
1491  * @param[in] attr
1492  *   Attributes of flow that includes this item.
1493  * @param[out] error
1494  *   Pointer to error structure.
1495  *
1496  * @return
1497  *   0 on success, a negative errno value otherwise and rte_errno is set.
1498  */
1499 static int
1500 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1501                           const struct rte_flow_item *item,
1502                           const struct rte_flow_attr *attr __rte_unused,
1503                           struct rte_flow_error *error)
1504 {
1505         const struct rte_flow_item_tag *spec = item->spec;
1506         const struct rte_flow_item_tag *mask = item->mask;
1507         const struct rte_flow_item_tag nic_mask = {
1508                 .data = RTE_BE32(UINT32_MAX),
1509                 .index = 0xff,
1510         };
1511         int ret;
1512
1513         if (!mlx5_flow_ext_mreg_supported(dev))
1514                 return rte_flow_error_set(error, ENOTSUP,
1515                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1516                                           "extensive metadata register"
1517                                           " isn't supported");
1518         if (!spec)
1519                 return rte_flow_error_set(error, EINVAL,
1520                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1521                                           item->spec,
1522                                           "data cannot be empty");
1523         if (!mask)
1524                 mask = &rte_flow_item_tag_mask;
1525         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1526                                         (const uint8_t *)&nic_mask,
1527                                         sizeof(struct rte_flow_item_tag),
1528                                         error);
1529         if (ret < 0)
1530                 return ret;
1531         if (mask->index != 0xff)
1532                 return rte_flow_error_set(error, EINVAL,
1533                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1534                                           "partial mask for tag index"
1535                                           " is not supported");
1536         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1537         if (ret < 0)
1538                 return ret;
1539         MLX5_ASSERT(ret != REG_NONE);
1540         return 0;
1541 }
1542
1543 /**
1544  * Validate vport item.
1545  *
1546  * @param[in] dev
1547  *   Pointer to the rte_eth_dev structure.
1548  * @param[in] item
1549  *   Item specification.
1550  * @param[in] attr
1551  *   Attributes of flow that includes this item.
1552  * @param[in] item_flags
1553  *   Bit-fields that holds the items detected until now.
1554  * @param[out] error
1555  *   Pointer to error structure.
1556  *
1557  * @return
1558  *   0 on success, a negative errno value otherwise and rte_errno is set.
1559  */
1560 static int
1561 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1562                               const struct rte_flow_item *item,
1563                               const struct rte_flow_attr *attr,
1564                               uint64_t item_flags,
1565                               struct rte_flow_error *error)
1566 {
1567         const struct rte_flow_item_port_id *spec = item->spec;
1568         const struct rte_flow_item_port_id *mask = item->mask;
1569         const struct rte_flow_item_port_id switch_mask = {
1570                         .id = 0xffffffff,
1571         };
1572         struct mlx5_priv *esw_priv;
1573         struct mlx5_priv *dev_priv;
1574         int ret;
1575
1576         if (!attr->transfer)
1577                 return rte_flow_error_set(error, EINVAL,
1578                                           RTE_FLOW_ERROR_TYPE_ITEM,
1579                                           NULL,
1580                                           "match on port id is valid only"
1581                                           " when transfer flag is enabled");
1582         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1583                 return rte_flow_error_set(error, ENOTSUP,
1584                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1585                                           "multiple source ports are not"
1586                                           " supported");
1587         if (!mask)
1588                 mask = &switch_mask;
1589         if (mask->id != 0xffffffff)
1590                 return rte_flow_error_set(error, ENOTSUP,
1591                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1592                                            mask,
1593                                            "no support for partial mask on"
1594                                            " \"id\" field");
1595         ret = mlx5_flow_item_acceptable
1596                                 (item, (const uint8_t *)mask,
1597                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1598                                  sizeof(struct rte_flow_item_port_id),
1599                                  error);
1600         if (ret)
1601                 return ret;
1602         if (!spec)
1603                 return 0;
1604         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1605         if (!esw_priv)
1606                 return rte_flow_error_set(error, rte_errno,
1607                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1608                                           "failed to obtain E-Switch info for"
1609                                           " port");
1610         dev_priv = mlx5_dev_to_eswitch_info(dev);
1611         if (!dev_priv)
1612                 return rte_flow_error_set(error, rte_errno,
1613                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1614                                           NULL,
1615                                           "failed to obtain E-Switch info");
1616         if (esw_priv->domain_id != dev_priv->domain_id)
1617                 return rte_flow_error_set(error, EINVAL,
1618                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1619                                           "cannot match on a port from a"
1620                                           " different E-Switch");
1621         return 0;
1622 }
1623
1624 /**
1625  * Validate GTP item.
1626  *
1627  * @param[in] dev
1628  *   Pointer to the rte_eth_dev structure.
1629  * @param[in] item
1630  *   Item specification.
1631  * @param[in] item_flags
1632  *   Bit-fields that holds the items detected until now.
1633  * @param[out] error
1634  *   Pointer to error structure.
1635  *
1636  * @return
1637  *   0 on success, a negative errno value otherwise and rte_errno is set.
1638  */
1639 static int
1640 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1641                           const struct rte_flow_item *item,
1642                           uint64_t item_flags,
1643                           struct rte_flow_error *error)
1644 {
1645         struct mlx5_priv *priv = dev->data->dev_private;
1646         const struct rte_flow_item_gtp *mask = item->mask;
1647         const struct rte_flow_item_gtp nic_mask = {
1648                 .msg_type = 0xff,
1649                 .teid = RTE_BE32(0xffffffff),
1650         };
1651
1652         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1653                 return rte_flow_error_set(error, ENOTSUP,
1654                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1655                                           "GTP support is not enabled");
1656         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1657                 return rte_flow_error_set(error, ENOTSUP,
1658                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1659                                           "multiple tunnel layers not"
1660                                           " supported");
1661         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1662                 return rte_flow_error_set(error, EINVAL,
1663                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1664                                           "no outer UDP layer found");
1665         if (!mask)
1666                 mask = &rte_flow_item_gtp_mask;
1667         return mlx5_flow_item_acceptable
1668                 (item, (const uint8_t *)mask,
1669                  (const uint8_t *)&nic_mask,
1670                  sizeof(struct rte_flow_item_gtp),
1671                  error);
1672 }
1673
1674 /**
1675  * Validate the pop VLAN action.
1676  *
1677  * @param[in] dev
1678  *   Pointer to the rte_eth_dev structure.
1679  * @param[in] action_flags
1680  *   Holds the actions detected until now.
1681  * @param[in] action
1682  *   Pointer to the pop vlan action.
1683  * @param[in] item_flags
1684  *   The items found in this flow rule.
1685  * @param[in] attr
1686  *   Pointer to flow attributes.
1687  * @param[out] error
1688  *   Pointer to error structure.
1689  *
1690  * @return
1691  *   0 on success, a negative errno value otherwise and rte_errno is set.
1692  */
1693 static int
1694 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1695                                  uint64_t action_flags,
1696                                  const struct rte_flow_action *action,
1697                                  uint64_t item_flags,
1698                                  const struct rte_flow_attr *attr,
1699                                  struct rte_flow_error *error)
1700 {
1701         struct mlx5_priv *priv = dev->data->dev_private;
1702
1703         (void)action;
1704         (void)attr;
1705         if (!priv->sh->pop_vlan_action)
1706                 return rte_flow_error_set(error, ENOTSUP,
1707                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1708                                           NULL,
1709                                           "pop vlan action is not supported");
1710         if (attr->egress)
1711                 return rte_flow_error_set(error, ENOTSUP,
1712                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1713                                           NULL,
1714                                           "pop vlan action not supported for "
1715                                           "egress");
1716         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1717                 return rte_flow_error_set(error, ENOTSUP,
1718                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1719                                           "no support for multiple VLAN "
1720                                           "actions");
1721         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1722                 return rte_flow_error_set(error, ENOTSUP,
1723                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1724                                           NULL,
1725                                           "cannot pop vlan without a "
1726                                           "match on (outer) vlan in the flow");
1727         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1728                 return rte_flow_error_set(error, EINVAL,
1729                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1730                                           "wrong action order, port_id should "
1731                                           "be after pop VLAN action");
1732         return 0;
1733 }
1734
1735 /**
1736  * Get VLAN default info from vlan match info.
1737  *
1738  * @param[in] items
1739  *   the list of item specifications.
1740  * @param[out] vlan
1741  *   pointer VLAN info to fill to.
1742  *
1743  * @return
1744  *   0 on success, a negative errno value otherwise and rte_errno is set.
1745  */
1746 static void
1747 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1748                                   struct rte_vlan_hdr *vlan)
1749 {
1750         const struct rte_flow_item_vlan nic_mask = {
1751                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1752                                 MLX5DV_FLOW_VLAN_VID_MASK),
1753                 .inner_type = RTE_BE16(0xffff),
1754         };
1755
1756         if (items == NULL)
1757                 return;
1758         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1759                 int type = items->type;
1760
1761                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
1762                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
1763                         break;
1764         }
1765         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
1766                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1767                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1768
1769                 if (!vlan_m)
1770                         vlan_m = &nic_mask;
1771                 /* Only full match values are accepted */
1772                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1773                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1774                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1775                         vlan->vlan_tci |=
1776                                 rte_be_to_cpu_16(vlan_v->tci &
1777                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1778                 }
1779                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1780                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1781                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1782                         vlan->vlan_tci |=
1783                                 rte_be_to_cpu_16(vlan_v->tci &
1784                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1785                 }
1786                 if (vlan_m->inner_type == nic_mask.inner_type)
1787                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1788                                                            vlan_m->inner_type);
1789         }
1790 }
1791
1792 /**
1793  * Validate the push VLAN action.
1794  *
1795  * @param[in] action_flags
1796  *   Holds the actions detected until now.
1797  * @param[in] item_flags
1798  *   The items found in this flow rule.
1799  * @param[in] action
1800  *   Pointer to the action structure.
1801  * @param[in] attr
1802  *   Pointer to flow attributes
1803  * @param[out] error
1804  *   Pointer to error structure.
1805  *
1806  * @return
1807  *   0 on success, a negative errno value otherwise and rte_errno is set.
1808  */
1809 static int
1810 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1811                                   uint64_t item_flags __rte_unused,
1812                                   const struct rte_flow_action *action,
1813                                   const struct rte_flow_attr *attr,
1814                                   struct rte_flow_error *error)
1815 {
1816         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1817
1818         if (!attr->transfer && attr->ingress)
1819                 return rte_flow_error_set(error, ENOTSUP,
1820                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1821                                           NULL,
1822                                           "push VLAN action not supported for "
1823                                           "ingress");
1824         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1825             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1826                 return rte_flow_error_set(error, EINVAL,
1827                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1828                                           "invalid vlan ethertype");
1829         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1830                 return rte_flow_error_set(error, ENOTSUP,
1831                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1832                                           "no support for multiple VLAN "
1833                                           "actions");
1834         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1835                 return rte_flow_error_set(error, EINVAL,
1836                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1837                                           "wrong action order, port_id should "
1838                                           "be after push VLAN");
1839         (void)attr;
1840         return 0;
1841 }
1842
1843 /**
1844  * Validate the set VLAN PCP.
1845  *
1846  * @param[in] action_flags
1847  *   Holds the actions detected until now.
1848  * @param[in] actions
1849  *   Pointer to the list of actions remaining in the flow rule.
1850  * @param[out] error
1851  *   Pointer to error structure.
1852  *
1853  * @return
1854  *   0 on success, a negative errno value otherwise and rte_errno is set.
1855  */
1856 static int
1857 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1858                                      const struct rte_flow_action actions[],
1859                                      struct rte_flow_error *error)
1860 {
1861         const struct rte_flow_action *action = actions;
1862         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1863
1864         if (conf->vlan_pcp > 7)
1865                 return rte_flow_error_set(error, EINVAL,
1866                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1867                                           "VLAN PCP value is too big");
1868         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1869                 return rte_flow_error_set(error, ENOTSUP,
1870                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1871                                           "set VLAN PCP action must follow "
1872                                           "the push VLAN action");
1873         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1874                 return rte_flow_error_set(error, ENOTSUP,
1875                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1876                                           "Multiple VLAN PCP modification are "
1877                                           "not supported");
1878         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1879                 return rte_flow_error_set(error, EINVAL,
1880                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1881                                           "wrong action order, port_id should "
1882                                           "be after set VLAN PCP");
1883         return 0;
1884 }
1885
1886 /**
1887  * Validate the set VLAN VID.
1888  *
1889  * @param[in] item_flags
1890  *   Holds the items detected in this rule.
1891  * @param[in] action_flags
1892  *   Holds the actions detected until now.
1893  * @param[in] actions
1894  *   Pointer to the list of actions remaining in the flow rule.
1895  * @param[out] error
1896  *   Pointer to error structure.
1897  *
1898  * @return
1899  *   0 on success, a negative errno value otherwise and rte_errno is set.
1900  */
1901 static int
1902 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1903                                      uint64_t action_flags,
1904                                      const struct rte_flow_action actions[],
1905                                      struct rte_flow_error *error)
1906 {
1907         const struct rte_flow_action *action = actions;
1908         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1909
1910         if (conf->vlan_vid > RTE_BE16(0xFFE))
1911                 return rte_flow_error_set(error, EINVAL,
1912                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1913                                           "VLAN VID value is too big");
1914         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1915             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1916                 return rte_flow_error_set(error, ENOTSUP,
1917                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1918                                           "set VLAN VID action must follow push"
1919                                           " VLAN action or match on VLAN item");
1920         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1921                 return rte_flow_error_set(error, ENOTSUP,
1922                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1923                                           "Multiple VLAN VID modifications are "
1924                                           "not supported");
1925         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1926                 return rte_flow_error_set(error, EINVAL,
1927                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1928                                           "wrong action order, port_id should "
1929                                           "be after set VLAN VID");
1930         return 0;
1931 }
1932
1933 /*
1934  * Validate the FLAG action.
1935  *
1936  * @param[in] dev
1937  *   Pointer to the rte_eth_dev structure.
1938  * @param[in] action_flags
1939  *   Holds the actions detected until now.
1940  * @param[in] attr
1941  *   Pointer to flow attributes
1942  * @param[out] error
1943  *   Pointer to error structure.
1944  *
1945  * @return
1946  *   0 on success, a negative errno value otherwise and rte_errno is set.
1947  */
1948 static int
1949 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1950                              uint64_t action_flags,
1951                              const struct rte_flow_attr *attr,
1952                              struct rte_flow_error *error)
1953 {
1954         struct mlx5_priv *priv = dev->data->dev_private;
1955         struct mlx5_dev_config *config = &priv->config;
1956         int ret;
1957
1958         /* Fall back if no extended metadata register support. */
1959         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1960                 return mlx5_flow_validate_action_flag(action_flags, attr,
1961                                                       error);
1962         /* Extensive metadata mode requires registers. */
1963         if (!mlx5_flow_ext_mreg_supported(dev))
1964                 return rte_flow_error_set(error, ENOTSUP,
1965                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1966                                           "no metadata registers "
1967                                           "to support flag action");
1968         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1969                 return rte_flow_error_set(error, ENOTSUP,
1970                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1971                                           "extended metadata register"
1972                                           " isn't available");
1973         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1974         if (ret < 0)
1975                 return ret;
1976         MLX5_ASSERT(ret > 0);
1977         if (action_flags & MLX5_FLOW_ACTION_MARK)
1978                 return rte_flow_error_set(error, EINVAL,
1979                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1980                                           "can't mark and flag in same flow");
1981         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1982                 return rte_flow_error_set(error, EINVAL,
1983                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1984                                           "can't have 2 flag"
1985                                           " actions in same flow");
1986         return 0;
1987 }
1988
1989 /**
1990  * Validate MARK action.
1991  *
1992  * @param[in] dev
1993  *   Pointer to the rte_eth_dev structure.
1994  * @param[in] action
1995  *   Pointer to action.
1996  * @param[in] action_flags
1997  *   Holds the actions detected until now.
1998  * @param[in] attr
1999  *   Pointer to flow attributes
2000  * @param[out] error
2001  *   Pointer to error structure.
2002  *
2003  * @return
2004  *   0 on success, a negative errno value otherwise and rte_errno is set.
2005  */
2006 static int
2007 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
2008                              const struct rte_flow_action *action,
2009                              uint64_t action_flags,
2010                              const struct rte_flow_attr *attr,
2011                              struct rte_flow_error *error)
2012 {
2013         struct mlx5_priv *priv = dev->data->dev_private;
2014         struct mlx5_dev_config *config = &priv->config;
2015         const struct rte_flow_action_mark *mark = action->conf;
2016         int ret;
2017
2018         /* Fall back if no extended metadata register support. */
2019         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2020                 return mlx5_flow_validate_action_mark(action, action_flags,
2021                                                       attr, error);
2022         /* Extensive metadata mode requires registers. */
2023         if (!mlx5_flow_ext_mreg_supported(dev))
2024                 return rte_flow_error_set(error, ENOTSUP,
2025                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2026                                           "no metadata registers "
2027                                           "to support mark action");
2028         if (!priv->sh->dv_mark_mask)
2029                 return rte_flow_error_set(error, ENOTSUP,
2030                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2031                                           "extended metadata register"
2032                                           " isn't available");
2033         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2034         if (ret < 0)
2035                 return ret;
2036         MLX5_ASSERT(ret > 0);
2037         if (!mark)
2038                 return rte_flow_error_set(error, EINVAL,
2039                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2040                                           "configuration cannot be null");
2041         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
2042                 return rte_flow_error_set(error, EINVAL,
2043                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2044                                           &mark->id,
2045                                           "mark id exceeds the limit");
2046         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2047                 return rte_flow_error_set(error, EINVAL,
2048                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2049                                           "can't flag and mark in same flow");
2050         if (action_flags & MLX5_FLOW_ACTION_MARK)
2051                 return rte_flow_error_set(error, EINVAL,
2052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2053                                           "can't have 2 mark actions in same"
2054                                           " flow");
2055         return 0;
2056 }
2057
2058 /**
2059  * Validate SET_META action.
2060  *
2061  * @param[in] dev
2062  *   Pointer to the rte_eth_dev structure.
2063  * @param[in] action
2064  *   Pointer to the action structure.
2065  * @param[in] action_flags
2066  *   Holds the actions detected until now.
2067  * @param[in] attr
2068  *   Pointer to flow attributes
2069  * @param[out] error
2070  *   Pointer to error structure.
2071  *
2072  * @return
2073  *   0 on success, a negative errno value otherwise and rte_errno is set.
2074  */
2075 static int
2076 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2077                                  const struct rte_flow_action *action,
2078                                  uint64_t action_flags __rte_unused,
2079                                  const struct rte_flow_attr *attr,
2080                                  struct rte_flow_error *error)
2081 {
2082         const struct rte_flow_action_set_meta *conf;
2083         uint32_t nic_mask = UINT32_MAX;
2084         int reg;
2085
2086         if (!mlx5_flow_ext_mreg_supported(dev))
2087                 return rte_flow_error_set(error, ENOTSUP,
2088                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2089                                           "extended metadata register"
2090                                           " isn't supported");
2091         reg = flow_dv_get_metadata_reg(dev, attr, error);
2092         if (reg < 0)
2093                 return reg;
2094         if (reg != REG_A && reg != REG_B) {
2095                 struct mlx5_priv *priv = dev->data->dev_private;
2096
2097                 nic_mask = priv->sh->dv_meta_mask;
2098         }
2099         if (!(action->conf))
2100                 return rte_flow_error_set(error, EINVAL,
2101                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2102                                           "configuration cannot be null");
2103         conf = (const struct rte_flow_action_set_meta *)action->conf;
2104         if (!conf->mask)
2105                 return rte_flow_error_set(error, EINVAL,
2106                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2107                                           "zero mask doesn't have any effect");
2108         if (conf->mask & ~nic_mask)
2109                 return rte_flow_error_set(error, EINVAL,
2110                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2111                                           "meta data must be within reg C0");
2112         if (!(conf->data & conf->mask))
2113                 return rte_flow_error_set(error, EINVAL,
2114                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2115                                           "zero value has no effect");
2116         return 0;
2117 }
2118
2119 /**
2120  * Validate SET_TAG action.
2121  *
2122  * @param[in] dev
2123  *   Pointer to the rte_eth_dev structure.
2124  * @param[in] action
2125  *   Pointer to the action structure.
2126  * @param[in] action_flags
2127  *   Holds the actions detected until now.
2128  * @param[in] attr
2129  *   Pointer to flow attributes
2130  * @param[out] error
2131  *   Pointer to error structure.
2132  *
2133  * @return
2134  *   0 on success, a negative errno value otherwise and rte_errno is set.
2135  */
2136 static int
2137 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2138                                 const struct rte_flow_action *action,
2139                                 uint64_t action_flags,
2140                                 const struct rte_flow_attr *attr,
2141                                 struct rte_flow_error *error)
2142 {
2143         const struct rte_flow_action_set_tag *conf;
2144         const uint64_t terminal_action_flags =
2145                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2146                 MLX5_FLOW_ACTION_RSS;
2147         int ret;
2148
2149         if (!mlx5_flow_ext_mreg_supported(dev))
2150                 return rte_flow_error_set(error, ENOTSUP,
2151                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2152                                           "extensive metadata register"
2153                                           " isn't supported");
2154         if (!(action->conf))
2155                 return rte_flow_error_set(error, EINVAL,
2156                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2157                                           "configuration cannot be null");
2158         conf = (const struct rte_flow_action_set_tag *)action->conf;
2159         if (!conf->mask)
2160                 return rte_flow_error_set(error, EINVAL,
2161                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2162                                           "zero mask doesn't have any effect");
2163         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2164         if (ret < 0)
2165                 return ret;
2166         if (!attr->transfer && attr->ingress &&
2167             (action_flags & terminal_action_flags))
2168                 return rte_flow_error_set(error, EINVAL,
2169                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2170                                           "set_tag has no effect"
2171                                           " with terminal actions");
2172         return 0;
2173 }
2174
2175 /**
2176  * Validate count action.
2177  *
2178  * @param[in] dev
2179  *   Pointer to rte_eth_dev structure.
2180  * @param[out] error
2181  *   Pointer to error structure.
2182  *
2183  * @return
2184  *   0 on success, a negative errno value otherwise and rte_errno is set.
2185  */
2186 static int
2187 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2188                               struct rte_flow_error *error)
2189 {
2190         struct mlx5_priv *priv = dev->data->dev_private;
2191
2192         if (!priv->config.devx)
2193                 goto notsup_err;
2194 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2195         return 0;
2196 #endif
2197 notsup_err:
2198         return rte_flow_error_set
2199                       (error, ENOTSUP,
2200                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2201                        NULL,
2202                        "count action not supported");
2203 }
2204
2205 /**
2206  * Validate the L2 encap action.
2207  *
2208  * @param[in] action_flags
2209  *   Holds the actions detected until now.
2210  * @param[in] action
2211  *   Pointer to the action structure.
2212  * @param[out] error
2213  *   Pointer to error structure.
2214  *
2215  * @return
2216  *   0 on success, a negative errno value otherwise and rte_errno is set.
2217  */
2218 static int
2219 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2220                                  const struct rte_flow_action *action,
2221                                  struct rte_flow_error *error)
2222 {
2223         if (!(action->conf))
2224                 return rte_flow_error_set(error, EINVAL,
2225                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2226                                           "configuration cannot be null");
2227         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
2228                 return rte_flow_error_set(error, EINVAL,
2229                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2230                                           "can only have a single encap action "
2231                                           "in a flow");
2232         return 0;
2233 }
2234
2235 /**
2236  * Validate a decap action.
2237  *
2238  * @param[in] action_flags
2239  *   Holds the actions detected until now.
2240  * @param[in] attr
2241  *   Pointer to flow attributes
2242  * @param[out] error
2243  *   Pointer to error structure.
2244  *
2245  * @return
2246  *   0 on success, a negative errno value otherwise and rte_errno is set.
2247  */
2248 static int
2249 flow_dv_validate_action_decap(uint64_t action_flags,
2250                                  const struct rte_flow_attr *attr,
2251                                  struct rte_flow_error *error)
2252 {
2253         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
2254                 return rte_flow_error_set(error, ENOTSUP,
2255                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2256                                           action_flags &
2257                                           MLX5_FLOW_ACTION_DECAP ? "can only "
2258                                           "have a single decap action" : "decap "
2259                                           "after encap is not supported");
2260         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2261                 return rte_flow_error_set(error, EINVAL,
2262                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2263                                           "can't have decap action after"
2264                                           " modify action");
2265         if (attr->egress)
2266                 return rte_flow_error_set(error, ENOTSUP,
2267                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2268                                           NULL,
2269                                           "decap action not supported for "
2270                                           "egress");
2271         return 0;
2272 }
2273
2274 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
2275
2276 /**
2277  * Validate the raw encap and decap actions.
2278  *
2279  * @param[in] decap
2280  *   Pointer to the decap action.
2281  * @param[in] encap
2282  *   Pointer to the encap action.
2283  * @param[in] attr
2284  *   Pointer to flow attributes
2285  * @param[in/out] action_flags
2286  *   Holds the actions detected until now.
2287  * @param[out] actions_n
2288  *   pointer to the number of actions counter.
2289  * @param[out] error
2290  *   Pointer to error structure.
2291  *
2292  * @return
2293  *   0 on success, a negative errno value otherwise and rte_errno is set.
2294  */
2295 static int
2296 flow_dv_validate_action_raw_encap_decap
2297         (const struct rte_flow_action_raw_decap *decap,
2298          const struct rte_flow_action_raw_encap *encap,
2299          const struct rte_flow_attr *attr, uint64_t *action_flags,
2300          int *actions_n, struct rte_flow_error *error)
2301 {
2302         int ret;
2303
2304         if (encap && (!encap->size || !encap->data))
2305                 return rte_flow_error_set(error, EINVAL,
2306                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2307                                           "raw encap data cannot be empty");
2308         if (decap && encap) {
2309                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
2310                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2311                         /* L3 encap. */
2312                         decap = NULL;
2313                 else if (encap->size <=
2314                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2315                            decap->size >
2316                            MLX5_ENCAPSULATION_DECISION_SIZE)
2317                         /* L3 decap. */
2318                         encap = NULL;
2319                 else if (encap->size >
2320                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2321                            decap->size >
2322                            MLX5_ENCAPSULATION_DECISION_SIZE)
2323                         /* 2 L2 actions: encap and decap. */
2324                         ;
2325                 else
2326                         return rte_flow_error_set(error,
2327                                 ENOTSUP,
2328                                 RTE_FLOW_ERROR_TYPE_ACTION,
2329                                 NULL, "unsupported too small "
2330                                 "raw decap and too small raw "
2331                                 "encap combination");
2332         }
2333         if (decap) {
2334                 ret = flow_dv_validate_action_decap(*action_flags, attr, error);
2335                 if (ret < 0)
2336                         return ret;
2337                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
2338                 ++(*actions_n);
2339         }
2340         if (encap) {
2341                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
2342                         return rte_flow_error_set(error, ENOTSUP,
2343                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2344                                                   NULL,
2345                                                   "small raw encap size");
2346                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
2347                         return rte_flow_error_set(error, EINVAL,
2348                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2349                                                   NULL,
2350                                                   "more than one encap action");
2351                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
2352                 ++(*actions_n);
2353         }
2354         return 0;
2355 }
2356
2357 /**
2358  * Find existing encap/decap resource or create and register a new one.
2359  *
2360  * @param[in, out] dev
2361  *   Pointer to rte_eth_dev structure.
2362  * @param[in, out] resource
2363  *   Pointer to encap/decap resource.
2364  * @parm[in, out] dev_flow
2365  *   Pointer to the dev_flow.
2366  * @param[out] error
2367  *   pointer to error structure.
2368  *
2369  * @return
2370  *   0 on success otherwise -errno and errno is set.
2371  */
2372 static int
2373 flow_dv_encap_decap_resource_register
2374                         (struct rte_eth_dev *dev,
2375                          struct mlx5_flow_dv_encap_decap_resource *resource,
2376                          struct mlx5_flow *dev_flow,
2377                          struct rte_flow_error *error)
2378 {
2379         struct mlx5_priv *priv = dev->data->dev_private;
2380         struct mlx5_ibv_shared *sh = priv->sh;
2381         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2382         struct mlx5dv_dr_domain *domain;
2383
2384         resource->flags = dev_flow->group ? 0 : 1;
2385         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2386                 domain = sh->fdb_domain;
2387         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2388                 domain = sh->rx_domain;
2389         else
2390                 domain = sh->tx_domain;
2391         /* Lookup a matching resource from cache. */
2392         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2393                 if (resource->reformat_type == cache_resource->reformat_type &&
2394                     resource->ft_type == cache_resource->ft_type &&
2395                     resource->flags == cache_resource->flags &&
2396                     resource->size == cache_resource->size &&
2397                     !memcmp((const void *)resource->buf,
2398                             (const void *)cache_resource->buf,
2399                             resource->size)) {
2400                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2401                                 (void *)cache_resource,
2402                                 rte_atomic32_read(&cache_resource->refcnt));
2403                         rte_atomic32_inc(&cache_resource->refcnt);
2404                         dev_flow->dv.encap_decap = cache_resource;
2405                         return 0;
2406                 }
2407         }
2408         /* Register new encap/decap resource. */
2409         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2410         if (!cache_resource)
2411                 return rte_flow_error_set(error, ENOMEM,
2412                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2413                                           "cannot allocate resource memory");
2414         *cache_resource = *resource;
2415         cache_resource->verbs_action =
2416                 mlx5_glue->dv_create_flow_action_packet_reformat
2417                         (sh->ctx, cache_resource->reformat_type,
2418                          cache_resource->ft_type, domain, cache_resource->flags,
2419                          cache_resource->size,
2420                          (cache_resource->size ? cache_resource->buf : NULL));
2421         if (!cache_resource->verbs_action) {
2422                 rte_free(cache_resource);
2423                 return rte_flow_error_set(error, ENOMEM,
2424                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2425                                           NULL, "cannot create action");
2426         }
2427         rte_atomic32_init(&cache_resource->refcnt);
2428         rte_atomic32_inc(&cache_resource->refcnt);
2429         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2430         dev_flow->dv.encap_decap = cache_resource;
2431         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2432                 (void *)cache_resource,
2433                 rte_atomic32_read(&cache_resource->refcnt));
2434         return 0;
2435 }
2436
2437 /**
2438  * Find existing table jump resource or create and register a new one.
2439  *
2440  * @param[in, out] dev
2441  *   Pointer to rte_eth_dev structure.
2442  * @param[in, out] tbl
2443  *   Pointer to flow table resource.
2444  * @parm[in, out] dev_flow
2445  *   Pointer to the dev_flow.
2446  * @param[out] error
2447  *   pointer to error structure.
2448  *
2449  * @return
2450  *   0 on success otherwise -errno and errno is set.
2451  */
2452 static int
2453 flow_dv_jump_tbl_resource_register
2454                         (struct rte_eth_dev *dev __rte_unused,
2455                          struct mlx5_flow_tbl_resource *tbl,
2456                          struct mlx5_flow *dev_flow,
2457                          struct rte_flow_error *error)
2458 {
2459         struct mlx5_flow_tbl_data_entry *tbl_data =
2460                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2461         int cnt;
2462
2463         MLX5_ASSERT(tbl);
2464         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2465         if (!cnt) {
2466                 tbl_data->jump.action =
2467                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2468                         (tbl->obj);
2469                 if (!tbl_data->jump.action)
2470                         return rte_flow_error_set(error, ENOMEM,
2471                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2472                                         NULL, "cannot create jump action");
2473                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2474                         (void *)&tbl_data->jump, cnt);
2475         } else {
2476                 MLX5_ASSERT(tbl_data->jump.action);
2477                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2478                         (void *)&tbl_data->jump, cnt);
2479         }
2480         rte_atomic32_inc(&tbl_data->jump.refcnt);
2481         dev_flow->dv.jump = &tbl_data->jump;
2482         return 0;
2483 }
2484
2485 /**
2486  * Find existing table port ID resource or create and register a new one.
2487  *
2488  * @param[in, out] dev
2489  *   Pointer to rte_eth_dev structure.
2490  * @param[in, out] resource
2491  *   Pointer to port ID action resource.
2492  * @parm[in, out] dev_flow
2493  *   Pointer to the dev_flow.
2494  * @param[out] error
2495  *   pointer to error structure.
2496  *
2497  * @return
2498  *   0 on success otherwise -errno and errno is set.
2499  */
2500 static int
2501 flow_dv_port_id_action_resource_register
2502                         (struct rte_eth_dev *dev,
2503                          struct mlx5_flow_dv_port_id_action_resource *resource,
2504                          struct mlx5_flow *dev_flow,
2505                          struct rte_flow_error *error)
2506 {
2507         struct mlx5_priv *priv = dev->data->dev_private;
2508         struct mlx5_ibv_shared *sh = priv->sh;
2509         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2510
2511         /* Lookup a matching resource from cache. */
2512         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2513                 if (resource->port_id == cache_resource->port_id) {
2514                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2515                                 "refcnt %d++",
2516                                 (void *)cache_resource,
2517                                 rte_atomic32_read(&cache_resource->refcnt));
2518                         rte_atomic32_inc(&cache_resource->refcnt);
2519                         dev_flow->dv.port_id_action = cache_resource;
2520                         return 0;
2521                 }
2522         }
2523         /* Register new port id action resource. */
2524         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2525         if (!cache_resource)
2526                 return rte_flow_error_set(error, ENOMEM,
2527                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2528                                           "cannot allocate resource memory");
2529         *cache_resource = *resource;
2530         /*
2531          * Depending on rdma_core version the glue routine calls
2532          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2533          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2534          */
2535         cache_resource->action =
2536                 mlx5_glue->dr_create_flow_action_dest_port
2537                         (priv->sh->fdb_domain, resource->port_id);
2538         if (!cache_resource->action) {
2539                 rte_free(cache_resource);
2540                 return rte_flow_error_set(error, ENOMEM,
2541                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2542                                           NULL, "cannot create action");
2543         }
2544         rte_atomic32_init(&cache_resource->refcnt);
2545         rte_atomic32_inc(&cache_resource->refcnt);
2546         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2547         dev_flow->dv.port_id_action = cache_resource;
2548         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2549                 (void *)cache_resource,
2550                 rte_atomic32_read(&cache_resource->refcnt));
2551         return 0;
2552 }
2553
2554 /**
2555  * Find existing push vlan resource or create and register a new one.
2556  *
2557  * @param [in, out] dev
2558  *   Pointer to rte_eth_dev structure.
2559  * @param[in, out] resource
2560  *   Pointer to port ID action resource.
2561  * @parm[in, out] dev_flow
2562  *   Pointer to the dev_flow.
2563  * @param[out] error
2564  *   pointer to error structure.
2565  *
2566  * @return
2567  *   0 on success otherwise -errno and errno is set.
2568  */
2569 static int
2570 flow_dv_push_vlan_action_resource_register
2571                        (struct rte_eth_dev *dev,
2572                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2573                         struct mlx5_flow *dev_flow,
2574                         struct rte_flow_error *error)
2575 {
2576         struct mlx5_priv *priv = dev->data->dev_private;
2577         struct mlx5_ibv_shared *sh = priv->sh;
2578         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2579         struct mlx5dv_dr_domain *domain;
2580
2581         /* Lookup a matching resource from cache. */
2582         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2583                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2584                     resource->ft_type == cache_resource->ft_type) {
2585                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2586                                 "refcnt %d++",
2587                                 (void *)cache_resource,
2588                                 rte_atomic32_read(&cache_resource->refcnt));
2589                         rte_atomic32_inc(&cache_resource->refcnt);
2590                         dev_flow->dv.push_vlan_res = cache_resource;
2591                         return 0;
2592                 }
2593         }
2594         /* Register new push_vlan action resource. */
2595         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2596         if (!cache_resource)
2597                 return rte_flow_error_set(error, ENOMEM,
2598                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2599                                           "cannot allocate resource memory");
2600         *cache_resource = *resource;
2601         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2602                 domain = sh->fdb_domain;
2603         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2604                 domain = sh->rx_domain;
2605         else
2606                 domain = sh->tx_domain;
2607         cache_resource->action =
2608                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2609                                                            resource->vlan_tag);
2610         if (!cache_resource->action) {
2611                 rte_free(cache_resource);
2612                 return rte_flow_error_set(error, ENOMEM,
2613                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2614                                           NULL, "cannot create action");
2615         }
2616         rte_atomic32_init(&cache_resource->refcnt);
2617         rte_atomic32_inc(&cache_resource->refcnt);
2618         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2619         dev_flow->dv.push_vlan_res = cache_resource;
2620         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2621                 (void *)cache_resource,
2622                 rte_atomic32_read(&cache_resource->refcnt));
2623         return 0;
2624 }
2625 /**
2626  * Get the size of specific rte_flow_item_type
2627  *
2628  * @param[in] item_type
2629  *   Tested rte_flow_item_type.
2630  *
2631  * @return
2632  *   sizeof struct item_type, 0 if void or irrelevant.
2633  */
2634 static size_t
2635 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2636 {
2637         size_t retval;
2638
2639         switch (item_type) {
2640         case RTE_FLOW_ITEM_TYPE_ETH:
2641                 retval = sizeof(struct rte_flow_item_eth);
2642                 break;
2643         case RTE_FLOW_ITEM_TYPE_VLAN:
2644                 retval = sizeof(struct rte_flow_item_vlan);
2645                 break;
2646         case RTE_FLOW_ITEM_TYPE_IPV4:
2647                 retval = sizeof(struct rte_flow_item_ipv4);
2648                 break;
2649         case RTE_FLOW_ITEM_TYPE_IPV6:
2650                 retval = sizeof(struct rte_flow_item_ipv6);
2651                 break;
2652         case RTE_FLOW_ITEM_TYPE_UDP:
2653                 retval = sizeof(struct rte_flow_item_udp);
2654                 break;
2655         case RTE_FLOW_ITEM_TYPE_TCP:
2656                 retval = sizeof(struct rte_flow_item_tcp);
2657                 break;
2658         case RTE_FLOW_ITEM_TYPE_VXLAN:
2659                 retval = sizeof(struct rte_flow_item_vxlan);
2660                 break;
2661         case RTE_FLOW_ITEM_TYPE_GRE:
2662                 retval = sizeof(struct rte_flow_item_gre);
2663                 break;
2664         case RTE_FLOW_ITEM_TYPE_NVGRE:
2665                 retval = sizeof(struct rte_flow_item_nvgre);
2666                 break;
2667         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2668                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2669                 break;
2670         case RTE_FLOW_ITEM_TYPE_MPLS:
2671                 retval = sizeof(struct rte_flow_item_mpls);
2672                 break;
2673         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2674         default:
2675                 retval = 0;
2676                 break;
2677         }
2678         return retval;
2679 }
2680
2681 #define MLX5_ENCAP_IPV4_VERSION         0x40
2682 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2683 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2684 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2685 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2686 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2687 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2688
2689 /**
2690  * Convert the encap action data from list of rte_flow_item to raw buffer
2691  *
2692  * @param[in] items
2693  *   Pointer to rte_flow_item objects list.
2694  * @param[out] buf
2695  *   Pointer to the output buffer.
2696  * @param[out] size
2697  *   Pointer to the output buffer size.
2698  * @param[out] error
2699  *   Pointer to the error structure.
2700  *
2701  * @return
2702  *   0 on success, a negative errno value otherwise and rte_errno is set.
2703  */
2704 static int
2705 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2706                            size_t *size, struct rte_flow_error *error)
2707 {
2708         struct rte_ether_hdr *eth = NULL;
2709         struct rte_vlan_hdr *vlan = NULL;
2710         struct rte_ipv4_hdr *ipv4 = NULL;
2711         struct rte_ipv6_hdr *ipv6 = NULL;
2712         struct rte_udp_hdr *udp = NULL;
2713         struct rte_vxlan_hdr *vxlan = NULL;
2714         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2715         struct rte_gre_hdr *gre = NULL;
2716         size_t len;
2717         size_t temp_size = 0;
2718
2719         if (!items)
2720                 return rte_flow_error_set(error, EINVAL,
2721                                           RTE_FLOW_ERROR_TYPE_ACTION,
2722                                           NULL, "invalid empty data");
2723         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2724                 len = flow_dv_get_item_len(items->type);
2725                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2726                         return rte_flow_error_set(error, EINVAL,
2727                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2728                                                   (void *)items->type,
2729                                                   "items total size is too big"
2730                                                   " for encap action");
2731                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2732                 switch (items->type) {
2733                 case RTE_FLOW_ITEM_TYPE_ETH:
2734                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2735                         break;
2736                 case RTE_FLOW_ITEM_TYPE_VLAN:
2737                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2738                         if (!eth)
2739                                 return rte_flow_error_set(error, EINVAL,
2740                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2741                                                 (void *)items->type,
2742                                                 "eth header not found");
2743                         if (!eth->ether_type)
2744                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2745                         break;
2746                 case RTE_FLOW_ITEM_TYPE_IPV4:
2747                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2748                         if (!vlan && !eth)
2749                                 return rte_flow_error_set(error, EINVAL,
2750                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2751                                                 (void *)items->type,
2752                                                 "neither eth nor vlan"
2753                                                 " header found");
2754                         if (vlan && !vlan->eth_proto)
2755                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2756                         else if (eth && !eth->ether_type)
2757                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2758                         if (!ipv4->version_ihl)
2759                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2760                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2761                         if (!ipv4->time_to_live)
2762                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2763                         break;
2764                 case RTE_FLOW_ITEM_TYPE_IPV6:
2765                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2766                         if (!vlan && !eth)
2767                                 return rte_flow_error_set(error, EINVAL,
2768                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2769                                                 (void *)items->type,
2770                                                 "neither eth nor vlan"
2771                                                 " header found");
2772                         if (vlan && !vlan->eth_proto)
2773                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2774                         else if (eth && !eth->ether_type)
2775                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2776                         if (!ipv6->vtc_flow)
2777                                 ipv6->vtc_flow =
2778                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2779                         if (!ipv6->hop_limits)
2780                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2781                         break;
2782                 case RTE_FLOW_ITEM_TYPE_UDP:
2783                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2784                         if (!ipv4 && !ipv6)
2785                                 return rte_flow_error_set(error, EINVAL,
2786                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2787                                                 (void *)items->type,
2788                                                 "ip header not found");
2789                         if (ipv4 && !ipv4->next_proto_id)
2790                                 ipv4->next_proto_id = IPPROTO_UDP;
2791                         else if (ipv6 && !ipv6->proto)
2792                                 ipv6->proto = IPPROTO_UDP;
2793                         break;
2794                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2795                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2796                         if (!udp)
2797                                 return rte_flow_error_set(error, EINVAL,
2798                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2799                                                 (void *)items->type,
2800                                                 "udp header not found");
2801                         if (!udp->dst_port)
2802                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2803                         if (!vxlan->vx_flags)
2804                                 vxlan->vx_flags =
2805                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2806                         break;
2807                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2808                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2809                         if (!udp)
2810                                 return rte_flow_error_set(error, EINVAL,
2811                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2812                                                 (void *)items->type,
2813                                                 "udp header not found");
2814                         if (!vxlan_gpe->proto)
2815                                 return rte_flow_error_set(error, EINVAL,
2816                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2817                                                 (void *)items->type,
2818                                                 "next protocol not found");
2819                         if (!udp->dst_port)
2820                                 udp->dst_port =
2821                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2822                         if (!vxlan_gpe->vx_flags)
2823                                 vxlan_gpe->vx_flags =
2824                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2825                         break;
2826                 case RTE_FLOW_ITEM_TYPE_GRE:
2827                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2828                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2829                         if (!gre->proto)
2830                                 return rte_flow_error_set(error, EINVAL,
2831                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2832                                                 (void *)items->type,
2833                                                 "next protocol not found");
2834                         if (!ipv4 && !ipv6)
2835                                 return rte_flow_error_set(error, EINVAL,
2836                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2837                                                 (void *)items->type,
2838                                                 "ip header not found");
2839                         if (ipv4 && !ipv4->next_proto_id)
2840                                 ipv4->next_proto_id = IPPROTO_GRE;
2841                         else if (ipv6 && !ipv6->proto)
2842                                 ipv6->proto = IPPROTO_GRE;
2843                         break;
2844                 case RTE_FLOW_ITEM_TYPE_VOID:
2845                         break;
2846                 default:
2847                         return rte_flow_error_set(error, EINVAL,
2848                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2849                                                   (void *)items->type,
2850                                                   "unsupported item type");
2851                         break;
2852                 }
2853                 temp_size += len;
2854         }
2855         *size = temp_size;
2856         return 0;
2857 }
2858
2859 static int
2860 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2861 {
2862         struct rte_ether_hdr *eth = NULL;
2863         struct rte_vlan_hdr *vlan = NULL;
2864         struct rte_ipv6_hdr *ipv6 = NULL;
2865         struct rte_udp_hdr *udp = NULL;
2866         char *next_hdr;
2867         uint16_t proto;
2868
2869         eth = (struct rte_ether_hdr *)data;
2870         next_hdr = (char *)(eth + 1);
2871         proto = RTE_BE16(eth->ether_type);
2872
2873         /* VLAN skipping */
2874         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2875                 vlan = (struct rte_vlan_hdr *)next_hdr;
2876                 proto = RTE_BE16(vlan->eth_proto);
2877                 next_hdr += sizeof(struct rte_vlan_hdr);
2878         }
2879
2880         /* HW calculates IPv4 csum. no need to proceed */
2881         if (proto == RTE_ETHER_TYPE_IPV4)
2882                 return 0;
2883
2884         /* non IPv4/IPv6 header. not supported */
2885         if (proto != RTE_ETHER_TYPE_IPV6) {
2886                 return rte_flow_error_set(error, ENOTSUP,
2887                                           RTE_FLOW_ERROR_TYPE_ACTION,
2888                                           NULL, "Cannot offload non IPv4/IPv6");
2889         }
2890
2891         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2892
2893         /* ignore non UDP */
2894         if (ipv6->proto != IPPROTO_UDP)
2895                 return 0;
2896
2897         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2898         udp->dgram_cksum = 0;
2899
2900         return 0;
2901 }
2902
2903 /**
2904  * Convert L2 encap action to DV specification.
2905  *
2906  * @param[in] dev
2907  *   Pointer to rte_eth_dev structure.
2908  * @param[in] action
2909  *   Pointer to action structure.
2910  * @param[in, out] dev_flow
2911  *   Pointer to the mlx5_flow.
2912  * @param[in] transfer
2913  *   Mark if the flow is E-Switch flow.
2914  * @param[out] error
2915  *   Pointer to the error structure.
2916  *
2917  * @return
2918  *   0 on success, a negative errno value otherwise and rte_errno is set.
2919  */
2920 static int
2921 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2922                                const struct rte_flow_action *action,
2923                                struct mlx5_flow *dev_flow,
2924                                uint8_t transfer,
2925                                struct rte_flow_error *error)
2926 {
2927         const struct rte_flow_item *encap_data;
2928         const struct rte_flow_action_raw_encap *raw_encap_data;
2929         struct mlx5_flow_dv_encap_decap_resource res = {
2930                 .reformat_type =
2931                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2932                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2933                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2934         };
2935
2936         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2937                 raw_encap_data =
2938                         (const struct rte_flow_action_raw_encap *)action->conf;
2939                 res.size = raw_encap_data->size;
2940                 memcpy(res.buf, raw_encap_data->data, res.size);
2941         } else {
2942                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2943                         encap_data =
2944                                 ((const struct rte_flow_action_vxlan_encap *)
2945                                                 action->conf)->definition;
2946                 else
2947                         encap_data =
2948                                 ((const struct rte_flow_action_nvgre_encap *)
2949                                                 action->conf)->definition;
2950                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2951                                                &res.size, error))
2952                         return -rte_errno;
2953         }
2954         if (flow_dv_zero_encap_udp_csum(res.buf, error))
2955                 return -rte_errno;
2956         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2957                 return rte_flow_error_set(error, EINVAL,
2958                                           RTE_FLOW_ERROR_TYPE_ACTION,
2959                                           NULL, "can't create L2 encap action");
2960         return 0;
2961 }
2962
2963 /**
2964  * Convert L2 decap action to DV specification.
2965  *
2966  * @param[in] dev
2967  *   Pointer to rte_eth_dev structure.
2968  * @param[in, out] dev_flow
2969  *   Pointer to the mlx5_flow.
2970  * @param[in] transfer
2971  *   Mark if the flow is E-Switch flow.
2972  * @param[out] error
2973  *   Pointer to the error structure.
2974  *
2975  * @return
2976  *   0 on success, a negative errno value otherwise and rte_errno is set.
2977  */
2978 static int
2979 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2980                                struct mlx5_flow *dev_flow,
2981                                uint8_t transfer,
2982                                struct rte_flow_error *error)
2983 {
2984         struct mlx5_flow_dv_encap_decap_resource res = {
2985                 .size = 0,
2986                 .reformat_type =
2987                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2988                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2989                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2990         };
2991
2992         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2993                 return rte_flow_error_set(error, EINVAL,
2994                                           RTE_FLOW_ERROR_TYPE_ACTION,
2995                                           NULL, "can't create L2 decap action");
2996         return 0;
2997 }
2998
2999 /**
3000  * Convert raw decap/encap (L3 tunnel) action to DV specification.
3001  *
3002  * @param[in] dev
3003  *   Pointer to rte_eth_dev structure.
3004  * @param[in] action
3005  *   Pointer to action structure.
3006  * @param[in, out] dev_flow
3007  *   Pointer to the mlx5_flow.
3008  * @param[in] attr
3009  *   Pointer to the flow attributes.
3010  * @param[out] error
3011  *   Pointer to the error structure.
3012  *
3013  * @return
3014  *   0 on success, a negative errno value otherwise and rte_errno is set.
3015  */
3016 static int
3017 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
3018                                 const struct rte_flow_action *action,
3019                                 struct mlx5_flow *dev_flow,
3020                                 const struct rte_flow_attr *attr,
3021                                 struct rte_flow_error *error)
3022 {
3023         const struct rte_flow_action_raw_encap *encap_data;
3024         struct mlx5_flow_dv_encap_decap_resource res;
3025
3026         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3027         res.size = encap_data->size;
3028         memcpy(res.buf, encap_data->data, res.size);
3029         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3030                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3031                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3032         if (attr->transfer)
3033                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3034         else
3035                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3036                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3037         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3038                 return rte_flow_error_set(error, EINVAL,
3039                                           RTE_FLOW_ERROR_TYPE_ACTION,
3040                                           NULL, "can't create encap action");
3041         return 0;
3042 }
3043
3044 /**
3045  * Create action push VLAN.
3046  *
3047  * @param[in] dev
3048  *   Pointer to rte_eth_dev structure.
3049  * @param[in] attr
3050  *   Pointer to the flow attributes.
3051  * @param[in] vlan
3052  *   Pointer to the vlan to push to the Ethernet header.
3053  * @param[in, out] dev_flow
3054  *   Pointer to the mlx5_flow.
3055  * @param[out] error
3056  *   Pointer to the error structure.
3057  *
3058  * @return
3059  *   0 on success, a negative errno value otherwise and rte_errno is set.
3060  */
3061 static int
3062 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3063                                 const struct rte_flow_attr *attr,
3064                                 const struct rte_vlan_hdr *vlan,
3065                                 struct mlx5_flow *dev_flow,
3066                                 struct rte_flow_error *error)
3067 {
3068         struct mlx5_flow_dv_push_vlan_action_resource res;
3069
3070         res.vlan_tag =
3071                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3072                                  vlan->vlan_tci);
3073         if (attr->transfer)
3074                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3075         else
3076                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3077                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3078         return flow_dv_push_vlan_action_resource_register
3079                                             (dev, &res, dev_flow, error);
3080 }
3081
3082 /**
3083  * Validate the modify-header actions.
3084  *
3085  * @param[in] action_flags
3086  *   Holds the actions detected until now.
3087  * @param[in] action
3088  *   Pointer to the modify action.
3089  * @param[out] error
3090  *   Pointer to error structure.
3091  *
3092  * @return
3093  *   0 on success, a negative errno value otherwise and rte_errno is set.
3094  */
3095 static int
3096 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3097                                    const struct rte_flow_action *action,
3098                                    struct rte_flow_error *error)
3099 {
3100         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3101                 return rte_flow_error_set(error, EINVAL,
3102                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3103                                           NULL, "action configuration not set");
3104         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3105                 return rte_flow_error_set(error, EINVAL,
3106                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3107                                           "can't have encap action before"
3108                                           " modify action");
3109         return 0;
3110 }
3111
3112 /**
3113  * Validate the modify-header MAC address actions.
3114  *
3115  * @param[in] action_flags
3116  *   Holds the actions detected until now.
3117  * @param[in] action
3118  *   Pointer to the modify action.
3119  * @param[in] item_flags
3120  *   Holds the items detected.
3121  * @param[out] error
3122  *   Pointer to error structure.
3123  *
3124  * @return
3125  *   0 on success, a negative errno value otherwise and rte_errno is set.
3126  */
3127 static int
3128 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3129                                    const struct rte_flow_action *action,
3130                                    const uint64_t item_flags,
3131                                    struct rte_flow_error *error)
3132 {
3133         int ret = 0;
3134
3135         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3136         if (!ret) {
3137                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3138                         return rte_flow_error_set(error, EINVAL,
3139                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3140                                                   NULL,
3141                                                   "no L2 item in pattern");
3142         }
3143         return ret;
3144 }
3145
3146 /**
3147  * Validate the modify-header IPv4 address actions.
3148  *
3149  * @param[in] action_flags
3150  *   Holds the actions detected until now.
3151  * @param[in] action
3152  *   Pointer to the modify action.
3153  * @param[in] item_flags
3154  *   Holds the items detected.
3155  * @param[out] error
3156  *   Pointer to error structure.
3157  *
3158  * @return
3159  *   0 on success, a negative errno value otherwise and rte_errno is set.
3160  */
3161 static int
3162 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3163                                     const struct rte_flow_action *action,
3164                                     const uint64_t item_flags,
3165                                     struct rte_flow_error *error)
3166 {
3167         int ret = 0;
3168         uint64_t layer;
3169
3170         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3171         if (!ret) {
3172                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3173                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3174                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3175                 if (!(item_flags & layer))
3176                         return rte_flow_error_set(error, EINVAL,
3177                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3178                                                   NULL,
3179                                                   "no ipv4 item in pattern");
3180         }
3181         return ret;
3182 }
3183
3184 /**
3185  * Validate the modify-header IPv6 address actions.
3186  *
3187  * @param[in] action_flags
3188  *   Holds the actions detected until now.
3189  * @param[in] action
3190  *   Pointer to the modify action.
3191  * @param[in] item_flags
3192  *   Holds the items detected.
3193  * @param[out] error
3194  *   Pointer to error structure.
3195  *
3196  * @return
3197  *   0 on success, a negative errno value otherwise and rte_errno is set.
3198  */
3199 static int
3200 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3201                                     const struct rte_flow_action *action,
3202                                     const uint64_t item_flags,
3203                                     struct rte_flow_error *error)
3204 {
3205         int ret = 0;
3206         uint64_t layer;
3207
3208         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3209         if (!ret) {
3210                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3211                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3212                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3213                 if (!(item_flags & layer))
3214                         return rte_flow_error_set(error, EINVAL,
3215                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3216                                                   NULL,
3217                                                   "no ipv6 item in pattern");
3218         }
3219         return ret;
3220 }
3221
3222 /**
3223  * Validate the modify-header TP actions.
3224  *
3225  * @param[in] action_flags
3226  *   Holds the actions detected until now.
3227  * @param[in] action
3228  *   Pointer to the modify action.
3229  * @param[in] item_flags
3230  *   Holds the items detected.
3231  * @param[out] error
3232  *   Pointer to error structure.
3233  *
3234  * @return
3235  *   0 on success, a negative errno value otherwise and rte_errno is set.
3236  */
3237 static int
3238 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3239                                   const struct rte_flow_action *action,
3240                                   const uint64_t item_flags,
3241                                   struct rte_flow_error *error)
3242 {
3243         int ret = 0;
3244         uint64_t layer;
3245
3246         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3247         if (!ret) {
3248                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3249                                  MLX5_FLOW_LAYER_INNER_L4 :
3250                                  MLX5_FLOW_LAYER_OUTER_L4;
3251                 if (!(item_flags & layer))
3252                         return rte_flow_error_set(error, EINVAL,
3253                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3254                                                   NULL, "no transport layer "
3255                                                   "in pattern");
3256         }
3257         return ret;
3258 }
3259
3260 /**
3261  * Validate the modify-header actions of increment/decrement
3262  * TCP Sequence-number.
3263  *
3264  * @param[in] action_flags
3265  *   Holds the actions detected until now.
3266  * @param[in] action
3267  *   Pointer to the modify action.
3268  * @param[in] item_flags
3269  *   Holds the items detected.
3270  * @param[out] error
3271  *   Pointer to error structure.
3272  *
3273  * @return
3274  *   0 on success, a negative errno value otherwise and rte_errno is set.
3275  */
3276 static int
3277 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3278                                        const struct rte_flow_action *action,
3279                                        const uint64_t item_flags,
3280                                        struct rte_flow_error *error)
3281 {
3282         int ret = 0;
3283         uint64_t layer;
3284
3285         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3286         if (!ret) {
3287                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3288                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3289                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3290                 if (!(item_flags & layer))
3291                         return rte_flow_error_set(error, EINVAL,
3292                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3293                                                   NULL, "no TCP item in"
3294                                                   " pattern");
3295                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3296                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3297                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3298                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3299                         return rte_flow_error_set(error, EINVAL,
3300                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3301                                                   NULL,
3302                                                   "cannot decrease and increase"
3303                                                   " TCP sequence number"
3304                                                   " at the same time");
3305         }
3306         return ret;
3307 }
3308
3309 /**
3310  * Validate the modify-header actions of increment/decrement
3311  * TCP Acknowledgment number.
3312  *
3313  * @param[in] action_flags
3314  *   Holds the actions detected until now.
3315  * @param[in] action
3316  *   Pointer to the modify action.
3317  * @param[in] item_flags
3318  *   Holds the items detected.
3319  * @param[out] error
3320  *   Pointer to error structure.
3321  *
3322  * @return
3323  *   0 on success, a negative errno value otherwise and rte_errno is set.
3324  */
3325 static int
3326 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3327                                        const struct rte_flow_action *action,
3328                                        const uint64_t item_flags,
3329                                        struct rte_flow_error *error)
3330 {
3331         int ret = 0;
3332         uint64_t layer;
3333
3334         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3335         if (!ret) {
3336                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3337                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3338                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3339                 if (!(item_flags & layer))
3340                         return rte_flow_error_set(error, EINVAL,
3341                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3342                                                   NULL, "no TCP item in"
3343                                                   " pattern");
3344                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3345                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3346                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3347                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3348                         return rte_flow_error_set(error, EINVAL,
3349                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3350                                                   NULL,
3351                                                   "cannot decrease and increase"
3352                                                   " TCP acknowledgment number"
3353                                                   " at the same time");
3354         }
3355         return ret;
3356 }
3357
3358 /**
3359  * Validate the modify-header TTL actions.
3360  *
3361  * @param[in] action_flags
3362  *   Holds the actions detected until now.
3363  * @param[in] action
3364  *   Pointer to the modify action.
3365  * @param[in] item_flags
3366  *   Holds the items detected.
3367  * @param[out] error
3368  *   Pointer to error structure.
3369  *
3370  * @return
3371  *   0 on success, a negative errno value otherwise and rte_errno is set.
3372  */
3373 static int
3374 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3375                                    const struct rte_flow_action *action,
3376                                    const uint64_t item_flags,
3377                                    struct rte_flow_error *error)
3378 {
3379         int ret = 0;
3380         uint64_t layer;
3381
3382         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3383         if (!ret) {
3384                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3385                                  MLX5_FLOW_LAYER_INNER_L3 :
3386                                  MLX5_FLOW_LAYER_OUTER_L3;
3387                 if (!(item_flags & layer))
3388                         return rte_flow_error_set(error, EINVAL,
3389                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3390                                                   NULL,
3391                                                   "no IP protocol in pattern");
3392         }
3393         return ret;
3394 }
3395
3396 /**
3397  * Validate jump action.
3398  *
3399  * @param[in] action
3400  *   Pointer to the jump action.
3401  * @param[in] action_flags
3402  *   Holds the actions detected until now.
3403  * @param[in] attributes
3404  *   Pointer to flow attributes
3405  * @param[in] external
3406  *   Action belongs to flow rule created by request external to PMD.
3407  * @param[out] error
3408  *   Pointer to error structure.
3409  *
3410  * @return
3411  *   0 on success, a negative errno value otherwise and rte_errno is set.
3412  */
3413 static int
3414 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3415                              uint64_t action_flags,
3416                              const struct rte_flow_attr *attributes,
3417                              bool external, struct rte_flow_error *error)
3418 {
3419         uint32_t target_group, table;
3420         int ret = 0;
3421
3422         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3423                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3424                 return rte_flow_error_set(error, EINVAL,
3425                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3426                                           "can't have 2 fate actions in"
3427                                           " same flow");
3428         if (action_flags & MLX5_FLOW_ACTION_METER)
3429                 return rte_flow_error_set(error, ENOTSUP,
3430                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3431                                           "jump with meter not support");
3432         if (!action->conf)
3433                 return rte_flow_error_set(error, EINVAL,
3434                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3435                                           NULL, "action configuration not set");
3436         target_group =
3437                 ((const struct rte_flow_action_jump *)action->conf)->group;
3438         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3439                                        true, &table, error);
3440         if (ret)
3441                 return ret;
3442         if (attributes->group == target_group)
3443                 return rte_flow_error_set(error, EINVAL,
3444                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3445                                           "target group must be other than"
3446                                           " the current flow group");
3447         return 0;
3448 }
3449
3450 /*
3451  * Validate the port_id action.
3452  *
3453  * @param[in] dev
3454  *   Pointer to rte_eth_dev structure.
3455  * @param[in] action_flags
3456  *   Bit-fields that holds the actions detected until now.
3457  * @param[in] action
3458  *   Port_id RTE action structure.
3459  * @param[in] attr
3460  *   Attributes of flow that includes this action.
3461  * @param[out] error
3462  *   Pointer to error structure.
3463  *
3464  * @return
3465  *   0 on success, a negative errno value otherwise and rte_errno is set.
3466  */
3467 static int
3468 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3469                                 uint64_t action_flags,
3470                                 const struct rte_flow_action *action,
3471                                 const struct rte_flow_attr *attr,
3472                                 struct rte_flow_error *error)
3473 {
3474         const struct rte_flow_action_port_id *port_id;
3475         struct mlx5_priv *act_priv;
3476         struct mlx5_priv *dev_priv;
3477         uint16_t port;
3478
3479         if (!attr->transfer)
3480                 return rte_flow_error_set(error, ENOTSUP,
3481                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3482                                           NULL,
3483                                           "port id action is valid in transfer"
3484                                           " mode only");
3485         if (!action || !action->conf)
3486                 return rte_flow_error_set(error, ENOTSUP,
3487                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3488                                           NULL,
3489                                           "port id action parameters must be"
3490                                           " specified");
3491         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3492                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3493                 return rte_flow_error_set(error, EINVAL,
3494                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3495                                           "can have only one fate actions in"
3496                                           " a flow");
3497         dev_priv = mlx5_dev_to_eswitch_info(dev);
3498         if (!dev_priv)
3499                 return rte_flow_error_set(error, rte_errno,
3500                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3501                                           NULL,
3502                                           "failed to obtain E-Switch info");
3503         port_id = action->conf;
3504         port = port_id->original ? dev->data->port_id : port_id->id;
3505         act_priv = mlx5_port_to_eswitch_info(port, false);
3506         if (!act_priv)
3507                 return rte_flow_error_set
3508                                 (error, rte_errno,
3509                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3510                                  "failed to obtain E-Switch port id for port");
3511         if (act_priv->domain_id != dev_priv->domain_id)
3512                 return rte_flow_error_set
3513                                 (error, EINVAL,
3514                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3515                                  "port does not belong to"
3516                                  " E-Switch being configured");
3517         return 0;
3518 }
3519
3520 /**
3521  * Get the maximum number of modify header actions.
3522  *
3523  * @param dev
3524  *   Pointer to rte_eth_dev structure.
3525  * @param flags
3526  *   Flags bits to check if root level.
3527  *
3528  * @return
3529  *   Max number of modify header actions device can support.
3530  */
3531 static unsigned int
3532 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3533 {
3534         /*
3535          * There's no way to directly query the max cap. Although it has to be
3536          * acquried by iterative trial, it is a safe assumption that more
3537          * actions are supported by FW if extensive metadata register is
3538          * supported. (Only in the root table)
3539          */
3540         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3541                 return MLX5_MAX_MODIFY_NUM;
3542         else
3543                 return mlx5_flow_ext_mreg_supported(dev) ?
3544                                         MLX5_ROOT_TBL_MODIFY_NUM :
3545                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3546 }
3547
3548 /**
3549  * Validate the meter action.
3550  *
3551  * @param[in] dev
3552  *   Pointer to rte_eth_dev structure.
3553  * @param[in] action_flags
3554  *   Bit-fields that holds the actions detected until now.
3555  * @param[in] action
3556  *   Pointer to the meter action.
3557  * @param[in] attr
3558  *   Attributes of flow that includes this action.
3559  * @param[out] error
3560  *   Pointer to error structure.
3561  *
3562  * @return
3563  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3564  */
3565 static int
3566 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3567                                 uint64_t action_flags,
3568                                 const struct rte_flow_action *action,
3569                                 const struct rte_flow_attr *attr,
3570                                 struct rte_flow_error *error)
3571 {
3572         struct mlx5_priv *priv = dev->data->dev_private;
3573         const struct rte_flow_action_meter *am = action->conf;
3574         struct mlx5_flow_meter *fm;
3575
3576         if (!am)
3577                 return rte_flow_error_set(error, EINVAL,
3578                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3579                                           "meter action conf is NULL");
3580
3581         if (action_flags & MLX5_FLOW_ACTION_METER)
3582                 return rte_flow_error_set(error, ENOTSUP,
3583                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3584                                           "meter chaining not support");
3585         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3586                 return rte_flow_error_set(error, ENOTSUP,
3587                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3588                                           "meter with jump not support");
3589         if (!priv->mtr_en)
3590                 return rte_flow_error_set(error, ENOTSUP,
3591                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3592                                           NULL,
3593                                           "meter action not supported");
3594         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3595         if (!fm)
3596                 return rte_flow_error_set(error, EINVAL,
3597                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3598                                           "Meter not found");
3599         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3600               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3601               (!fm->attr.egress && !attr->egress && attr->ingress))))
3602                 return rte_flow_error_set(error, EINVAL,
3603                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3604                                           "Flow attributes are either invalid "
3605                                           "or have a conflict with current "
3606                                           "meter attributes");
3607         return 0;
3608 }
3609
3610 /**
3611  * Validate the modify-header IPv4 DSCP actions.
3612  *
3613  * @param[in] action_flags
3614  *   Holds the actions detected until now.
3615  * @param[in] action
3616  *   Pointer to the modify action.
3617  * @param[in] item_flags
3618  *   Holds the items detected.
3619  * @param[out] error
3620  *   Pointer to error structure.
3621  *
3622  * @return
3623  *   0 on success, a negative errno value otherwise and rte_errno is set.
3624  */
3625 static int
3626 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3627                                          const struct rte_flow_action *action,
3628                                          const uint64_t item_flags,
3629                                          struct rte_flow_error *error)
3630 {
3631         int ret = 0;
3632
3633         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3634         if (!ret) {
3635                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3636                         return rte_flow_error_set(error, EINVAL,
3637                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3638                                                   NULL,
3639                                                   "no ipv4 item in pattern");
3640         }
3641         return ret;
3642 }
3643
3644 /**
3645  * Validate the modify-header IPv6 DSCP actions.
3646  *
3647  * @param[in] action_flags
3648  *   Holds the actions detected until now.
3649  * @param[in] action
3650  *   Pointer to the modify action.
3651  * @param[in] item_flags
3652  *   Holds the items detected.
3653  * @param[out] error
3654  *   Pointer to error structure.
3655  *
3656  * @return
3657  *   0 on success, a negative errno value otherwise and rte_errno is set.
3658  */
3659 static int
3660 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3661                                          const struct rte_flow_action *action,
3662                                          const uint64_t item_flags,
3663                                          struct rte_flow_error *error)
3664 {
3665         int ret = 0;
3666
3667         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3668         if (!ret) {
3669                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3670                         return rte_flow_error_set(error, EINVAL,
3671                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3672                                                   NULL,
3673                                                   "no ipv6 item in pattern");
3674         }
3675         return ret;
3676 }
3677
3678 /**
3679  * Find existing modify-header resource or create and register a new one.
3680  *
3681  * @param dev[in, out]
3682  *   Pointer to rte_eth_dev structure.
3683  * @param[in, out] resource
3684  *   Pointer to modify-header resource.
3685  * @parm[in, out] dev_flow
3686  *   Pointer to the dev_flow.
3687  * @param[out] error
3688  *   pointer to error structure.
3689  *
3690  * @return
3691  *   0 on success otherwise -errno and errno is set.
3692  */
3693 static int
3694 flow_dv_modify_hdr_resource_register
3695                         (struct rte_eth_dev *dev,
3696                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3697                          struct mlx5_flow *dev_flow,
3698                          struct rte_flow_error *error)
3699 {
3700         struct mlx5_priv *priv = dev->data->dev_private;
3701         struct mlx5_ibv_shared *sh = priv->sh;
3702         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3703         struct mlx5dv_dr_domain *ns;
3704         uint32_t actions_len;
3705
3706         resource->flags =
3707                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3708         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3709                                     resource->flags))
3710                 return rte_flow_error_set(error, EOVERFLOW,
3711                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3712                                           "too many modify header items");
3713         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3714                 ns = sh->fdb_domain;
3715         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3716                 ns = sh->tx_domain;
3717         else
3718                 ns = sh->rx_domain;
3719         /* Lookup a matching resource from cache. */
3720         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3721         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3722                 if (resource->ft_type == cache_resource->ft_type &&
3723                     resource->actions_num == cache_resource->actions_num &&
3724                     resource->flags == cache_resource->flags &&
3725                     !memcmp((const void *)resource->actions,
3726                             (const void *)cache_resource->actions,
3727                             actions_len)) {
3728                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3729                                 (void *)cache_resource,
3730                                 rte_atomic32_read(&cache_resource->refcnt));
3731                         rte_atomic32_inc(&cache_resource->refcnt);
3732                         dev_flow->dv.modify_hdr = cache_resource;
3733                         return 0;
3734                 }
3735         }
3736         /* Register new modify-header resource. */
3737         cache_resource = rte_calloc(__func__, 1,
3738                                     sizeof(*cache_resource) + actions_len, 0);
3739         if (!cache_resource)
3740                 return rte_flow_error_set(error, ENOMEM,
3741                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3742                                           "cannot allocate resource memory");
3743         *cache_resource = *resource;
3744         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3745         cache_resource->verbs_action =
3746                 mlx5_glue->dv_create_flow_action_modify_header
3747                                         (sh->ctx, cache_resource->ft_type, ns,
3748                                          cache_resource->flags, actions_len,
3749                                          (uint64_t *)cache_resource->actions);
3750         if (!cache_resource->verbs_action) {
3751                 rte_free(cache_resource);
3752                 return rte_flow_error_set(error, ENOMEM,
3753                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3754                                           NULL, "cannot create action");
3755         }
3756         rte_atomic32_init(&cache_resource->refcnt);
3757         rte_atomic32_inc(&cache_resource->refcnt);
3758         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3759         dev_flow->dv.modify_hdr = cache_resource;
3760         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3761                 (void *)cache_resource,
3762                 rte_atomic32_read(&cache_resource->refcnt));
3763         return 0;
3764 }
3765
3766 #define MLX5_CNT_CONTAINER_RESIZE 64
3767
3768 /**
3769  * Get or create a flow counter.
3770  *
3771  * @param[in] dev
3772  *   Pointer to the Ethernet device structure.
3773  * @param[in] shared
3774  *   Indicate if this counter is shared with other flows.
3775  * @param[in] id
3776  *   Counter identifier.
3777  *
3778  * @return
3779  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3780  */
3781 static struct mlx5_flow_counter *
3782 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3783                                uint32_t id)
3784 {
3785         struct mlx5_priv *priv = dev->data->dev_private;
3786         struct mlx5_flow_counter *cnt = NULL;
3787         struct mlx5_devx_obj *dcs = NULL;
3788
3789         if (!priv->config.devx) {
3790                 rte_errno = ENOTSUP;
3791                 return NULL;
3792         }
3793         if (shared) {
3794                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3795                         if (cnt->shared && cnt->id == id) {
3796                                 cnt->ref_cnt++;
3797                                 return cnt;
3798                         }
3799                 }
3800         }
3801         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3802         if (!dcs)
3803                 return NULL;
3804         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3805         if (!cnt) {
3806                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3807                 rte_errno = ENOMEM;
3808                 return NULL;
3809         }
3810         struct mlx5_flow_counter tmpl = {
3811                 .shared = shared,
3812                 .ref_cnt = 1,
3813                 .id = id,
3814                 .dcs = dcs,
3815         };
3816         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3817         if (!tmpl.action) {
3818                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3819                 rte_errno = errno;
3820                 rte_free(cnt);
3821                 return NULL;
3822         }
3823         *cnt = tmpl;
3824         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3825         return cnt;
3826 }
3827
3828 /**
3829  * Release a flow counter.
3830  *
3831  * @param[in] dev
3832  *   Pointer to the Ethernet device structure.
3833  * @param[in] counter
3834  *   Pointer to the counter handler.
3835  */
3836 static void
3837 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3838                                  struct mlx5_flow_counter *counter)
3839 {
3840         struct mlx5_priv *priv = dev->data->dev_private;
3841
3842         if (!counter)
3843                 return;
3844         if (--counter->ref_cnt == 0) {
3845                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3846                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3847                 rte_free(counter);
3848         }
3849 }
3850
3851 /**
3852  * Query a devx flow counter.
3853  *
3854  * @param[in] dev
3855  *   Pointer to the Ethernet device structure.
3856  * @param[in] cnt
3857  *   Pointer to the flow counter.
3858  * @param[out] pkts
3859  *   The statistics value of packets.
3860  * @param[out] bytes
3861  *   The statistics value of bytes.
3862  *
3863  * @return
3864  *   0 on success, otherwise a negative errno value and rte_errno is set.
3865  */
3866 static inline int
3867 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3868                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3869                      uint64_t *bytes)
3870 {
3871         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3872                                                 0, NULL, NULL, 0);
3873 }
3874
3875 /**
3876  * Get a pool by a counter.
3877  *
3878  * @param[in] cnt
3879  *   Pointer to the counter.
3880  *
3881  * @return
3882  *   The counter pool.
3883  */
3884 static struct mlx5_flow_counter_pool *
3885 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3886 {
3887         if (!cnt->batch) {
3888                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3889                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3890         }
3891         return cnt->pool;
3892 }
3893
3894 /**
3895  * Get a pool by devx counter ID.
3896  *
3897  * @param[in] cont
3898  *   Pointer to the counter container.
3899  * @param[in] id
3900  *   The counter devx ID.
3901  *
3902  * @return
3903  *   The counter pool pointer if exists, NULL otherwise,
3904  */
3905 static struct mlx5_flow_counter_pool *
3906 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3907 {
3908         struct mlx5_flow_counter_pool *pool;
3909
3910         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3911                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3912                                 MLX5_COUNTERS_PER_POOL;
3913
3914                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3915                         return pool;
3916         };
3917         return NULL;
3918 }
3919
3920 /**
3921  * Allocate a new memory for the counter values wrapped by all the needed
3922  * management.
3923  *
3924  * @param[in] dev
3925  *   Pointer to the Ethernet device structure.
3926  * @param[in] raws_n
3927  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3928  *
3929  * @return
3930  *   The new memory management pointer on success, otherwise NULL and rte_errno
3931  *   is set.
3932  */
3933 static struct mlx5_counter_stats_mem_mng *
3934 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3935 {
3936         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3937                                         (dev->data->dev_private))->sh;
3938         struct mlx5_devx_mkey_attr mkey_attr;
3939         struct mlx5_counter_stats_mem_mng *mem_mng;
3940         volatile struct flow_counter_stats *raw_data;
3941         int size = (sizeof(struct flow_counter_stats) *
3942                         MLX5_COUNTERS_PER_POOL +
3943                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3944                         sizeof(struct mlx5_counter_stats_mem_mng);
3945         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3946         int i;
3947
3948         if (!mem) {
3949                 rte_errno = ENOMEM;
3950                 return NULL;
3951         }
3952         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3953         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3954         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3955                                                  IBV_ACCESS_LOCAL_WRITE);
3956         if (!mem_mng->umem) {
3957                 rte_errno = errno;
3958                 rte_free(mem);
3959                 return NULL;
3960         }
3961         mkey_attr.addr = (uintptr_t)mem;
3962         mkey_attr.size = size;
3963         mkey_attr.umem_id = mem_mng->umem->umem_id;
3964         mkey_attr.pd = sh->pdn;
3965         mkey_attr.log_entity_size = 0;
3966         mkey_attr.pg_access = 0;
3967         mkey_attr.klm_array = NULL;
3968         mkey_attr.klm_num = 0;
3969         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3970         if (!mem_mng->dm) {
3971                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3972                 rte_errno = errno;
3973                 rte_free(mem);
3974                 return NULL;
3975         }
3976         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3977         raw_data = (volatile struct flow_counter_stats *)mem;
3978         for (i = 0; i < raws_n; ++i) {
3979                 mem_mng->raws[i].mem_mng = mem_mng;
3980                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3981         }
3982         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3983         return mem_mng;
3984 }
3985
3986 /**
3987  * Resize a counter container.
3988  *
3989  * @param[in] dev
3990  *   Pointer to the Ethernet device structure.
3991  * @param[in] batch
3992  *   Whether the pool is for counter that was allocated by batch command.
3993  *
3994  * @return
3995  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3996  */
3997 static struct mlx5_pools_container *
3998 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3999 {
4000         struct mlx5_priv *priv = dev->data->dev_private;
4001         struct mlx5_pools_container *cont =
4002                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
4003         struct mlx5_pools_container *new_cont =
4004                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
4005         struct mlx5_counter_stats_mem_mng *mem_mng;
4006         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
4007         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
4008         int i;
4009
4010         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
4011                 /* The last resize still hasn't detected by the host thread. */
4012                 rte_errno = EAGAIN;
4013                 return NULL;
4014         }
4015         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
4016         if (!new_cont->pools) {
4017                 rte_errno = ENOMEM;
4018                 return NULL;
4019         }
4020         if (cont->n)
4021                 memcpy(new_cont->pools, cont->pools, cont->n *
4022                        sizeof(struct mlx5_flow_counter_pool *));
4023         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
4024                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
4025         if (!mem_mng) {
4026                 rte_free(new_cont->pools);
4027                 return NULL;
4028         }
4029         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
4030                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
4031                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
4032                                  i, next);
4033         new_cont->n = resize;
4034         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
4035         TAILQ_INIT(&new_cont->pool_list);
4036         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
4037         new_cont->init_mem_mng = mem_mng;
4038         rte_cio_wmb();
4039          /* Flip the master container. */
4040         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
4041         return new_cont;
4042 }
4043
4044 /**
4045  * Query a devx flow counter.
4046  *
4047  * @param[in] dev
4048  *   Pointer to the Ethernet device structure.
4049  * @param[in] cnt
4050  *   Pointer to the flow counter.
4051  * @param[out] pkts
4052  *   The statistics value of packets.
4053  * @param[out] bytes
4054  *   The statistics value of bytes.
4055  *
4056  * @return
4057  *   0 on success, otherwise a negative errno value and rte_errno is set.
4058  */
4059 static inline int
4060 _flow_dv_query_count(struct rte_eth_dev *dev,
4061                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
4062                      uint64_t *bytes)
4063 {
4064         struct mlx5_priv *priv = dev->data->dev_private;
4065         struct mlx5_flow_counter_pool *pool =
4066                         flow_dv_counter_pool_get(cnt);
4067         int offset = cnt - &pool->counters_raw[0];
4068
4069         if (priv->counter_fallback)
4070                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4071
4072         rte_spinlock_lock(&pool->sl);
4073         /*
4074          * The single counters allocation may allocate smaller ID than the
4075          * current allocated in parallel to the host reading.
4076          * In this case the new counter values must be reported as 0.
4077          */
4078         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4079                 *pkts = 0;
4080                 *bytes = 0;
4081         } else {
4082                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4083                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4084         }
4085         rte_spinlock_unlock(&pool->sl);
4086         return 0;
4087 }
4088
4089 /**
4090  * Create and initialize a new counter pool.
4091  *
4092  * @param[in] dev
4093  *   Pointer to the Ethernet device structure.
4094  * @param[out] dcs
4095  *   The devX counter handle.
4096  * @param[in] batch
4097  *   Whether the pool is for counter that was allocated by batch command.
4098  *
4099  * @return
4100  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4101  */
4102 static struct mlx5_flow_counter_pool *
4103 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4104                     uint32_t batch)
4105 {
4106         struct mlx5_priv *priv = dev->data->dev_private;
4107         struct mlx5_flow_counter_pool *pool;
4108         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4109                                                                0);
4110         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4111         uint32_t size;
4112
4113         if (cont->n == n_valid) {
4114                 cont = flow_dv_container_resize(dev, batch);
4115                 if (!cont)
4116                         return NULL;
4117         }
4118         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4119                         sizeof(struct mlx5_flow_counter);
4120         pool = rte_calloc(__func__, 1, size, 0);
4121         if (!pool) {
4122                 rte_errno = ENOMEM;
4123                 return NULL;
4124         }
4125         pool->min_dcs = dcs;
4126         pool->raw = cont->init_mem_mng->raws + n_valid %
4127                                                      MLX5_CNT_CONTAINER_RESIZE;
4128         pool->raw_hw = NULL;
4129         rte_spinlock_init(&pool->sl);
4130         /*
4131          * The generation of the new allocated counters in this pool is 0, 2 in
4132          * the pool generation makes all the counters valid for allocation.
4133          */
4134         rte_atomic64_set(&pool->query_gen, 0x2);
4135         TAILQ_INIT(&pool->counters);
4136         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4137         cont->pools[n_valid] = pool;
4138         /* Pool initialization must be updated before host thread access. */
4139         rte_cio_wmb();
4140         rte_atomic16_add(&cont->n_valid, 1);
4141         return pool;
4142 }
4143
4144 /**
4145  * Prepare a new counter and/or a new counter pool.
4146  *
4147  * @param[in] dev
4148  *   Pointer to the Ethernet device structure.
4149  * @param[out] cnt_free
4150  *   Where to put the pointer of a new counter.
4151  * @param[in] batch
4152  *   Whether the pool is for counter that was allocated by batch command.
4153  *
4154  * @return
4155  *   The free counter pool pointer and @p cnt_free is set on success,
4156  *   NULL otherwise and rte_errno is set.
4157  */
4158 static struct mlx5_flow_counter_pool *
4159 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4160                              struct mlx5_flow_counter **cnt_free,
4161                              uint32_t batch)
4162 {
4163         struct mlx5_priv *priv = dev->data->dev_private;
4164         struct mlx5_flow_counter_pool *pool;
4165         struct mlx5_devx_obj *dcs = NULL;
4166         struct mlx5_flow_counter *cnt;
4167         uint32_t i;
4168
4169         if (!batch) {
4170                 /* bulk_bitmap must be 0 for single counter allocation. */
4171                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4172                 if (!dcs)
4173                         return NULL;
4174                 pool = flow_dv_find_pool_by_id
4175                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4176                 if (!pool) {
4177                         pool = flow_dv_pool_create(dev, dcs, batch);
4178                         if (!pool) {
4179                                 mlx5_devx_cmd_destroy(dcs);
4180                                 return NULL;
4181                         }
4182                 } else if (dcs->id < pool->min_dcs->id) {
4183                         rte_atomic64_set(&pool->a64_dcs,
4184                                          (int64_t)(uintptr_t)dcs);
4185                 }
4186                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4187                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4188                 cnt->dcs = dcs;
4189                 *cnt_free = cnt;
4190                 return pool;
4191         }
4192         /* bulk_bitmap is in 128 counters units. */
4193         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4194                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4195         if (!dcs) {
4196                 rte_errno = ENODATA;
4197                 return NULL;
4198         }
4199         pool = flow_dv_pool_create(dev, dcs, batch);
4200         if (!pool) {
4201                 mlx5_devx_cmd_destroy(dcs);
4202                 return NULL;
4203         }
4204         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4205                 cnt = &pool->counters_raw[i];
4206                 cnt->pool = pool;
4207                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4208         }
4209         *cnt_free = &pool->counters_raw[0];
4210         return pool;
4211 }
4212
4213 /**
4214  * Search for existed shared counter.
4215  *
4216  * @param[in] cont
4217  *   Pointer to the relevant counter pool container.
4218  * @param[in] id
4219  *   The shared counter ID to search.
4220  *
4221  * @return
4222  *   NULL if not existed, otherwise pointer to the shared counter.
4223  */
4224 static struct mlx5_flow_counter *
4225 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4226                               uint32_t id)
4227 {
4228         static struct mlx5_flow_counter *cnt;
4229         struct mlx5_flow_counter_pool *pool;
4230         int i;
4231
4232         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4233                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4234                         cnt = &pool->counters_raw[i];
4235                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4236                                 return cnt;
4237                 }
4238         }
4239         return NULL;
4240 }
4241
4242 /**
4243  * Allocate a flow counter.
4244  *
4245  * @param[in] dev
4246  *   Pointer to the Ethernet device structure.
4247  * @param[in] shared
4248  *   Indicate if this counter is shared with other flows.
4249  * @param[in] id
4250  *   Counter identifier.
4251  * @param[in] group
4252  *   Counter flow group.
4253  *
4254  * @return
4255  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4256  */
4257 static struct mlx5_flow_counter *
4258 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4259                       uint16_t group)
4260 {
4261         struct mlx5_priv *priv = dev->data->dev_private;
4262         struct mlx5_flow_counter_pool *pool = NULL;
4263         struct mlx5_flow_counter *cnt_free = NULL;
4264         /*
4265          * Currently group 0 flow counter cannot be assigned to a flow if it is
4266          * not the first one in the batch counter allocation, so it is better
4267          * to allocate counters one by one for these flows in a separate
4268          * container.
4269          * A counter can be shared between different groups so need to take
4270          * shared counters from the single container.
4271          */
4272         uint32_t batch = (group && !shared) ? 1 : 0;
4273         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4274                                                                0);
4275
4276         if (priv->counter_fallback)
4277                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4278         if (!priv->config.devx) {
4279                 rte_errno = ENOTSUP;
4280                 return NULL;
4281         }
4282         if (shared) {
4283                 cnt_free = flow_dv_counter_shared_search(cont, id);
4284                 if (cnt_free) {
4285                         if (cnt_free->ref_cnt + 1 == 0) {
4286                                 rte_errno = E2BIG;
4287                                 return NULL;
4288                         }
4289                         cnt_free->ref_cnt++;
4290                         return cnt_free;
4291                 }
4292         }
4293         /* Pools which has a free counters are in the start. */
4294         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4295                 /*
4296                  * The free counter reset values must be updated between the
4297                  * counter release to the counter allocation, so, at least one
4298                  * query must be done in this time. ensure it by saving the
4299                  * query generation in the release time.
4300                  * The free list is sorted according to the generation - so if
4301                  * the first one is not updated, all the others are not
4302                  * updated too.
4303                  */
4304                 cnt_free = TAILQ_FIRST(&pool->counters);
4305                 if (cnt_free && cnt_free->query_gen + 1 <
4306                     rte_atomic64_read(&pool->query_gen))
4307                         break;
4308                 cnt_free = NULL;
4309         }
4310         if (!cnt_free) {
4311                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4312                 if (!pool)
4313                         return NULL;
4314         }
4315         cnt_free->batch = batch;
4316         /* Create a DV counter action only in the first time usage. */
4317         if (!cnt_free->action) {
4318                 uint16_t offset;
4319                 struct mlx5_devx_obj *dcs;
4320
4321                 if (batch) {
4322                         offset = cnt_free - &pool->counters_raw[0];
4323                         dcs = pool->min_dcs;
4324                 } else {
4325                         offset = 0;
4326                         dcs = cnt_free->dcs;
4327                 }
4328                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4329                                         (dcs->obj, offset);
4330                 if (!cnt_free->action) {
4331                         rte_errno = errno;
4332                         return NULL;
4333                 }
4334         }
4335         /* Update the counter reset values. */
4336         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4337                                  &cnt_free->bytes))
4338                 return NULL;
4339         cnt_free->shared = shared;
4340         cnt_free->ref_cnt = 1;
4341         cnt_free->id = id;
4342         if (!priv->sh->cmng.query_thread_on)
4343                 /* Start the asynchronous batch query by the host thread. */
4344                 mlx5_set_query_alarm(priv->sh);
4345         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4346         if (TAILQ_EMPTY(&pool->counters)) {
4347                 /* Move the pool to the end of the container pool list. */
4348                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4349                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4350         }
4351         return cnt_free;
4352 }
4353
4354 /**
4355  * Release a flow counter.
4356  *
4357  * @param[in] dev
4358  *   Pointer to the Ethernet device structure.
4359  * @param[in] counter
4360  *   Pointer to the counter handler.
4361  */
4362 static void
4363 flow_dv_counter_release(struct rte_eth_dev *dev,
4364                         struct mlx5_flow_counter *counter)
4365 {
4366         struct mlx5_priv *priv = dev->data->dev_private;
4367
4368         if (!counter)
4369                 return;
4370         if (priv->counter_fallback) {
4371                 flow_dv_counter_release_fallback(dev, counter);
4372                 return;
4373         }
4374         if (--counter->ref_cnt == 0) {
4375                 struct mlx5_flow_counter_pool *pool =
4376                                 flow_dv_counter_pool_get(counter);
4377
4378                 /* Put the counter in the end - the last updated one. */
4379                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4380                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4381         }
4382 }
4383
4384 /**
4385  * Verify the @p attributes will be correctly understood by the NIC and store
4386  * them in the @p flow if everything is correct.
4387  *
4388  * @param[in] dev
4389  *   Pointer to dev struct.
4390  * @param[in] attributes
4391  *   Pointer to flow attributes
4392  * @param[in] external
4393  *   This flow rule is created by request external to PMD.
4394  * @param[out] error
4395  *   Pointer to error structure.
4396  *
4397  * @return
4398  *   0 on success, a negative errno value otherwise and rte_errno is set.
4399  */
4400 static int
4401 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4402                             const struct rte_flow_attr *attributes,
4403                             bool external __rte_unused,
4404                             struct rte_flow_error *error)
4405 {
4406         struct mlx5_priv *priv = dev->data->dev_private;
4407         uint32_t priority_max = priv->config.flow_prio - 1;
4408
4409 #ifndef HAVE_MLX5DV_DR
4410         if (attributes->group)
4411                 return rte_flow_error_set(error, ENOTSUP,
4412                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4413                                           NULL,
4414                                           "groups are not supported");
4415 #else
4416         uint32_t table;
4417         int ret;
4418
4419         ret = mlx5_flow_group_to_table(attributes, external,
4420                                        attributes->group, !!priv->fdb_def_rule,
4421                                        &table, error);
4422         if (ret)
4423                 return ret;
4424 #endif
4425         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4426             attributes->priority >= priority_max)
4427                 return rte_flow_error_set(error, ENOTSUP,
4428                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4429                                           NULL,
4430                                           "priority out of range");
4431         if (attributes->transfer) {
4432                 if (!priv->config.dv_esw_en)
4433                         return rte_flow_error_set
4434                                 (error, ENOTSUP,
4435                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4436                                  "E-Switch dr is not supported");
4437                 if (!(priv->representor || priv->master))
4438                         return rte_flow_error_set
4439                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4440                                  NULL, "E-Switch configuration can only be"
4441                                  " done by a master or a representor device");
4442                 if (attributes->egress)
4443                         return rte_flow_error_set
4444                                 (error, ENOTSUP,
4445                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4446                                  "egress is not supported");
4447         }
4448         if (!(attributes->egress ^ attributes->ingress))
4449                 return rte_flow_error_set(error, ENOTSUP,
4450                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4451                                           "must specify exactly one of "
4452                                           "ingress or egress");
4453         return 0;
4454 }
4455
4456 /**
4457  * Internal validation function. For validating both actions and items.
4458  *
4459  * @param[in] dev
4460  *   Pointer to the rte_eth_dev structure.
4461  * @param[in] attr
4462  *   Pointer to the flow attributes.
4463  * @param[in] items
4464  *   Pointer to the list of items.
4465  * @param[in] actions
4466  *   Pointer to the list of actions.
4467  * @param[in] external
4468  *   This flow rule is created by request external to PMD.
4469  * @param[out] error
4470  *   Pointer to the error structure.
4471  *
4472  * @return
4473  *   0 on success, a negative errno value otherwise and rte_errno is set.
4474  */
4475 static int
4476 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4477                  const struct rte_flow_item items[],
4478                  const struct rte_flow_action actions[],
4479                  bool external, struct rte_flow_error *error)
4480 {
4481         int ret;
4482         uint64_t action_flags = 0;
4483         uint64_t item_flags = 0;
4484         uint64_t last_item = 0;
4485         uint8_t next_protocol = 0xff;
4486         uint16_t ether_type = 0;
4487         int actions_n = 0;
4488         uint8_t item_ipv6_proto = 0;
4489         const struct rte_flow_item *gre_item = NULL;
4490         const struct rte_flow_action_raw_decap *decap;
4491         const struct rte_flow_action_raw_encap *encap;
4492         const struct rte_flow_action_rss *rss;
4493         struct rte_flow_item_tcp nic_tcp_mask = {
4494                 .hdr = {
4495                         .tcp_flags = 0xFF,
4496                         .src_port = RTE_BE16(UINT16_MAX),
4497                         .dst_port = RTE_BE16(UINT16_MAX),
4498                 }
4499         };
4500         struct mlx5_priv *priv = dev->data->dev_private;
4501         struct mlx5_dev_config *dev_conf = &priv->config;
4502         uint16_t queue_index = 0xFFFF;
4503
4504         if (items == NULL)
4505                 return -1;
4506         ret = flow_dv_validate_attributes(dev, attr, external, error);
4507         if (ret < 0)
4508                 return ret;
4509         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4510                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4511                 int type = items->type;
4512
4513                 switch (type) {
4514                 case RTE_FLOW_ITEM_TYPE_VOID:
4515                         break;
4516                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4517                         ret = flow_dv_validate_item_port_id
4518                                         (dev, items, attr, item_flags, error);
4519                         if (ret < 0)
4520                                 return ret;
4521                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4522                         break;
4523                 case RTE_FLOW_ITEM_TYPE_ETH:
4524                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4525                                                           error);
4526                         if (ret < 0)
4527                                 return ret;
4528                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4529                                              MLX5_FLOW_LAYER_OUTER_L2;
4530                         if (items->mask != NULL && items->spec != NULL) {
4531                                 ether_type =
4532                                         ((const struct rte_flow_item_eth *)
4533                                          items->spec)->type;
4534                                 ether_type &=
4535                                         ((const struct rte_flow_item_eth *)
4536                                          items->mask)->type;
4537                                 ether_type = rte_be_to_cpu_16(ether_type);
4538                         } else {
4539                                 ether_type = 0;
4540                         }
4541                         break;
4542                 case RTE_FLOW_ITEM_TYPE_VLAN:
4543                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4544                                                            dev, error);
4545                         if (ret < 0)
4546                                 return ret;
4547                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4548                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4549                         if (items->mask != NULL && items->spec != NULL) {
4550                                 ether_type =
4551                                         ((const struct rte_flow_item_vlan *)
4552                                          items->spec)->inner_type;
4553                                 ether_type &=
4554                                         ((const struct rte_flow_item_vlan *)
4555                                          items->mask)->inner_type;
4556                                 ether_type = rte_be_to_cpu_16(ether_type);
4557                         } else {
4558                                 ether_type = 0;
4559                         }
4560                         break;
4561                 case RTE_FLOW_ITEM_TYPE_IPV4:
4562                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4563                                                   &item_flags, &tunnel);
4564                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4565                                                            last_item,
4566                                                            ether_type, NULL,
4567                                                            error);
4568                         if (ret < 0)
4569                                 return ret;
4570                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4571                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4572                         if (items->mask != NULL &&
4573                             ((const struct rte_flow_item_ipv4 *)
4574                              items->mask)->hdr.next_proto_id) {
4575                                 next_protocol =
4576                                         ((const struct rte_flow_item_ipv4 *)
4577                                          (items->spec))->hdr.next_proto_id;
4578                                 next_protocol &=
4579                                         ((const struct rte_flow_item_ipv4 *)
4580                                          (items->mask))->hdr.next_proto_id;
4581                         } else {
4582                                 /* Reset for inner layer. */
4583                                 next_protocol = 0xff;
4584                         }
4585                         break;
4586                 case RTE_FLOW_ITEM_TYPE_IPV6:
4587                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4588                                                   &item_flags, &tunnel);
4589                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4590                                                            last_item,
4591                                                            ether_type, NULL,
4592                                                            error);
4593                         if (ret < 0)
4594                                 return ret;
4595                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4596                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4597                         if (items->mask != NULL &&
4598                             ((const struct rte_flow_item_ipv6 *)
4599                              items->mask)->hdr.proto) {
4600                                 item_ipv6_proto =
4601                                         ((const struct rte_flow_item_ipv6 *)
4602                                          items->spec)->hdr.proto;
4603                                 next_protocol =
4604                                         ((const struct rte_flow_item_ipv6 *)
4605                                          items->spec)->hdr.proto;
4606                                 next_protocol &=
4607                                         ((const struct rte_flow_item_ipv6 *)
4608                                          items->mask)->hdr.proto;
4609                         } else {
4610                                 /* Reset for inner layer. */
4611                                 next_protocol = 0xff;
4612                         }
4613                         break;
4614                 case RTE_FLOW_ITEM_TYPE_TCP:
4615                         ret = mlx5_flow_validate_item_tcp
4616                                                 (items, item_flags,
4617                                                  next_protocol,
4618                                                  &nic_tcp_mask,
4619                                                  error);
4620                         if (ret < 0)
4621                                 return ret;
4622                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4623                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4624                         break;
4625                 case RTE_FLOW_ITEM_TYPE_UDP:
4626                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4627                                                           next_protocol,
4628                                                           error);
4629                         if (ret < 0)
4630                                 return ret;
4631                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4632                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4633                         break;
4634                 case RTE_FLOW_ITEM_TYPE_GRE:
4635                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4636                                                           next_protocol, error);
4637                         if (ret < 0)
4638                                 return ret;
4639                         gre_item = items;
4640                         last_item = MLX5_FLOW_LAYER_GRE;
4641                         break;
4642                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4643                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4644                                                             next_protocol,
4645                                                             error);
4646                         if (ret < 0)
4647                                 return ret;
4648                         last_item = MLX5_FLOW_LAYER_NVGRE;
4649                         break;
4650                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4651                         ret = mlx5_flow_validate_item_gre_key
4652                                 (items, item_flags, gre_item, error);
4653                         if (ret < 0)
4654                                 return ret;
4655                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4656                         break;
4657                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4658                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4659                                                             error);
4660                         if (ret < 0)
4661                                 return ret;
4662                         last_item = MLX5_FLOW_LAYER_VXLAN;
4663                         break;
4664                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4665                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4666                                                                 item_flags, dev,
4667                                                                 error);
4668                         if (ret < 0)
4669                                 return ret;
4670                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4671                         break;
4672                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4673                         ret = mlx5_flow_validate_item_geneve(items,
4674                                                              item_flags, dev,
4675                                                              error);
4676                         if (ret < 0)
4677                                 return ret;
4678                         last_item = MLX5_FLOW_LAYER_GENEVE;
4679                         break;
4680                 case RTE_FLOW_ITEM_TYPE_MPLS:
4681                         ret = mlx5_flow_validate_item_mpls(dev, items,
4682                                                            item_flags,
4683                                                            last_item, error);
4684                         if (ret < 0)
4685                                 return ret;
4686                         last_item = MLX5_FLOW_LAYER_MPLS;
4687                         break;
4688
4689                 case RTE_FLOW_ITEM_TYPE_MARK:
4690                         ret = flow_dv_validate_item_mark(dev, items, attr,
4691                                                          error);
4692                         if (ret < 0)
4693                                 return ret;
4694                         last_item = MLX5_FLOW_ITEM_MARK;
4695                         break;
4696                 case RTE_FLOW_ITEM_TYPE_META:
4697                         ret = flow_dv_validate_item_meta(dev, items, attr,
4698                                                          error);
4699                         if (ret < 0)
4700                                 return ret;
4701                         last_item = MLX5_FLOW_ITEM_METADATA;
4702                         break;
4703                 case RTE_FLOW_ITEM_TYPE_ICMP:
4704                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4705                                                            next_protocol,
4706                                                            error);
4707                         if (ret < 0)
4708                                 return ret;
4709                         last_item = MLX5_FLOW_LAYER_ICMP;
4710                         break;
4711                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4712                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4713                                                             next_protocol,
4714                                                             error);
4715                         if (ret < 0)
4716                                 return ret;
4717                         item_ipv6_proto = IPPROTO_ICMPV6;
4718                         last_item = MLX5_FLOW_LAYER_ICMP6;
4719                         break;
4720                 case RTE_FLOW_ITEM_TYPE_TAG:
4721                         ret = flow_dv_validate_item_tag(dev, items,
4722                                                         attr, error);
4723                         if (ret < 0)
4724                                 return ret;
4725                         last_item = MLX5_FLOW_ITEM_TAG;
4726                         break;
4727                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4728                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4729                         break;
4730                 case RTE_FLOW_ITEM_TYPE_GTP:
4731                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4732                                                         error);
4733                         if (ret < 0)
4734                                 return ret;
4735                         last_item = MLX5_FLOW_LAYER_GTP;
4736                         break;
4737                 default:
4738                         return rte_flow_error_set(error, ENOTSUP,
4739                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4740                                                   NULL, "item not supported");
4741                 }
4742                 item_flags |= last_item;
4743         }
4744         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4745                 int type = actions->type;
4746                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4747                         return rte_flow_error_set(error, ENOTSUP,
4748                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4749                                                   actions, "too many actions");
4750                 switch (type) {
4751                 case RTE_FLOW_ACTION_TYPE_VOID:
4752                         break;
4753                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4754                         ret = flow_dv_validate_action_port_id(dev,
4755                                                               action_flags,
4756                                                               actions,
4757                                                               attr,
4758                                                               error);
4759                         if (ret)
4760                                 return ret;
4761                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4762                         ++actions_n;
4763                         break;
4764                 case RTE_FLOW_ACTION_TYPE_FLAG:
4765                         ret = flow_dv_validate_action_flag(dev, action_flags,
4766                                                            attr, error);
4767                         if (ret < 0)
4768                                 return ret;
4769                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4770                                 /* Count all modify-header actions as one. */
4771                                 if (!(action_flags &
4772                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4773                                         ++actions_n;
4774                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4775                                                 MLX5_FLOW_ACTION_MARK_EXT;
4776                         } else {
4777                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4778                                 ++actions_n;
4779                         }
4780                         break;
4781                 case RTE_FLOW_ACTION_TYPE_MARK:
4782                         ret = flow_dv_validate_action_mark(dev, actions,
4783                                                            action_flags,
4784                                                            attr, error);
4785                         if (ret < 0)
4786                                 return ret;
4787                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4788                                 /* Count all modify-header actions as one. */
4789                                 if (!(action_flags &
4790                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4791                                         ++actions_n;
4792                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4793                                                 MLX5_FLOW_ACTION_MARK_EXT;
4794                         } else {
4795                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4796                                 ++actions_n;
4797                         }
4798                         break;
4799                 case RTE_FLOW_ACTION_TYPE_SET_META:
4800                         ret = flow_dv_validate_action_set_meta(dev, actions,
4801                                                                action_flags,
4802                                                                attr, error);
4803                         if (ret < 0)
4804                                 return ret;
4805                         /* Count all modify-header actions as one action. */
4806                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4807                                 ++actions_n;
4808                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4809                         break;
4810                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4811                         ret = flow_dv_validate_action_set_tag(dev, actions,
4812                                                               action_flags,
4813                                                               attr, error);
4814                         if (ret < 0)
4815                                 return ret;
4816                         /* Count all modify-header actions as one action. */
4817                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4818                                 ++actions_n;
4819                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4820                         break;
4821                 case RTE_FLOW_ACTION_TYPE_DROP:
4822                         ret = mlx5_flow_validate_action_drop(action_flags,
4823                                                              attr, error);
4824                         if (ret < 0)
4825                                 return ret;
4826                         action_flags |= MLX5_FLOW_ACTION_DROP;
4827                         ++actions_n;
4828                         break;
4829                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4830                         ret = mlx5_flow_validate_action_queue(actions,
4831                                                               action_flags, dev,
4832                                                               attr, error);
4833                         if (ret < 0)
4834                                 return ret;
4835                         queue_index = ((const struct rte_flow_action_queue *)
4836                                                         (actions->conf))->index;
4837                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4838                         ++actions_n;
4839                         break;
4840                 case RTE_FLOW_ACTION_TYPE_RSS:
4841                         rss = actions->conf;
4842                         ret = mlx5_flow_validate_action_rss(actions,
4843                                                             action_flags, dev,
4844                                                             attr, item_flags,
4845                                                             error);
4846                         if (ret < 0)
4847                                 return ret;
4848                         if (rss != NULL && rss->queue_num)
4849                                 queue_index = rss->queue[0];
4850                         action_flags |= MLX5_FLOW_ACTION_RSS;
4851                         ++actions_n;
4852                         break;
4853                 case RTE_FLOW_ACTION_TYPE_COUNT:
4854                         ret = flow_dv_validate_action_count(dev, error);
4855                         if (ret < 0)
4856                                 return ret;
4857                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4858                         ++actions_n;
4859                         break;
4860                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4861                         if (flow_dv_validate_action_pop_vlan(dev,
4862                                                              action_flags,
4863                                                              actions,
4864                                                              item_flags, attr,
4865                                                              error))
4866                                 return -rte_errno;
4867                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4868                         ++actions_n;
4869                         break;
4870                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4871                         ret = flow_dv_validate_action_push_vlan(action_flags,
4872                                                                 item_flags,
4873                                                                 actions, attr,
4874                                                                 error);
4875                         if (ret < 0)
4876                                 return ret;
4877                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4878                         ++actions_n;
4879                         break;
4880                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4881                         ret = flow_dv_validate_action_set_vlan_pcp
4882                                                 (action_flags, actions, error);
4883                         if (ret < 0)
4884                                 return ret;
4885                         /* Count PCP with push_vlan command. */
4886                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4887                         break;
4888                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4889                         ret = flow_dv_validate_action_set_vlan_vid
4890                                                 (item_flags, action_flags,
4891                                                  actions, error);
4892                         if (ret < 0)
4893                                 return ret;
4894                         /* Count VID with push_vlan command. */
4895                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4896                         break;
4897                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4898                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4899                         ret = flow_dv_validate_action_l2_encap(action_flags,
4900                                                                actions, error);
4901                         if (ret < 0)
4902                                 return ret;
4903                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
4904                         ++actions_n;
4905                         break;
4906                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4907                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4908                         ret = flow_dv_validate_action_decap(action_flags, attr,
4909                                                             error);
4910                         if (ret < 0)
4911                                 return ret;
4912                         action_flags |= MLX5_FLOW_ACTION_DECAP;
4913                         ++actions_n;
4914                         break;
4915                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4916                         ret = flow_dv_validate_action_raw_encap_decap
4917                                 (NULL, actions->conf, attr, &action_flags,
4918                                  &actions_n, error);
4919                         if (ret < 0)
4920                                 return ret;
4921                         break;
4922                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4923                         decap = actions->conf;
4924                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
4925                                 ;
4926                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4927                                 encap = NULL;
4928                                 actions--;
4929                         } else {
4930                                 encap = actions->conf;
4931                         }
4932                         ret = flow_dv_validate_action_raw_encap_decap
4933                                            (decap ? decap : &empty_decap, encap,
4934                                             attr, &action_flags, &actions_n,
4935                                             error);
4936                         if (ret < 0)
4937                                 return ret;
4938                         break;
4939                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4940                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4941                         ret = flow_dv_validate_action_modify_mac(action_flags,
4942                                                                  actions,
4943                                                                  item_flags,
4944                                                                  error);
4945                         if (ret < 0)
4946                                 return ret;
4947                         /* Count all modify-header actions as one action. */
4948                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4949                                 ++actions_n;
4950                         action_flags |= actions->type ==
4951                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4952                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4953                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4954                         break;
4955
4956                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4957                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4958                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4959                                                                   actions,
4960                                                                   item_flags,
4961                                                                   error);
4962                         if (ret < 0)
4963                                 return ret;
4964                         /* Count all modify-header actions as one action. */
4965                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4966                                 ++actions_n;
4967                         action_flags |= actions->type ==
4968                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4969                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4970                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4971                         break;
4972                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4973                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4974                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4975                                                                   actions,
4976                                                                   item_flags,
4977                                                                   error);
4978                         if (ret < 0)
4979                                 return ret;
4980                         if (item_ipv6_proto == IPPROTO_ICMPV6)
4981                                 return rte_flow_error_set(error, ENOTSUP,
4982                                         RTE_FLOW_ERROR_TYPE_ACTION,
4983                                         actions,
4984                                         "Can't change header "
4985                                         "with ICMPv6 proto");
4986                         /* Count all modify-header actions as one action. */
4987                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4988                                 ++actions_n;
4989                         action_flags |= actions->type ==
4990                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4991                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4992                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4993                         break;
4994                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4995                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4996                         ret = flow_dv_validate_action_modify_tp(action_flags,
4997                                                                 actions,
4998                                                                 item_flags,
4999                                                                 error);
5000                         if (ret < 0)
5001                                 return ret;
5002                         /* Count all modify-header actions as one action. */
5003                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5004                                 ++actions_n;
5005                         action_flags |= actions->type ==
5006                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5007                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
5008                                                 MLX5_FLOW_ACTION_SET_TP_DST;
5009                         break;
5010                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5011                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5012                         ret = flow_dv_validate_action_modify_ttl(action_flags,
5013                                                                  actions,
5014                                                                  item_flags,
5015                                                                  error);
5016                         if (ret < 0)
5017                                 return ret;
5018                         /* Count all modify-header actions as one action. */
5019                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5020                                 ++actions_n;
5021                         action_flags |= actions->type ==
5022                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
5023                                                 MLX5_FLOW_ACTION_SET_TTL :
5024                                                 MLX5_FLOW_ACTION_DEC_TTL;
5025                         break;
5026                 case RTE_FLOW_ACTION_TYPE_JUMP:
5027                         ret = flow_dv_validate_action_jump(actions,
5028                                                            action_flags,
5029                                                            attr, external,
5030                                                            error);
5031                         if (ret)
5032                                 return ret;
5033                         ++actions_n;
5034                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5035                         break;
5036                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5037                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5038                         ret = flow_dv_validate_action_modify_tcp_seq
5039                                                                 (action_flags,
5040                                                                  actions,
5041                                                                  item_flags,
5042                                                                  error);
5043                         if (ret < 0)
5044                                 return ret;
5045                         /* Count all modify-header actions as one action. */
5046                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5047                                 ++actions_n;
5048                         action_flags |= actions->type ==
5049                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5050                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
5051                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5052                         break;
5053                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5054                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5055                         ret = flow_dv_validate_action_modify_tcp_ack
5056                                                                 (action_flags,
5057                                                                  actions,
5058                                                                  item_flags,
5059                                                                  error);
5060                         if (ret < 0)
5061                                 return ret;
5062                         /* Count all modify-header actions as one action. */
5063                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5064                                 ++actions_n;
5065                         action_flags |= actions->type ==
5066                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5067                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5068                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5069                         break;
5070                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5071                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5072                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5073                         break;
5074                 case RTE_FLOW_ACTION_TYPE_METER:
5075                         ret = mlx5_flow_validate_action_meter(dev,
5076                                                               action_flags,
5077                                                               actions, attr,
5078                                                               error);
5079                         if (ret < 0)
5080                                 return ret;
5081                         action_flags |= MLX5_FLOW_ACTION_METER;
5082                         ++actions_n;
5083                         break;
5084                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5085                         ret = flow_dv_validate_action_modify_ipv4_dscp
5086                                                          (action_flags,
5087                                                           actions,
5088                                                           item_flags,
5089                                                           error);
5090                         if (ret < 0)
5091                                 return ret;
5092                         /* Count all modify-header actions as one action. */
5093                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5094                                 ++actions_n;
5095                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5096                         break;
5097                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5098                         ret = flow_dv_validate_action_modify_ipv6_dscp
5099                                                                 (action_flags,
5100                                                                  actions,
5101                                                                  item_flags,
5102                                                                  error);
5103                         if (ret < 0)
5104                                 return ret;
5105                         /* Count all modify-header actions as one action. */
5106                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5107                                 ++actions_n;
5108                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5109                         break;
5110                 default:
5111                         return rte_flow_error_set(error, ENOTSUP,
5112                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5113                                                   actions,
5114                                                   "action not supported");
5115                 }
5116         }
5117         /*
5118          * Validate the drop action mutual exclusion with other actions.
5119          * Drop action is mutually-exclusive with any other action, except for
5120          * Count action.
5121          */
5122         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5123             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5124                 return rte_flow_error_set(error, EINVAL,
5125                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5126                                           "Drop action is mutually-exclusive "
5127                                           "with any other action, except for "
5128                                           "Count action");
5129         /* Eswitch has few restrictions on using items and actions */
5130         if (attr->transfer) {
5131                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5132                     action_flags & MLX5_FLOW_ACTION_FLAG)
5133                         return rte_flow_error_set(error, ENOTSUP,
5134                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5135                                                   NULL,
5136                                                   "unsupported action FLAG");
5137                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5138                     action_flags & MLX5_FLOW_ACTION_MARK)
5139                         return rte_flow_error_set(error, ENOTSUP,
5140                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5141                                                   NULL,
5142                                                   "unsupported action MARK");
5143                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5144                         return rte_flow_error_set(error, ENOTSUP,
5145                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5146                                                   NULL,
5147                                                   "unsupported action QUEUE");
5148                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5149                         return rte_flow_error_set(error, ENOTSUP,
5150                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5151                                                   NULL,
5152                                                   "unsupported action RSS");
5153                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5154                         return rte_flow_error_set(error, EINVAL,
5155                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5156                                                   actions,
5157                                                   "no fate action is found");
5158         } else {
5159                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5160                         return rte_flow_error_set(error, EINVAL,
5161                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5162                                                   actions,
5163                                                   "no fate action is found");
5164         }
5165         /* Continue validation for Xcap actions.*/
5166         if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) && (queue_index == 0xFFFF ||
5167             mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5168                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5169                     MLX5_FLOW_XCAP_ACTIONS)
5170                         return rte_flow_error_set(error, ENOTSUP,
5171                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5172                                                   NULL, "encap and decap "
5173                                                   "combination aren't supported");
5174                 if (!attr->transfer && attr->ingress && (action_flags &
5175                                                         MLX5_FLOW_ACTION_ENCAP))
5176                         return rte_flow_error_set(error, ENOTSUP,
5177                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5178                                                   NULL, "encap is not supported"
5179                                                   " for ingress traffic");
5180         }
5181         return 0;
5182 }
5183
5184 /**
5185  * Internal preparation function. Allocates the DV flow size,
5186  * this size is constant.
5187  *
5188  * @param[in] attr
5189  *   Pointer to the flow attributes.
5190  * @param[in] items
5191  *   Pointer to the list of items.
5192  * @param[in] actions
5193  *   Pointer to the list of actions.
5194  * @param[out] error
5195  *   Pointer to the error structure.
5196  *
5197  * @return
5198  *   Pointer to mlx5_flow object on success,
5199  *   otherwise NULL and rte_errno is set.
5200  */
5201 static struct mlx5_flow *
5202 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5203                 const struct rte_flow_item items[] __rte_unused,
5204                 const struct rte_flow_action actions[] __rte_unused,
5205                 struct rte_flow_error *error)
5206 {
5207         size_t size = sizeof(struct mlx5_flow);
5208         struct mlx5_flow *dev_flow;
5209
5210         dev_flow = rte_calloc(__func__, 1, size, 0);
5211         if (!dev_flow) {
5212                 rte_flow_error_set(error, ENOMEM,
5213                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5214                                    "not enough memory to create flow");
5215                 return NULL;
5216         }
5217         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5218         dev_flow->ingress = attr->ingress;
5219         dev_flow->transfer = attr->transfer;
5220         return dev_flow;
5221 }
5222
5223 #ifdef RTE_LIBRTE_MLX5_DEBUG
5224 /**
5225  * Sanity check for match mask and value. Similar to check_valid_spec() in
5226  * kernel driver. If unmasked bit is present in value, it returns failure.
5227  *
5228  * @param match_mask
5229  *   pointer to match mask buffer.
5230  * @param match_value
5231  *   pointer to match value buffer.
5232  *
5233  * @return
5234  *   0 if valid, -EINVAL otherwise.
5235  */
5236 static int
5237 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5238 {
5239         uint8_t *m = match_mask;
5240         uint8_t *v = match_value;
5241         unsigned int i;
5242
5243         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5244                 if (v[i] & ~m[i]) {
5245                         DRV_LOG(ERR,
5246                                 "match_value differs from match_criteria"
5247                                 " %p[%u] != %p[%u]",
5248                                 match_value, i, match_mask, i);
5249                         return -EINVAL;
5250                 }
5251         }
5252         return 0;
5253 }
5254 #endif
5255
5256 /**
5257  * Add Ethernet item to matcher and to the value.
5258  *
5259  * @param[in, out] matcher
5260  *   Flow matcher.
5261  * @param[in, out] key
5262  *   Flow matcher value.
5263  * @param[in] item
5264  *   Flow pattern to translate.
5265  * @param[in] inner
5266  *   Item is inner pattern.
5267  */
5268 static void
5269 flow_dv_translate_item_eth(void *matcher, void *key,
5270                            const struct rte_flow_item *item, int inner)
5271 {
5272         const struct rte_flow_item_eth *eth_m = item->mask;
5273         const struct rte_flow_item_eth *eth_v = item->spec;
5274         const struct rte_flow_item_eth nic_mask = {
5275                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5276                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5277                 .type = RTE_BE16(0xffff),
5278         };
5279         void *headers_m;
5280         void *headers_v;
5281         char *l24_v;
5282         unsigned int i;
5283
5284         if (!eth_v)
5285                 return;
5286         if (!eth_m)
5287                 eth_m = &nic_mask;
5288         if (inner) {
5289                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5290                                          inner_headers);
5291                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5292         } else {
5293                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5294                                          outer_headers);
5295                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5296         }
5297         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5298                &eth_m->dst, sizeof(eth_m->dst));
5299         /* The value must be in the range of the mask. */
5300         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5301         for (i = 0; i < sizeof(eth_m->dst); ++i)
5302                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5303         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5304                &eth_m->src, sizeof(eth_m->src));
5305         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5306         /* The value must be in the range of the mask. */
5307         for (i = 0; i < sizeof(eth_m->dst); ++i)
5308                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5309         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5310                  rte_be_to_cpu_16(eth_m->type));
5311         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5312         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5313         if (eth_v->type) {
5314                 /* When ethertype is present set mask for tagged VLAN. */
5315                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5316                 /* Set value for tagged VLAN if ethertype is 802.1Q. */
5317                 if (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_VLAN) ||
5318                     eth_v->type == RTE_BE16(RTE_ETHER_TYPE_QINQ))
5319                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag,
5320                                  1);
5321         }
5322 }
5323
5324 /**
5325  * Add VLAN item to matcher and to the value.
5326  *
5327  * @param[in, out] dev_flow
5328  *   Flow descriptor.
5329  * @param[in, out] matcher
5330  *   Flow matcher.
5331  * @param[in, out] key
5332  *   Flow matcher value.
5333  * @param[in] item
5334  *   Flow pattern to translate.
5335  * @param[in] inner
5336  *   Item is inner pattern.
5337  */
5338 static void
5339 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5340                             void *matcher, void *key,
5341                             const struct rte_flow_item *item,
5342                             int inner)
5343 {
5344         const struct rte_flow_item_vlan *vlan_m = item->mask;
5345         const struct rte_flow_item_vlan *vlan_v = item->spec;
5346         void *headers_m;
5347         void *headers_v;
5348         uint16_t tci_m;
5349         uint16_t tci_v;
5350
5351         if (!vlan_v)
5352                 return;
5353         if (!vlan_m)
5354                 vlan_m = &rte_flow_item_vlan_mask;
5355         if (inner) {
5356                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5357                                          inner_headers);
5358                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5359         } else {
5360                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5361                                          outer_headers);
5362                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5363                 /*
5364                  * This is workaround, masks are not supported,
5365                  * and pre-validated.
5366                  */
5367                 dev_flow->dv.vf_vlan.tag =
5368                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5369         }
5370         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5371         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5372         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5373         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5374         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5375         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5376         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5377         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5378         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5379         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5380         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5381                  rte_be_to_cpu_16(vlan_m->inner_type));
5382         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5383                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5384 }
5385
5386 /**
5387  * Add IPV4 item to matcher and to the value.
5388  *
5389  * @param[in, out] matcher
5390  *   Flow matcher.
5391  * @param[in, out] key
5392  *   Flow matcher value.
5393  * @param[in] item
5394  *   Flow pattern to translate.
5395  * @param[in] inner
5396  *   Item is inner pattern.
5397  * @param[in] group
5398  *   The group to insert the rule.
5399  */
5400 static void
5401 flow_dv_translate_item_ipv4(void *matcher, void *key,
5402                             const struct rte_flow_item *item,
5403                             int inner, uint32_t group)
5404 {
5405         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5406         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5407         const struct rte_flow_item_ipv4 nic_mask = {
5408                 .hdr = {
5409                         .src_addr = RTE_BE32(0xffffffff),
5410                         .dst_addr = RTE_BE32(0xffffffff),
5411                         .type_of_service = 0xff,
5412                         .next_proto_id = 0xff,
5413                 },
5414         };
5415         void *headers_m;
5416         void *headers_v;
5417         char *l24_m;
5418         char *l24_v;
5419         uint8_t tos;
5420
5421         if (inner) {
5422                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5423                                          inner_headers);
5424                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5425         } else {
5426                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5427                                          outer_headers);
5428                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5429         }
5430         if (group == 0)
5431                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5432         else
5433                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5434         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5435         if (!ipv4_v)
5436                 return;
5437         if (!ipv4_m)
5438                 ipv4_m = &nic_mask;
5439         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5440                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5441         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5442                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5443         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5444         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5445         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5446                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5447         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5448                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5449         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5450         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5451         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5452         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5453                  ipv4_m->hdr.type_of_service);
5454         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5455         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5456                  ipv4_m->hdr.type_of_service >> 2);
5457         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5458         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5459                  ipv4_m->hdr.next_proto_id);
5460         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5461                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5462         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5463 }
5464
5465 /**
5466  * Add IPV6 item to matcher and to the value.
5467  *
5468  * @param[in, out] matcher
5469  *   Flow matcher.
5470  * @param[in, out] key
5471  *   Flow matcher value.
5472  * @param[in] item
5473  *   Flow pattern to translate.
5474  * @param[in] inner
5475  *   Item is inner pattern.
5476  * @param[in] group
5477  *   The group to insert the rule.
5478  */
5479 static void
5480 flow_dv_translate_item_ipv6(void *matcher, void *key,
5481                             const struct rte_flow_item *item,
5482                             int inner, uint32_t group)
5483 {
5484         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5485         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5486         const struct rte_flow_item_ipv6 nic_mask = {
5487                 .hdr = {
5488                         .src_addr =
5489                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5490                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5491                         .dst_addr =
5492                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5493                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5494                         .vtc_flow = RTE_BE32(0xffffffff),
5495                         .proto = 0xff,
5496                         .hop_limits = 0xff,
5497                 },
5498         };
5499         void *headers_m;
5500         void *headers_v;
5501         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5502         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5503         char *l24_m;
5504         char *l24_v;
5505         uint32_t vtc_m;
5506         uint32_t vtc_v;
5507         int i;
5508         int size;
5509
5510         if (inner) {
5511                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5512                                          inner_headers);
5513                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5514         } else {
5515                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5516                                          outer_headers);
5517                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5518         }
5519         if (group == 0)
5520                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5521         else
5522                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5523         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5524         if (!ipv6_v)
5525                 return;
5526         if (!ipv6_m)
5527                 ipv6_m = &nic_mask;
5528         size = sizeof(ipv6_m->hdr.dst_addr);
5529         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5530                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5531         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5532                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5533         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5534         for (i = 0; i < size; ++i)
5535                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5536         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5537                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5538         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5539                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5540         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5541         for (i = 0; i < size; ++i)
5542                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5543         /* TOS. */
5544         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5545         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5546         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5547         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5548         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5549         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5550         /* Label. */
5551         if (inner) {
5552                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5553                          vtc_m);
5554                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5555                          vtc_v);
5556         } else {
5557                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5558                          vtc_m);
5559                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5560                          vtc_v);
5561         }
5562         /* Protocol. */
5563         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5564                  ipv6_m->hdr.proto);
5565         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5566                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5567         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5568 }
5569
5570 /**
5571  * Add TCP item to matcher and to the value.
5572  *
5573  * @param[in, out] matcher
5574  *   Flow matcher.
5575  * @param[in, out] key
5576  *   Flow matcher value.
5577  * @param[in] item
5578  *   Flow pattern to translate.
5579  * @param[in] inner
5580  *   Item is inner pattern.
5581  */
5582 static void
5583 flow_dv_translate_item_tcp(void *matcher, void *key,
5584                            const struct rte_flow_item *item,
5585                            int inner)
5586 {
5587         const struct rte_flow_item_tcp *tcp_m = item->mask;
5588         const struct rte_flow_item_tcp *tcp_v = item->spec;
5589         void *headers_m;
5590         void *headers_v;
5591
5592         if (inner) {
5593                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5594                                          inner_headers);
5595                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5596         } else {
5597                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5598                                          outer_headers);
5599                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5600         }
5601         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5602         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5603         if (!tcp_v)
5604                 return;
5605         if (!tcp_m)
5606                 tcp_m = &rte_flow_item_tcp_mask;
5607         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5608                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5609         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5610                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5611         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5612                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5613         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5614                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5615         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5616                  tcp_m->hdr.tcp_flags);
5617         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5618                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5619 }
5620
5621 /**
5622  * Add UDP item to matcher and to the value.
5623  *
5624  * @param[in, out] matcher
5625  *   Flow matcher.
5626  * @param[in, out] key
5627  *   Flow matcher value.
5628  * @param[in] item
5629  *   Flow pattern to translate.
5630  * @param[in] inner
5631  *   Item is inner pattern.
5632  */
5633 static void
5634 flow_dv_translate_item_udp(void *matcher, void *key,
5635                            const struct rte_flow_item *item,
5636                            int inner)
5637 {
5638         const struct rte_flow_item_udp *udp_m = item->mask;
5639         const struct rte_flow_item_udp *udp_v = item->spec;
5640         void *headers_m;
5641         void *headers_v;
5642
5643         if (inner) {
5644                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5645                                          inner_headers);
5646                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5647         } else {
5648                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5649                                          outer_headers);
5650                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5651         }
5652         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5653         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5654         if (!udp_v)
5655                 return;
5656         if (!udp_m)
5657                 udp_m = &rte_flow_item_udp_mask;
5658         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5659                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5660         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5661                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5662         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5663                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5664         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5665                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5666 }
5667
5668 /**
5669  * Add GRE optional Key item to matcher and to the value.
5670  *
5671  * @param[in, out] matcher
5672  *   Flow matcher.
5673  * @param[in, out] key
5674  *   Flow matcher value.
5675  * @param[in] item
5676  *   Flow pattern to translate.
5677  * @param[in] inner
5678  *   Item is inner pattern.
5679  */
5680 static void
5681 flow_dv_translate_item_gre_key(void *matcher, void *key,
5682                                    const struct rte_flow_item *item)
5683 {
5684         const rte_be32_t *key_m = item->mask;
5685         const rte_be32_t *key_v = item->spec;
5686         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5687         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5688         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5689
5690         /* GRE K bit must be on and should already be validated */
5691         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5692         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5693         if (!key_v)
5694                 return;
5695         if (!key_m)
5696                 key_m = &gre_key_default_mask;
5697         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5698                  rte_be_to_cpu_32(*key_m) >> 8);
5699         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5700                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5701         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5702                  rte_be_to_cpu_32(*key_m) & 0xFF);
5703         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5704                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5705 }
5706
5707 /**
5708  * Add GRE item to matcher and to the value.
5709  *
5710  * @param[in, out] matcher
5711  *   Flow matcher.
5712  * @param[in, out] key
5713  *   Flow matcher value.
5714  * @param[in] item
5715  *   Flow pattern to translate.
5716  * @param[in] inner
5717  *   Item is inner pattern.
5718  */
5719 static void
5720 flow_dv_translate_item_gre(void *matcher, void *key,
5721                            const struct rte_flow_item *item,
5722                            int inner)
5723 {
5724         const struct rte_flow_item_gre *gre_m = item->mask;
5725         const struct rte_flow_item_gre *gre_v = item->spec;
5726         void *headers_m;
5727         void *headers_v;
5728         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5729         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5730         struct {
5731                 union {
5732                         __extension__
5733                         struct {
5734                                 uint16_t version:3;
5735                                 uint16_t rsvd0:9;
5736                                 uint16_t s_present:1;
5737                                 uint16_t k_present:1;
5738                                 uint16_t rsvd_bit1:1;
5739                                 uint16_t c_present:1;
5740                         };
5741                         uint16_t value;
5742                 };
5743         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5744
5745         if (inner) {
5746                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5747                                          inner_headers);
5748                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5749         } else {
5750                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5751                                          outer_headers);
5752                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5753         }
5754         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5755         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5756         if (!gre_v)
5757                 return;
5758         if (!gre_m)
5759                 gre_m = &rte_flow_item_gre_mask;
5760         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5761                  rte_be_to_cpu_16(gre_m->protocol));
5762         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5763                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5764         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5765         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5766         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5767                  gre_crks_rsvd0_ver_m.c_present);
5768         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5769                  gre_crks_rsvd0_ver_v.c_present &
5770                  gre_crks_rsvd0_ver_m.c_present);
5771         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5772                  gre_crks_rsvd0_ver_m.k_present);
5773         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5774                  gre_crks_rsvd0_ver_v.k_present &
5775                  gre_crks_rsvd0_ver_m.k_present);
5776         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5777                  gre_crks_rsvd0_ver_m.s_present);
5778         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5779                  gre_crks_rsvd0_ver_v.s_present &
5780                  gre_crks_rsvd0_ver_m.s_present);
5781 }
5782
5783 /**
5784  * Add NVGRE item to matcher and to the value.
5785  *
5786  * @param[in, out] matcher
5787  *   Flow matcher.
5788  * @param[in, out] key
5789  *   Flow matcher value.
5790  * @param[in] item
5791  *   Flow pattern to translate.
5792  * @param[in] inner
5793  *   Item is inner pattern.
5794  */
5795 static void
5796 flow_dv_translate_item_nvgre(void *matcher, void *key,
5797                              const struct rte_flow_item *item,
5798                              int inner)
5799 {
5800         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5801         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5802         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5803         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5804         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5805         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5806         char *gre_key_m;
5807         char *gre_key_v;
5808         int size;
5809         int i;
5810
5811         /* For NVGRE, GRE header fields must be set with defined values. */
5812         const struct rte_flow_item_gre gre_spec = {
5813                 .c_rsvd0_ver = RTE_BE16(0x2000),
5814                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5815         };
5816         const struct rte_flow_item_gre gre_mask = {
5817                 .c_rsvd0_ver = RTE_BE16(0xB000),
5818                 .protocol = RTE_BE16(UINT16_MAX),
5819         };
5820         const struct rte_flow_item gre_item = {
5821                 .spec = &gre_spec,
5822                 .mask = &gre_mask,
5823                 .last = NULL,
5824         };
5825         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5826         if (!nvgre_v)
5827                 return;
5828         if (!nvgre_m)
5829                 nvgre_m = &rte_flow_item_nvgre_mask;
5830         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5831         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5832         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5833         memcpy(gre_key_m, tni_flow_id_m, size);
5834         for (i = 0; i < size; ++i)
5835                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5836 }
5837
5838 /**
5839  * Add VXLAN item to matcher and to the value.
5840  *
5841  * @param[in, out] matcher
5842  *   Flow matcher.
5843  * @param[in, out] key
5844  *   Flow matcher value.
5845  * @param[in] item
5846  *   Flow pattern to translate.
5847  * @param[in] inner
5848  *   Item is inner pattern.
5849  */
5850 static void
5851 flow_dv_translate_item_vxlan(void *matcher, void *key,
5852                              const struct rte_flow_item *item,
5853                              int inner)
5854 {
5855         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5856         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5857         void *headers_m;
5858         void *headers_v;
5859         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5860         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5861         char *vni_m;
5862         char *vni_v;
5863         uint16_t dport;
5864         int size;
5865         int i;
5866
5867         if (inner) {
5868                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5869                                          inner_headers);
5870                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5871         } else {
5872                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5873                                          outer_headers);
5874                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5875         }
5876         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5877                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5878         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5879                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5880                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5881         }
5882         if (!vxlan_v)
5883                 return;
5884         if (!vxlan_m)
5885                 vxlan_m = &rte_flow_item_vxlan_mask;
5886         size = sizeof(vxlan_m->vni);
5887         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5888         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5889         memcpy(vni_m, vxlan_m->vni, size);
5890         for (i = 0; i < size; ++i)
5891                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5892 }
5893
5894 /**
5895  * Add VXLAN-GPE item to matcher and to the value.
5896  *
5897  * @param[in, out] matcher
5898  *   Flow matcher.
5899  * @param[in, out] key
5900  *   Flow matcher value.
5901  * @param[in] item
5902  *   Flow pattern to translate.
5903  * @param[in] inner
5904  *   Item is inner pattern.
5905  */
5906
5907 static void
5908 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
5909                                  const struct rte_flow_item *item, int inner)
5910 {
5911         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
5912         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
5913         void *headers_m;
5914         void *headers_v;
5915         void *misc_m =
5916                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
5917         void *misc_v =
5918                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
5919         char *vni_m;
5920         char *vni_v;
5921         uint16_t dport;
5922         int size;
5923         int i;
5924         uint8_t flags_m = 0xff;
5925         uint8_t flags_v = 0xc;
5926
5927         if (inner) {
5928                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5929                                          inner_headers);
5930                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5931         } else {
5932                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5933                                          outer_headers);
5934                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5935         }
5936         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5937                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5938         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5939                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5940                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5941         }
5942         if (!vxlan_v)
5943                 return;
5944         if (!vxlan_m)
5945                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
5946         size = sizeof(vxlan_m->vni);
5947         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
5948         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
5949         memcpy(vni_m, vxlan_m->vni, size);
5950         for (i = 0; i < size; ++i)
5951                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5952         if (vxlan_m->flags) {
5953                 flags_m = vxlan_m->flags;
5954                 flags_v = vxlan_v->flags;
5955         }
5956         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
5957         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
5958         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
5959                  vxlan_m->protocol);
5960         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
5961                  vxlan_v->protocol);
5962 }
5963
5964 /**
5965  * Add Geneve item to matcher and to the value.
5966  *
5967  * @param[in, out] matcher
5968  *   Flow matcher.
5969  * @param[in, out] key
5970  *   Flow matcher value.
5971  * @param[in] item
5972  *   Flow pattern to translate.
5973  * @param[in] inner
5974  *   Item is inner pattern.
5975  */
5976
5977 static void
5978 flow_dv_translate_item_geneve(void *matcher, void *key,
5979                               const struct rte_flow_item *item, int inner)
5980 {
5981         const struct rte_flow_item_geneve *geneve_m = item->mask;
5982         const struct rte_flow_item_geneve *geneve_v = item->spec;
5983         void *headers_m;
5984         void *headers_v;
5985         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5986         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5987         uint16_t dport;
5988         uint16_t gbhdr_m;
5989         uint16_t gbhdr_v;
5990         char *vni_m;
5991         char *vni_v;
5992         size_t size, i;
5993
5994         if (inner) {
5995                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5996                                          inner_headers);
5997                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5998         } else {
5999                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6000                                          outer_headers);
6001                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6002         }
6003         dport = MLX5_UDP_PORT_GENEVE;
6004         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6005                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6006                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6007         }
6008         if (!geneve_v)
6009                 return;
6010         if (!geneve_m)
6011                 geneve_m = &rte_flow_item_geneve_mask;
6012         size = sizeof(geneve_m->vni);
6013         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
6014         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
6015         memcpy(vni_m, geneve_m->vni, size);
6016         for (i = 0; i < size; ++i)
6017                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
6018         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
6019                  rte_be_to_cpu_16(geneve_m->protocol));
6020         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
6021                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
6022         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
6023         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
6024         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
6025                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6026         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
6027                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6028         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
6029                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6030         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
6031                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
6032                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6033 }
6034
6035 /**
6036  * Add MPLS item to matcher and to the value.
6037  *
6038  * @param[in, out] matcher
6039  *   Flow matcher.
6040  * @param[in, out] key
6041  *   Flow matcher value.
6042  * @param[in] item
6043  *   Flow pattern to translate.
6044  * @param[in] prev_layer
6045  *   The protocol layer indicated in previous item.
6046  * @param[in] inner
6047  *   Item is inner pattern.
6048  */
6049 static void
6050 flow_dv_translate_item_mpls(void *matcher, void *key,
6051                             const struct rte_flow_item *item,
6052                             uint64_t prev_layer,
6053                             int inner)
6054 {
6055         const uint32_t *in_mpls_m = item->mask;
6056         const uint32_t *in_mpls_v = item->spec;
6057         uint32_t *out_mpls_m = 0;
6058         uint32_t *out_mpls_v = 0;
6059         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6060         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6061         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
6062                                      misc_parameters_2);
6063         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6064         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
6065         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6066
6067         switch (prev_layer) {
6068         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6069                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
6070                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
6071                          MLX5_UDP_PORT_MPLS);
6072                 break;
6073         case MLX5_FLOW_LAYER_GRE:
6074                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
6075                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
6076                          RTE_ETHER_TYPE_MPLS);
6077                 break;
6078         default:
6079                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6080                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6081                          IPPROTO_MPLS);
6082                 break;
6083         }
6084         if (!in_mpls_v)
6085                 return;
6086         if (!in_mpls_m)
6087                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
6088         switch (prev_layer) {
6089         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6090                 out_mpls_m =
6091                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6092                                                  outer_first_mpls_over_udp);
6093                 out_mpls_v =
6094                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6095                                                  outer_first_mpls_over_udp);
6096                 break;
6097         case MLX5_FLOW_LAYER_GRE:
6098                 out_mpls_m =
6099                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6100                                                  outer_first_mpls_over_gre);
6101                 out_mpls_v =
6102                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6103                                                  outer_first_mpls_over_gre);
6104                 break;
6105         default:
6106                 /* Inner MPLS not over GRE is not supported. */
6107                 if (!inner) {
6108                         out_mpls_m =
6109                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6110                                                          misc2_m,
6111                                                          outer_first_mpls);
6112                         out_mpls_v =
6113                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6114                                                          misc2_v,
6115                                                          outer_first_mpls);
6116                 }
6117                 break;
6118         }
6119         if (out_mpls_m && out_mpls_v) {
6120                 *out_mpls_m = *in_mpls_m;
6121                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
6122         }
6123 }
6124
6125 /**
6126  * Add metadata register item to matcher
6127  *
6128  * @param[in, out] matcher
6129  *   Flow matcher.
6130  * @param[in, out] key
6131  *   Flow matcher value.
6132  * @param[in] reg_type
6133  *   Type of device metadata register
6134  * @param[in] value
6135  *   Register value
6136  * @param[in] mask
6137  *   Register mask
6138  */
6139 static void
6140 flow_dv_match_meta_reg(void *matcher, void *key,
6141                        enum modify_reg reg_type,
6142                        uint32_t data, uint32_t mask)
6143 {
6144         void *misc2_m =
6145                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
6146         void *misc2_v =
6147                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6148         uint32_t temp;
6149
6150         data &= mask;
6151         switch (reg_type) {
6152         case REG_A:
6153                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
6154                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
6155                 break;
6156         case REG_B:
6157                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
6158                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
6159                 break;
6160         case REG_C_0:
6161                 /*
6162                  * The metadata register C0 field might be divided into
6163                  * source vport index and META item value, we should set
6164                  * this field according to specified mask, not as whole one.
6165                  */
6166                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
6167                 temp |= mask;
6168                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
6169                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
6170                 temp &= ~mask;
6171                 temp |= data;
6172                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
6173                 break;
6174         case REG_C_1:
6175                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
6176                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
6177                 break;
6178         case REG_C_2:
6179                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
6180                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
6181                 break;
6182         case REG_C_3:
6183                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6184                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6185                 break;
6186         case REG_C_4:
6187                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6188                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6189                 break;
6190         case REG_C_5:
6191                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6192                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6193                 break;
6194         case REG_C_6:
6195                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6196                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6197                 break;
6198         case REG_C_7:
6199                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6200                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6201                 break;
6202         default:
6203                 MLX5_ASSERT(false);
6204                 break;
6205         }
6206 }
6207
6208 /**
6209  * Add MARK item to matcher
6210  *
6211  * @param[in] dev
6212  *   The device to configure through.
6213  * @param[in, out] matcher
6214  *   Flow matcher.
6215  * @param[in, out] key
6216  *   Flow matcher value.
6217  * @param[in] item
6218  *   Flow pattern to translate.
6219  */
6220 static void
6221 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6222                             void *matcher, void *key,
6223                             const struct rte_flow_item *item)
6224 {
6225         struct mlx5_priv *priv = dev->data->dev_private;
6226         const struct rte_flow_item_mark *mark;
6227         uint32_t value;
6228         uint32_t mask;
6229
6230         mark = item->mask ? (const void *)item->mask :
6231                             &rte_flow_item_mark_mask;
6232         mask = mark->id & priv->sh->dv_mark_mask;
6233         mark = (const void *)item->spec;
6234         MLX5_ASSERT(mark);
6235         value = mark->id & priv->sh->dv_mark_mask & mask;
6236         if (mask) {
6237                 enum modify_reg reg;
6238
6239                 /* Get the metadata register index for the mark. */
6240                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6241                 MLX5_ASSERT(reg > 0);
6242                 if (reg == REG_C_0) {
6243                         struct mlx5_priv *priv = dev->data->dev_private;
6244                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6245                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6246
6247                         mask &= msk_c0;
6248                         mask <<= shl_c0;
6249                         value <<= shl_c0;
6250                 }
6251                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6252         }
6253 }
6254
6255 /**
6256  * Add META item to matcher
6257  *
6258  * @param[in] dev
6259  *   The devich to configure through.
6260  * @param[in, out] matcher
6261  *   Flow matcher.
6262  * @param[in, out] key
6263  *   Flow matcher value.
6264  * @param[in] attr
6265  *   Attributes of flow that includes this item.
6266  * @param[in] item
6267  *   Flow pattern to translate.
6268  */
6269 static void
6270 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6271                             void *matcher, void *key,
6272                             const struct rte_flow_attr *attr,
6273                             const struct rte_flow_item *item)
6274 {
6275         const struct rte_flow_item_meta *meta_m;
6276         const struct rte_flow_item_meta *meta_v;
6277
6278         meta_m = (const void *)item->mask;
6279         if (!meta_m)
6280                 meta_m = &rte_flow_item_meta_mask;
6281         meta_v = (const void *)item->spec;
6282         if (meta_v) {
6283                 int reg;
6284                 uint32_t value = meta_v->data;
6285                 uint32_t mask = meta_m->data;
6286
6287                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6288                 if (reg < 0)
6289                         return;
6290                 /*
6291                  * In datapath code there is no endianness
6292                  * coversions for perfromance reasons, all
6293                  * pattern conversions are done in rte_flow.
6294                  */
6295                 value = rte_cpu_to_be_32(value);
6296                 mask = rte_cpu_to_be_32(mask);
6297                 if (reg == REG_C_0) {
6298                         struct mlx5_priv *priv = dev->data->dev_private;
6299                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6300                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6301 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6302                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6303
6304                         value >>= shr_c0;
6305                         mask >>= shr_c0;
6306 #endif
6307                         value <<= shl_c0;
6308                         mask <<= shl_c0;
6309                         MLX5_ASSERT(msk_c0);
6310                         MLX5_ASSERT(!(~msk_c0 & mask));
6311                 }
6312                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6313         }
6314 }
6315
6316 /**
6317  * Add vport metadata Reg C0 item to matcher
6318  *
6319  * @param[in, out] matcher
6320  *   Flow matcher.
6321  * @param[in, out] key
6322  *   Flow matcher value.
6323  * @param[in] reg
6324  *   Flow pattern to translate.
6325  */
6326 static void
6327 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6328                                   uint32_t value, uint32_t mask)
6329 {
6330         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6331 }
6332
6333 /**
6334  * Add tag item to matcher
6335  *
6336  * @param[in] dev
6337  *   The devich to configure through.
6338  * @param[in, out] matcher
6339  *   Flow matcher.
6340  * @param[in, out] key
6341  *   Flow matcher value.
6342  * @param[in] item
6343  *   Flow pattern to translate.
6344  */
6345 static void
6346 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6347                                 void *matcher, void *key,
6348                                 const struct rte_flow_item *item)
6349 {
6350         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6351         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6352         uint32_t mask, value;
6353
6354         MLX5_ASSERT(tag_v);
6355         value = tag_v->data;
6356         mask = tag_m ? tag_m->data : UINT32_MAX;
6357         if (tag_v->id == REG_C_0) {
6358                 struct mlx5_priv *priv = dev->data->dev_private;
6359                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6360                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6361
6362                 mask &= msk_c0;
6363                 mask <<= shl_c0;
6364                 value <<= shl_c0;
6365         }
6366         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6367 }
6368
6369 /**
6370  * Add TAG item to matcher
6371  *
6372  * @param[in] dev
6373  *   The devich to configure through.
6374  * @param[in, out] matcher
6375  *   Flow matcher.
6376  * @param[in, out] key
6377  *   Flow matcher value.
6378  * @param[in] item
6379  *   Flow pattern to translate.
6380  */
6381 static void
6382 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6383                            void *matcher, void *key,
6384                            const struct rte_flow_item *item)
6385 {
6386         const struct rte_flow_item_tag *tag_v = item->spec;
6387         const struct rte_flow_item_tag *tag_m = item->mask;
6388         enum modify_reg reg;
6389
6390         MLX5_ASSERT(tag_v);
6391         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6392         /* Get the metadata register index for the tag. */
6393         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6394         MLX5_ASSERT(reg > 0);
6395         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6396 }
6397
6398 /**
6399  * Add source vport match to the specified matcher.
6400  *
6401  * @param[in, out] matcher
6402  *   Flow matcher.
6403  * @param[in, out] key
6404  *   Flow matcher value.
6405  * @param[in] port
6406  *   Source vport value to match
6407  * @param[in] mask
6408  *   Mask
6409  */
6410 static void
6411 flow_dv_translate_item_source_vport(void *matcher, void *key,
6412                                     int16_t port, uint16_t mask)
6413 {
6414         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6415         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6416
6417         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6418         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6419 }
6420
6421 /**
6422  * Translate port-id item to eswitch match on  port-id.
6423  *
6424  * @param[in] dev
6425  *   The devich to configure through.
6426  * @param[in, out] matcher
6427  *   Flow matcher.
6428  * @param[in, out] key
6429  *   Flow matcher value.
6430  * @param[in] item
6431  *   Flow pattern to translate.
6432  *
6433  * @return
6434  *   0 on success, a negative errno value otherwise.
6435  */
6436 static int
6437 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6438                                void *key, const struct rte_flow_item *item)
6439 {
6440         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6441         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6442         struct mlx5_priv *priv;
6443         uint16_t mask, id;
6444
6445         mask = pid_m ? pid_m->id : 0xffff;
6446         id = pid_v ? pid_v->id : dev->data->port_id;
6447         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6448         if (!priv)
6449                 return -rte_errno;
6450         /* Translate to vport field or to metadata, depending on mode. */
6451         if (priv->vport_meta_mask)
6452                 flow_dv_translate_item_meta_vport(matcher, key,
6453                                                   priv->vport_meta_tag,
6454                                                   priv->vport_meta_mask);
6455         else
6456                 flow_dv_translate_item_source_vport(matcher, key,
6457                                                     priv->vport_id, mask);
6458         return 0;
6459 }
6460
6461 /**
6462  * Add ICMP6 item to matcher and to the value.
6463  *
6464  * @param[in, out] matcher
6465  *   Flow matcher.
6466  * @param[in, out] key
6467  *   Flow matcher value.
6468  * @param[in] item
6469  *   Flow pattern to translate.
6470  * @param[in] inner
6471  *   Item is inner pattern.
6472  */
6473 static void
6474 flow_dv_translate_item_icmp6(void *matcher, void *key,
6475                               const struct rte_flow_item *item,
6476                               int inner)
6477 {
6478         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6479         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6480         void *headers_m;
6481         void *headers_v;
6482         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6483                                      misc_parameters_3);
6484         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6485         if (inner) {
6486                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6487                                          inner_headers);
6488                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6489         } else {
6490                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6491                                          outer_headers);
6492                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6493         }
6494         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6495         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6496         if (!icmp6_v)
6497                 return;
6498         if (!icmp6_m)
6499                 icmp6_m = &rte_flow_item_icmp6_mask;
6500         /*
6501          * Force flow only to match the non-fragmented IPv6 ICMPv6 packets.
6502          * If only the protocol is specified, no need to match the frag.
6503          */
6504         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6505         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6506         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6507         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6508                  icmp6_v->type & icmp6_m->type);
6509         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6510         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6511                  icmp6_v->code & icmp6_m->code);
6512 }
6513
6514 /**
6515  * Add ICMP item to matcher and to the value.
6516  *
6517  * @param[in, out] matcher
6518  *   Flow matcher.
6519  * @param[in, out] key
6520  *   Flow matcher value.
6521  * @param[in] item
6522  *   Flow pattern to translate.
6523  * @param[in] inner
6524  *   Item is inner pattern.
6525  */
6526 static void
6527 flow_dv_translate_item_icmp(void *matcher, void *key,
6528                             const struct rte_flow_item *item,
6529                             int inner)
6530 {
6531         const struct rte_flow_item_icmp *icmp_m = item->mask;
6532         const struct rte_flow_item_icmp *icmp_v = item->spec;
6533         void *headers_m;
6534         void *headers_v;
6535         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6536                                      misc_parameters_3);
6537         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6538         if (inner) {
6539                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6540                                          inner_headers);
6541                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6542         } else {
6543                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6544                                          outer_headers);
6545                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6546         }
6547         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6548         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6549         if (!icmp_v)
6550                 return;
6551         if (!icmp_m)
6552                 icmp_m = &rte_flow_item_icmp_mask;
6553         /*
6554          * Force flow only to match the non-fragmented IPv4 ICMP packets.
6555          * If only the protocol is specified, no need to match the frag.
6556          */
6557         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6558         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6559         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6560                  icmp_m->hdr.icmp_type);
6561         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6562                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6563         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6564                  icmp_m->hdr.icmp_code);
6565         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6566                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6567 }
6568
6569 /**
6570  * Add GTP item to matcher and to the value.
6571  *
6572  * @param[in, out] matcher
6573  *   Flow matcher.
6574  * @param[in, out] key
6575  *   Flow matcher value.
6576  * @param[in] item
6577  *   Flow pattern to translate.
6578  * @param[in] inner
6579  *   Item is inner pattern.
6580  */
6581 static void
6582 flow_dv_translate_item_gtp(void *matcher, void *key,
6583                            const struct rte_flow_item *item, int inner)
6584 {
6585         const struct rte_flow_item_gtp *gtp_m = item->mask;
6586         const struct rte_flow_item_gtp *gtp_v = item->spec;
6587         void *headers_m;
6588         void *headers_v;
6589         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6590                                      misc_parameters_3);
6591         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6592         uint16_t dport = RTE_GTPU_UDP_PORT;
6593
6594         if (inner) {
6595                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6596                                          inner_headers);
6597                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6598         } else {
6599                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6600                                          outer_headers);
6601                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6602         }
6603         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6604                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6605                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6606         }
6607         if (!gtp_v)
6608                 return;
6609         if (!gtp_m)
6610                 gtp_m = &rte_flow_item_gtp_mask;
6611         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6612         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6613                  gtp_v->msg_type & gtp_m->msg_type);
6614         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6615                  rte_be_to_cpu_32(gtp_m->teid));
6616         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6617                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6618 }
6619
6620 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6621
6622 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6623         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6624                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6625
6626 /**
6627  * Calculate flow matcher enable bitmap.
6628  *
6629  * @param match_criteria
6630  *   Pointer to flow matcher criteria.
6631  *
6632  * @return
6633  *   Bitmap of enabled fields.
6634  */
6635 static uint8_t
6636 flow_dv_matcher_enable(uint32_t *match_criteria)
6637 {
6638         uint8_t match_criteria_enable;
6639
6640         match_criteria_enable =
6641                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6642                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6643         match_criteria_enable |=
6644                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6645                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6646         match_criteria_enable |=
6647                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6648                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6649         match_criteria_enable |=
6650                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6651                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6652         match_criteria_enable |=
6653                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6654                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6655         return match_criteria_enable;
6656 }
6657
6658
6659 /**
6660  * Get a flow table.
6661  *
6662  * @param[in, out] dev
6663  *   Pointer to rte_eth_dev structure.
6664  * @param[in] table_id
6665  *   Table id to use.
6666  * @param[in] egress
6667  *   Direction of the table.
6668  * @param[in] transfer
6669  *   E-Switch or NIC flow.
6670  * @param[out] error
6671  *   pointer to error structure.
6672  *
6673  * @return
6674  *   Returns tables resource based on the index, NULL in case of failed.
6675  */
6676 static struct mlx5_flow_tbl_resource *
6677 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6678                          uint32_t table_id, uint8_t egress,
6679                          uint8_t transfer,
6680                          struct rte_flow_error *error)
6681 {
6682         struct mlx5_priv *priv = dev->data->dev_private;
6683         struct mlx5_ibv_shared *sh = priv->sh;
6684         struct mlx5_flow_tbl_resource *tbl;
6685         union mlx5_flow_tbl_key table_key = {
6686                 {
6687                         .table_id = table_id,
6688                         .reserved = 0,
6689                         .domain = !!transfer,
6690                         .direction = !!egress,
6691                 }
6692         };
6693         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6694                                                          table_key.v64);
6695         struct mlx5_flow_tbl_data_entry *tbl_data;
6696         int ret;
6697         void *domain;
6698
6699         if (pos) {
6700                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6701                                         entry);
6702                 tbl = &tbl_data->tbl;
6703                 rte_atomic32_inc(&tbl->refcnt);
6704                 return tbl;
6705         }
6706         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6707         if (!tbl_data) {
6708                 rte_flow_error_set(error, ENOMEM,
6709                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6710                                    NULL,
6711                                    "cannot allocate flow table data entry");
6712                 return NULL;
6713         }
6714         tbl = &tbl_data->tbl;
6715         pos = &tbl_data->entry;
6716         if (transfer)
6717                 domain = sh->fdb_domain;
6718         else if (egress)
6719                 domain = sh->tx_domain;
6720         else
6721                 domain = sh->rx_domain;
6722         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6723         if (!tbl->obj) {
6724                 rte_flow_error_set(error, ENOMEM,
6725                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6726                                    NULL, "cannot create flow table object");
6727                 rte_free(tbl_data);
6728                 return NULL;
6729         }
6730         /*
6731          * No multi-threads now, but still better to initialize the reference
6732          * count before insert it into the hash list.
6733          */
6734         rte_atomic32_init(&tbl->refcnt);
6735         /* Jump action reference count is initialized here. */
6736         rte_atomic32_init(&tbl_data->jump.refcnt);
6737         pos->key = table_key.v64;
6738         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6739         if (ret < 0) {
6740                 rte_flow_error_set(error, -ret,
6741                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6742                                    "cannot insert flow table data entry");
6743                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6744                 rte_free(tbl_data);
6745         }
6746         rte_atomic32_inc(&tbl->refcnt);
6747         return tbl;
6748 }
6749
6750 /**
6751  * Release a flow table.
6752  *
6753  * @param[in] dev
6754  *   Pointer to rte_eth_dev structure.
6755  * @param[in] tbl
6756  *   Table resource to be released.
6757  *
6758  * @return
6759  *   Returns 0 if table was released, else return 1;
6760  */
6761 static int
6762 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6763                              struct mlx5_flow_tbl_resource *tbl)
6764 {
6765         struct mlx5_priv *priv = dev->data->dev_private;
6766         struct mlx5_ibv_shared *sh = priv->sh;
6767         struct mlx5_flow_tbl_data_entry *tbl_data =
6768                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6769
6770         if (!tbl)
6771                 return 0;
6772         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6773                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6774
6775                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6776                 tbl->obj = NULL;
6777                 /* remove the entry from the hash list and free memory. */
6778                 mlx5_hlist_remove(sh->flow_tbls, pos);
6779                 rte_free(tbl_data);
6780                 return 0;
6781         }
6782         return 1;
6783 }
6784
6785 /**
6786  * Register the flow matcher.
6787  *
6788  * @param[in, out] dev
6789  *   Pointer to rte_eth_dev structure.
6790  * @param[in, out] matcher
6791  *   Pointer to flow matcher.
6792  * @param[in, out] key
6793  *   Pointer to flow table key.
6794  * @parm[in, out] dev_flow
6795  *   Pointer to the dev_flow.
6796  * @param[out] error
6797  *   pointer to error structure.
6798  *
6799  * @return
6800  *   0 on success otherwise -errno and errno is set.
6801  */
6802 static int
6803 flow_dv_matcher_register(struct rte_eth_dev *dev,
6804                          struct mlx5_flow_dv_matcher *matcher,
6805                          union mlx5_flow_tbl_key *key,
6806                          struct mlx5_flow *dev_flow,
6807                          struct rte_flow_error *error)
6808 {
6809         struct mlx5_priv *priv = dev->data->dev_private;
6810         struct mlx5_ibv_shared *sh = priv->sh;
6811         struct mlx5_flow_dv_matcher *cache_matcher;
6812         struct mlx5dv_flow_matcher_attr dv_attr = {
6813                 .type = IBV_FLOW_ATTR_NORMAL,
6814                 .match_mask = (void *)&matcher->mask,
6815         };
6816         struct mlx5_flow_tbl_resource *tbl;
6817         struct mlx5_flow_tbl_data_entry *tbl_data;
6818
6819         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6820                                        key->domain, error);
6821         if (!tbl)
6822                 return -rte_errno;      /* No need to refill the error info */
6823         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6824         /* Lookup from cache. */
6825         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6826                 if (matcher->crc == cache_matcher->crc &&
6827                     matcher->priority == cache_matcher->priority &&
6828                     !memcmp((const void *)matcher->mask.buf,
6829                             (const void *)cache_matcher->mask.buf,
6830                             cache_matcher->mask.size)) {
6831                         DRV_LOG(DEBUG,
6832                                 "%s group %u priority %hd use %s "
6833                                 "matcher %p: refcnt %d++",
6834                                 key->domain ? "FDB" : "NIC", key->table_id,
6835                                 cache_matcher->priority,
6836                                 key->direction ? "tx" : "rx",
6837                                 (void *)cache_matcher,
6838                                 rte_atomic32_read(&cache_matcher->refcnt));
6839                         rte_atomic32_inc(&cache_matcher->refcnt);
6840                         dev_flow->dv.matcher = cache_matcher;
6841                         /* old matcher should not make the table ref++. */
6842                         flow_dv_tbl_resource_release(dev, tbl);
6843                         return 0;
6844                 }
6845         }
6846         /* Register new matcher. */
6847         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6848         if (!cache_matcher) {
6849                 flow_dv_tbl_resource_release(dev, tbl);
6850                 return rte_flow_error_set(error, ENOMEM,
6851                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6852                                           "cannot allocate matcher memory");
6853         }
6854         *cache_matcher = *matcher;
6855         dv_attr.match_criteria_enable =
6856                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6857         dv_attr.priority = matcher->priority;
6858         if (key->direction)
6859                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6860         cache_matcher->matcher_object =
6861                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6862         if (!cache_matcher->matcher_object) {
6863                 rte_free(cache_matcher);
6864 #ifdef HAVE_MLX5DV_DR
6865                 flow_dv_tbl_resource_release(dev, tbl);
6866 #endif
6867                 return rte_flow_error_set(error, ENOMEM,
6868                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6869                                           NULL, "cannot create matcher");
6870         }
6871         /* Save the table information */
6872         cache_matcher->tbl = tbl;
6873         rte_atomic32_init(&cache_matcher->refcnt);
6874         /* only matcher ref++, table ref++ already done above in get API. */
6875         rte_atomic32_inc(&cache_matcher->refcnt);
6876         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6877         dev_flow->dv.matcher = cache_matcher;
6878         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6879                 key->domain ? "FDB" : "NIC", key->table_id,
6880                 cache_matcher->priority,
6881                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6882                 rte_atomic32_read(&cache_matcher->refcnt));
6883         return 0;
6884 }
6885
6886 /**
6887  * Find existing tag resource or create and register a new one.
6888  *
6889  * @param dev[in, out]
6890  *   Pointer to rte_eth_dev structure.
6891  * @param[in, out] tag_be24
6892  *   Tag value in big endian then R-shift 8.
6893  * @parm[in, out] dev_flow
6894  *   Pointer to the dev_flow.
6895  * @param[out] error
6896  *   pointer to error structure.
6897  *
6898  * @return
6899  *   0 on success otherwise -errno and errno is set.
6900  */
6901 static int
6902 flow_dv_tag_resource_register
6903                         (struct rte_eth_dev *dev,
6904                          uint32_t tag_be24,
6905                          struct mlx5_flow *dev_flow,
6906                          struct rte_flow_error *error)
6907 {
6908         struct mlx5_priv *priv = dev->data->dev_private;
6909         struct mlx5_ibv_shared *sh = priv->sh;
6910         struct mlx5_flow_dv_tag_resource *cache_resource;
6911         struct mlx5_hlist_entry *entry;
6912
6913         /* Lookup a matching resource from cache. */
6914         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6915         if (entry) {
6916                 cache_resource = container_of
6917                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6918                 rte_atomic32_inc(&cache_resource->refcnt);
6919                 dev_flow->dv.tag_resource = cache_resource;
6920                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6921                         (void *)cache_resource,
6922                         rte_atomic32_read(&cache_resource->refcnt));
6923                 return 0;
6924         }
6925         /* Register new resource. */
6926         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6927         if (!cache_resource)
6928                 return rte_flow_error_set(error, ENOMEM,
6929                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6930                                           "cannot allocate resource memory");
6931         cache_resource->entry.key = (uint64_t)tag_be24;
6932         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6933         if (!cache_resource->action) {
6934                 rte_free(cache_resource);
6935                 return rte_flow_error_set(error, ENOMEM,
6936                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6937                                           NULL, "cannot create action");
6938         }
6939         rte_atomic32_init(&cache_resource->refcnt);
6940         rte_atomic32_inc(&cache_resource->refcnt);
6941         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6942                 mlx5_glue->destroy_flow_action(cache_resource->action);
6943                 rte_free(cache_resource);
6944                 return rte_flow_error_set(error, EEXIST,
6945                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6946                                           NULL, "cannot insert tag");
6947         }
6948         dev_flow->dv.tag_resource = cache_resource;
6949         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6950                 (void *)cache_resource,
6951                 rte_atomic32_read(&cache_resource->refcnt));
6952         return 0;
6953 }
6954
6955 /**
6956  * Release the tag.
6957  *
6958  * @param dev
6959  *   Pointer to Ethernet device.
6960  * @param flow
6961  *   Pointer to mlx5_flow.
6962  *
6963  * @return
6964  *   1 while a reference on it exists, 0 when freed.
6965  */
6966 static int
6967 flow_dv_tag_release(struct rte_eth_dev *dev,
6968                     struct mlx5_flow_dv_tag_resource *tag)
6969 {
6970         struct mlx5_priv *priv = dev->data->dev_private;
6971         struct mlx5_ibv_shared *sh = priv->sh;
6972
6973         MLX5_ASSERT(tag);
6974         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6975                 dev->data->port_id, (void *)tag,
6976                 rte_atomic32_read(&tag->refcnt));
6977         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6978                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6979                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6980                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6981                         dev->data->port_id, (void *)tag);
6982                 rte_free(tag);
6983                 return 0;
6984         }
6985         return 1;
6986 }
6987
6988 /**
6989  * Translate port ID action to vport.
6990  *
6991  * @param[in] dev
6992  *   Pointer to rte_eth_dev structure.
6993  * @param[in] action
6994  *   Pointer to the port ID action.
6995  * @param[out] dst_port_id
6996  *   The target port ID.
6997  * @param[out] error
6998  *   Pointer to the error structure.
6999  *
7000  * @return
7001  *   0 on success, a negative errno value otherwise and rte_errno is set.
7002  */
7003 static int
7004 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
7005                                  const struct rte_flow_action *action,
7006                                  uint32_t *dst_port_id,
7007                                  struct rte_flow_error *error)
7008 {
7009         uint32_t port;
7010         struct mlx5_priv *priv;
7011         const struct rte_flow_action_port_id *conf =
7012                         (const struct rte_flow_action_port_id *)action->conf;
7013
7014         port = conf->original ? dev->data->port_id : conf->id;
7015         priv = mlx5_port_to_eswitch_info(port, false);
7016         if (!priv)
7017                 return rte_flow_error_set(error, -rte_errno,
7018                                           RTE_FLOW_ERROR_TYPE_ACTION,
7019                                           NULL,
7020                                           "No eswitch info was found for port");
7021 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
7022         /*
7023          * This parameter is transferred to
7024          * mlx5dv_dr_action_create_dest_ib_port().
7025          */
7026         *dst_port_id = priv->ibv_port;
7027 #else
7028         /*
7029          * Legacy mode, no LAG configurations is supported.
7030          * This parameter is transferred to
7031          * mlx5dv_dr_action_create_dest_vport().
7032          */
7033         *dst_port_id = priv->vport_id;
7034 #endif
7035         return 0;
7036 }
7037
7038 /**
7039  * Add Tx queue matcher
7040  *
7041  * @param[in] dev
7042  *   Pointer to the dev struct.
7043  * @param[in, out] matcher
7044  *   Flow matcher.
7045  * @param[in, out] key
7046  *   Flow matcher value.
7047  * @param[in] item
7048  *   Flow pattern to translate.
7049  * @param[in] inner
7050  *   Item is inner pattern.
7051  */
7052 static void
7053 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
7054                                 void *matcher, void *key,
7055                                 const struct rte_flow_item *item)
7056 {
7057         const struct mlx5_rte_flow_item_tx_queue *queue_m;
7058         const struct mlx5_rte_flow_item_tx_queue *queue_v;
7059         void *misc_m =
7060                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7061         void *misc_v =
7062                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7063         struct mlx5_txq_ctrl *txq;
7064         uint32_t queue;
7065
7066
7067         queue_m = (const void *)item->mask;
7068         if (!queue_m)
7069                 return;
7070         queue_v = (const void *)item->spec;
7071         if (!queue_v)
7072                 return;
7073         txq = mlx5_txq_get(dev, queue_v->queue);
7074         if (!txq)
7075                 return;
7076         queue = txq->obj->sq->id;
7077         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
7078         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
7079                  queue & queue_m->queue);
7080         mlx5_txq_release(dev, queue_v->queue);
7081 }
7082
7083 /**
7084  * Set the hash fields according to the @p flow information.
7085  *
7086  * @param[in] dev_flow
7087  *   Pointer to the mlx5_flow.
7088  */
7089 static void
7090 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
7091 {
7092         struct rte_flow *flow = dev_flow->flow;
7093         uint64_t items = dev_flow->layers;
7094         int rss_inner = 0;
7095         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
7096
7097         dev_flow->hash_fields = 0;
7098 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
7099         if (flow->rss.level >= 2) {
7100                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
7101                 rss_inner = 1;
7102         }
7103 #endif
7104         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
7105             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
7106                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
7107                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7108                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
7109                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7110                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
7111                         else
7112                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
7113                 }
7114         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
7115                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
7116                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
7117                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7118                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
7119                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7120                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
7121                         else
7122                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
7123                 }
7124         }
7125         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
7126             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
7127                 if (rss_types & ETH_RSS_UDP) {
7128                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7129                                 dev_flow->hash_fields |=
7130                                                 IBV_RX_HASH_SRC_PORT_UDP;
7131                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7132                                 dev_flow->hash_fields |=
7133                                                 IBV_RX_HASH_DST_PORT_UDP;
7134                         else
7135                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
7136                 }
7137         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
7138                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
7139                 if (rss_types & ETH_RSS_TCP) {
7140                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7141                                 dev_flow->hash_fields |=
7142                                                 IBV_RX_HASH_SRC_PORT_TCP;
7143                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7144                                 dev_flow->hash_fields |=
7145                                                 IBV_RX_HASH_DST_PORT_TCP;
7146                         else
7147                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
7148                 }
7149         }
7150 }
7151
7152 /**
7153  * Fill the flow with DV spec, lock free
7154  * (mutex should be acquired by caller).
7155  *
7156  * @param[in] dev
7157  *   Pointer to rte_eth_dev structure.
7158  * @param[in, out] dev_flow
7159  *   Pointer to the sub flow.
7160  * @param[in] attr
7161  *   Pointer to the flow attributes.
7162  * @param[in] items
7163  *   Pointer to the list of items.
7164  * @param[in] actions
7165  *   Pointer to the list of actions.
7166  * @param[out] error
7167  *   Pointer to the error structure.
7168  *
7169  * @return
7170  *   0 on success, a negative errno value otherwise and rte_errno is set.
7171  */
7172 static int
7173 __flow_dv_translate(struct rte_eth_dev *dev,
7174                     struct mlx5_flow *dev_flow,
7175                     const struct rte_flow_attr *attr,
7176                     const struct rte_flow_item items[],
7177                     const struct rte_flow_action actions[],
7178                     struct rte_flow_error *error)
7179 {
7180         struct mlx5_priv *priv = dev->data->dev_private;
7181         struct mlx5_dev_config *dev_conf = &priv->config;
7182         struct rte_flow *flow = dev_flow->flow;
7183         uint64_t item_flags = 0;
7184         uint64_t last_item = 0;
7185         uint64_t action_flags = 0;
7186         uint64_t priority = attr->priority;
7187         struct mlx5_flow_dv_matcher matcher = {
7188                 .mask = {
7189                         .size = sizeof(matcher.mask.buf),
7190                 },
7191         };
7192         int actions_n = 0;
7193         bool actions_end = false;
7194         union {
7195                 struct mlx5_flow_dv_modify_hdr_resource res;
7196                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7197                             sizeof(struct mlx5_modification_cmd) *
7198                             (MLX5_MAX_MODIFY_NUM + 1)];
7199         } mhdr_dummy;
7200         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7201         union flow_dv_attr flow_attr = { .attr = 0 };
7202         uint32_t tag_be;
7203         union mlx5_flow_tbl_key tbl_key;
7204         uint32_t modify_action_position = UINT32_MAX;
7205         void *match_mask = matcher.mask.buf;
7206         void *match_value = dev_flow->dv.value.buf;
7207         uint8_t next_protocol = 0xff;
7208         struct rte_vlan_hdr vlan = { 0 };
7209         uint32_t table;
7210         int ret = 0;
7211
7212         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7213                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7214         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7215                                        !!priv->fdb_def_rule, &table, error);
7216         if (ret)
7217                 return ret;
7218         dev_flow->group = table;
7219         if (attr->transfer)
7220                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7221         if (priority == MLX5_FLOW_PRIO_RSVD)
7222                 priority = dev_conf->flow_prio - 1;
7223         /* number of actions must be set to 0 in case of dirty stack. */
7224         mhdr_res->actions_num = 0;
7225         for (; !actions_end ; actions++) {
7226                 const struct rte_flow_action_queue *queue;
7227                 const struct rte_flow_action_rss *rss;
7228                 const struct rte_flow_action *action = actions;
7229                 const struct rte_flow_action_count *count = action->conf;
7230                 const uint8_t *rss_key;
7231                 const struct rte_flow_action_jump *jump_data;
7232                 const struct rte_flow_action_meter *mtr;
7233                 struct mlx5_flow_tbl_resource *tbl;
7234                 uint32_t port_id = 0;
7235                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7236                 int action_type = actions->type;
7237                 const struct rte_flow_action *found_action = NULL;
7238
7239                 switch (action_type) {
7240                 case RTE_FLOW_ACTION_TYPE_VOID:
7241                         break;
7242                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7243                         if (flow_dv_translate_action_port_id(dev, action,
7244                                                              &port_id, error))
7245                                 return -rte_errno;
7246                         port_id_resource.port_id = port_id;
7247                         if (flow_dv_port_id_action_resource_register
7248                             (dev, &port_id_resource, dev_flow, error))
7249                                 return -rte_errno;
7250                         dev_flow->dv.actions[actions_n++] =
7251                                 dev_flow->dv.port_id_action->action;
7252                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7253                         break;
7254                 case RTE_FLOW_ACTION_TYPE_FLAG:
7255                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7256                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7257                                 struct rte_flow_action_mark mark = {
7258                                         .id = MLX5_FLOW_MARK_DEFAULT,
7259                                 };
7260
7261                                 if (flow_dv_convert_action_mark(dev, &mark,
7262                                                                 mhdr_res,
7263                                                                 error))
7264                                         return -rte_errno;
7265                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7266                                 break;
7267                         }
7268                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7269                         if (!dev_flow->dv.tag_resource)
7270                                 if (flow_dv_tag_resource_register
7271                                     (dev, tag_be, dev_flow, error))
7272                                         return -rte_errno;
7273                         dev_flow->dv.actions[actions_n++] =
7274                                 dev_flow->dv.tag_resource->action;
7275                         break;
7276                 case RTE_FLOW_ACTION_TYPE_MARK:
7277                         action_flags |= MLX5_FLOW_ACTION_MARK;
7278                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7279                                 const struct rte_flow_action_mark *mark =
7280                                         (const struct rte_flow_action_mark *)
7281                                                 actions->conf;
7282
7283                                 if (flow_dv_convert_action_mark(dev, mark,
7284                                                                 mhdr_res,
7285                                                                 error))
7286                                         return -rte_errno;
7287                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7288                                 break;
7289                         }
7290                         /* Fall-through */
7291                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7292                         /* Legacy (non-extensive) MARK action. */
7293                         tag_be = mlx5_flow_mark_set
7294                               (((const struct rte_flow_action_mark *)
7295                                (actions->conf))->id);
7296                         if (!dev_flow->dv.tag_resource)
7297                                 if (flow_dv_tag_resource_register
7298                                     (dev, tag_be, dev_flow, error))
7299                                         return -rte_errno;
7300                         dev_flow->dv.actions[actions_n++] =
7301                                 dev_flow->dv.tag_resource->action;
7302                         break;
7303                 case RTE_FLOW_ACTION_TYPE_SET_META:
7304                         if (flow_dv_convert_action_set_meta
7305                                 (dev, mhdr_res, attr,
7306                                  (const struct rte_flow_action_set_meta *)
7307                                   actions->conf, error))
7308                                 return -rte_errno;
7309                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7310                         break;
7311                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7312                         if (flow_dv_convert_action_set_tag
7313                                 (dev, mhdr_res,
7314                                  (const struct rte_flow_action_set_tag *)
7315                                   actions->conf, error))
7316                                 return -rte_errno;
7317                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7318                         break;
7319                 case RTE_FLOW_ACTION_TYPE_DROP:
7320                         action_flags |= MLX5_FLOW_ACTION_DROP;
7321                         break;
7322                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7323                         MLX5_ASSERT(flow->rss.queue);
7324                         queue = actions->conf;
7325                         flow->rss.queue_num = 1;
7326                         (*flow->rss.queue)[0] = queue->index;
7327                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7328                         break;
7329                 case RTE_FLOW_ACTION_TYPE_RSS:
7330                         MLX5_ASSERT(flow->rss.queue);
7331                         rss = actions->conf;
7332                         if (flow->rss.queue)
7333                                 memcpy((*flow->rss.queue), rss->queue,
7334                                        rss->queue_num * sizeof(uint16_t));
7335                         flow->rss.queue_num = rss->queue_num;
7336                         /* NULL RSS key indicates default RSS key. */
7337                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7338                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7339                         /*
7340                          * rss->level and rss.types should be set in advance
7341                          * when expanding items for RSS.
7342                          */
7343                         action_flags |= MLX5_FLOW_ACTION_RSS;
7344                         break;
7345                 case RTE_FLOW_ACTION_TYPE_COUNT:
7346                         if (!dev_conf->devx) {
7347                                 rte_errno = ENOTSUP;
7348                                 goto cnt_err;
7349                         }
7350                         flow->counter = flow_dv_counter_alloc(dev,
7351                                                               count->shared,
7352                                                               count->id,
7353                                                               dev_flow->group);
7354                         if (flow->counter == NULL)
7355                                 goto cnt_err;
7356                         dev_flow->dv.actions[actions_n++] =
7357                                 flow->counter->action;
7358                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7359                         break;
7360 cnt_err:
7361                         if (rte_errno == ENOTSUP)
7362                                 return rte_flow_error_set
7363                                               (error, ENOTSUP,
7364                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7365                                                NULL,
7366                                                "count action not supported");
7367                         else
7368                                 return rte_flow_error_set
7369                                                 (error, rte_errno,
7370                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7371                                                  action,
7372                                                  "cannot create counter"
7373                                                   " object.");
7374                         break;
7375                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7376                         dev_flow->dv.actions[actions_n++] =
7377                                                 priv->sh->pop_vlan_action;
7378                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7379                         break;
7380                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7381                         flow_dev_get_vlan_info_from_items(items, &vlan);
7382                         vlan.eth_proto = rte_be_to_cpu_16
7383                              ((((const struct rte_flow_action_of_push_vlan *)
7384                                                    actions->conf)->ethertype));
7385                         found_action = mlx5_flow_find_action
7386                                         (actions + 1,
7387                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7388                         if (found_action)
7389                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7390                         found_action = mlx5_flow_find_action
7391                                         (actions + 1,
7392                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7393                         if (found_action)
7394                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7395                         if (flow_dv_create_action_push_vlan
7396                                             (dev, attr, &vlan, dev_flow, error))
7397                                 return -rte_errno;
7398                         dev_flow->dv.actions[actions_n++] =
7399                                            dev_flow->dv.push_vlan_res->action;
7400                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7401                         break;
7402                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7403                         /* of_vlan_push action handled this action */
7404                         MLX5_ASSERT(action_flags &
7405                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7406                         break;
7407                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7408                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7409                                 break;
7410                         flow_dev_get_vlan_info_from_items(items, &vlan);
7411                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7412                         /* If no VLAN push - this is a modify header action */
7413                         if (flow_dv_convert_action_modify_vlan_vid
7414                                                 (mhdr_res, actions, error))
7415                                 return -rte_errno;
7416                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7417                         break;
7418                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7419                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7420                         if (flow_dv_create_action_l2_encap(dev, actions,
7421                                                            dev_flow,
7422                                                            attr->transfer,
7423                                                            error))
7424                                 return -rte_errno;
7425                         dev_flow->dv.actions[actions_n++] =
7426                                 dev_flow->dv.encap_decap->verbs_action;
7427                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7428                         break;
7429                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7430                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7431                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7432                                                            attr->transfer,
7433                                                            error))
7434                                 return -rte_errno;
7435                         dev_flow->dv.actions[actions_n++] =
7436                                 dev_flow->dv.encap_decap->verbs_action;
7437                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7438                         break;
7439                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7440                         /* Handle encap with preceding decap. */
7441                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
7442                                 if (flow_dv_create_action_raw_encap
7443                                         (dev, actions, dev_flow, attr, error))
7444                                         return -rte_errno;
7445                                 dev_flow->dv.actions[actions_n++] =
7446                                         dev_flow->dv.encap_decap->verbs_action;
7447                         } else {
7448                                 /* Handle encap without preceding decap. */
7449                                 if (flow_dv_create_action_l2_encap
7450                                     (dev, actions, dev_flow, attr->transfer,
7451                                      error))
7452                                         return -rte_errno;
7453                                 dev_flow->dv.actions[actions_n++] =
7454                                         dev_flow->dv.encap_decap->verbs_action;
7455                         }
7456                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7457                         break;
7458                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7459                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
7460                                 ;
7461                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7462                                 if (flow_dv_create_action_l2_decap
7463                                     (dev, dev_flow, attr->transfer, error))
7464                                         return -rte_errno;
7465                                 dev_flow->dv.actions[actions_n++] =
7466                                         dev_flow->dv.encap_decap->verbs_action;
7467                         }
7468                         /* If decap is followed by encap, handle it at encap. */
7469                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7470                         break;
7471                 case RTE_FLOW_ACTION_TYPE_JUMP:
7472                         jump_data = action->conf;
7473                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7474                                                        jump_data->group,
7475                                                        !!priv->fdb_def_rule,
7476                                                        &table, error);
7477                         if (ret)
7478                                 return ret;
7479                         tbl = flow_dv_tbl_resource_get(dev, table,
7480                                                        attr->egress,
7481                                                        attr->transfer, error);
7482                         if (!tbl)
7483                                 return rte_flow_error_set
7484                                                 (error, errno,
7485                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7486                                                  NULL,
7487                                                  "cannot create jump action.");
7488                         if (flow_dv_jump_tbl_resource_register
7489                             (dev, tbl, dev_flow, error)) {
7490                                 flow_dv_tbl_resource_release(dev, tbl);
7491                                 return rte_flow_error_set
7492                                                 (error, errno,
7493                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7494                                                  NULL,
7495                                                  "cannot create jump action.");
7496                         }
7497                         dev_flow->dv.actions[actions_n++] =
7498                                 dev_flow->dv.jump->action;
7499                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7500                         break;
7501                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7502                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7503                         if (flow_dv_convert_action_modify_mac
7504                                         (mhdr_res, actions, error))
7505                                 return -rte_errno;
7506                         action_flags |= actions->type ==
7507                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7508                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7509                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7510                         break;
7511                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7512                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7513                         if (flow_dv_convert_action_modify_ipv4
7514                                         (mhdr_res, actions, error))
7515                                 return -rte_errno;
7516                         action_flags |= actions->type ==
7517                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7518                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7519                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7520                         break;
7521                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7522                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7523                         if (flow_dv_convert_action_modify_ipv6
7524                                         (mhdr_res, actions, error))
7525                                 return -rte_errno;
7526                         action_flags |= actions->type ==
7527                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7528                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7529                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7530                         break;
7531                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7532                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7533                         if (flow_dv_convert_action_modify_tp
7534                                         (mhdr_res, actions, items,
7535                                          &flow_attr, dev_flow, !!(action_flags &
7536                                          MLX5_FLOW_ACTION_DECAP), error))
7537                                 return -rte_errno;
7538                         action_flags |= actions->type ==
7539                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7540                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7541                                         MLX5_FLOW_ACTION_SET_TP_DST;
7542                         break;
7543                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7544                         if (flow_dv_convert_action_modify_dec_ttl
7545                                         (mhdr_res, items, &flow_attr, dev_flow,
7546                                          !!(action_flags &
7547                                          MLX5_FLOW_ACTION_DECAP), error))
7548                                 return -rte_errno;
7549                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7550                         break;
7551                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7552                         if (flow_dv_convert_action_modify_ttl
7553                                         (mhdr_res, actions, items, &flow_attr,
7554                                          dev_flow, !!(action_flags &
7555                                          MLX5_FLOW_ACTION_DECAP), error))
7556                                 return -rte_errno;
7557                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7558                         break;
7559                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7560                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7561                         if (flow_dv_convert_action_modify_tcp_seq
7562                                         (mhdr_res, actions, error))
7563                                 return -rte_errno;
7564                         action_flags |= actions->type ==
7565                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7566                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7567                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7568                         break;
7569
7570                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7571                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7572                         if (flow_dv_convert_action_modify_tcp_ack
7573                                         (mhdr_res, actions, error))
7574                                 return -rte_errno;
7575                         action_flags |= actions->type ==
7576                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7577                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7578                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7579                         break;
7580                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7581                         if (flow_dv_convert_action_set_reg
7582                                         (mhdr_res, actions, error))
7583                                 return -rte_errno;
7584                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7585                         break;
7586                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7587                         if (flow_dv_convert_action_copy_mreg
7588                                         (dev, mhdr_res, actions, error))
7589                                 return -rte_errno;
7590                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7591                         break;
7592                 case RTE_FLOW_ACTION_TYPE_METER:
7593                         mtr = actions->conf;
7594                         if (!flow->meter) {
7595                                 flow->meter = mlx5_flow_meter_attach(priv,
7596                                                         mtr->mtr_id, attr,
7597                                                         error);
7598                                 if (!flow->meter)
7599                                         return rte_flow_error_set(error,
7600                                                 rte_errno,
7601                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7602                                                 NULL,
7603                                                 "meter not found "
7604                                                 "or invalid parameters");
7605                         }
7606                         /* Set the meter action. */
7607                         dev_flow->dv.actions[actions_n++] =
7608                                 flow->meter->mfts->meter_action;
7609                         action_flags |= MLX5_FLOW_ACTION_METER;
7610                         break;
7611                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7612                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7613                                                               actions, error))
7614                                 return -rte_errno;
7615                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7616                         break;
7617                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7618                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7619                                                               actions, error))
7620                                 return -rte_errno;
7621                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7622                         break;
7623                 case RTE_FLOW_ACTION_TYPE_END:
7624                         actions_end = true;
7625                         if (mhdr_res->actions_num) {
7626                                 /* create modify action if needed. */
7627                                 if (flow_dv_modify_hdr_resource_register
7628                                         (dev, mhdr_res, dev_flow, error))
7629                                         return -rte_errno;
7630                                 dev_flow->dv.actions[modify_action_position] =
7631                                         dev_flow->dv.modify_hdr->verbs_action;
7632                         }
7633                         break;
7634                 default:
7635                         break;
7636                 }
7637                 if (mhdr_res->actions_num &&
7638                     modify_action_position == UINT32_MAX)
7639                         modify_action_position = actions_n++;
7640         }
7641         dev_flow->dv.actions_n = actions_n;
7642         dev_flow->actions = action_flags;
7643         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7644                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7645                 int item_type = items->type;
7646
7647                 switch (item_type) {
7648                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7649                         flow_dv_translate_item_port_id(dev, match_mask,
7650                                                        match_value, items);
7651                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7652                         break;
7653                 case RTE_FLOW_ITEM_TYPE_ETH:
7654                         flow_dv_translate_item_eth(match_mask, match_value,
7655                                                    items, tunnel);
7656                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7657                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7658                                              MLX5_FLOW_LAYER_OUTER_L2;
7659                         break;
7660                 case RTE_FLOW_ITEM_TYPE_VLAN:
7661                         flow_dv_translate_item_vlan(dev_flow,
7662                                                     match_mask, match_value,
7663                                                     items, tunnel);
7664                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7665                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7666                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7667                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7668                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7669                         break;
7670                 case RTE_FLOW_ITEM_TYPE_IPV4:
7671                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7672                                                   &item_flags, &tunnel);
7673                         flow_dv_translate_item_ipv4(match_mask, match_value,
7674                                                     items, tunnel,
7675                                                     dev_flow->group);
7676                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7677                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7678                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7679                         if (items->mask != NULL &&
7680                             ((const struct rte_flow_item_ipv4 *)
7681                              items->mask)->hdr.next_proto_id) {
7682                                 next_protocol =
7683                                         ((const struct rte_flow_item_ipv4 *)
7684                                          (items->spec))->hdr.next_proto_id;
7685                                 next_protocol &=
7686                                         ((const struct rte_flow_item_ipv4 *)
7687                                          (items->mask))->hdr.next_proto_id;
7688                         } else {
7689                                 /* Reset for inner layer. */
7690                                 next_protocol = 0xff;
7691                         }
7692                         break;
7693                 case RTE_FLOW_ITEM_TYPE_IPV6:
7694                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7695                                                   &item_flags, &tunnel);
7696                         flow_dv_translate_item_ipv6(match_mask, match_value,
7697                                                     items, tunnel,
7698                                                     dev_flow->group);
7699                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7700                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7701                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7702                         if (items->mask != NULL &&
7703                             ((const struct rte_flow_item_ipv6 *)
7704                              items->mask)->hdr.proto) {
7705                                 next_protocol =
7706                                         ((const struct rte_flow_item_ipv6 *)
7707                                          items->spec)->hdr.proto;
7708                                 next_protocol &=
7709                                         ((const struct rte_flow_item_ipv6 *)
7710                                          items->mask)->hdr.proto;
7711                         } else {
7712                                 /* Reset for inner layer. */
7713                                 next_protocol = 0xff;
7714                         }
7715                         break;
7716                 case RTE_FLOW_ITEM_TYPE_TCP:
7717                         flow_dv_translate_item_tcp(match_mask, match_value,
7718                                                    items, tunnel);
7719                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7720                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7721                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7722                         break;
7723                 case RTE_FLOW_ITEM_TYPE_UDP:
7724                         flow_dv_translate_item_udp(match_mask, match_value,
7725                                                    items, tunnel);
7726                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7727                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7728                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7729                         break;
7730                 case RTE_FLOW_ITEM_TYPE_GRE:
7731                         flow_dv_translate_item_gre(match_mask, match_value,
7732                                                    items, tunnel);
7733                         matcher.priority = flow->rss.level >= 2 ?
7734                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7735                         last_item = MLX5_FLOW_LAYER_GRE;
7736                         break;
7737                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7738                         flow_dv_translate_item_gre_key(match_mask,
7739                                                        match_value, items);
7740                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7741                         break;
7742                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7743                         flow_dv_translate_item_nvgre(match_mask, match_value,
7744                                                      items, tunnel);
7745                         matcher.priority = flow->rss.level >= 2 ?
7746                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7747                         last_item = MLX5_FLOW_LAYER_GRE;
7748                         break;
7749                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7750                         flow_dv_translate_item_vxlan(match_mask, match_value,
7751                                                      items, tunnel);
7752                         matcher.priority = flow->rss.level >= 2 ?
7753                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7754                         last_item = MLX5_FLOW_LAYER_VXLAN;
7755                         break;
7756                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7757                         flow_dv_translate_item_vxlan_gpe(match_mask,
7758                                                          match_value, items,
7759                                                          tunnel);
7760                         matcher.priority = flow->rss.level >= 2 ?
7761                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7762                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7763                         break;
7764                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7765                         flow_dv_translate_item_geneve(match_mask, match_value,
7766                                                       items, tunnel);
7767                         matcher.priority = flow->rss.level >= 2 ?
7768                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7769                         last_item = MLX5_FLOW_LAYER_GENEVE;
7770                         break;
7771                 case RTE_FLOW_ITEM_TYPE_MPLS:
7772                         flow_dv_translate_item_mpls(match_mask, match_value,
7773                                                     items, last_item, tunnel);
7774                         matcher.priority = flow->rss.level >= 2 ?
7775                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7776                         last_item = MLX5_FLOW_LAYER_MPLS;
7777                         break;
7778                 case RTE_FLOW_ITEM_TYPE_MARK:
7779                         flow_dv_translate_item_mark(dev, match_mask,
7780                                                     match_value, items);
7781                         last_item = MLX5_FLOW_ITEM_MARK;
7782                         break;
7783                 case RTE_FLOW_ITEM_TYPE_META:
7784                         flow_dv_translate_item_meta(dev, match_mask,
7785                                                     match_value, attr, items);
7786                         last_item = MLX5_FLOW_ITEM_METADATA;
7787                         break;
7788                 case RTE_FLOW_ITEM_TYPE_ICMP:
7789                         flow_dv_translate_item_icmp(match_mask, match_value,
7790                                                     items, tunnel);
7791                         last_item = MLX5_FLOW_LAYER_ICMP;
7792                         break;
7793                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7794                         flow_dv_translate_item_icmp6(match_mask, match_value,
7795                                                       items, tunnel);
7796                         last_item = MLX5_FLOW_LAYER_ICMP6;
7797                         break;
7798                 case RTE_FLOW_ITEM_TYPE_TAG:
7799                         flow_dv_translate_item_tag(dev, match_mask,
7800                                                    match_value, items);
7801                         last_item = MLX5_FLOW_ITEM_TAG;
7802                         break;
7803                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7804                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7805                                                         match_value, items);
7806                         last_item = MLX5_FLOW_ITEM_TAG;
7807                         break;
7808                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7809                         flow_dv_translate_item_tx_queue(dev, match_mask,
7810                                                         match_value,
7811                                                         items);
7812                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7813                         break;
7814                 case RTE_FLOW_ITEM_TYPE_GTP:
7815                         flow_dv_translate_item_gtp(match_mask, match_value,
7816                                                    items, tunnel);
7817                         matcher.priority = flow->rss.level >= 2 ?
7818                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7819                         last_item = MLX5_FLOW_LAYER_GTP;
7820                         break;
7821                 default:
7822                         break;
7823                 }
7824                 item_flags |= last_item;
7825         }
7826         /*
7827          * When E-Switch mode is enabled, we have two cases where we need to
7828          * set the source port manually.
7829          * The first one, is in case of Nic steering rule, and the second is
7830          * E-Switch rule where no port_id item was found. In both cases
7831          * the source port is set according the current port in use.
7832          */
7833         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
7834             (priv->representor || priv->master)) {
7835                 if (flow_dv_translate_item_port_id(dev, match_mask,
7836                                                    match_value, NULL))
7837                         return -rte_errno;
7838         }
7839 #ifdef RTE_LIBRTE_MLX5_DEBUG
7840         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
7841                                               dev_flow->dv.value.buf));
7842 #endif
7843         /*
7844          * Layers may be already initialized from prefix flow if this dev_flow
7845          * is the suffix flow.
7846          */
7847         dev_flow->layers |= item_flags;
7848         if (action_flags & MLX5_FLOW_ACTION_RSS)
7849                 flow_dv_hashfields_set(dev_flow);
7850         /* Register matcher. */
7851         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7852                                     matcher.mask.size);
7853         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7854                                                      matcher.priority);
7855         /* reserved field no needs to be set to 0 here. */
7856         tbl_key.domain = attr->transfer;
7857         tbl_key.direction = attr->egress;
7858         tbl_key.table_id = dev_flow->group;
7859         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7860                 return -rte_errno;
7861         return 0;
7862 }
7863
7864 /**
7865  * Apply the flow to the NIC, lock free,
7866  * (mutex should be acquired by caller).
7867  *
7868  * @param[in] dev
7869  *   Pointer to the Ethernet device structure.
7870  * @param[in, out] flow
7871  *   Pointer to flow structure.
7872  * @param[out] error
7873  *   Pointer to error structure.
7874  *
7875  * @return
7876  *   0 on success, a negative errno value otherwise and rte_errno is set.
7877  */
7878 static int
7879 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7880                 struct rte_flow_error *error)
7881 {
7882         struct mlx5_flow_dv *dv;
7883         struct mlx5_flow *dev_flow;
7884         struct mlx5_priv *priv = dev->data->dev_private;
7885         int n;
7886         int err;
7887
7888         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7889                 dv = &dev_flow->dv;
7890                 n = dv->actions_n;
7891                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7892                         if (dev_flow->transfer) {
7893                                 dv->actions[n++] = priv->sh->esw_drop_action;
7894                         } else {
7895                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7896                                 if (!dv->hrxq) {
7897                                         rte_flow_error_set
7898                                                 (error, errno,
7899                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7900                                                  NULL,
7901                                                  "cannot get drop hash queue");
7902                                         goto error;
7903                                 }
7904                                 dv->actions[n++] = dv->hrxq->action;
7905                         }
7906                 } else if (dev_flow->actions &
7907                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7908                         struct mlx5_hrxq *hrxq;
7909
7910                         MLX5_ASSERT(flow->rss.queue);
7911                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7912                                              MLX5_RSS_HASH_KEY_LEN,
7913                                              dev_flow->hash_fields,
7914                                              (*flow->rss.queue),
7915                                              flow->rss.queue_num);
7916                         if (!hrxq) {
7917                                 hrxq = mlx5_hrxq_new
7918                                         (dev, flow->rss.key,
7919                                          MLX5_RSS_HASH_KEY_LEN,
7920                                          dev_flow->hash_fields,
7921                                          (*flow->rss.queue),
7922                                          flow->rss.queue_num,
7923                                          !!(dev_flow->layers &
7924                                             MLX5_FLOW_LAYER_TUNNEL));
7925                         }
7926                         if (!hrxq) {
7927                                 rte_flow_error_set
7928                                         (error, rte_errno,
7929                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7930                                          "cannot get hash queue");
7931                                 goto error;
7932                         }
7933                         dv->hrxq = hrxq;
7934                         dv->actions[n++] = dv->hrxq->action;
7935                 }
7936                 dv->flow =
7937                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7938                                                   (void *)&dv->value, n,
7939                                                   dv->actions);
7940                 if (!dv->flow) {
7941                         rte_flow_error_set(error, errno,
7942                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7943                                            NULL,
7944                                            "hardware refuses to create flow");
7945                         goto error;
7946                 }
7947                 if (priv->vmwa_context &&
7948                     dev_flow->dv.vf_vlan.tag &&
7949                     !dev_flow->dv.vf_vlan.created) {
7950                         /*
7951                          * The rule contains the VLAN pattern.
7952                          * For VF we are going to create VLAN
7953                          * interface to make hypervisor set correct
7954                          * e-Switch vport context.
7955                          */
7956                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7957                 }
7958         }
7959         return 0;
7960 error:
7961         err = rte_errno; /* Save rte_errno before cleanup. */
7962         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7963                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7964                 if (dv->hrxq) {
7965                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7966                                 mlx5_hrxq_drop_release(dev);
7967                         else
7968                                 mlx5_hrxq_release(dev, dv->hrxq);
7969                         dv->hrxq = NULL;
7970                 }
7971                 if (dev_flow->dv.vf_vlan.tag &&
7972                     dev_flow->dv.vf_vlan.created)
7973                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7974         }
7975         rte_errno = err; /* Restore rte_errno. */
7976         return -rte_errno;
7977 }
7978
7979 /**
7980  * Release the flow matcher.
7981  *
7982  * @param dev
7983  *   Pointer to Ethernet device.
7984  * @param flow
7985  *   Pointer to mlx5_flow.
7986  *
7987  * @return
7988  *   1 while a reference on it exists, 0 when freed.
7989  */
7990 static int
7991 flow_dv_matcher_release(struct rte_eth_dev *dev,
7992                         struct mlx5_flow *flow)
7993 {
7994         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7995
7996         MLX5_ASSERT(matcher->matcher_object);
7997         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7998                 dev->data->port_id, (void *)matcher,
7999                 rte_atomic32_read(&matcher->refcnt));
8000         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
8001                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8002                            (matcher->matcher_object));
8003                 LIST_REMOVE(matcher, next);
8004                 /* table ref-- in release interface. */
8005                 flow_dv_tbl_resource_release(dev, matcher->tbl);
8006                 rte_free(matcher);
8007                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
8008                         dev->data->port_id, (void *)matcher);
8009                 return 0;
8010         }
8011         return 1;
8012 }
8013
8014 /**
8015  * Release an encap/decap resource.
8016  *
8017  * @param flow
8018  *   Pointer to mlx5_flow.
8019  *
8020  * @return
8021  *   1 while a reference on it exists, 0 when freed.
8022  */
8023 static int
8024 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
8025 {
8026         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
8027                                                 flow->dv.encap_decap;
8028
8029         MLX5_ASSERT(cache_resource->verbs_action);
8030         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
8031                 (void *)cache_resource,
8032                 rte_atomic32_read(&cache_resource->refcnt));
8033         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8034                 claim_zero(mlx5_glue->destroy_flow_action
8035                                 (cache_resource->verbs_action));
8036                 LIST_REMOVE(cache_resource, next);
8037                 rte_free(cache_resource);
8038                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
8039                         (void *)cache_resource);
8040                 return 0;
8041         }
8042         return 1;
8043 }
8044
8045 /**
8046  * Release an jump to table action resource.
8047  *
8048  * @param dev
8049  *   Pointer to Ethernet device.
8050  * @param flow
8051  *   Pointer to mlx5_flow.
8052  *
8053  * @return
8054  *   1 while a reference on it exists, 0 when freed.
8055  */
8056 static int
8057 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
8058                                   struct mlx5_flow *flow)
8059 {
8060         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
8061         struct mlx5_flow_tbl_data_entry *tbl_data =
8062                         container_of(cache_resource,
8063                                      struct mlx5_flow_tbl_data_entry, jump);
8064
8065         MLX5_ASSERT(cache_resource->action);
8066         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
8067                 (void *)cache_resource,
8068                 rte_atomic32_read(&cache_resource->refcnt));
8069         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8070                 claim_zero(mlx5_glue->destroy_flow_action
8071                                 (cache_resource->action));
8072                 /* jump action memory free is inside the table release. */
8073                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
8074                 DRV_LOG(DEBUG, "jump table resource %p: removed",
8075                         (void *)cache_resource);
8076                 return 0;
8077         }
8078         return 1;
8079 }
8080
8081 /**
8082  * Release a modify-header resource.
8083  *
8084  * @param flow
8085  *   Pointer to mlx5_flow.
8086  *
8087  * @return
8088  *   1 while a reference on it exists, 0 when freed.
8089  */
8090 static int
8091 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
8092 {
8093         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
8094                                                 flow->dv.modify_hdr;
8095
8096         MLX5_ASSERT(cache_resource->verbs_action);
8097         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
8098                 (void *)cache_resource,
8099                 rte_atomic32_read(&cache_resource->refcnt));
8100         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8101                 claim_zero(mlx5_glue->destroy_flow_action
8102                                 (cache_resource->verbs_action));
8103                 LIST_REMOVE(cache_resource, next);
8104                 rte_free(cache_resource);
8105                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
8106                         (void *)cache_resource);
8107                 return 0;
8108         }
8109         return 1;
8110 }
8111
8112 /**
8113  * Release port ID action resource.
8114  *
8115  * @param flow
8116  *   Pointer to mlx5_flow.
8117  *
8118  * @return
8119  *   1 while a reference on it exists, 0 when freed.
8120  */
8121 static int
8122 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
8123 {
8124         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
8125                 flow->dv.port_id_action;
8126
8127         MLX5_ASSERT(cache_resource->action);
8128         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
8129                 (void *)cache_resource,
8130                 rte_atomic32_read(&cache_resource->refcnt));
8131         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8132                 claim_zero(mlx5_glue->destroy_flow_action
8133                                 (cache_resource->action));
8134                 LIST_REMOVE(cache_resource, next);
8135                 rte_free(cache_resource);
8136                 DRV_LOG(DEBUG, "port id action resource %p: removed",
8137                         (void *)cache_resource);
8138                 return 0;
8139         }
8140         return 1;
8141 }
8142
8143 /**
8144  * Release push vlan action resource.
8145  *
8146  * @param flow
8147  *   Pointer to mlx5_flow.
8148  *
8149  * @return
8150  *   1 while a reference on it exists, 0 when freed.
8151  */
8152 static int
8153 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
8154 {
8155         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
8156                 flow->dv.push_vlan_res;
8157
8158         MLX5_ASSERT(cache_resource->action);
8159         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
8160                 (void *)cache_resource,
8161                 rte_atomic32_read(&cache_resource->refcnt));
8162         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8163                 claim_zero(mlx5_glue->destroy_flow_action
8164                                 (cache_resource->action));
8165                 LIST_REMOVE(cache_resource, next);
8166                 rte_free(cache_resource);
8167                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
8168                         (void *)cache_resource);
8169                 return 0;
8170         }
8171         return 1;
8172 }
8173
8174 /**
8175  * Remove the flow from the NIC but keeps it in memory.
8176  * Lock free, (mutex should be acquired by caller).
8177  *
8178  * @param[in] dev
8179  *   Pointer to Ethernet device.
8180  * @param[in, out] flow
8181  *   Pointer to flow structure.
8182  */
8183 static void
8184 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8185 {
8186         struct mlx5_flow_dv *dv;
8187         struct mlx5_flow *dev_flow;
8188
8189         if (!flow)
8190                 return;
8191         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8192                 dv = &dev_flow->dv;
8193                 if (dv->flow) {
8194                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
8195                         dv->flow = NULL;
8196                 }
8197                 if (dv->hrxq) {
8198                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8199                                 mlx5_hrxq_drop_release(dev);
8200                         else
8201                                 mlx5_hrxq_release(dev, dv->hrxq);
8202                         dv->hrxq = NULL;
8203                 }
8204                 if (dev_flow->dv.vf_vlan.tag &&
8205                     dev_flow->dv.vf_vlan.created)
8206                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8207         }
8208 }
8209
8210 /**
8211  * Remove the flow from the NIC and the memory.
8212  * Lock free, (mutex should be acquired by caller).
8213  *
8214  * @param[in] dev
8215  *   Pointer to the Ethernet device structure.
8216  * @param[in, out] flow
8217  *   Pointer to flow structure.
8218  */
8219 static void
8220 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8221 {
8222         struct mlx5_flow *dev_flow;
8223
8224         if (!flow)
8225                 return;
8226         __flow_dv_remove(dev, flow);
8227         if (flow->counter) {
8228                 flow_dv_counter_release(dev, flow->counter);
8229                 flow->counter = NULL;
8230         }
8231         if (flow->meter) {
8232                 mlx5_flow_meter_detach(flow->meter);
8233                 flow->meter = NULL;
8234         }
8235         while (!LIST_EMPTY(&flow->dev_flows)) {
8236                 dev_flow = LIST_FIRST(&flow->dev_flows);
8237                 LIST_REMOVE(dev_flow, next);
8238                 if (dev_flow->dv.matcher)
8239                         flow_dv_matcher_release(dev, dev_flow);
8240                 if (dev_flow->dv.encap_decap)
8241                         flow_dv_encap_decap_resource_release(dev_flow);
8242                 if (dev_flow->dv.modify_hdr)
8243                         flow_dv_modify_hdr_resource_release(dev_flow);
8244                 if (dev_flow->dv.jump)
8245                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8246                 if (dev_flow->dv.port_id_action)
8247                         flow_dv_port_id_action_resource_release(dev_flow);
8248                 if (dev_flow->dv.push_vlan_res)
8249                         flow_dv_push_vlan_action_resource_release(dev_flow);
8250                 if (dev_flow->dv.tag_resource)
8251                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8252                 rte_free(dev_flow);
8253         }
8254 }
8255
8256 /**
8257  * Query a dv flow  rule for its statistics via devx.
8258  *
8259  * @param[in] dev
8260  *   Pointer to Ethernet device.
8261  * @param[in] flow
8262  *   Pointer to the sub flow.
8263  * @param[out] data
8264  *   data retrieved by the query.
8265  * @param[out] error
8266  *   Perform verbose error reporting if not NULL.
8267  *
8268  * @return
8269  *   0 on success, a negative errno value otherwise and rte_errno is set.
8270  */
8271 static int
8272 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8273                     void *data, struct rte_flow_error *error)
8274 {
8275         struct mlx5_priv *priv = dev->data->dev_private;
8276         struct rte_flow_query_count *qc = data;
8277
8278         if (!priv->config.devx)
8279                 return rte_flow_error_set(error, ENOTSUP,
8280                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8281                                           NULL,
8282                                           "counters are not supported");
8283         if (flow->counter) {
8284                 uint64_t pkts, bytes;
8285                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8286                                                &bytes);
8287
8288                 if (err)
8289                         return rte_flow_error_set(error, -err,
8290                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8291                                         NULL, "cannot read counters");
8292                 qc->hits_set = 1;
8293                 qc->bytes_set = 1;
8294                 qc->hits = pkts - flow->counter->hits;
8295                 qc->bytes = bytes - flow->counter->bytes;
8296                 if (qc->reset) {
8297                         flow->counter->hits = pkts;
8298                         flow->counter->bytes = bytes;
8299                 }
8300                 return 0;
8301         }
8302         return rte_flow_error_set(error, EINVAL,
8303                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8304                                   NULL,
8305                                   "counters are not available");
8306 }
8307
8308 /**
8309  * Query a flow.
8310  *
8311  * @see rte_flow_query()
8312  * @see rte_flow_ops
8313  */
8314 static int
8315 flow_dv_query(struct rte_eth_dev *dev,
8316               struct rte_flow *flow __rte_unused,
8317               const struct rte_flow_action *actions __rte_unused,
8318               void *data __rte_unused,
8319               struct rte_flow_error *error __rte_unused)
8320 {
8321         int ret = -EINVAL;
8322
8323         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8324                 switch (actions->type) {
8325                 case RTE_FLOW_ACTION_TYPE_VOID:
8326                         break;
8327                 case RTE_FLOW_ACTION_TYPE_COUNT:
8328                         ret = flow_dv_query_count(dev, flow, data, error);
8329                         break;
8330                 default:
8331                         return rte_flow_error_set(error, ENOTSUP,
8332                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8333                                                   actions,
8334                                                   "action not supported");
8335                 }
8336         }
8337         return ret;
8338 }
8339
8340 /**
8341  * Destroy the meter table set.
8342  * Lock free, (mutex should be acquired by caller).
8343  *
8344  * @param[in] dev
8345  *   Pointer to Ethernet device.
8346  * @param[in] tbl
8347  *   Pointer to the meter table set.
8348  *
8349  * @return
8350  *   Always 0.
8351  */
8352 static int
8353 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8354                         struct mlx5_meter_domains_infos *tbl)
8355 {
8356         struct mlx5_priv *priv = dev->data->dev_private;
8357         struct mlx5_meter_domains_infos *mtd =
8358                                 (struct mlx5_meter_domains_infos *)tbl;
8359
8360         if (!mtd || !priv->config.dv_flow_en)
8361                 return 0;
8362         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8363                 claim_zero(mlx5_glue->dv_destroy_flow
8364                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8365         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8366                 claim_zero(mlx5_glue->dv_destroy_flow
8367                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8368         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8369                 claim_zero(mlx5_glue->dv_destroy_flow
8370                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8371         if (mtd->egress.color_matcher)
8372                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8373                           (mtd->egress.color_matcher));
8374         if (mtd->egress.any_matcher)
8375                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8376                           (mtd->egress.any_matcher));
8377         if (mtd->egress.tbl)
8378                 claim_zero(flow_dv_tbl_resource_release(dev,
8379                                                         mtd->egress.tbl));
8380         if (mtd->ingress.color_matcher)
8381                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8382                           (mtd->ingress.color_matcher));
8383         if (mtd->ingress.any_matcher)
8384                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8385                           (mtd->ingress.any_matcher));
8386         if (mtd->ingress.tbl)
8387                 claim_zero(flow_dv_tbl_resource_release(dev,
8388                                                         mtd->ingress.tbl));
8389         if (mtd->transfer.color_matcher)
8390                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8391                           (mtd->transfer.color_matcher));
8392         if (mtd->transfer.any_matcher)
8393                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8394                           (mtd->transfer.any_matcher));
8395         if (mtd->transfer.tbl)
8396                 claim_zero(flow_dv_tbl_resource_release(dev,
8397                                                         mtd->transfer.tbl));
8398         if (mtd->drop_actn)
8399                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8400         rte_free(mtd);
8401         return 0;
8402 }
8403
8404 /* Number of meter flow actions, count and jump or count and drop. */
8405 #define METER_ACTIONS 2
8406
8407 /**
8408  * Create specify domain meter table and suffix table.
8409  *
8410  * @param[in] dev
8411  *   Pointer to Ethernet device.
8412  * @param[in,out] mtb
8413  *   Pointer to DV meter table set.
8414  * @param[in] egress
8415  *   Table attribute.
8416  * @param[in] transfer
8417  *   Table attribute.
8418  * @param[in] color_reg_c_idx
8419  *   Reg C index for color match.
8420  *
8421  * @return
8422  *   0 on success, -1 otherwise and rte_errno is set.
8423  */
8424 static int
8425 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8426                            struct mlx5_meter_domains_infos *mtb,
8427                            uint8_t egress, uint8_t transfer,
8428                            uint32_t color_reg_c_idx)
8429 {
8430         struct mlx5_priv *priv = dev->data->dev_private;
8431         struct mlx5_ibv_shared *sh = priv->sh;
8432         struct mlx5_flow_dv_match_params mask = {
8433                 .size = sizeof(mask.buf),
8434         };
8435         struct mlx5_flow_dv_match_params value = {
8436                 .size = sizeof(value.buf),
8437         };
8438         struct mlx5dv_flow_matcher_attr dv_attr = {
8439                 .type = IBV_FLOW_ATTR_NORMAL,
8440                 .priority = 0,
8441                 .match_criteria_enable = 0,
8442                 .match_mask = (void *)&mask,
8443         };
8444         void *actions[METER_ACTIONS];
8445         struct mlx5_flow_tbl_resource **sfx_tbl;
8446         struct mlx5_meter_domain_info *dtb;
8447         struct rte_flow_error error;
8448         int i = 0;
8449
8450         if (transfer) {
8451                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8452                 dtb = &mtb->transfer;
8453         } else if (egress) {
8454                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8455                 dtb = &mtb->egress;
8456         } else {
8457                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8458                 dtb = &mtb->ingress;
8459         }
8460         /* If the suffix table in missing, create it. */
8461         if (!(*sfx_tbl)) {
8462                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8463                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8464                                                 egress, transfer, &error);
8465                 if (!(*sfx_tbl)) {
8466                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8467                         return -1;
8468                 }
8469         }
8470         /* Create the meter table with METER level. */
8471         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8472                                             egress, transfer, &error);
8473         if (!dtb->tbl) {
8474                 DRV_LOG(ERR, "Failed to create meter policer table.");
8475                 return -1;
8476         }
8477         /* Create matchers, Any and Color. */
8478         dv_attr.priority = 3;
8479         dv_attr.match_criteria_enable = 0;
8480         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8481                                                              &dv_attr,
8482                                                              dtb->tbl->obj);
8483         if (!dtb->any_matcher) {
8484                 DRV_LOG(ERR, "Failed to create meter"
8485                              " policer default matcher.");
8486                 goto error_exit;
8487         }
8488         dv_attr.priority = 0;
8489         dv_attr.match_criteria_enable =
8490                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8491         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8492                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
8493         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8494                                                                &dv_attr,
8495                                                                dtb->tbl->obj);
8496         if (!dtb->color_matcher) {
8497                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8498                 goto error_exit;
8499         }
8500         if (mtb->count_actns[RTE_MTR_DROPPED])
8501                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8502         actions[i++] = mtb->drop_actn;
8503         /* Default rule: lowest priority, match any, actions: drop. */
8504         dtb->policer_rules[RTE_MTR_DROPPED] =
8505                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8506                                                  (void *)&value, i, actions);
8507         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8508                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8509                 goto error_exit;
8510         }
8511         return 0;
8512 error_exit:
8513         return -1;
8514 }
8515
8516 /**
8517  * Create the needed meter and suffix tables.
8518  * Lock free, (mutex should be acquired by caller).
8519  *
8520  * @param[in] dev
8521  *   Pointer to Ethernet device.
8522  * @param[in] fm
8523  *   Pointer to the flow meter.
8524  *
8525  * @return
8526  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8527  */
8528 static struct mlx5_meter_domains_infos *
8529 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8530                        const struct mlx5_flow_meter *fm)
8531 {
8532         struct mlx5_priv *priv = dev->data->dev_private;
8533         struct mlx5_meter_domains_infos *mtb;
8534         int ret;
8535         int i;
8536
8537         if (!priv->mtr_en) {
8538                 rte_errno = ENOTSUP;
8539                 return NULL;
8540         }
8541         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8542         if (!mtb) {
8543                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8544                 return NULL;
8545         }
8546         /* Create meter count actions */
8547         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8548                 if (!fm->policer_stats.cnt[i])
8549                         continue;
8550                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8551         }
8552         /* Create drop action. */
8553         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8554         if (!mtb->drop_actn) {
8555                 DRV_LOG(ERR, "Failed to create drop action.");
8556                 goto error_exit;
8557         }
8558         /* Egress meter table. */
8559         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8560         if (ret) {
8561                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8562                 goto error_exit;
8563         }
8564         /* Ingress meter table. */
8565         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8566         if (ret) {
8567                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8568                 goto error_exit;
8569         }
8570         /* FDB meter table. */
8571         if (priv->config.dv_esw_en) {
8572                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8573                                                  priv->mtr_color_reg);
8574                 if (ret) {
8575                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8576                         goto error_exit;
8577                 }
8578         }
8579         return mtb;
8580 error_exit:
8581         flow_dv_destroy_mtr_tbl(dev, mtb);
8582         return NULL;
8583 }
8584
8585 /**
8586  * Destroy domain policer rule.
8587  *
8588  * @param[in] dt
8589  *   Pointer to domain table.
8590  */
8591 static void
8592 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8593 {
8594         int i;
8595
8596         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8597                 if (dt->policer_rules[i]) {
8598                         claim_zero(mlx5_glue->dv_destroy_flow
8599                                   (dt->policer_rules[i]));
8600                         dt->policer_rules[i] = NULL;
8601                 }
8602         }
8603         if (dt->jump_actn) {
8604                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8605                 dt->jump_actn = NULL;
8606         }
8607 }
8608
8609 /**
8610  * Destroy policer rules.
8611  *
8612  * @param[in] dev
8613  *   Pointer to Ethernet device.
8614  * @param[in] fm
8615  *   Pointer to flow meter structure.
8616  * @param[in] attr
8617  *   Pointer to flow attributes.
8618  *
8619  * @return
8620  *   Always 0.
8621  */
8622 static int
8623 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8624                               const struct mlx5_flow_meter *fm,
8625                               const struct rte_flow_attr *attr)
8626 {
8627         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8628
8629         if (!mtb)
8630                 return 0;
8631         if (attr->egress)
8632                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8633         if (attr->ingress)
8634                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8635         if (attr->transfer)
8636                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8637         return 0;
8638 }
8639
8640 /**
8641  * Create specify domain meter policer rule.
8642  *
8643  * @param[in] fm
8644  *   Pointer to flow meter structure.
8645  * @param[in] mtb
8646  *   Pointer to DV meter table set.
8647  * @param[in] sfx_tb
8648  *   Pointer to suffix table.
8649  * @param[in] mtr_reg_c
8650  *   Color match REG_C.
8651  *
8652  * @return
8653  *   0 on success, -1 otherwise.
8654  */
8655 static int
8656 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8657                                     struct mlx5_meter_domain_info *dtb,
8658                                     struct mlx5_flow_tbl_resource *sfx_tb,
8659                                     uint8_t mtr_reg_c)
8660 {
8661         struct mlx5_flow_dv_match_params matcher = {
8662                 .size = sizeof(matcher.buf),
8663         };
8664         struct mlx5_flow_dv_match_params value = {
8665                 .size = sizeof(value.buf),
8666         };
8667         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8668         void *actions[METER_ACTIONS];
8669         int i;
8670
8671         /* Create jump action. */
8672         if (!sfx_tb)
8673                 return -1;
8674         if (!dtb->jump_actn)
8675                 dtb->jump_actn =
8676                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8677                                                         (sfx_tb->obj);
8678         if (!dtb->jump_actn) {
8679                 DRV_LOG(ERR, "Failed to create policer jump action.");
8680                 goto error;
8681         }
8682         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8683                 int j = 0;
8684
8685                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8686                                        rte_col_2_mlx5_col(i), UINT8_MAX);
8687                 if (mtb->count_actns[i])
8688                         actions[j++] = mtb->count_actns[i];
8689                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8690                         actions[j++] = mtb->drop_actn;
8691                 else
8692                         actions[j++] = dtb->jump_actn;
8693                 dtb->policer_rules[i] =
8694                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8695                                                  (void *)&value,
8696                                                   j, actions);
8697                 if (!dtb->policer_rules[i]) {
8698                         DRV_LOG(ERR, "Failed to create policer rule.");
8699                         goto error;
8700                 }
8701         }
8702         return 0;
8703 error:
8704         rte_errno = errno;
8705         return -1;
8706 }
8707
8708 /**
8709  * Create policer rules.
8710  *
8711  * @param[in] dev
8712  *   Pointer to Ethernet device.
8713  * @param[in] fm
8714  *   Pointer to flow meter structure.
8715  * @param[in] attr
8716  *   Pointer to flow attributes.
8717  *
8718  * @return
8719  *   0 on success, -1 otherwise.
8720  */
8721 static int
8722 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8723                              struct mlx5_flow_meter *fm,
8724                              const struct rte_flow_attr *attr)
8725 {
8726         struct mlx5_priv *priv = dev->data->dev_private;
8727         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8728         int ret;
8729
8730         if (attr->egress) {
8731                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8732                                                 priv->sh->tx_mtr_sfx_tbl,
8733                                                 priv->mtr_color_reg);
8734                 if (ret) {
8735                         DRV_LOG(ERR, "Failed to create egress policer.");
8736                         goto error;
8737                 }
8738         }
8739         if (attr->ingress) {
8740                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8741                                                 priv->sh->rx_mtr_sfx_tbl,
8742                                                 priv->mtr_color_reg);
8743                 if (ret) {
8744                         DRV_LOG(ERR, "Failed to create ingress policer.");
8745                         goto error;
8746                 }
8747         }
8748         if (attr->transfer) {
8749                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8750                                                 priv->sh->fdb_mtr_sfx_tbl,
8751                                                 priv->mtr_color_reg);
8752                 if (ret) {
8753                         DRV_LOG(ERR, "Failed to create transfer policer.");
8754                         goto error;
8755                 }
8756         }
8757         return 0;
8758 error:
8759         flow_dv_destroy_policer_rules(dev, fm, attr);
8760         return -1;
8761 }
8762
8763 /**
8764  * Query a devx counter.
8765  *
8766  * @param[in] dev
8767  *   Pointer to the Ethernet device structure.
8768  * @param[in] cnt
8769  *   Pointer to the flow counter.
8770  * @param[in] clear
8771  *   Set to clear the counter statistics.
8772  * @param[out] pkts
8773  *   The statistics value of packets.
8774  * @param[out] bytes
8775  *   The statistics value of bytes.
8776  *
8777  * @return
8778  *   0 on success, otherwise return -1.
8779  */
8780 static int
8781 flow_dv_counter_query(struct rte_eth_dev *dev,
8782                       struct mlx5_flow_counter *cnt, bool clear,
8783                       uint64_t *pkts, uint64_t *bytes)
8784 {
8785         struct mlx5_priv *priv = dev->data->dev_private;
8786         uint64_t inn_pkts, inn_bytes;
8787         int ret;
8788
8789         if (!priv->config.devx)
8790                 return -1;
8791         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8792         if (ret)
8793                 return -1;
8794         *pkts = inn_pkts - cnt->hits;
8795         *bytes = inn_bytes - cnt->bytes;
8796         if (clear) {
8797                 cnt->hits = inn_pkts;
8798                 cnt->bytes = inn_bytes;
8799         }
8800         return 0;
8801 }
8802
8803 /*
8804  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8805  */
8806 static int
8807 flow_dv_translate(struct rte_eth_dev *dev,
8808                   struct mlx5_flow *dev_flow,
8809                   const struct rte_flow_attr *attr,
8810                   const struct rte_flow_item items[],
8811                   const struct rte_flow_action actions[],
8812                   struct rte_flow_error *error)
8813 {
8814         int ret;
8815
8816         flow_dv_shared_lock(dev);
8817         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8818         flow_dv_shared_unlock(dev);
8819         return ret;
8820 }
8821
8822 /*
8823  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8824  */
8825 static int
8826 flow_dv_apply(struct rte_eth_dev *dev,
8827               struct rte_flow *flow,
8828               struct rte_flow_error *error)
8829 {
8830         int ret;
8831
8832         flow_dv_shared_lock(dev);
8833         ret = __flow_dv_apply(dev, flow, error);
8834         flow_dv_shared_unlock(dev);
8835         return ret;
8836 }
8837
8838 /*
8839  * Mutex-protected thunk to lock-free __flow_dv_remove().
8840  */
8841 static void
8842 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8843 {
8844         flow_dv_shared_lock(dev);
8845         __flow_dv_remove(dev, flow);
8846         flow_dv_shared_unlock(dev);
8847 }
8848
8849 /*
8850  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8851  */
8852 static void
8853 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8854 {
8855         flow_dv_shared_lock(dev);
8856         __flow_dv_destroy(dev, flow);
8857         flow_dv_shared_unlock(dev);
8858 }
8859
8860 /*
8861  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8862  */
8863 static struct mlx5_flow_counter *
8864 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8865 {
8866         struct mlx5_flow_counter *cnt;
8867
8868         flow_dv_shared_lock(dev);
8869         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8870         flow_dv_shared_unlock(dev);
8871         return cnt;
8872 }
8873
8874 /*
8875  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8876  */
8877 static void
8878 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8879 {
8880         flow_dv_shared_lock(dev);
8881         flow_dv_counter_release(dev, cnt);
8882         flow_dv_shared_unlock(dev);
8883 }
8884
8885 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8886         .validate = flow_dv_validate,
8887         .prepare = flow_dv_prepare,
8888         .translate = flow_dv_translate,
8889         .apply = flow_dv_apply,
8890         .remove = flow_dv_remove,
8891         .destroy = flow_dv_destroy,
8892         .query = flow_dv_query,
8893         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8894         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8895         .create_policer_rules = flow_dv_create_policer_rules,
8896         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8897         .counter_alloc = flow_dv_counter_allocate,
8898         .counter_free = flow_dv_counter_free,
8899         .counter_query = flow_dv_counter_query,
8900 };
8901
8902 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */