drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_prm.h>
  35
  36 #include "mlx5_defs.h"
  37 #include "mlx5.h"
  38 #include "mlx5_flow.h"
  39 #include "mlx5_rxtx.h"
  40
  41 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  58                                           sizeof(struct rte_flow_item_ipv4))
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 /**
  79  * Initialize flow attributes structure according to flow items' types.
  80  *
  81  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  82  * mode. For tunnel mode, the items to be modified are the outermost ones.
  83  *
  84  * @param[in] item
  85  *   Pointer to item specification.
  86  * @param[out] attr
  87  *   Pointer to flow attributes structure.
  88  */
  89 static void
  90 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  91 {
  92         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  93                 switch (item->type) {
  94                 case RTE_FLOW_ITEM_TYPE_IPV4:
  95                         if (!attr->ipv6)
  96                                 attr->ipv4 = 1;
  97                         break;
  98                 case RTE_FLOW_ITEM_TYPE_IPV6:
  99                         if (!attr->ipv4)
 100                                 attr->ipv6 = 1;
 101                         break;
 102                 case RTE_FLOW_ITEM_TYPE_UDP:
 103                         if (!attr->tcp)
 104                                 attr->udp = 1;
 105                         break;
 106                 case RTE_FLOW_ITEM_TYPE_TCP:
 107                         if (!attr->udp)
 108                                 attr->tcp = 1;
 109                         break;
 110                 default:
 111                         break;
 112                 }
 113         }
 114         attr->valid = 1;
 115 }
 116
 117 /**
 118  * Convert rte_mtr_color to mlx5 color.
 119  *
 120  * @param[in] rcol
 121  *   rte_mtr_color.
 122  *
 123  * @return
 124  *   mlx5 color.
 125  */
 126 static int
 127 rte_col_2_mlx5_col(enum rte_color rcol)
 128 {
 129         switch (rcol) {
 130         case RTE_COLOR_GREEN:
 131                 return MLX5_FLOW_COLOR_GREEN;
 132         case RTE_COLOR_YELLOW:
 133                 return MLX5_FLOW_COLOR_YELLOW;
 134         case RTE_COLOR_RED:
 135                 return MLX5_FLOW_COLOR_RED;
 136         default:
 137                 break;
 138         }
 139         return MLX5_FLOW_COLOR_UNDEFINED;
 140 }
 141
 142 struct field_modify_info {
 143         uint32_t size; /* Size of field in protocol header, in bytes. */
 144         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 145         enum mlx5_modification_field id;
 146 };
 147
 148 struct field_modify_info modify_eth[] = {
 149         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 150         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 151         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 152         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 153         {0, 0, 0},
 154 };
 155
 156 struct field_modify_info modify_vlan_out_first_vid[] = {
 157         /* Size in bits !!! */
 158         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 159         {0, 0, 0},
 160 };
 161
 162 struct field_modify_info modify_ipv4[] = {
 163         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 164         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 165         {4, 12, MLX5_MODI_OUT_SIPV4},
 166         {4, 16, MLX5_MODI_OUT_DIPV4},
 167         {0, 0, 0},
 168 };
 169
 170 struct field_modify_info modify_ipv6[] = {
 171         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 172         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 173         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 174         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 175         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 176         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 177         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 178         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 179         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 180         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 181         {0, 0, 0},
 182 };
 183
 184 struct field_modify_info modify_udp[] = {
 185         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 186         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 187         {0, 0, 0},
 188 };
 189
 190 struct field_modify_info modify_tcp[] = {
 191         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 192         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 193         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 194         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 195         {0, 0, 0},
 196 };
 197
 198 static void
 199 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 200                           uint8_t next_protocol, uint64_t *item_flags,
 201                           int *tunnel)
 202 {
 203         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 204                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 205         if (next_protocol == IPPROTO_IPIP) {
 206                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 207                 *tunnel = 1;
 208         }
 209         if (next_protocol == IPPROTO_IPV6) {
 210                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 211                 *tunnel = 1;
 212         }
 213 }
 214
 215 /**
 216  * Acquire the synchronizing object to protect multithreaded access
 217  * to shared dv context. Lock occurs only if context is actually
 218  * shared, i.e. we have multiport IB device and representors are
 219  * created.
 220  *
 221  * @param[in] dev
 222  *   Pointer to the rte_eth_dev structure.
 223  */
 224 static void
 225 flow_dv_shared_lock(struct rte_eth_dev *dev)
 226 {
 227         struct mlx5_priv *priv = dev->data->dev_private;
 228         struct mlx5_ibv_shared *sh = priv->sh;
 229
 230         if (sh->dv_refcnt > 1) {
 231                 int ret;
 232
 233                 ret = pthread_mutex_lock(&sh->dv_mutex);
 234                 MLX5_ASSERT(!ret);
 235                 (void)ret;
 236         }
 237 }
 238
 239 static void
 240 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 241 {
 242         struct mlx5_priv *priv = dev->data->dev_private;
 243         struct mlx5_ibv_shared *sh = priv->sh;
 244
 245         if (sh->dv_refcnt > 1) {
 246                 int ret;
 247
 248                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 249                 MLX5_ASSERT(!ret);
 250                 (void)ret;
 251         }
 252 }
 253
 254 /* Update VLAN's VID/PCP based on input rte_flow_action.
 255  *
 256  * @param[in] action
 257  *   Pointer to struct rte_flow_action.
 258  * @param[out] vlan
 259  *   Pointer to struct rte_vlan_hdr.
 260  */
 261 static void
 262 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 263                          struct rte_vlan_hdr *vlan)
 264 {
 265         uint16_t vlan_tci;
 266         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 267                 vlan_tci =
 268                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 269                                                action->conf)->vlan_pcp;
 270                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 271                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 272                 vlan->vlan_tci |= vlan_tci;
 273         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 274                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 275                 vlan->vlan_tci |= rte_be_to_cpu_16
 276                     (((const struct rte_flow_action_of_set_vlan_vid *)
 277                                              action->conf)->vlan_vid);
 278         }
 279 }
 280
 281 /**
 282  * Fetch 1, 2, 3 or 4 byte field from the byte array
 283  * and return as unsigned integer in host-endian format.
 284  *
 285  * @param[in] data
 286  *   Pointer to data array.
 287  * @param[in] size
 288  *   Size of field to extract.
 289  *
 290  * @return
 291  *   converted field in host endian format.
 292  */
 293 static inline uint32_t
 294 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 295 {
 296         uint32_t ret;
 297
 298         switch (size) {
 299         case 1:
 300                 ret = *data;
 301                 break;
 302         case 2:
 303                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 304                 break;
 305         case 3:
 306                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 307                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 308                 break;
 309         case 4:
 310                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 311                 break;
 312         default:
 313                 MLX5_ASSERT(false);
 314                 ret = 0;
 315                 break;
 316         }
 317         return ret;
 318 }
 319
 320 /**
 321  * Convert modify-header action to DV specification.
 322  *
 323  * Data length of each action is determined by provided field description
 324  * and the item mask. Data bit offset and width of each action is determined
 325  * by provided item mask.
 326  *
 327  * @param[in] item
 328  *   Pointer to item specification.
 329  * @param[in] field
 330  *   Pointer to field modification information.
 331  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 332  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 333  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 334  * @param[in] dcopy
 335  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 336  *   Negative offset value sets the same offset as source offset.
 337  *   size field is ignored, value is taken from source field.
 338  * @param[in,out] resource
 339  *   Pointer to the modify-header resource.
 340  * @param[in] type
 341  *   Type of modification.
 342  * @param[out] error
 343  *   Pointer to the error structure.
 344  *
 345  * @return
 346  *   0 on success, a negative errno value otherwise and rte_errno is set.
 347  */
 348 static int
 349 flow_dv_convert_modify_action(struct rte_flow_item *item,
 350                               struct field_modify_info *field,
 351                               struct field_modify_info *dcopy,
 352                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 353                               uint32_t type, struct rte_flow_error *error)
 354 {
 355         uint32_t i = resource->actions_num;
 356         struct mlx5_modification_cmd *actions = resource->actions;
 357
 358         /*
 359          * The item and mask are provided in big-endian format.
 360          * The fields should be presented as in big-endian format either.
 361          * Mask must be always present, it defines the actual field width.
 362          */
 363         MLX5_ASSERT(item->mask);
 364         MLX5_ASSERT(field->size);
 365         do {
 366                 unsigned int size_b;
 367                 unsigned int off_b;
 368                 uint32_t mask;
 369                 uint32_t data;
 370
 371                 if (i >= MLX5_MAX_MODIFY_NUM)
 372                         return rte_flow_error_set(error, EINVAL,
 373                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 374                                  "too many items to modify");
 375                 /* Fetch variable byte size mask from the array. */
 376                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 377                                            field->offset, field->size);
 378                 if (!mask) {
 379                         ++field;
 380                         continue;
 381                 }
 382                 /* Deduce actual data width in bits from mask value. */
 383                 off_b = rte_bsf32(mask);
 384                 size_b = sizeof(uint32_t) * CHAR_BIT -
 385                          off_b - __builtin_clz(mask);
 386                 MLX5_ASSERT(size_b);
 387                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 388                 actions[i] = (struct mlx5_modification_cmd) {
 389                         .action_type = type,
 390                         .field = field->id,
 391                         .offset = off_b,
 392                         .length = size_b,
 393                 };
 394                 /* Convert entire record to expected big-endian format. */
 395                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 396                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 397                         MLX5_ASSERT(dcopy);
 398                         actions[i].dst_field = dcopy->id;
 399                         actions[i].dst_offset =
 400                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 401                         /* Convert entire record to big-endian format. */
 402                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 403                 } else {
 404                         MLX5_ASSERT(item->spec);
 405                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 406                                                    field->offset, field->size);
 407                         /* Shift out the trailing masked bits from data. */
 408                         data = (data & mask) >> off_b;
 409                         actions[i].data1 = rte_cpu_to_be_32(data);
 410                 }
 411                 ++i;
 412                 ++field;
 413         } while (field->size);
 414         if (resource->actions_num == i)
 415                 return rte_flow_error_set(error, EINVAL,
 416                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 417                                           "invalid modification flow item");
 418         resource->actions_num = i;
 419         return 0;
 420 }
 421
 422 /**
 423  * Convert modify-header set IPv4 address action to DV specification.
 424  *
 425  * @param[in,out] resource
 426  *   Pointer to the modify-header resource.
 427  * @param[in] action
 428  *   Pointer to action specification.
 429  * @param[out] error
 430  *   Pointer to the error structure.
 431  *
 432  * @return
 433  *   0 on success, a negative errno value otherwise and rte_errno is set.
 434  */
 435 static int
 436 flow_dv_convert_action_modify_ipv4
 437                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 438                          const struct rte_flow_action *action,
 439                          struct rte_flow_error *error)
 440 {
 441         const struct rte_flow_action_set_ipv4 *conf =
 442                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 443         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 444         struct rte_flow_item_ipv4 ipv4;
 445         struct rte_flow_item_ipv4 ipv4_mask;
 446
 447         memset(&ipv4, 0, sizeof(ipv4));
 448         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 449         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 450                 ipv4.hdr.src_addr = conf->ipv4_addr;
 451                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 452         } else {
 453                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 454                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 455         }
 456         item.spec = &ipv4;
 457         item.mask = &ipv4_mask;
 458         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 459                                              MLX5_MODIFICATION_TYPE_SET, error);
 460 }
 461
 462 /**
 463  * Convert modify-header set IPv6 address action to DV specification.
 464  *
 465  * @param[in,out] resource
 466  *   Pointer to the modify-header resource.
 467  * @param[in] action
 468  *   Pointer to action specification.
 469  * @param[out] error
 470  *   Pointer to the error structure.
 471  *
 472  * @return
 473  *   0 on success, a negative errno value otherwise and rte_errno is set.
 474  */
 475 static int
 476 flow_dv_convert_action_modify_ipv6
 477                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 478                          const struct rte_flow_action *action,
 479                          struct rte_flow_error *error)
 480 {
 481         const struct rte_flow_action_set_ipv6 *conf =
 482                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 483         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 484         struct rte_flow_item_ipv6 ipv6;
 485         struct rte_flow_item_ipv6 ipv6_mask;
 486
 487         memset(&ipv6, 0, sizeof(ipv6));
 488         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 489         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 490                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 491                        sizeof(ipv6.hdr.src_addr));
 492                 memcpy(&ipv6_mask.hdr.src_addr,
 493                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 494                        sizeof(ipv6.hdr.src_addr));
 495         } else {
 496                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 497                        sizeof(ipv6.hdr.dst_addr));
 498                 memcpy(&ipv6_mask.hdr.dst_addr,
 499                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 500                        sizeof(ipv6.hdr.dst_addr));
 501         }
 502         item.spec = &ipv6;
 503         item.mask = &ipv6_mask;
 504         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 505                                              MLX5_MODIFICATION_TYPE_SET, error);
 506 }
 507
 508 /**
 509  * Convert modify-header set MAC address action to DV specification.
 510  *
 511  * @param[in,out] resource
 512  *   Pointer to the modify-header resource.
 513  * @param[in] action
 514  *   Pointer to action specification.
 515  * @param[out] error
 516  *   Pointer to the error structure.
 517  *
 518  * @return
 519  *   0 on success, a negative errno value otherwise and rte_errno is set.
 520  */
 521 static int
 522 flow_dv_convert_action_modify_mac
 523                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 524                          const struct rte_flow_action *action,
 525                          struct rte_flow_error *error)
 526 {
 527         const struct rte_flow_action_set_mac *conf =
 528                 (const struct rte_flow_action_set_mac *)(action->conf);
 529         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 530         struct rte_flow_item_eth eth;
 531         struct rte_flow_item_eth eth_mask;
 532
 533         memset(&eth, 0, sizeof(eth));
 534         memset(&eth_mask, 0, sizeof(eth_mask));
 535         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 536                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 537                        sizeof(eth.src.addr_bytes));
 538                 memcpy(&eth_mask.src.addr_bytes,
 539                        &rte_flow_item_eth_mask.src.addr_bytes,
 540                        sizeof(eth_mask.src.addr_bytes));
 541         } else {
 542                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 543                        sizeof(eth.dst.addr_bytes));
 544                 memcpy(&eth_mask.dst.addr_bytes,
 545                        &rte_flow_item_eth_mask.dst.addr_bytes,
 546                        sizeof(eth_mask.dst.addr_bytes));
 547         }
 548         item.spec = &eth;
 549         item.mask = &eth_mask;
 550         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 551                                              MLX5_MODIFICATION_TYPE_SET, error);
 552 }
 553
 554 /**
 555  * Convert modify-header set VLAN VID action to DV specification.
 556  *
 557  * @param[in,out] resource
 558  *   Pointer to the modify-header resource.
 559  * @param[in] action
 560  *   Pointer to action specification.
 561  * @param[out] error
 562  *   Pointer to the error structure.
 563  *
 564  * @return
 565  *   0 on success, a negative errno value otherwise and rte_errno is set.
 566  */
 567 static int
 568 flow_dv_convert_action_modify_vlan_vid
 569                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 570                          const struct rte_flow_action *action,
 571                          struct rte_flow_error *error)
 572 {
 573         const struct rte_flow_action_of_set_vlan_vid *conf =
 574                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 575         int i = resource->actions_num;
 576         struct mlx5_modification_cmd *actions = &resource->actions[i];
 577         struct field_modify_info *field = modify_vlan_out_first_vid;
 578
 579         if (i >= MLX5_MAX_MODIFY_NUM)
 580                 return rte_flow_error_set(error, EINVAL,
 581                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 582                          "too many items to modify");
 583         actions[i] = (struct mlx5_modification_cmd) {
 584                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 585                 .field = field->id,
 586                 .length = field->size,
 587                 .offset = field->offset,
 588         };
 589         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 590         actions[i].data1 = conf->vlan_vid;
 591         actions[i].data1 = actions[i].data1 << 16;
 592         resource->actions_num = ++i;
 593         return 0;
 594 }
 595
 596 /**
 597  * Convert modify-header set TP action to DV specification.
 598  *
 599  * @param[in,out] resource
 600  *   Pointer to the modify-header resource.
 601  * @param[in] action
 602  *   Pointer to action specification.
 603  * @param[in] items
 604  *   Pointer to rte_flow_item objects list.
 605  * @param[in] attr
 606  *   Pointer to flow attributes structure.
 607  * @param[out] error
 608  *   Pointer to the error structure.
 609  *
 610  * @return
 611  *   0 on success, a negative errno value otherwise and rte_errno is set.
 612  */
 613 static int
 614 flow_dv_convert_action_modify_tp
 615                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 616                          const struct rte_flow_action *action,
 617                          const struct rte_flow_item *items,
 618                          union flow_dv_attr *attr,
 619                          struct rte_flow_error *error)
 620 {
 621         const struct rte_flow_action_set_tp *conf =
 622                 (const struct rte_flow_action_set_tp *)(action->conf);
 623         struct rte_flow_item item;
 624         struct rte_flow_item_udp udp;
 625         struct rte_flow_item_udp udp_mask;
 626         struct rte_flow_item_tcp tcp;
 627         struct rte_flow_item_tcp tcp_mask;
 628         struct field_modify_info *field;
 629
 630         if (!attr->valid)
 631                 flow_dv_attr_init(items, attr);
 632         if (attr->udp) {
 633                 memset(&udp, 0, sizeof(udp));
 634                 memset(&udp_mask, 0, sizeof(udp_mask));
 635                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 636                         udp.hdr.src_port = conf->port;
 637                         udp_mask.hdr.src_port =
 638                                         rte_flow_item_udp_mask.hdr.src_port;
 639                 } else {
 640                         udp.hdr.dst_port = conf->port;
 641                         udp_mask.hdr.dst_port =
 642                                         rte_flow_item_udp_mask.hdr.dst_port;
 643                 }
 644                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 645                 item.spec = &udp;
 646                 item.mask = &udp_mask;
 647                 field = modify_udp;
 648         }
 649         if (attr->tcp) {
 650                 memset(&tcp, 0, sizeof(tcp));
 651                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 652                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 653                         tcp.hdr.src_port = conf->port;
 654                         tcp_mask.hdr.src_port =
 655                                         rte_flow_item_tcp_mask.hdr.src_port;
 656                 } else {
 657                         tcp.hdr.dst_port = conf->port;
 658                         tcp_mask.hdr.dst_port =
 659                                         rte_flow_item_tcp_mask.hdr.dst_port;
 660                 }
 661                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 662                 item.spec = &tcp;
 663                 item.mask = &tcp_mask;
 664                 field = modify_tcp;
 665         }
 666         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 667                                              MLX5_MODIFICATION_TYPE_SET, error);
 668 }
 669
 670 /**
 671  * Convert modify-header set TTL action to DV specification.
 672  *
 673  * @param[in,out] resource
 674  *   Pointer to the modify-header resource.
 675  * @param[in] action
 676  *   Pointer to action specification.
 677  * @param[in] items
 678  *   Pointer to rte_flow_item objects list.
 679  * @param[in] attr
 680  *   Pointer to flow attributes structure.
 681  * @param[out] error
 682  *   Pointer to the error structure.
 683  *
 684  * @return
 685  *   0 on success, a negative errno value otherwise and rte_errno is set.
 686  */
 687 static int
 688 flow_dv_convert_action_modify_ttl
 689                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 690                          const struct rte_flow_action *action,
 691                          const struct rte_flow_item *items,
 692                          union flow_dv_attr *attr,
 693                          struct rte_flow_error *error)
 694 {
 695         const struct rte_flow_action_set_ttl *conf =
 696                 (const struct rte_flow_action_set_ttl *)(action->conf);
 697         struct rte_flow_item item;
 698         struct rte_flow_item_ipv4 ipv4;
 699         struct rte_flow_item_ipv4 ipv4_mask;
 700         struct rte_flow_item_ipv6 ipv6;
 701         struct rte_flow_item_ipv6 ipv6_mask;
 702         struct field_modify_info *field;
 703
 704         if (!attr->valid)
 705                 flow_dv_attr_init(items, attr);
 706         if (attr->ipv4) {
 707                 memset(&ipv4, 0, sizeof(ipv4));
 708                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 709                 ipv4.hdr.time_to_live = conf->ttl_value;
 710                 ipv4_mask.hdr.time_to_live = 0xFF;
 711                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 712                 item.spec = &ipv4;
 713                 item.mask = &ipv4_mask;
 714                 field = modify_ipv4;
 715         }
 716         if (attr->ipv6) {
 717                 memset(&ipv6, 0, sizeof(ipv6));
 718                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 719                 ipv6.hdr.hop_limits = conf->ttl_value;
 720                 ipv6_mask.hdr.hop_limits = 0xFF;
 721                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 722                 item.spec = &ipv6;
 723                 item.mask = &ipv6_mask;
 724                 field = modify_ipv6;
 725         }
 726         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 727                                              MLX5_MODIFICATION_TYPE_SET, error);
 728 }
 729
 730 /**
 731  * Convert modify-header decrement TTL action to DV specification.
 732  *
 733  * @param[in,out] resource
 734  *   Pointer to the modify-header resource.
 735  * @param[in] action
 736  *   Pointer to action specification.
 737  * @param[in] items
 738  *   Pointer to rte_flow_item objects list.
 739  * @param[in] attr
 740  *   Pointer to flow attributes structure.
 741  * @param[out] error
 742  *   Pointer to the error structure.
 743  *
 744  * @return
 745  *   0 on success, a negative errno value otherwise and rte_errno is set.
 746  */
 747 static int
 748 flow_dv_convert_action_modify_dec_ttl
 749                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 750                          const struct rte_flow_item *items,
 751                          union flow_dv_attr *attr,
 752                          struct rte_flow_error *error)
 753 {
 754         struct rte_flow_item item;
 755         struct rte_flow_item_ipv4 ipv4;
 756         struct rte_flow_item_ipv4 ipv4_mask;
 757         struct rte_flow_item_ipv6 ipv6;
 758         struct rte_flow_item_ipv6 ipv6_mask;
 759         struct field_modify_info *field;
 760
 761         if (!attr->valid)
 762                 flow_dv_attr_init(items, attr);
 763         if (attr->ipv4) {
 764                 memset(&ipv4, 0, sizeof(ipv4));
 765                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 766                 ipv4.hdr.time_to_live = 0xFF;
 767                 ipv4_mask.hdr.time_to_live = 0xFF;
 768                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 769                 item.spec = &ipv4;
 770                 item.mask = &ipv4_mask;
 771                 field = modify_ipv4;
 772         }
 773         if (attr->ipv6) {
 774                 memset(&ipv6, 0, sizeof(ipv6));
 775                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 776                 ipv6.hdr.hop_limits = 0xFF;
 777                 ipv6_mask.hdr.hop_limits = 0xFF;
 778                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 779                 item.spec = &ipv6;
 780                 item.mask = &ipv6_mask;
 781                 field = modify_ipv6;
 782         }
 783         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 784                                              MLX5_MODIFICATION_TYPE_ADD, error);
 785 }
 786
 787 /**
 788  * Convert modify-header increment/decrement TCP Sequence number
 789  * to DV specification.
 790  *
 791  * @param[in,out] resource
 792  *   Pointer to the modify-header resource.
 793  * @param[in] action
 794  *   Pointer to action specification.
 795  * @param[out] error
 796  *   Pointer to the error structure.
 797  *
 798  * @return
 799  *   0 on success, a negative errno value otherwise and rte_errno is set.
 800  */
 801 static int
 802 flow_dv_convert_action_modify_tcp_seq
 803                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 804                          const struct rte_flow_action *action,
 805                          struct rte_flow_error *error)
 806 {
 807         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 808         uint64_t value = rte_be_to_cpu_32(*conf);
 809         struct rte_flow_item item;
 810         struct rte_flow_item_tcp tcp;
 811         struct rte_flow_item_tcp tcp_mask;
 812
 813         memset(&tcp, 0, sizeof(tcp));
 814         memset(&tcp_mask, 0, sizeof(tcp_mask));
 815         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 816                 /*
 817                  * The HW has no decrement operation, only increment operation.
 818                  * To simulate decrement X from Y using increment operation
 819                  * we need to add UINT32_MAX X times to Y.
 820                  * Each adding of UINT32_MAX decrements Y by 1.
 821                  */
 822                 value *= UINT32_MAX;
 823         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 824         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 825         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 826         item.spec = &tcp;
 827         item.mask = &tcp_mask;
 828         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 829                                              MLX5_MODIFICATION_TYPE_ADD, error);
 830 }
 831
 832 /**
 833  * Convert modify-header increment/decrement TCP Acknowledgment number
 834  * to DV specification.
 835  *
 836  * @param[in,out] resource
 837  *   Pointer to the modify-header resource.
 838  * @param[in] action
 839  *   Pointer to action specification.
 840  * @param[out] error
 841  *   Pointer to the error structure.
 842  *
 843  * @return
 844  *   0 on success, a negative errno value otherwise and rte_errno is set.
 845  */
 846 static int
 847 flow_dv_convert_action_modify_tcp_ack
 848                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 849                          const struct rte_flow_action *action,
 850                          struct rte_flow_error *error)
 851 {
 852         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 853         uint64_t value = rte_be_to_cpu_32(*conf);
 854         struct rte_flow_item item;
 855         struct rte_flow_item_tcp tcp;
 856         struct rte_flow_item_tcp tcp_mask;
 857
 858         memset(&tcp, 0, sizeof(tcp));
 859         memset(&tcp_mask, 0, sizeof(tcp_mask));
 860         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 861                 /*
 862                  * The HW has no decrement operation, only increment operation.
 863                  * To simulate decrement X from Y using increment operation
 864                  * we need to add UINT32_MAX X times to Y.
 865                  * Each adding of UINT32_MAX decrements Y by 1.
 866                  */
 867                 value *= UINT32_MAX;
 868         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 869         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 870         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 871         item.spec = &tcp;
 872         item.mask = &tcp_mask;
 873         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 874                                              MLX5_MODIFICATION_TYPE_ADD, error);
 875 }
 876
 877 static enum mlx5_modification_field reg_to_field[] = {
 878         [REG_NONE] = MLX5_MODI_OUT_NONE,
 879         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 880         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 881         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 882         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 883         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 884         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 885         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 886         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 887         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 888         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 889 };
 890
 891 /**
 892  * Convert register set to DV specification.
 893  *
 894  * @param[in,out] resource
 895  *   Pointer to the modify-header resource.
 896  * @param[in] action
 897  *   Pointer to action specification.
 898  * @param[out] error
 899  *   Pointer to the error structure.
 900  *
 901  * @return
 902  *   0 on success, a negative errno value otherwise and rte_errno is set.
 903  */
 904 static int
 905 flow_dv_convert_action_set_reg
 906                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 907                          const struct rte_flow_action *action,
 908                          struct rte_flow_error *error)
 909 {
 910         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 911         struct mlx5_modification_cmd *actions = resource->actions;
 912         uint32_t i = resource->actions_num;
 913
 914         if (i >= MLX5_MAX_MODIFY_NUM)
 915                 return rte_flow_error_set(error, EINVAL,
 916                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 917                                           "too many items to modify");
 918         MLX5_ASSERT(conf->id != REG_NONE);
 919         MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field));
 920         actions[i] = (struct mlx5_modification_cmd) {
 921                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 922                 .field = reg_to_field[conf->id],
 923         };
 924         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 925         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 926         ++i;
 927         resource->actions_num = i;
 928         return 0;
 929 }
 930
 931 /**
 932  * Convert SET_TAG action to DV specification.
 933  *
 934  * @param[in] dev
 935  *   Pointer to the rte_eth_dev structure.
 936  * @param[in,out] resource
 937  *   Pointer to the modify-header resource.
 938  * @param[in] conf
 939  *   Pointer to action specification.
 940  * @param[out] error
 941  *   Pointer to the error structure.
 942  *
 943  * @return
 944  *   0 on success, a negative errno value otherwise and rte_errno is set.
 945  */
 946 static int
 947 flow_dv_convert_action_set_tag
 948                         (struct rte_eth_dev *dev,
 949                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 950                          const struct rte_flow_action_set_tag *conf,
 951                          struct rte_flow_error *error)
 952 {
 953         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 954         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 955         struct rte_flow_item item = {
 956                 .spec = &data,
 957                 .mask = &mask,
 958         };
 959         struct field_modify_info reg_c_x[] = {
 960                 [1] = {0, 0, 0},
 961         };
 962         enum mlx5_modification_field reg_type;
 963         int ret;
 964
 965         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 966         if (ret < 0)
 967                 return ret;
 968         MLX5_ASSERT(ret != REG_NONE);
 969         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
 970         reg_type = reg_to_field[ret];
 971         MLX5_ASSERT(reg_type > 0);
 972         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 973         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 974                                              MLX5_MODIFICATION_TYPE_SET, error);
 975 }
 976
 977 /**
 978  * Convert internal COPY_REG action to DV specification.
 979  *
 980  * @param[in] dev
 981  *   Pointer to the rte_eth_dev structure.
 982  * @param[in,out] res
 983  *   Pointer to the modify-header resource.
 984  * @param[in] action
 985  *   Pointer to action specification.
 986  * @param[out] error
 987  *   Pointer to the error structure.
 988  *
 989  * @return
 990  *   0 on success, a negative errno value otherwise and rte_errno is set.
 991  */
 992 static int
 993 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 994                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 995                                  const struct rte_flow_action *action,
 996                                  struct rte_flow_error *error)
 997 {
 998         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 999         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1000         struct rte_flow_item item = {
1001                 .spec = NULL,
1002                 .mask = &mask,
1003         };
1004         struct field_modify_info reg_src[] = {
1005                 {4, 0, reg_to_field[conf->src]},
1006                 {0, 0, 0},
1007         };
1008         struct field_modify_info reg_dst = {
1009                 .offset = 0,
1010                 .id = reg_to_field[conf->dst],
1011         };
1012         /* Adjust reg_c[0] usage according to reported mask. */
1013         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1014                 struct mlx5_priv *priv = dev->data->dev_private;
1015                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1016
1017                 MLX5_ASSERT(reg_c0);
1018                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1019                 if (conf->dst == REG_C_0) {
1020                         /* Copy to reg_c[0], within mask only. */
1021                         reg_dst.offset = rte_bsf32(reg_c0);
1022                         /*
1023                          * Mask is ignoring the enianness, because
1024                          * there is no conversion in datapath.
1025                          */
1026 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1027                         /* Copy from destination lower bits to reg_c[0]. */
1028                         mask = reg_c0 >> reg_dst.offset;
1029 #else
1030                         /* Copy from destination upper bits to reg_c[0]. */
1031                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1032                                           rte_fls_u32(reg_c0));
1033 #endif
1034                 } else {
1035                         mask = rte_cpu_to_be_32(reg_c0);
1036 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1037                         /* Copy from reg_c[0] to destination lower bits. */
1038                         reg_dst.offset = 0;
1039 #else
1040                         /* Copy from reg_c[0] to destination upper bits. */
1041                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1042                                          (rte_fls_u32(reg_c0) -
1043                                           rte_bsf32(reg_c0));
1044 #endif
1045                 }
1046         }
1047         return flow_dv_convert_modify_action(&item,
1048                                              reg_src, &reg_dst, res,
1049                                              MLX5_MODIFICATION_TYPE_COPY,
1050                                              error);
1051 }
1052
1053 /**
1054  * Convert MARK action to DV specification. This routine is used
1055  * in extensive metadata only and requires metadata register to be
1056  * handled. In legacy mode hardware tag resource is engaged.
1057  *
1058  * @param[in] dev
1059  *   Pointer to the rte_eth_dev structure.
1060  * @param[in] conf
1061  *   Pointer to MARK action specification.
1062  * @param[in,out] resource
1063  *   Pointer to the modify-header resource.
1064  * @param[out] error
1065  *   Pointer to the error structure.
1066  *
1067  * @return
1068  *   0 on success, a negative errno value otherwise and rte_errno is set.
1069  */
1070 static int
1071 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1072                             const struct rte_flow_action_mark *conf,
1073                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1074                             struct rte_flow_error *error)
1075 {
1076         struct mlx5_priv *priv = dev->data->dev_private;
1077         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1078                                            priv->sh->dv_mark_mask);
1079         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1080         struct rte_flow_item item = {
1081                 .spec = &data,
1082                 .mask = &mask,
1083         };
1084         struct field_modify_info reg_c_x[] = {
1085                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1086                 {0, 0, 0},
1087         };
1088         int reg;
1089
1090         if (!mask)
1091                 return rte_flow_error_set(error, EINVAL,
1092                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1093                                           NULL, "zero mark action mask");
1094         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1095         if (reg < 0)
1096                 return reg;
1097         MLX5_ASSERT(reg > 0);
1098         if (reg == REG_C_0) {
1099                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1100                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1101
1102                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1103                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1104                 mask = rte_cpu_to_be_32(mask << shl_c0);
1105         }
1106         reg_c_x[0].id = reg_to_field[reg];
1107         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1108                                              MLX5_MODIFICATION_TYPE_SET, error);
1109 }
1110
1111 /**
1112  * Get metadata register index for specified steering domain.
1113  *
1114  * @param[in] dev
1115  *   Pointer to the rte_eth_dev structure.
1116  * @param[in] attr
1117  *   Attributes of flow to determine steering domain.
1118  * @param[out] error
1119  *   Pointer to the error structure.
1120  *
1121  * @return
1122  *   positive index on success, a negative errno value otherwise
1123  *   and rte_errno is set.
1124  */
1125 static enum modify_reg
1126 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1127                          const struct rte_flow_attr *attr,
1128                          struct rte_flow_error *error)
1129 {
1130         int reg =
1131                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1132                                           MLX5_METADATA_FDB :
1133                                             attr->egress ?
1134                                             MLX5_METADATA_TX :
1135                                             MLX5_METADATA_RX, 0, error);
1136         if (reg < 0)
1137                 return rte_flow_error_set(error,
1138                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1139                                           NULL, "unavailable "
1140                                           "metadata register");
1141         return reg;
1142 }
1143
1144 /**
1145  * Convert SET_META action to DV specification.
1146  *
1147  * @param[in] dev
1148  *   Pointer to the rte_eth_dev structure.
1149  * @param[in,out] resource
1150  *   Pointer to the modify-header resource.
1151  * @param[in] attr
1152  *   Attributes of flow that includes this item.
1153  * @param[in] conf
1154  *   Pointer to action specification.
1155  * @param[out] error
1156  *   Pointer to the error structure.
1157  *
1158  * @return
1159  *   0 on success, a negative errno value otherwise and rte_errno is set.
1160  */
1161 static int
1162 flow_dv_convert_action_set_meta
1163                         (struct rte_eth_dev *dev,
1164                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1165                          const struct rte_flow_attr *attr,
1166                          const struct rte_flow_action_set_meta *conf,
1167                          struct rte_flow_error *error)
1168 {
1169         uint32_t data = conf->data;
1170         uint32_t mask = conf->mask;
1171         struct rte_flow_item item = {
1172                 .spec = &data,
1173                 .mask = &mask,
1174         };
1175         struct field_modify_info reg_c_x[] = {
1176                 [1] = {0, 0, 0},
1177         };
1178         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1179
1180         if (reg < 0)
1181                 return reg;
1182         /*
1183          * In datapath code there is no endianness
1184          * coversions for perfromance reasons, all
1185          * pattern conversions are done in rte_flow.
1186          */
1187         if (reg == REG_C_0) {
1188                 struct mlx5_priv *priv = dev->data->dev_private;
1189                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1190                 uint32_t shl_c0;
1191
1192                 MLX5_ASSERT(msk_c0);
1193 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1194                 shl_c0 = rte_bsf32(msk_c0);
1195 #else
1196                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1197 #endif
1198                 mask <<= shl_c0;
1199                 data <<= shl_c0;
1200                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1201         }
1202         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1203         /* The routine expects parameters in memory as big-endian ones. */
1204         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1205                                              MLX5_MODIFICATION_TYPE_SET, error);
1206 }
1207
1208 /**
1209  * Convert modify-header set IPv4 DSCP action to DV specification.
1210  *
1211  * @param[in,out] resource
1212  *   Pointer to the modify-header resource.
1213  * @param[in] action
1214  *   Pointer to action specification.
1215  * @param[out] error
1216  *   Pointer to the error structure.
1217  *
1218  * @return
1219  *   0 on success, a negative errno value otherwise and rte_errno is set.
1220  */
1221 static int
1222 flow_dv_convert_action_modify_ipv4_dscp
1223                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1224                          const struct rte_flow_action *action,
1225                          struct rte_flow_error *error)
1226 {
1227         const struct rte_flow_action_set_dscp *conf =
1228                 (const struct rte_flow_action_set_dscp *)(action->conf);
1229         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1230         struct rte_flow_item_ipv4 ipv4;
1231         struct rte_flow_item_ipv4 ipv4_mask;
1232
1233         memset(&ipv4, 0, sizeof(ipv4));
1234         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1235         ipv4.hdr.type_of_service = conf->dscp;
1236         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1237         item.spec = &ipv4;
1238         item.mask = &ipv4_mask;
1239         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1240                                              MLX5_MODIFICATION_TYPE_SET, error);
1241 }
1242
1243 /**
1244  * Convert modify-header set IPv6 DSCP action to DV specification.
1245  *
1246  * @param[in,out] resource
1247  *   Pointer to the modify-header resource.
1248  * @param[in] action
1249  *   Pointer to action specification.
1250  * @param[out] error
1251  *   Pointer to the error structure.
1252  *
1253  * @return
1254  *   0 on success, a negative errno value otherwise and rte_errno is set.
1255  */
1256 static int
1257 flow_dv_convert_action_modify_ipv6_dscp
1258                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1259                          const struct rte_flow_action *action,
1260                          struct rte_flow_error *error)
1261 {
1262         const struct rte_flow_action_set_dscp *conf =
1263                 (const struct rte_flow_action_set_dscp *)(action->conf);
1264         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1265         struct rte_flow_item_ipv6 ipv6;
1266         struct rte_flow_item_ipv6 ipv6_mask;
1267
1268         memset(&ipv6, 0, sizeof(ipv6));
1269         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1270         /*
1271          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1272          * rdma-core only accept the DSCP bits byte aligned start from
1273          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1274          * bits in IPv6 case as rdma-core requires byte aligned value.
1275          */
1276         ipv6.hdr.vtc_flow = conf->dscp;
1277         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1278         item.spec = &ipv6;
1279         item.mask = &ipv6_mask;
1280         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1281                                              MLX5_MODIFICATION_TYPE_SET, error);
1282 }
1283
1284 /**
1285  * Validate MARK item.
1286  *
1287  * @param[in] dev
1288  *   Pointer to the rte_eth_dev structure.
1289  * @param[in] item
1290  *   Item specification.
1291  * @param[in] attr
1292  *   Attributes of flow that includes this item.
1293  * @param[out] error
1294  *   Pointer to error structure.
1295  *
1296  * @return
1297  *   0 on success, a negative errno value otherwise and rte_errno is set.
1298  */
1299 static int
1300 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1301                            const struct rte_flow_item *item,
1302                            const struct rte_flow_attr *attr __rte_unused,
1303                            struct rte_flow_error *error)
1304 {
1305         struct mlx5_priv *priv = dev->data->dev_private;
1306         struct mlx5_dev_config *config = &priv->config;
1307         const struct rte_flow_item_mark *spec = item->spec;
1308         const struct rte_flow_item_mark *mask = item->mask;
1309         const struct rte_flow_item_mark nic_mask = {
1310                 .id = priv->sh->dv_mark_mask,
1311         };
1312         int ret;
1313
1314         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1315                 return rte_flow_error_set(error, ENOTSUP,
1316                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1317                                           "extended metadata feature"
1318                                           " isn't enabled");
1319         if (!mlx5_flow_ext_mreg_supported(dev))
1320                 return rte_flow_error_set(error, ENOTSUP,
1321                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1322                                           "extended metadata register"
1323                                           " isn't supported");
1324         if (!nic_mask.id)
1325                 return rte_flow_error_set(error, ENOTSUP,
1326                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1327                                           "extended metadata register"
1328                                           " isn't available");
1329         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1330         if (ret < 0)
1331                 return ret;
1332         if (!spec)
1333                 return rte_flow_error_set(error, EINVAL,
1334                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1335                                           item->spec,
1336                                           "data cannot be empty");
1337         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1338                 return rte_flow_error_set(error, EINVAL,
1339                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1340                                           &spec->id,
1341                                           "mark id exceeds the limit");
1342         if (!mask)
1343                 mask = &nic_mask;
1344         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1345                                         (const uint8_t *)&nic_mask,
1346                                         sizeof(struct rte_flow_item_mark),
1347                                         error);
1348         if (ret < 0)
1349                 return ret;
1350         return 0;
1351 }
1352
1353 /**
1354  * Validate META item.
1355  *
1356  * @param[in] dev
1357  *   Pointer to the rte_eth_dev structure.
1358  * @param[in] item
1359  *   Item specification.
1360  * @param[in] attr
1361  *   Attributes of flow that includes this item.
1362  * @param[out] error
1363  *   Pointer to error structure.
1364  *
1365  * @return
1366  *   0 on success, a negative errno value otherwise and rte_errno is set.
1367  */
1368 static int
1369 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1370                            const struct rte_flow_item *item,
1371                            const struct rte_flow_attr *attr,
1372                            struct rte_flow_error *error)
1373 {
1374         struct mlx5_priv *priv = dev->data->dev_private;
1375         struct mlx5_dev_config *config = &priv->config;
1376         const struct rte_flow_item_meta *spec = item->spec;
1377         const struct rte_flow_item_meta *mask = item->mask;
1378         struct rte_flow_item_meta nic_mask = {
1379                 .data = UINT32_MAX
1380         };
1381         int reg;
1382         int ret;
1383
1384         if (!spec)
1385                 return rte_flow_error_set(error, EINVAL,
1386                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1387                                           item->spec,
1388                                           "data cannot be empty");
1389         if (!spec->data)
1390                 return rte_flow_error_set(error, EINVAL,
1391                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1392                                           "data cannot be zero");
1393         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1394                 if (!mlx5_flow_ext_mreg_supported(dev))
1395                         return rte_flow_error_set(error, ENOTSUP,
1396                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1397                                           "extended metadata register"
1398                                           " isn't supported");
1399                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1400                 if (reg < 0)
1401                         return reg;
1402                 if (reg == REG_B)
1403                         return rte_flow_error_set(error, ENOTSUP,
1404                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1405                                           "match on reg_b "
1406                                           "isn't supported");
1407                 if (reg != REG_A)
1408                         nic_mask.data = priv->sh->dv_meta_mask;
1409         }
1410         if (!mask)
1411                 mask = &rte_flow_item_meta_mask;
1412         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1413                                         (const uint8_t *)&nic_mask,
1414                                         sizeof(struct rte_flow_item_meta),
1415                                         error);
1416         return ret;
1417 }
1418
1419 /**
1420  * Validate TAG item.
1421  *
1422  * @param[in] dev
1423  *   Pointer to the rte_eth_dev structure.
1424  * @param[in] item
1425  *   Item specification.
1426  * @param[in] attr
1427  *   Attributes of flow that includes this item.
1428  * @param[out] error
1429  *   Pointer to error structure.
1430  *
1431  * @return
1432  *   0 on success, a negative errno value otherwise and rte_errno is set.
1433  */
1434 static int
1435 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1436                           const struct rte_flow_item *item,
1437                           const struct rte_flow_attr *attr __rte_unused,
1438                           struct rte_flow_error *error)
1439 {
1440         const struct rte_flow_item_tag *spec = item->spec;
1441         const struct rte_flow_item_tag *mask = item->mask;
1442         const struct rte_flow_item_tag nic_mask = {
1443                 .data = RTE_BE32(UINT32_MAX),
1444                 .index = 0xff,
1445         };
1446         int ret;
1447
1448         if (!mlx5_flow_ext_mreg_supported(dev))
1449                 return rte_flow_error_set(error, ENOTSUP,
1450                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1451                                           "extensive metadata register"
1452                                           " isn't supported");
1453         if (!spec)
1454                 return rte_flow_error_set(error, EINVAL,
1455                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1456                                           item->spec,
1457                                           "data cannot be empty");
1458         if (!mask)
1459                 mask = &rte_flow_item_tag_mask;
1460         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1461                                         (const uint8_t *)&nic_mask,
1462                                         sizeof(struct rte_flow_item_tag),
1463                                         error);
1464         if (ret < 0)
1465                 return ret;
1466         if (mask->index != 0xff)
1467                 return rte_flow_error_set(error, EINVAL,
1468                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1469                                           "partial mask for tag index"
1470                                           " is not supported");
1471         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1472         if (ret < 0)
1473                 return ret;
1474         MLX5_ASSERT(ret != REG_NONE);
1475         return 0;
1476 }
1477
1478 /**
1479  * Validate vport item.
1480  *
1481  * @param[in] dev
1482  *   Pointer to the rte_eth_dev structure.
1483  * @param[in] item
1484  *   Item specification.
1485  * @param[in] attr
1486  *   Attributes of flow that includes this item.
1487  * @param[in] item_flags
1488  *   Bit-fields that holds the items detected until now.
1489  * @param[out] error
1490  *   Pointer to error structure.
1491  *
1492  * @return
1493  *   0 on success, a negative errno value otherwise and rte_errno is set.
1494  */
1495 static int
1496 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1497                               const struct rte_flow_item *item,
1498                               const struct rte_flow_attr *attr,
1499                               uint64_t item_flags,
1500                               struct rte_flow_error *error)
1501 {
1502         const struct rte_flow_item_port_id *spec = item->spec;
1503         const struct rte_flow_item_port_id *mask = item->mask;
1504         const struct rte_flow_item_port_id switch_mask = {
1505                         .id = 0xffffffff,
1506         };
1507         struct mlx5_priv *esw_priv;
1508         struct mlx5_priv *dev_priv;
1509         int ret;
1510
1511         if (!attr->transfer)
1512                 return rte_flow_error_set(error, EINVAL,
1513                                           RTE_FLOW_ERROR_TYPE_ITEM,
1514                                           NULL,
1515                                           "match on port id is valid only"
1516                                           " when transfer flag is enabled");
1517         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1518                 return rte_flow_error_set(error, ENOTSUP,
1519                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1520                                           "multiple source ports are not"
1521                                           " supported");
1522         if (!mask)
1523                 mask = &switch_mask;
1524         if (mask->id != 0xffffffff)
1525                 return rte_flow_error_set(error, ENOTSUP,
1526                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1527                                            mask,
1528                                            "no support for partial mask on"
1529                                            " \"id\" field");
1530         ret = mlx5_flow_item_acceptable
1531                                 (item, (const uint8_t *)mask,
1532                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1533                                  sizeof(struct rte_flow_item_port_id),
1534                                  error);
1535         if (ret)
1536                 return ret;
1537         if (!spec)
1538                 return 0;
1539         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1540         if (!esw_priv)
1541                 return rte_flow_error_set(error, rte_errno,
1542                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1543                                           "failed to obtain E-Switch info for"
1544                                           " port");
1545         dev_priv = mlx5_dev_to_eswitch_info(dev);
1546         if (!dev_priv)
1547                 return rte_flow_error_set(error, rte_errno,
1548                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1549                                           NULL,
1550                                           "failed to obtain E-Switch info");
1551         if (esw_priv->domain_id != dev_priv->domain_id)
1552                 return rte_flow_error_set(error, EINVAL,
1553                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1554                                           "cannot match on a port from a"
1555                                           " different E-Switch");
1556         return 0;
1557 }
1558
1559 /**
1560  * Validate GTP item.
1561  *
1562  * @param[in] dev
1563  *   Pointer to the rte_eth_dev structure.
1564  * @param[in] item
1565  *   Item specification.
1566  * @param[in] item_flags
1567  *   Bit-fields that holds the items detected until now.
1568  * @param[out] error
1569  *   Pointer to error structure.
1570  *
1571  * @return
1572  *   0 on success, a negative errno value otherwise and rte_errno is set.
1573  */
1574 static int
1575 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1576                           const struct rte_flow_item *item,
1577                           uint64_t item_flags,
1578                           struct rte_flow_error *error)
1579 {
1580         struct mlx5_priv *priv = dev->data->dev_private;
1581         const struct rte_flow_item_gtp *mask = item->mask;
1582         const struct rte_flow_item_gtp nic_mask = {
1583                 .msg_type = 0xff,
1584                 .teid = RTE_BE32(0xffffffff),
1585         };
1586
1587         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1588                 return rte_flow_error_set(error, ENOTSUP,
1589                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1590                                           "GTP support is not enabled");
1591         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1592                 return rte_flow_error_set(error, ENOTSUP,
1593                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1594                                           "multiple tunnel layers not"
1595                                           " supported");
1596         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1597                 return rte_flow_error_set(error, EINVAL,
1598                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1599                                           "no outer UDP layer found");
1600         if (!mask)
1601                 mask = &rte_flow_item_gtp_mask;
1602         return mlx5_flow_item_acceptable
1603                 (item, (const uint8_t *)mask,
1604                  (const uint8_t *)&nic_mask,
1605                  sizeof(struct rte_flow_item_gtp),
1606                  error);
1607 }
1608
1609 /**
1610  * Validate the pop VLAN action.
1611  *
1612  * @param[in] dev
1613  *   Pointer to the rte_eth_dev structure.
1614  * @param[in] action_flags
1615  *   Holds the actions detected until now.
1616  * @param[in] action
1617  *   Pointer to the pop vlan action.
1618  * @param[in] item_flags
1619  *   The items found in this flow rule.
1620  * @param[in] attr
1621  *   Pointer to flow attributes.
1622  * @param[out] error
1623  *   Pointer to error structure.
1624  *
1625  * @return
1626  *   0 on success, a negative errno value otherwise and rte_errno is set.
1627  */
1628 static int
1629 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1630                                  uint64_t action_flags,
1631                                  const struct rte_flow_action *action,
1632                                  uint64_t item_flags,
1633                                  const struct rte_flow_attr *attr,
1634                                  struct rte_flow_error *error)
1635 {
1636         struct mlx5_priv *priv = dev->data->dev_private;
1637
1638         (void)action;
1639         (void)attr;
1640         if (!priv->sh->pop_vlan_action)
1641                 return rte_flow_error_set(error, ENOTSUP,
1642                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1643                                           NULL,
1644                                           "pop vlan action is not supported");
1645         if (attr->egress)
1646                 return rte_flow_error_set(error, ENOTSUP,
1647                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1648                                           NULL,
1649                                           "pop vlan action not supported for "
1650                                           "egress");
1651         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1652                 return rte_flow_error_set(error, ENOTSUP,
1653                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1654                                           "no support for multiple VLAN "
1655                                           "actions");
1656         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1657                 return rte_flow_error_set(error, ENOTSUP,
1658                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1659                                           NULL,
1660                                           "cannot pop vlan without a "
1661                                           "match on (outer) vlan in the flow");
1662         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1663                 return rte_flow_error_set(error, EINVAL,
1664                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1665                                           "wrong action order, port_id should "
1666                                           "be after pop VLAN action");
1667         return 0;
1668 }
1669
1670 /**
1671  * Get VLAN default info from vlan match info.
1672  *
1673  * @param[in] items
1674  *   the list of item specifications.
1675  * @param[out] vlan
1676  *   pointer VLAN info to fill to.
1677  *
1678  * @return
1679  *   0 on success, a negative errno value otherwise and rte_errno is set.
1680  */
1681 static void
1682 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1683                                   struct rte_vlan_hdr *vlan)
1684 {
1685         const struct rte_flow_item_vlan nic_mask = {
1686                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1687                                 MLX5DV_FLOW_VLAN_VID_MASK),
1688                 .inner_type = RTE_BE16(0xffff),
1689         };
1690
1691         if (items == NULL)
1692                 return;
1693         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1694                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1695                 ;
1696         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1697                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1698                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1699
1700                 if (!vlan_m)
1701                         vlan_m = &nic_mask;
1702                 /* Only full match values are accepted */
1703                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1704                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1705                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1706                         vlan->vlan_tci |=
1707                                 rte_be_to_cpu_16(vlan_v->tci &
1708                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1709                 }
1710                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1711                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1712                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1713                         vlan->vlan_tci |=
1714                                 rte_be_to_cpu_16(vlan_v->tci &
1715                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1716                 }
1717                 if (vlan_m->inner_type == nic_mask.inner_type)
1718                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1719                                                            vlan_m->inner_type);
1720         }
1721 }
1722
1723 /**
1724  * Validate the push VLAN action.
1725  *
1726  * @param[in] action_flags
1727  *   Holds the actions detected until now.
1728  * @param[in] item_flags
1729  *   The items found in this flow rule.
1730  * @param[in] action
1731  *   Pointer to the action structure.
1732  * @param[in] attr
1733  *   Pointer to flow attributes
1734  * @param[out] error
1735  *   Pointer to error structure.
1736  *
1737  * @return
1738  *   0 on success, a negative errno value otherwise and rte_errno is set.
1739  */
1740 static int
1741 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1742                                   uint64_t item_flags __rte_unused,
1743                                   const struct rte_flow_action *action,
1744                                   const struct rte_flow_attr *attr,
1745                                   struct rte_flow_error *error)
1746 {
1747         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1748
1749         if (attr->ingress)
1750                 return rte_flow_error_set(error, ENOTSUP,
1751                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1752                                           NULL,
1753                                           "push VLAN action not supported for "
1754                                           "ingress");
1755         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1756             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1757                 return rte_flow_error_set(error, EINVAL,
1758                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1759                                           "invalid vlan ethertype");
1760         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1761                 return rte_flow_error_set(error, ENOTSUP,
1762                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1763                                           "no support for multiple VLAN "
1764                                           "actions");
1765         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1766                 return rte_flow_error_set(error, EINVAL,
1767                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1768                                           "wrong action order, port_id should "
1769                                           "be after push VLAN");
1770         (void)attr;
1771         return 0;
1772 }
1773
1774 /**
1775  * Validate the set VLAN PCP.
1776  *
1777  * @param[in] action_flags
1778  *   Holds the actions detected until now.
1779  * @param[in] actions
1780  *   Pointer to the list of actions remaining in the flow rule.
1781  * @param[out] error
1782  *   Pointer to error structure.
1783  *
1784  * @return
1785  *   0 on success, a negative errno value otherwise and rte_errno is set.
1786  */
1787 static int
1788 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1789                                      const struct rte_flow_action actions[],
1790                                      struct rte_flow_error *error)
1791 {
1792         const struct rte_flow_action *action = actions;
1793         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1794
1795         if (conf->vlan_pcp > 7)
1796                 return rte_flow_error_set(error, EINVAL,
1797                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1798                                           "VLAN PCP value is too big");
1799         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1800                 return rte_flow_error_set(error, ENOTSUP,
1801                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1802                                           "set VLAN PCP action must follow "
1803                                           "the push VLAN action");
1804         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1805                 return rte_flow_error_set(error, ENOTSUP,
1806                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1807                                           "Multiple VLAN PCP modification are "
1808                                           "not supported");
1809         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1810                 return rte_flow_error_set(error, EINVAL,
1811                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1812                                           "wrong action order, port_id should "
1813                                           "be after set VLAN PCP");
1814         return 0;
1815 }
1816
1817 /**
1818  * Validate the set VLAN VID.
1819  *
1820  * @param[in] item_flags
1821  *   Holds the items detected in this rule.
1822  * @param[in] action_flags
1823  *   Holds the actions detected until now.
1824  * @param[in] actions
1825  *   Pointer to the list of actions remaining in the flow rule.
1826  * @param[out] error
1827  *   Pointer to error structure.
1828  *
1829  * @return
1830  *   0 on success, a negative errno value otherwise and rte_errno is set.
1831  */
1832 static int
1833 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1834                                      uint64_t action_flags,
1835                                      const struct rte_flow_action actions[],
1836                                      struct rte_flow_error *error)
1837 {
1838         const struct rte_flow_action *action = actions;
1839         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1840
1841         if (conf->vlan_vid > RTE_BE16(0xFFE))
1842                 return rte_flow_error_set(error, EINVAL,
1843                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1844                                           "VLAN VID value is too big");
1845         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1846             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1847                 return rte_flow_error_set(error, ENOTSUP,
1848                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1849                                           "set VLAN VID action must follow push"
1850                                           " VLAN action or match on VLAN item");
1851         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1852                 return rte_flow_error_set(error, ENOTSUP,
1853                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1854                                           "Multiple VLAN VID modifications are "
1855                                           "not supported");
1856         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1857                 return rte_flow_error_set(error, EINVAL,
1858                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1859                                           "wrong action order, port_id should "
1860                                           "be after set VLAN VID");
1861         return 0;
1862 }
1863
1864 /*
1865  * Validate the FLAG action.
1866  *
1867  * @param[in] dev
1868  *   Pointer to the rte_eth_dev structure.
1869  * @param[in] action_flags
1870  *   Holds the actions detected until now.
1871  * @param[in] attr
1872  *   Pointer to flow attributes
1873  * @param[out] error
1874  *   Pointer to error structure.
1875  *
1876  * @return
1877  *   0 on success, a negative errno value otherwise and rte_errno is set.
1878  */
1879 static int
1880 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1881                              uint64_t action_flags,
1882                              const struct rte_flow_attr *attr,
1883                              struct rte_flow_error *error)
1884 {
1885         struct mlx5_priv *priv = dev->data->dev_private;
1886         struct mlx5_dev_config *config = &priv->config;
1887         int ret;
1888
1889         /* Fall back if no extended metadata register support. */
1890         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1891                 return mlx5_flow_validate_action_flag(action_flags, attr,
1892                                                       error);
1893         /* Extensive metadata mode requires registers. */
1894         if (!mlx5_flow_ext_mreg_supported(dev))
1895                 return rte_flow_error_set(error, ENOTSUP,
1896                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1897                                           "no metadata registers "
1898                                           "to support flag action");
1899         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1900                 return rte_flow_error_set(error, ENOTSUP,
1901                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1902                                           "extended metadata register"
1903                                           " isn't available");
1904         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1905         if (ret < 0)
1906                 return ret;
1907         MLX5_ASSERT(ret > 0);
1908         if (action_flags & MLX5_FLOW_ACTION_MARK)
1909                 return rte_flow_error_set(error, EINVAL,
1910                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1911                                           "can't mark and flag in same flow");
1912         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1913                 return rte_flow_error_set(error, EINVAL,
1914                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1915                                           "can't have 2 flag"
1916                                           " actions in same flow");
1917         return 0;
1918 }
1919
1920 /**
1921  * Validate MARK action.
1922  *
1923  * @param[in] dev
1924  *   Pointer to the rte_eth_dev structure.
1925  * @param[in] action
1926  *   Pointer to action.
1927  * @param[in] action_flags
1928  *   Holds the actions detected until now.
1929  * @param[in] attr
1930  *   Pointer to flow attributes
1931  * @param[out] error
1932  *   Pointer to error structure.
1933  *
1934  * @return
1935  *   0 on success, a negative errno value otherwise and rte_errno is set.
1936  */
1937 static int
1938 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1939                              const struct rte_flow_action *action,
1940                              uint64_t action_flags,
1941                              const struct rte_flow_attr *attr,
1942                              struct rte_flow_error *error)
1943 {
1944         struct mlx5_priv *priv = dev->data->dev_private;
1945         struct mlx5_dev_config *config = &priv->config;
1946         const struct rte_flow_action_mark *mark = action->conf;
1947         int ret;
1948
1949         /* Fall back if no extended metadata register support. */
1950         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1951                 return mlx5_flow_validate_action_mark(action, action_flags,
1952                                                       attr, error);
1953         /* Extensive metadata mode requires registers. */
1954         if (!mlx5_flow_ext_mreg_supported(dev))
1955                 return rte_flow_error_set(error, ENOTSUP,
1956                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1957                                           "no metadata registers "
1958                                           "to support mark action");
1959         if (!priv->sh->dv_mark_mask)
1960                 return rte_flow_error_set(error, ENOTSUP,
1961                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1962                                           "extended metadata register"
1963                                           " isn't available");
1964         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1965         if (ret < 0)
1966                 return ret;
1967         MLX5_ASSERT(ret > 0);
1968         if (!mark)
1969                 return rte_flow_error_set(error, EINVAL,
1970                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1971                                           "configuration cannot be null");
1972         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1973                 return rte_flow_error_set(error, EINVAL,
1974                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1975                                           &mark->id,
1976                                           "mark id exceeds the limit");
1977         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1978                 return rte_flow_error_set(error, EINVAL,
1979                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1980                                           "can't flag and mark in same flow");
1981         if (action_flags & MLX5_FLOW_ACTION_MARK)
1982                 return rte_flow_error_set(error, EINVAL,
1983                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1984                                           "can't have 2 mark actions in same"
1985                                           " flow");
1986         return 0;
1987 }
1988
1989 /**
1990  * Validate SET_META action.
1991  *
1992  * @param[in] dev
1993  *   Pointer to the rte_eth_dev structure.
1994  * @param[in] action
1995  *   Pointer to the action structure.
1996  * @param[in] action_flags
1997  *   Holds the actions detected until now.
1998  * @param[in] attr
1999  *   Pointer to flow attributes
2000  * @param[out] error
2001  *   Pointer to error structure.
2002  *
2003  * @return
2004  *   0 on success, a negative errno value otherwise and rte_errno is set.
2005  */
2006 static int
2007 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2008                                  const struct rte_flow_action *action,
2009                                  uint64_t action_flags __rte_unused,
2010                                  const struct rte_flow_attr *attr,
2011                                  struct rte_flow_error *error)
2012 {
2013         const struct rte_flow_action_set_meta *conf;
2014         uint32_t nic_mask = UINT32_MAX;
2015         int reg;
2016
2017         if (!mlx5_flow_ext_mreg_supported(dev))
2018                 return rte_flow_error_set(error, ENOTSUP,
2019                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2020                                           "extended metadata register"
2021                                           " isn't supported");
2022         reg = flow_dv_get_metadata_reg(dev, attr, error);
2023         if (reg < 0)
2024                 return reg;
2025         if (reg != REG_A && reg != REG_B) {
2026                 struct mlx5_priv *priv = dev->data->dev_private;
2027
2028                 nic_mask = priv->sh->dv_meta_mask;
2029         }
2030         if (!(action->conf))
2031                 return rte_flow_error_set(error, EINVAL,
2032                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2033                                           "configuration cannot be null");
2034         conf = (const struct rte_flow_action_set_meta *)action->conf;
2035         if (!conf->mask)
2036                 return rte_flow_error_set(error, EINVAL,
2037                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2038                                           "zero mask doesn't have any effect");
2039         if (conf->mask & ~nic_mask)
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2042                                           "meta data must be within reg C0");
2043         if (!(conf->data & conf->mask))
2044                 return rte_flow_error_set(error, EINVAL,
2045                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2046                                           "zero value has no effect");
2047         return 0;
2048 }
2049
2050 /**
2051  * Validate SET_TAG action.
2052  *
2053  * @param[in] dev
2054  *   Pointer to the rte_eth_dev structure.
2055  * @param[in] action
2056  *   Pointer to the action structure.
2057  * @param[in] action_flags
2058  *   Holds the actions detected until now.
2059  * @param[in] attr
2060  *   Pointer to flow attributes
2061  * @param[out] error
2062  *   Pointer to error structure.
2063  *
2064  * @return
2065  *   0 on success, a negative errno value otherwise and rte_errno is set.
2066  */
2067 static int
2068 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2069                                 const struct rte_flow_action *action,
2070                                 uint64_t action_flags,
2071                                 const struct rte_flow_attr *attr,
2072                                 struct rte_flow_error *error)
2073 {
2074         const struct rte_flow_action_set_tag *conf;
2075         const uint64_t terminal_action_flags =
2076                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2077                 MLX5_FLOW_ACTION_RSS;
2078         int ret;
2079
2080         if (!mlx5_flow_ext_mreg_supported(dev))
2081                 return rte_flow_error_set(error, ENOTSUP,
2082                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2083                                           "extensive metadata register"
2084                                           " isn't supported");
2085         if (!(action->conf))
2086                 return rte_flow_error_set(error, EINVAL,
2087                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2088                                           "configuration cannot be null");
2089         conf = (const struct rte_flow_action_set_tag *)action->conf;
2090         if (!conf->mask)
2091                 return rte_flow_error_set(error, EINVAL,
2092                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2093                                           "zero mask doesn't have any effect");
2094         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2095         if (ret < 0)
2096                 return ret;
2097         if (!attr->transfer && attr->ingress &&
2098             (action_flags & terminal_action_flags))
2099                 return rte_flow_error_set(error, EINVAL,
2100                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2101                                           "set_tag has no effect"
2102                                           " with terminal actions");
2103         return 0;
2104 }
2105
2106 /**
2107  * Validate count action.
2108  *
2109  * @param[in] dev
2110  *   Pointer to rte_eth_dev structure.
2111  * @param[out] error
2112  *   Pointer to error structure.
2113  *
2114  * @return
2115  *   0 on success, a negative errno value otherwise and rte_errno is set.
2116  */
2117 static int
2118 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2119                               struct rte_flow_error *error)
2120 {
2121         struct mlx5_priv *priv = dev->data->dev_private;
2122
2123         if (!priv->config.devx)
2124                 goto notsup_err;
2125 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2126         return 0;
2127 #endif
2128 notsup_err:
2129         return rte_flow_error_set
2130                       (error, ENOTSUP,
2131                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2132                        NULL,
2133                        "count action not supported");
2134 }
2135
2136 /**
2137  * Validate the L2 encap action.
2138  *
2139  * @param[in] action_flags
2140  *   Holds the actions detected until now.
2141  * @param[in] action
2142  *   Pointer to the action structure.
2143  * @param[in] attr
2144  *   Pointer to flow attributes
2145  * @param[out] error
2146  *   Pointer to error structure.
2147  *
2148  * @return
2149  *   0 on success, a negative errno value otherwise and rte_errno is set.
2150  */
2151 static int
2152 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2153                                  const struct rte_flow_action *action,
2154                                  const struct rte_flow_attr *attr,
2155                                  struct rte_flow_error *error)
2156 {
2157         if (!(action->conf))
2158                 return rte_flow_error_set(error, EINVAL,
2159                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2160                                           "configuration cannot be null");
2161         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2162                 return rte_flow_error_set(error, EINVAL,
2163                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2164                                           "can only have a single encap or"
2165                                           " decap action in a flow");
2166         if (!attr->transfer && attr->ingress)
2167                 return rte_flow_error_set(error, ENOTSUP,
2168                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2169                                           NULL,
2170                                           "encap action not supported for "
2171                                           "ingress");
2172         return 0;
2173 }
2174
2175 /**
2176  * Validate the L2 decap action.
2177  *
2178  * @param[in] action_flags
2179  *   Holds the actions detected until now.
2180  * @param[in] attr
2181  *   Pointer to flow attributes
2182  * @param[out] error
2183  *   Pointer to error structure.
2184  *
2185  * @return
2186  *   0 on success, a negative errno value otherwise and rte_errno is set.
2187  */
2188 static int
2189 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2190                                  const struct rte_flow_attr *attr,
2191                                  struct rte_flow_error *error)
2192 {
2193         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2194                 return rte_flow_error_set(error, EINVAL,
2195                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2196                                           "can only have a single encap or"
2197                                           " decap action in a flow");
2198         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2199                 return rte_flow_error_set(error, EINVAL,
2200                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2201                                           "can't have decap action after"
2202                                           " modify action");
2203         if (attr->egress)
2204                 return rte_flow_error_set(error, ENOTSUP,
2205                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2206                                           NULL,
2207                                           "decap action not supported for "
2208                                           "egress");
2209         return 0;
2210 }
2211
2212 /**
2213  * Validate the raw encap action.
2214  *
2215  * @param[in] action_flags
2216  *   Holds the actions detected until now.
2217  * @param[in] action
2218  *   Pointer to the encap action.
2219  * @param[in] attr
2220  *   Pointer to flow attributes
2221  * @param[out] error
2222  *   Pointer to error structure.
2223  *
2224  * @return
2225  *   0 on success, a negative errno value otherwise and rte_errno is set.
2226  */
2227 static int
2228 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2229                                   const struct rte_flow_action *action,
2230                                   const struct rte_flow_attr *attr,
2231                                   struct rte_flow_error *error)
2232 {
2233         const struct rte_flow_action_raw_encap *raw_encap =
2234                 (const struct rte_flow_action_raw_encap *)action->conf;
2235         if (!(action->conf))
2236                 return rte_flow_error_set(error, EINVAL,
2237                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2238                                           "configuration cannot be null");
2239         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2240                 return rte_flow_error_set(error, EINVAL,
2241                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2242                                           "can only have a single encap"
2243                                           " action in a flow");
2244         /* encap without preceding decap is not supported for ingress */
2245         if (!attr->transfer &&  attr->ingress &&
2246             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2247                 return rte_flow_error_set(error, ENOTSUP,
2248                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2249                                           NULL,
2250                                           "encap action not supported for "
2251                                           "ingress");
2252         if (!raw_encap->size || !raw_encap->data)
2253                 return rte_flow_error_set(error, EINVAL,
2254                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2255                                           "raw encap data cannot be empty");
2256         return 0;
2257 }
2258
2259 /**
2260  * Validate the raw decap action.
2261  *
2262  * @param[in] action_flags
2263  *   Holds the actions detected until now.
2264  * @param[in] action
2265  *   Pointer to the encap action.
2266  * @param[in] attr
2267  *   Pointer to flow attributes
2268  * @param[out] error
2269  *   Pointer to error structure.
2270  *
2271  * @return
2272  *   0 on success, a negative errno value otherwise and rte_errno is set.
2273  */
2274 static int
2275 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2276                                   const struct rte_flow_action *action,
2277                                   const struct rte_flow_attr *attr,
2278                                   struct rte_flow_error *error)
2279 {
2280         const struct rte_flow_action_raw_decap *decap   = action->conf;
2281
2282         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2283                 return rte_flow_error_set(error, EINVAL,
2284                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2285                                           "can't have encap action before"
2286                                           " decap action");
2287         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2288                 return rte_flow_error_set(error, EINVAL,
2289                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2290                                           "can only have a single decap"
2291                                           " action in a flow");
2292         /* decap action is valid on egress only if it is followed by encap */
2293         if (attr->egress && decap &&
2294             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2295                 return rte_flow_error_set(error, ENOTSUP,
2296                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2297                                           NULL, "decap action not supported"
2298                                           " for egress");
2299         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2300                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2301                 return rte_flow_error_set(error, EINVAL,
2302                                           RTE_FLOW_ERROR_TYPE_ACTION,
2303                                           NULL,
2304                                           "can't have decap action "
2305                                           "after modify action");
2306         }
2307         return 0;
2308 }
2309
2310 /**
2311  * Find existing encap/decap resource or create and register a new one.
2312  *
2313  * @param[in, out] dev
2314  *   Pointer to rte_eth_dev structure.
2315  * @param[in, out] resource
2316  *   Pointer to encap/decap resource.
2317  * @parm[in, out] dev_flow
2318  *   Pointer to the dev_flow.
2319  * @param[out] error
2320  *   pointer to error structure.
2321  *
2322  * @return
2323  *   0 on success otherwise -errno and errno is set.
2324  */
2325 static int
2326 flow_dv_encap_decap_resource_register
2327                         (struct rte_eth_dev *dev,
2328                          struct mlx5_flow_dv_encap_decap_resource *resource,
2329                          struct mlx5_flow *dev_flow,
2330                          struct rte_flow_error *error)
2331 {
2332         struct mlx5_priv *priv = dev->data->dev_private;
2333         struct mlx5_ibv_shared *sh = priv->sh;
2334         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2335         struct mlx5dv_dr_domain *domain;
2336
2337         resource->flags = dev_flow->group ? 0 : 1;
2338         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2339                 domain = sh->fdb_domain;
2340         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2341                 domain = sh->rx_domain;
2342         else
2343                 domain = sh->tx_domain;
2344         /* Lookup a matching resource from cache. */
2345         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2346                 if (resource->reformat_type == cache_resource->reformat_type &&
2347                     resource->ft_type == cache_resource->ft_type &&
2348                     resource->flags == cache_resource->flags &&
2349                     resource->size == cache_resource->size &&
2350                     !memcmp((const void *)resource->buf,
2351                             (const void *)cache_resource->buf,
2352                             resource->size)) {
2353                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2354                                 (void *)cache_resource,
2355                                 rte_atomic32_read(&cache_resource->refcnt));
2356                         rte_atomic32_inc(&cache_resource->refcnt);
2357                         dev_flow->dv.encap_decap = cache_resource;
2358                         return 0;
2359                 }
2360         }
2361         /* Register new encap/decap resource. */
2362         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2363         if (!cache_resource)
2364                 return rte_flow_error_set(error, ENOMEM,
2365                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2366                                           "cannot allocate resource memory");
2367         *cache_resource = *resource;
2368         cache_resource->verbs_action =
2369                 mlx5_glue->dv_create_flow_action_packet_reformat
2370                         (sh->ctx, cache_resource->reformat_type,
2371                          cache_resource->ft_type, domain, cache_resource->flags,
2372                          cache_resource->size,
2373                          (cache_resource->size ? cache_resource->buf : NULL));
2374         if (!cache_resource->verbs_action) {
2375                 rte_free(cache_resource);
2376                 return rte_flow_error_set(error, ENOMEM,
2377                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2378                                           NULL, "cannot create action");
2379         }
2380         rte_atomic32_init(&cache_resource->refcnt);
2381         rte_atomic32_inc(&cache_resource->refcnt);
2382         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2383         dev_flow->dv.encap_decap = cache_resource;
2384         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2385                 (void *)cache_resource,
2386                 rte_atomic32_read(&cache_resource->refcnt));
2387         return 0;
2388 }
2389
2390 /**
2391  * Find existing table jump resource or create and register a new one.
2392  *
2393  * @param[in, out] dev
2394  *   Pointer to rte_eth_dev structure.
2395  * @param[in, out] tbl
2396  *   Pointer to flow table resource.
2397  * @parm[in, out] dev_flow
2398  *   Pointer to the dev_flow.
2399  * @param[out] error
2400  *   pointer to error structure.
2401  *
2402  * @return
2403  *   0 on success otherwise -errno and errno is set.
2404  */
2405 static int
2406 flow_dv_jump_tbl_resource_register
2407                         (struct rte_eth_dev *dev __rte_unused,
2408                          struct mlx5_flow_tbl_resource *tbl,
2409                          struct mlx5_flow *dev_flow,
2410                          struct rte_flow_error *error)
2411 {
2412         struct mlx5_flow_tbl_data_entry *tbl_data =
2413                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2414         int cnt;
2415
2416         MLX5_ASSERT(tbl);
2417         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2418         if (!cnt) {
2419                 tbl_data->jump.action =
2420                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2421                         (tbl->obj);
2422                 if (!tbl_data->jump.action)
2423                         return rte_flow_error_set(error, ENOMEM,
2424                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2425                                         NULL, "cannot create jump action");
2426                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2427                         (void *)&tbl_data->jump, cnt);
2428         } else {
2429                 MLX5_ASSERT(tbl_data->jump.action);
2430                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2431                         (void *)&tbl_data->jump, cnt);
2432         }
2433         rte_atomic32_inc(&tbl_data->jump.refcnt);
2434         dev_flow->dv.jump = &tbl_data->jump;
2435         return 0;
2436 }
2437
2438 /**
2439  * Find existing table port ID resource or create and register a new one.
2440  *
2441  * @param[in, out] dev
2442  *   Pointer to rte_eth_dev structure.
2443  * @param[in, out] resource
2444  *   Pointer to port ID action resource.
2445  * @parm[in, out] dev_flow
2446  *   Pointer to the dev_flow.
2447  * @param[out] error
2448  *   pointer to error structure.
2449  *
2450  * @return
2451  *   0 on success otherwise -errno and errno is set.
2452  */
2453 static int
2454 flow_dv_port_id_action_resource_register
2455                         (struct rte_eth_dev *dev,
2456                          struct mlx5_flow_dv_port_id_action_resource *resource,
2457                          struct mlx5_flow *dev_flow,
2458                          struct rte_flow_error *error)
2459 {
2460         struct mlx5_priv *priv = dev->data->dev_private;
2461         struct mlx5_ibv_shared *sh = priv->sh;
2462         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2463
2464         /* Lookup a matching resource from cache. */
2465         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2466                 if (resource->port_id == cache_resource->port_id) {
2467                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2468                                 "refcnt %d++",
2469                                 (void *)cache_resource,
2470                                 rte_atomic32_read(&cache_resource->refcnt));
2471                         rte_atomic32_inc(&cache_resource->refcnt);
2472                         dev_flow->dv.port_id_action = cache_resource;
2473                         return 0;
2474                 }
2475         }
2476         /* Register new port id action resource. */
2477         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2478         if (!cache_resource)
2479                 return rte_flow_error_set(error, ENOMEM,
2480                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2481                                           "cannot allocate resource memory");
2482         *cache_resource = *resource;
2483         /*
2484          * Depending on rdma_core version the glue routine calls
2485          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2486          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2487          */
2488         cache_resource->action =
2489                 mlx5_glue->dr_create_flow_action_dest_port
2490                         (priv->sh->fdb_domain, resource->port_id);
2491         if (!cache_resource->action) {
2492                 rte_free(cache_resource);
2493                 return rte_flow_error_set(error, ENOMEM,
2494                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2495                                           NULL, "cannot create action");
2496         }
2497         rte_atomic32_init(&cache_resource->refcnt);
2498         rte_atomic32_inc(&cache_resource->refcnt);
2499         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2500         dev_flow->dv.port_id_action = cache_resource;
2501         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2502                 (void *)cache_resource,
2503                 rte_atomic32_read(&cache_resource->refcnt));
2504         return 0;
2505 }
2506
2507 /**
2508  * Find existing push vlan resource or create and register a new one.
2509  *
2510  * @param [in, out] dev
2511  *   Pointer to rte_eth_dev structure.
2512  * @param[in, out] resource
2513  *   Pointer to port ID action resource.
2514  * @parm[in, out] dev_flow
2515  *   Pointer to the dev_flow.
2516  * @param[out] error
2517  *   pointer to error structure.
2518  *
2519  * @return
2520  *   0 on success otherwise -errno and errno is set.
2521  */
2522 static int
2523 flow_dv_push_vlan_action_resource_register
2524                        (struct rte_eth_dev *dev,
2525                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2526                         struct mlx5_flow *dev_flow,
2527                         struct rte_flow_error *error)
2528 {
2529         struct mlx5_priv *priv = dev->data->dev_private;
2530         struct mlx5_ibv_shared *sh = priv->sh;
2531         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2532         struct mlx5dv_dr_domain *domain;
2533
2534         /* Lookup a matching resource from cache. */
2535         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2536                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2537                     resource->ft_type == cache_resource->ft_type) {
2538                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2539                                 "refcnt %d++",
2540                                 (void *)cache_resource,
2541                                 rte_atomic32_read(&cache_resource->refcnt));
2542                         rte_atomic32_inc(&cache_resource->refcnt);
2543                         dev_flow->dv.push_vlan_res = cache_resource;
2544                         return 0;
2545                 }
2546         }
2547         /* Register new push_vlan action resource. */
2548         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2549         if (!cache_resource)
2550                 return rte_flow_error_set(error, ENOMEM,
2551                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2552                                           "cannot allocate resource memory");
2553         *cache_resource = *resource;
2554         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2555                 domain = sh->fdb_domain;
2556         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2557                 domain = sh->rx_domain;
2558         else
2559                 domain = sh->tx_domain;
2560         cache_resource->action =
2561                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2562                                                            resource->vlan_tag);
2563         if (!cache_resource->action) {
2564                 rte_free(cache_resource);
2565                 return rte_flow_error_set(error, ENOMEM,
2566                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2567                                           NULL, "cannot create action");
2568         }
2569         rte_atomic32_init(&cache_resource->refcnt);
2570         rte_atomic32_inc(&cache_resource->refcnt);
2571         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2572         dev_flow->dv.push_vlan_res = cache_resource;
2573         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2574                 (void *)cache_resource,
2575                 rte_atomic32_read(&cache_resource->refcnt));
2576         return 0;
2577 }
2578 /**
2579  * Get the size of specific rte_flow_item_type
2580  *
2581  * @param[in] item_type
2582  *   Tested rte_flow_item_type.
2583  *
2584  * @return
2585  *   sizeof struct item_type, 0 if void or irrelevant.
2586  */
2587 static size_t
2588 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2589 {
2590         size_t retval;
2591
2592         switch (item_type) {
2593         case RTE_FLOW_ITEM_TYPE_ETH:
2594                 retval = sizeof(struct rte_flow_item_eth);
2595                 break;
2596         case RTE_FLOW_ITEM_TYPE_VLAN:
2597                 retval = sizeof(struct rte_flow_item_vlan);
2598                 break;
2599         case RTE_FLOW_ITEM_TYPE_IPV4:
2600                 retval = sizeof(struct rte_flow_item_ipv4);
2601                 break;
2602         case RTE_FLOW_ITEM_TYPE_IPV6:
2603                 retval = sizeof(struct rte_flow_item_ipv6);
2604                 break;
2605         case RTE_FLOW_ITEM_TYPE_UDP:
2606                 retval = sizeof(struct rte_flow_item_udp);
2607                 break;
2608         case RTE_FLOW_ITEM_TYPE_TCP:
2609                 retval = sizeof(struct rte_flow_item_tcp);
2610                 break;
2611         case RTE_FLOW_ITEM_TYPE_VXLAN:
2612                 retval = sizeof(struct rte_flow_item_vxlan);
2613                 break;
2614         case RTE_FLOW_ITEM_TYPE_GRE:
2615                 retval = sizeof(struct rte_flow_item_gre);
2616                 break;
2617         case RTE_FLOW_ITEM_TYPE_NVGRE:
2618                 retval = sizeof(struct rte_flow_item_nvgre);
2619                 break;
2620         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2621                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2622                 break;
2623         case RTE_FLOW_ITEM_TYPE_MPLS:
2624                 retval = sizeof(struct rte_flow_item_mpls);
2625                 break;
2626         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2627         default:
2628                 retval = 0;
2629                 break;
2630         }
2631         return retval;
2632 }
2633
2634 #define MLX5_ENCAP_IPV4_VERSION         0x40
2635 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2636 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2637 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2638 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2639 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2640 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2641
2642 /**
2643  * Convert the encap action data from list of rte_flow_item to raw buffer
2644  *
2645  * @param[in] items
2646  *   Pointer to rte_flow_item objects list.
2647  * @param[out] buf
2648  *   Pointer to the output buffer.
2649  * @param[out] size
2650  *   Pointer to the output buffer size.
2651  * @param[out] error
2652  *   Pointer to the error structure.
2653  *
2654  * @return
2655  *   0 on success, a negative errno value otherwise and rte_errno is set.
2656  */
2657 static int
2658 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2659                            size_t *size, struct rte_flow_error *error)
2660 {
2661         struct rte_ether_hdr *eth = NULL;
2662         struct rte_vlan_hdr *vlan = NULL;
2663         struct rte_ipv4_hdr *ipv4 = NULL;
2664         struct rte_ipv6_hdr *ipv6 = NULL;
2665         struct rte_udp_hdr *udp = NULL;
2666         struct rte_vxlan_hdr *vxlan = NULL;
2667         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2668         struct rte_gre_hdr *gre = NULL;
2669         size_t len;
2670         size_t temp_size = 0;
2671
2672         if (!items)
2673                 return rte_flow_error_set(error, EINVAL,
2674                                           RTE_FLOW_ERROR_TYPE_ACTION,
2675                                           NULL, "invalid empty data");
2676         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2677                 len = flow_dv_get_item_len(items->type);
2678                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2679                         return rte_flow_error_set(error, EINVAL,
2680                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2681                                                   (void *)items->type,
2682                                                   "items total size is too big"
2683                                                   " for encap action");
2684                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2685                 switch (items->type) {
2686                 case RTE_FLOW_ITEM_TYPE_ETH:
2687                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2688                         break;
2689                 case RTE_FLOW_ITEM_TYPE_VLAN:
2690                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2691                         if (!eth)
2692                                 return rte_flow_error_set(error, EINVAL,
2693                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2694                                                 (void *)items->type,
2695                                                 "eth header not found");
2696                         if (!eth->ether_type)
2697                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2698                         break;
2699                 case RTE_FLOW_ITEM_TYPE_IPV4:
2700                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2701                         if (!vlan && !eth)
2702                                 return rte_flow_error_set(error, EINVAL,
2703                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2704                                                 (void *)items->type,
2705                                                 "neither eth nor vlan"
2706                                                 " header found");
2707                         if (vlan && !vlan->eth_proto)
2708                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2709                         else if (eth && !eth->ether_type)
2710                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2711                         if (!ipv4->version_ihl)
2712                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2713                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2714                         if (!ipv4->time_to_live)
2715                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2716                         break;
2717                 case RTE_FLOW_ITEM_TYPE_IPV6:
2718                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2719                         if (!vlan && !eth)
2720                                 return rte_flow_error_set(error, EINVAL,
2721                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2722                                                 (void *)items->type,
2723                                                 "neither eth nor vlan"
2724                                                 " header found");
2725                         if (vlan && !vlan->eth_proto)
2726                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2727                         else if (eth && !eth->ether_type)
2728                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2729                         if (!ipv6->vtc_flow)
2730                                 ipv6->vtc_flow =
2731                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2732                         if (!ipv6->hop_limits)
2733                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2734                         break;
2735                 case RTE_FLOW_ITEM_TYPE_UDP:
2736                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2737                         if (!ipv4 && !ipv6)
2738                                 return rte_flow_error_set(error, EINVAL,
2739                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2740                                                 (void *)items->type,
2741                                                 "ip header not found");
2742                         if (ipv4 && !ipv4->next_proto_id)
2743                                 ipv4->next_proto_id = IPPROTO_UDP;
2744                         else if (ipv6 && !ipv6->proto)
2745                                 ipv6->proto = IPPROTO_UDP;
2746                         break;
2747                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2748                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2749                         if (!udp)
2750                                 return rte_flow_error_set(error, EINVAL,
2751                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2752                                                 (void *)items->type,
2753                                                 "udp header not found");
2754                         if (!udp->dst_port)
2755                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2756                         if (!vxlan->vx_flags)
2757                                 vxlan->vx_flags =
2758                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2759                         break;
2760                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2761                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2762                         if (!udp)
2763                                 return rte_flow_error_set(error, EINVAL,
2764                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2765                                                 (void *)items->type,
2766                                                 "udp header not found");
2767                         if (!vxlan_gpe->proto)
2768                                 return rte_flow_error_set(error, EINVAL,
2769                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2770                                                 (void *)items->type,
2771                                                 "next protocol not found");
2772                         if (!udp->dst_port)
2773                                 udp->dst_port =
2774                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2775                         if (!vxlan_gpe->vx_flags)
2776                                 vxlan_gpe->vx_flags =
2777                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2778                         break;
2779                 case RTE_FLOW_ITEM_TYPE_GRE:
2780                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2781                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2782                         if (!gre->proto)
2783                                 return rte_flow_error_set(error, EINVAL,
2784                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2785                                                 (void *)items->type,
2786                                                 "next protocol not found");
2787                         if (!ipv4 && !ipv6)
2788                                 return rte_flow_error_set(error, EINVAL,
2789                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2790                                                 (void *)items->type,
2791                                                 "ip header not found");
2792                         if (ipv4 && !ipv4->next_proto_id)
2793                                 ipv4->next_proto_id = IPPROTO_GRE;
2794                         else if (ipv6 && !ipv6->proto)
2795                                 ipv6->proto = IPPROTO_GRE;
2796                         break;
2797                 case RTE_FLOW_ITEM_TYPE_VOID:
2798                         break;
2799                 default:
2800                         return rte_flow_error_set(error, EINVAL,
2801                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2802                                                   (void *)items->type,
2803                                                   "unsupported item type");
2804                         break;
2805                 }
2806                 temp_size += len;
2807         }
2808         *size = temp_size;
2809         return 0;
2810 }
2811
2812 static int
2813 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2814 {
2815         struct rte_ether_hdr *eth = NULL;
2816         struct rte_vlan_hdr *vlan = NULL;
2817         struct rte_ipv6_hdr *ipv6 = NULL;
2818         struct rte_udp_hdr *udp = NULL;
2819         char *next_hdr;
2820         uint16_t proto;
2821
2822         eth = (struct rte_ether_hdr *)data;
2823         next_hdr = (char *)(eth + 1);
2824         proto = RTE_BE16(eth->ether_type);
2825
2826         /* VLAN skipping */
2827         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2828                 vlan = (struct rte_vlan_hdr *)next_hdr;
2829                 proto = RTE_BE16(vlan->eth_proto);
2830                 next_hdr += sizeof(struct rte_vlan_hdr);
2831         }
2832
2833         /* HW calculates IPv4 csum. no need to proceed */
2834         if (proto == RTE_ETHER_TYPE_IPV4)
2835                 return 0;
2836
2837         /* non IPv4/IPv6 header. not supported */
2838         if (proto != RTE_ETHER_TYPE_IPV6) {
2839                 return rte_flow_error_set(error, ENOTSUP,
2840                                           RTE_FLOW_ERROR_TYPE_ACTION,
2841                                           NULL, "Cannot offload non IPv4/IPv6");
2842         }
2843
2844         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2845
2846         /* ignore non UDP */
2847         if (ipv6->proto != IPPROTO_UDP)
2848                 return 0;
2849
2850         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2851         udp->dgram_cksum = 0;
2852
2853         return 0;
2854 }
2855
2856 /**
2857  * Convert L2 encap action to DV specification.
2858  *
2859  * @param[in] dev
2860  *   Pointer to rte_eth_dev structure.
2861  * @param[in] action
2862  *   Pointer to action structure.
2863  * @param[in, out] dev_flow
2864  *   Pointer to the mlx5_flow.
2865  * @param[in] transfer
2866  *   Mark if the flow is E-Switch flow.
2867  * @param[out] error
2868  *   Pointer to the error structure.
2869  *
2870  * @return
2871  *   0 on success, a negative errno value otherwise and rte_errno is set.
2872  */
2873 static int
2874 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2875                                const struct rte_flow_action *action,
2876                                struct mlx5_flow *dev_flow,
2877                                uint8_t transfer,
2878                                struct rte_flow_error *error)
2879 {
2880         const struct rte_flow_item *encap_data;
2881         const struct rte_flow_action_raw_encap *raw_encap_data;
2882         struct mlx5_flow_dv_encap_decap_resource res = {
2883                 .reformat_type =
2884                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2885                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2886                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2887         };
2888
2889         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2890                 raw_encap_data =
2891                         (const struct rte_flow_action_raw_encap *)action->conf;
2892                 res.size = raw_encap_data->size;
2893                 memcpy(res.buf, raw_encap_data->data, res.size);
2894         } else {
2895                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2896                         encap_data =
2897                                 ((const struct rte_flow_action_vxlan_encap *)
2898                                                 action->conf)->definition;
2899                 else
2900                         encap_data =
2901                                 ((const struct rte_flow_action_nvgre_encap *)
2902                                                 action->conf)->definition;
2903                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2904                                                &res.size, error))
2905                         return -rte_errno;
2906         }
2907         if (flow_dv_zero_encap_udp_csum(res.buf, error))
2908                 return -rte_errno;
2909         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2910                 return rte_flow_error_set(error, EINVAL,
2911                                           RTE_FLOW_ERROR_TYPE_ACTION,
2912                                           NULL, "can't create L2 encap action");
2913         return 0;
2914 }
2915
2916 /**
2917  * Convert L2 decap action to DV specification.
2918  *
2919  * @param[in] dev
2920  *   Pointer to rte_eth_dev structure.
2921  * @param[in, out] dev_flow
2922  *   Pointer to the mlx5_flow.
2923  * @param[in] transfer
2924  *   Mark if the flow is E-Switch flow.
2925  * @param[out] error
2926  *   Pointer to the error structure.
2927  *
2928  * @return
2929  *   0 on success, a negative errno value otherwise and rte_errno is set.
2930  */
2931 static int
2932 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2933                                struct mlx5_flow *dev_flow,
2934                                uint8_t transfer,
2935                                struct rte_flow_error *error)
2936 {
2937         struct mlx5_flow_dv_encap_decap_resource res = {
2938                 .size = 0,
2939                 .reformat_type =
2940                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2941                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2942                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2943         };
2944
2945         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2946                 return rte_flow_error_set(error, EINVAL,
2947                                           RTE_FLOW_ERROR_TYPE_ACTION,
2948                                           NULL, "can't create L2 decap action");
2949         return 0;
2950 }
2951
2952 /**
2953  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2954  *
2955  * @param[in] dev
2956  *   Pointer to rte_eth_dev structure.
2957  * @param[in] action
2958  *   Pointer to action structure.
2959  * @param[in, out] dev_flow
2960  *   Pointer to the mlx5_flow.
2961  * @param[in] attr
2962  *   Pointer to the flow attributes.
2963  * @param[out] error
2964  *   Pointer to the error structure.
2965  *
2966  * @return
2967  *   0 on success, a negative errno value otherwise and rte_errno is set.
2968  */
2969 static int
2970 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2971                                 const struct rte_flow_action *action,
2972                                 struct mlx5_flow *dev_flow,
2973                                 const struct rte_flow_attr *attr,
2974                                 struct rte_flow_error *error)
2975 {
2976         const struct rte_flow_action_raw_encap *encap_data;
2977         struct mlx5_flow_dv_encap_decap_resource res;
2978
2979         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2980         res.size = encap_data->size;
2981         memcpy(res.buf, encap_data->data, res.size);
2982         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
2983                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
2984                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
2985         if (attr->transfer)
2986                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2987         else
2988                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2989                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2990         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2991                 return rte_flow_error_set(error, EINVAL,
2992                                           RTE_FLOW_ERROR_TYPE_ACTION,
2993                                           NULL, "can't create encap action");
2994         return 0;
2995 }
2996
2997 /**
2998  * Create action push VLAN.
2999  *
3000  * @param[in] dev
3001  *   Pointer to rte_eth_dev structure.
3002  * @param[in] attr
3003  *   Pointer to the flow attributes.
3004  * @param[in] vlan
3005  *   Pointer to the vlan to push to the Ethernet header.
3006  * @param[in, out] dev_flow
3007  *   Pointer to the mlx5_flow.
3008  * @param[out] error
3009  *   Pointer to the error structure.
3010  *
3011  * @return
3012  *   0 on success, a negative errno value otherwise and rte_errno is set.
3013  */
3014 static int
3015 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3016                                 const struct rte_flow_attr *attr,
3017                                 const struct rte_vlan_hdr *vlan,
3018                                 struct mlx5_flow *dev_flow,
3019                                 struct rte_flow_error *error)
3020 {
3021         struct mlx5_flow_dv_push_vlan_action_resource res;
3022
3023         res.vlan_tag =
3024                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3025                                  vlan->vlan_tci);
3026         if (attr->transfer)
3027                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3028         else
3029                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3030                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3031         return flow_dv_push_vlan_action_resource_register
3032                                             (dev, &res, dev_flow, error);
3033 }
3034
3035 /**
3036  * Validate the modify-header actions.
3037  *
3038  * @param[in] action_flags
3039  *   Holds the actions detected until now.
3040  * @param[in] action
3041  *   Pointer to the modify action.
3042  * @param[out] error
3043  *   Pointer to error structure.
3044  *
3045  * @return
3046  *   0 on success, a negative errno value otherwise and rte_errno is set.
3047  */
3048 static int
3049 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3050                                    const struct rte_flow_action *action,
3051                                    struct rte_flow_error *error)
3052 {
3053         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3054                 return rte_flow_error_set(error, EINVAL,
3055                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3056                                           NULL, "action configuration not set");
3057         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
3058                 return rte_flow_error_set(error, EINVAL,
3059                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3060                                           "can't have encap action before"
3061                                           " modify action");
3062         return 0;
3063 }
3064
3065 /**
3066  * Validate the modify-header MAC address actions.
3067  *
3068  * @param[in] action_flags
3069  *   Holds the actions detected until now.
3070  * @param[in] action
3071  *   Pointer to the modify action.
3072  * @param[in] item_flags
3073  *   Holds the items detected.
3074  * @param[out] error
3075  *   Pointer to error structure.
3076  *
3077  * @return
3078  *   0 on success, a negative errno value otherwise and rte_errno is set.
3079  */
3080 static int
3081 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3082                                    const struct rte_flow_action *action,
3083                                    const uint64_t item_flags,
3084                                    struct rte_flow_error *error)
3085 {
3086         int ret = 0;
3087
3088         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3089         if (!ret) {
3090                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3091                         return rte_flow_error_set(error, EINVAL,
3092                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3093                                                   NULL,
3094                                                   "no L2 item in pattern");
3095         }
3096         return ret;
3097 }
3098
3099 /**
3100  * Validate the modify-header IPv4 address actions.
3101  *
3102  * @param[in] action_flags
3103  *   Holds the actions detected until now.
3104  * @param[in] action
3105  *   Pointer to the modify action.
3106  * @param[in] item_flags
3107  *   Holds the items detected.
3108  * @param[out] error
3109  *   Pointer to error structure.
3110  *
3111  * @return
3112  *   0 on success, a negative errno value otherwise and rte_errno is set.
3113  */
3114 static int
3115 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3116                                     const struct rte_flow_action *action,
3117                                     const uint64_t item_flags,
3118                                     struct rte_flow_error *error)
3119 {
3120         int ret = 0;
3121
3122         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3123         if (!ret) {
3124                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3125                         return rte_flow_error_set(error, EINVAL,
3126                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3127                                                   NULL,
3128                                                   "no ipv4 item in pattern");
3129         }
3130         return ret;
3131 }
3132
3133 /**
3134  * Validate the modify-header IPv6 address actions.
3135  *
3136  * @param[in] action_flags
3137  *   Holds the actions detected until now.
3138  * @param[in] action
3139  *   Pointer to the modify action.
3140  * @param[in] item_flags
3141  *   Holds the items detected.
3142  * @param[out] error
3143  *   Pointer to error structure.
3144  *
3145  * @return
3146  *   0 on success, a negative errno value otherwise and rte_errno is set.
3147  */
3148 static int
3149 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3150                                     const struct rte_flow_action *action,
3151                                     const uint64_t item_flags,
3152                                     struct rte_flow_error *error)
3153 {
3154         int ret = 0;
3155
3156         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3157         if (!ret) {
3158                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3159                         return rte_flow_error_set(error, EINVAL,
3160                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3161                                                   NULL,
3162                                                   "no ipv6 item in pattern");
3163         }
3164         return ret;
3165 }
3166
3167 /**
3168  * Validate the modify-header TP actions.
3169  *
3170  * @param[in] action_flags
3171  *   Holds the actions detected until now.
3172  * @param[in] action
3173  *   Pointer to the modify action.
3174  * @param[in] item_flags
3175  *   Holds the items detected.
3176  * @param[out] error
3177  *   Pointer to error structure.
3178  *
3179  * @return
3180  *   0 on success, a negative errno value otherwise and rte_errno is set.
3181  */
3182 static int
3183 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3184                                   const struct rte_flow_action *action,
3185                                   const uint64_t item_flags,
3186                                   struct rte_flow_error *error)
3187 {
3188         int ret = 0;
3189
3190         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3191         if (!ret) {
3192                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3193                         return rte_flow_error_set(error, EINVAL,
3194                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3195                                                   NULL, "no transport layer "
3196                                                   "in pattern");
3197         }
3198         return ret;
3199 }
3200
3201 /**
3202  * Validate the modify-header actions of increment/decrement
3203  * TCP Sequence-number.
3204  *
3205  * @param[in] action_flags
3206  *   Holds the actions detected until now.
3207  * @param[in] action
3208  *   Pointer to the modify action.
3209  * @param[in] item_flags
3210  *   Holds the items detected.
3211  * @param[out] error
3212  *   Pointer to error structure.
3213  *
3214  * @return
3215  *   0 on success, a negative errno value otherwise and rte_errno is set.
3216  */
3217 static int
3218 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3219                                        const struct rte_flow_action *action,
3220                                        const uint64_t item_flags,
3221                                        struct rte_flow_error *error)
3222 {
3223         int ret = 0;
3224
3225         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3226         if (!ret) {
3227                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3228                         return rte_flow_error_set(error, EINVAL,
3229                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3230                                                   NULL, "no TCP item in"
3231                                                   " pattern");
3232                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3233                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3234                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3235                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3236                         return rte_flow_error_set(error, EINVAL,
3237                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3238                                                   NULL,
3239                                                   "cannot decrease and increase"
3240                                                   " TCP sequence number"
3241                                                   " at the same time");
3242         }
3243         return ret;
3244 }
3245
3246 /**
3247  * Validate the modify-header actions of increment/decrement
3248  * TCP Acknowledgment number.
3249  *
3250  * @param[in] action_flags
3251  *   Holds the actions detected until now.
3252  * @param[in] action
3253  *   Pointer to the modify action.
3254  * @param[in] item_flags
3255  *   Holds the items detected.
3256  * @param[out] error
3257  *   Pointer to error structure.
3258  *
3259  * @return
3260  *   0 on success, a negative errno value otherwise and rte_errno is set.
3261  */
3262 static int
3263 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3264                                        const struct rte_flow_action *action,
3265                                        const uint64_t item_flags,
3266                                        struct rte_flow_error *error)
3267 {
3268         int ret = 0;
3269
3270         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3271         if (!ret) {
3272                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3273                         return rte_flow_error_set(error, EINVAL,
3274                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3275                                                   NULL, "no TCP item in"
3276                                                   " pattern");
3277                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3278                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3279                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3280                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3281                         return rte_flow_error_set(error, EINVAL,
3282                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3283                                                   NULL,
3284                                                   "cannot decrease and increase"
3285                                                   " TCP acknowledgment number"
3286                                                   " at the same time");
3287         }
3288         return ret;
3289 }
3290
3291 /**
3292  * Validate the modify-header TTL actions.
3293  *
3294  * @param[in] action_flags
3295  *   Holds the actions detected until now.
3296  * @param[in] action
3297  *   Pointer to the modify action.
3298  * @param[in] item_flags
3299  *   Holds the items detected.
3300  * @param[out] error
3301  *   Pointer to error structure.
3302  *
3303  * @return
3304  *   0 on success, a negative errno value otherwise and rte_errno is set.
3305  */
3306 static int
3307 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3308                                    const struct rte_flow_action *action,
3309                                    const uint64_t item_flags,
3310                                    struct rte_flow_error *error)
3311 {
3312         int ret = 0;
3313
3314         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3315         if (!ret) {
3316                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3317                         return rte_flow_error_set(error, EINVAL,
3318                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3319                                                   NULL,
3320                                                   "no IP protocol in pattern");
3321         }
3322         return ret;
3323 }
3324
3325 /**
3326  * Validate jump action.
3327  *
3328  * @param[in] action
3329  *   Pointer to the jump action.
3330  * @param[in] action_flags
3331  *   Holds the actions detected until now.
3332  * @param[in] attributes
3333  *   Pointer to flow attributes
3334  * @param[in] external
3335  *   Action belongs to flow rule created by request external to PMD.
3336  * @param[out] error
3337  *   Pointer to error structure.
3338  *
3339  * @return
3340  *   0 on success, a negative errno value otherwise and rte_errno is set.
3341  */
3342 static int
3343 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3344                              uint64_t action_flags,
3345                              const struct rte_flow_attr *attributes,
3346                              bool external, struct rte_flow_error *error)
3347 {
3348         uint32_t target_group, table;
3349         int ret = 0;
3350
3351         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3352                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3353                 return rte_flow_error_set(error, EINVAL,
3354                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3355                                           "can't have 2 fate actions in"
3356                                           " same flow");
3357         if (action_flags & MLX5_FLOW_ACTION_METER)
3358                 return rte_flow_error_set(error, ENOTSUP,
3359                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3360                                           "jump with meter not support");
3361         if (!action->conf)
3362                 return rte_flow_error_set(error, EINVAL,
3363                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3364                                           NULL, "action configuration not set");
3365         target_group =
3366                 ((const struct rte_flow_action_jump *)action->conf)->group;
3367         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3368                                        true, &table, error);
3369         if (ret)
3370                 return ret;
3371         if (attributes->group == target_group)
3372                 return rte_flow_error_set(error, EINVAL,
3373                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3374                                           "target group must be other than"
3375                                           " the current flow group");
3376         return 0;
3377 }
3378
3379 /*
3380  * Validate the port_id action.
3381  *
3382  * @param[in] dev
3383  *   Pointer to rte_eth_dev structure.
3384  * @param[in] action_flags
3385  *   Bit-fields that holds the actions detected until now.
3386  * @param[in] action
3387  *   Port_id RTE action structure.
3388  * @param[in] attr
3389  *   Attributes of flow that includes this action.
3390  * @param[out] error
3391  *   Pointer to error structure.
3392  *
3393  * @return
3394  *   0 on success, a negative errno value otherwise and rte_errno is set.
3395  */
3396 static int
3397 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3398                                 uint64_t action_flags,
3399                                 const struct rte_flow_action *action,
3400                                 const struct rte_flow_attr *attr,
3401                                 struct rte_flow_error *error)
3402 {
3403         const struct rte_flow_action_port_id *port_id;
3404         struct mlx5_priv *act_priv;
3405         struct mlx5_priv *dev_priv;
3406         uint16_t port;
3407
3408         if (!attr->transfer)
3409                 return rte_flow_error_set(error, ENOTSUP,
3410                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3411                                           NULL,
3412                                           "port id action is valid in transfer"
3413                                           " mode only");
3414         if (!action || !action->conf)
3415                 return rte_flow_error_set(error, ENOTSUP,
3416                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3417                                           NULL,
3418                                           "port id action parameters must be"
3419                                           " specified");
3420         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3421                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3422                 return rte_flow_error_set(error, EINVAL,
3423                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3424                                           "can have only one fate actions in"
3425                                           " a flow");
3426         dev_priv = mlx5_dev_to_eswitch_info(dev);
3427         if (!dev_priv)
3428                 return rte_flow_error_set(error, rte_errno,
3429                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3430                                           NULL,
3431                                           "failed to obtain E-Switch info");
3432         port_id = action->conf;
3433         port = port_id->original ? dev->data->port_id : port_id->id;
3434         act_priv = mlx5_port_to_eswitch_info(port, false);
3435         if (!act_priv)
3436                 return rte_flow_error_set
3437                                 (error, rte_errno,
3438                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3439                                  "failed to obtain E-Switch port id for port");
3440         if (act_priv->domain_id != dev_priv->domain_id)
3441                 return rte_flow_error_set
3442                                 (error, EINVAL,
3443                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3444                                  "port does not belong to"
3445                                  " E-Switch being configured");
3446         return 0;
3447 }
3448
3449 /**
3450  * Get the maximum number of modify header actions.
3451  *
3452  * @param dev
3453  *   Pointer to rte_eth_dev structure.
3454  * @param flags
3455  *   Flags bits to check if root level.
3456  *
3457  * @return
3458  *   Max number of modify header actions device can support.
3459  */
3460 static unsigned int
3461 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3462 {
3463         /*
3464          * There's no way to directly query the max cap. Although it has to be
3465          * acquried by iterative trial, it is a safe assumption that more
3466          * actions are supported by FW if extensive metadata register is
3467          * supported. (Only in the root table)
3468          */
3469         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3470                 return MLX5_MAX_MODIFY_NUM;
3471         else
3472                 return mlx5_flow_ext_mreg_supported(dev) ?
3473                                         MLX5_ROOT_TBL_MODIFY_NUM :
3474                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3475 }
3476
3477 /**
3478  * Validate the meter action.
3479  *
3480  * @param[in] dev
3481  *   Pointer to rte_eth_dev structure.
3482  * @param[in] action_flags
3483  *   Bit-fields that holds the actions detected until now.
3484  * @param[in] action
3485  *   Pointer to the meter action.
3486  * @param[in] attr
3487  *   Attributes of flow that includes this action.
3488  * @param[out] error
3489  *   Pointer to error structure.
3490  *
3491  * @return
3492  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3493  */
3494 static int
3495 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3496                                 uint64_t action_flags,
3497                                 const struct rte_flow_action *action,
3498                                 const struct rte_flow_attr *attr,
3499                                 struct rte_flow_error *error)
3500 {
3501         struct mlx5_priv *priv = dev->data->dev_private;
3502         const struct rte_flow_action_meter *am = action->conf;
3503         struct mlx5_flow_meter *fm;
3504
3505         if (!am)
3506                 return rte_flow_error_set(error, EINVAL,
3507                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3508                                           "meter action conf is NULL");
3509
3510         if (action_flags & MLX5_FLOW_ACTION_METER)
3511                 return rte_flow_error_set(error, ENOTSUP,
3512                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3513                                           "meter chaining not support");
3514         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3515                 return rte_flow_error_set(error, ENOTSUP,
3516                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3517                                           "meter with jump not support");
3518         if (!priv->mtr_en)
3519                 return rte_flow_error_set(error, ENOTSUP,
3520                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3521                                           NULL,
3522                                           "meter action not supported");
3523         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3524         if (!fm)
3525                 return rte_flow_error_set(error, EINVAL,
3526                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3527                                           "Meter not found");
3528         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3529               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3530               (!fm->attr.egress && !attr->egress && attr->ingress))))
3531                 return rte_flow_error_set(error, EINVAL,
3532                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3533                                           "Flow attributes are either invalid "
3534                                           "or have a conflict with current "
3535                                           "meter attributes");
3536         return 0;
3537 }
3538
3539 /**
3540  * Validate the modify-header IPv4 DSCP actions.
3541  *
3542  * @param[in] action_flags
3543  *   Holds the actions detected until now.
3544  * @param[in] action
3545  *   Pointer to the modify action.
3546  * @param[in] item_flags
3547  *   Holds the items detected.
3548  * @param[out] error
3549  *   Pointer to error structure.
3550  *
3551  * @return
3552  *   0 on success, a negative errno value otherwise and rte_errno is set.
3553  */
3554 static int
3555 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3556                                          const struct rte_flow_action *action,
3557                                          const uint64_t item_flags,
3558                                          struct rte_flow_error *error)
3559 {
3560         int ret = 0;
3561
3562         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3563         if (!ret) {
3564                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3565                         return rte_flow_error_set(error, EINVAL,
3566                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3567                                                   NULL,
3568                                                   "no ipv4 item in pattern");
3569         }
3570         return ret;
3571 }
3572
3573 /**
3574  * Validate the modify-header IPv6 DSCP actions.
3575  *
3576  * @param[in] action_flags
3577  *   Holds the actions detected until now.
3578  * @param[in] action
3579  *   Pointer to the modify action.
3580  * @param[in] item_flags
3581  *   Holds the items detected.
3582  * @param[out] error
3583  *   Pointer to error structure.
3584  *
3585  * @return
3586  *   0 on success, a negative errno value otherwise and rte_errno is set.
3587  */
3588 static int
3589 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3590                                          const struct rte_flow_action *action,
3591                                          const uint64_t item_flags,
3592                                          struct rte_flow_error *error)
3593 {
3594         int ret = 0;
3595
3596         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3597         if (!ret) {
3598                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3599                         return rte_flow_error_set(error, EINVAL,
3600                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3601                                                   NULL,
3602                                                   "no ipv6 item in pattern");
3603         }
3604         return ret;
3605 }
3606
3607 /**
3608  * Find existing modify-header resource or create and register a new one.
3609  *
3610  * @param dev[in, out]
3611  *   Pointer to rte_eth_dev structure.
3612  * @param[in, out] resource
3613  *   Pointer to modify-header resource.
3614  * @parm[in, out] dev_flow
3615  *   Pointer to the dev_flow.
3616  * @param[out] error
3617  *   pointer to error structure.
3618  *
3619  * @return
3620  *   0 on success otherwise -errno and errno is set.
3621  */
3622 static int
3623 flow_dv_modify_hdr_resource_register
3624                         (struct rte_eth_dev *dev,
3625                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3626                          struct mlx5_flow *dev_flow,
3627                          struct rte_flow_error *error)
3628 {
3629         struct mlx5_priv *priv = dev->data->dev_private;
3630         struct mlx5_ibv_shared *sh = priv->sh;
3631         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3632         struct mlx5dv_dr_domain *ns;
3633         uint32_t actions_len;
3634
3635         resource->flags =
3636                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3637         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3638                                     resource->flags))
3639                 return rte_flow_error_set(error, EOVERFLOW,
3640                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3641                                           "too many modify header items");
3642         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3643                 ns = sh->fdb_domain;
3644         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3645                 ns = sh->tx_domain;
3646         else
3647                 ns = sh->rx_domain;
3648         /* Lookup a matching resource from cache. */
3649         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3650         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3651                 if (resource->ft_type == cache_resource->ft_type &&
3652                     resource->actions_num == cache_resource->actions_num &&
3653                     resource->flags == cache_resource->flags &&
3654                     !memcmp((const void *)resource->actions,
3655                             (const void *)cache_resource->actions,
3656                             actions_len)) {
3657                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3658                                 (void *)cache_resource,
3659                                 rte_atomic32_read(&cache_resource->refcnt));
3660                         rte_atomic32_inc(&cache_resource->refcnt);
3661                         dev_flow->dv.modify_hdr = cache_resource;
3662                         return 0;
3663                 }
3664         }
3665         /* Register new modify-header resource. */
3666         cache_resource = rte_calloc(__func__, 1,
3667                                     sizeof(*cache_resource) + actions_len, 0);
3668         if (!cache_resource)
3669                 return rte_flow_error_set(error, ENOMEM,
3670                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3671                                           "cannot allocate resource memory");
3672         *cache_resource = *resource;
3673         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3674         cache_resource->verbs_action =
3675                 mlx5_glue->dv_create_flow_action_modify_header
3676                                         (sh->ctx, cache_resource->ft_type, ns,
3677                                          cache_resource->flags, actions_len,
3678                                          (uint64_t *)cache_resource->actions);
3679         if (!cache_resource->verbs_action) {
3680                 rte_free(cache_resource);
3681                 return rte_flow_error_set(error, ENOMEM,
3682                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3683                                           NULL, "cannot create action");
3684         }
3685         rte_atomic32_init(&cache_resource->refcnt);
3686         rte_atomic32_inc(&cache_resource->refcnt);
3687         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3688         dev_flow->dv.modify_hdr = cache_resource;
3689         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3690                 (void *)cache_resource,
3691                 rte_atomic32_read(&cache_resource->refcnt));
3692         return 0;
3693 }
3694
3695 #define MLX5_CNT_CONTAINER_RESIZE 64
3696
3697 /**
3698  * Get or create a flow counter.
3699  *
3700  * @param[in] dev
3701  *   Pointer to the Ethernet device structure.
3702  * @param[in] shared
3703  *   Indicate if this counter is shared with other flows.
3704  * @param[in] id
3705  *   Counter identifier.
3706  *
3707  * @return
3708  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3709  */
3710 static struct mlx5_flow_counter *
3711 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3712                                uint32_t id)
3713 {
3714         struct mlx5_priv *priv = dev->data->dev_private;
3715         struct mlx5_flow_counter *cnt = NULL;
3716         struct mlx5_devx_obj *dcs = NULL;
3717
3718         if (!priv->config.devx) {
3719                 rte_errno = ENOTSUP;
3720                 return NULL;
3721         }
3722         if (shared) {
3723                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3724                         if (cnt->shared && cnt->id == id) {
3725                                 cnt->ref_cnt++;
3726                                 return cnt;
3727                         }
3728                 }
3729         }
3730         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3731         if (!dcs)
3732                 return NULL;
3733         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3734         if (!cnt) {
3735                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3736                 rte_errno = ENOMEM;
3737                 return NULL;
3738         }
3739         struct mlx5_flow_counter tmpl = {
3740                 .shared = shared,
3741                 .ref_cnt = 1,
3742                 .id = id,
3743                 .dcs = dcs,
3744         };
3745         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3746         if (!tmpl.action) {
3747                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3748                 rte_errno = errno;
3749                 rte_free(cnt);
3750                 return NULL;
3751         }
3752         *cnt = tmpl;
3753         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3754         return cnt;
3755 }
3756
3757 /**
3758  * Release a flow counter.
3759  *
3760  * @param[in] dev
3761  *   Pointer to the Ethernet device structure.
3762  * @param[in] counter
3763  *   Pointer to the counter handler.
3764  */
3765 static void
3766 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3767                                  struct mlx5_flow_counter *counter)
3768 {
3769         struct mlx5_priv *priv = dev->data->dev_private;
3770
3771         if (!counter)
3772                 return;
3773         if (--counter->ref_cnt == 0) {
3774                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3775                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3776                 rte_free(counter);
3777         }
3778 }
3779
3780 /**
3781  * Query a devx flow counter.
3782  *
3783  * @param[in] dev
3784  *   Pointer to the Ethernet device structure.
3785  * @param[in] cnt
3786  *   Pointer to the flow counter.
3787  * @param[out] pkts
3788  *   The statistics value of packets.
3789  * @param[out] bytes
3790  *   The statistics value of bytes.
3791  *
3792  * @return
3793  *   0 on success, otherwise a negative errno value and rte_errno is set.
3794  */
3795 static inline int
3796 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3797                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3798                      uint64_t *bytes)
3799 {
3800         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3801                                                 0, NULL, NULL, 0);
3802 }
3803
3804 /**
3805  * Get a pool by a counter.
3806  *
3807  * @param[in] cnt
3808  *   Pointer to the counter.
3809  *
3810  * @return
3811  *   The counter pool.
3812  */
3813 static struct mlx5_flow_counter_pool *
3814 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3815 {
3816         if (!cnt->batch) {
3817                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3818                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3819         }
3820         return cnt->pool;
3821 }
3822
3823 /**
3824  * Get a pool by devx counter ID.
3825  *
3826  * @param[in] cont
3827  *   Pointer to the counter container.
3828  * @param[in] id
3829  *   The counter devx ID.
3830  *
3831  * @return
3832  *   The counter pool pointer if exists, NULL otherwise,
3833  */
3834 static struct mlx5_flow_counter_pool *
3835 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3836 {
3837         struct mlx5_flow_counter_pool *pool;
3838
3839         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3840                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3841                                 MLX5_COUNTERS_PER_POOL;
3842
3843                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3844                         return pool;
3845         };
3846         return NULL;
3847 }
3848
3849 /**
3850  * Allocate a new memory for the counter values wrapped by all the needed
3851  * management.
3852  *
3853  * @param[in] dev
3854  *   Pointer to the Ethernet device structure.
3855  * @param[in] raws_n
3856  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3857  *
3858  * @return
3859  *   The new memory management pointer on success, otherwise NULL and rte_errno
3860  *   is set.
3861  */
3862 static struct mlx5_counter_stats_mem_mng *
3863 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3864 {
3865         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3866                                         (dev->data->dev_private))->sh;
3867         struct mlx5_devx_mkey_attr mkey_attr;
3868         struct mlx5_counter_stats_mem_mng *mem_mng;
3869         volatile struct flow_counter_stats *raw_data;
3870         int size = (sizeof(struct flow_counter_stats) *
3871                         MLX5_COUNTERS_PER_POOL +
3872                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3873                         sizeof(struct mlx5_counter_stats_mem_mng);
3874         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3875         int i;
3876
3877         if (!mem) {
3878                 rte_errno = ENOMEM;
3879                 return NULL;
3880         }
3881         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3882         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3883         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3884                                                  IBV_ACCESS_LOCAL_WRITE);
3885         if (!mem_mng->umem) {
3886                 rte_errno = errno;
3887                 rte_free(mem);
3888                 return NULL;
3889         }
3890         mkey_attr.addr = (uintptr_t)mem;
3891         mkey_attr.size = size;
3892         mkey_attr.umem_id = mem_mng->umem->umem_id;
3893         mkey_attr.pd = sh->pdn;
3894         mkey_attr.log_entity_size = 0;
3895         mkey_attr.pg_access = 0;
3896         mkey_attr.klm_array = NULL;
3897         mkey_attr.klm_num = 0;
3898         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3899         if (!mem_mng->dm) {
3900                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3901                 rte_errno = errno;
3902                 rte_free(mem);
3903                 return NULL;
3904         }
3905         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3906         raw_data = (volatile struct flow_counter_stats *)mem;
3907         for (i = 0; i < raws_n; ++i) {
3908                 mem_mng->raws[i].mem_mng = mem_mng;
3909                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3910         }
3911         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3912         return mem_mng;
3913 }
3914
3915 /**
3916  * Resize a counter container.
3917  *
3918  * @param[in] dev
3919  *   Pointer to the Ethernet device structure.
3920  * @param[in] batch
3921  *   Whether the pool is for counter that was allocated by batch command.
3922  *
3923  * @return
3924  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3925  */
3926 static struct mlx5_pools_container *
3927 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3928 {
3929         struct mlx5_priv *priv = dev->data->dev_private;
3930         struct mlx5_pools_container *cont =
3931                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3932         struct mlx5_pools_container *new_cont =
3933                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3934         struct mlx5_counter_stats_mem_mng *mem_mng;
3935         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3936         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3937         int i;
3938
3939         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3940                 /* The last resize still hasn't detected by the host thread. */
3941                 rte_errno = EAGAIN;
3942                 return NULL;
3943         }
3944         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3945         if (!new_cont->pools) {
3946                 rte_errno = ENOMEM;
3947                 return NULL;
3948         }
3949         if (cont->n)
3950                 memcpy(new_cont->pools, cont->pools, cont->n *
3951                        sizeof(struct mlx5_flow_counter_pool *));
3952         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3953                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3954         if (!mem_mng) {
3955                 rte_free(new_cont->pools);
3956                 return NULL;
3957         }
3958         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3959                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3960                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3961                                  i, next);
3962         new_cont->n = resize;
3963         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3964         TAILQ_INIT(&new_cont->pool_list);
3965         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3966         new_cont->init_mem_mng = mem_mng;
3967         rte_cio_wmb();
3968          /* Flip the master container. */
3969         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3970         return new_cont;
3971 }
3972
3973 /**
3974  * Query a devx flow counter.
3975  *
3976  * @param[in] dev
3977  *   Pointer to the Ethernet device structure.
3978  * @param[in] cnt
3979  *   Pointer to the flow counter.
3980  * @param[out] pkts
3981  *   The statistics value of packets.
3982  * @param[out] bytes
3983  *   The statistics value of bytes.
3984  *
3985  * @return
3986  *   0 on success, otherwise a negative errno value and rte_errno is set.
3987  */
3988 static inline int
3989 _flow_dv_query_count(struct rte_eth_dev *dev,
3990                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3991                      uint64_t *bytes)
3992 {
3993         struct mlx5_priv *priv = dev->data->dev_private;
3994         struct mlx5_flow_counter_pool *pool =
3995                         flow_dv_counter_pool_get(cnt);
3996         int offset = cnt - &pool->counters_raw[0];
3997
3998         if (priv->counter_fallback)
3999                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4000
4001         rte_spinlock_lock(&pool->sl);
4002         /*
4003          * The single counters allocation may allocate smaller ID than the
4004          * current allocated in parallel to the host reading.
4005          * In this case the new counter values must be reported as 0.
4006          */
4007         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4008                 *pkts = 0;
4009                 *bytes = 0;
4010         } else {
4011                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4012                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4013         }
4014         rte_spinlock_unlock(&pool->sl);
4015         return 0;
4016 }
4017
4018 /**
4019  * Create and initialize a new counter pool.
4020  *
4021  * @param[in] dev
4022  *   Pointer to the Ethernet device structure.
4023  * @param[out] dcs
4024  *   The devX counter handle.
4025  * @param[in] batch
4026  *   Whether the pool is for counter that was allocated by batch command.
4027  *
4028  * @return
4029  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4030  */
4031 static struct mlx5_flow_counter_pool *
4032 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4033                     uint32_t batch)
4034 {
4035         struct mlx5_priv *priv = dev->data->dev_private;
4036         struct mlx5_flow_counter_pool *pool;
4037         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4038                                                                0);
4039         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4040         uint32_t size;
4041
4042         if (cont->n == n_valid) {
4043                 cont = flow_dv_container_resize(dev, batch);
4044                 if (!cont)
4045                         return NULL;
4046         }
4047         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4048                         sizeof(struct mlx5_flow_counter);
4049         pool = rte_calloc(__func__, 1, size, 0);
4050         if (!pool) {
4051                 rte_errno = ENOMEM;
4052                 return NULL;
4053         }
4054         pool->min_dcs = dcs;
4055         pool->raw = cont->init_mem_mng->raws + n_valid %
4056                                                      MLX5_CNT_CONTAINER_RESIZE;
4057         pool->raw_hw = NULL;
4058         rte_spinlock_init(&pool->sl);
4059         /*
4060          * The generation of the new allocated counters in this pool is 0, 2 in
4061          * the pool generation makes all the counters valid for allocation.
4062          */
4063         rte_atomic64_set(&pool->query_gen, 0x2);
4064         TAILQ_INIT(&pool->counters);
4065         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4066         cont->pools[n_valid] = pool;
4067         /* Pool initialization must be updated before host thread access. */
4068         rte_cio_wmb();
4069         rte_atomic16_add(&cont->n_valid, 1);
4070         return pool;
4071 }
4072
4073 /**
4074  * Prepare a new counter and/or a new counter pool.
4075  *
4076  * @param[in] dev
4077  *   Pointer to the Ethernet device structure.
4078  * @param[out] cnt_free
4079  *   Where to put the pointer of a new counter.
4080  * @param[in] batch
4081  *   Whether the pool is for counter that was allocated by batch command.
4082  *
4083  * @return
4084  *   The free counter pool pointer and @p cnt_free is set on success,
4085  *   NULL otherwise and rte_errno is set.
4086  */
4087 static struct mlx5_flow_counter_pool *
4088 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4089                              struct mlx5_flow_counter **cnt_free,
4090                              uint32_t batch)
4091 {
4092         struct mlx5_priv *priv = dev->data->dev_private;
4093         struct mlx5_flow_counter_pool *pool;
4094         struct mlx5_devx_obj *dcs = NULL;
4095         struct mlx5_flow_counter *cnt;
4096         uint32_t i;
4097
4098         if (!batch) {
4099                 /* bulk_bitmap must be 0 for single counter allocation. */
4100                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4101                 if (!dcs)
4102                         return NULL;
4103                 pool = flow_dv_find_pool_by_id
4104                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4105                 if (!pool) {
4106                         pool = flow_dv_pool_create(dev, dcs, batch);
4107                         if (!pool) {
4108                                 mlx5_devx_cmd_destroy(dcs);
4109                                 return NULL;
4110                         }
4111                 } else if (dcs->id < pool->min_dcs->id) {
4112                         rte_atomic64_set(&pool->a64_dcs,
4113                                          (int64_t)(uintptr_t)dcs);
4114                 }
4115                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4116                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4117                 cnt->dcs = dcs;
4118                 *cnt_free = cnt;
4119                 return pool;
4120         }
4121         /* bulk_bitmap is in 128 counters units. */
4122         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4123                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4124         if (!dcs) {
4125                 rte_errno = ENODATA;
4126                 return NULL;
4127         }
4128         pool = flow_dv_pool_create(dev, dcs, batch);
4129         if (!pool) {
4130                 mlx5_devx_cmd_destroy(dcs);
4131                 return NULL;
4132         }
4133         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4134                 cnt = &pool->counters_raw[i];
4135                 cnt->pool = pool;
4136                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4137         }
4138         *cnt_free = &pool->counters_raw[0];
4139         return pool;
4140 }
4141
4142 /**
4143  * Search for existed shared counter.
4144  *
4145  * @param[in] cont
4146  *   Pointer to the relevant counter pool container.
4147  * @param[in] id
4148  *   The shared counter ID to search.
4149  *
4150  * @return
4151  *   NULL if not existed, otherwise pointer to the shared counter.
4152  */
4153 static struct mlx5_flow_counter *
4154 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4155                               uint32_t id)
4156 {
4157         static struct mlx5_flow_counter *cnt;
4158         struct mlx5_flow_counter_pool *pool;
4159         int i;
4160
4161         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4162                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4163                         cnt = &pool->counters_raw[i];
4164                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4165                                 return cnt;
4166                 }
4167         }
4168         return NULL;
4169 }
4170
4171 /**
4172  * Allocate a flow counter.
4173  *
4174  * @param[in] dev
4175  *   Pointer to the Ethernet device structure.
4176  * @param[in] shared
4177  *   Indicate if this counter is shared with other flows.
4178  * @param[in] id
4179  *   Counter identifier.
4180  * @param[in] group
4181  *   Counter flow group.
4182  *
4183  * @return
4184  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4185  */
4186 static struct mlx5_flow_counter *
4187 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4188                       uint16_t group)
4189 {
4190         struct mlx5_priv *priv = dev->data->dev_private;
4191         struct mlx5_flow_counter_pool *pool = NULL;
4192         struct mlx5_flow_counter *cnt_free = NULL;
4193         /*
4194          * Currently group 0 flow counter cannot be assigned to a flow if it is
4195          * not the first one in the batch counter allocation, so it is better
4196          * to allocate counters one by one for these flows in a separate
4197          * container.
4198          * A counter can be shared between different groups so need to take
4199          * shared counters from the single container.
4200          */
4201         uint32_t batch = (group && !shared) ? 1 : 0;
4202         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4203                                                                0);
4204
4205         if (priv->counter_fallback)
4206                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4207         if (!priv->config.devx) {
4208                 rte_errno = ENOTSUP;
4209                 return NULL;
4210         }
4211         if (shared) {
4212                 cnt_free = flow_dv_counter_shared_search(cont, id);
4213                 if (cnt_free) {
4214                         if (cnt_free->ref_cnt + 1 == 0) {
4215                                 rte_errno = E2BIG;
4216                                 return NULL;
4217                         }
4218                         cnt_free->ref_cnt++;
4219                         return cnt_free;
4220                 }
4221         }
4222         /* Pools which has a free counters are in the start. */
4223         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4224                 /*
4225                  * The free counter reset values must be updated between the
4226                  * counter release to the counter allocation, so, at least one
4227                  * query must be done in this time. ensure it by saving the
4228                  * query generation in the release time.
4229                  * The free list is sorted according to the generation - so if
4230                  * the first one is not updated, all the others are not
4231                  * updated too.
4232                  */
4233                 cnt_free = TAILQ_FIRST(&pool->counters);
4234                 if (cnt_free && cnt_free->query_gen + 1 <
4235                     rte_atomic64_read(&pool->query_gen))
4236                         break;
4237                 cnt_free = NULL;
4238         }
4239         if (!cnt_free) {
4240                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4241                 if (!pool)
4242                         return NULL;
4243         }
4244         cnt_free->batch = batch;
4245         /* Create a DV counter action only in the first time usage. */
4246         if (!cnt_free->action) {
4247                 uint16_t offset;
4248                 struct mlx5_devx_obj *dcs;
4249
4250                 if (batch) {
4251                         offset = cnt_free - &pool->counters_raw[0];
4252                         dcs = pool->min_dcs;
4253                 } else {
4254                         offset = 0;
4255                         dcs = cnt_free->dcs;
4256                 }
4257                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4258                                         (dcs->obj, offset);
4259                 if (!cnt_free->action) {
4260                         rte_errno = errno;
4261                         return NULL;
4262                 }
4263         }
4264         /* Update the counter reset values. */
4265         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4266                                  &cnt_free->bytes))
4267                 return NULL;
4268         cnt_free->shared = shared;
4269         cnt_free->ref_cnt = 1;
4270         cnt_free->id = id;
4271         if (!priv->sh->cmng.query_thread_on)
4272                 /* Start the asynchronous batch query by the host thread. */
4273                 mlx5_set_query_alarm(priv->sh);
4274         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4275         if (TAILQ_EMPTY(&pool->counters)) {
4276                 /* Move the pool to the end of the container pool list. */
4277                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4278                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4279         }
4280         return cnt_free;
4281 }
4282
4283 /**
4284  * Release a flow counter.
4285  *
4286  * @param[in] dev
4287  *   Pointer to the Ethernet device structure.
4288  * @param[in] counter
4289  *   Pointer to the counter handler.
4290  */
4291 static void
4292 flow_dv_counter_release(struct rte_eth_dev *dev,
4293                         struct mlx5_flow_counter *counter)
4294 {
4295         struct mlx5_priv *priv = dev->data->dev_private;
4296
4297         if (!counter)
4298                 return;
4299         if (priv->counter_fallback) {
4300                 flow_dv_counter_release_fallback(dev, counter);
4301                 return;
4302         }
4303         if (--counter->ref_cnt == 0) {
4304                 struct mlx5_flow_counter_pool *pool =
4305                                 flow_dv_counter_pool_get(counter);
4306
4307                 /* Put the counter in the end - the last updated one. */
4308                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4309                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4310         }
4311 }
4312
4313 /**
4314  * Verify the @p attributes will be correctly understood by the NIC and store
4315  * them in the @p flow if everything is correct.
4316  *
4317  * @param[in] dev
4318  *   Pointer to dev struct.
4319  * @param[in] attributes
4320  *   Pointer to flow attributes
4321  * @param[in] external
4322  *   This flow rule is created by request external to PMD.
4323  * @param[out] error
4324  *   Pointer to error structure.
4325  *
4326  * @return
4327  *   0 on success, a negative errno value otherwise and rte_errno is set.
4328  */
4329 static int
4330 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4331                             const struct rte_flow_attr *attributes,
4332                             bool external __rte_unused,
4333                             struct rte_flow_error *error)
4334 {
4335         struct mlx5_priv *priv = dev->data->dev_private;
4336         uint32_t priority_max = priv->config.flow_prio - 1;
4337
4338 #ifndef HAVE_MLX5DV_DR
4339         if (attributes->group)
4340                 return rte_flow_error_set(error, ENOTSUP,
4341                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4342                                           NULL,
4343                                           "groups are not supported");
4344 #else
4345         uint32_t table;
4346         int ret;
4347
4348         ret = mlx5_flow_group_to_table(attributes, external,
4349                                        attributes->group, !!priv->fdb_def_rule,
4350                                        &table, error);
4351         if (ret)
4352                 return ret;
4353 #endif
4354         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4355             attributes->priority >= priority_max)
4356                 return rte_flow_error_set(error, ENOTSUP,
4357                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4358                                           NULL,
4359                                           "priority out of range");
4360         if (attributes->transfer) {
4361                 if (!priv->config.dv_esw_en)
4362                         return rte_flow_error_set
4363                                 (error, ENOTSUP,
4364                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4365                                  "E-Switch dr is not supported");
4366                 if (!(priv->representor || priv->master))
4367                         return rte_flow_error_set
4368                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4369                                  NULL, "E-Switch configuration can only be"
4370                                  " done by a master or a representor device");
4371                 if (attributes->egress)
4372                         return rte_flow_error_set
4373                                 (error, ENOTSUP,
4374                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4375                                  "egress is not supported");
4376         }
4377         if (!(attributes->egress ^ attributes->ingress))
4378                 return rte_flow_error_set(error, ENOTSUP,
4379                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4380                                           "must specify exactly one of "
4381                                           "ingress or egress");
4382         return 0;
4383 }
4384
4385 /**
4386  * Internal validation function. For validating both actions and items.
4387  *
4388  * @param[in] dev
4389  *   Pointer to the rte_eth_dev structure.
4390  * @param[in] attr
4391  *   Pointer to the flow attributes.
4392  * @param[in] items
4393  *   Pointer to the list of items.
4394  * @param[in] actions
4395  *   Pointer to the list of actions.
4396  * @param[in] external
4397  *   This flow rule is created by request external to PMD.
4398  * @param[out] error
4399  *   Pointer to the error structure.
4400  *
4401  * @return
4402  *   0 on success, a negative errno value otherwise and rte_errno is set.
4403  */
4404 static int
4405 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4406                  const struct rte_flow_item items[],
4407                  const struct rte_flow_action actions[],
4408                  bool external, struct rte_flow_error *error)
4409 {
4410         int ret;
4411         uint64_t action_flags = 0;
4412         uint64_t item_flags = 0;
4413         uint64_t last_item = 0;
4414         uint8_t next_protocol = 0xff;
4415         uint16_t ether_type = 0;
4416         int actions_n = 0;
4417         uint8_t item_ipv6_proto = 0;
4418         const struct rte_flow_item *gre_item = NULL;
4419         struct rte_flow_item_tcp nic_tcp_mask = {
4420                 .hdr = {
4421                         .tcp_flags = 0xFF,
4422                         .src_port = RTE_BE16(UINT16_MAX),
4423                         .dst_port = RTE_BE16(UINT16_MAX),
4424                 }
4425         };
4426         struct mlx5_priv *priv = dev->data->dev_private;
4427         struct mlx5_dev_config *dev_conf = &priv->config;
4428
4429         if (items == NULL)
4430                 return -1;
4431         ret = flow_dv_validate_attributes(dev, attr, external, error);
4432         if (ret < 0)
4433                 return ret;
4434         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4435                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4436                 int type = items->type;
4437
4438                 switch (type) {
4439                 case RTE_FLOW_ITEM_TYPE_VOID:
4440                         break;
4441                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4442                         ret = flow_dv_validate_item_port_id
4443                                         (dev, items, attr, item_flags, error);
4444                         if (ret < 0)
4445                                 return ret;
4446                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4447                         break;
4448                 case RTE_FLOW_ITEM_TYPE_ETH:
4449                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4450                                                           error);
4451                         if (ret < 0)
4452                                 return ret;
4453                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4454                                              MLX5_FLOW_LAYER_OUTER_L2;
4455                         if (items->mask != NULL && items->spec != NULL) {
4456                                 ether_type =
4457                                         ((const struct rte_flow_item_eth *)
4458                                          items->spec)->type;
4459                                 ether_type &=
4460                                         ((const struct rte_flow_item_eth *)
4461                                          items->mask)->type;
4462                                 ether_type = rte_be_to_cpu_16(ether_type);
4463                         } else {
4464                                 ether_type = 0;
4465                         }
4466                         break;
4467                 case RTE_FLOW_ITEM_TYPE_VLAN:
4468                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4469                                                            dev, error);
4470                         if (ret < 0)
4471                                 return ret;
4472                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4473                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4474                         if (items->mask != NULL && items->spec != NULL) {
4475                                 ether_type =
4476                                         ((const struct rte_flow_item_vlan *)
4477                                          items->spec)->inner_type;
4478                                 ether_type &=
4479                                         ((const struct rte_flow_item_vlan *)
4480                                          items->mask)->inner_type;
4481                                 ether_type = rte_be_to_cpu_16(ether_type);
4482                         } else {
4483                                 ether_type = 0;
4484                         }
4485                         break;
4486                 case RTE_FLOW_ITEM_TYPE_IPV4:
4487                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4488                                                   &item_flags, &tunnel);
4489                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4490                                                            last_item,
4491                                                            ether_type, NULL,
4492                                                            error);
4493                         if (ret < 0)
4494                                 return ret;
4495                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4496                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4497                         if (items->mask != NULL &&
4498                             ((const struct rte_flow_item_ipv4 *)
4499                              items->mask)->hdr.next_proto_id) {
4500                                 next_protocol =
4501                                         ((const struct rte_flow_item_ipv4 *)
4502                                          (items->spec))->hdr.next_proto_id;
4503                                 next_protocol &=
4504                                         ((const struct rte_flow_item_ipv4 *)
4505                                          (items->mask))->hdr.next_proto_id;
4506                         } else {
4507                                 /* Reset for inner layer. */
4508                                 next_protocol = 0xff;
4509                         }
4510                         break;
4511                 case RTE_FLOW_ITEM_TYPE_IPV6:
4512                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4513                                                   &item_flags, &tunnel);
4514                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4515                                                            last_item,
4516                                                            ether_type, NULL,
4517                                                            error);
4518                         if (ret < 0)
4519                                 return ret;
4520                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4521                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4522                         if (items->mask != NULL &&
4523                             ((const struct rte_flow_item_ipv6 *)
4524                              items->mask)->hdr.proto) {
4525                                 item_ipv6_proto =
4526                                         ((const struct rte_flow_item_ipv6 *)
4527                                          items->spec)->hdr.proto;
4528                                 next_protocol =
4529                                         ((const struct rte_flow_item_ipv6 *)
4530                                          items->spec)->hdr.proto;
4531                                 next_protocol &=
4532                                         ((const struct rte_flow_item_ipv6 *)
4533                                          items->mask)->hdr.proto;
4534                         } else {
4535                                 /* Reset for inner layer. */
4536                                 next_protocol = 0xff;
4537                         }
4538                         break;
4539                 case RTE_FLOW_ITEM_TYPE_TCP:
4540                         ret = mlx5_flow_validate_item_tcp
4541                                                 (items, item_flags,
4542                                                  next_protocol,
4543                                                  &nic_tcp_mask,
4544                                                  error);
4545                         if (ret < 0)
4546                                 return ret;
4547                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4548                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4549                         break;
4550                 case RTE_FLOW_ITEM_TYPE_UDP:
4551                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4552                                                           next_protocol,
4553                                                           error);
4554                         if (ret < 0)
4555                                 return ret;
4556                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4557                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4558                         break;
4559                 case RTE_FLOW_ITEM_TYPE_GRE:
4560                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4561                                                           next_protocol, error);
4562                         if (ret < 0)
4563                                 return ret;
4564                         gre_item = items;
4565                         last_item = MLX5_FLOW_LAYER_GRE;
4566                         break;
4567                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4568                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4569                                                             next_protocol,
4570                                                             error);
4571                         if (ret < 0)
4572                                 return ret;
4573                         last_item = MLX5_FLOW_LAYER_NVGRE;
4574                         break;
4575                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4576                         ret = mlx5_flow_validate_item_gre_key
4577                                 (items, item_flags, gre_item, error);
4578                         if (ret < 0)
4579                                 return ret;
4580                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4581                         break;
4582                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4583                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4584                                                             error);
4585                         if (ret < 0)
4586                                 return ret;
4587                         last_item = MLX5_FLOW_LAYER_VXLAN;
4588                         break;
4589                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4590                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4591                                                                 item_flags, dev,
4592                                                                 error);
4593                         if (ret < 0)
4594                                 return ret;
4595                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4596                         break;
4597                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4598                         ret = mlx5_flow_validate_item_geneve(items,
4599                                                              item_flags, dev,
4600                                                              error);
4601                         if (ret < 0)
4602                                 return ret;
4603                         last_item = MLX5_FLOW_LAYER_GENEVE;
4604                         break;
4605                 case RTE_FLOW_ITEM_TYPE_MPLS:
4606                         ret = mlx5_flow_validate_item_mpls(dev, items,
4607                                                            item_flags,
4608                                                            last_item, error);
4609                         if (ret < 0)
4610                                 return ret;
4611                         last_item = MLX5_FLOW_LAYER_MPLS;
4612                         break;
4613
4614                 case RTE_FLOW_ITEM_TYPE_MARK:
4615                         ret = flow_dv_validate_item_mark(dev, items, attr,
4616                                                          error);
4617                         if (ret < 0)
4618                                 return ret;
4619                         last_item = MLX5_FLOW_ITEM_MARK;
4620                         break;
4621                 case RTE_FLOW_ITEM_TYPE_META:
4622                         ret = flow_dv_validate_item_meta(dev, items, attr,
4623                                                          error);
4624                         if (ret < 0)
4625                                 return ret;
4626                         last_item = MLX5_FLOW_ITEM_METADATA;
4627                         break;
4628                 case RTE_FLOW_ITEM_TYPE_ICMP:
4629                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4630                                                            next_protocol,
4631                                                            error);
4632                         if (ret < 0)
4633                                 return ret;
4634                         last_item = MLX5_FLOW_LAYER_ICMP;
4635                         break;
4636                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4637                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4638                                                             next_protocol,
4639                                                             error);
4640                         if (ret < 0)
4641                                 return ret;
4642                         last_item = MLX5_FLOW_LAYER_ICMP6;
4643                         break;
4644                 case RTE_FLOW_ITEM_TYPE_TAG:
4645                         ret = flow_dv_validate_item_tag(dev, items,
4646                                                         attr, error);
4647                         if (ret < 0)
4648                                 return ret;
4649                         last_item = MLX5_FLOW_ITEM_TAG;
4650                         break;
4651                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4652                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4653                         break;
4654                 case RTE_FLOW_ITEM_TYPE_GTP:
4655                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4656                                                         error);
4657                         if (ret < 0)
4658                                 return ret;
4659                         last_item = MLX5_FLOW_LAYER_GTP;
4660                         break;
4661                 default:
4662                         return rte_flow_error_set(error, ENOTSUP,
4663                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4664                                                   NULL, "item not supported");
4665                 }
4666                 item_flags |= last_item;
4667         }
4668         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4669                 int type = actions->type;
4670                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4671                         return rte_flow_error_set(error, ENOTSUP,
4672                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4673                                                   actions, "too many actions");
4674                 switch (type) {
4675                 case RTE_FLOW_ACTION_TYPE_VOID:
4676                         break;
4677                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4678                         ret = flow_dv_validate_action_port_id(dev,
4679                                                               action_flags,
4680                                                               actions,
4681                                                               attr,
4682                                                               error);
4683                         if (ret)
4684                                 return ret;
4685                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4686                         ++actions_n;
4687                         break;
4688                 case RTE_FLOW_ACTION_TYPE_FLAG:
4689                         ret = flow_dv_validate_action_flag(dev, action_flags,
4690                                                            attr, error);
4691                         if (ret < 0)
4692                                 return ret;
4693                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4694                                 /* Count all modify-header actions as one. */
4695                                 if (!(action_flags &
4696                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4697                                         ++actions_n;
4698                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4699                                                 MLX5_FLOW_ACTION_MARK_EXT;
4700                         } else {
4701                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4702                                 ++actions_n;
4703                         }
4704                         break;
4705                 case RTE_FLOW_ACTION_TYPE_MARK:
4706                         ret = flow_dv_validate_action_mark(dev, actions,
4707                                                            action_flags,
4708                                                            attr, error);
4709                         if (ret < 0)
4710                                 return ret;
4711                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4712                                 /* Count all modify-header actions as one. */
4713                                 if (!(action_flags &
4714                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4715                                         ++actions_n;
4716                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4717                                                 MLX5_FLOW_ACTION_MARK_EXT;
4718                         } else {
4719                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4720                                 ++actions_n;
4721                         }
4722                         break;
4723                 case RTE_FLOW_ACTION_TYPE_SET_META:
4724                         ret = flow_dv_validate_action_set_meta(dev, actions,
4725                                                                action_flags,
4726                                                                attr, error);
4727                         if (ret < 0)
4728                                 return ret;
4729                         /* Count all modify-header actions as one action. */
4730                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4731                                 ++actions_n;
4732                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4733                         break;
4734                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4735                         ret = flow_dv_validate_action_set_tag(dev, actions,
4736                                                               action_flags,
4737                                                               attr, error);
4738                         if (ret < 0)
4739                                 return ret;
4740                         /* Count all modify-header actions as one action. */
4741                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4742                                 ++actions_n;
4743                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4744                         break;
4745                 case RTE_FLOW_ACTION_TYPE_DROP:
4746                         ret = mlx5_flow_validate_action_drop(action_flags,
4747                                                              attr, error);
4748                         if (ret < 0)
4749                                 return ret;
4750                         action_flags |= MLX5_FLOW_ACTION_DROP;
4751                         ++actions_n;
4752                         break;
4753                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4754                         ret = mlx5_flow_validate_action_queue(actions,
4755                                                               action_flags, dev,
4756                                                               attr, error);
4757                         if (ret < 0)
4758                                 return ret;
4759                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4760                         ++actions_n;
4761                         break;
4762                 case RTE_FLOW_ACTION_TYPE_RSS:
4763                         ret = mlx5_flow_validate_action_rss(actions,
4764                                                             action_flags, dev,
4765                                                             attr, item_flags,
4766                                                             error);
4767                         if (ret < 0)
4768                                 return ret;
4769                         action_flags |= MLX5_FLOW_ACTION_RSS;
4770                         ++actions_n;
4771                         break;
4772                 case RTE_FLOW_ACTION_TYPE_COUNT:
4773                         ret = flow_dv_validate_action_count(dev, error);
4774                         if (ret < 0)
4775                                 return ret;
4776                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4777                         ++actions_n;
4778                         break;
4779                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4780                         if (flow_dv_validate_action_pop_vlan(dev,
4781                                                              action_flags,
4782                                                              actions,
4783                                                              item_flags, attr,
4784                                                              error))
4785                                 return -rte_errno;
4786                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4787                         ++actions_n;
4788                         break;
4789                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4790                         ret = flow_dv_validate_action_push_vlan(action_flags,
4791                                                                 item_flags,
4792                                                                 actions, attr,
4793                                                                 error);
4794                         if (ret < 0)
4795                                 return ret;
4796                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4797                         ++actions_n;
4798                         break;
4799                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4800                         ret = flow_dv_validate_action_set_vlan_pcp
4801                                                 (action_flags, actions, error);
4802                         if (ret < 0)
4803                                 return ret;
4804                         /* Count PCP with push_vlan command. */
4805                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4806                         break;
4807                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4808                         ret = flow_dv_validate_action_set_vlan_vid
4809                                                 (item_flags, action_flags,
4810                                                  actions, error);
4811                         if (ret < 0)
4812                                 return ret;
4813                         /* Count VID with push_vlan command. */
4814                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4815                         break;
4816                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4817                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4818                         ret = flow_dv_validate_action_l2_encap(action_flags,
4819                                                                actions, attr,
4820                                                                error);
4821                         if (ret < 0)
4822                                 return ret;
4823                         action_flags |= actions->type ==
4824                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4825                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4826                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4827                         ++actions_n;
4828                         break;
4829                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4830                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4831                         ret = flow_dv_validate_action_l2_decap(action_flags,
4832                                                                attr, error);
4833                         if (ret < 0)
4834                                 return ret;
4835                         action_flags |= actions->type ==
4836                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4837                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4838                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4839                         ++actions_n;
4840                         break;
4841                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4842                         ret = flow_dv_validate_action_raw_encap(action_flags,
4843                                                                 actions, attr,
4844                                                                 error);
4845                         if (ret < 0)
4846                                 return ret;
4847                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4848                         ++actions_n;
4849                         break;
4850                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4851                         ret = flow_dv_validate_action_raw_decap(action_flags,
4852                                                                 actions, attr,
4853                                                                 error);
4854                         if (ret < 0)
4855                                 return ret;
4856                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4857                         ++actions_n;
4858                         break;
4859                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4860                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4861                         ret = flow_dv_validate_action_modify_mac(action_flags,
4862                                                                  actions,
4863                                                                  item_flags,
4864                                                                  error);
4865                         if (ret < 0)
4866                                 return ret;
4867                         /* Count all modify-header actions as one action. */
4868                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4869                                 ++actions_n;
4870                         action_flags |= actions->type ==
4871                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4872                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4873                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4874                         break;
4875
4876                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4877                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4878                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4879                                                                   actions,
4880                                                                   item_flags,
4881                                                                   error);
4882                         if (ret < 0)
4883                                 return ret;
4884                         /* Count all modify-header actions as one action. */
4885                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4886                                 ++actions_n;
4887                         action_flags |= actions->type ==
4888                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4889                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4890                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4891                         break;
4892                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4893                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4894                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4895                                                                   actions,
4896                                                                   item_flags,
4897                                                                   error);
4898                         if (ret < 0)
4899                                 return ret;
4900                         if (item_ipv6_proto == IPPROTO_ICMPV6)
4901                                 return rte_flow_error_set(error, ENOTSUP,
4902                                         RTE_FLOW_ERROR_TYPE_ACTION,
4903                                         actions,
4904                                         "Can't change header "
4905                                         "with ICMPv6 proto");
4906                         /* Count all modify-header actions as one action. */
4907                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4908                                 ++actions_n;
4909                         action_flags |= actions->type ==
4910                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4911                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4912                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4913                         break;
4914                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4915                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4916                         ret = flow_dv_validate_action_modify_tp(action_flags,
4917                                                                 actions,
4918                                                                 item_flags,
4919                                                                 error);
4920                         if (ret < 0)
4921                                 return ret;
4922                         /* Count all modify-header actions as one action. */
4923                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4924                                 ++actions_n;
4925                         action_flags |= actions->type ==
4926                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4927                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4928                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4929                         break;
4930                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4931                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4932                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4933                                                                  actions,
4934                                                                  item_flags,
4935                                                                  error);
4936                         if (ret < 0)
4937                                 return ret;
4938                         /* Count all modify-header actions as one action. */
4939                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4940                                 ++actions_n;
4941                         action_flags |= actions->type ==
4942                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4943                                                 MLX5_FLOW_ACTION_SET_TTL :
4944                                                 MLX5_FLOW_ACTION_DEC_TTL;
4945                         break;
4946                 case RTE_FLOW_ACTION_TYPE_JUMP:
4947                         ret = flow_dv_validate_action_jump(actions,
4948                                                            action_flags,
4949                                                            attr, external,
4950                                                            error);
4951                         if (ret)
4952                                 return ret;
4953                         ++actions_n;
4954                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4955                         break;
4956                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4957                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4958                         ret = flow_dv_validate_action_modify_tcp_seq
4959                                                                 (action_flags,
4960                                                                  actions,
4961                                                                  item_flags,
4962                                                                  error);
4963                         if (ret < 0)
4964                                 return ret;
4965                         /* Count all modify-header actions as one action. */
4966                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4967                                 ++actions_n;
4968                         action_flags |= actions->type ==
4969                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4970                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4971                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4972                         break;
4973                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4974                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4975                         ret = flow_dv_validate_action_modify_tcp_ack
4976                                                                 (action_flags,
4977                                                                  actions,
4978                                                                  item_flags,
4979                                                                  error);
4980                         if (ret < 0)
4981                                 return ret;
4982                         /* Count all modify-header actions as one action. */
4983                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4984                                 ++actions_n;
4985                         action_flags |= actions->type ==
4986                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4987                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4988                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4989                         break;
4990                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4991                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4992                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4993                         break;
4994                 case RTE_FLOW_ACTION_TYPE_METER:
4995                         ret = mlx5_flow_validate_action_meter(dev,
4996                                                               action_flags,
4997                                                               actions, attr,
4998                                                               error);
4999                         if (ret < 0)
5000                                 return ret;
5001                         action_flags |= MLX5_FLOW_ACTION_METER;
5002                         ++actions_n;
5003                         break;
5004                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5005                         ret = flow_dv_validate_action_modify_ipv4_dscp
5006                                                          (action_flags,
5007                                                           actions,
5008                                                           item_flags,
5009                                                           error);
5010                         if (ret < 0)
5011                                 return ret;
5012                         /* Count all modify-header actions as one action. */
5013                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5014                                 ++actions_n;
5015                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5016                         break;
5017                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5018                         ret = flow_dv_validate_action_modify_ipv6_dscp
5019                                                                 (action_flags,
5020                                                                  actions,
5021                                                                  item_flags,
5022                                                                  error);
5023                         if (ret < 0)
5024                                 return ret;
5025                         /* Count all modify-header actions as one action. */
5026                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5027                                 ++actions_n;
5028                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5029                         break;
5030                 default:
5031                         return rte_flow_error_set(error, ENOTSUP,
5032                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5033                                                   actions,
5034                                                   "action not supported");
5035                 }
5036         }
5037         /*
5038          * Validate the drop action mutual exclusion with other actions.
5039          * Drop action is mutually-exclusive with any other action, except for
5040          * Count action.
5041          */
5042         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5043             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5044                 return rte_flow_error_set(error, EINVAL,
5045                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5046                                           "Drop action is mutually-exclusive "
5047                                           "with any other action, except for "
5048                                           "Count action");
5049         /* Eswitch has few restrictions on using items and actions */
5050         if (attr->transfer) {
5051                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5052                     action_flags & MLX5_FLOW_ACTION_FLAG)
5053                         return rte_flow_error_set(error, ENOTSUP,
5054                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5055                                                   NULL,
5056                                                   "unsupported action FLAG");
5057                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5058                     action_flags & MLX5_FLOW_ACTION_MARK)
5059                         return rte_flow_error_set(error, ENOTSUP,
5060                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5061                                                   NULL,
5062                                                   "unsupported action MARK");
5063                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5064                         return rte_flow_error_set(error, ENOTSUP,
5065                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5066                                                   NULL,
5067                                                   "unsupported action QUEUE");
5068                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5069                         return rte_flow_error_set(error, ENOTSUP,
5070                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5071                                                   NULL,
5072                                                   "unsupported action RSS");
5073                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5074                         return rte_flow_error_set(error, EINVAL,
5075                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5076                                                   actions,
5077                                                   "no fate action is found");
5078         } else {
5079                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5080                         return rte_flow_error_set(error, EINVAL,
5081                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5082                                                   actions,
5083                                                   "no fate action is found");
5084         }
5085         return 0;
5086 }
5087
5088 /**
5089  * Internal preparation function. Allocates the DV flow size,
5090  * this size is constant.
5091  *
5092  * @param[in] attr
5093  *   Pointer to the flow attributes.
5094  * @param[in] items
5095  *   Pointer to the list of items.
5096  * @param[in] actions
5097  *   Pointer to the list of actions.
5098  * @param[out] error
5099  *   Pointer to the error structure.
5100  *
5101  * @return
5102  *   Pointer to mlx5_flow object on success,
5103  *   otherwise NULL and rte_errno is set.
5104  */
5105 static struct mlx5_flow *
5106 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5107                 const struct rte_flow_item items[] __rte_unused,
5108                 const struct rte_flow_action actions[] __rte_unused,
5109                 struct rte_flow_error *error)
5110 {
5111         size_t size = sizeof(struct mlx5_flow);
5112         struct mlx5_flow *dev_flow;
5113
5114         dev_flow = rte_calloc(__func__, 1, size, 0);
5115         if (!dev_flow) {
5116                 rte_flow_error_set(error, ENOMEM,
5117                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5118                                    "not enough memory to create flow");
5119                 return NULL;
5120         }
5121         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5122         dev_flow->ingress = attr->ingress;
5123         dev_flow->transfer = attr->transfer;
5124         return dev_flow;
5125 }
5126
5127 #ifdef RTE_LIBRTE_MLX5_DEBUG
5128 /**
5129  * Sanity check for match mask and value. Similar to check_valid_spec() in
5130  * kernel driver. If unmasked bit is present in value, it returns failure.
5131  *
5132  * @param match_mask
5133  *   pointer to match mask buffer.
5134  * @param match_value
5135  *   pointer to match value buffer.
5136  *
5137  * @return
5138  *   0 if valid, -EINVAL otherwise.
5139  */
5140 static int
5141 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5142 {
5143         uint8_t *m = match_mask;
5144         uint8_t *v = match_value;
5145         unsigned int i;
5146
5147         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5148                 if (v[i] & ~m[i]) {
5149                         DRV_LOG(ERR,
5150                                 "match_value differs from match_criteria"
5151                                 " %p[%u] != %p[%u]",
5152                                 match_value, i, match_mask, i);
5153                         return -EINVAL;
5154                 }
5155         }
5156         return 0;
5157 }
5158 #endif
5159
5160 /**
5161  * Add Ethernet item to matcher and to the value.
5162  *
5163  * @param[in, out] matcher
5164  *   Flow matcher.
5165  * @param[in, out] key
5166  *   Flow matcher value.
5167  * @param[in] item
5168  *   Flow pattern to translate.
5169  * @param[in] inner
5170  *   Item is inner pattern.
5171  */
5172 static void
5173 flow_dv_translate_item_eth(void *matcher, void *key,
5174                            const struct rte_flow_item *item, int inner)
5175 {
5176         const struct rte_flow_item_eth *eth_m = item->mask;
5177         const struct rte_flow_item_eth *eth_v = item->spec;
5178         const struct rte_flow_item_eth nic_mask = {
5179                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5180                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5181                 .type = RTE_BE16(0xffff),
5182         };
5183         void *headers_m;
5184         void *headers_v;
5185         char *l24_v;
5186         unsigned int i;
5187
5188         if (!eth_v)
5189                 return;
5190         if (!eth_m)
5191                 eth_m = &nic_mask;
5192         if (inner) {
5193                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5194                                          inner_headers);
5195                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5196         } else {
5197                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5198                                          outer_headers);
5199                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5200         }
5201         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5202                &eth_m->dst, sizeof(eth_m->dst));
5203         /* The value must be in the range of the mask. */
5204         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5205         for (i = 0; i < sizeof(eth_m->dst); ++i)
5206                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5207         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5208                &eth_m->src, sizeof(eth_m->src));
5209         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5210         /* The value must be in the range of the mask. */
5211         for (i = 0; i < sizeof(eth_m->dst); ++i)
5212                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5213         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5214                  rte_be_to_cpu_16(eth_m->type));
5215         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5216         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5217 }
5218
5219 /**
5220  * Add VLAN item to matcher and to the value.
5221  *
5222  * @param[in, out] dev_flow
5223  *   Flow descriptor.
5224  * @param[in, out] matcher
5225  *   Flow matcher.
5226  * @param[in, out] key
5227  *   Flow matcher value.
5228  * @param[in] item
5229  *   Flow pattern to translate.
5230  * @param[in] inner
5231  *   Item is inner pattern.
5232  */
5233 static void
5234 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5235                             void *matcher, void *key,
5236                             const struct rte_flow_item *item,
5237                             int inner)
5238 {
5239         const struct rte_flow_item_vlan *vlan_m = item->mask;
5240         const struct rte_flow_item_vlan *vlan_v = item->spec;
5241         void *headers_m;
5242         void *headers_v;
5243         uint16_t tci_m;
5244         uint16_t tci_v;
5245
5246         if (!vlan_v)
5247                 return;
5248         if (!vlan_m)
5249                 vlan_m = &rte_flow_item_vlan_mask;
5250         if (inner) {
5251                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5252                                          inner_headers);
5253                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5254         } else {
5255                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5256                                          outer_headers);
5257                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5258                 /*
5259                  * This is workaround, masks are not supported,
5260                  * and pre-validated.
5261                  */
5262                 dev_flow->dv.vf_vlan.tag =
5263                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5264         }
5265         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5266         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5267         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5268         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5269         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5270         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5271         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5272         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5273         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5274         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5275         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5276                  rte_be_to_cpu_16(vlan_m->inner_type));
5277         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5278                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5279 }
5280
5281 /**
5282  * Add IPV4 item to matcher and to the value.
5283  *
5284  * @param[in, out] matcher
5285  *   Flow matcher.
5286  * @param[in, out] key
5287  *   Flow matcher value.
5288  * @param[in] item
5289  *   Flow pattern to translate.
5290  * @param[in] inner
5291  *   Item is inner pattern.
5292  * @param[in] group
5293  *   The group to insert the rule.
5294  */
5295 static void
5296 flow_dv_translate_item_ipv4(void *matcher, void *key,
5297                             const struct rte_flow_item *item,
5298                             int inner, uint32_t group)
5299 {
5300         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5301         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5302         const struct rte_flow_item_ipv4 nic_mask = {
5303                 .hdr = {
5304                         .src_addr = RTE_BE32(0xffffffff),
5305                         .dst_addr = RTE_BE32(0xffffffff),
5306                         .type_of_service = 0xff,
5307                         .next_proto_id = 0xff,
5308                 },
5309         };
5310         void *headers_m;
5311         void *headers_v;
5312         char *l24_m;
5313         char *l24_v;
5314         uint8_t tos;
5315
5316         if (inner) {
5317                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5318                                          inner_headers);
5319                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5320         } else {
5321                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5322                                          outer_headers);
5323                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5324         }
5325         if (group == 0)
5326                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5327         else
5328                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5329         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5330         if (!ipv4_v)
5331                 return;
5332         if (!ipv4_m)
5333                 ipv4_m = &nic_mask;
5334         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5335                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5336         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5337                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5338         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5339         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5340         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5341                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5342         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5343                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5344         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5345         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5346         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5347         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5348                  ipv4_m->hdr.type_of_service);
5349         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5350         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5351                  ipv4_m->hdr.type_of_service >> 2);
5352         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5353         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5354                  ipv4_m->hdr.next_proto_id);
5355         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5356                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5357 }
5358
5359 /**
5360  * Add IPV6 item to matcher and to the value.
5361  *
5362  * @param[in, out] matcher
5363  *   Flow matcher.
5364  * @param[in, out] key
5365  *   Flow matcher value.
5366  * @param[in] item
5367  *   Flow pattern to translate.
5368  * @param[in] inner
5369  *   Item is inner pattern.
5370  * @param[in] group
5371  *   The group to insert the rule.
5372  */
5373 static void
5374 flow_dv_translate_item_ipv6(void *matcher, void *key,
5375                             const struct rte_flow_item *item,
5376                             int inner, uint32_t group)
5377 {
5378         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5379         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5380         const struct rte_flow_item_ipv6 nic_mask = {
5381                 .hdr = {
5382                         .src_addr =
5383                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5384                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5385                         .dst_addr =
5386                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5387                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5388                         .vtc_flow = RTE_BE32(0xffffffff),
5389                         .proto = 0xff,
5390                         .hop_limits = 0xff,
5391                 },
5392         };
5393         void *headers_m;
5394         void *headers_v;
5395         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5396         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5397         char *l24_m;
5398         char *l24_v;
5399         uint32_t vtc_m;
5400         uint32_t vtc_v;
5401         int i;
5402         int size;
5403
5404         if (inner) {
5405                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5406                                          inner_headers);
5407                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5408         } else {
5409                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5410                                          outer_headers);
5411                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5412         }
5413         if (group == 0)
5414                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5415         else
5416                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5417         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5418         if (!ipv6_v)
5419                 return;
5420         if (!ipv6_m)
5421                 ipv6_m = &nic_mask;
5422         size = sizeof(ipv6_m->hdr.dst_addr);
5423         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5424                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5425         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5426                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5427         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5428         for (i = 0; i < size; ++i)
5429                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5430         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5431                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5432         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5433                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5434         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5435         for (i = 0; i < size; ++i)
5436                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5437         /* TOS. */
5438         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5439         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5440         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5441         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5442         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5443         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5444         /* Label. */
5445         if (inner) {
5446                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5447                          vtc_m);
5448                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5449                          vtc_v);
5450         } else {
5451                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5452                          vtc_m);
5453                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5454                          vtc_v);
5455         }
5456         /* Protocol. */
5457         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5458                  ipv6_m->hdr.proto);
5459         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5460                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5461 }
5462
5463 /**
5464  * Add TCP item to matcher and to the value.
5465  *
5466  * @param[in, out] matcher
5467  *   Flow matcher.
5468  * @param[in, out] key
5469  *   Flow matcher value.
5470  * @param[in] item
5471  *   Flow pattern to translate.
5472  * @param[in] inner
5473  *   Item is inner pattern.
5474  */
5475 static void
5476 flow_dv_translate_item_tcp(void *matcher, void *key,
5477                            const struct rte_flow_item *item,
5478                            int inner)
5479 {
5480         const struct rte_flow_item_tcp *tcp_m = item->mask;
5481         const struct rte_flow_item_tcp *tcp_v = item->spec;
5482         void *headers_m;
5483         void *headers_v;
5484
5485         if (inner) {
5486                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5487                                          inner_headers);
5488                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5489         } else {
5490                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5491                                          outer_headers);
5492                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5493         }
5494         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5495         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5496         if (!tcp_v)
5497                 return;
5498         if (!tcp_m)
5499                 tcp_m = &rte_flow_item_tcp_mask;
5500         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5501                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5502         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5503                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5504         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5505                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5506         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5507                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5508         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5509                  tcp_m->hdr.tcp_flags);
5510         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5511                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5512 }
5513
5514 /**
5515  * Add UDP item to matcher and to the value.
5516  *
5517  * @param[in, out] matcher
5518  *   Flow matcher.
5519  * @param[in, out] key
5520  *   Flow matcher value.
5521  * @param[in] item
5522  *   Flow pattern to translate.
5523  * @param[in] inner
5524  *   Item is inner pattern.
5525  */
5526 static void
5527 flow_dv_translate_item_udp(void *matcher, void *key,
5528                            const struct rte_flow_item *item,
5529                            int inner)
5530 {
5531         const struct rte_flow_item_udp *udp_m = item->mask;
5532         const struct rte_flow_item_udp *udp_v = item->spec;
5533         void *headers_m;
5534         void *headers_v;
5535
5536         if (inner) {
5537                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5538                                          inner_headers);
5539                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5540         } else {
5541                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5542                                          outer_headers);
5543                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5544         }
5545         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5546         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5547         if (!udp_v)
5548                 return;
5549         if (!udp_m)
5550                 udp_m = &rte_flow_item_udp_mask;
5551         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5552                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5553         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5554                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5555         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5556                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5557         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5558                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5559 }
5560
5561 /**
5562  * Add GRE optional Key item to matcher and to the value.
5563  *
5564  * @param[in, out] matcher
5565  *   Flow matcher.
5566  * @param[in, out] key
5567  *   Flow matcher value.
5568  * @param[in] item
5569  *   Flow pattern to translate.
5570  * @param[in] inner
5571  *   Item is inner pattern.
5572  */
5573 static void
5574 flow_dv_translate_item_gre_key(void *matcher, void *key,
5575                                    const struct rte_flow_item *item)
5576 {
5577         const rte_be32_t *key_m = item->mask;
5578         const rte_be32_t *key_v = item->spec;
5579         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5580         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5581         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5582
5583         if (!key_v)
5584                 return;
5585         if (!key_m)
5586                 key_m = &gre_key_default_mask;
5587         /* GRE K bit must be on and should already be validated */
5588         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5589         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5590         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5591                  rte_be_to_cpu_32(*key_m) >> 8);
5592         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5593                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5594         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5595                  rte_be_to_cpu_32(*key_m) & 0xFF);
5596         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5597                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5598 }
5599
5600 /**
5601  * Add GRE item to matcher and to the value.
5602  *
5603  * @param[in, out] matcher
5604  *   Flow matcher.
5605  * @param[in, out] key
5606  *   Flow matcher value.
5607  * @param[in] item
5608  *   Flow pattern to translate.
5609  * @param[in] inner
5610  *   Item is inner pattern.
5611  */
5612 static void
5613 flow_dv_translate_item_gre(void *matcher, void *key,
5614                            const struct rte_flow_item *item,
5615                            int inner)
5616 {
5617         const struct rte_flow_item_gre *gre_m = item->mask;
5618         const struct rte_flow_item_gre *gre_v = item->spec;
5619         void *headers_m;
5620         void *headers_v;
5621         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5622         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5623         struct {
5624                 union {
5625                         __extension__
5626                         struct {
5627                                 uint16_t version:3;
5628                                 uint16_t rsvd0:9;
5629                                 uint16_t s_present:1;
5630                                 uint16_t k_present:1;
5631                                 uint16_t rsvd_bit1:1;
5632                                 uint16_t c_present:1;
5633                         };
5634                         uint16_t value;
5635                 };
5636         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5637
5638         if (inner) {
5639                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5640                                          inner_headers);
5641                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5642         } else {
5643                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5644                                          outer_headers);
5645                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5646         }
5647         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5648         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5649         if (!gre_v)
5650                 return;
5651         if (!gre_m)
5652                 gre_m = &rte_flow_item_gre_mask;
5653         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5654                  rte_be_to_cpu_16(gre_m->protocol));
5655         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5656                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5657         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5658         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5659         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5660                  gre_crks_rsvd0_ver_m.c_present);
5661         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5662                  gre_crks_rsvd0_ver_v.c_present &
5663                  gre_crks_rsvd0_ver_m.c_present);
5664         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5665                  gre_crks_rsvd0_ver_m.k_present);
5666         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5667                  gre_crks_rsvd0_ver_v.k_present &
5668                  gre_crks_rsvd0_ver_m.k_present);
5669         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5670                  gre_crks_rsvd0_ver_m.s_present);
5671         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5672                  gre_crks_rsvd0_ver_v.s_present &
5673                  gre_crks_rsvd0_ver_m.s_present);
5674 }
5675
5676 /**
5677  * Add NVGRE item to matcher and to the value.
5678  *
5679  * @param[in, out] matcher
5680  *   Flow matcher.
5681  * @param[in, out] key
5682  *   Flow matcher value.
5683  * @param[in] item
5684  *   Flow pattern to translate.
5685  * @param[in] inner
5686  *   Item is inner pattern.
5687  */
5688 static void
5689 flow_dv_translate_item_nvgre(void *matcher, void *key,
5690                              const struct rte_flow_item *item,
5691                              int inner)
5692 {
5693         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5694         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5695         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5696         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5697         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5698         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5699         char *gre_key_m;
5700         char *gre_key_v;
5701         int size;
5702         int i;
5703
5704         /* For NVGRE, GRE header fields must be set with defined values. */
5705         const struct rte_flow_item_gre gre_spec = {
5706                 .c_rsvd0_ver = RTE_BE16(0x2000),
5707                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5708         };
5709         const struct rte_flow_item_gre gre_mask = {
5710                 .c_rsvd0_ver = RTE_BE16(0xB000),
5711                 .protocol = RTE_BE16(UINT16_MAX),
5712         };
5713         const struct rte_flow_item gre_item = {
5714                 .spec = &gre_spec,
5715                 .mask = &gre_mask,
5716                 .last = NULL,
5717         };
5718         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5719         if (!nvgre_v)
5720                 return;
5721         if (!nvgre_m)
5722                 nvgre_m = &rte_flow_item_nvgre_mask;
5723         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5724         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5725         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5726         memcpy(gre_key_m, tni_flow_id_m, size);
5727         for (i = 0; i < size; ++i)
5728                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5729 }
5730
5731 /**
5732  * Add VXLAN item to matcher and to the value.
5733  *
5734  * @param[in, out] matcher
5735  *   Flow matcher.
5736  * @param[in, out] key
5737  *   Flow matcher value.
5738  * @param[in] item
5739  *   Flow pattern to translate.
5740  * @param[in] inner
5741  *   Item is inner pattern.
5742  */
5743 static void
5744 flow_dv_translate_item_vxlan(void *matcher, void *key,
5745                              const struct rte_flow_item *item,
5746                              int inner)
5747 {
5748         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5749         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5750         void *headers_m;
5751         void *headers_v;
5752         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5753         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5754         char *vni_m;
5755         char *vni_v;
5756         uint16_t dport;
5757         int size;
5758         int i;
5759
5760         if (inner) {
5761                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5762                                          inner_headers);
5763                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5764         } else {
5765                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5766                                          outer_headers);
5767                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5768         }
5769         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5770                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5771         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5772                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5773                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5774         }
5775         if (!vxlan_v)
5776                 return;
5777         if (!vxlan_m)
5778                 vxlan_m = &rte_flow_item_vxlan_mask;
5779         size = sizeof(vxlan_m->vni);
5780         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5781         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5782         memcpy(vni_m, vxlan_m->vni, size);
5783         for (i = 0; i < size; ++i)
5784                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5785 }
5786
5787 /**
5788  * Add VXLAN-GPE item to matcher and to the value.
5789  *
5790  * @param[in, out] matcher
5791  *   Flow matcher.
5792  * @param[in, out] key
5793  *   Flow matcher value.
5794  * @param[in] item
5795  *   Flow pattern to translate.
5796  * @param[in] inner
5797  *   Item is inner pattern.
5798  */
5799
5800 static void
5801 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
5802                                  const struct rte_flow_item *item, int inner)
5803 {
5804         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
5805         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
5806         void *headers_m;
5807         void *headers_v;
5808         void *misc_m =
5809                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
5810         void *misc_v =
5811                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
5812         char *vni_m;
5813         char *vni_v;
5814         uint16_t dport;
5815         int size;
5816         int i;
5817         uint8_t flags_m = 0xff;
5818         uint8_t flags_v = 0xc;
5819
5820         if (inner) {
5821                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5822                                          inner_headers);
5823                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5824         } else {
5825                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5826                                          outer_headers);
5827                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5828         }
5829         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5830                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5831         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5832                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5833                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5834         }
5835         if (!vxlan_v)
5836                 return;
5837         if (!vxlan_m)
5838                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
5839         size = sizeof(vxlan_m->vni);
5840         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
5841         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
5842         memcpy(vni_m, vxlan_m->vni, size);
5843         for (i = 0; i < size; ++i)
5844                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5845         if (vxlan_m->flags) {
5846                 flags_m = vxlan_m->flags;
5847                 flags_v = vxlan_v->flags;
5848         }
5849         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
5850         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
5851         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
5852                  vxlan_m->protocol);
5853         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
5854                  vxlan_v->protocol);
5855 }
5856
5857 /**
5858  * Add Geneve item to matcher and to the value.
5859  *
5860  * @param[in, out] matcher
5861  *   Flow matcher.
5862  * @param[in, out] key
5863  *   Flow matcher value.
5864  * @param[in] item
5865  *   Flow pattern to translate.
5866  * @param[in] inner
5867  *   Item is inner pattern.
5868  */
5869
5870 static void
5871 flow_dv_translate_item_geneve(void *matcher, void *key,
5872                               const struct rte_flow_item *item, int inner)
5873 {
5874         const struct rte_flow_item_geneve *geneve_m = item->mask;
5875         const struct rte_flow_item_geneve *geneve_v = item->spec;
5876         void *headers_m;
5877         void *headers_v;
5878         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5879         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5880         uint16_t dport;
5881         uint16_t gbhdr_m;
5882         uint16_t gbhdr_v;
5883         char *vni_m;
5884         char *vni_v;
5885         size_t size, i;
5886
5887         if (inner) {
5888                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5889                                          inner_headers);
5890                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5891         } else {
5892                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5893                                          outer_headers);
5894                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5895         }
5896         dport = MLX5_UDP_PORT_GENEVE;
5897         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5898                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5899                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5900         }
5901         if (!geneve_v)
5902                 return;
5903         if (!geneve_m)
5904                 geneve_m = &rte_flow_item_geneve_mask;
5905         size = sizeof(geneve_m->vni);
5906         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5907         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5908         memcpy(vni_m, geneve_m->vni, size);
5909         for (i = 0; i < size; ++i)
5910                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5911         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5912                  rte_be_to_cpu_16(geneve_m->protocol));
5913         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5914                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5915         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5916         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5917         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5918                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5919         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5920                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5921         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5922                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5923         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5924                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5925                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5926 }
5927
5928 /**
5929  * Add MPLS item to matcher and to the value.
5930  *
5931  * @param[in, out] matcher
5932  *   Flow matcher.
5933  * @param[in, out] key
5934  *   Flow matcher value.
5935  * @param[in] item
5936  *   Flow pattern to translate.
5937  * @param[in] prev_layer
5938  *   The protocol layer indicated in previous item.
5939  * @param[in] inner
5940  *   Item is inner pattern.
5941  */
5942 static void
5943 flow_dv_translate_item_mpls(void *matcher, void *key,
5944                             const struct rte_flow_item *item,
5945                             uint64_t prev_layer,
5946                             int inner)
5947 {
5948         const uint32_t *in_mpls_m = item->mask;
5949         const uint32_t *in_mpls_v = item->spec;
5950         uint32_t *out_mpls_m = 0;
5951         uint32_t *out_mpls_v = 0;
5952         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5953         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5954         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5955                                      misc_parameters_2);
5956         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5957         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5958         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5959
5960         switch (prev_layer) {
5961         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5962                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5963                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5964                          MLX5_UDP_PORT_MPLS);
5965                 break;
5966         case MLX5_FLOW_LAYER_GRE:
5967                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5968                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5969                          RTE_ETHER_TYPE_MPLS);
5970                 break;
5971         default:
5972                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5973                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5974                          IPPROTO_MPLS);
5975                 break;
5976         }
5977         if (!in_mpls_v)
5978                 return;
5979         if (!in_mpls_m)
5980                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5981         switch (prev_layer) {
5982         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5983                 out_mpls_m =
5984                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5985                                                  outer_first_mpls_over_udp);
5986                 out_mpls_v =
5987                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5988                                                  outer_first_mpls_over_udp);
5989                 break;
5990         case MLX5_FLOW_LAYER_GRE:
5991                 out_mpls_m =
5992                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5993                                                  outer_first_mpls_over_gre);
5994                 out_mpls_v =
5995                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5996                                                  outer_first_mpls_over_gre);
5997                 break;
5998         default:
5999                 /* Inner MPLS not over GRE is not supported. */
6000                 if (!inner) {
6001                         out_mpls_m =
6002                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6003                                                          misc2_m,
6004                                                          outer_first_mpls);
6005                         out_mpls_v =
6006                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6007                                                          misc2_v,
6008                                                          outer_first_mpls);
6009                 }
6010                 break;
6011         }
6012         if (out_mpls_m && out_mpls_v) {
6013                 *out_mpls_m = *in_mpls_m;
6014                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
6015         }
6016 }
6017
6018 /**
6019  * Add metadata register item to matcher
6020  *
6021  * @param[in, out] matcher
6022  *   Flow matcher.
6023  * @param[in, out] key
6024  *   Flow matcher value.
6025  * @param[in] reg_type
6026  *   Type of device metadata register
6027  * @param[in] value
6028  *   Register value
6029  * @param[in] mask
6030  *   Register mask
6031  */
6032 static void
6033 flow_dv_match_meta_reg(void *matcher, void *key,
6034                        enum modify_reg reg_type,
6035                        uint32_t data, uint32_t mask)
6036 {
6037         void *misc2_m =
6038                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
6039         void *misc2_v =
6040                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6041         uint32_t temp;
6042
6043         data &= mask;
6044         switch (reg_type) {
6045         case REG_A:
6046                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
6047                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
6048                 break;
6049         case REG_B:
6050                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
6051                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
6052                 break;
6053         case REG_C_0:
6054                 /*
6055                  * The metadata register C0 field might be divided into
6056                  * source vport index and META item value, we should set
6057                  * this field according to specified mask, not as whole one.
6058                  */
6059                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
6060                 temp |= mask;
6061                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
6062                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
6063                 temp &= ~mask;
6064                 temp |= data;
6065                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
6066                 break;
6067         case REG_C_1:
6068                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
6069                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
6070                 break;
6071         case REG_C_2:
6072                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
6073                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
6074                 break;
6075         case REG_C_3:
6076                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6077                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6078                 break;
6079         case REG_C_4:
6080                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6081                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6082                 break;
6083         case REG_C_5:
6084                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6085                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6086                 break;
6087         case REG_C_6:
6088                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6089                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6090                 break;
6091         case REG_C_7:
6092                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6093                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6094                 break;
6095         default:
6096                 MLX5_ASSERT(false);
6097                 break;
6098         }
6099 }
6100
6101 /**
6102  * Add MARK item to matcher
6103  *
6104  * @param[in] dev
6105  *   The device to configure through.
6106  * @param[in, out] matcher
6107  *   Flow matcher.
6108  * @param[in, out] key
6109  *   Flow matcher value.
6110  * @param[in] item
6111  *   Flow pattern to translate.
6112  */
6113 static void
6114 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6115                             void *matcher, void *key,
6116                             const struct rte_flow_item *item)
6117 {
6118         struct mlx5_priv *priv = dev->data->dev_private;
6119         const struct rte_flow_item_mark *mark;
6120         uint32_t value;
6121         uint32_t mask;
6122
6123         mark = item->mask ? (const void *)item->mask :
6124                             &rte_flow_item_mark_mask;
6125         mask = mark->id & priv->sh->dv_mark_mask;
6126         mark = (const void *)item->spec;
6127         MLX5_ASSERT(mark);
6128         value = mark->id & priv->sh->dv_mark_mask & mask;
6129         if (mask) {
6130                 enum modify_reg reg;
6131
6132                 /* Get the metadata register index for the mark. */
6133                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6134                 MLX5_ASSERT(reg > 0);
6135                 if (reg == REG_C_0) {
6136                         struct mlx5_priv *priv = dev->data->dev_private;
6137                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6138                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6139
6140                         mask &= msk_c0;
6141                         mask <<= shl_c0;
6142                         value <<= shl_c0;
6143                 }
6144                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6145         }
6146 }
6147
6148 /**
6149  * Add META item to matcher
6150  *
6151  * @param[in] dev
6152  *   The devich to configure through.
6153  * @param[in, out] matcher
6154  *   Flow matcher.
6155  * @param[in, out] key
6156  *   Flow matcher value.
6157  * @param[in] attr
6158  *   Attributes of flow that includes this item.
6159  * @param[in] item
6160  *   Flow pattern to translate.
6161  */
6162 static void
6163 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6164                             void *matcher, void *key,
6165                             const struct rte_flow_attr *attr,
6166                             const struct rte_flow_item *item)
6167 {
6168         const struct rte_flow_item_meta *meta_m;
6169         const struct rte_flow_item_meta *meta_v;
6170
6171         meta_m = (const void *)item->mask;
6172         if (!meta_m)
6173                 meta_m = &rte_flow_item_meta_mask;
6174         meta_v = (const void *)item->spec;
6175         if (meta_v) {
6176                 int reg;
6177                 uint32_t value = meta_v->data;
6178                 uint32_t mask = meta_m->data;
6179
6180                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6181                 if (reg < 0)
6182                         return;
6183                 /*
6184                  * In datapath code there is no endianness
6185                  * coversions for perfromance reasons, all
6186                  * pattern conversions are done in rte_flow.
6187                  */
6188                 value = rte_cpu_to_be_32(value);
6189                 mask = rte_cpu_to_be_32(mask);
6190                 if (reg == REG_C_0) {
6191                         struct mlx5_priv *priv = dev->data->dev_private;
6192                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6193                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6194 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6195                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6196
6197                         value >>= shr_c0;
6198                         mask >>= shr_c0;
6199 #endif
6200                         value <<= shl_c0;
6201                         mask <<= shl_c0;
6202                         MLX5_ASSERT(msk_c0);
6203                         MLX5_ASSERT(!(~msk_c0 & mask));
6204                 }
6205                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6206         }
6207 }
6208
6209 /**
6210  * Add vport metadata Reg C0 item to matcher
6211  *
6212  * @param[in, out] matcher
6213  *   Flow matcher.
6214  * @param[in, out] key
6215  *   Flow matcher value.
6216  * @param[in] reg
6217  *   Flow pattern to translate.
6218  */
6219 static void
6220 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6221                                   uint32_t value, uint32_t mask)
6222 {
6223         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6224 }
6225
6226 /**
6227  * Add tag item to matcher
6228  *
6229  * @param[in] dev
6230  *   The devich to configure through.
6231  * @param[in, out] matcher
6232  *   Flow matcher.
6233  * @param[in, out] key
6234  *   Flow matcher value.
6235  * @param[in] item
6236  *   Flow pattern to translate.
6237  */
6238 static void
6239 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6240                                 void *matcher, void *key,
6241                                 const struct rte_flow_item *item)
6242 {
6243         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6244         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6245         uint32_t mask, value;
6246
6247         MLX5_ASSERT(tag_v);
6248         value = tag_v->data;
6249         mask = tag_m ? tag_m->data : UINT32_MAX;
6250         if (tag_v->id == REG_C_0) {
6251                 struct mlx5_priv *priv = dev->data->dev_private;
6252                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6253                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6254
6255                 mask &= msk_c0;
6256                 mask <<= shl_c0;
6257                 value <<= shl_c0;
6258         }
6259         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6260 }
6261
6262 /**
6263  * Add TAG item to matcher
6264  *
6265  * @param[in] dev
6266  *   The devich to configure through.
6267  * @param[in, out] matcher
6268  *   Flow matcher.
6269  * @param[in, out] key
6270  *   Flow matcher value.
6271  * @param[in] item
6272  *   Flow pattern to translate.
6273  */
6274 static void
6275 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6276                            void *matcher, void *key,
6277                            const struct rte_flow_item *item)
6278 {
6279         const struct rte_flow_item_tag *tag_v = item->spec;
6280         const struct rte_flow_item_tag *tag_m = item->mask;
6281         enum modify_reg reg;
6282
6283         MLX5_ASSERT(tag_v);
6284         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6285         /* Get the metadata register index for the tag. */
6286         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6287         MLX5_ASSERT(reg > 0);
6288         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6289 }
6290
6291 /**
6292  * Add source vport match to the specified matcher.
6293  *
6294  * @param[in, out] matcher
6295  *   Flow matcher.
6296  * @param[in, out] key
6297  *   Flow matcher value.
6298  * @param[in] port
6299  *   Source vport value to match
6300  * @param[in] mask
6301  *   Mask
6302  */
6303 static void
6304 flow_dv_translate_item_source_vport(void *matcher, void *key,
6305                                     int16_t port, uint16_t mask)
6306 {
6307         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6308         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6309
6310         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6311         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6312 }
6313
6314 /**
6315  * Translate port-id item to eswitch match on  port-id.
6316  *
6317  * @param[in] dev
6318  *   The devich to configure through.
6319  * @param[in, out] matcher
6320  *   Flow matcher.
6321  * @param[in, out] key
6322  *   Flow matcher value.
6323  * @param[in] item
6324  *   Flow pattern to translate.
6325  *
6326  * @return
6327  *   0 on success, a negative errno value otherwise.
6328  */
6329 static int
6330 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6331                                void *key, const struct rte_flow_item *item)
6332 {
6333         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6334         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6335         struct mlx5_priv *priv;
6336         uint16_t mask, id;
6337
6338         mask = pid_m ? pid_m->id : 0xffff;
6339         id = pid_v ? pid_v->id : dev->data->port_id;
6340         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6341         if (!priv)
6342                 return -rte_errno;
6343         /* Translate to vport field or to metadata, depending on mode. */
6344         if (priv->vport_meta_mask)
6345                 flow_dv_translate_item_meta_vport(matcher, key,
6346                                                   priv->vport_meta_tag,
6347                                                   priv->vport_meta_mask);
6348         else
6349                 flow_dv_translate_item_source_vport(matcher, key,
6350                                                     priv->vport_id, mask);
6351         return 0;
6352 }
6353
6354 /**
6355  * Add ICMP6 item to matcher and to the value.
6356  *
6357  * @param[in, out] matcher
6358  *   Flow matcher.
6359  * @param[in, out] key
6360  *   Flow matcher value.
6361  * @param[in] item
6362  *   Flow pattern to translate.
6363  * @param[in] inner
6364  *   Item is inner pattern.
6365  */
6366 static void
6367 flow_dv_translate_item_icmp6(void *matcher, void *key,
6368                               const struct rte_flow_item *item,
6369                               int inner)
6370 {
6371         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6372         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6373         void *headers_m;
6374         void *headers_v;
6375         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6376                                      misc_parameters_3);
6377         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6378         if (inner) {
6379                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6380                                          inner_headers);
6381                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6382         } else {
6383                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6384                                          outer_headers);
6385                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6386         }
6387         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6388         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6389         if (!icmp6_v)
6390                 return;
6391         if (!icmp6_m)
6392                 icmp6_m = &rte_flow_item_icmp6_mask;
6393         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6394         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6395                  icmp6_v->type & icmp6_m->type);
6396         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6397         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6398                  icmp6_v->code & icmp6_m->code);
6399 }
6400
6401 /**
6402  * Add ICMP item to matcher and to the value.
6403  *
6404  * @param[in, out] matcher
6405  *   Flow matcher.
6406  * @param[in, out] key
6407  *   Flow matcher value.
6408  * @param[in] item
6409  *   Flow pattern to translate.
6410  * @param[in] inner
6411  *   Item is inner pattern.
6412  */
6413 static void
6414 flow_dv_translate_item_icmp(void *matcher, void *key,
6415                             const struct rte_flow_item *item,
6416                             int inner)
6417 {
6418         const struct rte_flow_item_icmp *icmp_m = item->mask;
6419         const struct rte_flow_item_icmp *icmp_v = item->spec;
6420         void *headers_m;
6421         void *headers_v;
6422         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6423                                      misc_parameters_3);
6424         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6425         if (inner) {
6426                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6427                                          inner_headers);
6428                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6429         } else {
6430                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6431                                          outer_headers);
6432                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6433         }
6434         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6435         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6436         if (!icmp_v)
6437                 return;
6438         if (!icmp_m)
6439                 icmp_m = &rte_flow_item_icmp_mask;
6440         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6441                  icmp_m->hdr.icmp_type);
6442         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6443                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6444         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6445                  icmp_m->hdr.icmp_code);
6446         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6447                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6448 }
6449
6450 /**
6451  * Add GTP item to matcher and to the value.
6452  *
6453  * @param[in, out] matcher
6454  *   Flow matcher.
6455  * @param[in, out] key
6456  *   Flow matcher value.
6457  * @param[in] item
6458  *   Flow pattern to translate.
6459  * @param[in] inner
6460  *   Item is inner pattern.
6461  */
6462 static void
6463 flow_dv_translate_item_gtp(void *matcher, void *key,
6464                            const struct rte_flow_item *item, int inner)
6465 {
6466         const struct rte_flow_item_gtp *gtp_m = item->mask;
6467         const struct rte_flow_item_gtp *gtp_v = item->spec;
6468         void *headers_m;
6469         void *headers_v;
6470         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6471                                      misc_parameters_3);
6472         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6473         uint16_t dport = RTE_GTPU_UDP_PORT;
6474
6475         if (inner) {
6476                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6477                                          inner_headers);
6478                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6479         } else {
6480                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6481                                          outer_headers);
6482                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6483         }
6484         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6485                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6486                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6487         }
6488         if (!gtp_v)
6489                 return;
6490         if (!gtp_m)
6491                 gtp_m = &rte_flow_item_gtp_mask;
6492         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6493         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6494                  gtp_v->msg_type & gtp_m->msg_type);
6495         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6496                  rte_be_to_cpu_32(gtp_m->teid));
6497         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6498                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6499 }
6500
6501 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6502
6503 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6504         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6505                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6506
6507 /**
6508  * Calculate flow matcher enable bitmap.
6509  *
6510  * @param match_criteria
6511  *   Pointer to flow matcher criteria.
6512  *
6513  * @return
6514  *   Bitmap of enabled fields.
6515  */
6516 static uint8_t
6517 flow_dv_matcher_enable(uint32_t *match_criteria)
6518 {
6519         uint8_t match_criteria_enable;
6520
6521         match_criteria_enable =
6522                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6523                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6524         match_criteria_enable |=
6525                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6526                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6527         match_criteria_enable |=
6528                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6529                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6530         match_criteria_enable |=
6531                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6532                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6533         match_criteria_enable |=
6534                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6535                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6536         return match_criteria_enable;
6537 }
6538
6539
6540 /**
6541  * Get a flow table.
6542  *
6543  * @param[in, out] dev
6544  *   Pointer to rte_eth_dev structure.
6545  * @param[in] table_id
6546  *   Table id to use.
6547  * @param[in] egress
6548  *   Direction of the table.
6549  * @param[in] transfer
6550  *   E-Switch or NIC flow.
6551  * @param[out] error
6552  *   pointer to error structure.
6553  *
6554  * @return
6555  *   Returns tables resource based on the index, NULL in case of failed.
6556  */
6557 static struct mlx5_flow_tbl_resource *
6558 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6559                          uint32_t table_id, uint8_t egress,
6560                          uint8_t transfer,
6561                          struct rte_flow_error *error)
6562 {
6563         struct mlx5_priv *priv = dev->data->dev_private;
6564         struct mlx5_ibv_shared *sh = priv->sh;
6565         struct mlx5_flow_tbl_resource *tbl;
6566         union mlx5_flow_tbl_key table_key = {
6567                 {
6568                         .table_id = table_id,
6569                         .reserved = 0,
6570                         .domain = !!transfer,
6571                         .direction = !!egress,
6572                 }
6573         };
6574         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6575                                                          table_key.v64);
6576         struct mlx5_flow_tbl_data_entry *tbl_data;
6577         int ret;
6578         void *domain;
6579
6580         if (pos) {
6581                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6582                                         entry);
6583                 tbl = &tbl_data->tbl;
6584                 rte_atomic32_inc(&tbl->refcnt);
6585                 return tbl;
6586         }
6587         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6588         if (!tbl_data) {
6589                 rte_flow_error_set(error, ENOMEM,
6590                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6591                                    NULL,
6592                                    "cannot allocate flow table data entry");
6593                 return NULL;
6594         }
6595         tbl = &tbl_data->tbl;
6596         pos = &tbl_data->entry;
6597         if (transfer)
6598                 domain = sh->fdb_domain;
6599         else if (egress)
6600                 domain = sh->tx_domain;
6601         else
6602                 domain = sh->rx_domain;
6603         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6604         if (!tbl->obj) {
6605                 rte_flow_error_set(error, ENOMEM,
6606                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6607                                    NULL, "cannot create flow table object");
6608                 rte_free(tbl_data);
6609                 return NULL;
6610         }
6611         /*
6612          * No multi-threads now, but still better to initialize the reference
6613          * count before insert it into the hash list.
6614          */
6615         rte_atomic32_init(&tbl->refcnt);
6616         /* Jump action reference count is initialized here. */
6617         rte_atomic32_init(&tbl_data->jump.refcnt);
6618         pos->key = table_key.v64;
6619         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6620         if (ret < 0) {
6621                 rte_flow_error_set(error, -ret,
6622                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6623                                    "cannot insert flow table data entry");
6624                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6625                 rte_free(tbl_data);
6626         }
6627         rte_atomic32_inc(&tbl->refcnt);
6628         return tbl;
6629 }
6630
6631 /**
6632  * Release a flow table.
6633  *
6634  * @param[in] dev
6635  *   Pointer to rte_eth_dev structure.
6636  * @param[in] tbl
6637  *   Table resource to be released.
6638  *
6639  * @return
6640  *   Returns 0 if table was released, else return 1;
6641  */
6642 static int
6643 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6644                              struct mlx5_flow_tbl_resource *tbl)
6645 {
6646         struct mlx5_priv *priv = dev->data->dev_private;
6647         struct mlx5_ibv_shared *sh = priv->sh;
6648         struct mlx5_flow_tbl_data_entry *tbl_data =
6649                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6650
6651         if (!tbl)
6652                 return 0;
6653         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6654                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6655
6656                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6657                 tbl->obj = NULL;
6658                 /* remove the entry from the hash list and free memory. */
6659                 mlx5_hlist_remove(sh->flow_tbls, pos);
6660                 rte_free(tbl_data);
6661                 return 0;
6662         }
6663         return 1;
6664 }
6665
6666 /**
6667  * Register the flow matcher.
6668  *
6669  * @param[in, out] dev
6670  *   Pointer to rte_eth_dev structure.
6671  * @param[in, out] matcher
6672  *   Pointer to flow matcher.
6673  * @param[in, out] key
6674  *   Pointer to flow table key.
6675  * @parm[in, out] dev_flow
6676  *   Pointer to the dev_flow.
6677  * @param[out] error
6678  *   pointer to error structure.
6679  *
6680  * @return
6681  *   0 on success otherwise -errno and errno is set.
6682  */
6683 static int
6684 flow_dv_matcher_register(struct rte_eth_dev *dev,
6685                          struct mlx5_flow_dv_matcher *matcher,
6686                          union mlx5_flow_tbl_key *key,
6687                          struct mlx5_flow *dev_flow,
6688                          struct rte_flow_error *error)
6689 {
6690         struct mlx5_priv *priv = dev->data->dev_private;
6691         struct mlx5_ibv_shared *sh = priv->sh;
6692         struct mlx5_flow_dv_matcher *cache_matcher;
6693         struct mlx5dv_flow_matcher_attr dv_attr = {
6694                 .type = IBV_FLOW_ATTR_NORMAL,
6695                 .match_mask = (void *)&matcher->mask,
6696         };
6697         struct mlx5_flow_tbl_resource *tbl;
6698         struct mlx5_flow_tbl_data_entry *tbl_data;
6699
6700         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6701                                        key->domain, error);
6702         if (!tbl)
6703                 return -rte_errno;      /* No need to refill the error info */
6704         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6705         /* Lookup from cache. */
6706         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6707                 if (matcher->crc == cache_matcher->crc &&
6708                     matcher->priority == cache_matcher->priority &&
6709                     !memcmp((const void *)matcher->mask.buf,
6710                             (const void *)cache_matcher->mask.buf,
6711                             cache_matcher->mask.size)) {
6712                         DRV_LOG(DEBUG,
6713                                 "%s group %u priority %hd use %s "
6714                                 "matcher %p: refcnt %d++",
6715                                 key->domain ? "FDB" : "NIC", key->table_id,
6716                                 cache_matcher->priority,
6717                                 key->direction ? "tx" : "rx",
6718                                 (void *)cache_matcher,
6719                                 rte_atomic32_read(&cache_matcher->refcnt));
6720                         rte_atomic32_inc(&cache_matcher->refcnt);
6721                         dev_flow->dv.matcher = cache_matcher;
6722                         /* old matcher should not make the table ref++. */
6723                         flow_dv_tbl_resource_release(dev, tbl);
6724                         return 0;
6725                 }
6726         }
6727         /* Register new matcher. */
6728         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6729         if (!cache_matcher) {
6730                 flow_dv_tbl_resource_release(dev, tbl);
6731                 return rte_flow_error_set(error, ENOMEM,
6732                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6733                                           "cannot allocate matcher memory");
6734         }
6735         *cache_matcher = *matcher;
6736         dv_attr.match_criteria_enable =
6737                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6738         dv_attr.priority = matcher->priority;
6739         if (key->direction)
6740                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6741         cache_matcher->matcher_object =
6742                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6743         if (!cache_matcher->matcher_object) {
6744                 rte_free(cache_matcher);
6745 #ifdef HAVE_MLX5DV_DR
6746                 flow_dv_tbl_resource_release(dev, tbl);
6747 #endif
6748                 return rte_flow_error_set(error, ENOMEM,
6749                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6750                                           NULL, "cannot create matcher");
6751         }
6752         /* Save the table information */
6753         cache_matcher->tbl = tbl;
6754         rte_atomic32_init(&cache_matcher->refcnt);
6755         /* only matcher ref++, table ref++ already done above in get API. */
6756         rte_atomic32_inc(&cache_matcher->refcnt);
6757         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6758         dev_flow->dv.matcher = cache_matcher;
6759         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6760                 key->domain ? "FDB" : "NIC", key->table_id,
6761                 cache_matcher->priority,
6762                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6763                 rte_atomic32_read(&cache_matcher->refcnt));
6764         return 0;
6765 }
6766
6767 /**
6768  * Find existing tag resource or create and register a new one.
6769  *
6770  * @param dev[in, out]
6771  *   Pointer to rte_eth_dev structure.
6772  * @param[in, out] tag_be24
6773  *   Tag value in big endian then R-shift 8.
6774  * @parm[in, out] dev_flow
6775  *   Pointer to the dev_flow.
6776  * @param[out] error
6777  *   pointer to error structure.
6778  *
6779  * @return
6780  *   0 on success otherwise -errno and errno is set.
6781  */
6782 static int
6783 flow_dv_tag_resource_register
6784                         (struct rte_eth_dev *dev,
6785                          uint32_t tag_be24,
6786                          struct mlx5_flow *dev_flow,
6787                          struct rte_flow_error *error)
6788 {
6789         struct mlx5_priv *priv = dev->data->dev_private;
6790         struct mlx5_ibv_shared *sh = priv->sh;
6791         struct mlx5_flow_dv_tag_resource *cache_resource;
6792         struct mlx5_hlist_entry *entry;
6793
6794         /* Lookup a matching resource from cache. */
6795         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6796         if (entry) {
6797                 cache_resource = container_of
6798                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6799                 rte_atomic32_inc(&cache_resource->refcnt);
6800                 dev_flow->dv.tag_resource = cache_resource;
6801                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6802                         (void *)cache_resource,
6803                         rte_atomic32_read(&cache_resource->refcnt));
6804                 return 0;
6805         }
6806         /* Register new resource. */
6807         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6808         if (!cache_resource)
6809                 return rte_flow_error_set(error, ENOMEM,
6810                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6811                                           "cannot allocate resource memory");
6812         cache_resource->entry.key = (uint64_t)tag_be24;
6813         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6814         if (!cache_resource->action) {
6815                 rte_free(cache_resource);
6816                 return rte_flow_error_set(error, ENOMEM,
6817                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6818                                           NULL, "cannot create action");
6819         }
6820         rte_atomic32_init(&cache_resource->refcnt);
6821         rte_atomic32_inc(&cache_resource->refcnt);
6822         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6823                 mlx5_glue->destroy_flow_action(cache_resource->action);
6824                 rte_free(cache_resource);
6825                 return rte_flow_error_set(error, EEXIST,
6826                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6827                                           NULL, "cannot insert tag");
6828         }
6829         dev_flow->dv.tag_resource = cache_resource;
6830         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6831                 (void *)cache_resource,
6832                 rte_atomic32_read(&cache_resource->refcnt));
6833         return 0;
6834 }
6835
6836 /**
6837  * Release the tag.
6838  *
6839  * @param dev
6840  *   Pointer to Ethernet device.
6841  * @param flow
6842  *   Pointer to mlx5_flow.
6843  *
6844  * @return
6845  *   1 while a reference on it exists, 0 when freed.
6846  */
6847 static int
6848 flow_dv_tag_release(struct rte_eth_dev *dev,
6849                     struct mlx5_flow_dv_tag_resource *tag)
6850 {
6851         struct mlx5_priv *priv = dev->data->dev_private;
6852         struct mlx5_ibv_shared *sh = priv->sh;
6853
6854         MLX5_ASSERT(tag);
6855         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6856                 dev->data->port_id, (void *)tag,
6857                 rte_atomic32_read(&tag->refcnt));
6858         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6859                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6860                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6861                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6862                         dev->data->port_id, (void *)tag);
6863                 rte_free(tag);
6864                 return 0;
6865         }
6866         return 1;
6867 }
6868
6869 /**
6870  * Translate port ID action to vport.
6871  *
6872  * @param[in] dev
6873  *   Pointer to rte_eth_dev structure.
6874  * @param[in] action
6875  *   Pointer to the port ID action.
6876  * @param[out] dst_port_id
6877  *   The target port ID.
6878  * @param[out] error
6879  *   Pointer to the error structure.
6880  *
6881  * @return
6882  *   0 on success, a negative errno value otherwise and rte_errno is set.
6883  */
6884 static int
6885 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6886                                  const struct rte_flow_action *action,
6887                                  uint32_t *dst_port_id,
6888                                  struct rte_flow_error *error)
6889 {
6890         uint32_t port;
6891         struct mlx5_priv *priv;
6892         const struct rte_flow_action_port_id *conf =
6893                         (const struct rte_flow_action_port_id *)action->conf;
6894
6895         port = conf->original ? dev->data->port_id : conf->id;
6896         priv = mlx5_port_to_eswitch_info(port, false);
6897         if (!priv)
6898                 return rte_flow_error_set(error, -rte_errno,
6899                                           RTE_FLOW_ERROR_TYPE_ACTION,
6900                                           NULL,
6901                                           "No eswitch info was found for port");
6902 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6903         /*
6904          * This parameter is transferred to
6905          * mlx5dv_dr_action_create_dest_ib_port().
6906          */
6907         *dst_port_id = priv->ibv_port;
6908 #else
6909         /*
6910          * Legacy mode, no LAG configurations is supported.
6911          * This parameter is transferred to
6912          * mlx5dv_dr_action_create_dest_vport().
6913          */
6914         *dst_port_id = priv->vport_id;
6915 #endif
6916         return 0;
6917 }
6918
6919 /**
6920  * Add Tx queue matcher
6921  *
6922  * @param[in] dev
6923  *   Pointer to the dev struct.
6924  * @param[in, out] matcher
6925  *   Flow matcher.
6926  * @param[in, out] key
6927  *   Flow matcher value.
6928  * @param[in] item
6929  *   Flow pattern to translate.
6930  * @param[in] inner
6931  *   Item is inner pattern.
6932  */
6933 static void
6934 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6935                                 void *matcher, void *key,
6936                                 const struct rte_flow_item *item)
6937 {
6938         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6939         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6940         void *misc_m =
6941                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6942         void *misc_v =
6943                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6944         struct mlx5_txq_ctrl *txq;
6945         uint32_t queue;
6946
6947
6948         queue_m = (const void *)item->mask;
6949         if (!queue_m)
6950                 return;
6951         queue_v = (const void *)item->spec;
6952         if (!queue_v)
6953                 return;
6954         txq = mlx5_txq_get(dev, queue_v->queue);
6955         if (!txq)
6956                 return;
6957         queue = txq->obj->sq->id;
6958         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6959         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6960                  queue & queue_m->queue);
6961         mlx5_txq_release(dev, queue_v->queue);
6962 }
6963
6964 /**
6965  * Set the hash fields according to the @p flow information.
6966  *
6967  * @param[in] dev_flow
6968  *   Pointer to the mlx5_flow.
6969  */
6970 static void
6971 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6972 {
6973         struct rte_flow *flow = dev_flow->flow;
6974         uint64_t items = dev_flow->layers;
6975         int rss_inner = 0;
6976         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6977
6978         dev_flow->hash_fields = 0;
6979 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6980         if (flow->rss.level >= 2) {
6981                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6982                 rss_inner = 1;
6983         }
6984 #endif
6985         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6986             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6987                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6988                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6989                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6990                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6991                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6992                         else
6993                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6994                 }
6995         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6996                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6997                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6998                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6999                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
7000                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7001                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
7002                         else
7003                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
7004                 }
7005         }
7006         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
7007             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
7008                 if (rss_types & ETH_RSS_UDP) {
7009                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7010                                 dev_flow->hash_fields |=
7011                                                 IBV_RX_HASH_SRC_PORT_UDP;
7012                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7013                                 dev_flow->hash_fields |=
7014                                                 IBV_RX_HASH_DST_PORT_UDP;
7015                         else
7016                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
7017                 }
7018         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
7019                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
7020                 if (rss_types & ETH_RSS_TCP) {
7021                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7022                                 dev_flow->hash_fields |=
7023                                                 IBV_RX_HASH_SRC_PORT_TCP;
7024                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7025                                 dev_flow->hash_fields |=
7026                                                 IBV_RX_HASH_DST_PORT_TCP;
7027                         else
7028                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
7029                 }
7030         }
7031 }
7032
7033 /**
7034  * Fill the flow with DV spec, lock free
7035  * (mutex should be acquired by caller).
7036  *
7037  * @param[in] dev
7038  *   Pointer to rte_eth_dev structure.
7039  * @param[in, out] dev_flow
7040  *   Pointer to the sub flow.
7041  * @param[in] attr
7042  *   Pointer to the flow attributes.
7043  * @param[in] items
7044  *   Pointer to the list of items.
7045  * @param[in] actions
7046  *   Pointer to the list of actions.
7047  * @param[out] error
7048  *   Pointer to the error structure.
7049  *
7050  * @return
7051  *   0 on success, a negative errno value otherwise and rte_errno is set.
7052  */
7053 static int
7054 __flow_dv_translate(struct rte_eth_dev *dev,
7055                     struct mlx5_flow *dev_flow,
7056                     const struct rte_flow_attr *attr,
7057                     const struct rte_flow_item items[],
7058                     const struct rte_flow_action actions[],
7059                     struct rte_flow_error *error)
7060 {
7061         struct mlx5_priv *priv = dev->data->dev_private;
7062         struct mlx5_dev_config *dev_conf = &priv->config;
7063         struct rte_flow *flow = dev_flow->flow;
7064         uint64_t item_flags = 0;
7065         uint64_t last_item = 0;
7066         uint64_t action_flags = 0;
7067         uint64_t priority = attr->priority;
7068         struct mlx5_flow_dv_matcher matcher = {
7069                 .mask = {
7070                         .size = sizeof(matcher.mask.buf),
7071                 },
7072         };
7073         int actions_n = 0;
7074         bool actions_end = false;
7075         union {
7076                 struct mlx5_flow_dv_modify_hdr_resource res;
7077                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7078                             sizeof(struct mlx5_modification_cmd) *
7079                             (MLX5_MAX_MODIFY_NUM + 1)];
7080         } mhdr_dummy;
7081         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7082         union flow_dv_attr flow_attr = { .attr = 0 };
7083         uint32_t tag_be;
7084         union mlx5_flow_tbl_key tbl_key;
7085         uint32_t modify_action_position = UINT32_MAX;
7086         void *match_mask = matcher.mask.buf;
7087         void *match_value = dev_flow->dv.value.buf;
7088         uint8_t next_protocol = 0xff;
7089         struct rte_vlan_hdr vlan = { 0 };
7090         uint32_t table;
7091         int ret = 0;
7092
7093         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7094                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7095         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7096                                        !!priv->fdb_def_rule, &table, error);
7097         if (ret)
7098                 return ret;
7099         dev_flow->group = table;
7100         if (attr->transfer)
7101                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7102         if (priority == MLX5_FLOW_PRIO_RSVD)
7103                 priority = dev_conf->flow_prio - 1;
7104         /* number of actions must be set to 0 in case of dirty stack. */
7105         mhdr_res->actions_num = 0;
7106         for (; !actions_end ; actions++) {
7107                 const struct rte_flow_action_queue *queue;
7108                 const struct rte_flow_action_rss *rss;
7109                 const struct rte_flow_action *action = actions;
7110                 const struct rte_flow_action_count *count = action->conf;
7111                 const uint8_t *rss_key;
7112                 const struct rte_flow_action_jump *jump_data;
7113                 const struct rte_flow_action_meter *mtr;
7114                 struct mlx5_flow_tbl_resource *tbl;
7115                 uint32_t port_id = 0;
7116                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7117                 int action_type = actions->type;
7118                 const struct rte_flow_action *found_action = NULL;
7119
7120                 switch (action_type) {
7121                 case RTE_FLOW_ACTION_TYPE_VOID:
7122                         break;
7123                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7124                         if (flow_dv_translate_action_port_id(dev, action,
7125                                                              &port_id, error))
7126                                 return -rte_errno;
7127                         port_id_resource.port_id = port_id;
7128                         if (flow_dv_port_id_action_resource_register
7129                             (dev, &port_id_resource, dev_flow, error))
7130                                 return -rte_errno;
7131                         dev_flow->dv.actions[actions_n++] =
7132                                 dev_flow->dv.port_id_action->action;
7133                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7134                         break;
7135                 case RTE_FLOW_ACTION_TYPE_FLAG:
7136                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7137                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7138                                 struct rte_flow_action_mark mark = {
7139                                         .id = MLX5_FLOW_MARK_DEFAULT,
7140                                 };
7141
7142                                 if (flow_dv_convert_action_mark(dev, &mark,
7143                                                                 mhdr_res,
7144                                                                 error))
7145                                         return -rte_errno;
7146                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7147                                 break;
7148                         }
7149                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7150                         if (!dev_flow->dv.tag_resource)
7151                                 if (flow_dv_tag_resource_register
7152                                     (dev, tag_be, dev_flow, error))
7153                                         return -rte_errno;
7154                         dev_flow->dv.actions[actions_n++] =
7155                                 dev_flow->dv.tag_resource->action;
7156                         break;
7157                 case RTE_FLOW_ACTION_TYPE_MARK:
7158                         action_flags |= MLX5_FLOW_ACTION_MARK;
7159                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7160                                 const struct rte_flow_action_mark *mark =
7161                                         (const struct rte_flow_action_mark *)
7162                                                 actions->conf;
7163
7164                                 if (flow_dv_convert_action_mark(dev, mark,
7165                                                                 mhdr_res,
7166                                                                 error))
7167                                         return -rte_errno;
7168                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7169                                 break;
7170                         }
7171                         /* Fall-through */
7172                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7173                         /* Legacy (non-extensive) MARK action. */
7174                         tag_be = mlx5_flow_mark_set
7175                               (((const struct rte_flow_action_mark *)
7176                                (actions->conf))->id);
7177                         if (!dev_flow->dv.tag_resource)
7178                                 if (flow_dv_tag_resource_register
7179                                     (dev, tag_be, dev_flow, error))
7180                                         return -rte_errno;
7181                         dev_flow->dv.actions[actions_n++] =
7182                                 dev_flow->dv.tag_resource->action;
7183                         break;
7184                 case RTE_FLOW_ACTION_TYPE_SET_META:
7185                         if (flow_dv_convert_action_set_meta
7186                                 (dev, mhdr_res, attr,
7187                                  (const struct rte_flow_action_set_meta *)
7188                                   actions->conf, error))
7189                                 return -rte_errno;
7190                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7191                         break;
7192                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7193                         if (flow_dv_convert_action_set_tag
7194                                 (dev, mhdr_res,
7195                                  (const struct rte_flow_action_set_tag *)
7196                                   actions->conf, error))
7197                                 return -rte_errno;
7198                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7199                         break;
7200                 case RTE_FLOW_ACTION_TYPE_DROP:
7201                         action_flags |= MLX5_FLOW_ACTION_DROP;
7202                         break;
7203                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7204                         MLX5_ASSERT(flow->rss.queue);
7205                         queue = actions->conf;
7206                         flow->rss.queue_num = 1;
7207                         (*flow->rss.queue)[0] = queue->index;
7208                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7209                         break;
7210                 case RTE_FLOW_ACTION_TYPE_RSS:
7211                         MLX5_ASSERT(flow->rss.queue);
7212                         rss = actions->conf;
7213                         if (flow->rss.queue)
7214                                 memcpy((*flow->rss.queue), rss->queue,
7215                                        rss->queue_num * sizeof(uint16_t));
7216                         flow->rss.queue_num = rss->queue_num;
7217                         /* NULL RSS key indicates default RSS key. */
7218                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7219                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7220                         /*
7221                          * rss->level and rss.types should be set in advance
7222                          * when expanding items for RSS.
7223                          */
7224                         action_flags |= MLX5_FLOW_ACTION_RSS;
7225                         break;
7226                 case RTE_FLOW_ACTION_TYPE_COUNT:
7227                         if (!dev_conf->devx) {
7228                                 rte_errno = ENOTSUP;
7229                                 goto cnt_err;
7230                         }
7231                         flow->counter = flow_dv_counter_alloc(dev,
7232                                                               count->shared,
7233                                                               count->id,
7234                                                               dev_flow->group);
7235                         if (flow->counter == NULL)
7236                                 goto cnt_err;
7237                         dev_flow->dv.actions[actions_n++] =
7238                                 flow->counter->action;
7239                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7240                         break;
7241 cnt_err:
7242                         if (rte_errno == ENOTSUP)
7243                                 return rte_flow_error_set
7244                                               (error, ENOTSUP,
7245                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7246                                                NULL,
7247                                                "count action not supported");
7248                         else
7249                                 return rte_flow_error_set
7250                                                 (error, rte_errno,
7251                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7252                                                  action,
7253                                                  "cannot create counter"
7254                                                   " object.");
7255                         break;
7256                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7257                         dev_flow->dv.actions[actions_n++] =
7258                                                 priv->sh->pop_vlan_action;
7259                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7260                         break;
7261                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7262                         flow_dev_get_vlan_info_from_items(items, &vlan);
7263                         vlan.eth_proto = rte_be_to_cpu_16
7264                              ((((const struct rte_flow_action_of_push_vlan *)
7265                                                    actions->conf)->ethertype));
7266                         found_action = mlx5_flow_find_action
7267                                         (actions + 1,
7268                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7269                         if (found_action)
7270                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7271                         found_action = mlx5_flow_find_action
7272                                         (actions + 1,
7273                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7274                         if (found_action)
7275                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7276                         if (flow_dv_create_action_push_vlan
7277                                             (dev, attr, &vlan, dev_flow, error))
7278                                 return -rte_errno;
7279                         dev_flow->dv.actions[actions_n++] =
7280                                            dev_flow->dv.push_vlan_res->action;
7281                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7282                         break;
7283                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7284                         /* of_vlan_push action handled this action */
7285                         MLX5_ASSERT(action_flags &
7286                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7287                         break;
7288                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7289                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7290                                 break;
7291                         flow_dev_get_vlan_info_from_items(items, &vlan);
7292                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7293                         /* If no VLAN push - this is a modify header action */
7294                         if (flow_dv_convert_action_modify_vlan_vid
7295                                                 (mhdr_res, actions, error))
7296                                 return -rte_errno;
7297                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7298                         break;
7299                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7300                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7301                         if (flow_dv_create_action_l2_encap(dev, actions,
7302                                                            dev_flow,
7303                                                            attr->transfer,
7304                                                            error))
7305                                 return -rte_errno;
7306                         dev_flow->dv.actions[actions_n++] =
7307                                 dev_flow->dv.encap_decap->verbs_action;
7308                         action_flags |= actions->type ==
7309                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
7310                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
7311                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
7312                         break;
7313                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7314                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7315                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7316                                                            attr->transfer,
7317                                                            error))
7318                                 return -rte_errno;
7319                         dev_flow->dv.actions[actions_n++] =
7320                                 dev_flow->dv.encap_decap->verbs_action;
7321                         action_flags |= actions->type ==
7322                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
7323                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
7324                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
7325                         break;
7326                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7327                         /* Handle encap with preceding decap. */
7328                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
7329                                 if (flow_dv_create_action_raw_encap
7330                                         (dev, actions, dev_flow, attr, error))
7331                                         return -rte_errno;
7332                                 dev_flow->dv.actions[actions_n++] =
7333                                         dev_flow->dv.encap_decap->verbs_action;
7334                         } else {
7335                                 /* Handle encap without preceding decap. */
7336                                 if (flow_dv_create_action_l2_encap
7337                                     (dev, actions, dev_flow, attr->transfer,
7338                                      error))
7339                                         return -rte_errno;
7340                                 dev_flow->dv.actions[actions_n++] =
7341                                         dev_flow->dv.encap_decap->verbs_action;
7342                         }
7343                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
7344                         break;
7345                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7346                         /* Check if this decap is followed by encap. */
7347                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
7348                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
7349                                action++) {
7350                         }
7351                         /* Handle decap only if it isn't followed by encap. */
7352                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7353                                 if (flow_dv_create_action_l2_decap
7354                                     (dev, dev_flow, attr->transfer, error))
7355                                         return -rte_errno;
7356                                 dev_flow->dv.actions[actions_n++] =
7357                                         dev_flow->dv.encap_decap->verbs_action;
7358                         }
7359                         /* If decap is followed by encap, handle it at encap. */
7360                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
7361                         break;
7362                 case RTE_FLOW_ACTION_TYPE_JUMP:
7363                         jump_data = action->conf;
7364                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7365                                                        jump_data->group,
7366                                                        !!priv->fdb_def_rule,
7367                                                        &table, error);
7368                         if (ret)
7369                                 return ret;
7370                         tbl = flow_dv_tbl_resource_get(dev, table,
7371                                                        attr->egress,
7372                                                        attr->transfer, error);
7373                         if (!tbl)
7374                                 return rte_flow_error_set
7375                                                 (error, errno,
7376                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7377                                                  NULL,
7378                                                  "cannot create jump action.");
7379                         if (flow_dv_jump_tbl_resource_register
7380                             (dev, tbl, dev_flow, error)) {
7381                                 flow_dv_tbl_resource_release(dev, tbl);
7382                                 return rte_flow_error_set
7383                                                 (error, errno,
7384                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7385                                                  NULL,
7386                                                  "cannot create jump action.");
7387                         }
7388                         dev_flow->dv.actions[actions_n++] =
7389                                 dev_flow->dv.jump->action;
7390                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7391                         break;
7392                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7393                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7394                         if (flow_dv_convert_action_modify_mac
7395                                         (mhdr_res, actions, error))
7396                                 return -rte_errno;
7397                         action_flags |= actions->type ==
7398                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7399                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7400                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7401                         break;
7402                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7403                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7404                         if (flow_dv_convert_action_modify_ipv4
7405                                         (mhdr_res, actions, error))
7406                                 return -rte_errno;
7407                         action_flags |= actions->type ==
7408                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7409                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7410                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7411                         break;
7412                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7413                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7414                         if (flow_dv_convert_action_modify_ipv6
7415                                         (mhdr_res, actions, error))
7416                                 return -rte_errno;
7417                         action_flags |= actions->type ==
7418                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7419                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7420                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7421                         break;
7422                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7423                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7424                         if (flow_dv_convert_action_modify_tp
7425                                         (mhdr_res, actions, items,
7426                                          &flow_attr, error))
7427                                 return -rte_errno;
7428                         action_flags |= actions->type ==
7429                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7430                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7431                                         MLX5_FLOW_ACTION_SET_TP_DST;
7432                         break;
7433                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7434                         if (flow_dv_convert_action_modify_dec_ttl
7435                                         (mhdr_res, items, &flow_attr, error))
7436                                 return -rte_errno;
7437                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7438                         break;
7439                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7440                         if (flow_dv_convert_action_modify_ttl
7441                                         (mhdr_res, actions, items,
7442                                          &flow_attr, error))
7443                                 return -rte_errno;
7444                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7445                         break;
7446                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7447                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7448                         if (flow_dv_convert_action_modify_tcp_seq
7449                                         (mhdr_res, actions, error))
7450                                 return -rte_errno;
7451                         action_flags |= actions->type ==
7452                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7453                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7454                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7455                         break;
7456
7457                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7458                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7459                         if (flow_dv_convert_action_modify_tcp_ack
7460                                         (mhdr_res, actions, error))
7461                                 return -rte_errno;
7462                         action_flags |= actions->type ==
7463                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7464                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7465                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7466                         break;
7467                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7468                         if (flow_dv_convert_action_set_reg
7469                                         (mhdr_res, actions, error))
7470                                 return -rte_errno;
7471                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7472                         break;
7473                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7474                         if (flow_dv_convert_action_copy_mreg
7475                                         (dev, mhdr_res, actions, error))
7476                                 return -rte_errno;
7477                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7478                         break;
7479                 case RTE_FLOW_ACTION_TYPE_METER:
7480                         mtr = actions->conf;
7481                         if (!flow->meter) {
7482                                 flow->meter = mlx5_flow_meter_attach(priv,
7483                                                         mtr->mtr_id, attr,
7484                                                         error);
7485                                 if (!flow->meter)
7486                                         return rte_flow_error_set(error,
7487                                                 rte_errno,
7488                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7489                                                 NULL,
7490                                                 "meter not found "
7491                                                 "or invalid parameters");
7492                         }
7493                         /* Set the meter action. */
7494                         dev_flow->dv.actions[actions_n++] =
7495                                 flow->meter->mfts->meter_action;
7496                         action_flags |= MLX5_FLOW_ACTION_METER;
7497                         break;
7498                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7499                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7500                                                               actions, error))
7501                                 return -rte_errno;
7502                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7503                         break;
7504                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7505                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7506                                                               actions, error))
7507                                 return -rte_errno;
7508                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7509                         break;
7510                 case RTE_FLOW_ACTION_TYPE_END:
7511                         actions_end = true;
7512                         if (mhdr_res->actions_num) {
7513                                 /* create modify action if needed. */
7514                                 if (flow_dv_modify_hdr_resource_register
7515                                         (dev, mhdr_res, dev_flow, error))
7516                                         return -rte_errno;
7517                                 dev_flow->dv.actions[modify_action_position] =
7518                                         dev_flow->dv.modify_hdr->verbs_action;
7519                         }
7520                         break;
7521                 default:
7522                         break;
7523                 }
7524                 if (mhdr_res->actions_num &&
7525                     modify_action_position == UINT32_MAX)
7526                         modify_action_position = actions_n++;
7527         }
7528         dev_flow->dv.actions_n = actions_n;
7529         dev_flow->actions = action_flags;
7530         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7531                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7532                 int item_type = items->type;
7533
7534                 switch (item_type) {
7535                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7536                         flow_dv_translate_item_port_id(dev, match_mask,
7537                                                        match_value, items);
7538                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7539                         break;
7540                 case RTE_FLOW_ITEM_TYPE_ETH:
7541                         flow_dv_translate_item_eth(match_mask, match_value,
7542                                                    items, tunnel);
7543                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7544                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7545                                              MLX5_FLOW_LAYER_OUTER_L2;
7546                         break;
7547                 case RTE_FLOW_ITEM_TYPE_VLAN:
7548                         flow_dv_translate_item_vlan(dev_flow,
7549                                                     match_mask, match_value,
7550                                                     items, tunnel);
7551                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7552                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7553                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7554                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7555                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7556                         break;
7557                 case RTE_FLOW_ITEM_TYPE_IPV4:
7558                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7559                                                   &item_flags, &tunnel);
7560                         flow_dv_translate_item_ipv4(match_mask, match_value,
7561                                                     items, tunnel,
7562                                                     dev_flow->group);
7563                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7564                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7565                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7566                         if (items->mask != NULL &&
7567                             ((const struct rte_flow_item_ipv4 *)
7568                              items->mask)->hdr.next_proto_id) {
7569                                 next_protocol =
7570                                         ((const struct rte_flow_item_ipv4 *)
7571                                          (items->spec))->hdr.next_proto_id;
7572                                 next_protocol &=
7573                                         ((const struct rte_flow_item_ipv4 *)
7574                                          (items->mask))->hdr.next_proto_id;
7575                         } else {
7576                                 /* Reset for inner layer. */
7577                                 next_protocol = 0xff;
7578                         }
7579                         break;
7580                 case RTE_FLOW_ITEM_TYPE_IPV6:
7581                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7582                                                   &item_flags, &tunnel);
7583                         flow_dv_translate_item_ipv6(match_mask, match_value,
7584                                                     items, tunnel,
7585                                                     dev_flow->group);
7586                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7587                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7588                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7589                         if (items->mask != NULL &&
7590                             ((const struct rte_flow_item_ipv6 *)
7591                              items->mask)->hdr.proto) {
7592                                 next_protocol =
7593                                         ((const struct rte_flow_item_ipv6 *)
7594                                          items->spec)->hdr.proto;
7595                                 next_protocol &=
7596                                         ((const struct rte_flow_item_ipv6 *)
7597                                          items->mask)->hdr.proto;
7598                         } else {
7599                                 /* Reset for inner layer. */
7600                                 next_protocol = 0xff;
7601                         }
7602                         break;
7603                 case RTE_FLOW_ITEM_TYPE_TCP:
7604                         flow_dv_translate_item_tcp(match_mask, match_value,
7605                                                    items, tunnel);
7606                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7607                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7608                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7609                         break;
7610                 case RTE_FLOW_ITEM_TYPE_UDP:
7611                         flow_dv_translate_item_udp(match_mask, match_value,
7612                                                    items, tunnel);
7613                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7614                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7615                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7616                         break;
7617                 case RTE_FLOW_ITEM_TYPE_GRE:
7618                         flow_dv_translate_item_gre(match_mask, match_value,
7619                                                    items, tunnel);
7620                         last_item = MLX5_FLOW_LAYER_GRE;
7621                         break;
7622                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7623                         flow_dv_translate_item_gre_key(match_mask,
7624                                                        match_value, items);
7625                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7626                         break;
7627                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7628                         flow_dv_translate_item_nvgre(match_mask, match_value,
7629                                                      items, tunnel);
7630                         last_item = MLX5_FLOW_LAYER_GRE;
7631                         break;
7632                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7633                         flow_dv_translate_item_vxlan(match_mask, match_value,
7634                                                      items, tunnel);
7635                         last_item = MLX5_FLOW_LAYER_VXLAN;
7636                         break;
7637                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7638                         flow_dv_translate_item_vxlan_gpe(match_mask,
7639                                                          match_value, items,
7640                                                          tunnel);
7641                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7642                         break;
7643                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7644                         flow_dv_translate_item_geneve(match_mask, match_value,
7645                                                       items, tunnel);
7646                         last_item = MLX5_FLOW_LAYER_GENEVE;
7647                         break;
7648                 case RTE_FLOW_ITEM_TYPE_MPLS:
7649                         flow_dv_translate_item_mpls(match_mask, match_value,
7650                                                     items, last_item, tunnel);
7651                         last_item = MLX5_FLOW_LAYER_MPLS;
7652                         break;
7653                 case RTE_FLOW_ITEM_TYPE_MARK:
7654                         flow_dv_translate_item_mark(dev, match_mask,
7655                                                     match_value, items);
7656                         last_item = MLX5_FLOW_ITEM_MARK;
7657                         break;
7658                 case RTE_FLOW_ITEM_TYPE_META:
7659                         flow_dv_translate_item_meta(dev, match_mask,
7660                                                     match_value, attr, items);
7661                         last_item = MLX5_FLOW_ITEM_METADATA;
7662                         break;
7663                 case RTE_FLOW_ITEM_TYPE_ICMP:
7664                         flow_dv_translate_item_icmp(match_mask, match_value,
7665                                                     items, tunnel);
7666                         last_item = MLX5_FLOW_LAYER_ICMP;
7667                         break;
7668                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7669                         flow_dv_translate_item_icmp6(match_mask, match_value,
7670                                                       items, tunnel);
7671                         last_item = MLX5_FLOW_LAYER_ICMP6;
7672                         break;
7673                 case RTE_FLOW_ITEM_TYPE_TAG:
7674                         flow_dv_translate_item_tag(dev, match_mask,
7675                                                    match_value, items);
7676                         last_item = MLX5_FLOW_ITEM_TAG;
7677                         break;
7678                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7679                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7680                                                         match_value, items);
7681                         last_item = MLX5_FLOW_ITEM_TAG;
7682                         break;
7683                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7684                         flow_dv_translate_item_tx_queue(dev, match_mask,
7685                                                         match_value,
7686                                                         items);
7687                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7688                         break;
7689                 case RTE_FLOW_ITEM_TYPE_GTP:
7690                         flow_dv_translate_item_gtp(match_mask, match_value,
7691                                                    items, tunnel);
7692                         last_item = MLX5_FLOW_LAYER_GTP;
7693                         break;
7694                 default:
7695                         break;
7696                 }
7697                 item_flags |= last_item;
7698         }
7699         /*
7700          * When E-Switch mode is enabled, we have two cases where we need to
7701          * set the source port manually.
7702          * The first one, is in case of Nic steering rule, and the second is
7703          * E-Switch rule where no port_id item was found. In both cases
7704          * the source port is set according the current port in use.
7705          */
7706         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
7707             (priv->representor || priv->master)) {
7708                 if (flow_dv_translate_item_port_id(dev, match_mask,
7709                                                    match_value, NULL))
7710                         return -rte_errno;
7711         }
7712 #ifdef RTE_LIBRTE_MLX5_DEBUG
7713         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
7714                                               dev_flow->dv.value.buf));
7715 #endif
7716         dev_flow->layers = item_flags;
7717         if (action_flags & MLX5_FLOW_ACTION_RSS)
7718                 flow_dv_hashfields_set(dev_flow);
7719         /* Register matcher. */
7720         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7721                                     matcher.mask.size);
7722         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7723                                                      matcher.priority);
7724         /* reserved field no needs to be set to 0 here. */
7725         tbl_key.domain = attr->transfer;
7726         tbl_key.direction = attr->egress;
7727         tbl_key.table_id = dev_flow->group;
7728         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7729                 return -rte_errno;
7730         return 0;
7731 }
7732
7733 /**
7734  * Apply the flow to the NIC, lock free,
7735  * (mutex should be acquired by caller).
7736  *
7737  * @param[in] dev
7738  *   Pointer to the Ethernet device structure.
7739  * @param[in, out] flow
7740  *   Pointer to flow structure.
7741  * @param[out] error
7742  *   Pointer to error structure.
7743  *
7744  * @return
7745  *   0 on success, a negative errno value otherwise and rte_errno is set.
7746  */
7747 static int
7748 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7749                 struct rte_flow_error *error)
7750 {
7751         struct mlx5_flow_dv *dv;
7752         struct mlx5_flow *dev_flow;
7753         struct mlx5_priv *priv = dev->data->dev_private;
7754         int n;
7755         int err;
7756
7757         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7758                 dv = &dev_flow->dv;
7759                 n = dv->actions_n;
7760                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7761                         if (dev_flow->transfer) {
7762                                 dv->actions[n++] = priv->sh->esw_drop_action;
7763                         } else {
7764                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7765                                 if (!dv->hrxq) {
7766                                         rte_flow_error_set
7767                                                 (error, errno,
7768                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7769                                                  NULL,
7770                                                  "cannot get drop hash queue");
7771                                         goto error;
7772                                 }
7773                                 dv->actions[n++] = dv->hrxq->action;
7774                         }
7775                 } else if (dev_flow->actions &
7776                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7777                         struct mlx5_hrxq *hrxq;
7778
7779                         MLX5_ASSERT(flow->rss.queue);
7780                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7781                                              MLX5_RSS_HASH_KEY_LEN,
7782                                              dev_flow->hash_fields,
7783                                              (*flow->rss.queue),
7784                                              flow->rss.queue_num);
7785                         if (!hrxq) {
7786                                 hrxq = mlx5_hrxq_new
7787                                         (dev, flow->rss.key,
7788                                          MLX5_RSS_HASH_KEY_LEN,
7789                                          dev_flow->hash_fields,
7790                                          (*flow->rss.queue),
7791                                          flow->rss.queue_num,
7792                                          !!(dev_flow->layers &
7793                                             MLX5_FLOW_LAYER_TUNNEL));
7794                         }
7795                         if (!hrxq) {
7796                                 rte_flow_error_set
7797                                         (error, rte_errno,
7798                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7799                                          "cannot get hash queue");
7800                                 goto error;
7801                         }
7802                         dv->hrxq = hrxq;
7803                         dv->actions[n++] = dv->hrxq->action;
7804                 }
7805                 dv->flow =
7806                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7807                                                   (void *)&dv->value, n,
7808                                                   dv->actions);
7809                 if (!dv->flow) {
7810                         rte_flow_error_set(error, errno,
7811                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7812                                            NULL,
7813                                            "hardware refuses to create flow");
7814                         goto error;
7815                 }
7816                 if (priv->vmwa_context &&
7817                     dev_flow->dv.vf_vlan.tag &&
7818                     !dev_flow->dv.vf_vlan.created) {
7819                         /*
7820                          * The rule contains the VLAN pattern.
7821                          * For VF we are going to create VLAN
7822                          * interface to make hypervisor set correct
7823                          * e-Switch vport context.
7824                          */
7825                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7826                 }
7827         }
7828         return 0;
7829 error:
7830         err = rte_errno; /* Save rte_errno before cleanup. */
7831         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7832                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7833                 if (dv->hrxq) {
7834                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7835                                 mlx5_hrxq_drop_release(dev);
7836                         else
7837                                 mlx5_hrxq_release(dev, dv->hrxq);
7838                         dv->hrxq = NULL;
7839                 }
7840                 if (dev_flow->dv.vf_vlan.tag &&
7841                     dev_flow->dv.vf_vlan.created)
7842                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7843         }
7844         rte_errno = err; /* Restore rte_errno. */
7845         return -rte_errno;
7846 }
7847
7848 /**
7849  * Release the flow matcher.
7850  *
7851  * @param dev
7852  *   Pointer to Ethernet device.
7853  * @param flow
7854  *   Pointer to mlx5_flow.
7855  *
7856  * @return
7857  *   1 while a reference on it exists, 0 when freed.
7858  */
7859 static int
7860 flow_dv_matcher_release(struct rte_eth_dev *dev,
7861                         struct mlx5_flow *flow)
7862 {
7863         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7864
7865         MLX5_ASSERT(matcher->matcher_object);
7866         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7867                 dev->data->port_id, (void *)matcher,
7868                 rte_atomic32_read(&matcher->refcnt));
7869         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7870                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7871                            (matcher->matcher_object));
7872                 LIST_REMOVE(matcher, next);
7873                 /* table ref-- in release interface. */
7874                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7875                 rte_free(matcher);
7876                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7877                         dev->data->port_id, (void *)matcher);
7878                 return 0;
7879         }
7880         return 1;
7881 }
7882
7883 /**
7884  * Release an encap/decap resource.
7885  *
7886  * @param flow
7887  *   Pointer to mlx5_flow.
7888  *
7889  * @return
7890  *   1 while a reference on it exists, 0 when freed.
7891  */
7892 static int
7893 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7894 {
7895         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7896                                                 flow->dv.encap_decap;
7897
7898         MLX5_ASSERT(cache_resource->verbs_action);
7899         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7900                 (void *)cache_resource,
7901                 rte_atomic32_read(&cache_resource->refcnt));
7902         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7903                 claim_zero(mlx5_glue->destroy_flow_action
7904                                 (cache_resource->verbs_action));
7905                 LIST_REMOVE(cache_resource, next);
7906                 rte_free(cache_resource);
7907                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7908                         (void *)cache_resource);
7909                 return 0;
7910         }
7911         return 1;
7912 }
7913
7914 /**
7915  * Release an jump to table action resource.
7916  *
7917  * @param dev
7918  *   Pointer to Ethernet device.
7919  * @param flow
7920  *   Pointer to mlx5_flow.
7921  *
7922  * @return
7923  *   1 while a reference on it exists, 0 when freed.
7924  */
7925 static int
7926 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7927                                   struct mlx5_flow *flow)
7928 {
7929         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7930         struct mlx5_flow_tbl_data_entry *tbl_data =
7931                         container_of(cache_resource,
7932                                      struct mlx5_flow_tbl_data_entry, jump);
7933
7934         MLX5_ASSERT(cache_resource->action);
7935         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7936                 (void *)cache_resource,
7937                 rte_atomic32_read(&cache_resource->refcnt));
7938         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7939                 claim_zero(mlx5_glue->destroy_flow_action
7940                                 (cache_resource->action));
7941                 /* jump action memory free is inside the table release. */
7942                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7943                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7944                         (void *)cache_resource);
7945                 return 0;
7946         }
7947         return 1;
7948 }
7949
7950 /**
7951  * Release a modify-header resource.
7952  *
7953  * @param flow
7954  *   Pointer to mlx5_flow.
7955  *
7956  * @return
7957  *   1 while a reference on it exists, 0 when freed.
7958  */
7959 static int
7960 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7961 {
7962         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7963                                                 flow->dv.modify_hdr;
7964
7965         MLX5_ASSERT(cache_resource->verbs_action);
7966         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7967                 (void *)cache_resource,
7968                 rte_atomic32_read(&cache_resource->refcnt));
7969         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7970                 claim_zero(mlx5_glue->destroy_flow_action
7971                                 (cache_resource->verbs_action));
7972                 LIST_REMOVE(cache_resource, next);
7973                 rte_free(cache_resource);
7974                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7975                         (void *)cache_resource);
7976                 return 0;
7977         }
7978         return 1;
7979 }
7980
7981 /**
7982  * Release port ID action resource.
7983  *
7984  * @param flow
7985  *   Pointer to mlx5_flow.
7986  *
7987  * @return
7988  *   1 while a reference on it exists, 0 when freed.
7989  */
7990 static int
7991 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7992 {
7993         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7994                 flow->dv.port_id_action;
7995
7996         MLX5_ASSERT(cache_resource->action);
7997         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7998                 (void *)cache_resource,
7999                 rte_atomic32_read(&cache_resource->refcnt));
8000         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8001                 claim_zero(mlx5_glue->destroy_flow_action
8002                                 (cache_resource->action));
8003                 LIST_REMOVE(cache_resource, next);
8004                 rte_free(cache_resource);
8005                 DRV_LOG(DEBUG, "port id action resource %p: removed",
8006                         (void *)cache_resource);
8007                 return 0;
8008         }
8009         return 1;
8010 }
8011
8012 /**
8013  * Release push vlan action resource.
8014  *
8015  * @param flow
8016  *   Pointer to mlx5_flow.
8017  *
8018  * @return
8019  *   1 while a reference on it exists, 0 when freed.
8020  */
8021 static int
8022 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
8023 {
8024         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
8025                 flow->dv.push_vlan_res;
8026
8027         MLX5_ASSERT(cache_resource->action);
8028         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
8029                 (void *)cache_resource,
8030                 rte_atomic32_read(&cache_resource->refcnt));
8031         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8032                 claim_zero(mlx5_glue->destroy_flow_action
8033                                 (cache_resource->action));
8034                 LIST_REMOVE(cache_resource, next);
8035                 rte_free(cache_resource);
8036                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
8037                         (void *)cache_resource);
8038                 return 0;
8039         }
8040         return 1;
8041 }
8042
8043 /**
8044  * Remove the flow from the NIC but keeps it in memory.
8045  * Lock free, (mutex should be acquired by caller).
8046  *
8047  * @param[in] dev
8048  *   Pointer to Ethernet device.
8049  * @param[in, out] flow
8050  *   Pointer to flow structure.
8051  */
8052 static void
8053 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8054 {
8055         struct mlx5_flow_dv *dv;
8056         struct mlx5_flow *dev_flow;
8057
8058         if (!flow)
8059                 return;
8060         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8061                 dv = &dev_flow->dv;
8062                 if (dv->flow) {
8063                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
8064                         dv->flow = NULL;
8065                 }
8066                 if (dv->hrxq) {
8067                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8068                                 mlx5_hrxq_drop_release(dev);
8069                         else
8070                                 mlx5_hrxq_release(dev, dv->hrxq);
8071                         dv->hrxq = NULL;
8072                 }
8073                 if (dev_flow->dv.vf_vlan.tag &&
8074                     dev_flow->dv.vf_vlan.created)
8075                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8076         }
8077 }
8078
8079 /**
8080  * Remove the flow from the NIC and the memory.
8081  * Lock free, (mutex should be acquired by caller).
8082  *
8083  * @param[in] dev
8084  *   Pointer to the Ethernet device structure.
8085  * @param[in, out] flow
8086  *   Pointer to flow structure.
8087  */
8088 static void
8089 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8090 {
8091         struct mlx5_flow *dev_flow;
8092
8093         if (!flow)
8094                 return;
8095         __flow_dv_remove(dev, flow);
8096         if (flow->counter) {
8097                 flow_dv_counter_release(dev, flow->counter);
8098                 flow->counter = NULL;
8099         }
8100         if (flow->meter) {
8101                 mlx5_flow_meter_detach(flow->meter);
8102                 flow->meter = NULL;
8103         }
8104         while (!LIST_EMPTY(&flow->dev_flows)) {
8105                 dev_flow = LIST_FIRST(&flow->dev_flows);
8106                 LIST_REMOVE(dev_flow, next);
8107                 if (dev_flow->dv.matcher)
8108                         flow_dv_matcher_release(dev, dev_flow);
8109                 if (dev_flow->dv.encap_decap)
8110                         flow_dv_encap_decap_resource_release(dev_flow);
8111                 if (dev_flow->dv.modify_hdr)
8112                         flow_dv_modify_hdr_resource_release(dev_flow);
8113                 if (dev_flow->dv.jump)
8114                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8115                 if (dev_flow->dv.port_id_action)
8116                         flow_dv_port_id_action_resource_release(dev_flow);
8117                 if (dev_flow->dv.push_vlan_res)
8118                         flow_dv_push_vlan_action_resource_release(dev_flow);
8119                 if (dev_flow->dv.tag_resource)
8120                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8121                 rte_free(dev_flow);
8122         }
8123 }
8124
8125 /**
8126  * Query a dv flow  rule for its statistics via devx.
8127  *
8128  * @param[in] dev
8129  *   Pointer to Ethernet device.
8130  * @param[in] flow
8131  *   Pointer to the sub flow.
8132  * @param[out] data
8133  *   data retrieved by the query.
8134  * @param[out] error
8135  *   Perform verbose error reporting if not NULL.
8136  *
8137  * @return
8138  *   0 on success, a negative errno value otherwise and rte_errno is set.
8139  */
8140 static int
8141 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8142                     void *data, struct rte_flow_error *error)
8143 {
8144         struct mlx5_priv *priv = dev->data->dev_private;
8145         struct rte_flow_query_count *qc = data;
8146
8147         if (!priv->config.devx)
8148                 return rte_flow_error_set(error, ENOTSUP,
8149                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8150                                           NULL,
8151                                           "counters are not supported");
8152         if (flow->counter) {
8153                 uint64_t pkts, bytes;
8154                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8155                                                &bytes);
8156
8157                 if (err)
8158                         return rte_flow_error_set(error, -err,
8159                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8160                                         NULL, "cannot read counters");
8161                 qc->hits_set = 1;
8162                 qc->bytes_set = 1;
8163                 qc->hits = pkts - flow->counter->hits;
8164                 qc->bytes = bytes - flow->counter->bytes;
8165                 if (qc->reset) {
8166                         flow->counter->hits = pkts;
8167                         flow->counter->bytes = bytes;
8168                 }
8169                 return 0;
8170         }
8171         return rte_flow_error_set(error, EINVAL,
8172                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8173                                   NULL,
8174                                   "counters are not available");
8175 }
8176
8177 /**
8178  * Query a flow.
8179  *
8180  * @see rte_flow_query()
8181  * @see rte_flow_ops
8182  */
8183 static int
8184 flow_dv_query(struct rte_eth_dev *dev,
8185               struct rte_flow *flow __rte_unused,
8186               const struct rte_flow_action *actions __rte_unused,
8187               void *data __rte_unused,
8188               struct rte_flow_error *error __rte_unused)
8189 {
8190         int ret = -EINVAL;
8191
8192         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8193                 switch (actions->type) {
8194                 case RTE_FLOW_ACTION_TYPE_VOID:
8195                         break;
8196                 case RTE_FLOW_ACTION_TYPE_COUNT:
8197                         ret = flow_dv_query_count(dev, flow, data, error);
8198                         break;
8199                 default:
8200                         return rte_flow_error_set(error, ENOTSUP,
8201                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8202                                                   actions,
8203                                                   "action not supported");
8204                 }
8205         }
8206         return ret;
8207 }
8208
8209 /**
8210  * Destroy the meter table set.
8211  * Lock free, (mutex should be acquired by caller).
8212  *
8213  * @param[in] dev
8214  *   Pointer to Ethernet device.
8215  * @param[in] tbl
8216  *   Pointer to the meter table set.
8217  *
8218  * @return
8219  *   Always 0.
8220  */
8221 static int
8222 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8223                         struct mlx5_meter_domains_infos *tbl)
8224 {
8225         struct mlx5_priv *priv = dev->data->dev_private;
8226         struct mlx5_meter_domains_infos *mtd =
8227                                 (struct mlx5_meter_domains_infos *)tbl;
8228
8229         if (!mtd || !priv->config.dv_flow_en)
8230                 return 0;
8231         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8232                 claim_zero(mlx5_glue->dv_destroy_flow
8233                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8234         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8235                 claim_zero(mlx5_glue->dv_destroy_flow
8236                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8237         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8238                 claim_zero(mlx5_glue->dv_destroy_flow
8239                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8240         if (mtd->egress.color_matcher)
8241                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8242                           (mtd->egress.color_matcher));
8243         if (mtd->egress.any_matcher)
8244                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8245                           (mtd->egress.any_matcher));
8246         if (mtd->egress.tbl)
8247                 claim_zero(flow_dv_tbl_resource_release(dev,
8248                                                         mtd->egress.tbl));
8249         if (mtd->ingress.color_matcher)
8250                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8251                           (mtd->ingress.color_matcher));
8252         if (mtd->ingress.any_matcher)
8253                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8254                           (mtd->ingress.any_matcher));
8255         if (mtd->ingress.tbl)
8256                 claim_zero(flow_dv_tbl_resource_release(dev,
8257                                                         mtd->ingress.tbl));
8258         if (mtd->transfer.color_matcher)
8259                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8260                           (mtd->transfer.color_matcher));
8261         if (mtd->transfer.any_matcher)
8262                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8263                           (mtd->transfer.any_matcher));
8264         if (mtd->transfer.tbl)
8265                 claim_zero(flow_dv_tbl_resource_release(dev,
8266                                                         mtd->transfer.tbl));
8267         if (mtd->drop_actn)
8268                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8269         rte_free(mtd);
8270         return 0;
8271 }
8272
8273 /* Number of meter flow actions, count and jump or count and drop. */
8274 #define METER_ACTIONS 2
8275
8276 /**
8277  * Create specify domain meter table and suffix table.
8278  *
8279  * @param[in] dev
8280  *   Pointer to Ethernet device.
8281  * @param[in,out] mtb
8282  *   Pointer to DV meter table set.
8283  * @param[in] egress
8284  *   Table attribute.
8285  * @param[in] transfer
8286  *   Table attribute.
8287  * @param[in] color_reg_c_idx
8288  *   Reg C index for color match.
8289  *
8290  * @return
8291  *   0 on success, -1 otherwise and rte_errno is set.
8292  */
8293 static int
8294 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8295                            struct mlx5_meter_domains_infos *mtb,
8296                            uint8_t egress, uint8_t transfer,
8297                            uint32_t color_reg_c_idx)
8298 {
8299         struct mlx5_priv *priv = dev->data->dev_private;
8300         struct mlx5_ibv_shared *sh = priv->sh;
8301         struct mlx5_flow_dv_match_params mask = {
8302                 .size = sizeof(mask.buf),
8303         };
8304         struct mlx5_flow_dv_match_params value = {
8305                 .size = sizeof(value.buf),
8306         };
8307         struct mlx5dv_flow_matcher_attr dv_attr = {
8308                 .type = IBV_FLOW_ATTR_NORMAL,
8309                 .priority = 0,
8310                 .match_criteria_enable = 0,
8311                 .match_mask = (void *)&mask,
8312         };
8313         void *actions[METER_ACTIONS];
8314         struct mlx5_flow_tbl_resource **sfx_tbl;
8315         struct mlx5_meter_domain_info *dtb;
8316         struct rte_flow_error error;
8317         int i = 0;
8318
8319         if (transfer) {
8320                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8321                 dtb = &mtb->transfer;
8322         } else if (egress) {
8323                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8324                 dtb = &mtb->egress;
8325         } else {
8326                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8327                 dtb = &mtb->ingress;
8328         }
8329         /* If the suffix table in missing, create it. */
8330         if (!(*sfx_tbl)) {
8331                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8332                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8333                                                 egress, transfer, &error);
8334                 if (!(*sfx_tbl)) {
8335                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8336                         return -1;
8337                 }
8338         }
8339         /* Create the meter table with METER level. */
8340         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8341                                             egress, transfer, &error);
8342         if (!dtb->tbl) {
8343                 DRV_LOG(ERR, "Failed to create meter policer table.");
8344                 return -1;
8345         }
8346         /* Create matchers, Any and Color. */
8347         dv_attr.priority = 3;
8348         dv_attr.match_criteria_enable = 0;
8349         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8350                                                              &dv_attr,
8351                                                              dtb->tbl->obj);
8352         if (!dtb->any_matcher) {
8353                 DRV_LOG(ERR, "Failed to create meter"
8354                              " policer default matcher.");
8355                 goto error_exit;
8356         }
8357         dv_attr.priority = 0;
8358         dv_attr.match_criteria_enable =
8359                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8360         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8361                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
8362         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8363                                                                &dv_attr,
8364                                                                dtb->tbl->obj);
8365         if (!dtb->color_matcher) {
8366                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8367                 goto error_exit;
8368         }
8369         if (mtb->count_actns[RTE_MTR_DROPPED])
8370                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8371         actions[i++] = mtb->drop_actn;
8372         /* Default rule: lowest priority, match any, actions: drop. */
8373         dtb->policer_rules[RTE_MTR_DROPPED] =
8374                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8375                                                  (void *)&value, i, actions);
8376         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8377                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8378                 goto error_exit;
8379         }
8380         return 0;
8381 error_exit:
8382         return -1;
8383 }
8384
8385 /**
8386  * Create the needed meter and suffix tables.
8387  * Lock free, (mutex should be acquired by caller).
8388  *
8389  * @param[in] dev
8390  *   Pointer to Ethernet device.
8391  * @param[in] fm
8392  *   Pointer to the flow meter.
8393  *
8394  * @return
8395  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8396  */
8397 static struct mlx5_meter_domains_infos *
8398 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8399                        const struct mlx5_flow_meter *fm)
8400 {
8401         struct mlx5_priv *priv = dev->data->dev_private;
8402         struct mlx5_meter_domains_infos *mtb;
8403         int ret;
8404         int i;
8405
8406         if (!priv->mtr_en) {
8407                 rte_errno = ENOTSUP;
8408                 return NULL;
8409         }
8410         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8411         if (!mtb) {
8412                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8413                 return NULL;
8414         }
8415         /* Create meter count actions */
8416         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8417                 if (!fm->policer_stats.cnt[i])
8418                         continue;
8419                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8420         }
8421         /* Create drop action. */
8422         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8423         if (!mtb->drop_actn) {
8424                 DRV_LOG(ERR, "Failed to create drop action.");
8425                 goto error_exit;
8426         }
8427         /* Egress meter table. */
8428         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8429         if (ret) {
8430                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8431                 goto error_exit;
8432         }
8433         /* Ingress meter table. */
8434         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8435         if (ret) {
8436                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8437                 goto error_exit;
8438         }
8439         /* FDB meter table. */
8440         if (priv->config.dv_esw_en) {
8441                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8442                                                  priv->mtr_color_reg);
8443                 if (ret) {
8444                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8445                         goto error_exit;
8446                 }
8447         }
8448         return mtb;
8449 error_exit:
8450         flow_dv_destroy_mtr_tbl(dev, mtb);
8451         return NULL;
8452 }
8453
8454 /**
8455  * Destroy domain policer rule.
8456  *
8457  * @param[in] dt
8458  *   Pointer to domain table.
8459  */
8460 static void
8461 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8462 {
8463         int i;
8464
8465         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8466                 if (dt->policer_rules[i]) {
8467                         claim_zero(mlx5_glue->dv_destroy_flow
8468                                   (dt->policer_rules[i]));
8469                         dt->policer_rules[i] = NULL;
8470                 }
8471         }
8472         if (dt->jump_actn) {
8473                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8474                 dt->jump_actn = NULL;
8475         }
8476 }
8477
8478 /**
8479  * Destroy policer rules.
8480  *
8481  * @param[in] dev
8482  *   Pointer to Ethernet device.
8483  * @param[in] fm
8484  *   Pointer to flow meter structure.
8485  * @param[in] attr
8486  *   Pointer to flow attributes.
8487  *
8488  * @return
8489  *   Always 0.
8490  */
8491 static int
8492 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8493                               const struct mlx5_flow_meter *fm,
8494                               const struct rte_flow_attr *attr)
8495 {
8496         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8497
8498         if (!mtb)
8499                 return 0;
8500         if (attr->egress)
8501                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8502         if (attr->ingress)
8503                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8504         if (attr->transfer)
8505                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8506         return 0;
8507 }
8508
8509 /**
8510  * Create specify domain meter policer rule.
8511  *
8512  * @param[in] fm
8513  *   Pointer to flow meter structure.
8514  * @param[in] mtb
8515  *   Pointer to DV meter table set.
8516  * @param[in] sfx_tb
8517  *   Pointer to suffix table.
8518  * @param[in] mtr_reg_c
8519  *   Color match REG_C.
8520  *
8521  * @return
8522  *   0 on success, -1 otherwise.
8523  */
8524 static int
8525 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8526                                     struct mlx5_meter_domain_info *dtb,
8527                                     struct mlx5_flow_tbl_resource *sfx_tb,
8528                                     uint8_t mtr_reg_c)
8529 {
8530         struct mlx5_flow_dv_match_params matcher = {
8531                 .size = sizeof(matcher.buf),
8532         };
8533         struct mlx5_flow_dv_match_params value = {
8534                 .size = sizeof(value.buf),
8535         };
8536         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8537         void *actions[METER_ACTIONS];
8538         int i;
8539
8540         /* Create jump action. */
8541         if (!sfx_tb)
8542                 return -1;
8543         if (!dtb->jump_actn)
8544                 dtb->jump_actn =
8545                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8546                                                         (sfx_tb->obj);
8547         if (!dtb->jump_actn) {
8548                 DRV_LOG(ERR, "Failed to create policer jump action.");
8549                 goto error;
8550         }
8551         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8552                 int j = 0;
8553
8554                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8555                                        rte_col_2_mlx5_col(i), UINT8_MAX);
8556                 if (mtb->count_actns[i])
8557                         actions[j++] = mtb->count_actns[i];
8558                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8559                         actions[j++] = mtb->drop_actn;
8560                 else
8561                         actions[j++] = dtb->jump_actn;
8562                 dtb->policer_rules[i] =
8563                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8564                                                  (void *)&value,
8565                                                   j, actions);
8566                 if (!dtb->policer_rules[i]) {
8567                         DRV_LOG(ERR, "Failed to create policer rule.");
8568                         goto error;
8569                 }
8570         }
8571         return 0;
8572 error:
8573         rte_errno = errno;
8574         return -1;
8575 }
8576
8577 /**
8578  * Create policer rules.
8579  *
8580  * @param[in] dev
8581  *   Pointer to Ethernet device.
8582  * @param[in] fm
8583  *   Pointer to flow meter structure.
8584  * @param[in] attr
8585  *   Pointer to flow attributes.
8586  *
8587  * @return
8588  *   0 on success, -1 otherwise.
8589  */
8590 static int
8591 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8592                              struct mlx5_flow_meter *fm,
8593                              const struct rte_flow_attr *attr)
8594 {
8595         struct mlx5_priv *priv = dev->data->dev_private;
8596         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8597         int ret;
8598
8599         if (attr->egress) {
8600                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8601                                                 priv->sh->tx_mtr_sfx_tbl,
8602                                                 priv->mtr_color_reg);
8603                 if (ret) {
8604                         DRV_LOG(ERR, "Failed to create egress policer.");
8605                         goto error;
8606                 }
8607         }
8608         if (attr->ingress) {
8609                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8610                                                 priv->sh->rx_mtr_sfx_tbl,
8611                                                 priv->mtr_color_reg);
8612                 if (ret) {
8613                         DRV_LOG(ERR, "Failed to create ingress policer.");
8614                         goto error;
8615                 }
8616         }
8617         if (attr->transfer) {
8618                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8619                                                 priv->sh->fdb_mtr_sfx_tbl,
8620                                                 priv->mtr_color_reg);
8621                 if (ret) {
8622                         DRV_LOG(ERR, "Failed to create transfer policer.");
8623                         goto error;
8624                 }
8625         }
8626         return 0;
8627 error:
8628         flow_dv_destroy_policer_rules(dev, fm, attr);
8629         return -1;
8630 }
8631
8632 /**
8633  * Query a devx counter.
8634  *
8635  * @param[in] dev
8636  *   Pointer to the Ethernet device structure.
8637  * @param[in] cnt
8638  *   Pointer to the flow counter.
8639  * @param[in] clear
8640  *   Set to clear the counter statistics.
8641  * @param[out] pkts
8642  *   The statistics value of packets.
8643  * @param[out] bytes
8644  *   The statistics value of bytes.
8645  *
8646  * @return
8647  *   0 on success, otherwise return -1.
8648  */
8649 static int
8650 flow_dv_counter_query(struct rte_eth_dev *dev,
8651                       struct mlx5_flow_counter *cnt, bool clear,
8652                       uint64_t *pkts, uint64_t *bytes)
8653 {
8654         struct mlx5_priv *priv = dev->data->dev_private;
8655         uint64_t inn_pkts, inn_bytes;
8656         int ret;
8657
8658         if (!priv->config.devx)
8659                 return -1;
8660         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8661         if (ret)
8662                 return -1;
8663         *pkts = inn_pkts - cnt->hits;
8664         *bytes = inn_bytes - cnt->bytes;
8665         if (clear) {
8666                 cnt->hits = inn_pkts;
8667                 cnt->bytes = inn_bytes;
8668         }
8669         return 0;
8670 }
8671
8672 /*
8673  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8674  */
8675 static int
8676 flow_dv_translate(struct rte_eth_dev *dev,
8677                   struct mlx5_flow *dev_flow,
8678                   const struct rte_flow_attr *attr,
8679                   const struct rte_flow_item items[],
8680                   const struct rte_flow_action actions[],
8681                   struct rte_flow_error *error)
8682 {
8683         int ret;
8684
8685         flow_dv_shared_lock(dev);
8686         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8687         flow_dv_shared_unlock(dev);
8688         return ret;
8689 }
8690
8691 /*
8692  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8693  */
8694 static int
8695 flow_dv_apply(struct rte_eth_dev *dev,
8696               struct rte_flow *flow,
8697               struct rte_flow_error *error)
8698 {
8699         int ret;
8700
8701         flow_dv_shared_lock(dev);
8702         ret = __flow_dv_apply(dev, flow, error);
8703         flow_dv_shared_unlock(dev);
8704         return ret;
8705 }
8706
8707 /*
8708  * Mutex-protected thunk to lock-free __flow_dv_remove().
8709  */
8710 static void
8711 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8712 {
8713         flow_dv_shared_lock(dev);
8714         __flow_dv_remove(dev, flow);
8715         flow_dv_shared_unlock(dev);
8716 }
8717
8718 /*
8719  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8720  */
8721 static void
8722 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8723 {
8724         flow_dv_shared_lock(dev);
8725         __flow_dv_destroy(dev, flow);
8726         flow_dv_shared_unlock(dev);
8727 }
8728
8729 /*
8730  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8731  */
8732 static struct mlx5_flow_counter *
8733 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8734 {
8735         struct mlx5_flow_counter *cnt;
8736
8737         flow_dv_shared_lock(dev);
8738         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8739         flow_dv_shared_unlock(dev);
8740         return cnt;
8741 }
8742
8743 /*
8744  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8745  */
8746 static void
8747 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8748 {
8749         flow_dv_shared_lock(dev);
8750         flow_dv_counter_release(dev, cnt);
8751         flow_dv_shared_unlock(dev);
8752 }
8753
8754 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8755         .validate = flow_dv_validate,
8756         .prepare = flow_dv_prepare,
8757         .translate = flow_dv_translate,
8758         .apply = flow_dv_apply,
8759         .remove = flow_dv_remove,
8760         .destroy = flow_dv_destroy,
8761         .query = flow_dv_query,
8762         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8763         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8764         .create_policer_rules = flow_dv_create_policer_rules,
8765         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8766         .counter_alloc = flow_dv_counter_allocate,
8767         .counter_free = flow_dv_counter_free,
8768         .counter_query = flow_dv_counter_query,
8769 };
8770
8771 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */