drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include "mlx5.h"
  33 #include "mlx5_defs.h"
  34 #include "mlx5_glue.h"
  35 #include "mlx5_flow.h"
  36 #include "mlx5_prm.h"
  37 #include "mlx5_rxtx.h"
  38
  39 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  40
  41 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  42 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  43 #endif
  44
  45 #ifndef HAVE_MLX5DV_DR_ESWITCH
  46 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  47 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  48 #endif
  49 #endif
  50
  51 #ifndef HAVE_MLX5DV_DR
  52 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  53 #endif
  54
  55 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  56                                           sizeof(struct rte_flow_item_ipv4))
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 /**
  77  * Initialize flow attributes structure according to flow items' types.
  78  *
  79  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  80  * mode. For tunnel mode, the items to be modified are the outermost ones.
  81  *
  82  * @param[in] item
  83  *   Pointer to item specification.
  84  * @param[out] attr
  85  *   Pointer to flow attributes structure.
  86  */
  87 static void
  88 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  89 {
  90         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  91                 switch (item->type) {
  92                 case RTE_FLOW_ITEM_TYPE_IPV4:
  93                         if (!attr->ipv6)
  94                                 attr->ipv4 = 1;
  95                         break;
  96                 case RTE_FLOW_ITEM_TYPE_IPV6:
  97                         if (!attr->ipv4)
  98                                 attr->ipv6 = 1;
  99                         break;
 100                 case RTE_FLOW_ITEM_TYPE_UDP:
 101                         if (!attr->tcp)
 102                                 attr->udp = 1;
 103                         break;
 104                 case RTE_FLOW_ITEM_TYPE_TCP:
 105                         if (!attr->udp)
 106                                 attr->tcp = 1;
 107                         break;
 108                 default:
 109                         break;
 110                 }
 111         }
 112         attr->valid = 1;
 113 }
 114
 115 /**
 116  * Convert rte_mtr_color to mlx5 color.
 117  *
 118  * @param[in] rcol
 119  *   rte_mtr_color.
 120  *
 121  * @return
 122  *   mlx5 color.
 123  */
 124 static int
 125 rte_col_2_mlx5_col(enum rte_color rcol)
 126 {
 127         switch (rcol) {
 128         case RTE_COLOR_GREEN:
 129                 return MLX5_FLOW_COLOR_GREEN;
 130         case RTE_COLOR_YELLOW:
 131                 return MLX5_FLOW_COLOR_YELLOW;
 132         case RTE_COLOR_RED:
 133                 return MLX5_FLOW_COLOR_RED;
 134         default:
 135                 break;
 136         }
 137         return MLX5_FLOW_COLOR_UNDEFINED;
 138 }
 139
 140 struct field_modify_info {
 141         uint32_t size; /* Size of field in protocol header, in bytes. */
 142         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 143         enum mlx5_modification_field id;
 144 };
 145
 146 struct field_modify_info modify_eth[] = {
 147         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 148         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 149         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 150         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 151         {0, 0, 0},
 152 };
 153
 154 struct field_modify_info modify_vlan_out_first_vid[] = {
 155         /* Size in bits !!! */
 156         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 157         {0, 0, 0},
 158 };
 159
 160 struct field_modify_info modify_ipv4[] = {
 161         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 162         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 163         {4, 12, MLX5_MODI_OUT_SIPV4},
 164         {4, 16, MLX5_MODI_OUT_DIPV4},
 165         {0, 0, 0},
 166 };
 167
 168 struct field_modify_info modify_ipv6[] = {
 169         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 170         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 171         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 172         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 173         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 174         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 175         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 176         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 177         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 178         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 179         {0, 0, 0},
 180 };
 181
 182 struct field_modify_info modify_udp[] = {
 183         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 184         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 185         {0, 0, 0},
 186 };
 187
 188 struct field_modify_info modify_tcp[] = {
 189         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 190         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 191         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 192         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 193         {0, 0, 0},
 194 };
 195
 196 static void
 197 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 198                           uint8_t next_protocol, uint64_t *item_flags,
 199                           int *tunnel)
 200 {
 201         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 202                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 203         if (next_protocol == IPPROTO_IPIP) {
 204                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 205                 *tunnel = 1;
 206         }
 207         if (next_protocol == IPPROTO_IPV6) {
 208                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 209                 *tunnel = 1;
 210         }
 211 }
 212
 213 /**
 214  * Acquire the synchronizing object to protect multithreaded access
 215  * to shared dv context. Lock occurs only if context is actually
 216  * shared, i.e. we have multiport IB device and representors are
 217  * created.
 218  *
 219  * @param[in] dev
 220  *   Pointer to the rte_eth_dev structure.
 221  */
 222 static void
 223 flow_dv_shared_lock(struct rte_eth_dev *dev)
 224 {
 225         struct mlx5_priv *priv = dev->data->dev_private;
 226         struct mlx5_ibv_shared *sh = priv->sh;
 227
 228         if (sh->dv_refcnt > 1) {
 229                 int ret;
 230
 231                 ret = pthread_mutex_lock(&sh->dv_mutex);
 232                 assert(!ret);
 233                 (void)ret;
 234         }
 235 }
 236
 237 static void
 238 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 239 {
 240         struct mlx5_priv *priv = dev->data->dev_private;
 241         struct mlx5_ibv_shared *sh = priv->sh;
 242
 243         if (sh->dv_refcnt > 1) {
 244                 int ret;
 245
 246                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 247                 assert(!ret);
 248                 (void)ret;
 249         }
 250 }
 251
 252 /* Update VLAN's VID/PCP based on input rte_flow_action.
 253  *
 254  * @param[in] action
 255  *   Pointer to struct rte_flow_action.
 256  * @param[out] vlan
 257  *   Pointer to struct rte_vlan_hdr.
 258  */
 259 static void
 260 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 261                          struct rte_vlan_hdr *vlan)
 262 {
 263         uint16_t vlan_tci;
 264         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 265                 vlan_tci =
 266                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 267                                                action->conf)->vlan_pcp;
 268                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 269                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 270                 vlan->vlan_tci |= vlan_tci;
 271         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 272                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 273                 vlan->vlan_tci |= rte_be_to_cpu_16
 274                     (((const struct rte_flow_action_of_set_vlan_vid *)
 275                                              action->conf)->vlan_vid);
 276         }
 277 }
 278
 279 /**
 280  * Fetch 1, 2, 3 or 4 byte field from the byte array
 281  * and return as unsigned integer in host-endian format.
 282  *
 283  * @param[in] data
 284  *   Pointer to data array.
 285  * @param[in] size
 286  *   Size of field to extract.
 287  *
 288  * @return
 289  *   converted field in host endian format.
 290  */
 291 static inline uint32_t
 292 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 293 {
 294         uint32_t ret;
 295
 296         switch (size) {
 297         case 1:
 298                 ret = *data;
 299                 break;
 300         case 2:
 301                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 302                 break;
 303         case 3:
 304                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 305                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 306                 break;
 307         case 4:
 308                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 309                 break;
 310         default:
 311                 assert(false);
 312                 ret = 0;
 313                 break;
 314         }
 315         return ret;
 316 }
 317
 318 /**
 319  * Convert modify-header action to DV specification.
 320  *
 321  * Data length of each action is determined by provided field description
 322  * and the item mask. Data bit offset and width of each action is determined
 323  * by provided item mask.
 324  *
 325  * @param[in] item
 326  *   Pointer to item specification.
 327  * @param[in] field
 328  *   Pointer to field modification information.
 329  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 330  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 331  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 332  * @param[in] dcopy
 333  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 334  *   Negative offset value sets the same offset as source offset.
 335  *   size field is ignored, value is taken from source field.
 336  * @param[in,out] resource
 337  *   Pointer to the modify-header resource.
 338  * @param[in] type
 339  *   Type of modification.
 340  * @param[out] error
 341  *   Pointer to the error structure.
 342  *
 343  * @return
 344  *   0 on success, a negative errno value otherwise and rte_errno is set.
 345  */
 346 static int
 347 flow_dv_convert_modify_action(struct rte_flow_item *item,
 348                               struct field_modify_info *field,
 349                               struct field_modify_info *dcopy,
 350                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 351                               uint32_t type, struct rte_flow_error *error)
 352 {
 353         uint32_t i = resource->actions_num;
 354         struct mlx5_modification_cmd *actions = resource->actions;
 355
 356         /*
 357          * The item and mask are provided in big-endian format.
 358          * The fields should be presented as in big-endian format either.
 359          * Mask must be always present, it defines the actual field width.
 360          */
 361         assert(item->mask);
 362         assert(field->size);
 363         do {
 364                 unsigned int size_b;
 365                 unsigned int off_b;
 366                 uint32_t mask;
 367                 uint32_t data;
 368
 369                 if (i >= MLX5_MAX_MODIFY_NUM)
 370                         return rte_flow_error_set(error, EINVAL,
 371                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 372                                  "too many items to modify");
 373                 /* Fetch variable byte size mask from the array. */
 374                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 375                                            field->offset, field->size);
 376                 if (!mask) {
 377                         ++field;
 378                         continue;
 379                 }
 380                 /* Deduce actual data width in bits from mask value. */
 381                 off_b = rte_bsf32(mask);
 382                 size_b = sizeof(uint32_t) * CHAR_BIT -
 383                          off_b - __builtin_clz(mask);
 384                 assert(size_b);
 385                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 386                 actions[i].action_type = type;
 387                 actions[i].field = field->id;
 388                 actions[i].offset = off_b;
 389                 actions[i].length = size_b;
 390                 /* Convert entire record to expected big-endian format. */
 391                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 392                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 393                         assert(dcopy);
 394                         actions[i].dst_field = dcopy->id;
 395                         actions[i].dst_offset =
 396                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 397                         /* Convert entire record to big-endian format. */
 398                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 399                 } else {
 400                         assert(item->spec);
 401                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 402                                                    field->offset, field->size);
 403                         /* Shift out the trailing masked bits from data. */
 404                         data = (data & mask) >> off_b;
 405                         actions[i].data1 = rte_cpu_to_be_32(data);
 406                 }
 407                 ++i;
 408                 ++field;
 409         } while (field->size);
 410         if (resource->actions_num == i)
 411                 return rte_flow_error_set(error, EINVAL,
 412                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 413                                           "invalid modification flow item");
 414         resource->actions_num = i;
 415         return 0;
 416 }
 417
 418 /**
 419  * Convert modify-header set IPv4 address action to DV specification.
 420  *
 421  * @param[in,out] resource
 422  *   Pointer to the modify-header resource.
 423  * @param[in] action
 424  *   Pointer to action specification.
 425  * @param[out] error
 426  *   Pointer to the error structure.
 427  *
 428  * @return
 429  *   0 on success, a negative errno value otherwise and rte_errno is set.
 430  */
 431 static int
 432 flow_dv_convert_action_modify_ipv4
 433                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 434                          const struct rte_flow_action *action,
 435                          struct rte_flow_error *error)
 436 {
 437         const struct rte_flow_action_set_ipv4 *conf =
 438                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 439         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 440         struct rte_flow_item_ipv4 ipv4;
 441         struct rte_flow_item_ipv4 ipv4_mask;
 442
 443         memset(&ipv4, 0, sizeof(ipv4));
 444         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 445         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 446                 ipv4.hdr.src_addr = conf->ipv4_addr;
 447                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 448         } else {
 449                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 450                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 451         }
 452         item.spec = &ipv4;
 453         item.mask = &ipv4_mask;
 454         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 455                                              MLX5_MODIFICATION_TYPE_SET, error);
 456 }
 457
 458 /**
 459  * Convert modify-header set IPv6 address action to DV specification.
 460  *
 461  * @param[in,out] resource
 462  *   Pointer to the modify-header resource.
 463  * @param[in] action
 464  *   Pointer to action specification.
 465  * @param[out] error
 466  *   Pointer to the error structure.
 467  *
 468  * @return
 469  *   0 on success, a negative errno value otherwise and rte_errno is set.
 470  */
 471 static int
 472 flow_dv_convert_action_modify_ipv6
 473                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 474                          const struct rte_flow_action *action,
 475                          struct rte_flow_error *error)
 476 {
 477         const struct rte_flow_action_set_ipv6 *conf =
 478                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 479         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 480         struct rte_flow_item_ipv6 ipv6;
 481         struct rte_flow_item_ipv6 ipv6_mask;
 482
 483         memset(&ipv6, 0, sizeof(ipv6));
 484         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 485         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 486                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 487                        sizeof(ipv6.hdr.src_addr));
 488                 memcpy(&ipv6_mask.hdr.src_addr,
 489                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 490                        sizeof(ipv6.hdr.src_addr));
 491         } else {
 492                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 493                        sizeof(ipv6.hdr.dst_addr));
 494                 memcpy(&ipv6_mask.hdr.dst_addr,
 495                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 496                        sizeof(ipv6.hdr.dst_addr));
 497         }
 498         item.spec = &ipv6;
 499         item.mask = &ipv6_mask;
 500         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 501                                              MLX5_MODIFICATION_TYPE_SET, error);
 502 }
 503
 504 /**
 505  * Convert modify-header set MAC address action to DV specification.
 506  *
 507  * @param[in,out] resource
 508  *   Pointer to the modify-header resource.
 509  * @param[in] action
 510  *   Pointer to action specification.
 511  * @param[out] error
 512  *   Pointer to the error structure.
 513  *
 514  * @return
 515  *   0 on success, a negative errno value otherwise and rte_errno is set.
 516  */
 517 static int
 518 flow_dv_convert_action_modify_mac
 519                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 520                          const struct rte_flow_action *action,
 521                          struct rte_flow_error *error)
 522 {
 523         const struct rte_flow_action_set_mac *conf =
 524                 (const struct rte_flow_action_set_mac *)(action->conf);
 525         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 526         struct rte_flow_item_eth eth;
 527         struct rte_flow_item_eth eth_mask;
 528
 529         memset(&eth, 0, sizeof(eth));
 530         memset(&eth_mask, 0, sizeof(eth_mask));
 531         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 532                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 533                        sizeof(eth.src.addr_bytes));
 534                 memcpy(&eth_mask.src.addr_bytes,
 535                        &rte_flow_item_eth_mask.src.addr_bytes,
 536                        sizeof(eth_mask.src.addr_bytes));
 537         } else {
 538                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 539                        sizeof(eth.dst.addr_bytes));
 540                 memcpy(&eth_mask.dst.addr_bytes,
 541                        &rte_flow_item_eth_mask.dst.addr_bytes,
 542                        sizeof(eth_mask.dst.addr_bytes));
 543         }
 544         item.spec = &eth;
 545         item.mask = &eth_mask;
 546         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 547                                              MLX5_MODIFICATION_TYPE_SET, error);
 548 }
 549
 550 /**
 551  * Convert modify-header set VLAN VID action to DV specification.
 552  *
 553  * @param[in,out] resource
 554  *   Pointer to the modify-header resource.
 555  * @param[in] action
 556  *   Pointer to action specification.
 557  * @param[out] error
 558  *   Pointer to the error structure.
 559  *
 560  * @return
 561  *   0 on success, a negative errno value otherwise and rte_errno is set.
 562  */
 563 static int
 564 flow_dv_convert_action_modify_vlan_vid
 565                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 566                          const struct rte_flow_action *action,
 567                          struct rte_flow_error *error)
 568 {
 569         const struct rte_flow_action_of_set_vlan_vid *conf =
 570                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 571         int i = resource->actions_num;
 572         struct mlx5_modification_cmd *actions = &resource->actions[i];
 573         struct field_modify_info *field = modify_vlan_out_first_vid;
 574
 575         if (i >= MLX5_MAX_MODIFY_NUM)
 576                 return rte_flow_error_set(error, EINVAL,
 577                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 578                          "too many items to modify");
 579         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 580         actions[i].field = field->id;
 581         actions[i].length = field->size;
 582         actions[i].offset = field->offset;
 583         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 584         actions[i].data1 = conf->vlan_vid;
 585         actions[i].data1 = actions[i].data1 << 16;
 586         resource->actions_num = ++i;
 587         return 0;
 588 }
 589
 590 /**
 591  * Convert modify-header set TP action to DV specification.
 592  *
 593  * @param[in,out] resource
 594  *   Pointer to the modify-header resource.
 595  * @param[in] action
 596  *   Pointer to action specification.
 597  * @param[in] items
 598  *   Pointer to rte_flow_item objects list.
 599  * @param[in] attr
 600  *   Pointer to flow attributes structure.
 601  * @param[out] error
 602  *   Pointer to the error structure.
 603  *
 604  * @return
 605  *   0 on success, a negative errno value otherwise and rte_errno is set.
 606  */
 607 static int
 608 flow_dv_convert_action_modify_tp
 609                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 610                          const struct rte_flow_action *action,
 611                          const struct rte_flow_item *items,
 612                          union flow_dv_attr *attr,
 613                          struct rte_flow_error *error)
 614 {
 615         const struct rte_flow_action_set_tp *conf =
 616                 (const struct rte_flow_action_set_tp *)(action->conf);
 617         struct rte_flow_item item;
 618         struct rte_flow_item_udp udp;
 619         struct rte_flow_item_udp udp_mask;
 620         struct rte_flow_item_tcp tcp;
 621         struct rte_flow_item_tcp tcp_mask;
 622         struct field_modify_info *field;
 623
 624         if (!attr->valid)
 625                 flow_dv_attr_init(items, attr);
 626         if (attr->udp) {
 627                 memset(&udp, 0, sizeof(udp));
 628                 memset(&udp_mask, 0, sizeof(udp_mask));
 629                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 630                         udp.hdr.src_port = conf->port;
 631                         udp_mask.hdr.src_port =
 632                                         rte_flow_item_udp_mask.hdr.src_port;
 633                 } else {
 634                         udp.hdr.dst_port = conf->port;
 635                         udp_mask.hdr.dst_port =
 636                                         rte_flow_item_udp_mask.hdr.dst_port;
 637                 }
 638                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 639                 item.spec = &udp;
 640                 item.mask = &udp_mask;
 641                 field = modify_udp;
 642         }
 643         if (attr->tcp) {
 644                 memset(&tcp, 0, sizeof(tcp));
 645                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 646                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 647                         tcp.hdr.src_port = conf->port;
 648                         tcp_mask.hdr.src_port =
 649                                         rte_flow_item_tcp_mask.hdr.src_port;
 650                 } else {
 651                         tcp.hdr.dst_port = conf->port;
 652                         tcp_mask.hdr.dst_port =
 653                                         rte_flow_item_tcp_mask.hdr.dst_port;
 654                 }
 655                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 656                 item.spec = &tcp;
 657                 item.mask = &tcp_mask;
 658                 field = modify_tcp;
 659         }
 660         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 661                                              MLX5_MODIFICATION_TYPE_SET, error);
 662 }
 663
 664 /**
 665  * Convert modify-header set TTL action to DV specification.
 666  *
 667  * @param[in,out] resource
 668  *   Pointer to the modify-header resource.
 669  * @param[in] action
 670  *   Pointer to action specification.
 671  * @param[in] items
 672  *   Pointer to rte_flow_item objects list.
 673  * @param[in] attr
 674  *   Pointer to flow attributes structure.
 675  * @param[out] error
 676  *   Pointer to the error structure.
 677  *
 678  * @return
 679  *   0 on success, a negative errno value otherwise and rte_errno is set.
 680  */
 681 static int
 682 flow_dv_convert_action_modify_ttl
 683                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 684                          const struct rte_flow_action *action,
 685                          const struct rte_flow_item *items,
 686                          union flow_dv_attr *attr,
 687                          struct rte_flow_error *error)
 688 {
 689         const struct rte_flow_action_set_ttl *conf =
 690                 (const struct rte_flow_action_set_ttl *)(action->conf);
 691         struct rte_flow_item item;
 692         struct rte_flow_item_ipv4 ipv4;
 693         struct rte_flow_item_ipv4 ipv4_mask;
 694         struct rte_flow_item_ipv6 ipv6;
 695         struct rte_flow_item_ipv6 ipv6_mask;
 696         struct field_modify_info *field;
 697
 698         if (!attr->valid)
 699                 flow_dv_attr_init(items, attr);
 700         if (attr->ipv4) {
 701                 memset(&ipv4, 0, sizeof(ipv4));
 702                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 703                 ipv4.hdr.time_to_live = conf->ttl_value;
 704                 ipv4_mask.hdr.time_to_live = 0xFF;
 705                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 706                 item.spec = &ipv4;
 707                 item.mask = &ipv4_mask;
 708                 field = modify_ipv4;
 709         }
 710         if (attr->ipv6) {
 711                 memset(&ipv6, 0, sizeof(ipv6));
 712                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 713                 ipv6.hdr.hop_limits = conf->ttl_value;
 714                 ipv6_mask.hdr.hop_limits = 0xFF;
 715                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 716                 item.spec = &ipv6;
 717                 item.mask = &ipv6_mask;
 718                 field = modify_ipv6;
 719         }
 720         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 721                                              MLX5_MODIFICATION_TYPE_SET, error);
 722 }
 723
 724 /**
 725  * Convert modify-header decrement TTL action to DV specification.
 726  *
 727  * @param[in,out] resource
 728  *   Pointer to the modify-header resource.
 729  * @param[in] action
 730  *   Pointer to action specification.
 731  * @param[in] items
 732  *   Pointer to rte_flow_item objects list.
 733  * @param[in] attr
 734  *   Pointer to flow attributes structure.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_dec_ttl
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_item *items,
 745                          union flow_dv_attr *attr,
 746                          struct rte_flow_error *error)
 747 {
 748         struct rte_flow_item item;
 749         struct rte_flow_item_ipv4 ipv4;
 750         struct rte_flow_item_ipv4 ipv4_mask;
 751         struct rte_flow_item_ipv6 ipv6;
 752         struct rte_flow_item_ipv6 ipv6_mask;
 753         struct field_modify_info *field;
 754
 755         if (!attr->valid)
 756                 flow_dv_attr_init(items, attr);
 757         if (attr->ipv4) {
 758                 memset(&ipv4, 0, sizeof(ipv4));
 759                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 760                 ipv4.hdr.time_to_live = 0xFF;
 761                 ipv4_mask.hdr.time_to_live = 0xFF;
 762                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 763                 item.spec = &ipv4;
 764                 item.mask = &ipv4_mask;
 765                 field = modify_ipv4;
 766         }
 767         if (attr->ipv6) {
 768                 memset(&ipv6, 0, sizeof(ipv6));
 769                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 770                 ipv6.hdr.hop_limits = 0xFF;
 771                 ipv6_mask.hdr.hop_limits = 0xFF;
 772                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 773                 item.spec = &ipv6;
 774                 item.mask = &ipv6_mask;
 775                 field = modify_ipv6;
 776         }
 777         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 778                                              MLX5_MODIFICATION_TYPE_ADD, error);
 779 }
 780
 781 /**
 782  * Convert modify-header increment/decrement TCP Sequence number
 783  * to DV specification.
 784  *
 785  * @param[in,out] resource
 786  *   Pointer to the modify-header resource.
 787  * @param[in] action
 788  *   Pointer to action specification.
 789  * @param[out] error
 790  *   Pointer to the error structure.
 791  *
 792  * @return
 793  *   0 on success, a negative errno value otherwise and rte_errno is set.
 794  */
 795 static int
 796 flow_dv_convert_action_modify_tcp_seq
 797                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 798                          const struct rte_flow_action *action,
 799                          struct rte_flow_error *error)
 800 {
 801         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 802         uint64_t value = rte_be_to_cpu_32(*conf);
 803         struct rte_flow_item item;
 804         struct rte_flow_item_tcp tcp;
 805         struct rte_flow_item_tcp tcp_mask;
 806
 807         memset(&tcp, 0, sizeof(tcp));
 808         memset(&tcp_mask, 0, sizeof(tcp_mask));
 809         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 810                 /*
 811                  * The HW has no decrement operation, only increment operation.
 812                  * To simulate decrement X from Y using increment operation
 813                  * we need to add UINT32_MAX X times to Y.
 814                  * Each adding of UINT32_MAX decrements Y by 1.
 815                  */
 816                 value *= UINT32_MAX;
 817         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 818         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 819         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 820         item.spec = &tcp;
 821         item.mask = &tcp_mask;
 822         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 823                                              MLX5_MODIFICATION_TYPE_ADD, error);
 824 }
 825
 826 /**
 827  * Convert modify-header increment/decrement TCP Acknowledgment number
 828  * to DV specification.
 829  *
 830  * @param[in,out] resource
 831  *   Pointer to the modify-header resource.
 832  * @param[in] action
 833  *   Pointer to action specification.
 834  * @param[out] error
 835  *   Pointer to the error structure.
 836  *
 837  * @return
 838  *   0 on success, a negative errno value otherwise and rte_errno is set.
 839  */
 840 static int
 841 flow_dv_convert_action_modify_tcp_ack
 842                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 843                          const struct rte_flow_action *action,
 844                          struct rte_flow_error *error)
 845 {
 846         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 847         uint64_t value = rte_be_to_cpu_32(*conf);
 848         struct rte_flow_item item;
 849         struct rte_flow_item_tcp tcp;
 850         struct rte_flow_item_tcp tcp_mask;
 851
 852         memset(&tcp, 0, sizeof(tcp));
 853         memset(&tcp_mask, 0, sizeof(tcp_mask));
 854         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 855                 /*
 856                  * The HW has no decrement operation, only increment operation.
 857                  * To simulate decrement X from Y using increment operation
 858                  * we need to add UINT32_MAX X times to Y.
 859                  * Each adding of UINT32_MAX decrements Y by 1.
 860                  */
 861                 value *= UINT32_MAX;
 862         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 863         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 864         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 865         item.spec = &tcp;
 866         item.mask = &tcp_mask;
 867         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 868                                              MLX5_MODIFICATION_TYPE_ADD, error);
 869 }
 870
 871 static enum mlx5_modification_field reg_to_field[] = {
 872         [REG_NONE] = MLX5_MODI_OUT_NONE,
 873         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 874         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 875         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 876         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 877         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 878         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 879         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 880         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 881         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 882         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 883 };
 884
 885 /**
 886  * Convert register set to DV specification.
 887  *
 888  * @param[in,out] resource
 889  *   Pointer to the modify-header resource.
 890  * @param[in] action
 891  *   Pointer to action specification.
 892  * @param[out] error
 893  *   Pointer to the error structure.
 894  *
 895  * @return
 896  *   0 on success, a negative errno value otherwise and rte_errno is set.
 897  */
 898 static int
 899 flow_dv_convert_action_set_reg
 900                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 901                          const struct rte_flow_action *action,
 902                          struct rte_flow_error *error)
 903 {
 904         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 905         struct mlx5_modification_cmd *actions = resource->actions;
 906         uint32_t i = resource->actions_num;
 907
 908         if (i >= MLX5_MAX_MODIFY_NUM)
 909                 return rte_flow_error_set(error, EINVAL,
 910                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 911                                           "too many items to modify");
 912         assert(conf->id != REG_NONE);
 913         assert(conf->id < RTE_DIM(reg_to_field));
 914         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 915         actions[i].field = reg_to_field[conf->id];
 916         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 917         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 918         ++i;
 919         resource->actions_num = i;
 920         return 0;
 921 }
 922
 923 /**
 924  * Convert SET_TAG action to DV specification.
 925  *
 926  * @param[in] dev
 927  *   Pointer to the rte_eth_dev structure.
 928  * @param[in,out] resource
 929  *   Pointer to the modify-header resource.
 930  * @param[in] conf
 931  *   Pointer to action specification.
 932  * @param[out] error
 933  *   Pointer to the error structure.
 934  *
 935  * @return
 936  *   0 on success, a negative errno value otherwise and rte_errno is set.
 937  */
 938 static int
 939 flow_dv_convert_action_set_tag
 940                         (struct rte_eth_dev *dev,
 941                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 942                          const struct rte_flow_action_set_tag *conf,
 943                          struct rte_flow_error *error)
 944 {
 945         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 946         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 947         struct rte_flow_item item = {
 948                 .spec = &data,
 949                 .mask = &mask,
 950         };
 951         struct field_modify_info reg_c_x[] = {
 952                 [1] = {0, 0, 0},
 953         };
 954         enum mlx5_modification_field reg_type;
 955         int ret;
 956
 957         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 958         if (ret < 0)
 959                 return ret;
 960         assert(ret != REG_NONE);
 961         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 962         reg_type = reg_to_field[ret];
 963         assert(reg_type > 0);
 964         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 965         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 966                                              MLX5_MODIFICATION_TYPE_SET, error);
 967 }
 968
 969 /**
 970  * Convert internal COPY_REG action to DV specification.
 971  *
 972  * @param[in] dev
 973  *   Pointer to the rte_eth_dev structure.
 974  * @param[in,out] res
 975  *   Pointer to the modify-header resource.
 976  * @param[in] action
 977  *   Pointer to action specification.
 978  * @param[out] error
 979  *   Pointer to the error structure.
 980  *
 981  * @return
 982  *   0 on success, a negative errno value otherwise and rte_errno is set.
 983  */
 984 static int
 985 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 986                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 987                                  const struct rte_flow_action *action,
 988                                  struct rte_flow_error *error)
 989 {
 990         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 991         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 992         struct rte_flow_item item = {
 993                 .spec = NULL,
 994                 .mask = &mask,
 995         };
 996         struct field_modify_info reg_src[] = {
 997                 {4, 0, reg_to_field[conf->src]},
 998                 {0, 0, 0},
 999         };
1000         struct field_modify_info reg_dst = {
1001                 .offset = 0,
1002                 .id = reg_to_field[conf->dst],
1003         };
1004         /* Adjust reg_c[0] usage according to reported mask. */
1005         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1006                 struct mlx5_priv *priv = dev->data->dev_private;
1007                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1008
1009                 assert(reg_c0);
1010                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1011                 if (conf->dst == REG_C_0) {
1012                         /* Copy to reg_c[0], within mask only. */
1013                         reg_dst.offset = rte_bsf32(reg_c0);
1014                         /*
1015                          * Mask is ignoring the enianness, because
1016                          * there is no conversion in datapath.
1017                          */
1018 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1019                         /* Copy from destination lower bits to reg_c[0]. */
1020                         mask = reg_c0 >> reg_dst.offset;
1021 #else
1022                         /* Copy from destination upper bits to reg_c[0]. */
1023                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1024                                           rte_fls_u32(reg_c0));
1025 #endif
1026                 } else {
1027                         mask = rte_cpu_to_be_32(reg_c0);
1028 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1029                         /* Copy from reg_c[0] to destination lower bits. */
1030                         reg_dst.offset = 0;
1031 #else
1032                         /* Copy from reg_c[0] to destination upper bits. */
1033                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1034                                          (rte_fls_u32(reg_c0) -
1035                                           rte_bsf32(reg_c0));
1036 #endif
1037                 }
1038         }
1039         return flow_dv_convert_modify_action(&item,
1040                                              reg_src, &reg_dst, res,
1041                                              MLX5_MODIFICATION_TYPE_COPY,
1042                                              error);
1043 }
1044
1045 /**
1046  * Convert MARK action to DV specification. This routine is used
1047  * in extensive metadata only and requires metadata register to be
1048  * handled. In legacy mode hardware tag resource is engaged.
1049  *
1050  * @param[in] dev
1051  *   Pointer to the rte_eth_dev structure.
1052  * @param[in] conf
1053  *   Pointer to MARK action specification.
1054  * @param[in,out] resource
1055  *   Pointer to the modify-header resource.
1056  * @param[out] error
1057  *   Pointer to the error structure.
1058  *
1059  * @return
1060  *   0 on success, a negative errno value otherwise and rte_errno is set.
1061  */
1062 static int
1063 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1064                             const struct rte_flow_action_mark *conf,
1065                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1066                             struct rte_flow_error *error)
1067 {
1068         struct mlx5_priv *priv = dev->data->dev_private;
1069         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1070                                            priv->sh->dv_mark_mask);
1071         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1072         struct rte_flow_item item = {
1073                 .spec = &data,
1074                 .mask = &mask,
1075         };
1076         struct field_modify_info reg_c_x[] = {
1077                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1078                 {0, 0, 0},
1079         };
1080         enum modify_reg reg;
1081
1082         if (!mask)
1083                 return rte_flow_error_set(error, EINVAL,
1084                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1085                                           NULL, "zero mark action mask");
1086         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1087         if (reg < 0)
1088                 return reg;
1089         assert(reg > 0);
1090         if (reg == REG_C_0) {
1091                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1092                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1093
1094                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1095                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1096                 mask = rte_cpu_to_be_32(mask << shl_c0);
1097         }
1098         reg_c_x[0].id = reg_to_field[reg];
1099         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1100                                              MLX5_MODIFICATION_TYPE_SET, error);
1101 }
1102
1103 /**
1104  * Get metadata register index for specified steering domain.
1105  *
1106  * @param[in] dev
1107  *   Pointer to the rte_eth_dev structure.
1108  * @param[in] attr
1109  *   Attributes of flow to determine steering domain.
1110  * @param[out] error
1111  *   Pointer to the error structure.
1112  *
1113  * @return
1114  *   positive index on success, a negative errno value otherwise
1115  *   and rte_errno is set.
1116  */
1117 static enum modify_reg
1118 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1119                          const struct rte_flow_attr *attr,
1120                          struct rte_flow_error *error)
1121 {
1122         enum modify_reg reg =
1123                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1124                                           MLX5_METADATA_FDB :
1125                                             attr->egress ?
1126                                             MLX5_METADATA_TX :
1127                                             MLX5_METADATA_RX, 0, error);
1128         if (reg < 0)
1129                 return rte_flow_error_set(error,
1130                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1131                                           NULL, "unavailable "
1132                                           "metadata register");
1133         return reg;
1134 }
1135
1136 /**
1137  * Convert SET_META action to DV specification.
1138  *
1139  * @param[in] dev
1140  *   Pointer to the rte_eth_dev structure.
1141  * @param[in,out] resource
1142  *   Pointer to the modify-header resource.
1143  * @param[in] attr
1144  *   Attributes of flow that includes this item.
1145  * @param[in] conf
1146  *   Pointer to action specification.
1147  * @param[out] error
1148  *   Pointer to the error structure.
1149  *
1150  * @return
1151  *   0 on success, a negative errno value otherwise and rte_errno is set.
1152  */
1153 static int
1154 flow_dv_convert_action_set_meta
1155                         (struct rte_eth_dev *dev,
1156                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1157                          const struct rte_flow_attr *attr,
1158                          const struct rte_flow_action_set_meta *conf,
1159                          struct rte_flow_error *error)
1160 {
1161         uint32_t data = conf->data;
1162         uint32_t mask = conf->mask;
1163         struct rte_flow_item item = {
1164                 .spec = &data,
1165                 .mask = &mask,
1166         };
1167         struct field_modify_info reg_c_x[] = {
1168                 [1] = {0, 0, 0},
1169         };
1170         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1171
1172         if (reg < 0)
1173                 return reg;
1174         /*
1175          * In datapath code there is no endianness
1176          * coversions for perfromance reasons, all
1177          * pattern conversions are done in rte_flow.
1178          */
1179         if (reg == REG_C_0) {
1180                 struct mlx5_priv *priv = dev->data->dev_private;
1181                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1182                 uint32_t shl_c0;
1183
1184                 assert(msk_c0);
1185 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1186                 shl_c0 = rte_bsf32(msk_c0);
1187 #else
1188                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1189 #endif
1190                 mask <<= shl_c0;
1191                 data <<= shl_c0;
1192                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1193         }
1194         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1195         /* The routine expects parameters in memory as big-endian ones. */
1196         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1197                                              MLX5_MODIFICATION_TYPE_SET, error);
1198 }
1199
1200 /**
1201  * Convert modify-header set IPv4 DSCP action to DV specification.
1202  *
1203  * @param[in,out] resource
1204  *   Pointer to the modify-header resource.
1205  * @param[in] action
1206  *   Pointer to action specification.
1207  * @param[out] error
1208  *   Pointer to the error structure.
1209  *
1210  * @return
1211  *   0 on success, a negative errno value otherwise and rte_errno is set.
1212  */
1213 static int
1214 flow_dv_convert_action_modify_ipv4_dscp
1215                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1216                          const struct rte_flow_action *action,
1217                          struct rte_flow_error *error)
1218 {
1219         const struct rte_flow_action_set_dscp *conf =
1220                 (const struct rte_flow_action_set_dscp *)(action->conf);
1221         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1222         struct rte_flow_item_ipv4 ipv4;
1223         struct rte_flow_item_ipv4 ipv4_mask;
1224
1225         memset(&ipv4, 0, sizeof(ipv4));
1226         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1227         ipv4.hdr.type_of_service = conf->dscp;
1228         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1229         item.spec = &ipv4;
1230         item.mask = &ipv4_mask;
1231         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1232                                              MLX5_MODIFICATION_TYPE_SET, error);
1233 }
1234
1235 /**
1236  * Convert modify-header set IPv6 DSCP action to DV specification.
1237  *
1238  * @param[in,out] resource
1239  *   Pointer to the modify-header resource.
1240  * @param[in] action
1241  *   Pointer to action specification.
1242  * @param[out] error
1243  *   Pointer to the error structure.
1244  *
1245  * @return
1246  *   0 on success, a negative errno value otherwise and rte_errno is set.
1247  */
1248 static int
1249 flow_dv_convert_action_modify_ipv6_dscp
1250                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1251                          const struct rte_flow_action *action,
1252                          struct rte_flow_error *error)
1253 {
1254         const struct rte_flow_action_set_dscp *conf =
1255                 (const struct rte_flow_action_set_dscp *)(action->conf);
1256         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1257         struct rte_flow_item_ipv6 ipv6;
1258         struct rte_flow_item_ipv6 ipv6_mask;
1259
1260         memset(&ipv6, 0, sizeof(ipv6));
1261         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1262         /*
1263          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1264          * rdma-core only accept the DSCP bits byte aligned start from
1265          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1266          * bits in IPv6 case as rdma-core requires byte aligned value.
1267          */
1268         ipv6.hdr.vtc_flow = conf->dscp;
1269         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1270         item.spec = &ipv6;
1271         item.mask = &ipv6_mask;
1272         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1273                                              MLX5_MODIFICATION_TYPE_SET, error);
1274 }
1275
1276 /**
1277  * Validate MARK item.
1278  *
1279  * @param[in] dev
1280  *   Pointer to the rte_eth_dev structure.
1281  * @param[in] item
1282  *   Item specification.
1283  * @param[in] attr
1284  *   Attributes of flow that includes this item.
1285  * @param[out] error
1286  *   Pointer to error structure.
1287  *
1288  * @return
1289  *   0 on success, a negative errno value otherwise and rte_errno is set.
1290  */
1291 static int
1292 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1293                            const struct rte_flow_item *item,
1294                            const struct rte_flow_attr *attr __rte_unused,
1295                            struct rte_flow_error *error)
1296 {
1297         struct mlx5_priv *priv = dev->data->dev_private;
1298         struct mlx5_dev_config *config = &priv->config;
1299         const struct rte_flow_item_mark *spec = item->spec;
1300         const struct rte_flow_item_mark *mask = item->mask;
1301         const struct rte_flow_item_mark nic_mask = {
1302                 .id = priv->sh->dv_mark_mask,
1303         };
1304         int ret;
1305
1306         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1307                 return rte_flow_error_set(error, ENOTSUP,
1308                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1309                                           "extended metadata feature"
1310                                           " isn't enabled");
1311         if (!mlx5_flow_ext_mreg_supported(dev))
1312                 return rte_flow_error_set(error, ENOTSUP,
1313                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1314                                           "extended metadata register"
1315                                           " isn't supported");
1316         if (!nic_mask.id)
1317                 return rte_flow_error_set(error, ENOTSUP,
1318                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1319                                           "extended metadata register"
1320                                           " isn't available");
1321         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1322         if (ret < 0)
1323                 return ret;
1324         if (!spec)
1325                 return rte_flow_error_set(error, EINVAL,
1326                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1327                                           item->spec,
1328                                           "data cannot be empty");
1329         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1330                 return rte_flow_error_set(error, EINVAL,
1331                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1332                                           &spec->id,
1333                                           "mark id exceeds the limit");
1334         if (!mask)
1335                 mask = &nic_mask;
1336         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1337                                         (const uint8_t *)&nic_mask,
1338                                         sizeof(struct rte_flow_item_mark),
1339                                         error);
1340         if (ret < 0)
1341                 return ret;
1342         return 0;
1343 }
1344
1345 /**
1346  * Validate META item.
1347  *
1348  * @param[in] dev
1349  *   Pointer to the rte_eth_dev structure.
1350  * @param[in] item
1351  *   Item specification.
1352  * @param[in] attr
1353  *   Attributes of flow that includes this item.
1354  * @param[out] error
1355  *   Pointer to error structure.
1356  *
1357  * @return
1358  *   0 on success, a negative errno value otherwise and rte_errno is set.
1359  */
1360 static int
1361 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1362                            const struct rte_flow_item *item,
1363                            const struct rte_flow_attr *attr,
1364                            struct rte_flow_error *error)
1365 {
1366         struct mlx5_priv *priv = dev->data->dev_private;
1367         struct mlx5_dev_config *config = &priv->config;
1368         const struct rte_flow_item_meta *spec = item->spec;
1369         const struct rte_flow_item_meta *mask = item->mask;
1370         struct rte_flow_item_meta nic_mask = {
1371                 .data = UINT32_MAX
1372         };
1373         enum modify_reg reg;
1374         int ret;
1375
1376         if (!spec)
1377                 return rte_flow_error_set(error, EINVAL,
1378                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1379                                           item->spec,
1380                                           "data cannot be empty");
1381         if (!spec->data)
1382                 return rte_flow_error_set(error, EINVAL,
1383                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1384                                           "data cannot be zero");
1385         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1386                 if (!mlx5_flow_ext_mreg_supported(dev))
1387                         return rte_flow_error_set(error, ENOTSUP,
1388                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1389                                           "extended metadata register"
1390                                           " isn't supported");
1391                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1392                 if (reg < 0)
1393                         return reg;
1394                 if (reg == REG_B)
1395                         return rte_flow_error_set(error, ENOTSUP,
1396                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1397                                           "match on reg_b "
1398                                           "isn't supported");
1399                 if (reg != REG_A)
1400                         nic_mask.data = priv->sh->dv_meta_mask;
1401         }
1402         if (!mask)
1403                 mask = &rte_flow_item_meta_mask;
1404         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1405                                         (const uint8_t *)&nic_mask,
1406                                         sizeof(struct rte_flow_item_meta),
1407                                         error);
1408         return ret;
1409 }
1410
1411 /**
1412  * Validate TAG item.
1413  *
1414  * @param[in] dev
1415  *   Pointer to the rte_eth_dev structure.
1416  * @param[in] item
1417  *   Item specification.
1418  * @param[in] attr
1419  *   Attributes of flow that includes this item.
1420  * @param[out] error
1421  *   Pointer to error structure.
1422  *
1423  * @return
1424  *   0 on success, a negative errno value otherwise and rte_errno is set.
1425  */
1426 static int
1427 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1428                           const struct rte_flow_item *item,
1429                           const struct rte_flow_attr *attr __rte_unused,
1430                           struct rte_flow_error *error)
1431 {
1432         const struct rte_flow_item_tag *spec = item->spec;
1433         const struct rte_flow_item_tag *mask = item->mask;
1434         const struct rte_flow_item_tag nic_mask = {
1435                 .data = RTE_BE32(UINT32_MAX),
1436                 .index = 0xff,
1437         };
1438         int ret;
1439
1440         if (!mlx5_flow_ext_mreg_supported(dev))
1441                 return rte_flow_error_set(error, ENOTSUP,
1442                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1443                                           "extensive metadata register"
1444                                           " isn't supported");
1445         if (!spec)
1446                 return rte_flow_error_set(error, EINVAL,
1447                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1448                                           item->spec,
1449                                           "data cannot be empty");
1450         if (!mask)
1451                 mask = &rte_flow_item_tag_mask;
1452         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1453                                         (const uint8_t *)&nic_mask,
1454                                         sizeof(struct rte_flow_item_tag),
1455                                         error);
1456         if (ret < 0)
1457                 return ret;
1458         if (mask->index != 0xff)
1459                 return rte_flow_error_set(error, EINVAL,
1460                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1461                                           "partial mask for tag index"
1462                                           " is not supported");
1463         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1464         if (ret < 0)
1465                 return ret;
1466         assert(ret != REG_NONE);
1467         return 0;
1468 }
1469
1470 /**
1471  * Validate vport item.
1472  *
1473  * @param[in] dev
1474  *   Pointer to the rte_eth_dev structure.
1475  * @param[in] item
1476  *   Item specification.
1477  * @param[in] attr
1478  *   Attributes of flow that includes this item.
1479  * @param[in] item_flags
1480  *   Bit-fields that holds the items detected until now.
1481  * @param[out] error
1482  *   Pointer to error structure.
1483  *
1484  * @return
1485  *   0 on success, a negative errno value otherwise and rte_errno is set.
1486  */
1487 static int
1488 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1489                               const struct rte_flow_item *item,
1490                               const struct rte_flow_attr *attr,
1491                               uint64_t item_flags,
1492                               struct rte_flow_error *error)
1493 {
1494         const struct rte_flow_item_port_id *spec = item->spec;
1495         const struct rte_flow_item_port_id *mask = item->mask;
1496         const struct rte_flow_item_port_id switch_mask = {
1497                         .id = 0xffffffff,
1498         };
1499         struct mlx5_priv *esw_priv;
1500         struct mlx5_priv *dev_priv;
1501         int ret;
1502
1503         if (!attr->transfer)
1504                 return rte_flow_error_set(error, EINVAL,
1505                                           RTE_FLOW_ERROR_TYPE_ITEM,
1506                                           NULL,
1507                                           "match on port id is valid only"
1508                                           " when transfer flag is enabled");
1509         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1510                 return rte_flow_error_set(error, ENOTSUP,
1511                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1512                                           "multiple source ports are not"
1513                                           " supported");
1514         if (!mask)
1515                 mask = &switch_mask;
1516         if (mask->id != 0xffffffff)
1517                 return rte_flow_error_set(error, ENOTSUP,
1518                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1519                                            mask,
1520                                            "no support for partial mask on"
1521                                            " \"id\" field");
1522         ret = mlx5_flow_item_acceptable
1523                                 (item, (const uint8_t *)mask,
1524                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1525                                  sizeof(struct rte_flow_item_port_id),
1526                                  error);
1527         if (ret)
1528                 return ret;
1529         if (!spec)
1530                 return 0;
1531         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1532         if (!esw_priv)
1533                 return rte_flow_error_set(error, rte_errno,
1534                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1535                                           "failed to obtain E-Switch info for"
1536                                           " port");
1537         dev_priv = mlx5_dev_to_eswitch_info(dev);
1538         if (!dev_priv)
1539                 return rte_flow_error_set(error, rte_errno,
1540                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1541                                           NULL,
1542                                           "failed to obtain E-Switch info");
1543         if (esw_priv->domain_id != dev_priv->domain_id)
1544                 return rte_flow_error_set(error, EINVAL,
1545                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1546                                           "cannot match on a port from a"
1547                                           " different E-Switch");
1548         return 0;
1549 }
1550
1551 /**
1552  * Validate GTP item.
1553  *
1554  * @param[in] dev
1555  *   Pointer to the rte_eth_dev structure.
1556  * @param[in] item
1557  *   Item specification.
1558  * @param[in] item_flags
1559  *   Bit-fields that holds the items detected until now.
1560  * @param[out] error
1561  *   Pointer to error structure.
1562  *
1563  * @return
1564  *   0 on success, a negative errno value otherwise and rte_errno is set.
1565  */
1566 static int
1567 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1568                           const struct rte_flow_item *item,
1569                           uint64_t item_flags,
1570                           struct rte_flow_error *error)
1571 {
1572         struct mlx5_priv *priv = dev->data->dev_private;
1573         const struct rte_flow_item_gtp *mask = item->mask;
1574         const struct rte_flow_item_gtp nic_mask = {
1575                 .msg_type = 0xff,
1576                 .teid = RTE_BE32(0xffffffff),
1577         };
1578
1579         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1580                 return rte_flow_error_set(error, ENOTSUP,
1581                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1582                                           "GTP support is not enabled");
1583         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1584                 return rte_flow_error_set(error, ENOTSUP,
1585                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1586                                           "multiple tunnel layers not"
1587                                           " supported");
1588         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1589                 return rte_flow_error_set(error, EINVAL,
1590                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1591                                           "no outer UDP layer found");
1592         if (!mask)
1593                 mask = &rte_flow_item_gtp_mask;
1594         return mlx5_flow_item_acceptable
1595                 (item, (const uint8_t *)mask,
1596                  (const uint8_t *)&nic_mask,
1597                  sizeof(struct rte_flow_item_gtp),
1598                  error);
1599 }
1600
1601 /**
1602  * Validate the pop VLAN action.
1603  *
1604  * @param[in] dev
1605  *   Pointer to the rte_eth_dev structure.
1606  * @param[in] action_flags
1607  *   Holds the actions detected until now.
1608  * @param[in] action
1609  *   Pointer to the pop vlan action.
1610  * @param[in] item_flags
1611  *   The items found in this flow rule.
1612  * @param[in] attr
1613  *   Pointer to flow attributes.
1614  * @param[out] error
1615  *   Pointer to error structure.
1616  *
1617  * @return
1618  *   0 on success, a negative errno value otherwise and rte_errno is set.
1619  */
1620 static int
1621 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1622                                  uint64_t action_flags,
1623                                  const struct rte_flow_action *action,
1624                                  uint64_t item_flags,
1625                                  const struct rte_flow_attr *attr,
1626                                  struct rte_flow_error *error)
1627 {
1628         struct mlx5_priv *priv = dev->data->dev_private;
1629
1630         (void)action;
1631         (void)attr;
1632         if (!priv->sh->pop_vlan_action)
1633                 return rte_flow_error_set(error, ENOTSUP,
1634                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1635                                           NULL,
1636                                           "pop vlan action is not supported");
1637         if (attr->egress)
1638                 return rte_flow_error_set(error, ENOTSUP,
1639                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1640                                           NULL,
1641                                           "pop vlan action not supported for "
1642                                           "egress");
1643         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1644                 return rte_flow_error_set(error, ENOTSUP,
1645                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1646                                           "no support for multiple VLAN "
1647                                           "actions");
1648         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1649                 return rte_flow_error_set(error, ENOTSUP,
1650                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1651                                           NULL,
1652                                           "cannot pop vlan without a "
1653                                           "match on (outer) vlan in the flow");
1654         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1655                 return rte_flow_error_set(error, EINVAL,
1656                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1657                                           "wrong action order, port_id should "
1658                                           "be after pop VLAN action");
1659         return 0;
1660 }
1661
1662 /**
1663  * Get VLAN default info from vlan match info.
1664  *
1665  * @param[in] dev
1666  *   Pointer to the rte_eth_dev structure.
1667  * @param[in] item
1668  *   the list of item specifications.
1669  * @param[out] vlan
1670  *   pointer VLAN info to fill to.
1671  * @param[out] error
1672  *   Pointer to error structure.
1673  *
1674  * @return
1675  *   0 on success, a negative errno value otherwise and rte_errno is set.
1676  */
1677 static void
1678 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1679                                   struct rte_vlan_hdr *vlan)
1680 {
1681         const struct rte_flow_item_vlan nic_mask = {
1682                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1683                                 MLX5DV_FLOW_VLAN_VID_MASK),
1684                 .inner_type = RTE_BE16(0xffff),
1685         };
1686
1687         if (items == NULL)
1688                 return;
1689         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1690                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1691                 ;
1692         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1693                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1694                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1695
1696                 if (!vlan_m)
1697                         vlan_m = &nic_mask;
1698                 /* Only full match values are accepted */
1699                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1700                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1701                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1702                         vlan->vlan_tci |=
1703                                 rte_be_to_cpu_16(vlan_v->tci &
1704                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1705                 }
1706                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1707                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1708                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1709                         vlan->vlan_tci |=
1710                                 rte_be_to_cpu_16(vlan_v->tci &
1711                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1712                 }
1713                 if (vlan_m->inner_type == nic_mask.inner_type)
1714                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1715                                                            vlan_m->inner_type);
1716         }
1717 }
1718
1719 /**
1720  * Validate the push VLAN action.
1721  *
1722  * @param[in] action_flags
1723  *   Holds the actions detected until now.
1724  * @param[in] action
1725  *   Pointer to the encap action.
1726  * @param[in] attr
1727  *   Pointer to flow attributes
1728  * @param[out] error
1729  *   Pointer to error structure.
1730  *
1731  * @return
1732  *   0 on success, a negative errno value otherwise and rte_errno is set.
1733  */
1734 static int
1735 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1736                                   uint64_t item_flags __rte_unused,
1737                                   const struct rte_flow_action *action,
1738                                   const struct rte_flow_attr *attr,
1739                                   struct rte_flow_error *error)
1740 {
1741         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1742
1743         if (attr->ingress)
1744                 return rte_flow_error_set(error, ENOTSUP,
1745                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1746                                           NULL,
1747                                           "push VLAN action not supported for "
1748                                           "ingress");
1749         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1750             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1751                 return rte_flow_error_set(error, EINVAL,
1752                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1753                                           "invalid vlan ethertype");
1754         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1755                 return rte_flow_error_set(error, ENOTSUP,
1756                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1757                                           "no support for multiple VLAN "
1758                                           "actions");
1759         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1760                 return rte_flow_error_set(error, EINVAL,
1761                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1762                                           "wrong action order, port_id should "
1763                                           "be after push VLAN");
1764         (void)attr;
1765         return 0;
1766 }
1767
1768 /**
1769  * Validate the set VLAN PCP.
1770  *
1771  * @param[in] action_flags
1772  *   Holds the actions detected until now.
1773  * @param[in] actions
1774  *   Pointer to the list of actions remaining in the flow rule.
1775  * @param[in] attr
1776  *   Pointer to flow attributes
1777  * @param[out] error
1778  *   Pointer to error structure.
1779  *
1780  * @return
1781  *   0 on success, a negative errno value otherwise and rte_errno is set.
1782  */
1783 static int
1784 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1785                                      const struct rte_flow_action actions[],
1786                                      struct rte_flow_error *error)
1787 {
1788         const struct rte_flow_action *action = actions;
1789         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1790
1791         if (conf->vlan_pcp > 7)
1792                 return rte_flow_error_set(error, EINVAL,
1793                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1794                                           "VLAN PCP value is too big");
1795         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1796                 return rte_flow_error_set(error, ENOTSUP,
1797                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1798                                           "set VLAN PCP action must follow "
1799                                           "the push VLAN action");
1800         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1801                 return rte_flow_error_set(error, ENOTSUP,
1802                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1803                                           "Multiple VLAN PCP modification are "
1804                                           "not supported");
1805         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1806                 return rte_flow_error_set(error, EINVAL,
1807                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1808                                           "wrong action order, port_id should "
1809                                           "be after set VLAN PCP");
1810         return 0;
1811 }
1812
1813 /**
1814  * Validate the set VLAN VID.
1815  *
1816  * @param[in] item_flags
1817  *   Holds the items detected in this rule.
1818  * @param[in] action_flags
1819  *   Holds the actions detected until now.
1820  * @param[in] actions
1821  *   Pointer to the list of actions remaining in the flow rule.
1822  * @param[out] error
1823  *   Pointer to error structure.
1824  *
1825  * @return
1826  *   0 on success, a negative errno value otherwise and rte_errno is set.
1827  */
1828 static int
1829 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1830                                      uint64_t action_flags,
1831                                      const struct rte_flow_action actions[],
1832                                      struct rte_flow_error *error)
1833 {
1834         const struct rte_flow_action *action = actions;
1835         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1836
1837         if (conf->vlan_vid > RTE_BE16(0xFFE))
1838                 return rte_flow_error_set(error, EINVAL,
1839                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1840                                           "VLAN VID value is too big");
1841         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1842             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1843                 return rte_flow_error_set(error, ENOTSUP,
1844                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1845                                           "set VLAN VID action must follow push"
1846                                           " VLAN action or match on VLAN item");
1847         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1848                 return rte_flow_error_set(error, ENOTSUP,
1849                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1850                                           "Multiple VLAN VID modifications are "
1851                                           "not supported");
1852         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1853                 return rte_flow_error_set(error, EINVAL,
1854                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1855                                           "wrong action order, port_id should "
1856                                           "be after set VLAN VID");
1857         return 0;
1858 }
1859
1860 /*
1861  * Validate the FLAG action.
1862  *
1863  * @param[in] dev
1864  *   Pointer to the rte_eth_dev structure.
1865  * @param[in] action_flags
1866  *   Holds the actions detected until now.
1867  * @param[in] attr
1868  *   Pointer to flow attributes
1869  * @param[out] error
1870  *   Pointer to error structure.
1871  *
1872  * @return
1873  *   0 on success, a negative errno value otherwise and rte_errno is set.
1874  */
1875 static int
1876 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1877                              uint64_t action_flags,
1878                              const struct rte_flow_attr *attr,
1879                              struct rte_flow_error *error)
1880 {
1881         struct mlx5_priv *priv = dev->data->dev_private;
1882         struct mlx5_dev_config *config = &priv->config;
1883         int ret;
1884
1885         /* Fall back if no extended metadata register support. */
1886         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1887                 return mlx5_flow_validate_action_flag(action_flags, attr,
1888                                                       error);
1889         /* Extensive metadata mode requires registers. */
1890         if (!mlx5_flow_ext_mreg_supported(dev))
1891                 return rte_flow_error_set(error, ENOTSUP,
1892                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1893                                           "no metadata registers "
1894                                           "to support flag action");
1895         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1896                 return rte_flow_error_set(error, ENOTSUP,
1897                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1898                                           "extended metadata register"
1899                                           " isn't available");
1900         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1901         if (ret < 0)
1902                 return ret;
1903         assert(ret > 0);
1904         if (action_flags & MLX5_FLOW_ACTION_MARK)
1905                 return rte_flow_error_set(error, EINVAL,
1906                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1907                                           "can't mark and flag in same flow");
1908         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1909                 return rte_flow_error_set(error, EINVAL,
1910                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1911                                           "can't have 2 flag"
1912                                           " actions in same flow");
1913         return 0;
1914 }
1915
1916 /**
1917  * Validate MARK action.
1918  *
1919  * @param[in] dev
1920  *   Pointer to the rte_eth_dev structure.
1921  * @param[in] action
1922  *   Pointer to action.
1923  * @param[in] action_flags
1924  *   Holds the actions detected until now.
1925  * @param[in] attr
1926  *   Pointer to flow attributes
1927  * @param[out] error
1928  *   Pointer to error structure.
1929  *
1930  * @return
1931  *   0 on success, a negative errno value otherwise and rte_errno is set.
1932  */
1933 static int
1934 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1935                              const struct rte_flow_action *action,
1936                              uint64_t action_flags,
1937                              const struct rte_flow_attr *attr,
1938                              struct rte_flow_error *error)
1939 {
1940         struct mlx5_priv *priv = dev->data->dev_private;
1941         struct mlx5_dev_config *config = &priv->config;
1942         const struct rte_flow_action_mark *mark = action->conf;
1943         int ret;
1944
1945         /* Fall back if no extended metadata register support. */
1946         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1947                 return mlx5_flow_validate_action_mark(action, action_flags,
1948                                                       attr, error);
1949         /* Extensive metadata mode requires registers. */
1950         if (!mlx5_flow_ext_mreg_supported(dev))
1951                 return rte_flow_error_set(error, ENOTSUP,
1952                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1953                                           "no metadata registers "
1954                                           "to support mark action");
1955         if (!priv->sh->dv_mark_mask)
1956                 return rte_flow_error_set(error, ENOTSUP,
1957                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1958                                           "extended metadata register"
1959                                           " isn't available");
1960         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1961         if (ret < 0)
1962                 return ret;
1963         assert(ret > 0);
1964         if (!mark)
1965                 return rte_flow_error_set(error, EINVAL,
1966                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1967                                           "configuration cannot be null");
1968         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1969                 return rte_flow_error_set(error, EINVAL,
1970                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1971                                           &mark->id,
1972                                           "mark id exceeds the limit");
1973         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1974                 return rte_flow_error_set(error, EINVAL,
1975                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1976                                           "can't flag and mark in same flow");
1977         if (action_flags & MLX5_FLOW_ACTION_MARK)
1978                 return rte_flow_error_set(error, EINVAL,
1979                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1980                                           "can't have 2 mark actions in same"
1981                                           " flow");
1982         return 0;
1983 }
1984
1985 /**
1986  * Validate SET_META action.
1987  *
1988  * @param[in] dev
1989  *   Pointer to the rte_eth_dev structure.
1990  * @param[in] action
1991  *   Pointer to the encap action.
1992  * @param[in] action_flags
1993  *   Holds the actions detected until now.
1994  * @param[in] attr
1995  *   Pointer to flow attributes
1996  * @param[out] error
1997  *   Pointer to error structure.
1998  *
1999  * @return
2000  *   0 on success, a negative errno value otherwise and rte_errno is set.
2001  */
2002 static int
2003 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2004                                  const struct rte_flow_action *action,
2005                                  uint64_t action_flags __rte_unused,
2006                                  const struct rte_flow_attr *attr,
2007                                  struct rte_flow_error *error)
2008 {
2009         const struct rte_flow_action_set_meta *conf;
2010         uint32_t nic_mask = UINT32_MAX;
2011         enum modify_reg reg;
2012
2013         if (!mlx5_flow_ext_mreg_supported(dev))
2014                 return rte_flow_error_set(error, ENOTSUP,
2015                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2016                                           "extended metadata register"
2017                                           " isn't supported");
2018         reg = flow_dv_get_metadata_reg(dev, attr, error);
2019         if (reg < 0)
2020                 return reg;
2021         if (reg != REG_A && reg != REG_B) {
2022                 struct mlx5_priv *priv = dev->data->dev_private;
2023
2024                 nic_mask = priv->sh->dv_meta_mask;
2025         }
2026         if (!(action->conf))
2027                 return rte_flow_error_set(error, EINVAL,
2028                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2029                                           "configuration cannot be null");
2030         conf = (const struct rte_flow_action_set_meta *)action->conf;
2031         if (!conf->mask)
2032                 return rte_flow_error_set(error, EINVAL,
2033                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2034                                           "zero mask doesn't have any effect");
2035         if (conf->mask & ~nic_mask)
2036                 return rte_flow_error_set(error, EINVAL,
2037                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2038                                           "meta data must be within reg C0");
2039         if (!(conf->data & conf->mask))
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2042                                           "zero value has no effect");
2043         return 0;
2044 }
2045
2046 /**
2047  * Validate SET_TAG action.
2048  *
2049  * @param[in] dev
2050  *   Pointer to the rte_eth_dev structure.
2051  * @param[in] action
2052  *   Pointer to the encap action.
2053  * @param[in] action_flags
2054  *   Holds the actions detected until now.
2055  * @param[in] attr
2056  *   Pointer to flow attributes
2057  * @param[out] error
2058  *   Pointer to error structure.
2059  *
2060  * @return
2061  *   0 on success, a negative errno value otherwise and rte_errno is set.
2062  */
2063 static int
2064 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2065                                 const struct rte_flow_action *action,
2066                                 uint64_t action_flags,
2067                                 const struct rte_flow_attr *attr,
2068                                 struct rte_flow_error *error)
2069 {
2070         const struct rte_flow_action_set_tag *conf;
2071         const uint64_t terminal_action_flags =
2072                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2073                 MLX5_FLOW_ACTION_RSS;
2074         int ret;
2075
2076         if (!mlx5_flow_ext_mreg_supported(dev))
2077                 return rte_flow_error_set(error, ENOTSUP,
2078                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2079                                           "extensive metadata register"
2080                                           " isn't supported");
2081         if (!(action->conf))
2082                 return rte_flow_error_set(error, EINVAL,
2083                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2084                                           "configuration cannot be null");
2085         conf = (const struct rte_flow_action_set_tag *)action->conf;
2086         if (!conf->mask)
2087                 return rte_flow_error_set(error, EINVAL,
2088                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2089                                           "zero mask doesn't have any effect");
2090         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2091         if (ret < 0)
2092                 return ret;
2093         if (!attr->transfer && attr->ingress &&
2094             (action_flags & terminal_action_flags))
2095                 return rte_flow_error_set(error, EINVAL,
2096                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2097                                           "set_tag has no effect"
2098                                           " with terminal actions");
2099         return 0;
2100 }
2101
2102 /**
2103  * Validate count action.
2104  *
2105  * @param[in] dev
2106  *   device otr.
2107  * @param[out] error
2108  *   Pointer to error structure.
2109  *
2110  * @return
2111  *   0 on success, a negative errno value otherwise and rte_errno is set.
2112  */
2113 static int
2114 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2115                               struct rte_flow_error *error)
2116 {
2117         struct mlx5_priv *priv = dev->data->dev_private;
2118
2119         if (!priv->config.devx)
2120                 goto notsup_err;
2121 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2122         return 0;
2123 #endif
2124 notsup_err:
2125         return rte_flow_error_set
2126                       (error, ENOTSUP,
2127                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2128                        NULL,
2129                        "count action not supported");
2130 }
2131
2132 /**
2133  * Validate the L2 encap action.
2134  *
2135  * @param[in] action_flags
2136  *   Holds the actions detected until now.
2137  * @param[in] action
2138  *   Pointer to the encap action.
2139  * @param[in] attr
2140  *   Pointer to flow attributes
2141  * @param[out] error
2142  *   Pointer to error structure.
2143  *
2144  * @return
2145  *   0 on success, a negative errno value otherwise and rte_errno is set.
2146  */
2147 static int
2148 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2149                                  const struct rte_flow_action *action,
2150                                  const struct rte_flow_attr *attr,
2151                                  struct rte_flow_error *error)
2152 {
2153         if (!(action->conf))
2154                 return rte_flow_error_set(error, EINVAL,
2155                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2156                                           "configuration cannot be null");
2157         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2158                 return rte_flow_error_set(error, EINVAL,
2159                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2160                                           "can only have a single encap or"
2161                                           " decap action in a flow");
2162         if (!attr->transfer && attr->ingress)
2163                 return rte_flow_error_set(error, ENOTSUP,
2164                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2165                                           NULL,
2166                                           "encap action not supported for "
2167                                           "ingress");
2168         return 0;
2169 }
2170
2171 /**
2172  * Validate the L2 decap action.
2173  *
2174  * @param[in] action_flags
2175  *   Holds the actions detected until now.
2176  * @param[in] attr
2177  *   Pointer to flow attributes
2178  * @param[out] error
2179  *   Pointer to error structure.
2180  *
2181  * @return
2182  *   0 on success, a negative errno value otherwise and rte_errno is set.
2183  */
2184 static int
2185 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2186                                  const struct rte_flow_attr *attr,
2187                                  struct rte_flow_error *error)
2188 {
2189         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2190                 return rte_flow_error_set(error, EINVAL,
2191                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2192                                           "can only have a single encap or"
2193                                           " decap action in a flow");
2194         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2195                 return rte_flow_error_set(error, EINVAL,
2196                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2197                                           "can't have decap action after"
2198                                           " modify action");
2199         if (attr->egress)
2200                 return rte_flow_error_set(error, ENOTSUP,
2201                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2202                                           NULL,
2203                                           "decap action not supported for "
2204                                           "egress");
2205         return 0;
2206 }
2207
2208 /**
2209  * Validate the raw encap action.
2210  *
2211  * @param[in] action_flags
2212  *   Holds the actions detected until now.
2213  * @param[in] action
2214  *   Pointer to the encap action.
2215  * @param[in] attr
2216  *   Pointer to flow attributes
2217  * @param[out] error
2218  *   Pointer to error structure.
2219  *
2220  * @return
2221  *   0 on success, a negative errno value otherwise and rte_errno is set.
2222  */
2223 static int
2224 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2225                                   const struct rte_flow_action *action,
2226                                   const struct rte_flow_attr *attr,
2227                                   struct rte_flow_error *error)
2228 {
2229         const struct rte_flow_action_raw_encap *raw_encap =
2230                 (const struct rte_flow_action_raw_encap *)action->conf;
2231         if (!(action->conf))
2232                 return rte_flow_error_set(error, EINVAL,
2233                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2234                                           "configuration cannot be null");
2235         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2236                 return rte_flow_error_set(error, EINVAL,
2237                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2238                                           "can only have a single encap"
2239                                           " action in a flow");
2240         /* encap without preceding decap is not supported for ingress */
2241         if (!attr->transfer &&  attr->ingress &&
2242             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2243                 return rte_flow_error_set(error, ENOTSUP,
2244                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2245                                           NULL,
2246                                           "encap action not supported for "
2247                                           "ingress");
2248         if (!raw_encap->size || !raw_encap->data)
2249                 return rte_flow_error_set(error, EINVAL,
2250                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2251                                           "raw encap data cannot be empty");
2252         return 0;
2253 }
2254
2255 /**
2256  * Validate the raw decap action.
2257  *
2258  * @param[in] action_flags
2259  *   Holds the actions detected until now.
2260  * @param[in] action
2261  *   Pointer to the encap action.
2262  * @param[in] attr
2263  *   Pointer to flow attributes
2264  * @param[out] error
2265  *   Pointer to error structure.
2266  *
2267  * @return
2268  *   0 on success, a negative errno value otherwise and rte_errno is set.
2269  */
2270 static int
2271 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2272                                   const struct rte_flow_action *action,
2273                                   const struct rte_flow_attr *attr,
2274                                   struct rte_flow_error *error)
2275 {
2276         const struct rte_flow_action_raw_decap *decap   = action->conf;
2277
2278         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2279                 return rte_flow_error_set(error, EINVAL,
2280                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2281                                           "can't have encap action before"
2282                                           " decap action");
2283         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2284                 return rte_flow_error_set(error, EINVAL,
2285                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2286                                           "can only have a single decap"
2287                                           " action in a flow");
2288         /* decap action is valid on egress only if it is followed by encap */
2289         if (attr->egress && decap &&
2290             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2291                 return rte_flow_error_set(error, ENOTSUP,
2292                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2293                                           NULL, "decap action not supported"
2294                                           " for egress");
2295         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2296                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2297                 return rte_flow_error_set(error, EINVAL,
2298                                           RTE_FLOW_ERROR_TYPE_ACTION,
2299                                           NULL,
2300                                           "can't have decap action "
2301                                           "after modify action");
2302         }
2303         return 0;
2304 }
2305
2306 /**
2307  * Find existing encap/decap resource or create and register a new one.
2308  *
2309  * @param[in, out] dev
2310  *   Pointer to rte_eth_dev structure.
2311  * @param[in, out] resource
2312  *   Pointer to encap/decap resource.
2313  * @parm[in, out] dev_flow
2314  *   Pointer to the dev_flow.
2315  * @param[out] error
2316  *   pointer to error structure.
2317  *
2318  * @return
2319  *   0 on success otherwise -errno and errno is set.
2320  */
2321 static int
2322 flow_dv_encap_decap_resource_register
2323                         (struct rte_eth_dev *dev,
2324                          struct mlx5_flow_dv_encap_decap_resource *resource,
2325                          struct mlx5_flow *dev_flow,
2326                          struct rte_flow_error *error)
2327 {
2328         struct mlx5_priv *priv = dev->data->dev_private;
2329         struct mlx5_ibv_shared *sh = priv->sh;
2330         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2331         struct mlx5dv_dr_domain *domain;
2332
2333         resource->flags = dev_flow->group ? 0 : 1;
2334         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2335                 domain = sh->fdb_domain;
2336         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2337                 domain = sh->rx_domain;
2338         else
2339                 domain = sh->tx_domain;
2340         /* Lookup a matching resource from cache. */
2341         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2342                 if (resource->reformat_type == cache_resource->reformat_type &&
2343                     resource->ft_type == cache_resource->ft_type &&
2344                     resource->flags == cache_resource->flags &&
2345                     resource->size == cache_resource->size &&
2346                     !memcmp((const void *)resource->buf,
2347                             (const void *)cache_resource->buf,
2348                             resource->size)) {
2349                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2350                                 (void *)cache_resource,
2351                                 rte_atomic32_read(&cache_resource->refcnt));
2352                         rte_atomic32_inc(&cache_resource->refcnt);
2353                         dev_flow->dv.encap_decap = cache_resource;
2354                         return 0;
2355                 }
2356         }
2357         /* Register new encap/decap resource. */
2358         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2359         if (!cache_resource)
2360                 return rte_flow_error_set(error, ENOMEM,
2361                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2362                                           "cannot allocate resource memory");
2363         *cache_resource = *resource;
2364         cache_resource->verbs_action =
2365                 mlx5_glue->dv_create_flow_action_packet_reformat
2366                         (sh->ctx, cache_resource->reformat_type,
2367                          cache_resource->ft_type, domain, cache_resource->flags,
2368                          cache_resource->size,
2369                          (cache_resource->size ? cache_resource->buf : NULL));
2370         if (!cache_resource->verbs_action) {
2371                 rte_free(cache_resource);
2372                 return rte_flow_error_set(error, ENOMEM,
2373                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2374                                           NULL, "cannot create action");
2375         }
2376         rte_atomic32_init(&cache_resource->refcnt);
2377         rte_atomic32_inc(&cache_resource->refcnt);
2378         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2379         dev_flow->dv.encap_decap = cache_resource;
2380         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2381                 (void *)cache_resource,
2382                 rte_atomic32_read(&cache_resource->refcnt));
2383         return 0;
2384 }
2385
2386 /**
2387  * Find existing table jump resource or create and register a new one.
2388  *
2389  * @param[in, out] dev
2390  *   Pointer to rte_eth_dev structure.
2391  * @param[in, out] tbl
2392  *   Pointer to flow table resource.
2393  * @parm[in, out] dev_flow
2394  *   Pointer to the dev_flow.
2395  * @param[out] error
2396  *   pointer to error structure.
2397  *
2398  * @return
2399  *   0 on success otherwise -errno and errno is set.
2400  */
2401 static int
2402 flow_dv_jump_tbl_resource_register
2403                         (struct rte_eth_dev *dev __rte_unused,
2404                          struct mlx5_flow_tbl_resource *tbl,
2405                          struct mlx5_flow *dev_flow,
2406                          struct rte_flow_error *error)
2407 {
2408         struct mlx5_flow_tbl_data_entry *tbl_data =
2409                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2410         int cnt;
2411
2412         assert(tbl);
2413         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2414         if (!cnt) {
2415                 tbl_data->jump.action =
2416                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2417                         (tbl->obj);
2418                 if (!tbl_data->jump.action)
2419                         return rte_flow_error_set(error, ENOMEM,
2420                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2421                                         NULL, "cannot create jump action");
2422                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2423                         (void *)&tbl_data->jump, cnt);
2424         } else {
2425                 assert(tbl_data->jump.action);
2426                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2427                         (void *)&tbl_data->jump, cnt);
2428         }
2429         rte_atomic32_inc(&tbl_data->jump.refcnt);
2430         dev_flow->dv.jump = &tbl_data->jump;
2431         return 0;
2432 }
2433
2434 /**
2435  * Find existing table port ID resource or create and register a new one.
2436  *
2437  * @param[in, out] dev
2438  *   Pointer to rte_eth_dev structure.
2439  * @param[in, out] resource
2440  *   Pointer to port ID action resource.
2441  * @parm[in, out] dev_flow
2442  *   Pointer to the dev_flow.
2443  * @param[out] error
2444  *   pointer to error structure.
2445  *
2446  * @return
2447  *   0 on success otherwise -errno and errno is set.
2448  */
2449 static int
2450 flow_dv_port_id_action_resource_register
2451                         (struct rte_eth_dev *dev,
2452                          struct mlx5_flow_dv_port_id_action_resource *resource,
2453                          struct mlx5_flow *dev_flow,
2454                          struct rte_flow_error *error)
2455 {
2456         struct mlx5_priv *priv = dev->data->dev_private;
2457         struct mlx5_ibv_shared *sh = priv->sh;
2458         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2459
2460         /* Lookup a matching resource from cache. */
2461         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2462                 if (resource->port_id == cache_resource->port_id) {
2463                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2464                                 "refcnt %d++",
2465                                 (void *)cache_resource,
2466                                 rte_atomic32_read(&cache_resource->refcnt));
2467                         rte_atomic32_inc(&cache_resource->refcnt);
2468                         dev_flow->dv.port_id_action = cache_resource;
2469                         return 0;
2470                 }
2471         }
2472         /* Register new port id action resource. */
2473         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2474         if (!cache_resource)
2475                 return rte_flow_error_set(error, ENOMEM,
2476                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2477                                           "cannot allocate resource memory");
2478         *cache_resource = *resource;
2479         /*
2480          * Depending on rdma_core version the glue routine calls
2481          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2482          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2483          */
2484         cache_resource->action =
2485                 mlx5_glue->dr_create_flow_action_dest_port
2486                         (priv->sh->fdb_domain, resource->port_id);
2487         if (!cache_resource->action) {
2488                 rte_free(cache_resource);
2489                 return rte_flow_error_set(error, ENOMEM,
2490                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2491                                           NULL, "cannot create action");
2492         }
2493         rte_atomic32_init(&cache_resource->refcnt);
2494         rte_atomic32_inc(&cache_resource->refcnt);
2495         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2496         dev_flow->dv.port_id_action = cache_resource;
2497         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2498                 (void *)cache_resource,
2499                 rte_atomic32_read(&cache_resource->refcnt));
2500         return 0;
2501 }
2502
2503 /**
2504  * Find existing push vlan resource or create and register a new one.
2505  *
2506  * @param [in, out] dev
2507  *   Pointer to rte_eth_dev structure.
2508  * @param[in, out] resource
2509  *   Pointer to port ID action resource.
2510  * @parm[in, out] dev_flow
2511  *   Pointer to the dev_flow.
2512  * @param[out] error
2513  *   pointer to error structure.
2514  *
2515  * @return
2516  *   0 on success otherwise -errno and errno is set.
2517  */
2518 static int
2519 flow_dv_push_vlan_action_resource_register
2520                        (struct rte_eth_dev *dev,
2521                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2522                         struct mlx5_flow *dev_flow,
2523                         struct rte_flow_error *error)
2524 {
2525         struct mlx5_priv *priv = dev->data->dev_private;
2526         struct mlx5_ibv_shared *sh = priv->sh;
2527         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2528         struct mlx5dv_dr_domain *domain;
2529
2530         /* Lookup a matching resource from cache. */
2531         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2532                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2533                     resource->ft_type == cache_resource->ft_type) {
2534                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2535                                 "refcnt %d++",
2536                                 (void *)cache_resource,
2537                                 rte_atomic32_read(&cache_resource->refcnt));
2538                         rte_atomic32_inc(&cache_resource->refcnt);
2539                         dev_flow->dv.push_vlan_res = cache_resource;
2540                         return 0;
2541                 }
2542         }
2543         /* Register new push_vlan action resource. */
2544         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2545         if (!cache_resource)
2546                 return rte_flow_error_set(error, ENOMEM,
2547                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2548                                           "cannot allocate resource memory");
2549         *cache_resource = *resource;
2550         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2551                 domain = sh->fdb_domain;
2552         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2553                 domain = sh->rx_domain;
2554         else
2555                 domain = sh->tx_domain;
2556         cache_resource->action =
2557                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2558                                                            resource->vlan_tag);
2559         if (!cache_resource->action) {
2560                 rte_free(cache_resource);
2561                 return rte_flow_error_set(error, ENOMEM,
2562                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2563                                           NULL, "cannot create action");
2564         }
2565         rte_atomic32_init(&cache_resource->refcnt);
2566         rte_atomic32_inc(&cache_resource->refcnt);
2567         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2568         dev_flow->dv.push_vlan_res = cache_resource;
2569         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2570                 (void *)cache_resource,
2571                 rte_atomic32_read(&cache_resource->refcnt));
2572         return 0;
2573 }
2574 /**
2575  * Get the size of specific rte_flow_item_type
2576  *
2577  * @param[in] item_type
2578  *   Tested rte_flow_item_type.
2579  *
2580  * @return
2581  *   sizeof struct item_type, 0 if void or irrelevant.
2582  */
2583 static size_t
2584 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2585 {
2586         size_t retval;
2587
2588         switch (item_type) {
2589         case RTE_FLOW_ITEM_TYPE_ETH:
2590                 retval = sizeof(struct rte_flow_item_eth);
2591                 break;
2592         case RTE_FLOW_ITEM_TYPE_VLAN:
2593                 retval = sizeof(struct rte_flow_item_vlan);
2594                 break;
2595         case RTE_FLOW_ITEM_TYPE_IPV4:
2596                 retval = sizeof(struct rte_flow_item_ipv4);
2597                 break;
2598         case RTE_FLOW_ITEM_TYPE_IPV6:
2599                 retval = sizeof(struct rte_flow_item_ipv6);
2600                 break;
2601         case RTE_FLOW_ITEM_TYPE_UDP:
2602                 retval = sizeof(struct rte_flow_item_udp);
2603                 break;
2604         case RTE_FLOW_ITEM_TYPE_TCP:
2605                 retval = sizeof(struct rte_flow_item_tcp);
2606                 break;
2607         case RTE_FLOW_ITEM_TYPE_VXLAN:
2608                 retval = sizeof(struct rte_flow_item_vxlan);
2609                 break;
2610         case RTE_FLOW_ITEM_TYPE_GRE:
2611                 retval = sizeof(struct rte_flow_item_gre);
2612                 break;
2613         case RTE_FLOW_ITEM_TYPE_NVGRE:
2614                 retval = sizeof(struct rte_flow_item_nvgre);
2615                 break;
2616         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2617                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2618                 break;
2619         case RTE_FLOW_ITEM_TYPE_MPLS:
2620                 retval = sizeof(struct rte_flow_item_mpls);
2621                 break;
2622         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2623         default:
2624                 retval = 0;
2625                 break;
2626         }
2627         return retval;
2628 }
2629
2630 #define MLX5_ENCAP_IPV4_VERSION         0x40
2631 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2632 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2633 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2634 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2635 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2636 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2637
2638 /**
2639  * Convert the encap action data from list of rte_flow_item to raw buffer
2640  *
2641  * @param[in] items
2642  *   Pointer to rte_flow_item objects list.
2643  * @param[out] buf
2644  *   Pointer to the output buffer.
2645  * @param[out] size
2646  *   Pointer to the output buffer size.
2647  * @param[out] error
2648  *   Pointer to the error structure.
2649  *
2650  * @return
2651  *   0 on success, a negative errno value otherwise and rte_errno is set.
2652  */
2653 static int
2654 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2655                            size_t *size, struct rte_flow_error *error)
2656 {
2657         struct rte_ether_hdr *eth = NULL;
2658         struct rte_vlan_hdr *vlan = NULL;
2659         struct rte_ipv4_hdr *ipv4 = NULL;
2660         struct rte_ipv6_hdr *ipv6 = NULL;
2661         struct rte_udp_hdr *udp = NULL;
2662         struct rte_vxlan_hdr *vxlan = NULL;
2663         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2664         struct rte_gre_hdr *gre = NULL;
2665         size_t len;
2666         size_t temp_size = 0;
2667
2668         if (!items)
2669                 return rte_flow_error_set(error, EINVAL,
2670                                           RTE_FLOW_ERROR_TYPE_ACTION,
2671                                           NULL, "invalid empty data");
2672         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2673                 len = flow_dv_get_item_len(items->type);
2674                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2675                         return rte_flow_error_set(error, EINVAL,
2676                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2677                                                   (void *)items->type,
2678                                                   "items total size is too big"
2679                                                   " for encap action");
2680                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2681                 switch (items->type) {
2682                 case RTE_FLOW_ITEM_TYPE_ETH:
2683                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2684                         break;
2685                 case RTE_FLOW_ITEM_TYPE_VLAN:
2686                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2687                         if (!eth)
2688                                 return rte_flow_error_set(error, EINVAL,
2689                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2690                                                 (void *)items->type,
2691                                                 "eth header not found");
2692                         if (!eth->ether_type)
2693                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2694                         break;
2695                 case RTE_FLOW_ITEM_TYPE_IPV4:
2696                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2697                         if (!vlan && !eth)
2698                                 return rte_flow_error_set(error, EINVAL,
2699                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2700                                                 (void *)items->type,
2701                                                 "neither eth nor vlan"
2702                                                 " header found");
2703                         if (vlan && !vlan->eth_proto)
2704                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2705                         else if (eth && !eth->ether_type)
2706                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2707                         if (!ipv4->version_ihl)
2708                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2709                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2710                         if (!ipv4->time_to_live)
2711                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2712                         break;
2713                 case RTE_FLOW_ITEM_TYPE_IPV6:
2714                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2715                         if (!vlan && !eth)
2716                                 return rte_flow_error_set(error, EINVAL,
2717                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2718                                                 (void *)items->type,
2719                                                 "neither eth nor vlan"
2720                                                 " header found");
2721                         if (vlan && !vlan->eth_proto)
2722                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2723                         else if (eth && !eth->ether_type)
2724                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2725                         if (!ipv6->vtc_flow)
2726                                 ipv6->vtc_flow =
2727                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2728                         if (!ipv6->hop_limits)
2729                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2730                         break;
2731                 case RTE_FLOW_ITEM_TYPE_UDP:
2732                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2733                         if (!ipv4 && !ipv6)
2734                                 return rte_flow_error_set(error, EINVAL,
2735                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2736                                                 (void *)items->type,
2737                                                 "ip header not found");
2738                         if (ipv4 && !ipv4->next_proto_id)
2739                                 ipv4->next_proto_id = IPPROTO_UDP;
2740                         else if (ipv6 && !ipv6->proto)
2741                                 ipv6->proto = IPPROTO_UDP;
2742                         break;
2743                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2744                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2745                         if (!udp)
2746                                 return rte_flow_error_set(error, EINVAL,
2747                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2748                                                 (void *)items->type,
2749                                                 "udp header not found");
2750                         if (!udp->dst_port)
2751                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2752                         if (!vxlan->vx_flags)
2753                                 vxlan->vx_flags =
2754                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2755                         break;
2756                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2757                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2758                         if (!udp)
2759                                 return rte_flow_error_set(error, EINVAL,
2760                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2761                                                 (void *)items->type,
2762                                                 "udp header not found");
2763                         if (!vxlan_gpe->proto)
2764                                 return rte_flow_error_set(error, EINVAL,
2765                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2766                                                 (void *)items->type,
2767                                                 "next protocol not found");
2768                         if (!udp->dst_port)
2769                                 udp->dst_port =
2770                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2771                         if (!vxlan_gpe->vx_flags)
2772                                 vxlan_gpe->vx_flags =
2773                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2774                         break;
2775                 case RTE_FLOW_ITEM_TYPE_GRE:
2776                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2777                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2778                         if (!gre->proto)
2779                                 return rte_flow_error_set(error, EINVAL,
2780                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2781                                                 (void *)items->type,
2782                                                 "next protocol not found");
2783                         if (!ipv4 && !ipv6)
2784                                 return rte_flow_error_set(error, EINVAL,
2785                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2786                                                 (void *)items->type,
2787                                                 "ip header not found");
2788                         if (ipv4 && !ipv4->next_proto_id)
2789                                 ipv4->next_proto_id = IPPROTO_GRE;
2790                         else if (ipv6 && !ipv6->proto)
2791                                 ipv6->proto = IPPROTO_GRE;
2792                         break;
2793                 case RTE_FLOW_ITEM_TYPE_VOID:
2794                         break;
2795                 default:
2796                         return rte_flow_error_set(error, EINVAL,
2797                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2798                                                   (void *)items->type,
2799                                                   "unsupported item type");
2800                         break;
2801                 }
2802                 temp_size += len;
2803         }
2804         *size = temp_size;
2805         return 0;
2806 }
2807
2808 static int
2809 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2810 {
2811         struct rte_ether_hdr *eth = NULL;
2812         struct rte_vlan_hdr *vlan = NULL;
2813         struct rte_ipv6_hdr *ipv6 = NULL;
2814         struct rte_udp_hdr *udp = NULL;
2815         char *next_hdr;
2816         uint16_t proto;
2817
2818         eth = (struct rte_ether_hdr *)data;
2819         next_hdr = (char *)(eth + 1);
2820         proto = RTE_BE16(eth->ether_type);
2821
2822         /* VLAN skipping */
2823         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2824                 vlan = (struct rte_vlan_hdr *)next_hdr;
2825                 proto = RTE_BE16(vlan->eth_proto);
2826                 next_hdr += sizeof(struct rte_vlan_hdr);
2827         }
2828
2829         /* HW calculates IPv4 csum. no need to proceed */
2830         if (proto == RTE_ETHER_TYPE_IPV4)
2831                 return 0;
2832
2833         /* non IPv4/IPv6 header. not supported */
2834         if (proto != RTE_ETHER_TYPE_IPV6) {
2835                 return rte_flow_error_set(error, ENOTSUP,
2836                                           RTE_FLOW_ERROR_TYPE_ACTION,
2837                                           NULL, "Cannot offload non IPv4/IPv6");
2838         }
2839
2840         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2841
2842         /* ignore non UDP */
2843         if (ipv6->proto != IPPROTO_UDP)
2844                 return 0;
2845
2846         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2847         udp->dgram_cksum = 0;
2848
2849         return 0;
2850 }
2851
2852 /**
2853  * Convert L2 encap action to DV specification.
2854  *
2855  * @param[in] dev
2856  *   Pointer to rte_eth_dev structure.
2857  * @param[in] action
2858  *   Pointer to action structure.
2859  * @param[in, out] dev_flow
2860  *   Pointer to the mlx5_flow.
2861  * @param[in] transfer
2862  *   Mark if the flow is E-Switch flow.
2863  * @param[out] error
2864  *   Pointer to the error structure.
2865  *
2866  * @return
2867  *   0 on success, a negative errno value otherwise and rte_errno is set.
2868  */
2869 static int
2870 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2871                                const struct rte_flow_action *action,
2872                                struct mlx5_flow *dev_flow,
2873                                uint8_t transfer,
2874                                struct rte_flow_error *error)
2875 {
2876         const struct rte_flow_item *encap_data;
2877         const struct rte_flow_action_raw_encap *raw_encap_data;
2878         struct mlx5_flow_dv_encap_decap_resource res = {
2879                 .reformat_type =
2880                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2881                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2882                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2883         };
2884
2885         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2886                 raw_encap_data =
2887                         (const struct rte_flow_action_raw_encap *)action->conf;
2888                 res.size = raw_encap_data->size;
2889                 memcpy(res.buf, raw_encap_data->data, res.size);
2890                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2891                         return -rte_errno;
2892         } else {
2893                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2894                         encap_data =
2895                                 ((const struct rte_flow_action_vxlan_encap *)
2896                                                 action->conf)->definition;
2897                 else
2898                         encap_data =
2899                                 ((const struct rte_flow_action_nvgre_encap *)
2900                                                 action->conf)->definition;
2901                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2902                                                &res.size, error))
2903                         return -rte_errno;
2904         }
2905         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2906                 return rte_flow_error_set(error, EINVAL,
2907                                           RTE_FLOW_ERROR_TYPE_ACTION,
2908                                           NULL, "can't create L2 encap action");
2909         return 0;
2910 }
2911
2912 /**
2913  * Convert L2 decap action to DV specification.
2914  *
2915  * @param[in] dev
2916  *   Pointer to rte_eth_dev structure.
2917  * @param[in, out] dev_flow
2918  *   Pointer to the mlx5_flow.
2919  * @param[in] transfer
2920  *   Mark if the flow is E-Switch flow.
2921  * @param[out] error
2922  *   Pointer to the error structure.
2923  *
2924  * @return
2925  *   0 on success, a negative errno value otherwise and rte_errno is set.
2926  */
2927 static int
2928 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2929                                struct mlx5_flow *dev_flow,
2930                                uint8_t transfer,
2931                                struct rte_flow_error *error)
2932 {
2933         struct mlx5_flow_dv_encap_decap_resource res = {
2934                 .size = 0,
2935                 .reformat_type =
2936                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2937                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2938                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2939         };
2940
2941         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2942                 return rte_flow_error_set(error, EINVAL,
2943                                           RTE_FLOW_ERROR_TYPE_ACTION,
2944                                           NULL, "can't create L2 decap action");
2945         return 0;
2946 }
2947
2948 /**
2949  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2950  *
2951  * @param[in] dev
2952  *   Pointer to rte_eth_dev structure.
2953  * @param[in] action
2954  *   Pointer to action structure.
2955  * @param[in, out] dev_flow
2956  *   Pointer to the mlx5_flow.
2957  * @param[in] attr
2958  *   Pointer to the flow attributes.
2959  * @param[out] error
2960  *   Pointer to the error structure.
2961  *
2962  * @return
2963  *   0 on success, a negative errno value otherwise and rte_errno is set.
2964  */
2965 static int
2966 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2967                                 const struct rte_flow_action *action,
2968                                 struct mlx5_flow *dev_flow,
2969                                 const struct rte_flow_attr *attr,
2970                                 struct rte_flow_error *error)
2971 {
2972         const struct rte_flow_action_raw_encap *encap_data;
2973         struct mlx5_flow_dv_encap_decap_resource res;
2974
2975         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2976         res.size = encap_data->size;
2977         memcpy(res.buf, encap_data->data, res.size);
2978         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
2979                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
2980                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
2981         if (attr->transfer)
2982                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2983         else
2984                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2985                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2986         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2987                 return rte_flow_error_set(error, EINVAL,
2988                                           RTE_FLOW_ERROR_TYPE_ACTION,
2989                                           NULL, "can't create encap action");
2990         return 0;
2991 }
2992
2993 /**
2994  * Create action push VLAN.
2995  *
2996  * @param[in] dev
2997  *   Pointer to rte_eth_dev structure.
2998  * @param[in] vlan_tag
2999  *   the vlan tag to push to the Ethernet header.
3000  * @param[in, out] dev_flow
3001  *   Pointer to the mlx5_flow.
3002  * @param[in] attr
3003  *   Pointer to the flow attributes.
3004  * @param[out] error
3005  *   Pointer to the error structure.
3006  *
3007  * @return
3008  *   0 on success, a negative errno value otherwise and rte_errno is set.
3009  */
3010 static int
3011 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3012                                 const struct rte_flow_attr *attr,
3013                                 const struct rte_vlan_hdr *vlan,
3014                                 struct mlx5_flow *dev_flow,
3015                                 struct rte_flow_error *error)
3016 {
3017         struct mlx5_flow_dv_push_vlan_action_resource res;
3018
3019         res.vlan_tag =
3020                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3021                                  vlan->vlan_tci);
3022         if (attr->transfer)
3023                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3024         else
3025                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3026                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3027         return flow_dv_push_vlan_action_resource_register
3028                                             (dev, &res, dev_flow, error);
3029 }
3030
3031 /**
3032  * Validate the modify-header actions.
3033  *
3034  * @param[in] action_flags
3035  *   Holds the actions detected until now.
3036  * @param[in] action
3037  *   Pointer to the modify action.
3038  * @param[out] error
3039  *   Pointer to error structure.
3040  *
3041  * @return
3042  *   0 on success, a negative errno value otherwise and rte_errno is set.
3043  */
3044 static int
3045 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3046                                    const struct rte_flow_action *action,
3047                                    struct rte_flow_error *error)
3048 {
3049         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3050                 return rte_flow_error_set(error, EINVAL,
3051                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3052                                           NULL, "action configuration not set");
3053         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
3054                 return rte_flow_error_set(error, EINVAL,
3055                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3056                                           "can't have encap action before"
3057                                           " modify action");
3058         return 0;
3059 }
3060
3061 /**
3062  * Validate the modify-header MAC address actions.
3063  *
3064  * @param[in] action_flags
3065  *   Holds the actions detected until now.
3066  * @param[in] action
3067  *   Pointer to the modify action.
3068  * @param[in] item_flags
3069  *   Holds the items detected.
3070  * @param[out] error
3071  *   Pointer to error structure.
3072  *
3073  * @return
3074  *   0 on success, a negative errno value otherwise and rte_errno is set.
3075  */
3076 static int
3077 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3078                                    const struct rte_flow_action *action,
3079                                    const uint64_t item_flags,
3080                                    struct rte_flow_error *error)
3081 {
3082         int ret = 0;
3083
3084         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3085         if (!ret) {
3086                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3087                         return rte_flow_error_set(error, EINVAL,
3088                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3089                                                   NULL,
3090                                                   "no L2 item in pattern");
3091         }
3092         return ret;
3093 }
3094
3095 /**
3096  * Validate the modify-header IPv4 address actions.
3097  *
3098  * @param[in] action_flags
3099  *   Holds the actions detected until now.
3100  * @param[in] action
3101  *   Pointer to the modify action.
3102  * @param[in] item_flags
3103  *   Holds the items detected.
3104  * @param[out] error
3105  *   Pointer to error structure.
3106  *
3107  * @return
3108  *   0 on success, a negative errno value otherwise and rte_errno is set.
3109  */
3110 static int
3111 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3112                                     const struct rte_flow_action *action,
3113                                     const uint64_t item_flags,
3114                                     struct rte_flow_error *error)
3115 {
3116         int ret = 0;
3117
3118         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3119         if (!ret) {
3120                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3121                         return rte_flow_error_set(error, EINVAL,
3122                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3123                                                   NULL,
3124                                                   "no ipv4 item in pattern");
3125         }
3126         return ret;
3127 }
3128
3129 /**
3130  * Validate the modify-header IPv6 address actions.
3131  *
3132  * @param[in] action_flags
3133  *   Holds the actions detected until now.
3134  * @param[in] action
3135  *   Pointer to the modify action.
3136  * @param[in] item_flags
3137  *   Holds the items detected.
3138  * @param[out] error
3139  *   Pointer to error structure.
3140  *
3141  * @return
3142  *   0 on success, a negative errno value otherwise and rte_errno is set.
3143  */
3144 static int
3145 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3146                                     const struct rte_flow_action *action,
3147                                     const uint64_t item_flags,
3148                                     struct rte_flow_error *error)
3149 {
3150         int ret = 0;
3151
3152         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3153         if (!ret) {
3154                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3155                         return rte_flow_error_set(error, EINVAL,
3156                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3157                                                   NULL,
3158                                                   "no ipv6 item in pattern");
3159         }
3160         return ret;
3161 }
3162
3163 /**
3164  * Validate the modify-header TP actions.
3165  *
3166  * @param[in] action_flags
3167  *   Holds the actions detected until now.
3168  * @param[in] action
3169  *   Pointer to the modify action.
3170  * @param[in] item_flags
3171  *   Holds the items detected.
3172  * @param[out] error
3173  *   Pointer to error structure.
3174  *
3175  * @return
3176  *   0 on success, a negative errno value otherwise and rte_errno is set.
3177  */
3178 static int
3179 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3180                                   const struct rte_flow_action *action,
3181                                   const uint64_t item_flags,
3182                                   struct rte_flow_error *error)
3183 {
3184         int ret = 0;
3185
3186         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3187         if (!ret) {
3188                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3189                         return rte_flow_error_set(error, EINVAL,
3190                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3191                                                   NULL, "no transport layer "
3192                                                   "in pattern");
3193         }
3194         return ret;
3195 }
3196
3197 /**
3198  * Validate the modify-header actions of increment/decrement
3199  * TCP Sequence-number.
3200  *
3201  * @param[in] action_flags
3202  *   Holds the actions detected until now.
3203  * @param[in] action
3204  *   Pointer to the modify action.
3205  * @param[in] item_flags
3206  *   Holds the items detected.
3207  * @param[out] error
3208  *   Pointer to error structure.
3209  *
3210  * @return
3211  *   0 on success, a negative errno value otherwise and rte_errno is set.
3212  */
3213 static int
3214 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3215                                        const struct rte_flow_action *action,
3216                                        const uint64_t item_flags,
3217                                        struct rte_flow_error *error)
3218 {
3219         int ret = 0;
3220
3221         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3222         if (!ret) {
3223                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3224                         return rte_flow_error_set(error, EINVAL,
3225                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3226                                                   NULL, "no TCP item in"
3227                                                   " pattern");
3228                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3229                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3230                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3231                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3232                         return rte_flow_error_set(error, EINVAL,
3233                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3234                                                   NULL,
3235                                                   "cannot decrease and increase"
3236                                                   " TCP sequence number"
3237                                                   " at the same time");
3238         }
3239         return ret;
3240 }
3241
3242 /**
3243  * Validate the modify-header actions of increment/decrement
3244  * TCP Acknowledgment number.
3245  *
3246  * @param[in] action_flags
3247  *   Holds the actions detected until now.
3248  * @param[in] action
3249  *   Pointer to the modify action.
3250  * @param[in] item_flags
3251  *   Holds the items detected.
3252  * @param[out] error
3253  *   Pointer to error structure.
3254  *
3255  * @return
3256  *   0 on success, a negative errno value otherwise and rte_errno is set.
3257  */
3258 static int
3259 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3260                                        const struct rte_flow_action *action,
3261                                        const uint64_t item_flags,
3262                                        struct rte_flow_error *error)
3263 {
3264         int ret = 0;
3265
3266         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3267         if (!ret) {
3268                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3269                         return rte_flow_error_set(error, EINVAL,
3270                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3271                                                   NULL, "no TCP item in"
3272                                                   " pattern");
3273                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3274                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3275                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3276                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3277                         return rte_flow_error_set(error, EINVAL,
3278                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3279                                                   NULL,
3280                                                   "cannot decrease and increase"
3281                                                   " TCP acknowledgment number"
3282                                                   " at the same time");
3283         }
3284         return ret;
3285 }
3286
3287 /**
3288  * Validate the modify-header TTL actions.
3289  *
3290  * @param[in] action_flags
3291  *   Holds the actions detected until now.
3292  * @param[in] action
3293  *   Pointer to the modify action.
3294  * @param[in] item_flags
3295  *   Holds the items detected.
3296  * @param[out] error
3297  *   Pointer to error structure.
3298  *
3299  * @return
3300  *   0 on success, a negative errno value otherwise and rte_errno is set.
3301  */
3302 static int
3303 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3304                                    const struct rte_flow_action *action,
3305                                    const uint64_t item_flags,
3306                                    struct rte_flow_error *error)
3307 {
3308         int ret = 0;
3309
3310         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3311         if (!ret) {
3312                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3313                         return rte_flow_error_set(error, EINVAL,
3314                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3315                                                   NULL,
3316                                                   "no IP protocol in pattern");
3317         }
3318         return ret;
3319 }
3320
3321 /**
3322  * Validate jump action.
3323  *
3324  * @param[in] action
3325  *   Pointer to the jump action.
3326  * @param[in] action_flags
3327  *   Holds the actions detected until now.
3328  * @param[in] attributes
3329  *   Pointer to flow attributes
3330  * @param[in] external
3331  *   Action belongs to flow rule created by request external to PMD.
3332  * @param[out] error
3333  *   Pointer to error structure.
3334  *
3335  * @return
3336  *   0 on success, a negative errno value otherwise and rte_errno is set.
3337  */
3338 static int
3339 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3340                              uint64_t action_flags,
3341                              const struct rte_flow_attr *attributes,
3342                              bool external, struct rte_flow_error *error)
3343 {
3344         uint32_t target_group, table;
3345         int ret = 0;
3346
3347         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3348                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3349                 return rte_flow_error_set(error, EINVAL,
3350                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3351                                           "can't have 2 fate actions in"
3352                                           " same flow");
3353         if (action_flags & MLX5_FLOW_ACTION_METER)
3354                 return rte_flow_error_set(error, ENOTSUP,
3355                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3356                                           "jump with meter not support");
3357         if (!action->conf)
3358                 return rte_flow_error_set(error, EINVAL,
3359                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3360                                           NULL, "action configuration not set");
3361         target_group =
3362                 ((const struct rte_flow_action_jump *)action->conf)->group;
3363         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3364                                        &table, error);
3365         if (ret)
3366                 return ret;
3367         if (attributes->group == target_group)
3368                 return rte_flow_error_set(error, EINVAL,
3369                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3370                                           "target group must be other than"
3371                                           " the current flow group");
3372         return 0;
3373 }
3374
3375 /*
3376  * Validate the port_id action.
3377  *
3378  * @param[in] dev
3379  *   Pointer to rte_eth_dev structure.
3380  * @param[in] action_flags
3381  *   Bit-fields that holds the actions detected until now.
3382  * @param[in] action
3383  *   Port_id RTE action structure.
3384  * @param[in] attr
3385  *   Attributes of flow that includes this action.
3386  * @param[out] error
3387  *   Pointer to error structure.
3388  *
3389  * @return
3390  *   0 on success, a negative errno value otherwise and rte_errno is set.
3391  */
3392 static int
3393 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3394                                 uint64_t action_flags,
3395                                 const struct rte_flow_action *action,
3396                                 const struct rte_flow_attr *attr,
3397                                 struct rte_flow_error *error)
3398 {
3399         const struct rte_flow_action_port_id *port_id;
3400         struct mlx5_priv *act_priv;
3401         struct mlx5_priv *dev_priv;
3402         uint16_t port;
3403
3404         if (!attr->transfer)
3405                 return rte_flow_error_set(error, ENOTSUP,
3406                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3407                                           NULL,
3408                                           "port id action is valid in transfer"
3409                                           " mode only");
3410         if (!action || !action->conf)
3411                 return rte_flow_error_set(error, ENOTSUP,
3412                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3413                                           NULL,
3414                                           "port id action parameters must be"
3415                                           " specified");
3416         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3417                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3418                 return rte_flow_error_set(error, EINVAL,
3419                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3420                                           "can have only one fate actions in"
3421                                           " a flow");
3422         dev_priv = mlx5_dev_to_eswitch_info(dev);
3423         if (!dev_priv)
3424                 return rte_flow_error_set(error, rte_errno,
3425                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3426                                           NULL,
3427                                           "failed to obtain E-Switch info");
3428         port_id = action->conf;
3429         port = port_id->original ? dev->data->port_id : port_id->id;
3430         act_priv = mlx5_port_to_eswitch_info(port, false);
3431         if (!act_priv)
3432                 return rte_flow_error_set
3433                                 (error, rte_errno,
3434                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3435                                  "failed to obtain E-Switch port id for port");
3436         if (act_priv->domain_id != dev_priv->domain_id)
3437                 return rte_flow_error_set
3438                                 (error, EINVAL,
3439                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3440                                  "port does not belong to"
3441                                  " E-Switch being configured");
3442         return 0;
3443 }
3444
3445 /**
3446  * Get the maximum number of modify header actions.
3447  *
3448  * @param dev
3449  *   Pointer to rte_eth_dev structure.
3450  * @param flags
3451  *   Flags bits to check if root level.
3452  *
3453  * @return
3454  *   Max number of modify header actions device can support.
3455  */
3456 static unsigned int
3457 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3458 {
3459         /*
3460          * There's no way to directly query the max cap. Although it has to be
3461          * acquried by iterative trial, it is a safe assumption that more
3462          * actions are supported by FW if extensive metadata register is
3463          * supported. (Only in the root table)
3464          */
3465         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3466                 return MLX5_MAX_MODIFY_NUM;
3467         else
3468                 return mlx5_flow_ext_mreg_supported(dev) ?
3469                                         MLX5_ROOT_TBL_MODIFY_NUM :
3470                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3471 }
3472
3473 /**
3474  * Validate the meter action.
3475  *
3476  * @param[in] dev
3477  *   Pointer to rte_eth_dev structure.
3478  * @param[in] action_flags
3479  *   Bit-fields that holds the actions detected until now.
3480  * @param[in] action
3481  *   Pointer to the meter action.
3482  * @param[in] attr
3483  *   Attributes of flow that includes this action.
3484  * @param[out] error
3485  *   Pointer to error structure.
3486  *
3487  * @return
3488  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3489  */
3490 static int
3491 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3492                                 uint64_t action_flags,
3493                                 const struct rte_flow_action *action,
3494                                 const struct rte_flow_attr *attr,
3495                                 struct rte_flow_error *error)
3496 {
3497         struct mlx5_priv *priv = dev->data->dev_private;
3498         const struct rte_flow_action_meter *am = action->conf;
3499         struct mlx5_flow_meter *fm;
3500
3501         if (!am)
3502                 return rte_flow_error_set(error, EINVAL,
3503                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3504                                           "meter action conf is NULL");
3505
3506         if (action_flags & MLX5_FLOW_ACTION_METER)
3507                 return rte_flow_error_set(error, ENOTSUP,
3508                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3509                                           "meter chaining not support");
3510         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3511                 return rte_flow_error_set(error, ENOTSUP,
3512                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3513                                           "meter with jump not support");
3514         if (!priv->mtr_en)
3515                 return rte_flow_error_set(error, ENOTSUP,
3516                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3517                                           NULL,
3518                                           "meter action not supported");
3519         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3520         if (!fm)
3521                 return rte_flow_error_set(error, EINVAL,
3522                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3523                                           "Meter not found");
3524         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3525               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3526               (!fm->attr.egress && !attr->egress && attr->ingress))))
3527                 return rte_flow_error_set(error, EINVAL,
3528                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3529                                           "Flow attributes are either invalid "
3530                                           "or have a conflict with current "
3531                                           "meter attributes");
3532         return 0;
3533 }
3534
3535 /**
3536  * Validate the modify-header IPv4 DSCP actions.
3537  *
3538  * @param[in] action_flags
3539  *   Holds the actions detected until now.
3540  * @param[in] action
3541  *   Pointer to the modify action.
3542  * @param[in] item_flags
3543  *   Holds the items detected.
3544  * @param[out] error
3545  *   Pointer to error structure.
3546  *
3547  * @return
3548  *   0 on success, a negative errno value otherwise and rte_errno is set.
3549  */
3550 static int
3551 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3552                                          const struct rte_flow_action *action,
3553                                          const uint64_t item_flags,
3554                                          struct rte_flow_error *error)
3555 {
3556         int ret = 0;
3557
3558         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3559         if (!ret) {
3560                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3561                         return rte_flow_error_set(error, EINVAL,
3562                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3563                                                   NULL,
3564                                                   "no ipv4 item in pattern");
3565         }
3566         return ret;
3567 }
3568
3569 /**
3570  * Validate the modify-header IPv6 DSCP actions.
3571  *
3572  * @param[in] action_flags
3573  *   Holds the actions detected until now.
3574  * @param[in] action
3575  *   Pointer to the modify action.
3576  * @param[in] item_flags
3577  *   Holds the items detected.
3578  * @param[out] error
3579  *   Pointer to error structure.
3580  *
3581  * @return
3582  *   0 on success, a negative errno value otherwise and rte_errno is set.
3583  */
3584 static int
3585 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3586                                          const struct rte_flow_action *action,
3587                                          const uint64_t item_flags,
3588                                          struct rte_flow_error *error)
3589 {
3590         int ret = 0;
3591
3592         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3593         if (!ret) {
3594                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3595                         return rte_flow_error_set(error, EINVAL,
3596                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3597                                                   NULL,
3598                                                   "no ipv6 item in pattern");
3599         }
3600         return ret;
3601 }
3602
3603 /**
3604  * Find existing modify-header resource or create and register a new one.
3605  *
3606  * @param dev[in, out]
3607  *   Pointer to rte_eth_dev structure.
3608  * @param[in, out] resource
3609  *   Pointer to modify-header resource.
3610  * @parm[in, out] dev_flow
3611  *   Pointer to the dev_flow.
3612  * @param[out] error
3613  *   pointer to error structure.
3614  *
3615  * @return
3616  *   0 on success otherwise -errno and errno is set.
3617  */
3618 static int
3619 flow_dv_modify_hdr_resource_register
3620                         (struct rte_eth_dev *dev,
3621                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3622                          struct mlx5_flow *dev_flow,
3623                          struct rte_flow_error *error)
3624 {
3625         struct mlx5_priv *priv = dev->data->dev_private;
3626         struct mlx5_ibv_shared *sh = priv->sh;
3627         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3628         struct mlx5dv_dr_domain *ns;
3629         uint32_t actions_len;
3630
3631         resource->flags =
3632                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3633         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3634                                     resource->flags))
3635                 return rte_flow_error_set(error, EOVERFLOW,
3636                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3637                                           "too many modify header items");
3638         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3639                 ns = sh->fdb_domain;
3640         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3641                 ns = sh->tx_domain;
3642         else
3643                 ns = sh->rx_domain;
3644         /* Lookup a matching resource from cache. */
3645         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3646         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3647                 if (resource->ft_type == cache_resource->ft_type &&
3648                     resource->actions_num == cache_resource->actions_num &&
3649                     resource->flags == cache_resource->flags &&
3650                     !memcmp((const void *)resource->actions,
3651                             (const void *)cache_resource->actions,
3652                             actions_len)) {
3653                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3654                                 (void *)cache_resource,
3655                                 rte_atomic32_read(&cache_resource->refcnt));
3656                         rte_atomic32_inc(&cache_resource->refcnt);
3657                         dev_flow->dv.modify_hdr = cache_resource;
3658                         return 0;
3659                 }
3660         }
3661         /* Register new modify-header resource. */
3662         cache_resource = rte_calloc(__func__, 1,
3663                                     sizeof(*cache_resource) + actions_len, 0);
3664         if (!cache_resource)
3665                 return rte_flow_error_set(error, ENOMEM,
3666                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3667                                           "cannot allocate resource memory");
3668         *cache_resource = *resource;
3669         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3670         cache_resource->verbs_action =
3671                 mlx5_glue->dv_create_flow_action_modify_header
3672                                         (sh->ctx, cache_resource->ft_type, ns,
3673                                          cache_resource->flags, actions_len,
3674                                          (uint64_t *)cache_resource->actions);
3675         if (!cache_resource->verbs_action) {
3676                 rte_free(cache_resource);
3677                 return rte_flow_error_set(error, ENOMEM,
3678                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3679                                           NULL, "cannot create action");
3680         }
3681         rte_atomic32_init(&cache_resource->refcnt);
3682         rte_atomic32_inc(&cache_resource->refcnt);
3683         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3684         dev_flow->dv.modify_hdr = cache_resource;
3685         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3686                 (void *)cache_resource,
3687                 rte_atomic32_read(&cache_resource->refcnt));
3688         return 0;
3689 }
3690
3691 #define MLX5_CNT_CONTAINER_RESIZE 64
3692
3693 /**
3694  * Get or create a flow counter.
3695  *
3696  * @param[in] dev
3697  *   Pointer to the Ethernet device structure.
3698  * @param[in] shared
3699  *   Indicate if this counter is shared with other flows.
3700  * @param[in] id
3701  *   Counter identifier.
3702  *
3703  * @return
3704  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3705  */
3706 static struct mlx5_flow_counter *
3707 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3708                                uint32_t id)
3709 {
3710         struct mlx5_priv *priv = dev->data->dev_private;
3711         struct mlx5_flow_counter *cnt = NULL;
3712         struct mlx5_devx_obj *dcs = NULL;
3713
3714         if (!priv->config.devx) {
3715                 rte_errno = ENOTSUP;
3716                 return NULL;
3717         }
3718         if (shared) {
3719                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3720                         if (cnt->shared && cnt->id == id) {
3721                                 cnt->ref_cnt++;
3722                                 return cnt;
3723                         }
3724                 }
3725         }
3726         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3727         if (!dcs)
3728                 return NULL;
3729         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3730         if (!cnt) {
3731                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3732                 rte_errno = ENOMEM;
3733                 return NULL;
3734         }
3735         struct mlx5_flow_counter tmpl = {
3736                 .shared = shared,
3737                 .ref_cnt = 1,
3738                 .id = id,
3739                 .dcs = dcs,
3740         };
3741         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3742         if (!tmpl.action) {
3743                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3744                 rte_errno = errno;
3745                 rte_free(cnt);
3746                 return NULL;
3747         }
3748         *cnt = tmpl;
3749         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3750         return cnt;
3751 }
3752
3753 /**
3754  * Release a flow counter.
3755  *
3756  * @param[in] dev
3757  *   Pointer to the Ethernet device structure.
3758  * @param[in] counter
3759  *   Pointer to the counter handler.
3760  */
3761 static void
3762 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3763                                  struct mlx5_flow_counter *counter)
3764 {
3765         struct mlx5_priv *priv = dev->data->dev_private;
3766
3767         if (!counter)
3768                 return;
3769         if (--counter->ref_cnt == 0) {
3770                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3771                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3772                 rte_free(counter);
3773         }
3774 }
3775
3776 /**
3777  * Query a devx flow counter.
3778  *
3779  * @param[in] dev
3780  *   Pointer to the Ethernet device structure.
3781  * @param[in] cnt
3782  *   Pointer to the flow counter.
3783  * @param[out] pkts
3784  *   The statistics value of packets.
3785  * @param[out] bytes
3786  *   The statistics value of bytes.
3787  *
3788  * @return
3789  *   0 on success, otherwise a negative errno value and rte_errno is set.
3790  */
3791 static inline int
3792 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3793                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3794                      uint64_t *bytes)
3795 {
3796         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3797                                                 0, NULL, NULL, 0);
3798 }
3799
3800 /**
3801  * Get a pool by a counter.
3802  *
3803  * @param[in] cnt
3804  *   Pointer to the counter.
3805  *
3806  * @return
3807  *   The counter pool.
3808  */
3809 static struct mlx5_flow_counter_pool *
3810 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3811 {
3812         if (!cnt->batch) {
3813                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3814                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3815         }
3816         return cnt->pool;
3817 }
3818
3819 /**
3820  * Get a pool by devx counter ID.
3821  *
3822  * @param[in] cont
3823  *   Pointer to the counter container.
3824  * @param[in] id
3825  *   The counter devx ID.
3826  *
3827  * @return
3828  *   The counter pool pointer if exists, NULL otherwise,
3829  */
3830 static struct mlx5_flow_counter_pool *
3831 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3832 {
3833         struct mlx5_flow_counter_pool *pool;
3834
3835         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3836                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3837                                 MLX5_COUNTERS_PER_POOL;
3838
3839                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3840                         return pool;
3841         };
3842         return NULL;
3843 }
3844
3845 /**
3846  * Allocate a new memory for the counter values wrapped by all the needed
3847  * management.
3848  *
3849  * @param[in] dev
3850  *   Pointer to the Ethernet device structure.
3851  * @param[in] raws_n
3852  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3853  *
3854  * @return
3855  *   The new memory management pointer on success, otherwise NULL and rte_errno
3856  *   is set.
3857  */
3858 static struct mlx5_counter_stats_mem_mng *
3859 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3860 {
3861         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3862                                         (dev->data->dev_private))->sh;
3863         struct mlx5_devx_mkey_attr mkey_attr;
3864         struct mlx5_counter_stats_mem_mng *mem_mng;
3865         volatile struct flow_counter_stats *raw_data;
3866         int size = (sizeof(struct flow_counter_stats) *
3867                         MLX5_COUNTERS_PER_POOL +
3868                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3869                         sizeof(struct mlx5_counter_stats_mem_mng);
3870         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3871         int i;
3872
3873         if (!mem) {
3874                 rte_errno = ENOMEM;
3875                 return NULL;
3876         }
3877         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3878         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3879         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3880                                                  IBV_ACCESS_LOCAL_WRITE);
3881         if (!mem_mng->umem) {
3882                 rte_errno = errno;
3883                 rte_free(mem);
3884                 return NULL;
3885         }
3886         mkey_attr.addr = (uintptr_t)mem;
3887         mkey_attr.size = size;
3888         mkey_attr.umem_id = mem_mng->umem->umem_id;
3889         mkey_attr.pd = sh->pdn;
3890         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3891         if (!mem_mng->dm) {
3892                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3893                 rte_errno = errno;
3894                 rte_free(mem);
3895                 return NULL;
3896         }
3897         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3898         raw_data = (volatile struct flow_counter_stats *)mem;
3899         for (i = 0; i < raws_n; ++i) {
3900                 mem_mng->raws[i].mem_mng = mem_mng;
3901                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3902         }
3903         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3904         return mem_mng;
3905 }
3906
3907 /**
3908  * Resize a counter container.
3909  *
3910  * @param[in] dev
3911  *   Pointer to the Ethernet device structure.
3912  * @param[in] batch
3913  *   Whether the pool is for counter that was allocated by batch command.
3914  *
3915  * @return
3916  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3917  */
3918 static struct mlx5_pools_container *
3919 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3920 {
3921         struct mlx5_priv *priv = dev->data->dev_private;
3922         struct mlx5_pools_container *cont =
3923                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3924         struct mlx5_pools_container *new_cont =
3925                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3926         struct mlx5_counter_stats_mem_mng *mem_mng;
3927         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3928         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3929         int i;
3930
3931         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3932                 /* The last resize still hasn't detected by the host thread. */
3933                 rte_errno = EAGAIN;
3934                 return NULL;
3935         }
3936         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3937         if (!new_cont->pools) {
3938                 rte_errno = ENOMEM;
3939                 return NULL;
3940         }
3941         if (cont->n)
3942                 memcpy(new_cont->pools, cont->pools, cont->n *
3943                        sizeof(struct mlx5_flow_counter_pool *));
3944         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3945                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3946         if (!mem_mng) {
3947                 rte_free(new_cont->pools);
3948                 return NULL;
3949         }
3950         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3951                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3952                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3953                                  i, next);
3954         new_cont->n = resize;
3955         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3956         TAILQ_INIT(&new_cont->pool_list);
3957         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3958         new_cont->init_mem_mng = mem_mng;
3959         rte_cio_wmb();
3960          /* Flip the master container. */
3961         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3962         return new_cont;
3963 }
3964
3965 /**
3966  * Query a devx flow counter.
3967  *
3968  * @param[in] dev
3969  *   Pointer to the Ethernet device structure.
3970  * @param[in] cnt
3971  *   Pointer to the flow counter.
3972  * @param[out] pkts
3973  *   The statistics value of packets.
3974  * @param[out] bytes
3975  *   The statistics value of bytes.
3976  *
3977  * @return
3978  *   0 on success, otherwise a negative errno value and rte_errno is set.
3979  */
3980 static inline int
3981 _flow_dv_query_count(struct rte_eth_dev *dev,
3982                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3983                      uint64_t *bytes)
3984 {
3985         struct mlx5_priv *priv = dev->data->dev_private;
3986         struct mlx5_flow_counter_pool *pool =
3987                         flow_dv_counter_pool_get(cnt);
3988         int offset = cnt - &pool->counters_raw[0];
3989
3990         if (priv->counter_fallback)
3991                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3992
3993         rte_spinlock_lock(&pool->sl);
3994         /*
3995          * The single counters allocation may allocate smaller ID than the
3996          * current allocated in parallel to the host reading.
3997          * In this case the new counter values must be reported as 0.
3998          */
3999         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4000                 *pkts = 0;
4001                 *bytes = 0;
4002         } else {
4003                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4004                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4005         }
4006         rte_spinlock_unlock(&pool->sl);
4007         return 0;
4008 }
4009
4010 /**
4011  * Create and initialize a new counter pool.
4012  *
4013  * @param[in] dev
4014  *   Pointer to the Ethernet device structure.
4015  * @param[out] dcs
4016  *   The devX counter handle.
4017  * @param[in] batch
4018  *   Whether the pool is for counter that was allocated by batch command.
4019  *
4020  * @return
4021  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4022  */
4023 static struct mlx5_flow_counter_pool *
4024 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4025                     uint32_t batch)
4026 {
4027         struct mlx5_priv *priv = dev->data->dev_private;
4028         struct mlx5_flow_counter_pool *pool;
4029         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4030                                                                0);
4031         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4032         uint32_t size;
4033
4034         if (cont->n == n_valid) {
4035                 cont = flow_dv_container_resize(dev, batch);
4036                 if (!cont)
4037                         return NULL;
4038         }
4039         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4040                         sizeof(struct mlx5_flow_counter);
4041         pool = rte_calloc(__func__, 1, size, 0);
4042         if (!pool) {
4043                 rte_errno = ENOMEM;
4044                 return NULL;
4045         }
4046         pool->min_dcs = dcs;
4047         pool->raw = cont->init_mem_mng->raws + n_valid %
4048                                                      MLX5_CNT_CONTAINER_RESIZE;
4049         pool->raw_hw = NULL;
4050         rte_spinlock_init(&pool->sl);
4051         /*
4052          * The generation of the new allocated counters in this pool is 0, 2 in
4053          * the pool generation makes all the counters valid for allocation.
4054          */
4055         rte_atomic64_set(&pool->query_gen, 0x2);
4056         TAILQ_INIT(&pool->counters);
4057         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4058         cont->pools[n_valid] = pool;
4059         /* Pool initialization must be updated before host thread access. */
4060         rte_cio_wmb();
4061         rte_atomic16_add(&cont->n_valid, 1);
4062         return pool;
4063 }
4064
4065 /**
4066  * Prepare a new counter and/or a new counter pool.
4067  *
4068  * @param[in] dev
4069  *   Pointer to the Ethernet device structure.
4070  * @param[out] cnt_free
4071  *   Where to put the pointer of a new counter.
4072  * @param[in] batch
4073  *   Whether the pool is for counter that was allocated by batch command.
4074  *
4075  * @return
4076  *   The free counter pool pointer and @p cnt_free is set on success,
4077  *   NULL otherwise and rte_errno is set.
4078  */
4079 static struct mlx5_flow_counter_pool *
4080 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4081                              struct mlx5_flow_counter **cnt_free,
4082                              uint32_t batch)
4083 {
4084         struct mlx5_priv *priv = dev->data->dev_private;
4085         struct mlx5_flow_counter_pool *pool;
4086         struct mlx5_devx_obj *dcs = NULL;
4087         struct mlx5_flow_counter *cnt;
4088         uint32_t i;
4089
4090         if (!batch) {
4091                 /* bulk_bitmap must be 0 for single counter allocation. */
4092                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4093                 if (!dcs)
4094                         return NULL;
4095                 pool = flow_dv_find_pool_by_id
4096                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4097                 if (!pool) {
4098                         pool = flow_dv_pool_create(dev, dcs, batch);
4099                         if (!pool) {
4100                                 mlx5_devx_cmd_destroy(dcs);
4101                                 return NULL;
4102                         }
4103                 } else if (dcs->id < pool->min_dcs->id) {
4104                         rte_atomic64_set(&pool->a64_dcs,
4105                                          (int64_t)(uintptr_t)dcs);
4106                 }
4107                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4108                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4109                 cnt->dcs = dcs;
4110                 *cnt_free = cnt;
4111                 return pool;
4112         }
4113         /* bulk_bitmap is in 128 counters units. */
4114         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4115                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4116         if (!dcs) {
4117                 rte_errno = ENODATA;
4118                 return NULL;
4119         }
4120         pool = flow_dv_pool_create(dev, dcs, batch);
4121         if (!pool) {
4122                 mlx5_devx_cmd_destroy(dcs);
4123                 return NULL;
4124         }
4125         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4126                 cnt = &pool->counters_raw[i];
4127                 cnt->pool = pool;
4128                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4129         }
4130         *cnt_free = &pool->counters_raw[0];
4131         return pool;
4132 }
4133
4134 /**
4135  * Search for existed shared counter.
4136  *
4137  * @param[in] cont
4138  *   Pointer to the relevant counter pool container.
4139  * @param[in] id
4140  *   The shared counter ID to search.
4141  *
4142  * @return
4143  *   NULL if not existed, otherwise pointer to the shared counter.
4144  */
4145 static struct mlx5_flow_counter *
4146 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4147                               uint32_t id)
4148 {
4149         static struct mlx5_flow_counter *cnt;
4150         struct mlx5_flow_counter_pool *pool;
4151         int i;
4152
4153         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4154                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4155                         cnt = &pool->counters_raw[i];
4156                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4157                                 return cnt;
4158                 }
4159         }
4160         return NULL;
4161 }
4162
4163 /**
4164  * Allocate a flow counter.
4165  *
4166  * @param[in] dev
4167  *   Pointer to the Ethernet device structure.
4168  * @param[in] shared
4169  *   Indicate if this counter is shared with other flows.
4170  * @param[in] id
4171  *   Counter identifier.
4172  * @param[in] group
4173  *   Counter flow group.
4174  *
4175  * @return
4176  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4177  */
4178 static struct mlx5_flow_counter *
4179 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4180                       uint16_t group)
4181 {
4182         struct mlx5_priv *priv = dev->data->dev_private;
4183         struct mlx5_flow_counter_pool *pool = NULL;
4184         struct mlx5_flow_counter *cnt_free = NULL;
4185         /*
4186          * Currently group 0 flow counter cannot be assigned to a flow if it is
4187          * not the first one in the batch counter allocation, so it is better
4188          * to allocate counters one by one for these flows in a separate
4189          * container.
4190          * A counter can be shared between different groups so need to take
4191          * shared counters from the single container.
4192          */
4193         uint32_t batch = (group && !shared) ? 1 : 0;
4194         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4195                                                                0);
4196
4197         if (priv->counter_fallback)
4198                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4199         if (!priv->config.devx) {
4200                 rte_errno = ENOTSUP;
4201                 return NULL;
4202         }
4203         if (shared) {
4204                 cnt_free = flow_dv_counter_shared_search(cont, id);
4205                 if (cnt_free) {
4206                         if (cnt_free->ref_cnt + 1 == 0) {
4207                                 rte_errno = E2BIG;
4208                                 return NULL;
4209                         }
4210                         cnt_free->ref_cnt++;
4211                         return cnt_free;
4212                 }
4213         }
4214         /* Pools which has a free counters are in the start. */
4215         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4216                 /*
4217                  * The free counter reset values must be updated between the
4218                  * counter release to the counter allocation, so, at least one
4219                  * query must be done in this time. ensure it by saving the
4220                  * query generation in the release time.
4221                  * The free list is sorted according to the generation - so if
4222                  * the first one is not updated, all the others are not
4223                  * updated too.
4224                  */
4225                 cnt_free = TAILQ_FIRST(&pool->counters);
4226                 if (cnt_free && cnt_free->query_gen + 1 <
4227                     rte_atomic64_read(&pool->query_gen))
4228                         break;
4229                 cnt_free = NULL;
4230         }
4231         if (!cnt_free) {
4232                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4233                 if (!pool)
4234                         return NULL;
4235         }
4236         cnt_free->batch = batch;
4237         /* Create a DV counter action only in the first time usage. */
4238         if (!cnt_free->action) {
4239                 uint16_t offset;
4240                 struct mlx5_devx_obj *dcs;
4241
4242                 if (batch) {
4243                         offset = cnt_free - &pool->counters_raw[0];
4244                         dcs = pool->min_dcs;
4245                 } else {
4246                         offset = 0;
4247                         dcs = cnt_free->dcs;
4248                 }
4249                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4250                                         (dcs->obj, offset);
4251                 if (!cnt_free->action) {
4252                         rte_errno = errno;
4253                         return NULL;
4254                 }
4255         }
4256         /* Update the counter reset values. */
4257         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4258                                  &cnt_free->bytes))
4259                 return NULL;
4260         cnt_free->shared = shared;
4261         cnt_free->ref_cnt = 1;
4262         cnt_free->id = id;
4263         if (!priv->sh->cmng.query_thread_on)
4264                 /* Start the asynchronous batch query by the host thread. */
4265                 mlx5_set_query_alarm(priv->sh);
4266         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4267         if (TAILQ_EMPTY(&pool->counters)) {
4268                 /* Move the pool to the end of the container pool list. */
4269                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4270                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4271         }
4272         return cnt_free;
4273 }
4274
4275 /**
4276  * Release a flow counter.
4277  *
4278  * @param[in] dev
4279  *   Pointer to the Ethernet device structure.
4280  * @param[in] counter
4281  *   Pointer to the counter handler.
4282  */
4283 static void
4284 flow_dv_counter_release(struct rte_eth_dev *dev,
4285                         struct mlx5_flow_counter *counter)
4286 {
4287         struct mlx5_priv *priv = dev->data->dev_private;
4288
4289         if (!counter)
4290                 return;
4291         if (priv->counter_fallback) {
4292                 flow_dv_counter_release_fallback(dev, counter);
4293                 return;
4294         }
4295         if (--counter->ref_cnt == 0) {
4296                 struct mlx5_flow_counter_pool *pool =
4297                                 flow_dv_counter_pool_get(counter);
4298
4299                 /* Put the counter in the end - the last updated one. */
4300                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4301                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4302         }
4303 }
4304
4305 /**
4306  * Verify the @p attributes will be correctly understood by the NIC and store
4307  * them in the @p flow if everything is correct.
4308  *
4309  * @param[in] dev
4310  *   Pointer to dev struct.
4311  * @param[in] attributes
4312  *   Pointer to flow attributes
4313  * @param[in] external
4314  *   This flow rule is created by request external to PMD.
4315  * @param[out] error
4316  *   Pointer to error structure.
4317  *
4318  * @return
4319  *   0 on success, a negative errno value otherwise and rte_errno is set.
4320  */
4321 static int
4322 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4323                             const struct rte_flow_attr *attributes,
4324                             bool external __rte_unused,
4325                             struct rte_flow_error *error)
4326 {
4327         struct mlx5_priv *priv = dev->data->dev_private;
4328         uint32_t priority_max = priv->config.flow_prio - 1;
4329
4330 #ifndef HAVE_MLX5DV_DR
4331         if (attributes->group)
4332                 return rte_flow_error_set(error, ENOTSUP,
4333                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4334                                           NULL,
4335                                           "groups are not supported");
4336 #else
4337         uint32_t table;
4338         int ret;
4339
4340         ret = mlx5_flow_group_to_table(attributes, external,
4341                                        attributes->group,
4342                                        &table, error);
4343         if (ret)
4344                 return ret;
4345 #endif
4346         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4347             attributes->priority >= priority_max)
4348                 return rte_flow_error_set(error, ENOTSUP,
4349                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4350                                           NULL,
4351                                           "priority out of range");
4352         if (attributes->transfer) {
4353                 if (!priv->config.dv_esw_en)
4354                         return rte_flow_error_set
4355                                 (error, ENOTSUP,
4356                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4357                                  "E-Switch dr is not supported");
4358                 if (!(priv->representor || priv->master))
4359                         return rte_flow_error_set
4360                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4361                                  NULL, "E-Switch configuration can only be"
4362                                  " done by a master or a representor device");
4363                 if (attributes->egress)
4364                         return rte_flow_error_set
4365                                 (error, ENOTSUP,
4366                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4367                                  "egress is not supported");
4368         }
4369         if (!(attributes->egress ^ attributes->ingress))
4370                 return rte_flow_error_set(error, ENOTSUP,
4371                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4372                                           "must specify exactly one of "
4373                                           "ingress or egress");
4374         return 0;
4375 }
4376
4377 /**
4378  * Internal validation function. For validating both actions and items.
4379  *
4380  * @param[in] dev
4381  *   Pointer to the rte_eth_dev structure.
4382  * @param[in] attr
4383  *   Pointer to the flow attributes.
4384  * @param[in] items
4385  *   Pointer to the list of items.
4386  * @param[in] actions
4387  *   Pointer to the list of actions.
4388  * @param[in] external
4389  *   This flow rule is created by request external to PMD.
4390  * @param[out] error
4391  *   Pointer to the error structure.
4392  *
4393  * @return
4394  *   0 on success, a negative errno value otherwise and rte_errno is set.
4395  */
4396 static int
4397 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4398                  const struct rte_flow_item items[],
4399                  const struct rte_flow_action actions[],
4400                  bool external, struct rte_flow_error *error)
4401 {
4402         int ret;
4403         uint64_t action_flags = 0;
4404         uint64_t item_flags = 0;
4405         uint64_t last_item = 0;
4406         uint8_t next_protocol = 0xff;
4407         uint16_t ether_type = 0;
4408         int actions_n = 0;
4409         const struct rte_flow_item *gre_item = NULL;
4410         struct rte_flow_item_tcp nic_tcp_mask = {
4411                 .hdr = {
4412                         .tcp_flags = 0xFF,
4413                         .src_port = RTE_BE16(UINT16_MAX),
4414                         .dst_port = RTE_BE16(UINT16_MAX),
4415                 }
4416         };
4417         struct mlx5_priv *priv = dev->data->dev_private;
4418         struct mlx5_dev_config *dev_conf = &priv->config;
4419
4420         if (items == NULL)
4421                 return -1;
4422         ret = flow_dv_validate_attributes(dev, attr, external, error);
4423         if (ret < 0)
4424                 return ret;
4425         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4426                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4427                 int type = items->type;
4428
4429                 switch (type) {
4430                 case RTE_FLOW_ITEM_TYPE_VOID:
4431                         break;
4432                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4433                         ret = flow_dv_validate_item_port_id
4434                                         (dev, items, attr, item_flags, error);
4435                         if (ret < 0)
4436                                 return ret;
4437                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4438                         break;
4439                 case RTE_FLOW_ITEM_TYPE_ETH:
4440                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4441                                                           error);
4442                         if (ret < 0)
4443                                 return ret;
4444                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4445                                              MLX5_FLOW_LAYER_OUTER_L2;
4446                         if (items->mask != NULL && items->spec != NULL) {
4447                                 ether_type =
4448                                         ((const struct rte_flow_item_eth *)
4449                                          items->spec)->type;
4450                                 ether_type &=
4451                                         ((const struct rte_flow_item_eth *)
4452                                          items->mask)->type;
4453                                 ether_type = rte_be_to_cpu_16(ether_type);
4454                         } else {
4455                                 ether_type = 0;
4456                         }
4457                         break;
4458                 case RTE_FLOW_ITEM_TYPE_VLAN:
4459                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4460                                                            dev, error);
4461                         if (ret < 0)
4462                                 return ret;
4463                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4464                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4465                         if (items->mask != NULL && items->spec != NULL) {
4466                                 ether_type =
4467                                         ((const struct rte_flow_item_vlan *)
4468                                          items->spec)->inner_type;
4469                                 ether_type &=
4470                                         ((const struct rte_flow_item_vlan *)
4471                                          items->mask)->inner_type;
4472                                 ether_type = rte_be_to_cpu_16(ether_type);
4473                         } else {
4474                                 ether_type = 0;
4475                         }
4476                         break;
4477                 case RTE_FLOW_ITEM_TYPE_IPV4:
4478                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4479                                                   &item_flags, &tunnel);
4480                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4481                                                            last_item,
4482                                                            ether_type, NULL,
4483                                                            error);
4484                         if (ret < 0)
4485                                 return ret;
4486                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4487                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4488                         if (items->mask != NULL &&
4489                             ((const struct rte_flow_item_ipv4 *)
4490                              items->mask)->hdr.next_proto_id) {
4491                                 next_protocol =
4492                                         ((const struct rte_flow_item_ipv4 *)
4493                                          (items->spec))->hdr.next_proto_id;
4494                                 next_protocol &=
4495                                         ((const struct rte_flow_item_ipv4 *)
4496                                          (items->mask))->hdr.next_proto_id;
4497                         } else {
4498                                 /* Reset for inner layer. */
4499                                 next_protocol = 0xff;
4500                         }
4501                         break;
4502                 case RTE_FLOW_ITEM_TYPE_IPV6:
4503                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4504                                                   &item_flags, &tunnel);
4505                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4506                                                            last_item,
4507                                                            ether_type, NULL,
4508                                                            error);
4509                         if (ret < 0)
4510                                 return ret;
4511                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4512                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4513                         if (items->mask != NULL &&
4514                             ((const struct rte_flow_item_ipv6 *)
4515                              items->mask)->hdr.proto) {
4516                                 next_protocol =
4517                                         ((const struct rte_flow_item_ipv6 *)
4518                                          items->spec)->hdr.proto;
4519                                 next_protocol &=
4520                                         ((const struct rte_flow_item_ipv6 *)
4521                                          items->mask)->hdr.proto;
4522                         } else {
4523                                 /* Reset for inner layer. */
4524                                 next_protocol = 0xff;
4525                         }
4526                         break;
4527                 case RTE_FLOW_ITEM_TYPE_TCP:
4528                         ret = mlx5_flow_validate_item_tcp
4529                                                 (items, item_flags,
4530                                                  next_protocol,
4531                                                  &nic_tcp_mask,
4532                                                  error);
4533                         if (ret < 0)
4534                                 return ret;
4535                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4536                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4537                         break;
4538                 case RTE_FLOW_ITEM_TYPE_UDP:
4539                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4540                                                           next_protocol,
4541                                                           error);
4542                         if (ret < 0)
4543                                 return ret;
4544                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4545                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4546                         break;
4547                 case RTE_FLOW_ITEM_TYPE_GRE:
4548                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4549                                                           next_protocol, error);
4550                         if (ret < 0)
4551                                 return ret;
4552                         gre_item = items;
4553                         last_item = MLX5_FLOW_LAYER_GRE;
4554                         break;
4555                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4556                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4557                                                             next_protocol,
4558                                                             error);
4559                         if (ret < 0)
4560                                 return ret;
4561                         last_item = MLX5_FLOW_LAYER_NVGRE;
4562                         break;
4563                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4564                         ret = mlx5_flow_validate_item_gre_key
4565                                 (items, item_flags, gre_item, error);
4566                         if (ret < 0)
4567                                 return ret;
4568                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4569                         break;
4570                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4571                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4572                                                             error);
4573                         if (ret < 0)
4574                                 return ret;
4575                         last_item = MLX5_FLOW_LAYER_VXLAN;
4576                         break;
4577                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4578                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4579                                                                 item_flags, dev,
4580                                                                 error);
4581                         if (ret < 0)
4582                                 return ret;
4583                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4584                         break;
4585                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4586                         ret = mlx5_flow_validate_item_geneve(items,
4587                                                              item_flags, dev,
4588                                                              error);
4589                         if (ret < 0)
4590                                 return ret;
4591                         last_item = MLX5_FLOW_LAYER_GENEVE;
4592                         break;
4593                 case RTE_FLOW_ITEM_TYPE_MPLS:
4594                         ret = mlx5_flow_validate_item_mpls(dev, items,
4595                                                            item_flags,
4596                                                            last_item, error);
4597                         if (ret < 0)
4598                                 return ret;
4599                         last_item = MLX5_FLOW_LAYER_MPLS;
4600                         break;
4601
4602                 case RTE_FLOW_ITEM_TYPE_MARK:
4603                         ret = flow_dv_validate_item_mark(dev, items, attr,
4604                                                          error);
4605                         if (ret < 0)
4606                                 return ret;
4607                         last_item = MLX5_FLOW_ITEM_MARK;
4608                         break;
4609                 case RTE_FLOW_ITEM_TYPE_META:
4610                         ret = flow_dv_validate_item_meta(dev, items, attr,
4611                                                          error);
4612                         if (ret < 0)
4613                                 return ret;
4614                         last_item = MLX5_FLOW_ITEM_METADATA;
4615                         break;
4616                 case RTE_FLOW_ITEM_TYPE_ICMP:
4617                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4618                                                            next_protocol,
4619                                                            error);
4620                         if (ret < 0)
4621                                 return ret;
4622                         last_item = MLX5_FLOW_LAYER_ICMP;
4623                         break;
4624                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4625                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4626                                                             next_protocol,
4627                                                             error);
4628                         if (ret < 0)
4629                                 return ret;
4630                         last_item = MLX5_FLOW_LAYER_ICMP6;
4631                         break;
4632                 case RTE_FLOW_ITEM_TYPE_TAG:
4633                         ret = flow_dv_validate_item_tag(dev, items,
4634                                                         attr, error);
4635                         if (ret < 0)
4636                                 return ret;
4637                         last_item = MLX5_FLOW_ITEM_TAG;
4638                         break;
4639                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4640                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4641                         break;
4642                 case RTE_FLOW_ITEM_TYPE_GTP:
4643                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4644                                                         error);
4645                         if (ret < 0)
4646                                 return ret;
4647                         last_item = MLX5_FLOW_LAYER_GTP;
4648                         break;
4649                 default:
4650                         return rte_flow_error_set(error, ENOTSUP,
4651                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4652                                                   NULL, "item not supported");
4653                 }
4654                 item_flags |= last_item;
4655         }
4656         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4657                 int type = actions->type;
4658                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4659                         return rte_flow_error_set(error, ENOTSUP,
4660                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4661                                                   actions, "too many actions");
4662                 switch (type) {
4663                 case RTE_FLOW_ACTION_TYPE_VOID:
4664                         break;
4665                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4666                         ret = flow_dv_validate_action_port_id(dev,
4667                                                               action_flags,
4668                                                               actions,
4669                                                               attr,
4670                                                               error);
4671                         if (ret)
4672                                 return ret;
4673                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4674                         ++actions_n;
4675                         break;
4676                 case RTE_FLOW_ACTION_TYPE_FLAG:
4677                         ret = flow_dv_validate_action_flag(dev, action_flags,
4678                                                            attr, error);
4679                         if (ret < 0)
4680                                 return ret;
4681                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4682                                 /* Count all modify-header actions as one. */
4683                                 if (!(action_flags &
4684                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4685                                         ++actions_n;
4686                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4687                                                 MLX5_FLOW_ACTION_MARK_EXT;
4688                         } else {
4689                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4690                                 ++actions_n;
4691                         }
4692                         break;
4693                 case RTE_FLOW_ACTION_TYPE_MARK:
4694                         ret = flow_dv_validate_action_mark(dev, actions,
4695                                                            action_flags,
4696                                                            attr, error);
4697                         if (ret < 0)
4698                                 return ret;
4699                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4700                                 /* Count all modify-header actions as one. */
4701                                 if (!(action_flags &
4702                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4703                                         ++actions_n;
4704                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4705                                                 MLX5_FLOW_ACTION_MARK_EXT;
4706                         } else {
4707                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4708                                 ++actions_n;
4709                         }
4710                         break;
4711                 case RTE_FLOW_ACTION_TYPE_SET_META:
4712                         ret = flow_dv_validate_action_set_meta(dev, actions,
4713                                                                action_flags,
4714                                                                attr, error);
4715                         if (ret < 0)
4716                                 return ret;
4717                         /* Count all modify-header actions as one action. */
4718                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4719                                 ++actions_n;
4720                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4721                         break;
4722                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4723                         ret = flow_dv_validate_action_set_tag(dev, actions,
4724                                                               action_flags,
4725                                                               attr, error);
4726                         if (ret < 0)
4727                                 return ret;
4728                         /* Count all modify-header actions as one action. */
4729                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4730                                 ++actions_n;
4731                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4732                         break;
4733                 case RTE_FLOW_ACTION_TYPE_DROP:
4734                         ret = mlx5_flow_validate_action_drop(action_flags,
4735                                                              attr, error);
4736                         if (ret < 0)
4737                                 return ret;
4738                         action_flags |= MLX5_FLOW_ACTION_DROP;
4739                         ++actions_n;
4740                         break;
4741                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4742                         ret = mlx5_flow_validate_action_queue(actions,
4743                                                               action_flags, dev,
4744                                                               attr, error);
4745                         if (ret < 0)
4746                                 return ret;
4747                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4748                         ++actions_n;
4749                         break;
4750                 case RTE_FLOW_ACTION_TYPE_RSS:
4751                         ret = mlx5_flow_validate_action_rss(actions,
4752                                                             action_flags, dev,
4753                                                             attr, item_flags,
4754                                                             error);
4755                         if (ret < 0)
4756                                 return ret;
4757                         action_flags |= MLX5_FLOW_ACTION_RSS;
4758                         ++actions_n;
4759                         break;
4760                 case RTE_FLOW_ACTION_TYPE_COUNT:
4761                         ret = flow_dv_validate_action_count(dev, error);
4762                         if (ret < 0)
4763                                 return ret;
4764                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4765                         ++actions_n;
4766                         break;
4767                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4768                         if (flow_dv_validate_action_pop_vlan(dev,
4769                                                              action_flags,
4770                                                              actions,
4771                                                              item_flags, attr,
4772                                                              error))
4773                                 return -rte_errno;
4774                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4775                         ++actions_n;
4776                         break;
4777                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4778                         ret = flow_dv_validate_action_push_vlan(action_flags,
4779                                                                 item_flags,
4780                                                                 actions, attr,
4781                                                                 error);
4782                         if (ret < 0)
4783                                 return ret;
4784                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4785                         ++actions_n;
4786                         break;
4787                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4788                         ret = flow_dv_validate_action_set_vlan_pcp
4789                                                 (action_flags, actions, error);
4790                         if (ret < 0)
4791                                 return ret;
4792                         /* Count PCP with push_vlan command. */
4793                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4794                         break;
4795                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4796                         ret = flow_dv_validate_action_set_vlan_vid
4797                                                 (item_flags, action_flags,
4798                                                  actions, error);
4799                         if (ret < 0)
4800                                 return ret;
4801                         /* Count VID with push_vlan command. */
4802                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4803                         break;
4804                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4805                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4806                         ret = flow_dv_validate_action_l2_encap(action_flags,
4807                                                                actions, attr,
4808                                                                error);
4809                         if (ret < 0)
4810                                 return ret;
4811                         action_flags |= actions->type ==
4812                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4813                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4814                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4815                         ++actions_n;
4816                         break;
4817                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4818                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4819                         ret = flow_dv_validate_action_l2_decap(action_flags,
4820                                                                attr, error);
4821                         if (ret < 0)
4822                                 return ret;
4823                         action_flags |= actions->type ==
4824                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4825                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4826                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4827                         ++actions_n;
4828                         break;
4829                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4830                         ret = flow_dv_validate_action_raw_encap(action_flags,
4831                                                                 actions, attr,
4832                                                                 error);
4833                         if (ret < 0)
4834                                 return ret;
4835                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4836                         ++actions_n;
4837                         break;
4838                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4839                         ret = flow_dv_validate_action_raw_decap(action_flags,
4840                                                                 actions, attr,
4841                                                                 error);
4842                         if (ret < 0)
4843                                 return ret;
4844                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4845                         ++actions_n;
4846                         break;
4847                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4848                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4849                         ret = flow_dv_validate_action_modify_mac(action_flags,
4850                                                                  actions,
4851                                                                  item_flags,
4852                                                                  error);
4853                         if (ret < 0)
4854                                 return ret;
4855                         /* Count all modify-header actions as one action. */
4856                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4857                                 ++actions_n;
4858                         action_flags |= actions->type ==
4859                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4860                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4861                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4862                         break;
4863
4864                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4865                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4866                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4867                                                                   actions,
4868                                                                   item_flags,
4869                                                                   error);
4870                         if (ret < 0)
4871                                 return ret;
4872                         /* Count all modify-header actions as one action. */
4873                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4874                                 ++actions_n;
4875                         action_flags |= actions->type ==
4876                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4877                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4878                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4879                         break;
4880                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4881                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4882                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4883                                                                   actions,
4884                                                                   item_flags,
4885                                                                   error);
4886                         if (ret < 0)
4887                                 return ret;
4888                         /* Count all modify-header actions as one action. */
4889                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4890                                 ++actions_n;
4891                         action_flags |= actions->type ==
4892                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4893                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4894                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4895                         break;
4896                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4897                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4898                         ret = flow_dv_validate_action_modify_tp(action_flags,
4899                                                                 actions,
4900                                                                 item_flags,
4901                                                                 error);
4902                         if (ret < 0)
4903                                 return ret;
4904                         /* Count all modify-header actions as one action. */
4905                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4906                                 ++actions_n;
4907                         action_flags |= actions->type ==
4908                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4909                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4910                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4911                         break;
4912                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4913                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4914                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4915                                                                  actions,
4916                                                                  item_flags,
4917                                                                  error);
4918                         if (ret < 0)
4919                                 return ret;
4920                         /* Count all modify-header actions as one action. */
4921                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4922                                 ++actions_n;
4923                         action_flags |= actions->type ==
4924                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4925                                                 MLX5_FLOW_ACTION_SET_TTL :
4926                                                 MLX5_FLOW_ACTION_DEC_TTL;
4927                         break;
4928                 case RTE_FLOW_ACTION_TYPE_JUMP:
4929                         ret = flow_dv_validate_action_jump(actions,
4930                                                            action_flags,
4931                                                            attr, external,
4932                                                            error);
4933                         if (ret)
4934                                 return ret;
4935                         ++actions_n;
4936                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4937                         break;
4938                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4939                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4940                         ret = flow_dv_validate_action_modify_tcp_seq
4941                                                                 (action_flags,
4942                                                                  actions,
4943                                                                  item_flags,
4944                                                                  error);
4945                         if (ret < 0)
4946                                 return ret;
4947                         /* Count all modify-header actions as one action. */
4948                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4949                                 ++actions_n;
4950                         action_flags |= actions->type ==
4951                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4952                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4953                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4954                         break;
4955                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4956                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4957                         ret = flow_dv_validate_action_modify_tcp_ack
4958                                                                 (action_flags,
4959                                                                  actions,
4960                                                                  item_flags,
4961                                                                  error);
4962                         if (ret < 0)
4963                                 return ret;
4964                         /* Count all modify-header actions as one action. */
4965                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4966                                 ++actions_n;
4967                         action_flags |= actions->type ==
4968                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4969                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4970                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4971                         break;
4972                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4973                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4974                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4975                         break;
4976                 case RTE_FLOW_ACTION_TYPE_METER:
4977                         ret = mlx5_flow_validate_action_meter(dev,
4978                                                               action_flags,
4979                                                               actions, attr,
4980                                                               error);
4981                         if (ret < 0)
4982                                 return ret;
4983                         action_flags |= MLX5_FLOW_ACTION_METER;
4984                         ++actions_n;
4985                         break;
4986                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4987                         ret = flow_dv_validate_action_modify_ipv4_dscp
4988                                                          (action_flags,
4989                                                           actions,
4990                                                           item_flags,
4991                                                           error);
4992                         if (ret < 0)
4993                                 return ret;
4994                         /* Count all modify-header actions as one action. */
4995                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4996                                 ++actions_n;
4997                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
4998                         break;
4999                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5000                         ret = flow_dv_validate_action_modify_ipv6_dscp
5001                                                                 (action_flags,
5002                                                                  actions,
5003                                                                  item_flags,
5004                                                                  error);
5005                         if (ret < 0)
5006                                 return ret;
5007                         /* Count all modify-header actions as one action. */
5008                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5009                                 ++actions_n;
5010                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5011                         break;
5012                 default:
5013                         return rte_flow_error_set(error, ENOTSUP,
5014                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5015                                                   actions,
5016                                                   "action not supported");
5017                 }
5018         }
5019         /*
5020          * Validate the drop action mutual exclusion with other actions.
5021          * Drop action is mutually-exclusive with any other action, except for
5022          * Count action.
5023          */
5024         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5025             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5026                 return rte_flow_error_set(error, EINVAL,
5027                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5028                                           "Drop action is mutually-exclusive "
5029                                           "with any other action, except for "
5030                                           "Count action");
5031         /* Eswitch has few restrictions on using items and actions */
5032         if (attr->transfer) {
5033                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5034                     action_flags & MLX5_FLOW_ACTION_FLAG)
5035                         return rte_flow_error_set(error, ENOTSUP,
5036                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5037                                                   NULL,
5038                                                   "unsupported action FLAG");
5039                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5040                     action_flags & MLX5_FLOW_ACTION_MARK)
5041                         return rte_flow_error_set(error, ENOTSUP,
5042                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5043                                                   NULL,
5044                                                   "unsupported action MARK");
5045                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5046                         return rte_flow_error_set(error, ENOTSUP,
5047                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5048                                                   NULL,
5049                                                   "unsupported action QUEUE");
5050                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5051                         return rte_flow_error_set(error, ENOTSUP,
5052                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5053                                                   NULL,
5054                                                   "unsupported action RSS");
5055                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5056                         return rte_flow_error_set(error, EINVAL,
5057                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5058                                                   actions,
5059                                                   "no fate action is found");
5060         } else {
5061                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5062                         return rte_flow_error_set(error, EINVAL,
5063                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5064                                                   actions,
5065                                                   "no fate action is found");
5066         }
5067         return 0;
5068 }
5069
5070 /**
5071  * Internal preparation function. Allocates the DV flow size,
5072  * this size is constant.
5073  *
5074  * @param[in] attr
5075  *   Pointer to the flow attributes.
5076  * @param[in] items
5077  *   Pointer to the list of items.
5078  * @param[in] actions
5079  *   Pointer to the list of actions.
5080  * @param[out] error
5081  *   Pointer to the error structure.
5082  *
5083  * @return
5084  *   Pointer to mlx5_flow object on success,
5085  *   otherwise NULL and rte_errno is set.
5086  */
5087 static struct mlx5_flow *
5088 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5089                 const struct rte_flow_item items[] __rte_unused,
5090                 const struct rte_flow_action actions[] __rte_unused,
5091                 struct rte_flow_error *error)
5092 {
5093         size_t size = sizeof(struct mlx5_flow);
5094         struct mlx5_flow *dev_flow;
5095
5096         dev_flow = rte_calloc(__func__, 1, size, 0);
5097         if (!dev_flow) {
5098                 rte_flow_error_set(error, ENOMEM,
5099                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5100                                    "not enough memory to create flow");
5101                 return NULL;
5102         }
5103         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5104         dev_flow->ingress = attr->ingress;
5105         dev_flow->transfer = attr->transfer;
5106         return dev_flow;
5107 }
5108
5109 #ifndef NDEBUG
5110 /**
5111  * Sanity check for match mask and value. Similar to check_valid_spec() in
5112  * kernel driver. If unmasked bit is present in value, it returns failure.
5113  *
5114  * @param match_mask
5115  *   pointer to match mask buffer.
5116  * @param match_value
5117  *   pointer to match value buffer.
5118  *
5119  * @return
5120  *   0 if valid, -EINVAL otherwise.
5121  */
5122 static int
5123 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5124 {
5125         uint8_t *m = match_mask;
5126         uint8_t *v = match_value;
5127         unsigned int i;
5128
5129         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5130                 if (v[i] & ~m[i]) {
5131                         DRV_LOG(ERR,
5132                                 "match_value differs from match_criteria"
5133                                 " %p[%u] != %p[%u]",
5134                                 match_value, i, match_mask, i);
5135                         return -EINVAL;
5136                 }
5137         }
5138         return 0;
5139 }
5140 #endif
5141
5142 /**
5143  * Add Ethernet item to matcher and to the value.
5144  *
5145  * @param[in, out] matcher
5146  *   Flow matcher.
5147  * @param[in, out] key
5148  *   Flow matcher value.
5149  * @param[in] item
5150  *   Flow pattern to translate.
5151  * @param[in] inner
5152  *   Item is inner pattern.
5153  */
5154 static void
5155 flow_dv_translate_item_eth(void *matcher, void *key,
5156                            const struct rte_flow_item *item, int inner)
5157 {
5158         const struct rte_flow_item_eth *eth_m = item->mask;
5159         const struct rte_flow_item_eth *eth_v = item->spec;
5160         const struct rte_flow_item_eth nic_mask = {
5161                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5162                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5163                 .type = RTE_BE16(0xffff),
5164         };
5165         void *headers_m;
5166         void *headers_v;
5167         char *l24_v;
5168         unsigned int i;
5169
5170         if (!eth_v)
5171                 return;
5172         if (!eth_m)
5173                 eth_m = &nic_mask;
5174         if (inner) {
5175                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5176                                          inner_headers);
5177                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5178         } else {
5179                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5180                                          outer_headers);
5181                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5182         }
5183         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5184                &eth_m->dst, sizeof(eth_m->dst));
5185         /* The value must be in the range of the mask. */
5186         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5187         for (i = 0; i < sizeof(eth_m->dst); ++i)
5188                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5189         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5190                &eth_m->src, sizeof(eth_m->src));
5191         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5192         /* The value must be in the range of the mask. */
5193         for (i = 0; i < sizeof(eth_m->dst); ++i)
5194                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5195         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5196                  rte_be_to_cpu_16(eth_m->type));
5197         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5198         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5199 }
5200
5201 /**
5202  * Add VLAN item to matcher and to the value.
5203  *
5204  * @param[in, out] dev_flow
5205  *   Flow descriptor.
5206  * @param[in, out] matcher
5207  *   Flow matcher.
5208  * @param[in, out] key
5209  *   Flow matcher value.
5210  * @param[in] item
5211  *   Flow pattern to translate.
5212  * @param[in] inner
5213  *   Item is inner pattern.
5214  */
5215 static void
5216 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5217                             void *matcher, void *key,
5218                             const struct rte_flow_item *item,
5219                             int inner)
5220 {
5221         const struct rte_flow_item_vlan *vlan_m = item->mask;
5222         const struct rte_flow_item_vlan *vlan_v = item->spec;
5223         void *headers_m;
5224         void *headers_v;
5225         uint16_t tci_m;
5226         uint16_t tci_v;
5227
5228         if (!vlan_v)
5229                 return;
5230         if (!vlan_m)
5231                 vlan_m = &rte_flow_item_vlan_mask;
5232         if (inner) {
5233                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5234                                          inner_headers);
5235                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5236         } else {
5237                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5238                                          outer_headers);
5239                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5240                 /*
5241                  * This is workaround, masks are not supported,
5242                  * and pre-validated.
5243                  */
5244                 dev_flow->dv.vf_vlan.tag =
5245                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5246         }
5247         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5248         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5249         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5250         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5251         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5252         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5253         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5254         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5255         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5256         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5257         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5258                  rte_be_to_cpu_16(vlan_m->inner_type));
5259         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5260                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5261 }
5262
5263 /**
5264  * Add IPV4 item to matcher and to the value.
5265  *
5266  * @param[in, out] matcher
5267  *   Flow matcher.
5268  * @param[in, out] key
5269  *   Flow matcher value.
5270  * @param[in] item
5271  *   Flow pattern to translate.
5272  * @param[in] inner
5273  *   Item is inner pattern.
5274  * @param[in] group
5275  *   The group to insert the rule.
5276  */
5277 static void
5278 flow_dv_translate_item_ipv4(void *matcher, void *key,
5279                             const struct rte_flow_item *item,
5280                             int inner, uint32_t group)
5281 {
5282         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5283         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5284         const struct rte_flow_item_ipv4 nic_mask = {
5285                 .hdr = {
5286                         .src_addr = RTE_BE32(0xffffffff),
5287                         .dst_addr = RTE_BE32(0xffffffff),
5288                         .type_of_service = 0xff,
5289                         .next_proto_id = 0xff,
5290                 },
5291         };
5292         void *headers_m;
5293         void *headers_v;
5294         char *l24_m;
5295         char *l24_v;
5296         uint8_t tos;
5297
5298         if (inner) {
5299                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5300                                          inner_headers);
5301                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5302         } else {
5303                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5304                                          outer_headers);
5305                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5306         }
5307         if (group == 0)
5308                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5309         else
5310                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5311         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5312         if (!ipv4_v)
5313                 return;
5314         if (!ipv4_m)
5315                 ipv4_m = &nic_mask;
5316         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5317                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5318         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5319                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5320         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5321         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5322         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5323                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5324         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5325                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5326         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5327         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5328         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5329         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5330                  ipv4_m->hdr.type_of_service);
5331         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5332         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5333                  ipv4_m->hdr.type_of_service >> 2);
5334         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5335         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5336                  ipv4_m->hdr.next_proto_id);
5337         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5338                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5339 }
5340
5341 /**
5342  * Add IPV6 item to matcher and to the value.
5343  *
5344  * @param[in, out] matcher
5345  *   Flow matcher.
5346  * @param[in, out] key
5347  *   Flow matcher value.
5348  * @param[in] item
5349  *   Flow pattern to translate.
5350  * @param[in] inner
5351  *   Item is inner pattern.
5352  * @param[in] group
5353  *   The group to insert the rule.
5354  */
5355 static void
5356 flow_dv_translate_item_ipv6(void *matcher, void *key,
5357                             const struct rte_flow_item *item,
5358                             int inner, uint32_t group)
5359 {
5360         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5361         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5362         const struct rte_flow_item_ipv6 nic_mask = {
5363                 .hdr = {
5364                         .src_addr =
5365                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5366                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5367                         .dst_addr =
5368                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5369                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5370                         .vtc_flow = RTE_BE32(0xffffffff),
5371                         .proto = 0xff,
5372                         .hop_limits = 0xff,
5373                 },
5374         };
5375         void *headers_m;
5376         void *headers_v;
5377         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5378         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5379         char *l24_m;
5380         char *l24_v;
5381         uint32_t vtc_m;
5382         uint32_t vtc_v;
5383         int i;
5384         int size;
5385
5386         if (inner) {
5387                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5388                                          inner_headers);
5389                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5390         } else {
5391                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5392                                          outer_headers);
5393                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5394         }
5395         if (group == 0)
5396                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5397         else
5398                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5399         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5400         if (!ipv6_v)
5401                 return;
5402         if (!ipv6_m)
5403                 ipv6_m = &nic_mask;
5404         size = sizeof(ipv6_m->hdr.dst_addr);
5405         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5406                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5407         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5408                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5409         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5410         for (i = 0; i < size; ++i)
5411                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5412         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5413                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5414         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5415                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5416         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5417         for (i = 0; i < size; ++i)
5418                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5419         /* TOS. */
5420         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5421         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5422         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5423         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5424         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5425         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5426         /* Label. */
5427         if (inner) {
5428                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5429                          vtc_m);
5430                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5431                          vtc_v);
5432         } else {
5433                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5434                          vtc_m);
5435                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5436                          vtc_v);
5437         }
5438         /* Protocol. */
5439         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5440                  ipv6_m->hdr.proto);
5441         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5442                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5443 }
5444
5445 /**
5446  * Add TCP item to matcher and to the value.
5447  *
5448  * @param[in, out] matcher
5449  *   Flow matcher.
5450  * @param[in, out] key
5451  *   Flow matcher value.
5452  * @param[in] item
5453  *   Flow pattern to translate.
5454  * @param[in] inner
5455  *   Item is inner pattern.
5456  */
5457 static void
5458 flow_dv_translate_item_tcp(void *matcher, void *key,
5459                            const struct rte_flow_item *item,
5460                            int inner)
5461 {
5462         const struct rte_flow_item_tcp *tcp_m = item->mask;
5463         const struct rte_flow_item_tcp *tcp_v = item->spec;
5464         void *headers_m;
5465         void *headers_v;
5466
5467         if (inner) {
5468                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5469                                          inner_headers);
5470                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5471         } else {
5472                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5473                                          outer_headers);
5474                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5475         }
5476         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5477         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5478         if (!tcp_v)
5479                 return;
5480         if (!tcp_m)
5481                 tcp_m = &rte_flow_item_tcp_mask;
5482         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5483                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5484         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5485                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5486         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5487                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5488         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5489                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5490         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5491                  tcp_m->hdr.tcp_flags);
5492         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5493                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5494 }
5495
5496 /**
5497  * Add UDP item to matcher and to the value.
5498  *
5499  * @param[in, out] matcher
5500  *   Flow matcher.
5501  * @param[in, out] key
5502  *   Flow matcher value.
5503  * @param[in] item
5504  *   Flow pattern to translate.
5505  * @param[in] inner
5506  *   Item is inner pattern.
5507  */
5508 static void
5509 flow_dv_translate_item_udp(void *matcher, void *key,
5510                            const struct rte_flow_item *item,
5511                            int inner)
5512 {
5513         const struct rte_flow_item_udp *udp_m = item->mask;
5514         const struct rte_flow_item_udp *udp_v = item->spec;
5515         void *headers_m;
5516         void *headers_v;
5517
5518         if (inner) {
5519                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5520                                          inner_headers);
5521                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5522         } else {
5523                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5524                                          outer_headers);
5525                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5526         }
5527         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5528         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5529         if (!udp_v)
5530                 return;
5531         if (!udp_m)
5532                 udp_m = &rte_flow_item_udp_mask;
5533         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5534                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5535         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5536                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5537         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5538                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5539         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5540                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5541 }
5542
5543 /**
5544  * Add GRE optional Key item to matcher and to the value.
5545  *
5546  * @param[in, out] matcher
5547  *   Flow matcher.
5548  * @param[in, out] key
5549  *   Flow matcher value.
5550  * @param[in] item
5551  *   Flow pattern to translate.
5552  * @param[in] inner
5553  *   Item is inner pattern.
5554  */
5555 static void
5556 flow_dv_translate_item_gre_key(void *matcher, void *key,
5557                                    const struct rte_flow_item *item)
5558 {
5559         const rte_be32_t *key_m = item->mask;
5560         const rte_be32_t *key_v = item->spec;
5561         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5562         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5563         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5564
5565         if (!key_v)
5566                 return;
5567         if (!key_m)
5568                 key_m = &gre_key_default_mask;
5569         /* GRE K bit must be on and should already be validated */
5570         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5571         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5572         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5573                  rte_be_to_cpu_32(*key_m) >> 8);
5574         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5575                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5576         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5577                  rte_be_to_cpu_32(*key_m) & 0xFF);
5578         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5579                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5580 }
5581
5582 /**
5583  * Add GRE item to matcher and to the value.
5584  *
5585  * @param[in, out] matcher
5586  *   Flow matcher.
5587  * @param[in, out] key
5588  *   Flow matcher value.
5589  * @param[in] item
5590  *   Flow pattern to translate.
5591  * @param[in] inner
5592  *   Item is inner pattern.
5593  */
5594 static void
5595 flow_dv_translate_item_gre(void *matcher, void *key,
5596                            const struct rte_flow_item *item,
5597                            int inner)
5598 {
5599         const struct rte_flow_item_gre *gre_m = item->mask;
5600         const struct rte_flow_item_gre *gre_v = item->spec;
5601         void *headers_m;
5602         void *headers_v;
5603         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5604         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5605         struct {
5606                 union {
5607                         __extension__
5608                         struct {
5609                                 uint16_t version:3;
5610                                 uint16_t rsvd0:9;
5611                                 uint16_t s_present:1;
5612                                 uint16_t k_present:1;
5613                                 uint16_t rsvd_bit1:1;
5614                                 uint16_t c_present:1;
5615                         };
5616                         uint16_t value;
5617                 };
5618         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5619
5620         if (inner) {
5621                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5622                                          inner_headers);
5623                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5624         } else {
5625                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5626                                          outer_headers);
5627                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5628         }
5629         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5630         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5631         if (!gre_v)
5632                 return;
5633         if (!gre_m)
5634                 gre_m = &rte_flow_item_gre_mask;
5635         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5636                  rte_be_to_cpu_16(gre_m->protocol));
5637         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5638                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5639         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5640         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5641         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5642                  gre_crks_rsvd0_ver_m.c_present);
5643         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5644                  gre_crks_rsvd0_ver_v.c_present &
5645                  gre_crks_rsvd0_ver_m.c_present);
5646         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5647                  gre_crks_rsvd0_ver_m.k_present);
5648         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5649                  gre_crks_rsvd0_ver_v.k_present &
5650                  gre_crks_rsvd0_ver_m.k_present);
5651         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5652                  gre_crks_rsvd0_ver_m.s_present);
5653         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5654                  gre_crks_rsvd0_ver_v.s_present &
5655                  gre_crks_rsvd0_ver_m.s_present);
5656 }
5657
5658 /**
5659  * Add NVGRE item to matcher and to the value.
5660  *
5661  * @param[in, out] matcher
5662  *   Flow matcher.
5663  * @param[in, out] key
5664  *   Flow matcher value.
5665  * @param[in] item
5666  *   Flow pattern to translate.
5667  * @param[in] inner
5668  *   Item is inner pattern.
5669  */
5670 static void
5671 flow_dv_translate_item_nvgre(void *matcher, void *key,
5672                              const struct rte_flow_item *item,
5673                              int inner)
5674 {
5675         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5676         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5677         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5678         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5679         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5680         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5681         char *gre_key_m;
5682         char *gre_key_v;
5683         int size;
5684         int i;
5685
5686         /* For NVGRE, GRE header fields must be set with defined values. */
5687         const struct rte_flow_item_gre gre_spec = {
5688                 .c_rsvd0_ver = RTE_BE16(0x2000),
5689                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5690         };
5691         const struct rte_flow_item_gre gre_mask = {
5692                 .c_rsvd0_ver = RTE_BE16(0xB000),
5693                 .protocol = RTE_BE16(UINT16_MAX),
5694         };
5695         const struct rte_flow_item gre_item = {
5696                 .spec = &gre_spec,
5697                 .mask = &gre_mask,
5698                 .last = NULL,
5699         };
5700         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5701         if (!nvgre_v)
5702                 return;
5703         if (!nvgre_m)
5704                 nvgre_m = &rte_flow_item_nvgre_mask;
5705         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5706         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5707         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5708         memcpy(gre_key_m, tni_flow_id_m, size);
5709         for (i = 0; i < size; ++i)
5710                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5711 }
5712
5713 /**
5714  * Add VXLAN item to matcher and to the value.
5715  *
5716  * @param[in, out] matcher
5717  *   Flow matcher.
5718  * @param[in, out] key
5719  *   Flow matcher value.
5720  * @param[in] item
5721  *   Flow pattern to translate.
5722  * @param[in] inner
5723  *   Item is inner pattern.
5724  */
5725 static void
5726 flow_dv_translate_item_vxlan(void *matcher, void *key,
5727                              const struct rte_flow_item *item,
5728                              int inner)
5729 {
5730         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5731         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5732         void *headers_m;
5733         void *headers_v;
5734         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5735         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5736         char *vni_m;
5737         char *vni_v;
5738         uint16_t dport;
5739         int size;
5740         int i;
5741
5742         if (inner) {
5743                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5744                                          inner_headers);
5745                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5746         } else {
5747                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5748                                          outer_headers);
5749                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5750         }
5751         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5752                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5753         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5754                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5755                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5756         }
5757         if (!vxlan_v)
5758                 return;
5759         if (!vxlan_m)
5760                 vxlan_m = &rte_flow_item_vxlan_mask;
5761         size = sizeof(vxlan_m->vni);
5762         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5763         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5764         memcpy(vni_m, vxlan_m->vni, size);
5765         for (i = 0; i < size; ++i)
5766                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5767 }
5768
5769 /**
5770  * Add Geneve item to matcher and to the value.
5771  *
5772  * @param[in, out] matcher
5773  *   Flow matcher.
5774  * @param[in, out] key
5775  *   Flow matcher value.
5776  * @param[in] item
5777  *   Flow pattern to translate.
5778  * @param[in] inner
5779  *   Item is inner pattern.
5780  */
5781
5782 static void
5783 flow_dv_translate_item_geneve(void *matcher, void *key,
5784                               const struct rte_flow_item *item, int inner)
5785 {
5786         const struct rte_flow_item_geneve *geneve_m = item->mask;
5787         const struct rte_flow_item_geneve *geneve_v = item->spec;
5788         void *headers_m;
5789         void *headers_v;
5790         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5791         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5792         uint16_t dport;
5793         uint16_t gbhdr_m;
5794         uint16_t gbhdr_v;
5795         char *vni_m;
5796         char *vni_v;
5797         size_t size, i;
5798
5799         if (inner) {
5800                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5801                                          inner_headers);
5802                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5803         } else {
5804                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5805                                          outer_headers);
5806                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5807         }
5808         dport = MLX5_UDP_PORT_GENEVE;
5809         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5810                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5811                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5812         }
5813         if (!geneve_v)
5814                 return;
5815         if (!geneve_m)
5816                 geneve_m = &rte_flow_item_geneve_mask;
5817         size = sizeof(geneve_m->vni);
5818         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5819         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5820         memcpy(vni_m, geneve_m->vni, size);
5821         for (i = 0; i < size; ++i)
5822                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5823         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5824                  rte_be_to_cpu_16(geneve_m->protocol));
5825         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5826                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5827         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5828         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5829         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5830                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5831         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5832                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5833         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5834                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5835         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5836                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5837                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5838 }
5839
5840 /**
5841  * Add MPLS item to matcher and to the value.
5842  *
5843  * @param[in, out] matcher
5844  *   Flow matcher.
5845  * @param[in, out] key
5846  *   Flow matcher value.
5847  * @param[in] item
5848  *   Flow pattern to translate.
5849  * @param[in] prev_layer
5850  *   The protocol layer indicated in previous item.
5851  * @param[in] inner
5852  *   Item is inner pattern.
5853  */
5854 static void
5855 flow_dv_translate_item_mpls(void *matcher, void *key,
5856                             const struct rte_flow_item *item,
5857                             uint64_t prev_layer,
5858                             int inner)
5859 {
5860         const uint32_t *in_mpls_m = item->mask;
5861         const uint32_t *in_mpls_v = item->spec;
5862         uint32_t *out_mpls_m = 0;
5863         uint32_t *out_mpls_v = 0;
5864         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5865         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5866         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5867                                      misc_parameters_2);
5868         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5869         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5870         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5871
5872         switch (prev_layer) {
5873         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5874                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5875                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5876                          MLX5_UDP_PORT_MPLS);
5877                 break;
5878         case MLX5_FLOW_LAYER_GRE:
5879                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5880                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5881                          RTE_ETHER_TYPE_MPLS);
5882                 break;
5883         default:
5884                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5885                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5886                          IPPROTO_MPLS);
5887                 break;
5888         }
5889         if (!in_mpls_v)
5890                 return;
5891         if (!in_mpls_m)
5892                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5893         switch (prev_layer) {
5894         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5895                 out_mpls_m =
5896                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5897                                                  outer_first_mpls_over_udp);
5898                 out_mpls_v =
5899                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5900                                                  outer_first_mpls_over_udp);
5901                 break;
5902         case MLX5_FLOW_LAYER_GRE:
5903                 out_mpls_m =
5904                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5905                                                  outer_first_mpls_over_gre);
5906                 out_mpls_v =
5907                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5908                                                  outer_first_mpls_over_gre);
5909                 break;
5910         default:
5911                 /* Inner MPLS not over GRE is not supported. */
5912                 if (!inner) {
5913                         out_mpls_m =
5914                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5915                                                          misc2_m,
5916                                                          outer_first_mpls);
5917                         out_mpls_v =
5918                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5919                                                          misc2_v,
5920                                                          outer_first_mpls);
5921                 }
5922                 break;
5923         }
5924         if (out_mpls_m && out_mpls_v) {
5925                 *out_mpls_m = *in_mpls_m;
5926                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5927         }
5928 }
5929
5930 /**
5931  * Add metadata register item to matcher
5932  *
5933  * @param[in, out] matcher
5934  *   Flow matcher.
5935  * @param[in, out] key
5936  *   Flow matcher value.
5937  * @param[in] reg_type
5938  *   Type of device metadata register
5939  * @param[in] value
5940  *   Register value
5941  * @param[in] mask
5942  *   Register mask
5943  */
5944 static void
5945 flow_dv_match_meta_reg(void *matcher, void *key,
5946                        enum modify_reg reg_type,
5947                        uint32_t data, uint32_t mask)
5948 {
5949         void *misc2_m =
5950                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5951         void *misc2_v =
5952                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5953         uint32_t temp;
5954
5955         data &= mask;
5956         switch (reg_type) {
5957         case REG_A:
5958                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5959                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5960                 break;
5961         case REG_B:
5962                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5963                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5964                 break;
5965         case REG_C_0:
5966                 /*
5967                  * The metadata register C0 field might be divided into
5968                  * source vport index and META item value, we should set
5969                  * this field according to specified mask, not as whole one.
5970                  */
5971                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
5972                 temp |= mask;
5973                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
5974                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
5975                 temp &= ~mask;
5976                 temp |= data;
5977                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
5978                 break;
5979         case REG_C_1:
5980                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5981                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5982                 break;
5983         case REG_C_2:
5984                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5985                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5986                 break;
5987         case REG_C_3:
5988                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
5989                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
5990                 break;
5991         case REG_C_4:
5992                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
5993                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
5994                 break;
5995         case REG_C_5:
5996                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
5997                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
5998                 break;
5999         case REG_C_6:
6000                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6001                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6002                 break;
6003         case REG_C_7:
6004                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6005                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6006                 break;
6007         default:
6008                 assert(false);
6009                 break;
6010         }
6011 }
6012
6013 /**
6014  * Add MARK item to matcher
6015  *
6016  * @param[in] dev
6017  *   The device to configure through.
6018  * @param[in, out] matcher
6019  *   Flow matcher.
6020  * @param[in, out] key
6021  *   Flow matcher value.
6022  * @param[in] item
6023  *   Flow pattern to translate.
6024  */
6025 static void
6026 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6027                             void *matcher, void *key,
6028                             const struct rte_flow_item *item)
6029 {
6030         struct mlx5_priv *priv = dev->data->dev_private;
6031         const struct rte_flow_item_mark *mark;
6032         uint32_t value;
6033         uint32_t mask;
6034
6035         mark = item->mask ? (const void *)item->mask :
6036                             &rte_flow_item_mark_mask;
6037         mask = mark->id & priv->sh->dv_mark_mask;
6038         mark = (const void *)item->spec;
6039         assert(mark);
6040         value = mark->id & priv->sh->dv_mark_mask & mask;
6041         if (mask) {
6042                 enum modify_reg reg;
6043
6044                 /* Get the metadata register index for the mark. */
6045                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6046                 assert(reg > 0);
6047                 if (reg == REG_C_0) {
6048                         struct mlx5_priv *priv = dev->data->dev_private;
6049                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6050                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6051
6052                         mask &= msk_c0;
6053                         mask <<= shl_c0;
6054                         value <<= shl_c0;
6055                 }
6056                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6057         }
6058 }
6059
6060 /**
6061  * Add META item to matcher
6062  *
6063  * @param[in] dev
6064  *   The devich to configure through.
6065  * @param[in, out] matcher
6066  *   Flow matcher.
6067  * @param[in, out] key
6068  *   Flow matcher value.
6069  * @param[in] attr
6070  *   Attributes of flow that includes this item.
6071  * @param[in] item
6072  *   Flow pattern to translate.
6073  */
6074 static void
6075 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6076                             void *matcher, void *key,
6077                             const struct rte_flow_attr *attr,
6078                             const struct rte_flow_item *item)
6079 {
6080         const struct rte_flow_item_meta *meta_m;
6081         const struct rte_flow_item_meta *meta_v;
6082
6083         meta_m = (const void *)item->mask;
6084         if (!meta_m)
6085                 meta_m = &rte_flow_item_meta_mask;
6086         meta_v = (const void *)item->spec;
6087         if (meta_v) {
6088                 enum modify_reg reg;
6089                 uint32_t value = meta_v->data;
6090                 uint32_t mask = meta_m->data;
6091
6092                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6093                 if (reg < 0)
6094                         return;
6095                 /*
6096                  * In datapath code there is no endianness
6097                  * coversions for perfromance reasons, all
6098                  * pattern conversions are done in rte_flow.
6099                  */
6100                 value = rte_cpu_to_be_32(value);
6101                 mask = rte_cpu_to_be_32(mask);
6102                 if (reg == REG_C_0) {
6103                         struct mlx5_priv *priv = dev->data->dev_private;
6104                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6105                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6106 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6107                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6108
6109                         value >>= shr_c0;
6110                         mask >>= shr_c0;
6111 #endif
6112                         value <<= shl_c0;
6113                         mask <<= shl_c0;
6114                         assert(msk_c0);
6115                         assert(!(~msk_c0 & mask));
6116                 }
6117                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6118         }
6119 }
6120
6121 /**
6122  * Add vport metadata Reg C0 item to matcher
6123  *
6124  * @param[in, out] matcher
6125  *   Flow matcher.
6126  * @param[in, out] key
6127  *   Flow matcher value.
6128  * @param[in] reg
6129  *   Flow pattern to translate.
6130  */
6131 static void
6132 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6133                                   uint32_t value, uint32_t mask)
6134 {
6135         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6136 }
6137
6138 /**
6139  * Add tag item to matcher
6140  *
6141  * @param[in] dev
6142  *   The devich to configure through.
6143  * @param[in, out] matcher
6144  *   Flow matcher.
6145  * @param[in, out] key
6146  *   Flow matcher value.
6147  * @param[in] item
6148  *   Flow pattern to translate.
6149  */
6150 static void
6151 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6152                                 void *matcher, void *key,
6153                                 const struct rte_flow_item *item)
6154 {
6155         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6156         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6157         uint32_t mask, value;
6158
6159         assert(tag_v);
6160         value = tag_v->data;
6161         mask = tag_m ? tag_m->data : UINT32_MAX;
6162         if (tag_v->id == REG_C_0) {
6163                 struct mlx5_priv *priv = dev->data->dev_private;
6164                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6165                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6166
6167                 mask &= msk_c0;
6168                 mask <<= shl_c0;
6169                 value <<= shl_c0;
6170         }
6171         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6172 }
6173
6174 /**
6175  * Add TAG item to matcher
6176  *
6177  * @param[in] dev
6178  *   The devich to configure through.
6179  * @param[in, out] matcher
6180  *   Flow matcher.
6181  * @param[in, out] key
6182  *   Flow matcher value.
6183  * @param[in] item
6184  *   Flow pattern to translate.
6185  */
6186 static void
6187 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6188                            void *matcher, void *key,
6189                            const struct rte_flow_item *item)
6190 {
6191         const struct rte_flow_item_tag *tag_v = item->spec;
6192         const struct rte_flow_item_tag *tag_m = item->mask;
6193         enum modify_reg reg;
6194
6195         assert(tag_v);
6196         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6197         /* Get the metadata register index for the tag. */
6198         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6199         assert(reg > 0);
6200         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6201 }
6202
6203 /**
6204  * Add source vport match to the specified matcher.
6205  *
6206  * @param[in, out] matcher
6207  *   Flow matcher.
6208  * @param[in, out] key
6209  *   Flow matcher value.
6210  * @param[in] port
6211  *   Source vport value to match
6212  * @param[in] mask
6213  *   Mask
6214  */
6215 static void
6216 flow_dv_translate_item_source_vport(void *matcher, void *key,
6217                                     int16_t port, uint16_t mask)
6218 {
6219         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6220         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6221
6222         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6223         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6224 }
6225
6226 /**
6227  * Translate port-id item to eswitch match on  port-id.
6228  *
6229  * @param[in] dev
6230  *   The devich to configure through.
6231  * @param[in, out] matcher
6232  *   Flow matcher.
6233  * @param[in, out] key
6234  *   Flow matcher value.
6235  * @param[in] item
6236  *   Flow pattern to translate.
6237  *
6238  * @return
6239  *   0 on success, a negative errno value otherwise.
6240  */
6241 static int
6242 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6243                                void *key, const struct rte_flow_item *item)
6244 {
6245         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6246         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6247         struct mlx5_priv *priv;
6248         uint16_t mask, id;
6249
6250         mask = pid_m ? pid_m->id : 0xffff;
6251         id = pid_v ? pid_v->id : dev->data->port_id;
6252         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6253         if (!priv)
6254                 return -rte_errno;
6255         /* Translate to vport field or to metadata, depending on mode. */
6256         if (priv->vport_meta_mask)
6257                 flow_dv_translate_item_meta_vport(matcher, key,
6258                                                   priv->vport_meta_tag,
6259                                                   priv->vport_meta_mask);
6260         else
6261                 flow_dv_translate_item_source_vport(matcher, key,
6262                                                     priv->vport_id, mask);
6263         return 0;
6264 }
6265
6266 /**
6267  * Add ICMP6 item to matcher and to the value.
6268  *
6269  * @param[in, out] matcher
6270  *   Flow matcher.
6271  * @param[in, out] key
6272  *   Flow matcher value.
6273  * @param[in] item
6274  *   Flow pattern to translate.
6275  * @param[in] inner
6276  *   Item is inner pattern.
6277  */
6278 static void
6279 flow_dv_translate_item_icmp6(void *matcher, void *key,
6280                               const struct rte_flow_item *item,
6281                               int inner)
6282 {
6283         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6284         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6285         void *headers_m;
6286         void *headers_v;
6287         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6288                                      misc_parameters_3);
6289         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6290         if (inner) {
6291                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6292                                          inner_headers);
6293                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6294         } else {
6295                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6296                                          outer_headers);
6297                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6298         }
6299         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6300         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6301         if (!icmp6_v)
6302                 return;
6303         if (!icmp6_m)
6304                 icmp6_m = &rte_flow_item_icmp6_mask;
6305         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6306         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6307                  icmp6_v->type & icmp6_m->type);
6308         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6309         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6310                  icmp6_v->code & icmp6_m->code);
6311 }
6312
6313 /**
6314  * Add ICMP item to matcher and to the value.
6315  *
6316  * @param[in, out] matcher
6317  *   Flow matcher.
6318  * @param[in, out] key
6319  *   Flow matcher value.
6320  * @param[in] item
6321  *   Flow pattern to translate.
6322  * @param[in] inner
6323  *   Item is inner pattern.
6324  */
6325 static void
6326 flow_dv_translate_item_icmp(void *matcher, void *key,
6327                             const struct rte_flow_item *item,
6328                             int inner)
6329 {
6330         const struct rte_flow_item_icmp *icmp_m = item->mask;
6331         const struct rte_flow_item_icmp *icmp_v = item->spec;
6332         void *headers_m;
6333         void *headers_v;
6334         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6335                                      misc_parameters_3);
6336         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6337         if (inner) {
6338                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6339                                          inner_headers);
6340                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6341         } else {
6342                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6343                                          outer_headers);
6344                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6345         }
6346         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6347         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6348         if (!icmp_v)
6349                 return;
6350         if (!icmp_m)
6351                 icmp_m = &rte_flow_item_icmp_mask;
6352         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6353                  icmp_m->hdr.icmp_type);
6354         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6355                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6356         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6357                  icmp_m->hdr.icmp_code);
6358         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6359                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6360 }
6361
6362 /**
6363  * Add GTP item to matcher and to the value.
6364  *
6365  * @param[in, out] matcher
6366  *   Flow matcher.
6367  * @param[in, out] key
6368  *   Flow matcher value.
6369  * @param[in] item
6370  *   Flow pattern to translate.
6371  * @param[in] inner
6372  *   Item is inner pattern.
6373  */
6374 static void
6375 flow_dv_translate_item_gtp(void *matcher, void *key,
6376                            const struct rte_flow_item *item, int inner)
6377 {
6378         const struct rte_flow_item_gtp *gtp_m = item->mask;
6379         const struct rte_flow_item_gtp *gtp_v = item->spec;
6380         void *headers_m;
6381         void *headers_v;
6382         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6383                                      misc_parameters_3);
6384         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6385         uint16_t dport = RTE_GTPU_UDP_PORT;
6386
6387         if (inner) {
6388                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6389                                          inner_headers);
6390                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6391         } else {
6392                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6393                                          outer_headers);
6394                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6395         }
6396         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6397                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6398                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6399         }
6400         if (!gtp_v)
6401                 return;
6402         if (!gtp_m)
6403                 gtp_m = &rte_flow_item_gtp_mask;
6404         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6405         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6406                  gtp_v->msg_type & gtp_m->msg_type);
6407         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6408                  rte_be_to_cpu_32(gtp_m->teid));
6409         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6410                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6411 }
6412
6413 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6414
6415 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6416         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6417                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6418
6419 /**
6420  * Calculate flow matcher enable bitmap.
6421  *
6422  * @param match_criteria
6423  *   Pointer to flow matcher criteria.
6424  *
6425  * @return
6426  *   Bitmap of enabled fields.
6427  */
6428 static uint8_t
6429 flow_dv_matcher_enable(uint32_t *match_criteria)
6430 {
6431         uint8_t match_criteria_enable;
6432
6433         match_criteria_enable =
6434                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6435                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6436         match_criteria_enable |=
6437                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6438                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6439         match_criteria_enable |=
6440                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6441                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6442         match_criteria_enable |=
6443                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6444                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6445         match_criteria_enable |=
6446                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6447                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6448         return match_criteria_enable;
6449 }
6450
6451
6452 /**
6453  * Get a flow table.
6454  *
6455  * @param[in, out] dev
6456  *   Pointer to rte_eth_dev structure.
6457  * @param[in] table_id
6458  *   Table id to use.
6459  * @param[in] egress
6460  *   Direction of the table.
6461  * @param[in] transfer
6462  *   E-Switch or NIC flow.
6463  * @param[out] error
6464  *   pointer to error structure.
6465  *
6466  * @return
6467  *   Returns tables resource based on the index, NULL in case of failed.
6468  */
6469 static struct mlx5_flow_tbl_resource *
6470 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6471                          uint32_t table_id, uint8_t egress,
6472                          uint8_t transfer,
6473                          struct rte_flow_error *error)
6474 {
6475         struct mlx5_priv *priv = dev->data->dev_private;
6476         struct mlx5_ibv_shared *sh = priv->sh;
6477         struct mlx5_flow_tbl_resource *tbl;
6478         union mlx5_flow_tbl_key table_key = {
6479                 {
6480                         .table_id = table_id,
6481                         .reserved = 0,
6482                         .domain = !!transfer,
6483                         .direction = !!egress,
6484                 }
6485         };
6486         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6487                                                          table_key.v64);
6488         struct mlx5_flow_tbl_data_entry *tbl_data;
6489         int ret;
6490         void *domain;
6491
6492         if (pos) {
6493                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6494                                         entry);
6495                 tbl = &tbl_data->tbl;
6496                 rte_atomic32_inc(&tbl->refcnt);
6497                 return tbl;
6498         }
6499         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6500         if (!tbl_data) {
6501                 rte_flow_error_set(error, ENOMEM,
6502                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6503                                    NULL,
6504                                    "cannot allocate flow table data entry");
6505                 return NULL;
6506         }
6507         tbl = &tbl_data->tbl;
6508         pos = &tbl_data->entry;
6509         if (transfer)
6510                 domain = sh->fdb_domain;
6511         else if (egress)
6512                 domain = sh->tx_domain;
6513         else
6514                 domain = sh->rx_domain;
6515         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6516         if (!tbl->obj) {
6517                 rte_flow_error_set(error, ENOMEM,
6518                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6519                                    NULL, "cannot create flow table object");
6520                 rte_free(tbl_data);
6521                 return NULL;
6522         }
6523         /*
6524          * No multi-threads now, but still better to initialize the reference
6525          * count before insert it into the hash list.
6526          */
6527         rte_atomic32_init(&tbl->refcnt);
6528         /* Jump action reference count is initialized here. */
6529         rte_atomic32_init(&tbl_data->jump.refcnt);
6530         pos->key = table_key.v64;
6531         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6532         if (ret < 0) {
6533                 rte_flow_error_set(error, -ret,
6534                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6535                                    "cannot insert flow table data entry");
6536                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6537                 rte_free(tbl_data);
6538         }
6539         rte_atomic32_inc(&tbl->refcnt);
6540         return tbl;
6541 }
6542
6543 /**
6544  * Release a flow table.
6545  *
6546  * @param[in] dev
6547  *   Pointer to rte_eth_dev structure.
6548  * @param[in] tbl
6549  *   Table resource to be released.
6550  *
6551  * @return
6552  *   Returns 0 if table was released, else return 1;
6553  */
6554 static int
6555 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6556                              struct mlx5_flow_tbl_resource *tbl)
6557 {
6558         struct mlx5_priv *priv = dev->data->dev_private;
6559         struct mlx5_ibv_shared *sh = priv->sh;
6560         struct mlx5_flow_tbl_data_entry *tbl_data =
6561                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6562
6563         if (!tbl)
6564                 return 0;
6565         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6566                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6567
6568                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6569                 tbl->obj = NULL;
6570                 /* remove the entry from the hash list and free memory. */
6571                 mlx5_hlist_remove(sh->flow_tbls, pos);
6572                 rte_free(tbl_data);
6573                 return 0;
6574         }
6575         return 1;
6576 }
6577
6578 /**
6579  * Register the flow matcher.
6580  *
6581  * @param[in, out] dev
6582  *   Pointer to rte_eth_dev structure.
6583  * @param[in, out] matcher
6584  *   Pointer to flow matcher.
6585  * @param[in, out] key
6586  *   Pointer to flow table key.
6587  * @parm[in, out] dev_flow
6588  *   Pointer to the dev_flow.
6589  * @param[out] error
6590  *   pointer to error structure.
6591  *
6592  * @return
6593  *   0 on success otherwise -errno and errno is set.
6594  */
6595 static int
6596 flow_dv_matcher_register(struct rte_eth_dev *dev,
6597                          struct mlx5_flow_dv_matcher *matcher,
6598                          union mlx5_flow_tbl_key *key,
6599                          struct mlx5_flow *dev_flow,
6600                          struct rte_flow_error *error)
6601 {
6602         struct mlx5_priv *priv = dev->data->dev_private;
6603         struct mlx5_ibv_shared *sh = priv->sh;
6604         struct mlx5_flow_dv_matcher *cache_matcher;
6605         struct mlx5dv_flow_matcher_attr dv_attr = {
6606                 .type = IBV_FLOW_ATTR_NORMAL,
6607                 .match_mask = (void *)&matcher->mask,
6608         };
6609         struct mlx5_flow_tbl_resource *tbl;
6610         struct mlx5_flow_tbl_data_entry *tbl_data;
6611
6612         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6613                                        key->domain, error);
6614         if (!tbl)
6615                 return -rte_errno;      /* No need to refill the error info */
6616         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6617         /* Lookup from cache. */
6618         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6619                 if (matcher->crc == cache_matcher->crc &&
6620                     matcher->priority == cache_matcher->priority &&
6621                     !memcmp((const void *)matcher->mask.buf,
6622                             (const void *)cache_matcher->mask.buf,
6623                             cache_matcher->mask.size)) {
6624                         DRV_LOG(DEBUG,
6625                                 "%s group %u priority %hd use %s "
6626                                 "matcher %p: refcnt %d++",
6627                                 key->domain ? "FDB" : "NIC", key->table_id,
6628                                 cache_matcher->priority,
6629                                 key->direction ? "tx" : "rx",
6630                                 (void *)cache_matcher,
6631                                 rte_atomic32_read(&cache_matcher->refcnt));
6632                         rte_atomic32_inc(&cache_matcher->refcnt);
6633                         dev_flow->dv.matcher = cache_matcher;
6634                         /* old matcher should not make the table ref++. */
6635                         flow_dv_tbl_resource_release(dev, tbl);
6636                         return 0;
6637                 }
6638         }
6639         /* Register new matcher. */
6640         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6641         if (!cache_matcher) {
6642                 flow_dv_tbl_resource_release(dev, tbl);
6643                 return rte_flow_error_set(error, ENOMEM,
6644                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6645                                           "cannot allocate matcher memory");
6646         }
6647         *cache_matcher = *matcher;
6648         dv_attr.match_criteria_enable =
6649                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6650         dv_attr.priority = matcher->priority;
6651         if (key->direction)
6652                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6653         cache_matcher->matcher_object =
6654                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6655         if (!cache_matcher->matcher_object) {
6656                 rte_free(cache_matcher);
6657 #ifdef HAVE_MLX5DV_DR
6658                 flow_dv_tbl_resource_release(dev, tbl);
6659 #endif
6660                 return rte_flow_error_set(error, ENOMEM,
6661                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6662                                           NULL, "cannot create matcher");
6663         }
6664         /* Save the table information */
6665         cache_matcher->tbl = tbl;
6666         rte_atomic32_init(&cache_matcher->refcnt);
6667         /* only matcher ref++, table ref++ already done above in get API. */
6668         rte_atomic32_inc(&cache_matcher->refcnt);
6669         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6670         dev_flow->dv.matcher = cache_matcher;
6671         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6672                 key->domain ? "FDB" : "NIC", key->table_id,
6673                 cache_matcher->priority,
6674                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6675                 rte_atomic32_read(&cache_matcher->refcnt));
6676         return 0;
6677 }
6678
6679 /**
6680  * Find existing tag resource or create and register a new one.
6681  *
6682  * @param dev[in, out]
6683  *   Pointer to rte_eth_dev structure.
6684  * @param[in, out] tag_be24
6685  *   Tag value in big endian then R-shift 8.
6686  * @parm[in, out] dev_flow
6687  *   Pointer to the dev_flow.
6688  * @param[out] error
6689  *   pointer to error structure.
6690  *
6691  * @return
6692  *   0 on success otherwise -errno and errno is set.
6693  */
6694 static int
6695 flow_dv_tag_resource_register
6696                         (struct rte_eth_dev *dev,
6697                          uint32_t tag_be24,
6698                          struct mlx5_flow *dev_flow,
6699                          struct rte_flow_error *error)
6700 {
6701         struct mlx5_priv *priv = dev->data->dev_private;
6702         struct mlx5_ibv_shared *sh = priv->sh;
6703         struct mlx5_flow_dv_tag_resource *cache_resource;
6704         struct mlx5_hlist_entry *entry;
6705
6706         /* Lookup a matching resource from cache. */
6707         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6708         if (entry) {
6709                 cache_resource = container_of
6710                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6711                 rte_atomic32_inc(&cache_resource->refcnt);
6712                 dev_flow->dv.tag_resource = cache_resource;
6713                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6714                         (void *)cache_resource,
6715                         rte_atomic32_read(&cache_resource->refcnt));
6716                 return 0;
6717         }
6718         /* Register new resource. */
6719         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6720         if (!cache_resource)
6721                 return rte_flow_error_set(error, ENOMEM,
6722                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6723                                           "cannot allocate resource memory");
6724         cache_resource->entry.key = (uint64_t)tag_be24;
6725         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6726         if (!cache_resource->action) {
6727                 rte_free(cache_resource);
6728                 return rte_flow_error_set(error, ENOMEM,
6729                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6730                                           NULL, "cannot create action");
6731         }
6732         rte_atomic32_init(&cache_resource->refcnt);
6733         rte_atomic32_inc(&cache_resource->refcnt);
6734         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6735                 mlx5_glue->destroy_flow_action(cache_resource->action);
6736                 rte_free(cache_resource);
6737                 return rte_flow_error_set(error, EEXIST,
6738                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6739                                           NULL, "cannot insert tag");
6740         }
6741         dev_flow->dv.tag_resource = cache_resource;
6742         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6743                 (void *)cache_resource,
6744                 rte_atomic32_read(&cache_resource->refcnt));
6745         return 0;
6746 }
6747
6748 /**
6749  * Release the tag.
6750  *
6751  * @param dev
6752  *   Pointer to Ethernet device.
6753  * @param flow
6754  *   Pointer to mlx5_flow.
6755  *
6756  * @return
6757  *   1 while a reference on it exists, 0 when freed.
6758  */
6759 static int
6760 flow_dv_tag_release(struct rte_eth_dev *dev,
6761                     struct mlx5_flow_dv_tag_resource *tag)
6762 {
6763         struct mlx5_priv *priv = dev->data->dev_private;
6764         struct mlx5_ibv_shared *sh = priv->sh;
6765
6766         assert(tag);
6767         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6768                 dev->data->port_id, (void *)tag,
6769                 rte_atomic32_read(&tag->refcnt));
6770         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6771                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6772                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6773                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6774                         dev->data->port_id, (void *)tag);
6775                 rte_free(tag);
6776                 return 0;
6777         }
6778         return 1;
6779 }
6780
6781 /**
6782  * Translate port ID action to vport.
6783  *
6784  * @param[in] dev
6785  *   Pointer to rte_eth_dev structure.
6786  * @param[in] action
6787  *   Pointer to the port ID action.
6788  * @param[out] dst_port_id
6789  *   The target port ID.
6790  * @param[out] error
6791  *   Pointer to the error structure.
6792  *
6793  * @return
6794  *   0 on success, a negative errno value otherwise and rte_errno is set.
6795  */
6796 static int
6797 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6798                                  const struct rte_flow_action *action,
6799                                  uint32_t *dst_port_id,
6800                                  struct rte_flow_error *error)
6801 {
6802         uint32_t port;
6803         struct mlx5_priv *priv;
6804         const struct rte_flow_action_port_id *conf =
6805                         (const struct rte_flow_action_port_id *)action->conf;
6806
6807         port = conf->original ? dev->data->port_id : conf->id;
6808         priv = mlx5_port_to_eswitch_info(port, false);
6809         if (!priv)
6810                 return rte_flow_error_set(error, -rte_errno,
6811                                           RTE_FLOW_ERROR_TYPE_ACTION,
6812                                           NULL,
6813                                           "No eswitch info was found for port");
6814 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6815         /*
6816          * This parameter is transferred to
6817          * mlx5dv_dr_action_create_dest_ib_port().
6818          */
6819         *dst_port_id = priv->ibv_port;
6820 #else
6821         /*
6822          * Legacy mode, no LAG configurations is supported.
6823          * This parameter is transferred to
6824          * mlx5dv_dr_action_create_dest_vport().
6825          */
6826         *dst_port_id = priv->vport_id;
6827 #endif
6828         return 0;
6829 }
6830
6831 /**
6832  * Add Tx queue matcher
6833  *
6834  * @param[in] dev
6835  *   Pointer to the dev struct.
6836  * @param[in, out] matcher
6837  *   Flow matcher.
6838  * @param[in, out] key
6839  *   Flow matcher value.
6840  * @param[in] item
6841  *   Flow pattern to translate.
6842  * @param[in] inner
6843  *   Item is inner pattern.
6844  */
6845 static void
6846 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6847                                 void *matcher, void *key,
6848                                 const struct rte_flow_item *item)
6849 {
6850         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6851         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6852         void *misc_m =
6853                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6854         void *misc_v =
6855                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6856         struct mlx5_txq_ctrl *txq;
6857         uint32_t queue;
6858
6859
6860         queue_m = (const void *)item->mask;
6861         if (!queue_m)
6862                 return;
6863         queue_v = (const void *)item->spec;
6864         if (!queue_v)
6865                 return;
6866         txq = mlx5_txq_get(dev, queue_v->queue);
6867         if (!txq)
6868                 return;
6869         queue = txq->obj->sq->id;
6870         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6871         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6872                  queue & queue_m->queue);
6873         mlx5_txq_release(dev, queue_v->queue);
6874 }
6875
6876 /**
6877  * Set the hash fields according to the @p flow information.
6878  *
6879  * @param[in] dev_flow
6880  *   Pointer to the mlx5_flow.
6881  */
6882 static void
6883 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6884 {
6885         struct rte_flow *flow = dev_flow->flow;
6886         uint64_t items = dev_flow->layers;
6887         int rss_inner = 0;
6888         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6889
6890         dev_flow->hash_fields = 0;
6891 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6892         if (flow->rss.level >= 2) {
6893                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6894                 rss_inner = 1;
6895         }
6896 #endif
6897         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6898             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6899                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6900                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6901                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6902                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6903                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6904                         else
6905                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6906                 }
6907         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6908                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6909                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6910                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6911                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
6912                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6913                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
6914                         else
6915                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
6916                 }
6917         }
6918         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
6919             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
6920                 if (rss_types & ETH_RSS_UDP) {
6921                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6922                                 dev_flow->hash_fields |=
6923                                                 IBV_RX_HASH_SRC_PORT_UDP;
6924                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6925                                 dev_flow->hash_fields |=
6926                                                 IBV_RX_HASH_DST_PORT_UDP;
6927                         else
6928                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
6929                 }
6930         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
6931                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
6932                 if (rss_types & ETH_RSS_TCP) {
6933                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6934                                 dev_flow->hash_fields |=
6935                                                 IBV_RX_HASH_SRC_PORT_TCP;
6936                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6937                                 dev_flow->hash_fields |=
6938                                                 IBV_RX_HASH_DST_PORT_TCP;
6939                         else
6940                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
6941                 }
6942         }
6943 }
6944
6945 /**
6946  * Fill the flow with DV spec, lock free
6947  * (mutex should be acquired by caller).
6948  *
6949  * @param[in] dev
6950  *   Pointer to rte_eth_dev structure.
6951  * @param[in, out] dev_flow
6952  *   Pointer to the sub flow.
6953  * @param[in] attr
6954  *   Pointer to the flow attributes.
6955  * @param[in] items
6956  *   Pointer to the list of items.
6957  * @param[in] actions
6958  *   Pointer to the list of actions.
6959  * @param[out] error
6960  *   Pointer to the error structure.
6961  *
6962  * @return
6963  *   0 on success, a negative errno value otherwise and rte_errno is set.
6964  */
6965 static int
6966 __flow_dv_translate(struct rte_eth_dev *dev,
6967                     struct mlx5_flow *dev_flow,
6968                     const struct rte_flow_attr *attr,
6969                     const struct rte_flow_item items[],
6970                     const struct rte_flow_action actions[],
6971                     struct rte_flow_error *error)
6972 {
6973         struct mlx5_priv *priv = dev->data->dev_private;
6974         struct mlx5_dev_config *dev_conf = &priv->config;
6975         struct rte_flow *flow = dev_flow->flow;
6976         uint64_t item_flags = 0;
6977         uint64_t last_item = 0;
6978         uint64_t action_flags = 0;
6979         uint64_t priority = attr->priority;
6980         struct mlx5_flow_dv_matcher matcher = {
6981                 .mask = {
6982                         .size = sizeof(matcher.mask.buf),
6983                 },
6984         };
6985         int actions_n = 0;
6986         bool actions_end = false;
6987         union {
6988                 struct mlx5_flow_dv_modify_hdr_resource res;
6989                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
6990                             sizeof(struct mlx5_modification_cmd) *
6991                             (MLX5_MAX_MODIFY_NUM + 1)];
6992         } mhdr_dummy;
6993         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
6994         union flow_dv_attr flow_attr = { .attr = 0 };
6995         uint32_t tag_be;
6996         union mlx5_flow_tbl_key tbl_key;
6997         uint32_t modify_action_position = UINT32_MAX;
6998         void *match_mask = matcher.mask.buf;
6999         void *match_value = dev_flow->dv.value.buf;
7000         uint8_t next_protocol = 0xff;
7001         struct rte_vlan_hdr vlan = { 0 };
7002         uint32_t table;
7003         int ret = 0;
7004
7005         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7006                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7007         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7008                                        &table, error);
7009         if (ret)
7010                 return ret;
7011         dev_flow->group = table;
7012         if (attr->transfer)
7013                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7014         if (priority == MLX5_FLOW_PRIO_RSVD)
7015                 priority = dev_conf->flow_prio - 1;
7016         /* number of actions must be set to 0 in case of dirty stack. */
7017         mhdr_res->actions_num = 0;
7018         for (; !actions_end ; actions++) {
7019                 const struct rte_flow_action_queue *queue;
7020                 const struct rte_flow_action_rss *rss;
7021                 const struct rte_flow_action *action = actions;
7022                 const struct rte_flow_action_count *count = action->conf;
7023                 const uint8_t *rss_key;
7024                 const struct rte_flow_action_jump *jump_data;
7025                 const struct rte_flow_action_meter *mtr;
7026                 struct mlx5_flow_tbl_resource *tbl;
7027                 uint32_t port_id = 0;
7028                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7029                 int action_type = actions->type;
7030                 const struct rte_flow_action *found_action = NULL;
7031
7032                 switch (action_type) {
7033                 case RTE_FLOW_ACTION_TYPE_VOID:
7034                         break;
7035                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7036                         if (flow_dv_translate_action_port_id(dev, action,
7037                                                              &port_id, error))
7038                                 return -rte_errno;
7039                         port_id_resource.port_id = port_id;
7040                         if (flow_dv_port_id_action_resource_register
7041                             (dev, &port_id_resource, dev_flow, error))
7042                                 return -rte_errno;
7043                         dev_flow->dv.actions[actions_n++] =
7044                                 dev_flow->dv.port_id_action->action;
7045                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7046                         break;
7047                 case RTE_FLOW_ACTION_TYPE_FLAG:
7048                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7049                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7050                                 struct rte_flow_action_mark mark = {
7051                                         .id = MLX5_FLOW_MARK_DEFAULT,
7052                                 };
7053
7054                                 if (flow_dv_convert_action_mark(dev, &mark,
7055                                                                 mhdr_res,
7056                                                                 error))
7057                                         return -rte_errno;
7058                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7059                                 break;
7060                         }
7061                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7062                         if (!dev_flow->dv.tag_resource)
7063                                 if (flow_dv_tag_resource_register
7064                                     (dev, tag_be, dev_flow, error))
7065                                         return -rte_errno;
7066                         dev_flow->dv.actions[actions_n++] =
7067                                 dev_flow->dv.tag_resource->action;
7068                         break;
7069                 case RTE_FLOW_ACTION_TYPE_MARK:
7070                         action_flags |= MLX5_FLOW_ACTION_MARK;
7071                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7072                                 const struct rte_flow_action_mark *mark =
7073                                         (const struct rte_flow_action_mark *)
7074                                                 actions->conf;
7075
7076                                 if (flow_dv_convert_action_mark(dev, mark,
7077                                                                 mhdr_res,
7078                                                                 error))
7079                                         return -rte_errno;
7080                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7081                                 break;
7082                         }
7083                         /* Fall-through */
7084                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7085                         /* Legacy (non-extensive) MARK action. */
7086                         tag_be = mlx5_flow_mark_set
7087                               (((const struct rte_flow_action_mark *)
7088                                (actions->conf))->id);
7089                         if (!dev_flow->dv.tag_resource)
7090                                 if (flow_dv_tag_resource_register
7091                                     (dev, tag_be, dev_flow, error))
7092                                         return -rte_errno;
7093                         dev_flow->dv.actions[actions_n++] =
7094                                 dev_flow->dv.tag_resource->action;
7095                         break;
7096                 case RTE_FLOW_ACTION_TYPE_SET_META:
7097                         if (flow_dv_convert_action_set_meta
7098                                 (dev, mhdr_res, attr,
7099                                  (const struct rte_flow_action_set_meta *)
7100                                   actions->conf, error))
7101                                 return -rte_errno;
7102                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7103                         break;
7104                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7105                         if (flow_dv_convert_action_set_tag
7106                                 (dev, mhdr_res,
7107                                  (const struct rte_flow_action_set_tag *)
7108                                   actions->conf, error))
7109                                 return -rte_errno;
7110                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7111                         break;
7112                 case RTE_FLOW_ACTION_TYPE_DROP:
7113                         action_flags |= MLX5_FLOW_ACTION_DROP;
7114                         break;
7115                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7116                         assert(flow->rss.queue);
7117                         queue = actions->conf;
7118                         flow->rss.queue_num = 1;
7119                         (*flow->rss.queue)[0] = queue->index;
7120                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7121                         break;
7122                 case RTE_FLOW_ACTION_TYPE_RSS:
7123                         assert(flow->rss.queue);
7124                         rss = actions->conf;
7125                         if (flow->rss.queue)
7126                                 memcpy((*flow->rss.queue), rss->queue,
7127                                        rss->queue_num * sizeof(uint16_t));
7128                         flow->rss.queue_num = rss->queue_num;
7129                         /* NULL RSS key indicates default RSS key. */
7130                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7131                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7132                         /*
7133                          * rss->level and rss.types should be set in advance
7134                          * when expanding items for RSS.
7135                          */
7136                         action_flags |= MLX5_FLOW_ACTION_RSS;
7137                         break;
7138                 case RTE_FLOW_ACTION_TYPE_COUNT:
7139                         if (!dev_conf->devx) {
7140                                 rte_errno = ENOTSUP;
7141                                 goto cnt_err;
7142                         }
7143                         flow->counter = flow_dv_counter_alloc(dev,
7144                                                               count->shared,
7145                                                               count->id,
7146                                                               dev_flow->group);
7147                         if (flow->counter == NULL)
7148                                 goto cnt_err;
7149                         dev_flow->dv.actions[actions_n++] =
7150                                 flow->counter->action;
7151                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7152                         break;
7153 cnt_err:
7154                         if (rte_errno == ENOTSUP)
7155                                 return rte_flow_error_set
7156                                               (error, ENOTSUP,
7157                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7158                                                NULL,
7159                                                "count action not supported");
7160                         else
7161                                 return rte_flow_error_set
7162                                                 (error, rte_errno,
7163                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7164                                                  action,
7165                                                  "cannot create counter"
7166                                                   " object.");
7167                         break;
7168                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7169                         dev_flow->dv.actions[actions_n++] =
7170                                                 priv->sh->pop_vlan_action;
7171                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7172                         break;
7173                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7174                         flow_dev_get_vlan_info_from_items(items, &vlan);
7175                         vlan.eth_proto = rte_be_to_cpu_16
7176                              ((((const struct rte_flow_action_of_push_vlan *)
7177                                                    actions->conf)->ethertype));
7178                         found_action = mlx5_flow_find_action
7179                                         (actions + 1,
7180                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7181                         if (found_action)
7182                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7183                         found_action = mlx5_flow_find_action
7184                                         (actions + 1,
7185                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7186                         if (found_action)
7187                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7188                         if (flow_dv_create_action_push_vlan
7189                                             (dev, attr, &vlan, dev_flow, error))
7190                                 return -rte_errno;
7191                         dev_flow->dv.actions[actions_n++] =
7192                                            dev_flow->dv.push_vlan_res->action;
7193                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7194                         break;
7195                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7196                         /* of_vlan_push action handled this action */
7197                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7198                         break;
7199                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7200                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7201                                 break;
7202                         flow_dev_get_vlan_info_from_items(items, &vlan);
7203                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7204                         /* If no VLAN push - this is a modify header action */
7205                         if (flow_dv_convert_action_modify_vlan_vid
7206                                                 (mhdr_res, actions, error))
7207                                 return -rte_errno;
7208                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7209                         break;
7210                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7211                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7212                         if (flow_dv_create_action_l2_encap(dev, actions,
7213                                                            dev_flow,
7214                                                            attr->transfer,
7215                                                            error))
7216                                 return -rte_errno;
7217                         dev_flow->dv.actions[actions_n++] =
7218                                 dev_flow->dv.encap_decap->verbs_action;
7219                         action_flags |= actions->type ==
7220                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
7221                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
7222                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
7223                         break;
7224                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7225                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7226                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7227                                                            attr->transfer,
7228                                                            error))
7229                                 return -rte_errno;
7230                         dev_flow->dv.actions[actions_n++] =
7231                                 dev_flow->dv.encap_decap->verbs_action;
7232                         action_flags |= actions->type ==
7233                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
7234                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
7235                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
7236                         break;
7237                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7238                         /* Handle encap with preceding decap. */
7239                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
7240                                 if (flow_dv_create_action_raw_encap
7241                                         (dev, actions, dev_flow, attr, error))
7242                                         return -rte_errno;
7243                                 dev_flow->dv.actions[actions_n++] =
7244                                         dev_flow->dv.encap_decap->verbs_action;
7245                         } else {
7246                                 /* Handle encap without preceding decap. */
7247                                 if (flow_dv_create_action_l2_encap
7248                                     (dev, actions, dev_flow, attr->transfer,
7249                                      error))
7250                                         return -rte_errno;
7251                                 dev_flow->dv.actions[actions_n++] =
7252                                         dev_flow->dv.encap_decap->verbs_action;
7253                         }
7254                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
7255                         break;
7256                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7257                         /* Check if this decap is followed by encap. */
7258                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
7259                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
7260                                action++) {
7261                         }
7262                         /* Handle decap only if it isn't followed by encap. */
7263                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7264                                 if (flow_dv_create_action_l2_decap
7265                                     (dev, dev_flow, attr->transfer, error))
7266                                         return -rte_errno;
7267                                 dev_flow->dv.actions[actions_n++] =
7268                                         dev_flow->dv.encap_decap->verbs_action;
7269                         }
7270                         /* If decap is followed by encap, handle it at encap. */
7271                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
7272                         break;
7273                 case RTE_FLOW_ACTION_TYPE_JUMP:
7274                         jump_data = action->conf;
7275                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7276                                                        jump_data->group, &table,
7277                                                        error);
7278                         if (ret)
7279                                 return ret;
7280                         tbl = flow_dv_tbl_resource_get(dev, table,
7281                                                        attr->egress,
7282                                                        attr->transfer, error);
7283                         if (!tbl)
7284                                 return rte_flow_error_set
7285                                                 (error, errno,
7286                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7287                                                  NULL,
7288                                                  "cannot create jump action.");
7289                         if (flow_dv_jump_tbl_resource_register
7290                             (dev, tbl, dev_flow, error)) {
7291                                 flow_dv_tbl_resource_release(dev, tbl);
7292                                 return rte_flow_error_set
7293                                                 (error, errno,
7294                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7295                                                  NULL,
7296                                                  "cannot create jump action.");
7297                         }
7298                         dev_flow->dv.actions[actions_n++] =
7299                                 dev_flow->dv.jump->action;
7300                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7301                         break;
7302                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7303                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7304                         if (flow_dv_convert_action_modify_mac
7305                                         (mhdr_res, actions, error))
7306                                 return -rte_errno;
7307                         action_flags |= actions->type ==
7308                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7309                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7310                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7311                         break;
7312                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7313                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7314                         if (flow_dv_convert_action_modify_ipv4
7315                                         (mhdr_res, actions, error))
7316                                 return -rte_errno;
7317                         action_flags |= actions->type ==
7318                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7319                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7320                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7321                         break;
7322                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7323                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7324                         if (flow_dv_convert_action_modify_ipv6
7325                                         (mhdr_res, actions, error))
7326                                 return -rte_errno;
7327                         action_flags |= actions->type ==
7328                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7329                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7330                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7331                         break;
7332                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7333                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7334                         if (flow_dv_convert_action_modify_tp
7335                                         (mhdr_res, actions, items,
7336                                          &flow_attr, error))
7337                                 return -rte_errno;
7338                         action_flags |= actions->type ==
7339                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7340                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7341                                         MLX5_FLOW_ACTION_SET_TP_DST;
7342                         break;
7343                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7344                         if (flow_dv_convert_action_modify_dec_ttl
7345                                         (mhdr_res, items, &flow_attr, error))
7346                                 return -rte_errno;
7347                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7348                         break;
7349                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7350                         if (flow_dv_convert_action_modify_ttl
7351                                         (mhdr_res, actions, items,
7352                                          &flow_attr, error))
7353                                 return -rte_errno;
7354                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7355                         break;
7356                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7357                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7358                         if (flow_dv_convert_action_modify_tcp_seq
7359                                         (mhdr_res, actions, error))
7360                                 return -rte_errno;
7361                         action_flags |= actions->type ==
7362                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7363                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7364                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7365                         break;
7366
7367                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7368                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7369                         if (flow_dv_convert_action_modify_tcp_ack
7370                                         (mhdr_res, actions, error))
7371                                 return -rte_errno;
7372                         action_flags |= actions->type ==
7373                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7374                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7375                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7376                         break;
7377                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7378                         if (flow_dv_convert_action_set_reg
7379                                         (mhdr_res, actions, error))
7380                                 return -rte_errno;
7381                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7382                         break;
7383                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7384                         if (flow_dv_convert_action_copy_mreg
7385                                         (dev, mhdr_res, actions, error))
7386                                 return -rte_errno;
7387                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7388                         break;
7389                 case RTE_FLOW_ACTION_TYPE_METER:
7390                         mtr = actions->conf;
7391                         if (!flow->meter) {
7392                                 flow->meter = mlx5_flow_meter_attach(priv,
7393                                                         mtr->mtr_id, attr,
7394                                                         error);
7395                                 if (!flow->meter)
7396                                         return rte_flow_error_set(error,
7397                                                 rte_errno,
7398                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7399                                                 NULL,
7400                                                 "meter not found "
7401                                                 "or invalid parameters");
7402                         }
7403                         /* Set the meter action. */
7404                         dev_flow->dv.actions[actions_n++] =
7405                                 flow->meter->mfts->meter_action;
7406                         action_flags |= MLX5_FLOW_ACTION_METER;
7407                         break;
7408                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7409                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7410                                                               actions, error))
7411                                 return -rte_errno;
7412                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7413                         break;
7414                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7415                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7416                                                               actions, error))
7417                                 return -rte_errno;
7418                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7419                         break;
7420                 case RTE_FLOW_ACTION_TYPE_END:
7421                         actions_end = true;
7422                         if (mhdr_res->actions_num) {
7423                                 /* create modify action if needed. */
7424                                 if (flow_dv_modify_hdr_resource_register
7425                                         (dev, mhdr_res, dev_flow, error))
7426                                         return -rte_errno;
7427                                 dev_flow->dv.actions[modify_action_position] =
7428                                         dev_flow->dv.modify_hdr->verbs_action;
7429                         }
7430                         break;
7431                 default:
7432                         break;
7433                 }
7434                 if (mhdr_res->actions_num &&
7435                     modify_action_position == UINT32_MAX)
7436                         modify_action_position = actions_n++;
7437         }
7438         dev_flow->dv.actions_n = actions_n;
7439         dev_flow->actions = action_flags;
7440         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7441                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7442                 int item_type = items->type;
7443
7444                 switch (item_type) {
7445                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7446                         flow_dv_translate_item_port_id(dev, match_mask,
7447                                                        match_value, items);
7448                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7449                         break;
7450                 case RTE_FLOW_ITEM_TYPE_ETH:
7451                         flow_dv_translate_item_eth(match_mask, match_value,
7452                                                    items, tunnel);
7453                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7454                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7455                                              MLX5_FLOW_LAYER_OUTER_L2;
7456                         break;
7457                 case RTE_FLOW_ITEM_TYPE_VLAN:
7458                         flow_dv_translate_item_vlan(dev_flow,
7459                                                     match_mask, match_value,
7460                                                     items, tunnel);
7461                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7462                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7463                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7464                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7465                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7466                         break;
7467                 case RTE_FLOW_ITEM_TYPE_IPV4:
7468                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7469                                                   &item_flags, &tunnel);
7470                         flow_dv_translate_item_ipv4(match_mask, match_value,
7471                                                     items, tunnel,
7472                                                     dev_flow->group);
7473                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7474                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7475                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7476                         if (items->mask != NULL &&
7477                             ((const struct rte_flow_item_ipv4 *)
7478                              items->mask)->hdr.next_proto_id) {
7479                                 next_protocol =
7480                                         ((const struct rte_flow_item_ipv4 *)
7481                                          (items->spec))->hdr.next_proto_id;
7482                                 next_protocol &=
7483                                         ((const struct rte_flow_item_ipv4 *)
7484                                          (items->mask))->hdr.next_proto_id;
7485                         } else {
7486                                 /* Reset for inner layer. */
7487                                 next_protocol = 0xff;
7488                         }
7489                         break;
7490                 case RTE_FLOW_ITEM_TYPE_IPV6:
7491                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7492                                                   &item_flags, &tunnel);
7493                         flow_dv_translate_item_ipv6(match_mask, match_value,
7494                                                     items, tunnel,
7495                                                     dev_flow->group);
7496                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7497                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7498                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7499                         if (items->mask != NULL &&
7500                             ((const struct rte_flow_item_ipv6 *)
7501                              items->mask)->hdr.proto) {
7502                                 next_protocol =
7503                                         ((const struct rte_flow_item_ipv6 *)
7504                                          items->spec)->hdr.proto;
7505                                 next_protocol &=
7506                                         ((const struct rte_flow_item_ipv6 *)
7507                                          items->mask)->hdr.proto;
7508                         } else {
7509                                 /* Reset for inner layer. */
7510                                 next_protocol = 0xff;
7511                         }
7512                         break;
7513                 case RTE_FLOW_ITEM_TYPE_TCP:
7514                         flow_dv_translate_item_tcp(match_mask, match_value,
7515                                                    items, tunnel);
7516                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7517                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7518                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7519                         break;
7520                 case RTE_FLOW_ITEM_TYPE_UDP:
7521                         flow_dv_translate_item_udp(match_mask, match_value,
7522                                                    items, tunnel);
7523                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7524                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7525                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7526                         break;
7527                 case RTE_FLOW_ITEM_TYPE_GRE:
7528                         flow_dv_translate_item_gre(match_mask, match_value,
7529                                                    items, tunnel);
7530                         last_item = MLX5_FLOW_LAYER_GRE;
7531                         break;
7532                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7533                         flow_dv_translate_item_gre_key(match_mask,
7534                                                        match_value, items);
7535                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7536                         break;
7537                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7538                         flow_dv_translate_item_nvgre(match_mask, match_value,
7539                                                      items, tunnel);
7540                         last_item = MLX5_FLOW_LAYER_GRE;
7541                         break;
7542                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7543                         flow_dv_translate_item_vxlan(match_mask, match_value,
7544                                                      items, tunnel);
7545                         last_item = MLX5_FLOW_LAYER_VXLAN;
7546                         break;
7547                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7548                         flow_dv_translate_item_vxlan(match_mask, match_value,
7549                                                      items, tunnel);
7550                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7551                         break;
7552                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7553                         flow_dv_translate_item_geneve(match_mask, match_value,
7554                                                       items, tunnel);
7555                         last_item = MLX5_FLOW_LAYER_GENEVE;
7556                         break;
7557                 case RTE_FLOW_ITEM_TYPE_MPLS:
7558                         flow_dv_translate_item_mpls(match_mask, match_value,
7559                                                     items, last_item, tunnel);
7560                         last_item = MLX5_FLOW_LAYER_MPLS;
7561                         break;
7562                 case RTE_FLOW_ITEM_TYPE_MARK:
7563                         flow_dv_translate_item_mark(dev, match_mask,
7564                                                     match_value, items);
7565                         last_item = MLX5_FLOW_ITEM_MARK;
7566                         break;
7567                 case RTE_FLOW_ITEM_TYPE_META:
7568                         flow_dv_translate_item_meta(dev, match_mask,
7569                                                     match_value, attr, items);
7570                         last_item = MLX5_FLOW_ITEM_METADATA;
7571                         break;
7572                 case RTE_FLOW_ITEM_TYPE_ICMP:
7573                         flow_dv_translate_item_icmp(match_mask, match_value,
7574                                                     items, tunnel);
7575                         last_item = MLX5_FLOW_LAYER_ICMP;
7576                         break;
7577                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7578                         flow_dv_translate_item_icmp6(match_mask, match_value,
7579                                                       items, tunnel);
7580                         last_item = MLX5_FLOW_LAYER_ICMP6;
7581                         break;
7582                 case RTE_FLOW_ITEM_TYPE_TAG:
7583                         flow_dv_translate_item_tag(dev, match_mask,
7584                                                    match_value, items);
7585                         last_item = MLX5_FLOW_ITEM_TAG;
7586                         break;
7587                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7588                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7589                                                         match_value, items);
7590                         last_item = MLX5_FLOW_ITEM_TAG;
7591                         break;
7592                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7593                         flow_dv_translate_item_tx_queue(dev, match_mask,
7594                                                         match_value,
7595                                                         items);
7596                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7597                         break;
7598                 case RTE_FLOW_ITEM_TYPE_GTP:
7599                         flow_dv_translate_item_gtp(match_mask, match_value,
7600                                                    items, tunnel);
7601                         last_item = MLX5_FLOW_LAYER_GTP;
7602                         break;
7603                 default:
7604                         break;
7605                 }
7606                 item_flags |= last_item;
7607         }
7608         /*
7609          * In case of ingress traffic when E-Switch mode is enabled,
7610          * we have two cases where we need to set the source port manually.
7611          * The first one, is in case of Nic steering rule, and the second is
7612          * E-Switch rule where no port_id item was found. In both cases
7613          * the source port is set according the current port in use.
7614          */
7615         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7616             (priv->representor || priv->master)) {
7617                 if (flow_dv_translate_item_port_id(dev, match_mask,
7618                                                    match_value, NULL))
7619                         return -rte_errno;
7620         }
7621         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7622                                          dev_flow->dv.value.buf));
7623         dev_flow->layers = item_flags;
7624         if (action_flags & MLX5_FLOW_ACTION_RSS)
7625                 flow_dv_hashfields_set(dev_flow);
7626         /* Register matcher. */
7627         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7628                                     matcher.mask.size);
7629         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7630                                                      matcher.priority);
7631         /* reserved field no needs to be set to 0 here. */
7632         tbl_key.domain = attr->transfer;
7633         tbl_key.direction = attr->egress;
7634         tbl_key.table_id = dev_flow->group;
7635         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7636                 return -rte_errno;
7637         return 0;
7638 }
7639
7640 /**
7641  * Apply the flow to the NIC, lock free,
7642  * (mutex should be acquired by caller).
7643  *
7644  * @param[in] dev
7645  *   Pointer to the Ethernet device structure.
7646  * @param[in, out] flow
7647  *   Pointer to flow structure.
7648  * @param[out] error
7649  *   Pointer to error structure.
7650  *
7651  * @return
7652  *   0 on success, a negative errno value otherwise and rte_errno is set.
7653  */
7654 static int
7655 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7656                 struct rte_flow_error *error)
7657 {
7658         struct mlx5_flow_dv *dv;
7659         struct mlx5_flow *dev_flow;
7660         struct mlx5_priv *priv = dev->data->dev_private;
7661         int n;
7662         int err;
7663
7664         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7665                 dv = &dev_flow->dv;
7666                 n = dv->actions_n;
7667                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7668                         if (dev_flow->transfer) {
7669                                 dv->actions[n++] = priv->sh->esw_drop_action;
7670                         } else {
7671                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7672                                 if (!dv->hrxq) {
7673                                         rte_flow_error_set
7674                                                 (error, errno,
7675                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7676                                                  NULL,
7677                                                  "cannot get drop hash queue");
7678                                         goto error;
7679                                 }
7680                                 dv->actions[n++] = dv->hrxq->action;
7681                         }
7682                 } else if (dev_flow->actions &
7683                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7684                         struct mlx5_hrxq *hrxq;
7685
7686                         assert(flow->rss.queue);
7687                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7688                                              MLX5_RSS_HASH_KEY_LEN,
7689                                              dev_flow->hash_fields,
7690                                              (*flow->rss.queue),
7691                                              flow->rss.queue_num);
7692                         if (!hrxq) {
7693                                 hrxq = mlx5_hrxq_new
7694                                         (dev, flow->rss.key,
7695                                          MLX5_RSS_HASH_KEY_LEN,
7696                                          dev_flow->hash_fields,
7697                                          (*flow->rss.queue),
7698                                          flow->rss.queue_num,
7699                                          !!(dev_flow->layers &
7700                                             MLX5_FLOW_LAYER_TUNNEL));
7701                         }
7702                         if (!hrxq) {
7703                                 rte_flow_error_set
7704                                         (error, rte_errno,
7705                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7706                                          "cannot get hash queue");
7707                                 goto error;
7708                         }
7709                         dv->hrxq = hrxq;
7710                         dv->actions[n++] = dv->hrxq->action;
7711                 }
7712                 dv->flow =
7713                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7714                                                   (void *)&dv->value, n,
7715                                                   dv->actions);
7716                 if (!dv->flow) {
7717                         rte_flow_error_set(error, errno,
7718                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7719                                            NULL,
7720                                            "hardware refuses to create flow");
7721                         goto error;
7722                 }
7723                 if (priv->vmwa_context &&
7724                     dev_flow->dv.vf_vlan.tag &&
7725                     !dev_flow->dv.vf_vlan.created) {
7726                         /*
7727                          * The rule contains the VLAN pattern.
7728                          * For VF we are going to create VLAN
7729                          * interface to make hypervisor set correct
7730                          * e-Switch vport context.
7731                          */
7732                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7733                 }
7734         }
7735         return 0;
7736 error:
7737         err = rte_errno; /* Save rte_errno before cleanup. */
7738         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7739                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7740                 if (dv->hrxq) {
7741                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7742                                 mlx5_hrxq_drop_release(dev);
7743                         else
7744                                 mlx5_hrxq_release(dev, dv->hrxq);
7745                         dv->hrxq = NULL;
7746                 }
7747                 if (dev_flow->dv.vf_vlan.tag &&
7748                     dev_flow->dv.vf_vlan.created)
7749                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7750         }
7751         rte_errno = err; /* Restore rte_errno. */
7752         return -rte_errno;
7753 }
7754
7755 /**
7756  * Release the flow matcher.
7757  *
7758  * @param dev
7759  *   Pointer to Ethernet device.
7760  * @param flow
7761  *   Pointer to mlx5_flow.
7762  *
7763  * @return
7764  *   1 while a reference on it exists, 0 when freed.
7765  */
7766 static int
7767 flow_dv_matcher_release(struct rte_eth_dev *dev,
7768                         struct mlx5_flow *flow)
7769 {
7770         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7771
7772         assert(matcher->matcher_object);
7773         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7774                 dev->data->port_id, (void *)matcher,
7775                 rte_atomic32_read(&matcher->refcnt));
7776         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7777                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7778                            (matcher->matcher_object));
7779                 LIST_REMOVE(matcher, next);
7780                 /* table ref-- in release interface. */
7781                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7782                 rte_free(matcher);
7783                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7784                         dev->data->port_id, (void *)matcher);
7785                 return 0;
7786         }
7787         return 1;
7788 }
7789
7790 /**
7791  * Release an encap/decap resource.
7792  *
7793  * @param flow
7794  *   Pointer to mlx5_flow.
7795  *
7796  * @return
7797  *   1 while a reference on it exists, 0 when freed.
7798  */
7799 static int
7800 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7801 {
7802         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7803                                                 flow->dv.encap_decap;
7804
7805         assert(cache_resource->verbs_action);
7806         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7807                 (void *)cache_resource,
7808                 rte_atomic32_read(&cache_resource->refcnt));
7809         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7810                 claim_zero(mlx5_glue->destroy_flow_action
7811                                 (cache_resource->verbs_action));
7812                 LIST_REMOVE(cache_resource, next);
7813                 rte_free(cache_resource);
7814                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7815                         (void *)cache_resource);
7816                 return 0;
7817         }
7818         return 1;
7819 }
7820
7821 /**
7822  * Release an jump to table action resource.
7823  *
7824  * @param dev
7825  *   Pointer to Ethernet device.
7826  * @param flow
7827  *   Pointer to mlx5_flow.
7828  *
7829  * @return
7830  *   1 while a reference on it exists, 0 when freed.
7831  */
7832 static int
7833 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7834                                   struct mlx5_flow *flow)
7835 {
7836         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7837         struct mlx5_flow_tbl_data_entry *tbl_data =
7838                         container_of(cache_resource,
7839                                      struct mlx5_flow_tbl_data_entry, jump);
7840
7841         assert(cache_resource->action);
7842         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7843                 (void *)cache_resource,
7844                 rte_atomic32_read(&cache_resource->refcnt));
7845         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7846                 claim_zero(mlx5_glue->destroy_flow_action
7847                                 (cache_resource->action));
7848                 /* jump action memory free is inside the table release. */
7849                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7850                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7851                         (void *)cache_resource);
7852                 return 0;
7853         }
7854         return 1;
7855 }
7856
7857 /**
7858  * Release a modify-header resource.
7859  *
7860  * @param flow
7861  *   Pointer to mlx5_flow.
7862  *
7863  * @return
7864  *   1 while a reference on it exists, 0 when freed.
7865  */
7866 static int
7867 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7868 {
7869         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7870                                                 flow->dv.modify_hdr;
7871
7872         assert(cache_resource->verbs_action);
7873         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7874                 (void *)cache_resource,
7875                 rte_atomic32_read(&cache_resource->refcnt));
7876         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7877                 claim_zero(mlx5_glue->destroy_flow_action
7878                                 (cache_resource->verbs_action));
7879                 LIST_REMOVE(cache_resource, next);
7880                 rte_free(cache_resource);
7881                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7882                         (void *)cache_resource);
7883                 return 0;
7884         }
7885         return 1;
7886 }
7887
7888 /**
7889  * Release port ID action resource.
7890  *
7891  * @param flow
7892  *   Pointer to mlx5_flow.
7893  *
7894  * @return
7895  *   1 while a reference on it exists, 0 when freed.
7896  */
7897 static int
7898 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7899 {
7900         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7901                 flow->dv.port_id_action;
7902
7903         assert(cache_resource->action);
7904         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7905                 (void *)cache_resource,
7906                 rte_atomic32_read(&cache_resource->refcnt));
7907         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7908                 claim_zero(mlx5_glue->destroy_flow_action
7909                                 (cache_resource->action));
7910                 LIST_REMOVE(cache_resource, next);
7911                 rte_free(cache_resource);
7912                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7913                         (void *)cache_resource);
7914                 return 0;
7915         }
7916         return 1;
7917 }
7918
7919 /**
7920  * Release push vlan action resource.
7921  *
7922  * @param flow
7923  *   Pointer to mlx5_flow.
7924  *
7925  * @return
7926  *   1 while a reference on it exists, 0 when freed.
7927  */
7928 static int
7929 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7930 {
7931         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7932                 flow->dv.push_vlan_res;
7933
7934         assert(cache_resource->action);
7935         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7936                 (void *)cache_resource,
7937                 rte_atomic32_read(&cache_resource->refcnt));
7938         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7939                 claim_zero(mlx5_glue->destroy_flow_action
7940                                 (cache_resource->action));
7941                 LIST_REMOVE(cache_resource, next);
7942                 rte_free(cache_resource);
7943                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7944                         (void *)cache_resource);
7945                 return 0;
7946         }
7947         return 1;
7948 }
7949
7950 /**
7951  * Remove the flow from the NIC but keeps it in memory.
7952  * Lock free, (mutex should be acquired by caller).
7953  *
7954  * @param[in] dev
7955  *   Pointer to Ethernet device.
7956  * @param[in, out] flow
7957  *   Pointer to flow structure.
7958  */
7959 static void
7960 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7961 {
7962         struct mlx5_flow_dv *dv;
7963         struct mlx5_flow *dev_flow;
7964
7965         if (!flow)
7966                 return;
7967         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7968                 dv = &dev_flow->dv;
7969                 if (dv->flow) {
7970                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7971                         dv->flow = NULL;
7972                 }
7973                 if (dv->hrxq) {
7974                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7975                                 mlx5_hrxq_drop_release(dev);
7976                         else
7977                                 mlx5_hrxq_release(dev, dv->hrxq);
7978                         dv->hrxq = NULL;
7979                 }
7980                 if (dev_flow->dv.vf_vlan.tag &&
7981                     dev_flow->dv.vf_vlan.created)
7982                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7983         }
7984 }
7985
7986 /**
7987  * Remove the flow from the NIC and the memory.
7988  * Lock free, (mutex should be acquired by caller).
7989  *
7990  * @param[in] dev
7991  *   Pointer to the Ethernet device structure.
7992  * @param[in, out] flow
7993  *   Pointer to flow structure.
7994  */
7995 static void
7996 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
7997 {
7998         struct mlx5_flow *dev_flow;
7999
8000         if (!flow)
8001                 return;
8002         __flow_dv_remove(dev, flow);
8003         if (flow->counter) {
8004                 flow_dv_counter_release(dev, flow->counter);
8005                 flow->counter = NULL;
8006         }
8007         if (flow->meter) {
8008                 mlx5_flow_meter_detach(flow->meter);
8009                 flow->meter = NULL;
8010         }
8011         while (!LIST_EMPTY(&flow->dev_flows)) {
8012                 dev_flow = LIST_FIRST(&flow->dev_flows);
8013                 LIST_REMOVE(dev_flow, next);
8014                 if (dev_flow->dv.matcher)
8015                         flow_dv_matcher_release(dev, dev_flow);
8016                 if (dev_flow->dv.encap_decap)
8017                         flow_dv_encap_decap_resource_release(dev_flow);
8018                 if (dev_flow->dv.modify_hdr)
8019                         flow_dv_modify_hdr_resource_release(dev_flow);
8020                 if (dev_flow->dv.jump)
8021                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8022                 if (dev_flow->dv.port_id_action)
8023                         flow_dv_port_id_action_resource_release(dev_flow);
8024                 if (dev_flow->dv.push_vlan_res)
8025                         flow_dv_push_vlan_action_resource_release(dev_flow);
8026                 if (dev_flow->dv.tag_resource)
8027                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8028                 rte_free(dev_flow);
8029         }
8030 }
8031
8032 /**
8033  * Query a dv flow  rule for its statistics via devx.
8034  *
8035  * @param[in] dev
8036  *   Pointer to Ethernet device.
8037  * @param[in] flow
8038  *   Pointer to the sub flow.
8039  * @param[out] data
8040  *   data retrieved by the query.
8041  * @param[out] error
8042  *   Perform verbose error reporting if not NULL.
8043  *
8044  * @return
8045  *   0 on success, a negative errno value otherwise and rte_errno is set.
8046  */
8047 static int
8048 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8049                     void *data, struct rte_flow_error *error)
8050 {
8051         struct mlx5_priv *priv = dev->data->dev_private;
8052         struct rte_flow_query_count *qc = data;
8053
8054         if (!priv->config.devx)
8055                 return rte_flow_error_set(error, ENOTSUP,
8056                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8057                                           NULL,
8058                                           "counters are not supported");
8059         if (flow->counter) {
8060                 uint64_t pkts, bytes;
8061                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8062                                                &bytes);
8063
8064                 if (err)
8065                         return rte_flow_error_set(error, -err,
8066                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8067                                         NULL, "cannot read counters");
8068                 qc->hits_set = 1;
8069                 qc->bytes_set = 1;
8070                 qc->hits = pkts - flow->counter->hits;
8071                 qc->bytes = bytes - flow->counter->bytes;
8072                 if (qc->reset) {
8073                         flow->counter->hits = pkts;
8074                         flow->counter->bytes = bytes;
8075                 }
8076                 return 0;
8077         }
8078         return rte_flow_error_set(error, EINVAL,
8079                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8080                                   NULL,
8081                                   "counters are not available");
8082 }
8083
8084 /**
8085  * Query a flow.
8086  *
8087  * @see rte_flow_query()
8088  * @see rte_flow_ops
8089  */
8090 static int
8091 flow_dv_query(struct rte_eth_dev *dev,
8092               struct rte_flow *flow __rte_unused,
8093               const struct rte_flow_action *actions __rte_unused,
8094               void *data __rte_unused,
8095               struct rte_flow_error *error __rte_unused)
8096 {
8097         int ret = -EINVAL;
8098
8099         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8100                 switch (actions->type) {
8101                 case RTE_FLOW_ACTION_TYPE_VOID:
8102                         break;
8103                 case RTE_FLOW_ACTION_TYPE_COUNT:
8104                         ret = flow_dv_query_count(dev, flow, data, error);
8105                         break;
8106                 default:
8107                         return rte_flow_error_set(error, ENOTSUP,
8108                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8109                                                   actions,
8110                                                   "action not supported");
8111                 }
8112         }
8113         return ret;
8114 }
8115
8116 /**
8117  * Destroy the meter table set.
8118  * Lock free, (mutex should be acquired by caller).
8119  *
8120  * @param[in] dev
8121  *   Pointer to Ethernet device.
8122  * @param[in] tbl
8123  *   Pointer to the meter table set.
8124  *
8125  * @return
8126  *   Always 0.
8127  */
8128 static int
8129 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8130                         struct mlx5_meter_domains_infos *tbl)
8131 {
8132         struct mlx5_priv *priv = dev->data->dev_private;
8133         struct mlx5_meter_domains_infos *mtd =
8134                                 (struct mlx5_meter_domains_infos *)tbl;
8135
8136         if (!mtd || !priv->config.dv_flow_en)
8137                 return 0;
8138         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8139                 claim_zero(mlx5_glue->dv_destroy_flow
8140                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8141         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8142                 claim_zero(mlx5_glue->dv_destroy_flow
8143                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8144         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8145                 claim_zero(mlx5_glue->dv_destroy_flow
8146                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8147         if (mtd->egress.color_matcher)
8148                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8149                           (mtd->egress.color_matcher));
8150         if (mtd->egress.any_matcher)
8151                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8152                           (mtd->egress.any_matcher));
8153         if (mtd->egress.tbl)
8154                 claim_zero(flow_dv_tbl_resource_release(dev,
8155                                                         mtd->egress.tbl));
8156         if (mtd->ingress.color_matcher)
8157                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8158                           (mtd->ingress.color_matcher));
8159         if (mtd->ingress.any_matcher)
8160                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8161                           (mtd->ingress.any_matcher));
8162         if (mtd->ingress.tbl)
8163                 claim_zero(flow_dv_tbl_resource_release(dev,
8164                                                         mtd->ingress.tbl));
8165         if (mtd->transfer.color_matcher)
8166                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8167                           (mtd->transfer.color_matcher));
8168         if (mtd->transfer.any_matcher)
8169                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8170                           (mtd->transfer.any_matcher));
8171         if (mtd->transfer.tbl)
8172                 claim_zero(flow_dv_tbl_resource_release(dev,
8173                                                         mtd->transfer.tbl));
8174         if (mtd->drop_actn)
8175                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8176         rte_free(mtd);
8177         return 0;
8178 }
8179
8180 /* Number of meter flow actions, count and jump or count and drop. */
8181 #define METER_ACTIONS 2
8182
8183 /**
8184  * Create specify domain meter table and suffix table.
8185  *
8186  * @param[in] dev
8187  *   Pointer to Ethernet device.
8188  * @param[in,out] mtb
8189  *   Pointer to DV meter table set.
8190  * @param[in] egress
8191  *   Table attribute.
8192  * @param[in] transfer
8193  *   Table attribute.
8194  * @param[in] color_reg_c_idx
8195  *   Reg C index for color match.
8196  *
8197  * @return
8198  *   0 on success, -1 otherwise and rte_errno is set.
8199  */
8200 static int
8201 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8202                            struct mlx5_meter_domains_infos *mtb,
8203                            uint8_t egress, uint8_t transfer,
8204                            uint32_t color_reg_c_idx)
8205 {
8206         struct mlx5_priv *priv = dev->data->dev_private;
8207         struct mlx5_ibv_shared *sh = priv->sh;
8208         struct mlx5_flow_dv_match_params mask = {
8209                 .size = sizeof(mask.buf),
8210         };
8211         struct mlx5_flow_dv_match_params value = {
8212                 .size = sizeof(value.buf),
8213         };
8214         struct mlx5dv_flow_matcher_attr dv_attr = {
8215                 .type = IBV_FLOW_ATTR_NORMAL,
8216                 .priority = 0,
8217                 .match_criteria_enable = 0,
8218                 .match_mask = (void *)&mask,
8219         };
8220         void *actions[METER_ACTIONS];
8221         struct mlx5_flow_tbl_resource **sfx_tbl;
8222         struct mlx5_meter_domain_info *dtb;
8223         struct rte_flow_error error;
8224         int i = 0;
8225
8226         if (transfer) {
8227                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8228                 dtb = &mtb->transfer;
8229         } else if (egress) {
8230                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8231                 dtb = &mtb->egress;
8232         } else {
8233                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8234                 dtb = &mtb->ingress;
8235         }
8236         /* If the suffix table in missing, create it. */
8237         if (!(*sfx_tbl)) {
8238                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8239                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8240                                                 egress, transfer, &error);
8241                 if (!(*sfx_tbl)) {
8242                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8243                         return -1;
8244                 }
8245         }
8246         /* Create the meter table with METER level. */
8247         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8248                                             egress, transfer, &error);
8249         if (!dtb->tbl) {
8250                 DRV_LOG(ERR, "Failed to create meter policer table.");
8251                 return -1;
8252         }
8253         /* Create matchers, Any and Color. */
8254         dv_attr.priority = 3;
8255         dv_attr.match_criteria_enable = 0;
8256         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8257                                                              &dv_attr,
8258                                                              dtb->tbl->obj);
8259         if (!dtb->any_matcher) {
8260                 DRV_LOG(ERR, "Failed to create meter"
8261                              " policer default matcher.");
8262                 goto error_exit;
8263         }
8264         dv_attr.priority = 0;
8265         dv_attr.match_criteria_enable =
8266                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8267         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8268                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
8269         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8270                                                                &dv_attr,
8271                                                                dtb->tbl->obj);
8272         if (!dtb->color_matcher) {
8273                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8274                 goto error_exit;
8275         }
8276         if (mtb->count_actns[RTE_MTR_DROPPED])
8277                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8278         actions[i++] = mtb->drop_actn;
8279         /* Default rule: lowest priority, match any, actions: drop. */
8280         dtb->policer_rules[RTE_MTR_DROPPED] =
8281                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8282                                                  (void *)&value, i, actions);
8283         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8284                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8285                 goto error_exit;
8286         }
8287         return 0;
8288 error_exit:
8289         return -1;
8290 }
8291
8292 /**
8293  * Create the needed meter and suffix tables.
8294  * Lock free, (mutex should be acquired by caller).
8295  *
8296  * @param[in] dev
8297  *   Pointer to Ethernet device.
8298  * @param[in] fm
8299  *   Pointer to the flow meter.
8300  *
8301  * @return
8302  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8303  */
8304 static struct mlx5_meter_domains_infos *
8305 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8306                        const struct mlx5_flow_meter *fm)
8307 {
8308         struct mlx5_priv *priv = dev->data->dev_private;
8309         struct mlx5_meter_domains_infos *mtb;
8310         int ret;
8311         int i;
8312
8313         if (!priv->mtr_en) {
8314                 rte_errno = ENOTSUP;
8315                 return NULL;
8316         }
8317         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8318         if (!mtb) {
8319                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8320                 return NULL;
8321         }
8322         /* Create meter count actions */
8323         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8324                 if (!fm->policer_stats.cnt[i])
8325                         continue;
8326                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8327         }
8328         /* Create drop action. */
8329         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8330         if (!mtb->drop_actn) {
8331                 DRV_LOG(ERR, "Failed to create drop action.");
8332                 goto error_exit;
8333         }
8334         /* Egress meter table. */
8335         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8336         if (ret) {
8337                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8338                 goto error_exit;
8339         }
8340         /* Ingress meter table. */
8341         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8342         if (ret) {
8343                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8344                 goto error_exit;
8345         }
8346         /* FDB meter table. */
8347         if (priv->config.dv_esw_en) {
8348                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8349                                                  priv->mtr_color_reg);
8350                 if (ret) {
8351                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8352                         goto error_exit;
8353                 }
8354         }
8355         return mtb;
8356 error_exit:
8357         flow_dv_destroy_mtr_tbl(dev, mtb);
8358         return NULL;
8359 }
8360
8361 /**
8362  * Destroy domain policer rule.
8363  *
8364  * @param[in] dt
8365  *   Pointer to domain table.
8366  */
8367 static void
8368 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8369 {
8370         int i;
8371
8372         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8373                 if (dt->policer_rules[i]) {
8374                         claim_zero(mlx5_glue->dv_destroy_flow
8375                                   (dt->policer_rules[i]));
8376                         dt->policer_rules[i] = NULL;
8377                 }
8378         }
8379         if (dt->jump_actn) {
8380                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8381                 dt->jump_actn = NULL;
8382         }
8383 }
8384
8385 /**
8386  * Destroy policer rules.
8387  *
8388  * @param[in] dev
8389  *   Pointer to Ethernet device.
8390  * @param[in] fm
8391  *   Pointer to flow meter structure.
8392  * @param[in] attr
8393  *   Pointer to flow attributes.
8394  *
8395  * @return
8396  *   Always 0.
8397  */
8398 static int
8399 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8400                               const struct mlx5_flow_meter *fm,
8401                               const struct rte_flow_attr *attr)
8402 {
8403         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8404
8405         if (!mtb)
8406                 return 0;
8407         if (attr->egress)
8408                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8409         if (attr->ingress)
8410                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8411         if (attr->transfer)
8412                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8413         return 0;
8414 }
8415
8416 /**
8417  * Create specify domain meter policer rule.
8418  *
8419  * @param[in] fm
8420  *   Pointer to flow meter structure.
8421  * @param[in] mtb
8422  *   Pointer to DV meter table set.
8423  * @param[in] sfx_tb
8424  *   Pointer to suffix table.
8425  * @param[in] mtr_reg_c
8426  *   Color match REG_C.
8427  *
8428  * @return
8429  *   0 on success, -1 otherwise.
8430  */
8431 static int
8432 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8433                                     struct mlx5_meter_domain_info *dtb,
8434                                     struct mlx5_flow_tbl_resource *sfx_tb,
8435                                     uint8_t mtr_reg_c)
8436 {
8437         struct mlx5_flow_dv_match_params matcher = {
8438                 .size = sizeof(matcher.buf),
8439         };
8440         struct mlx5_flow_dv_match_params value = {
8441                 .size = sizeof(value.buf),
8442         };
8443         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8444         void *actions[METER_ACTIONS];
8445         int i;
8446
8447         /* Create jump action. */
8448         if (!sfx_tb)
8449                 return -1;
8450         if (!dtb->jump_actn)
8451                 dtb->jump_actn =
8452                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8453                                                         (sfx_tb->obj);
8454         if (!dtb->jump_actn) {
8455                 DRV_LOG(ERR, "Failed to create policer jump action.");
8456                 goto error;
8457         }
8458         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8459                 int j = 0;
8460
8461                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8462                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8463                 if (mtb->count_actns[i])
8464                         actions[j++] = mtb->count_actns[i];
8465                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8466                         actions[j++] = mtb->drop_actn;
8467                 else
8468                         actions[j++] = dtb->jump_actn;
8469                 dtb->policer_rules[i] =
8470                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8471                                                  (void *)&value,
8472                                                   j, actions);
8473                 if (!dtb->policer_rules[i]) {
8474                         DRV_LOG(ERR, "Failed to create policer rule.");
8475                         goto error;
8476                 }
8477         }
8478         return 0;
8479 error:
8480         rte_errno = errno;
8481         return -1;
8482 }
8483
8484 /**
8485  * Create policer rules.
8486  *
8487  * @param[in] dev
8488  *   Pointer to Ethernet device.
8489  * @param[in] fm
8490  *   Pointer to flow meter structure.
8491  * @param[in] attr
8492  *   Pointer to flow attributes.
8493  *
8494  * @return
8495  *   0 on success, -1 otherwise.
8496  */
8497 static int
8498 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8499                              struct mlx5_flow_meter *fm,
8500                              const struct rte_flow_attr *attr)
8501 {
8502         struct mlx5_priv *priv = dev->data->dev_private;
8503         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8504         int ret;
8505
8506         if (attr->egress) {
8507                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8508                                                 priv->sh->tx_mtr_sfx_tbl,
8509                                                 priv->mtr_color_reg);
8510                 if (ret) {
8511                         DRV_LOG(ERR, "Failed to create egress policer.");
8512                         goto error;
8513                 }
8514         }
8515         if (attr->ingress) {
8516                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8517                                                 priv->sh->rx_mtr_sfx_tbl,
8518                                                 priv->mtr_color_reg);
8519                 if (ret) {
8520                         DRV_LOG(ERR, "Failed to create ingress policer.");
8521                         goto error;
8522                 }
8523         }
8524         if (attr->transfer) {
8525                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8526                                                 priv->sh->fdb_mtr_sfx_tbl,
8527                                                 priv->mtr_color_reg);
8528                 if (ret) {
8529                         DRV_LOG(ERR, "Failed to create transfer policer.");
8530                         goto error;
8531                 }
8532         }
8533         return 0;
8534 error:
8535         flow_dv_destroy_policer_rules(dev, fm, attr);
8536         return -1;
8537 }
8538
8539 /**
8540  * Query a devx counter.
8541  *
8542  * @param[in] dev
8543  *   Pointer to the Ethernet device structure.
8544  * @param[in] cnt
8545  *   Pointer to the flow counter.
8546  * @param[in] clear
8547  *   Set to clear the counter statistics.
8548  * @param[out] pkts
8549  *   The statistics value of packets.
8550  * @param[out] bytes
8551  *   The statistics value of bytes.
8552  *
8553  * @return
8554  *   0 on success, otherwise return -1.
8555  */
8556 static int
8557 flow_dv_counter_query(struct rte_eth_dev *dev,
8558                       struct mlx5_flow_counter *cnt, bool clear,
8559                       uint64_t *pkts, uint64_t *bytes)
8560 {
8561         struct mlx5_priv *priv = dev->data->dev_private;
8562         uint64_t inn_pkts, inn_bytes;
8563         int ret;
8564
8565         if (!priv->config.devx)
8566                 return -1;
8567         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8568         if (ret)
8569                 return -1;
8570         *pkts = inn_pkts - cnt->hits;
8571         *bytes = inn_bytes - cnt->bytes;
8572         if (clear) {
8573                 cnt->hits = inn_pkts;
8574                 cnt->bytes = inn_bytes;
8575         }
8576         return 0;
8577 }
8578
8579 /*
8580  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8581  */
8582 static int
8583 flow_dv_translate(struct rte_eth_dev *dev,
8584                   struct mlx5_flow *dev_flow,
8585                   const struct rte_flow_attr *attr,
8586                   const struct rte_flow_item items[],
8587                   const struct rte_flow_action actions[],
8588                   struct rte_flow_error *error)
8589 {
8590         int ret;
8591
8592         flow_dv_shared_lock(dev);
8593         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8594         flow_dv_shared_unlock(dev);
8595         return ret;
8596 }
8597
8598 /*
8599  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8600  */
8601 static int
8602 flow_dv_apply(struct rte_eth_dev *dev,
8603               struct rte_flow *flow,
8604               struct rte_flow_error *error)
8605 {
8606         int ret;
8607
8608         flow_dv_shared_lock(dev);
8609         ret = __flow_dv_apply(dev, flow, error);
8610         flow_dv_shared_unlock(dev);
8611         return ret;
8612 }
8613
8614 /*
8615  * Mutex-protected thunk to lock-free __flow_dv_remove().
8616  */
8617 static void
8618 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8619 {
8620         flow_dv_shared_lock(dev);
8621         __flow_dv_remove(dev, flow);
8622         flow_dv_shared_unlock(dev);
8623 }
8624
8625 /*
8626  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8627  */
8628 static void
8629 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8630 {
8631         flow_dv_shared_lock(dev);
8632         __flow_dv_destroy(dev, flow);
8633         flow_dv_shared_unlock(dev);
8634 }
8635
8636 /*
8637  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8638  */
8639 static struct mlx5_flow_counter *
8640 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8641 {
8642         struct mlx5_flow_counter *cnt;
8643
8644         flow_dv_shared_lock(dev);
8645         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8646         flow_dv_shared_unlock(dev);
8647         return cnt;
8648 }
8649
8650 /*
8651  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8652  */
8653 static void
8654 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8655 {
8656         flow_dv_shared_lock(dev);
8657         flow_dv_counter_release(dev, cnt);
8658         flow_dv_shared_unlock(dev);
8659 }
8660
8661 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8662         .validate = flow_dv_validate,
8663         .prepare = flow_dv_prepare,
8664         .translate = flow_dv_translate,
8665         .apply = flow_dv_apply,
8666         .remove = flow_dv_remove,
8667         .destroy = flow_dv_destroy,
8668         .query = flow_dv_query,
8669         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8670         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8671         .create_policer_rules = flow_dv_create_policer_rules,
8672         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8673         .counter_alloc = flow_dv_counter_allocate,
8674         .counter_free = flow_dv_counter_free,
8675         .counter_query = flow_dv_counter_query,
8676 };
8677
8678 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */