drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include "mlx5.h"
  33 #include "mlx5_defs.h"
  34 #include "mlx5_glue.h"
  35 #include "mlx5_flow.h"
  36 #include "mlx5_prm.h"
  37 #include "mlx5_rxtx.h"
  38
  39 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  40
  41 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  42 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  43 #endif
  44
  45 #ifndef HAVE_MLX5DV_DR_ESWITCH
  46 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  47 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  48 #endif
  49 #endif
  50
  51 #ifndef HAVE_MLX5DV_DR
  52 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  53 #endif
  54
  55 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  56                                           sizeof(struct rte_flow_item_ipv4))
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 /**
  77  * Initialize flow attributes structure according to flow items' types.
  78  *
  79  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  80  * mode. For tunnel mode, the items to be modified are the outermost ones.
  81  *
  82  * @param[in] item
  83  *   Pointer to item specification.
  84  * @param[out] attr
  85  *   Pointer to flow attributes structure.
  86  */
  87 static void
  88 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  89 {
  90         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  91                 switch (item->type) {
  92                 case RTE_FLOW_ITEM_TYPE_IPV4:
  93                         if (!attr->ipv6)
  94                                 attr->ipv4 = 1;
  95                         break;
  96                 case RTE_FLOW_ITEM_TYPE_IPV6:
  97                         if (!attr->ipv4)
  98                                 attr->ipv6 = 1;
  99                         break;
 100                 case RTE_FLOW_ITEM_TYPE_UDP:
 101                         if (!attr->tcp)
 102                                 attr->udp = 1;
 103                         break;
 104                 case RTE_FLOW_ITEM_TYPE_TCP:
 105                         if (!attr->udp)
 106                                 attr->tcp = 1;
 107                         break;
 108                 default:
 109                         break;
 110                 }
 111         }
 112         attr->valid = 1;
 113 }
 114
 115 /**
 116  * Convert rte_mtr_color to mlx5 color.
 117  *
 118  * @param[in] rcol
 119  *   rte_mtr_color.
 120  *
 121  * @return
 122  *   mlx5 color.
 123  */
 124 static int
 125 rte_col_2_mlx5_col(enum rte_color rcol)
 126 {
 127         switch (rcol) {
 128         case RTE_COLOR_GREEN:
 129                 return MLX5_FLOW_COLOR_GREEN;
 130         case RTE_COLOR_YELLOW:
 131                 return MLX5_FLOW_COLOR_YELLOW;
 132         case RTE_COLOR_RED:
 133                 return MLX5_FLOW_COLOR_RED;
 134         default:
 135                 break;
 136         }
 137         return MLX5_FLOW_COLOR_UNDEFINED;
 138 }
 139
 140 struct field_modify_info {
 141         uint32_t size; /* Size of field in protocol header, in bytes. */
 142         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 143         enum mlx5_modification_field id;
 144 };
 145
 146 struct field_modify_info modify_eth[] = {
 147         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 148         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 149         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 150         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 151         {0, 0, 0},
 152 };
 153
 154 struct field_modify_info modify_vlan_out_first_vid[] = {
 155         /* Size in bits !!! */
 156         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 157         {0, 0, 0},
 158 };
 159
 160 struct field_modify_info modify_ipv4[] = {
 161         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 162         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 163         {4, 12, MLX5_MODI_OUT_SIPV4},
 164         {4, 16, MLX5_MODI_OUT_DIPV4},
 165         {0, 0, 0},
 166 };
 167
 168 struct field_modify_info modify_ipv6[] = {
 169         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 170         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 171         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 172         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 173         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 174         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 175         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 176         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 177         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 178         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 179         {0, 0, 0},
 180 };
 181
 182 struct field_modify_info modify_udp[] = {
 183         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 184         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 185         {0, 0, 0},
 186 };
 187
 188 struct field_modify_info modify_tcp[] = {
 189         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 190         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 191         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 192         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 193         {0, 0, 0},
 194 };
 195
 196 static void
 197 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 198                           uint8_t next_protocol, uint64_t *item_flags,
 199                           int *tunnel)
 200 {
 201         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 202                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 203         if (next_protocol == IPPROTO_IPIP) {
 204                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 205                 *tunnel = 1;
 206         }
 207         if (next_protocol == IPPROTO_IPV6) {
 208                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 209                 *tunnel = 1;
 210         }
 211 }
 212
 213 /**
 214  * Acquire the synchronizing object to protect multithreaded access
 215  * to shared dv context. Lock occurs only if context is actually
 216  * shared, i.e. we have multiport IB device and representors are
 217  * created.
 218  *
 219  * @param[in] dev
 220  *   Pointer to the rte_eth_dev structure.
 221  */
 222 static void
 223 flow_dv_shared_lock(struct rte_eth_dev *dev)
 224 {
 225         struct mlx5_priv *priv = dev->data->dev_private;
 226         struct mlx5_ibv_shared *sh = priv->sh;
 227
 228         if (sh->dv_refcnt > 1) {
 229                 int ret;
 230
 231                 ret = pthread_mutex_lock(&sh->dv_mutex);
 232                 assert(!ret);
 233                 (void)ret;
 234         }
 235 }
 236
 237 static void
 238 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 239 {
 240         struct mlx5_priv *priv = dev->data->dev_private;
 241         struct mlx5_ibv_shared *sh = priv->sh;
 242
 243         if (sh->dv_refcnt > 1) {
 244                 int ret;
 245
 246                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 247                 assert(!ret);
 248                 (void)ret;
 249         }
 250 }
 251
 252 /* Update VLAN's VID/PCP based on input rte_flow_action.
 253  *
 254  * @param[in] action
 255  *   Pointer to struct rte_flow_action.
 256  * @param[out] vlan
 257  *   Pointer to struct rte_vlan_hdr.
 258  */
 259 static void
 260 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 261                          struct rte_vlan_hdr *vlan)
 262 {
 263         uint16_t vlan_tci;
 264         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 265                 vlan_tci =
 266                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 267                                                action->conf)->vlan_pcp;
 268                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 269                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 270                 vlan->vlan_tci |= vlan_tci;
 271         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 272                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 273                 vlan->vlan_tci |= rte_be_to_cpu_16
 274                     (((const struct rte_flow_action_of_set_vlan_vid *)
 275                                              action->conf)->vlan_vid);
 276         }
 277 }
 278
 279 /**
 280  * Fetch 1, 2, 3 or 4 byte field from the byte array
 281  * and return as unsigned integer in host-endian format.
 282  *
 283  * @param[in] data
 284  *   Pointer to data array.
 285  * @param[in] size
 286  *   Size of field to extract.
 287  *
 288  * @return
 289  *   converted field in host endian format.
 290  */
 291 static inline uint32_t
 292 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 293 {
 294         uint32_t ret;
 295
 296         switch (size) {
 297         case 1:
 298                 ret = *data;
 299                 break;
 300         case 2:
 301                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 302                 break;
 303         case 3:
 304                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 305                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 306                 break;
 307         case 4:
 308                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 309                 break;
 310         default:
 311                 assert(false);
 312                 ret = 0;
 313                 break;
 314         }
 315         return ret;
 316 }
 317
 318 /**
 319  * Convert modify-header action to DV specification.
 320  *
 321  * Data length of each action is determined by provided field description
 322  * and the item mask. Data bit offset and width of each action is determined
 323  * by provided item mask.
 324  *
 325  * @param[in] item
 326  *   Pointer to item specification.
 327  * @param[in] field
 328  *   Pointer to field modification information.
 329  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 330  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 331  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 332  * @param[in] dcopy
 333  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 334  *   Negative offset value sets the same offset as source offset.
 335  *   size field is ignored, value is taken from source field.
 336  * @param[in,out] resource
 337  *   Pointer to the modify-header resource.
 338  * @param[in] type
 339  *   Type of modification.
 340  * @param[out] error
 341  *   Pointer to the error structure.
 342  *
 343  * @return
 344  *   0 on success, a negative errno value otherwise and rte_errno is set.
 345  */
 346 static int
 347 flow_dv_convert_modify_action(struct rte_flow_item *item,
 348                               struct field_modify_info *field,
 349                               struct field_modify_info *dcopy,
 350                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 351                               uint32_t type, struct rte_flow_error *error)
 352 {
 353         uint32_t i = resource->actions_num;
 354         struct mlx5_modification_cmd *actions = resource->actions;
 355
 356         /*
 357          * The item and mask are provided in big-endian format.
 358          * The fields should be presented as in big-endian format either.
 359          * Mask must be always present, it defines the actual field width.
 360          */
 361         assert(item->mask);
 362         assert(field->size);
 363         do {
 364                 unsigned int size_b;
 365                 unsigned int off_b;
 366                 uint32_t mask;
 367                 uint32_t data;
 368
 369                 if (i >= MLX5_MAX_MODIFY_NUM)
 370                         return rte_flow_error_set(error, EINVAL,
 371                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 372                                  "too many items to modify");
 373                 /* Fetch variable byte size mask from the array. */
 374                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 375                                            field->offset, field->size);
 376                 if (!mask) {
 377                         ++field;
 378                         continue;
 379                 }
 380                 /* Deduce actual data width in bits from mask value. */
 381                 off_b = rte_bsf32(mask);
 382                 size_b = sizeof(uint32_t) * CHAR_BIT -
 383                          off_b - __builtin_clz(mask);
 384                 assert(size_b);
 385                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 386                 actions[i].action_type = type;
 387                 actions[i].field = field->id;
 388                 actions[i].offset = off_b;
 389                 actions[i].length = size_b;
 390                 /* Convert entire record to expected big-endian format. */
 391                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 392                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 393                         assert(dcopy);
 394                         actions[i].dst_field = dcopy->id;
 395                         actions[i].dst_offset =
 396                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 397                         /* Convert entire record to big-endian format. */
 398                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 399                 } else {
 400                         assert(item->spec);
 401                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 402                                                    field->offset, field->size);
 403                         /* Shift out the trailing masked bits from data. */
 404                         data = (data & mask) >> off_b;
 405                         actions[i].data1 = rte_cpu_to_be_32(data);
 406                 }
 407                 ++i;
 408                 ++field;
 409         } while (field->size);
 410         if (resource->actions_num == i)
 411                 return rte_flow_error_set(error, EINVAL,
 412                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 413                                           "invalid modification flow item");
 414         resource->actions_num = i;
 415         return 0;
 416 }
 417
 418 /**
 419  * Convert modify-header set IPv4 address action to DV specification.
 420  *
 421  * @param[in,out] resource
 422  *   Pointer to the modify-header resource.
 423  * @param[in] action
 424  *   Pointer to action specification.
 425  * @param[out] error
 426  *   Pointer to the error structure.
 427  *
 428  * @return
 429  *   0 on success, a negative errno value otherwise and rte_errno is set.
 430  */
 431 static int
 432 flow_dv_convert_action_modify_ipv4
 433                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 434                          const struct rte_flow_action *action,
 435                          struct rte_flow_error *error)
 436 {
 437         const struct rte_flow_action_set_ipv4 *conf =
 438                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 439         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 440         struct rte_flow_item_ipv4 ipv4;
 441         struct rte_flow_item_ipv4 ipv4_mask;
 442
 443         memset(&ipv4, 0, sizeof(ipv4));
 444         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 445         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 446                 ipv4.hdr.src_addr = conf->ipv4_addr;
 447                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 448         } else {
 449                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 450                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 451         }
 452         item.spec = &ipv4;
 453         item.mask = &ipv4_mask;
 454         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 455                                              MLX5_MODIFICATION_TYPE_SET, error);
 456 }
 457
 458 /**
 459  * Convert modify-header set IPv6 address action to DV specification.
 460  *
 461  * @param[in,out] resource
 462  *   Pointer to the modify-header resource.
 463  * @param[in] action
 464  *   Pointer to action specification.
 465  * @param[out] error
 466  *   Pointer to the error structure.
 467  *
 468  * @return
 469  *   0 on success, a negative errno value otherwise and rte_errno is set.
 470  */
 471 static int
 472 flow_dv_convert_action_modify_ipv6
 473                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 474                          const struct rte_flow_action *action,
 475                          struct rte_flow_error *error)
 476 {
 477         const struct rte_flow_action_set_ipv6 *conf =
 478                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 479         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 480         struct rte_flow_item_ipv6 ipv6;
 481         struct rte_flow_item_ipv6 ipv6_mask;
 482
 483         memset(&ipv6, 0, sizeof(ipv6));
 484         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 485         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 486                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 487                        sizeof(ipv6.hdr.src_addr));
 488                 memcpy(&ipv6_mask.hdr.src_addr,
 489                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 490                        sizeof(ipv6.hdr.src_addr));
 491         } else {
 492                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 493                        sizeof(ipv6.hdr.dst_addr));
 494                 memcpy(&ipv6_mask.hdr.dst_addr,
 495                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 496                        sizeof(ipv6.hdr.dst_addr));
 497         }
 498         item.spec = &ipv6;
 499         item.mask = &ipv6_mask;
 500         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 501                                              MLX5_MODIFICATION_TYPE_SET, error);
 502 }
 503
 504 /**
 505  * Convert modify-header set MAC address action to DV specification.
 506  *
 507  * @param[in,out] resource
 508  *   Pointer to the modify-header resource.
 509  * @param[in] action
 510  *   Pointer to action specification.
 511  * @param[out] error
 512  *   Pointer to the error structure.
 513  *
 514  * @return
 515  *   0 on success, a negative errno value otherwise and rte_errno is set.
 516  */
 517 static int
 518 flow_dv_convert_action_modify_mac
 519                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 520                          const struct rte_flow_action *action,
 521                          struct rte_flow_error *error)
 522 {
 523         const struct rte_flow_action_set_mac *conf =
 524                 (const struct rte_flow_action_set_mac *)(action->conf);
 525         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 526         struct rte_flow_item_eth eth;
 527         struct rte_flow_item_eth eth_mask;
 528
 529         memset(&eth, 0, sizeof(eth));
 530         memset(&eth_mask, 0, sizeof(eth_mask));
 531         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 532                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 533                        sizeof(eth.src.addr_bytes));
 534                 memcpy(&eth_mask.src.addr_bytes,
 535                        &rte_flow_item_eth_mask.src.addr_bytes,
 536                        sizeof(eth_mask.src.addr_bytes));
 537         } else {
 538                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 539                        sizeof(eth.dst.addr_bytes));
 540                 memcpy(&eth_mask.dst.addr_bytes,
 541                        &rte_flow_item_eth_mask.dst.addr_bytes,
 542                        sizeof(eth_mask.dst.addr_bytes));
 543         }
 544         item.spec = &eth;
 545         item.mask = &eth_mask;
 546         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 547                                              MLX5_MODIFICATION_TYPE_SET, error);
 548 }
 549
 550 /**
 551  * Convert modify-header set VLAN VID action to DV specification.
 552  *
 553  * @param[in,out] resource
 554  *   Pointer to the modify-header resource.
 555  * @param[in] action
 556  *   Pointer to action specification.
 557  * @param[out] error
 558  *   Pointer to the error structure.
 559  *
 560  * @return
 561  *   0 on success, a negative errno value otherwise and rte_errno is set.
 562  */
 563 static int
 564 flow_dv_convert_action_modify_vlan_vid
 565                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 566                          const struct rte_flow_action *action,
 567                          struct rte_flow_error *error)
 568 {
 569         const struct rte_flow_action_of_set_vlan_vid *conf =
 570                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 571         int i = resource->actions_num;
 572         struct mlx5_modification_cmd *actions = &resource->actions[i];
 573         struct field_modify_info *field = modify_vlan_out_first_vid;
 574
 575         if (i >= MLX5_MAX_MODIFY_NUM)
 576                 return rte_flow_error_set(error, EINVAL,
 577                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 578                          "too many items to modify");
 579         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 580         actions[i].field = field->id;
 581         actions[i].length = field->size;
 582         actions[i].offset = field->offset;
 583         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 584         actions[i].data1 = conf->vlan_vid;
 585         actions[i].data1 = actions[i].data1 << 16;
 586         resource->actions_num = ++i;
 587         return 0;
 588 }
 589
 590 /**
 591  * Convert modify-header set TP action to DV specification.
 592  *
 593  * @param[in,out] resource
 594  *   Pointer to the modify-header resource.
 595  * @param[in] action
 596  *   Pointer to action specification.
 597  * @param[in] items
 598  *   Pointer to rte_flow_item objects list.
 599  * @param[in] attr
 600  *   Pointer to flow attributes structure.
 601  * @param[out] error
 602  *   Pointer to the error structure.
 603  *
 604  * @return
 605  *   0 on success, a negative errno value otherwise and rte_errno is set.
 606  */
 607 static int
 608 flow_dv_convert_action_modify_tp
 609                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 610                          const struct rte_flow_action *action,
 611                          const struct rte_flow_item *items,
 612                          union flow_dv_attr *attr,
 613                          struct rte_flow_error *error)
 614 {
 615         const struct rte_flow_action_set_tp *conf =
 616                 (const struct rte_flow_action_set_tp *)(action->conf);
 617         struct rte_flow_item item;
 618         struct rte_flow_item_udp udp;
 619         struct rte_flow_item_udp udp_mask;
 620         struct rte_flow_item_tcp tcp;
 621         struct rte_flow_item_tcp tcp_mask;
 622         struct field_modify_info *field;
 623
 624         if (!attr->valid)
 625                 flow_dv_attr_init(items, attr);
 626         if (attr->udp) {
 627                 memset(&udp, 0, sizeof(udp));
 628                 memset(&udp_mask, 0, sizeof(udp_mask));
 629                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 630                         udp.hdr.src_port = conf->port;
 631                         udp_mask.hdr.src_port =
 632                                         rte_flow_item_udp_mask.hdr.src_port;
 633                 } else {
 634                         udp.hdr.dst_port = conf->port;
 635                         udp_mask.hdr.dst_port =
 636                                         rte_flow_item_udp_mask.hdr.dst_port;
 637                 }
 638                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 639                 item.spec = &udp;
 640                 item.mask = &udp_mask;
 641                 field = modify_udp;
 642         }
 643         if (attr->tcp) {
 644                 memset(&tcp, 0, sizeof(tcp));
 645                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 646                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 647                         tcp.hdr.src_port = conf->port;
 648                         tcp_mask.hdr.src_port =
 649                                         rte_flow_item_tcp_mask.hdr.src_port;
 650                 } else {
 651                         tcp.hdr.dst_port = conf->port;
 652                         tcp_mask.hdr.dst_port =
 653                                         rte_flow_item_tcp_mask.hdr.dst_port;
 654                 }
 655                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 656                 item.spec = &tcp;
 657                 item.mask = &tcp_mask;
 658                 field = modify_tcp;
 659         }
 660         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 661                                              MLX5_MODIFICATION_TYPE_SET, error);
 662 }
 663
 664 /**
 665  * Convert modify-header set TTL action to DV specification.
 666  *
 667  * @param[in,out] resource
 668  *   Pointer to the modify-header resource.
 669  * @param[in] action
 670  *   Pointer to action specification.
 671  * @param[in] items
 672  *   Pointer to rte_flow_item objects list.
 673  * @param[in] attr
 674  *   Pointer to flow attributes structure.
 675  * @param[out] error
 676  *   Pointer to the error structure.
 677  *
 678  * @return
 679  *   0 on success, a negative errno value otherwise and rte_errno is set.
 680  */
 681 static int
 682 flow_dv_convert_action_modify_ttl
 683                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 684                          const struct rte_flow_action *action,
 685                          const struct rte_flow_item *items,
 686                          union flow_dv_attr *attr,
 687                          struct rte_flow_error *error)
 688 {
 689         const struct rte_flow_action_set_ttl *conf =
 690                 (const struct rte_flow_action_set_ttl *)(action->conf);
 691         struct rte_flow_item item;
 692         struct rte_flow_item_ipv4 ipv4;
 693         struct rte_flow_item_ipv4 ipv4_mask;
 694         struct rte_flow_item_ipv6 ipv6;
 695         struct rte_flow_item_ipv6 ipv6_mask;
 696         struct field_modify_info *field;
 697
 698         if (!attr->valid)
 699                 flow_dv_attr_init(items, attr);
 700         if (attr->ipv4) {
 701                 memset(&ipv4, 0, sizeof(ipv4));
 702                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 703                 ipv4.hdr.time_to_live = conf->ttl_value;
 704                 ipv4_mask.hdr.time_to_live = 0xFF;
 705                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 706                 item.spec = &ipv4;
 707                 item.mask = &ipv4_mask;
 708                 field = modify_ipv4;
 709         }
 710         if (attr->ipv6) {
 711                 memset(&ipv6, 0, sizeof(ipv6));
 712                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 713                 ipv6.hdr.hop_limits = conf->ttl_value;
 714                 ipv6_mask.hdr.hop_limits = 0xFF;
 715                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 716                 item.spec = &ipv6;
 717                 item.mask = &ipv6_mask;
 718                 field = modify_ipv6;
 719         }
 720         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 721                                              MLX5_MODIFICATION_TYPE_SET, error);
 722 }
 723
 724 /**
 725  * Convert modify-header decrement TTL action to DV specification.
 726  *
 727  * @param[in,out] resource
 728  *   Pointer to the modify-header resource.
 729  * @param[in] action
 730  *   Pointer to action specification.
 731  * @param[in] items
 732  *   Pointer to rte_flow_item objects list.
 733  * @param[in] attr
 734  *   Pointer to flow attributes structure.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_dec_ttl
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_item *items,
 745                          union flow_dv_attr *attr,
 746                          struct rte_flow_error *error)
 747 {
 748         struct rte_flow_item item;
 749         struct rte_flow_item_ipv4 ipv4;
 750         struct rte_flow_item_ipv4 ipv4_mask;
 751         struct rte_flow_item_ipv6 ipv6;
 752         struct rte_flow_item_ipv6 ipv6_mask;
 753         struct field_modify_info *field;
 754
 755         if (!attr->valid)
 756                 flow_dv_attr_init(items, attr);
 757         if (attr->ipv4) {
 758                 memset(&ipv4, 0, sizeof(ipv4));
 759                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 760                 ipv4.hdr.time_to_live = 0xFF;
 761                 ipv4_mask.hdr.time_to_live = 0xFF;
 762                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 763                 item.spec = &ipv4;
 764                 item.mask = &ipv4_mask;
 765                 field = modify_ipv4;
 766         }
 767         if (attr->ipv6) {
 768                 memset(&ipv6, 0, sizeof(ipv6));
 769                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 770                 ipv6.hdr.hop_limits = 0xFF;
 771                 ipv6_mask.hdr.hop_limits = 0xFF;
 772                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 773                 item.spec = &ipv6;
 774                 item.mask = &ipv6_mask;
 775                 field = modify_ipv6;
 776         }
 777         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 778                                              MLX5_MODIFICATION_TYPE_ADD, error);
 779 }
 780
 781 /**
 782  * Convert modify-header increment/decrement TCP Sequence number
 783  * to DV specification.
 784  *
 785  * @param[in,out] resource
 786  *   Pointer to the modify-header resource.
 787  * @param[in] action
 788  *   Pointer to action specification.
 789  * @param[out] error
 790  *   Pointer to the error structure.
 791  *
 792  * @return
 793  *   0 on success, a negative errno value otherwise and rte_errno is set.
 794  */
 795 static int
 796 flow_dv_convert_action_modify_tcp_seq
 797                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 798                          const struct rte_flow_action *action,
 799                          struct rte_flow_error *error)
 800 {
 801         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 802         uint64_t value = rte_be_to_cpu_32(*conf);
 803         struct rte_flow_item item;
 804         struct rte_flow_item_tcp tcp;
 805         struct rte_flow_item_tcp tcp_mask;
 806
 807         memset(&tcp, 0, sizeof(tcp));
 808         memset(&tcp_mask, 0, sizeof(tcp_mask));
 809         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 810                 /*
 811                  * The HW has no decrement operation, only increment operation.
 812                  * To simulate decrement X from Y using increment operation
 813                  * we need to add UINT32_MAX X times to Y.
 814                  * Each adding of UINT32_MAX decrements Y by 1.
 815                  */
 816                 value *= UINT32_MAX;
 817         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 818         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 819         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 820         item.spec = &tcp;
 821         item.mask = &tcp_mask;
 822         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 823                                              MLX5_MODIFICATION_TYPE_ADD, error);
 824 }
 825
 826 /**
 827  * Convert modify-header increment/decrement TCP Acknowledgment number
 828  * to DV specification.
 829  *
 830  * @param[in,out] resource
 831  *   Pointer to the modify-header resource.
 832  * @param[in] action
 833  *   Pointer to action specification.
 834  * @param[out] error
 835  *   Pointer to the error structure.
 836  *
 837  * @return
 838  *   0 on success, a negative errno value otherwise and rte_errno is set.
 839  */
 840 static int
 841 flow_dv_convert_action_modify_tcp_ack
 842                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 843                          const struct rte_flow_action *action,
 844                          struct rte_flow_error *error)
 845 {
 846         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 847         uint64_t value = rte_be_to_cpu_32(*conf);
 848         struct rte_flow_item item;
 849         struct rte_flow_item_tcp tcp;
 850         struct rte_flow_item_tcp tcp_mask;
 851
 852         memset(&tcp, 0, sizeof(tcp));
 853         memset(&tcp_mask, 0, sizeof(tcp_mask));
 854         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 855                 /*
 856                  * The HW has no decrement operation, only increment operation.
 857                  * To simulate decrement X from Y using increment operation
 858                  * we need to add UINT32_MAX X times to Y.
 859                  * Each adding of UINT32_MAX decrements Y by 1.
 860                  */
 861                 value *= UINT32_MAX;
 862         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 863         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 864         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 865         item.spec = &tcp;
 866         item.mask = &tcp_mask;
 867         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 868                                              MLX5_MODIFICATION_TYPE_ADD, error);
 869 }
 870
 871 static enum mlx5_modification_field reg_to_field[] = {
 872         [REG_NONE] = MLX5_MODI_OUT_NONE,
 873         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 874         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 875         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 876         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 877         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 878         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 879         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 880         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 881         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 882         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 883 };
 884
 885 /**
 886  * Convert register set to DV specification.
 887  *
 888  * @param[in,out] resource
 889  *   Pointer to the modify-header resource.
 890  * @param[in] action
 891  *   Pointer to action specification.
 892  * @param[out] error
 893  *   Pointer to the error structure.
 894  *
 895  * @return
 896  *   0 on success, a negative errno value otherwise and rte_errno is set.
 897  */
 898 static int
 899 flow_dv_convert_action_set_reg
 900                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 901                          const struct rte_flow_action *action,
 902                          struct rte_flow_error *error)
 903 {
 904         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 905         struct mlx5_modification_cmd *actions = resource->actions;
 906         uint32_t i = resource->actions_num;
 907
 908         if (i >= MLX5_MAX_MODIFY_NUM)
 909                 return rte_flow_error_set(error, EINVAL,
 910                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 911                                           "too many items to modify");
 912         assert(conf->id != REG_NONE);
 913         assert(conf->id < RTE_DIM(reg_to_field));
 914         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 915         actions[i].field = reg_to_field[conf->id];
 916         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 917         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 918         ++i;
 919         resource->actions_num = i;
 920         return 0;
 921 }
 922
 923 /**
 924  * Convert SET_TAG action to DV specification.
 925  *
 926  * @param[in] dev
 927  *   Pointer to the rte_eth_dev structure.
 928  * @param[in,out] resource
 929  *   Pointer to the modify-header resource.
 930  * @param[in] conf
 931  *   Pointer to action specification.
 932  * @param[out] error
 933  *   Pointer to the error structure.
 934  *
 935  * @return
 936  *   0 on success, a negative errno value otherwise and rte_errno is set.
 937  */
 938 static int
 939 flow_dv_convert_action_set_tag
 940                         (struct rte_eth_dev *dev,
 941                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 942                          const struct rte_flow_action_set_tag *conf,
 943                          struct rte_flow_error *error)
 944 {
 945         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 946         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 947         struct rte_flow_item item = {
 948                 .spec = &data,
 949                 .mask = &mask,
 950         };
 951         struct field_modify_info reg_c_x[] = {
 952                 [1] = {0, 0, 0},
 953         };
 954         enum mlx5_modification_field reg_type;
 955         int ret;
 956
 957         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 958         if (ret < 0)
 959                 return ret;
 960         assert(ret != REG_NONE);
 961         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 962         reg_type = reg_to_field[ret];
 963         assert(reg_type > 0);
 964         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 965         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 966                                              MLX5_MODIFICATION_TYPE_SET, error);
 967 }
 968
 969 /**
 970  * Convert internal COPY_REG action to DV specification.
 971  *
 972  * @param[in] dev
 973  *   Pointer to the rte_eth_dev structure.
 974  * @param[in,out] res
 975  *   Pointer to the modify-header resource.
 976  * @param[in] action
 977  *   Pointer to action specification.
 978  * @param[out] error
 979  *   Pointer to the error structure.
 980  *
 981  * @return
 982  *   0 on success, a negative errno value otherwise and rte_errno is set.
 983  */
 984 static int
 985 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 986                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 987                                  const struct rte_flow_action *action,
 988                                  struct rte_flow_error *error)
 989 {
 990         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 991         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 992         struct rte_flow_item item = {
 993                 .spec = NULL,
 994                 .mask = &mask,
 995         };
 996         struct field_modify_info reg_src[] = {
 997                 {4, 0, reg_to_field[conf->src]},
 998                 {0, 0, 0},
 999         };
1000         struct field_modify_info reg_dst = {
1001                 .offset = 0,
1002                 .id = reg_to_field[conf->dst],
1003         };
1004         /* Adjust reg_c[0] usage according to reported mask. */
1005         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1006                 struct mlx5_priv *priv = dev->data->dev_private;
1007                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1008
1009                 assert(reg_c0);
1010                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1011                 if (conf->dst == REG_C_0) {
1012                         /* Copy to reg_c[0], within mask only. */
1013                         reg_dst.offset = rte_bsf32(reg_c0);
1014                         /*
1015                          * Mask is ignoring the enianness, because
1016                          * there is no conversion in datapath.
1017                          */
1018 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1019                         /* Copy from destination lower bits to reg_c[0]. */
1020                         mask = reg_c0 >> reg_dst.offset;
1021 #else
1022                         /* Copy from destination upper bits to reg_c[0]. */
1023                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1024                                           rte_fls_u32(reg_c0));
1025 #endif
1026                 } else {
1027                         mask = rte_cpu_to_be_32(reg_c0);
1028 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1029                         /* Copy from reg_c[0] to destination lower bits. */
1030                         reg_dst.offset = 0;
1031 #else
1032                         /* Copy from reg_c[0] to destination upper bits. */
1033                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1034                                          (rte_fls_u32(reg_c0) -
1035                                           rte_bsf32(reg_c0));
1036 #endif
1037                 }
1038         }
1039         return flow_dv_convert_modify_action(&item,
1040                                              reg_src, &reg_dst, res,
1041                                              MLX5_MODIFICATION_TYPE_COPY,
1042                                              error);
1043 }
1044
1045 /**
1046  * Convert MARK action to DV specification. This routine is used
1047  * in extensive metadata only and requires metadata register to be
1048  * handled. In legacy mode hardware tag resource is engaged.
1049  *
1050  * @param[in] dev
1051  *   Pointer to the rte_eth_dev structure.
1052  * @param[in] conf
1053  *   Pointer to MARK action specification.
1054  * @param[in,out] resource
1055  *   Pointer to the modify-header resource.
1056  * @param[out] error
1057  *   Pointer to the error structure.
1058  *
1059  * @return
1060  *   0 on success, a negative errno value otherwise and rte_errno is set.
1061  */
1062 static int
1063 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1064                             const struct rte_flow_action_mark *conf,
1065                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1066                             struct rte_flow_error *error)
1067 {
1068         struct mlx5_priv *priv = dev->data->dev_private;
1069         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1070                                            priv->sh->dv_mark_mask);
1071         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1072         struct rte_flow_item item = {
1073                 .spec = &data,
1074                 .mask = &mask,
1075         };
1076         struct field_modify_info reg_c_x[] = {
1077                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1078                 {0, 0, 0},
1079         };
1080         enum modify_reg reg;
1081
1082         if (!mask)
1083                 return rte_flow_error_set(error, EINVAL,
1084                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1085                                           NULL, "zero mark action mask");
1086         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1087         if (reg < 0)
1088                 return reg;
1089         assert(reg > 0);
1090         if (reg == REG_C_0) {
1091                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1092                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1093
1094                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1095                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1096                 mask = rte_cpu_to_be_32(mask << shl_c0);
1097         }
1098         reg_c_x[0].id = reg_to_field[reg];
1099         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1100                                              MLX5_MODIFICATION_TYPE_SET, error);
1101 }
1102
1103 /**
1104  * Get metadata register index for specified steering domain.
1105  *
1106  * @param[in] dev
1107  *   Pointer to the rte_eth_dev structure.
1108  * @param[in] attr
1109  *   Attributes of flow to determine steering domain.
1110  * @param[out] error
1111  *   Pointer to the error structure.
1112  *
1113  * @return
1114  *   positive index on success, a negative errno value otherwise
1115  *   and rte_errno is set.
1116  */
1117 static enum modify_reg
1118 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1119                          const struct rte_flow_attr *attr,
1120                          struct rte_flow_error *error)
1121 {
1122         enum modify_reg reg =
1123                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1124                                           MLX5_METADATA_FDB :
1125                                             attr->egress ?
1126                                             MLX5_METADATA_TX :
1127                                             MLX5_METADATA_RX, 0, error);
1128         if (reg < 0)
1129                 return rte_flow_error_set(error,
1130                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1131                                           NULL, "unavailable "
1132                                           "metadata register");
1133         return reg;
1134 }
1135
1136 /**
1137  * Convert SET_META action to DV specification.
1138  *
1139  * @param[in] dev
1140  *   Pointer to the rte_eth_dev structure.
1141  * @param[in,out] resource
1142  *   Pointer to the modify-header resource.
1143  * @param[in] attr
1144  *   Attributes of flow that includes this item.
1145  * @param[in] conf
1146  *   Pointer to action specification.
1147  * @param[out] error
1148  *   Pointer to the error structure.
1149  *
1150  * @return
1151  *   0 on success, a negative errno value otherwise and rte_errno is set.
1152  */
1153 static int
1154 flow_dv_convert_action_set_meta
1155                         (struct rte_eth_dev *dev,
1156                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1157                          const struct rte_flow_attr *attr,
1158                          const struct rte_flow_action_set_meta *conf,
1159                          struct rte_flow_error *error)
1160 {
1161         uint32_t data = conf->data;
1162         uint32_t mask = conf->mask;
1163         struct rte_flow_item item = {
1164                 .spec = &data,
1165                 .mask = &mask,
1166         };
1167         struct field_modify_info reg_c_x[] = {
1168                 [1] = {0, 0, 0},
1169         };
1170         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1171
1172         if (reg < 0)
1173                 return reg;
1174         /*
1175          * In datapath code there is no endianness
1176          * coversions for perfromance reasons, all
1177          * pattern conversions are done in rte_flow.
1178          */
1179         if (reg == REG_C_0) {
1180                 struct mlx5_priv *priv = dev->data->dev_private;
1181                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1182                 uint32_t shl_c0;
1183
1184                 assert(msk_c0);
1185 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1186                 shl_c0 = rte_bsf32(msk_c0);
1187 #else
1188                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1189 #endif
1190                 mask <<= shl_c0;
1191                 data <<= shl_c0;
1192                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1193         }
1194         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1195         /* The routine expects parameters in memory as big-endian ones. */
1196         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1197                                              MLX5_MODIFICATION_TYPE_SET, error);
1198 }
1199
1200 /**
1201  * Convert modify-header set IPv4 DSCP action to DV specification.
1202  *
1203  * @param[in,out] resource
1204  *   Pointer to the modify-header resource.
1205  * @param[in] action
1206  *   Pointer to action specification.
1207  * @param[out] error
1208  *   Pointer to the error structure.
1209  *
1210  * @return
1211  *   0 on success, a negative errno value otherwise and rte_errno is set.
1212  */
1213 static int
1214 flow_dv_convert_action_modify_ipv4_dscp
1215                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1216                          const struct rte_flow_action *action,
1217                          struct rte_flow_error *error)
1218 {
1219         const struct rte_flow_action_set_dscp *conf =
1220                 (const struct rte_flow_action_set_dscp *)(action->conf);
1221         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1222         struct rte_flow_item_ipv4 ipv4;
1223         struct rte_flow_item_ipv4 ipv4_mask;
1224
1225         memset(&ipv4, 0, sizeof(ipv4));
1226         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1227         ipv4.hdr.type_of_service = conf->dscp;
1228         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1229         item.spec = &ipv4;
1230         item.mask = &ipv4_mask;
1231         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1232                                              MLX5_MODIFICATION_TYPE_SET, error);
1233 }
1234
1235 /**
1236  * Convert modify-header set IPv6 DSCP action to DV specification.
1237  *
1238  * @param[in,out] resource
1239  *   Pointer to the modify-header resource.
1240  * @param[in] action
1241  *   Pointer to action specification.
1242  * @param[out] error
1243  *   Pointer to the error structure.
1244  *
1245  * @return
1246  *   0 on success, a negative errno value otherwise and rte_errno is set.
1247  */
1248 static int
1249 flow_dv_convert_action_modify_ipv6_dscp
1250                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1251                          const struct rte_flow_action *action,
1252                          struct rte_flow_error *error)
1253 {
1254         const struct rte_flow_action_set_dscp *conf =
1255                 (const struct rte_flow_action_set_dscp *)(action->conf);
1256         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1257         struct rte_flow_item_ipv6 ipv6;
1258         struct rte_flow_item_ipv6 ipv6_mask;
1259
1260         memset(&ipv6, 0, sizeof(ipv6));
1261         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1262         /*
1263          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1264          * rdma-core only accept the DSCP bits byte aligned start from
1265          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1266          * bits in IPv6 case as rdma-core requires byte aligned value.
1267          */
1268         ipv6.hdr.vtc_flow = conf->dscp;
1269         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1270         item.spec = &ipv6;
1271         item.mask = &ipv6_mask;
1272         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1273                                              MLX5_MODIFICATION_TYPE_SET, error);
1274 }
1275
1276 /**
1277  * Validate MARK item.
1278  *
1279  * @param[in] dev
1280  *   Pointer to the rte_eth_dev structure.
1281  * @param[in] item
1282  *   Item specification.
1283  * @param[in] attr
1284  *   Attributes of flow that includes this item.
1285  * @param[out] error
1286  *   Pointer to error structure.
1287  *
1288  * @return
1289  *   0 on success, a negative errno value otherwise and rte_errno is set.
1290  */
1291 static int
1292 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1293                            const struct rte_flow_item *item,
1294                            const struct rte_flow_attr *attr __rte_unused,
1295                            struct rte_flow_error *error)
1296 {
1297         struct mlx5_priv *priv = dev->data->dev_private;
1298         struct mlx5_dev_config *config = &priv->config;
1299         const struct rte_flow_item_mark *spec = item->spec;
1300         const struct rte_flow_item_mark *mask = item->mask;
1301         const struct rte_flow_item_mark nic_mask = {
1302                 .id = priv->sh->dv_mark_mask,
1303         };
1304         int ret;
1305
1306         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1307                 return rte_flow_error_set(error, ENOTSUP,
1308                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1309                                           "extended metadata feature"
1310                                           " isn't enabled");
1311         if (!mlx5_flow_ext_mreg_supported(dev))
1312                 return rte_flow_error_set(error, ENOTSUP,
1313                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1314                                           "extended metadata register"
1315                                           " isn't supported");
1316         if (!nic_mask.id)
1317                 return rte_flow_error_set(error, ENOTSUP,
1318                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1319                                           "extended metadata register"
1320                                           " isn't available");
1321         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1322         if (ret < 0)
1323                 return ret;
1324         if (!spec)
1325                 return rte_flow_error_set(error, EINVAL,
1326                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1327                                           item->spec,
1328                                           "data cannot be empty");
1329         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1330                 return rte_flow_error_set(error, EINVAL,
1331                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1332                                           &spec->id,
1333                                           "mark id exceeds the limit");
1334         if (!mask)
1335                 mask = &nic_mask;
1336         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1337                                         (const uint8_t *)&nic_mask,
1338                                         sizeof(struct rte_flow_item_mark),
1339                                         error);
1340         if (ret < 0)
1341                 return ret;
1342         return 0;
1343 }
1344
1345 /**
1346  * Validate META item.
1347  *
1348  * @param[in] dev
1349  *   Pointer to the rte_eth_dev structure.
1350  * @param[in] item
1351  *   Item specification.
1352  * @param[in] attr
1353  *   Attributes of flow that includes this item.
1354  * @param[out] error
1355  *   Pointer to error structure.
1356  *
1357  * @return
1358  *   0 on success, a negative errno value otherwise and rte_errno is set.
1359  */
1360 static int
1361 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1362                            const struct rte_flow_item *item,
1363                            const struct rte_flow_attr *attr,
1364                            struct rte_flow_error *error)
1365 {
1366         struct mlx5_priv *priv = dev->data->dev_private;
1367         struct mlx5_dev_config *config = &priv->config;
1368         const struct rte_flow_item_meta *spec = item->spec;
1369         const struct rte_flow_item_meta *mask = item->mask;
1370         struct rte_flow_item_meta nic_mask = {
1371                 .data = UINT32_MAX
1372         };
1373         enum modify_reg reg;
1374         int ret;
1375
1376         if (!spec)
1377                 return rte_flow_error_set(error, EINVAL,
1378                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1379                                           item->spec,
1380                                           "data cannot be empty");
1381         if (!spec->data)
1382                 return rte_flow_error_set(error, EINVAL,
1383                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1384                                           "data cannot be zero");
1385         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1386                 if (!mlx5_flow_ext_mreg_supported(dev))
1387                         return rte_flow_error_set(error, ENOTSUP,
1388                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1389                                           "extended metadata register"
1390                                           " isn't supported");
1391                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1392                 if (reg < 0)
1393                         return reg;
1394                 if (reg == REG_B)
1395                         return rte_flow_error_set(error, ENOTSUP,
1396                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1397                                           "match on reg_b "
1398                                           "isn't supported");
1399                 if (reg != REG_A)
1400                         nic_mask.data = priv->sh->dv_meta_mask;
1401         }
1402         if (!mask)
1403                 mask = &rte_flow_item_meta_mask;
1404         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1405                                         (const uint8_t *)&nic_mask,
1406                                         sizeof(struct rte_flow_item_meta),
1407                                         error);
1408         return ret;
1409 }
1410
1411 /**
1412  * Validate TAG item.
1413  *
1414  * @param[in] dev
1415  *   Pointer to the rte_eth_dev structure.
1416  * @param[in] item
1417  *   Item specification.
1418  * @param[in] attr
1419  *   Attributes of flow that includes this item.
1420  * @param[out] error
1421  *   Pointer to error structure.
1422  *
1423  * @return
1424  *   0 on success, a negative errno value otherwise and rte_errno is set.
1425  */
1426 static int
1427 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1428                           const struct rte_flow_item *item,
1429                           const struct rte_flow_attr *attr __rte_unused,
1430                           struct rte_flow_error *error)
1431 {
1432         const struct rte_flow_item_tag *spec = item->spec;
1433         const struct rte_flow_item_tag *mask = item->mask;
1434         const struct rte_flow_item_tag nic_mask = {
1435                 .data = RTE_BE32(UINT32_MAX),
1436                 .index = 0xff,
1437         };
1438         int ret;
1439
1440         if (!mlx5_flow_ext_mreg_supported(dev))
1441                 return rte_flow_error_set(error, ENOTSUP,
1442                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1443                                           "extensive metadata register"
1444                                           " isn't supported");
1445         if (!spec)
1446                 return rte_flow_error_set(error, EINVAL,
1447                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1448                                           item->spec,
1449                                           "data cannot be empty");
1450         if (!mask)
1451                 mask = &rte_flow_item_tag_mask;
1452         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1453                                         (const uint8_t *)&nic_mask,
1454                                         sizeof(struct rte_flow_item_tag),
1455                                         error);
1456         if (ret < 0)
1457                 return ret;
1458         if (mask->index != 0xff)
1459                 return rte_flow_error_set(error, EINVAL,
1460                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1461                                           "partial mask for tag index"
1462                                           " is not supported");
1463         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1464         if (ret < 0)
1465                 return ret;
1466         assert(ret != REG_NONE);
1467         return 0;
1468 }
1469
1470 /**
1471  * Validate vport item.
1472  *
1473  * @param[in] dev
1474  *   Pointer to the rte_eth_dev structure.
1475  * @param[in] item
1476  *   Item specification.
1477  * @param[in] attr
1478  *   Attributes of flow that includes this item.
1479  * @param[in] item_flags
1480  *   Bit-fields that holds the items detected until now.
1481  * @param[out] error
1482  *   Pointer to error structure.
1483  *
1484  * @return
1485  *   0 on success, a negative errno value otherwise and rte_errno is set.
1486  */
1487 static int
1488 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1489                               const struct rte_flow_item *item,
1490                               const struct rte_flow_attr *attr,
1491                               uint64_t item_flags,
1492                               struct rte_flow_error *error)
1493 {
1494         const struct rte_flow_item_port_id *spec = item->spec;
1495         const struct rte_flow_item_port_id *mask = item->mask;
1496         const struct rte_flow_item_port_id switch_mask = {
1497                         .id = 0xffffffff,
1498         };
1499         struct mlx5_priv *esw_priv;
1500         struct mlx5_priv *dev_priv;
1501         int ret;
1502
1503         if (!attr->transfer)
1504                 return rte_flow_error_set(error, EINVAL,
1505                                           RTE_FLOW_ERROR_TYPE_ITEM,
1506                                           NULL,
1507                                           "match on port id is valid only"
1508                                           " when transfer flag is enabled");
1509         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1510                 return rte_flow_error_set(error, ENOTSUP,
1511                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1512                                           "multiple source ports are not"
1513                                           " supported");
1514         if (!mask)
1515                 mask = &switch_mask;
1516         if (mask->id != 0xffffffff)
1517                 return rte_flow_error_set(error, ENOTSUP,
1518                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1519                                            mask,
1520                                            "no support for partial mask on"
1521                                            " \"id\" field");
1522         ret = mlx5_flow_item_acceptable
1523                                 (item, (const uint8_t *)mask,
1524                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1525                                  sizeof(struct rte_flow_item_port_id),
1526                                  error);
1527         if (ret)
1528                 return ret;
1529         if (!spec)
1530                 return 0;
1531         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1532         if (!esw_priv)
1533                 return rte_flow_error_set(error, rte_errno,
1534                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1535                                           "failed to obtain E-Switch info for"
1536                                           " port");
1537         dev_priv = mlx5_dev_to_eswitch_info(dev);
1538         if (!dev_priv)
1539                 return rte_flow_error_set(error, rte_errno,
1540                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1541                                           NULL,
1542                                           "failed to obtain E-Switch info");
1543         if (esw_priv->domain_id != dev_priv->domain_id)
1544                 return rte_flow_error_set(error, EINVAL,
1545                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1546                                           "cannot match on a port from a"
1547                                           " different E-Switch");
1548         return 0;
1549 }
1550
1551 /**
1552  * Validate GTP item.
1553  *
1554  * @param[in] dev
1555  *   Pointer to the rte_eth_dev structure.
1556  * @param[in] item
1557  *   Item specification.
1558  * @param[in] item_flags
1559  *   Bit-fields that holds the items detected until now.
1560  * @param[out] error
1561  *   Pointer to error structure.
1562  *
1563  * @return
1564  *   0 on success, a negative errno value otherwise and rte_errno is set.
1565  */
1566 static int
1567 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1568                           const struct rte_flow_item *item,
1569                           uint64_t item_flags,
1570                           struct rte_flow_error *error)
1571 {
1572         struct mlx5_priv *priv = dev->data->dev_private;
1573         const struct rte_flow_item_gtp *mask = item->mask;
1574         const struct rte_flow_item_gtp nic_mask = {
1575                 .msg_type = 0xff,
1576                 .teid = RTE_BE32(0xffffffff),
1577         };
1578
1579         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1580                 return rte_flow_error_set(error, ENOTSUP,
1581                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1582                                           "GTP support is not enabled");
1583         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1584                 return rte_flow_error_set(error, ENOTSUP,
1585                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1586                                           "multiple tunnel layers not"
1587                                           " supported");
1588         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1589                 return rte_flow_error_set(error, EINVAL,
1590                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1591                                           "no outer UDP layer found");
1592         if (!mask)
1593                 mask = &rte_flow_item_gtp_mask;
1594         return mlx5_flow_item_acceptable
1595                 (item, (const uint8_t *)mask,
1596                  (const uint8_t *)&nic_mask,
1597                  sizeof(struct rte_flow_item_gtp),
1598                  error);
1599 }
1600
1601 /**
1602  * Validate the pop VLAN action.
1603  *
1604  * @param[in] dev
1605  *   Pointer to the rte_eth_dev structure.
1606  * @param[in] action_flags
1607  *   Holds the actions detected until now.
1608  * @param[in] action
1609  *   Pointer to the pop vlan action.
1610  * @param[in] item_flags
1611  *   The items found in this flow rule.
1612  * @param[in] attr
1613  *   Pointer to flow attributes.
1614  * @param[out] error
1615  *   Pointer to error structure.
1616  *
1617  * @return
1618  *   0 on success, a negative errno value otherwise and rte_errno is set.
1619  */
1620 static int
1621 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1622                                  uint64_t action_flags,
1623                                  const struct rte_flow_action *action,
1624                                  uint64_t item_flags,
1625                                  const struct rte_flow_attr *attr,
1626                                  struct rte_flow_error *error)
1627 {
1628         struct mlx5_priv *priv = dev->data->dev_private;
1629
1630         (void)action;
1631         (void)attr;
1632         if (!priv->sh->pop_vlan_action)
1633                 return rte_flow_error_set(error, ENOTSUP,
1634                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1635                                           NULL,
1636                                           "pop vlan action is not supported");
1637         /*
1638          * Check for inconsistencies:
1639          *  fail strip_vlan in a flow that matches packets without VLAN tags.
1640          *  fail strip_vlan in a flow that matches packets without explicitly a
1641          *  matching on VLAN tag ?
1642          */
1643         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
1644                 return rte_flow_error_set(error, ENOTSUP,
1645                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1646                                           NULL,
1647                                           "no support for multiple vlan pop "
1648                                           "actions");
1649         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1650                 return rte_flow_error_set(error, ENOTSUP,
1651                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1652                                           NULL,
1653                                           "cannot pop vlan without a "
1654                                           "match on (outer) vlan in the flow");
1655         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1656                 return rte_flow_error_set(error, EINVAL,
1657                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1658                                           "wrong action order, port_id should "
1659                                           "be after pop VLAN action");
1660         return 0;
1661 }
1662
1663 /**
1664  * Get VLAN default info from vlan match info.
1665  *
1666  * @param[in] dev
1667  *   Pointer to the rte_eth_dev structure.
1668  * @param[in] item
1669  *   the list of item specifications.
1670  * @param[out] vlan
1671  *   pointer VLAN info to fill to.
1672  * @param[out] error
1673  *   Pointer to error structure.
1674  *
1675  * @return
1676  *   0 on success, a negative errno value otherwise and rte_errno is set.
1677  */
1678 static void
1679 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1680                                   struct rte_vlan_hdr *vlan)
1681 {
1682         const struct rte_flow_item_vlan nic_mask = {
1683                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1684                                 MLX5DV_FLOW_VLAN_VID_MASK),
1685                 .inner_type = RTE_BE16(0xffff),
1686         };
1687
1688         if (items == NULL)
1689                 return;
1690         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1691                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1692                 ;
1693         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1694                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1695                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1696
1697                 if (!vlan_m)
1698                         vlan_m = &nic_mask;
1699                 /* Only full match values are accepted */
1700                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1701                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1702                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1703                         vlan->vlan_tci |=
1704                                 rte_be_to_cpu_16(vlan_v->tci &
1705                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1706                 }
1707                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1708                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1709                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1710                         vlan->vlan_tci |=
1711                                 rte_be_to_cpu_16(vlan_v->tci &
1712                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1713                 }
1714                 if (vlan_m->inner_type == nic_mask.inner_type)
1715                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1716                                                            vlan_m->inner_type);
1717         }
1718 }
1719
1720 /**
1721  * Validate the push VLAN action.
1722  *
1723  * @param[in] action_flags
1724  *   Holds the actions detected until now.
1725  * @param[in] action
1726  *   Pointer to the encap action.
1727  * @param[in] attr
1728  *   Pointer to flow attributes
1729  * @param[out] error
1730  *   Pointer to error structure.
1731  *
1732  * @return
1733  *   0 on success, a negative errno value otherwise and rte_errno is set.
1734  */
1735 static int
1736 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1737                                   uint64_t item_flags,
1738                                   const struct rte_flow_action *action,
1739                                   const struct rte_flow_attr *attr,
1740                                   struct rte_flow_error *error)
1741 {
1742         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1743
1744         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1745             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1746                 return rte_flow_error_set(error, EINVAL,
1747                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1748                                           "invalid vlan ethertype");
1749         if (action_flags &
1750                 (MLX5_FLOW_ACTION_OF_POP_VLAN | MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1751                 return rte_flow_error_set(error, ENOTSUP,
1752                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1753                                           "no support for multiple VLAN "
1754                                           "actions");
1755         if (!mlx5_flow_find_action
1756                         (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) &&
1757             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1758                 return rte_flow_error_set(error, ENOTSUP,
1759                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
1760                                 "push VLAN needs to match on VLAN in order to "
1761                                 "get VLAN VID information because there is "
1762                                 "no followed set VLAN VID action");
1763         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1764                 return rte_flow_error_set(error, EINVAL,
1765                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1766                                           "wrong action order, port_id should "
1767                                           "be after push VLAN");
1768         (void)attr;
1769         return 0;
1770 }
1771
1772 /**
1773  * Validate the set VLAN PCP.
1774  *
1775  * @param[in] action_flags
1776  *   Holds the actions detected until now.
1777  * @param[in] actions
1778  *   Pointer to the list of actions remaining in the flow rule.
1779  * @param[in] attr
1780  *   Pointer to flow attributes
1781  * @param[out] error
1782  *   Pointer to error structure.
1783  *
1784  * @return
1785  *   0 on success, a negative errno value otherwise and rte_errno is set.
1786  */
1787 static int
1788 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1789                                      const struct rte_flow_action actions[],
1790                                      struct rte_flow_error *error)
1791 {
1792         const struct rte_flow_action *action = actions;
1793         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1794
1795         if (conf->vlan_pcp > 7)
1796                 return rte_flow_error_set(error, EINVAL,
1797                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1798                                           "VLAN PCP value is too big");
1799         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1800                 return rte_flow_error_set(error, ENOTSUP,
1801                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1802                                           "set VLAN PCP action must follow "
1803                                           "the push VLAN action");
1804         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1805                 return rte_flow_error_set(error, ENOTSUP,
1806                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1807                                           "Multiple VLAN PCP modification are "
1808                                           "not supported");
1809         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1810                 return rte_flow_error_set(error, EINVAL,
1811                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1812                                           "wrong action order, port_id should "
1813                                           "be after set VLAN PCP");
1814         return 0;
1815 }
1816
1817 /**
1818  * Validate the set VLAN VID.
1819  *
1820  * @param[in] item_flags
1821  *   Holds the items detected in this rule.
1822  * @param[in] actions
1823  *   Pointer to the list of actions remaining in the flow rule.
1824  * @param[in] attr
1825  *   Pointer to flow attributes
1826  * @param[out] error
1827  *   Pointer to error structure.
1828  *
1829  * @return
1830  *   0 on success, a negative errno value otherwise and rte_errno is set.
1831  */
1832 static int
1833 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1834                                      uint64_t action_flags,
1835                                      const struct rte_flow_action actions[],
1836                                      struct rte_flow_error *error)
1837 {
1838         const struct rte_flow_action *action = actions;
1839         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1840
1841         if (conf->vlan_vid > RTE_BE16(0xFFE))
1842                 return rte_flow_error_set(error, EINVAL,
1843                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1844                                           "VLAN VID value is too big");
1845         /* there is an of_push_vlan action before us */
1846         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1847                 if (mlx5_flow_find_action(actions + 1,
1848                                           RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1849                         return rte_flow_error_set(error, ENOTSUP,
1850                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
1851                                         "Multiple VLAN VID modifications are "
1852                                         "not supported");
1853                 else
1854                         return 0;
1855         }
1856
1857         /*
1858          * Action is on an existing VLAN header:
1859          *    Need to verify this is a single modify CID action.
1860          *   Rule mast include a match on outer VLAN.
1861          */
1862         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1863                 return rte_flow_error_set(error, ENOTSUP,
1864                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1865                                           "Multiple VLAN VID modifications are "
1866                                           "not supported");
1867         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1868                 return rte_flow_error_set(error, EINVAL,
1869                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1870                                           "match on VLAN is required in order "
1871                                           "to set VLAN VID");
1872         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1873                 return rte_flow_error_set(error, EINVAL,
1874                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1875                                           "wrong action order, port_id should "
1876                                           "be after set VLAN VID");
1877         return 0;
1878 }
1879
1880 /*
1881  * Validate the FLAG action.
1882  *
1883  * @param[in] dev
1884  *   Pointer to the rte_eth_dev structure.
1885  * @param[in] action_flags
1886  *   Holds the actions detected until now.
1887  * @param[in] attr
1888  *   Pointer to flow attributes
1889  * @param[out] error
1890  *   Pointer to error structure.
1891  *
1892  * @return
1893  *   0 on success, a negative errno value otherwise and rte_errno is set.
1894  */
1895 static int
1896 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1897                              uint64_t action_flags,
1898                              const struct rte_flow_attr *attr,
1899                              struct rte_flow_error *error)
1900 {
1901         struct mlx5_priv *priv = dev->data->dev_private;
1902         struct mlx5_dev_config *config = &priv->config;
1903         int ret;
1904
1905         /* Fall back if no extended metadata register support. */
1906         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1907                 return mlx5_flow_validate_action_flag(action_flags, attr,
1908                                                       error);
1909         /* Extensive metadata mode requires registers. */
1910         if (!mlx5_flow_ext_mreg_supported(dev))
1911                 return rte_flow_error_set(error, ENOTSUP,
1912                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1913                                           "no metadata registers "
1914                                           "to support flag action");
1915         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1916                 return rte_flow_error_set(error, ENOTSUP,
1917                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1918                                           "extended metadata register"
1919                                           " isn't available");
1920         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1921         if (ret < 0)
1922                 return ret;
1923         assert(ret > 0);
1924         if (action_flags & MLX5_FLOW_ACTION_DROP)
1925                 return rte_flow_error_set(error, EINVAL,
1926                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1927                                           "can't drop and flag in same flow");
1928         if (action_flags & MLX5_FLOW_ACTION_MARK)
1929                 return rte_flow_error_set(error, EINVAL,
1930                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1931                                           "can't mark and flag in same flow");
1932         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1933                 return rte_flow_error_set(error, EINVAL,
1934                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1935                                           "can't have 2 flag"
1936                                           " actions in same flow");
1937         return 0;
1938 }
1939
1940 /**
1941  * Validate MARK action.
1942  *
1943  * @param[in] dev
1944  *   Pointer to the rte_eth_dev structure.
1945  * @param[in] action
1946  *   Pointer to action.
1947  * @param[in] action_flags
1948  *   Holds the actions detected until now.
1949  * @param[in] attr
1950  *   Pointer to flow attributes
1951  * @param[out] error
1952  *   Pointer to error structure.
1953  *
1954  * @return
1955  *   0 on success, a negative errno value otherwise and rte_errno is set.
1956  */
1957 static int
1958 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1959                              const struct rte_flow_action *action,
1960                              uint64_t action_flags,
1961                              const struct rte_flow_attr *attr,
1962                              struct rte_flow_error *error)
1963 {
1964         struct mlx5_priv *priv = dev->data->dev_private;
1965         struct mlx5_dev_config *config = &priv->config;
1966         const struct rte_flow_action_mark *mark = action->conf;
1967         int ret;
1968
1969         /* Fall back if no extended metadata register support. */
1970         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1971                 return mlx5_flow_validate_action_mark(action, action_flags,
1972                                                       attr, error);
1973         /* Extensive metadata mode requires registers. */
1974         if (!mlx5_flow_ext_mreg_supported(dev))
1975                 return rte_flow_error_set(error, ENOTSUP,
1976                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1977                                           "no metadata registers "
1978                                           "to support mark action");
1979         if (!priv->sh->dv_mark_mask)
1980                 return rte_flow_error_set(error, ENOTSUP,
1981                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1982                                           "extended metadata register"
1983                                           " isn't available");
1984         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1985         if (ret < 0)
1986                 return ret;
1987         assert(ret > 0);
1988         if (!mark)
1989                 return rte_flow_error_set(error, EINVAL,
1990                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1991                                           "configuration cannot be null");
1992         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1993                 return rte_flow_error_set(error, EINVAL,
1994                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1995                                           &mark->id,
1996                                           "mark id exceeds the limit");
1997         if (action_flags & MLX5_FLOW_ACTION_DROP)
1998                 return rte_flow_error_set(error, EINVAL,
1999                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2000                                           "can't drop and mark in same flow");
2001         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2002                 return rte_flow_error_set(error, EINVAL,
2003                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2004                                           "can't flag and mark in same flow");
2005         if (action_flags & MLX5_FLOW_ACTION_MARK)
2006                 return rte_flow_error_set(error, EINVAL,
2007                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2008                                           "can't have 2 mark actions in same"
2009                                           " flow");
2010         return 0;
2011 }
2012
2013 /**
2014  * Validate SET_META action.
2015  *
2016  * @param[in] dev
2017  *   Pointer to the rte_eth_dev structure.
2018  * @param[in] action
2019  *   Pointer to the encap action.
2020  * @param[in] action_flags
2021  *   Holds the actions detected until now.
2022  * @param[in] attr
2023  *   Pointer to flow attributes
2024  * @param[out] error
2025  *   Pointer to error structure.
2026  *
2027  * @return
2028  *   0 on success, a negative errno value otherwise and rte_errno is set.
2029  */
2030 static int
2031 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2032                                  const struct rte_flow_action *action,
2033                                  uint64_t action_flags __rte_unused,
2034                                  const struct rte_flow_attr *attr,
2035                                  struct rte_flow_error *error)
2036 {
2037         const struct rte_flow_action_set_meta *conf;
2038         uint32_t nic_mask = UINT32_MAX;
2039         enum modify_reg reg;
2040
2041         if (!mlx5_flow_ext_mreg_supported(dev))
2042                 return rte_flow_error_set(error, ENOTSUP,
2043                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2044                                           "extended metadata register"
2045                                           " isn't supported");
2046         reg = flow_dv_get_metadata_reg(dev, attr, error);
2047         if (reg < 0)
2048                 return reg;
2049         if (reg != REG_A && reg != REG_B) {
2050                 struct mlx5_priv *priv = dev->data->dev_private;
2051
2052                 nic_mask = priv->sh->dv_meta_mask;
2053         }
2054         if (!(action->conf))
2055                 return rte_flow_error_set(error, EINVAL,
2056                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2057                                           "configuration cannot be null");
2058         conf = (const struct rte_flow_action_set_meta *)action->conf;
2059         if (!conf->mask)
2060                 return rte_flow_error_set(error, EINVAL,
2061                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2062                                           "zero mask doesn't have any effect");
2063         if (conf->mask & ~nic_mask)
2064                 return rte_flow_error_set(error, EINVAL,
2065                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2066                                           "meta data must be within reg C0");
2067         if (!(conf->data & conf->mask))
2068                 return rte_flow_error_set(error, EINVAL,
2069                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2070                                           "zero value has no effect");
2071         return 0;
2072 }
2073
2074 /**
2075  * Validate SET_TAG action.
2076  *
2077  * @param[in] dev
2078  *   Pointer to the rte_eth_dev structure.
2079  * @param[in] action
2080  *   Pointer to the encap action.
2081  * @param[in] action_flags
2082  *   Holds the actions detected until now.
2083  * @param[in] attr
2084  *   Pointer to flow attributes
2085  * @param[out] error
2086  *   Pointer to error structure.
2087  *
2088  * @return
2089  *   0 on success, a negative errno value otherwise and rte_errno is set.
2090  */
2091 static int
2092 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2093                                 const struct rte_flow_action *action,
2094                                 uint64_t action_flags,
2095                                 const struct rte_flow_attr *attr,
2096                                 struct rte_flow_error *error)
2097 {
2098         const struct rte_flow_action_set_tag *conf;
2099         const uint64_t terminal_action_flags =
2100                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2101                 MLX5_FLOW_ACTION_RSS;
2102         int ret;
2103
2104         if (!mlx5_flow_ext_mreg_supported(dev))
2105                 return rte_flow_error_set(error, ENOTSUP,
2106                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2107                                           "extensive metadata register"
2108                                           " isn't supported");
2109         if (!(action->conf))
2110                 return rte_flow_error_set(error, EINVAL,
2111                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2112                                           "configuration cannot be null");
2113         conf = (const struct rte_flow_action_set_tag *)action->conf;
2114         if (!conf->mask)
2115                 return rte_flow_error_set(error, EINVAL,
2116                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2117                                           "zero mask doesn't have any effect");
2118         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2119         if (ret < 0)
2120                 return ret;
2121         if (!attr->transfer && attr->ingress &&
2122             (action_flags & terminal_action_flags))
2123                 return rte_flow_error_set(error, EINVAL,
2124                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2125                                           "set_tag has no effect"
2126                                           " with terminal actions");
2127         return 0;
2128 }
2129
2130 /**
2131  * Validate count action.
2132  *
2133  * @param[in] dev
2134  *   device otr.
2135  * @param[out] error
2136  *   Pointer to error structure.
2137  *
2138  * @return
2139  *   0 on success, a negative errno value otherwise and rte_errno is set.
2140  */
2141 static int
2142 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2143                               struct rte_flow_error *error)
2144 {
2145         struct mlx5_priv *priv = dev->data->dev_private;
2146
2147         if (!priv->config.devx)
2148                 goto notsup_err;
2149 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2150         return 0;
2151 #endif
2152 notsup_err:
2153         return rte_flow_error_set
2154                       (error, ENOTSUP,
2155                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2156                        NULL,
2157                        "count action not supported");
2158 }
2159
2160 /**
2161  * Validate the L2 encap action.
2162  *
2163  * @param[in] action_flags
2164  *   Holds the actions detected until now.
2165  * @param[in] action
2166  *   Pointer to the encap action.
2167  * @param[in] attr
2168  *   Pointer to flow attributes
2169  * @param[out] error
2170  *   Pointer to error structure.
2171  *
2172  * @return
2173  *   0 on success, a negative errno value otherwise and rte_errno is set.
2174  */
2175 static int
2176 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2177                                  const struct rte_flow_action *action,
2178                                  const struct rte_flow_attr *attr,
2179                                  struct rte_flow_error *error)
2180 {
2181         if (!(action->conf))
2182                 return rte_flow_error_set(error, EINVAL,
2183                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2184                                           "configuration cannot be null");
2185         if (action_flags & MLX5_FLOW_ACTION_DROP)
2186                 return rte_flow_error_set(error, EINVAL,
2187                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2188                                           "can't drop and encap in same flow");
2189         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2190                 return rte_flow_error_set(error, EINVAL,
2191                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2192                                           "can only have a single encap or"
2193                                           " decap action in a flow");
2194         if (!attr->transfer && attr->ingress)
2195                 return rte_flow_error_set(error, ENOTSUP,
2196                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2197                                           NULL,
2198                                           "encap action not supported for "
2199                                           "ingress");
2200         return 0;
2201 }
2202
2203 /**
2204  * Validate the L2 decap action.
2205  *
2206  * @param[in] action_flags
2207  *   Holds the actions detected until now.
2208  * @param[in] attr
2209  *   Pointer to flow attributes
2210  * @param[out] error
2211  *   Pointer to error structure.
2212  *
2213  * @return
2214  *   0 on success, a negative errno value otherwise and rte_errno is set.
2215  */
2216 static int
2217 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2218                                  const struct rte_flow_attr *attr,
2219                                  struct rte_flow_error *error)
2220 {
2221         if (action_flags & MLX5_FLOW_ACTION_DROP)
2222                 return rte_flow_error_set(error, EINVAL,
2223                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2224                                           "can't drop and decap in same flow");
2225         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2226                 return rte_flow_error_set(error, EINVAL,
2227                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2228                                           "can only have a single encap or"
2229                                           " decap action in a flow");
2230         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2231                 return rte_flow_error_set(error, EINVAL,
2232                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2233                                           "can't have decap action after"
2234                                           " modify action");
2235         if (attr->egress)
2236                 return rte_flow_error_set(error, ENOTSUP,
2237                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2238                                           NULL,
2239                                           "decap action not supported for "
2240                                           "egress");
2241         return 0;
2242 }
2243
2244 /**
2245  * Validate the raw encap action.
2246  *
2247  * @param[in] action_flags
2248  *   Holds the actions detected until now.
2249  * @param[in] action
2250  *   Pointer to the encap action.
2251  * @param[in] attr
2252  *   Pointer to flow attributes
2253  * @param[out] error
2254  *   Pointer to error structure.
2255  *
2256  * @return
2257  *   0 on success, a negative errno value otherwise and rte_errno is set.
2258  */
2259 static int
2260 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2261                                   const struct rte_flow_action *action,
2262                                   const struct rte_flow_attr *attr,
2263                                   struct rte_flow_error *error)
2264 {
2265         const struct rte_flow_action_raw_encap *raw_encap =
2266                 (const struct rte_flow_action_raw_encap *)action->conf;
2267         if (!(action->conf))
2268                 return rte_flow_error_set(error, EINVAL,
2269                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2270                                           "configuration cannot be null");
2271         if (action_flags & MLX5_FLOW_ACTION_DROP)
2272                 return rte_flow_error_set(error, EINVAL,
2273                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2274                                           "can't drop and encap in same flow");
2275         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2276                 return rte_flow_error_set(error, EINVAL,
2277                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2278                                           "can only have a single encap"
2279                                           " action in a flow");
2280         /* encap without preceding decap is not supported for ingress */
2281         if (!attr->transfer &&  attr->ingress &&
2282             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2283                 return rte_flow_error_set(error, ENOTSUP,
2284                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2285                                           NULL,
2286                                           "encap action not supported for "
2287                                           "ingress");
2288         if (!raw_encap->size || !raw_encap->data)
2289                 return rte_flow_error_set(error, EINVAL,
2290                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2291                                           "raw encap data cannot be empty");
2292         return 0;
2293 }
2294
2295 /**
2296  * Validate the raw decap action.
2297  *
2298  * @param[in] action_flags
2299  *   Holds the actions detected until now.
2300  * @param[in] action
2301  *   Pointer to the encap action.
2302  * @param[in] attr
2303  *   Pointer to flow attributes
2304  * @param[out] error
2305  *   Pointer to error structure.
2306  *
2307  * @return
2308  *   0 on success, a negative errno value otherwise and rte_errno is set.
2309  */
2310 static int
2311 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2312                                   const struct rte_flow_action *action,
2313                                   const struct rte_flow_attr *attr,
2314                                   struct rte_flow_error *error)
2315 {
2316         const struct rte_flow_action_raw_decap *decap   = action->conf;
2317
2318         if (action_flags & MLX5_FLOW_ACTION_DROP)
2319                 return rte_flow_error_set(error, EINVAL,
2320                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2321                                           "can't drop and decap in same flow");
2322         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2323                 return rte_flow_error_set(error, EINVAL,
2324                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2325                                           "can't have encap action before"
2326                                           " decap action");
2327         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2328                 return rte_flow_error_set(error, EINVAL,
2329                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2330                                           "can only have a single decap"
2331                                           " action in a flow");
2332         /* decap action is valid on egress only if it is followed by encap */
2333         if (attr->egress && decap &&
2334             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2335                 return rte_flow_error_set(error, ENOTSUP,
2336                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2337                                           NULL, "decap action not supported"
2338                                           " for egress");
2339         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2340                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2341                 return rte_flow_error_set(error, EINVAL,
2342                                           RTE_FLOW_ERROR_TYPE_ACTION,
2343                                           NULL,
2344                                           "can't have decap action "
2345                                           "after modify action");
2346         }
2347         return 0;
2348 }
2349
2350 /**
2351  * Find existing encap/decap resource or create and register a new one.
2352  *
2353  * @param[in, out] dev
2354  *   Pointer to rte_eth_dev structure.
2355  * @param[in, out] resource
2356  *   Pointer to encap/decap resource.
2357  * @parm[in, out] dev_flow
2358  *   Pointer to the dev_flow.
2359  * @param[out] error
2360  *   pointer to error structure.
2361  *
2362  * @return
2363  *   0 on success otherwise -errno and errno is set.
2364  */
2365 static int
2366 flow_dv_encap_decap_resource_register
2367                         (struct rte_eth_dev *dev,
2368                          struct mlx5_flow_dv_encap_decap_resource *resource,
2369                          struct mlx5_flow *dev_flow,
2370                          struct rte_flow_error *error)
2371 {
2372         struct mlx5_priv *priv = dev->data->dev_private;
2373         struct mlx5_ibv_shared *sh = priv->sh;
2374         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2375         struct mlx5dv_dr_domain *domain;
2376
2377         resource->flags = dev_flow->group ? 0 : 1;
2378         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2379                 domain = sh->fdb_domain;
2380         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2381                 domain = sh->rx_domain;
2382         else
2383                 domain = sh->tx_domain;
2384         /* Lookup a matching resource from cache. */
2385         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2386                 if (resource->reformat_type == cache_resource->reformat_type &&
2387                     resource->ft_type == cache_resource->ft_type &&
2388                     resource->flags == cache_resource->flags &&
2389                     resource->size == cache_resource->size &&
2390                     !memcmp((const void *)resource->buf,
2391                             (const void *)cache_resource->buf,
2392                             resource->size)) {
2393                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2394                                 (void *)cache_resource,
2395                                 rte_atomic32_read(&cache_resource->refcnt));
2396                         rte_atomic32_inc(&cache_resource->refcnt);
2397                         dev_flow->dv.encap_decap = cache_resource;
2398                         return 0;
2399                 }
2400         }
2401         /* Register new encap/decap resource. */
2402         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2403         if (!cache_resource)
2404                 return rte_flow_error_set(error, ENOMEM,
2405                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2406                                           "cannot allocate resource memory");
2407         *cache_resource = *resource;
2408         cache_resource->verbs_action =
2409                 mlx5_glue->dv_create_flow_action_packet_reformat
2410                         (sh->ctx, cache_resource->reformat_type,
2411                          cache_resource->ft_type, domain, cache_resource->flags,
2412                          cache_resource->size,
2413                          (cache_resource->size ? cache_resource->buf : NULL));
2414         if (!cache_resource->verbs_action) {
2415                 rte_free(cache_resource);
2416                 return rte_flow_error_set(error, ENOMEM,
2417                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2418                                           NULL, "cannot create action");
2419         }
2420         rte_atomic32_init(&cache_resource->refcnt);
2421         rte_atomic32_inc(&cache_resource->refcnt);
2422         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2423         dev_flow->dv.encap_decap = cache_resource;
2424         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2425                 (void *)cache_resource,
2426                 rte_atomic32_read(&cache_resource->refcnt));
2427         return 0;
2428 }
2429
2430 /**
2431  * Find existing table jump resource or create and register a new one.
2432  *
2433  * @param[in, out] dev
2434  *   Pointer to rte_eth_dev structure.
2435  * @param[in, out] tbl
2436  *   Pointer to flow table resource.
2437  * @parm[in, out] dev_flow
2438  *   Pointer to the dev_flow.
2439  * @param[out] error
2440  *   pointer to error structure.
2441  *
2442  * @return
2443  *   0 on success otherwise -errno and errno is set.
2444  */
2445 static int
2446 flow_dv_jump_tbl_resource_register
2447                         (struct rte_eth_dev *dev __rte_unused,
2448                          struct mlx5_flow_tbl_resource *tbl,
2449                          struct mlx5_flow *dev_flow,
2450                          struct rte_flow_error *error)
2451 {
2452         struct mlx5_flow_tbl_data_entry *tbl_data =
2453                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2454         int cnt;
2455
2456         assert(tbl);
2457         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2458         if (!cnt) {
2459                 tbl_data->jump.action =
2460                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2461                         (tbl->obj);
2462                 if (!tbl_data->jump.action)
2463                         return rte_flow_error_set(error, ENOMEM,
2464                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2465                                         NULL, "cannot create jump action");
2466                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2467                         (void *)&tbl_data->jump, cnt);
2468         } else {
2469                 assert(tbl_data->jump.action);
2470                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2471                         (void *)&tbl_data->jump, cnt);
2472         }
2473         rte_atomic32_inc(&tbl_data->jump.refcnt);
2474         dev_flow->dv.jump = &tbl_data->jump;
2475         return 0;
2476 }
2477
2478 /**
2479  * Find existing table port ID resource or create and register a new one.
2480  *
2481  * @param[in, out] dev
2482  *   Pointer to rte_eth_dev structure.
2483  * @param[in, out] resource
2484  *   Pointer to port ID action resource.
2485  * @parm[in, out] dev_flow
2486  *   Pointer to the dev_flow.
2487  * @param[out] error
2488  *   pointer to error structure.
2489  *
2490  * @return
2491  *   0 on success otherwise -errno and errno is set.
2492  */
2493 static int
2494 flow_dv_port_id_action_resource_register
2495                         (struct rte_eth_dev *dev,
2496                          struct mlx5_flow_dv_port_id_action_resource *resource,
2497                          struct mlx5_flow *dev_flow,
2498                          struct rte_flow_error *error)
2499 {
2500         struct mlx5_priv *priv = dev->data->dev_private;
2501         struct mlx5_ibv_shared *sh = priv->sh;
2502         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2503
2504         /* Lookup a matching resource from cache. */
2505         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2506                 if (resource->port_id == cache_resource->port_id) {
2507                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2508                                 "refcnt %d++",
2509                                 (void *)cache_resource,
2510                                 rte_atomic32_read(&cache_resource->refcnt));
2511                         rte_atomic32_inc(&cache_resource->refcnt);
2512                         dev_flow->dv.port_id_action = cache_resource;
2513                         return 0;
2514                 }
2515         }
2516         /* Register new port id action resource. */
2517         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2518         if (!cache_resource)
2519                 return rte_flow_error_set(error, ENOMEM,
2520                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2521                                           "cannot allocate resource memory");
2522         *cache_resource = *resource;
2523         /*
2524          * Depending on rdma_core version the glue routine calls
2525          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2526          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2527          */
2528         cache_resource->action =
2529                 mlx5_glue->dr_create_flow_action_dest_port
2530                         (priv->sh->fdb_domain, resource->port_id);
2531         if (!cache_resource->action) {
2532                 rte_free(cache_resource);
2533                 return rte_flow_error_set(error, ENOMEM,
2534                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2535                                           NULL, "cannot create action");
2536         }
2537         rte_atomic32_init(&cache_resource->refcnt);
2538         rte_atomic32_inc(&cache_resource->refcnt);
2539         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2540         dev_flow->dv.port_id_action = cache_resource;
2541         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2542                 (void *)cache_resource,
2543                 rte_atomic32_read(&cache_resource->refcnt));
2544         return 0;
2545 }
2546
2547 /**
2548  * Find existing push vlan resource or create and register a new one.
2549  *
2550  * @param [in, out] dev
2551  *   Pointer to rte_eth_dev structure.
2552  * @param[in, out] resource
2553  *   Pointer to port ID action resource.
2554  * @parm[in, out] dev_flow
2555  *   Pointer to the dev_flow.
2556  * @param[out] error
2557  *   pointer to error structure.
2558  *
2559  * @return
2560  *   0 on success otherwise -errno and errno is set.
2561  */
2562 static int
2563 flow_dv_push_vlan_action_resource_register
2564                        (struct rte_eth_dev *dev,
2565                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2566                         struct mlx5_flow *dev_flow,
2567                         struct rte_flow_error *error)
2568 {
2569         struct mlx5_priv *priv = dev->data->dev_private;
2570         struct mlx5_ibv_shared *sh = priv->sh;
2571         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2572         struct mlx5dv_dr_domain *domain;
2573
2574         /* Lookup a matching resource from cache. */
2575         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2576                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2577                     resource->ft_type == cache_resource->ft_type) {
2578                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2579                                 "refcnt %d++",
2580                                 (void *)cache_resource,
2581                                 rte_atomic32_read(&cache_resource->refcnt));
2582                         rte_atomic32_inc(&cache_resource->refcnt);
2583                         dev_flow->dv.push_vlan_res = cache_resource;
2584                         return 0;
2585                 }
2586         }
2587         /* Register new push_vlan action resource. */
2588         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2589         if (!cache_resource)
2590                 return rte_flow_error_set(error, ENOMEM,
2591                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2592                                           "cannot allocate resource memory");
2593         *cache_resource = *resource;
2594         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2595                 domain = sh->fdb_domain;
2596         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2597                 domain = sh->rx_domain;
2598         else
2599                 domain = sh->tx_domain;
2600         cache_resource->action =
2601                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2602                                                            resource->vlan_tag);
2603         if (!cache_resource->action) {
2604                 rte_free(cache_resource);
2605                 return rte_flow_error_set(error, ENOMEM,
2606                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2607                                           NULL, "cannot create action");
2608         }
2609         rte_atomic32_init(&cache_resource->refcnt);
2610         rte_atomic32_inc(&cache_resource->refcnt);
2611         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2612         dev_flow->dv.push_vlan_res = cache_resource;
2613         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2614                 (void *)cache_resource,
2615                 rte_atomic32_read(&cache_resource->refcnt));
2616         return 0;
2617 }
2618 /**
2619  * Get the size of specific rte_flow_item_type
2620  *
2621  * @param[in] item_type
2622  *   Tested rte_flow_item_type.
2623  *
2624  * @return
2625  *   sizeof struct item_type, 0 if void or irrelevant.
2626  */
2627 static size_t
2628 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2629 {
2630         size_t retval;
2631
2632         switch (item_type) {
2633         case RTE_FLOW_ITEM_TYPE_ETH:
2634                 retval = sizeof(struct rte_flow_item_eth);
2635                 break;
2636         case RTE_FLOW_ITEM_TYPE_VLAN:
2637                 retval = sizeof(struct rte_flow_item_vlan);
2638                 break;
2639         case RTE_FLOW_ITEM_TYPE_IPV4:
2640                 retval = sizeof(struct rte_flow_item_ipv4);
2641                 break;
2642         case RTE_FLOW_ITEM_TYPE_IPV6:
2643                 retval = sizeof(struct rte_flow_item_ipv6);
2644                 break;
2645         case RTE_FLOW_ITEM_TYPE_UDP:
2646                 retval = sizeof(struct rte_flow_item_udp);
2647                 break;
2648         case RTE_FLOW_ITEM_TYPE_TCP:
2649                 retval = sizeof(struct rte_flow_item_tcp);
2650                 break;
2651         case RTE_FLOW_ITEM_TYPE_VXLAN:
2652                 retval = sizeof(struct rte_flow_item_vxlan);
2653                 break;
2654         case RTE_FLOW_ITEM_TYPE_GRE:
2655                 retval = sizeof(struct rte_flow_item_gre);
2656                 break;
2657         case RTE_FLOW_ITEM_TYPE_NVGRE:
2658                 retval = sizeof(struct rte_flow_item_nvgre);
2659                 break;
2660         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2661                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2662                 break;
2663         case RTE_FLOW_ITEM_TYPE_MPLS:
2664                 retval = sizeof(struct rte_flow_item_mpls);
2665                 break;
2666         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2667         default:
2668                 retval = 0;
2669                 break;
2670         }
2671         return retval;
2672 }
2673
2674 #define MLX5_ENCAP_IPV4_VERSION         0x40
2675 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2676 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2677 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2678 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2679 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2680 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2681
2682 /**
2683  * Convert the encap action data from list of rte_flow_item to raw buffer
2684  *
2685  * @param[in] items
2686  *   Pointer to rte_flow_item objects list.
2687  * @param[out] buf
2688  *   Pointer to the output buffer.
2689  * @param[out] size
2690  *   Pointer to the output buffer size.
2691  * @param[out] error
2692  *   Pointer to the error structure.
2693  *
2694  * @return
2695  *   0 on success, a negative errno value otherwise and rte_errno is set.
2696  */
2697 static int
2698 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2699                            size_t *size, struct rte_flow_error *error)
2700 {
2701         struct rte_ether_hdr *eth = NULL;
2702         struct rte_vlan_hdr *vlan = NULL;
2703         struct rte_ipv4_hdr *ipv4 = NULL;
2704         struct rte_ipv6_hdr *ipv6 = NULL;
2705         struct rte_udp_hdr *udp = NULL;
2706         struct rte_vxlan_hdr *vxlan = NULL;
2707         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2708         struct rte_gre_hdr *gre = NULL;
2709         size_t len;
2710         size_t temp_size = 0;
2711
2712         if (!items)
2713                 return rte_flow_error_set(error, EINVAL,
2714                                           RTE_FLOW_ERROR_TYPE_ACTION,
2715                                           NULL, "invalid empty data");
2716         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2717                 len = flow_dv_get_item_len(items->type);
2718                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2719                         return rte_flow_error_set(error, EINVAL,
2720                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2721                                                   (void *)items->type,
2722                                                   "items total size is too big"
2723                                                   " for encap action");
2724                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2725                 switch (items->type) {
2726                 case RTE_FLOW_ITEM_TYPE_ETH:
2727                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2728                         break;
2729                 case RTE_FLOW_ITEM_TYPE_VLAN:
2730                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2731                         if (!eth)
2732                                 return rte_flow_error_set(error, EINVAL,
2733                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2734                                                 (void *)items->type,
2735                                                 "eth header not found");
2736                         if (!eth->ether_type)
2737                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2738                         break;
2739                 case RTE_FLOW_ITEM_TYPE_IPV4:
2740                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2741                         if (!vlan && !eth)
2742                                 return rte_flow_error_set(error, EINVAL,
2743                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2744                                                 (void *)items->type,
2745                                                 "neither eth nor vlan"
2746                                                 " header found");
2747                         if (vlan && !vlan->eth_proto)
2748                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2749                         else if (eth && !eth->ether_type)
2750                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2751                         if (!ipv4->version_ihl)
2752                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2753                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2754                         if (!ipv4->time_to_live)
2755                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2756                         break;
2757                 case RTE_FLOW_ITEM_TYPE_IPV6:
2758                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2759                         if (!vlan && !eth)
2760                                 return rte_flow_error_set(error, EINVAL,
2761                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2762                                                 (void *)items->type,
2763                                                 "neither eth nor vlan"
2764                                                 " header found");
2765                         if (vlan && !vlan->eth_proto)
2766                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2767                         else if (eth && !eth->ether_type)
2768                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2769                         if (!ipv6->vtc_flow)
2770                                 ipv6->vtc_flow =
2771                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2772                         if (!ipv6->hop_limits)
2773                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2774                         break;
2775                 case RTE_FLOW_ITEM_TYPE_UDP:
2776                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2777                         if (!ipv4 && !ipv6)
2778                                 return rte_flow_error_set(error, EINVAL,
2779                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2780                                                 (void *)items->type,
2781                                                 "ip header not found");
2782                         if (ipv4 && !ipv4->next_proto_id)
2783                                 ipv4->next_proto_id = IPPROTO_UDP;
2784                         else if (ipv6 && !ipv6->proto)
2785                                 ipv6->proto = IPPROTO_UDP;
2786                         break;
2787                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2788                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2789                         if (!udp)
2790                                 return rte_flow_error_set(error, EINVAL,
2791                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2792                                                 (void *)items->type,
2793                                                 "udp header not found");
2794                         if (!udp->dst_port)
2795                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2796                         if (!vxlan->vx_flags)
2797                                 vxlan->vx_flags =
2798                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2799                         break;
2800                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2801                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2802                         if (!udp)
2803                                 return rte_flow_error_set(error, EINVAL,
2804                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2805                                                 (void *)items->type,
2806                                                 "udp header not found");
2807                         if (!vxlan_gpe->proto)
2808                                 return rte_flow_error_set(error, EINVAL,
2809                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2810                                                 (void *)items->type,
2811                                                 "next protocol not found");
2812                         if (!udp->dst_port)
2813                                 udp->dst_port =
2814                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2815                         if (!vxlan_gpe->vx_flags)
2816                                 vxlan_gpe->vx_flags =
2817                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2818                         break;
2819                 case RTE_FLOW_ITEM_TYPE_GRE:
2820                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2821                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2822                         if (!gre->proto)
2823                                 return rte_flow_error_set(error, EINVAL,
2824                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2825                                                 (void *)items->type,
2826                                                 "next protocol not found");
2827                         if (!ipv4 && !ipv6)
2828                                 return rte_flow_error_set(error, EINVAL,
2829                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2830                                                 (void *)items->type,
2831                                                 "ip header not found");
2832                         if (ipv4 && !ipv4->next_proto_id)
2833                                 ipv4->next_proto_id = IPPROTO_GRE;
2834                         else if (ipv6 && !ipv6->proto)
2835                                 ipv6->proto = IPPROTO_GRE;
2836                         break;
2837                 case RTE_FLOW_ITEM_TYPE_VOID:
2838                         break;
2839                 default:
2840                         return rte_flow_error_set(error, EINVAL,
2841                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2842                                                   (void *)items->type,
2843                                                   "unsupported item type");
2844                         break;
2845                 }
2846                 temp_size += len;
2847         }
2848         *size = temp_size;
2849         return 0;
2850 }
2851
2852 static int
2853 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2854 {
2855         struct rte_ether_hdr *eth = NULL;
2856         struct rte_vlan_hdr *vlan = NULL;
2857         struct rte_ipv6_hdr *ipv6 = NULL;
2858         struct rte_udp_hdr *udp = NULL;
2859         char *next_hdr;
2860         uint16_t proto;
2861
2862         eth = (struct rte_ether_hdr *)data;
2863         next_hdr = (char *)(eth + 1);
2864         proto = RTE_BE16(eth->ether_type);
2865
2866         /* VLAN skipping */
2867         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2868                 vlan = (struct rte_vlan_hdr *)next_hdr;
2869                 proto = RTE_BE16(vlan->eth_proto);
2870                 next_hdr += sizeof(struct rte_vlan_hdr);
2871         }
2872
2873         /* HW calculates IPv4 csum. no need to proceed */
2874         if (proto == RTE_ETHER_TYPE_IPV4)
2875                 return 0;
2876
2877         /* non IPv4/IPv6 header. not supported */
2878         if (proto != RTE_ETHER_TYPE_IPV6) {
2879                 return rte_flow_error_set(error, ENOTSUP,
2880                                           RTE_FLOW_ERROR_TYPE_ACTION,
2881                                           NULL, "Cannot offload non IPv4/IPv6");
2882         }
2883
2884         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2885
2886         /* ignore non UDP */
2887         if (ipv6->proto != IPPROTO_UDP)
2888                 return 0;
2889
2890         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2891         udp->dgram_cksum = 0;
2892
2893         return 0;
2894 }
2895
2896 /**
2897  * Convert L2 encap action to DV specification.
2898  *
2899  * @param[in] dev
2900  *   Pointer to rte_eth_dev structure.
2901  * @param[in] action
2902  *   Pointer to action structure.
2903  * @param[in, out] dev_flow
2904  *   Pointer to the mlx5_flow.
2905  * @param[in] transfer
2906  *   Mark if the flow is E-Switch flow.
2907  * @param[out] error
2908  *   Pointer to the error structure.
2909  *
2910  * @return
2911  *   0 on success, a negative errno value otherwise and rte_errno is set.
2912  */
2913 static int
2914 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2915                                const struct rte_flow_action *action,
2916                                struct mlx5_flow *dev_flow,
2917                                uint8_t transfer,
2918                                struct rte_flow_error *error)
2919 {
2920         const struct rte_flow_item *encap_data;
2921         const struct rte_flow_action_raw_encap *raw_encap_data;
2922         struct mlx5_flow_dv_encap_decap_resource res = {
2923                 .reformat_type =
2924                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2925                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2926                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2927         };
2928
2929         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2930                 raw_encap_data =
2931                         (const struct rte_flow_action_raw_encap *)action->conf;
2932                 res.size = raw_encap_data->size;
2933                 memcpy(res.buf, raw_encap_data->data, res.size);
2934                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2935                         return -rte_errno;
2936         } else {
2937                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2938                         encap_data =
2939                                 ((const struct rte_flow_action_vxlan_encap *)
2940                                                 action->conf)->definition;
2941                 else
2942                         encap_data =
2943                                 ((const struct rte_flow_action_nvgre_encap *)
2944                                                 action->conf)->definition;
2945                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2946                                                &res.size, error))
2947                         return -rte_errno;
2948         }
2949         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2950                 return rte_flow_error_set(error, EINVAL,
2951                                           RTE_FLOW_ERROR_TYPE_ACTION,
2952                                           NULL, "can't create L2 encap action");
2953         return 0;
2954 }
2955
2956 /**
2957  * Convert L2 decap action to DV specification.
2958  *
2959  * @param[in] dev
2960  *   Pointer to rte_eth_dev structure.
2961  * @param[in, out] dev_flow
2962  *   Pointer to the mlx5_flow.
2963  * @param[in] transfer
2964  *   Mark if the flow is E-Switch flow.
2965  * @param[out] error
2966  *   Pointer to the error structure.
2967  *
2968  * @return
2969  *   0 on success, a negative errno value otherwise and rte_errno is set.
2970  */
2971 static int
2972 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2973                                struct mlx5_flow *dev_flow,
2974                                uint8_t transfer,
2975                                struct rte_flow_error *error)
2976 {
2977         struct mlx5_flow_dv_encap_decap_resource res = {
2978                 .size = 0,
2979                 .reformat_type =
2980                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2981                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2982                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2983         };
2984
2985         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2986                 return rte_flow_error_set(error, EINVAL,
2987                                           RTE_FLOW_ERROR_TYPE_ACTION,
2988                                           NULL, "can't create L2 decap action");
2989         return 0;
2990 }
2991
2992 /**
2993  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2994  *
2995  * @param[in] dev
2996  *   Pointer to rte_eth_dev structure.
2997  * @param[in] action
2998  *   Pointer to action structure.
2999  * @param[in, out] dev_flow
3000  *   Pointer to the mlx5_flow.
3001  * @param[in] attr
3002  *   Pointer to the flow attributes.
3003  * @param[out] error
3004  *   Pointer to the error structure.
3005  *
3006  * @return
3007  *   0 on success, a negative errno value otherwise and rte_errno is set.
3008  */
3009 static int
3010 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
3011                                 const struct rte_flow_action *action,
3012                                 struct mlx5_flow *dev_flow,
3013                                 const struct rte_flow_attr *attr,
3014                                 struct rte_flow_error *error)
3015 {
3016         const struct rte_flow_action_raw_encap *encap_data;
3017         struct mlx5_flow_dv_encap_decap_resource res;
3018
3019         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3020         res.size = encap_data->size;
3021         memcpy(res.buf, encap_data->data, res.size);
3022         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3023                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3024                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3025         if (attr->transfer)
3026                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3027         else
3028                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3029                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3030         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3031                 return rte_flow_error_set(error, EINVAL,
3032                                           RTE_FLOW_ERROR_TYPE_ACTION,
3033                                           NULL, "can't create encap action");
3034         return 0;
3035 }
3036
3037 /**
3038  * Create action push VLAN.
3039  *
3040  * @param[in] dev
3041  *   Pointer to rte_eth_dev structure.
3042  * @param[in] vlan_tag
3043  *   the vlan tag to push to the Ethernet header.
3044  * @param[in, out] dev_flow
3045  *   Pointer to the mlx5_flow.
3046  * @param[in] attr
3047  *   Pointer to the flow attributes.
3048  * @param[out] error
3049  *   Pointer to the error structure.
3050  *
3051  * @return
3052  *   0 on success, a negative errno value otherwise and rte_errno is set.
3053  */
3054 static int
3055 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3056                                 const struct rte_flow_attr *attr,
3057                                 const struct rte_vlan_hdr *vlan,
3058                                 struct mlx5_flow *dev_flow,
3059                                 struct rte_flow_error *error)
3060 {
3061         struct mlx5_flow_dv_push_vlan_action_resource res;
3062
3063         res.vlan_tag =
3064                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3065                                  vlan->vlan_tci);
3066         if (attr->transfer)
3067                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3068         else
3069                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3070                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3071         return flow_dv_push_vlan_action_resource_register
3072                                             (dev, &res, dev_flow, error);
3073 }
3074
3075 /**
3076  * Validate the modify-header actions.
3077  *
3078  * @param[in] action_flags
3079  *   Holds the actions detected until now.
3080  * @param[in] action
3081  *   Pointer to the modify action.
3082  * @param[out] error
3083  *   Pointer to error structure.
3084  *
3085  * @return
3086  *   0 on success, a negative errno value otherwise and rte_errno is set.
3087  */
3088 static int
3089 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3090                                    const struct rte_flow_action *action,
3091                                    struct rte_flow_error *error)
3092 {
3093         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3094                 return rte_flow_error_set(error, EINVAL,
3095                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3096                                           NULL, "action configuration not set");
3097         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
3098                 return rte_flow_error_set(error, EINVAL,
3099                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3100                                           "can't have encap action before"
3101                                           " modify action");
3102         return 0;
3103 }
3104
3105 /**
3106  * Validate the modify-header MAC address actions.
3107  *
3108  * @param[in] action_flags
3109  *   Holds the actions detected until now.
3110  * @param[in] action
3111  *   Pointer to the modify action.
3112  * @param[in] item_flags
3113  *   Holds the items detected.
3114  * @param[out] error
3115  *   Pointer to error structure.
3116  *
3117  * @return
3118  *   0 on success, a negative errno value otherwise and rte_errno is set.
3119  */
3120 static int
3121 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3122                                    const struct rte_flow_action *action,
3123                                    const uint64_t item_flags,
3124                                    struct rte_flow_error *error)
3125 {
3126         int ret = 0;
3127
3128         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3129         if (!ret) {
3130                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3131                         return rte_flow_error_set(error, EINVAL,
3132                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3133                                                   NULL,
3134                                                   "no L2 item in pattern");
3135         }
3136         return ret;
3137 }
3138
3139 /**
3140  * Validate the modify-header IPv4 address actions.
3141  *
3142  * @param[in] action_flags
3143  *   Holds the actions detected until now.
3144  * @param[in] action
3145  *   Pointer to the modify action.
3146  * @param[in] item_flags
3147  *   Holds the items detected.
3148  * @param[out] error
3149  *   Pointer to error structure.
3150  *
3151  * @return
3152  *   0 on success, a negative errno value otherwise and rte_errno is set.
3153  */
3154 static int
3155 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3156                                     const struct rte_flow_action *action,
3157                                     const uint64_t item_flags,
3158                                     struct rte_flow_error *error)
3159 {
3160         int ret = 0;
3161
3162         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3163         if (!ret) {
3164                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3165                         return rte_flow_error_set(error, EINVAL,
3166                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3167                                                   NULL,
3168                                                   "no ipv4 item in pattern");
3169         }
3170         return ret;
3171 }
3172
3173 /**
3174  * Validate the modify-header IPv6 address actions.
3175  *
3176  * @param[in] action_flags
3177  *   Holds the actions detected until now.
3178  * @param[in] action
3179  *   Pointer to the modify action.
3180  * @param[in] item_flags
3181  *   Holds the items detected.
3182  * @param[out] error
3183  *   Pointer to error structure.
3184  *
3185  * @return
3186  *   0 on success, a negative errno value otherwise and rte_errno is set.
3187  */
3188 static int
3189 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3190                                     const struct rte_flow_action *action,
3191                                     const uint64_t item_flags,
3192                                     struct rte_flow_error *error)
3193 {
3194         int ret = 0;
3195
3196         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3197         if (!ret) {
3198                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3199                         return rte_flow_error_set(error, EINVAL,
3200                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3201                                                   NULL,
3202                                                   "no ipv6 item in pattern");
3203         }
3204         return ret;
3205 }
3206
3207 /**
3208  * Validate the modify-header TP actions.
3209  *
3210  * @param[in] action_flags
3211  *   Holds the actions detected until now.
3212  * @param[in] action
3213  *   Pointer to the modify action.
3214  * @param[in] item_flags
3215  *   Holds the items detected.
3216  * @param[out] error
3217  *   Pointer to error structure.
3218  *
3219  * @return
3220  *   0 on success, a negative errno value otherwise and rte_errno is set.
3221  */
3222 static int
3223 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3224                                   const struct rte_flow_action *action,
3225                                   const uint64_t item_flags,
3226                                   struct rte_flow_error *error)
3227 {
3228         int ret = 0;
3229
3230         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3231         if (!ret) {
3232                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3233                         return rte_flow_error_set(error, EINVAL,
3234                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3235                                                   NULL, "no transport layer "
3236                                                   "in pattern");
3237         }
3238         return ret;
3239 }
3240
3241 /**
3242  * Validate the modify-header actions of increment/decrement
3243  * TCP Sequence-number.
3244  *
3245  * @param[in] action_flags
3246  *   Holds the actions detected until now.
3247  * @param[in] action
3248  *   Pointer to the modify action.
3249  * @param[in] item_flags
3250  *   Holds the items detected.
3251  * @param[out] error
3252  *   Pointer to error structure.
3253  *
3254  * @return
3255  *   0 on success, a negative errno value otherwise and rte_errno is set.
3256  */
3257 static int
3258 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3259                                        const struct rte_flow_action *action,
3260                                        const uint64_t item_flags,
3261                                        struct rte_flow_error *error)
3262 {
3263         int ret = 0;
3264
3265         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3266         if (!ret) {
3267                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3268                         return rte_flow_error_set(error, EINVAL,
3269                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3270                                                   NULL, "no TCP item in"
3271                                                   " pattern");
3272                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3273                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3274                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3275                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3276                         return rte_flow_error_set(error, EINVAL,
3277                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3278                                                   NULL,
3279                                                   "cannot decrease and increase"
3280                                                   " TCP sequence number"
3281                                                   " at the same time");
3282         }
3283         return ret;
3284 }
3285
3286 /**
3287  * Validate the modify-header actions of increment/decrement
3288  * TCP Acknowledgment number.
3289  *
3290  * @param[in] action_flags
3291  *   Holds the actions detected until now.
3292  * @param[in] action
3293  *   Pointer to the modify action.
3294  * @param[in] item_flags
3295  *   Holds the items detected.
3296  * @param[out] error
3297  *   Pointer to error structure.
3298  *
3299  * @return
3300  *   0 on success, a negative errno value otherwise and rte_errno is set.
3301  */
3302 static int
3303 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3304                                        const struct rte_flow_action *action,
3305                                        const uint64_t item_flags,
3306                                        struct rte_flow_error *error)
3307 {
3308         int ret = 0;
3309
3310         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3311         if (!ret) {
3312                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3313                         return rte_flow_error_set(error, EINVAL,
3314                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3315                                                   NULL, "no TCP item in"
3316                                                   " pattern");
3317                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3318                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3319                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3320                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3321                         return rte_flow_error_set(error, EINVAL,
3322                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3323                                                   NULL,
3324                                                   "cannot decrease and increase"
3325                                                   " TCP acknowledgment number"
3326                                                   " at the same time");
3327         }
3328         return ret;
3329 }
3330
3331 /**
3332  * Validate the modify-header TTL actions.
3333  *
3334  * @param[in] action_flags
3335  *   Holds the actions detected until now.
3336  * @param[in] action
3337  *   Pointer to the modify action.
3338  * @param[in] item_flags
3339  *   Holds the items detected.
3340  * @param[out] error
3341  *   Pointer to error structure.
3342  *
3343  * @return
3344  *   0 on success, a negative errno value otherwise and rte_errno is set.
3345  */
3346 static int
3347 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3348                                    const struct rte_flow_action *action,
3349                                    const uint64_t item_flags,
3350                                    struct rte_flow_error *error)
3351 {
3352         int ret = 0;
3353
3354         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3355         if (!ret) {
3356                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3357                         return rte_flow_error_set(error, EINVAL,
3358                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3359                                                   NULL,
3360                                                   "no IP protocol in pattern");
3361         }
3362         return ret;
3363 }
3364
3365 /**
3366  * Validate jump action.
3367  *
3368  * @param[in] action
3369  *   Pointer to the jump action.
3370  * @param[in] action_flags
3371  *   Holds the actions detected until now.
3372  * @param[in] attributes
3373  *   Pointer to flow attributes
3374  * @param[in] external
3375  *   Action belongs to flow rule created by request external to PMD.
3376  * @param[out] error
3377  *   Pointer to error structure.
3378  *
3379  * @return
3380  *   0 on success, a negative errno value otherwise and rte_errno is set.
3381  */
3382 static int
3383 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3384                              uint64_t action_flags,
3385                              const struct rte_flow_attr *attributes,
3386                              bool external, struct rte_flow_error *error)
3387 {
3388         uint32_t target_group, table;
3389         int ret = 0;
3390
3391         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3392                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3393                 return rte_flow_error_set(error, EINVAL,
3394                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3395                                           "can't have 2 fate actions in"
3396                                           " same flow");
3397         if (action_flags & MLX5_FLOW_ACTION_METER)
3398                 return rte_flow_error_set(error, ENOTSUP,
3399                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3400                                           "jump with meter not support");
3401         if (!action->conf)
3402                 return rte_flow_error_set(error, EINVAL,
3403                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3404                                           NULL, "action configuration not set");
3405         target_group =
3406                 ((const struct rte_flow_action_jump *)action->conf)->group;
3407         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3408                                        &table, error);
3409         if (ret)
3410                 return ret;
3411         if (attributes->group == target_group)
3412                 return rte_flow_error_set(error, EINVAL,
3413                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3414                                           "target group must be other than"
3415                                           " the current flow group");
3416         return 0;
3417 }
3418
3419 /*
3420  * Validate the port_id action.
3421  *
3422  * @param[in] dev
3423  *   Pointer to rte_eth_dev structure.
3424  * @param[in] action_flags
3425  *   Bit-fields that holds the actions detected until now.
3426  * @param[in] action
3427  *   Port_id RTE action structure.
3428  * @param[in] attr
3429  *   Attributes of flow that includes this action.
3430  * @param[out] error
3431  *   Pointer to error structure.
3432  *
3433  * @return
3434  *   0 on success, a negative errno value otherwise and rte_errno is set.
3435  */
3436 static int
3437 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3438                                 uint64_t action_flags,
3439                                 const struct rte_flow_action *action,
3440                                 const struct rte_flow_attr *attr,
3441                                 struct rte_flow_error *error)
3442 {
3443         const struct rte_flow_action_port_id *port_id;
3444         struct mlx5_priv *act_priv;
3445         struct mlx5_priv *dev_priv;
3446         uint16_t port;
3447
3448         if (!attr->transfer)
3449                 return rte_flow_error_set(error, ENOTSUP,
3450                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3451                                           NULL,
3452                                           "port id action is valid in transfer"
3453                                           " mode only");
3454         if (!action || !action->conf)
3455                 return rte_flow_error_set(error, ENOTSUP,
3456                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3457                                           NULL,
3458                                           "port id action parameters must be"
3459                                           " specified");
3460         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3461                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3462                 return rte_flow_error_set(error, EINVAL,
3463                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3464                                           "can have only one fate actions in"
3465                                           " a flow");
3466         dev_priv = mlx5_dev_to_eswitch_info(dev);
3467         if (!dev_priv)
3468                 return rte_flow_error_set(error, rte_errno,
3469                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3470                                           NULL,
3471                                           "failed to obtain E-Switch info");
3472         port_id = action->conf;
3473         port = port_id->original ? dev->data->port_id : port_id->id;
3474         act_priv = mlx5_port_to_eswitch_info(port, false);
3475         if (!act_priv)
3476                 return rte_flow_error_set
3477                                 (error, rte_errno,
3478                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3479                                  "failed to obtain E-Switch port id for port");
3480         if (act_priv->domain_id != dev_priv->domain_id)
3481                 return rte_flow_error_set
3482                                 (error, EINVAL,
3483                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3484                                  "port does not belong to"
3485                                  " E-Switch being configured");
3486         return 0;
3487 }
3488
3489 /**
3490  * Get the maximum number of modify header actions.
3491  *
3492  * @param dev
3493  *   Pointer to rte_eth_dev structure.
3494  * @param flags
3495  *   Flags bits to check if root level.
3496  *
3497  * @return
3498  *   Max number of modify header actions device can support.
3499  */
3500 static unsigned int
3501 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3502 {
3503         /*
3504          * There's no way to directly query the max cap. Although it has to be
3505          * acquried by iterative trial, it is a safe assumption that more
3506          * actions are supported by FW if extensive metadata register is
3507          * supported. (Only in the root table)
3508          */
3509         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3510                 return MLX5_MAX_MODIFY_NUM;
3511         else
3512                 return mlx5_flow_ext_mreg_supported(dev) ?
3513                                         MLX5_ROOT_TBL_MODIFY_NUM :
3514                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3515 }
3516
3517 /**
3518  * Validate the meter action.
3519  *
3520  * @param[in] dev
3521  *   Pointer to rte_eth_dev structure.
3522  * @param[in] action_flags
3523  *   Bit-fields that holds the actions detected until now.
3524  * @param[in] action
3525  *   Pointer to the meter action.
3526  * @param[in] attr
3527  *   Attributes of flow that includes this action.
3528  * @param[out] error
3529  *   Pointer to error structure.
3530  *
3531  * @return
3532  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3533  */
3534 static int
3535 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3536                                 uint64_t action_flags,
3537                                 const struct rte_flow_action *action,
3538                                 const struct rte_flow_attr *attr,
3539                                 struct rte_flow_error *error)
3540 {
3541         struct mlx5_priv *priv = dev->data->dev_private;
3542         const struct rte_flow_action_meter *am = action->conf;
3543         struct mlx5_flow_meter *fm;
3544
3545         if (!am)
3546                 return rte_flow_error_set(error, EINVAL,
3547                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3548                                           "meter action conf is NULL");
3549
3550         if (action_flags & MLX5_FLOW_ACTION_METER)
3551                 return rte_flow_error_set(error, ENOTSUP,
3552                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3553                                           "meter chaining not support");
3554         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3555                 return rte_flow_error_set(error, ENOTSUP,
3556                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3557                                           "meter with jump not support");
3558         if (!priv->mtr_en)
3559                 return rte_flow_error_set(error, ENOTSUP,
3560                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3561                                           NULL,
3562                                           "meter action not supported");
3563         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3564         if (!fm)
3565                 return rte_flow_error_set(error, EINVAL,
3566                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3567                                           "Meter not found");
3568         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3569               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3570               (!fm->attr.egress && !attr->egress && attr->ingress))))
3571                 return rte_flow_error_set(error, EINVAL,
3572                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3573                                           "Flow attributes are either invalid "
3574                                           "or have a conflict with current "
3575                                           "meter attributes");
3576         return 0;
3577 }
3578
3579 /**
3580  * Validate the modify-header IPv4 DSCP actions.
3581  *
3582  * @param[in] action_flags
3583  *   Holds the actions detected until now.
3584  * @param[in] action
3585  *   Pointer to the modify action.
3586  * @param[in] item_flags
3587  *   Holds the items detected.
3588  * @param[out] error
3589  *   Pointer to error structure.
3590  *
3591  * @return
3592  *   0 on success, a negative errno value otherwise and rte_errno is set.
3593  */
3594 static int
3595 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3596                                          const struct rte_flow_action *action,
3597                                          const uint64_t item_flags,
3598                                          struct rte_flow_error *error)
3599 {
3600         int ret = 0;
3601
3602         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3603         if (!ret) {
3604                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3605                         return rte_flow_error_set(error, EINVAL,
3606                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3607                                                   NULL,
3608                                                   "no ipv4 item in pattern");
3609         }
3610         return ret;
3611 }
3612
3613 /**
3614  * Validate the modify-header IPv6 DSCP actions.
3615  *
3616  * @param[in] action_flags
3617  *   Holds the actions detected until now.
3618  * @param[in] action
3619  *   Pointer to the modify action.
3620  * @param[in] item_flags
3621  *   Holds the items detected.
3622  * @param[out] error
3623  *   Pointer to error structure.
3624  *
3625  * @return
3626  *   0 on success, a negative errno value otherwise and rte_errno is set.
3627  */
3628 static int
3629 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3630                                          const struct rte_flow_action *action,
3631                                          const uint64_t item_flags,
3632                                          struct rte_flow_error *error)
3633 {
3634         int ret = 0;
3635
3636         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3637         if (!ret) {
3638                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3639                         return rte_flow_error_set(error, EINVAL,
3640                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3641                                                   NULL,
3642                                                   "no ipv6 item in pattern");
3643         }
3644         return ret;
3645 }
3646
3647 /**
3648  * Find existing modify-header resource or create and register a new one.
3649  *
3650  * @param dev[in, out]
3651  *   Pointer to rte_eth_dev structure.
3652  * @param[in, out] resource
3653  *   Pointer to modify-header resource.
3654  * @parm[in, out] dev_flow
3655  *   Pointer to the dev_flow.
3656  * @param[out] error
3657  *   pointer to error structure.
3658  *
3659  * @return
3660  *   0 on success otherwise -errno and errno is set.
3661  */
3662 static int
3663 flow_dv_modify_hdr_resource_register
3664                         (struct rte_eth_dev *dev,
3665                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3666                          struct mlx5_flow *dev_flow,
3667                          struct rte_flow_error *error)
3668 {
3669         struct mlx5_priv *priv = dev->data->dev_private;
3670         struct mlx5_ibv_shared *sh = priv->sh;
3671         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3672         struct mlx5dv_dr_domain *ns;
3673         uint32_t actions_len;
3674
3675         resource->flags =
3676                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3677         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3678                                     resource->flags))
3679                 return rte_flow_error_set(error, EOVERFLOW,
3680                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3681                                           "too many modify header items");
3682         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3683                 ns = sh->fdb_domain;
3684         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3685                 ns = sh->tx_domain;
3686         else
3687                 ns = sh->rx_domain;
3688         /* Lookup a matching resource from cache. */
3689         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3690         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3691                 if (resource->ft_type == cache_resource->ft_type &&
3692                     resource->actions_num == cache_resource->actions_num &&
3693                     resource->flags == cache_resource->flags &&
3694                     !memcmp((const void *)resource->actions,
3695                             (const void *)cache_resource->actions,
3696                             actions_len)) {
3697                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3698                                 (void *)cache_resource,
3699                                 rte_atomic32_read(&cache_resource->refcnt));
3700                         rte_atomic32_inc(&cache_resource->refcnt);
3701                         dev_flow->dv.modify_hdr = cache_resource;
3702                         return 0;
3703                 }
3704         }
3705         /* Register new modify-header resource. */
3706         cache_resource = rte_calloc(__func__, 1,
3707                                     sizeof(*cache_resource) + actions_len, 0);
3708         if (!cache_resource)
3709                 return rte_flow_error_set(error, ENOMEM,
3710                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3711                                           "cannot allocate resource memory");
3712         *cache_resource = *resource;
3713         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3714         cache_resource->verbs_action =
3715                 mlx5_glue->dv_create_flow_action_modify_header
3716                                         (sh->ctx, cache_resource->ft_type, ns,
3717                                          cache_resource->flags, actions_len,
3718                                          (uint64_t *)cache_resource->actions);
3719         if (!cache_resource->verbs_action) {
3720                 rte_free(cache_resource);
3721                 return rte_flow_error_set(error, ENOMEM,
3722                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3723                                           NULL, "cannot create action");
3724         }
3725         rte_atomic32_init(&cache_resource->refcnt);
3726         rte_atomic32_inc(&cache_resource->refcnt);
3727         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3728         dev_flow->dv.modify_hdr = cache_resource;
3729         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3730                 (void *)cache_resource,
3731                 rte_atomic32_read(&cache_resource->refcnt));
3732         return 0;
3733 }
3734
3735 #define MLX5_CNT_CONTAINER_RESIZE 64
3736
3737 /**
3738  * Get or create a flow counter.
3739  *
3740  * @param[in] dev
3741  *   Pointer to the Ethernet device structure.
3742  * @param[in] shared
3743  *   Indicate if this counter is shared with other flows.
3744  * @param[in] id
3745  *   Counter identifier.
3746  *
3747  * @return
3748  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3749  */
3750 static struct mlx5_flow_counter *
3751 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3752                                uint32_t id)
3753 {
3754         struct mlx5_priv *priv = dev->data->dev_private;
3755         struct mlx5_flow_counter *cnt = NULL;
3756         struct mlx5_devx_obj *dcs = NULL;
3757
3758         if (!priv->config.devx) {
3759                 rte_errno = ENOTSUP;
3760                 return NULL;
3761         }
3762         if (shared) {
3763                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3764                         if (cnt->shared && cnt->id == id) {
3765                                 cnt->ref_cnt++;
3766                                 return cnt;
3767                         }
3768                 }
3769         }
3770         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3771         if (!dcs)
3772                 return NULL;
3773         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3774         if (!cnt) {
3775                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3776                 rte_errno = ENOMEM;
3777                 return NULL;
3778         }
3779         struct mlx5_flow_counter tmpl = {
3780                 .shared = shared,
3781                 .ref_cnt = 1,
3782                 .id = id,
3783                 .dcs = dcs,
3784         };
3785         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3786         if (!tmpl.action) {
3787                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3788                 rte_errno = errno;
3789                 rte_free(cnt);
3790                 return NULL;
3791         }
3792         *cnt = tmpl;
3793         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3794         return cnt;
3795 }
3796
3797 /**
3798  * Release a flow counter.
3799  *
3800  * @param[in] dev
3801  *   Pointer to the Ethernet device structure.
3802  * @param[in] counter
3803  *   Pointer to the counter handler.
3804  */
3805 static void
3806 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3807                                  struct mlx5_flow_counter *counter)
3808 {
3809         struct mlx5_priv *priv = dev->data->dev_private;
3810
3811         if (!counter)
3812                 return;
3813         if (--counter->ref_cnt == 0) {
3814                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3815                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3816                 rte_free(counter);
3817         }
3818 }
3819
3820 /**
3821  * Query a devx flow counter.
3822  *
3823  * @param[in] dev
3824  *   Pointer to the Ethernet device structure.
3825  * @param[in] cnt
3826  *   Pointer to the flow counter.
3827  * @param[out] pkts
3828  *   The statistics value of packets.
3829  * @param[out] bytes
3830  *   The statistics value of bytes.
3831  *
3832  * @return
3833  *   0 on success, otherwise a negative errno value and rte_errno is set.
3834  */
3835 static inline int
3836 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3837                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3838                      uint64_t *bytes)
3839 {
3840         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3841                                                 0, NULL, NULL, 0);
3842 }
3843
3844 /**
3845  * Get a pool by a counter.
3846  *
3847  * @param[in] cnt
3848  *   Pointer to the counter.
3849  *
3850  * @return
3851  *   The counter pool.
3852  */
3853 static struct mlx5_flow_counter_pool *
3854 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3855 {
3856         if (!cnt->batch) {
3857                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3858                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3859         }
3860         return cnt->pool;
3861 }
3862
3863 /**
3864  * Get a pool by devx counter ID.
3865  *
3866  * @param[in] cont
3867  *   Pointer to the counter container.
3868  * @param[in] id
3869  *   The counter devx ID.
3870  *
3871  * @return
3872  *   The counter pool pointer if exists, NULL otherwise,
3873  */
3874 static struct mlx5_flow_counter_pool *
3875 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3876 {
3877         struct mlx5_flow_counter_pool *pool;
3878
3879         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3880                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3881                                 MLX5_COUNTERS_PER_POOL;
3882
3883                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3884                         return pool;
3885         };
3886         return NULL;
3887 }
3888
3889 /**
3890  * Allocate a new memory for the counter values wrapped by all the needed
3891  * management.
3892  *
3893  * @param[in] dev
3894  *   Pointer to the Ethernet device structure.
3895  * @param[in] raws_n
3896  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3897  *
3898  * @return
3899  *   The new memory management pointer on success, otherwise NULL and rte_errno
3900  *   is set.
3901  */
3902 static struct mlx5_counter_stats_mem_mng *
3903 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3904 {
3905         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3906                                         (dev->data->dev_private))->sh;
3907         struct mlx5_devx_mkey_attr mkey_attr;
3908         struct mlx5_counter_stats_mem_mng *mem_mng;
3909         volatile struct flow_counter_stats *raw_data;
3910         int size = (sizeof(struct flow_counter_stats) *
3911                         MLX5_COUNTERS_PER_POOL +
3912                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3913                         sizeof(struct mlx5_counter_stats_mem_mng);
3914         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3915         int i;
3916
3917         if (!mem) {
3918                 rte_errno = ENOMEM;
3919                 return NULL;
3920         }
3921         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3922         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3923         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3924                                                  IBV_ACCESS_LOCAL_WRITE);
3925         if (!mem_mng->umem) {
3926                 rte_errno = errno;
3927                 rte_free(mem);
3928                 return NULL;
3929         }
3930         mkey_attr.addr = (uintptr_t)mem;
3931         mkey_attr.size = size;
3932         mkey_attr.umem_id = mem_mng->umem->umem_id;
3933         mkey_attr.pd = sh->pdn;
3934         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3935         if (!mem_mng->dm) {
3936                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3937                 rte_errno = errno;
3938                 rte_free(mem);
3939                 return NULL;
3940         }
3941         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3942         raw_data = (volatile struct flow_counter_stats *)mem;
3943         for (i = 0; i < raws_n; ++i) {
3944                 mem_mng->raws[i].mem_mng = mem_mng;
3945                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3946         }
3947         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3948         return mem_mng;
3949 }
3950
3951 /**
3952  * Resize a counter container.
3953  *
3954  * @param[in] dev
3955  *   Pointer to the Ethernet device structure.
3956  * @param[in] batch
3957  *   Whether the pool is for counter that was allocated by batch command.
3958  *
3959  * @return
3960  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3961  */
3962 static struct mlx5_pools_container *
3963 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3964 {
3965         struct mlx5_priv *priv = dev->data->dev_private;
3966         struct mlx5_pools_container *cont =
3967                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3968         struct mlx5_pools_container *new_cont =
3969                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3970         struct mlx5_counter_stats_mem_mng *mem_mng;
3971         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3972         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3973         int i;
3974
3975         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3976                 /* The last resize still hasn't detected by the host thread. */
3977                 rte_errno = EAGAIN;
3978                 return NULL;
3979         }
3980         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3981         if (!new_cont->pools) {
3982                 rte_errno = ENOMEM;
3983                 return NULL;
3984         }
3985         if (cont->n)
3986                 memcpy(new_cont->pools, cont->pools, cont->n *
3987                        sizeof(struct mlx5_flow_counter_pool *));
3988         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3989                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3990         if (!mem_mng) {
3991                 rte_free(new_cont->pools);
3992                 return NULL;
3993         }
3994         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3995                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3996                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3997                                  i, next);
3998         new_cont->n = resize;
3999         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
4000         TAILQ_INIT(&new_cont->pool_list);
4001         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
4002         new_cont->init_mem_mng = mem_mng;
4003         rte_cio_wmb();
4004          /* Flip the master container. */
4005         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
4006         return new_cont;
4007 }
4008
4009 /**
4010  * Query a devx flow counter.
4011  *
4012  * @param[in] dev
4013  *   Pointer to the Ethernet device structure.
4014  * @param[in] cnt
4015  *   Pointer to the flow counter.
4016  * @param[out] pkts
4017  *   The statistics value of packets.
4018  * @param[out] bytes
4019  *   The statistics value of bytes.
4020  *
4021  * @return
4022  *   0 on success, otherwise a negative errno value and rte_errno is set.
4023  */
4024 static inline int
4025 _flow_dv_query_count(struct rte_eth_dev *dev,
4026                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
4027                      uint64_t *bytes)
4028 {
4029         struct mlx5_priv *priv = dev->data->dev_private;
4030         struct mlx5_flow_counter_pool *pool =
4031                         flow_dv_counter_pool_get(cnt);
4032         int offset = cnt - &pool->counters_raw[0];
4033
4034         if (priv->counter_fallback)
4035                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4036
4037         rte_spinlock_lock(&pool->sl);
4038         /*
4039          * The single counters allocation may allocate smaller ID than the
4040          * current allocated in parallel to the host reading.
4041          * In this case the new counter values must be reported as 0.
4042          */
4043         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4044                 *pkts = 0;
4045                 *bytes = 0;
4046         } else {
4047                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4048                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4049         }
4050         rte_spinlock_unlock(&pool->sl);
4051         return 0;
4052 }
4053
4054 /**
4055  * Create and initialize a new counter pool.
4056  *
4057  * @param[in] dev
4058  *   Pointer to the Ethernet device structure.
4059  * @param[out] dcs
4060  *   The devX counter handle.
4061  * @param[in] batch
4062  *   Whether the pool is for counter that was allocated by batch command.
4063  *
4064  * @return
4065  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4066  */
4067 static struct mlx5_flow_counter_pool *
4068 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4069                     uint32_t batch)
4070 {
4071         struct mlx5_priv *priv = dev->data->dev_private;
4072         struct mlx5_flow_counter_pool *pool;
4073         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4074                                                                0);
4075         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4076         uint32_t size;
4077
4078         if (cont->n == n_valid) {
4079                 cont = flow_dv_container_resize(dev, batch);
4080                 if (!cont)
4081                         return NULL;
4082         }
4083         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4084                         sizeof(struct mlx5_flow_counter);
4085         pool = rte_calloc(__func__, 1, size, 0);
4086         if (!pool) {
4087                 rte_errno = ENOMEM;
4088                 return NULL;
4089         }
4090         pool->min_dcs = dcs;
4091         pool->raw = cont->init_mem_mng->raws + n_valid %
4092                                                      MLX5_CNT_CONTAINER_RESIZE;
4093         pool->raw_hw = NULL;
4094         rte_spinlock_init(&pool->sl);
4095         /*
4096          * The generation of the new allocated counters in this pool is 0, 2 in
4097          * the pool generation makes all the counters valid for allocation.
4098          */
4099         rte_atomic64_set(&pool->query_gen, 0x2);
4100         TAILQ_INIT(&pool->counters);
4101         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4102         cont->pools[n_valid] = pool;
4103         /* Pool initialization must be updated before host thread access. */
4104         rte_cio_wmb();
4105         rte_atomic16_add(&cont->n_valid, 1);
4106         return pool;
4107 }
4108
4109 /**
4110  * Prepare a new counter and/or a new counter pool.
4111  *
4112  * @param[in] dev
4113  *   Pointer to the Ethernet device structure.
4114  * @param[out] cnt_free
4115  *   Where to put the pointer of a new counter.
4116  * @param[in] batch
4117  *   Whether the pool is for counter that was allocated by batch command.
4118  *
4119  * @return
4120  *   The free counter pool pointer and @p cnt_free is set on success,
4121  *   NULL otherwise and rte_errno is set.
4122  */
4123 static struct mlx5_flow_counter_pool *
4124 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4125                              struct mlx5_flow_counter **cnt_free,
4126                              uint32_t batch)
4127 {
4128         struct mlx5_priv *priv = dev->data->dev_private;
4129         struct mlx5_flow_counter_pool *pool;
4130         struct mlx5_devx_obj *dcs = NULL;
4131         struct mlx5_flow_counter *cnt;
4132         uint32_t i;
4133
4134         if (!batch) {
4135                 /* bulk_bitmap must be 0 for single counter allocation. */
4136                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4137                 if (!dcs)
4138                         return NULL;
4139                 pool = flow_dv_find_pool_by_id
4140                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4141                 if (!pool) {
4142                         pool = flow_dv_pool_create(dev, dcs, batch);
4143                         if (!pool) {
4144                                 mlx5_devx_cmd_destroy(dcs);
4145                                 return NULL;
4146                         }
4147                 } else if (dcs->id < pool->min_dcs->id) {
4148                         rte_atomic64_set(&pool->a64_dcs,
4149                                          (int64_t)(uintptr_t)dcs);
4150                 }
4151                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4152                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4153                 cnt->dcs = dcs;
4154                 *cnt_free = cnt;
4155                 return pool;
4156         }
4157         /* bulk_bitmap is in 128 counters units. */
4158         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4159                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4160         if (!dcs) {
4161                 rte_errno = ENODATA;
4162                 return NULL;
4163         }
4164         pool = flow_dv_pool_create(dev, dcs, batch);
4165         if (!pool) {
4166                 mlx5_devx_cmd_destroy(dcs);
4167                 return NULL;
4168         }
4169         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4170                 cnt = &pool->counters_raw[i];
4171                 cnt->pool = pool;
4172                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4173         }
4174         *cnt_free = &pool->counters_raw[0];
4175         return pool;
4176 }
4177
4178 /**
4179  * Search for existed shared counter.
4180  *
4181  * @param[in] cont
4182  *   Pointer to the relevant counter pool container.
4183  * @param[in] id
4184  *   The shared counter ID to search.
4185  *
4186  * @return
4187  *   NULL if not existed, otherwise pointer to the shared counter.
4188  */
4189 static struct mlx5_flow_counter *
4190 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4191                               uint32_t id)
4192 {
4193         static struct mlx5_flow_counter *cnt;
4194         struct mlx5_flow_counter_pool *pool;
4195         int i;
4196
4197         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4198                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4199                         cnt = &pool->counters_raw[i];
4200                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4201                                 return cnt;
4202                 }
4203         }
4204         return NULL;
4205 }
4206
4207 /**
4208  * Allocate a flow counter.
4209  *
4210  * @param[in] dev
4211  *   Pointer to the Ethernet device structure.
4212  * @param[in] shared
4213  *   Indicate if this counter is shared with other flows.
4214  * @param[in] id
4215  *   Counter identifier.
4216  * @param[in] group
4217  *   Counter flow group.
4218  *
4219  * @return
4220  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4221  */
4222 static struct mlx5_flow_counter *
4223 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4224                       uint16_t group)
4225 {
4226         struct mlx5_priv *priv = dev->data->dev_private;
4227         struct mlx5_flow_counter_pool *pool = NULL;
4228         struct mlx5_flow_counter *cnt_free = NULL;
4229         /*
4230          * Currently group 0 flow counter cannot be assigned to a flow if it is
4231          * not the first one in the batch counter allocation, so it is better
4232          * to allocate counters one by one for these flows in a separate
4233          * container.
4234          * A counter can be shared between different groups so need to take
4235          * shared counters from the single container.
4236          */
4237         uint32_t batch = (group && !shared) ? 1 : 0;
4238         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4239                                                                0);
4240
4241         if (priv->counter_fallback)
4242                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4243         if (!priv->config.devx) {
4244                 rte_errno = ENOTSUP;
4245                 return NULL;
4246         }
4247         if (shared) {
4248                 cnt_free = flow_dv_counter_shared_search(cont, id);
4249                 if (cnt_free) {
4250                         if (cnt_free->ref_cnt + 1 == 0) {
4251                                 rte_errno = E2BIG;
4252                                 return NULL;
4253                         }
4254                         cnt_free->ref_cnt++;
4255                         return cnt_free;
4256                 }
4257         }
4258         /* Pools which has a free counters are in the start. */
4259         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4260                 /*
4261                  * The free counter reset values must be updated between the
4262                  * counter release to the counter allocation, so, at least one
4263                  * query must be done in this time. ensure it by saving the
4264                  * query generation in the release time.
4265                  * The free list is sorted according to the generation - so if
4266                  * the first one is not updated, all the others are not
4267                  * updated too.
4268                  */
4269                 cnt_free = TAILQ_FIRST(&pool->counters);
4270                 if (cnt_free && cnt_free->query_gen + 1 <
4271                     rte_atomic64_read(&pool->query_gen))
4272                         break;
4273                 cnt_free = NULL;
4274         }
4275         if (!cnt_free) {
4276                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4277                 if (!pool)
4278                         return NULL;
4279         }
4280         cnt_free->batch = batch;
4281         /* Create a DV counter action only in the first time usage. */
4282         if (!cnt_free->action) {
4283                 uint16_t offset;
4284                 struct mlx5_devx_obj *dcs;
4285
4286                 if (batch) {
4287                         offset = cnt_free - &pool->counters_raw[0];
4288                         dcs = pool->min_dcs;
4289                 } else {
4290                         offset = 0;
4291                         dcs = cnt_free->dcs;
4292                 }
4293                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4294                                         (dcs->obj, offset);
4295                 if (!cnt_free->action) {
4296                         rte_errno = errno;
4297                         return NULL;
4298                 }
4299         }
4300         /* Update the counter reset values. */
4301         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4302                                  &cnt_free->bytes))
4303                 return NULL;
4304         cnt_free->shared = shared;
4305         cnt_free->ref_cnt = 1;
4306         cnt_free->id = id;
4307         if (!priv->sh->cmng.query_thread_on)
4308                 /* Start the asynchronous batch query by the host thread. */
4309                 mlx5_set_query_alarm(priv->sh);
4310         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4311         if (TAILQ_EMPTY(&pool->counters)) {
4312                 /* Move the pool to the end of the container pool list. */
4313                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4314                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4315         }
4316         return cnt_free;
4317 }
4318
4319 /**
4320  * Release a flow counter.
4321  *
4322  * @param[in] dev
4323  *   Pointer to the Ethernet device structure.
4324  * @param[in] counter
4325  *   Pointer to the counter handler.
4326  */
4327 static void
4328 flow_dv_counter_release(struct rte_eth_dev *dev,
4329                         struct mlx5_flow_counter *counter)
4330 {
4331         struct mlx5_priv *priv = dev->data->dev_private;
4332
4333         if (!counter)
4334                 return;
4335         if (priv->counter_fallback) {
4336                 flow_dv_counter_release_fallback(dev, counter);
4337                 return;
4338         }
4339         if (--counter->ref_cnt == 0) {
4340                 struct mlx5_flow_counter_pool *pool =
4341                                 flow_dv_counter_pool_get(counter);
4342
4343                 /* Put the counter in the end - the last updated one. */
4344                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4345                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4346         }
4347 }
4348
4349 /**
4350  * Verify the @p attributes will be correctly understood by the NIC and store
4351  * them in the @p flow if everything is correct.
4352  *
4353  * @param[in] dev
4354  *   Pointer to dev struct.
4355  * @param[in] attributes
4356  *   Pointer to flow attributes
4357  * @param[in] external
4358  *   This flow rule is created by request external to PMD.
4359  * @param[out] error
4360  *   Pointer to error structure.
4361  *
4362  * @return
4363  *   0 on success, a negative errno value otherwise and rte_errno is set.
4364  */
4365 static int
4366 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4367                             const struct rte_flow_attr *attributes,
4368                             bool external __rte_unused,
4369                             struct rte_flow_error *error)
4370 {
4371         struct mlx5_priv *priv = dev->data->dev_private;
4372         uint32_t priority_max = priv->config.flow_prio - 1;
4373
4374 #ifndef HAVE_MLX5DV_DR
4375         if (attributes->group)
4376                 return rte_flow_error_set(error, ENOTSUP,
4377                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4378                                           NULL,
4379                                           "groups are not supported");
4380 #else
4381         uint32_t table;
4382         int ret;
4383
4384         ret = mlx5_flow_group_to_table(attributes, external,
4385                                        attributes->group,
4386                                        &table, error);
4387         if (ret)
4388                 return ret;
4389 #endif
4390         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4391             attributes->priority >= priority_max)
4392                 return rte_flow_error_set(error, ENOTSUP,
4393                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4394                                           NULL,
4395                                           "priority out of range");
4396         if (attributes->transfer) {
4397                 if (!priv->config.dv_esw_en)
4398                         return rte_flow_error_set
4399                                 (error, ENOTSUP,
4400                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4401                                  "E-Switch dr is not supported");
4402                 if (!(priv->representor || priv->master))
4403                         return rte_flow_error_set
4404                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4405                                  NULL, "E-Switch configuration can only be"
4406                                  " done by a master or a representor device");
4407                 if (attributes->egress)
4408                         return rte_flow_error_set
4409                                 (error, ENOTSUP,
4410                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4411                                  "egress is not supported");
4412         }
4413         if (!(attributes->egress ^ attributes->ingress))
4414                 return rte_flow_error_set(error, ENOTSUP,
4415                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4416                                           "must specify exactly one of "
4417                                           "ingress or egress");
4418         return 0;
4419 }
4420
4421 /**
4422  * Internal validation function. For validating both actions and items.
4423  *
4424  * @param[in] dev
4425  *   Pointer to the rte_eth_dev structure.
4426  * @param[in] attr
4427  *   Pointer to the flow attributes.
4428  * @param[in] items
4429  *   Pointer to the list of items.
4430  * @param[in] actions
4431  *   Pointer to the list of actions.
4432  * @param[in] external
4433  *   This flow rule is created by request external to PMD.
4434  * @param[out] error
4435  *   Pointer to the error structure.
4436  *
4437  * @return
4438  *   0 on success, a negative errno value otherwise and rte_errno is set.
4439  */
4440 static int
4441 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4442                  const struct rte_flow_item items[],
4443                  const struct rte_flow_action actions[],
4444                  bool external, struct rte_flow_error *error)
4445 {
4446         int ret;
4447         uint64_t action_flags = 0;
4448         uint64_t item_flags = 0;
4449         uint64_t last_item = 0;
4450         uint8_t next_protocol = 0xff;
4451         uint16_t ether_type = 0;
4452         int actions_n = 0;
4453         const struct rte_flow_item *gre_item = NULL;
4454         struct rte_flow_item_tcp nic_tcp_mask = {
4455                 .hdr = {
4456                         .tcp_flags = 0xFF,
4457                         .src_port = RTE_BE16(UINT16_MAX),
4458                         .dst_port = RTE_BE16(UINT16_MAX),
4459                 }
4460         };
4461         struct mlx5_priv *priv = dev->data->dev_private;
4462         struct mlx5_dev_config *dev_conf = &priv->config;
4463
4464         if (items == NULL)
4465                 return -1;
4466         ret = flow_dv_validate_attributes(dev, attr, external, error);
4467         if (ret < 0)
4468                 return ret;
4469         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4470                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4471                 int type = items->type;
4472
4473                 switch (type) {
4474                 case RTE_FLOW_ITEM_TYPE_VOID:
4475                         break;
4476                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4477                         ret = flow_dv_validate_item_port_id
4478                                         (dev, items, attr, item_flags, error);
4479                         if (ret < 0)
4480                                 return ret;
4481                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4482                         break;
4483                 case RTE_FLOW_ITEM_TYPE_ETH:
4484                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4485                                                           error);
4486                         if (ret < 0)
4487                                 return ret;
4488                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4489                                              MLX5_FLOW_LAYER_OUTER_L2;
4490                         if (items->mask != NULL && items->spec != NULL) {
4491                                 ether_type =
4492                                         ((const struct rte_flow_item_eth *)
4493                                          items->spec)->type;
4494                                 ether_type &=
4495                                         ((const struct rte_flow_item_eth *)
4496                                          items->mask)->type;
4497                                 ether_type = rte_be_to_cpu_16(ether_type);
4498                         } else {
4499                                 ether_type = 0;
4500                         }
4501                         break;
4502                 case RTE_FLOW_ITEM_TYPE_VLAN:
4503                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4504                                                            dev, error);
4505                         if (ret < 0)
4506                                 return ret;
4507                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4508                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4509                         if (items->mask != NULL && items->spec != NULL) {
4510                                 ether_type =
4511                                         ((const struct rte_flow_item_vlan *)
4512                                          items->spec)->inner_type;
4513                                 ether_type &=
4514                                         ((const struct rte_flow_item_vlan *)
4515                                          items->mask)->inner_type;
4516                                 ether_type = rte_be_to_cpu_16(ether_type);
4517                         } else {
4518                                 ether_type = 0;
4519                         }
4520                         break;
4521                 case RTE_FLOW_ITEM_TYPE_IPV4:
4522                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4523                                                   &item_flags, &tunnel);
4524                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4525                                                            last_item,
4526                                                            ether_type, NULL,
4527                                                            error);
4528                         if (ret < 0)
4529                                 return ret;
4530                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4531                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4532                         if (items->mask != NULL &&
4533                             ((const struct rte_flow_item_ipv4 *)
4534                              items->mask)->hdr.next_proto_id) {
4535                                 next_protocol =
4536                                         ((const struct rte_flow_item_ipv4 *)
4537                                          (items->spec))->hdr.next_proto_id;
4538                                 next_protocol &=
4539                                         ((const struct rte_flow_item_ipv4 *)
4540                                          (items->mask))->hdr.next_proto_id;
4541                         } else {
4542                                 /* Reset for inner layer. */
4543                                 next_protocol = 0xff;
4544                         }
4545                         break;
4546                 case RTE_FLOW_ITEM_TYPE_IPV6:
4547                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4548                                                   &item_flags, &tunnel);
4549                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4550                                                            last_item,
4551                                                            ether_type, NULL,
4552                                                            error);
4553                         if (ret < 0)
4554                                 return ret;
4555                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4556                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4557                         if (items->mask != NULL &&
4558                             ((const struct rte_flow_item_ipv6 *)
4559                              items->mask)->hdr.proto) {
4560                                 next_protocol =
4561                                         ((const struct rte_flow_item_ipv6 *)
4562                                          items->spec)->hdr.proto;
4563                                 next_protocol &=
4564                                         ((const struct rte_flow_item_ipv6 *)
4565                                          items->mask)->hdr.proto;
4566                         } else {
4567                                 /* Reset for inner layer. */
4568                                 next_protocol = 0xff;
4569                         }
4570                         break;
4571                 case RTE_FLOW_ITEM_TYPE_TCP:
4572                         ret = mlx5_flow_validate_item_tcp
4573                                                 (items, item_flags,
4574                                                  next_protocol,
4575                                                  &nic_tcp_mask,
4576                                                  error);
4577                         if (ret < 0)
4578                                 return ret;
4579                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4580                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4581                         break;
4582                 case RTE_FLOW_ITEM_TYPE_UDP:
4583                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4584                                                           next_protocol,
4585                                                           error);
4586                         if (ret < 0)
4587                                 return ret;
4588                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4589                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4590                         break;
4591                 case RTE_FLOW_ITEM_TYPE_GRE:
4592                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4593                                                           next_protocol, error);
4594                         if (ret < 0)
4595                                 return ret;
4596                         gre_item = items;
4597                         last_item = MLX5_FLOW_LAYER_GRE;
4598                         break;
4599                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4600                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4601                                                             next_protocol,
4602                                                             error);
4603                         if (ret < 0)
4604                                 return ret;
4605                         last_item = MLX5_FLOW_LAYER_NVGRE;
4606                         break;
4607                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4608                         ret = mlx5_flow_validate_item_gre_key
4609                                 (items, item_flags, gre_item, error);
4610                         if (ret < 0)
4611                                 return ret;
4612                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4613                         break;
4614                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4615                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4616                                                             error);
4617                         if (ret < 0)
4618                                 return ret;
4619                         last_item = MLX5_FLOW_LAYER_VXLAN;
4620                         break;
4621                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4622                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4623                                                                 item_flags, dev,
4624                                                                 error);
4625                         if (ret < 0)
4626                                 return ret;
4627                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4628                         break;
4629                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4630                         ret = mlx5_flow_validate_item_geneve(items,
4631                                                              item_flags, dev,
4632                                                              error);
4633                         if (ret < 0)
4634                                 return ret;
4635                         last_item = MLX5_FLOW_LAYER_GENEVE;
4636                         break;
4637                 case RTE_FLOW_ITEM_TYPE_MPLS:
4638                         ret = mlx5_flow_validate_item_mpls(dev, items,
4639                                                            item_flags,
4640                                                            last_item, error);
4641                         if (ret < 0)
4642                                 return ret;
4643                         last_item = MLX5_FLOW_LAYER_MPLS;
4644                         break;
4645
4646                 case RTE_FLOW_ITEM_TYPE_MARK:
4647                         ret = flow_dv_validate_item_mark(dev, items, attr,
4648                                                          error);
4649                         if (ret < 0)
4650                                 return ret;
4651                         last_item = MLX5_FLOW_ITEM_MARK;
4652                         break;
4653                 case RTE_FLOW_ITEM_TYPE_META:
4654                         ret = flow_dv_validate_item_meta(dev, items, attr,
4655                                                          error);
4656                         if (ret < 0)
4657                                 return ret;
4658                         last_item = MLX5_FLOW_ITEM_METADATA;
4659                         break;
4660                 case RTE_FLOW_ITEM_TYPE_ICMP:
4661                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4662                                                            next_protocol,
4663                                                            error);
4664                         if (ret < 0)
4665                                 return ret;
4666                         last_item = MLX5_FLOW_LAYER_ICMP;
4667                         break;
4668                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4669                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4670                                                             next_protocol,
4671                                                             error);
4672                         if (ret < 0)
4673                                 return ret;
4674                         last_item = MLX5_FLOW_LAYER_ICMP6;
4675                         break;
4676                 case RTE_FLOW_ITEM_TYPE_TAG:
4677                         ret = flow_dv_validate_item_tag(dev, items,
4678                                                         attr, error);
4679                         if (ret < 0)
4680                                 return ret;
4681                         last_item = MLX5_FLOW_ITEM_TAG;
4682                         break;
4683                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4684                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4685                         break;
4686                 case RTE_FLOW_ITEM_TYPE_GTP:
4687                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4688                                                         error);
4689                         if (ret < 0)
4690                                 return ret;
4691                         last_item = MLX5_FLOW_LAYER_GTP;
4692                         break;
4693                 default:
4694                         return rte_flow_error_set(error, ENOTSUP,
4695                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4696                                                   NULL, "item not supported");
4697                 }
4698                 item_flags |= last_item;
4699         }
4700         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4701                 int type = actions->type;
4702                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4703                         return rte_flow_error_set(error, ENOTSUP,
4704                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4705                                                   actions, "too many actions");
4706                 switch (type) {
4707                 case RTE_FLOW_ACTION_TYPE_VOID:
4708                         break;
4709                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4710                         ret = flow_dv_validate_action_port_id(dev,
4711                                                               action_flags,
4712                                                               actions,
4713                                                               attr,
4714                                                               error);
4715                         if (ret)
4716                                 return ret;
4717                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4718                         ++actions_n;
4719                         break;
4720                 case RTE_FLOW_ACTION_TYPE_FLAG:
4721                         ret = flow_dv_validate_action_flag(dev, action_flags,
4722                                                            attr, error);
4723                         if (ret < 0)
4724                                 return ret;
4725                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4726                                 /* Count all modify-header actions as one. */
4727                                 if (!(action_flags &
4728                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4729                                         ++actions_n;
4730                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4731                                                 MLX5_FLOW_ACTION_MARK_EXT;
4732                         } else {
4733                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4734                                 ++actions_n;
4735                         }
4736                         break;
4737                 case RTE_FLOW_ACTION_TYPE_MARK:
4738                         ret = flow_dv_validate_action_mark(dev, actions,
4739                                                            action_flags,
4740                                                            attr, error);
4741                         if (ret < 0)
4742                                 return ret;
4743                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4744                                 /* Count all modify-header actions as one. */
4745                                 if (!(action_flags &
4746                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4747                                         ++actions_n;
4748                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4749                                                 MLX5_FLOW_ACTION_MARK_EXT;
4750                         } else {
4751                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4752                                 ++actions_n;
4753                         }
4754                         break;
4755                 case RTE_FLOW_ACTION_TYPE_SET_META:
4756                         ret = flow_dv_validate_action_set_meta(dev, actions,
4757                                                                action_flags,
4758                                                                attr, error);
4759                         if (ret < 0)
4760                                 return ret;
4761                         /* Count all modify-header actions as one action. */
4762                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4763                                 ++actions_n;
4764                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4765                         break;
4766                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4767                         ret = flow_dv_validate_action_set_tag(dev, actions,
4768                                                               action_flags,
4769                                                               attr, error);
4770                         if (ret < 0)
4771                                 return ret;
4772                         /* Count all modify-header actions as one action. */
4773                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4774                                 ++actions_n;
4775                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4776                         break;
4777                 case RTE_FLOW_ACTION_TYPE_DROP:
4778                         ret = mlx5_flow_validate_action_drop(action_flags,
4779                                                              attr, error);
4780                         if (ret < 0)
4781                                 return ret;
4782                         action_flags |= MLX5_FLOW_ACTION_DROP;
4783                         ++actions_n;
4784                         break;
4785                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4786                         ret = mlx5_flow_validate_action_queue(actions,
4787                                                               action_flags, dev,
4788                                                               attr, error);
4789                         if (ret < 0)
4790                                 return ret;
4791                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4792                         ++actions_n;
4793                         break;
4794                 case RTE_FLOW_ACTION_TYPE_RSS:
4795                         ret = mlx5_flow_validate_action_rss(actions,
4796                                                             action_flags, dev,
4797                                                             attr, item_flags,
4798                                                             error);
4799                         if (ret < 0)
4800                                 return ret;
4801                         action_flags |= MLX5_FLOW_ACTION_RSS;
4802                         ++actions_n;
4803                         break;
4804                 case RTE_FLOW_ACTION_TYPE_COUNT:
4805                         ret = flow_dv_validate_action_count(dev, error);
4806                         if (ret < 0)
4807                                 return ret;
4808                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4809                         ++actions_n;
4810                         break;
4811                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4812                         if (flow_dv_validate_action_pop_vlan(dev,
4813                                                              action_flags,
4814                                                              actions,
4815                                                              item_flags, attr,
4816                                                              error))
4817                                 return -rte_errno;
4818                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4819                         ++actions_n;
4820                         break;
4821                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4822                         ret = flow_dv_validate_action_push_vlan(action_flags,
4823                                                                 item_flags,
4824                                                                 actions, attr,
4825                                                                 error);
4826                         if (ret < 0)
4827                                 return ret;
4828                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4829                         ++actions_n;
4830                         break;
4831                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4832                         ret = flow_dv_validate_action_set_vlan_pcp
4833                                                 (action_flags, actions, error);
4834                         if (ret < 0)
4835                                 return ret;
4836                         /* Count PCP with push_vlan command. */
4837                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4838                         break;
4839                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4840                         ret = flow_dv_validate_action_set_vlan_vid
4841                                                 (item_flags, action_flags,
4842                                                  actions, error);
4843                         if (ret < 0)
4844                                 return ret;
4845                         /* Count VID with push_vlan command. */
4846                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4847                         break;
4848                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4849                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4850                         ret = flow_dv_validate_action_l2_encap(action_flags,
4851                                                                actions, attr,
4852                                                                error);
4853                         if (ret < 0)
4854                                 return ret;
4855                         action_flags |= actions->type ==
4856                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4857                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4858                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4859                         ++actions_n;
4860                         break;
4861                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4862                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4863                         ret = flow_dv_validate_action_l2_decap(action_flags,
4864                                                                attr, error);
4865                         if (ret < 0)
4866                                 return ret;
4867                         action_flags |= actions->type ==
4868                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4869                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4870                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4871                         ++actions_n;
4872                         break;
4873                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4874                         ret = flow_dv_validate_action_raw_encap(action_flags,
4875                                                                 actions, attr,
4876                                                                 error);
4877                         if (ret < 0)
4878                                 return ret;
4879                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4880                         ++actions_n;
4881                         break;
4882                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4883                         ret = flow_dv_validate_action_raw_decap(action_flags,
4884                                                                 actions, attr,
4885                                                                 error);
4886                         if (ret < 0)
4887                                 return ret;
4888                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4889                         ++actions_n;
4890                         break;
4891                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4892                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4893                         ret = flow_dv_validate_action_modify_mac(action_flags,
4894                                                                  actions,
4895                                                                  item_flags,
4896                                                                  error);
4897                         if (ret < 0)
4898                                 return ret;
4899                         /* Count all modify-header actions as one action. */
4900                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4901                                 ++actions_n;
4902                         action_flags |= actions->type ==
4903                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4904                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4905                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4906                         break;
4907
4908                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4909                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4910                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4911                                                                   actions,
4912                                                                   item_flags,
4913                                                                   error);
4914                         if (ret < 0)
4915                                 return ret;
4916                         /* Count all modify-header actions as one action. */
4917                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4918                                 ++actions_n;
4919                         action_flags |= actions->type ==
4920                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4921                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4922                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4923                         break;
4924                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4925                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4926                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4927                                                                   actions,
4928                                                                   item_flags,
4929                                                                   error);
4930                         if (ret < 0)
4931                                 return ret;
4932                         /* Count all modify-header actions as one action. */
4933                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4934                                 ++actions_n;
4935                         action_flags |= actions->type ==
4936                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4937                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4938                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4939                         break;
4940                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4941                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4942                         ret = flow_dv_validate_action_modify_tp(action_flags,
4943                                                                 actions,
4944                                                                 item_flags,
4945                                                                 error);
4946                         if (ret < 0)
4947                                 return ret;
4948                         /* Count all modify-header actions as one action. */
4949                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4950                                 ++actions_n;
4951                         action_flags |= actions->type ==
4952                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4953                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4954                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4955                         break;
4956                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4957                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4958                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4959                                                                  actions,
4960                                                                  item_flags,
4961                                                                  error);
4962                         if (ret < 0)
4963                                 return ret;
4964                         /* Count all modify-header actions as one action. */
4965                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4966                                 ++actions_n;
4967                         action_flags |= actions->type ==
4968                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4969                                                 MLX5_FLOW_ACTION_SET_TTL :
4970                                                 MLX5_FLOW_ACTION_DEC_TTL;
4971                         break;
4972                 case RTE_FLOW_ACTION_TYPE_JUMP:
4973                         ret = flow_dv_validate_action_jump(actions,
4974                                                            action_flags,
4975                                                            attr, external,
4976                                                            error);
4977                         if (ret)
4978                                 return ret;
4979                         ++actions_n;
4980                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4981                         break;
4982                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4983                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4984                         ret = flow_dv_validate_action_modify_tcp_seq
4985                                                                 (action_flags,
4986                                                                  actions,
4987                                                                  item_flags,
4988                                                                  error);
4989                         if (ret < 0)
4990                                 return ret;
4991                         /* Count all modify-header actions as one action. */
4992                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4993                                 ++actions_n;
4994                         action_flags |= actions->type ==
4995                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4996                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4997                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4998                         break;
4999                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5000                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5001                         ret = flow_dv_validate_action_modify_tcp_ack
5002                                                                 (action_flags,
5003                                                                  actions,
5004                                                                  item_flags,
5005                                                                  error);
5006                         if (ret < 0)
5007                                 return ret;
5008                         /* Count all modify-header actions as one action. */
5009                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5010                                 ++actions_n;
5011                         action_flags |= actions->type ==
5012                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5013                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5014                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5015                         break;
5016                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5017                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5018                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5019                         break;
5020                 case RTE_FLOW_ACTION_TYPE_METER:
5021                         ret = mlx5_flow_validate_action_meter(dev,
5022                                                               action_flags,
5023                                                               actions, attr,
5024                                                               error);
5025                         if (ret < 0)
5026                                 return ret;
5027                         action_flags |= MLX5_FLOW_ACTION_METER;
5028                         ++actions_n;
5029                         break;
5030                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5031                         ret = flow_dv_validate_action_modify_ipv4_dscp
5032                                                          (action_flags,
5033                                                           actions,
5034                                                           item_flags,
5035                                                           error);
5036                         if (ret < 0)
5037                                 return ret;
5038                         /* Count all modify-header actions as one action. */
5039                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5040                                 ++actions_n;
5041                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5042                         break;
5043                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5044                         ret = flow_dv_validate_action_modify_ipv6_dscp
5045                                                                 (action_flags,
5046                                                                  actions,
5047                                                                  item_flags,
5048                                                                  error);
5049                         if (ret < 0)
5050                                 return ret;
5051                         /* Count all modify-header actions as one action. */
5052                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5053                                 ++actions_n;
5054                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5055                         break;
5056                 default:
5057                         return rte_flow_error_set(error, ENOTSUP,
5058                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5059                                                   actions,
5060                                                   "action not supported");
5061                 }
5062         }
5063         if ((action_flags & MLX5_FLOW_LAYER_TUNNEL) &&
5064             (action_flags & MLX5_FLOW_VLAN_ACTIONS))
5065                 return rte_flow_error_set(error, ENOTSUP,
5066                                           RTE_FLOW_ERROR_TYPE_ACTION,
5067                                           actions,
5068                                           "can't have vxlan and vlan"
5069                                           " actions in the same rule");
5070         /* Eswitch has few restrictions on using items and actions */
5071         if (attr->transfer) {
5072                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5073                     action_flags & MLX5_FLOW_ACTION_FLAG)
5074                         return rte_flow_error_set(error, ENOTSUP,
5075                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5076                                                   NULL,
5077                                                   "unsupported action FLAG");
5078                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5079                     action_flags & MLX5_FLOW_ACTION_MARK)
5080                         return rte_flow_error_set(error, ENOTSUP,
5081                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5082                                                   NULL,
5083                                                   "unsupported action MARK");
5084                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5085                         return rte_flow_error_set(error, ENOTSUP,
5086                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5087                                                   NULL,
5088                                                   "unsupported action QUEUE");
5089                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5090                         return rte_flow_error_set(error, ENOTSUP,
5091                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5092                                                   NULL,
5093                                                   "unsupported action RSS");
5094                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5095                         return rte_flow_error_set(error, EINVAL,
5096                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5097                                                   actions,
5098                                                   "no fate action is found");
5099         } else {
5100                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5101                         return rte_flow_error_set(error, EINVAL,
5102                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5103                                                   actions,
5104                                                   "no fate action is found");
5105         }
5106         return 0;
5107 }
5108
5109 /**
5110  * Internal preparation function. Allocates the DV flow size,
5111  * this size is constant.
5112  *
5113  * @param[in] attr
5114  *   Pointer to the flow attributes.
5115  * @param[in] items
5116  *   Pointer to the list of items.
5117  * @param[in] actions
5118  *   Pointer to the list of actions.
5119  * @param[out] error
5120  *   Pointer to the error structure.
5121  *
5122  * @return
5123  *   Pointer to mlx5_flow object on success,
5124  *   otherwise NULL and rte_errno is set.
5125  */
5126 static struct mlx5_flow *
5127 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5128                 const struct rte_flow_item items[] __rte_unused,
5129                 const struct rte_flow_action actions[] __rte_unused,
5130                 struct rte_flow_error *error)
5131 {
5132         size_t size = sizeof(struct mlx5_flow);
5133         struct mlx5_flow *dev_flow;
5134
5135         dev_flow = rte_calloc(__func__, 1, size, 0);
5136         if (!dev_flow) {
5137                 rte_flow_error_set(error, ENOMEM,
5138                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5139                                    "not enough memory to create flow");
5140                 return NULL;
5141         }
5142         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5143         dev_flow->ingress = attr->ingress;
5144         dev_flow->transfer = attr->transfer;
5145         return dev_flow;
5146 }
5147
5148 #ifndef NDEBUG
5149 /**
5150  * Sanity check for match mask and value. Similar to check_valid_spec() in
5151  * kernel driver. If unmasked bit is present in value, it returns failure.
5152  *
5153  * @param match_mask
5154  *   pointer to match mask buffer.
5155  * @param match_value
5156  *   pointer to match value buffer.
5157  *
5158  * @return
5159  *   0 if valid, -EINVAL otherwise.
5160  */
5161 static int
5162 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5163 {
5164         uint8_t *m = match_mask;
5165         uint8_t *v = match_value;
5166         unsigned int i;
5167
5168         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5169                 if (v[i] & ~m[i]) {
5170                         DRV_LOG(ERR,
5171                                 "match_value differs from match_criteria"
5172                                 " %p[%u] != %p[%u]",
5173                                 match_value, i, match_mask, i);
5174                         return -EINVAL;
5175                 }
5176         }
5177         return 0;
5178 }
5179 #endif
5180
5181 /**
5182  * Add Ethernet item to matcher and to the value.
5183  *
5184  * @param[in, out] matcher
5185  *   Flow matcher.
5186  * @param[in, out] key
5187  *   Flow matcher value.
5188  * @param[in] item
5189  *   Flow pattern to translate.
5190  * @param[in] inner
5191  *   Item is inner pattern.
5192  */
5193 static void
5194 flow_dv_translate_item_eth(void *matcher, void *key,
5195                            const struct rte_flow_item *item, int inner)
5196 {
5197         const struct rte_flow_item_eth *eth_m = item->mask;
5198         const struct rte_flow_item_eth *eth_v = item->spec;
5199         const struct rte_flow_item_eth nic_mask = {
5200                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5201                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5202                 .type = RTE_BE16(0xffff),
5203         };
5204         void *headers_m;
5205         void *headers_v;
5206         char *l24_v;
5207         unsigned int i;
5208
5209         if (!eth_v)
5210                 return;
5211         if (!eth_m)
5212                 eth_m = &nic_mask;
5213         if (inner) {
5214                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5215                                          inner_headers);
5216                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5217         } else {
5218                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5219                                          outer_headers);
5220                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5221         }
5222         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5223                &eth_m->dst, sizeof(eth_m->dst));
5224         /* The value must be in the range of the mask. */
5225         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5226         for (i = 0; i < sizeof(eth_m->dst); ++i)
5227                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5228         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5229                &eth_m->src, sizeof(eth_m->src));
5230         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5231         /* The value must be in the range of the mask. */
5232         for (i = 0; i < sizeof(eth_m->dst); ++i)
5233                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5234         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5235                  rte_be_to_cpu_16(eth_m->type));
5236         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5237         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5238 }
5239
5240 /**
5241  * Add VLAN item to matcher and to the value.
5242  *
5243  * @param[in, out] dev_flow
5244  *   Flow descriptor.
5245  * @param[in, out] matcher
5246  *   Flow matcher.
5247  * @param[in, out] key
5248  *   Flow matcher value.
5249  * @param[in] item
5250  *   Flow pattern to translate.
5251  * @param[in] inner
5252  *   Item is inner pattern.
5253  */
5254 static void
5255 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5256                             void *matcher, void *key,
5257                             const struct rte_flow_item *item,
5258                             int inner)
5259 {
5260         const struct rte_flow_item_vlan *vlan_m = item->mask;
5261         const struct rte_flow_item_vlan *vlan_v = item->spec;
5262         void *headers_m;
5263         void *headers_v;
5264         uint16_t tci_m;
5265         uint16_t tci_v;
5266
5267         if (!vlan_v)
5268                 return;
5269         if (!vlan_m)
5270                 vlan_m = &rte_flow_item_vlan_mask;
5271         if (inner) {
5272                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5273                                          inner_headers);
5274                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5275         } else {
5276                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5277                                          outer_headers);
5278                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5279                 /*
5280                  * This is workaround, masks are not supported,
5281                  * and pre-validated.
5282                  */
5283                 dev_flow->dv.vf_vlan.tag =
5284                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5285         }
5286         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5287         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5288         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5289         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5290         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5291         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5292         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5293         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5294         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5295         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5296         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5297                  rte_be_to_cpu_16(vlan_m->inner_type));
5298         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5299                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5300 }
5301
5302 /**
5303  * Add IPV4 item to matcher and to the value.
5304  *
5305  * @param[in, out] matcher
5306  *   Flow matcher.
5307  * @param[in, out] key
5308  *   Flow matcher value.
5309  * @param[in] item
5310  *   Flow pattern to translate.
5311  * @param[in] inner
5312  *   Item is inner pattern.
5313  * @param[in] group
5314  *   The group to insert the rule.
5315  */
5316 static void
5317 flow_dv_translate_item_ipv4(void *matcher, void *key,
5318                             const struct rte_flow_item *item,
5319                             int inner, uint32_t group)
5320 {
5321         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5322         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5323         const struct rte_flow_item_ipv4 nic_mask = {
5324                 .hdr = {
5325                         .src_addr = RTE_BE32(0xffffffff),
5326                         .dst_addr = RTE_BE32(0xffffffff),
5327                         .type_of_service = 0xff,
5328                         .next_proto_id = 0xff,
5329                 },
5330         };
5331         void *headers_m;
5332         void *headers_v;
5333         char *l24_m;
5334         char *l24_v;
5335         uint8_t tos;
5336
5337         if (inner) {
5338                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5339                                          inner_headers);
5340                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5341         } else {
5342                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5343                                          outer_headers);
5344                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5345         }
5346         if (group == 0)
5347                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5348         else
5349                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5350         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5351         if (!ipv4_v)
5352                 return;
5353         if (!ipv4_m)
5354                 ipv4_m = &nic_mask;
5355         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5356                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5357         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5358                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5359         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5360         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5361         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5362                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5363         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5364                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5365         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5366         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5367         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5368         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5369                  ipv4_m->hdr.type_of_service);
5370         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5371         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5372                  ipv4_m->hdr.type_of_service >> 2);
5373         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5374         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5375                  ipv4_m->hdr.next_proto_id);
5376         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5377                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5378 }
5379
5380 /**
5381  * Add IPV6 item to matcher and to the value.
5382  *
5383  * @param[in, out] matcher
5384  *   Flow matcher.
5385  * @param[in, out] key
5386  *   Flow matcher value.
5387  * @param[in] item
5388  *   Flow pattern to translate.
5389  * @param[in] inner
5390  *   Item is inner pattern.
5391  * @param[in] group
5392  *   The group to insert the rule.
5393  */
5394 static void
5395 flow_dv_translate_item_ipv6(void *matcher, void *key,
5396                             const struct rte_flow_item *item,
5397                             int inner, uint32_t group)
5398 {
5399         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5400         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5401         const struct rte_flow_item_ipv6 nic_mask = {
5402                 .hdr = {
5403                         .src_addr =
5404                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5405                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5406                         .dst_addr =
5407                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5408                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5409                         .vtc_flow = RTE_BE32(0xffffffff),
5410                         .proto = 0xff,
5411                         .hop_limits = 0xff,
5412                 },
5413         };
5414         void *headers_m;
5415         void *headers_v;
5416         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5417         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5418         char *l24_m;
5419         char *l24_v;
5420         uint32_t vtc_m;
5421         uint32_t vtc_v;
5422         int i;
5423         int size;
5424
5425         if (inner) {
5426                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5427                                          inner_headers);
5428                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5429         } else {
5430                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5431                                          outer_headers);
5432                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5433         }
5434         if (group == 0)
5435                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5436         else
5437                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5438         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5439         if (!ipv6_v)
5440                 return;
5441         if (!ipv6_m)
5442                 ipv6_m = &nic_mask;
5443         size = sizeof(ipv6_m->hdr.dst_addr);
5444         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5445                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5446         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5447                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5448         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5449         for (i = 0; i < size; ++i)
5450                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5451         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5452                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5453         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5454                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5455         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5456         for (i = 0; i < size; ++i)
5457                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5458         /* TOS. */
5459         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5460         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5461         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5462         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5463         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5464         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5465         /* Label. */
5466         if (inner) {
5467                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5468                          vtc_m);
5469                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5470                          vtc_v);
5471         } else {
5472                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5473                          vtc_m);
5474                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5475                          vtc_v);
5476         }
5477         /* Protocol. */
5478         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5479                  ipv6_m->hdr.proto);
5480         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5481                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5482 }
5483
5484 /**
5485  * Add TCP item to matcher and to the value.
5486  *
5487  * @param[in, out] matcher
5488  *   Flow matcher.
5489  * @param[in, out] key
5490  *   Flow matcher value.
5491  * @param[in] item
5492  *   Flow pattern to translate.
5493  * @param[in] inner
5494  *   Item is inner pattern.
5495  */
5496 static void
5497 flow_dv_translate_item_tcp(void *matcher, void *key,
5498                            const struct rte_flow_item *item,
5499                            int inner)
5500 {
5501         const struct rte_flow_item_tcp *tcp_m = item->mask;
5502         const struct rte_flow_item_tcp *tcp_v = item->spec;
5503         void *headers_m;
5504         void *headers_v;
5505
5506         if (inner) {
5507                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5508                                          inner_headers);
5509                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5510         } else {
5511                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5512                                          outer_headers);
5513                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5514         }
5515         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5516         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5517         if (!tcp_v)
5518                 return;
5519         if (!tcp_m)
5520                 tcp_m = &rte_flow_item_tcp_mask;
5521         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5522                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5523         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5524                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5525         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5526                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5527         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5528                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5529         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5530                  tcp_m->hdr.tcp_flags);
5531         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5532                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5533 }
5534
5535 /**
5536  * Add UDP item to matcher and to the value.
5537  *
5538  * @param[in, out] matcher
5539  *   Flow matcher.
5540  * @param[in, out] key
5541  *   Flow matcher value.
5542  * @param[in] item
5543  *   Flow pattern to translate.
5544  * @param[in] inner
5545  *   Item is inner pattern.
5546  */
5547 static void
5548 flow_dv_translate_item_udp(void *matcher, void *key,
5549                            const struct rte_flow_item *item,
5550                            int inner)
5551 {
5552         const struct rte_flow_item_udp *udp_m = item->mask;
5553         const struct rte_flow_item_udp *udp_v = item->spec;
5554         void *headers_m;
5555         void *headers_v;
5556
5557         if (inner) {
5558                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5559                                          inner_headers);
5560                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5561         } else {
5562                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5563                                          outer_headers);
5564                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5565         }
5566         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5567         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5568         if (!udp_v)
5569                 return;
5570         if (!udp_m)
5571                 udp_m = &rte_flow_item_udp_mask;
5572         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5573                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5574         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5575                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5576         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5577                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5578         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5579                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5580 }
5581
5582 /**
5583  * Add GRE optional Key item to matcher and to the value.
5584  *
5585  * @param[in, out] matcher
5586  *   Flow matcher.
5587  * @param[in, out] key
5588  *   Flow matcher value.
5589  * @param[in] item
5590  *   Flow pattern to translate.
5591  * @param[in] inner
5592  *   Item is inner pattern.
5593  */
5594 static void
5595 flow_dv_translate_item_gre_key(void *matcher, void *key,
5596                                    const struct rte_flow_item *item)
5597 {
5598         const rte_be32_t *key_m = item->mask;
5599         const rte_be32_t *key_v = item->spec;
5600         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5601         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5602         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5603
5604         if (!key_v)
5605                 return;
5606         if (!key_m)
5607                 key_m = &gre_key_default_mask;
5608         /* GRE K bit must be on and should already be validated */
5609         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5610         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5611         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5612                  rte_be_to_cpu_32(*key_m) >> 8);
5613         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5614                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5615         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5616                  rte_be_to_cpu_32(*key_m) & 0xFF);
5617         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5618                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5619 }
5620
5621 /**
5622  * Add GRE item to matcher and to the value.
5623  *
5624  * @param[in, out] matcher
5625  *   Flow matcher.
5626  * @param[in, out] key
5627  *   Flow matcher value.
5628  * @param[in] item
5629  *   Flow pattern to translate.
5630  * @param[in] inner
5631  *   Item is inner pattern.
5632  */
5633 static void
5634 flow_dv_translate_item_gre(void *matcher, void *key,
5635                            const struct rte_flow_item *item,
5636                            int inner)
5637 {
5638         const struct rte_flow_item_gre *gre_m = item->mask;
5639         const struct rte_flow_item_gre *gre_v = item->spec;
5640         void *headers_m;
5641         void *headers_v;
5642         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5643         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5644         struct {
5645                 union {
5646                         __extension__
5647                         struct {
5648                                 uint16_t version:3;
5649                                 uint16_t rsvd0:9;
5650                                 uint16_t s_present:1;
5651                                 uint16_t k_present:1;
5652                                 uint16_t rsvd_bit1:1;
5653                                 uint16_t c_present:1;
5654                         };
5655                         uint16_t value;
5656                 };
5657         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5658
5659         if (inner) {
5660                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5661                                          inner_headers);
5662                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5663         } else {
5664                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5665                                          outer_headers);
5666                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5667         }
5668         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5669         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5670         if (!gre_v)
5671                 return;
5672         if (!gre_m)
5673                 gre_m = &rte_flow_item_gre_mask;
5674         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5675                  rte_be_to_cpu_16(gre_m->protocol));
5676         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5677                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5678         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5679         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5680         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5681                  gre_crks_rsvd0_ver_m.c_present);
5682         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5683                  gre_crks_rsvd0_ver_v.c_present &
5684                  gre_crks_rsvd0_ver_m.c_present);
5685         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5686                  gre_crks_rsvd0_ver_m.k_present);
5687         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5688                  gre_crks_rsvd0_ver_v.k_present &
5689                  gre_crks_rsvd0_ver_m.k_present);
5690         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5691                  gre_crks_rsvd0_ver_m.s_present);
5692         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5693                  gre_crks_rsvd0_ver_v.s_present &
5694                  gre_crks_rsvd0_ver_m.s_present);
5695 }
5696
5697 /**
5698  * Add NVGRE item to matcher and to the value.
5699  *
5700  * @param[in, out] matcher
5701  *   Flow matcher.
5702  * @param[in, out] key
5703  *   Flow matcher value.
5704  * @param[in] item
5705  *   Flow pattern to translate.
5706  * @param[in] inner
5707  *   Item is inner pattern.
5708  */
5709 static void
5710 flow_dv_translate_item_nvgre(void *matcher, void *key,
5711                              const struct rte_flow_item *item,
5712                              int inner)
5713 {
5714         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5715         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5716         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5717         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5718         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5719         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5720         char *gre_key_m;
5721         char *gre_key_v;
5722         int size;
5723         int i;
5724
5725         /* For NVGRE, GRE header fields must be set with defined values. */
5726         const struct rte_flow_item_gre gre_spec = {
5727                 .c_rsvd0_ver = RTE_BE16(0x2000),
5728                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5729         };
5730         const struct rte_flow_item_gre gre_mask = {
5731                 .c_rsvd0_ver = RTE_BE16(0xB000),
5732                 .protocol = RTE_BE16(UINT16_MAX),
5733         };
5734         const struct rte_flow_item gre_item = {
5735                 .spec = &gre_spec,
5736                 .mask = &gre_mask,
5737                 .last = NULL,
5738         };
5739         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5740         if (!nvgre_v)
5741                 return;
5742         if (!nvgre_m)
5743                 nvgre_m = &rte_flow_item_nvgre_mask;
5744         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5745         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5746         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5747         memcpy(gre_key_m, tni_flow_id_m, size);
5748         for (i = 0; i < size; ++i)
5749                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5750 }
5751
5752 /**
5753  * Add VXLAN item to matcher and to the value.
5754  *
5755  * @param[in, out] matcher
5756  *   Flow matcher.
5757  * @param[in, out] key
5758  *   Flow matcher value.
5759  * @param[in] item
5760  *   Flow pattern to translate.
5761  * @param[in] inner
5762  *   Item is inner pattern.
5763  */
5764 static void
5765 flow_dv_translate_item_vxlan(void *matcher, void *key,
5766                              const struct rte_flow_item *item,
5767                              int inner)
5768 {
5769         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5770         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5771         void *headers_m;
5772         void *headers_v;
5773         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5774         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5775         char *vni_m;
5776         char *vni_v;
5777         uint16_t dport;
5778         int size;
5779         int i;
5780
5781         if (inner) {
5782                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5783                                          inner_headers);
5784                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5785         } else {
5786                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5787                                          outer_headers);
5788                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5789         }
5790         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5791                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5792         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5793                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5794                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5795         }
5796         if (!vxlan_v)
5797                 return;
5798         if (!vxlan_m)
5799                 vxlan_m = &rte_flow_item_vxlan_mask;
5800         size = sizeof(vxlan_m->vni);
5801         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5802         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5803         memcpy(vni_m, vxlan_m->vni, size);
5804         for (i = 0; i < size; ++i)
5805                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5806 }
5807
5808 /**
5809  * Add Geneve item to matcher and to the value.
5810  *
5811  * @param[in, out] matcher
5812  *   Flow matcher.
5813  * @param[in, out] key
5814  *   Flow matcher value.
5815  * @param[in] item
5816  *   Flow pattern to translate.
5817  * @param[in] inner
5818  *   Item is inner pattern.
5819  */
5820
5821 static void
5822 flow_dv_translate_item_geneve(void *matcher, void *key,
5823                               const struct rte_flow_item *item, int inner)
5824 {
5825         const struct rte_flow_item_geneve *geneve_m = item->mask;
5826         const struct rte_flow_item_geneve *geneve_v = item->spec;
5827         void *headers_m;
5828         void *headers_v;
5829         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5830         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5831         uint16_t dport;
5832         uint16_t gbhdr_m;
5833         uint16_t gbhdr_v;
5834         char *vni_m;
5835         char *vni_v;
5836         size_t size, i;
5837
5838         if (inner) {
5839                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5840                                          inner_headers);
5841                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5842         } else {
5843                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5844                                          outer_headers);
5845                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5846         }
5847         dport = MLX5_UDP_PORT_GENEVE;
5848         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5849                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5850                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5851         }
5852         if (!geneve_v)
5853                 return;
5854         if (!geneve_m)
5855                 geneve_m = &rte_flow_item_geneve_mask;
5856         size = sizeof(geneve_m->vni);
5857         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5858         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5859         memcpy(vni_m, geneve_m->vni, size);
5860         for (i = 0; i < size; ++i)
5861                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5862         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5863                  rte_be_to_cpu_16(geneve_m->protocol));
5864         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5865                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5866         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5867         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5868         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5869                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5870         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5871                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5872         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5873                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5874         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5875                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5876                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5877 }
5878
5879 /**
5880  * Add MPLS item to matcher and to the value.
5881  *
5882  * @param[in, out] matcher
5883  *   Flow matcher.
5884  * @param[in, out] key
5885  *   Flow matcher value.
5886  * @param[in] item
5887  *   Flow pattern to translate.
5888  * @param[in] prev_layer
5889  *   The protocol layer indicated in previous item.
5890  * @param[in] inner
5891  *   Item is inner pattern.
5892  */
5893 static void
5894 flow_dv_translate_item_mpls(void *matcher, void *key,
5895                             const struct rte_flow_item *item,
5896                             uint64_t prev_layer,
5897                             int inner)
5898 {
5899         const uint32_t *in_mpls_m = item->mask;
5900         const uint32_t *in_mpls_v = item->spec;
5901         uint32_t *out_mpls_m = 0;
5902         uint32_t *out_mpls_v = 0;
5903         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5904         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5905         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5906                                      misc_parameters_2);
5907         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5908         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5909         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5910
5911         switch (prev_layer) {
5912         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5913                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5914                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5915                          MLX5_UDP_PORT_MPLS);
5916                 break;
5917         case MLX5_FLOW_LAYER_GRE:
5918                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5919                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5920                          RTE_ETHER_TYPE_MPLS);
5921                 break;
5922         default:
5923                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5924                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5925                          IPPROTO_MPLS);
5926                 break;
5927         }
5928         if (!in_mpls_v)
5929                 return;
5930         if (!in_mpls_m)
5931                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5932         switch (prev_layer) {
5933         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5934                 out_mpls_m =
5935                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5936                                                  outer_first_mpls_over_udp);
5937                 out_mpls_v =
5938                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5939                                                  outer_first_mpls_over_udp);
5940                 break;
5941         case MLX5_FLOW_LAYER_GRE:
5942                 out_mpls_m =
5943                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5944                                                  outer_first_mpls_over_gre);
5945                 out_mpls_v =
5946                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5947                                                  outer_first_mpls_over_gre);
5948                 break;
5949         default:
5950                 /* Inner MPLS not over GRE is not supported. */
5951                 if (!inner) {
5952                         out_mpls_m =
5953                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5954                                                          misc2_m,
5955                                                          outer_first_mpls);
5956                         out_mpls_v =
5957                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5958                                                          misc2_v,
5959                                                          outer_first_mpls);
5960                 }
5961                 break;
5962         }
5963         if (out_mpls_m && out_mpls_v) {
5964                 *out_mpls_m = *in_mpls_m;
5965                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5966         }
5967 }
5968
5969 /**
5970  * Add metadata register item to matcher
5971  *
5972  * @param[in, out] matcher
5973  *   Flow matcher.
5974  * @param[in, out] key
5975  *   Flow matcher value.
5976  * @param[in] reg_type
5977  *   Type of device metadata register
5978  * @param[in] value
5979  *   Register value
5980  * @param[in] mask
5981  *   Register mask
5982  */
5983 static void
5984 flow_dv_match_meta_reg(void *matcher, void *key,
5985                        enum modify_reg reg_type,
5986                        uint32_t data, uint32_t mask)
5987 {
5988         void *misc2_m =
5989                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5990         void *misc2_v =
5991                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5992         uint32_t temp;
5993
5994         data &= mask;
5995         switch (reg_type) {
5996         case REG_A:
5997                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5998                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5999                 break;
6000         case REG_B:
6001                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
6002                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
6003                 break;
6004         case REG_C_0:
6005                 /*
6006                  * The metadata register C0 field might be divided into
6007                  * source vport index and META item value, we should set
6008                  * this field according to specified mask, not as whole one.
6009                  */
6010                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
6011                 temp |= mask;
6012                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
6013                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
6014                 temp &= ~mask;
6015                 temp |= data;
6016                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
6017                 break;
6018         case REG_C_1:
6019                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
6020                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
6021                 break;
6022         case REG_C_2:
6023                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
6024                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
6025                 break;
6026         case REG_C_3:
6027                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6028                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6029                 break;
6030         case REG_C_4:
6031                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6032                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6033                 break;
6034         case REG_C_5:
6035                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6036                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6037                 break;
6038         case REG_C_6:
6039                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6040                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6041                 break;
6042         case REG_C_7:
6043                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6044                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6045                 break;
6046         default:
6047                 assert(false);
6048                 break;
6049         }
6050 }
6051
6052 /**
6053  * Add MARK item to matcher
6054  *
6055  * @param[in] dev
6056  *   The device to configure through.
6057  * @param[in, out] matcher
6058  *   Flow matcher.
6059  * @param[in, out] key
6060  *   Flow matcher value.
6061  * @param[in] item
6062  *   Flow pattern to translate.
6063  */
6064 static void
6065 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6066                             void *matcher, void *key,
6067                             const struct rte_flow_item *item)
6068 {
6069         struct mlx5_priv *priv = dev->data->dev_private;
6070         const struct rte_flow_item_mark *mark;
6071         uint32_t value;
6072         uint32_t mask;
6073
6074         mark = item->mask ? (const void *)item->mask :
6075                             &rte_flow_item_mark_mask;
6076         mask = mark->id & priv->sh->dv_mark_mask;
6077         mark = (const void *)item->spec;
6078         assert(mark);
6079         value = mark->id & priv->sh->dv_mark_mask & mask;
6080         if (mask) {
6081                 enum modify_reg reg;
6082
6083                 /* Get the metadata register index for the mark. */
6084                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6085                 assert(reg > 0);
6086                 if (reg == REG_C_0) {
6087                         struct mlx5_priv *priv = dev->data->dev_private;
6088                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6089                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6090
6091                         mask &= msk_c0;
6092                         mask <<= shl_c0;
6093                         value <<= shl_c0;
6094                 }
6095                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6096         }
6097 }
6098
6099 /**
6100  * Add META item to matcher
6101  *
6102  * @param[in] dev
6103  *   The devich to configure through.
6104  * @param[in, out] matcher
6105  *   Flow matcher.
6106  * @param[in, out] key
6107  *   Flow matcher value.
6108  * @param[in] attr
6109  *   Attributes of flow that includes this item.
6110  * @param[in] item
6111  *   Flow pattern to translate.
6112  */
6113 static void
6114 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6115                             void *matcher, void *key,
6116                             const struct rte_flow_attr *attr,
6117                             const struct rte_flow_item *item)
6118 {
6119         const struct rte_flow_item_meta *meta_m;
6120         const struct rte_flow_item_meta *meta_v;
6121
6122         meta_m = (const void *)item->mask;
6123         if (!meta_m)
6124                 meta_m = &rte_flow_item_meta_mask;
6125         meta_v = (const void *)item->spec;
6126         if (meta_v) {
6127                 enum modify_reg reg;
6128                 uint32_t value = meta_v->data;
6129                 uint32_t mask = meta_m->data;
6130
6131                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6132                 if (reg < 0)
6133                         return;
6134                 /*
6135                  * In datapath code there is no endianness
6136                  * coversions for perfromance reasons, all
6137                  * pattern conversions are done in rte_flow.
6138                  */
6139                 value = rte_cpu_to_be_32(value);
6140                 mask = rte_cpu_to_be_32(mask);
6141                 if (reg == REG_C_0) {
6142                         struct mlx5_priv *priv = dev->data->dev_private;
6143                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6144                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6145 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6146                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6147
6148                         value >>= shr_c0;
6149                         mask >>= shr_c0;
6150 #endif
6151                         value <<= shl_c0;
6152                         mask <<= shl_c0;
6153                         assert(msk_c0);
6154                         assert(!(~msk_c0 & mask));
6155                 }
6156                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6157         }
6158 }
6159
6160 /**
6161  * Add vport metadata Reg C0 item to matcher
6162  *
6163  * @param[in, out] matcher
6164  *   Flow matcher.
6165  * @param[in, out] key
6166  *   Flow matcher value.
6167  * @param[in] reg
6168  *   Flow pattern to translate.
6169  */
6170 static void
6171 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6172                                   uint32_t value, uint32_t mask)
6173 {
6174         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6175 }
6176
6177 /**
6178  * Add tag item to matcher
6179  *
6180  * @param[in] dev
6181  *   The devich to configure through.
6182  * @param[in, out] matcher
6183  *   Flow matcher.
6184  * @param[in, out] key
6185  *   Flow matcher value.
6186  * @param[in] item
6187  *   Flow pattern to translate.
6188  */
6189 static void
6190 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6191                                 void *matcher, void *key,
6192                                 const struct rte_flow_item *item)
6193 {
6194         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6195         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6196         uint32_t mask, value;
6197
6198         assert(tag_v);
6199         value = tag_v->data;
6200         mask = tag_m ? tag_m->data : UINT32_MAX;
6201         if (tag_v->id == REG_C_0) {
6202                 struct mlx5_priv *priv = dev->data->dev_private;
6203                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6204                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6205
6206                 mask &= msk_c0;
6207                 mask <<= shl_c0;
6208                 value <<= shl_c0;
6209         }
6210         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6211 }
6212
6213 /**
6214  * Add TAG item to matcher
6215  *
6216  * @param[in] dev
6217  *   The devich to configure through.
6218  * @param[in, out] matcher
6219  *   Flow matcher.
6220  * @param[in, out] key
6221  *   Flow matcher value.
6222  * @param[in] item
6223  *   Flow pattern to translate.
6224  */
6225 static void
6226 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6227                            void *matcher, void *key,
6228                            const struct rte_flow_item *item)
6229 {
6230         const struct rte_flow_item_tag *tag_v = item->spec;
6231         const struct rte_flow_item_tag *tag_m = item->mask;
6232         enum modify_reg reg;
6233
6234         assert(tag_v);
6235         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6236         /* Get the metadata register index for the tag. */
6237         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6238         assert(reg > 0);
6239         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6240 }
6241
6242 /**
6243  * Add source vport match to the specified matcher.
6244  *
6245  * @param[in, out] matcher
6246  *   Flow matcher.
6247  * @param[in, out] key
6248  *   Flow matcher value.
6249  * @param[in] port
6250  *   Source vport value to match
6251  * @param[in] mask
6252  *   Mask
6253  */
6254 static void
6255 flow_dv_translate_item_source_vport(void *matcher, void *key,
6256                                     int16_t port, uint16_t mask)
6257 {
6258         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6259         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6260
6261         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6262         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6263 }
6264
6265 /**
6266  * Translate port-id item to eswitch match on  port-id.
6267  *
6268  * @param[in] dev
6269  *   The devich to configure through.
6270  * @param[in, out] matcher
6271  *   Flow matcher.
6272  * @param[in, out] key
6273  *   Flow matcher value.
6274  * @param[in] item
6275  *   Flow pattern to translate.
6276  *
6277  * @return
6278  *   0 on success, a negative errno value otherwise.
6279  */
6280 static int
6281 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6282                                void *key, const struct rte_flow_item *item)
6283 {
6284         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6285         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6286         struct mlx5_priv *priv;
6287         uint16_t mask, id;
6288
6289         mask = pid_m ? pid_m->id : 0xffff;
6290         id = pid_v ? pid_v->id : dev->data->port_id;
6291         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6292         if (!priv)
6293                 return -rte_errno;
6294         /* Translate to vport field or to metadata, depending on mode. */
6295         if (priv->vport_meta_mask)
6296                 flow_dv_translate_item_meta_vport(matcher, key,
6297                                                   priv->vport_meta_tag,
6298                                                   priv->vport_meta_mask);
6299         else
6300                 flow_dv_translate_item_source_vport(matcher, key,
6301                                                     priv->vport_id, mask);
6302         return 0;
6303 }
6304
6305 /**
6306  * Add ICMP6 item to matcher and to the value.
6307  *
6308  * @param[in, out] matcher
6309  *   Flow matcher.
6310  * @param[in, out] key
6311  *   Flow matcher value.
6312  * @param[in] item
6313  *   Flow pattern to translate.
6314  * @param[in] inner
6315  *   Item is inner pattern.
6316  */
6317 static void
6318 flow_dv_translate_item_icmp6(void *matcher, void *key,
6319                               const struct rte_flow_item *item,
6320                               int inner)
6321 {
6322         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6323         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6324         void *headers_m;
6325         void *headers_v;
6326         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6327                                      misc_parameters_3);
6328         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6329         if (inner) {
6330                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6331                                          inner_headers);
6332                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6333         } else {
6334                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6335                                          outer_headers);
6336                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6337         }
6338         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6339         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6340         if (!icmp6_v)
6341                 return;
6342         if (!icmp6_m)
6343                 icmp6_m = &rte_flow_item_icmp6_mask;
6344         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6345         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6346                  icmp6_v->type & icmp6_m->type);
6347         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6348         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6349                  icmp6_v->code & icmp6_m->code);
6350 }
6351
6352 /**
6353  * Add ICMP item to matcher and to the value.
6354  *
6355  * @param[in, out] matcher
6356  *   Flow matcher.
6357  * @param[in, out] key
6358  *   Flow matcher value.
6359  * @param[in] item
6360  *   Flow pattern to translate.
6361  * @param[in] inner
6362  *   Item is inner pattern.
6363  */
6364 static void
6365 flow_dv_translate_item_icmp(void *matcher, void *key,
6366                             const struct rte_flow_item *item,
6367                             int inner)
6368 {
6369         const struct rte_flow_item_icmp *icmp_m = item->mask;
6370         const struct rte_flow_item_icmp *icmp_v = item->spec;
6371         void *headers_m;
6372         void *headers_v;
6373         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6374                                      misc_parameters_3);
6375         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6376         if (inner) {
6377                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6378                                          inner_headers);
6379                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6380         } else {
6381                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6382                                          outer_headers);
6383                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6384         }
6385         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6386         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6387         if (!icmp_v)
6388                 return;
6389         if (!icmp_m)
6390                 icmp_m = &rte_flow_item_icmp_mask;
6391         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6392                  icmp_m->hdr.icmp_type);
6393         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6394                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6395         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6396                  icmp_m->hdr.icmp_code);
6397         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6398                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6399 }
6400
6401 /**
6402  * Add GTP item to matcher and to the value.
6403  *
6404  * @param[in, out] matcher
6405  *   Flow matcher.
6406  * @param[in, out] key
6407  *   Flow matcher value.
6408  * @param[in] item
6409  *   Flow pattern to translate.
6410  * @param[in] inner
6411  *   Item is inner pattern.
6412  */
6413 static void
6414 flow_dv_translate_item_gtp(void *matcher, void *key,
6415                            const struct rte_flow_item *item, int inner)
6416 {
6417         const struct rte_flow_item_gtp *gtp_m = item->mask;
6418         const struct rte_flow_item_gtp *gtp_v = item->spec;
6419         void *headers_m;
6420         void *headers_v;
6421         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6422                                      misc_parameters_3);
6423         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6424         uint16_t dport = RTE_GTPU_UDP_PORT;
6425
6426         if (inner) {
6427                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6428                                          inner_headers);
6429                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6430         } else {
6431                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6432                                          outer_headers);
6433                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6434         }
6435         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6436                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6437                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6438         }
6439         if (!gtp_v)
6440                 return;
6441         if (!gtp_m)
6442                 gtp_m = &rte_flow_item_gtp_mask;
6443         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6444         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6445                  gtp_v->msg_type & gtp_m->msg_type);
6446         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6447                  rte_be_to_cpu_32(gtp_m->teid));
6448         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6449                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6450 }
6451
6452 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6453
6454 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6455         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6456                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6457
6458 /**
6459  * Calculate flow matcher enable bitmap.
6460  *
6461  * @param match_criteria
6462  *   Pointer to flow matcher criteria.
6463  *
6464  * @return
6465  *   Bitmap of enabled fields.
6466  */
6467 static uint8_t
6468 flow_dv_matcher_enable(uint32_t *match_criteria)
6469 {
6470         uint8_t match_criteria_enable;
6471
6472         match_criteria_enable =
6473                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6474                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6475         match_criteria_enable |=
6476                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6477                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6478         match_criteria_enable |=
6479                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6480                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6481         match_criteria_enable |=
6482                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6483                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6484         match_criteria_enable |=
6485                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6486                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6487         return match_criteria_enable;
6488 }
6489
6490
6491 /**
6492  * Get a flow table.
6493  *
6494  * @param[in, out] dev
6495  *   Pointer to rte_eth_dev structure.
6496  * @param[in] table_id
6497  *   Table id to use.
6498  * @param[in] egress
6499  *   Direction of the table.
6500  * @param[in] transfer
6501  *   E-Switch or NIC flow.
6502  * @param[out] error
6503  *   pointer to error structure.
6504  *
6505  * @return
6506  *   Returns tables resource based on the index, NULL in case of failed.
6507  */
6508 static struct mlx5_flow_tbl_resource *
6509 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6510                          uint32_t table_id, uint8_t egress,
6511                          uint8_t transfer,
6512                          struct rte_flow_error *error)
6513 {
6514         struct mlx5_priv *priv = dev->data->dev_private;
6515         struct mlx5_ibv_shared *sh = priv->sh;
6516         struct mlx5_flow_tbl_resource *tbl;
6517         union mlx5_flow_tbl_key table_key = {
6518                 {
6519                         .table_id = table_id,
6520                         .reserved = 0,
6521                         .domain = !!transfer,
6522                         .direction = !!egress,
6523                 }
6524         };
6525         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6526                                                          table_key.v64);
6527         struct mlx5_flow_tbl_data_entry *tbl_data;
6528         int ret;
6529         void *domain;
6530
6531         if (pos) {
6532                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6533                                         entry);
6534                 tbl = &tbl_data->tbl;
6535                 rte_atomic32_inc(&tbl->refcnt);
6536                 return tbl;
6537         }
6538         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6539         if (!tbl_data) {
6540                 rte_flow_error_set(error, ENOMEM,
6541                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6542                                    NULL,
6543                                    "cannot allocate flow table data entry");
6544                 return NULL;
6545         }
6546         tbl = &tbl_data->tbl;
6547         pos = &tbl_data->entry;
6548         if (transfer)
6549                 domain = sh->fdb_domain;
6550         else if (egress)
6551                 domain = sh->tx_domain;
6552         else
6553                 domain = sh->rx_domain;
6554         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6555         if (!tbl->obj) {
6556                 rte_flow_error_set(error, ENOMEM,
6557                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6558                                    NULL, "cannot create flow table object");
6559                 rte_free(tbl_data);
6560                 return NULL;
6561         }
6562         /*
6563          * No multi-threads now, but still better to initialize the reference
6564          * count before insert it into the hash list.
6565          */
6566         rte_atomic32_init(&tbl->refcnt);
6567         /* Jump action reference count is initialized here. */
6568         rte_atomic32_init(&tbl_data->jump.refcnt);
6569         pos->key = table_key.v64;
6570         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6571         if (ret < 0) {
6572                 rte_flow_error_set(error, -ret,
6573                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6574                                    "cannot insert flow table data entry");
6575                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6576                 rte_free(tbl_data);
6577         }
6578         rte_atomic32_inc(&tbl->refcnt);
6579         return tbl;
6580 }
6581
6582 /**
6583  * Release a flow table.
6584  *
6585  * @param[in] dev
6586  *   Pointer to rte_eth_dev structure.
6587  * @param[in] tbl
6588  *   Table resource to be released.
6589  *
6590  * @return
6591  *   Returns 0 if table was released, else return 1;
6592  */
6593 static int
6594 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6595                              struct mlx5_flow_tbl_resource *tbl)
6596 {
6597         struct mlx5_priv *priv = dev->data->dev_private;
6598         struct mlx5_ibv_shared *sh = priv->sh;
6599         struct mlx5_flow_tbl_data_entry *tbl_data =
6600                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6601
6602         if (!tbl)
6603                 return 0;
6604         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6605                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6606
6607                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6608                 tbl->obj = NULL;
6609                 /* remove the entry from the hash list and free memory. */
6610                 mlx5_hlist_remove(sh->flow_tbls, pos);
6611                 rte_free(tbl_data);
6612                 return 0;
6613         }
6614         return 1;
6615 }
6616
6617 /**
6618  * Register the flow matcher.
6619  *
6620  * @param[in, out] dev
6621  *   Pointer to rte_eth_dev structure.
6622  * @param[in, out] matcher
6623  *   Pointer to flow matcher.
6624  * @param[in, out] key
6625  *   Pointer to flow table key.
6626  * @parm[in, out] dev_flow
6627  *   Pointer to the dev_flow.
6628  * @param[out] error
6629  *   pointer to error structure.
6630  *
6631  * @return
6632  *   0 on success otherwise -errno and errno is set.
6633  */
6634 static int
6635 flow_dv_matcher_register(struct rte_eth_dev *dev,
6636                          struct mlx5_flow_dv_matcher *matcher,
6637                          union mlx5_flow_tbl_key *key,
6638                          struct mlx5_flow *dev_flow,
6639                          struct rte_flow_error *error)
6640 {
6641         struct mlx5_priv *priv = dev->data->dev_private;
6642         struct mlx5_ibv_shared *sh = priv->sh;
6643         struct mlx5_flow_dv_matcher *cache_matcher;
6644         struct mlx5dv_flow_matcher_attr dv_attr = {
6645                 .type = IBV_FLOW_ATTR_NORMAL,
6646                 .match_mask = (void *)&matcher->mask,
6647         };
6648         struct mlx5_flow_tbl_resource *tbl;
6649         struct mlx5_flow_tbl_data_entry *tbl_data;
6650
6651         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6652                                        key->domain, error);
6653         if (!tbl)
6654                 return -rte_errno;      /* No need to refill the error info */
6655         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6656         /* Lookup from cache. */
6657         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6658                 if (matcher->crc == cache_matcher->crc &&
6659                     matcher->priority == cache_matcher->priority &&
6660                     !memcmp((const void *)matcher->mask.buf,
6661                             (const void *)cache_matcher->mask.buf,
6662                             cache_matcher->mask.size)) {
6663                         DRV_LOG(DEBUG,
6664                                 "%s group %u priority %hd use %s "
6665                                 "matcher %p: refcnt %d++",
6666                                 key->domain ? "FDB" : "NIC", key->table_id,
6667                                 cache_matcher->priority,
6668                                 key->direction ? "tx" : "rx",
6669                                 (void *)cache_matcher,
6670                                 rte_atomic32_read(&cache_matcher->refcnt));
6671                         rte_atomic32_inc(&cache_matcher->refcnt);
6672                         dev_flow->dv.matcher = cache_matcher;
6673                         /* old matcher should not make the table ref++. */
6674                         flow_dv_tbl_resource_release(dev, tbl);
6675                         return 0;
6676                 }
6677         }
6678         /* Register new matcher. */
6679         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6680         if (!cache_matcher) {
6681                 flow_dv_tbl_resource_release(dev, tbl);
6682                 return rte_flow_error_set(error, ENOMEM,
6683                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6684                                           "cannot allocate matcher memory");
6685         }
6686         *cache_matcher = *matcher;
6687         dv_attr.match_criteria_enable =
6688                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6689         dv_attr.priority = matcher->priority;
6690         if (key->direction)
6691                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6692         cache_matcher->matcher_object =
6693                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6694         if (!cache_matcher->matcher_object) {
6695                 rte_free(cache_matcher);
6696 #ifdef HAVE_MLX5DV_DR
6697                 flow_dv_tbl_resource_release(dev, tbl);
6698 #endif
6699                 return rte_flow_error_set(error, ENOMEM,
6700                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6701                                           NULL, "cannot create matcher");
6702         }
6703         /* Save the table information */
6704         cache_matcher->tbl = tbl;
6705         rte_atomic32_init(&cache_matcher->refcnt);
6706         /* only matcher ref++, table ref++ already done above in get API. */
6707         rte_atomic32_inc(&cache_matcher->refcnt);
6708         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6709         dev_flow->dv.matcher = cache_matcher;
6710         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6711                 key->domain ? "FDB" : "NIC", key->table_id,
6712                 cache_matcher->priority,
6713                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6714                 rte_atomic32_read(&cache_matcher->refcnt));
6715         return 0;
6716 }
6717
6718 /**
6719  * Find existing tag resource or create and register a new one.
6720  *
6721  * @param dev[in, out]
6722  *   Pointer to rte_eth_dev structure.
6723  * @param[in, out] tag_be24
6724  *   Tag value in big endian then R-shift 8.
6725  * @parm[in, out] dev_flow
6726  *   Pointer to the dev_flow.
6727  * @param[out] error
6728  *   pointer to error structure.
6729  *
6730  * @return
6731  *   0 on success otherwise -errno and errno is set.
6732  */
6733 static int
6734 flow_dv_tag_resource_register
6735                         (struct rte_eth_dev *dev,
6736                          uint32_t tag_be24,
6737                          struct mlx5_flow *dev_flow,
6738                          struct rte_flow_error *error)
6739 {
6740         struct mlx5_priv *priv = dev->data->dev_private;
6741         struct mlx5_ibv_shared *sh = priv->sh;
6742         struct mlx5_flow_dv_tag_resource *cache_resource;
6743         struct mlx5_hlist_entry *entry;
6744
6745         /* Lookup a matching resource from cache. */
6746         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6747         if (entry) {
6748                 cache_resource = container_of
6749                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6750                 rte_atomic32_inc(&cache_resource->refcnt);
6751                 dev_flow->dv.tag_resource = cache_resource;
6752                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6753                         (void *)cache_resource,
6754                         rte_atomic32_read(&cache_resource->refcnt));
6755                 return 0;
6756         }
6757         /* Register new resource. */
6758         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6759         if (!cache_resource)
6760                 return rte_flow_error_set(error, ENOMEM,
6761                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6762                                           "cannot allocate resource memory");
6763         cache_resource->entry.key = (uint64_t)tag_be24;
6764         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6765         if (!cache_resource->action) {
6766                 rte_free(cache_resource);
6767                 return rte_flow_error_set(error, ENOMEM,
6768                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6769                                           NULL, "cannot create action");
6770         }
6771         rte_atomic32_init(&cache_resource->refcnt);
6772         rte_atomic32_inc(&cache_resource->refcnt);
6773         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6774                 mlx5_glue->destroy_flow_action(cache_resource->action);
6775                 rte_free(cache_resource);
6776                 return rte_flow_error_set(error, EEXIST,
6777                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6778                                           NULL, "cannot insert tag");
6779         }
6780         dev_flow->dv.tag_resource = cache_resource;
6781         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6782                 (void *)cache_resource,
6783                 rte_atomic32_read(&cache_resource->refcnt));
6784         return 0;
6785 }
6786
6787 /**
6788  * Release the tag.
6789  *
6790  * @param dev
6791  *   Pointer to Ethernet device.
6792  * @param flow
6793  *   Pointer to mlx5_flow.
6794  *
6795  * @return
6796  *   1 while a reference on it exists, 0 when freed.
6797  */
6798 static int
6799 flow_dv_tag_release(struct rte_eth_dev *dev,
6800                     struct mlx5_flow_dv_tag_resource *tag)
6801 {
6802         struct mlx5_priv *priv = dev->data->dev_private;
6803         struct mlx5_ibv_shared *sh = priv->sh;
6804
6805         assert(tag);
6806         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6807                 dev->data->port_id, (void *)tag,
6808                 rte_atomic32_read(&tag->refcnt));
6809         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6810                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6811                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6812                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6813                         dev->data->port_id, (void *)tag);
6814                 rte_free(tag);
6815                 return 0;
6816         }
6817         return 1;
6818 }
6819
6820 /**
6821  * Translate port ID action to vport.
6822  *
6823  * @param[in] dev
6824  *   Pointer to rte_eth_dev structure.
6825  * @param[in] action
6826  *   Pointer to the port ID action.
6827  * @param[out] dst_port_id
6828  *   The target port ID.
6829  * @param[out] error
6830  *   Pointer to the error structure.
6831  *
6832  * @return
6833  *   0 on success, a negative errno value otherwise and rte_errno is set.
6834  */
6835 static int
6836 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6837                                  const struct rte_flow_action *action,
6838                                  uint32_t *dst_port_id,
6839                                  struct rte_flow_error *error)
6840 {
6841         uint32_t port;
6842         struct mlx5_priv *priv;
6843         const struct rte_flow_action_port_id *conf =
6844                         (const struct rte_flow_action_port_id *)action->conf;
6845
6846         port = conf->original ? dev->data->port_id : conf->id;
6847         priv = mlx5_port_to_eswitch_info(port, false);
6848         if (!priv)
6849                 return rte_flow_error_set(error, -rte_errno,
6850                                           RTE_FLOW_ERROR_TYPE_ACTION,
6851                                           NULL,
6852                                           "No eswitch info was found for port");
6853 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6854         /*
6855          * This parameter is transferred to
6856          * mlx5dv_dr_action_create_dest_ib_port().
6857          */
6858         *dst_port_id = priv->ibv_port;
6859 #else
6860         /*
6861          * Legacy mode, no LAG configurations is supported.
6862          * This parameter is transferred to
6863          * mlx5dv_dr_action_create_dest_vport().
6864          */
6865         *dst_port_id = priv->vport_id;
6866 #endif
6867         return 0;
6868 }
6869
6870 /**
6871  * Add Tx queue matcher
6872  *
6873  * @param[in] dev
6874  *   Pointer to the dev struct.
6875  * @param[in, out] matcher
6876  *   Flow matcher.
6877  * @param[in, out] key
6878  *   Flow matcher value.
6879  * @param[in] item
6880  *   Flow pattern to translate.
6881  * @param[in] inner
6882  *   Item is inner pattern.
6883  */
6884 static void
6885 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6886                                 void *matcher, void *key,
6887                                 const struct rte_flow_item *item)
6888 {
6889         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6890         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6891         void *misc_m =
6892                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6893         void *misc_v =
6894                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6895         struct mlx5_txq_ctrl *txq;
6896         uint32_t queue;
6897
6898
6899         queue_m = (const void *)item->mask;
6900         if (!queue_m)
6901                 return;
6902         queue_v = (const void *)item->spec;
6903         if (!queue_v)
6904                 return;
6905         txq = mlx5_txq_get(dev, queue_v->queue);
6906         if (!txq)
6907                 return;
6908         queue = txq->obj->sq->id;
6909         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6910         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6911                  queue & queue_m->queue);
6912         mlx5_txq_release(dev, queue_v->queue);
6913 }
6914
6915 /**
6916  * Set the hash fields according to the @p flow information.
6917  *
6918  * @param[in] dev_flow
6919  *   Pointer to the mlx5_flow.
6920  */
6921 static void
6922 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6923 {
6924         struct rte_flow *flow = dev_flow->flow;
6925         uint64_t items = dev_flow->layers;
6926         int rss_inner = 0;
6927         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6928
6929         dev_flow->hash_fields = 0;
6930 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6931         if (flow->rss.level >= 2) {
6932                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6933                 rss_inner = 1;
6934         }
6935 #endif
6936         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6937             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6938                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6939                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6940                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6941                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6942                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6943                         else
6944                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6945                 }
6946         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6947                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6948                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6949                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6950                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
6951                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6952                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
6953                         else
6954                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
6955                 }
6956         }
6957         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
6958             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
6959                 if (rss_types & ETH_RSS_UDP) {
6960                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6961                                 dev_flow->hash_fields |=
6962                                                 IBV_RX_HASH_SRC_PORT_UDP;
6963                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6964                                 dev_flow->hash_fields |=
6965                                                 IBV_RX_HASH_DST_PORT_UDP;
6966                         else
6967                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
6968                 }
6969         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
6970                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
6971                 if (rss_types & ETH_RSS_TCP) {
6972                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6973                                 dev_flow->hash_fields |=
6974                                                 IBV_RX_HASH_SRC_PORT_TCP;
6975                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6976                                 dev_flow->hash_fields |=
6977                                                 IBV_RX_HASH_DST_PORT_TCP;
6978                         else
6979                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
6980                 }
6981         }
6982 }
6983
6984 /**
6985  * Fill the flow with DV spec, lock free
6986  * (mutex should be acquired by caller).
6987  *
6988  * @param[in] dev
6989  *   Pointer to rte_eth_dev structure.
6990  * @param[in, out] dev_flow
6991  *   Pointer to the sub flow.
6992  * @param[in] attr
6993  *   Pointer to the flow attributes.
6994  * @param[in] items
6995  *   Pointer to the list of items.
6996  * @param[in] actions
6997  *   Pointer to the list of actions.
6998  * @param[out] error
6999  *   Pointer to the error structure.
7000  *
7001  * @return
7002  *   0 on success, a negative errno value otherwise and rte_errno is set.
7003  */
7004 static int
7005 __flow_dv_translate(struct rte_eth_dev *dev,
7006                     struct mlx5_flow *dev_flow,
7007                     const struct rte_flow_attr *attr,
7008                     const struct rte_flow_item items[],
7009                     const struct rte_flow_action actions[],
7010                     struct rte_flow_error *error)
7011 {
7012         struct mlx5_priv *priv = dev->data->dev_private;
7013         struct mlx5_dev_config *dev_conf = &priv->config;
7014         struct rte_flow *flow = dev_flow->flow;
7015         uint64_t item_flags = 0;
7016         uint64_t last_item = 0;
7017         uint64_t action_flags = 0;
7018         uint64_t priority = attr->priority;
7019         struct mlx5_flow_dv_matcher matcher = {
7020                 .mask = {
7021                         .size = sizeof(matcher.mask.buf),
7022                 },
7023         };
7024         int actions_n = 0;
7025         bool actions_end = false;
7026         union {
7027                 struct mlx5_flow_dv_modify_hdr_resource res;
7028                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7029                             sizeof(struct mlx5_modification_cmd) *
7030                             (MLX5_MAX_MODIFY_NUM + 1)];
7031         } mhdr_dummy;
7032         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7033         union flow_dv_attr flow_attr = { .attr = 0 };
7034         uint32_t tag_be;
7035         union mlx5_flow_tbl_key tbl_key;
7036         uint32_t modify_action_position = UINT32_MAX;
7037         void *match_mask = matcher.mask.buf;
7038         void *match_value = dev_flow->dv.value.buf;
7039         uint8_t next_protocol = 0xff;
7040         struct rte_vlan_hdr vlan = { 0 };
7041         uint32_t table;
7042         int ret = 0;
7043
7044         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7045                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7046         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7047                                        &table, error);
7048         if (ret)
7049                 return ret;
7050         dev_flow->group = table;
7051         if (attr->transfer)
7052                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7053         if (priority == MLX5_FLOW_PRIO_RSVD)
7054                 priority = dev_conf->flow_prio - 1;
7055         /* number of actions must be set to 0 in case of dirty stack. */
7056         mhdr_res->actions_num = 0;
7057         for (; !actions_end ; actions++) {
7058                 const struct rte_flow_action_queue *queue;
7059                 const struct rte_flow_action_rss *rss;
7060                 const struct rte_flow_action *action = actions;
7061                 const struct rte_flow_action_count *count = action->conf;
7062                 const uint8_t *rss_key;
7063                 const struct rte_flow_action_jump *jump_data;
7064                 const struct rte_flow_action_meter *mtr;
7065                 struct mlx5_flow_tbl_resource *tbl;
7066                 uint32_t port_id = 0;
7067                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7068                 int action_type = actions->type;
7069                 const struct rte_flow_action *found_action = NULL;
7070
7071                 switch (action_type) {
7072                 case RTE_FLOW_ACTION_TYPE_VOID:
7073                         break;
7074                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7075                         if (flow_dv_translate_action_port_id(dev, action,
7076                                                              &port_id, error))
7077                                 return -rte_errno;
7078                         port_id_resource.port_id = port_id;
7079                         if (flow_dv_port_id_action_resource_register
7080                             (dev, &port_id_resource, dev_flow, error))
7081                                 return -rte_errno;
7082                         dev_flow->dv.actions[actions_n++] =
7083                                 dev_flow->dv.port_id_action->action;
7084                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7085                         break;
7086                 case RTE_FLOW_ACTION_TYPE_FLAG:
7087                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7088                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7089                                 struct rte_flow_action_mark mark = {
7090                                         .id = MLX5_FLOW_MARK_DEFAULT,
7091                                 };
7092
7093                                 if (flow_dv_convert_action_mark(dev, &mark,
7094                                                                 mhdr_res,
7095                                                                 error))
7096                                         return -rte_errno;
7097                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7098                                 break;
7099                         }
7100                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7101                         if (!dev_flow->dv.tag_resource)
7102                                 if (flow_dv_tag_resource_register
7103                                     (dev, tag_be, dev_flow, error))
7104                                         return -rte_errno;
7105                         dev_flow->dv.actions[actions_n++] =
7106                                 dev_flow->dv.tag_resource->action;
7107                         break;
7108                 case RTE_FLOW_ACTION_TYPE_MARK:
7109                         action_flags |= MLX5_FLOW_ACTION_MARK;
7110                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7111                                 const struct rte_flow_action_mark *mark =
7112                                         (const struct rte_flow_action_mark *)
7113                                                 actions->conf;
7114
7115                                 if (flow_dv_convert_action_mark(dev, mark,
7116                                                                 mhdr_res,
7117                                                                 error))
7118                                         return -rte_errno;
7119                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7120                                 break;
7121                         }
7122                         /* Fall-through */
7123                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7124                         /* Legacy (non-extensive) MARK action. */
7125                         tag_be = mlx5_flow_mark_set
7126                               (((const struct rte_flow_action_mark *)
7127                                (actions->conf))->id);
7128                         if (!dev_flow->dv.tag_resource)
7129                                 if (flow_dv_tag_resource_register
7130                                     (dev, tag_be, dev_flow, error))
7131                                         return -rte_errno;
7132                         dev_flow->dv.actions[actions_n++] =
7133                                 dev_flow->dv.tag_resource->action;
7134                         break;
7135                 case RTE_FLOW_ACTION_TYPE_SET_META:
7136                         if (flow_dv_convert_action_set_meta
7137                                 (dev, mhdr_res, attr,
7138                                  (const struct rte_flow_action_set_meta *)
7139                                   actions->conf, error))
7140                                 return -rte_errno;
7141                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7142                         break;
7143                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7144                         if (flow_dv_convert_action_set_tag
7145                                 (dev, mhdr_res,
7146                                  (const struct rte_flow_action_set_tag *)
7147                                   actions->conf, error))
7148                                 return -rte_errno;
7149                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7150                         break;
7151                 case RTE_FLOW_ACTION_TYPE_DROP:
7152                         action_flags |= MLX5_FLOW_ACTION_DROP;
7153                         break;
7154                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7155                         assert(flow->rss.queue);
7156                         queue = actions->conf;
7157                         flow->rss.queue_num = 1;
7158                         (*flow->rss.queue)[0] = queue->index;
7159                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7160                         break;
7161                 case RTE_FLOW_ACTION_TYPE_RSS:
7162                         assert(flow->rss.queue);
7163                         rss = actions->conf;
7164                         if (flow->rss.queue)
7165                                 memcpy((*flow->rss.queue), rss->queue,
7166                                        rss->queue_num * sizeof(uint16_t));
7167                         flow->rss.queue_num = rss->queue_num;
7168                         /* NULL RSS key indicates default RSS key. */
7169                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7170                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7171                         /*
7172                          * rss->level and rss.types should be set in advance
7173                          * when expanding items for RSS.
7174                          */
7175                         action_flags |= MLX5_FLOW_ACTION_RSS;
7176                         break;
7177                 case RTE_FLOW_ACTION_TYPE_COUNT:
7178                         if (!dev_conf->devx) {
7179                                 rte_errno = ENOTSUP;
7180                                 goto cnt_err;
7181                         }
7182                         flow->counter = flow_dv_counter_alloc(dev,
7183                                                               count->shared,
7184                                                               count->id,
7185                                                               dev_flow->group);
7186                         if (flow->counter == NULL)
7187                                 goto cnt_err;
7188                         dev_flow->dv.actions[actions_n++] =
7189                                 flow->counter->action;
7190                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7191                         break;
7192 cnt_err:
7193                         if (rte_errno == ENOTSUP)
7194                                 return rte_flow_error_set
7195                                               (error, ENOTSUP,
7196                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7197                                                NULL,
7198                                                "count action not supported");
7199                         else
7200                                 return rte_flow_error_set
7201                                                 (error, rte_errno,
7202                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7203                                                  action,
7204                                                  "cannot create counter"
7205                                                   " object.");
7206                         break;
7207                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7208                         dev_flow->dv.actions[actions_n++] =
7209                                                 priv->sh->pop_vlan_action;
7210                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7211                         break;
7212                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7213                         flow_dev_get_vlan_info_from_items(items, &vlan);
7214                         vlan.eth_proto = rte_be_to_cpu_16
7215                              ((((const struct rte_flow_action_of_push_vlan *)
7216                                                    actions->conf)->ethertype));
7217                         found_action = mlx5_flow_find_action
7218                                         (actions + 1,
7219                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7220                         if (found_action)
7221                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7222                         found_action = mlx5_flow_find_action
7223                                         (actions + 1,
7224                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7225                         if (found_action)
7226                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7227                         if (flow_dv_create_action_push_vlan
7228                                             (dev, attr, &vlan, dev_flow, error))
7229                                 return -rte_errno;
7230                         dev_flow->dv.actions[actions_n++] =
7231                                            dev_flow->dv.push_vlan_res->action;
7232                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7233                         break;
7234                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7235                         /* of_vlan_push action handled this action */
7236                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7237                         break;
7238                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7239                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7240                                 break;
7241                         flow_dev_get_vlan_info_from_items(items, &vlan);
7242                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7243                         /* If no VLAN push - this is a modify header action */
7244                         if (flow_dv_convert_action_modify_vlan_vid
7245                                                 (mhdr_res, actions, error))
7246                                 return -rte_errno;
7247                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7248                         break;
7249                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7250                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7251                         if (flow_dv_create_action_l2_encap(dev, actions,
7252                                                            dev_flow,
7253                                                            attr->transfer,
7254                                                            error))
7255                                 return -rte_errno;
7256                         dev_flow->dv.actions[actions_n++] =
7257                                 dev_flow->dv.encap_decap->verbs_action;
7258                         action_flags |= actions->type ==
7259                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
7260                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
7261                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
7262                         break;
7263                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7264                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7265                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7266                                                            attr->transfer,
7267                                                            error))
7268                                 return -rte_errno;
7269                         dev_flow->dv.actions[actions_n++] =
7270                                 dev_flow->dv.encap_decap->verbs_action;
7271                         action_flags |= actions->type ==
7272                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
7273                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
7274                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
7275                         break;
7276                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7277                         /* Handle encap with preceding decap. */
7278                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
7279                                 if (flow_dv_create_action_raw_encap
7280                                         (dev, actions, dev_flow, attr, error))
7281                                         return -rte_errno;
7282                                 dev_flow->dv.actions[actions_n++] =
7283                                         dev_flow->dv.encap_decap->verbs_action;
7284                         } else {
7285                                 /* Handle encap without preceding decap. */
7286                                 if (flow_dv_create_action_l2_encap
7287                                     (dev, actions, dev_flow, attr->transfer,
7288                                      error))
7289                                         return -rte_errno;
7290                                 dev_flow->dv.actions[actions_n++] =
7291                                         dev_flow->dv.encap_decap->verbs_action;
7292                         }
7293                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
7294                         break;
7295                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7296                         /* Check if this decap is followed by encap. */
7297                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
7298                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
7299                                action++) {
7300                         }
7301                         /* Handle decap only if it isn't followed by encap. */
7302                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7303                                 if (flow_dv_create_action_l2_decap
7304                                     (dev, dev_flow, attr->transfer, error))
7305                                         return -rte_errno;
7306                                 dev_flow->dv.actions[actions_n++] =
7307                                         dev_flow->dv.encap_decap->verbs_action;
7308                         }
7309                         /* If decap is followed by encap, handle it at encap. */
7310                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
7311                         break;
7312                 case RTE_FLOW_ACTION_TYPE_JUMP:
7313                         jump_data = action->conf;
7314                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7315                                                        jump_data->group, &table,
7316                                                        error);
7317                         if (ret)
7318                                 return ret;
7319                         tbl = flow_dv_tbl_resource_get(dev, table,
7320                                                        attr->egress,
7321                                                        attr->transfer, error);
7322                         if (!tbl)
7323                                 return rte_flow_error_set
7324                                                 (error, errno,
7325                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7326                                                  NULL,
7327                                                  "cannot create jump action.");
7328                         if (flow_dv_jump_tbl_resource_register
7329                             (dev, tbl, dev_flow, error)) {
7330                                 flow_dv_tbl_resource_release(dev, tbl);
7331                                 return rte_flow_error_set
7332                                                 (error, errno,
7333                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7334                                                  NULL,
7335                                                  "cannot create jump action.");
7336                         }
7337                         dev_flow->dv.actions[actions_n++] =
7338                                 dev_flow->dv.jump->action;
7339                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7340                         break;
7341                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7342                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7343                         if (flow_dv_convert_action_modify_mac
7344                                         (mhdr_res, actions, error))
7345                                 return -rte_errno;
7346                         action_flags |= actions->type ==
7347                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7348                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7349                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7350                         break;
7351                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7352                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7353                         if (flow_dv_convert_action_modify_ipv4
7354                                         (mhdr_res, actions, error))
7355                                 return -rte_errno;
7356                         action_flags |= actions->type ==
7357                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7358                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7359                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7360                         break;
7361                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7362                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7363                         if (flow_dv_convert_action_modify_ipv6
7364                                         (mhdr_res, actions, error))
7365                                 return -rte_errno;
7366                         action_flags |= actions->type ==
7367                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7368                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7369                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7370                         break;
7371                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7372                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7373                         if (flow_dv_convert_action_modify_tp
7374                                         (mhdr_res, actions, items,
7375                                          &flow_attr, error))
7376                                 return -rte_errno;
7377                         action_flags |= actions->type ==
7378                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7379                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7380                                         MLX5_FLOW_ACTION_SET_TP_DST;
7381                         break;
7382                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7383                         if (flow_dv_convert_action_modify_dec_ttl
7384                                         (mhdr_res, items, &flow_attr, error))
7385                                 return -rte_errno;
7386                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7387                         break;
7388                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7389                         if (flow_dv_convert_action_modify_ttl
7390                                         (mhdr_res, actions, items,
7391                                          &flow_attr, error))
7392                                 return -rte_errno;
7393                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7394                         break;
7395                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7396                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7397                         if (flow_dv_convert_action_modify_tcp_seq
7398                                         (mhdr_res, actions, error))
7399                                 return -rte_errno;
7400                         action_flags |= actions->type ==
7401                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7402                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7403                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7404                         break;
7405
7406                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7407                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7408                         if (flow_dv_convert_action_modify_tcp_ack
7409                                         (mhdr_res, actions, error))
7410                                 return -rte_errno;
7411                         action_flags |= actions->type ==
7412                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7413                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7414                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7415                         break;
7416                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7417                         if (flow_dv_convert_action_set_reg
7418                                         (mhdr_res, actions, error))
7419                                 return -rte_errno;
7420                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7421                         break;
7422                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7423                         if (flow_dv_convert_action_copy_mreg
7424                                         (dev, mhdr_res, actions, error))
7425                                 return -rte_errno;
7426                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7427                         break;
7428                 case RTE_FLOW_ACTION_TYPE_METER:
7429                         mtr = actions->conf;
7430                         if (!flow->meter) {
7431                                 flow->meter = mlx5_flow_meter_attach(priv,
7432                                                         mtr->mtr_id, attr,
7433                                                         error);
7434                                 if (!flow->meter)
7435                                         return rte_flow_error_set(error,
7436                                                 rte_errno,
7437                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7438                                                 NULL,
7439                                                 "meter not found "
7440                                                 "or invalid parameters");
7441                         }
7442                         /* Set the meter action. */
7443                         dev_flow->dv.actions[actions_n++] =
7444                                 flow->meter->mfts->meter_action;
7445                         action_flags |= MLX5_FLOW_ACTION_METER;
7446                         break;
7447                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7448                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7449                                                               actions, error))
7450                                 return -rte_errno;
7451                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7452                         break;
7453                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7454                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7455                                                               actions, error))
7456                                 return -rte_errno;
7457                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7458                         break;
7459                 case RTE_FLOW_ACTION_TYPE_END:
7460                         actions_end = true;
7461                         if (mhdr_res->actions_num) {
7462                                 /* create modify action if needed. */
7463                                 if (flow_dv_modify_hdr_resource_register
7464                                         (dev, mhdr_res, dev_flow, error))
7465                                         return -rte_errno;
7466                                 dev_flow->dv.actions[modify_action_position] =
7467                                         dev_flow->dv.modify_hdr->verbs_action;
7468                         }
7469                         break;
7470                 default:
7471                         break;
7472                 }
7473                 if (mhdr_res->actions_num &&
7474                     modify_action_position == UINT32_MAX)
7475                         modify_action_position = actions_n++;
7476         }
7477         dev_flow->dv.actions_n = actions_n;
7478         dev_flow->actions = action_flags;
7479         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7480                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7481                 int item_type = items->type;
7482
7483                 switch (item_type) {
7484                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7485                         flow_dv_translate_item_port_id(dev, match_mask,
7486                                                        match_value, items);
7487                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7488                         break;
7489                 case RTE_FLOW_ITEM_TYPE_ETH:
7490                         flow_dv_translate_item_eth(match_mask, match_value,
7491                                                    items, tunnel);
7492                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7493                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7494                                              MLX5_FLOW_LAYER_OUTER_L2;
7495                         break;
7496                 case RTE_FLOW_ITEM_TYPE_VLAN:
7497                         flow_dv_translate_item_vlan(dev_flow,
7498                                                     match_mask, match_value,
7499                                                     items, tunnel);
7500                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7501                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7502                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7503                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7504                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7505                         break;
7506                 case RTE_FLOW_ITEM_TYPE_IPV4:
7507                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7508                                                   &item_flags, &tunnel);
7509                         flow_dv_translate_item_ipv4(match_mask, match_value,
7510                                                     items, tunnel,
7511                                                     dev_flow->group);
7512                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7513                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7514                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7515                         if (items->mask != NULL &&
7516                             ((const struct rte_flow_item_ipv4 *)
7517                              items->mask)->hdr.next_proto_id) {
7518                                 next_protocol =
7519                                         ((const struct rte_flow_item_ipv4 *)
7520                                          (items->spec))->hdr.next_proto_id;
7521                                 next_protocol &=
7522                                         ((const struct rte_flow_item_ipv4 *)
7523                                          (items->mask))->hdr.next_proto_id;
7524                         } else {
7525                                 /* Reset for inner layer. */
7526                                 next_protocol = 0xff;
7527                         }
7528                         break;
7529                 case RTE_FLOW_ITEM_TYPE_IPV6:
7530                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7531                                                   &item_flags, &tunnel);
7532                         flow_dv_translate_item_ipv6(match_mask, match_value,
7533                                                     items, tunnel,
7534                                                     dev_flow->group);
7535                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7536                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7537                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7538                         if (items->mask != NULL &&
7539                             ((const struct rte_flow_item_ipv6 *)
7540                              items->mask)->hdr.proto) {
7541                                 next_protocol =
7542                                         ((const struct rte_flow_item_ipv6 *)
7543                                          items->spec)->hdr.proto;
7544                                 next_protocol &=
7545                                         ((const struct rte_flow_item_ipv6 *)
7546                                          items->mask)->hdr.proto;
7547                         } else {
7548                                 /* Reset for inner layer. */
7549                                 next_protocol = 0xff;
7550                         }
7551                         break;
7552                 case RTE_FLOW_ITEM_TYPE_TCP:
7553                         flow_dv_translate_item_tcp(match_mask, match_value,
7554                                                    items, tunnel);
7555                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7556                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7557                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7558                         break;
7559                 case RTE_FLOW_ITEM_TYPE_UDP:
7560                         flow_dv_translate_item_udp(match_mask, match_value,
7561                                                    items, tunnel);
7562                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7563                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7564                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7565                         break;
7566                 case RTE_FLOW_ITEM_TYPE_GRE:
7567                         flow_dv_translate_item_gre(match_mask, match_value,
7568                                                    items, tunnel);
7569                         last_item = MLX5_FLOW_LAYER_GRE;
7570                         break;
7571                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7572                         flow_dv_translate_item_gre_key(match_mask,
7573                                                        match_value, items);
7574                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7575                         break;
7576                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7577                         flow_dv_translate_item_nvgre(match_mask, match_value,
7578                                                      items, tunnel);
7579                         last_item = MLX5_FLOW_LAYER_GRE;
7580                         break;
7581                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7582                         flow_dv_translate_item_vxlan(match_mask, match_value,
7583                                                      items, tunnel);
7584                         last_item = MLX5_FLOW_LAYER_VXLAN;
7585                         break;
7586                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7587                         flow_dv_translate_item_vxlan(match_mask, match_value,
7588                                                      items, tunnel);
7589                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7590                         break;
7591                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7592                         flow_dv_translate_item_geneve(match_mask, match_value,
7593                                                       items, tunnel);
7594                         last_item = MLX5_FLOW_LAYER_GENEVE;
7595                         break;
7596                 case RTE_FLOW_ITEM_TYPE_MPLS:
7597                         flow_dv_translate_item_mpls(match_mask, match_value,
7598                                                     items, last_item, tunnel);
7599                         last_item = MLX5_FLOW_LAYER_MPLS;
7600                         break;
7601                 case RTE_FLOW_ITEM_TYPE_MARK:
7602                         flow_dv_translate_item_mark(dev, match_mask,
7603                                                     match_value, items);
7604                         last_item = MLX5_FLOW_ITEM_MARK;
7605                         break;
7606                 case RTE_FLOW_ITEM_TYPE_META:
7607                         flow_dv_translate_item_meta(dev, match_mask,
7608                                                     match_value, attr, items);
7609                         last_item = MLX5_FLOW_ITEM_METADATA;
7610                         break;
7611                 case RTE_FLOW_ITEM_TYPE_ICMP:
7612                         flow_dv_translate_item_icmp(match_mask, match_value,
7613                                                     items, tunnel);
7614                         last_item = MLX5_FLOW_LAYER_ICMP;
7615                         break;
7616                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7617                         flow_dv_translate_item_icmp6(match_mask, match_value,
7618                                                       items, tunnel);
7619                         last_item = MLX5_FLOW_LAYER_ICMP6;
7620                         break;
7621                 case RTE_FLOW_ITEM_TYPE_TAG:
7622                         flow_dv_translate_item_tag(dev, match_mask,
7623                                                    match_value, items);
7624                         last_item = MLX5_FLOW_ITEM_TAG;
7625                         break;
7626                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7627                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7628                                                         match_value, items);
7629                         last_item = MLX5_FLOW_ITEM_TAG;
7630                         break;
7631                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7632                         flow_dv_translate_item_tx_queue(dev, match_mask,
7633                                                         match_value,
7634                                                         items);
7635                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7636                         break;
7637                 case RTE_FLOW_ITEM_TYPE_GTP:
7638                         flow_dv_translate_item_gtp(match_mask, match_value,
7639                                                    items, tunnel);
7640                         last_item = MLX5_FLOW_LAYER_GTP;
7641                         break;
7642                 default:
7643                         break;
7644                 }
7645                 item_flags |= last_item;
7646         }
7647         /*
7648          * In case of ingress traffic when E-Switch mode is enabled,
7649          * we have two cases where we need to set the source port manually.
7650          * The first one, is in case of Nic steering rule, and the second is
7651          * E-Switch rule where no port_id item was found. In both cases
7652          * the source port is set according the current port in use.
7653          */
7654         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7655             (priv->representor || priv->master)) {
7656                 if (flow_dv_translate_item_port_id(dev, match_mask,
7657                                                    match_value, NULL))
7658                         return -rte_errno;
7659         }
7660         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7661                                          dev_flow->dv.value.buf));
7662         dev_flow->layers = item_flags;
7663         if (action_flags & MLX5_FLOW_ACTION_RSS)
7664                 flow_dv_hashfields_set(dev_flow);
7665         /* Register matcher. */
7666         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7667                                     matcher.mask.size);
7668         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7669                                                      matcher.priority);
7670         /* reserved field no needs to be set to 0 here. */
7671         tbl_key.domain = attr->transfer;
7672         tbl_key.direction = attr->egress;
7673         tbl_key.table_id = dev_flow->group;
7674         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7675                 return -rte_errno;
7676         return 0;
7677 }
7678
7679 /**
7680  * Apply the flow to the NIC, lock free,
7681  * (mutex should be acquired by caller).
7682  *
7683  * @param[in] dev
7684  *   Pointer to the Ethernet device structure.
7685  * @param[in, out] flow
7686  *   Pointer to flow structure.
7687  * @param[out] error
7688  *   Pointer to error structure.
7689  *
7690  * @return
7691  *   0 on success, a negative errno value otherwise and rte_errno is set.
7692  */
7693 static int
7694 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7695                 struct rte_flow_error *error)
7696 {
7697         struct mlx5_flow_dv *dv;
7698         struct mlx5_flow *dev_flow;
7699         struct mlx5_priv *priv = dev->data->dev_private;
7700         int n;
7701         int err;
7702
7703         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7704                 dv = &dev_flow->dv;
7705                 n = dv->actions_n;
7706                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7707                         if (dev_flow->transfer) {
7708                                 dv->actions[n++] = priv->sh->esw_drop_action;
7709                         } else {
7710                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7711                                 if (!dv->hrxq) {
7712                                         rte_flow_error_set
7713                                                 (error, errno,
7714                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7715                                                  NULL,
7716                                                  "cannot get drop hash queue");
7717                                         goto error;
7718                                 }
7719                                 dv->actions[n++] = dv->hrxq->action;
7720                         }
7721                 } else if (dev_flow->actions &
7722                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7723                         struct mlx5_hrxq *hrxq;
7724
7725                         assert(flow->rss.queue);
7726                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7727                                              MLX5_RSS_HASH_KEY_LEN,
7728                                              dev_flow->hash_fields,
7729                                              (*flow->rss.queue),
7730                                              flow->rss.queue_num);
7731                         if (!hrxq) {
7732                                 hrxq = mlx5_hrxq_new
7733                                         (dev, flow->rss.key,
7734                                          MLX5_RSS_HASH_KEY_LEN,
7735                                          dev_flow->hash_fields,
7736                                          (*flow->rss.queue),
7737                                          flow->rss.queue_num,
7738                                          !!(dev_flow->layers &
7739                                             MLX5_FLOW_LAYER_TUNNEL));
7740                         }
7741                         if (!hrxq) {
7742                                 rte_flow_error_set
7743                                         (error, rte_errno,
7744                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7745                                          "cannot get hash queue");
7746                                 goto error;
7747                         }
7748                         dv->hrxq = hrxq;
7749                         dv->actions[n++] = dv->hrxq->action;
7750                 }
7751                 dv->flow =
7752                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7753                                                   (void *)&dv->value, n,
7754                                                   dv->actions);
7755                 if (!dv->flow) {
7756                         rte_flow_error_set(error, errno,
7757                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7758                                            NULL,
7759                                            "hardware refuses to create flow");
7760                         goto error;
7761                 }
7762                 if (priv->vmwa_context &&
7763                     dev_flow->dv.vf_vlan.tag &&
7764                     !dev_flow->dv.vf_vlan.created) {
7765                         /*
7766                          * The rule contains the VLAN pattern.
7767                          * For VF we are going to create VLAN
7768                          * interface to make hypervisor set correct
7769                          * e-Switch vport context.
7770                          */
7771                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7772                 }
7773         }
7774         return 0;
7775 error:
7776         err = rte_errno; /* Save rte_errno before cleanup. */
7777         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7778                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7779                 if (dv->hrxq) {
7780                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7781                                 mlx5_hrxq_drop_release(dev);
7782                         else
7783                                 mlx5_hrxq_release(dev, dv->hrxq);
7784                         dv->hrxq = NULL;
7785                 }
7786                 if (dev_flow->dv.vf_vlan.tag &&
7787                     dev_flow->dv.vf_vlan.created)
7788                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7789         }
7790         rte_errno = err; /* Restore rte_errno. */
7791         return -rte_errno;
7792 }
7793
7794 /**
7795  * Release the flow matcher.
7796  *
7797  * @param dev
7798  *   Pointer to Ethernet device.
7799  * @param flow
7800  *   Pointer to mlx5_flow.
7801  *
7802  * @return
7803  *   1 while a reference on it exists, 0 when freed.
7804  */
7805 static int
7806 flow_dv_matcher_release(struct rte_eth_dev *dev,
7807                         struct mlx5_flow *flow)
7808 {
7809         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7810
7811         assert(matcher->matcher_object);
7812         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7813                 dev->data->port_id, (void *)matcher,
7814                 rte_atomic32_read(&matcher->refcnt));
7815         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7816                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7817                            (matcher->matcher_object));
7818                 LIST_REMOVE(matcher, next);
7819                 /* table ref-- in release interface. */
7820                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7821                 rte_free(matcher);
7822                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7823                         dev->data->port_id, (void *)matcher);
7824                 return 0;
7825         }
7826         return 1;
7827 }
7828
7829 /**
7830  * Release an encap/decap resource.
7831  *
7832  * @param flow
7833  *   Pointer to mlx5_flow.
7834  *
7835  * @return
7836  *   1 while a reference on it exists, 0 when freed.
7837  */
7838 static int
7839 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7840 {
7841         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7842                                                 flow->dv.encap_decap;
7843
7844         assert(cache_resource->verbs_action);
7845         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7846                 (void *)cache_resource,
7847                 rte_atomic32_read(&cache_resource->refcnt));
7848         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7849                 claim_zero(mlx5_glue->destroy_flow_action
7850                                 (cache_resource->verbs_action));
7851                 LIST_REMOVE(cache_resource, next);
7852                 rte_free(cache_resource);
7853                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7854                         (void *)cache_resource);
7855                 return 0;
7856         }
7857         return 1;
7858 }
7859
7860 /**
7861  * Release an jump to table action resource.
7862  *
7863  * @param dev
7864  *   Pointer to Ethernet device.
7865  * @param flow
7866  *   Pointer to mlx5_flow.
7867  *
7868  * @return
7869  *   1 while a reference on it exists, 0 when freed.
7870  */
7871 static int
7872 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7873                                   struct mlx5_flow *flow)
7874 {
7875         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7876         struct mlx5_flow_tbl_data_entry *tbl_data =
7877                         container_of(cache_resource,
7878                                      struct mlx5_flow_tbl_data_entry, jump);
7879
7880         assert(cache_resource->action);
7881         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7882                 (void *)cache_resource,
7883                 rte_atomic32_read(&cache_resource->refcnt));
7884         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7885                 claim_zero(mlx5_glue->destroy_flow_action
7886                                 (cache_resource->action));
7887                 /* jump action memory free is inside the table release. */
7888                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7889                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7890                         (void *)cache_resource);
7891                 return 0;
7892         }
7893         return 1;
7894 }
7895
7896 /**
7897  * Release a modify-header resource.
7898  *
7899  * @param flow
7900  *   Pointer to mlx5_flow.
7901  *
7902  * @return
7903  *   1 while a reference on it exists, 0 when freed.
7904  */
7905 static int
7906 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7907 {
7908         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7909                                                 flow->dv.modify_hdr;
7910
7911         assert(cache_resource->verbs_action);
7912         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7913                 (void *)cache_resource,
7914                 rte_atomic32_read(&cache_resource->refcnt));
7915         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7916                 claim_zero(mlx5_glue->destroy_flow_action
7917                                 (cache_resource->verbs_action));
7918                 LIST_REMOVE(cache_resource, next);
7919                 rte_free(cache_resource);
7920                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7921                         (void *)cache_resource);
7922                 return 0;
7923         }
7924         return 1;
7925 }
7926
7927 /**
7928  * Release port ID action resource.
7929  *
7930  * @param flow
7931  *   Pointer to mlx5_flow.
7932  *
7933  * @return
7934  *   1 while a reference on it exists, 0 when freed.
7935  */
7936 static int
7937 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7938 {
7939         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7940                 flow->dv.port_id_action;
7941
7942         assert(cache_resource->action);
7943         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7944                 (void *)cache_resource,
7945                 rte_atomic32_read(&cache_resource->refcnt));
7946         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7947                 claim_zero(mlx5_glue->destroy_flow_action
7948                                 (cache_resource->action));
7949                 LIST_REMOVE(cache_resource, next);
7950                 rte_free(cache_resource);
7951                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7952                         (void *)cache_resource);
7953                 return 0;
7954         }
7955         return 1;
7956 }
7957
7958 /**
7959  * Release push vlan action resource.
7960  *
7961  * @param flow
7962  *   Pointer to mlx5_flow.
7963  *
7964  * @return
7965  *   1 while a reference on it exists, 0 when freed.
7966  */
7967 static int
7968 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7969 {
7970         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7971                 flow->dv.push_vlan_res;
7972
7973         assert(cache_resource->action);
7974         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7975                 (void *)cache_resource,
7976                 rte_atomic32_read(&cache_resource->refcnt));
7977         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7978                 claim_zero(mlx5_glue->destroy_flow_action
7979                                 (cache_resource->action));
7980                 LIST_REMOVE(cache_resource, next);
7981                 rte_free(cache_resource);
7982                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7983                         (void *)cache_resource);
7984                 return 0;
7985         }
7986         return 1;
7987 }
7988
7989 /**
7990  * Remove the flow from the NIC but keeps it in memory.
7991  * Lock free, (mutex should be acquired by caller).
7992  *
7993  * @param[in] dev
7994  *   Pointer to Ethernet device.
7995  * @param[in, out] flow
7996  *   Pointer to flow structure.
7997  */
7998 static void
7999 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8000 {
8001         struct mlx5_flow_dv *dv;
8002         struct mlx5_flow *dev_flow;
8003
8004         if (!flow)
8005                 return;
8006         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8007                 dv = &dev_flow->dv;
8008                 if (dv->flow) {
8009                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
8010                         dv->flow = NULL;
8011                 }
8012                 if (dv->hrxq) {
8013                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8014                                 mlx5_hrxq_drop_release(dev);
8015                         else
8016                                 mlx5_hrxq_release(dev, dv->hrxq);
8017                         dv->hrxq = NULL;
8018                 }
8019                 if (dev_flow->dv.vf_vlan.tag &&
8020                     dev_flow->dv.vf_vlan.created)
8021                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8022         }
8023 }
8024
8025 /**
8026  * Remove the flow from the NIC and the memory.
8027  * Lock free, (mutex should be acquired by caller).
8028  *
8029  * @param[in] dev
8030  *   Pointer to the Ethernet device structure.
8031  * @param[in, out] flow
8032  *   Pointer to flow structure.
8033  */
8034 static void
8035 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8036 {
8037         struct mlx5_flow *dev_flow;
8038
8039         if (!flow)
8040                 return;
8041         __flow_dv_remove(dev, flow);
8042         if (flow->counter) {
8043                 flow_dv_counter_release(dev, flow->counter);
8044                 flow->counter = NULL;
8045         }
8046         if (flow->meter) {
8047                 mlx5_flow_meter_detach(flow->meter);
8048                 flow->meter = NULL;
8049         }
8050         while (!LIST_EMPTY(&flow->dev_flows)) {
8051                 dev_flow = LIST_FIRST(&flow->dev_flows);
8052                 LIST_REMOVE(dev_flow, next);
8053                 if (dev_flow->dv.matcher)
8054                         flow_dv_matcher_release(dev, dev_flow);
8055                 if (dev_flow->dv.encap_decap)
8056                         flow_dv_encap_decap_resource_release(dev_flow);
8057                 if (dev_flow->dv.modify_hdr)
8058                         flow_dv_modify_hdr_resource_release(dev_flow);
8059                 if (dev_flow->dv.jump)
8060                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8061                 if (dev_flow->dv.port_id_action)
8062                         flow_dv_port_id_action_resource_release(dev_flow);
8063                 if (dev_flow->dv.push_vlan_res)
8064                         flow_dv_push_vlan_action_resource_release(dev_flow);
8065                 if (dev_flow->dv.tag_resource)
8066                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8067                 rte_free(dev_flow);
8068         }
8069 }
8070
8071 /**
8072  * Query a dv flow  rule for its statistics via devx.
8073  *
8074  * @param[in] dev
8075  *   Pointer to Ethernet device.
8076  * @param[in] flow
8077  *   Pointer to the sub flow.
8078  * @param[out] data
8079  *   data retrieved by the query.
8080  * @param[out] error
8081  *   Perform verbose error reporting if not NULL.
8082  *
8083  * @return
8084  *   0 on success, a negative errno value otherwise and rte_errno is set.
8085  */
8086 static int
8087 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8088                     void *data, struct rte_flow_error *error)
8089 {
8090         struct mlx5_priv *priv = dev->data->dev_private;
8091         struct rte_flow_query_count *qc = data;
8092
8093         if (!priv->config.devx)
8094                 return rte_flow_error_set(error, ENOTSUP,
8095                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8096                                           NULL,
8097                                           "counters are not supported");
8098         if (flow->counter) {
8099                 uint64_t pkts, bytes;
8100                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8101                                                &bytes);
8102
8103                 if (err)
8104                         return rte_flow_error_set(error, -err,
8105                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8106                                         NULL, "cannot read counters");
8107                 qc->hits_set = 1;
8108                 qc->bytes_set = 1;
8109                 qc->hits = pkts - flow->counter->hits;
8110                 qc->bytes = bytes - flow->counter->bytes;
8111                 if (qc->reset) {
8112                         flow->counter->hits = pkts;
8113                         flow->counter->bytes = bytes;
8114                 }
8115                 return 0;
8116         }
8117         return rte_flow_error_set(error, EINVAL,
8118                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8119                                   NULL,
8120                                   "counters are not available");
8121 }
8122
8123 /**
8124  * Query a flow.
8125  *
8126  * @see rte_flow_query()
8127  * @see rte_flow_ops
8128  */
8129 static int
8130 flow_dv_query(struct rte_eth_dev *dev,
8131               struct rte_flow *flow __rte_unused,
8132               const struct rte_flow_action *actions __rte_unused,
8133               void *data __rte_unused,
8134               struct rte_flow_error *error __rte_unused)
8135 {
8136         int ret = -EINVAL;
8137
8138         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8139                 switch (actions->type) {
8140                 case RTE_FLOW_ACTION_TYPE_VOID:
8141                         break;
8142                 case RTE_FLOW_ACTION_TYPE_COUNT:
8143                         ret = flow_dv_query_count(dev, flow, data, error);
8144                         break;
8145                 default:
8146                         return rte_flow_error_set(error, ENOTSUP,
8147                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8148                                                   actions,
8149                                                   "action not supported");
8150                 }
8151         }
8152         return ret;
8153 }
8154
8155 /**
8156  * Destroy the meter table set.
8157  * Lock free, (mutex should be acquired by caller).
8158  *
8159  * @param[in] dev
8160  *   Pointer to Ethernet device.
8161  * @param[in] tbl
8162  *   Pointer to the meter table set.
8163  *
8164  * @return
8165  *   Always 0.
8166  */
8167 static int
8168 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8169                         struct mlx5_meter_domains_infos *tbl)
8170 {
8171         struct mlx5_priv *priv = dev->data->dev_private;
8172         struct mlx5_meter_domains_infos *mtd =
8173                                 (struct mlx5_meter_domains_infos *)tbl;
8174
8175         if (!mtd || !priv->config.dv_flow_en)
8176                 return 0;
8177         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8178                 claim_zero(mlx5_glue->dv_destroy_flow
8179                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8180         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8181                 claim_zero(mlx5_glue->dv_destroy_flow
8182                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8183         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8184                 claim_zero(mlx5_glue->dv_destroy_flow
8185                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8186         if (mtd->egress.color_matcher)
8187                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8188                           (mtd->egress.color_matcher));
8189         if (mtd->egress.any_matcher)
8190                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8191                           (mtd->egress.any_matcher));
8192         if (mtd->egress.tbl)
8193                 claim_zero(flow_dv_tbl_resource_release(dev,
8194                                                         mtd->egress.tbl));
8195         if (mtd->ingress.color_matcher)
8196                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8197                           (mtd->ingress.color_matcher));
8198         if (mtd->ingress.any_matcher)
8199                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8200                           (mtd->ingress.any_matcher));
8201         if (mtd->ingress.tbl)
8202                 claim_zero(flow_dv_tbl_resource_release(dev,
8203                                                         mtd->ingress.tbl));
8204         if (mtd->transfer.color_matcher)
8205                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8206                           (mtd->transfer.color_matcher));
8207         if (mtd->transfer.any_matcher)
8208                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8209                           (mtd->transfer.any_matcher));
8210         if (mtd->transfer.tbl)
8211                 claim_zero(flow_dv_tbl_resource_release(dev,
8212                                                         mtd->transfer.tbl));
8213         if (mtd->drop_actn)
8214                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8215         rte_free(mtd);
8216         return 0;
8217 }
8218
8219 /* Number of meter flow actions, count and jump or count and drop. */
8220 #define METER_ACTIONS 2
8221
8222 /**
8223  * Create specify domain meter table and suffix table.
8224  *
8225  * @param[in] dev
8226  *   Pointer to Ethernet device.
8227  * @param[in,out] mtb
8228  *   Pointer to DV meter table set.
8229  * @param[in] egress
8230  *   Table attribute.
8231  * @param[in] transfer
8232  *   Table attribute.
8233  * @param[in] color_reg_c_idx
8234  *   Reg C index for color match.
8235  *
8236  * @return
8237  *   0 on success, -1 otherwise and rte_errno is set.
8238  */
8239 static int
8240 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8241                            struct mlx5_meter_domains_infos *mtb,
8242                            uint8_t egress, uint8_t transfer,
8243                            uint32_t color_reg_c_idx)
8244 {
8245         struct mlx5_priv *priv = dev->data->dev_private;
8246         struct mlx5_ibv_shared *sh = priv->sh;
8247         struct mlx5_flow_dv_match_params mask = {
8248                 .size = sizeof(mask.buf),
8249         };
8250         struct mlx5_flow_dv_match_params value = {
8251                 .size = sizeof(value.buf),
8252         };
8253         struct mlx5dv_flow_matcher_attr dv_attr = {
8254                 .type = IBV_FLOW_ATTR_NORMAL,
8255                 .priority = 0,
8256                 .match_criteria_enable = 0,
8257                 .match_mask = (void *)&mask,
8258         };
8259         void *actions[METER_ACTIONS];
8260         struct mlx5_flow_tbl_resource **sfx_tbl;
8261         struct mlx5_meter_domain_info *dtb;
8262         struct rte_flow_error error;
8263         int i = 0;
8264
8265         if (transfer) {
8266                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8267                 dtb = &mtb->transfer;
8268         } else if (egress) {
8269                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8270                 dtb = &mtb->egress;
8271         } else {
8272                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8273                 dtb = &mtb->ingress;
8274         }
8275         /* If the suffix table in missing, create it. */
8276         if (!(*sfx_tbl)) {
8277                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8278                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8279                                                 egress, transfer, &error);
8280                 if (!(*sfx_tbl)) {
8281                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8282                         return -1;
8283                 }
8284         }
8285         /* Create the meter table with METER level. */
8286         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8287                                             egress, transfer, &error);
8288         if (!dtb->tbl) {
8289                 DRV_LOG(ERR, "Failed to create meter policer table.");
8290                 return -1;
8291         }
8292         /* Create matchers, Any and Color. */
8293         dv_attr.priority = 3;
8294         dv_attr.match_criteria_enable = 0;
8295         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8296                                                              &dv_attr,
8297                                                              dtb->tbl->obj);
8298         if (!dtb->any_matcher) {
8299                 DRV_LOG(ERR, "Failed to create meter"
8300                              " policer default matcher.");
8301                 goto error_exit;
8302         }
8303         dv_attr.priority = 0;
8304         dv_attr.match_criteria_enable =
8305                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8306         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8307                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
8308         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8309                                                                &dv_attr,
8310                                                                dtb->tbl->obj);
8311         if (!dtb->color_matcher) {
8312                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8313                 goto error_exit;
8314         }
8315         if (mtb->count_actns[RTE_MTR_DROPPED])
8316                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8317         actions[i++] = mtb->drop_actn;
8318         /* Default rule: lowest priority, match any, actions: drop. */
8319         dtb->policer_rules[RTE_MTR_DROPPED] =
8320                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8321                                                  (void *)&value, i, actions);
8322         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8323                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8324                 goto error_exit;
8325         }
8326         return 0;
8327 error_exit:
8328         return -1;
8329 }
8330
8331 /**
8332  * Create the needed meter and suffix tables.
8333  * Lock free, (mutex should be acquired by caller).
8334  *
8335  * @param[in] dev
8336  *   Pointer to Ethernet device.
8337  * @param[in] fm
8338  *   Pointer to the flow meter.
8339  *
8340  * @return
8341  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8342  */
8343 static struct mlx5_meter_domains_infos *
8344 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8345                        const struct mlx5_flow_meter *fm)
8346 {
8347         struct mlx5_priv *priv = dev->data->dev_private;
8348         struct mlx5_meter_domains_infos *mtb;
8349         int ret;
8350         int i;
8351
8352         if (!priv->mtr_en) {
8353                 rte_errno = ENOTSUP;
8354                 return NULL;
8355         }
8356         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8357         if (!mtb) {
8358                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8359                 return NULL;
8360         }
8361         /* Create meter count actions */
8362         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8363                 if (!fm->policer_stats.cnt[i])
8364                         continue;
8365                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8366         }
8367         /* Create drop action. */
8368         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8369         if (!mtb->drop_actn) {
8370                 DRV_LOG(ERR, "Failed to create drop action.");
8371                 goto error_exit;
8372         }
8373         /* Egress meter table. */
8374         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8375         if (ret) {
8376                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8377                 goto error_exit;
8378         }
8379         /* Ingress meter table. */
8380         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8381         if (ret) {
8382                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8383                 goto error_exit;
8384         }
8385         /* FDB meter table. */
8386         if (priv->config.dv_esw_en) {
8387                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8388                                                  priv->mtr_color_reg);
8389                 if (ret) {
8390                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8391                         goto error_exit;
8392                 }
8393         }
8394         return mtb;
8395 error_exit:
8396         flow_dv_destroy_mtr_tbl(dev, mtb);
8397         return NULL;
8398 }
8399
8400 /**
8401  * Destroy domain policer rule.
8402  *
8403  * @param[in] dt
8404  *   Pointer to domain table.
8405  */
8406 static void
8407 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8408 {
8409         int i;
8410
8411         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8412                 if (dt->policer_rules[i]) {
8413                         claim_zero(mlx5_glue->dv_destroy_flow
8414                                   (dt->policer_rules[i]));
8415                         dt->policer_rules[i] = NULL;
8416                 }
8417         }
8418         if (dt->jump_actn) {
8419                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8420                 dt->jump_actn = NULL;
8421         }
8422 }
8423
8424 /**
8425  * Destroy policer rules.
8426  *
8427  * @param[in] dev
8428  *   Pointer to Ethernet device.
8429  * @param[in] fm
8430  *   Pointer to flow meter structure.
8431  * @param[in] attr
8432  *   Pointer to flow attributes.
8433  *
8434  * @return
8435  *   Always 0.
8436  */
8437 static int
8438 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8439                               const struct mlx5_flow_meter *fm,
8440                               const struct rte_flow_attr *attr)
8441 {
8442         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8443
8444         if (!mtb)
8445                 return 0;
8446         if (attr->egress)
8447                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8448         if (attr->ingress)
8449                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8450         if (attr->transfer)
8451                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8452         return 0;
8453 }
8454
8455 /**
8456  * Create specify domain meter policer rule.
8457  *
8458  * @param[in] fm
8459  *   Pointer to flow meter structure.
8460  * @param[in] mtb
8461  *   Pointer to DV meter table set.
8462  * @param[in] sfx_tb
8463  *   Pointer to suffix table.
8464  * @param[in] mtr_reg_c
8465  *   Color match REG_C.
8466  *
8467  * @return
8468  *   0 on success, -1 otherwise.
8469  */
8470 static int
8471 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8472                                     struct mlx5_meter_domain_info *dtb,
8473                                     struct mlx5_flow_tbl_resource *sfx_tb,
8474                                     uint8_t mtr_reg_c)
8475 {
8476         struct mlx5_flow_dv_match_params matcher = {
8477                 .size = sizeof(matcher.buf),
8478         };
8479         struct mlx5_flow_dv_match_params value = {
8480                 .size = sizeof(value.buf),
8481         };
8482         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8483         void *actions[METER_ACTIONS];
8484         int i;
8485
8486         /* Create jump action. */
8487         if (!sfx_tb)
8488                 return -1;
8489         if (!dtb->jump_actn)
8490                 dtb->jump_actn =
8491                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8492                                                         (sfx_tb->obj);
8493         if (!dtb->jump_actn) {
8494                 DRV_LOG(ERR, "Failed to create policer jump action.");
8495                 goto error;
8496         }
8497         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8498                 int j = 0;
8499
8500                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8501                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8502                 if (mtb->count_actns[i])
8503                         actions[j++] = mtb->count_actns[i];
8504                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8505                         actions[j++] = mtb->drop_actn;
8506                 else
8507                         actions[j++] = dtb->jump_actn;
8508                 dtb->policer_rules[i] =
8509                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8510                                                  (void *)&value,
8511                                                   j, actions);
8512                 if (!dtb->policer_rules[i]) {
8513                         DRV_LOG(ERR, "Failed to create policer rule.");
8514                         goto error;
8515                 }
8516         }
8517         return 0;
8518 error:
8519         rte_errno = errno;
8520         return -1;
8521 }
8522
8523 /**
8524  * Create policer rules.
8525  *
8526  * @param[in] dev
8527  *   Pointer to Ethernet device.
8528  * @param[in] fm
8529  *   Pointer to flow meter structure.
8530  * @param[in] attr
8531  *   Pointer to flow attributes.
8532  *
8533  * @return
8534  *   0 on success, -1 otherwise.
8535  */
8536 static int
8537 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8538                              struct mlx5_flow_meter *fm,
8539                              const struct rte_flow_attr *attr)
8540 {
8541         struct mlx5_priv *priv = dev->data->dev_private;
8542         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8543         int ret;
8544
8545         if (attr->egress) {
8546                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8547                                                 priv->sh->tx_mtr_sfx_tbl,
8548                                                 priv->mtr_color_reg);
8549                 if (ret) {
8550                         DRV_LOG(ERR, "Failed to create egress policer.");
8551                         goto error;
8552                 }
8553         }
8554         if (attr->ingress) {
8555                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8556                                                 priv->sh->rx_mtr_sfx_tbl,
8557                                                 priv->mtr_color_reg);
8558                 if (ret) {
8559                         DRV_LOG(ERR, "Failed to create ingress policer.");
8560                         goto error;
8561                 }
8562         }
8563         if (attr->transfer) {
8564                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8565                                                 priv->sh->fdb_mtr_sfx_tbl,
8566                                                 priv->mtr_color_reg);
8567                 if (ret) {
8568                         DRV_LOG(ERR, "Failed to create transfer policer.");
8569                         goto error;
8570                 }
8571         }
8572         return 0;
8573 error:
8574         flow_dv_destroy_policer_rules(dev, fm, attr);
8575         return -1;
8576 }
8577
8578 /**
8579  * Query a devx counter.
8580  *
8581  * @param[in] dev
8582  *   Pointer to the Ethernet device structure.
8583  * @param[in] cnt
8584  *   Pointer to the flow counter.
8585  * @param[in] clear
8586  *   Set to clear the counter statistics.
8587  * @param[out] pkts
8588  *   The statistics value of packets.
8589  * @param[out] bytes
8590  *   The statistics value of bytes.
8591  *
8592  * @return
8593  *   0 on success, otherwise return -1.
8594  */
8595 static int
8596 flow_dv_counter_query(struct rte_eth_dev *dev,
8597                       struct mlx5_flow_counter *cnt, bool clear,
8598                       uint64_t *pkts, uint64_t *bytes)
8599 {
8600         struct mlx5_priv *priv = dev->data->dev_private;
8601         uint64_t inn_pkts, inn_bytes;
8602         int ret;
8603
8604         if (!priv->config.devx)
8605                 return -1;
8606         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8607         if (ret)
8608                 return -1;
8609         *pkts = inn_pkts - cnt->hits;
8610         *bytes = inn_bytes - cnt->bytes;
8611         if (clear) {
8612                 cnt->hits = inn_pkts;
8613                 cnt->bytes = inn_bytes;
8614         }
8615         return 0;
8616 }
8617
8618 /*
8619  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8620  */
8621 static int
8622 flow_dv_translate(struct rte_eth_dev *dev,
8623                   struct mlx5_flow *dev_flow,
8624                   const struct rte_flow_attr *attr,
8625                   const struct rte_flow_item items[],
8626                   const struct rte_flow_action actions[],
8627                   struct rte_flow_error *error)
8628 {
8629         int ret;
8630
8631         flow_dv_shared_lock(dev);
8632         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8633         flow_dv_shared_unlock(dev);
8634         return ret;
8635 }
8636
8637 /*
8638  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8639  */
8640 static int
8641 flow_dv_apply(struct rte_eth_dev *dev,
8642               struct rte_flow *flow,
8643               struct rte_flow_error *error)
8644 {
8645         int ret;
8646
8647         flow_dv_shared_lock(dev);
8648         ret = __flow_dv_apply(dev, flow, error);
8649         flow_dv_shared_unlock(dev);
8650         return ret;
8651 }
8652
8653 /*
8654  * Mutex-protected thunk to lock-free __flow_dv_remove().
8655  */
8656 static void
8657 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8658 {
8659         flow_dv_shared_lock(dev);
8660         __flow_dv_remove(dev, flow);
8661         flow_dv_shared_unlock(dev);
8662 }
8663
8664 /*
8665  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8666  */
8667 static void
8668 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8669 {
8670         flow_dv_shared_lock(dev);
8671         __flow_dv_destroy(dev, flow);
8672         flow_dv_shared_unlock(dev);
8673 }
8674
8675 /*
8676  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8677  */
8678 static struct mlx5_flow_counter *
8679 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8680 {
8681         struct mlx5_flow_counter *cnt;
8682
8683         flow_dv_shared_lock(dev);
8684         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8685         flow_dv_shared_unlock(dev);
8686         return cnt;
8687 }
8688
8689 /*
8690  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8691  */
8692 static void
8693 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8694 {
8695         flow_dv_shared_lock(dev);
8696         flow_dv_counter_release(dev, cnt);
8697         flow_dv_shared_unlock(dev);
8698 }
8699
8700 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8701         .validate = flow_dv_validate,
8702         .prepare = flow_dv_prepare,
8703         .translate = flow_dv_translate,
8704         .apply = flow_dv_apply,
8705         .remove = flow_dv_remove,
8706         .destroy = flow_dv_destroy,
8707         .query = flow_dv_query,
8708         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8709         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8710         .create_policer_rules = flow_dv_create_policer_rules,
8711         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8712         .counter_alloc = flow_dv_counter_allocate,
8713         .counter_free = flow_dv_counter_free,
8714         .counter_query = flow_dv_counter_query,
8715 };
8716
8717 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */