drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <rte_ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_ip.h>
  19 #include <rte_gre.h>
  20 #include <rte_vxlan.h>
  21 #include <rte_gtp.h>
  22 #include <rte_eal_paging.h>
  23 #include <rte_mpls.h>
  24
  25 #include <mlx5_glue.h>
  26 #include <mlx5_devx_cmds.h>
  27 #include <mlx5_prm.h>
  28 #include <mlx5_malloc.h>
  29
  30 #include "mlx5_defs.h"
  31 #include "mlx5.h"
  32 #include "mlx5_common_os.h"
  33 #include "mlx5_flow.h"
  34 #include "mlx5_flow_os.h"
  35 #include "mlx5_rxtx.h"
  36 #include "rte_pmd_mlx5.h"
  37
  38 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  39
  40 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  41 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  42 #endif
  43
  44 #ifndef HAVE_MLX5DV_DR_ESWITCH
  45 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  46 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  47 #endif
  48 #endif
  49
  50 #ifndef HAVE_MLX5DV_DR
  51 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  52 #endif
  53
  54 /* VLAN header definitions */
  55 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  56 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  57 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  58 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  59 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  60
  61 union flow_dv_attr {
  62         struct {
  63                 uint32_t valid:1;
  64                 uint32_t ipv4:1;
  65                 uint32_t ipv6:1;
  66                 uint32_t tcp:1;
  67                 uint32_t udp:1;
  68                 uint32_t reserved:27;
  69         };
  70         uint32_t attr;
  71 };
  72
  73 static int
  74 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  75                              struct mlx5_flow_tbl_resource *tbl);
  76
  77 static int
  78 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  79                                       uint32_t encap_decap_idx);
  80
  81 static int
  82 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  83                                         uint32_t port_id);
  84 static void
  85 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  86
  87 /**
  88  * Initialize flow attributes structure according to flow items' types.
  89  *
  90  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  91  * mode. For tunnel mode, the items to be modified are the outermost ones.
  92  *
  93  * @param[in] item
  94  *   Pointer to item specification.
  95  * @param[out] attr
  96  *   Pointer to flow attributes structure.
  97  * @param[in] dev_flow
  98  *   Pointer to the sub flow.
  99  * @param[in] tunnel_decap
 100  *   Whether action is after tunnel decapsulation.
 101  */
 102 static void
 103 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 104                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 105 {
 106         uint64_t layers = dev_flow->handle->layers;
 107
 108         /*
 109          * If layers is already initialized, it means this dev_flow is the
 110          * suffix flow, the layers flags is set by the prefix flow. Need to
 111          * use the layer flags from prefix flow as the suffix flow may not
 112          * have the user defined items as the flow is split.
 113          */
 114         if (layers) {
 115                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 116                         attr->ipv4 = 1;
 117                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 118                         attr->ipv6 = 1;
 119                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 120                         attr->tcp = 1;
 121                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 122                         attr->udp = 1;
 123                 attr->valid = 1;
 124                 return;
 125         }
 126         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 127                 uint8_t next_protocol = 0xff;
 128                 switch (item->type) {
 129                 case RTE_FLOW_ITEM_TYPE_GRE:
 130                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 131                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 132                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 133                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 134                 case RTE_FLOW_ITEM_TYPE_MPLS:
 135                         if (tunnel_decap)
 136                                 attr->attr = 0;
 137                         break;
 138                 case RTE_FLOW_ITEM_TYPE_IPV4:
 139                         if (!attr->ipv6)
 140                                 attr->ipv4 = 1;
 141                         if (item->mask != NULL &&
 142                             ((const struct rte_flow_item_ipv4 *)
 143                             item->mask)->hdr.next_proto_id)
 144                                 next_protocol =
 145                                     ((const struct rte_flow_item_ipv4 *)
 146                                       (item->spec))->hdr.next_proto_id &
 147                                     ((const struct rte_flow_item_ipv4 *)
 148                                       (item->mask))->hdr.next_proto_id;
 149                         if ((next_protocol == IPPROTO_IPIP ||
 150                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 151                                 attr->attr = 0;
 152                         break;
 153                 case RTE_FLOW_ITEM_TYPE_IPV6:
 154                         if (!attr->ipv4)
 155                                 attr->ipv6 = 1;
 156                         if (item->mask != NULL &&
 157                             ((const struct rte_flow_item_ipv6 *)
 158                             item->mask)->hdr.proto)
 159                                 next_protocol =
 160                                     ((const struct rte_flow_item_ipv6 *)
 161                                       (item->spec))->hdr.proto &
 162                                     ((const struct rte_flow_item_ipv6 *)
 163                                       (item->mask))->hdr.proto;
 164                         if ((next_protocol == IPPROTO_IPIP ||
 165                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 166                                 attr->attr = 0;
 167                         break;
 168                 case RTE_FLOW_ITEM_TYPE_UDP:
 169                         if (!attr->tcp)
 170                                 attr->udp = 1;
 171                         break;
 172                 case RTE_FLOW_ITEM_TYPE_TCP:
 173                         if (!attr->udp)
 174                                 attr->tcp = 1;
 175                         break;
 176                 default:
 177                         break;
 178                 }
 179         }
 180         attr->valid = 1;
 181 }
 182
 183 /**
 184  * Convert rte_mtr_color to mlx5 color.
 185  *
 186  * @param[in] rcol
 187  *   rte_mtr_color.
 188  *
 189  * @return
 190  *   mlx5 color.
 191  */
 192 static int
 193 rte_col_2_mlx5_col(enum rte_color rcol)
 194 {
 195         switch (rcol) {
 196         case RTE_COLOR_GREEN:
 197                 return MLX5_FLOW_COLOR_GREEN;
 198         case RTE_COLOR_YELLOW:
 199                 return MLX5_FLOW_COLOR_YELLOW;
 200         case RTE_COLOR_RED:
 201                 return MLX5_FLOW_COLOR_RED;
 202         default:
 203                 break;
 204         }
 205         return MLX5_FLOW_COLOR_UNDEFINED;
 206 }
 207
 208 struct field_modify_info {
 209         uint32_t size; /* Size of field in protocol header, in bytes. */
 210         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 211         enum mlx5_modification_field id;
 212 };
 213
 214 struct field_modify_info modify_eth[] = {
 215         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 216         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 217         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 218         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 219         {0, 0, 0},
 220 };
 221
 222 struct field_modify_info modify_vlan_out_first_vid[] = {
 223         /* Size in bits !!! */
 224         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 225         {0, 0, 0},
 226 };
 227
 228 struct field_modify_info modify_ipv4[] = {
 229         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 230         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 231         {4, 12, MLX5_MODI_OUT_SIPV4},
 232         {4, 16, MLX5_MODI_OUT_DIPV4},
 233         {0, 0, 0},
 234 };
 235
 236 struct field_modify_info modify_ipv6[] = {
 237         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 238         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 239         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 240         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 241         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 242         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 243         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 244         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 245         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 246         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 247         {0, 0, 0},
 248 };
 249
 250 struct field_modify_info modify_udp[] = {
 251         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 252         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 253         {0, 0, 0},
 254 };
 255
 256 struct field_modify_info modify_tcp[] = {
 257         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 258         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 259         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 260         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 261         {0, 0, 0},
 262 };
 263
 264 static void
 265 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 266                           uint8_t next_protocol, uint64_t *item_flags,
 267                           int *tunnel)
 268 {
 269         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 270                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 271         if (next_protocol == IPPROTO_IPIP) {
 272                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 273                 *tunnel = 1;
 274         }
 275         if (next_protocol == IPPROTO_IPV6) {
 276                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 277                 *tunnel = 1;
 278         }
 279 }
 280
 281 /* Update VLAN's VID/PCP based on input rte_flow_action.
 282  *
 283  * @param[in] action
 284  *   Pointer to struct rte_flow_action.
 285  * @param[out] vlan
 286  *   Pointer to struct rte_vlan_hdr.
 287  */
 288 static void
 289 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 290                          struct rte_vlan_hdr *vlan)
 291 {
 292         uint16_t vlan_tci;
 293         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 294                 vlan_tci =
 295                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 296                                                action->conf)->vlan_pcp;
 297                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 298                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 299                 vlan->vlan_tci |= vlan_tci;
 300         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 301                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 302                 vlan->vlan_tci |= rte_be_to_cpu_16
 303                     (((const struct rte_flow_action_of_set_vlan_vid *)
 304                                              action->conf)->vlan_vid);
 305         }
 306 }
 307
 308 /**
 309  * Fetch 1, 2, 3 or 4 byte field from the byte array
 310  * and return as unsigned integer in host-endian format.
 311  *
 312  * @param[in] data
 313  *   Pointer to data array.
 314  * @param[in] size
 315  *   Size of field to extract.
 316  *
 317  * @return
 318  *   converted field in host endian format.
 319  */
 320 static inline uint32_t
 321 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 322 {
 323         uint32_t ret;
 324
 325         switch (size) {
 326         case 1:
 327                 ret = *data;
 328                 break;
 329         case 2:
 330                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 331                 break;
 332         case 3:
 333                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 334                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 335                 break;
 336         case 4:
 337                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 338                 break;
 339         default:
 340                 MLX5_ASSERT(false);
 341                 ret = 0;
 342                 break;
 343         }
 344         return ret;
 345 }
 346
 347 /**
 348  * Convert modify-header action to DV specification.
 349  *
 350  * Data length of each action is determined by provided field description
 351  * and the item mask. Data bit offset and width of each action is determined
 352  * by provided item mask.
 353  *
 354  * @param[in] item
 355  *   Pointer to item specification.
 356  * @param[in] field
 357  *   Pointer to field modification information.
 358  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 359  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 360  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 361  * @param[in] dcopy
 362  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 363  *   Negative offset value sets the same offset as source offset.
 364  *   size field is ignored, value is taken from source field.
 365  * @param[in,out] resource
 366  *   Pointer to the modify-header resource.
 367  * @param[in] type
 368  *   Type of modification.
 369  * @param[out] error
 370  *   Pointer to the error structure.
 371  *
 372  * @return
 373  *   0 on success, a negative errno value otherwise and rte_errno is set.
 374  */
 375 static int
 376 flow_dv_convert_modify_action(struct rte_flow_item *item,
 377                               struct field_modify_info *field,
 378                               struct field_modify_info *dcopy,
 379                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 380                               uint32_t type, struct rte_flow_error *error)
 381 {
 382         uint32_t i = resource->actions_num;
 383         struct mlx5_modification_cmd *actions = resource->actions;
 384
 385         /*
 386          * The item and mask are provided in big-endian format.
 387          * The fields should be presented as in big-endian format either.
 388          * Mask must be always present, it defines the actual field width.
 389          */
 390         MLX5_ASSERT(item->mask);
 391         MLX5_ASSERT(field->size);
 392         do {
 393                 unsigned int size_b;
 394                 unsigned int off_b;
 395                 uint32_t mask;
 396                 uint32_t data;
 397
 398                 if (i >= MLX5_MAX_MODIFY_NUM)
 399                         return rte_flow_error_set(error, EINVAL,
 400                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 401                                  "too many items to modify");
 402                 /* Fetch variable byte size mask from the array. */
 403                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 404                                            field->offset, field->size);
 405                 if (!mask) {
 406                         ++field;
 407                         continue;
 408                 }
 409                 /* Deduce actual data width in bits from mask value. */
 410                 off_b = rte_bsf32(mask);
 411                 size_b = sizeof(uint32_t) * CHAR_BIT -
 412                          off_b - __builtin_clz(mask);
 413                 MLX5_ASSERT(size_b);
 414                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 415                 actions[i] = (struct mlx5_modification_cmd) {
 416                         .action_type = type,
 417                         .field = field->id,
 418                         .offset = off_b,
 419                         .length = size_b,
 420                 };
 421                 /* Convert entire record to expected big-endian format. */
 422                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 423                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 424                         MLX5_ASSERT(dcopy);
 425                         actions[i].dst_field = dcopy->id;
 426                         actions[i].dst_offset =
 427                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 428                         /* Convert entire record to big-endian format. */
 429                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 430                 } else {
 431                         MLX5_ASSERT(item->spec);
 432                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 433                                                    field->offset, field->size);
 434                         /* Shift out the trailing masked bits from data. */
 435                         data = (data & mask) >> off_b;
 436                         actions[i].data1 = rte_cpu_to_be_32(data);
 437                 }
 438                 ++i;
 439                 ++field;
 440         } while (field->size);
 441         if (resource->actions_num == i)
 442                 return rte_flow_error_set(error, EINVAL,
 443                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 444                                           "invalid modification flow item");
 445         resource->actions_num = i;
 446         return 0;
 447 }
 448
 449 /**
 450  * Convert modify-header set IPv4 address action to DV specification.
 451  *
 452  * @param[in,out] resource
 453  *   Pointer to the modify-header resource.
 454  * @param[in] action
 455  *   Pointer to action specification.
 456  * @param[out] error
 457  *   Pointer to the error structure.
 458  *
 459  * @return
 460  *   0 on success, a negative errno value otherwise and rte_errno is set.
 461  */
 462 static int
 463 flow_dv_convert_action_modify_ipv4
 464                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 465                          const struct rte_flow_action *action,
 466                          struct rte_flow_error *error)
 467 {
 468         const struct rte_flow_action_set_ipv4 *conf =
 469                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 470         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 471         struct rte_flow_item_ipv4 ipv4;
 472         struct rte_flow_item_ipv4 ipv4_mask;
 473
 474         memset(&ipv4, 0, sizeof(ipv4));
 475         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 476         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 477                 ipv4.hdr.src_addr = conf->ipv4_addr;
 478                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 479         } else {
 480                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 481                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 482         }
 483         item.spec = &ipv4;
 484         item.mask = &ipv4_mask;
 485         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 486                                              MLX5_MODIFICATION_TYPE_SET, error);
 487 }
 488
 489 /**
 490  * Convert modify-header set IPv6 address action to DV specification.
 491  *
 492  * @param[in,out] resource
 493  *   Pointer to the modify-header resource.
 494  * @param[in] action
 495  *   Pointer to action specification.
 496  * @param[out] error
 497  *   Pointer to the error structure.
 498  *
 499  * @return
 500  *   0 on success, a negative errno value otherwise and rte_errno is set.
 501  */
 502 static int
 503 flow_dv_convert_action_modify_ipv6
 504                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 505                          const struct rte_flow_action *action,
 506                          struct rte_flow_error *error)
 507 {
 508         const struct rte_flow_action_set_ipv6 *conf =
 509                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 510         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 511         struct rte_flow_item_ipv6 ipv6;
 512         struct rte_flow_item_ipv6 ipv6_mask;
 513
 514         memset(&ipv6, 0, sizeof(ipv6));
 515         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 516         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 517                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 518                        sizeof(ipv6.hdr.src_addr));
 519                 memcpy(&ipv6_mask.hdr.src_addr,
 520                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 521                        sizeof(ipv6.hdr.src_addr));
 522         } else {
 523                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 524                        sizeof(ipv6.hdr.dst_addr));
 525                 memcpy(&ipv6_mask.hdr.dst_addr,
 526                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 527                        sizeof(ipv6.hdr.dst_addr));
 528         }
 529         item.spec = &ipv6;
 530         item.mask = &ipv6_mask;
 531         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 532                                              MLX5_MODIFICATION_TYPE_SET, error);
 533 }
 534
 535 /**
 536  * Convert modify-header set MAC address action to DV specification.
 537  *
 538  * @param[in,out] resource
 539  *   Pointer to the modify-header resource.
 540  * @param[in] action
 541  *   Pointer to action specification.
 542  * @param[out] error
 543  *   Pointer to the error structure.
 544  *
 545  * @return
 546  *   0 on success, a negative errno value otherwise and rte_errno is set.
 547  */
 548 static int
 549 flow_dv_convert_action_modify_mac
 550                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 551                          const struct rte_flow_action *action,
 552                          struct rte_flow_error *error)
 553 {
 554         const struct rte_flow_action_set_mac *conf =
 555                 (const struct rte_flow_action_set_mac *)(action->conf);
 556         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 557         struct rte_flow_item_eth eth;
 558         struct rte_flow_item_eth eth_mask;
 559
 560         memset(&eth, 0, sizeof(eth));
 561         memset(&eth_mask, 0, sizeof(eth_mask));
 562         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 563                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 564                        sizeof(eth.src.addr_bytes));
 565                 memcpy(&eth_mask.src.addr_bytes,
 566                        &rte_flow_item_eth_mask.src.addr_bytes,
 567                        sizeof(eth_mask.src.addr_bytes));
 568         } else {
 569                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 570                        sizeof(eth.dst.addr_bytes));
 571                 memcpy(&eth_mask.dst.addr_bytes,
 572                        &rte_flow_item_eth_mask.dst.addr_bytes,
 573                        sizeof(eth_mask.dst.addr_bytes));
 574         }
 575         item.spec = &eth;
 576         item.mask = &eth_mask;
 577         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 578                                              MLX5_MODIFICATION_TYPE_SET, error);
 579 }
 580
 581 /**
 582  * Convert modify-header set VLAN VID action to DV specification.
 583  *
 584  * @param[in,out] resource
 585  *   Pointer to the modify-header resource.
 586  * @param[in] action
 587  *   Pointer to action specification.
 588  * @param[out] error
 589  *   Pointer to the error structure.
 590  *
 591  * @return
 592  *   0 on success, a negative errno value otherwise and rte_errno is set.
 593  */
 594 static int
 595 flow_dv_convert_action_modify_vlan_vid
 596                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 597                          const struct rte_flow_action *action,
 598                          struct rte_flow_error *error)
 599 {
 600         const struct rte_flow_action_of_set_vlan_vid *conf =
 601                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 602         int i = resource->actions_num;
 603         struct mlx5_modification_cmd *actions = resource->actions;
 604         struct field_modify_info *field = modify_vlan_out_first_vid;
 605
 606         if (i >= MLX5_MAX_MODIFY_NUM)
 607                 return rte_flow_error_set(error, EINVAL,
 608                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 609                          "too many items to modify");
 610         actions[i] = (struct mlx5_modification_cmd) {
 611                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 612                 .field = field->id,
 613                 .length = field->size,
 614                 .offset = field->offset,
 615         };
 616         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 617         actions[i].data1 = conf->vlan_vid;
 618         actions[i].data1 = actions[i].data1 << 16;
 619         resource->actions_num = ++i;
 620         return 0;
 621 }
 622
 623 /**
 624  * Convert modify-header set TP action to DV specification.
 625  *
 626  * @param[in,out] resource
 627  *   Pointer to the modify-header resource.
 628  * @param[in] action
 629  *   Pointer to action specification.
 630  * @param[in] items
 631  *   Pointer to rte_flow_item objects list.
 632  * @param[in] attr
 633  *   Pointer to flow attributes structure.
 634  * @param[in] dev_flow
 635  *   Pointer to the sub flow.
 636  * @param[in] tunnel_decap
 637  *   Whether action is after tunnel decapsulation.
 638  * @param[out] error
 639  *   Pointer to the error structure.
 640  *
 641  * @return
 642  *   0 on success, a negative errno value otherwise and rte_errno is set.
 643  */
 644 static int
 645 flow_dv_convert_action_modify_tp
 646                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 647                          const struct rte_flow_action *action,
 648                          const struct rte_flow_item *items,
 649                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 650                          bool tunnel_decap, struct rte_flow_error *error)
 651 {
 652         const struct rte_flow_action_set_tp *conf =
 653                 (const struct rte_flow_action_set_tp *)(action->conf);
 654         struct rte_flow_item item;
 655         struct rte_flow_item_udp udp;
 656         struct rte_flow_item_udp udp_mask;
 657         struct rte_flow_item_tcp tcp;
 658         struct rte_flow_item_tcp tcp_mask;
 659         struct field_modify_info *field;
 660
 661         if (!attr->valid)
 662                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 663         if (attr->udp) {
 664                 memset(&udp, 0, sizeof(udp));
 665                 memset(&udp_mask, 0, sizeof(udp_mask));
 666                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 667                         udp.hdr.src_port = conf->port;
 668                         udp_mask.hdr.src_port =
 669                                         rte_flow_item_udp_mask.hdr.src_port;
 670                 } else {
 671                         udp.hdr.dst_port = conf->port;
 672                         udp_mask.hdr.dst_port =
 673                                         rte_flow_item_udp_mask.hdr.dst_port;
 674                 }
 675                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 676                 item.spec = &udp;
 677                 item.mask = &udp_mask;
 678                 field = modify_udp;
 679         } else {
 680                 MLX5_ASSERT(attr->tcp);
 681                 memset(&tcp, 0, sizeof(tcp));
 682                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 683                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 684                         tcp.hdr.src_port = conf->port;
 685                         tcp_mask.hdr.src_port =
 686                                         rte_flow_item_tcp_mask.hdr.src_port;
 687                 } else {
 688                         tcp.hdr.dst_port = conf->port;
 689                         tcp_mask.hdr.dst_port =
 690                                         rte_flow_item_tcp_mask.hdr.dst_port;
 691                 }
 692                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 693                 item.spec = &tcp;
 694                 item.mask = &tcp_mask;
 695                 field = modify_tcp;
 696         }
 697         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 698                                              MLX5_MODIFICATION_TYPE_SET, error);
 699 }
 700
 701 /**
 702  * Convert modify-header set TTL action to DV specification.
 703  *
 704  * @param[in,out] resource
 705  *   Pointer to the modify-header resource.
 706  * @param[in] action
 707  *   Pointer to action specification.
 708  * @param[in] items
 709  *   Pointer to rte_flow_item objects list.
 710  * @param[in] attr
 711  *   Pointer to flow attributes structure.
 712  * @param[in] dev_flow
 713  *   Pointer to the sub flow.
 714  * @param[in] tunnel_decap
 715  *   Whether action is after tunnel decapsulation.
 716  * @param[out] error
 717  *   Pointer to the error structure.
 718  *
 719  * @return
 720  *   0 on success, a negative errno value otherwise and rte_errno is set.
 721  */
 722 static int
 723 flow_dv_convert_action_modify_ttl
 724                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 725                          const struct rte_flow_action *action,
 726                          const struct rte_flow_item *items,
 727                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 728                          bool tunnel_decap, struct rte_flow_error *error)
 729 {
 730         const struct rte_flow_action_set_ttl *conf =
 731                 (const struct rte_flow_action_set_ttl *)(action->conf);
 732         struct rte_flow_item item;
 733         struct rte_flow_item_ipv4 ipv4;
 734         struct rte_flow_item_ipv4 ipv4_mask;
 735         struct rte_flow_item_ipv6 ipv6;
 736         struct rte_flow_item_ipv6 ipv6_mask;
 737         struct field_modify_info *field;
 738
 739         if (!attr->valid)
 740                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 741         if (attr->ipv4) {
 742                 memset(&ipv4, 0, sizeof(ipv4));
 743                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 744                 ipv4.hdr.time_to_live = conf->ttl_value;
 745                 ipv4_mask.hdr.time_to_live = 0xFF;
 746                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 747                 item.spec = &ipv4;
 748                 item.mask = &ipv4_mask;
 749                 field = modify_ipv4;
 750         } else {
 751                 MLX5_ASSERT(attr->ipv6);
 752                 memset(&ipv6, 0, sizeof(ipv6));
 753                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 754                 ipv6.hdr.hop_limits = conf->ttl_value;
 755                 ipv6_mask.hdr.hop_limits = 0xFF;
 756                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 757                 item.spec = &ipv6;
 758                 item.mask = &ipv6_mask;
 759                 field = modify_ipv6;
 760         }
 761         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 762                                              MLX5_MODIFICATION_TYPE_SET, error);
 763 }
 764
 765 /**
 766  * Convert modify-header decrement TTL action to DV specification.
 767  *
 768  * @param[in,out] resource
 769  *   Pointer to the modify-header resource.
 770  * @param[in] action
 771  *   Pointer to action specification.
 772  * @param[in] items
 773  *   Pointer to rte_flow_item objects list.
 774  * @param[in] attr
 775  *   Pointer to flow attributes structure.
 776  * @param[in] dev_flow
 777  *   Pointer to the sub flow.
 778  * @param[in] tunnel_decap
 779  *   Whether action is after tunnel decapsulation.
 780  * @param[out] error
 781  *   Pointer to the error structure.
 782  *
 783  * @return
 784  *   0 on success, a negative errno value otherwise and rte_errno is set.
 785  */
 786 static int
 787 flow_dv_convert_action_modify_dec_ttl
 788                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 789                          const struct rte_flow_item *items,
 790                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 791                          bool tunnel_decap, struct rte_flow_error *error)
 792 {
 793         struct rte_flow_item item;
 794         struct rte_flow_item_ipv4 ipv4;
 795         struct rte_flow_item_ipv4 ipv4_mask;
 796         struct rte_flow_item_ipv6 ipv6;
 797         struct rte_flow_item_ipv6 ipv6_mask;
 798         struct field_modify_info *field;
 799
 800         if (!attr->valid)
 801                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 802         if (attr->ipv4) {
 803                 memset(&ipv4, 0, sizeof(ipv4));
 804                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 805                 ipv4.hdr.time_to_live = 0xFF;
 806                 ipv4_mask.hdr.time_to_live = 0xFF;
 807                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 808                 item.spec = &ipv4;
 809                 item.mask = &ipv4_mask;
 810                 field = modify_ipv4;
 811         } else {
 812                 MLX5_ASSERT(attr->ipv6);
 813                 memset(&ipv6, 0, sizeof(ipv6));
 814                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 815                 ipv6.hdr.hop_limits = 0xFF;
 816                 ipv6_mask.hdr.hop_limits = 0xFF;
 817                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 818                 item.spec = &ipv6;
 819                 item.mask = &ipv6_mask;
 820                 field = modify_ipv6;
 821         }
 822         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 823                                              MLX5_MODIFICATION_TYPE_ADD, error);
 824 }
 825
 826 /**
 827  * Convert modify-header increment/decrement TCP Sequence number
 828  * to DV specification.
 829  *
 830  * @param[in,out] resource
 831  *   Pointer to the modify-header resource.
 832  * @param[in] action
 833  *   Pointer to action specification.
 834  * @param[out] error
 835  *   Pointer to the error structure.
 836  *
 837  * @return
 838  *   0 on success, a negative errno value otherwise and rte_errno is set.
 839  */
 840 static int
 841 flow_dv_convert_action_modify_tcp_seq
 842                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 843                          const struct rte_flow_action *action,
 844                          struct rte_flow_error *error)
 845 {
 846         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 847         uint64_t value = rte_be_to_cpu_32(*conf);
 848         struct rte_flow_item item;
 849         struct rte_flow_item_tcp tcp;
 850         struct rte_flow_item_tcp tcp_mask;
 851
 852         memset(&tcp, 0, sizeof(tcp));
 853         memset(&tcp_mask, 0, sizeof(tcp_mask));
 854         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 855                 /*
 856                  * The HW has no decrement operation, only increment operation.
 857                  * To simulate decrement X from Y using increment operation
 858                  * we need to add UINT32_MAX X times to Y.
 859                  * Each adding of UINT32_MAX decrements Y by 1.
 860                  */
 861                 value *= UINT32_MAX;
 862         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 863         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 864         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 865         item.spec = &tcp;
 866         item.mask = &tcp_mask;
 867         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 868                                              MLX5_MODIFICATION_TYPE_ADD, error);
 869 }
 870
 871 /**
 872  * Convert modify-header increment/decrement TCP Acknowledgment number
 873  * to DV specification.
 874  *
 875  * @param[in,out] resource
 876  *   Pointer to the modify-header resource.
 877  * @param[in] action
 878  *   Pointer to action specification.
 879  * @param[out] error
 880  *   Pointer to the error structure.
 881  *
 882  * @return
 883  *   0 on success, a negative errno value otherwise and rte_errno is set.
 884  */
 885 static int
 886 flow_dv_convert_action_modify_tcp_ack
 887                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 888                          const struct rte_flow_action *action,
 889                          struct rte_flow_error *error)
 890 {
 891         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 892         uint64_t value = rte_be_to_cpu_32(*conf);
 893         struct rte_flow_item item;
 894         struct rte_flow_item_tcp tcp;
 895         struct rte_flow_item_tcp tcp_mask;
 896
 897         memset(&tcp, 0, sizeof(tcp));
 898         memset(&tcp_mask, 0, sizeof(tcp_mask));
 899         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 900                 /*
 901                  * The HW has no decrement operation, only increment operation.
 902                  * To simulate decrement X from Y using increment operation
 903                  * we need to add UINT32_MAX X times to Y.
 904                  * Each adding of UINT32_MAX decrements Y by 1.
 905                  */
 906                 value *= UINT32_MAX;
 907         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 908         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 909         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 910         item.spec = &tcp;
 911         item.mask = &tcp_mask;
 912         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 913                                              MLX5_MODIFICATION_TYPE_ADD, error);
 914 }
 915
 916 static enum mlx5_modification_field reg_to_field[] = {
 917         [REG_NON] = MLX5_MODI_OUT_NONE,
 918         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 919         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 920         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 921         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 922         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 923         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 924         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 925         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 926         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 927         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 928 };
 929
 930 /**
 931  * Convert register set to DV specification.
 932  *
 933  * @param[in,out] resource
 934  *   Pointer to the modify-header resource.
 935  * @param[in] action
 936  *   Pointer to action specification.
 937  * @param[out] error
 938  *   Pointer to the error structure.
 939  *
 940  * @return
 941  *   0 on success, a negative errno value otherwise and rte_errno is set.
 942  */
 943 static int
 944 flow_dv_convert_action_set_reg
 945                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 946                          const struct rte_flow_action *action,
 947                          struct rte_flow_error *error)
 948 {
 949         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 950         struct mlx5_modification_cmd *actions = resource->actions;
 951         uint32_t i = resource->actions_num;
 952
 953         if (i >= MLX5_MAX_MODIFY_NUM)
 954                 return rte_flow_error_set(error, EINVAL,
 955                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 956                                           "too many items to modify");
 957         MLX5_ASSERT(conf->id != REG_NON);
 958         MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field));
 959         actions[i] = (struct mlx5_modification_cmd) {
 960                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 961                 .field = reg_to_field[conf->id],
 962         };
 963         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 964         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 965         ++i;
 966         resource->actions_num = i;
 967         return 0;
 968 }
 969
 970 /**
 971  * Convert SET_TAG action to DV specification.
 972  *
 973  * @param[in] dev
 974  *   Pointer to the rte_eth_dev structure.
 975  * @param[in,out] resource
 976  *   Pointer to the modify-header resource.
 977  * @param[in] conf
 978  *   Pointer to action specification.
 979  * @param[out] error
 980  *   Pointer to the error structure.
 981  *
 982  * @return
 983  *   0 on success, a negative errno value otherwise and rte_errno is set.
 984  */
 985 static int
 986 flow_dv_convert_action_set_tag
 987                         (struct rte_eth_dev *dev,
 988                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 989                          const struct rte_flow_action_set_tag *conf,
 990                          struct rte_flow_error *error)
 991 {
 992         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 993         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 994         struct rte_flow_item item = {
 995                 .spec = &data,
 996                 .mask = &mask,
 997         };
 998         struct field_modify_info reg_c_x[] = {
 999                 [1] = {0, 0, 0},
1000         };
1001         enum mlx5_modification_field reg_type;
1002         int ret;
1003
1004         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1005         if (ret < 0)
1006                 return ret;
1007         MLX5_ASSERT(ret != REG_NON);
1008         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1009         reg_type = reg_to_field[ret];
1010         MLX5_ASSERT(reg_type > 0);
1011         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1012         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1013                                              MLX5_MODIFICATION_TYPE_SET, error);
1014 }
1015
1016 /**
1017  * Convert internal COPY_REG action to DV specification.
1018  *
1019  * @param[in] dev
1020  *   Pointer to the rte_eth_dev structure.
1021  * @param[in,out] res
1022  *   Pointer to the modify-header resource.
1023  * @param[in] action
1024  *   Pointer to action specification.
1025  * @param[out] error
1026  *   Pointer to the error structure.
1027  *
1028  * @return
1029  *   0 on success, a negative errno value otherwise and rte_errno is set.
1030  */
1031 static int
1032 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1033                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1034                                  const struct rte_flow_action *action,
1035                                  struct rte_flow_error *error)
1036 {
1037         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1038         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1039         struct rte_flow_item item = {
1040                 .spec = NULL,
1041                 .mask = &mask,
1042         };
1043         struct field_modify_info reg_src[] = {
1044                 {4, 0, reg_to_field[conf->src]},
1045                 {0, 0, 0},
1046         };
1047         struct field_modify_info reg_dst = {
1048                 .offset = 0,
1049                 .id = reg_to_field[conf->dst],
1050         };
1051         /* Adjust reg_c[0] usage according to reported mask. */
1052         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1053                 struct mlx5_priv *priv = dev->data->dev_private;
1054                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1055
1056                 MLX5_ASSERT(reg_c0);
1057                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1058                 if (conf->dst == REG_C_0) {
1059                         /* Copy to reg_c[0], within mask only. */
1060                         reg_dst.offset = rte_bsf32(reg_c0);
1061                         /*
1062                          * Mask is ignoring the enianness, because
1063                          * there is no conversion in datapath.
1064                          */
1065 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1066                         /* Copy from destination lower bits to reg_c[0]. */
1067                         mask = reg_c0 >> reg_dst.offset;
1068 #else
1069                         /* Copy from destination upper bits to reg_c[0]. */
1070                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1071                                           rte_fls_u32(reg_c0));
1072 #endif
1073                 } else {
1074                         mask = rte_cpu_to_be_32(reg_c0);
1075 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1076                         /* Copy from reg_c[0] to destination lower bits. */
1077                         reg_dst.offset = 0;
1078 #else
1079                         /* Copy from reg_c[0] to destination upper bits. */
1080                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1081                                          (rte_fls_u32(reg_c0) -
1082                                           rte_bsf32(reg_c0));
1083 #endif
1084                 }
1085         }
1086         return flow_dv_convert_modify_action(&item,
1087                                              reg_src, &reg_dst, res,
1088                                              MLX5_MODIFICATION_TYPE_COPY,
1089                                              error);
1090 }
1091
1092 /**
1093  * Convert MARK action to DV specification. This routine is used
1094  * in extensive metadata only and requires metadata register to be
1095  * handled. In legacy mode hardware tag resource is engaged.
1096  *
1097  * @param[in] dev
1098  *   Pointer to the rte_eth_dev structure.
1099  * @param[in] conf
1100  *   Pointer to MARK action specification.
1101  * @param[in,out] resource
1102  *   Pointer to the modify-header resource.
1103  * @param[out] error
1104  *   Pointer to the error structure.
1105  *
1106  * @return
1107  *   0 on success, a negative errno value otherwise and rte_errno is set.
1108  */
1109 static int
1110 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1111                             const struct rte_flow_action_mark *conf,
1112                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1113                             struct rte_flow_error *error)
1114 {
1115         struct mlx5_priv *priv = dev->data->dev_private;
1116         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1117                                            priv->sh->dv_mark_mask);
1118         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1119         struct rte_flow_item item = {
1120                 .spec = &data,
1121                 .mask = &mask,
1122         };
1123         struct field_modify_info reg_c_x[] = {
1124                 [1] = {0, 0, 0},
1125         };
1126         int reg;
1127
1128         if (!mask)
1129                 return rte_flow_error_set(error, EINVAL,
1130                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1131                                           NULL, "zero mark action mask");
1132         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1133         if (reg < 0)
1134                 return reg;
1135         MLX5_ASSERT(reg > 0);
1136         if (reg == REG_C_0) {
1137                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1138                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1139
1140                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1141                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1142                 mask = rte_cpu_to_be_32(mask << shl_c0);
1143         }
1144         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1145         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1146                                              MLX5_MODIFICATION_TYPE_SET, error);
1147 }
1148
1149 /**
1150  * Get metadata register index for specified steering domain.
1151  *
1152  * @param[in] dev
1153  *   Pointer to the rte_eth_dev structure.
1154  * @param[in] attr
1155  *   Attributes of flow to determine steering domain.
1156  * @param[out] error
1157  *   Pointer to the error structure.
1158  *
1159  * @return
1160  *   positive index on success, a negative errno value otherwise
1161  *   and rte_errno is set.
1162  */
1163 static enum modify_reg
1164 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1165                          const struct rte_flow_attr *attr,
1166                          struct rte_flow_error *error)
1167 {
1168         int reg =
1169                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1170                                           MLX5_METADATA_FDB :
1171                                             attr->egress ?
1172                                             MLX5_METADATA_TX :
1173                                             MLX5_METADATA_RX, 0, error);
1174         if (reg < 0)
1175                 return rte_flow_error_set(error,
1176                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1177                                           NULL, "unavailable "
1178                                           "metadata register");
1179         return reg;
1180 }
1181
1182 /**
1183  * Convert SET_META action to DV specification.
1184  *
1185  * @param[in] dev
1186  *   Pointer to the rte_eth_dev structure.
1187  * @param[in,out] resource
1188  *   Pointer to the modify-header resource.
1189  * @param[in] attr
1190  *   Attributes of flow that includes this item.
1191  * @param[in] conf
1192  *   Pointer to action specification.
1193  * @param[out] error
1194  *   Pointer to the error structure.
1195  *
1196  * @return
1197  *   0 on success, a negative errno value otherwise and rte_errno is set.
1198  */
1199 static int
1200 flow_dv_convert_action_set_meta
1201                         (struct rte_eth_dev *dev,
1202                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1203                          const struct rte_flow_attr *attr,
1204                          const struct rte_flow_action_set_meta *conf,
1205                          struct rte_flow_error *error)
1206 {
1207         uint32_t data = conf->data;
1208         uint32_t mask = conf->mask;
1209         struct rte_flow_item item = {
1210                 .spec = &data,
1211                 .mask = &mask,
1212         };
1213         struct field_modify_info reg_c_x[] = {
1214                 [1] = {0, 0, 0},
1215         };
1216         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1217
1218         if (reg < 0)
1219                 return reg;
1220         /*
1221          * In datapath code there is no endianness
1222          * coversions for perfromance reasons, all
1223          * pattern conversions are done in rte_flow.
1224          */
1225         if (reg == REG_C_0) {
1226                 struct mlx5_priv *priv = dev->data->dev_private;
1227                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1228                 uint32_t shl_c0;
1229
1230                 MLX5_ASSERT(msk_c0);
1231 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1232                 shl_c0 = rte_bsf32(msk_c0);
1233 #else
1234                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1235 #endif
1236                 mask <<= shl_c0;
1237                 data <<= shl_c0;
1238                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1239         }
1240         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1241         /* The routine expects parameters in memory as big-endian ones. */
1242         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1243                                              MLX5_MODIFICATION_TYPE_SET, error);
1244 }
1245
1246 /**
1247  * Convert modify-header set IPv4 DSCP action to DV specification.
1248  *
1249  * @param[in,out] resource
1250  *   Pointer to the modify-header resource.
1251  * @param[in] action
1252  *   Pointer to action specification.
1253  * @param[out] error
1254  *   Pointer to the error structure.
1255  *
1256  * @return
1257  *   0 on success, a negative errno value otherwise and rte_errno is set.
1258  */
1259 static int
1260 flow_dv_convert_action_modify_ipv4_dscp
1261                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1262                          const struct rte_flow_action *action,
1263                          struct rte_flow_error *error)
1264 {
1265         const struct rte_flow_action_set_dscp *conf =
1266                 (const struct rte_flow_action_set_dscp *)(action->conf);
1267         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1268         struct rte_flow_item_ipv4 ipv4;
1269         struct rte_flow_item_ipv4 ipv4_mask;
1270
1271         memset(&ipv4, 0, sizeof(ipv4));
1272         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1273         ipv4.hdr.type_of_service = conf->dscp;
1274         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1275         item.spec = &ipv4;
1276         item.mask = &ipv4_mask;
1277         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1278                                              MLX5_MODIFICATION_TYPE_SET, error);
1279 }
1280
1281 /**
1282  * Convert modify-header set IPv6 DSCP action to DV specification.
1283  *
1284  * @param[in,out] resource
1285  *   Pointer to the modify-header resource.
1286  * @param[in] action
1287  *   Pointer to action specification.
1288  * @param[out] error
1289  *   Pointer to the error structure.
1290  *
1291  * @return
1292  *   0 on success, a negative errno value otherwise and rte_errno is set.
1293  */
1294 static int
1295 flow_dv_convert_action_modify_ipv6_dscp
1296                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1297                          const struct rte_flow_action *action,
1298                          struct rte_flow_error *error)
1299 {
1300         const struct rte_flow_action_set_dscp *conf =
1301                 (const struct rte_flow_action_set_dscp *)(action->conf);
1302         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1303         struct rte_flow_item_ipv6 ipv6;
1304         struct rte_flow_item_ipv6 ipv6_mask;
1305
1306         memset(&ipv6, 0, sizeof(ipv6));
1307         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1308         /*
1309          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1310          * rdma-core only accept the DSCP bits byte aligned start from
1311          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1312          * bits in IPv6 case as rdma-core requires byte aligned value.
1313          */
1314         ipv6.hdr.vtc_flow = conf->dscp;
1315         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1316         item.spec = &ipv6;
1317         item.mask = &ipv6_mask;
1318         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1319                                              MLX5_MODIFICATION_TYPE_SET, error);
1320 }
1321
1322 /**
1323  * Validate MARK item.
1324  *
1325  * @param[in] dev
1326  *   Pointer to the rte_eth_dev structure.
1327  * @param[in] item
1328  *   Item specification.
1329  * @param[in] attr
1330  *   Attributes of flow that includes this item.
1331  * @param[out] error
1332  *   Pointer to error structure.
1333  *
1334  * @return
1335  *   0 on success, a negative errno value otherwise and rte_errno is set.
1336  */
1337 static int
1338 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1339                            const struct rte_flow_item *item,
1340                            const struct rte_flow_attr *attr __rte_unused,
1341                            struct rte_flow_error *error)
1342 {
1343         struct mlx5_priv *priv = dev->data->dev_private;
1344         struct mlx5_dev_config *config = &priv->config;
1345         const struct rte_flow_item_mark *spec = item->spec;
1346         const struct rte_flow_item_mark *mask = item->mask;
1347         const struct rte_flow_item_mark nic_mask = {
1348                 .id = priv->sh->dv_mark_mask,
1349         };
1350         int ret;
1351
1352         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1353                 return rte_flow_error_set(error, ENOTSUP,
1354                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1355                                           "extended metadata feature"
1356                                           " isn't enabled");
1357         if (!mlx5_flow_ext_mreg_supported(dev))
1358                 return rte_flow_error_set(error, ENOTSUP,
1359                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1360                                           "extended metadata register"
1361                                           " isn't supported");
1362         if (!nic_mask.id)
1363                 return rte_flow_error_set(error, ENOTSUP,
1364                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1365                                           "extended metadata register"
1366                                           " isn't available");
1367         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1368         if (ret < 0)
1369                 return ret;
1370         if (!spec)
1371                 return rte_flow_error_set(error, EINVAL,
1372                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1373                                           item->spec,
1374                                           "data cannot be empty");
1375         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1376                 return rte_flow_error_set(error, EINVAL,
1377                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1378                                           &spec->id,
1379                                           "mark id exceeds the limit");
1380         if (!mask)
1381                 mask = &nic_mask;
1382         if (!mask->id)
1383                 return rte_flow_error_set(error, EINVAL,
1384                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1385                                         "mask cannot be zero");
1386
1387         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1388                                         (const uint8_t *)&nic_mask,
1389                                         sizeof(struct rte_flow_item_mark),
1390                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1391         if (ret < 0)
1392                 return ret;
1393         return 0;
1394 }
1395
1396 /**
1397  * Validate META item.
1398  *
1399  * @param[in] dev
1400  *   Pointer to the rte_eth_dev structure.
1401  * @param[in] item
1402  *   Item specification.
1403  * @param[in] attr
1404  *   Attributes of flow that includes this item.
1405  * @param[out] error
1406  *   Pointer to error structure.
1407  *
1408  * @return
1409  *   0 on success, a negative errno value otherwise and rte_errno is set.
1410  */
1411 static int
1412 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1413                            const struct rte_flow_item *item,
1414                            const struct rte_flow_attr *attr,
1415                            struct rte_flow_error *error)
1416 {
1417         struct mlx5_priv *priv = dev->data->dev_private;
1418         struct mlx5_dev_config *config = &priv->config;
1419         const struct rte_flow_item_meta *spec = item->spec;
1420         const struct rte_flow_item_meta *mask = item->mask;
1421         struct rte_flow_item_meta nic_mask = {
1422                 .data = UINT32_MAX
1423         };
1424         int reg;
1425         int ret;
1426
1427         if (!spec)
1428                 return rte_flow_error_set(error, EINVAL,
1429                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1430                                           item->spec,
1431                                           "data cannot be empty");
1432         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1433                 if (!mlx5_flow_ext_mreg_supported(dev))
1434                         return rte_flow_error_set(error, ENOTSUP,
1435                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1436                                           "extended metadata register"
1437                                           " isn't supported");
1438                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1439                 if (reg < 0)
1440                         return reg;
1441                 if (reg == REG_B)
1442                         return rte_flow_error_set(error, ENOTSUP,
1443                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1444                                           "match on reg_b "
1445                                           "isn't supported");
1446                 if (reg != REG_A)
1447                         nic_mask.data = priv->sh->dv_meta_mask;
1448         } else if (attr->transfer) {
1449                 return rte_flow_error_set(error, ENOTSUP,
1450                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
1451                                         "extended metadata feature "
1452                                         "should be enabled when "
1453                                         "meta item is requested "
1454                                         "with e-switch mode ");
1455         }
1456         if (!mask)
1457                 mask = &rte_flow_item_meta_mask;
1458         if (!mask->data)
1459                 return rte_flow_error_set(error, EINVAL,
1460                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1461                                         "mask cannot be zero");
1462
1463         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1464                                         (const uint8_t *)&nic_mask,
1465                                         sizeof(struct rte_flow_item_meta),
1466                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1467         return ret;
1468 }
1469
1470 /**
1471  * Validate TAG item.
1472  *
1473  * @param[in] dev
1474  *   Pointer to the rte_eth_dev structure.
1475  * @param[in] item
1476  *   Item specification.
1477  * @param[in] attr
1478  *   Attributes of flow that includes this item.
1479  * @param[out] error
1480  *   Pointer to error structure.
1481  *
1482  * @return
1483  *   0 on success, a negative errno value otherwise and rte_errno is set.
1484  */
1485 static int
1486 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1487                           const struct rte_flow_item *item,
1488                           const struct rte_flow_attr *attr __rte_unused,
1489                           struct rte_flow_error *error)
1490 {
1491         const struct rte_flow_item_tag *spec = item->spec;
1492         const struct rte_flow_item_tag *mask = item->mask;
1493         const struct rte_flow_item_tag nic_mask = {
1494                 .data = RTE_BE32(UINT32_MAX),
1495                 .index = 0xff,
1496         };
1497         int ret;
1498
1499         if (!mlx5_flow_ext_mreg_supported(dev))
1500                 return rte_flow_error_set(error, ENOTSUP,
1501                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1502                                           "extensive metadata register"
1503                                           " isn't supported");
1504         if (!spec)
1505                 return rte_flow_error_set(error, EINVAL,
1506                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1507                                           item->spec,
1508                                           "data cannot be empty");
1509         if (!mask)
1510                 mask = &rte_flow_item_tag_mask;
1511         if (!mask->data)
1512                 return rte_flow_error_set(error, EINVAL,
1513                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1514                                         "mask cannot be zero");
1515
1516         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1517                                         (const uint8_t *)&nic_mask,
1518                                         sizeof(struct rte_flow_item_tag),
1519                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1520         if (ret < 0)
1521                 return ret;
1522         if (mask->index != 0xff)
1523                 return rte_flow_error_set(error, EINVAL,
1524                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1525                                           "partial mask for tag index"
1526                                           " is not supported");
1527         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1528         if (ret < 0)
1529                 return ret;
1530         MLX5_ASSERT(ret != REG_NON);
1531         return 0;
1532 }
1533
1534 /**
1535  * Validate vport item.
1536  *
1537  * @param[in] dev
1538  *   Pointer to the rte_eth_dev structure.
1539  * @param[in] item
1540  *   Item specification.
1541  * @param[in] attr
1542  *   Attributes of flow that includes this item.
1543  * @param[in] item_flags
1544  *   Bit-fields that holds the items detected until now.
1545  * @param[out] error
1546  *   Pointer to error structure.
1547  *
1548  * @return
1549  *   0 on success, a negative errno value otherwise and rte_errno is set.
1550  */
1551 static int
1552 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1553                               const struct rte_flow_item *item,
1554                               const struct rte_flow_attr *attr,
1555                               uint64_t item_flags,
1556                               struct rte_flow_error *error)
1557 {
1558         const struct rte_flow_item_port_id *spec = item->spec;
1559         const struct rte_flow_item_port_id *mask = item->mask;
1560         const struct rte_flow_item_port_id switch_mask = {
1561                         .id = 0xffffffff,
1562         };
1563         struct mlx5_priv *esw_priv;
1564         struct mlx5_priv *dev_priv;
1565         int ret;
1566
1567         if (!attr->transfer)
1568                 return rte_flow_error_set(error, EINVAL,
1569                                           RTE_FLOW_ERROR_TYPE_ITEM,
1570                                           NULL,
1571                                           "match on port id is valid only"
1572                                           " when transfer flag is enabled");
1573         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1574                 return rte_flow_error_set(error, ENOTSUP,
1575                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1576                                           "multiple source ports are not"
1577                                           " supported");
1578         if (!mask)
1579                 mask = &switch_mask;
1580         if (mask->id != 0xffffffff)
1581                 return rte_flow_error_set(error, ENOTSUP,
1582                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1583                                            mask,
1584                                            "no support for partial mask on"
1585                                            " \"id\" field");
1586         ret = mlx5_flow_item_acceptable
1587                                 (item, (const uint8_t *)mask,
1588                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1589                                  sizeof(struct rte_flow_item_port_id),
1590                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1591         if (ret)
1592                 return ret;
1593         if (!spec)
1594                 return 0;
1595         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1596         if (!esw_priv)
1597                 return rte_flow_error_set(error, rte_errno,
1598                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1599                                           "failed to obtain E-Switch info for"
1600                                           " port");
1601         dev_priv = mlx5_dev_to_eswitch_info(dev);
1602         if (!dev_priv)
1603                 return rte_flow_error_set(error, rte_errno,
1604                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1605                                           NULL,
1606                                           "failed to obtain E-Switch info");
1607         if (esw_priv->domain_id != dev_priv->domain_id)
1608                 return rte_flow_error_set(error, EINVAL,
1609                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1610                                           "cannot match on a port from a"
1611                                           " different E-Switch");
1612         return 0;
1613 }
1614
1615 /**
1616  * Validate VLAN item.
1617  *
1618  * @param[in] item
1619  *   Item specification.
1620  * @param[in] item_flags
1621  *   Bit-fields that holds the items detected until now.
1622  * @param[in] dev
1623  *   Ethernet device flow is being created on.
1624  * @param[out] error
1625  *   Pointer to error structure.
1626  *
1627  * @return
1628  *   0 on success, a negative errno value otherwise and rte_errno is set.
1629  */
1630 static int
1631 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
1632                            uint64_t item_flags,
1633                            struct rte_eth_dev *dev,
1634                            struct rte_flow_error *error)
1635 {
1636         const struct rte_flow_item_vlan *mask = item->mask;
1637         const struct rte_flow_item_vlan nic_mask = {
1638                 .tci = RTE_BE16(UINT16_MAX),
1639                 .inner_type = RTE_BE16(UINT16_MAX),
1640                 .has_more_vlan = 1,
1641         };
1642         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1643         int ret;
1644         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1645                                         MLX5_FLOW_LAYER_INNER_L4) :
1646                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1647                                         MLX5_FLOW_LAYER_OUTER_L4);
1648         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1649                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1650
1651         if (item_flags & vlanm)
1652                 return rte_flow_error_set(error, EINVAL,
1653                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1654                                           "multiple VLAN layers not supported");
1655         else if ((item_flags & l34m) != 0)
1656                 return rte_flow_error_set(error, EINVAL,
1657                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1658                                           "VLAN cannot follow L3/L4 layer");
1659         if (!mask)
1660                 mask = &rte_flow_item_vlan_mask;
1661         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1662                                         (const uint8_t *)&nic_mask,
1663                                         sizeof(struct rte_flow_item_vlan),
1664                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1665         if (ret)
1666                 return ret;
1667         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1668                 struct mlx5_priv *priv = dev->data->dev_private;
1669
1670                 if (priv->vmwa_context) {
1671                         /*
1672                          * Non-NULL context means we have a virtual machine
1673                          * and SR-IOV enabled, we have to create VLAN interface
1674                          * to make hypervisor to setup E-Switch vport
1675                          * context correctly. We avoid creating the multiple
1676                          * VLAN interfaces, so we cannot support VLAN tag mask.
1677                          */
1678                         return rte_flow_error_set(error, EINVAL,
1679                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1680                                                   item,
1681                                                   "VLAN tag mask is not"
1682                                                   " supported in virtual"
1683                                                   " environment");
1684                 }
1685         }
1686         return 0;
1687 }
1688
1689 /*
1690  * GTP flags are contained in 1 byte of the format:
1691  * -------------------------------------------
1692  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
1693  * |-----------------------------------------|
1694  * | value | Version | PT | Res | E | S | PN |
1695  * -------------------------------------------
1696  *
1697  * Matching is supported only for GTP flags E, S, PN.
1698  */
1699 #define MLX5_GTP_FLAGS_MASK     0x07
1700
1701 /**
1702  * Validate GTP item.
1703  *
1704  * @param[in] dev
1705  *   Pointer to the rte_eth_dev structure.
1706  * @param[in] item
1707  *   Item specification.
1708  * @param[in] item_flags
1709  *   Bit-fields that holds the items detected until now.
1710  * @param[out] error
1711  *   Pointer to error structure.
1712  *
1713  * @return
1714  *   0 on success, a negative errno value otherwise and rte_errno is set.
1715  */
1716 static int
1717 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1718                           const struct rte_flow_item *item,
1719                           uint64_t item_flags,
1720                           struct rte_flow_error *error)
1721 {
1722         struct mlx5_priv *priv = dev->data->dev_private;
1723         const struct rte_flow_item_gtp *spec = item->spec;
1724         const struct rte_flow_item_gtp *mask = item->mask;
1725         const struct rte_flow_item_gtp nic_mask = {
1726                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
1727                 .msg_type = 0xff,
1728                 .teid = RTE_BE32(0xffffffff),
1729         };
1730
1731         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1732                 return rte_flow_error_set(error, ENOTSUP,
1733                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1734                                           "GTP support is not enabled");
1735         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1736                 return rte_flow_error_set(error, ENOTSUP,
1737                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1738                                           "multiple tunnel layers not"
1739                                           " supported");
1740         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1741                 return rte_flow_error_set(error, EINVAL,
1742                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1743                                           "no outer UDP layer found");
1744         if (!mask)
1745                 mask = &rte_flow_item_gtp_mask;
1746         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
1747                 return rte_flow_error_set(error, ENOTSUP,
1748                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1749                                           "Match is supported for GTP"
1750                                           " flags only");
1751         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1752                                          (const uint8_t *)&nic_mask,
1753                                          sizeof(struct rte_flow_item_gtp),
1754                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1755 }
1756
1757 /**
1758  * Validate IPV4 item.
1759  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
1760  * add specific validation of fragment_offset field,
1761  *
1762  * @param[in] item
1763  *   Item specification.
1764  * @param[in] item_flags
1765  *   Bit-fields that holds the items detected until now.
1766  * @param[out] error
1767  *   Pointer to error structure.
1768  *
1769  * @return
1770  *   0 on success, a negative errno value otherwise and rte_errno is set.
1771  */
1772 static int
1773 flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
1774                            uint64_t item_flags,
1775                            uint64_t last_item,
1776                            uint16_t ether_type,
1777                            struct rte_flow_error *error)
1778 {
1779         int ret;
1780         const struct rte_flow_item_ipv4 *spec = item->spec;
1781         const struct rte_flow_item_ipv4 *last = item->last;
1782         const struct rte_flow_item_ipv4 *mask = item->mask;
1783         rte_be16_t fragment_offset_spec = 0;
1784         rte_be16_t fragment_offset_last = 0;
1785         const struct rte_flow_item_ipv4 nic_ipv4_mask = {
1786                 .hdr = {
1787                         .src_addr = RTE_BE32(0xffffffff),
1788                         .dst_addr = RTE_BE32(0xffffffff),
1789                         .type_of_service = 0xff,
1790                         .fragment_offset = RTE_BE16(0xffff),
1791                         .next_proto_id = 0xff,
1792                         .time_to_live = 0xff,
1793                 },
1794         };
1795
1796         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
1797                                            ether_type, &nic_ipv4_mask,
1798                                            MLX5_ITEM_RANGE_ACCEPTED, error);
1799         if (ret < 0)
1800                 return ret;
1801         if (spec && mask)
1802                 fragment_offset_spec = spec->hdr.fragment_offset &
1803                                        mask->hdr.fragment_offset;
1804         if (!fragment_offset_spec)
1805                 return 0;
1806         /*
1807          * spec and mask are valid, enforce using full mask to make sure the
1808          * complete value is used correctly.
1809          */
1810         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
1811                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
1812                 return rte_flow_error_set(error, EINVAL,
1813                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1814                                           item, "must use full mask for"
1815                                           " fragment_offset");
1816         /*
1817          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
1818          * indicating this is 1st fragment of fragmented packet.
1819          * This is not yet supported in MLX5, return appropriate error message.
1820          */
1821         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
1822                 return rte_flow_error_set(error, ENOTSUP,
1823                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1824                                           "match on first fragment not "
1825                                           "supported");
1826         if (fragment_offset_spec && !last)
1827                 return rte_flow_error_set(error, ENOTSUP,
1828                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1829                                           "specified value not supported");
1830         /* spec and last are valid, validate the specified range. */
1831         fragment_offset_last = last->hdr.fragment_offset &
1832                                mask->hdr.fragment_offset;
1833         /*
1834          * Match on fragment_offset spec 0x2001 and last 0x3fff
1835          * means MF is 1 and frag-offset is > 0.
1836          * This packet is fragment 2nd and onward, excluding last.
1837          * This is not yet supported in MLX5, return appropriate
1838          * error message.
1839          */
1840         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
1841             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
1842                 return rte_flow_error_set(error, ENOTSUP,
1843                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1844                                           last, "match on following "
1845                                           "fragments not supported");
1846         /*
1847          * Match on fragment_offset spec 0x0001 and last 0x1fff
1848          * means MF is 0 and frag-offset is > 0.
1849          * This packet is last fragment of fragmented packet.
1850          * This is not yet supported in MLX5, return appropriate
1851          * error message.
1852          */
1853         if (fragment_offset_spec == RTE_BE16(1) &&
1854             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
1855                 return rte_flow_error_set(error, ENOTSUP,
1856                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1857                                           last, "match on last "
1858                                           "fragment not supported");
1859         /*
1860          * Match on fragment_offset spec 0x0001 and last 0x3fff
1861          * means MF and/or frag-offset is not 0.
1862          * This is a fragmented packet.
1863          * Other range values are invalid and rejected.
1864          */
1865         if (!(fragment_offset_spec == RTE_BE16(1) &&
1866               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
1867                 return rte_flow_error_set(error, ENOTSUP,
1868                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
1869                                           "specified range not supported");
1870         return 0;
1871 }
1872
1873 /**
1874  * Validate IPV6 fragment extension item.
1875  *
1876  * @param[in] item
1877  *   Item specification.
1878  * @param[in] item_flags
1879  *   Bit-fields that holds the items detected until now.
1880  * @param[out] error
1881  *   Pointer to error structure.
1882  *
1883  * @return
1884  *   0 on success, a negative errno value otherwise and rte_errno is set.
1885  */
1886 static int
1887 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
1888                                     uint64_t item_flags,
1889                                     struct rte_flow_error *error)
1890 {
1891         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
1892         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
1893         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
1894         rte_be16_t frag_data_spec = 0;
1895         rte_be16_t frag_data_last = 0;
1896         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1897         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1898                                       MLX5_FLOW_LAYER_OUTER_L4;
1899         int ret = 0;
1900         struct rte_flow_item_ipv6_frag_ext nic_mask = {
1901                 .hdr = {
1902                         .next_header = 0xff,
1903                         .frag_data = RTE_BE16(0xffff),
1904                 },
1905         };
1906
1907         if (item_flags & l4m)
1908                 return rte_flow_error_set(error, EINVAL,
1909                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1910                                           "ipv6 fragment extension item cannot "
1911                                           "follow L4 item.");
1912         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
1913             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
1914                 return rte_flow_error_set(error, EINVAL,
1915                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1916                                           "ipv6 fragment extension item must "
1917                                           "follow ipv6 item");
1918         if (spec && mask)
1919                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
1920         if (!frag_data_spec)
1921                 return 0;
1922         /*
1923          * spec and mask are valid, enforce using full mask to make sure the
1924          * complete value is used correctly.
1925          */
1926         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
1927                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
1928                 return rte_flow_error_set(error, EINVAL,
1929                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1930                                           item, "must use full mask for"
1931                                           " frag_data");
1932         /*
1933          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
1934          * This is 1st fragment of fragmented packet.
1935          */
1936         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
1937                 return rte_flow_error_set(error, ENOTSUP,
1938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1939                                           "match on first fragment not "
1940                                           "supported");
1941         if (frag_data_spec && !last)
1942                 return rte_flow_error_set(error, EINVAL,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1944                                           "specified value not supported");
1945         ret = mlx5_flow_item_acceptable
1946                                 (item, (const uint8_t *)mask,
1947                                  (const uint8_t *)&nic_mask,
1948                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
1949                                  MLX5_ITEM_RANGE_ACCEPTED, error);
1950         if (ret)
1951                 return ret;
1952         /* spec and last are valid, validate the specified range. */
1953         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
1954         /*
1955          * Match on frag_data spec 0x0009 and last 0xfff9
1956          * means M is 1 and frag-offset is > 0.
1957          * This packet is fragment 2nd and onward, excluding last.
1958          * This is not yet supported in MLX5, return appropriate
1959          * error message.
1960          */
1961         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
1962                                        RTE_IPV6_EHDR_MF_MASK) &&
1963             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
1964                 return rte_flow_error_set(error, ENOTSUP,
1965                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1966                                           last, "match on following "
1967                                           "fragments not supported");
1968         /*
1969          * Match on frag_data spec 0x0008 and last 0xfff8
1970          * means M is 0 and frag-offset is > 0.
1971          * This packet is last fragment of fragmented packet.
1972          * This is not yet supported in MLX5, return appropriate
1973          * error message.
1974          */
1975         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
1976             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
1977                 return rte_flow_error_set(error, ENOTSUP,
1978                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
1979                                           last, "match on last "
1980                                           "fragment not supported");
1981         /* Other range values are invalid and rejected. */
1982         return rte_flow_error_set(error, EINVAL,
1983                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
1984                                   "specified range not supported");
1985 }
1986
1987 /**
1988  * Validate the pop VLAN action.
1989  *
1990  * @param[in] dev
1991  *   Pointer to the rte_eth_dev structure.
1992  * @param[in] action_flags
1993  *   Holds the actions detected until now.
1994  * @param[in] action
1995  *   Pointer to the pop vlan action.
1996  * @param[in] item_flags
1997  *   The items found in this flow rule.
1998  * @param[in] attr
1999  *   Pointer to flow attributes.
2000  * @param[out] error
2001  *   Pointer to error structure.
2002  *
2003  * @return
2004  *   0 on success, a negative errno value otherwise and rte_errno is set.
2005  */
2006 static int
2007 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2008                                  uint64_t action_flags,
2009                                  const struct rte_flow_action *action,
2010                                  uint64_t item_flags,
2011                                  const struct rte_flow_attr *attr,
2012                                  struct rte_flow_error *error)
2013 {
2014         const struct mlx5_priv *priv = dev->data->dev_private;
2015
2016         (void)action;
2017         (void)attr;
2018         if (!priv->sh->pop_vlan_action)
2019                 return rte_flow_error_set(error, ENOTSUP,
2020                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2021                                           NULL,
2022                                           "pop vlan action is not supported");
2023         if (attr->egress)
2024                 return rte_flow_error_set(error, ENOTSUP,
2025                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2026                                           NULL,
2027                                           "pop vlan action not supported for "
2028                                           "egress");
2029         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2030                 return rte_flow_error_set(error, ENOTSUP,
2031                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2032                                           "no support for multiple VLAN "
2033                                           "actions");
2034         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2035         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2036             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2037                 return rte_flow_error_set(error, ENOTSUP,
2038                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2039                                           NULL,
2040                                           "cannot pop vlan after decap without "
2041                                           "match on inner vlan in the flow");
2042         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2043         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2044             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2045                 return rte_flow_error_set(error, ENOTSUP,
2046                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2047                                           NULL,
2048                                           "cannot pop vlan without a "
2049                                           "match on (outer) vlan in the flow");
2050         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2051                 return rte_flow_error_set(error, EINVAL,
2052                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2053                                           "wrong action order, port_id should "
2054                                           "be after pop VLAN action");
2055         if (!attr->transfer && priv->representor)
2056                 return rte_flow_error_set(error, ENOTSUP,
2057                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2058                                           "pop vlan action for VF representor "
2059                                           "not supported on NIC table");
2060         return 0;
2061 }
2062
2063 /**
2064  * Get VLAN default info from vlan match info.
2065  *
2066  * @param[in] items
2067  *   the list of item specifications.
2068  * @param[out] vlan
2069  *   pointer VLAN info to fill to.
2070  *
2071  * @return
2072  *   0 on success, a negative errno value otherwise and rte_errno is set.
2073  */
2074 static void
2075 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2076                                   struct rte_vlan_hdr *vlan)
2077 {
2078         const struct rte_flow_item_vlan nic_mask = {
2079                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2080                                 MLX5DV_FLOW_VLAN_VID_MASK),
2081                 .inner_type = RTE_BE16(0xffff),
2082         };
2083
2084         if (items == NULL)
2085                 return;
2086         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2087                 int type = items->type;
2088
2089                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2090                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2091                         break;
2092         }
2093         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2094                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2095                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2096
2097                 /* If VLAN item in pattern doesn't contain data, return here. */
2098                 if (!vlan_v)
2099                         return;
2100                 if (!vlan_m)
2101                         vlan_m = &nic_mask;
2102                 /* Only full match values are accepted */
2103                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2104                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2105                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2106                         vlan->vlan_tci |=
2107                                 rte_be_to_cpu_16(vlan_v->tci &
2108                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2109                 }
2110                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2111                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2112                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2113                         vlan->vlan_tci |=
2114                                 rte_be_to_cpu_16(vlan_v->tci &
2115                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2116                 }
2117                 if (vlan_m->inner_type == nic_mask.inner_type)
2118                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2119                                                            vlan_m->inner_type);
2120         }
2121 }
2122
2123 /**
2124  * Validate the push VLAN action.
2125  *
2126  * @param[in] dev
2127  *   Pointer to the rte_eth_dev structure.
2128  * @param[in] action_flags
2129  *   Holds the actions detected until now.
2130  * @param[in] item_flags
2131  *   The items found in this flow rule.
2132  * @param[in] action
2133  *   Pointer to the action structure.
2134  * @param[in] attr
2135  *   Pointer to flow attributes
2136  * @param[out] error
2137  *   Pointer to error structure.
2138  *
2139  * @return
2140  *   0 on success, a negative errno value otherwise and rte_errno is set.
2141  */
2142 static int
2143 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2144                                   uint64_t action_flags,
2145                                   const struct rte_flow_item_vlan *vlan_m,
2146                                   const struct rte_flow_action *action,
2147                                   const struct rte_flow_attr *attr,
2148                                   struct rte_flow_error *error)
2149 {
2150         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2151         const struct mlx5_priv *priv = dev->data->dev_private;
2152
2153         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2154             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2155                 return rte_flow_error_set(error, EINVAL,
2156                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2157                                           "invalid vlan ethertype");
2158         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2159                 return rte_flow_error_set(error, EINVAL,
2160                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2161                                           "wrong action order, port_id should "
2162                                           "be after push VLAN");
2163         if (!attr->transfer && priv->representor)
2164                 return rte_flow_error_set(error, ENOTSUP,
2165                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2166                                           "push vlan action for VF representor "
2167                                           "not supported on NIC table");
2168         if (vlan_m &&
2169             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2170             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2171                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2172             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2173             !(mlx5_flow_find_action
2174                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2175                 return rte_flow_error_set(error, EINVAL,
2176                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2177                                           "not full match mask on VLAN PCP and "
2178                                           "there is no of_set_vlan_pcp action, "
2179                                           "push VLAN action cannot figure out "
2180                                           "PCP value");
2181         if (vlan_m &&
2182             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2183             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2184                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2185             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2186             !(mlx5_flow_find_action
2187                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2188                 return rte_flow_error_set(error, EINVAL,
2189                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2190                                           "not full match mask on VLAN VID and "
2191                                           "there is no of_set_vlan_vid action, "
2192                                           "push VLAN action cannot figure out "
2193                                           "VID value");
2194         (void)attr;
2195         return 0;
2196 }
2197
2198 /**
2199  * Validate the set VLAN PCP.
2200  *
2201  * @param[in] action_flags
2202  *   Holds the actions detected until now.
2203  * @param[in] actions
2204  *   Pointer to the list of actions remaining in the flow rule.
2205  * @param[out] error
2206  *   Pointer to error structure.
2207  *
2208  * @return
2209  *   0 on success, a negative errno value otherwise and rte_errno is set.
2210  */
2211 static int
2212 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2213                                      const struct rte_flow_action actions[],
2214                                      struct rte_flow_error *error)
2215 {
2216         const struct rte_flow_action *action = actions;
2217         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2218
2219         if (conf->vlan_pcp > 7)
2220                 return rte_flow_error_set(error, EINVAL,
2221                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2222                                           "VLAN PCP value is too big");
2223         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2224                 return rte_flow_error_set(error, ENOTSUP,
2225                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2226                                           "set VLAN PCP action must follow "
2227                                           "the push VLAN action");
2228         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2229                 return rte_flow_error_set(error, ENOTSUP,
2230                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2231                                           "Multiple VLAN PCP modification are "
2232                                           "not supported");
2233         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2234                 return rte_flow_error_set(error, EINVAL,
2235                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2236                                           "wrong action order, port_id should "
2237                                           "be after set VLAN PCP");
2238         return 0;
2239 }
2240
2241 /**
2242  * Validate the set VLAN VID.
2243  *
2244  * @param[in] item_flags
2245  *   Holds the items detected in this rule.
2246  * @param[in] action_flags
2247  *   Holds the actions detected until now.
2248  * @param[in] actions
2249  *   Pointer to the list of actions remaining in the flow rule.
2250  * @param[out] error
2251  *   Pointer to error structure.
2252  *
2253  * @return
2254  *   0 on success, a negative errno value otherwise and rte_errno is set.
2255  */
2256 static int
2257 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2258                                      uint64_t action_flags,
2259                                      const struct rte_flow_action actions[],
2260                                      struct rte_flow_error *error)
2261 {
2262         const struct rte_flow_action *action = actions;
2263         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
2264
2265         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
2266                 return rte_flow_error_set(error, EINVAL,
2267                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2268                                           "VLAN VID value is too big");
2269         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
2270             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2271                 return rte_flow_error_set(error, ENOTSUP,
2272                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2273                                           "set VLAN VID action must follow push"
2274                                           " VLAN action or match on VLAN item");
2275         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
2276                 return rte_flow_error_set(error, ENOTSUP,
2277                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2278                                           "Multiple VLAN VID modifications are "
2279                                           "not supported");
2280         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2281                 return rte_flow_error_set(error, EINVAL,
2282                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2283                                           "wrong action order, port_id should "
2284                                           "be after set VLAN VID");
2285         return 0;
2286 }
2287
2288 /*
2289  * Validate the FLAG action.
2290  *
2291  * @param[in] dev
2292  *   Pointer to the rte_eth_dev structure.
2293  * @param[in] action_flags
2294  *   Holds the actions detected until now.
2295  * @param[in] attr
2296  *   Pointer to flow attributes
2297  * @param[out] error
2298  *   Pointer to error structure.
2299  *
2300  * @return
2301  *   0 on success, a negative errno value otherwise and rte_errno is set.
2302  */
2303 static int
2304 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
2305                              uint64_t action_flags,
2306                              const struct rte_flow_attr *attr,
2307                              struct rte_flow_error *error)
2308 {
2309         struct mlx5_priv *priv = dev->data->dev_private;
2310         struct mlx5_dev_config *config = &priv->config;
2311         int ret;
2312
2313         /* Fall back if no extended metadata register support. */
2314         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2315                 return mlx5_flow_validate_action_flag(action_flags, attr,
2316                                                       error);
2317         /* Extensive metadata mode requires registers. */
2318         if (!mlx5_flow_ext_mreg_supported(dev))
2319                 return rte_flow_error_set(error, ENOTSUP,
2320                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2321                                           "no metadata registers "
2322                                           "to support flag action");
2323         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
2324                 return rte_flow_error_set(error, ENOTSUP,
2325                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2326                                           "extended metadata register"
2327                                           " isn't available");
2328         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2329         if (ret < 0)
2330                 return ret;
2331         MLX5_ASSERT(ret > 0);
2332         if (action_flags & MLX5_FLOW_ACTION_MARK)
2333                 return rte_flow_error_set(error, EINVAL,
2334                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2335                                           "can't mark and flag in same flow");
2336         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2337                 return rte_flow_error_set(error, EINVAL,
2338                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2339                                           "can't have 2 flag"
2340                                           " actions in same flow");
2341         return 0;
2342 }
2343
2344 /**
2345  * Validate MARK action.
2346  *
2347  * @param[in] dev
2348  *   Pointer to the rte_eth_dev structure.
2349  * @param[in] action
2350  *   Pointer to action.
2351  * @param[in] action_flags
2352  *   Holds the actions detected until now.
2353  * @param[in] attr
2354  *   Pointer to flow attributes
2355  * @param[out] error
2356  *   Pointer to error structure.
2357  *
2358  * @return
2359  *   0 on success, a negative errno value otherwise and rte_errno is set.
2360  */
2361 static int
2362 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
2363                              const struct rte_flow_action *action,
2364                              uint64_t action_flags,
2365                              const struct rte_flow_attr *attr,
2366                              struct rte_flow_error *error)
2367 {
2368         struct mlx5_priv *priv = dev->data->dev_private;
2369         struct mlx5_dev_config *config = &priv->config;
2370         const struct rte_flow_action_mark *mark = action->conf;
2371         int ret;
2372
2373         /* Fall back if no extended metadata register support. */
2374         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2375                 return mlx5_flow_validate_action_mark(action, action_flags,
2376                                                       attr, error);
2377         /* Extensive metadata mode requires registers. */
2378         if (!mlx5_flow_ext_mreg_supported(dev))
2379                 return rte_flow_error_set(error, ENOTSUP,
2380                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2381                                           "no metadata registers "
2382                                           "to support mark action");
2383         if (!priv->sh->dv_mark_mask)
2384                 return rte_flow_error_set(error, ENOTSUP,
2385                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2386                                           "extended metadata register"
2387                                           " isn't available");
2388         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2389         if (ret < 0)
2390                 return ret;
2391         MLX5_ASSERT(ret > 0);
2392         if (!mark)
2393                 return rte_flow_error_set(error, EINVAL,
2394                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2395                                           "configuration cannot be null");
2396         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
2397                 return rte_flow_error_set(error, EINVAL,
2398                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2399                                           &mark->id,
2400                                           "mark id exceeds the limit");
2401         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2402                 return rte_flow_error_set(error, EINVAL,
2403                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2404                                           "can't flag and mark in same flow");
2405         if (action_flags & MLX5_FLOW_ACTION_MARK)
2406                 return rte_flow_error_set(error, EINVAL,
2407                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2408                                           "can't have 2 mark actions in same"
2409                                           " flow");
2410         return 0;
2411 }
2412
2413 /**
2414  * Validate SET_META action.
2415  *
2416  * @param[in] dev
2417  *   Pointer to the rte_eth_dev structure.
2418  * @param[in] action
2419  *   Pointer to the action structure.
2420  * @param[in] action_flags
2421  *   Holds the actions detected until now.
2422  * @param[in] attr
2423  *   Pointer to flow attributes
2424  * @param[out] error
2425  *   Pointer to error structure.
2426  *
2427  * @return
2428  *   0 on success, a negative errno value otherwise and rte_errno is set.
2429  */
2430 static int
2431 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2432                                  const struct rte_flow_action *action,
2433                                  uint64_t action_flags __rte_unused,
2434                                  const struct rte_flow_attr *attr,
2435                                  struct rte_flow_error *error)
2436 {
2437         const struct rte_flow_action_set_meta *conf;
2438         uint32_t nic_mask = UINT32_MAX;
2439         int reg;
2440
2441         if (!mlx5_flow_ext_mreg_supported(dev))
2442                 return rte_flow_error_set(error, ENOTSUP,
2443                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2444                                           "extended metadata register"
2445                                           " isn't supported");
2446         reg = flow_dv_get_metadata_reg(dev, attr, error);
2447         if (reg < 0)
2448                 return reg;
2449         if (reg != REG_A && reg != REG_B) {
2450                 struct mlx5_priv *priv = dev->data->dev_private;
2451
2452                 nic_mask = priv->sh->dv_meta_mask;
2453         }
2454         if (!(action->conf))
2455                 return rte_flow_error_set(error, EINVAL,
2456                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2457                                           "configuration cannot be null");
2458         conf = (const struct rte_flow_action_set_meta *)action->conf;
2459         if (!conf->mask)
2460                 return rte_flow_error_set(error, EINVAL,
2461                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2462                                           "zero mask doesn't have any effect");
2463         if (conf->mask & ~nic_mask)
2464                 return rte_flow_error_set(error, EINVAL,
2465                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2466                                           "meta data must be within reg C0");
2467         return 0;
2468 }
2469
2470 /**
2471  * Validate SET_TAG action.
2472  *
2473  * @param[in] dev
2474  *   Pointer to the rte_eth_dev structure.
2475  * @param[in] action
2476  *   Pointer to the action structure.
2477  * @param[in] action_flags
2478  *   Holds the actions detected until now.
2479  * @param[in] attr
2480  *   Pointer to flow attributes
2481  * @param[out] error
2482  *   Pointer to error structure.
2483  *
2484  * @return
2485  *   0 on success, a negative errno value otherwise and rte_errno is set.
2486  */
2487 static int
2488 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2489                                 const struct rte_flow_action *action,
2490                                 uint64_t action_flags,
2491                                 const struct rte_flow_attr *attr,
2492                                 struct rte_flow_error *error)
2493 {
2494         const struct rte_flow_action_set_tag *conf;
2495         const uint64_t terminal_action_flags =
2496                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2497                 MLX5_FLOW_ACTION_RSS;
2498         int ret;
2499
2500         if (!mlx5_flow_ext_mreg_supported(dev))
2501                 return rte_flow_error_set(error, ENOTSUP,
2502                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2503                                           "extensive metadata register"
2504                                           " isn't supported");
2505         if (!(action->conf))
2506                 return rte_flow_error_set(error, EINVAL,
2507                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2508                                           "configuration cannot be null");
2509         conf = (const struct rte_flow_action_set_tag *)action->conf;
2510         if (!conf->mask)
2511                 return rte_flow_error_set(error, EINVAL,
2512                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2513                                           "zero mask doesn't have any effect");
2514         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2515         if (ret < 0)
2516                 return ret;
2517         if (!attr->transfer && attr->ingress &&
2518             (action_flags & terminal_action_flags))
2519                 return rte_flow_error_set(error, EINVAL,
2520                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2521                                           "set_tag has no effect"
2522                                           " with terminal actions");
2523         return 0;
2524 }
2525
2526 /**
2527  * Validate count action.
2528  *
2529  * @param[in] dev
2530  *   Pointer to rte_eth_dev structure.
2531  * @param[out] error
2532  *   Pointer to error structure.
2533  *
2534  * @return
2535  *   0 on success, a negative errno value otherwise and rte_errno is set.
2536  */
2537 static int
2538 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2539                               struct rte_flow_error *error)
2540 {
2541         struct mlx5_priv *priv = dev->data->dev_private;
2542
2543         if (!priv->config.devx)
2544                 goto notsup_err;
2545 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2546         return 0;
2547 #endif
2548 notsup_err:
2549         return rte_flow_error_set
2550                       (error, ENOTSUP,
2551                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2552                        NULL,
2553                        "count action not supported");
2554 }
2555
2556 /**
2557  * Validate the L2 encap action.
2558  *
2559  * @param[in] dev
2560  *   Pointer to the rte_eth_dev structure.
2561  * @param[in] action_flags
2562  *   Holds the actions detected until now.
2563  * @param[in] action
2564  *   Pointer to the action structure.
2565  * @param[in] attr
2566  *   Pointer to flow attributes.
2567  * @param[out] error
2568  *   Pointer to error structure.
2569  *
2570  * @return
2571  *   0 on success, a negative errno value otherwise and rte_errno is set.
2572  */
2573 static int
2574 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
2575                                  uint64_t action_flags,
2576                                  const struct rte_flow_action *action,
2577                                  const struct rte_flow_attr *attr,
2578                                  struct rte_flow_error *error)
2579 {
2580         const struct mlx5_priv *priv = dev->data->dev_private;
2581
2582         if (!(action->conf))
2583                 return rte_flow_error_set(error, EINVAL,
2584                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2585                                           "configuration cannot be null");
2586         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
2587                 return rte_flow_error_set(error, EINVAL,
2588                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2589                                           "can only have a single encap action "
2590                                           "in a flow");
2591         if (!attr->transfer && priv->representor)
2592                 return rte_flow_error_set(error, ENOTSUP,
2593                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2594                                           "encap action for VF representor "
2595                                           "not supported on NIC table");
2596         return 0;
2597 }
2598
2599 /**
2600  * Validate a decap action.
2601  *
2602  * @param[in] dev
2603  *   Pointer to the rte_eth_dev structure.
2604  * @param[in] action_flags
2605  *   Holds the actions detected until now.
2606  * @param[in] attr
2607  *   Pointer to flow attributes
2608  * @param[out] error
2609  *   Pointer to error structure.
2610  *
2611  * @return
2612  *   0 on success, a negative errno value otherwise and rte_errno is set.
2613  */
2614 static int
2615 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
2616                               uint64_t action_flags,
2617                               const struct rte_flow_attr *attr,
2618                               struct rte_flow_error *error)
2619 {
2620         const struct mlx5_priv *priv = dev->data->dev_private;
2621
2622         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
2623             !priv->config.decap_en)
2624                 return rte_flow_error_set(error, ENOTSUP,
2625                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2626                                           "decap is not enabled");
2627         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
2628                 return rte_flow_error_set(error, ENOTSUP,
2629                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2630                                           action_flags &
2631                                           MLX5_FLOW_ACTION_DECAP ? "can only "
2632                                           "have a single decap action" : "decap "
2633                                           "after encap is not supported");
2634         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2635                 return rte_flow_error_set(error, EINVAL,
2636                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2637                                           "can't have decap action after"
2638                                           " modify action");
2639         if (attr->egress)
2640                 return rte_flow_error_set(error, ENOTSUP,
2641                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2642                                           NULL,
2643                                           "decap action not supported for "
2644                                           "egress");
2645         if (!attr->transfer && priv->representor)
2646                 return rte_flow_error_set(error, ENOTSUP,
2647                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2648                                           "decap action for VF representor "
2649                                           "not supported on NIC table");
2650         return 0;
2651 }
2652
2653 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
2654
2655 /**
2656  * Validate the raw encap and decap actions.
2657  *
2658  * @param[in] dev
2659  *   Pointer to the rte_eth_dev structure.
2660  * @param[in] decap
2661  *   Pointer to the decap action.
2662  * @param[in] encap
2663  *   Pointer to the encap action.
2664  * @param[in] attr
2665  *   Pointer to flow attributes
2666  * @param[in/out] action_flags
2667  *   Holds the actions detected until now.
2668  * @param[out] actions_n
2669  *   pointer to the number of actions counter.
2670  * @param[out] error
2671  *   Pointer to error structure.
2672  *
2673  * @return
2674  *   0 on success, a negative errno value otherwise and rte_errno is set.
2675  */
2676 static int
2677 flow_dv_validate_action_raw_encap_decap
2678         (struct rte_eth_dev *dev,
2679          const struct rte_flow_action_raw_decap *decap,
2680          const struct rte_flow_action_raw_encap *encap,
2681          const struct rte_flow_attr *attr, uint64_t *action_flags,
2682          int *actions_n, struct rte_flow_error *error)
2683 {
2684         const struct mlx5_priv *priv = dev->data->dev_private;
2685         int ret;
2686
2687         if (encap && (!encap->size || !encap->data))
2688                 return rte_flow_error_set(error, EINVAL,
2689                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2690                                           "raw encap data cannot be empty");
2691         if (decap && encap) {
2692                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
2693                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2694                         /* L3 encap. */
2695                         decap = NULL;
2696                 else if (encap->size <=
2697                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2698                            decap->size >
2699                            MLX5_ENCAPSULATION_DECISION_SIZE)
2700                         /* L3 decap. */
2701                         encap = NULL;
2702                 else if (encap->size >
2703                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2704                            decap->size >
2705                            MLX5_ENCAPSULATION_DECISION_SIZE)
2706                         /* 2 L2 actions: encap and decap. */
2707                         ;
2708                 else
2709                         return rte_flow_error_set(error,
2710                                 ENOTSUP,
2711                                 RTE_FLOW_ERROR_TYPE_ACTION,
2712                                 NULL, "unsupported too small "
2713                                 "raw decap and too small raw "
2714                                 "encap combination");
2715         }
2716         if (decap) {
2717                 ret = flow_dv_validate_action_decap(dev, *action_flags, attr,
2718                                                     error);
2719                 if (ret < 0)
2720                         return ret;
2721                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
2722                 ++(*actions_n);
2723         }
2724         if (encap) {
2725                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
2726                         return rte_flow_error_set(error, ENOTSUP,
2727                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2728                                                   NULL,
2729                                                   "small raw encap size");
2730                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
2731                         return rte_flow_error_set(error, EINVAL,
2732                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2733                                                   NULL,
2734                                                   "more than one encap action");
2735                 if (!attr->transfer && priv->representor)
2736                         return rte_flow_error_set
2737                                         (error, ENOTSUP,
2738                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2739                                          "encap action for VF representor "
2740                                          "not supported on NIC table");
2741                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
2742                 ++(*actions_n);
2743         }
2744         return 0;
2745 }
2746
2747 /**
2748  * Match encap_decap resource.
2749  *
2750  * @param list
2751  *   Pointer to the hash list.
2752  * @param entry
2753  *   Pointer to exist resource entry object.
2754  * @param key
2755  *   Key of the new entry.
2756  * @param ctx_cb
2757  *   Pointer to new encap_decap resource.
2758  *
2759  * @return
2760  *   0 on matching, none-zero otherwise.
2761  */
2762 int
2763 flow_dv_encap_decap_match_cb(struct mlx5_hlist *list __rte_unused,
2764                              struct mlx5_hlist_entry *entry,
2765                              uint64_t key __rte_unused, void *cb_ctx)
2766 {
2767         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2768         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
2769         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2770
2771         cache_resource = container_of(entry,
2772                                       struct mlx5_flow_dv_encap_decap_resource,
2773                                       entry);
2774         if (resource->entry.key == cache_resource->entry.key &&
2775             resource->reformat_type == cache_resource->reformat_type &&
2776             resource->ft_type == cache_resource->ft_type &&
2777             resource->flags == cache_resource->flags &&
2778             resource->size == cache_resource->size &&
2779             !memcmp((const void *)resource->buf,
2780                     (const void *)cache_resource->buf,
2781                     resource->size))
2782                 return 0;
2783         return -1;
2784 }
2785
2786 /**
2787  * Allocate encap_decap resource.
2788  *
2789  * @param list
2790  *   Pointer to the hash list.
2791  * @param entry
2792  *   Pointer to exist resource entry object.
2793  * @param ctx_cb
2794  *   Pointer to new encap_decap resource.
2795  *
2796  * @return
2797  *   0 on matching, none-zero otherwise.
2798  */
2799 struct mlx5_hlist_entry *
2800 flow_dv_encap_decap_create_cb(struct mlx5_hlist *list,
2801                               uint64_t key __rte_unused,
2802                               void *cb_ctx)
2803 {
2804         struct mlx5_dev_ctx_shared *sh = list->ctx;
2805         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2806         struct mlx5dv_dr_domain *domain;
2807         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
2808         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2809         uint32_t idx;
2810         int ret;
2811
2812         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2813                 domain = sh->fdb_domain;
2814         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2815                 domain = sh->rx_domain;
2816         else
2817                 domain = sh->tx_domain;
2818         /* Register new encap/decap resource. */
2819         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
2820                                        &idx);
2821         if (!cache_resource) {
2822                 rte_flow_error_set(ctx->error, ENOMEM,
2823                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2824                                    "cannot allocate resource memory");
2825                 return NULL;
2826         }
2827         *cache_resource = *resource;
2828         cache_resource->idx = idx;
2829         ret = mlx5_flow_os_create_flow_action_packet_reformat
2830                                         (sh->ctx, domain, cache_resource,
2831                                          &cache_resource->action);
2832         if (ret) {
2833                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
2834                 rte_flow_error_set(ctx->error, ENOMEM,
2835                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2836                                    NULL, "cannot create action");
2837                 return NULL;
2838         }
2839
2840         return &cache_resource->entry;
2841 }
2842
2843 /**
2844  * Find existing encap/decap resource or create and register a new one.
2845  *
2846  * @param[in, out] dev
2847  *   Pointer to rte_eth_dev structure.
2848  * @param[in, out] resource
2849  *   Pointer to encap/decap resource.
2850  * @parm[in, out] dev_flow
2851  *   Pointer to the dev_flow.
2852  * @param[out] error
2853  *   pointer to error structure.
2854  *
2855  * @return
2856  *   0 on success otherwise -errno and errno is set.
2857  */
2858 static int
2859 flow_dv_encap_decap_resource_register
2860                         (struct rte_eth_dev *dev,
2861                          struct mlx5_flow_dv_encap_decap_resource *resource,
2862                          struct mlx5_flow *dev_flow,
2863                          struct rte_flow_error *error)
2864 {
2865         struct mlx5_priv *priv = dev->data->dev_private;
2866         struct mlx5_dev_ctx_shared *sh = priv->sh;
2867         struct mlx5_hlist_entry *entry;
2868         union mlx5_flow_encap_decap_key encap_decap_key = {
2869                 {
2870                         .ft_type = resource->ft_type,
2871                         .refmt_type = resource->reformat_type,
2872                         .buf_size = resource->size,
2873                         .table_level = !!dev_flow->dv.group,
2874                         .cksum = 0,
2875                 }
2876         };
2877         struct mlx5_flow_cb_ctx ctx = {
2878                 .error = error,
2879                 .data = resource,
2880         };
2881
2882         resource->flags = dev_flow->dv.group ? 0 : 1;
2883         encap_decap_key.cksum = __rte_raw_cksum(resource->buf,
2884                                                 resource->size, 0);
2885         resource->entry.key = encap_decap_key.v64;
2886         entry = mlx5_hlist_register(sh->encaps_decaps, resource->entry.key,
2887                                     &ctx);
2888         if (!entry)
2889                 return -rte_errno;
2890         resource = container_of(entry, typeof(*resource), entry);
2891         dev_flow->dv.encap_decap = resource;
2892         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
2893         return 0;
2894 }
2895
2896 /**
2897  * Find existing table jump resource or create and register a new one.
2898  *
2899  * @param[in, out] dev
2900  *   Pointer to rte_eth_dev structure.
2901  * @param[in, out] tbl
2902  *   Pointer to flow table resource.
2903  * @parm[in, out] dev_flow
2904  *   Pointer to the dev_flow.
2905  * @param[out] error
2906  *   pointer to error structure.
2907  *
2908  * @return
2909  *   0 on success otherwise -errno and errno is set.
2910  */
2911 static int
2912 flow_dv_jump_tbl_resource_register
2913                         (struct rte_eth_dev *dev __rte_unused,
2914                          struct mlx5_flow_tbl_resource *tbl,
2915                          struct mlx5_flow *dev_flow,
2916                          struct rte_flow_error *error __rte_unused)
2917 {
2918         struct mlx5_flow_tbl_data_entry *tbl_data =
2919                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2920
2921         MLX5_ASSERT(tbl);
2922         MLX5_ASSERT(tbl_data->jump.action);
2923         dev_flow->handle->rix_jump = tbl_data->idx;
2924         dev_flow->dv.jump = &tbl_data->jump;
2925         return 0;
2926 }
2927
2928 int
2929 flow_dv_port_id_match_cb(struct mlx5_cache_list *list __rte_unused,
2930                          struct mlx5_cache_entry *entry, void *cb_ctx)
2931 {
2932         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2933         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
2934         struct mlx5_flow_dv_port_id_action_resource *res =
2935                         container_of(entry, typeof(*res), entry);
2936
2937         return ref->port_id != res->port_id;
2938 }
2939
2940 struct mlx5_cache_entry *
2941 flow_dv_port_id_create_cb(struct mlx5_cache_list *list,
2942                           struct mlx5_cache_entry *entry __rte_unused,
2943                           void *cb_ctx)
2944 {
2945         struct mlx5_dev_ctx_shared *sh = list->ctx;
2946         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2947         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
2948         struct mlx5_flow_dv_port_id_action_resource *cache;
2949         uint32_t idx;
2950         int ret;
2951
2952         /* Register new port id action resource. */
2953         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
2954         if (!cache) {
2955                 rte_flow_error_set(ctx->error, ENOMEM,
2956                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2957                                    "cannot allocate port_id action cache memory");
2958                 return NULL;
2959         }
2960         *cache = *ref;
2961         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
2962                                                         ref->port_id,
2963                                                         &cache->action);
2964         if (ret) {
2965                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
2966                 rte_flow_error_set(ctx->error, ENOMEM,
2967                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2968                                    "cannot create action");
2969                 return NULL;
2970         }
2971         return &cache->entry;
2972 }
2973
2974 /**
2975  * Find existing table port ID resource or create and register a new one.
2976  *
2977  * @param[in, out] dev
2978  *   Pointer to rte_eth_dev structure.
2979  * @param[in, out] resource
2980  *   Pointer to port ID action resource.
2981  * @parm[in, out] dev_flow
2982  *   Pointer to the dev_flow.
2983  * @param[out] error
2984  *   pointer to error structure.
2985  *
2986  * @return
2987  *   0 on success otherwise -errno and errno is set.
2988  */
2989 static int
2990 flow_dv_port_id_action_resource_register
2991                         (struct rte_eth_dev *dev,
2992                          struct mlx5_flow_dv_port_id_action_resource *resource,
2993                          struct mlx5_flow *dev_flow,
2994                          struct rte_flow_error *error)
2995 {
2996         struct mlx5_priv *priv = dev->data->dev_private;
2997         struct mlx5_cache_entry *entry;
2998         struct mlx5_flow_dv_port_id_action_resource *cache;
2999         struct mlx5_flow_cb_ctx ctx = {
3000                 .error = error,
3001                 .data = resource,
3002         };
3003
3004         entry = mlx5_cache_register(&priv->sh->port_id_action_list, &ctx);
3005         if (!entry)
3006                 return -rte_errno;
3007         cache = container_of(entry, typeof(*cache), entry);
3008         dev_flow->dv.port_id_action = cache;
3009         dev_flow->handle->rix_port_id_action = cache->idx;
3010         return 0;
3011 }
3012
3013 int
3014 flow_dv_push_vlan_match_cb(struct mlx5_cache_list *list __rte_unused,
3015                          struct mlx5_cache_entry *entry, void *cb_ctx)
3016 {
3017         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3018         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3019         struct mlx5_flow_dv_push_vlan_action_resource *res =
3020                         container_of(entry, typeof(*res), entry);
3021
3022         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3023 }
3024
3025 struct mlx5_cache_entry *
3026 flow_dv_push_vlan_create_cb(struct mlx5_cache_list *list,
3027                           struct mlx5_cache_entry *entry __rte_unused,
3028                           void *cb_ctx)
3029 {
3030         struct mlx5_dev_ctx_shared *sh = list->ctx;
3031         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3032         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3033         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3034         struct mlx5dv_dr_domain *domain;
3035         uint32_t idx;
3036         int ret;
3037
3038         /* Register new port id action resource. */
3039         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3040         if (!cache) {
3041                 rte_flow_error_set(ctx->error, ENOMEM,
3042                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3043                                    "cannot allocate push_vlan action cache memory");
3044                 return NULL;
3045         }
3046         *cache = *ref;
3047         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3048                 domain = sh->fdb_domain;
3049         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3050                 domain = sh->rx_domain;
3051         else
3052                 domain = sh->tx_domain;
3053         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3054                                                         &cache->action);
3055         if (ret) {
3056                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3057                 rte_flow_error_set(ctx->error, ENOMEM,
3058                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3059                                    "cannot create push vlan action");
3060                 return NULL;
3061         }
3062         return &cache->entry;
3063 }
3064
3065 /**
3066  * Find existing push vlan resource or create and register a new one.
3067  *
3068  * @param [in, out] dev
3069  *   Pointer to rte_eth_dev structure.
3070  * @param[in, out] resource
3071  *   Pointer to port ID action resource.
3072  * @parm[in, out] dev_flow
3073  *   Pointer to the dev_flow.
3074  * @param[out] error
3075  *   pointer to error structure.
3076  *
3077  * @return
3078  *   0 on success otherwise -errno and errno is set.
3079  */
3080 static int
3081 flow_dv_push_vlan_action_resource_register
3082                        (struct rte_eth_dev *dev,
3083                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
3084                         struct mlx5_flow *dev_flow,
3085                         struct rte_flow_error *error)
3086 {
3087         struct mlx5_priv *priv = dev->data->dev_private;
3088         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3089         struct mlx5_cache_entry *entry;
3090         struct mlx5_flow_cb_ctx ctx = {
3091                 .error = error,
3092                 .data = resource,
3093         };
3094
3095         entry = mlx5_cache_register(&priv->sh->push_vlan_action_list, &ctx);
3096         if (!entry)
3097                 return -rte_errno;
3098         cache = container_of(entry, typeof(*cache), entry);
3099
3100         dev_flow->handle->dvh.rix_push_vlan = cache->idx;
3101         dev_flow->dv.push_vlan_res = cache;
3102         return 0;
3103 }
3104
3105 /**
3106  * Get the size of specific rte_flow_item_type hdr size
3107  *
3108  * @param[in] item_type
3109  *   Tested rte_flow_item_type.
3110  *
3111  * @return
3112  *   sizeof struct item_type, 0 if void or irrelevant.
3113  */
3114 static size_t
3115 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
3116 {
3117         size_t retval;
3118
3119         switch (item_type) {
3120         case RTE_FLOW_ITEM_TYPE_ETH:
3121                 retval = sizeof(struct rte_ether_hdr);
3122                 break;
3123         case RTE_FLOW_ITEM_TYPE_VLAN:
3124                 retval = sizeof(struct rte_vlan_hdr);
3125                 break;
3126         case RTE_FLOW_ITEM_TYPE_IPV4:
3127                 retval = sizeof(struct rte_ipv4_hdr);
3128                 break;
3129         case RTE_FLOW_ITEM_TYPE_IPV6:
3130                 retval = sizeof(struct rte_ipv6_hdr);
3131                 break;
3132         case RTE_FLOW_ITEM_TYPE_UDP:
3133                 retval = sizeof(struct rte_udp_hdr);
3134                 break;
3135         case RTE_FLOW_ITEM_TYPE_TCP:
3136                 retval = sizeof(struct rte_tcp_hdr);
3137                 break;
3138         case RTE_FLOW_ITEM_TYPE_VXLAN:
3139         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3140                 retval = sizeof(struct rte_vxlan_hdr);
3141                 break;
3142         case RTE_FLOW_ITEM_TYPE_GRE:
3143         case RTE_FLOW_ITEM_TYPE_NVGRE:
3144                 retval = sizeof(struct rte_gre_hdr);
3145                 break;
3146         case RTE_FLOW_ITEM_TYPE_MPLS:
3147                 retval = sizeof(struct rte_mpls_hdr);
3148                 break;
3149         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
3150         default:
3151                 retval = 0;
3152                 break;
3153         }
3154         return retval;
3155 }
3156
3157 #define MLX5_ENCAP_IPV4_VERSION         0x40
3158 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
3159 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
3160 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
3161 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
3162 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
3163 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
3164
3165 /**
3166  * Convert the encap action data from list of rte_flow_item to raw buffer
3167  *
3168  * @param[in] items
3169  *   Pointer to rte_flow_item objects list.
3170  * @param[out] buf
3171  *   Pointer to the output buffer.
3172  * @param[out] size
3173  *   Pointer to the output buffer size.
3174  * @param[out] error
3175  *   Pointer to the error structure.
3176  *
3177  * @return
3178  *   0 on success, a negative errno value otherwise and rte_errno is set.
3179  */
3180 static int
3181 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
3182                            size_t *size, struct rte_flow_error *error)
3183 {
3184         struct rte_ether_hdr *eth = NULL;
3185         struct rte_vlan_hdr *vlan = NULL;
3186         struct rte_ipv4_hdr *ipv4 = NULL;
3187         struct rte_ipv6_hdr *ipv6 = NULL;
3188         struct rte_udp_hdr *udp = NULL;
3189         struct rte_vxlan_hdr *vxlan = NULL;
3190         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
3191         struct rte_gre_hdr *gre = NULL;
3192         size_t len;
3193         size_t temp_size = 0;
3194
3195         if (!items)
3196                 return rte_flow_error_set(error, EINVAL,
3197                                           RTE_FLOW_ERROR_TYPE_ACTION,
3198                                           NULL, "invalid empty data");
3199         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3200                 len = flow_dv_get_item_hdr_len(items->type);
3201                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
3202                         return rte_flow_error_set(error, EINVAL,
3203                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3204                                                   (void *)items->type,
3205                                                   "items total size is too big"
3206                                                   " for encap action");
3207                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
3208                 switch (items->type) {
3209                 case RTE_FLOW_ITEM_TYPE_ETH:
3210                         eth = (struct rte_ether_hdr *)&buf[temp_size];
3211                         break;
3212                 case RTE_FLOW_ITEM_TYPE_VLAN:
3213                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
3214                         if (!eth)
3215                                 return rte_flow_error_set(error, EINVAL,
3216                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3217                                                 (void *)items->type,
3218                                                 "eth header not found");
3219                         if (!eth->ether_type)
3220                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
3221                         break;
3222                 case RTE_FLOW_ITEM_TYPE_IPV4:
3223                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
3224                         if (!vlan && !eth)
3225                                 return rte_flow_error_set(error, EINVAL,
3226                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3227                                                 (void *)items->type,
3228                                                 "neither eth nor vlan"
3229                                                 " header found");
3230                         if (vlan && !vlan->eth_proto)
3231                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
3232                         else if (eth && !eth->ether_type)
3233                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
3234                         if (!ipv4->version_ihl)
3235                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
3236                                                     MLX5_ENCAP_IPV4_IHL_MIN;
3237                         if (!ipv4->time_to_live)
3238                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
3239                         break;
3240                 case RTE_FLOW_ITEM_TYPE_IPV6:
3241                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
3242                         if (!vlan && !eth)
3243                                 return rte_flow_error_set(error, EINVAL,
3244                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3245                                                 (void *)items->type,
3246                                                 "neither eth nor vlan"
3247                                                 " header found");
3248                         if (vlan && !vlan->eth_proto)
3249                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
3250                         else if (eth && !eth->ether_type)
3251                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
3252                         if (!ipv6->vtc_flow)
3253                                 ipv6->vtc_flow =
3254                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
3255                         if (!ipv6->hop_limits)
3256                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
3257                         break;
3258                 case RTE_FLOW_ITEM_TYPE_UDP:
3259                         udp = (struct rte_udp_hdr *)&buf[temp_size];
3260                         if (!ipv4 && !ipv6)
3261                                 return rte_flow_error_set(error, EINVAL,
3262                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3263                                                 (void *)items->type,
3264                                                 "ip header not found");
3265                         if (ipv4 && !ipv4->next_proto_id)
3266                                 ipv4->next_proto_id = IPPROTO_UDP;
3267                         else if (ipv6 && !ipv6->proto)
3268                                 ipv6->proto = IPPROTO_UDP;
3269                         break;
3270                 case RTE_FLOW_ITEM_TYPE_VXLAN:
3271                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
3272                         if (!udp)
3273                                 return rte_flow_error_set(error, EINVAL,
3274                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3275                                                 (void *)items->type,
3276                                                 "udp header not found");
3277                         if (!udp->dst_port)
3278                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
3279                         if (!vxlan->vx_flags)
3280                                 vxlan->vx_flags =
3281                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
3282                         break;
3283                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3284                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
3285                         if (!udp)
3286                                 return rte_flow_error_set(error, EINVAL,
3287                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3288                                                 (void *)items->type,
3289                                                 "udp header not found");
3290                         if (!vxlan_gpe->proto)
3291                                 return rte_flow_error_set(error, EINVAL,
3292                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3293                                                 (void *)items->type,
3294                                                 "next protocol not found");
3295                         if (!udp->dst_port)
3296                                 udp->dst_port =
3297                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
3298                         if (!vxlan_gpe->vx_flags)
3299                                 vxlan_gpe->vx_flags =
3300                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
3301                         break;
3302                 case RTE_FLOW_ITEM_TYPE_GRE:
3303                 case RTE_FLOW_ITEM_TYPE_NVGRE:
3304                         gre = (struct rte_gre_hdr *)&buf[temp_size];
3305                         if (!gre->proto)
3306                                 return rte_flow_error_set(error, EINVAL,
3307                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3308                                                 (void *)items->type,
3309                                                 "next protocol not found");
3310                         if (!ipv4 && !ipv6)
3311                                 return rte_flow_error_set(error, EINVAL,
3312                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3313                                                 (void *)items->type,
3314                                                 "ip header not found");
3315                         if (ipv4 && !ipv4->next_proto_id)
3316                                 ipv4->next_proto_id = IPPROTO_GRE;
3317                         else if (ipv6 && !ipv6->proto)
3318                                 ipv6->proto = IPPROTO_GRE;
3319                         break;
3320                 case RTE_FLOW_ITEM_TYPE_VOID:
3321                         break;
3322                 default:
3323                         return rte_flow_error_set(error, EINVAL,
3324                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3325                                                   (void *)items->type,
3326                                                   "unsupported item type");
3327                         break;
3328                 }
3329                 temp_size += len;
3330         }
3331         *size = temp_size;
3332         return 0;
3333 }
3334
3335 static int
3336 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
3337 {
3338         struct rte_ether_hdr *eth = NULL;
3339         struct rte_vlan_hdr *vlan = NULL;
3340         struct rte_ipv6_hdr *ipv6 = NULL;
3341         struct rte_udp_hdr *udp = NULL;
3342         char *next_hdr;
3343         uint16_t proto;
3344
3345         eth = (struct rte_ether_hdr *)data;
3346         next_hdr = (char *)(eth + 1);
3347         proto = RTE_BE16(eth->ether_type);
3348
3349         /* VLAN skipping */
3350         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
3351                 vlan = (struct rte_vlan_hdr *)next_hdr;
3352                 proto = RTE_BE16(vlan->eth_proto);
3353                 next_hdr += sizeof(struct rte_vlan_hdr);
3354         }
3355
3356         /* HW calculates IPv4 csum. no need to proceed */
3357         if (proto == RTE_ETHER_TYPE_IPV4)
3358                 return 0;
3359
3360         /* non IPv4/IPv6 header. not supported */
3361         if (proto != RTE_ETHER_TYPE_IPV6) {
3362                 return rte_flow_error_set(error, ENOTSUP,
3363                                           RTE_FLOW_ERROR_TYPE_ACTION,
3364                                           NULL, "Cannot offload non IPv4/IPv6");
3365         }
3366
3367         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
3368
3369         /* ignore non UDP */
3370         if (ipv6->proto != IPPROTO_UDP)
3371                 return 0;
3372
3373         udp = (struct rte_udp_hdr *)(ipv6 + 1);
3374         udp->dgram_cksum = 0;
3375
3376         return 0;
3377 }
3378
3379 /**
3380  * Convert L2 encap action to DV specification.
3381  *
3382  * @param[in] dev
3383  *   Pointer to rte_eth_dev structure.
3384  * @param[in] action
3385  *   Pointer to action structure.
3386  * @param[in, out] dev_flow
3387  *   Pointer to the mlx5_flow.
3388  * @param[in] transfer
3389  *   Mark if the flow is E-Switch flow.
3390  * @param[out] error
3391  *   Pointer to the error structure.
3392  *
3393  * @return
3394  *   0 on success, a negative errno value otherwise and rte_errno is set.
3395  */
3396 static int
3397 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
3398                                const struct rte_flow_action *action,
3399                                struct mlx5_flow *dev_flow,
3400                                uint8_t transfer,
3401                                struct rte_flow_error *error)
3402 {
3403         const struct rte_flow_item *encap_data;
3404         const struct rte_flow_action_raw_encap *raw_encap_data;
3405         struct mlx5_flow_dv_encap_decap_resource res = {
3406                 .reformat_type =
3407                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
3408                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
3409                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
3410         };
3411
3412         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
3413                 raw_encap_data =
3414                         (const struct rte_flow_action_raw_encap *)action->conf;
3415                 res.size = raw_encap_data->size;
3416                 memcpy(res.buf, raw_encap_data->data, res.size);
3417         } else {
3418                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
3419                         encap_data =
3420                                 ((const struct rte_flow_action_vxlan_encap *)
3421                                                 action->conf)->definition;
3422                 else
3423                         encap_data =
3424                                 ((const struct rte_flow_action_nvgre_encap *)
3425                                                 action->conf)->definition;
3426                 if (flow_dv_convert_encap_data(encap_data, res.buf,
3427                                                &res.size, error))
3428                         return -rte_errno;
3429         }
3430         if (flow_dv_zero_encap_udp_csum(res.buf, error))
3431                 return -rte_errno;
3432         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3433                 return rte_flow_error_set(error, EINVAL,
3434                                           RTE_FLOW_ERROR_TYPE_ACTION,
3435                                           NULL, "can't create L2 encap action");
3436         return 0;
3437 }
3438
3439 /**
3440  * Convert L2 decap action to DV specification.
3441  *
3442  * @param[in] dev
3443  *   Pointer to rte_eth_dev structure.
3444  * @param[in, out] dev_flow
3445  *   Pointer to the mlx5_flow.
3446  * @param[in] transfer
3447  *   Mark if the flow is E-Switch flow.
3448  * @param[out] error
3449  *   Pointer to the error structure.
3450  *
3451  * @return
3452  *   0 on success, a negative errno value otherwise and rte_errno is set.
3453  */
3454 static int
3455 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
3456                                struct mlx5_flow *dev_flow,
3457                                uint8_t transfer,
3458                                struct rte_flow_error *error)
3459 {
3460         struct mlx5_flow_dv_encap_decap_resource res = {
3461                 .size = 0,
3462                 .reformat_type =
3463                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
3464                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
3465                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
3466         };
3467
3468         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3469                 return rte_flow_error_set(error, EINVAL,
3470                                           RTE_FLOW_ERROR_TYPE_ACTION,
3471                                           NULL, "can't create L2 decap action");
3472         return 0;
3473 }
3474
3475 /**
3476  * Convert raw decap/encap (L3 tunnel) action to DV specification.
3477  *
3478  * @param[in] dev
3479  *   Pointer to rte_eth_dev structure.
3480  * @param[in] action
3481  *   Pointer to action structure.
3482  * @param[in, out] dev_flow
3483  *   Pointer to the mlx5_flow.
3484  * @param[in] attr
3485  *   Pointer to the flow attributes.
3486  * @param[out] error
3487  *   Pointer to the error structure.
3488  *
3489  * @return
3490  *   0 on success, a negative errno value otherwise and rte_errno is set.
3491  */
3492 static int
3493 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
3494                                 const struct rte_flow_action *action,
3495                                 struct mlx5_flow *dev_flow,
3496                                 const struct rte_flow_attr *attr,
3497                                 struct rte_flow_error *error)
3498 {
3499         const struct rte_flow_action_raw_encap *encap_data;
3500         struct mlx5_flow_dv_encap_decap_resource res;
3501
3502         memset(&res, 0, sizeof(res));
3503         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3504         res.size = encap_data->size;
3505         memcpy(res.buf, encap_data->data, res.size);
3506         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3507                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3508                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3509         if (attr->transfer)
3510                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3511         else
3512                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3513                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3514         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3515                 return rte_flow_error_set(error, EINVAL,
3516                                           RTE_FLOW_ERROR_TYPE_ACTION,
3517                                           NULL, "can't create encap action");
3518         return 0;
3519 }
3520
3521 /**
3522  * Create action push VLAN.
3523  *
3524  * @param[in] dev
3525  *   Pointer to rte_eth_dev structure.
3526  * @param[in] attr
3527  *   Pointer to the flow attributes.
3528  * @param[in] vlan
3529  *   Pointer to the vlan to push to the Ethernet header.
3530  * @param[in, out] dev_flow
3531  *   Pointer to the mlx5_flow.
3532  * @param[out] error
3533  *   Pointer to the error structure.
3534  *
3535  * @return
3536  *   0 on success, a negative errno value otherwise and rte_errno is set.
3537  */
3538 static int
3539 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3540                                 const struct rte_flow_attr *attr,
3541                                 const struct rte_vlan_hdr *vlan,
3542                                 struct mlx5_flow *dev_flow,
3543                                 struct rte_flow_error *error)
3544 {
3545         struct mlx5_flow_dv_push_vlan_action_resource res;
3546
3547         memset(&res, 0, sizeof(res));
3548         res.vlan_tag =
3549                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3550                                  vlan->vlan_tci);
3551         if (attr->transfer)
3552                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3553         else
3554                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3555                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3556         return flow_dv_push_vlan_action_resource_register
3557                                             (dev, &res, dev_flow, error);
3558 }
3559
3560 static int fdb_mirror;
3561
3562 /**
3563  * Validate the modify-header actions.
3564  *
3565  * @param[in] action_flags
3566  *   Holds the actions detected until now.
3567  * @param[in] action
3568  *   Pointer to the modify action.
3569  * @param[out] error
3570  *   Pointer to error structure.
3571  *
3572  * @return
3573  *   0 on success, a negative errno value otherwise and rte_errno is set.
3574  */
3575 static int
3576 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3577                                    const struct rte_flow_action *action,
3578                                    struct rte_flow_error *error)
3579 {
3580         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3581                 return rte_flow_error_set(error, EINVAL,
3582                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3583                                           NULL, "action configuration not set");
3584         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3585                 return rte_flow_error_set(error, EINVAL,
3586                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3587                                           "can't have encap action before"
3588                                           " modify action");
3589         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) && fdb_mirror)
3590                 return rte_flow_error_set(error, EINVAL,
3591                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3592                                           "can't support sample action before"
3593                                           " modify action for E-Switch"
3594                                           " mirroring");
3595         return 0;
3596 }
3597
3598 /**
3599  * Validate the modify-header MAC address actions.
3600  *
3601  * @param[in] action_flags
3602  *   Holds the actions detected until now.
3603  * @param[in] action
3604  *   Pointer to the modify action.
3605  * @param[in] item_flags
3606  *   Holds the items detected.
3607  * @param[out] error
3608  *   Pointer to error structure.
3609  *
3610  * @return
3611  *   0 on success, a negative errno value otherwise and rte_errno is set.
3612  */
3613 static int
3614 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3615                                    const struct rte_flow_action *action,
3616                                    const uint64_t item_flags,
3617                                    struct rte_flow_error *error)
3618 {
3619         int ret = 0;
3620
3621         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3622         if (!ret) {
3623                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3624                         return rte_flow_error_set(error, EINVAL,
3625                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3626                                                   NULL,
3627                                                   "no L2 item in pattern");
3628         }
3629         return ret;
3630 }
3631
3632 /**
3633  * Validate the modify-header IPv4 address actions.
3634  *
3635  * @param[in] action_flags
3636  *   Holds the actions detected until now.
3637  * @param[in] action
3638  *   Pointer to the modify action.
3639  * @param[in] item_flags
3640  *   Holds the items detected.
3641  * @param[out] error
3642  *   Pointer to error structure.
3643  *
3644  * @return
3645  *   0 on success, a negative errno value otherwise and rte_errno is set.
3646  */
3647 static int
3648 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3649                                     const struct rte_flow_action *action,
3650                                     const uint64_t item_flags,
3651                                     struct rte_flow_error *error)
3652 {
3653         int ret = 0;
3654         uint64_t layer;
3655
3656         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3657         if (!ret) {
3658                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3659                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3660                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3661                 if (!(item_flags & layer))
3662                         return rte_flow_error_set(error, EINVAL,
3663                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3664                                                   NULL,
3665                                                   "no ipv4 item in pattern");
3666         }
3667         return ret;
3668 }
3669
3670 /**
3671  * Validate the modify-header IPv6 address actions.
3672  *
3673  * @param[in] action_flags
3674  *   Holds the actions detected until now.
3675  * @param[in] action
3676  *   Pointer to the modify action.
3677  * @param[in] item_flags
3678  *   Holds the items detected.
3679  * @param[out] error
3680  *   Pointer to error structure.
3681  *
3682  * @return
3683  *   0 on success, a negative errno value otherwise and rte_errno is set.
3684  */
3685 static int
3686 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3687                                     const struct rte_flow_action *action,
3688                                     const uint64_t item_flags,
3689                                     struct rte_flow_error *error)
3690 {
3691         int ret = 0;
3692         uint64_t layer;
3693
3694         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3695         if (!ret) {
3696                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3697                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3698                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3699                 if (!(item_flags & layer))
3700                         return rte_flow_error_set(error, EINVAL,
3701                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3702                                                   NULL,
3703                                                   "no ipv6 item in pattern");
3704         }
3705         return ret;
3706 }
3707
3708 /**
3709  * Validate the modify-header TP actions.
3710  *
3711  * @param[in] action_flags
3712  *   Holds the actions detected until now.
3713  * @param[in] action
3714  *   Pointer to the modify action.
3715  * @param[in] item_flags
3716  *   Holds the items detected.
3717  * @param[out] error
3718  *   Pointer to error structure.
3719  *
3720  * @return
3721  *   0 on success, a negative errno value otherwise and rte_errno is set.
3722  */
3723 static int
3724 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3725                                   const struct rte_flow_action *action,
3726                                   const uint64_t item_flags,
3727                                   struct rte_flow_error *error)
3728 {
3729         int ret = 0;
3730         uint64_t layer;
3731
3732         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3733         if (!ret) {
3734                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3735                                  MLX5_FLOW_LAYER_INNER_L4 :
3736                                  MLX5_FLOW_LAYER_OUTER_L4;
3737                 if (!(item_flags & layer))
3738                         return rte_flow_error_set(error, EINVAL,
3739                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3740                                                   NULL, "no transport layer "
3741                                                   "in pattern");
3742         }
3743         return ret;
3744 }
3745
3746 /**
3747  * Validate the modify-header actions of increment/decrement
3748  * TCP Sequence-number.
3749  *
3750  * @param[in] action_flags
3751  *   Holds the actions detected until now.
3752  * @param[in] action
3753  *   Pointer to the modify action.
3754  * @param[in] item_flags
3755  *   Holds the items detected.
3756  * @param[out] error
3757  *   Pointer to error structure.
3758  *
3759  * @return
3760  *   0 on success, a negative errno value otherwise and rte_errno is set.
3761  */
3762 static int
3763 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3764                                        const struct rte_flow_action *action,
3765                                        const uint64_t item_flags,
3766                                        struct rte_flow_error *error)
3767 {
3768         int ret = 0;
3769         uint64_t layer;
3770
3771         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3772         if (!ret) {
3773                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3774                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3775                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3776                 if (!(item_flags & layer))
3777                         return rte_flow_error_set(error, EINVAL,
3778                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3779                                                   NULL, "no TCP item in"
3780                                                   " pattern");
3781                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3782                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3783                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3784                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3785                         return rte_flow_error_set(error, EINVAL,
3786                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3787                                                   NULL,
3788                                                   "cannot decrease and increase"
3789                                                   " TCP sequence number"
3790                                                   " at the same time");
3791         }
3792         return ret;
3793 }
3794
3795 /**
3796  * Validate the modify-header actions of increment/decrement
3797  * TCP Acknowledgment number.
3798  *
3799  * @param[in] action_flags
3800  *   Holds the actions detected until now.
3801  * @param[in] action
3802  *   Pointer to the modify action.
3803  * @param[in] item_flags
3804  *   Holds the items detected.
3805  * @param[out] error
3806  *   Pointer to error structure.
3807  *
3808  * @return
3809  *   0 on success, a negative errno value otherwise and rte_errno is set.
3810  */
3811 static int
3812 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3813                                        const struct rte_flow_action *action,
3814                                        const uint64_t item_flags,
3815                                        struct rte_flow_error *error)
3816 {
3817         int ret = 0;
3818         uint64_t layer;
3819
3820         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3821         if (!ret) {
3822                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3823                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3824                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3825                 if (!(item_flags & layer))
3826                         return rte_flow_error_set(error, EINVAL,
3827                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3828                                                   NULL, "no TCP item in"
3829                                                   " pattern");
3830                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3831                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3832                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3833                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3834                         return rte_flow_error_set(error, EINVAL,
3835                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3836                                                   NULL,
3837                                                   "cannot decrease and increase"
3838                                                   " TCP acknowledgment number"
3839                                                   " at the same time");
3840         }
3841         return ret;
3842 }
3843
3844 /**
3845  * Validate the modify-header TTL actions.
3846  *
3847  * @param[in] action_flags
3848  *   Holds the actions detected until now.
3849  * @param[in] action
3850  *   Pointer to the modify action.
3851  * @param[in] item_flags
3852  *   Holds the items detected.
3853  * @param[out] error
3854  *   Pointer to error structure.
3855  *
3856  * @return
3857  *   0 on success, a negative errno value otherwise and rte_errno is set.
3858  */
3859 static int
3860 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3861                                    const struct rte_flow_action *action,
3862                                    const uint64_t item_flags,
3863                                    struct rte_flow_error *error)
3864 {
3865         int ret = 0;
3866         uint64_t layer;
3867
3868         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3869         if (!ret) {
3870                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3871                                  MLX5_FLOW_LAYER_INNER_L3 :
3872                                  MLX5_FLOW_LAYER_OUTER_L3;
3873                 if (!(item_flags & layer))
3874                         return rte_flow_error_set(error, EINVAL,
3875                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3876                                                   NULL,
3877                                                   "no IP protocol in pattern");
3878         }
3879         return ret;
3880 }
3881
3882 /**
3883  * Validate jump action.
3884  *
3885  * @param[in] action
3886  *   Pointer to the jump action.
3887  * @param[in] action_flags
3888  *   Holds the actions detected until now.
3889  * @param[in] attributes
3890  *   Pointer to flow attributes
3891  * @param[in] external
3892  *   Action belongs to flow rule created by request external to PMD.
3893  * @param[out] error
3894  *   Pointer to error structure.
3895  *
3896  * @return
3897  *   0 on success, a negative errno value otherwise and rte_errno is set.
3898  */
3899 static int
3900 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
3901                              const struct mlx5_flow_tunnel *tunnel,
3902                              const struct rte_flow_action *action,
3903                              uint64_t action_flags,
3904                              const struct rte_flow_attr *attributes,
3905                              bool external, struct rte_flow_error *error)
3906 {
3907         uint32_t target_group, table;
3908         int ret = 0;
3909         struct flow_grp_info grp_info = {
3910                 .external = !!external,
3911                 .transfer = !!attributes->transfer,
3912                 .fdb_def_rule = 1,
3913                 .std_tbl_fix = 0
3914         };
3915         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3916                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3917                 return rte_flow_error_set(error, EINVAL,
3918                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3919                                           "can't have 2 fate actions in"
3920                                           " same flow");
3921         if (action_flags & MLX5_FLOW_ACTION_METER)
3922                 return rte_flow_error_set(error, ENOTSUP,
3923                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3924                                           "jump with meter not support");
3925         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) && fdb_mirror)
3926                 return rte_flow_error_set(error, EINVAL,
3927                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3928                                           "E-Switch mirroring can't support"
3929                                           " Sample action and jump action in"
3930                                           " same flow now");
3931         if (!action->conf)
3932                 return rte_flow_error_set(error, EINVAL,
3933                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3934                                           NULL, "action configuration not set");
3935         target_group =
3936                 ((const struct rte_flow_action_jump *)action->conf)->group;
3937         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
3938                                        &grp_info, error);
3939         if (ret)
3940                 return ret;
3941         if (attributes->group == target_group &&
3942             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
3943                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
3944                 return rte_flow_error_set(error, EINVAL,
3945                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3946                                           "target group must be other than"
3947                                           " the current flow group");
3948         return 0;
3949 }
3950
3951 /*
3952  * Validate the port_id action.
3953  *
3954  * @param[in] dev
3955  *   Pointer to rte_eth_dev structure.
3956  * @param[in] action_flags
3957  *   Bit-fields that holds the actions detected until now.
3958  * @param[in] action
3959  *   Port_id RTE action structure.
3960  * @param[in] attr
3961  *   Attributes of flow that includes this action.
3962  * @param[out] error
3963  *   Pointer to error structure.
3964  *
3965  * @return
3966  *   0 on success, a negative errno value otherwise and rte_errno is set.
3967  */
3968 static int
3969 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3970                                 uint64_t action_flags,
3971                                 const struct rte_flow_action *action,
3972                                 const struct rte_flow_attr *attr,
3973                                 struct rte_flow_error *error)
3974 {
3975         const struct rte_flow_action_port_id *port_id;
3976         struct mlx5_priv *act_priv;
3977         struct mlx5_priv *dev_priv;
3978         uint16_t port;
3979
3980         if (!attr->transfer)
3981                 return rte_flow_error_set(error, ENOTSUP,
3982                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3983                                           NULL,
3984                                           "port id action is valid in transfer"
3985                                           " mode only");
3986         if (!action || !action->conf)
3987                 return rte_flow_error_set(error, ENOTSUP,
3988                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3989                                           NULL,
3990                                           "port id action parameters must be"
3991                                           " specified");
3992         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3993                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3994                 return rte_flow_error_set(error, EINVAL,
3995                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3996                                           "can have only one fate actions in"
3997                                           " a flow");
3998         dev_priv = mlx5_dev_to_eswitch_info(dev);
3999         if (!dev_priv)
4000                 return rte_flow_error_set(error, rte_errno,
4001                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4002                                           NULL,
4003                                           "failed to obtain E-Switch info");
4004         port_id = action->conf;
4005         port = port_id->original ? dev->data->port_id : port_id->id;
4006         act_priv = mlx5_port_to_eswitch_info(port, false);
4007         if (!act_priv)
4008                 return rte_flow_error_set
4009                                 (error, rte_errno,
4010                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
4011                                  "failed to obtain E-Switch port id for port");
4012         if (act_priv->domain_id != dev_priv->domain_id)
4013                 return rte_flow_error_set
4014                                 (error, EINVAL,
4015                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4016                                  "port does not belong to"
4017                                  " E-Switch being configured");
4018         return 0;
4019 }
4020
4021 /**
4022  * Get the maximum number of modify header actions.
4023  *
4024  * @param dev
4025  *   Pointer to rte_eth_dev structure.
4026  * @param flags
4027  *   Flags bits to check if root level.
4028  *
4029  * @return
4030  *   Max number of modify header actions device can support.
4031  */
4032 static inline unsigned int
4033 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
4034                               uint64_t flags)
4035 {
4036         /*
4037          * There's no way to directly query the max capacity from FW.
4038          * The maximal value on root table should be assumed to be supported.
4039          */
4040         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
4041                 return MLX5_MAX_MODIFY_NUM;
4042         else
4043                 return MLX5_ROOT_TBL_MODIFY_NUM;
4044 }
4045
4046 /**
4047  * Validate the meter action.
4048  *
4049  * @param[in] dev
4050  *   Pointer to rte_eth_dev structure.
4051  * @param[in] action_flags
4052  *   Bit-fields that holds the actions detected until now.
4053  * @param[in] action
4054  *   Pointer to the meter action.
4055  * @param[in] attr
4056  *   Attributes of flow that includes this action.
4057  * @param[out] error
4058  *   Pointer to error structure.
4059  *
4060  * @return
4061  *   0 on success, a negative errno value otherwise and rte_ernno is set.
4062  */
4063 static int
4064 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
4065                                 uint64_t action_flags,
4066                                 const struct rte_flow_action *action,
4067                                 const struct rte_flow_attr *attr,
4068                                 struct rte_flow_error *error)
4069 {
4070         struct mlx5_priv *priv = dev->data->dev_private;
4071         const struct rte_flow_action_meter *am = action->conf;
4072         struct mlx5_flow_meter *fm;
4073
4074         if (!am)
4075                 return rte_flow_error_set(error, EINVAL,
4076                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4077                                           "meter action conf is NULL");
4078
4079         if (action_flags & MLX5_FLOW_ACTION_METER)
4080                 return rte_flow_error_set(error, ENOTSUP,
4081                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4082                                           "meter chaining not support");
4083         if (action_flags & MLX5_FLOW_ACTION_JUMP)
4084                 return rte_flow_error_set(error, ENOTSUP,
4085                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4086                                           "meter with jump not support");
4087         if (!priv->mtr_en)
4088                 return rte_flow_error_set(error, ENOTSUP,
4089                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4090                                           NULL,
4091                                           "meter action not supported");
4092         fm = mlx5_flow_meter_find(priv, am->mtr_id);
4093         if (!fm)
4094                 return rte_flow_error_set(error, EINVAL,
4095                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4096                                           "Meter not found");
4097         if (fm->ref_cnt && (!(fm->transfer == attr->transfer ||
4098               (!fm->ingress && !attr->ingress && attr->egress) ||
4099               (!fm->egress && !attr->egress && attr->ingress))))
4100                 return rte_flow_error_set(error, EINVAL,
4101                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4102                                           "Flow attributes are either invalid "
4103                                           "or have a conflict with current "
4104                                           "meter attributes");
4105         return 0;
4106 }
4107
4108 /**
4109  * Validate the age action.
4110  *
4111  * @param[in] action_flags
4112  *   Holds the actions detected until now.
4113  * @param[in] action
4114  *   Pointer to the age action.
4115  * @param[in] dev
4116  *   Pointer to the Ethernet device structure.
4117  * @param[out] error
4118  *   Pointer to error structure.
4119  *
4120  * @return
4121  *   0 on success, a negative errno value otherwise and rte_errno is set.
4122  */
4123 static int
4124 flow_dv_validate_action_age(uint64_t action_flags,
4125                             const struct rte_flow_action *action,
4126                             struct rte_eth_dev *dev,
4127                             struct rte_flow_error *error)
4128 {
4129         struct mlx5_priv *priv = dev->data->dev_private;
4130         const struct rte_flow_action_age *age = action->conf;
4131
4132         if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
4133             !priv->sh->aso_age_mng))
4134                 return rte_flow_error_set(error, ENOTSUP,
4135                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4136                                           NULL,
4137                                           "age action not supported");
4138         if (!(action->conf))
4139                 return rte_flow_error_set(error, EINVAL,
4140                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4141                                           "configuration cannot be null");
4142         if (!(age->timeout))
4143                 return rte_flow_error_set(error, EINVAL,
4144                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4145                                           "invalid timeout value 0");
4146         if (action_flags & MLX5_FLOW_ACTION_AGE)
4147                 return rte_flow_error_set(error, EINVAL,
4148                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4149                                           "duplicate age actions set");
4150         return 0;
4151 }
4152
4153 /**
4154  * Validate the modify-header IPv4 DSCP actions.
4155  *
4156  * @param[in] action_flags
4157  *   Holds the actions detected until now.
4158  * @param[in] action
4159  *   Pointer to the modify action.
4160  * @param[in] item_flags
4161  *   Holds the items detected.
4162  * @param[out] error
4163  *   Pointer to error structure.
4164  *
4165  * @return
4166  *   0 on success, a negative errno value otherwise and rte_errno is set.
4167  */
4168 static int
4169 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
4170                                          const struct rte_flow_action *action,
4171                                          const uint64_t item_flags,
4172                                          struct rte_flow_error *error)
4173 {
4174         int ret = 0;
4175
4176         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4177         if (!ret) {
4178                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
4179                         return rte_flow_error_set(error, EINVAL,
4180                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4181                                                   NULL,
4182                                                   "no ipv4 item in pattern");
4183         }
4184         return ret;
4185 }
4186
4187 /**
4188  * Validate the modify-header IPv6 DSCP actions.
4189  *
4190  * @param[in] action_flags
4191  *   Holds the actions detected until now.
4192  * @param[in] action
4193  *   Pointer to the modify action.
4194  * @param[in] item_flags
4195  *   Holds the items detected.
4196  * @param[out] error
4197  *   Pointer to error structure.
4198  *
4199  * @return
4200  *   0 on success, a negative errno value otherwise and rte_errno is set.
4201  */
4202 static int
4203 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
4204                                          const struct rte_flow_action *action,
4205                                          const uint64_t item_flags,
4206                                          struct rte_flow_error *error)
4207 {
4208         int ret = 0;
4209
4210         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4211         if (!ret) {
4212                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
4213                         return rte_flow_error_set(error, EINVAL,
4214                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4215                                                   NULL,
4216                                                   "no ipv6 item in pattern");
4217         }
4218         return ret;
4219 }
4220
4221 /**
4222  * Match modify-header resource.
4223  *
4224  * @param list
4225  *   Pointer to the hash list.
4226  * @param entry
4227  *   Pointer to exist resource entry object.
4228  * @param key
4229  *   Key of the new entry.
4230  * @param ctx
4231  *   Pointer to new modify-header resource.
4232  *
4233  * @return
4234  *   0 on matching, non-zero otherwise.
4235  */
4236 int
4237 flow_dv_modify_match_cb(struct mlx5_hlist *list __rte_unused,
4238                         struct mlx5_hlist_entry *entry,
4239                         uint64_t key __rte_unused, void *cb_ctx)
4240 {
4241         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4242         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
4243         struct mlx5_flow_dv_modify_hdr_resource *resource =
4244                         container_of(entry, typeof(*resource), entry);
4245         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
4246
4247         key_len += ref->actions_num * sizeof(ref->actions[0]);
4248         return ref->actions_num != resource->actions_num ||
4249                memcmp(&ref->ft_type, &resource->ft_type, key_len);
4250 }
4251
4252 struct mlx5_hlist_entry *
4253 flow_dv_modify_create_cb(struct mlx5_hlist *list, uint64_t key __rte_unused,
4254                          void *cb_ctx)
4255 {
4256         struct mlx5_dev_ctx_shared *sh = list->ctx;
4257         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4258         struct mlx5dv_dr_domain *ns;
4259         struct mlx5_flow_dv_modify_hdr_resource *entry;
4260         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
4261         int ret;
4262         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
4263         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
4264
4265         entry = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*entry) + data_len, 0,
4266                             SOCKET_ID_ANY);
4267         if (!entry) {
4268                 rte_flow_error_set(ctx->error, ENOMEM,
4269                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4270                                    "cannot allocate resource memory");
4271                 return NULL;
4272         }
4273         rte_memcpy(&entry->ft_type,
4274                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
4275                    key_len + data_len);
4276         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
4277                 ns = sh->fdb_domain;
4278         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
4279                 ns = sh->tx_domain;
4280         else
4281                 ns = sh->rx_domain;
4282         ret = mlx5_flow_os_create_flow_action_modify_header
4283                                         (sh->ctx, ns, entry,
4284                                          data_len, &entry->action);
4285         if (ret) {
4286                 mlx5_free(entry);
4287                 rte_flow_error_set(ctx->error, ENOMEM,
4288                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4289                                    NULL, "cannot create modification action");
4290                 return NULL;
4291         }
4292         return &entry->entry;
4293 }
4294
4295 /**
4296  * Validate the sample action.
4297  *
4298  * @param[in] action_flags
4299  *   Holds the actions detected until now.
4300  * @param[in] action
4301  *   Pointer to the sample action.
4302  * @param[in] dev
4303  *   Pointer to the Ethernet device structure.
4304  * @param[in] attr
4305  *   Attributes of flow that includes this action.
4306  * @param[out] error
4307  *   Pointer to error structure.
4308  *
4309  * @return
4310  *   0 on success, a negative errno value otherwise and rte_errno is set.
4311  */
4312 static int
4313 flow_dv_validate_action_sample(uint64_t action_flags,
4314                                const struct rte_flow_action *action,
4315                                struct rte_eth_dev *dev,
4316                                const struct rte_flow_attr *attr,
4317                                struct rte_flow_error *error)
4318 {
4319         struct mlx5_priv *priv = dev->data->dev_private;
4320         struct mlx5_dev_config *dev_conf = &priv->config;
4321         const struct rte_flow_action_sample *sample = action->conf;
4322         const struct rte_flow_action *act;
4323         uint64_t sub_action_flags = 0;
4324         uint16_t queue_index = 0xFFFF;
4325         int actions_n = 0;
4326         int ret;
4327         fdb_mirror = 0;
4328
4329         if (!sample)
4330                 return rte_flow_error_set(error, EINVAL,
4331                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4332                                           "configuration cannot be NULL");
4333         if (sample->ratio == 0)
4334                 return rte_flow_error_set(error, EINVAL,
4335                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4336                                           "ratio value starts from 1");
4337         if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
4338                 return rte_flow_error_set(error, ENOTSUP,
4339                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4340                                           NULL,
4341                                           "sample action not supported");
4342         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
4343                 return rte_flow_error_set(error, EINVAL,
4344                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4345                                           "Multiple sample actions not "
4346                                           "supported");
4347         if (action_flags & MLX5_FLOW_ACTION_METER)
4348                 return rte_flow_error_set(error, EINVAL,
4349                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4350                                           "wrong action order, meter should "
4351                                           "be after sample action");
4352         if (action_flags & MLX5_FLOW_ACTION_JUMP)
4353                 return rte_flow_error_set(error, EINVAL,
4354                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
4355                                           "wrong action order, jump should "
4356                                           "be after sample action");
4357         act = sample->actions;
4358         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
4359                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4360                         return rte_flow_error_set(error, ENOTSUP,
4361                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4362                                                   act, "too many actions");
4363                 switch (act->type) {
4364                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4365                         ret = mlx5_flow_validate_action_queue(act,
4366                                                               sub_action_flags,
4367                                                               dev,
4368                                                               attr, error);
4369                         if (ret < 0)
4370                                 return ret;
4371                         queue_index = ((const struct rte_flow_action_queue *)
4372                                                         (act->conf))->index;
4373                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
4374                         ++actions_n;
4375                         break;
4376                 case RTE_FLOW_ACTION_TYPE_MARK:
4377                         ret = flow_dv_validate_action_mark(dev, act,
4378                                                            sub_action_flags,
4379                                                            attr, error);
4380                         if (ret < 0)
4381                                 return ret;
4382                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
4383                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
4384                                                 MLX5_FLOW_ACTION_MARK_EXT;
4385                         else
4386                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
4387                         ++actions_n;
4388                         break;
4389                 case RTE_FLOW_ACTION_TYPE_COUNT:
4390                         ret = flow_dv_validate_action_count(dev, error);
4391                         if (ret < 0)
4392                                 return ret;
4393                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
4394                         ++actions_n;
4395                         break;
4396                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4397                         ret = flow_dv_validate_action_port_id(dev,
4398                                                               sub_action_flags,
4399                                                               act,
4400                                                               attr,
4401                                                               error);
4402                         if (ret)
4403                                 return ret;
4404                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4405                         ++actions_n;
4406                         break;
4407                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4408                         ret = flow_dv_validate_action_raw_encap_decap
4409                                 (dev, NULL, act->conf, attr, &sub_action_flags,
4410                                  &actions_n, error);
4411                         if (ret < 0)
4412                                 return ret;
4413                         ++actions_n;
4414                         break;
4415                 default:
4416                         return rte_flow_error_set(error, ENOTSUP,
4417                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4418                                                   NULL,
4419                                                   "Doesn't support optional "
4420                                                   "action");
4421                 }
4422         }
4423         if (attr->ingress && !attr->transfer) {
4424                 if (!(sub_action_flags & MLX5_FLOW_ACTION_QUEUE))
4425                         return rte_flow_error_set(error, EINVAL,
4426                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4427                                                   NULL,
4428                                                   "Ingress must has a dest "
4429                                                   "QUEUE for Sample");
4430         } else if (attr->egress && !attr->transfer) {
4431                 return rte_flow_error_set(error, ENOTSUP,
4432                                           RTE_FLOW_ERROR_TYPE_ACTION,
4433                                           NULL,
4434                                           "Sample Only support Ingress "
4435                                           "or E-Switch");
4436         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
4437                 MLX5_ASSERT(attr->transfer);
4438                 if (sample->ratio > 1)
4439                         return rte_flow_error_set(error, ENOTSUP,
4440                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4441                                                   NULL,
4442                                                   "E-Switch doesn't support "
4443                                                   "any optional action "
4444                                                   "for sampling");
4445                 fdb_mirror = 1;
4446                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
4447                         return rte_flow_error_set(error, ENOTSUP,
4448                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4449                                                   NULL,
4450                                                   "unsupported action QUEUE");
4451                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
4452                         return rte_flow_error_set(error, EINVAL,
4453                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4454                                                   NULL,
4455                                                   "E-Switch must has a dest "
4456                                                   "port for mirroring");
4457         }
4458         /* Continue validation for Xcap actions.*/
4459         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
4460             (queue_index == 0xFFFF ||
4461              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
4462                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
4463                      MLX5_FLOW_XCAP_ACTIONS)
4464                         return rte_flow_error_set(error, ENOTSUP,
4465                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4466                                                   NULL, "encap and decap "
4467                                                   "combination aren't "
4468                                                   "supported");
4469                 if (!attr->transfer && attr->ingress && (sub_action_flags &
4470                                                         MLX5_FLOW_ACTION_ENCAP))
4471                         return rte_flow_error_set(error, ENOTSUP,
4472                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4473                                                   NULL, "encap is not supported"
4474                                                   " for ingress traffic");
4475         }
4476         return 0;
4477 }
4478
4479 /**
4480  * Find existing modify-header resource or create and register a new one.
4481  *
4482  * @param dev[in, out]
4483  *   Pointer to rte_eth_dev structure.
4484  * @param[in, out] resource
4485  *   Pointer to modify-header resource.
4486  * @parm[in, out] dev_flow
4487  *   Pointer to the dev_flow.
4488  * @param[out] error
4489  *   pointer to error structure.
4490  *
4491  * @return
4492  *   0 on success otherwise -errno and errno is set.
4493  */
4494 static int
4495 flow_dv_modify_hdr_resource_register
4496                         (struct rte_eth_dev *dev,
4497                          struct mlx5_flow_dv_modify_hdr_resource *resource,
4498                          struct mlx5_flow *dev_flow,
4499                          struct rte_flow_error *error)
4500 {
4501         struct mlx5_priv *priv = dev->data->dev_private;
4502         struct mlx5_dev_ctx_shared *sh = priv->sh;
4503         uint32_t key_len = sizeof(*resource) -
4504                            offsetof(typeof(*resource), ft_type) +
4505                            resource->actions_num * sizeof(resource->actions[0]);
4506         struct mlx5_hlist_entry *entry;
4507         struct mlx5_flow_cb_ctx ctx = {
4508                 .error = error,
4509                 .data = resource,
4510         };
4511
4512         resource->flags = dev_flow->dv.group ? 0 :
4513                           MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
4514         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
4515                                     resource->flags))
4516                 return rte_flow_error_set(error, EOVERFLOW,
4517                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4518                                           "too many modify header items");
4519         resource->entry.key = __rte_raw_cksum(&resource->ft_type, key_len, 0);
4520         entry = mlx5_hlist_register(sh->modify_cmds, resource->entry.key, &ctx);
4521         if (!entry)
4522                 return -rte_errno;
4523         resource = container_of(entry, typeof(*resource), entry);
4524         dev_flow->handle->dvh.modify_hdr = resource;
4525         return 0;
4526 }
4527
4528 /**
4529  * Get DV flow counter by index.
4530  *
4531  * @param[in] dev
4532  *   Pointer to the Ethernet device structure.
4533  * @param[in] idx
4534  *   mlx5 flow counter index in the container.
4535  * @param[out] ppool
4536  *   mlx5 flow counter pool in the container,
4537  *
4538  * @return
4539  *   Pointer to the counter, NULL otherwise.
4540  */
4541 static struct mlx5_flow_counter *
4542 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
4543                            uint32_t idx,
4544                            struct mlx5_flow_counter_pool **ppool)
4545 {
4546         struct mlx5_priv *priv = dev->data->dev_private;
4547         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4548         struct mlx5_flow_counter_pool *pool;
4549
4550         /* Decrease to original index and clear shared bit. */
4551         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
4552         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
4553         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
4554         MLX5_ASSERT(pool);
4555         if (ppool)
4556                 *ppool = pool;
4557         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
4558 }
4559
4560 /**
4561  * Check the devx counter belongs to the pool.
4562  *
4563  * @param[in] pool
4564  *   Pointer to the counter pool.
4565  * @param[in] id
4566  *   The counter devx ID.
4567  *
4568  * @return
4569  *   True if counter belongs to the pool, false otherwise.
4570  */
4571 static bool
4572 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
4573 {
4574         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
4575                    MLX5_COUNTERS_PER_POOL;
4576
4577         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
4578                 return true;
4579         return false;
4580 }
4581
4582 /**
4583  * Get a pool by devx counter ID.
4584  *
4585  * @param[in] cmng
4586  *   Pointer to the counter management.
4587  * @param[in] id
4588  *   The counter devx ID.
4589  *
4590  * @return
4591  *   The counter pool pointer if exists, NULL otherwise,
4592  */
4593 static struct mlx5_flow_counter_pool *
4594 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
4595 {
4596         uint32_t i;
4597         struct mlx5_flow_counter_pool *pool = NULL;
4598
4599         rte_spinlock_lock(&cmng->pool_update_sl);
4600         /* Check last used pool. */
4601         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
4602             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
4603                 pool = cmng->pools[cmng->last_pool_idx];
4604                 goto out;
4605         }
4606         /* ID out of range means no suitable pool in the container. */
4607         if (id > cmng->max_id || id < cmng->min_id)
4608                 goto out;
4609         /*
4610          * Find the pool from the end of the container, since mostly counter
4611          * ID is sequence increasing, and the last pool should be the needed
4612          * one.
4613          */
4614         i = cmng->n_valid;
4615         while (i--) {
4616                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
4617
4618                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
4619                         pool = pool_tmp;
4620                         break;
4621                 }
4622         }
4623 out:
4624         rte_spinlock_unlock(&cmng->pool_update_sl);
4625         return pool;
4626 }
4627
4628 /**
4629  * Resize a counter container.
4630  *
4631  * @param[in] dev
4632  *   Pointer to the Ethernet device structure.
4633  *
4634  * @return
4635  *   0 on success, otherwise negative errno value and rte_errno is set.
4636  */
4637 static int
4638 flow_dv_container_resize(struct rte_eth_dev *dev)
4639 {
4640         struct mlx5_priv *priv = dev->data->dev_private;
4641         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4642         void *old_pools = cmng->pools;
4643         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
4644         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
4645         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
4646
4647         if (!pools) {
4648                 rte_errno = ENOMEM;
4649                 return -ENOMEM;
4650         }
4651         if (old_pools)
4652                 memcpy(pools, old_pools, cmng->n *
4653                                        sizeof(struct mlx5_flow_counter_pool *));
4654         cmng->n = resize;
4655         cmng->pools = pools;
4656         if (old_pools)
4657                 mlx5_free(old_pools);
4658         return 0;
4659 }
4660
4661 /**
4662  * Query a devx flow counter.
4663  *
4664  * @param[in] dev
4665  *   Pointer to the Ethernet device structure.
4666  * @param[in] cnt
4667  *   Index to the flow counter.
4668  * @param[out] pkts
4669  *   The statistics value of packets.
4670  * @param[out] bytes
4671  *   The statistics value of bytes.
4672  *
4673  * @return
4674  *   0 on success, otherwise a negative errno value and rte_errno is set.
4675  */
4676 static inline int
4677 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
4678                      uint64_t *bytes)
4679 {
4680         struct mlx5_priv *priv = dev->data->dev_private;
4681         struct mlx5_flow_counter_pool *pool = NULL;
4682         struct mlx5_flow_counter *cnt;
4683         int offset;
4684
4685         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
4686         MLX5_ASSERT(pool);
4687         if (priv->sh->cmng.counter_fallback)
4688                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
4689                                         0, pkts, bytes, 0, NULL, NULL, 0);
4690         rte_spinlock_lock(&pool->sl);
4691         if (!pool->raw) {
4692                 *pkts = 0;
4693                 *bytes = 0;
4694         } else {
4695                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
4696                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4697                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4698         }
4699         rte_spinlock_unlock(&pool->sl);
4700         return 0;
4701 }
4702
4703 /**
4704  * Create and initialize a new counter pool.
4705  *
4706  * @param[in] dev
4707  *   Pointer to the Ethernet device structure.
4708  * @param[out] dcs
4709  *   The devX counter handle.
4710  * @param[in] age
4711  *   Whether the pool is for counter that was allocated for aging.
4712  * @param[in/out] cont_cur
4713  *   Pointer to the container pointer, it will be update in pool resize.
4714  *
4715  * @return
4716  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
4717  */
4718 static struct mlx5_flow_counter_pool *
4719 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4720                     uint32_t age)
4721 {
4722         struct mlx5_priv *priv = dev->data->dev_private;
4723         struct mlx5_flow_counter_pool *pool;
4724         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4725         bool fallback = priv->sh->cmng.counter_fallback;
4726         uint32_t size = sizeof(*pool);
4727
4728         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
4729         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
4730         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
4731         if (!pool) {
4732                 rte_errno = ENOMEM;
4733                 return NULL;
4734         }
4735         pool->raw = NULL;
4736         pool->is_aged = !!age;
4737         pool->query_gen = 0;
4738         pool->min_dcs = dcs;
4739         rte_spinlock_init(&pool->sl);
4740         rte_spinlock_init(&pool->csl);
4741         TAILQ_INIT(&pool->counters[0]);
4742         TAILQ_INIT(&pool->counters[1]);
4743         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
4744         rte_spinlock_lock(&cmng->pool_update_sl);
4745         pool->index = cmng->n_valid;
4746         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
4747                 mlx5_free(pool);
4748                 rte_spinlock_unlock(&cmng->pool_update_sl);
4749                 return NULL;
4750         }
4751         cmng->pools[pool->index] = pool;
4752         cmng->n_valid++;
4753         if (unlikely(fallback)) {
4754                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
4755
4756                 if (base < cmng->min_id)
4757                         cmng->min_id = base;
4758                 if (base > cmng->max_id)
4759                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
4760                 cmng->last_pool_idx = pool->index;
4761         }
4762         rte_spinlock_unlock(&cmng->pool_update_sl);
4763         return pool;
4764 }
4765
4766 /**
4767  * Prepare a new counter and/or a new counter pool.
4768  *
4769  * @param[in] dev
4770  *   Pointer to the Ethernet device structure.
4771  * @param[out] cnt_free
4772  *   Where to put the pointer of a new counter.
4773  * @param[in] age
4774  *   Whether the pool is for counter that was allocated for aging.
4775  *
4776  * @return
4777  *   The counter pool pointer and @p cnt_free is set on success,
4778  *   NULL otherwise and rte_errno is set.
4779  */
4780 static struct mlx5_flow_counter_pool *
4781 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4782                              struct mlx5_flow_counter **cnt_free,
4783                              uint32_t age)
4784 {
4785         struct mlx5_priv *priv = dev->data->dev_private;
4786         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4787         struct mlx5_flow_counter_pool *pool;
4788         struct mlx5_counters tmp_tq;
4789         struct mlx5_devx_obj *dcs = NULL;
4790         struct mlx5_flow_counter *cnt;
4791         enum mlx5_counter_type cnt_type =
4792                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
4793         bool fallback = priv->sh->cmng.counter_fallback;
4794         uint32_t i;
4795
4796         if (fallback) {
4797                 /* bulk_bitmap must be 0 for single counter allocation. */
4798                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4799                 if (!dcs)
4800                         return NULL;
4801                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
4802                 if (!pool) {
4803                         pool = flow_dv_pool_create(dev, dcs, age);
4804                         if (!pool) {
4805                                 mlx5_devx_cmd_destroy(dcs);
4806                                 return NULL;
4807                         }
4808                 }
4809                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
4810                 cnt = MLX5_POOL_GET_CNT(pool, i);
4811                 cnt->pool = pool;
4812                 cnt->dcs_when_free = dcs;
4813                 *cnt_free = cnt;
4814                 return pool;
4815         }
4816         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4817         if (!dcs) {
4818                 rte_errno = ENODATA;
4819                 return NULL;
4820         }
4821         pool = flow_dv_pool_create(dev, dcs, age);
4822         if (!pool) {
4823                 mlx5_devx_cmd_destroy(dcs);
4824                 return NULL;
4825         }
4826         TAILQ_INIT(&tmp_tq);
4827         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
4828                 cnt = MLX5_POOL_GET_CNT(pool, i);
4829                 cnt->pool = pool;
4830                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
4831         }
4832         rte_spinlock_lock(&cmng->csl[cnt_type]);
4833         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
4834         rte_spinlock_unlock(&cmng->csl[cnt_type]);
4835         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
4836         (*cnt_free)->pool = pool;
4837         return pool;
4838 }
4839
4840 /**
4841  * Allocate a flow counter.
4842  *
4843  * @param[in] dev
4844  *   Pointer to the Ethernet device structure.
4845  * @param[in] age
4846  *   Whether the counter was allocated for aging.
4847  *
4848  * @return
4849  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
4850  */
4851 static uint32_t
4852 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
4853 {
4854         struct mlx5_priv *priv = dev->data->dev_private;
4855         struct mlx5_flow_counter_pool *pool = NULL;
4856         struct mlx5_flow_counter *cnt_free = NULL;
4857         bool fallback = priv->sh->cmng.counter_fallback;
4858         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
4859         enum mlx5_counter_type cnt_type =
4860                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
4861         uint32_t cnt_idx;
4862
4863         if (!priv->config.devx) {
4864                 rte_errno = ENOTSUP;
4865                 return 0;
4866         }
4867         /* Get free counters from container. */
4868         rte_spinlock_lock(&cmng->csl[cnt_type]);
4869         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
4870         if (cnt_free)
4871                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
4872         rte_spinlock_unlock(&cmng->csl[cnt_type]);
4873         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
4874                 goto err;
4875         pool = cnt_free->pool;
4876         if (fallback)
4877                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
4878         /* Create a DV counter action only in the first time usage. */
4879         if (!cnt_free->action) {
4880                 uint16_t offset;
4881                 struct mlx5_devx_obj *dcs;
4882                 int ret;
4883
4884                 if (!fallback) {
4885                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
4886                         dcs = pool->min_dcs;
4887                 } else {
4888                         offset = 0;
4889                         dcs = cnt_free->dcs_when_free;
4890                 }
4891                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
4892                                                             &cnt_free->action);
4893                 if (ret) {
4894                         rte_errno = errno;
4895                         goto err;
4896                 }
4897         }
4898         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
4899                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
4900         /* Update the counter reset values. */
4901         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
4902                                  &cnt_free->bytes))
4903                 goto err;
4904         if (!fallback && !priv->sh->cmng.query_thread_on)
4905                 /* Start the asynchronous batch query by the host thread. */
4906                 mlx5_set_query_alarm(priv->sh);
4907         return cnt_idx;
4908 err:
4909         if (cnt_free) {
4910                 cnt_free->pool = pool;
4911                 if (fallback)
4912                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
4913                 rte_spinlock_lock(&cmng->csl[cnt_type]);
4914                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
4915                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
4916         }
4917         return 0;
4918 }
4919
4920 /**
4921  * Allocate a shared flow counter.
4922  *
4923  * @param[in] ctx
4924  *   Pointer to the shared counter configuration.
4925  * @param[in] data
4926  *   Pointer to save the allocated counter index.
4927  *
4928  * @return
4929  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
4930  */
4931
4932 static int32_t
4933 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
4934 {
4935         struct mlx5_shared_counter_conf *conf = ctx;
4936         struct rte_eth_dev *dev = conf->dev;
4937         struct mlx5_flow_counter *cnt;
4938
4939         data->dword = flow_dv_counter_alloc(dev, 0);
4940         data->dword |= MLX5_CNT_SHARED_OFFSET;
4941         cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
4942         cnt->shared_info.id = conf->id;
4943         return 0;
4944 }
4945
4946 /**
4947  * Get a shared flow counter.
4948  *
4949  * @param[in] dev
4950  *   Pointer to the Ethernet device structure.
4951  * @param[in] id
4952  *   Counter identifier.
4953  *
4954  * @return
4955  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
4956  */
4957 static uint32_t
4958 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
4959 {
4960         struct mlx5_priv *priv = dev->data->dev_private;
4961         struct mlx5_shared_counter_conf conf = {
4962                 .dev = dev,
4963                 .id = id,
4964         };
4965         union mlx5_l3t_data data = {
4966                 .dword = 0,
4967         };
4968
4969         mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
4970                                flow_dv_counter_alloc_shared_cb, &conf);
4971         return data.dword;
4972 }
4973
4974 /**
4975  * Get age param from counter index.
4976  *
4977  * @param[in] dev
4978  *   Pointer to the Ethernet device structure.
4979  * @param[in] counter
4980  *   Index to the counter handler.
4981  *
4982  * @return
4983  *   The aging parameter specified for the counter index.
4984  */
4985 static struct mlx5_age_param*
4986 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
4987                                 uint32_t counter)
4988 {
4989         struct mlx5_flow_counter *cnt;
4990         struct mlx5_flow_counter_pool *pool = NULL;
4991
4992         flow_dv_counter_get_by_idx(dev, counter, &pool);
4993         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
4994         cnt = MLX5_POOL_GET_CNT(pool, counter);
4995         return MLX5_CNT_TO_AGE(cnt);
4996 }
4997
4998 /**
4999  * Remove a flow counter from aged counter list.
5000  *
5001  * @param[in] dev
5002  *   Pointer to the Ethernet device structure.
5003  * @param[in] counter
5004  *   Index to the counter handler.
5005  * @param[in] cnt
5006  *   Pointer to the counter handler.
5007  */
5008 static void
5009 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
5010                                 uint32_t counter, struct mlx5_flow_counter *cnt)
5011 {
5012         struct mlx5_age_info *age_info;
5013         struct mlx5_age_param *age_param;
5014         struct mlx5_priv *priv = dev->data->dev_private;
5015         uint16_t expected = AGE_CANDIDATE;
5016
5017         age_info = GET_PORT_AGE_INFO(priv);
5018         age_param = flow_dv_counter_idx_get_age(dev, counter);
5019         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
5020                                          AGE_FREE, false, __ATOMIC_RELAXED,
5021                                          __ATOMIC_RELAXED)) {
5022                 /**
5023                  * We need the lock even it is age timeout,
5024                  * since counter may still in process.
5025                  */
5026                 rte_spinlock_lock(&age_info->aged_sl);
5027                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
5028                 rte_spinlock_unlock(&age_info->aged_sl);
5029                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
5030         }
5031 }
5032
5033 /**
5034  * Release a flow counter.
5035  *
5036  * @param[in] dev
5037  *   Pointer to the Ethernet device structure.
5038  * @param[in] counter
5039  *   Index to the counter handler.
5040  */
5041 static void
5042 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
5043 {
5044         struct mlx5_priv *priv = dev->data->dev_private;
5045         struct mlx5_flow_counter_pool *pool = NULL;
5046         struct mlx5_flow_counter *cnt;
5047         enum mlx5_counter_type cnt_type;
5048
5049         if (!counter)
5050                 return;
5051         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5052         MLX5_ASSERT(pool);
5053         if (IS_SHARED_CNT(counter) &&
5054             mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl, cnt->shared_info.id))
5055                 return;
5056         if (pool->is_aged)
5057                 flow_dv_counter_remove_from_age(dev, counter, cnt);
5058         cnt->pool = pool;
5059         /*
5060          * Put the counter back to list to be updated in none fallback mode.
5061          * Currently, we are using two list alternately, while one is in query,
5062          * add the freed counter to the other list based on the pool query_gen
5063          * value. After query finishes, add counter the list to the global
5064          * container counter list. The list changes while query starts. In
5065          * this case, lock will not be needed as query callback and release
5066          * function both operate with the different list.
5067          *
5068          */
5069         if (!priv->sh->cmng.counter_fallback) {
5070                 rte_spinlock_lock(&pool->csl);
5071                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
5072                 rte_spinlock_unlock(&pool->csl);
5073         } else {
5074                 cnt->dcs_when_free = cnt->dcs_when_active;
5075                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
5076                                            MLX5_COUNTER_TYPE_ORIGIN;
5077                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
5078                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
5079                                   cnt, next);
5080                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
5081         }
5082 }
5083
5084 /**
5085  * Verify the @p attributes will be correctly understood by the NIC and store
5086  * them in the @p flow if everything is correct.
5087  *
5088  * @param[in] dev
5089  *   Pointer to dev struct.
5090  * @param[in] attributes
5091  *   Pointer to flow attributes
5092  * @param[in] external
5093  *   This flow rule is created by request external to PMD.
5094  * @param[out] error
5095  *   Pointer to error structure.
5096  *
5097  * @return
5098  *   - 0 on success and non root table.
5099  *   - 1 on success and root table.
5100  *   - a negative errno value otherwise and rte_errno is set.
5101  */
5102 static int
5103 flow_dv_validate_attributes(struct rte_eth_dev *dev,
5104                             const struct mlx5_flow_tunnel *tunnel,
5105                             const struct rte_flow_attr *attributes,
5106                             const struct flow_grp_info *grp_info,
5107                             struct rte_flow_error *error)
5108 {
5109         struct mlx5_priv *priv = dev->data->dev_private;
5110         uint32_t priority_max = priv->config.flow_prio - 1;
5111         int ret = 0;
5112
5113 #ifndef HAVE_MLX5DV_DR
5114         RTE_SET_USED(tunnel);
5115         RTE_SET_USED(grp_info);
5116         if (attributes->group)
5117                 return rte_flow_error_set(error, ENOTSUP,
5118                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
5119                                           NULL,
5120                                           "groups are not supported");
5121 #else
5122         uint32_t table = 0;
5123
5124         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
5125                                        grp_info, error);
5126         if (ret)
5127                 return ret;
5128         if (!table)
5129                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
5130 #endif
5131         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
5132             attributes->priority >= priority_max)
5133                 return rte_flow_error_set(error, ENOTSUP,
5134                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
5135                                           NULL,
5136                                           "priority out of range");
5137         if (attributes->transfer) {
5138                 if (!priv->config.dv_esw_en)
5139                         return rte_flow_error_set
5140                                 (error, ENOTSUP,
5141                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5142                                  "E-Switch dr is not supported");
5143                 if (!(priv->representor || priv->master))
5144                         return rte_flow_error_set
5145                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5146                                  NULL, "E-Switch configuration can only be"
5147                                  " done by a master or a representor device");
5148                 if (attributes->egress)
5149                         return rte_flow_error_set
5150                                 (error, ENOTSUP,
5151                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
5152                                  "egress is not supported");
5153         }
5154         if (!(attributes->egress ^ attributes->ingress))
5155                 return rte_flow_error_set(error, ENOTSUP,
5156                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
5157                                           "must specify exactly one of "
5158                                           "ingress or egress");
5159         return ret;
5160 }
5161
5162 /**
5163  * Internal validation function. For validating both actions and items.
5164  *
5165  * @param[in] dev
5166  *   Pointer to the rte_eth_dev structure.
5167  * @param[in] attr
5168  *   Pointer to the flow attributes.
5169  * @param[in] items
5170  *   Pointer to the list of items.
5171  * @param[in] actions
5172  *   Pointer to the list of actions.
5173  * @param[in] external
5174  *   This flow rule is created by request external to PMD.
5175  * @param[in] hairpin
5176  *   Number of hairpin TX actions, 0 means classic flow.
5177  * @param[out] error
5178  *   Pointer to the error structure.
5179  *
5180  * @return
5181  *   0 on success, a negative errno value otherwise and rte_errno is set.
5182  */
5183 static int
5184 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
5185                  const struct rte_flow_item items[],
5186                  const struct rte_flow_action actions[],
5187                  bool external, int hairpin, struct rte_flow_error *error)
5188 {
5189         int ret;
5190         uint64_t action_flags = 0;
5191         uint64_t item_flags = 0;
5192         uint64_t last_item = 0;
5193         uint8_t next_protocol = 0xff;
5194         uint16_t ether_type = 0;
5195         int actions_n = 0;
5196         uint8_t item_ipv6_proto = 0;
5197         const struct rte_flow_item *gre_item = NULL;
5198         const struct rte_flow_action_raw_decap *decap;
5199         const struct rte_flow_action_raw_encap *encap;
5200         const struct rte_flow_action_rss *rss;
5201         const struct rte_flow_item_tcp nic_tcp_mask = {
5202                 .hdr = {
5203                         .tcp_flags = 0xFF,
5204                         .src_port = RTE_BE16(UINT16_MAX),
5205                         .dst_port = RTE_BE16(UINT16_MAX),
5206                 }
5207         };
5208         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
5209                 .hdr = {
5210                         .src_addr =
5211                         "\xff\xff\xff\xff\xff\xff\xff\xff"
5212                         "\xff\xff\xff\xff\xff\xff\xff\xff",
5213                         .dst_addr =
5214                         "\xff\xff\xff\xff\xff\xff\xff\xff"
5215                         "\xff\xff\xff\xff\xff\xff\xff\xff",
5216                         .vtc_flow = RTE_BE32(0xffffffff),
5217                         .proto = 0xff,
5218                         .hop_limits = 0xff,
5219                 },
5220                 .has_frag_ext = 1,
5221         };
5222         const struct rte_flow_item_ecpri nic_ecpri_mask = {
5223                 .hdr = {
5224                         .common = {
5225                                 .u32 =
5226                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
5227                                         .type = 0xFF,
5228                                         }).u32),
5229                         },
5230                         .dummy[0] = 0xffffffff,
5231                 },
5232         };
5233         struct mlx5_priv *priv = dev->data->dev_private;
5234         struct mlx5_dev_config *dev_conf = &priv->config;
5235         uint16_t queue_index = 0xFFFF;
5236         const struct rte_flow_item_vlan *vlan_m = NULL;
5237         int16_t rw_act_num = 0;
5238         uint64_t is_root;
5239         const struct mlx5_flow_tunnel *tunnel;
5240         struct flow_grp_info grp_info = {
5241                 .external = !!external,
5242                 .transfer = !!attr->transfer,
5243                 .fdb_def_rule = !!priv->fdb_def_rule,
5244         };
5245         const struct rte_eth_hairpin_conf *conf;
5246
5247         if (items == NULL)
5248                 return -1;
5249         if (is_flow_tunnel_match_rule(dev, attr, items, actions)) {
5250                 tunnel = flow_items_to_tunnel(items);
5251                 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
5252                                 MLX5_FLOW_ACTION_DECAP;
5253         } else if (is_flow_tunnel_steer_rule(dev, attr, items, actions)) {
5254                 tunnel = flow_actions_to_tunnel(actions);
5255                 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
5256         } else {
5257                 tunnel = NULL;
5258         }
5259         grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
5260                                 (dev, tunnel, attr, items, actions);
5261         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
5262         if (ret < 0)
5263                 return ret;
5264         is_root = (uint64_t)ret;
5265         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
5266                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
5267                 int type = items->type;
5268
5269                 if (!mlx5_flow_os_item_supported(type))
5270                         return rte_flow_error_set(error, ENOTSUP,
5271                                                   RTE_FLOW_ERROR_TYPE_ITEM,
5272                                                   NULL, "item not supported");
5273                 switch (type) {
5274                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
5275                         if (items[0].type != (typeof(items[0].type))
5276                                                 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL)
5277                                 return rte_flow_error_set
5278                                                 (error, EINVAL,
5279                                                 RTE_FLOW_ERROR_TYPE_ITEM,
5280                                                 NULL, "MLX5 private items "
5281                                                 "must be the first");
5282                         break;
5283                 case RTE_FLOW_ITEM_TYPE_VOID:
5284                         break;
5285                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
5286                         ret = flow_dv_validate_item_port_id
5287                                         (dev, items, attr, item_flags, error);
5288                         if (ret < 0)
5289                                 return ret;
5290                         last_item = MLX5_FLOW_ITEM_PORT_ID;
5291                         break;
5292                 case RTE_FLOW_ITEM_TYPE_ETH:
5293                         ret = mlx5_flow_validate_item_eth(items, item_flags,
5294                                                           true, error);
5295                         if (ret < 0)
5296                                 return ret;
5297                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
5298                                              MLX5_FLOW_LAYER_OUTER_L2;
5299                         if (items->mask != NULL && items->spec != NULL) {
5300                                 ether_type =
5301                                         ((const struct rte_flow_item_eth *)
5302                                          items->spec)->type;
5303                                 ether_type &=
5304                                         ((const struct rte_flow_item_eth *)
5305                                          items->mask)->type;
5306                                 ether_type = rte_be_to_cpu_16(ether_type);
5307                         } else {
5308                                 ether_type = 0;
5309                         }
5310                         break;
5311                 case RTE_FLOW_ITEM_TYPE_VLAN:
5312                         ret = flow_dv_validate_item_vlan(items, item_flags,
5313                                                          dev, error);
5314                         if (ret < 0)
5315                                 return ret;
5316                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
5317                                              MLX5_FLOW_LAYER_OUTER_VLAN;
5318                         if (items->mask != NULL && items->spec != NULL) {
5319                                 ether_type =
5320                                         ((const struct rte_flow_item_vlan *)
5321                                          items->spec)->inner_type;
5322                                 ether_type &=
5323                                         ((const struct rte_flow_item_vlan *)
5324                                          items->mask)->inner_type;
5325                                 ether_type = rte_be_to_cpu_16(ether_type);
5326                         } else {
5327                                 ether_type = 0;
5328                         }
5329                         /* Store outer VLAN mask for of_push_vlan action. */
5330                         if (!tunnel)
5331                                 vlan_m = items->mask;
5332                         break;
5333                 case RTE_FLOW_ITEM_TYPE_IPV4:
5334                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5335                                                   &item_flags, &tunnel);
5336                         ret = flow_dv_validate_item_ipv4(items, item_flags,
5337                                                          last_item, ether_type,
5338                                                          error);
5339                         if (ret < 0)
5340                                 return ret;
5341                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
5342                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
5343                         if (items->mask != NULL &&
5344                             ((const struct rte_flow_item_ipv4 *)
5345                              items->mask)->hdr.next_proto_id) {
5346                                 next_protocol =
5347                                         ((const struct rte_flow_item_ipv4 *)
5348                                          (items->spec))->hdr.next_proto_id;
5349                                 next_protocol &=
5350                                         ((const struct rte_flow_item_ipv4 *)
5351                                          (items->mask))->hdr.next_proto_id;
5352                         } else {
5353                                 /* Reset for inner layer. */
5354                                 next_protocol = 0xff;
5355                         }
5356                         break;
5357                 case RTE_FLOW_ITEM_TYPE_IPV6:
5358                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5359                                                   &item_flags, &tunnel);
5360                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
5361                                                            last_item,
5362                                                            ether_type,
5363                                                            &nic_ipv6_mask,
5364                                                            error);
5365                         if (ret < 0)
5366                                 return ret;
5367                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
5368                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
5369                         if (items->mask != NULL &&
5370                             ((const struct rte_flow_item_ipv6 *)
5371                              items->mask)->hdr.proto) {
5372                                 item_ipv6_proto =
5373                                         ((const struct rte_flow_item_ipv6 *)
5374                                          items->spec)->hdr.proto;
5375                                 next_protocol =
5376                                         ((const struct rte_flow_item_ipv6 *)
5377                                          items->spec)->hdr.proto;
5378                                 next_protocol &=
5379                                         ((const struct rte_flow_item_ipv6 *)
5380                                          items->mask)->hdr.proto;
5381                         } else {
5382                                 /* Reset for inner layer. */
5383                                 next_protocol = 0xff;
5384                         }
5385                         break;
5386                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
5387                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
5388                                                                   item_flags,
5389                                                                   error);
5390                         if (ret < 0)
5391                                 return ret;
5392                         last_item = tunnel ?
5393                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
5394                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
5395                         if (items->mask != NULL &&
5396                             ((const struct rte_flow_item_ipv6_frag_ext *)
5397                              items->mask)->hdr.next_header) {
5398                                 next_protocol =
5399                                 ((const struct rte_flow_item_ipv6_frag_ext *)
5400                                  items->spec)->hdr.next_header;
5401                                 next_protocol &=
5402                                 ((const struct rte_flow_item_ipv6_frag_ext *)
5403                                  items->mask)->hdr.next_header;
5404                         } else {
5405                                 /* Reset for inner layer. */
5406                                 next_protocol = 0xff;
5407                         }
5408                         break;
5409                 case RTE_FLOW_ITEM_TYPE_TCP:
5410                         ret = mlx5_flow_validate_item_tcp
5411                                                 (items, item_flags,
5412                                                  next_protocol,
5413                                                  &nic_tcp_mask,
5414                                                  error);
5415                         if (ret < 0)
5416                                 return ret;
5417                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
5418                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
5419                         break;
5420                 case RTE_FLOW_ITEM_TYPE_UDP:
5421                         ret = mlx5_flow_validate_item_udp(items, item_flags,
5422                                                           next_protocol,
5423                                                           error);
5424                         if (ret < 0)
5425                                 return ret;
5426                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
5427                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
5428                         break;
5429                 case RTE_FLOW_ITEM_TYPE_GRE:
5430                         ret = mlx5_flow_validate_item_gre(items, item_flags,
5431                                                           next_protocol, error);
5432                         if (ret < 0)
5433                                 return ret;
5434                         gre_item = items;
5435                         last_item = MLX5_FLOW_LAYER_GRE;
5436                         break;
5437                 case RTE_FLOW_ITEM_TYPE_NVGRE:
5438                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
5439                                                             next_protocol,
5440                                                             error);
5441                         if (ret < 0)
5442                                 return ret;
5443                         last_item = MLX5_FLOW_LAYER_NVGRE;
5444                         break;
5445                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
5446                         ret = mlx5_flow_validate_item_gre_key
5447                                 (items, item_flags, gre_item, error);
5448                         if (ret < 0)
5449                                 return ret;
5450                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
5451                         break;
5452                 case RTE_FLOW_ITEM_TYPE_VXLAN:
5453                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
5454                                                             error);
5455                         if (ret < 0)
5456                                 return ret;
5457                         last_item = MLX5_FLOW_LAYER_VXLAN;
5458                         break;
5459                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
5460                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
5461                                                                 item_flags, dev,
5462                                                                 error);
5463                         if (ret < 0)
5464                                 return ret;
5465                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
5466                         break;
5467                 case RTE_FLOW_ITEM_TYPE_GENEVE:
5468                         ret = mlx5_flow_validate_item_geneve(items,
5469                                                              item_flags, dev,
5470                                                              error);
5471                         if (ret < 0)
5472                                 return ret;
5473                         last_item = MLX5_FLOW_LAYER_GENEVE;
5474                         break;
5475                 case RTE_FLOW_ITEM_TYPE_MPLS:
5476                         ret = mlx5_flow_validate_item_mpls(dev, items,
5477                                                            item_flags,
5478                                                            last_item, error);
5479                         if (ret < 0)
5480                                 return ret;
5481                         last_item = MLX5_FLOW_LAYER_MPLS;
5482                         break;
5483
5484                 case RTE_FLOW_ITEM_TYPE_MARK:
5485                         ret = flow_dv_validate_item_mark(dev, items, attr,
5486                                                          error);
5487                         if (ret < 0)
5488                                 return ret;
5489                         last_item = MLX5_FLOW_ITEM_MARK;
5490                         break;
5491                 case RTE_FLOW_ITEM_TYPE_META:
5492                         ret = flow_dv_validate_item_meta(dev, items, attr,
5493                                                          error);
5494                         if (ret < 0)
5495                                 return ret;
5496                         last_item = MLX5_FLOW_ITEM_METADATA;
5497                         break;
5498                 case RTE_FLOW_ITEM_TYPE_ICMP:
5499                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
5500                                                            next_protocol,
5501                                                            error);
5502                         if (ret < 0)
5503                                 return ret;
5504                         last_item = MLX5_FLOW_LAYER_ICMP;
5505                         break;
5506                 case RTE_FLOW_ITEM_TYPE_ICMP6:
5507                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
5508                                                             next_protocol,
5509                                                             error);
5510                         if (ret < 0)
5511                                 return ret;
5512                         item_ipv6_proto = IPPROTO_ICMPV6;
5513                         last_item = MLX5_FLOW_LAYER_ICMP6;
5514                         break;
5515                 case RTE_FLOW_ITEM_TYPE_TAG:
5516                         ret = flow_dv_validate_item_tag(dev, items,
5517                                                         attr, error);
5518                         if (ret < 0)
5519                                 return ret;
5520                         last_item = MLX5_FLOW_ITEM_TAG;
5521                         break;
5522                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
5523                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
5524                         break;
5525                 case RTE_FLOW_ITEM_TYPE_GTP:
5526                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
5527                                                         error);
5528                         if (ret < 0)
5529                                 return ret;
5530                         last_item = MLX5_FLOW_LAYER_GTP;
5531                         break;
5532                 case RTE_FLOW_ITEM_TYPE_ECPRI:
5533                         /* Capacity will be checked in the translate stage. */
5534                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
5535                                                             last_item,
5536                                                             ether_type,
5537                                                             &nic_ecpri_mask,
5538                                                             error);
5539                         if (ret < 0)
5540                                 return ret;
5541                         last_item = MLX5_FLOW_LAYER_ECPRI;
5542                         break;
5543                 default:
5544                         return rte_flow_error_set(error, ENOTSUP,
5545                                                   RTE_FLOW_ERROR_TYPE_ITEM,
5546                                                   NULL, "item not supported");
5547                 }
5548                 item_flags |= last_item;
5549         }
5550         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5551                 int type = actions->type;
5552
5553                 if (!mlx5_flow_os_action_supported(type))
5554                         return rte_flow_error_set(error, ENOTSUP,
5555                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5556                                                   actions,
5557                                                   "action not supported");
5558                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5559                         return rte_flow_error_set(error, ENOTSUP,
5560                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5561                                                   actions, "too many actions");
5562                 switch (type) {
5563                 case RTE_FLOW_ACTION_TYPE_VOID:
5564                         break;
5565                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5566                         ret = flow_dv_validate_action_port_id(dev,
5567                                                               action_flags,
5568                                                               actions,
5569                                                               attr,
5570                                                               error);
5571                         if (ret)
5572                                 return ret;
5573                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5574                         ++actions_n;
5575                         break;
5576                 case RTE_FLOW_ACTION_TYPE_FLAG:
5577                         ret = flow_dv_validate_action_flag(dev, action_flags,
5578                                                            attr, error);
5579                         if (ret < 0)
5580                                 return ret;
5581                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
5582                                 /* Count all modify-header actions as one. */
5583                                 if (!(action_flags &
5584                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
5585                                         ++actions_n;
5586                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
5587                                                 MLX5_FLOW_ACTION_MARK_EXT;
5588                         } else {
5589                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
5590                                 ++actions_n;
5591                         }
5592                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
5593                         break;
5594                 case RTE_FLOW_ACTION_TYPE_MARK:
5595                         ret = flow_dv_validate_action_mark(dev, actions,
5596                                                            action_flags,
5597                                                            attr, error);
5598                         if (ret < 0)
5599                                 return ret;
5600                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
5601                                 /* Count all modify-header actions as one. */
5602                                 if (!(action_flags &
5603                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
5604                                         ++actions_n;
5605                                 action_flags |= MLX5_FLOW_ACTION_MARK |
5606                                                 MLX5_FLOW_ACTION_MARK_EXT;
5607                         } else {
5608                                 action_flags |= MLX5_FLOW_ACTION_MARK;
5609                                 ++actions_n;
5610                         }
5611                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
5612                         break;
5613                 case RTE_FLOW_ACTION_TYPE_SET_META:
5614                         ret = flow_dv_validate_action_set_meta(dev, actions,
5615                                                                action_flags,
5616                                                                attr, error);
5617                         if (ret < 0)
5618                                 return ret;
5619                         /* Count all modify-header actions as one action. */
5620                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5621                                 ++actions_n;
5622                         action_flags |= MLX5_FLOW_ACTION_SET_META;
5623                         rw_act_num += MLX5_ACT_NUM_SET_META;
5624                         break;
5625                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5626                         ret = flow_dv_validate_action_set_tag(dev, actions,
5627                                                               action_flags,
5628                                                               attr, error);
5629                         if (ret < 0)
5630                                 return ret;
5631                         /* Count all modify-header actions as one action. */
5632                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5633                                 ++actions_n;
5634                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
5635                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
5636                         break;
5637                 case RTE_FLOW_ACTION_TYPE_DROP:
5638                         ret = mlx5_flow_validate_action_drop(action_flags,
5639                                                              attr, error);
5640                         if (ret < 0)
5641                                 return ret;
5642                         action_flags |= MLX5_FLOW_ACTION_DROP;
5643                         ++actions_n;
5644                         break;
5645                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5646                         ret = mlx5_flow_validate_action_queue(actions,
5647                                                               action_flags, dev,
5648                                                               attr, error);
5649                         if (ret < 0)
5650                                 return ret;
5651                         queue_index = ((const struct rte_flow_action_queue *)
5652                                                         (actions->conf))->index;
5653                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
5654                         ++actions_n;
5655                         break;
5656                 case RTE_FLOW_ACTION_TYPE_RSS:
5657                         rss = actions->conf;
5658                         ret = mlx5_flow_validate_action_rss(actions,
5659                                                             action_flags, dev,
5660                                                             attr, item_flags,
5661                                                             error);
5662                         if (ret < 0)
5663                                 return ret;
5664                         if (rss != NULL && rss->queue_num)
5665                                 queue_index = rss->queue[0];
5666                         action_flags |= MLX5_FLOW_ACTION_RSS;
5667                         ++actions_n;
5668                         break;
5669                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
5670                         ret =
5671                         mlx5_flow_validate_action_default_miss(action_flags,
5672                                         attr, error);
5673                         if (ret < 0)
5674                                 return ret;
5675                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
5676                         ++actions_n;
5677                         break;
5678                 case RTE_FLOW_ACTION_TYPE_COUNT:
5679                         ret = flow_dv_validate_action_count(dev, error);
5680                         if (ret < 0)
5681                                 return ret;
5682                         action_flags |= MLX5_FLOW_ACTION_COUNT;
5683                         ++actions_n;
5684                         break;
5685                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5686                         if (flow_dv_validate_action_pop_vlan(dev,
5687                                                              action_flags,
5688                                                              actions,
5689                                                              item_flags, attr,
5690                                                              error))
5691                                 return -rte_errno;
5692                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
5693                         ++actions_n;
5694                         break;
5695                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5696                         ret = flow_dv_validate_action_push_vlan(dev,
5697                                                                 action_flags,
5698                                                                 vlan_m,
5699                                                                 actions, attr,
5700                                                                 error);
5701                         if (ret < 0)
5702                                 return ret;
5703                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
5704                         ++actions_n;
5705                         break;
5706                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5707                         ret = flow_dv_validate_action_set_vlan_pcp
5708                                                 (action_flags, actions, error);
5709                         if (ret < 0)
5710                                 return ret;
5711                         /* Count PCP with push_vlan command. */
5712                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
5713                         break;
5714                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5715                         ret = flow_dv_validate_action_set_vlan_vid
5716                                                 (item_flags, action_flags,
5717                                                  actions, error);
5718                         if (ret < 0)
5719                                 return ret;
5720                         /* Count VID with push_vlan command. */
5721                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
5722                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
5723                         break;
5724                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5725                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5726                         ret = flow_dv_validate_action_l2_encap(dev,
5727                                                                action_flags,
5728                                                                actions, attr,
5729                                                                error);
5730                         if (ret < 0)
5731                                 return ret;
5732                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
5733                         ++actions_n;
5734                         break;
5735                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5736                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5737                         ret = flow_dv_validate_action_decap(dev, action_flags,
5738                                                             attr, error);
5739                         if (ret < 0)
5740                                 return ret;
5741                         action_flags |= MLX5_FLOW_ACTION_DECAP;
5742                         ++actions_n;
5743                         break;
5744                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5745                         ret = flow_dv_validate_action_raw_encap_decap
5746                                 (dev, NULL, actions->conf, attr, &action_flags,
5747                                  &actions_n, error);
5748                         if (ret < 0)
5749                                 return ret;
5750                         break;
5751                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5752                         decap = actions->conf;
5753                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5754                                 ;
5755                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5756                                 encap = NULL;
5757                                 actions--;
5758                         } else {
5759                                 encap = actions->conf;
5760                         }
5761                         ret = flow_dv_validate_action_raw_encap_decap
5762                                            (dev,
5763                                             decap ? decap : &empty_decap, encap,
5764                                             attr, &action_flags, &actions_n,
5765                                             error);
5766                         if (ret < 0)
5767                                 return ret;
5768                         break;
5769                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5770                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5771                         ret = flow_dv_validate_action_modify_mac(action_flags,
5772                                                                  actions,
5773                                                                  item_flags,
5774                                                                  error);
5775                         if (ret < 0)
5776                                 return ret;
5777                         /* Count all modify-header actions as one action. */
5778                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5779                                 ++actions_n;
5780                         action_flags |= actions->type ==
5781                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
5782                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
5783                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
5784                         /*
5785                          * Even if the source and destination MAC addresses have
5786                          * overlap in the header with 4B alignment, the convert
5787                          * function will handle them separately and 4 SW actions
5788                          * will be created. And 2 actions will be added each
5789                          * time no matter how many bytes of address will be set.
5790                          */
5791                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
5792                         break;
5793                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5794                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5795                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
5796                                                                   actions,
5797                                                                   item_flags,
5798                                                                   error);
5799                         if (ret < 0)
5800                                 return ret;
5801                         /* Count all modify-header actions as one action. */
5802                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5803                                 ++actions_n;
5804                         action_flags |= actions->type ==
5805                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
5806                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
5807                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
5808                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
5809                         break;
5810                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5811                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5812                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
5813                                                                   actions,
5814                                                                   item_flags,
5815                                                                   error);
5816                         if (ret < 0)
5817                                 return ret;
5818                         if (item_ipv6_proto == IPPROTO_ICMPV6)
5819                                 return rte_flow_error_set(error, ENOTSUP,
5820                                         RTE_FLOW_ERROR_TYPE_ACTION,
5821                                         actions,
5822                                         "Can't change header "
5823                                         "with ICMPv6 proto");
5824                         /* Count all modify-header actions as one action. */
5825                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5826                                 ++actions_n;
5827                         action_flags |= actions->type ==
5828                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
5829                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
5830                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
5831                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
5832                         break;
5833                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5834                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5835                         ret = flow_dv_validate_action_modify_tp(action_flags,
5836                                                                 actions,
5837                                                                 item_flags,
5838                                                                 error);
5839                         if (ret < 0)
5840                                 return ret;
5841                         /* Count all modify-header actions as one action. */
5842                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5843                                 ++actions_n;
5844                         action_flags |= actions->type ==
5845                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5846                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
5847                                                 MLX5_FLOW_ACTION_SET_TP_DST;
5848                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
5849                         break;
5850                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5851                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5852                         ret = flow_dv_validate_action_modify_ttl(action_flags,
5853                                                                  actions,
5854                                                                  item_flags,
5855                                                                  error);
5856                         if (ret < 0)
5857                                 return ret;
5858                         /* Count all modify-header actions as one action. */
5859                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5860                                 ++actions_n;
5861                         action_flags |= actions->type ==
5862                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
5863                                                 MLX5_FLOW_ACTION_SET_TTL :
5864                                                 MLX5_FLOW_ACTION_DEC_TTL;
5865                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
5866                         break;
5867                 case RTE_FLOW_ACTION_TYPE_JUMP:
5868                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
5869                                                            action_flags,
5870                                                            attr, external,
5871                                                            error);
5872                         if (ret)
5873                                 return ret;
5874                         ++actions_n;
5875                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5876                         break;
5877                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5878                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5879                         ret = flow_dv_validate_action_modify_tcp_seq
5880                                                                 (action_flags,
5881                                                                  actions,
5882                                                                  item_flags,
5883                                                                  error);
5884                         if (ret < 0)
5885                                 return ret;
5886                         /* Count all modify-header actions as one action. */
5887                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5888                                 ++actions_n;
5889                         action_flags |= actions->type ==
5890                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5891                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
5892                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5893                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
5894                         break;
5895                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5896                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5897                         ret = flow_dv_validate_action_modify_tcp_ack
5898                                                                 (action_flags,
5899                                                                  actions,
5900                                                                  item_flags,
5901                                                                  error);
5902                         if (ret < 0)
5903                                 return ret;
5904                         /* Count all modify-header actions as one action. */
5905                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5906                                 ++actions_n;
5907                         action_flags |= actions->type ==
5908                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5909                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5910                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5911                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
5912                         break;
5913                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5914                         break;
5915                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5916                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5917                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
5918                         break;
5919                 case RTE_FLOW_ACTION_TYPE_METER:
5920                         ret = mlx5_flow_validate_action_meter(dev,
5921                                                               action_flags,
5922                                                               actions, attr,
5923                                                               error);
5924                         if (ret < 0)
5925                                 return ret;
5926                         action_flags |= MLX5_FLOW_ACTION_METER;
5927                         ++actions_n;
5928                         /* Meter action will add one more TAG action. */
5929                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
5930                         break;
5931                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
5932                         if (!attr->group)
5933                                 return rte_flow_error_set(error, ENOTSUP,
5934                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5935                                                                            NULL,
5936                           "Shared ASO age action is not supported for group 0");
5937                         action_flags |= MLX5_FLOW_ACTION_AGE;
5938                         ++actions_n;
5939                         break;
5940                 case RTE_FLOW_ACTION_TYPE_AGE:
5941                         ret = flow_dv_validate_action_age(action_flags,
5942                                                           actions, dev,
5943                                                           error);
5944                         if (ret < 0)
5945                                 return ret;
5946                         action_flags |= MLX5_FLOW_ACTION_AGE;
5947                         ++actions_n;
5948                         break;
5949                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5950                         ret = flow_dv_validate_action_modify_ipv4_dscp
5951                                                          (action_flags,
5952                                                           actions,
5953                                                           item_flags,
5954                                                           error);
5955                         if (ret < 0)
5956                                 return ret;
5957                         /* Count all modify-header actions as one action. */
5958                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5959                                 ++actions_n;
5960                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5961                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
5962                         break;
5963                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5964                         ret = flow_dv_validate_action_modify_ipv6_dscp
5965                                                                 (action_flags,
5966                                                                  actions,
5967                                                                  item_flags,
5968                                                                  error);
5969                         if (ret < 0)
5970                                 return ret;
5971                         /* Count all modify-header actions as one action. */
5972                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5973                                 ++actions_n;
5974                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5975                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
5976                         break;
5977                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5978                         ret = flow_dv_validate_action_sample(action_flags,
5979                                                              actions, dev,
5980                                                              attr, error);
5981                         if (ret < 0)
5982                                 return ret;
5983                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
5984                         ++actions_n;
5985                         break;
5986                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
5987                         if (actions[0].type != (typeof(actions[0].type))
5988                                 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET)
5989                                 return rte_flow_error_set
5990                                                 (error, EINVAL,
5991                                                 RTE_FLOW_ERROR_TYPE_ACTION,
5992                                                 NULL, "MLX5 private action "
5993                                                 "must be the first");
5994
5995                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
5996                         break;
5997                 default:
5998                         return rte_flow_error_set(error, ENOTSUP,
5999                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6000                                                   actions,
6001                                                   "action not supported");
6002                 }
6003         }
6004         /*
6005          * Validate actions in flow rules
6006          * - Explicit decap action is prohibited by the tunnel offload API.
6007          * - Drop action in tunnel steer rule is prohibited by the API.
6008          * - Application cannot use MARK action because it's value can mask
6009          *   tunnel default miss nitification.
6010          * - JUMP in tunnel match rule has no support in current PMD
6011          *   implementation.
6012          * - TAG & META are reserved for future uses.
6013          */
6014         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
6015                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
6016                                             MLX5_FLOW_ACTION_MARK     |
6017                                             MLX5_FLOW_ACTION_SET_TAG  |
6018                                             MLX5_FLOW_ACTION_SET_META |
6019                                             MLX5_FLOW_ACTION_DROP;
6020
6021                 if (action_flags & bad_actions_mask)
6022                         return rte_flow_error_set
6023                                         (error, EINVAL,
6024                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6025                                         "Invalid RTE action in tunnel "
6026                                         "set decap rule");
6027                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
6028                         return rte_flow_error_set
6029                                         (error, EINVAL,
6030                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6031                                         "tunnel set decap rule must terminate "
6032                                         "with JUMP");
6033                 if (!attr->ingress)
6034                         return rte_flow_error_set
6035                                         (error, EINVAL,
6036                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6037                                         "tunnel flows for ingress traffic only");
6038         }
6039         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
6040                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
6041                                             MLX5_FLOW_ACTION_MARK    |
6042                                             MLX5_FLOW_ACTION_SET_TAG |
6043                                             MLX5_FLOW_ACTION_SET_META;
6044
6045                 if (action_flags & bad_actions_mask)
6046                         return rte_flow_error_set
6047                                         (error, EINVAL,
6048                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6049                                         "Invalid RTE action in tunnel "
6050                                         "set match rule");
6051         }
6052         /*
6053          * Validate the drop action mutual exclusion with other actions.
6054          * Drop action is mutually-exclusive with any other action, except for
6055          * Count action.
6056          */
6057         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
6058             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
6059                 return rte_flow_error_set(error, EINVAL,
6060                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6061                                           "Drop action is mutually-exclusive "
6062                                           "with any other action, except for "
6063                                           "Count action");
6064         /* Eswitch has few restrictions on using items and actions */
6065         if (attr->transfer) {
6066                 if (!mlx5_flow_ext_mreg_supported(dev) &&
6067                     action_flags & MLX5_FLOW_ACTION_FLAG)
6068                         return rte_flow_error_set(error, ENOTSUP,
6069                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6070                                                   NULL,
6071                                                   "unsupported action FLAG");
6072                 if (!mlx5_flow_ext_mreg_supported(dev) &&
6073                     action_flags & MLX5_FLOW_ACTION_MARK)
6074                         return rte_flow_error_set(error, ENOTSUP,
6075                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6076                                                   NULL,
6077                                                   "unsupported action MARK");
6078                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
6079                         return rte_flow_error_set(error, ENOTSUP,
6080                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6081                                                   NULL,
6082                                                   "unsupported action QUEUE");
6083                 if (action_flags & MLX5_FLOW_ACTION_RSS)
6084                         return rte_flow_error_set(error, ENOTSUP,
6085                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6086                                                   NULL,
6087                                                   "unsupported action RSS");
6088                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
6089                         return rte_flow_error_set(error, EINVAL,
6090                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6091                                                   actions,
6092                                                   "no fate action is found");
6093         } else {
6094                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
6095                         return rte_flow_error_set(error, EINVAL,
6096                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6097                                                   actions,
6098                                                   "no fate action is found");
6099         }
6100         /*
6101          * Continue validation for Xcap and VLAN actions.
6102          * If hairpin is working in explicit TX rule mode, there is no actions
6103          * splitting and the validation of hairpin ingress flow should be the
6104          * same as other standard flows.
6105          */
6106         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
6107                              MLX5_FLOW_VLAN_ACTIONS)) &&
6108             (queue_index == 0xFFFF ||
6109              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
6110              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
6111              conf->tx_explicit != 0))) {
6112                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
6113                     MLX5_FLOW_XCAP_ACTIONS)
6114                         return rte_flow_error_set(error, ENOTSUP,
6115                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6116                                                   NULL, "encap and decap "
6117                                                   "combination aren't supported");
6118                 if (!attr->transfer && attr->ingress) {
6119                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
6120                                 return rte_flow_error_set
6121                                                 (error, ENOTSUP,
6122                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6123                                                  NULL, "encap is not supported"
6124                                                  " for ingress traffic");
6125                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
6126                                 return rte_flow_error_set
6127                                                 (error, ENOTSUP,
6128                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6129                                                  NULL, "push VLAN action not "
6130                                                  "supported for ingress");
6131                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
6132                                         MLX5_FLOW_VLAN_ACTIONS)
6133                                 return rte_flow_error_set
6134                                                 (error, ENOTSUP,
6135                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6136                                                  NULL, "no support for "
6137                                                  "multiple VLAN actions");
6138                 }
6139         }
6140         /*
6141          * Hairpin flow will add one more TAG action in TX implicit mode.
6142          * In TX explicit mode, there will be no hairpin flow ID.
6143          */
6144         if (hairpin > 0)
6145                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
6146         /* extra metadata enabled: one more TAG action will be add. */
6147         if (dev_conf->dv_flow_en &&
6148             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
6149             mlx5_flow_ext_mreg_supported(dev))
6150                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
6151         if ((uint32_t)rw_act_num >
6152                         flow_dv_modify_hdr_action_max(dev, is_root)) {
6153                 return rte_flow_error_set(error, ENOTSUP,
6154                                           RTE_FLOW_ERROR_TYPE_ACTION,
6155                                           NULL, "too many header modify"
6156                                           " actions to support");
6157         }
6158         return 0;
6159 }
6160
6161 /**
6162  * Internal preparation function. Allocates the DV flow size,
6163  * this size is constant.
6164  *
6165  * @param[in] dev
6166  *   Pointer to the rte_eth_dev structure.
6167  * @param[in] attr
6168  *   Pointer to the flow attributes.
6169  * @param[in] items
6170  *   Pointer to the list of items.
6171  * @param[in] actions
6172  *   Pointer to the list of actions.
6173  * @param[out] error
6174  *   Pointer to the error structure.
6175  *
6176  * @return
6177  *   Pointer to mlx5_flow object on success,
6178  *   otherwise NULL and rte_errno is set.
6179  */
6180 static struct mlx5_flow *
6181 flow_dv_prepare(struct rte_eth_dev *dev,
6182                 const struct rte_flow_attr *attr __rte_unused,
6183                 const struct rte_flow_item items[] __rte_unused,
6184                 const struct rte_flow_action actions[] __rte_unused,
6185                 struct rte_flow_error *error)
6186 {
6187         uint32_t handle_idx = 0;
6188         struct mlx5_flow *dev_flow;
6189         struct mlx5_flow_handle *dev_handle;
6190         struct mlx5_priv *priv = dev->data->dev_private;
6191         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
6192
6193         MLX5_ASSERT(wks);
6194         /* In case of corrupting the memory. */
6195         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
6196                 rte_flow_error_set(error, ENOSPC,
6197                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6198                                    "not free temporary device flow");
6199                 return NULL;
6200         }
6201         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
6202                                    &handle_idx);
6203         if (!dev_handle) {
6204                 rte_flow_error_set(error, ENOMEM,
6205                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6206                                    "not enough memory to create flow handle");
6207                 return NULL;
6208         }
6209         MLX5_ASSERT(wks->flow_idx + 1 < RTE_DIM(wks->flows));
6210         dev_flow = &wks->flows[wks->flow_idx++];
6211         dev_flow->handle = dev_handle;
6212         dev_flow->handle_idx = handle_idx;
6213         /*
6214          * In some old rdma-core releases, before continuing, a check of the
6215          * length of matching parameter will be done at first. It needs to use
6216          * the length without misc4 param. If the flow has misc4 support, then
6217          * the length needs to be adjusted accordingly. Each param member is
6218          * aligned with a 64B boundary naturally.
6219          */
6220         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param) -
6221                                   MLX5_ST_SZ_BYTES(fte_match_set_misc4);
6222         /*
6223          * The matching value needs to be cleared to 0 before using. In the
6224          * past, it will be automatically cleared when using rte_*alloc
6225          * API. The time consumption will be almost the same as before.
6226          */
6227         memset(dev_flow->dv.value.buf, 0, MLX5_ST_SZ_BYTES(fte_match_param));
6228         dev_flow->ingress = attr->ingress;
6229         dev_flow->dv.transfer = attr->transfer;
6230         return dev_flow;
6231 }
6232
6233 #ifdef RTE_LIBRTE_MLX5_DEBUG
6234 /**
6235  * Sanity check for match mask and value. Similar to check_valid_spec() in
6236  * kernel driver. If unmasked bit is present in value, it returns failure.
6237  *
6238  * @param match_mask
6239  *   pointer to match mask buffer.
6240  * @param match_value
6241  *   pointer to match value buffer.
6242  *
6243  * @return
6244  *   0 if valid, -EINVAL otherwise.
6245  */
6246 static int
6247 flow_dv_check_valid_spec(void *match_mask, void *match_value)
6248 {
6249         uint8_t *m = match_mask;
6250         uint8_t *v = match_value;
6251         unsigned int i;
6252
6253         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
6254                 if (v[i] & ~m[i]) {
6255                         DRV_LOG(ERR,
6256                                 "match_value differs from match_criteria"
6257                                 " %p[%u] != %p[%u]",
6258                                 match_value, i, match_mask, i);
6259                         return -EINVAL;
6260                 }
6261         }
6262         return 0;
6263 }
6264 #endif
6265
6266 /**
6267  * Add match of ip_version.
6268  *
6269  * @param[in] group
6270  *   Flow group.
6271  * @param[in] headers_v
6272  *   Values header pointer.
6273  * @param[in] headers_m
6274  *   Masks header pointer.
6275  * @param[in] ip_version
6276  *   The IP version to set.
6277  */
6278 static inline void
6279 flow_dv_set_match_ip_version(uint32_t group,
6280                              void *headers_v,
6281                              void *headers_m,
6282                              uint8_t ip_version)
6283 {
6284         if (group == 0)
6285                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
6286         else
6287                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
6288                          ip_version);
6289         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
6290         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
6291         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
6292 }
6293
6294 /**
6295  * Add Ethernet item to matcher and to the value.
6296  *
6297  * @param[in, out] matcher
6298  *   Flow matcher.
6299  * @param[in, out] key
6300  *   Flow matcher value.
6301  * @param[in] item
6302  *   Flow pattern to translate.
6303  * @param[in] inner
6304  *   Item is inner pattern.
6305  */
6306 static void
6307 flow_dv_translate_item_eth(void *matcher, void *key,
6308                            const struct rte_flow_item *item, int inner,
6309                            uint32_t group)
6310 {
6311         const struct rte_flow_item_eth *eth_m = item->mask;
6312         const struct rte_flow_item_eth *eth_v = item->spec;
6313         const struct rte_flow_item_eth nic_mask = {
6314                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
6315                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
6316                 .type = RTE_BE16(0xffff),
6317                 .has_vlan = 0,
6318         };
6319         void *hdrs_m;
6320         void *hdrs_v;
6321         char *l24_v;
6322         unsigned int i;
6323
6324         if (!eth_v)
6325                 return;
6326         if (!eth_m)
6327                 eth_m = &nic_mask;
6328         if (inner) {
6329                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6330                                          inner_headers);
6331                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6332         } else {
6333                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6334                                          outer_headers);
6335                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6336         }
6337         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
6338                &eth_m->dst, sizeof(eth_m->dst));
6339         /* The value must be in the range of the mask. */
6340         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
6341         for (i = 0; i < sizeof(eth_m->dst); ++i)
6342                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
6343         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
6344                &eth_m->src, sizeof(eth_m->src));
6345         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
6346         /* The value must be in the range of the mask. */
6347         for (i = 0; i < sizeof(eth_m->dst); ++i)
6348                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
6349         /*
6350          * HW supports match on one Ethertype, the Ethertype following the last
6351          * VLAN tag of the packet (see PRM).
6352          * Set match on ethertype only if ETH header is not followed by VLAN.
6353          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
6354          * ethertype, and use ip_version field instead.
6355          * eCPRI over Ether layer will use type value 0xAEFE.
6356          */
6357         if (eth_m->type == 0xFFFF) {
6358                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
6359                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
6360                 switch (eth_v->type) {
6361                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
6362                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
6363                         return;
6364                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
6365                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
6366                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
6367                         return;
6368                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
6369                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
6370                         return;
6371                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
6372                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
6373                         return;
6374                 default:
6375                         break;
6376                 }
6377         }
6378         if (eth_m->has_vlan) {
6379                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
6380                 if (eth_v->has_vlan) {
6381                         /*
6382                          * Here, when also has_more_vlan field in VLAN item is
6383                          * not set, only single-tagged packets will be matched.
6384                          */
6385                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
6386                         return;
6387                 }
6388         }
6389         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
6390                  rte_be_to_cpu_16(eth_m->type));
6391         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
6392         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
6393 }
6394
6395 /**
6396  * Add VLAN item to matcher and to the value.
6397  *
6398  * @param[in, out] dev_flow
6399  *   Flow descriptor.
6400  * @param[in, out] matcher
6401  *   Flow matcher.
6402  * @param[in, out] key
6403  *   Flow matcher value.
6404  * @param[in] item
6405  *   Flow pattern to translate.
6406  * @param[in] inner
6407  *   Item is inner pattern.
6408  */
6409 static void
6410 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
6411                             void *matcher, void *key,
6412                             const struct rte_flow_item *item,
6413                             int inner, uint32_t group)
6414 {
6415         const struct rte_flow_item_vlan *vlan_m = item->mask;
6416         const struct rte_flow_item_vlan *vlan_v = item->spec;
6417         void *hdrs_m;
6418         void *hdrs_v;
6419         uint16_t tci_m;
6420         uint16_t tci_v;
6421
6422         if (inner) {
6423                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6424                                          inner_headers);
6425                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6426         } else {
6427                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
6428                                          outer_headers);
6429                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6430                 /*
6431                  * This is workaround, masks are not supported,
6432                  * and pre-validated.
6433                  */
6434                 if (vlan_v)
6435                         dev_flow->handle->vf_vlan.tag =
6436                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
6437         }
6438         /*
6439          * When VLAN item exists in flow, mark packet as tagged,
6440          * even if TCI is not specified.
6441          */
6442         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
6443                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
6444                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
6445         }
6446         if (!vlan_v)
6447                 return;
6448         if (!vlan_m)
6449                 vlan_m = &rte_flow_item_vlan_mask;
6450         tci_m = rte_be_to_cpu_16(vlan_m->tci);
6451         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
6452         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
6453         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
6454         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
6455         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
6456         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
6457         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
6458         /*
6459          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
6460          * ethertype, and use ip_version field instead.
6461          */
6462         if (vlan_m->inner_type == 0xFFFF) {
6463                 switch (vlan_v->inner_type) {
6464                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
6465                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
6466                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
6467                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
6468                         return;
6469                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
6470                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
6471                         return;
6472                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
6473                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
6474                         return;
6475                 default:
6476                         break;
6477                 }
6478         }
6479         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
6480                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
6481                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
6482                 /* Only one vlan_tag bit can be set. */
6483                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
6484                 return;
6485         }
6486         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
6487                  rte_be_to_cpu_16(vlan_m->inner_type));
6488         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
6489                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
6490 }
6491
6492 /**
6493  * Add IPV4 item to matcher and to the value.
6494  *
6495  * @param[in, out] matcher
6496  *   Flow matcher.
6497  * @param[in, out] key
6498  *   Flow matcher value.
6499  * @param[in] item
6500  *   Flow pattern to translate.
6501  * @param[in] inner
6502  *   Item is inner pattern.
6503  * @param[in] group
6504  *   The group to insert the rule.
6505  */
6506 static void
6507 flow_dv_translate_item_ipv4(void *matcher, void *key,
6508                             const struct rte_flow_item *item,
6509                             int inner, uint32_t group)
6510 {
6511         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
6512         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
6513         const struct rte_flow_item_ipv4 nic_mask = {
6514                 .hdr = {
6515                         .src_addr = RTE_BE32(0xffffffff),
6516                         .dst_addr = RTE_BE32(0xffffffff),
6517                         .type_of_service = 0xff,
6518                         .next_proto_id = 0xff,
6519                         .time_to_live = 0xff,
6520                 },
6521         };
6522         void *headers_m;
6523         void *headers_v;
6524         char *l24_m;
6525         char *l24_v;
6526         uint8_t tos;
6527
6528         if (inner) {
6529                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6530                                          inner_headers);
6531                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6532         } else {
6533                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6534                                          outer_headers);
6535                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6536         }
6537         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
6538         if (!ipv4_v)
6539                 return;
6540         if (!ipv4_m)
6541                 ipv4_m = &nic_mask;
6542         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6543                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
6544         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6545                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
6546         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
6547         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
6548         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6549                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
6550         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6551                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
6552         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
6553         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
6554         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
6555         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
6556                  ipv4_m->hdr.type_of_service);
6557         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
6558         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
6559                  ipv4_m->hdr.type_of_service >> 2);
6560         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
6561         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
6562                  ipv4_m->hdr.next_proto_id);
6563         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6564                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
6565         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
6566                  ipv4_m->hdr.time_to_live);
6567         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
6568                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
6569         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
6570                  !!(ipv4_m->hdr.fragment_offset));
6571         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
6572                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
6573 }
6574
6575 /**
6576  * Add IPV6 item to matcher and to the value.
6577  *
6578  * @param[in, out] matcher
6579  *   Flow matcher.
6580  * @param[in, out] key
6581  *   Flow matcher value.
6582  * @param[in] item
6583  *   Flow pattern to translate.
6584  * @param[in] inner
6585  *   Item is inner pattern.
6586  * @param[in] group
6587  *   The group to insert the rule.
6588  */
6589 static void
6590 flow_dv_translate_item_ipv6(void *matcher, void *key,
6591                             const struct rte_flow_item *item,
6592                             int inner, uint32_t group)
6593 {
6594         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
6595         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
6596         const struct rte_flow_item_ipv6 nic_mask = {
6597                 .hdr = {
6598                         .src_addr =
6599                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
6600                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
6601                         .dst_addr =
6602                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
6603                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
6604                         .vtc_flow = RTE_BE32(0xffffffff),
6605                         .proto = 0xff,
6606                         .hop_limits = 0xff,
6607                 },
6608         };
6609         void *headers_m;
6610         void *headers_v;
6611         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6612         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6613         char *l24_m;
6614         char *l24_v;
6615         uint32_t vtc_m;
6616         uint32_t vtc_v;
6617         int i;
6618         int size;
6619
6620         if (inner) {
6621                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6622                                          inner_headers);
6623                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6624         } else {
6625                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6626                                          outer_headers);
6627                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6628         }
6629         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
6630         if (!ipv6_v)
6631                 return;
6632         if (!ipv6_m)
6633                 ipv6_m = &nic_mask;
6634         size = sizeof(ipv6_m->hdr.dst_addr);
6635         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6636                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
6637         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6638                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
6639         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
6640         for (i = 0; i < size; ++i)
6641                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
6642         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
6643                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
6644         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
6645                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
6646         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
6647         for (i = 0; i < size; ++i)
6648                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
6649         /* TOS. */
6650         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
6651         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
6652         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
6653         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
6654         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
6655         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
6656         /* Label. */
6657         if (inner) {
6658                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
6659                          vtc_m);
6660                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
6661                          vtc_v);
6662         } else {
6663                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
6664                          vtc_m);
6665                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
6666                          vtc_v);
6667         }
6668         /* Protocol. */
6669         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
6670                  ipv6_m->hdr.proto);
6671         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6672                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
6673         /* Hop limit. */
6674         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
6675                  ipv6_m->hdr.hop_limits);
6676         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
6677                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
6678         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
6679                  !!(ipv6_m->has_frag_ext));
6680         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
6681                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
6682 }
6683
6684 /**
6685  * Add IPV6 fragment extension item to matcher and to the value.
6686  *
6687  * @param[in, out] matcher
6688  *   Flow matcher.
6689  * @param[in, out] key
6690  *   Flow matcher value.
6691  * @param[in] item
6692  *   Flow pattern to translate.
6693  * @param[in] inner
6694  *   Item is inner pattern.
6695  */
6696 static void
6697 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
6698                                      const struct rte_flow_item *item,
6699                                      int inner)
6700 {
6701         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
6702         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
6703         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
6704                 .hdr = {
6705                         .next_header = 0xff,
6706                         .frag_data = RTE_BE16(0xffff),
6707                 },
6708         };
6709         void *headers_m;
6710         void *headers_v;
6711
6712         if (inner) {
6713                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6714                                          inner_headers);
6715                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6716         } else {
6717                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6718                                          outer_headers);
6719                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6720         }
6721         /* IPv6 fragment extension item exists, so packet is IP fragment. */
6722         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6723         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
6724         if (!ipv6_frag_ext_v)
6725                 return;
6726         if (!ipv6_frag_ext_m)
6727                 ipv6_frag_ext_m = &nic_mask;
6728         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
6729                  ipv6_frag_ext_m->hdr.next_header);
6730         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6731                  ipv6_frag_ext_v->hdr.next_header &
6732                  ipv6_frag_ext_m->hdr.next_header);
6733 }
6734
6735 /**
6736  * Add TCP item to matcher and to the value.
6737  *
6738  * @param[in, out] matcher
6739  *   Flow matcher.
6740  * @param[in, out] key
6741  *   Flow matcher value.
6742  * @param[in] item
6743  *   Flow pattern to translate.
6744  * @param[in] inner
6745  *   Item is inner pattern.
6746  */
6747 static void
6748 flow_dv_translate_item_tcp(void *matcher, void *key,
6749                            const struct rte_flow_item *item,
6750                            int inner)
6751 {
6752         const struct rte_flow_item_tcp *tcp_m = item->mask;
6753         const struct rte_flow_item_tcp *tcp_v = item->spec;
6754         void *headers_m;
6755         void *headers_v;
6756
6757         if (inner) {
6758                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6759                                          inner_headers);
6760                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6761         } else {
6762                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6763                                          outer_headers);
6764                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6765         }
6766         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6767         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
6768         if (!tcp_v)
6769                 return;
6770         if (!tcp_m)
6771                 tcp_m = &rte_flow_item_tcp_mask;
6772         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
6773                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
6774         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
6775                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
6776         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
6777                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
6778         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
6779                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
6780         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
6781                  tcp_m->hdr.tcp_flags);
6782         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
6783                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
6784 }
6785
6786 /**
6787  * Add UDP item to matcher and to the value.
6788  *
6789  * @param[in, out] matcher
6790  *   Flow matcher.
6791  * @param[in, out] key
6792  *   Flow matcher value.
6793  * @param[in] item
6794  *   Flow pattern to translate.
6795  * @param[in] inner
6796  *   Item is inner pattern.
6797  */
6798 static void
6799 flow_dv_translate_item_udp(void *matcher, void *key,
6800                            const struct rte_flow_item *item,
6801                            int inner)
6802 {
6803         const struct rte_flow_item_udp *udp_m = item->mask;
6804         const struct rte_flow_item_udp *udp_v = item->spec;
6805         void *headers_m;
6806         void *headers_v;
6807
6808         if (inner) {
6809                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6810                                          inner_headers);
6811                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6812         } else {
6813                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6814                                          outer_headers);
6815                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6816         }
6817         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6818         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
6819         if (!udp_v)
6820                 return;
6821         if (!udp_m)
6822                 udp_m = &rte_flow_item_udp_mask;
6823         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
6824                  rte_be_to_cpu_16(udp_m->hdr.src_port));
6825         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
6826                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
6827         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
6828                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
6829         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
6830                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
6831 }
6832
6833 /**
6834  * Add GRE optional Key item to matcher and to the value.
6835  *
6836  * @param[in, out] matcher
6837  *   Flow matcher.
6838  * @param[in, out] key
6839  *   Flow matcher value.
6840  * @param[in] item
6841  *   Flow pattern to translate.
6842  * @param[in] inner
6843  *   Item is inner pattern.
6844  */
6845 static void
6846 flow_dv_translate_item_gre_key(void *matcher, void *key,
6847                                    const struct rte_flow_item *item)
6848 {
6849         const rte_be32_t *key_m = item->mask;
6850         const rte_be32_t *key_v = item->spec;
6851         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6852         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6853         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
6854
6855         /* GRE K bit must be on and should already be validated */
6856         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
6857         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
6858         if (!key_v)
6859                 return;
6860         if (!key_m)
6861                 key_m = &gre_key_default_mask;
6862         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
6863                  rte_be_to_cpu_32(*key_m) >> 8);
6864         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
6865                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
6866         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
6867                  rte_be_to_cpu_32(*key_m) & 0xFF);
6868         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
6869                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
6870 }
6871
6872 /**
6873  * Add GRE item to matcher and to the value.
6874  *
6875  * @param[in, out] matcher
6876  *   Flow matcher.
6877  * @param[in, out] key
6878  *   Flow matcher value.
6879  * @param[in] item
6880  *   Flow pattern to translate.
6881  * @param[in] inner
6882  *   Item is inner pattern.
6883  */
6884 static void
6885 flow_dv_translate_item_gre(void *matcher, void *key,
6886                            const struct rte_flow_item *item,
6887                            int inner)
6888 {
6889         const struct rte_flow_item_gre *gre_m = item->mask;
6890         const struct rte_flow_item_gre *gre_v = item->spec;
6891         void *headers_m;
6892         void *headers_v;
6893         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6894         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6895         struct {
6896                 union {
6897                         __extension__
6898                         struct {
6899                                 uint16_t version:3;
6900                                 uint16_t rsvd0:9;
6901                                 uint16_t s_present:1;
6902                                 uint16_t k_present:1;
6903                                 uint16_t rsvd_bit1:1;
6904                                 uint16_t c_present:1;
6905                         };
6906                         uint16_t value;
6907                 };
6908         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
6909
6910         if (inner) {
6911                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6912                                          inner_headers);
6913                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6914         } else {
6915                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6916                                          outer_headers);
6917                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6918         }
6919         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6920         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
6921         if (!gre_v)
6922                 return;
6923         if (!gre_m)
6924                 gre_m = &rte_flow_item_gre_mask;
6925         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
6926                  rte_be_to_cpu_16(gre_m->protocol));
6927         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
6928                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
6929         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
6930         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
6931         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
6932                  gre_crks_rsvd0_ver_m.c_present);
6933         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
6934                  gre_crks_rsvd0_ver_v.c_present &
6935                  gre_crks_rsvd0_ver_m.c_present);
6936         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
6937                  gre_crks_rsvd0_ver_m.k_present);
6938         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
6939                  gre_crks_rsvd0_ver_v.k_present &
6940                  gre_crks_rsvd0_ver_m.k_present);
6941         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
6942                  gre_crks_rsvd0_ver_m.s_present);
6943         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
6944                  gre_crks_rsvd0_ver_v.s_present &
6945                  gre_crks_rsvd0_ver_m.s_present);
6946 }
6947
6948 /**
6949  * Add NVGRE item to matcher and to the value.
6950  *
6951  * @param[in, out] matcher
6952  *   Flow matcher.
6953  * @param[in, out] key
6954  *   Flow matcher value.
6955  * @param[in] item
6956  *   Flow pattern to translate.
6957  * @param[in] inner
6958  *   Item is inner pattern.
6959  */
6960 static void
6961 flow_dv_translate_item_nvgre(void *matcher, void *key,
6962                              const struct rte_flow_item *item,
6963                              int inner)
6964 {
6965         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
6966         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
6967         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6968         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6969         const char *tni_flow_id_m;
6970         const char *tni_flow_id_v;
6971         char *gre_key_m;
6972         char *gre_key_v;
6973         int size;
6974         int i;
6975
6976         /* For NVGRE, GRE header fields must be set with defined values. */
6977         const struct rte_flow_item_gre gre_spec = {
6978                 .c_rsvd0_ver = RTE_BE16(0x2000),
6979                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
6980         };
6981         const struct rte_flow_item_gre gre_mask = {
6982                 .c_rsvd0_ver = RTE_BE16(0xB000),
6983                 .protocol = RTE_BE16(UINT16_MAX),
6984         };
6985         const struct rte_flow_item gre_item = {
6986                 .spec = &gre_spec,
6987                 .mask = &gre_mask,
6988                 .last = NULL,
6989         };
6990         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
6991         if (!nvgre_v)
6992                 return;
6993         if (!nvgre_m)
6994                 nvgre_m = &rte_flow_item_nvgre_mask;
6995         tni_flow_id_m = (const char *)nvgre_m->tni;
6996         tni_flow_id_v = (const char *)nvgre_v->tni;
6997         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
6998         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
6999         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
7000         memcpy(gre_key_m, tni_flow_id_m, size);
7001         for (i = 0; i < size; ++i)
7002                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
7003 }
7004
7005 /**
7006  * Add VXLAN item to matcher and to the value.
7007  *
7008  * @param[in, out] matcher
7009  *   Flow matcher.
7010  * @param[in, out] key
7011  *   Flow matcher value.
7012  * @param[in] item
7013  *   Flow pattern to translate.
7014  * @param[in] inner
7015  *   Item is inner pattern.
7016  */
7017 static void
7018 flow_dv_translate_item_vxlan(void *matcher, void *key,
7019                              const struct rte_flow_item *item,
7020                              int inner)
7021 {
7022         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
7023         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
7024         void *headers_m;
7025         void *headers_v;
7026         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7027         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7028         char *vni_m;
7029         char *vni_v;
7030         uint16_t dport;
7031         int size;
7032         int i;
7033
7034         if (inner) {
7035                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7036                                          inner_headers);
7037                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7038         } else {
7039                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7040                                          outer_headers);
7041                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7042         }
7043         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
7044                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
7045         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7046                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7047                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7048         }
7049         if (!vxlan_v)
7050                 return;
7051         if (!vxlan_m)
7052                 vxlan_m = &rte_flow_item_vxlan_mask;
7053         size = sizeof(vxlan_m->vni);
7054         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
7055         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
7056         memcpy(vni_m, vxlan_m->vni, size);
7057         for (i = 0; i < size; ++i)
7058                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
7059 }
7060
7061 /**
7062  * Add VXLAN-GPE item to matcher and to the value.
7063  *
7064  * @param[in, out] matcher
7065  *   Flow matcher.
7066  * @param[in, out] key
7067  *   Flow matcher value.
7068  * @param[in] item
7069  *   Flow pattern to translate.
7070  * @param[in] inner
7071  *   Item is inner pattern.
7072  */
7073
7074 static void
7075 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
7076                                  const struct rte_flow_item *item, int inner)
7077 {
7078         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
7079         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
7080         void *headers_m;
7081         void *headers_v;
7082         void *misc_m =
7083                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
7084         void *misc_v =
7085                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7086         char *vni_m;
7087         char *vni_v;
7088         uint16_t dport;
7089         int size;
7090         int i;
7091         uint8_t flags_m = 0xff;
7092         uint8_t flags_v = 0xc;
7093
7094         if (inner) {
7095                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7096                                          inner_headers);
7097                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7098         } else {
7099                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7100                                          outer_headers);
7101                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7102         }
7103         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
7104                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
7105         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7106                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7107                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7108         }
7109         if (!vxlan_v)
7110                 return;
7111         if (!vxlan_m)
7112                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
7113         size = sizeof(vxlan_m->vni);
7114         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
7115         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
7116         memcpy(vni_m, vxlan_m->vni, size);
7117         for (i = 0; i < size; ++i)
7118                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
7119         if (vxlan_m->flags) {
7120                 flags_m = vxlan_m->flags;
7121                 flags_v = vxlan_v->flags;
7122         }
7123         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
7124         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
7125         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
7126                  vxlan_m->protocol);
7127         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
7128                  vxlan_v->protocol);
7129 }
7130
7131 /**
7132  * Add Geneve item to matcher and to the value.
7133  *
7134  * @param[in, out] matcher
7135  *   Flow matcher.
7136  * @param[in, out] key
7137  *   Flow matcher value.
7138  * @param[in] item
7139  *   Flow pattern to translate.
7140  * @param[in] inner
7141  *   Item is inner pattern.
7142  */
7143
7144 static void
7145 flow_dv_translate_item_geneve(void *matcher, void *key,
7146                               const struct rte_flow_item *item, int inner)
7147 {
7148         const struct rte_flow_item_geneve *geneve_m = item->mask;
7149         const struct rte_flow_item_geneve *geneve_v = item->spec;
7150         void *headers_m;
7151         void *headers_v;
7152         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7153         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7154         uint16_t dport;
7155         uint16_t gbhdr_m;
7156         uint16_t gbhdr_v;
7157         char *vni_m;
7158         char *vni_v;
7159         size_t size, i;
7160
7161         if (inner) {
7162                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7163                                          inner_headers);
7164                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7165         } else {
7166                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7167                                          outer_headers);
7168                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7169         }
7170         dport = MLX5_UDP_PORT_GENEVE;
7171         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7172                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7173                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7174         }
7175         if (!geneve_v)
7176                 return;
7177         if (!geneve_m)
7178                 geneve_m = &rte_flow_item_geneve_mask;
7179         size = sizeof(geneve_m->vni);
7180         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
7181         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
7182         memcpy(vni_m, geneve_m->vni, size);
7183         for (i = 0; i < size; ++i)
7184                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
7185         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
7186                  rte_be_to_cpu_16(geneve_m->protocol));
7187         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
7188                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
7189         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
7190         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
7191         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
7192                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
7193         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
7194                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
7195         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
7196                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
7197         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
7198                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
7199                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
7200 }
7201
7202 /**
7203  * Add MPLS item to matcher and to the value.
7204  *
7205  * @param[in, out] matcher
7206  *   Flow matcher.
7207  * @param[in, out] key
7208  *   Flow matcher value.
7209  * @param[in] item
7210  *   Flow pattern to translate.
7211  * @param[in] prev_layer
7212  *   The protocol layer indicated in previous item.
7213  * @param[in] inner
7214  *   Item is inner pattern.
7215  */
7216 static void
7217 flow_dv_translate_item_mpls(void *matcher, void *key,
7218                             const struct rte_flow_item *item,
7219                             uint64_t prev_layer,
7220                             int inner)
7221 {
7222         const uint32_t *in_mpls_m = item->mask;
7223         const uint32_t *in_mpls_v = item->spec;
7224         uint32_t *out_mpls_m = 0;
7225         uint32_t *out_mpls_v = 0;
7226         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7227         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7228         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
7229                                      misc_parameters_2);
7230         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
7231         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
7232         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7233
7234         switch (prev_layer) {
7235         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
7236                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
7237                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
7238                          MLX5_UDP_PORT_MPLS);
7239                 break;
7240         case MLX5_FLOW_LAYER_GRE:
7241                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
7242                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
7243                          RTE_ETHER_TYPE_MPLS);
7244                 break;
7245         default:
7246                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
7247                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
7248                          IPPROTO_MPLS);
7249                 break;
7250         }
7251         if (!in_mpls_v)
7252                 return;
7253         if (!in_mpls_m)
7254                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
7255         switch (prev_layer) {
7256         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
7257                 out_mpls_m =
7258                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
7259                                                  outer_first_mpls_over_udp);
7260                 out_mpls_v =
7261                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
7262                                                  outer_first_mpls_over_udp);
7263                 break;
7264         case MLX5_FLOW_LAYER_GRE:
7265                 out_mpls_m =
7266                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
7267                                                  outer_first_mpls_over_gre);
7268                 out_mpls_v =
7269                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
7270                                                  outer_first_mpls_over_gre);
7271                 break;
7272         default:
7273                 /* Inner MPLS not over GRE is not supported. */
7274                 if (!inner) {
7275                         out_mpls_m =
7276                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
7277                                                          misc2_m,
7278                                                          outer_first_mpls);
7279                         out_mpls_v =
7280                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
7281                                                          misc2_v,
7282                                                          outer_first_mpls);
7283                 }
7284                 break;
7285         }
7286         if (out_mpls_m && out_mpls_v) {
7287                 *out_mpls_m = *in_mpls_m;
7288                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
7289         }
7290 }
7291
7292 /**
7293  * Add metadata register item to matcher
7294  *
7295  * @param[in, out] matcher
7296  *   Flow matcher.
7297  * @param[in, out] key
7298  *   Flow matcher value.
7299  * @param[in] reg_type
7300  *   Type of device metadata register
7301  * @param[in] value
7302  *   Register value
7303  * @param[in] mask
7304  *   Register mask
7305  */
7306 static void
7307 flow_dv_match_meta_reg(void *matcher, void *key,
7308                        enum modify_reg reg_type,
7309                        uint32_t data, uint32_t mask)
7310 {
7311         void *misc2_m =
7312                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
7313         void *misc2_v =
7314                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
7315         uint32_t temp;
7316
7317         data &= mask;
7318         switch (reg_type) {
7319         case REG_A:
7320                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
7321                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
7322                 break;
7323         case REG_B:
7324                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
7325                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
7326                 break;
7327         case REG_C_0:
7328                 /*
7329                  * The metadata register C0 field might be divided into
7330                  * source vport index and META item value, we should set
7331                  * this field according to specified mask, not as whole one.
7332                  */
7333                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
7334                 temp |= mask;
7335                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
7336                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
7337                 temp &= ~mask;
7338                 temp |= data;
7339                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
7340                 break;
7341         case REG_C_1:
7342                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
7343                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
7344                 break;
7345         case REG_C_2:
7346                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
7347                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
7348                 break;
7349         case REG_C_3:
7350                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
7351                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
7352                 break;
7353         case REG_C_4:
7354                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
7355                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
7356                 break;
7357         case REG_C_5:
7358                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
7359                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
7360                 break;
7361         case REG_C_6:
7362                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
7363                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
7364                 break;
7365         case REG_C_7:
7366                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
7367                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
7368                 break;
7369         default:
7370                 MLX5_ASSERT(false);
7371                 break;
7372         }
7373 }
7374
7375 /**
7376  * Add MARK item to matcher
7377  *
7378  * @param[in] dev
7379  *   The device to configure through.
7380  * @param[in, out] matcher
7381  *   Flow matcher.
7382  * @param[in, out] key
7383  *   Flow matcher value.
7384  * @param[in] item
7385  *   Flow pattern to translate.
7386  */
7387 static void
7388 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
7389                             void *matcher, void *key,
7390                             const struct rte_flow_item *item)
7391 {
7392         struct mlx5_priv *priv = dev->data->dev_private;
7393         const struct rte_flow_item_mark *mark;
7394         uint32_t value;
7395         uint32_t mask;
7396
7397         mark = item->mask ? (const void *)item->mask :
7398                             &rte_flow_item_mark_mask;
7399         mask = mark->id & priv->sh->dv_mark_mask;
7400         mark = (const void *)item->spec;
7401         MLX5_ASSERT(mark);
7402         value = mark->id & priv->sh->dv_mark_mask & mask;
7403         if (mask) {
7404                 enum modify_reg reg;
7405
7406                 /* Get the metadata register index for the mark. */
7407                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
7408                 MLX5_ASSERT(reg > 0);
7409                 if (reg == REG_C_0) {
7410                         struct mlx5_priv *priv = dev->data->dev_private;
7411                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
7412                         uint32_t shl_c0 = rte_bsf32(msk_c0);
7413
7414                         mask &= msk_c0;
7415                         mask <<= shl_c0;
7416                         value <<= shl_c0;
7417                 }
7418                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
7419         }
7420 }
7421
7422 /**
7423  * Add META item to matcher
7424  *
7425  * @param[in] dev
7426  *   The devich to configure through.
7427  * @param[in, out] matcher
7428  *   Flow matcher.
7429  * @param[in, out] key
7430  *   Flow matcher value.
7431  * @param[in] attr
7432  *   Attributes of flow that includes this item.
7433  * @param[in] item
7434  *   Flow pattern to translate.
7435  */
7436 static void
7437 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
7438                             void *matcher, void *key,
7439                             const struct rte_flow_attr *attr,
7440                             const struct rte_flow_item *item)
7441 {
7442         const struct rte_flow_item_meta *meta_m;
7443         const struct rte_flow_item_meta *meta_v;
7444
7445         meta_m = (const void *)item->mask;
7446         if (!meta_m)
7447                 meta_m = &rte_flow_item_meta_mask;
7448         meta_v = (const void *)item->spec;
7449         if (meta_v) {
7450                 int reg;
7451                 uint32_t value = meta_v->data;
7452                 uint32_t mask = meta_m->data;
7453
7454                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
7455                 if (reg < 0)
7456                         return;
7457                 /*
7458                  * In datapath code there is no endianness
7459                  * coversions for perfromance reasons, all
7460                  * pattern conversions are done in rte_flow.
7461                  */
7462                 value = rte_cpu_to_be_32(value);
7463                 mask = rte_cpu_to_be_32(mask);
7464                 if (reg == REG_C_0) {
7465                         struct mlx5_priv *priv = dev->data->dev_private;
7466                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
7467                         uint32_t shl_c0 = rte_bsf32(msk_c0);
7468 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
7469                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
7470
7471                         value >>= shr_c0;
7472                         mask >>= shr_c0;
7473 #endif
7474                         value <<= shl_c0;
7475                         mask <<= shl_c0;
7476                         MLX5_ASSERT(msk_c0);
7477                         MLX5_ASSERT(!(~msk_c0 & mask));
7478                 }
7479                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
7480         }
7481 }
7482
7483 /**
7484  * Add vport metadata Reg C0 item to matcher
7485  *
7486  * @param[in, out] matcher
7487  *   Flow matcher.
7488  * @param[in, out] key
7489  *   Flow matcher value.
7490  * @param[in] reg
7491  *   Flow pattern to translate.
7492  */
7493 static void
7494 flow_dv_translate_item_meta_vport(void *matcher, void *key,
7495                                   uint32_t value, uint32_t mask)
7496 {
7497         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
7498 }
7499
7500 /**
7501  * Add tag item to matcher
7502  *
7503  * @param[in] dev
7504  *   The devich to configure through.
7505  * @param[in, out] matcher
7506  *   Flow matcher.
7507  * @param[in, out] key
7508  *   Flow matcher value.
7509  * @param[in] item
7510  *   Flow pattern to translate.
7511  */
7512 static void
7513 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
7514                                 void *matcher, void *key,
7515                                 const struct rte_flow_item *item)
7516 {
7517         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
7518         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
7519         uint32_t mask, value;
7520
7521         MLX5_ASSERT(tag_v);
7522         value = tag_v->data;
7523         mask = tag_m ? tag_m->data : UINT32_MAX;
7524         if (tag_v->id == REG_C_0) {
7525                 struct mlx5_priv *priv = dev->data->dev_private;
7526                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
7527                 uint32_t shl_c0 = rte_bsf32(msk_c0);
7528
7529                 mask &= msk_c0;
7530                 mask <<= shl_c0;
7531                 value <<= shl_c0;
7532         }
7533         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
7534 }
7535
7536 /**
7537  * Add TAG item to matcher
7538  *
7539  * @param[in] dev
7540  *   The devich to configure through.
7541  * @param[in, out] matcher
7542  *   Flow matcher.
7543  * @param[in, out] key
7544  *   Flow matcher value.
7545  * @param[in] item
7546  *   Flow pattern to translate.
7547  */
7548 static void
7549 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
7550                            void *matcher, void *key,
7551                            const struct rte_flow_item *item)
7552 {
7553         const struct rte_flow_item_tag *tag_v = item->spec;
7554         const struct rte_flow_item_tag *tag_m = item->mask;
7555         enum modify_reg reg;
7556
7557         MLX5_ASSERT(tag_v);
7558         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
7559         /* Get the metadata register index for the tag. */
7560         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
7561         MLX5_ASSERT(reg > 0);
7562         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
7563 }
7564
7565 /**
7566  * Add source vport match to the specified matcher.
7567  *
7568  * @param[in, out] matcher
7569  *   Flow matcher.
7570  * @param[in, out] key
7571  *   Flow matcher value.
7572  * @param[in] port
7573  *   Source vport value to match
7574  * @param[in] mask
7575  *   Mask
7576  */
7577 static void
7578 flow_dv_translate_item_source_vport(void *matcher, void *key,
7579                                     int16_t port, uint16_t mask)
7580 {
7581         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7582         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7583
7584         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
7585         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
7586 }
7587
7588 /**
7589  * Translate port-id item to eswitch match on  port-id.
7590  *
7591  * @param[in] dev
7592  *   The devich to configure through.
7593  * @param[in, out] matcher
7594  *   Flow matcher.
7595  * @param[in, out] key
7596  *   Flow matcher value.
7597  * @param[in] item
7598  *   Flow pattern to translate.
7599  *
7600  * @return
7601  *   0 on success, a negative errno value otherwise.
7602  */
7603 static int
7604 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
7605                                void *key, const struct rte_flow_item *item)
7606 {
7607         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
7608         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
7609         struct mlx5_priv *priv;
7610         uint16_t mask, id;
7611
7612         mask = pid_m ? pid_m->id : 0xffff;
7613         id = pid_v ? pid_v->id : dev->data->port_id;
7614         priv = mlx5_port_to_eswitch_info(id, item == NULL);
7615         if (!priv)
7616                 return -rte_errno;
7617         /* Translate to vport field or to metadata, depending on mode. */
7618         if (priv->vport_meta_mask)
7619                 flow_dv_translate_item_meta_vport(matcher, key,
7620                                                   priv->vport_meta_tag,
7621                                                   priv->vport_meta_mask);
7622         else
7623                 flow_dv_translate_item_source_vport(matcher, key,
7624                                                     priv->vport_id, mask);
7625         return 0;
7626 }
7627
7628 /**
7629  * Add ICMP6 item to matcher and to the value.
7630  *
7631  * @param[in, out] matcher
7632  *   Flow matcher.
7633  * @param[in, out] key
7634  *   Flow matcher value.
7635  * @param[in] item
7636  *   Flow pattern to translate.
7637  * @param[in] inner
7638  *   Item is inner pattern.
7639  */
7640 static void
7641 flow_dv_translate_item_icmp6(void *matcher, void *key,
7642                               const struct rte_flow_item *item,
7643                               int inner)
7644 {
7645         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
7646         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
7647         void *headers_m;
7648         void *headers_v;
7649         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
7650                                      misc_parameters_3);
7651         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7652         if (inner) {
7653                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7654                                          inner_headers);
7655                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7656         } else {
7657                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7658                                          outer_headers);
7659                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7660         }
7661         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
7662         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
7663         if (!icmp6_v)
7664                 return;
7665         if (!icmp6_m)
7666                 icmp6_m = &rte_flow_item_icmp6_mask;
7667         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
7668         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
7669                  icmp6_v->type & icmp6_m->type);
7670         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
7671         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
7672                  icmp6_v->code & icmp6_m->code);
7673 }
7674
7675 /**
7676  * Add ICMP item to matcher and to the value.
7677  *
7678  * @param[in, out] matcher
7679  *   Flow matcher.
7680  * @param[in, out] key
7681  *   Flow matcher value.
7682  * @param[in] item
7683  *   Flow pattern to translate.
7684  * @param[in] inner
7685  *   Item is inner pattern.
7686  */
7687 static void
7688 flow_dv_translate_item_icmp(void *matcher, void *key,
7689                             const struct rte_flow_item *item,
7690                             int inner)
7691 {
7692         const struct rte_flow_item_icmp *icmp_m = item->mask;
7693         const struct rte_flow_item_icmp *icmp_v = item->spec;
7694         uint32_t icmp_header_data_m = 0;
7695         uint32_t icmp_header_data_v = 0;
7696         void *headers_m;
7697         void *headers_v;
7698         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
7699                                      misc_parameters_3);
7700         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7701         if (inner) {
7702                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7703                                          inner_headers);
7704                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7705         } else {
7706                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7707                                          outer_headers);
7708                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7709         }
7710         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
7711         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
7712         if (!icmp_v)
7713                 return;
7714         if (!icmp_m)
7715                 icmp_m = &rte_flow_item_icmp_mask;
7716         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
7717                  icmp_m->hdr.icmp_type);
7718         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
7719                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
7720         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
7721                  icmp_m->hdr.icmp_code);
7722         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
7723                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
7724         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
7725         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
7726         if (icmp_header_data_m) {
7727                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
7728                 icmp_header_data_v |=
7729                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
7730                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
7731                          icmp_header_data_m);
7732                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
7733                          icmp_header_data_v & icmp_header_data_m);
7734         }
7735 }
7736
7737 /**
7738  * Add GTP item to matcher and to the value.
7739  *
7740  * @param[in, out] matcher
7741  *   Flow matcher.
7742  * @param[in, out] key
7743  *   Flow matcher value.
7744  * @param[in] item
7745  *   Flow pattern to translate.
7746  * @param[in] inner
7747  *   Item is inner pattern.
7748  */
7749 static void
7750 flow_dv_translate_item_gtp(void *matcher, void *key,
7751                            const struct rte_flow_item *item, int inner)
7752 {
7753         const struct rte_flow_item_gtp *gtp_m = item->mask;
7754         const struct rte_flow_item_gtp *gtp_v = item->spec;
7755         void *headers_m;
7756         void *headers_v;
7757         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
7758                                      misc_parameters_3);
7759         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
7760         uint16_t dport = RTE_GTPU_UDP_PORT;
7761
7762         if (inner) {
7763                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7764                                          inner_headers);
7765                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7766         } else {
7767                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
7768                                          outer_headers);
7769                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7770         }
7771         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
7772                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
7773                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
7774         }
7775         if (!gtp_v)
7776                 return;
7777         if (!gtp_m)
7778                 gtp_m = &rte_flow_item_gtp_mask;
7779         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
7780                  gtp_m->v_pt_rsv_flags);
7781         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
7782                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
7783         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
7784         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
7785                  gtp_v->msg_type & gtp_m->msg_type);
7786         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
7787                  rte_be_to_cpu_32(gtp_m->teid));
7788         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
7789                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
7790 }
7791
7792 /**
7793  * Add eCPRI item to matcher and to the value.
7794  *
7795  * @param[in] dev
7796  *   The devich to configure through.
7797  * @param[in, out] matcher
7798  *   Flow matcher.
7799  * @param[in, out] key
7800  *   Flow matcher value.
7801  * @param[in] item
7802  *   Flow pattern to translate.
7803  * @param[in] samples
7804  *   Sample IDs to be used in the matching.
7805  */
7806 static void
7807 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
7808                              void *key, const struct rte_flow_item *item)
7809 {
7810         struct mlx5_priv *priv = dev->data->dev_private;
7811         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
7812         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
7813         struct rte_ecpri_common_hdr common;
7814         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
7815                                      misc_parameters_4);
7816         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
7817         uint32_t *samples;
7818         void *dw_m;
7819         void *dw_v;
7820
7821         if (!ecpri_v)
7822                 return;
7823         if (!ecpri_m)
7824                 ecpri_m = &rte_flow_item_ecpri_mask;
7825         /*
7826          * Maximal four DW samples are supported in a single matching now.
7827          * Two are used now for a eCPRI matching:
7828          * 1. Type: one byte, mask should be 0x00ff0000 in network order
7829          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
7830          *    if any.
7831          */
7832         if (!ecpri_m->hdr.common.u32)
7833                 return;
7834         samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
7835         /* Need to take the whole DW as the mask to fill the entry. */
7836         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
7837                             prog_sample_field_value_0);
7838         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
7839                             prog_sample_field_value_0);
7840         /* Already big endian (network order) in the header. */
7841         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
7842         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32;
7843         /* Sample#0, used for matching type, offset 0. */
7844         MLX5_SET(fte_match_set_misc4, misc4_m,
7845                  prog_sample_field_id_0, samples[0]);
7846         /* It makes no sense to set the sample ID in the mask field. */
7847         MLX5_SET(fte_match_set_misc4, misc4_v,
7848                  prog_sample_field_id_0, samples[0]);
7849         /*
7850          * Checking if message body part needs to be matched.
7851          * Some wildcard rules only matching type field should be supported.
7852          */
7853         if (ecpri_m->hdr.dummy[0]) {
7854                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
7855                 switch (common.type) {
7856                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
7857                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
7858                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
7859                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
7860                                             prog_sample_field_value_1);
7861                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
7862                                             prog_sample_field_value_1);
7863                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
7864                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0];
7865                         /* Sample#1, to match message body, offset 4. */
7866                         MLX5_SET(fte_match_set_misc4, misc4_m,
7867                                  prog_sample_field_id_1, samples[1]);
7868                         MLX5_SET(fte_match_set_misc4, misc4_v,
7869                                  prog_sample_field_id_1, samples[1]);
7870                         break;
7871                 default:
7872                         /* Others, do not match any sample ID. */
7873                         break;
7874                 }
7875         }
7876 }
7877
7878 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
7879
7880 #define HEADER_IS_ZERO(match_criteria, headers)                              \
7881         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
7882                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
7883
7884 /**
7885  * Calculate flow matcher enable bitmap.
7886  *
7887  * @param match_criteria
7888  *   Pointer to flow matcher criteria.
7889  *
7890  * @return
7891  *   Bitmap of enabled fields.
7892  */
7893 static uint8_t
7894 flow_dv_matcher_enable(uint32_t *match_criteria)
7895 {
7896         uint8_t match_criteria_enable;
7897
7898         match_criteria_enable =
7899                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
7900                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
7901         match_criteria_enable |=
7902                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
7903                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
7904         match_criteria_enable |=
7905                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
7906                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
7907         match_criteria_enable |=
7908                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
7909                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
7910         match_criteria_enable |=
7911                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
7912                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
7913         match_criteria_enable |=
7914                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
7915                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
7916         return match_criteria_enable;
7917 }
7918
7919 struct mlx5_hlist_entry *
7920 flow_dv_tbl_create_cb(struct mlx5_hlist *list, uint64_t key64, void *cb_ctx)
7921 {
7922         struct mlx5_dev_ctx_shared *sh = list->ctx;
7923         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
7924         struct rte_eth_dev *dev = ctx->dev;
7925         struct mlx5_flow_tbl_data_entry *tbl_data;
7926         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data;
7927         struct rte_flow_error *error = ctx->error;
7928         union mlx5_flow_tbl_key key = { .v64 = key64 };
7929         struct mlx5_flow_tbl_resource *tbl;
7930         void *domain;
7931         uint32_t idx = 0;
7932         int ret;
7933
7934         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
7935         if (!tbl_data) {
7936                 rte_flow_error_set(error, ENOMEM,
7937                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7938                                    NULL,
7939                                    "cannot allocate flow table data entry");
7940                 return NULL;
7941         }
7942         tbl_data->idx = idx;
7943         tbl_data->tunnel = tt_prm->tunnel;
7944         tbl_data->group_id = tt_prm->group_id;
7945         tbl_data->external = tt_prm->external;
7946         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
7947         tbl_data->is_egress = !!key.direction;
7948         tbl = &tbl_data->tbl;
7949         if (key.dummy)
7950                 return &tbl_data->entry;
7951         if (key.domain)
7952                 domain = sh->fdb_domain;
7953         else if (key.direction)
7954                 domain = sh->tx_domain;
7955         else
7956                 domain = sh->rx_domain;
7957         ret = mlx5_flow_os_create_flow_tbl(domain, key.table_id, &tbl->obj);
7958         if (ret) {
7959                 rte_flow_error_set(error, ENOMEM,
7960                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7961                                    NULL, "cannot create flow table object");
7962                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
7963                 return NULL;
7964         }
7965         if (key.table_id) {
7966                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
7967                                         (tbl->obj, &tbl_data->jump.action);
7968                 if (ret) {
7969                         rte_flow_error_set(error, ENOMEM,
7970                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7971                                            NULL,
7972                                            "cannot create flow jump action");
7973                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
7974                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
7975                         return NULL;
7976                 }
7977         }
7978         MKSTR(matcher_name, "%s_%s_%u_matcher_cache",
7979               key.domain ? "FDB" : "NIC", key.direction ? "egress" : "ingress",
7980               key.table_id);
7981         mlx5_cache_list_init(&tbl_data->matchers, matcher_name, 0, sh,
7982                              flow_dv_matcher_create_cb,
7983                              flow_dv_matcher_match_cb,
7984                              flow_dv_matcher_remove_cb);
7985         return &tbl_data->entry;
7986 }
7987
7988 /**
7989  * Get a flow table.
7990  *
7991  * @param[in, out] dev
7992  *   Pointer to rte_eth_dev structure.
7993  * @param[in] table_id
7994  *   Table id to use.
7995  * @param[in] egress
7996  *   Direction of the table.
7997  * @param[in] transfer
7998  *   E-Switch or NIC flow.
7999  * @param[in] dummy
8000  *   Dummy entry for dv API.
8001  * @param[out] error
8002  *   pointer to error structure.
8003  *
8004  * @return
8005  *   Returns tables resource based on the index, NULL in case of failed.
8006  */
8007 struct mlx5_flow_tbl_resource *
8008 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
8009                          uint32_t table_id, uint8_t egress,
8010                          uint8_t transfer,
8011                          bool external,
8012                          const struct mlx5_flow_tunnel *tunnel,
8013                          uint32_t group_id, uint8_t dummy,
8014                          struct rte_flow_error *error)
8015 {
8016         struct mlx5_priv *priv = dev->data->dev_private;
8017         union mlx5_flow_tbl_key table_key = {
8018                 {
8019                         .table_id = table_id,
8020                         .dummy = dummy,
8021                         .domain = !!transfer,
8022                         .direction = !!egress,
8023                 }
8024         };
8025         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
8026                 .tunnel = tunnel,
8027                 .group_id = group_id,
8028                 .external = external,
8029         };
8030         struct mlx5_flow_cb_ctx ctx = {
8031                 .dev = dev,
8032                 .error = error,
8033                 .data = &tt_prm,
8034         };
8035         struct mlx5_hlist_entry *entry;
8036         struct mlx5_flow_tbl_data_entry *tbl_data;
8037
8038         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
8039         if (!entry) {
8040                 rte_flow_error_set(error, ENOMEM,
8041                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8042                                    "cannot get table");
8043                 return NULL;
8044         }
8045         DRV_LOG(DEBUG, "Table_id %u tunnel %u group %u registered.",
8046                 table_id, tunnel ? tunnel->tunnel_id : 0, group_id);
8047         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
8048         return &tbl_data->tbl;
8049 }
8050
8051 void
8052 flow_dv_tbl_remove_cb(struct mlx5_hlist *list,
8053                       struct mlx5_hlist_entry *entry)
8054 {
8055         struct mlx5_dev_ctx_shared *sh = list->ctx;
8056         struct mlx5_flow_tbl_data_entry *tbl_data =
8057                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
8058
8059         MLX5_ASSERT(entry && sh);
8060         if (tbl_data->jump.action)
8061                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
8062         if (tbl_data->tbl.obj)
8063                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
8064         if (tbl_data->tunnel_offload && tbl_data->external) {
8065                 struct mlx5_hlist_entry *he;
8066                 struct mlx5_hlist *tunnel_grp_hash;
8067                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
8068                 union tunnel_tbl_key tunnel_key = {
8069                         .tunnel_id = tbl_data->tunnel ?
8070                                         tbl_data->tunnel->tunnel_id : 0,
8071                         .group = tbl_data->group_id
8072                 };
8073                 union mlx5_flow_tbl_key table_key = {
8074                         .v64 = entry->key
8075                 };
8076                 uint32_t table_id = table_key.table_id;
8077
8078                 tunnel_grp_hash = tbl_data->tunnel ?
8079                                         tbl_data->tunnel->groups :
8080                                         thub->groups;
8081                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, NULL);
8082                 if (he)
8083                         mlx5_hlist_unregister(tunnel_grp_hash, he);
8084                 DRV_LOG(DEBUG,
8085                         "Table_id %u tunnel %u group %u released.",
8086                         table_id,
8087                         tbl_data->tunnel ?
8088                         tbl_data->tunnel->tunnel_id : 0,
8089                         tbl_data->group_id);
8090         }
8091         mlx5_cache_list_destroy(&tbl_data->matchers);
8092         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
8093 }
8094
8095 /**
8096  * Release a flow table.
8097  *
8098  * @param[in] sh
8099  *   Pointer to device shared structure.
8100  * @param[in] tbl
8101  *   Table resource to be released.
8102  *
8103  * @return
8104  *   Returns 0 if table was released, else return 1;
8105  */
8106 static int
8107 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
8108                              struct mlx5_flow_tbl_resource *tbl)
8109 {
8110         struct mlx5_flow_tbl_data_entry *tbl_data =
8111                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
8112
8113         if (!tbl)
8114                 return 0;
8115         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
8116 }
8117
8118 int
8119 flow_dv_matcher_match_cb(struct mlx5_cache_list *list __rte_unused,
8120                          struct mlx5_cache_entry *entry, void *cb_ctx)
8121 {
8122         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8123         struct mlx5_flow_dv_matcher *ref = ctx->data;
8124         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
8125                                                         entry);
8126
8127         return cur->crc != ref->crc ||
8128                cur->priority != ref->priority ||
8129                memcmp((const void *)cur->mask.buf,
8130                       (const void *)ref->mask.buf, ref->mask.size);
8131 }
8132
8133 struct mlx5_cache_entry *
8134 flow_dv_matcher_create_cb(struct mlx5_cache_list *list,
8135                           struct mlx5_cache_entry *entry __rte_unused,
8136                           void *cb_ctx)
8137 {
8138         struct mlx5_dev_ctx_shared *sh = list->ctx;
8139         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8140         struct mlx5_flow_dv_matcher *ref = ctx->data;
8141         struct mlx5_flow_dv_matcher *cache;
8142         struct mlx5dv_flow_matcher_attr dv_attr = {
8143                 .type = IBV_FLOW_ATTR_NORMAL,
8144                 .match_mask = (void *)&ref->mask,
8145         };
8146         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
8147                                                             typeof(*tbl), tbl);
8148         int ret;
8149
8150         cache = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*cache), 0, SOCKET_ID_ANY);
8151         if (!cache) {
8152                 rte_flow_error_set(ctx->error, ENOMEM,
8153                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8154                                    "cannot create matcher");
8155                 return NULL;
8156         }
8157         *cache = *ref;
8158         dv_attr.match_criteria_enable =
8159                 flow_dv_matcher_enable(cache->mask.buf);
8160         dv_attr.priority = ref->priority;
8161         if (tbl->is_egress)
8162                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
8163         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
8164                                                &cache->matcher_object);
8165         if (ret) {
8166                 mlx5_free(cache);
8167                 rte_flow_error_set(ctx->error, ENOMEM,
8168                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8169                                    "cannot create matcher");
8170                 return NULL;
8171         }
8172         return &cache->entry;
8173 }
8174
8175 /**
8176  * Register the flow matcher.
8177  *
8178  * @param[in, out] dev
8179  *   Pointer to rte_eth_dev structure.
8180  * @param[in, out] matcher
8181  *   Pointer to flow matcher.
8182  * @param[in, out] key
8183  *   Pointer to flow table key.
8184  * @parm[in, out] dev_flow
8185  *   Pointer to the dev_flow.
8186  * @param[out] error
8187  *   pointer to error structure.
8188  *
8189  * @return
8190  *   0 on success otherwise -errno and errno is set.
8191  */
8192 static int
8193 flow_dv_matcher_register(struct rte_eth_dev *dev,
8194                          struct mlx5_flow_dv_matcher *ref,
8195                          union mlx5_flow_tbl_key *key,
8196                          struct mlx5_flow *dev_flow,
8197                          const struct mlx5_flow_tunnel *tunnel,
8198                          uint32_t group_id,
8199                          struct rte_flow_error *error)
8200 {
8201         struct mlx5_cache_entry *entry;
8202         struct mlx5_flow_dv_matcher *cache;
8203         struct mlx5_flow_tbl_resource *tbl;
8204         struct mlx5_flow_tbl_data_entry *tbl_data;
8205         struct mlx5_flow_cb_ctx ctx = {
8206                 .error = error,
8207                 .data = ref,
8208         };
8209
8210         /**
8211          * tunnel offload API requires this registration for cases when
8212          * tunnel match rule was inserted before tunnel set rule.
8213          */
8214         tbl = flow_dv_tbl_resource_get(dev, key->table_id,
8215                                        key->direction, key->domain,
8216                                        dev_flow->external, tunnel,
8217                                        group_id, 0, error);
8218         if (!tbl)
8219                 return -rte_errno;      /* No need to refill the error info */
8220         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
8221         ref->tbl = tbl;
8222         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
8223         if (!entry) {
8224                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
8225                 return rte_flow_error_set(error, ENOMEM,
8226                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8227                                           "cannot allocate ref memory");
8228         }
8229         cache = container_of(entry, typeof(*cache), entry);
8230         dev_flow->handle->dvh.matcher = cache;
8231         return 0;
8232 }
8233
8234 struct mlx5_hlist_entry *
8235 flow_dv_tag_create_cb(struct mlx5_hlist *list, uint64_t key, void *ctx)
8236 {
8237         struct mlx5_dev_ctx_shared *sh = list->ctx;
8238         struct rte_flow_error *error = ctx;
8239         struct mlx5_flow_dv_tag_resource *entry;
8240         uint32_t idx = 0;
8241         int ret;
8242
8243         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
8244         if (!entry) {
8245                 rte_flow_error_set(error, ENOMEM,
8246                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8247                                    "cannot allocate resource memory");
8248                 return NULL;
8249         }
8250         entry->idx = idx;
8251         ret = mlx5_flow_os_create_flow_action_tag(key,
8252                                                   &entry->action);
8253         if (ret) {
8254                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
8255                 rte_flow_error_set(error, ENOMEM,
8256                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8257                                    NULL, "cannot create action");
8258                 return NULL;
8259         }
8260         return &entry->entry;
8261 }
8262
8263 /**
8264  * Find existing tag resource or create and register a new one.
8265  *
8266  * @param dev[in, out]
8267  *   Pointer to rte_eth_dev structure.
8268  * @param[in, out] tag_be24
8269  *   Tag value in big endian then R-shift 8.
8270  * @parm[in, out] dev_flow
8271  *   Pointer to the dev_flow.
8272  * @param[out] error
8273  *   pointer to error structure.
8274  *
8275  * @return
8276  *   0 on success otherwise -errno and errno is set.
8277  */
8278 static int
8279 flow_dv_tag_resource_register
8280                         (struct rte_eth_dev *dev,
8281                          uint32_t tag_be24,
8282                          struct mlx5_flow *dev_flow,
8283                          struct rte_flow_error *error)
8284 {
8285         struct mlx5_priv *priv = dev->data->dev_private;
8286         struct mlx5_flow_dv_tag_resource *cache_resource;
8287         struct mlx5_hlist_entry *entry;
8288
8289         entry = mlx5_hlist_register(priv->sh->tag_table, tag_be24, error);
8290         if (entry) {
8291                 cache_resource = container_of
8292                         (entry, struct mlx5_flow_dv_tag_resource, entry);
8293                 dev_flow->handle->dvh.rix_tag = cache_resource->idx;
8294                 dev_flow->dv.tag_resource = cache_resource;
8295                 return 0;
8296         }
8297         return -rte_errno;
8298 }
8299
8300 void
8301 flow_dv_tag_remove_cb(struct mlx5_hlist *list,
8302                       struct mlx5_hlist_entry *entry)
8303 {
8304         struct mlx5_dev_ctx_shared *sh = list->ctx;
8305         struct mlx5_flow_dv_tag_resource *tag =
8306                 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
8307
8308         MLX5_ASSERT(tag && sh && tag->action);
8309         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
8310         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
8311         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
8312 }
8313
8314 /**
8315  * Release the tag.
8316  *
8317  * @param dev
8318  *   Pointer to Ethernet device.
8319  * @param tag_idx
8320  *   Tag index.
8321  *
8322  * @return
8323  *   1 while a reference on it exists, 0 when freed.
8324  */
8325 static int
8326 flow_dv_tag_release(struct rte_eth_dev *dev,
8327                     uint32_t tag_idx)
8328 {
8329         struct mlx5_priv *priv = dev->data->dev_private;
8330         struct mlx5_flow_dv_tag_resource *tag;
8331
8332         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
8333         if (!tag)
8334                 return 0;
8335         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
8336                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
8337         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
8338 }
8339
8340 /**
8341  * Translate port ID action to vport.
8342  *
8343  * @param[in] dev
8344  *   Pointer to rte_eth_dev structure.
8345  * @param[in] action
8346  *   Pointer to the port ID action.
8347  * @param[out] dst_port_id
8348  *   The target port ID.
8349  * @param[out] error
8350  *   Pointer to the error structure.
8351  *
8352  * @return
8353  *   0 on success, a negative errno value otherwise and rte_errno is set.
8354  */
8355 static int
8356 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
8357                                  const struct rte_flow_action *action,
8358                                  uint32_t *dst_port_id,
8359                                  struct rte_flow_error *error)
8360 {
8361         uint32_t port;
8362         struct mlx5_priv *priv;
8363         const struct rte_flow_action_port_id *conf =
8364                         (const struct rte_flow_action_port_id *)action->conf;
8365
8366         port = conf->original ? dev->data->port_id : conf->id;
8367         priv = mlx5_port_to_eswitch_info(port, false);
8368         if (!priv)
8369                 return rte_flow_error_set(error, -rte_errno,
8370                                           RTE_FLOW_ERROR_TYPE_ACTION,
8371                                           NULL,
8372                                           "No eswitch info was found for port");
8373 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
8374         /*
8375          * This parameter is transferred to
8376          * mlx5dv_dr_action_create_dest_ib_port().
8377          */
8378         *dst_port_id = priv->dev_port;
8379 #else
8380         /*
8381          * Legacy mode, no LAG configurations is supported.
8382          * This parameter is transferred to
8383          * mlx5dv_dr_action_create_dest_vport().
8384          */
8385         *dst_port_id = priv->vport_id;
8386 #endif
8387         return 0;
8388 }
8389
8390 /**
8391  * Create a counter with aging configuration.
8392  *
8393  * @param[in] dev
8394  *   Pointer to rte_eth_dev structure.
8395  * @param[out] count
8396  *   Pointer to the counter action configuration.
8397  * @param[in] age
8398  *   Pointer to the aging action configuration.
8399  *
8400  * @return
8401  *   Index to flow counter on success, 0 otherwise.
8402  */
8403 static uint32_t
8404 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
8405                                 struct mlx5_flow *dev_flow,
8406                                 const struct rte_flow_action_count *count,
8407                                 const struct rte_flow_action_age *age)
8408 {
8409         uint32_t counter;
8410         struct mlx5_age_param *age_param;
8411
8412         if (count && count->shared)
8413                 counter = flow_dv_counter_get_shared(dev, count->id);
8414         else
8415                 counter = flow_dv_counter_alloc(dev, !!age);
8416         if (!counter || age == NULL)
8417                 return counter;
8418         age_param  = flow_dv_counter_idx_get_age(dev, counter);
8419         age_param->context = age->context ? age->context :
8420                 (void *)(uintptr_t)(dev_flow->flow_idx);
8421         age_param->timeout = age->timeout;
8422         age_param->port_id = dev->data->port_id;
8423         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
8424         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
8425         return counter;
8426 }
8427
8428 /**
8429  * Add Tx queue matcher
8430  *
8431  * @param[in] dev
8432  *   Pointer to the dev struct.
8433  * @param[in, out] matcher
8434  *   Flow matcher.
8435  * @param[in, out] key
8436  *   Flow matcher value.
8437  * @param[in] item
8438  *   Flow pattern to translate.
8439  * @param[in] inner
8440  *   Item is inner pattern.
8441  */
8442 static void
8443 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
8444                                 void *matcher, void *key,
8445                                 const struct rte_flow_item *item)
8446 {
8447         const struct mlx5_rte_flow_item_tx_queue *queue_m;
8448         const struct mlx5_rte_flow_item_tx_queue *queue_v;
8449         void *misc_m =
8450                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8451         void *misc_v =
8452                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8453         struct mlx5_txq_ctrl *txq;
8454         uint32_t queue;
8455
8456
8457         queue_m = (const void *)item->mask;
8458         if (!queue_m)
8459                 return;
8460         queue_v = (const void *)item->spec;
8461         if (!queue_v)
8462                 return;
8463         txq = mlx5_txq_get(dev, queue_v->queue);
8464         if (!txq)
8465                 return;
8466         queue = txq->obj->sq->id;
8467         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
8468         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
8469                  queue & queue_m->queue);
8470         mlx5_txq_release(dev, queue_v->queue);
8471 }
8472
8473 /**
8474  * Set the hash fields according to the @p flow information.
8475  *
8476  * @param[in] dev_flow
8477  *   Pointer to the mlx5_flow.
8478  * @param[in] rss_desc
8479  *   Pointer to the mlx5_flow_rss_desc.
8480  */
8481 static void
8482 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
8483                        struct mlx5_flow_rss_desc *rss_desc)
8484 {
8485         uint64_t items = dev_flow->handle->layers;
8486         int rss_inner = 0;
8487         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
8488
8489         dev_flow->hash_fields = 0;
8490 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
8491         if (rss_desc->level >= 2) {
8492                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
8493                 rss_inner = 1;
8494         }
8495 #endif
8496         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
8497             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
8498                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
8499                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
8500                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
8501                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
8502                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
8503                         else
8504                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
8505                 }
8506         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
8507                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
8508                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
8509                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
8510                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
8511                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
8512                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
8513                         else
8514                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
8515                 }
8516         }
8517         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
8518             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
8519                 if (rss_types & ETH_RSS_UDP) {
8520                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
8521                                 dev_flow->hash_fields |=
8522                                                 IBV_RX_HASH_SRC_PORT_UDP;
8523                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
8524                                 dev_flow->hash_fields |=
8525                                                 IBV_RX_HASH_DST_PORT_UDP;
8526                         else
8527                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
8528                 }
8529         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
8530                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
8531                 if (rss_types & ETH_RSS_TCP) {
8532                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
8533                                 dev_flow->hash_fields |=
8534                                                 IBV_RX_HASH_SRC_PORT_TCP;
8535                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
8536                                 dev_flow->hash_fields |=
8537                                                 IBV_RX_HASH_DST_PORT_TCP;
8538                         else
8539                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
8540                 }
8541         }
8542 }
8543
8544 /**
8545  * Prepare an Rx Hash queue.
8546  *
8547  * @param dev
8548  *   Pointer to Ethernet device.
8549  * @param[in] dev_flow
8550  *   Pointer to the mlx5_flow.
8551  * @param[in] rss_desc
8552  *   Pointer to the mlx5_flow_rss_desc.
8553  * @param[out] hrxq_idx
8554  *   Hash Rx queue index.
8555  *
8556  * @return
8557  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
8558  */
8559 static struct mlx5_hrxq *
8560 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
8561                      struct mlx5_flow *dev_flow,
8562                      struct mlx5_flow_rss_desc *rss_desc,
8563                      uint32_t *hrxq_idx)
8564 {
8565         struct mlx5_priv *priv = dev->data->dev_private;
8566         struct mlx5_flow_handle *dh = dev_flow->handle;
8567         struct mlx5_hrxq *hrxq;
8568
8569         MLX5_ASSERT(rss_desc->queue_num);
8570         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
8571         rss_desc->hash_fields = dev_flow->hash_fields;
8572         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
8573         rss_desc->shared_rss = 0;
8574         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
8575         if (!*hrxq_idx)
8576                 return NULL;
8577         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
8578                               *hrxq_idx);
8579         return hrxq;
8580 }
8581
8582 /**
8583  * Release sample sub action resource.
8584  *
8585  * @param[in, out] dev
8586  *   Pointer to rte_eth_dev structure.
8587  * @param[in] act_res
8588  *   Pointer to sample sub action resource.
8589  */
8590 static void
8591 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
8592                                    struct mlx5_flow_sub_actions_idx *act_res)
8593 {
8594         if (act_res->rix_hrxq) {
8595                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
8596                 act_res->rix_hrxq = 0;
8597         }
8598         if (act_res->rix_encap_decap) {
8599                 flow_dv_encap_decap_resource_release(dev,
8600                                                      act_res->rix_encap_decap);
8601                 act_res->rix_encap_decap = 0;
8602         }
8603         if (act_res->rix_port_id_action) {
8604                 flow_dv_port_id_action_resource_release(dev,
8605                                                 act_res->rix_port_id_action);
8606                 act_res->rix_port_id_action = 0;
8607         }
8608         if (act_res->rix_tag) {
8609                 flow_dv_tag_release(dev, act_res->rix_tag);
8610                 act_res->rix_tag = 0;
8611         }
8612         if (act_res->cnt) {
8613                 flow_dv_counter_free(dev, act_res->cnt);
8614                 act_res->cnt = 0;
8615         }
8616 }
8617
8618 int
8619 flow_dv_sample_match_cb(struct mlx5_cache_list *list __rte_unused,
8620                         struct mlx5_cache_entry *entry, void *cb_ctx)
8621 {
8622         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8623         struct rte_eth_dev *dev = ctx->dev;
8624         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
8625         struct mlx5_flow_dv_sample_resource *cache_resource =
8626                         container_of(entry, typeof(*cache_resource), entry);
8627
8628         if (resource->ratio == cache_resource->ratio &&
8629             resource->ft_type == cache_resource->ft_type &&
8630             resource->ft_id == cache_resource->ft_id &&
8631             resource->set_action == cache_resource->set_action &&
8632             !memcmp((void *)&resource->sample_act,
8633                     (void *)&cache_resource->sample_act,
8634                     sizeof(struct mlx5_flow_sub_actions_list))) {
8635                 /*
8636                  * Existing sample action should release the prepared
8637                  * sub-actions reference counter.
8638                  */
8639                 flow_dv_sample_sub_actions_release(dev,
8640                                                 &resource->sample_idx);
8641                 return 0;
8642         }
8643         return 1;
8644 }
8645
8646 struct mlx5_cache_entry *
8647 flow_dv_sample_create_cb(struct mlx5_cache_list *list __rte_unused,
8648                          struct mlx5_cache_entry *entry __rte_unused,
8649                          void *cb_ctx)
8650 {
8651         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8652         struct rte_eth_dev *dev = ctx->dev;
8653         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
8654         void **sample_dv_actions = resource->sub_actions;
8655         struct mlx5_flow_dv_sample_resource *cache_resource;
8656         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
8657         struct mlx5_priv *priv = dev->data->dev_private;
8658         struct mlx5_dev_ctx_shared *sh = priv->sh;
8659         struct mlx5_flow_tbl_resource *tbl;
8660         uint32_t idx = 0;
8661         const uint32_t next_ft_step = 1;
8662         uint32_t next_ft_id = resource->ft_id + next_ft_step;
8663         uint8_t is_egress = 0;
8664         uint8_t is_transfer = 0;
8665         struct rte_flow_error *error = ctx->error;
8666
8667         /* Register new sample resource. */
8668         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
8669         if (!cache_resource) {
8670                 rte_flow_error_set(error, ENOMEM,
8671                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8672                                           NULL,
8673                                           "cannot allocate resource memory");
8674                 return NULL;
8675         }
8676         *cache_resource = *resource;
8677         /* Create normal path table level */
8678         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
8679                 is_transfer = 1;
8680         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
8681                 is_egress = 1;
8682         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
8683                                         is_egress, is_transfer,
8684                                         true, NULL, 0, 0, error);
8685         if (!tbl) {
8686                 rte_flow_error_set(error, ENOMEM,
8687                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8688                                           NULL,
8689                                           "fail to create normal path table "
8690                                           "for sample");
8691                 goto error;
8692         }
8693         cache_resource->normal_path_tbl = tbl;
8694         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
8695                 cache_resource->default_miss =
8696                                 mlx5_glue->dr_create_flow_action_default_miss();
8697                 if (!cache_resource->default_miss) {
8698                         rte_flow_error_set(error, ENOMEM,
8699                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8700                                                 NULL,
8701                                                 "cannot create default miss "
8702                                                 "action");
8703                         goto error;
8704                 }
8705                 sample_dv_actions[resource->sample_act.actions_num++] =
8706                                                 cache_resource->default_miss;
8707         }
8708         /* Create a DR sample action */
8709         sampler_attr.sample_ratio = cache_resource->ratio;
8710         sampler_attr.default_next_table = tbl->obj;
8711         sampler_attr.num_sample_actions = resource->sample_act.actions_num;
8712         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
8713                                                         &sample_dv_actions[0];
8714         sampler_attr.action = cache_resource->set_action;
8715         cache_resource->verbs_action =
8716                 mlx5_glue->dr_create_flow_action_sampler(&sampler_attr);
8717         if (!cache_resource->verbs_action) {
8718                 rte_flow_error_set(error, ENOMEM,
8719                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8720                                         NULL, "cannot create sample action");
8721                 goto error;
8722         }
8723         cache_resource->idx = idx;
8724         return &cache_resource->entry;
8725 error:
8726         if (cache_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB &&
8727             cache_resource->default_miss)
8728                 claim_zero(mlx5_glue->destroy_flow_action
8729                                 (cache_resource->default_miss));
8730         else
8731                 flow_dv_sample_sub_actions_release(dev,
8732                                                    &cache_resource->sample_idx);
8733         if (cache_resource->normal_path_tbl)
8734                 flow_dv_tbl_resource_release(MLX5_SH(dev),
8735                                 cache_resource->normal_path_tbl);
8736         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
8737         return NULL;
8738
8739 }
8740
8741 /**
8742  * Find existing sample resource or create and register a new one.
8743  *
8744  * @param[in, out] dev
8745  *   Pointer to rte_eth_dev structure.
8746  * @param[in] resource
8747  *   Pointer to sample resource.
8748  * @parm[in, out] dev_flow
8749  *   Pointer to the dev_flow.
8750  * @param[out] error
8751  *   pointer to error structure.
8752  *
8753  * @return
8754  *   0 on success otherwise -errno and errno is set.
8755  */
8756 static int
8757 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
8758                          struct mlx5_flow_dv_sample_resource *resource,
8759                          struct mlx5_flow *dev_flow,
8760                          struct rte_flow_error *error)
8761 {
8762         struct mlx5_flow_dv_sample_resource *cache_resource;
8763         struct mlx5_cache_entry *entry;
8764         struct mlx5_priv *priv = dev->data->dev_private;
8765         struct mlx5_flow_cb_ctx ctx = {
8766                 .dev = dev,
8767                 .error = error,
8768                 .data = resource,
8769         };
8770
8771         entry = mlx5_cache_register(&priv->sh->sample_action_list, &ctx);
8772         if (!entry)
8773                 return -rte_errno;
8774         cache_resource = container_of(entry, typeof(*cache_resource), entry);
8775         dev_flow->handle->dvh.rix_sample = cache_resource->idx;
8776         dev_flow->dv.sample_res = cache_resource;
8777         return 0;
8778 }
8779
8780 int
8781 flow_dv_dest_array_match_cb(struct mlx5_cache_list *list __rte_unused,
8782                             struct mlx5_cache_entry *entry, void *cb_ctx)
8783 {
8784         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8785         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
8786         struct rte_eth_dev *dev = ctx->dev;
8787         struct mlx5_flow_dv_dest_array_resource *cache_resource =
8788                         container_of(entry, typeof(*cache_resource), entry);
8789         uint32_t idx = 0;
8790
8791         if (resource->num_of_dest == cache_resource->num_of_dest &&
8792             resource->ft_type == cache_resource->ft_type &&
8793             !memcmp((void *)cache_resource->sample_act,
8794                     (void *)resource->sample_act,
8795                    (resource->num_of_dest *
8796                    sizeof(struct mlx5_flow_sub_actions_list)))) {
8797                 /*
8798                  * Existing sample action should release the prepared
8799                  * sub-actions reference counter.
8800                  */
8801                 for (idx = 0; idx < resource->num_of_dest; idx++)
8802                         flow_dv_sample_sub_actions_release(dev,
8803                                         &resource->sample_idx[idx]);
8804                 return 0;
8805         }
8806         return 1;
8807 }
8808
8809 struct mlx5_cache_entry *
8810 flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,
8811                          struct mlx5_cache_entry *entry __rte_unused,
8812                          void *cb_ctx)
8813 {
8814         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8815         struct rte_eth_dev *dev = ctx->dev;
8816         struct mlx5_flow_dv_dest_array_resource *cache_resource;
8817         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
8818         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
8819         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
8820         struct mlx5_priv *priv = dev->data->dev_private;
8821         struct mlx5_dev_ctx_shared *sh = priv->sh;
8822         struct mlx5_flow_sub_actions_list *sample_act;
8823         struct mlx5dv_dr_domain *domain;
8824         uint32_t idx = 0, res_idx = 0;
8825         struct rte_flow_error *error = ctx->error;
8826
8827         /* Register new destination array resource. */
8828         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
8829                                             &res_idx);
8830         if (!cache_resource) {
8831                 rte_flow_error_set(error, ENOMEM,
8832                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8833                                           NULL,
8834                                           "cannot allocate resource memory");
8835                 return NULL;
8836         }
8837         *cache_resource = *resource;
8838         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
8839                 domain = sh->fdb_domain;
8840         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
8841                 domain = sh->rx_domain;
8842         else
8843                 domain = sh->tx_domain;
8844         for (idx = 0; idx < resource->num_of_dest; idx++) {
8845                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
8846                                  mlx5_malloc(MLX5_MEM_ZERO,
8847                                  sizeof(struct mlx5dv_dr_action_dest_attr),
8848                                  0, SOCKET_ID_ANY);
8849                 if (!dest_attr[idx]) {
8850                         rte_flow_error_set(error, ENOMEM,
8851                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8852                                            NULL,
8853                                            "cannot allocate resource memory");
8854                         goto error;
8855                 }
8856                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
8857                 sample_act = &resource->sample_act[idx];
8858                 if (sample_act->action_flags == MLX5_FLOW_ACTION_QUEUE) {
8859                         dest_attr[idx]->dest = sample_act->dr_queue_action;
8860                 } else if (sample_act->action_flags ==
8861                           (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP)) {
8862                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
8863                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
8864                         dest_attr[idx]->dest_reformat->reformat =
8865                                         sample_act->dr_encap_action;
8866                         dest_attr[idx]->dest_reformat->dest =
8867                                         sample_act->dr_port_id_action;
8868                 } else if (sample_act->action_flags ==
8869                            MLX5_FLOW_ACTION_PORT_ID) {
8870                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
8871                 }
8872         }
8873         /* create a dest array actioin */
8874         cache_resource->action = mlx5_glue->dr_create_flow_action_dest_array
8875                                                 (domain,
8876                                                  cache_resource->num_of_dest,
8877                                                  dest_attr);
8878         if (!cache_resource->action) {
8879                 rte_flow_error_set(error, ENOMEM,
8880                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8881                                    NULL,
8882                                    "cannot create destination array action");
8883                 goto error;
8884         }
8885         cache_resource->idx = res_idx;
8886         for (idx = 0; idx < resource->num_of_dest; idx++)
8887                 mlx5_free(dest_attr[idx]);
8888         return &cache_resource->entry;
8889 error:
8890         for (idx = 0; idx < resource->num_of_dest; idx++) {
8891                 struct mlx5_flow_sub_actions_idx *act_res =
8892                                         &cache_resource->sample_idx[idx];
8893                 if (act_res->rix_hrxq &&
8894                     !mlx5_hrxq_release(dev,
8895                                 act_res->rix_hrxq))
8896                         act_res->rix_hrxq = 0;
8897                 if (act_res->rix_encap_decap &&
8898                         !flow_dv_encap_decap_resource_release(dev,
8899                                 act_res->rix_encap_decap))
8900                         act_res->rix_encap_decap = 0;
8901                 if (act_res->rix_port_id_action &&
8902                         !flow_dv_port_id_action_resource_release(dev,
8903                                 act_res->rix_port_id_action))
8904                         act_res->rix_port_id_action = 0;
8905                 if (dest_attr[idx])
8906                         mlx5_free(dest_attr[idx]);
8907         }
8908
8909         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
8910         return NULL;
8911 }
8912
8913 /**
8914  * Find existing destination array resource or create and register a new one.
8915  *
8916  * @param[in, out] dev
8917  *   Pointer to rte_eth_dev structure.
8918  * @param[in] resource
8919  *   Pointer to destination array resource.
8920  * @parm[in, out] dev_flow
8921  *   Pointer to the dev_flow.
8922  * @param[out] error
8923  *   pointer to error structure.
8924  *
8925  * @return
8926  *   0 on success otherwise -errno and errno is set.
8927  */
8928 static int
8929 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
8930                          struct mlx5_flow_dv_dest_array_resource *resource,
8931                          struct mlx5_flow *dev_flow,
8932                          struct rte_flow_error *error)
8933 {
8934         struct mlx5_flow_dv_dest_array_resource *cache_resource;
8935         struct mlx5_priv *priv = dev->data->dev_private;
8936         struct mlx5_cache_entry *entry;
8937         struct mlx5_flow_cb_ctx ctx = {
8938                 .dev = dev,
8939                 .error = error,
8940                 .data = resource,
8941         };
8942
8943         entry = mlx5_cache_register(&priv->sh->dest_array_list, &ctx);
8944         if (!entry)
8945                 return -rte_errno;
8946         cache_resource = container_of(entry, typeof(*cache_resource), entry);
8947         dev_flow->handle->dvh.rix_dest_array = cache_resource->idx;
8948         dev_flow->dv.dest_array_res = cache_resource;
8949         return 0;
8950 }
8951
8952 /**
8953  * Convert Sample action to DV specification.
8954  *
8955  * @param[in] dev
8956  *   Pointer to rte_eth_dev structure.
8957  * @param[in] action
8958  *   Pointer to action structure.
8959  * @param[in, out] dev_flow
8960  *   Pointer to the mlx5_flow.
8961  * @param[in] attr
8962  *   Pointer to the flow attributes.
8963  * @param[in, out] num_of_dest
8964  *   Pointer to the num of destination.
8965  * @param[in, out] sample_actions
8966  *   Pointer to sample actions list.
8967  * @param[in, out] res
8968  *   Pointer to sample resource.
8969  * @param[out] error
8970  *   Pointer to the error structure.
8971  *
8972  * @return
8973  *   0 on success, a negative errno value otherwise and rte_errno is set.
8974  */
8975 static int
8976 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
8977                                 const struct rte_flow_action *action,
8978                                 struct mlx5_flow *dev_flow,
8979                                 const struct rte_flow_attr *attr,
8980                                 uint32_t *num_of_dest,
8981                                 void **sample_actions,
8982                                 struct mlx5_flow_dv_sample_resource *res,
8983                                 struct rte_flow_error *error)
8984 {
8985         struct mlx5_priv *priv = dev->data->dev_private;
8986         const struct rte_flow_action_sample *sample_action;
8987         const struct rte_flow_action *sub_actions;
8988         const struct rte_flow_action_queue *queue;
8989         struct mlx5_flow_sub_actions_list *sample_act;
8990         struct mlx5_flow_sub_actions_idx *sample_idx;
8991         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8992         struct mlx5_flow_rss_desc *rss_desc;
8993         uint64_t action_flags = 0;
8994
8995         MLX5_ASSERT(wks);
8996         rss_desc = &wks->rss_desc;
8997         sample_act = &res->sample_act;
8998         sample_idx = &res->sample_idx;
8999         sample_action = (const struct rte_flow_action_sample *)action->conf;
9000         res->ratio = sample_action->ratio;
9001         sub_actions = sample_action->actions;
9002         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
9003                 int type = sub_actions->type;
9004                 uint32_t pre_rix = 0;
9005                 void *pre_r;
9006                 switch (type) {
9007                 case RTE_FLOW_ACTION_TYPE_QUEUE:
9008                 {
9009                         struct mlx5_hrxq *hrxq;
9010                         uint32_t hrxq_idx;
9011
9012                         queue = sub_actions->conf;
9013                         rss_desc->queue_num = 1;
9014                         rss_desc->queue[0] = queue->index;
9015                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
9016                                                     rss_desc, &hrxq_idx);
9017                         if (!hrxq)
9018                                 return rte_flow_error_set
9019                                         (error, rte_errno,
9020                                          RTE_FLOW_ERROR_TYPE_ACTION,
9021                                          NULL,
9022                                          "cannot create fate queue");
9023                         sample_act->dr_queue_action = hrxq->action;
9024                         sample_idx->rix_hrxq = hrxq_idx;
9025                         sample_actions[sample_act->actions_num++] =
9026                                                 hrxq->action;
9027                         (*num_of_dest)++;
9028                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
9029                         if (action_flags & MLX5_FLOW_ACTION_MARK)
9030                                 dev_flow->handle->rix_hrxq = hrxq_idx;
9031                         dev_flow->handle->fate_action =
9032                                         MLX5_FLOW_FATE_QUEUE;
9033                         break;
9034                 }
9035                 case RTE_FLOW_ACTION_TYPE_MARK:
9036                 {
9037                         uint32_t tag_be = mlx5_flow_mark_set
9038                                 (((const struct rte_flow_action_mark *)
9039                                 (sub_actions->conf))->id);
9040
9041                         dev_flow->handle->mark = 1;
9042                         pre_rix = dev_flow->handle->dvh.rix_tag;
9043                         /* Save the mark resource before sample */
9044                         pre_r = dev_flow->dv.tag_resource;
9045                         if (flow_dv_tag_resource_register(dev, tag_be,
9046                                                   dev_flow, error))
9047                                 return -rte_errno;
9048                         MLX5_ASSERT(dev_flow->dv.tag_resource);
9049                         sample_act->dr_tag_action =
9050                                 dev_flow->dv.tag_resource->action;
9051                         sample_idx->rix_tag =
9052                                 dev_flow->handle->dvh.rix_tag;
9053                         sample_actions[sample_act->actions_num++] =
9054                                                 sample_act->dr_tag_action;
9055                         /* Recover the mark resource after sample */
9056                         dev_flow->dv.tag_resource = pre_r;
9057                         dev_flow->handle->dvh.rix_tag = pre_rix;
9058                         action_flags |= MLX5_FLOW_ACTION_MARK;
9059                         break;
9060                 }
9061                 case RTE_FLOW_ACTION_TYPE_COUNT:
9062                 {
9063                         uint32_t counter;
9064
9065                         counter = flow_dv_translate_create_counter(dev,
9066                                         dev_flow, sub_actions->conf, 0);
9067                         if (!counter)
9068                                 return rte_flow_error_set
9069                                                 (error, rte_errno,
9070                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9071                                                  NULL,
9072                                                  "cannot create counter"
9073                                                  " object.");
9074                         sample_idx->cnt = counter;
9075                         sample_act->dr_cnt_action =
9076                                   (flow_dv_counter_get_by_idx(dev,
9077                                   counter, NULL))->action;
9078                         sample_actions[sample_act->actions_num++] =
9079                                                 sample_act->dr_cnt_action;
9080                         action_flags |= MLX5_FLOW_ACTION_COUNT;
9081                         break;
9082                 }
9083                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
9084                 {
9085                         struct mlx5_flow_dv_port_id_action_resource
9086                                         port_id_resource;
9087                         uint32_t port_id = 0;
9088
9089                         memset(&port_id_resource, 0, sizeof(port_id_resource));
9090                         /* Save the port id resource before sample */
9091                         pre_rix = dev_flow->handle->rix_port_id_action;
9092                         pre_r = dev_flow->dv.port_id_action;
9093                         if (flow_dv_translate_action_port_id(dev, sub_actions,
9094                                                              &port_id, error))
9095                                 return -rte_errno;
9096                         port_id_resource.port_id = port_id;
9097                         if (flow_dv_port_id_action_resource_register
9098                             (dev, &port_id_resource, dev_flow, error))
9099                                 return -rte_errno;
9100                         sample_act->dr_port_id_action =
9101                                 dev_flow->dv.port_id_action->action;
9102                         sample_idx->rix_port_id_action =
9103                                 dev_flow->handle->rix_port_id_action;
9104                         sample_actions[sample_act->actions_num++] =
9105                                                 sample_act->dr_port_id_action;
9106                         /* Recover the port id resource after sample */
9107                         dev_flow->dv.port_id_action = pre_r;
9108                         dev_flow->handle->rix_port_id_action = pre_rix;
9109                         (*num_of_dest)++;
9110                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
9111                         break;
9112                 }
9113                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
9114                         /* Save the encap resource before sample */
9115                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
9116                         pre_r = dev_flow->dv.encap_decap;
9117                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
9118                                                            dev_flow,
9119                                                            attr->transfer,
9120                                                            error))
9121                                 return -rte_errno;
9122                         sample_act->dr_encap_action =
9123                                 dev_flow->dv.encap_decap->action;
9124                         sample_idx->rix_encap_decap =
9125                                 dev_flow->handle->dvh.rix_encap_decap;
9126                         sample_actions[sample_act->actions_num++] =
9127                                                 sample_act->dr_encap_action;
9128                         /* Recover the encap resource after sample */
9129                         dev_flow->dv.encap_decap = pre_r;
9130                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
9131                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
9132                         break;
9133                 default:
9134                         return rte_flow_error_set(error, EINVAL,
9135                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9136                                 NULL,
9137                                 "Not support for sampler action");
9138                 }
9139         }
9140         sample_act->action_flags = action_flags;
9141         res->ft_id = dev_flow->dv.group;
9142         if (attr->transfer) {
9143                 union {
9144                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
9145                         uint64_t set_action;
9146                 } action_ctx = { .set_action = 0 };
9147
9148                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
9149                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
9150                          MLX5_MODIFICATION_TYPE_SET);
9151                 MLX5_SET(set_action_in, action_ctx.action_in, field,
9152                          MLX5_MODI_META_REG_C_0);
9153                 MLX5_SET(set_action_in, action_ctx.action_in, data,
9154                          priv->vport_meta_tag);
9155                 res->set_action = action_ctx.set_action;
9156         } else if (attr->ingress) {
9157                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
9158         } else {
9159                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
9160         }
9161         return 0;
9162 }
9163
9164 /**
9165  * Convert Sample action to DV specification.
9166  *
9167  * @param[in] dev
9168  *   Pointer to rte_eth_dev structure.
9169  * @param[in, out] dev_flow
9170  *   Pointer to the mlx5_flow.
9171  * @param[in] num_of_dest
9172  *   The num of destination.
9173  * @param[in, out] res
9174  *   Pointer to sample resource.
9175  * @param[in, out] mdest_res
9176  *   Pointer to destination array resource.
9177  * @param[in] sample_actions
9178  *   Pointer to sample path actions list.
9179  * @param[in] action_flags
9180  *   Holds the actions detected until now.
9181  * @param[out] error
9182  *   Pointer to the error structure.
9183  *
9184  * @return
9185  *   0 on success, a negative errno value otherwise and rte_errno is set.
9186  */
9187 static int
9188 flow_dv_create_action_sample(struct rte_eth_dev *dev,
9189                              struct mlx5_flow *dev_flow,
9190                              uint32_t num_of_dest,
9191                              struct mlx5_flow_dv_sample_resource *res,
9192                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
9193                              void **sample_actions,
9194                              uint64_t action_flags,
9195                              struct rte_flow_error *error)
9196 {
9197         /* update normal path action resource into last index of array */
9198         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
9199         struct mlx5_flow_sub_actions_list *sample_act =
9200                                         &mdest_res->sample_act[dest_index];
9201         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
9202         struct mlx5_flow_rss_desc *rss_desc;
9203         uint32_t normal_idx = 0;
9204         struct mlx5_hrxq *hrxq;
9205         uint32_t hrxq_idx;
9206
9207         MLX5_ASSERT(wks);
9208         rss_desc = &wks->rss_desc;
9209         if (num_of_dest > 1) {
9210                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
9211                         /* Handle QP action for mirroring */
9212                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
9213                                                     rss_desc, &hrxq_idx);
9214                         if (!hrxq)
9215                                 return rte_flow_error_set
9216                                      (error, rte_errno,
9217                                       RTE_FLOW_ERROR_TYPE_ACTION,
9218                                       NULL,
9219                                       "cannot create rx queue");
9220                         normal_idx++;
9221                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
9222                         sample_act->dr_queue_action = hrxq->action;
9223                         if (action_flags & MLX5_FLOW_ACTION_MARK)
9224                                 dev_flow->handle->rix_hrxq = hrxq_idx;
9225                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
9226                 }
9227                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
9228                         normal_idx++;
9229                         mdest_res->sample_idx[dest_index].rix_encap_decap =
9230                                 dev_flow->handle->dvh.rix_encap_decap;
9231                         sample_act->dr_encap_action =
9232                                 dev_flow->dv.encap_decap->action;
9233                 }
9234                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
9235                         normal_idx++;
9236                         mdest_res->sample_idx[dest_index].rix_port_id_action =
9237                                 dev_flow->handle->rix_port_id_action;
9238                         sample_act->dr_port_id_action =
9239                                 dev_flow->dv.port_id_action->action;
9240                 }
9241                 sample_act->actions_num = normal_idx;
9242                 /* update sample action resource into first index of array */
9243                 mdest_res->ft_type = res->ft_type;
9244                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
9245                                 sizeof(struct mlx5_flow_sub_actions_idx));
9246                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
9247                                 sizeof(struct mlx5_flow_sub_actions_list));
9248                 mdest_res->num_of_dest = num_of_dest;
9249                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
9250                                                          dev_flow, error))
9251                         return rte_flow_error_set(error, EINVAL,
9252                                                   RTE_FLOW_ERROR_TYPE_ACTION,
9253                                                   NULL, "can't create sample "
9254                                                   "action");
9255         } else {
9256                 res->sub_actions = sample_actions;
9257                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
9258                         return rte_flow_error_set(error, EINVAL,
9259                                                   RTE_FLOW_ERROR_TYPE_ACTION,
9260                                                   NULL,
9261                                                   "can't create sample action");
9262         }
9263         return 0;
9264 }
9265
9266 /**
9267  * Remove an ASO age action from age actions list.
9268  *
9269  * @param[in] dev
9270  *   Pointer to the Ethernet device structure.
9271  * @param[in] age
9272  *   Pointer to the aso age action handler.
9273  */
9274 static void
9275 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
9276                                 struct mlx5_aso_age_action *age)
9277 {
9278         struct mlx5_age_info *age_info;
9279         struct mlx5_age_param *age_param = &age->age_params;
9280         struct mlx5_priv *priv = dev->data->dev_private;
9281         uint16_t expected = AGE_CANDIDATE;
9282
9283         age_info = GET_PORT_AGE_INFO(priv);
9284         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
9285                                          AGE_FREE, false, __ATOMIC_RELAXED,
9286                                          __ATOMIC_RELAXED)) {
9287                 /**
9288                  * We need the lock even it is age timeout,
9289                  * since age action may still in process.
9290                  */
9291                 rte_spinlock_lock(&age_info->aged_sl);
9292                 LIST_REMOVE(age, next);
9293                 rte_spinlock_unlock(&age_info->aged_sl);
9294                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
9295         }
9296 }
9297
9298 /**
9299  * Release an ASO age action.
9300  *
9301  * @param[in] dev
9302  *   Pointer to the Ethernet device structure.
9303  * @param[in] age_idx
9304  *   Index of ASO age action to release.
9305  * @param[in] flow
9306  *   True if the release operation is during flow destroy operation.
9307  *   False if the release operation is during action destroy operation.
9308  *
9309  * @return
9310  *   0 when age action was removed, otherwise the number of references.
9311  */
9312 static int
9313 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
9314 {
9315         struct mlx5_priv *priv = dev->data->dev_private;
9316         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
9317         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
9318         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
9319
9320         if (!ret) {
9321                 flow_dv_aso_age_remove_from_age(dev, age);
9322                 rte_spinlock_lock(&mng->free_sl);
9323                 LIST_INSERT_HEAD(&mng->free, age, next);
9324                 rte_spinlock_unlock(&mng->free_sl);
9325         }
9326         return ret;
9327 }
9328
9329 /**
9330  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
9331  *
9332  * @param[in] dev
9333  *   Pointer to the Ethernet device structure.
9334  *
9335  * @return
9336  *   0 on success, otherwise negative errno value and rte_errno is set.
9337  */
9338 static int
9339 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
9340 {
9341         struct mlx5_priv *priv = dev->data->dev_private;
9342         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
9343         void *old_pools = mng->pools;
9344         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
9345         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
9346         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
9347
9348         if (!pools) {
9349                 rte_errno = ENOMEM;
9350                 return -ENOMEM;
9351         }
9352         if (old_pools) {
9353                 memcpy(pools, old_pools,
9354                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
9355                 mlx5_free(old_pools);
9356         } else {
9357                 /* First ASO flow hit allocation - starting ASO data-path. */
9358                 int ret = mlx5_aso_queue_start(priv->sh);
9359
9360                 if (ret) {
9361                         mlx5_free(pools);
9362                         return ret;
9363                 }
9364         }
9365         mng->n = resize;
9366         mng->pools = pools;
9367         return 0;
9368 }
9369
9370 /**
9371  * Create and initialize a new ASO aging pool.
9372  *
9373  * @param[in] dev
9374  *   Pointer to the Ethernet device structure.
9375  * @param[out] age_free
9376  *   Where to put the pointer of a new age action.
9377  *
9378  * @return
9379  *   The age actions pool pointer and @p age_free is set on success,
9380  *   NULL otherwise and rte_errno is set.
9381  */
9382 static struct mlx5_aso_age_pool *
9383 flow_dv_age_pool_create(struct rte_eth_dev *dev,
9384                         struct mlx5_aso_age_action **age_free)
9385 {
9386         struct mlx5_priv *priv = dev->data->dev_private;
9387         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
9388         struct mlx5_aso_age_pool *pool = NULL;
9389         struct mlx5_devx_obj *obj = NULL;
9390         uint32_t i;
9391
9392         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
9393                                                     priv->sh->pdn);
9394         if (!obj) {
9395                 rte_errno = ENODATA;
9396                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
9397                 return NULL;
9398         }
9399         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
9400         if (!pool) {
9401                 claim_zero(mlx5_devx_cmd_destroy(obj));
9402                 rte_errno = ENOMEM;
9403                 return NULL;
9404         }
9405         pool->flow_hit_aso_obj = obj;
9406         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
9407         rte_spinlock_lock(&mng->resize_sl);
9408         pool->index = mng->next;
9409         /* Resize pools array if there is no room for the new pool in it. */
9410         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
9411                 claim_zero(mlx5_devx_cmd_destroy(obj));
9412                 mlx5_free(pool);
9413                 rte_spinlock_unlock(&mng->resize_sl);
9414                 return NULL;
9415         }
9416         mng->pools[pool->index] = pool;
9417         mng->next++;
9418         rte_spinlock_unlock(&mng->resize_sl);
9419         /* Assign the first action in the new pool, the rest go to free list. */
9420         *age_free = &pool->actions[0];
9421         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
9422                 pool->actions[i].offset = i;
9423                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
9424         }
9425         return pool;
9426 }
9427
9428 /**
9429  * Allocate a ASO aging bit.
9430  *
9431  * @param[in] dev
9432  *   Pointer to the Ethernet device structure.
9433  *
9434  * @return
9435  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
9436  */
9437 static uint32_t
9438 flow_dv_aso_age_alloc(struct rte_eth_dev *dev)
9439 {
9440         struct mlx5_priv *priv = dev->data->dev_private;
9441         const struct mlx5_aso_age_pool *pool;
9442         struct mlx5_aso_age_action *age_free = NULL;
9443         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
9444
9445         MLX5_ASSERT(mng);
9446         /* Try to get the next free age action bit. */
9447         rte_spinlock_lock(&mng->free_sl);
9448         age_free = LIST_FIRST(&mng->free);
9449         if (age_free) {
9450                 LIST_REMOVE(age_free, next);
9451         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
9452                 rte_spinlock_unlock(&mng->free_sl);
9453                 return 0; /* 0 is an error.*/
9454         }
9455         rte_spinlock_unlock(&mng->free_sl);
9456         pool = container_of
9457           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
9458                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
9459                                                                        actions);
9460         if (!age_free->dr_action) {
9461                 age_free->dr_action = mlx5_glue->dr_action_create_flow_hit
9462                                                 (pool->flow_hit_aso_obj->obj,
9463                                                  age_free->offset, REG_C_5);
9464                 if (!age_free->dr_action) {
9465                         rte_errno = errno;
9466                         rte_spinlock_lock(&mng->free_sl);
9467                         LIST_INSERT_HEAD(&mng->free, age_free, next);
9468                         rte_spinlock_unlock(&mng->free_sl);
9469                         return 0; /* 0 is an error.*/
9470                 }
9471         }
9472         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
9473         return pool->index | ((age_free->offset + 1) << 16);
9474 }
9475
9476 /**
9477  * Create a age action using ASO mechanism.
9478  *
9479  * @param[in] dev
9480  *   Pointer to rte_eth_dev structure.
9481  * @param[in] age
9482  *   Pointer to the aging action configuration.
9483  *
9484  * @return
9485  *   Index to flow counter on success, 0 otherwise.
9486  */
9487 static uint32_t
9488 flow_dv_translate_create_aso_age(struct rte_eth_dev *dev,
9489                                  const struct rte_flow_action_age *age)
9490 {
9491         uint32_t age_idx = 0;
9492         struct mlx5_aso_age_action *aso_age;
9493
9494         age_idx = flow_dv_aso_age_alloc(dev);
9495         if (!age_idx)
9496                 return 0;
9497         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
9498         aso_age->age_params.context = age->context;
9499         aso_age->age_params.timeout = age->timeout;
9500         aso_age->age_params.port_id = dev->data->port_id;
9501         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
9502                          __ATOMIC_RELAXED);
9503         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
9504                          __ATOMIC_RELAXED);
9505         return age_idx;
9506 }
9507
9508 /**
9509  * Fill the flow with DV spec, lock free
9510  * (mutex should be acquired by caller).
9511  *
9512  * @param[in] dev
9513  *   Pointer to rte_eth_dev structure.
9514  * @param[in, out] dev_flow
9515  *   Pointer to the sub flow.
9516  * @param[in] attr
9517  *   Pointer to the flow attributes.
9518  * @param[in] items
9519  *   Pointer to the list of items.
9520  * @param[in] actions
9521  *   Pointer to the list of actions.
9522  * @param[out] error
9523  *   Pointer to the error structure.
9524  *
9525  * @return
9526  *   0 on success, a negative errno value otherwise and rte_errno is set.
9527  */
9528 static int
9529 flow_dv_translate(struct rte_eth_dev *dev,
9530                   struct mlx5_flow *dev_flow,
9531                   const struct rte_flow_attr *attr,
9532                   const struct rte_flow_item items[],
9533                   const struct rte_flow_action actions[],
9534                   struct rte_flow_error *error)
9535 {
9536         struct mlx5_priv *priv = dev->data->dev_private;
9537         struct mlx5_dev_config *dev_conf = &priv->config;
9538         struct rte_flow *flow = dev_flow->flow;
9539         struct mlx5_flow_handle *handle = dev_flow->handle;
9540         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
9541         struct mlx5_flow_rss_desc *rss_desc;
9542         uint64_t item_flags = 0;
9543         uint64_t last_item = 0;
9544         uint64_t action_flags = 0;
9545         uint64_t priority = attr->priority;
9546         struct mlx5_flow_dv_matcher matcher = {
9547                 .mask = {
9548                         .size = sizeof(matcher.mask.buf) -
9549                                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
9550                 },
9551         };
9552         int actions_n = 0;
9553         bool actions_end = false;
9554         union {
9555                 struct mlx5_flow_dv_modify_hdr_resource res;
9556                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
9557                             sizeof(struct mlx5_modification_cmd) *
9558                             (MLX5_MAX_MODIFY_NUM + 1)];
9559         } mhdr_dummy;
9560         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
9561         const struct rte_flow_action_count *count = NULL;
9562         const struct rte_flow_action_age *age = NULL;
9563         union flow_dv_attr flow_attr = { .attr = 0 };
9564         uint32_t tag_be;
9565         union mlx5_flow_tbl_key tbl_key;
9566         uint32_t modify_action_position = UINT32_MAX;
9567         void *match_mask = matcher.mask.buf;
9568         void *match_value = dev_flow->dv.value.buf;
9569         uint8_t next_protocol = 0xff;
9570         struct rte_vlan_hdr vlan = { 0 };
9571         struct mlx5_flow_dv_dest_array_resource mdest_res;
9572         struct mlx5_flow_dv_sample_resource sample_res;
9573         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
9574         struct mlx5_flow_sub_actions_list *sample_act;
9575         uint32_t sample_act_pos = UINT32_MAX;
9576         uint32_t num_of_dest = 0;
9577         int tmp_actions_n = 0;
9578         uint32_t table;
9579         int ret = 0;
9580         const struct mlx5_flow_tunnel *tunnel;
9581         struct flow_grp_info grp_info = {
9582                 .external = !!dev_flow->external,
9583                 .transfer = !!attr->transfer,
9584                 .fdb_def_rule = !!priv->fdb_def_rule,
9585                 .skip_scale = !!dev_flow->skip_scale,
9586         };
9587
9588         if (!wks)
9589                 return rte_flow_error_set(error, ENOMEM,
9590                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9591                                           NULL,
9592                                           "failed to push flow workspace");
9593         rss_desc = &wks->rss_desc;
9594         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
9595         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
9596         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
9597                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
9598         /* update normal path action resource into last index of array */
9599         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
9600         tunnel = is_flow_tunnel_match_rule(dev, attr, items, actions) ?
9601                  flow_items_to_tunnel(items) :
9602                  is_flow_tunnel_steer_rule(dev, attr, items, actions) ?
9603                  flow_actions_to_tunnel(actions) :
9604                  dev_flow->tunnel ? dev_flow->tunnel : NULL;
9605         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
9606                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
9607         grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
9608                                 (dev, tunnel, attr, items, actions);
9609         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
9610                                        &grp_info, error);
9611         if (ret)
9612                 return ret;
9613         dev_flow->dv.group = table;
9614         if (attr->transfer)
9615                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
9616         if (priority == MLX5_FLOW_PRIO_RSVD)
9617                 priority = dev_conf->flow_prio - 1;
9618         /* number of actions must be set to 0 in case of dirty stack. */
9619         mhdr_res->actions_num = 0;
9620         if (is_flow_tunnel_match_rule(dev, attr, items, actions)) {
9621                 /*
9622                  * do not add decap action if match rule drops packet
9623                  * HW rejects rules with decap & drop
9624                  *
9625                  * if tunnel match rule was inserted before matching tunnel set
9626                  * rule flow table used in the match rule must be registered.
9627                  * current implementation handles that in the
9628                  * flow_dv_match_register() at the function end.
9629                  */
9630                 bool add_decap = true;
9631                 const struct rte_flow_action *ptr = actions;
9632
9633                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
9634                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
9635                                 add_decap = false;
9636                                 break;
9637                         }
9638                 }
9639                 if (add_decap) {
9640                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
9641                                                            attr->transfer,
9642                                                            error))
9643                                 return -rte_errno;
9644                         dev_flow->dv.actions[actions_n++] =
9645                                         dev_flow->dv.encap_decap->action;
9646                         action_flags |= MLX5_FLOW_ACTION_DECAP;
9647                 }
9648         }
9649         for (; !actions_end ; actions++) {
9650                 const struct rte_flow_action_queue *queue;
9651                 const struct rte_flow_action_rss *rss;
9652                 const struct rte_flow_action *action = actions;
9653                 const uint8_t *rss_key;
9654                 const struct rte_flow_action_meter *mtr;
9655                 struct mlx5_flow_tbl_resource *tbl;
9656                 struct mlx5_aso_age_action *age_act;
9657                 uint32_t port_id = 0;
9658                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
9659                 int action_type = actions->type;
9660                 const struct rte_flow_action *found_action = NULL;
9661                 struct mlx5_flow_meter *fm = NULL;
9662                 uint32_t jump_group = 0;
9663
9664                 if (!mlx5_flow_os_action_supported(action_type))
9665                         return rte_flow_error_set(error, ENOTSUP,
9666                                                   RTE_FLOW_ERROR_TYPE_ACTION,
9667                                                   actions,
9668                                                   "action not supported");
9669                 switch (action_type) {
9670                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
9671                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
9672                         break;
9673                 case RTE_FLOW_ACTION_TYPE_VOID:
9674                         break;
9675                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
9676                         if (flow_dv_translate_action_port_id(dev, action,
9677                                                              &port_id, error))
9678                                 return -rte_errno;
9679                         port_id_resource.port_id = port_id;
9680                         MLX5_ASSERT(!handle->rix_port_id_action);
9681                         if (flow_dv_port_id_action_resource_register
9682                             (dev, &port_id_resource, dev_flow, error))
9683                                 return -rte_errno;
9684                         dev_flow->dv.actions[actions_n++] =
9685                                         dev_flow->dv.port_id_action->action;
9686                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
9687                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
9688                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
9689                         num_of_dest++;
9690                         break;
9691                 case RTE_FLOW_ACTION_TYPE_FLAG:
9692                         action_flags |= MLX5_FLOW_ACTION_FLAG;
9693                         dev_flow->handle->mark = 1;
9694                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
9695                                 struct rte_flow_action_mark mark = {
9696                                         .id = MLX5_FLOW_MARK_DEFAULT,
9697                                 };
9698
9699                                 if (flow_dv_convert_action_mark(dev, &mark,
9700                                                                 mhdr_res,
9701                                                                 error))
9702                                         return -rte_errno;
9703                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
9704                                 break;
9705                         }
9706                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
9707                         /*
9708                          * Only one FLAG or MARK is supported per device flow
9709                          * right now. So the pointer to the tag resource must be
9710                          * zero before the register process.
9711                          */
9712                         MLX5_ASSERT(!handle->dvh.rix_tag);
9713                         if (flow_dv_tag_resource_register(dev, tag_be,
9714                                                           dev_flow, error))
9715                                 return -rte_errno;
9716                         MLX5_ASSERT(dev_flow->dv.tag_resource);
9717                         dev_flow->dv.actions[actions_n++] =
9718                                         dev_flow->dv.tag_resource->action;
9719                         break;
9720                 case RTE_FLOW_ACTION_TYPE_MARK:
9721                         action_flags |= MLX5_FLOW_ACTION_MARK;
9722                         dev_flow->handle->mark = 1;
9723                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
9724                                 const struct rte_flow_action_mark *mark =
9725                                         (const struct rte_flow_action_mark *)
9726                                                 actions->conf;
9727
9728                                 if (flow_dv_convert_action_mark(dev, mark,
9729                                                                 mhdr_res,
9730                                                                 error))
9731                                         return -rte_errno;
9732                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
9733                                 break;
9734                         }
9735                         /* Fall-through */
9736                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
9737                         /* Legacy (non-extensive) MARK action. */
9738                         tag_be = mlx5_flow_mark_set
9739                               (((const struct rte_flow_action_mark *)
9740                                (actions->conf))->id);
9741                         MLX5_ASSERT(!handle->dvh.rix_tag);
9742                         if (flow_dv_tag_resource_register(dev, tag_be,
9743                                                           dev_flow, error))
9744                                 return -rte_errno;
9745                         MLX5_ASSERT(dev_flow->dv.tag_resource);
9746                         dev_flow->dv.actions[actions_n++] =
9747                                         dev_flow->dv.tag_resource->action;
9748                         break;
9749                 case RTE_FLOW_ACTION_TYPE_SET_META:
9750                         if (flow_dv_convert_action_set_meta
9751                                 (dev, mhdr_res, attr,
9752                                  (const struct rte_flow_action_set_meta *)
9753                                   actions->conf, error))
9754                                 return -rte_errno;
9755                         action_flags |= MLX5_FLOW_ACTION_SET_META;
9756                         break;
9757                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
9758                         if (flow_dv_convert_action_set_tag
9759                                 (dev, mhdr_res,
9760                                  (const struct rte_flow_action_set_tag *)
9761                                   actions->conf, error))
9762                                 return -rte_errno;
9763                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
9764                         break;
9765                 case RTE_FLOW_ACTION_TYPE_DROP:
9766                         action_flags |= MLX5_FLOW_ACTION_DROP;
9767                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
9768                         break;
9769                 case RTE_FLOW_ACTION_TYPE_QUEUE:
9770                         queue = actions->conf;
9771                         rss_desc->queue_num = 1;
9772                         rss_desc->queue[0] = queue->index;
9773                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
9774                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
9775                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
9776                         num_of_dest++;
9777                         break;
9778                 case RTE_FLOW_ACTION_TYPE_RSS:
9779                         rss = actions->conf;
9780                         memcpy(rss_desc->queue, rss->queue,
9781                                rss->queue_num * sizeof(uint16_t));
9782                         rss_desc->queue_num = rss->queue_num;
9783                         /* NULL RSS key indicates default RSS key. */
9784                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
9785                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
9786                         /*
9787                          * rss->level and rss.types should be set in advance
9788                          * when expanding items for RSS.
9789                          */
9790                         action_flags |= MLX5_FLOW_ACTION_RSS;
9791                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
9792                                 MLX5_FLOW_FATE_SHARED_RSS :
9793                                 MLX5_FLOW_FATE_QUEUE;
9794                         break;
9795                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
9796                         flow->age = (uint32_t)(uintptr_t)(action->conf);
9797                         age_act = flow_aso_age_get_by_idx(dev, flow->age);
9798                         __atomic_fetch_add(&age_act->refcnt, 1,
9799                                            __ATOMIC_RELAXED);
9800                         dev_flow->dv.actions[actions_n++] = age_act->dr_action;
9801                         action_flags |= MLX5_FLOW_ACTION_AGE;
9802                         break;
9803                 case RTE_FLOW_ACTION_TYPE_AGE:
9804                         if (priv->sh->flow_hit_aso_en && attr->group) {
9805                                 flow->age = flow_dv_translate_create_aso_age
9806                                                 (dev, action->conf);
9807                                 if (!flow->age)
9808                                         return rte_flow_error_set
9809                                                 (error, rte_errno,
9810                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9811                                                  NULL,
9812                                                  "can't create ASO age action");
9813                                 dev_flow->dv.actions[actions_n++] =
9814                                           (flow_aso_age_get_by_idx
9815                                                 (dev, flow->age))->dr_action;
9816                                 action_flags |= MLX5_FLOW_ACTION_AGE;
9817                                 break;
9818                         }
9819                         /* Fall-through */
9820                 case RTE_FLOW_ACTION_TYPE_COUNT:
9821                         if (!dev_conf->devx) {
9822                                 return rte_flow_error_set
9823                                               (error, ENOTSUP,
9824                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9825                                                NULL,
9826                                                "count action not supported");
9827                         }
9828                         /* Save information first, will apply later. */
9829                         if (actions->type == RTE_FLOW_ACTION_TYPE_COUNT)
9830                                 count = action->conf;
9831                         else
9832                                 age = action->conf;
9833                         action_flags |= MLX5_FLOW_ACTION_COUNT;
9834                         break;
9835                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
9836                         dev_flow->dv.actions[actions_n++] =
9837                                                 priv->sh->pop_vlan_action;
9838                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
9839                         break;
9840                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
9841                         if (!(action_flags &
9842                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
9843                                 flow_dev_get_vlan_info_from_items(items, &vlan);
9844                         vlan.eth_proto = rte_be_to_cpu_16
9845                              ((((const struct rte_flow_action_of_push_vlan *)
9846                                                    actions->conf)->ethertype));
9847                         found_action = mlx5_flow_find_action
9848                                         (actions + 1,
9849                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
9850                         if (found_action)
9851                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
9852                         found_action = mlx5_flow_find_action
9853                                         (actions + 1,
9854                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
9855                         if (found_action)
9856                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
9857                         if (flow_dv_create_action_push_vlan
9858                                             (dev, attr, &vlan, dev_flow, error))
9859                                 return -rte_errno;
9860                         dev_flow->dv.actions[actions_n++] =
9861                                         dev_flow->dv.push_vlan_res->action;
9862                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
9863                         break;
9864                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
9865                         /* of_vlan_push action handled this action */
9866                         MLX5_ASSERT(action_flags &
9867                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
9868                         break;
9869                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
9870                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
9871                                 break;
9872                         flow_dev_get_vlan_info_from_items(items, &vlan);
9873                         mlx5_update_vlan_vid_pcp(actions, &vlan);
9874                         /* If no VLAN push - this is a modify header action */
9875                         if (flow_dv_convert_action_modify_vlan_vid
9876                                                 (mhdr_res, actions, error))
9877                                 return -rte_errno;
9878                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
9879                         break;
9880                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
9881                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
9882                         if (flow_dv_create_action_l2_encap(dev, actions,
9883                                                            dev_flow,
9884                                                            attr->transfer,
9885                                                            error))
9886                                 return -rte_errno;
9887                         dev_flow->dv.actions[actions_n++] =
9888                                         dev_flow->dv.encap_decap->action;
9889                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
9890                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
9891                                 sample_act->action_flags |=
9892                                                         MLX5_FLOW_ACTION_ENCAP;
9893                         break;
9894                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
9895                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
9896                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
9897                                                            attr->transfer,
9898                                                            error))
9899                                 return -rte_errno;
9900                         dev_flow->dv.actions[actions_n++] =
9901                                         dev_flow->dv.encap_decap->action;
9902                         action_flags |= MLX5_FLOW_ACTION_DECAP;
9903                         break;
9904                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
9905                         /* Handle encap with preceding decap. */
9906                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
9907                                 if (flow_dv_create_action_raw_encap
9908                                         (dev, actions, dev_flow, attr, error))
9909                                         return -rte_errno;
9910                                 dev_flow->dv.actions[actions_n++] =
9911                                         dev_flow->dv.encap_decap->action;
9912                         } else {
9913                                 /* Handle encap without preceding decap. */
9914                                 if (flow_dv_create_action_l2_encap
9915                                     (dev, actions, dev_flow, attr->transfer,
9916                                      error))
9917                                         return -rte_errno;
9918                                 dev_flow->dv.actions[actions_n++] =
9919                                         dev_flow->dv.encap_decap->action;
9920                         }
9921                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
9922                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
9923                                 sample_act->action_flags |=
9924                                                         MLX5_FLOW_ACTION_ENCAP;
9925                         break;
9926                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
9927                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
9928                                 ;
9929                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
9930                                 if (flow_dv_create_action_l2_decap
9931                                     (dev, dev_flow, attr->transfer, error))
9932                                         return -rte_errno;
9933                                 dev_flow->dv.actions[actions_n++] =
9934                                         dev_flow->dv.encap_decap->action;
9935                         }
9936                         /* If decap is followed by encap, handle it at encap. */
9937                         action_flags |= MLX5_FLOW_ACTION_DECAP;
9938                         break;
9939                 case RTE_FLOW_ACTION_TYPE_JUMP:
9940                         jump_group = ((const struct rte_flow_action_jump *)
9941                                                         action->conf)->group;
9942                         grp_info.std_tbl_fix = 0;
9943                         grp_info.skip_scale = 0;
9944                         ret = mlx5_flow_group_to_table(dev, tunnel,
9945                                                        jump_group,
9946                                                        &table,
9947                                                        &grp_info, error);
9948                         if (ret)
9949                                 return ret;
9950                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
9951                                                        attr->transfer,
9952                                                        !!dev_flow->external,
9953                                                        tunnel, jump_group, 0,
9954                                                        error);
9955                         if (!tbl)
9956                                 return rte_flow_error_set
9957                                                 (error, errno,
9958                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9959                                                  NULL,
9960                                                  "cannot create jump action.");
9961                         if (flow_dv_jump_tbl_resource_register
9962                             (dev, tbl, dev_flow, error)) {
9963                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
9964                                 return rte_flow_error_set
9965                                                 (error, errno,
9966                                                  RTE_FLOW_ERROR_TYPE_ACTION,
9967                                                  NULL,
9968                                                  "cannot create jump action.");
9969                         }
9970                         dev_flow->dv.actions[actions_n++] =
9971                                         dev_flow->dv.jump->action;
9972                         action_flags |= MLX5_FLOW_ACTION_JUMP;
9973                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
9974                         break;
9975                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
9976                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
9977                         if (flow_dv_convert_action_modify_mac
9978                                         (mhdr_res, actions, error))
9979                                 return -rte_errno;
9980                         action_flags |= actions->type ==
9981                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
9982                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
9983                                         MLX5_FLOW_ACTION_SET_MAC_DST;
9984                         break;
9985                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
9986                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
9987                         if (flow_dv_convert_action_modify_ipv4
9988                                         (mhdr_res, actions, error))
9989                                 return -rte_errno;
9990                         action_flags |= actions->type ==
9991                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
9992                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
9993                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
9994                         break;
9995                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
9996                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
9997                         if (flow_dv_convert_action_modify_ipv6
9998                                         (mhdr_res, actions, error))
9999                                 return -rte_errno;
10000                         action_flags |= actions->type ==
10001                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
10002                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
10003                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
10004                         break;
10005                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
10006                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
10007                         if (flow_dv_convert_action_modify_tp
10008                                         (mhdr_res, actions, items,
10009                                          &flow_attr, dev_flow, !!(action_flags &
10010                                          MLX5_FLOW_ACTION_DECAP), error))
10011                                 return -rte_errno;
10012                         action_flags |= actions->type ==
10013                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
10014                                         MLX5_FLOW_ACTION_SET_TP_SRC :
10015                                         MLX5_FLOW_ACTION_SET_TP_DST;
10016                         break;
10017                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
10018                         if (flow_dv_convert_action_modify_dec_ttl
10019                                         (mhdr_res, items, &flow_attr, dev_flow,
10020                                          !!(action_flags &
10021                                          MLX5_FLOW_ACTION_DECAP), error))
10022                                 return -rte_errno;
10023                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
10024                         break;
10025                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
10026                         if (flow_dv_convert_action_modify_ttl
10027                                         (mhdr_res, actions, items, &flow_attr,
10028                                          dev_flow, !!(action_flags &
10029                                          MLX5_FLOW_ACTION_DECAP), error))
10030                                 return -rte_errno;
10031                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
10032                         break;
10033                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
10034                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
10035                         if (flow_dv_convert_action_modify_tcp_seq
10036                                         (mhdr_res, actions, error))
10037                                 return -rte_errno;
10038                         action_flags |= actions->type ==
10039                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
10040                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
10041                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
10042                         break;
10043
10044                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
10045                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
10046                         if (flow_dv_convert_action_modify_tcp_ack
10047                                         (mhdr_res, actions, error))
10048                                 return -rte_errno;
10049                         action_flags |= actions->type ==
10050                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
10051                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
10052                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
10053                         break;
10054                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
10055                         if (flow_dv_convert_action_set_reg
10056                                         (mhdr_res, actions, error))
10057                                 return -rte_errno;
10058                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
10059                         break;
10060                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
10061                         if (flow_dv_convert_action_copy_mreg
10062                                         (dev, mhdr_res, actions, error))
10063                                 return -rte_errno;
10064                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
10065                         break;
10066                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
10067                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
10068                         dev_flow->handle->fate_action =
10069                                         MLX5_FLOW_FATE_DEFAULT_MISS;
10070                         break;
10071                 case RTE_FLOW_ACTION_TYPE_METER:
10072                         mtr = actions->conf;
10073                         if (!flow->meter) {
10074                                 fm = mlx5_flow_meter_attach(priv, mtr->mtr_id,
10075                                                             attr, error);
10076                                 if (!fm)
10077                                         return rte_flow_error_set(error,
10078                                                 rte_errno,
10079                                                 RTE_FLOW_ERROR_TYPE_ACTION,
10080                                                 NULL,
10081                                                 "meter not found "
10082                                                 "or invalid parameters");
10083                                 flow->meter = fm->idx;
10084                         }
10085                         /* Set the meter action. */
10086                         if (!fm) {
10087                                 fm = mlx5_ipool_get(priv->sh->ipool
10088                                                 [MLX5_IPOOL_MTR], flow->meter);
10089                                 if (!fm)
10090                                         return rte_flow_error_set(error,
10091                                                 rte_errno,
10092                                                 RTE_FLOW_ERROR_TYPE_ACTION,
10093                                                 NULL,
10094                                                 "meter not found "
10095                                                 "or invalid parameters");
10096                         }
10097                         dev_flow->dv.actions[actions_n++] =
10098                                 fm->mfts->meter_action;
10099                         action_flags |= MLX5_FLOW_ACTION_METER;
10100                         break;
10101                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
10102                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
10103                                                               actions, error))
10104                                 return -rte_errno;
10105                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
10106                         break;
10107                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
10108                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
10109                                                               actions, error))
10110                                 return -rte_errno;
10111                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
10112                         break;
10113                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
10114                         sample_act_pos = actions_n;
10115                         ret = flow_dv_translate_action_sample(dev,
10116                                                               actions,
10117                                                               dev_flow, attr,
10118                                                               &num_of_dest,
10119                                                               sample_actions,
10120                                                               &sample_res,
10121                                                               error);
10122                         if (ret < 0)
10123                                 return ret;
10124                         actions_n++;
10125                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
10126                         /* put encap action into group if work with port id */
10127                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
10128                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
10129                                 sample_act->action_flags |=
10130                                                         MLX5_FLOW_ACTION_ENCAP;
10131                         break;
10132                 case RTE_FLOW_ACTION_TYPE_END:
10133                         actions_end = true;
10134                         if (mhdr_res->actions_num) {
10135                                 /* create modify action if needed. */
10136                                 if (flow_dv_modify_hdr_resource_register
10137                                         (dev, mhdr_res, dev_flow, error))
10138                                         return -rte_errno;
10139                                 dev_flow->dv.actions[modify_action_position] =
10140                                         handle->dvh.modify_hdr->action;
10141                         }
10142                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
10143                                 flow->counter =
10144                                         flow_dv_translate_create_counter(dev,
10145                                                 dev_flow, count, age);
10146
10147                                 if (!flow->counter)
10148                                         return rte_flow_error_set
10149                                                 (error, rte_errno,
10150                                                 RTE_FLOW_ERROR_TYPE_ACTION,
10151                                                 NULL,
10152                                                 "cannot create counter"
10153                                                 " object.");
10154                                 dev_flow->dv.actions[actions_n] =
10155                                           (flow_dv_counter_get_by_idx(dev,
10156                                           flow->counter, NULL))->action;
10157                                 actions_n++;
10158                         }
10159                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
10160                                 ret = flow_dv_create_action_sample(dev,
10161                                                           dev_flow,
10162                                                           num_of_dest,
10163                                                           &sample_res,
10164                                                           &mdest_res,
10165                                                           sample_actions,
10166                                                           action_flags,
10167                                                           error);
10168                                 if (ret < 0)
10169                                         return rte_flow_error_set
10170                                                 (error, rte_errno,
10171                                                 RTE_FLOW_ERROR_TYPE_ACTION,
10172                                                 NULL,
10173                                                 "cannot create sample action");
10174                                 if (num_of_dest > 1) {
10175                                         dev_flow->dv.actions[sample_act_pos] =
10176                                         dev_flow->dv.dest_array_res->action;
10177                                 } else {
10178                                         dev_flow->dv.actions[sample_act_pos] =
10179                                         dev_flow->dv.sample_res->verbs_action;
10180                                 }
10181                         }
10182                         break;
10183                 default:
10184                         break;
10185                 }
10186                 if (mhdr_res->actions_num &&
10187                     modify_action_position == UINT32_MAX)
10188                         modify_action_position = actions_n++;
10189         }
10190         /*
10191          * For multiple destination (sample action with ratio=1), the encap
10192          * action and port id action will be combined into group action.
10193          * So need remove the original these actions in the flow and only
10194          * use the sample action instead of.
10195          */
10196         if (num_of_dest > 1 && sample_act->dr_port_id_action) {
10197                 int i;
10198                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
10199
10200                 for (i = 0; i < actions_n; i++) {
10201                         if ((sample_act->dr_encap_action &&
10202                                 sample_act->dr_encap_action ==
10203                                 dev_flow->dv.actions[i]) ||
10204                                 (sample_act->dr_port_id_action &&
10205                                 sample_act->dr_port_id_action ==
10206                                 dev_flow->dv.actions[i]))
10207                                 continue;
10208                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
10209                 }
10210                 memcpy((void *)dev_flow->dv.actions,
10211                                 (void *)temp_actions,
10212                                 tmp_actions_n * sizeof(void *));
10213                 actions_n = tmp_actions_n;
10214         }
10215         dev_flow->dv.actions_n = actions_n;
10216         dev_flow->act_flags = action_flags;
10217         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
10218                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
10219                 int item_type = items->type;
10220
10221                 if (!mlx5_flow_os_item_supported(item_type))
10222                         return rte_flow_error_set(error, ENOTSUP,
10223                                                   RTE_FLOW_ERROR_TYPE_ITEM,
10224                                                   NULL, "item not supported");
10225                 switch (item_type) {
10226                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
10227                         flow_dv_translate_item_port_id(dev, match_mask,
10228                                                        match_value, items);
10229                         last_item = MLX5_FLOW_ITEM_PORT_ID;
10230                         break;
10231                 case RTE_FLOW_ITEM_TYPE_ETH:
10232                         flow_dv_translate_item_eth(match_mask, match_value,
10233                                                    items, tunnel,
10234                                                    dev_flow->dv.group);
10235                         matcher.priority = action_flags &
10236                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
10237                                         !dev_flow->external ?
10238                                         MLX5_PRIORITY_MAP_L3 :
10239                                         MLX5_PRIORITY_MAP_L2;
10240                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
10241                                              MLX5_FLOW_LAYER_OUTER_L2;
10242                         break;
10243                 case RTE_FLOW_ITEM_TYPE_VLAN:
10244                         flow_dv_translate_item_vlan(dev_flow,
10245                                                     match_mask, match_value,
10246                                                     items, tunnel,
10247                                                     dev_flow->dv.group);
10248                         matcher.priority = MLX5_PRIORITY_MAP_L2;
10249                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
10250                                               MLX5_FLOW_LAYER_INNER_VLAN) :
10251                                              (MLX5_FLOW_LAYER_OUTER_L2 |
10252                                               MLX5_FLOW_LAYER_OUTER_VLAN);
10253                         break;
10254                 case RTE_FLOW_ITEM_TYPE_IPV4:
10255                         mlx5_flow_tunnel_ip_check(items, next_protocol,
10256                                                   &item_flags, &tunnel);
10257                         flow_dv_translate_item_ipv4(match_mask, match_value,
10258                                                     items, tunnel,
10259                                                     dev_flow->dv.group);
10260                         matcher.priority = MLX5_PRIORITY_MAP_L3;
10261                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
10262                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
10263                         if (items->mask != NULL &&
10264                             ((const struct rte_flow_item_ipv4 *)
10265                              items->mask)->hdr.next_proto_id) {
10266                                 next_protocol =
10267                                         ((const struct rte_flow_item_ipv4 *)
10268                                          (items->spec))->hdr.next_proto_id;
10269                                 next_protocol &=
10270                                         ((const struct rte_flow_item_ipv4 *)
10271                                          (items->mask))->hdr.next_proto_id;
10272                         } else {
10273                                 /* Reset for inner layer. */
10274                                 next_protocol = 0xff;
10275                         }
10276                         break;
10277                 case RTE_FLOW_ITEM_TYPE_IPV6:
10278                         mlx5_flow_tunnel_ip_check(items, next_protocol,
10279                                                   &item_flags, &tunnel);
10280                         flow_dv_translate_item_ipv6(match_mask, match_value,
10281                                                     items, tunnel,
10282                                                     dev_flow->dv.group);
10283                         matcher.priority = MLX5_PRIORITY_MAP_L3;
10284                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
10285                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
10286                         if (items->mask != NULL &&
10287                             ((const struct rte_flow_item_ipv6 *)
10288                              items->mask)->hdr.proto) {
10289                                 next_protocol =
10290                                         ((const struct rte_flow_item_ipv6 *)
10291                                          items->spec)->hdr.proto;
10292                                 next_protocol &=
10293                                         ((const struct rte_flow_item_ipv6 *)
10294                                          items->mask)->hdr.proto;
10295                         } else {
10296                                 /* Reset for inner layer. */
10297                                 next_protocol = 0xff;
10298                         }
10299                         break;
10300                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
10301                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
10302                                                              match_value,
10303                                                              items, tunnel);
10304                         last_item = tunnel ?
10305                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
10306                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
10307                         if (items->mask != NULL &&
10308                             ((const struct rte_flow_item_ipv6_frag_ext *)
10309                              items->mask)->hdr.next_header) {
10310                                 next_protocol =
10311                                 ((const struct rte_flow_item_ipv6_frag_ext *)
10312                                  items->spec)->hdr.next_header;
10313                                 next_protocol &=
10314                                 ((const struct rte_flow_item_ipv6_frag_ext *)
10315                                  items->mask)->hdr.next_header;
10316                         } else {
10317                                 /* Reset for inner layer. */
10318                                 next_protocol = 0xff;
10319                         }
10320                         break;
10321                 case RTE_FLOW_ITEM_TYPE_TCP:
10322                         flow_dv_translate_item_tcp(match_mask, match_value,
10323                                                    items, tunnel);
10324                         matcher.priority = MLX5_PRIORITY_MAP_L4;
10325                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
10326                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
10327                         break;
10328                 case RTE_FLOW_ITEM_TYPE_UDP:
10329                         flow_dv_translate_item_udp(match_mask, match_value,
10330                                                    items, tunnel);
10331                         matcher.priority = MLX5_PRIORITY_MAP_L4;
10332                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
10333                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
10334                         break;
10335                 case RTE_FLOW_ITEM_TYPE_GRE:
10336                         flow_dv_translate_item_gre(match_mask, match_value,
10337                                                    items, tunnel);
10338                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10339                         last_item = MLX5_FLOW_LAYER_GRE;
10340                         break;
10341                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
10342                         flow_dv_translate_item_gre_key(match_mask,
10343                                                        match_value, items);
10344                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
10345                         break;
10346                 case RTE_FLOW_ITEM_TYPE_NVGRE:
10347                         flow_dv_translate_item_nvgre(match_mask, match_value,
10348                                                      items, tunnel);
10349                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10350                         last_item = MLX5_FLOW_LAYER_GRE;
10351                         break;
10352                 case RTE_FLOW_ITEM_TYPE_VXLAN:
10353                         flow_dv_translate_item_vxlan(match_mask, match_value,
10354                                                      items, tunnel);
10355                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10356                         last_item = MLX5_FLOW_LAYER_VXLAN;
10357                         break;
10358                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
10359                         flow_dv_translate_item_vxlan_gpe(match_mask,
10360                                                          match_value, items,
10361                                                          tunnel);
10362                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10363                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
10364                         break;
10365                 case RTE_FLOW_ITEM_TYPE_GENEVE:
10366                         flow_dv_translate_item_geneve(match_mask, match_value,
10367                                                       items, tunnel);
10368                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10369                         last_item = MLX5_FLOW_LAYER_GENEVE;
10370                         break;
10371                 case RTE_FLOW_ITEM_TYPE_MPLS:
10372                         flow_dv_translate_item_mpls(match_mask, match_value,
10373                                                     items, last_item, tunnel);
10374                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10375                         last_item = MLX5_FLOW_LAYER_MPLS;
10376                         break;
10377                 case RTE_FLOW_ITEM_TYPE_MARK:
10378                         flow_dv_translate_item_mark(dev, match_mask,
10379                                                     match_value, items);
10380                         last_item = MLX5_FLOW_ITEM_MARK;
10381                         break;
10382                 case RTE_FLOW_ITEM_TYPE_META:
10383                         flow_dv_translate_item_meta(dev, match_mask,
10384                                                     match_value, attr, items);
10385                         last_item = MLX5_FLOW_ITEM_METADATA;
10386                         break;
10387                 case RTE_FLOW_ITEM_TYPE_ICMP:
10388                         flow_dv_translate_item_icmp(match_mask, match_value,
10389                                                     items, tunnel);
10390                         last_item = MLX5_FLOW_LAYER_ICMP;
10391                         break;
10392                 case RTE_FLOW_ITEM_TYPE_ICMP6:
10393                         flow_dv_translate_item_icmp6(match_mask, match_value,
10394                                                       items, tunnel);
10395                         last_item = MLX5_FLOW_LAYER_ICMP6;
10396                         break;
10397                 case RTE_FLOW_ITEM_TYPE_TAG:
10398                         flow_dv_translate_item_tag(dev, match_mask,
10399                                                    match_value, items);
10400                         last_item = MLX5_FLOW_ITEM_TAG;
10401                         break;
10402                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
10403                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
10404                                                         match_value, items);
10405                         last_item = MLX5_FLOW_ITEM_TAG;
10406                         break;
10407                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
10408                         flow_dv_translate_item_tx_queue(dev, match_mask,
10409                                                         match_value,
10410                                                         items);
10411                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
10412                         break;
10413                 case RTE_FLOW_ITEM_TYPE_GTP:
10414                         flow_dv_translate_item_gtp(match_mask, match_value,
10415                                                    items, tunnel);
10416                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
10417                         last_item = MLX5_FLOW_LAYER_GTP;
10418                         break;
10419                 case RTE_FLOW_ITEM_TYPE_ECPRI:
10420                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
10421                                 /* Create it only the first time to be used. */
10422                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
10423                                 if (ret)
10424                                         return rte_flow_error_set
10425                                                 (error, -ret,
10426                                                 RTE_FLOW_ERROR_TYPE_ITEM,
10427                                                 NULL,
10428                                                 "cannot create eCPRI parser");
10429                         }
10430                         /* Adjust the length matcher and device flow value. */
10431                         matcher.mask.size = MLX5_ST_SZ_BYTES(fte_match_param);
10432                         dev_flow->dv.value.size =
10433                                         MLX5_ST_SZ_BYTES(fte_match_param);
10434                         flow_dv_translate_item_ecpri(dev, match_mask,
10435                                                      match_value, items);
10436                         /* No other protocol should follow eCPRI layer. */
10437                         last_item = MLX5_FLOW_LAYER_ECPRI;
10438                         break;
10439                 default:
10440                         break;
10441                 }
10442                 item_flags |= last_item;
10443         }
10444         /*
10445          * When E-Switch mode is enabled, we have two cases where we need to
10446          * set the source port manually.
10447          * The first one, is in case of Nic steering rule, and the second is
10448          * E-Switch rule where no port_id item was found. In both cases
10449          * the source port is set according the current port in use.
10450          */
10451         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
10452             (priv->representor || priv->master)) {
10453                 if (flow_dv_translate_item_port_id(dev, match_mask,
10454                                                    match_value, NULL))
10455                         return -rte_errno;
10456         }
10457 #ifdef RTE_LIBRTE_MLX5_DEBUG
10458         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
10459                                               dev_flow->dv.value.buf));
10460 #endif
10461         /*
10462          * Layers may be already initialized from prefix flow if this dev_flow
10463          * is the suffix flow.
10464          */
10465         handle->layers |= item_flags;
10466         if (action_flags & MLX5_FLOW_ACTION_RSS)
10467                 flow_dv_hashfields_set(dev_flow, rss_desc);
10468         /* Register matcher. */
10469         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
10470                                     matcher.mask.size);
10471         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
10472                                                      matcher.priority);
10473         /* reserved field no needs to be set to 0 here. */
10474         tbl_key.domain = attr->transfer;
10475         tbl_key.direction = attr->egress;
10476         tbl_key.table_id = dev_flow->dv.group;
10477         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
10478                                      tunnel, attr->group, error))
10479                 return -rte_errno;
10480         return 0;
10481 }
10482
10483 /**
10484  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
10485  * and tunnel.
10486  *
10487  * @param[in, out] action
10488  *   Shred RSS action holding hash RX queue objects.
10489  * @param[in] hash_fields
10490  *   Defines combination of packet fields to participate in RX hash.
10491  * @param[in] tunnel
10492  *   Tunnel type
10493  * @param[in] hrxq_idx
10494  *   Hash RX queue index to set.
10495  *
10496  * @return
10497  *   0 on success, otherwise negative errno value.
10498  */
10499 static int
10500 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
10501                               const uint64_t hash_fields,
10502                               const int tunnel,
10503                               uint32_t hrxq_idx)
10504 {
10505         uint32_t *hrxqs = tunnel ? action->hrxq : action->hrxq_tunnel;
10506
10507         switch (hash_fields & ~IBV_RX_HASH_INNER) {
10508         case MLX5_RSS_HASH_IPV4:
10509                 hrxqs[0] = hrxq_idx;
10510                 return 0;
10511         case MLX5_RSS_HASH_IPV4_TCP:
10512                 hrxqs[1] = hrxq_idx;
10513                 return 0;
10514         case MLX5_RSS_HASH_IPV4_UDP:
10515                 hrxqs[2] = hrxq_idx;
10516                 return 0;
10517         case MLX5_RSS_HASH_IPV6:
10518                 hrxqs[3] = hrxq_idx;
10519                 return 0;
10520         case MLX5_RSS_HASH_IPV6_TCP:
10521                 hrxqs[4] = hrxq_idx;
10522                 return 0;
10523         case MLX5_RSS_HASH_IPV6_UDP:
10524                 hrxqs[5] = hrxq_idx;
10525                 return 0;
10526         case MLX5_RSS_HASH_NONE:
10527                 hrxqs[6] = hrxq_idx;
10528                 return 0;
10529         default:
10530                 return -1;
10531         }
10532 }
10533
10534 /**
10535  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
10536  * and tunnel.
10537  *
10538  * @param[in] dev
10539  *   Pointer to the Ethernet device structure.
10540  * @param[in] idx
10541  *   Shared RSS action ID holding hash RX queue objects.
10542  * @param[in] hash_fields
10543  *   Defines combination of packet fields to participate in RX hash.
10544  * @param[in] tunnel
10545  *   Tunnel type
10546  *
10547  * @return
10548  *   Valid hash RX queue index, otherwise 0.
10549  */
10550 static uint32_t
10551 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
10552                                  const uint64_t hash_fields,
10553                                  const int tunnel)
10554 {
10555         struct mlx5_priv *priv = dev->data->dev_private;
10556         struct mlx5_shared_action_rss *shared_rss =
10557             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
10558         const uint32_t *hrxqs = tunnel ? shared_rss->hrxq :
10559                                                         shared_rss->hrxq_tunnel;
10560
10561         switch (hash_fields & ~IBV_RX_HASH_INNER) {
10562         case MLX5_RSS_HASH_IPV4:
10563                 return hrxqs[0];
10564         case MLX5_RSS_HASH_IPV4_TCP:
10565                 return hrxqs[1];
10566         case MLX5_RSS_HASH_IPV4_UDP:
10567                 return hrxqs[2];
10568         case MLX5_RSS_HASH_IPV6:
10569                 return hrxqs[3];
10570         case MLX5_RSS_HASH_IPV6_TCP:
10571                 return hrxqs[4];
10572         case MLX5_RSS_HASH_IPV6_UDP:
10573                 return hrxqs[5];
10574         case MLX5_RSS_HASH_NONE:
10575                 return hrxqs[6];
10576         default:
10577                 return 0;
10578         }
10579 }
10580
10581 /**
10582  * Retrieves hash RX queue suitable for the *flow*.
10583  * If shared action configured for *flow* suitable hash RX queue will be
10584  * retrieved from attached shared action.
10585  *
10586  * @param[in] dev
10587  *   Pointer to the Ethernet device structure.
10588  * @param[in] dev_flow
10589  *   Pointer to the sub flow.
10590  * @param[in] rss_desc
10591  *   Pointer to the RSS descriptor.
10592  * @param[out] hrxq
10593  *   Pointer to retrieved hash RX queue object.
10594  *
10595  * @return
10596  *   Valid hash RX queue index, otherwise 0 and rte_errno is set.
10597  */
10598 static uint32_t
10599 __flow_dv_rss_get_hrxq(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
10600                        struct mlx5_flow_rss_desc *rss_desc,
10601                        struct mlx5_hrxq **hrxq)
10602 {
10603         struct mlx5_priv *priv = dev->data->dev_private;
10604         uint32_t hrxq_idx;
10605
10606         if (rss_desc->shared_rss) {
10607                 hrxq_idx = __flow_dv_action_rss_hrxq_lookup
10608                                 (dev, rss_desc->shared_rss,
10609                                  dev_flow->hash_fields,
10610                                  !!(dev_flow->handle->layers &
10611                                     MLX5_FLOW_LAYER_TUNNEL));
10612                 if (hrxq_idx)
10613                         *hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10614                                                hrxq_idx);
10615         } else {
10616                 *hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
10617                                              &hrxq_idx);
10618         }
10619         return hrxq_idx;
10620 }
10621
10622 /**
10623  * Apply the flow to the NIC, lock free,
10624  * (mutex should be acquired by caller).
10625  *
10626  * @param[in] dev
10627  *   Pointer to the Ethernet device structure.
10628  * @param[in, out] flow
10629  *   Pointer to flow structure.
10630  * @param[out] error
10631  *   Pointer to error structure.
10632  *
10633  * @return
10634  *   0 on success, a negative errno value otherwise and rte_errno is set.
10635  */
10636 static int
10637 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
10638               struct rte_flow_error *error)
10639 {
10640         struct mlx5_flow_dv_workspace *dv;
10641         struct mlx5_flow_handle *dh;
10642         struct mlx5_flow_handle_dv *dv_h;
10643         struct mlx5_flow *dev_flow;
10644         struct mlx5_priv *priv = dev->data->dev_private;
10645         uint32_t handle_idx;
10646         int n;
10647         int err;
10648         int idx;
10649         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
10650         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
10651
10652         MLX5_ASSERT(wks);
10653         if (rss_desc->shared_rss) {
10654                 dh = wks->flows[wks->flow_idx - 1].handle;
10655                 MLX5_ASSERT(dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS);
10656                 dh->rix_srss = rss_desc->shared_rss;
10657         }
10658         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
10659                 dev_flow = &wks->flows[idx];
10660                 dv = &dev_flow->dv;
10661                 dh = dev_flow->handle;
10662                 dv_h = &dh->dvh;
10663                 n = dv->actions_n;
10664                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
10665                         if (dv->transfer) {
10666                                 dv->actions[n++] = priv->sh->esw_drop_action;
10667                         } else {
10668                                 MLX5_ASSERT(priv->drop_queue.hrxq);
10669                                 dv->actions[n++] =
10670                                                 priv->drop_queue.hrxq->action;
10671                         }
10672                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
10673                            !dv_h->rix_sample && !dv_h->rix_dest_array) ||
10674                             (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS)) {
10675                         struct mlx5_hrxq *hrxq = NULL;
10676                         uint32_t hrxq_idx = __flow_dv_rss_get_hrxq
10677                                         (dev, dev_flow, rss_desc, &hrxq);
10678                         if (!hrxq) {
10679                                 rte_flow_error_set
10680                                         (error, rte_errno,
10681                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10682                                          "cannot get hash queue");
10683                                 goto error;
10684                         }
10685                         if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
10686                                 dh->rix_hrxq = hrxq_idx;
10687                         dv->actions[n++] = hrxq->action;
10688                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
10689                         if (!priv->sh->default_miss_action) {
10690                                 rte_flow_error_set
10691                                         (error, rte_errno,
10692                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10693                                          "default miss action not be created.");
10694                                 goto error;
10695                         }
10696                         dv->actions[n++] = priv->sh->default_miss_action;
10697                 }
10698                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
10699                                                (void *)&dv->value, n,
10700                                                dv->actions, &dh->drv_flow);
10701                 if (err) {
10702                         rte_flow_error_set(error, errno,
10703                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10704                                            NULL,
10705                                            "hardware refuses to create flow");
10706                         goto error;
10707                 }
10708                 if (priv->vmwa_context &&
10709                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
10710                         /*
10711                          * The rule contains the VLAN pattern.
10712                          * For VF we are going to create VLAN
10713                          * interface to make hypervisor set correct
10714                          * e-Switch vport context.
10715                          */
10716                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
10717                 }
10718         }
10719         return 0;
10720 error:
10721         err = rte_errno; /* Save rte_errno before cleanup. */
10722         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
10723                        handle_idx, dh, next) {
10724                 /* hrxq is union, don't clear it if the flag is not set. */
10725                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
10726                         mlx5_hrxq_release(dev, dh->rix_hrxq);
10727                         dh->rix_hrxq = 0;
10728                 }
10729                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
10730                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
10731         }
10732         if (rss_desc->shared_rss)
10733                 wks->flows[wks->flow_idx - 1].handle->rix_srss = 0;
10734         rte_errno = err; /* Restore rte_errno. */
10735         return -rte_errno;
10736 }
10737
10738 void
10739 flow_dv_matcher_remove_cb(struct mlx5_cache_list *list __rte_unused,
10740                           struct mlx5_cache_entry *entry)
10741 {
10742         struct mlx5_flow_dv_matcher *cache = container_of(entry, typeof(*cache),
10743                                                           entry);
10744
10745         claim_zero(mlx5_flow_os_destroy_flow_matcher(cache->matcher_object));
10746         mlx5_free(cache);
10747 }
10748
10749 /**
10750  * Release the flow matcher.
10751  *
10752  * @param dev
10753  *   Pointer to Ethernet device.
10754  * @param handle
10755  *   Pointer to mlx5_flow_handle.
10756  *
10757  * @return
10758  *   1 while a reference on it exists, 0 when freed.
10759  */
10760 static int
10761 flow_dv_matcher_release(struct rte_eth_dev *dev,
10762                         struct mlx5_flow_handle *handle)
10763 {
10764         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
10765         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
10766                                                             typeof(*tbl), tbl);
10767         int ret;
10768
10769         MLX5_ASSERT(matcher->matcher_object);
10770         ret = mlx5_cache_unregister(&tbl->matchers, &matcher->entry);
10771         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
10772         return ret;
10773 }
10774
10775 /**
10776  * Release encap_decap resource.
10777  *
10778  * @param list
10779  *   Pointer to the hash list.
10780  * @param entry
10781  *   Pointer to exist resource entry object.
10782  */
10783 void
10784 flow_dv_encap_decap_remove_cb(struct mlx5_hlist *list,
10785                               struct mlx5_hlist_entry *entry)
10786 {
10787         struct mlx5_dev_ctx_shared *sh = list->ctx;
10788         struct mlx5_flow_dv_encap_decap_resource *res =
10789                 container_of(entry, typeof(*res), entry);
10790
10791         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
10792         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
10793 }
10794
10795 /**
10796  * Release an encap/decap resource.
10797  *
10798  * @param dev
10799  *   Pointer to Ethernet device.
10800  * @param encap_decap_idx
10801  *   Index of encap decap resource.
10802  *
10803  * @return
10804  *   1 while a reference on it exists, 0 when freed.
10805  */
10806 static int
10807 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
10808                                      uint32_t encap_decap_idx)
10809 {
10810         struct mlx5_priv *priv = dev->data->dev_private;
10811         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
10812
10813         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
10814                                         encap_decap_idx);
10815         if (!cache_resource)
10816                 return 0;
10817         MLX5_ASSERT(cache_resource->action);
10818         return mlx5_hlist_unregister(priv->sh->encaps_decaps,
10819                                      &cache_resource->entry);
10820 }
10821
10822 /**
10823  * Release an jump to table action resource.
10824  *
10825  * @param dev
10826  *   Pointer to Ethernet device.
10827  * @param handle
10828  *   Pointer to mlx5_flow_handle.
10829  *
10830  * @return
10831  *   1 while a reference on it exists, 0 when freed.
10832  */
10833 static int
10834 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
10835                                   struct mlx5_flow_handle *handle)
10836 {
10837         struct mlx5_priv *priv = dev->data->dev_private;
10838         struct mlx5_flow_tbl_data_entry *tbl_data;
10839
10840         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
10841                              handle->rix_jump);
10842         if (!tbl_data)
10843                 return 0;
10844         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
10845 }
10846
10847 void
10848 flow_dv_modify_remove_cb(struct mlx5_hlist *list __rte_unused,
10849                          struct mlx5_hlist_entry *entry)
10850 {
10851         struct mlx5_flow_dv_modify_hdr_resource *res =
10852                 container_of(entry, typeof(*res), entry);
10853
10854         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
10855         mlx5_free(entry);
10856 }
10857
10858 /**
10859  * Release a modify-header resource.
10860  *
10861  * @param dev
10862  *   Pointer to Ethernet device.
10863  * @param handle
10864  *   Pointer to mlx5_flow_handle.
10865  *
10866  * @return
10867  *   1 while a reference on it exists, 0 when freed.
10868  */
10869 static int
10870 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
10871                                     struct mlx5_flow_handle *handle)
10872 {
10873         struct mlx5_priv *priv = dev->data->dev_private;
10874         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
10875
10876         MLX5_ASSERT(entry->action);
10877         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
10878 }
10879
10880 void
10881 flow_dv_port_id_remove_cb(struct mlx5_cache_list *list,
10882                           struct mlx5_cache_entry *entry)
10883 {
10884         struct mlx5_dev_ctx_shared *sh = list->ctx;
10885         struct mlx5_flow_dv_port_id_action_resource *cache =
10886                         container_of(entry, typeof(*cache), entry);
10887
10888         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
10889         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], cache->idx);
10890 }
10891
10892 /**
10893  * Release port ID action resource.
10894  *
10895  * @param dev
10896  *   Pointer to Ethernet device.
10897  * @param handle
10898  *   Pointer to mlx5_flow_handle.
10899  *
10900  * @return
10901  *   1 while a reference on it exists, 0 when freed.
10902  */
10903 static int
10904 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
10905                                         uint32_t port_id)
10906 {
10907         struct mlx5_priv *priv = dev->data->dev_private;
10908         struct mlx5_flow_dv_port_id_action_resource *cache;
10909
10910         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
10911         if (!cache)
10912                 return 0;
10913         MLX5_ASSERT(cache->action);
10914         return mlx5_cache_unregister(&priv->sh->port_id_action_list,
10915                                      &cache->entry);
10916 }
10917
10918 /**
10919  * Release shared RSS action resource.
10920  *
10921  * @param dev
10922  *   Pointer to Ethernet device.
10923  * @param srss
10924  *   Shared RSS action index.
10925  */
10926 static void
10927 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
10928 {
10929         struct mlx5_priv *priv = dev->data->dev_private;
10930         struct mlx5_shared_action_rss *shared_rss;
10931
10932         shared_rss = mlx5_ipool_get
10933                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
10934         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
10935 }
10936
10937 void
10938 flow_dv_push_vlan_remove_cb(struct mlx5_cache_list *list,
10939                             struct mlx5_cache_entry *entry)
10940 {
10941         struct mlx5_dev_ctx_shared *sh = list->ctx;
10942         struct mlx5_flow_dv_push_vlan_action_resource *cache =
10943                         container_of(entry, typeof(*cache), entry);
10944
10945         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
10946         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], cache->idx);
10947 }
10948
10949 /**
10950  * Release push vlan action resource.
10951  *
10952  * @param dev
10953  *   Pointer to Ethernet device.
10954  * @param handle
10955  *   Pointer to mlx5_flow_handle.
10956  *
10957  * @return
10958  *   1 while a reference on it exists, 0 when freed.
10959  */
10960 static int
10961 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
10962                                           struct mlx5_flow_handle *handle)
10963 {
10964         struct mlx5_priv *priv = dev->data->dev_private;
10965         struct mlx5_flow_dv_push_vlan_action_resource *cache;
10966         uint32_t idx = handle->dvh.rix_push_vlan;
10967
10968         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
10969         if (!cache)
10970                 return 0;
10971         MLX5_ASSERT(cache->action);
10972         return mlx5_cache_unregister(&priv->sh->push_vlan_action_list,
10973                                      &cache->entry);
10974 }
10975
10976 /**
10977  * Release the fate resource.
10978  *
10979  * @param dev
10980  *   Pointer to Ethernet device.
10981  * @param handle
10982  *   Pointer to mlx5_flow_handle.
10983  */
10984 static void
10985 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
10986                                struct mlx5_flow_handle *handle)
10987 {
10988         if (!handle->rix_fate)
10989                 return;
10990         switch (handle->fate_action) {
10991         case MLX5_FLOW_FATE_QUEUE:
10992                 mlx5_hrxq_release(dev, handle->rix_hrxq);
10993                 break;
10994         case MLX5_FLOW_FATE_JUMP:
10995                 flow_dv_jump_tbl_resource_release(dev, handle);
10996                 break;
10997         case MLX5_FLOW_FATE_PORT_ID:
10998                 flow_dv_port_id_action_resource_release(dev,
10999                                 handle->rix_port_id_action);
11000                 break;
11001         case MLX5_FLOW_FATE_SHARED_RSS:
11002                 flow_dv_shared_rss_action_release(dev, handle->rix_srss);
11003                 break;
11004         default:
11005                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
11006                 break;
11007         }
11008         handle->rix_fate = 0;
11009 }
11010
11011 void
11012 flow_dv_sample_remove_cb(struct mlx5_cache_list *list,
11013                          struct mlx5_cache_entry *entry)
11014 {
11015         struct rte_eth_dev *dev = list->ctx;
11016         struct mlx5_priv *priv = dev->data->dev_private;
11017         struct mlx5_flow_dv_sample_resource *cache_resource =
11018                         container_of(entry, typeof(*cache_resource), entry);
11019
11020         if (cache_resource->verbs_action)
11021                 claim_zero(mlx5_glue->destroy_flow_action
11022                                 (cache_resource->verbs_action));
11023         if (cache_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11024                 if (cache_resource->default_miss)
11025                         claim_zero(mlx5_glue->destroy_flow_action
11026                           (cache_resource->default_miss));
11027         }
11028         if (cache_resource->normal_path_tbl)
11029                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11030                         cache_resource->normal_path_tbl);
11031         flow_dv_sample_sub_actions_release(dev,
11032                                 &cache_resource->sample_idx);
11033         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
11034                         cache_resource->idx);
11035         DRV_LOG(DEBUG, "sample resource %p: removed",
11036                 (void *)cache_resource);
11037 }
11038
11039 /**
11040  * Release an sample resource.
11041  *
11042  * @param dev
11043  *   Pointer to Ethernet device.
11044  * @param handle
11045  *   Pointer to mlx5_flow_handle.
11046  *
11047  * @return
11048  *   1 while a reference on it exists, 0 when freed.
11049  */
11050 static int
11051 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
11052                                      struct mlx5_flow_handle *handle)
11053 {
11054         struct mlx5_priv *priv = dev->data->dev_private;
11055         struct mlx5_flow_dv_sample_resource *cache_resource;
11056
11057         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
11058                          handle->dvh.rix_sample);
11059         if (!cache_resource)
11060                 return 0;
11061         MLX5_ASSERT(cache_resource->verbs_action);
11062         return mlx5_cache_unregister(&priv->sh->sample_action_list,
11063                                      &cache_resource->entry);
11064 }
11065
11066 void
11067 flow_dv_dest_array_remove_cb(struct mlx5_cache_list *list,
11068                              struct mlx5_cache_entry *entry)
11069 {
11070         struct rte_eth_dev *dev = list->ctx;
11071         struct mlx5_priv *priv = dev->data->dev_private;
11072         struct mlx5_flow_dv_dest_array_resource *cache_resource =
11073                         container_of(entry, typeof(*cache_resource), entry);
11074         uint32_t i = 0;
11075
11076         MLX5_ASSERT(cache_resource->action);
11077         if (cache_resource->action)
11078                 claim_zero(mlx5_glue->destroy_flow_action
11079                                         (cache_resource->action));
11080         for (; i < cache_resource->num_of_dest; i++)
11081                 flow_dv_sample_sub_actions_release(dev,
11082                                 &cache_resource->sample_idx[i]);
11083         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11084                         cache_resource->idx);
11085         DRV_LOG(DEBUG, "destination array resource %p: removed",
11086                 (void *)cache_resource);
11087 }
11088
11089 /**
11090  * Release an destination array resource.
11091  *
11092  * @param dev
11093  *   Pointer to Ethernet device.
11094  * @param handle
11095  *   Pointer to mlx5_flow_handle.
11096  *
11097  * @return
11098  *   1 while a reference on it exists, 0 when freed.
11099  */
11100 static int
11101 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
11102                                     struct mlx5_flow_handle *handle)
11103 {
11104         struct mlx5_priv *priv = dev->data->dev_private;
11105         struct mlx5_flow_dv_dest_array_resource *cache;
11106
11107         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11108                                handle->dvh.rix_dest_array);
11109         if (!cache)
11110                 return 0;
11111         MLX5_ASSERT(cache->action);
11112         return mlx5_cache_unregister(&priv->sh->dest_array_list,
11113                                      &cache->entry);
11114 }
11115
11116 /**
11117  * Remove the flow from the NIC but keeps it in memory.
11118  * Lock free, (mutex should be acquired by caller).
11119  *
11120  * @param[in] dev
11121  *   Pointer to Ethernet device.
11122  * @param[in, out] flow
11123  *   Pointer to flow structure.
11124  */
11125 static void
11126 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
11127 {
11128         struct mlx5_flow_handle *dh;
11129         uint32_t handle_idx;
11130         struct mlx5_priv *priv = dev->data->dev_private;
11131
11132         if (!flow)
11133                 return;
11134         handle_idx = flow->dev_handles;
11135         while (handle_idx) {
11136                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
11137                                     handle_idx);
11138                 if (!dh)
11139                         return;
11140                 if (dh->drv_flow) {
11141                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
11142                         dh->drv_flow = NULL;
11143                 }
11144                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
11145                         flow_dv_fate_resource_release(dev, dh);
11146                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
11147                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
11148                 handle_idx = dh->next.next;
11149         }
11150 }
11151
11152 /**
11153  * Remove the flow from the NIC and the memory.
11154  * Lock free, (mutex should be acquired by caller).
11155  *
11156  * @param[in] dev
11157  *   Pointer to the Ethernet device structure.
11158  * @param[in, out] flow
11159  *   Pointer to flow structure.
11160  */
11161 static void
11162 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
11163 {
11164         struct mlx5_flow_handle *dev_handle;
11165         struct mlx5_priv *priv = dev->data->dev_private;
11166
11167         if (!flow)
11168                 return;
11169         flow_dv_remove(dev, flow);
11170         if (flow->counter) {
11171                 flow_dv_counter_free(dev, flow->counter);
11172                 flow->counter = 0;
11173         }
11174         if (flow->meter) {
11175                 struct mlx5_flow_meter *fm;
11176
11177                 fm = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MTR],
11178                                     flow->meter);
11179                 if (fm)
11180                         mlx5_flow_meter_detach(fm);
11181                 flow->meter = 0;
11182         }
11183         if (flow->age)
11184                 flow_dv_aso_age_release(dev, flow->age);
11185         while (flow->dev_handles) {
11186                 uint32_t tmp_idx = flow->dev_handles;
11187
11188                 dev_handle = mlx5_ipool_get(priv->sh->ipool
11189                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
11190                 if (!dev_handle)
11191                         return;
11192                 flow->dev_handles = dev_handle->next.next;
11193                 if (dev_handle->dvh.matcher)
11194                         flow_dv_matcher_release(dev, dev_handle);
11195                 if (dev_handle->dvh.rix_sample)
11196                         flow_dv_sample_resource_release(dev, dev_handle);
11197                 if (dev_handle->dvh.rix_dest_array)
11198                         flow_dv_dest_array_resource_release(dev, dev_handle);
11199                 if (dev_handle->dvh.rix_encap_decap)
11200                         flow_dv_encap_decap_resource_release(dev,
11201                                 dev_handle->dvh.rix_encap_decap);
11202                 if (dev_handle->dvh.modify_hdr)
11203                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
11204                 if (dev_handle->dvh.rix_push_vlan)
11205                         flow_dv_push_vlan_action_resource_release(dev,
11206                                                                   dev_handle);
11207                 if (dev_handle->dvh.rix_tag)
11208                         flow_dv_tag_release(dev,
11209                                             dev_handle->dvh.rix_tag);
11210                 flow_dv_fate_resource_release(dev, dev_handle);
11211                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
11212                            tmp_idx);
11213         }
11214 }
11215
11216 /**
11217  * Release array of hash RX queue objects.
11218  * Helper function.
11219  *
11220  * @param[in] dev
11221  *   Pointer to the Ethernet device structure.
11222  * @param[in, out] hrxqs
11223  *   Array of hash RX queue objects.
11224  *
11225  * @return
11226  *   Total number of references to hash RX queue objects in *hrxqs* array
11227  *   after this operation.
11228  */
11229 static int
11230 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
11231                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
11232 {
11233         size_t i;
11234         int remaining = 0;
11235
11236         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
11237                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
11238
11239                 if (!ret)
11240                         (*hrxqs)[i] = 0;
11241                 remaining += ret;
11242         }
11243         return remaining;
11244 }
11245
11246 /**
11247  * Release all hash RX queue objects representing shared RSS action.
11248  *
11249  * @param[in] dev
11250  *   Pointer to the Ethernet device structure.
11251  * @param[in, out] action
11252  *   Shared RSS action to remove hash RX queue objects from.
11253  *
11254  * @return
11255  *   Total number of references to hash RX queue objects stored in *action*
11256  *   after this operation.
11257  *   Expected to be 0 if no external references held.
11258  */
11259 static int
11260 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
11261                                  struct mlx5_shared_action_rss *action)
11262 {
11263         return __flow_dv_hrxqs_release(dev, &action->hrxq) +
11264                 __flow_dv_hrxqs_release(dev, &action->hrxq_tunnel);
11265 }
11266
11267 /**
11268  * Setup shared RSS action.
11269  * Prepare set of hash RX queue objects sufficient to handle all valid
11270  * hash_fields combinations (see enum ibv_rx_hash_fields).
11271  *
11272  * @param[in] dev
11273  *   Pointer to the Ethernet device structure.
11274  * @param[in] action_idx
11275  *   Shared RSS action ipool index.
11276  * @param[in, out] action
11277  *   Partially initialized shared RSS action.
11278  * @param[out] error
11279  *   Perform verbose error reporting if not NULL. Initialized in case of
11280  *   error only.
11281  *
11282  * @return
11283  *   0 on success, otherwise negative errno value.
11284  */
11285 static int
11286 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
11287                         uint32_t action_idx,
11288                         struct mlx5_shared_action_rss *action,
11289                         struct rte_flow_error *error)
11290 {
11291         struct mlx5_flow_rss_desc rss_desc = { 0 };
11292         size_t i;
11293         int err;
11294
11295         memcpy(rss_desc.key, action->origin.key, MLX5_RSS_HASH_KEY_LEN);
11296         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
11297         rss_desc.const_q = action->origin.queue;
11298         rss_desc.queue_num = action->origin.queue_num;
11299         /* Set non-zero value to indicate a shared RSS. */
11300         rss_desc.shared_rss = action_idx;
11301         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
11302                 uint32_t hrxq_idx;
11303                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
11304                 int tunnel;
11305
11306                 for (tunnel = 0; tunnel < 2; tunnel++) {
11307                         rss_desc.tunnel = tunnel;
11308                         rss_desc.hash_fields = hash_fields;
11309                         hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
11310                         if (!hrxq_idx) {
11311                                 rte_flow_error_set
11312                                         (error, rte_errno,
11313                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
11314                                          "cannot get hash queue");
11315                                 goto error_hrxq_new;
11316                         }
11317                         err = __flow_dv_action_rss_hrxq_set
11318                                 (action, hash_fields, tunnel, hrxq_idx);
11319                         MLX5_ASSERT(!err);
11320                 }
11321         }
11322         return 0;
11323 error_hrxq_new:
11324         err = rte_errno;
11325         __flow_dv_action_rss_hrxqs_release(dev, action);
11326         rte_errno = err;
11327         return -rte_errno;
11328 }
11329
11330 /**
11331  * Create shared RSS action.
11332  *
11333  * @param[in] dev
11334  *   Pointer to the Ethernet device structure.
11335  * @param[in] conf
11336  *   Shared action configuration.
11337  * @param[in] rss
11338  *   RSS action specification used to create shared action.
11339  * @param[out] error
11340  *   Perform verbose error reporting if not NULL. Initialized in case of
11341  *   error only.
11342  *
11343  * @return
11344  *   A valid shared action ID in case of success, 0 otherwise and
11345  *   rte_errno is set.
11346  */
11347 static uint32_t
11348 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
11349                             const struct rte_flow_shared_action_conf *conf,
11350                             const struct rte_flow_action_rss *rss,
11351                             struct rte_flow_error *error)
11352 {
11353         struct mlx5_priv *priv = dev->data->dev_private;
11354         struct mlx5_shared_action_rss *shared_action = NULL;
11355         void *queue = NULL;
11356         struct rte_flow_action_rss *origin;
11357         const uint8_t *rss_key;
11358         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
11359         uint32_t idx;
11360
11361         RTE_SET_USED(conf);
11362         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
11363                             0, SOCKET_ID_ANY);
11364         shared_action = mlx5_ipool_zmalloc
11365                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
11366         if (!shared_action || !queue) {
11367                 rte_flow_error_set(error, ENOMEM,
11368                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
11369                                    "cannot allocate resource memory");
11370                 goto error_rss_init;
11371         }
11372         if (idx > (1u << MLX5_SHARED_ACTION_TYPE_OFFSET)) {
11373                 rte_flow_error_set(error, E2BIG,
11374                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
11375                                    "rss action number out of range");
11376                 goto error_rss_init;
11377         }
11378         shared_action->queue = queue;
11379         origin = &shared_action->origin;
11380         origin->func = rss->func;
11381         origin->level = rss->level;
11382         /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
11383         origin->types = !rss->types ? ETH_RSS_IP : rss->types;
11384         /* NULL RSS key indicates default RSS key. */
11385         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11386         memcpy(shared_action->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11387         origin->key = &shared_action->key[0];
11388         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
11389         memcpy(shared_action->queue, rss->queue, queue_size);
11390         origin->queue = shared_action->queue;
11391         origin->queue_num = rss->queue_num;
11392         if (__flow_dv_action_rss_setup(dev, idx, shared_action, error))
11393                 goto error_rss_init;
11394         __atomic_add_fetch(&shared_action->refcnt, 1, __ATOMIC_RELAXED);
11395         rte_spinlock_lock(&priv->shared_act_sl);
11396         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11397                      &priv->rss_shared_actions, idx, shared_action, next);
11398         rte_spinlock_unlock(&priv->shared_act_sl);
11399         return idx;
11400 error_rss_init:
11401         if (shared_action)
11402                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11403                                 idx);
11404         if (queue)
11405                 mlx5_free(queue);
11406         return 0;
11407 }
11408
11409 /**
11410  * Destroy the shared RSS action.
11411  * Release related hash RX queue objects.
11412  *
11413  * @param[in] dev
11414  *   Pointer to the Ethernet device structure.
11415  * @param[in] idx
11416  *   The shared RSS action object ID to be removed.
11417  * @param[out] error
11418  *   Perform verbose error reporting if not NULL. Initialized in case of
11419  *   error only.
11420  *
11421  * @return
11422  *   0 on success, otherwise negative errno value.
11423  */
11424 static int
11425 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
11426                              struct rte_flow_error *error)
11427 {
11428         struct mlx5_priv *priv = dev->data->dev_private;
11429         struct mlx5_shared_action_rss *shared_rss =
11430             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
11431         uint32_t old_refcnt = 1;
11432         int remaining;
11433
11434         if (!shared_rss)
11435                 return rte_flow_error_set(error, EINVAL,
11436                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11437                                           "invalid shared action");
11438         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
11439         if (remaining)
11440                 return rte_flow_error_set(error, ETOOMANYREFS,
11441                                           RTE_FLOW_ERROR_TYPE_ACTION,
11442                                           NULL,
11443                                           "shared rss hrxq has references");
11444         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
11445                                          0, 0, __ATOMIC_ACQUIRE,
11446                                          __ATOMIC_RELAXED))
11447                 return rte_flow_error_set(error, ETOOMANYREFS,
11448                                           RTE_FLOW_ERROR_TYPE_ACTION,
11449                                           NULL,
11450                                           "shared rss has references");
11451         rte_free(shared_rss->queue);
11452         rte_spinlock_lock(&priv->shared_act_sl);
11453         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11454                      &priv->rss_shared_actions, idx, shared_rss, next);
11455         rte_spinlock_unlock(&priv->shared_act_sl);
11456         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
11457                         idx);
11458         return 0;
11459 }
11460
11461 /**
11462  * Create shared action, lock free,
11463  * (mutex should be acquired by caller).
11464  * Dispatcher for action type specific call.
11465  *
11466  * @param[in] dev
11467  *   Pointer to the Ethernet device structure.
11468  * @param[in] conf
11469  *   Shared action configuration.
11470  * @param[in] action
11471  *   Action specification used to create shared action.
11472  * @param[out] error
11473  *   Perform verbose error reporting if not NULL. Initialized in case of
11474  *   error only.
11475  *
11476  * @return
11477  *   A valid shared action handle in case of success, NULL otherwise and
11478  *   rte_errno is set.
11479  */
11480 static struct rte_flow_shared_action *
11481 flow_dv_action_create(struct rte_eth_dev *dev,
11482                       const struct rte_flow_shared_action_conf *conf,
11483                       const struct rte_flow_action *action,
11484                       struct rte_flow_error *err)
11485 {
11486         uint32_t idx = 0;
11487         uint32_t ret = 0;
11488
11489         switch (action->type) {
11490         case RTE_FLOW_ACTION_TYPE_RSS:
11491                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
11492                 idx = (MLX5_SHARED_ACTION_TYPE_RSS <<
11493                        MLX5_SHARED_ACTION_TYPE_OFFSET) | ret;
11494                 break;
11495         case RTE_FLOW_ACTION_TYPE_AGE:
11496                 ret = flow_dv_translate_create_aso_age(dev, action->conf);
11497                 idx = (MLX5_SHARED_ACTION_TYPE_AGE <<
11498                        MLX5_SHARED_ACTION_TYPE_OFFSET) | ret;
11499                 if (ret) {
11500                         struct mlx5_aso_age_action *aso_age =
11501                                               flow_aso_age_get_by_idx(dev, ret);
11502
11503                         if (!aso_age->age_params.context)
11504                                 aso_age->age_params.context =
11505                                                          (void *)(uintptr_t)idx;
11506                 }
11507                 break;
11508         default:
11509                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
11510                                    NULL, "action type not supported");
11511                 break;
11512         }
11513         return ret ? (struct rte_flow_shared_action *)(uintptr_t)idx : NULL;
11514 }
11515
11516 /**
11517  * Destroy the shared action.
11518  * Release action related resources on the NIC and the memory.
11519  * Lock free, (mutex should be acquired by caller).
11520  * Dispatcher for action type specific call.
11521  *
11522  * @param[in] dev
11523  *   Pointer to the Ethernet device structure.
11524  * @param[in] action
11525  *   The shared action object to be removed.
11526  * @param[out] error
11527  *   Perform verbose error reporting if not NULL. Initialized in case of
11528  *   error only.
11529  *
11530  * @return
11531  *   0 on success, otherwise negative errno value.
11532  */
11533 static int
11534 flow_dv_action_destroy(struct rte_eth_dev *dev,
11535                        struct rte_flow_shared_action *action,
11536                        struct rte_flow_error *error)
11537 {
11538         uint32_t act_idx = (uint32_t)(uintptr_t)action;
11539         uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
11540         uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
11541         int ret;
11542
11543         switch (type) {
11544         case MLX5_SHARED_ACTION_TYPE_RSS:
11545                 return __flow_dv_action_rss_release(dev, idx, error);
11546         case MLX5_SHARED_ACTION_TYPE_AGE:
11547                 ret = flow_dv_aso_age_release(dev, idx);
11548                 if (ret)
11549                         /*
11550                          * In this case, the last flow has a reference will
11551                          * actually release the age action.
11552                          */
11553                         DRV_LOG(DEBUG, "Shared age action %" PRIu32 " was"
11554                                 " released with references %d.", idx, ret);
11555                 return 0;
11556         default:
11557                 return rte_flow_error_set(error, ENOTSUP,
11558                                           RTE_FLOW_ERROR_TYPE_ACTION,
11559                                           NULL,
11560                                           "action type not supported");
11561         }
11562 }
11563
11564 /**
11565  * Updates in place shared RSS action configuration.
11566  *
11567  * @param[in] dev
11568  *   Pointer to the Ethernet device structure.
11569  * @param[in] idx
11570  *   The shared RSS action object ID to be updated.
11571  * @param[in] action_conf
11572  *   RSS action specification used to modify *shared_rss*.
11573  * @param[out] error
11574  *   Perform verbose error reporting if not NULL. Initialized in case of
11575  *   error only.
11576  *
11577  * @return
11578  *   0 on success, otherwise negative errno value.
11579  * @note: currently only support update of RSS queues.
11580  */
11581 static int
11582 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
11583                             const struct rte_flow_action_rss *action_conf,
11584                             struct rte_flow_error *error)
11585 {
11586         struct mlx5_priv *priv = dev->data->dev_private;
11587         struct mlx5_shared_action_rss *shared_rss =
11588             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
11589         size_t i;
11590         int ret;
11591         void *queue = NULL;
11592         const uint8_t *rss_key;
11593         uint32_t rss_key_len;
11594         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
11595
11596         if (!shared_rss)
11597                 return rte_flow_error_set(error, EINVAL,
11598                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11599                                           "invalid shared action to update");
11600         queue = mlx5_malloc(MLX5_MEM_ZERO,
11601                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
11602                             0, SOCKET_ID_ANY);
11603         if (!queue)
11604                 return rte_flow_error_set(error, ENOMEM,
11605                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11606                                           NULL,
11607                                           "cannot allocate resource memory");
11608         if (action_conf->key) {
11609                 rss_key = action_conf->key;
11610                 rss_key_len = action_conf->key_len;
11611         } else {
11612                 rss_key = rss_hash_default_key;
11613                 rss_key_len = MLX5_RSS_HASH_KEY_LEN;
11614         }
11615         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
11616                 uint32_t hrxq_idx;
11617                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
11618                 int tunnel;
11619
11620                 for (tunnel = 0; tunnel < 2; tunnel++) {
11621                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup
11622                                         (dev, idx, hash_fields, tunnel);
11623                         MLX5_ASSERT(hrxq_idx);
11624                         ret = mlx5_hrxq_modify
11625                                 (dev, hrxq_idx,
11626                                  rss_key, rss_key_len,
11627                                  hash_fields,
11628                                  action_conf->queue, action_conf->queue_num);
11629                         if (ret) {
11630                                 mlx5_free(queue);
11631                                 return rte_flow_error_set
11632                                         (error, rte_errno,
11633                                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11634                                          "cannot update hash queue");
11635                         }
11636                 }
11637         }
11638         mlx5_free(shared_rss->queue);
11639         shared_rss->queue = queue;
11640         memcpy(shared_rss->queue, action_conf->queue, queue_size);
11641         shared_rss->origin.queue = shared_rss->queue;
11642         shared_rss->origin.queue_num = action_conf->queue_num;
11643         return 0;
11644 }
11645
11646 /**
11647  * Updates in place shared action configuration, lock free,
11648  * (mutex should be acquired by caller).
11649  *
11650  * @param[in] dev
11651  *   Pointer to the Ethernet device structure.
11652  * @param[in] action
11653  *   The shared action object to be updated.
11654  * @param[in] action_conf
11655  *   Action specification used to modify *action*.
11656  *   *action_conf* should be of type correlating with type of the *action*,
11657  *   otherwise considered as invalid.
11658  * @param[out] error
11659  *   Perform verbose error reporting if not NULL. Initialized in case of
11660  *   error only.
11661  *
11662  * @return
11663  *   0 on success, otherwise negative errno value.
11664  */
11665 static int
11666 flow_dv_action_update(struct rte_eth_dev *dev,
11667                         struct rte_flow_shared_action *action,
11668                         const void *action_conf,
11669                         struct rte_flow_error *err)
11670 {
11671         uint32_t act_idx = (uint32_t)(uintptr_t)action;
11672         uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
11673         uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
11674
11675         switch (type) {
11676         case MLX5_SHARED_ACTION_TYPE_RSS:
11677                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
11678         default:
11679                 return rte_flow_error_set(err, ENOTSUP,
11680                                           RTE_FLOW_ERROR_TYPE_ACTION,
11681                                           NULL,
11682                                           "action type update not supported");
11683         }
11684 }
11685
11686 static int
11687 flow_dv_action_query(struct rte_eth_dev *dev,
11688                      const struct rte_flow_shared_action *action, void *data,
11689                      struct rte_flow_error *error)
11690 {
11691         struct mlx5_age_param *age_param;
11692         struct rte_flow_query_age *resp;
11693         uint32_t act_idx = (uint32_t)(uintptr_t)action;
11694         uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
11695         uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
11696
11697         switch (type) {
11698         case MLX5_SHARED_ACTION_TYPE_AGE:
11699                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
11700                 resp = data;
11701                 resp->aged = __atomic_load_n(&age_param->state,
11702                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
11703                                                                           1 : 0;
11704                 resp->sec_since_last_hit_valid = !resp->aged;
11705                 if (resp->sec_since_last_hit_valid)
11706                         resp->sec_since_last_hit = __atomic_load_n
11707                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
11708                 return 0;
11709         default:
11710                 return rte_flow_error_set(error, ENOTSUP,
11711                                           RTE_FLOW_ERROR_TYPE_ACTION,
11712                                           NULL,
11713                                           "action type query not supported");
11714         }
11715 }
11716
11717 /**
11718  * Query a dv flow  rule for its statistics via devx.
11719  *
11720  * @param[in] dev
11721  *   Pointer to Ethernet device.
11722  * @param[in] flow
11723  *   Pointer to the sub flow.
11724  * @param[out] data
11725  *   data retrieved by the query.
11726  * @param[out] error
11727  *   Perform verbose error reporting if not NULL.
11728  *
11729  * @return
11730  *   0 on success, a negative errno value otherwise and rte_errno is set.
11731  */
11732 static int
11733 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
11734                     void *data, struct rte_flow_error *error)
11735 {
11736         struct mlx5_priv *priv = dev->data->dev_private;
11737         struct rte_flow_query_count *qc = data;
11738
11739         if (!priv->config.devx)
11740                 return rte_flow_error_set(error, ENOTSUP,
11741                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11742                                           NULL,
11743                                           "counters are not supported");
11744         if (flow->counter) {
11745                 uint64_t pkts, bytes;
11746                 struct mlx5_flow_counter *cnt;
11747
11748                 cnt = flow_dv_counter_get_by_idx(dev, flow->counter,
11749                                                  NULL);
11750                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
11751                                                &bytes);
11752
11753                 if (err)
11754                         return rte_flow_error_set(error, -err,
11755                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11756                                         NULL, "cannot read counters");
11757                 qc->hits_set = 1;
11758                 qc->bytes_set = 1;
11759                 qc->hits = pkts - cnt->hits;
11760                 qc->bytes = bytes - cnt->bytes;
11761                 if (qc->reset) {
11762                         cnt->hits = pkts;
11763                         cnt->bytes = bytes;
11764                 }
11765                 return 0;
11766         }
11767         return rte_flow_error_set(error, EINVAL,
11768                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11769                                   NULL,
11770                                   "counters are not available");
11771 }
11772
11773 /**
11774  * Query a flow rule AGE action for aging information.
11775  *
11776  * @param[in] dev
11777  *   Pointer to Ethernet device.
11778  * @param[in] flow
11779  *   Pointer to the sub flow.
11780  * @param[out] data
11781  *   data retrieved by the query.
11782  * @param[out] error
11783  *   Perform verbose error reporting if not NULL.
11784  *
11785  * @return
11786  *   0 on success, a negative errno value otherwise and rte_errno is set.
11787  */
11788 static int
11789 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
11790                   void *data, struct rte_flow_error *error)
11791 {
11792         struct rte_flow_query_age *resp = data;
11793         struct mlx5_age_param *age_param;
11794
11795         if (flow->age) {
11796                 struct mlx5_aso_age_action *act =
11797                                      flow_aso_age_get_by_idx(dev, flow->age);
11798
11799                 age_param = &act->age_params;
11800         } else if (flow->counter) {
11801                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
11802
11803                 if (!age_param || !age_param->timeout)
11804                         return rte_flow_error_set
11805                                         (error, EINVAL,
11806                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11807                                          NULL, "cannot read age data");
11808         } else {
11809                 return rte_flow_error_set(error, EINVAL,
11810                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11811                                           NULL, "age data not available");
11812         }
11813         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
11814                                      AGE_TMOUT ? 1 : 0;
11815         resp->sec_since_last_hit_valid = !resp->aged;
11816         if (resp->sec_since_last_hit_valid)
11817                 resp->sec_since_last_hit = __atomic_load_n
11818                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
11819         return 0;
11820 }
11821
11822 /**
11823  * Query a flow.
11824  *
11825  * @see rte_flow_query()
11826  * @see rte_flow_ops
11827  */
11828 static int
11829 flow_dv_query(struct rte_eth_dev *dev,
11830               struct rte_flow *flow __rte_unused,
11831               const struct rte_flow_action *actions __rte_unused,
11832               void *data __rte_unused,
11833               struct rte_flow_error *error __rte_unused)
11834 {
11835         int ret = -EINVAL;
11836
11837         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
11838                 switch (actions->type) {
11839                 case RTE_FLOW_ACTION_TYPE_VOID:
11840                         break;
11841                 case RTE_FLOW_ACTION_TYPE_COUNT:
11842                         ret = flow_dv_query_count(dev, flow, data, error);
11843                         break;
11844                 case RTE_FLOW_ACTION_TYPE_AGE:
11845                         ret = flow_dv_query_age(dev, flow, data, error);
11846                         break;
11847                 default:
11848                         return rte_flow_error_set(error, ENOTSUP,
11849                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11850                                                   actions,
11851                                                   "action not supported");
11852                 }
11853         }
11854         return ret;
11855 }
11856
11857 /**
11858  * Destroy the meter table set.
11859  * Lock free, (mutex should be acquired by caller).
11860  *
11861  * @param[in] dev
11862  *   Pointer to Ethernet device.
11863  * @param[in] tbl
11864  *   Pointer to the meter table set.
11865  *
11866  * @return
11867  *   Always 0.
11868  */
11869 static int
11870 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
11871                         struct mlx5_meter_domains_infos *tbl)
11872 {
11873         struct mlx5_priv *priv = dev->data->dev_private;
11874         struct mlx5_meter_domains_infos *mtd =
11875                                 (struct mlx5_meter_domains_infos *)tbl;
11876
11877         if (!mtd || !priv->config.dv_flow_en)
11878                 return 0;
11879         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
11880                 claim_zero(mlx5_flow_os_destroy_flow
11881                            (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
11882         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
11883                 claim_zero(mlx5_flow_os_destroy_flow
11884                            (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
11885         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
11886                 claim_zero(mlx5_flow_os_destroy_flow
11887                            (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
11888         if (mtd->egress.color_matcher)
11889                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11890                            (mtd->egress.color_matcher));
11891         if (mtd->egress.any_matcher)
11892                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11893                            (mtd->egress.any_matcher));
11894         if (mtd->egress.tbl)
11895                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->egress.tbl);
11896         if (mtd->egress.sfx_tbl)
11897                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->egress.sfx_tbl);
11898         if (mtd->ingress.color_matcher)
11899                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11900                            (mtd->ingress.color_matcher));
11901         if (mtd->ingress.any_matcher)
11902                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11903                            (mtd->ingress.any_matcher));
11904         if (mtd->ingress.tbl)
11905                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->ingress.tbl);
11906         if (mtd->ingress.sfx_tbl)
11907                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11908                                              mtd->ingress.sfx_tbl);
11909         if (mtd->transfer.color_matcher)
11910                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11911                            (mtd->transfer.color_matcher));
11912         if (mtd->transfer.any_matcher)
11913                 claim_zero(mlx5_flow_os_destroy_flow_matcher
11914                            (mtd->transfer.any_matcher));
11915         if (mtd->transfer.tbl)
11916                 flow_dv_tbl_resource_release(MLX5_SH(dev), mtd->transfer.tbl);
11917         if (mtd->transfer.sfx_tbl)
11918                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11919                                              mtd->transfer.sfx_tbl);
11920         if (mtd->drop_actn)
11921                 claim_zero(mlx5_flow_os_destroy_flow_action(mtd->drop_actn));
11922         mlx5_free(mtd);
11923         return 0;
11924 }
11925
11926 /* Number of meter flow actions, count and jump or count and drop. */
11927 #define METER_ACTIONS 2
11928
11929 /**
11930  * Create specify domain meter table and suffix table.
11931  *
11932  * @param[in] dev
11933  *   Pointer to Ethernet device.
11934  * @param[in,out] mtb
11935  *   Pointer to DV meter table set.
11936  * @param[in] egress
11937  *   Table attribute.
11938  * @param[in] transfer
11939  *   Table attribute.
11940  * @param[in] color_reg_c_idx
11941  *   Reg C index for color match.
11942  *
11943  * @return
11944  *   0 on success, -1 otherwise and rte_errno is set.
11945  */
11946 static int
11947 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
11948                            struct mlx5_meter_domains_infos *mtb,
11949                            uint8_t egress, uint8_t transfer,
11950                            uint32_t color_reg_c_idx)
11951 {
11952         struct mlx5_priv *priv = dev->data->dev_private;
11953         struct mlx5_dev_ctx_shared *sh = priv->sh;
11954         struct mlx5_flow_dv_match_params mask = {
11955                 .size = sizeof(mask.buf),
11956         };
11957         struct mlx5_flow_dv_match_params value = {
11958                 .size = sizeof(value.buf),
11959         };
11960         struct mlx5dv_flow_matcher_attr dv_attr = {
11961                 .type = IBV_FLOW_ATTR_NORMAL,
11962                 .priority = 0,
11963                 .match_criteria_enable = 0,
11964                 .match_mask = (void *)&mask,
11965         };
11966         void *actions[METER_ACTIONS];
11967         struct mlx5_meter_domain_info *dtb;
11968         struct rte_flow_error error;
11969         int i = 0;
11970         int ret;
11971
11972         if (transfer)
11973                 dtb = &mtb->transfer;
11974         else if (egress)
11975                 dtb = &mtb->egress;
11976         else
11977                 dtb = &mtb->ingress;
11978         /* Create the meter table with METER level. */
11979         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
11980                                             egress, transfer, false, NULL, 0,
11981                                             0, &error);
11982         if (!dtb->tbl) {
11983                 DRV_LOG(ERR, "Failed to create meter policer table.");
11984                 return -1;
11985         }
11986         /* Create the meter suffix table with SUFFIX level. */
11987         dtb->sfx_tbl = flow_dv_tbl_resource_get(dev,
11988                                             MLX5_FLOW_TABLE_LEVEL_SUFFIX,
11989                                             egress, transfer, false, NULL, 0,
11990                                             0, &error);
11991         if (!dtb->sfx_tbl) {
11992                 DRV_LOG(ERR, "Failed to create meter suffix table.");
11993                 return -1;
11994         }
11995         /* Create matchers, Any and Color. */
11996         dv_attr.priority = 3;
11997         dv_attr.match_criteria_enable = 0;
11998         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, dtb->tbl->obj,
11999                                                &dtb->any_matcher);
12000         if (ret) {
12001                 DRV_LOG(ERR, "Failed to create meter"
12002                              " policer default matcher.");
12003                 goto error_exit;
12004         }
12005         dv_attr.priority = 0;
12006         dv_attr.match_criteria_enable =
12007                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
12008         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
12009                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
12010         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, dtb->tbl->obj,
12011                                                &dtb->color_matcher);
12012         if (ret) {
12013                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
12014                 goto error_exit;
12015         }
12016         if (mtb->count_actns[RTE_MTR_DROPPED])
12017                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
12018         actions[i++] = mtb->drop_actn;
12019         /* Default rule: lowest priority, match any, actions: drop. */
12020         ret = mlx5_flow_os_create_flow(dtb->any_matcher, (void *)&value, i,
12021                                        actions,
12022                                        &dtb->policer_rules[RTE_MTR_DROPPED]);
12023         if (ret) {
12024                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
12025                 goto error_exit;
12026         }
12027         return 0;
12028 error_exit:
12029         return -1;
12030 }
12031
12032 /**
12033  * Create the needed meter and suffix tables.
12034  * Lock free, (mutex should be acquired by caller).
12035  *
12036  * @param[in] dev
12037  *   Pointer to Ethernet device.
12038  * @param[in] fm
12039  *   Pointer to the flow meter.
12040  *
12041  * @return
12042  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
12043  */
12044 static struct mlx5_meter_domains_infos *
12045 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
12046                        const struct mlx5_flow_meter *fm)
12047 {
12048         struct mlx5_priv *priv = dev->data->dev_private;
12049         struct mlx5_meter_domains_infos *mtb;
12050         int ret;
12051         int i;
12052
12053         if (!priv->mtr_en) {
12054                 rte_errno = ENOTSUP;
12055                 return NULL;
12056         }
12057         mtb = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*mtb), 0, SOCKET_ID_ANY);
12058         if (!mtb) {
12059                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
12060                 return NULL;
12061         }
12062         /* Create meter count actions */
12063         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
12064                 struct mlx5_flow_counter *cnt;
12065                 if (!fm->policer_stats.cnt[i])
12066                         continue;
12067                 cnt = flow_dv_counter_get_by_idx(dev,
12068                       fm->policer_stats.cnt[i], NULL);
12069                 mtb->count_actns[i] = cnt->action;
12070         }
12071         /* Create drop action. */
12072         ret = mlx5_flow_os_create_flow_action_drop(&mtb->drop_actn);
12073         if (ret) {
12074                 DRV_LOG(ERR, "Failed to create drop action.");
12075                 goto error_exit;
12076         }
12077         /* Egress meter table. */
12078         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
12079         if (ret) {
12080                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
12081                 goto error_exit;
12082         }
12083         /* Ingress meter table. */
12084         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
12085         if (ret) {
12086                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
12087                 goto error_exit;
12088         }
12089         /* FDB meter table. */
12090         if (priv->config.dv_esw_en) {
12091                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
12092                                                  priv->mtr_color_reg);
12093                 if (ret) {
12094                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
12095                         goto error_exit;
12096                 }
12097         }
12098         return mtb;
12099 error_exit:
12100         flow_dv_destroy_mtr_tbl(dev, mtb);
12101         return NULL;
12102 }
12103
12104 /**
12105  * Destroy domain policer rule.
12106  *
12107  * @param[in] dt
12108  *   Pointer to domain table.
12109  */
12110 static void
12111 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
12112 {
12113         int i;
12114
12115         for (i = 0; i < RTE_MTR_DROPPED; i++) {
12116                 if (dt->policer_rules[i]) {
12117                         claim_zero(mlx5_flow_os_destroy_flow
12118                                    (dt->policer_rules[i]));
12119                         dt->policer_rules[i] = NULL;
12120                 }
12121         }
12122         if (dt->jump_actn) {
12123                 claim_zero(mlx5_flow_os_destroy_flow_action(dt->jump_actn));
12124                 dt->jump_actn = NULL;
12125         }
12126 }
12127
12128 /**
12129  * Destroy policer rules.
12130  *
12131  * @param[in] dev
12132  *   Pointer to Ethernet device.
12133  * @param[in] fm
12134  *   Pointer to flow meter structure.
12135  * @param[in] attr
12136  *   Pointer to flow attributes.
12137  *
12138  * @return
12139  *   Always 0.
12140  */
12141 static int
12142 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
12143                               const struct mlx5_flow_meter *fm,
12144                               const struct rte_flow_attr *attr)
12145 {
12146         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
12147
12148         if (!mtb)
12149                 return 0;
12150         if (attr->egress)
12151                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
12152         if (attr->ingress)
12153                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
12154         if (attr->transfer)
12155                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
12156         return 0;
12157 }
12158
12159 /**
12160  * Create specify domain meter policer rule.
12161  *
12162  * @param[in] fm
12163  *   Pointer to flow meter structure.
12164  * @param[in] mtb
12165  *   Pointer to DV meter table set.
12166  * @param[in] mtr_reg_c
12167  *   Color match REG_C.
12168  *
12169  * @return
12170  *   0 on success, -1 otherwise.
12171  */
12172 static int
12173 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
12174                                     struct mlx5_meter_domain_info *dtb,
12175                                     uint8_t mtr_reg_c)
12176 {
12177         struct mlx5_flow_dv_match_params matcher = {
12178                 .size = sizeof(matcher.buf),
12179         };
12180         struct mlx5_flow_dv_match_params value = {
12181                 .size = sizeof(value.buf),
12182         };
12183         struct mlx5_meter_domains_infos *mtb = fm->mfts;
12184         void *actions[METER_ACTIONS];
12185         int i;
12186         int ret = 0;
12187
12188         /* Create jump action. */
12189         if (!dtb->jump_actn)
12190                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
12191                                 (dtb->sfx_tbl->obj, &dtb->jump_actn);
12192         if (ret) {
12193                 DRV_LOG(ERR, "Failed to create policer jump action.");
12194                 goto error;
12195         }
12196         for (i = 0; i < RTE_MTR_DROPPED; i++) {
12197                 int j = 0;
12198
12199                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
12200                                        rte_col_2_mlx5_col(i), UINT8_MAX);
12201                 if (mtb->count_actns[i])
12202                         actions[j++] = mtb->count_actns[i];
12203                 if (fm->action[i] == MTR_POLICER_ACTION_DROP)
12204                         actions[j++] = mtb->drop_actn;
12205                 else
12206                         actions[j++] = dtb->jump_actn;
12207                 ret = mlx5_flow_os_create_flow(dtb->color_matcher,
12208                                                (void *)&value, j, actions,
12209                                                &dtb->policer_rules[i]);
12210                 if (ret) {
12211                         DRV_LOG(ERR, "Failed to create policer rule.");
12212                         goto error;
12213                 }
12214         }
12215         return 0;
12216 error:
12217         rte_errno = errno;
12218         return -1;
12219 }
12220
12221 /**
12222  * Create policer rules.
12223  *
12224  * @param[in] dev
12225  *   Pointer to Ethernet device.
12226  * @param[in] fm
12227  *   Pointer to flow meter structure.
12228  * @param[in] attr
12229  *   Pointer to flow attributes.
12230  *
12231  * @return
12232  *   0 on success, -1 otherwise.
12233  */
12234 static int
12235 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
12236                              struct mlx5_flow_meter *fm,
12237                              const struct rte_flow_attr *attr)
12238 {
12239         struct mlx5_priv *priv = dev->data->dev_private;
12240         struct mlx5_meter_domains_infos *mtb = fm->mfts;
12241         int ret;
12242
12243         if (attr->egress) {
12244                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
12245                                                 priv->mtr_color_reg);
12246                 if (ret) {
12247                         DRV_LOG(ERR, "Failed to create egress policer.");
12248                         goto error;
12249                 }
12250         }
12251         if (attr->ingress) {
12252                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
12253                                                 priv->mtr_color_reg);
12254                 if (ret) {
12255                         DRV_LOG(ERR, "Failed to create ingress policer.");
12256                         goto error;
12257                 }
12258         }
12259         if (attr->transfer) {
12260                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
12261                                                 priv->mtr_color_reg);
12262                 if (ret) {
12263                         DRV_LOG(ERR, "Failed to create transfer policer.");
12264                         goto error;
12265                 }
12266         }
12267         return 0;
12268 error:
12269         flow_dv_destroy_policer_rules(dev, fm, attr);
12270         return -1;
12271 }
12272
12273 /**
12274  * Validate the batch counter support in root table.
12275  *
12276  * Create a simple flow with invalid counter and drop action on root table to
12277  * validate if batch counter with offset on root table is supported or not.
12278  *
12279  * @param[in] dev
12280  *   Pointer to rte_eth_dev structure.
12281  *
12282  * @return
12283  *   0 on success, a negative errno value otherwise and rte_errno is set.
12284  */
12285 int
12286 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
12287 {
12288         struct mlx5_priv *priv = dev->data->dev_private;
12289         struct mlx5_dev_ctx_shared *sh = priv->sh;
12290         struct mlx5_flow_dv_match_params mask = {
12291                 .size = sizeof(mask.buf),
12292         };
12293         struct mlx5_flow_dv_match_params value = {
12294                 .size = sizeof(value.buf),
12295         };
12296         struct mlx5dv_flow_matcher_attr dv_attr = {
12297                 .type = IBV_FLOW_ATTR_NORMAL,
12298                 .priority = 0,
12299                 .match_criteria_enable = 0,
12300                 .match_mask = (void *)&mask,
12301         };
12302         void *actions[2] = { 0 };
12303         struct mlx5_flow_tbl_resource *tbl = NULL;
12304         struct mlx5_devx_obj *dcs = NULL;
12305         void *matcher = NULL;
12306         void *flow = NULL;
12307         int ret = -1;
12308
12309         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL, 0, 0, NULL);
12310         if (!tbl)
12311                 goto err;
12312         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
12313         if (!dcs)
12314                 goto err;
12315         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
12316                                                     &actions[0]);
12317         if (ret)
12318                 goto err;
12319         actions[1] = priv->drop_queue.hrxq->action;
12320         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
12321         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
12322                                                &matcher);
12323         if (ret)
12324                 goto err;
12325         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 2,
12326                                        actions, &flow);
12327 err:
12328         /*
12329          * If batch counter with offset is not supported, the driver will not
12330          * validate the invalid offset value, flow create should success.
12331          * In this case, it means batch counter is not supported in root table.
12332          *
12333          * Otherwise, if flow create is failed, counter offset is supported.
12334          */
12335         if (flow) {
12336                 DRV_LOG(INFO, "Batch counter is not supported in root "
12337                               "table. Switch to fallback mode.");
12338                 rte_errno = ENOTSUP;
12339                 ret = -rte_errno;
12340                 claim_zero(mlx5_flow_os_destroy_flow(flow));
12341         } else {
12342                 /* Check matcher to make sure validate fail at flow create. */
12343                 if (!matcher || (matcher && errno != EINVAL))
12344                         DRV_LOG(ERR, "Unexpected error in counter offset "
12345                                      "support detection");
12346                 ret = 0;
12347         }
12348         if (actions[0])
12349                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
12350         if (matcher)
12351                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
12352         if (tbl)
12353                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12354         if (dcs)
12355                 claim_zero(mlx5_devx_cmd_destroy(dcs));
12356         return ret;
12357 }
12358
12359 /**
12360  * Query a devx counter.
12361  *
12362  * @param[in] dev
12363  *   Pointer to the Ethernet device structure.
12364  * @param[in] cnt
12365  *   Index to the flow counter.
12366  * @param[in] clear
12367  *   Set to clear the counter statistics.
12368  * @param[out] pkts
12369  *   The statistics value of packets.
12370  * @param[out] bytes
12371  *   The statistics value of bytes.
12372  *
12373  * @return
12374  *   0 on success, otherwise return -1.
12375  */
12376 static int
12377 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
12378                       uint64_t *pkts, uint64_t *bytes)
12379 {
12380         struct mlx5_priv *priv = dev->data->dev_private;
12381         struct mlx5_flow_counter *cnt;
12382         uint64_t inn_pkts, inn_bytes;
12383         int ret;
12384
12385         if (!priv->config.devx)
12386                 return -1;
12387
12388         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
12389         if (ret)
12390                 return -1;
12391         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
12392         *pkts = inn_pkts - cnt->hits;
12393         *bytes = inn_bytes - cnt->bytes;
12394         if (clear) {
12395                 cnt->hits = inn_pkts;
12396                 cnt->bytes = inn_bytes;
12397         }
12398         return 0;
12399 }
12400
12401 /**
12402  * Get aged-out flows.
12403  *
12404  * @param[in] dev
12405  *   Pointer to the Ethernet device structure.
12406  * @param[in] context
12407  *   The address of an array of pointers to the aged-out flows contexts.
12408  * @param[in] nb_contexts
12409  *   The length of context array pointers.
12410  * @param[out] error
12411  *   Perform verbose error reporting if not NULL. Initialized in case of
12412  *   error only.
12413  *
12414  * @return
12415  *   how many contexts get in success, otherwise negative errno value.
12416  *   if nb_contexts is 0, return the amount of all aged contexts.
12417  *   if nb_contexts is not 0 , return the amount of aged flows reported
12418  *   in the context array.
12419  * @note: only stub for now
12420  */
12421 static int
12422 flow_get_aged_flows(struct rte_eth_dev *dev,
12423                     void **context,
12424                     uint32_t nb_contexts,
12425                     struct rte_flow_error *error)
12426 {
12427         struct mlx5_priv *priv = dev->data->dev_private;
12428         struct mlx5_age_info *age_info;
12429         struct mlx5_age_param *age_param;
12430         struct mlx5_flow_counter *counter;
12431         struct mlx5_aso_age_action *act;
12432         int nb_flows = 0;
12433
12434         if (nb_contexts && !context)
12435                 return rte_flow_error_set(error, EINVAL,
12436                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12437                                           NULL, "empty context");
12438         age_info = GET_PORT_AGE_INFO(priv);
12439         rte_spinlock_lock(&age_info->aged_sl);
12440         LIST_FOREACH(act, &age_info->aged_aso, next) {
12441                 nb_flows++;
12442                 if (nb_contexts) {
12443                         context[nb_flows - 1] =
12444                                                 act->age_params.context;
12445                         if (!(--nb_contexts))
12446                                 break;
12447                 }
12448         }
12449         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
12450                 nb_flows++;
12451                 if (nb_contexts) {
12452                         age_param = MLX5_CNT_TO_AGE(counter);
12453                         context[nb_flows - 1] = age_param->context;
12454                         if (!(--nb_contexts))
12455                                 break;
12456                 }
12457         }
12458         rte_spinlock_unlock(&age_info->aged_sl);
12459         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
12460         return nb_flows;
12461 }
12462
12463 /*
12464  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
12465  */
12466 static uint32_t
12467 flow_dv_counter_allocate(struct rte_eth_dev *dev)
12468 {
12469         return flow_dv_counter_alloc(dev, 0);
12470 }
12471
12472 /**
12473  * Validate shared action.
12474  * Dispatcher for action type specific validation.
12475  *
12476  * @param[in] dev
12477  *   Pointer to the Ethernet device structure.
12478  * @param[in] conf
12479  *   Shared action configuration.
12480  * @param[in] action
12481  *   The shared action object to validate.
12482  * @param[out] error
12483  *   Perform verbose error reporting if not NULL. Initialized in case of
12484  *   error only.
12485  *
12486  * @return
12487  *   0 on success, otherwise negative errno value.
12488  */
12489 static int
12490 flow_dv_action_validate(struct rte_eth_dev *dev,
12491                         const struct rte_flow_shared_action_conf *conf,
12492                         const struct rte_flow_action *action,
12493                         struct rte_flow_error *err)
12494 {
12495         struct mlx5_priv *priv = dev->data->dev_private;
12496
12497         RTE_SET_USED(conf);
12498         switch (action->type) {
12499         case RTE_FLOW_ACTION_TYPE_RSS:
12500                 return mlx5_validate_action_rss(dev, action, err);
12501         case RTE_FLOW_ACTION_TYPE_AGE:
12502                 if (!priv->sh->aso_age_mng)
12503                         return rte_flow_error_set(err, ENOTSUP,
12504                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12505                                                 NULL,
12506                                              "shared age action not supported");
12507                 return flow_dv_validate_action_age(0, action, dev, err);
12508         default:
12509                 return rte_flow_error_set(err, ENOTSUP,
12510                                           RTE_FLOW_ERROR_TYPE_ACTION,
12511                                           NULL,
12512                                           "action type not supported");
12513         }
12514 }
12515
12516 static int
12517 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
12518 {
12519         struct mlx5_priv *priv = dev->data->dev_private;
12520         int ret = 0;
12521
12522         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
12523                 ret = mlx5_glue->dr_sync_domain(priv->sh->rx_domain,
12524                                                 flags);
12525                 if (ret != 0)
12526                         return ret;
12527         }
12528         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
12529                 ret = mlx5_glue->dr_sync_domain(priv->sh->tx_domain, flags);
12530                 if (ret != 0)
12531                         return ret;
12532         }
12533         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
12534                 ret = mlx5_glue->dr_sync_domain(priv->sh->fdb_domain, flags);
12535                 if (ret != 0)
12536                         return ret;
12537         }
12538         return 0;
12539 }
12540
12541 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
12542         .validate = flow_dv_validate,
12543         .prepare = flow_dv_prepare,
12544         .translate = flow_dv_translate,
12545         .apply = flow_dv_apply,
12546         .remove = flow_dv_remove,
12547         .destroy = flow_dv_destroy,
12548         .query = flow_dv_query,
12549         .create_mtr_tbls = flow_dv_create_mtr_tbl,
12550         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
12551         .create_policer_rules = flow_dv_create_policer_rules,
12552         .destroy_policer_rules = flow_dv_destroy_policer_rules,
12553         .counter_alloc = flow_dv_counter_allocate,
12554         .counter_free = flow_dv_counter_free,
12555         .counter_query = flow_dv_counter_query,
12556         .get_aged_flows = flow_get_aged_flows,
12557         .action_validate = flow_dv_action_validate,
12558         .action_create = flow_dv_action_create,
12559         .action_destroy = flow_dv_action_destroy,
12560         .action_update = flow_dv_action_update,
12561         .action_query = flow_dv_action_query,
12562         .sync_domain = flow_dv_sync_domain,
12563 };
12564
12565 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
12566